mirror of
https://github.com/supleed2/ELEC40006-P1-CW.git
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874 lines
22 KiB
Plaintext
874 lines
22 KiB
Plaintext
/*
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WARNING: Do NOT edit the input and output ports in this file in a text
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editor if you plan to continue editing the block that represents it in
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the Block Editor! File corruption is VERY likely to occur.
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*/
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/*
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Copyright (C) 2019 Intel Corporation. All rights reserved.
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Your use of Intel Corporation's design tools, logic functions
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and other software and tools, and any partner logic
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functions, and any output files from any of the foregoing
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(including device programming or simulation files), and any
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associated documentation or information are expressly subject
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to the terms and conditions of the Intel Program License
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Subscription Agreement, the Intel Quartus Prime License Agreement,
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the Intel FPGA IP License Agreement, or other applicable license
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agreement, including, without limitation, that your use is for
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the sole purpose of programming logic devices manufactured by
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Intel and sold by Intel or its authorized distributors. Please
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refer to the applicable agreement for further details, at
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https://fpgasoftware.intel.com/eula.
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*/
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(line (pt 145 96)(pt 160 96)(line_width 3))
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"LPM_DIRECTION"
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"ADD"
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"Selects between addition, subtraction, or both"
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"\"DEFAULT\"" "\"ADD\"" "\"SUB\""
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(type "PARAMETER_STRING") )
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(parameter
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"LPM_PIPELINE"
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""
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"Output latency in clock cycles - requires use of optional clock"
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"0" "1" "2" "3" "4"
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)
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(parameter
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"LPM_REPRESENTATION"
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"UNSIGNED"
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"Numeric representation of inputs"
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"\"UNSIGNED\"" "\"SIGNED\""
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(type "PARAMETER_STRING") )
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(parameter
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"LPM_WIDTH"
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"32"
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"Width of I/O, any integer > 0"
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" 1" " 2" " 3" " 4" " 5" " 6" " 7" " 8" " 9" "10" "11" "12" "13" "14" "15" "16" "20" "24" "28" "32" "40" "48" "56" "64"
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""
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" 0" " 1" " 2" " 3" " 4" " 5" " 6" " 7" " 8" " 9" "10"
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)
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"ADD"
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|
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|
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(type "PARAMETER_STRING") )
|
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(parameter
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|
"LPM_PIPELINE"
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|
""
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"Output latency in clock cycles - requires use of optional clock"
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|
"0" "1" "2" "3" "4"
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|
)
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(parameter
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|
"LPM_REPRESENTATION"
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|
"UNSIGNED"
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"Numeric representation of inputs"
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|
"\"UNSIGNED\"" "\"SIGNED\""
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(type "PARAMETER_STRING") )
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"32"
|
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"Width of I/O, any integer > 0"
|
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" 1" " 2" " 3" " 4" " 5" " 6" " 7" " 8" " 9" "10" "11" "12" "13" "14" "15" "16" "20" "24" "28" "32" "40" "48" "56" "64"
|
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(type "PARAMETER_UNSIGNED_DEC") )
|
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(parameter
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|
"MAXIMIZE_SPEED"
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|
""
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|
"Hint to help tradeoff between speed and size"
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|
" 0" " 1" " 2" " 3" " 4" " 5" " 6" " 7" " 8" " 9" "10"
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|
)
|
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(parameter
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|
"ONE_INPUT_IS_CONSTANT"
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|
""
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|
|
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(parameter
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|
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"ADD"
|
|
"Selects between addition, subtraction, or both"
|
|
"\"DEFAULT\"" "\"ADD\"" "\"SUB\""
|
|
(type "PARAMETER_STRING") )
|
|
(parameter
|
|
"LPM_PIPELINE"
|
|
""
|
|
"Output latency in clock cycles - requires use of optional clock"
|
|
"0" "1" "2" "3" "4"
|
|
)
|
|
(parameter
|
|
"LPM_REPRESENTATION"
|
|
"UNSIGNED"
|
|
"Numeric representation of inputs"
|
|
"\"UNSIGNED\"" "\"SIGNED\""
|
|
(type "PARAMETER_STRING") )
|
|
(parameter
|
|
"LPM_WIDTH"
|
|
"32"
|
|
"Width of I/O, any integer > 0"
|
|
" 1" " 2" " 3" " 4" " 5" " 6" " 7" " 8" " 9" "10" "11" "12" "13" "14" "15" "16" "20" "24" "28" "32" "40" "48" "56" "64"
|
|
(type "PARAMETER_UNSIGNED_DEC") )
|
|
(parameter
|
|
"MAXIMIZE_SPEED"
|
|
""
|
|
"Hint to help tradeoff between speed and size"
|
|
" 0" " 1" " 2" " 3" " 4" " 5" " 6" " 7" " 8" " 9" "10"
|
|
)
|
|
(parameter
|
|
"ONE_INPUT_IS_CONSTANT"
|
|
""
|
|
"Hint to help minimize the number of LCELLs"
|
|
"\"NO\"" "\"YES\""
|
|
)
|
|
(drawing
|
|
(line (pt 16 48)(pt 72 48))
|
|
(line (pt 16 152)(pt 144 152))
|
|
(line (pt 16 16)(pt 144 16))
|
|
(line (pt 16 72)(pt 56 72)(line_width 3))
|
|
(line (pt 16 120)(pt 56 120)(line_width 3))
|
|
(line (pt 104 96)(pt 144 96)(line_width 3))
|
|
(line (pt 88 128)(pt 144 128))
|
|
(line (pt 16 32)(pt 88 32))
|
|
(line (pt 80 144)(pt 144 144))
|
|
(line (pt 16 144)(pt 72 144))
|
|
(line (pt 104 112)(pt 104 80))
|
|
(line (pt 88 128)(pt 88 120))
|
|
(line (pt 16 152)(pt 16 16))
|
|
(line (pt 144 152)(pt 144 16))
|
|
(line (pt 56 136)(pt 56 56))
|
|
(line (pt 72 64)(pt 72 48))
|
|
(line (pt 88 72)(pt 88 32))
|
|
(line (pt 80 144)(pt 80 124))
|
|
(line (pt 72 144)(pt 72 128))
|
|
(line (pt 56 56)(pt 104 80))
|
|
(line (pt 56 136)(pt 104 112))
|
|
)
|
|
(annotation_block (parameter)(rect 1728 48 2038 181))
|
|
)
|
|
(symbol
|
|
(rect 648 56 816 152)
|
|
(text "mul8" (rect 5 0 35 19)(font "Intel Clear" (font_size 8)))
|
|
(text "MUL1" (rect 8 75 36 92)(font "Intel Clear" ))
|
|
(port
|
|
(pt 0 32)
|
|
(input)
|
|
(text "CLOCK" (rect 0 0 41 19)(font "Intel Clear" (font_size 8)))
|
|
(text "CLOCK" (rect 21 27 62 46)(font "Intel Clear" (font_size 8)))
|
|
(line (pt 0 32)(pt 16 32))
|
|
)
|
|
(port
|
|
(pt 0 48)
|
|
(input)
|
|
(text "A[7..0]" (rect 0 0 38 19)(font "Intel Clear" (font_size 8)))
|
|
(text "A[7..0]" (rect 21 43 59 62)(font "Intel Clear" (font_size 8)))
|
|
(line (pt 0 48)(pt 16 48)(line_width 3))
|
|
)
|
|
(port
|
|
(pt 0 64)
|
|
(input)
|
|
(text "B[7..0]" (rect 0 0 38 19)(font "Intel Clear" (font_size 8)))
|
|
(text "B[7..0]" (rect 21 59 59 78)(font "Intel Clear" (font_size 8)))
|
|
(line (pt 0 64)(pt 16 64)(line_width 3))
|
|
)
|
|
(port
|
|
(pt 168 32)
|
|
(output)
|
|
(text "PROD[15..0]" (rect 0 0 74 19)(font "Intel Clear" (font_size 8)))
|
|
(text "PROD[15..0]" (rect 73 27 147 46)(font "Intel Clear" (font_size 8)))
|
|
(line (pt 168 32)(pt 152 32)(line_width 3))
|
|
)
|
|
(drawing
|
|
(rectangle (rect 16 16 152 80))
|
|
)
|
|
)
|
|
(symbol
|
|
(rect 648 176 816 272)
|
|
(text "mul8" (rect 5 0 35 19)(font "Intel Clear" (font_size 8)))
|
|
(text "MUL2" (rect 8 75 36 92)(font "Intel Clear" ))
|
|
(port
|
|
(pt 0 32)
|
|
(input)
|
|
(text "CLOCK" (rect 0 0 41 19)(font "Intel Clear" (font_size 8)))
|
|
(text "CLOCK" (rect 21 27 62 46)(font "Intel Clear" (font_size 8)))
|
|
(line (pt 0 32)(pt 16 32))
|
|
)
|
|
(port
|
|
(pt 0 48)
|
|
(input)
|
|
(text "A[7..0]" (rect 0 0 38 19)(font "Intel Clear" (font_size 8)))
|
|
(text "A[7..0]" (rect 21 43 59 62)(font "Intel Clear" (font_size 8)))
|
|
(line (pt 0 48)(pt 16 48)(line_width 3))
|
|
)
|
|
(port
|
|
(pt 0 64)
|
|
(input)
|
|
(text "B[7..0]" (rect 0 0 38 19)(font "Intel Clear" (font_size 8)))
|
|
(text "B[7..0]" (rect 21 59 59 78)(font "Intel Clear" (font_size 8)))
|
|
(line (pt 0 64)(pt 16 64)(line_width 3))
|
|
)
|
|
(port
|
|
(pt 168 32)
|
|
(output)
|
|
(text "PROD[15..0]" (rect 0 0 74 19)(font "Intel Clear" (font_size 8)))
|
|
(text "PROD[15..0]" (rect 73 27 147 46)(font "Intel Clear" (font_size 8)))
|
|
(line (pt 168 32)(pt 152 32)(line_width 3))
|
|
)
|
|
(drawing
|
|
(rectangle (rect 16 16 152 80))
|
|
)
|
|
)
|
|
(symbol
|
|
(rect 648 288 816 384)
|
|
(text "mul8" (rect 5 0 35 19)(font "Intel Clear" (font_size 8)))
|
|
(text "MUL3" (rect 8 75 36 92)(font "Intel Clear" ))
|
|
(port
|
|
(pt 0 32)
|
|
(input)
|
|
(text "CLOCK" (rect 0 0 41 19)(font "Intel Clear" (font_size 8)))
|
|
(text "CLOCK" (rect 21 27 62 46)(font "Intel Clear" (font_size 8)))
|
|
(line (pt 0 32)(pt 16 32))
|
|
)
|
|
(port
|
|
(pt 0 48)
|
|
(input)
|
|
(text "A[7..0]" (rect 0 0 38 19)(font "Intel Clear" (font_size 8)))
|
|
(text "A[7..0]" (rect 21 43 59 62)(font "Intel Clear" (font_size 8)))
|
|
(line (pt 0 48)(pt 16 48)(line_width 3))
|
|
)
|
|
(port
|
|
(pt 0 64)
|
|
(input)
|
|
(text "B[7..0]" (rect 0 0 38 19)(font "Intel Clear" (font_size 8)))
|
|
(text "B[7..0]" (rect 21 59 59 78)(font "Intel Clear" (font_size 8)))
|
|
(line (pt 0 64)(pt 16 64)(line_width 3))
|
|
)
|
|
(port
|
|
(pt 168 32)
|
|
(output)
|
|
(text "PROD[15..0]" (rect 0 0 74 19)(font "Intel Clear" (font_size 8)))
|
|
(text "PROD[15..0]" (rect 73 27 147 46)(font "Intel Clear" (font_size 8)))
|
|
(line (pt 168 32)(pt 152 32)(line_width 3))
|
|
)
|
|
(drawing
|
|
(rectangle (rect 16 16 152 80))
|
|
)
|
|
)
|
|
(symbol
|
|
(rect 648 392 816 488)
|
|
(text "mul8" (rect 5 0 35 19)(font "Intel Clear" (font_size 8)))
|
|
(text "MUL4" (rect 8 75 36 92)(font "Intel Clear" ))
|
|
(port
|
|
(pt 0 32)
|
|
(input)
|
|
(text "CLOCK" (rect 0 0 41 19)(font "Intel Clear" (font_size 8)))
|
|
(text "CLOCK" (rect 21 27 62 46)(font "Intel Clear" (font_size 8)))
|
|
(line (pt 0 32)(pt 16 32))
|
|
)
|
|
(port
|
|
(pt 0 48)
|
|
(input)
|
|
(text "A[7..0]" (rect 0 0 38 19)(font "Intel Clear" (font_size 8)))
|
|
(text "A[7..0]" (rect 21 43 59 62)(font "Intel Clear" (font_size 8)))
|
|
(line (pt 0 48)(pt 16 48)(line_width 3))
|
|
)
|
|
(port
|
|
(pt 0 64)
|
|
(input)
|
|
(text "B[7..0]" (rect 0 0 38 19)(font "Intel Clear" (font_size 8)))
|
|
(text "B[7..0]" (rect 21 59 59 78)(font "Intel Clear" (font_size 8)))
|
|
(line (pt 0 64)(pt 16 64)(line_width 3))
|
|
)
|
|
(port
|
|
(pt 168 32)
|
|
(output)
|
|
(text "PROD[15..0]" (rect 0 0 74 19)(font "Intel Clear" (font_size 8)))
|
|
(text "PROD[15..0]" (rect 73 27 147 46)(font "Intel Clear" (font_size 8)))
|
|
(line (pt 168 32)(pt 152 32)(line_width 3))
|
|
)
|
|
(drawing
|
|
(rectangle (rect 16 16 152 80))
|
|
)
|
|
)
|
|
(symbol
|
|
(rect 168 160 200 192)
|
|
(text "GND" (rect 8 16 29 26)(font "Arial" (font_size 6)))
|
|
(text "inst5" (rect 3 21 26 33)(font "Arial" )(invisible))
|
|
(port
|
|
(pt 16 0)
|
|
(output)
|
|
(text "1" (rect 18 0 23 12)(font "Courier New" (bold))(invisible))
|
|
(text "1" (rect 18 0 23 12)(font "Courier New" (bold))(invisible))
|
|
(line (pt 16 8)(pt 16 0))
|
|
)
|
|
(drawing
|
|
(line (pt 8 8)(pt 16 16))
|
|
(line (pt 16 16)(pt 24 8))
|
|
(line (pt 8 8)(pt 24 8))
|
|
)
|
|
)
|
|
(connector
|
|
(text "B[15..8]" (rect 570 104 606 121)(font "Intel Clear" ))
|
|
(pt 648 120)
|
|
(pt 560 120)
|
|
(bus)
|
|
)
|
|
(connector
|
|
(text "A[15..8]" (rect 570 88 606 105)(font "Intel Clear" ))
|
|
(pt 648 104)
|
|
(pt 560 104)
|
|
(bus)
|
|
)
|
|
(connector
|
|
(text "A[15..8]" (rect 578 208 614 225)(font "Intel Clear" ))
|
|
(pt 648 224)
|
|
(pt 568 224)
|
|
(bus)
|
|
)
|
|
(connector
|
|
(text "B[7..0]" (rect 578 224 608 241)(font "Intel Clear" ))
|
|
(pt 648 240)
|
|
(pt 568 240)
|
|
(bus)
|
|
)
|
|
(connector
|
|
(text "A[7..0]" (rect 586 320 616 337)(font "Intel Clear" ))
|
|
(pt 648 336)
|
|
(pt 576 336)
|
|
(bus)
|
|
)
|
|
(connector
|
|
(text "B[15..8]" (rect 586 336 622 353)(font "Intel Clear" ))
|
|
(pt 576 352)
|
|
(pt 648 352)
|
|
(bus)
|
|
)
|
|
(connector
|
|
(text "A[7..0]" (rect 594 424 624 441)(font "Intel Clear" ))
|
|
(pt 648 440)
|
|
(pt 584 440)
|
|
(bus)
|
|
)
|
|
(connector
|
|
(text "B[7..0]" (rect 594 440 624 457)(font "Intel Clear" ))
|
|
(pt 648 456)
|
|
(pt 584 456)
|
|
(bus)
|
|
)
|
|
(connector
|
|
(text "P1[15..0]" (rect 826 72 868 89)(font "Intel Clear" ))
|
|
(pt 816 88)
|
|
(pt 880 88)
|
|
(bus)
|
|
)
|
|
(connector
|
|
(text "P2[15..0]" (rect 826 192 868 209)(font "Intel Clear" ))
|
|
(pt 816 208)
|
|
(pt 880 208)
|
|
(bus)
|
|
)
|
|
(connector
|
|
(text "P3[15..0]" (rect 834 296 876 313)(font "Intel Clear" ))
|
|
(pt 816 320)
|
|
(pt 888 320)
|
|
(bus)
|
|
)
|
|
(connector
|
|
(text "P4[15..0]" (rect 826 408 868 425)(font "Intel Clear" ))
|
|
(pt 816 424)
|
|
(pt 888 424)
|
|
(bus)
|
|
)
|
|
(connector
|
|
(pt 520 88)
|
|
(pt 648 88)
|
|
)
|
|
(connector
|
|
(pt 520 208)
|
|
(pt 648 208)
|
|
)
|
|
(connector
|
|
(pt 520 208)
|
|
(pt 520 88)
|
|
)
|
|
(connector
|
|
(pt 520 424)
|
|
(pt 648 424)
|
|
)
|
|
(connector
|
|
(pt 520 208)
|
|
(pt 520 216)
|
|
)
|
|
(connector
|
|
(pt 520 320)
|
|
(pt 648 320)
|
|
)
|
|
(connector
|
|
(pt 520 216)
|
|
(pt 520 320)
|
|
)
|
|
(connector
|
|
(pt 520 320)
|
|
(pt 520 424)
|
|
)
|
|
(connector
|
|
(pt 1544 304)
|
|
(pt 1568 304)
|
|
(bus)
|
|
)
|
|
(connector
|
|
(pt 1544 304)
|
|
(pt 1544 640)
|
|
(bus)
|
|
)
|
|
(connector
|
|
(pt 1544 640)
|
|
(pt 1456 640)
|
|
(bus)
|
|
)
|
|
(connector
|
|
(pt 1424 144)
|
|
(pt 1480 144)
|
|
(bus)
|
|
)
|
|
(connector
|
|
(pt 1480 144)
|
|
(pt 1480 256)
|
|
(bus)
|
|
)
|
|
(connector
|
|
(pt 1568 256)
|
|
(pt 1480 256)
|
|
(bus)
|
|
)
|
|
(connector
|
|
(text "0" (rect 168 153 185 158)(font "Intel Clear" )(vertical))
|
|
(pt 184 136)
|
|
(pt 184 160)
|
|
)
|
|
(connector
|
|
(text "P1[15..0],0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0" (rect 962 104 1136 121)(font "Intel Clear" ))
|
|
(pt 1264 120)
|
|
(pt 952 120)
|
|
(bus)
|
|
)
|
|
(connector
|
|
(text "0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,P4[15..0]" (rect 978 152 1152 169)(font "Intel Clear" ))
|
|
(pt 1264 168)
|
|
(pt 968 168)
|
|
(bus)
|
|
)
|
|
(connector
|
|
(text "0,0,0,0,0,0,0,0,P2[15..0],0,0,0,0,0,0,0,0" (rect 986 600 1160 617)(font "Intel Clear" ))
|
|
(pt 1296 616)
|
|
(pt 976 616)
|
|
(bus)
|
|
)
|
|
(connector
|
|
(text "0,0,0,0,0,0,0,0,P3[15..0],0,0,0,0,0,0,0,0" (rect 994 648 1168 665)(font "Intel Clear" ))
|
|
(pt 1296 664)
|
|
(pt 984 664)
|
|
(bus)
|
|
)
|
|
(connector
|
|
(text "PR[31..0]" (rect 1738 264 1781 281)(font "Intel Clear" ))
|
|
(pt 1728 280)
|
|
(pt 1872 280)
|
|
(bus)
|
|
)
|
|
(connector
|
|
(pt 208 312)
|
|
(pt 216 312)
|
|
(bus)
|
|
)
|
|
(connector
|
|
(pt 216 312)
|
|
(pt 376 312)
|
|
(bus)
|
|
)
|
|
(connector
|
|
(pt 216 264)
|
|
(pt 224 264)
|
|
(bus)
|
|
)
|
|
(connector
|
|
(pt 224 264)
|
|
(pt 376 264)
|
|
(bus)
|
|
)
|
|
(connector
|
|
(pt 200 216)
|
|
(pt 216 216)
|
|
)
|
|
(connector
|
|
(pt 216 216)
|
|
(pt 520 216)
|
|
)
|
|
(junction (pt 520 208))
|
|
(junction (pt 520 216))
|
|
(junction (pt 520 320))
|
|
(junction (pt 216 312))
|
|
(junction (pt 224 264))
|
|
(junction (pt 216 216))
|