ELEC40006-P1-CW/instr.mif

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2020-05-27 17:53:03 +00:00
-- Copyright (C) 2018 Intel Corporation. All rights reserved.
-- Your use of Intel Corporation's design tools, logic functions
-- and other software and tools, and its AMPP partner logic
-- functions, and any output files from any of the foregoing
-- (including device programming or simulation files), and any
-- associated documentation or information are expressly subject
-- to the terms and conditions of the Intel Program License
-- Subscription Agreement, the Intel Quartus Prime License Agreement,
-- the Intel FPGA IP License Agreement, or other applicable license
-- agreement, including, without limitation, that your use is for
-- the sole purpose of programming logic devices manufactured by
-- Intel and sold by Intel or its authorized distributors. Please
-- refer to the applicable agreement for further details.
-- Quartus Prime generated Memory Initialization File (.mif)
WIDTH=16;
DEPTH=2048;
ADDRESS_RADIX=HEX;
DATA_RADIX=HEX;
CONTENT BEGIN
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000 : 8800;
001 : 9001;
002 : 26D0;
003 : 291A;
004 : 2D00;
005 : 3161;
006 : 3440;
007 : 3993;
008 : 3AA5;
009 : D003;
00A : 3CE2;
00B : A003;
00C : 9804;
00D : 38A5;
00E : 3FC0;
00F : 419F;
010 : 304F;
011 : 5008;
012 : 5028;
013 : 284F;
014 : 43F7;
015 : 3540;
016 : 47F5;
017 : 484D;
018 : 8806;
019 : 0040;
01A : B800;
01B : 8807;
01C : 085A;
01D : B800;
01E : 8808;
01F : 0A7D;
020 : B800;
021 : 8809;
022 : 0C53;
023 : B801;
024 : 880A;
025 : B00B;
026 : 0E70;
027 : B800;
028 : 880C;
029 : 1063;
02A : B800;
02B : 880D;
02C : 126D;
02D : B800;
02E : 880E;
02F : 147A;
030 : B800;
031 : 880F;
032 : 5340;
033 : 53C0;
034 : 1678;
035 : B800;
036 : 1863;
037 : 1A5A;
038 : 1FB8;
039 : 7C00;
03A : 1C77;
03B : 204C;
03C : A810;
03D : 226D;
03E : 246D;
03F : 7E00;
[040..7FF] : 0000;
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END;