ELEC40006-P1-CW/ALU_top.bsf

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2020-06-04 15:33:27 +00:00
/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 2018 Intel Corporation. All rights reserved.
Your use of Intel Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Intel Program License
Subscription Agreement, the Intel Quartus Prime License Agreement,
the Intel FPGA IP License Agreement, or other applicable license
agreement, including, without limitation, that your use is for
the sole purpose of programming logic devices manufactured by
Intel and sold by Intel or its authorized distributors. Please
refer to the applicable agreement for further details.
*/
(header "symbol" (version "1.2"))
(symbol
(rect 16 16 200 176)
(text "ALU_top" (rect 5 0 56 19)(font "Intel Clear" (font_size 8)))
(text "inst" (rect 8 139 24 156)(font "Intel Clear" ))
(port
(pt 0 32)
(input)
(text "ALU_en" (rect 0 0 46 19)(font "Intel Clear" (font_size 8)))
(text "ALU_en" (rect 21 27 67 46)(font "Intel Clear" (font_size 8)))
(line (pt 0 32)(pt 16 32))
)
(port
(pt 0 48)
(input)
(text "Rs1[15..0]" (rect 0 0 61 19)(font "Intel Clear" (font_size 8)))
(text "Rs1[15..0]" (rect 21 43 82 62)(font "Intel Clear" (font_size 8)))
(line (pt 0 48)(pt 16 48)(line_width 3))
)
(port
(pt 0 64)
(input)
(text "Rs2[15..0]" (rect 0 0 61 19)(font "Intel Clear" (font_size 8)))
(text "Rs2[15..0]" (rect 21 59 82 78)(font "Intel Clear" (font_size 8)))
(line (pt 0 64)(pt 16 64)(line_width 3))
)
(port
(pt 0 80)
(input)
(text "Rd[15..0]" (rect 0 0 55 19)(font "Intel Clear" (font_size 8)))
(text "Rd[15..0]" (rect 21 75 76 94)(font "Intel Clear" (font_size 8)))
(line (pt 0 80)(pt 16 80)(line_width 3))
)
(port
(pt 0 96)
(input)
(text "op[5..0]" (rect 0 0 46 19)(font "Intel Clear" (font_size 8)))
(text "op[5..0]" (rect 21 91 67 110)(font "Intel Clear" (font_size 8)))
(line (pt 0 96)(pt 16 96)(line_width 3))
)
(port
(pt 0 112)
(input)
(text "EXEC2" (rect 0 0 38 19)(font "Intel Clear" (font_size 8)))
(text "EXEC2" (rect 21 107 59 126)(font "Intel Clear" (font_size 8)))
(line (pt 0 112)(pt 16 112))
)
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(port
(pt 0 128)
(input)
(text "CLK" (rect 0 0 23 19)(font "Intel Clear" (font_size 8)))
(text "CLK" (rect 21 123 44 142)(font "Intel Clear" (font_size 8)))
(line (pt 0 128)(pt 16 128))
)
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(port
(pt 184 32)
(output)
(text "Rout[15..0]" (rect 0 0 66 19)(font "Intel Clear" (font_size 8)))
(text "Rout[15..0]" (rect 97 27 163 46)(font "Intel Clear" (font_size 8)))
(line (pt 184 32)(pt 168 32)(line_width 3))
)
(port
(pt 184 48)
(output)
(text "COND" (rect 0 0 36 19)(font "Intel Clear" (font_size 8)))
(text "COND" (rect 127 43 163 62)(font "Intel Clear" (font_size 8)))
(line (pt 184 48)(pt 168 48))
)
(port
(pt 184 64)
(output)
(text "CARRY" (rect 0 0 41 19)(font "Intel Clear" (font_size 8)))
(text "CARRY" (rect 122 59 163 78)(font "Intel Clear" (font_size 8)))
(line (pt 184 64)(pt 168 64))
)
(drawing
(rectangle (rect 16 16 168 144))
)
)