ELEC40006-P1-CW/instr.mif

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2020-05-27 17:53:03 +00:00
-- Copyright (C) 2018 Intel Corporation. All rights reserved.
-- Your use of Intel Corporation's design tools, logic functions
-- and other software and tools, and its AMPP partner logic
-- functions, and any output files from any of the foregoing
-- (including device programming or simulation files), and any
-- associated documentation or information are expressly subject
-- to the terms and conditions of the Intel Program License
-- Subscription Agreement, the Intel Quartus Prime License Agreement,
-- the Intel FPGA IP License Agreement, or other applicable license
-- agreement, including, without limitation, that your use is for
-- the sole purpose of programming logic devices manufactured by
-- Intel and sold by Intel or its authorized distributors. Please
-- refer to the applicable agreement for further details.
-- Quartus Prime generated Memory Initialization File (.mif)
WIDTH=16;
DEPTH=2048;
ADDRESS_RADIX=UNS;
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DATA_RADIX=HEX;
CONTENT BEGIN
0 : 8800;
1 : 9001;
2 : 26D0;
3 : 291A;
4 : 2D20;
5 : 3161;
6 : 3448;
7 : D002;
8 : B002;
9 : 9804;
10 : B811;
11 : 419F;
12 : 304F;
13 : 5008;
14 : 5028;
15 : 284F;
16 : 43F7;
17 : 3568;
18 : 45F5;
19 : 484D;
20 : 8806;
21 : 0040;
22 : B800;
23 : 8807;
24 : 085A;
25 : B800;
26 : 8808;
27 : 0A6F;
28 : B800;
29 : 8809;
30 : 0C53;
31 : B801;
32 : 880A;
33 : B00B;
34 : 0E70;
35 : B800;
36 : 880C;
37 : 1063;
38 : B800;
39 : 880D;
40 : 126D;
41 : B800;
42 : 880E;
43 : 147E;
44 : B800;
45 : 880F;
46 : 5340;
47 : 53C0;
48 : 1678;
49 : B800;
50 : 1863;
51 : 1A5F;
52 : 1FB8;
53 : 7C00;
54 : 1C77;
55 : 204C;
56 : A810;
57 : 226D;
58 : 246D;
59 : 7E00;
[60..2047] : 0000;
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END;