EIE4-FYP/rtl
Aadi Desai 2829a32dc6
Tidy project
Rename modules for clarity
Move LiteX modules into `modules/`
Move extras into `notes/`
2023-06-18 17:25:53 +01:00
..
can.sv Add pulse output to can for frame received 2023-06-09 13:58:42 +01:00
cordic.sv Update cordic.sv and saw2sin.sv for better accuracy, genSaw.sv to fix polarity of tri/sin 2023-06-04 12:07:28 +01:00
dacAttenuation.sv Tidy project 2023-06-18 17:25:53 +01:00
dacDriver.sv Working version of dac driver 2023-05-16 22:12:41 +01:00
genSaw.sv Move sine bit inversion from genSaw to saw2sin 2023-06-06 18:51:36 +01:00
genWave.sv Fix genWave output glitches 2023-06-08 16:13:32 +01:00
ledPwm.sv Tidy project 2023-06-18 17:25:53 +01:00
saw2sin.sv Move sine bit inversion from genSaw to saw2sin 2023-06-06 18:51:36 +01:00