Add sine wave generator using cordic

This commit is contained in:
Aadi Desai 2023-05-28 16:07:23 +01:00
parent 6601b6f3af
commit d784f6d251
No known key found for this signature in database
4 changed files with 35 additions and 2 deletions

1
.gitignore vendored
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@ -12,4 +12,3 @@
/dump-*.vcd /dump-*.vcd
/*.dfu /*.dfu
/kernel.bin /kernel.bin
/sintest/

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@ -45,7 +45,10 @@ logic [15:0] triangle;
always_comb triangle = saw[15] ? {~saw[14:0], 1'b1} : {saw[14:0], 1'b0}; // Triangle wave calc always_comb triangle = saw[15] ? {~saw[14:0], 1'b1} : {saw[14:0], 1'b0}; // Triangle wave calc
logic [15:0] sine; logic [15:0] sine;
always_comb sine = saw; // TODO: Insert sine calcuation here? saw2sin m_saw2sin // Instantiate saw2sin module
( .i_saw(saw)
, .o_sin(sine)
);
always_comb // Select output waveform always_comb // Select output waveform
case (i_wave[1:0]) case (i_wave[1:0])

29
rtl/saw2sin.sv Normal file
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@ -0,0 +1,29 @@
`default_nettype none
module saw2sin
( input var [15:0] i_saw
, output var [15:0] o_sin
);
logic invert;
always_comb invert = i_saw[15];
logic reverse;
always_comb reverse = i_saw[14];
logic [15:0] qsaw;
always_comb qsaw = reverse
? {~i_saw[13:0], 2'b01} // Reverse
: {i_saw[13:0], 2'b00}; // Normal
logic [15:0] qsin;
cordic cordic
( .i_qph (qsaw)
, .o_sin (qsin)
);
always_comb o_sin = invert
? ~{1'b1, qsin[15:1]} + 1 // Invert
: {1'b1, qsin[15:1]}; // Normal
endmodule

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@ -14,6 +14,8 @@ class TestSaw(Module, AutoCSR, ModuleDoc):
Set the expected frequency sawtooth wave to be output via the headphone port. Set the expected frequency sawtooth wave to be output via the headphone port.
""" """
def __init__(self, platform, pads): def __init__(self, platform, pads):
platform.add_source("rtl/cordic.sv")
platform.add_source("rtl/saw2sin.sv")
platform.add_source("rtl/genSaw.sv") platform.add_source("rtl/genSaw.sv")
platform.add_source("rtl/dacDriver.sv") platform.add_source("rtl/dacDriver.sv")