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Add docs link for MigenAsyncFIFO to readme

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Aadi Desai 2023-05-16 22:14:45 +01:00
parent 5b80f2538f
commit b2573b5f95
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make.py
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@ -237,7 +237,7 @@ class BaseSoC(SoCCore):
pads = platform.request("dac_pcm") pads = platform.request("dac_pcm")
) )
# LiteScope Analyzer ----------------------------------------------------------------------- # LiteScope Analyzer -----------------------------------------------------------------------
self.add_uartbone(name="debug_uart", baudrate=921600) self.add_uartbone(name="debug_uart", baudrate=921600)
from litescope import LiteScopeAnalyzer from litescope import LiteScopeAnalyzer
analyzer_signals = [ analyzer_signals = [

1
readme.md
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@ -9,6 +9,7 @@
### Useful links ### Useful links
- [API Reference migen, AsyncFIFO](https://m-labs.hk/migen/manual/reference.html#module-migen.genlib.fifo)
- [Guide on adding a new core (incomplete)](https://github.com/enjoy-digital/litex/wiki/Add-A-New-Core) - [Guide on adding a new core (incomplete)](https://github.com/enjoy-digital/litex/wiki/Add-A-New-Core)
- [Using LiteEth on ECP5](https://github.com/enjoy-digital/liteeth/issues/66) - [Using LiteEth on ECP5](https://github.com/enjoy-digital/liteeth/issues/66)
- [Adding HW modules](https://github.com/enjoy-digital/litex/issues/746), lots more info in issue - [Adding HW modules](https://github.com/enjoy-digital/litex/issues/746), lots more info in issue