supleed2/EIE4-FYP
1
0
Fork 0
mirror of https://github.com/supleed2/EIE4-FYP.git synced 2024-12-22 22:25:50 +00:00
Code Issues Packages Projects Releases Wiki Activity

Add readme notes

Browse source
This commit is contained in:
Aadi Desai 2023-02-26 14:59:50 +00:00
parent 6d8c1059fa
commit 9322fe0fd4
No known key found for this signature in database
1 changed files with 8 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

8
readme.md
View file

@ -2,8 +2,15 @@
## Project Notes ## Project Notes
- [Guide on adding a new core (incomplete)](https://github.com/enjoy-digital/litex/wiki/Add-A-New-Core)
- [Using LiteEth on ECP5](https://github.com/enjoy-digital/liteeth/issues/66)
- [Adding HW modules](https://github.com/enjoy-digital/litex/issues/746), lots more info in issue
- Possible useful info in [soc.py](litex/litex/soc/integration/soc.py), Lines 1311 - 2106
- Also [generic_platform.py](litex/litex/build/generic_platform.py), Lines 324 - 522
### Useful links ### Useful links
- [Migen (base for litex) GitHub Repository](https://github.com/m-labs/migen)
- [Litex Wiki: reusing SV or other cores](https://github.com/enjoy-digital/litex/wiki/Reuse-a-(System)Verilog,-VHDL,-(n)Migen,-Spinal-HDL,-Chisel-core) - [Litex Wiki: reusing SV or other cores](https://github.com/enjoy-digital/litex/wiki/Reuse-a-(System)Verilog,-VHDL,-(n)Migen,-Spinal-HDL,-Chisel-core)
- [Litex for Hardware Engineers](https://github.com/enjoy-digital/litex/wiki/LiteX-for-Hardware-Engineers) - [Litex for Hardware Engineers](https://github.com/enjoy-digital/litex/wiki/LiteX-for-Hardware-Engineers)
- [Example of RTOS on LiteX](https://numato.com/kb/running-zephyr-rtos-on-mimas-a7-using-litex-and-risc-v/) - [Example of RTOS on LiteX](https://numato.com/kb/running-zephyr-rtos-on-mimas-a7-using-litex-and-risc-v/)
@ -13,6 +20,7 @@
- [VexRiscV Source](https://github.com/SpinalHDL/VexRiscv) - [VexRiscV Source](https://github.com/SpinalHDL/VexRiscv)
- [Summon FPGA Tools Repo](https://github.com/open-tool-forge/summon-fpga-tools) - [Summon FPGA Tools Repo](https://github.com/open-tool-forge/summon-fpga-tools)
- [Broken Flag issue when building litex](https://github.com/enjoy-digital/litex/issues/825) - [Broken Flag issue when building litex](https://github.com/enjoy-digital/litex/issues/825)
- [On-board DAC Datasheet](https://www.ti.com/product/PCM1780)
### Possible reference links ### Possible reference links