From 32e342762ad57becef46cd715e1d76814e5d8ffd Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=C5=81ukasz=20Czy=C5=BC?=
 <35401835+krawacik3@users.noreply.github.com>
Date: Mon, 2 Dec 2019 12:30:07 +0100
Subject: [PATCH] Update README.md

---
 README.md | 19 ++++++++++++++-----
 1 file changed, 14 insertions(+), 5 deletions(-)

diff --git a/README.md b/README.md
index 7a163a2..3e4d561 100644
--- a/README.md
+++ b/README.md
@@ -4,6 +4,15 @@ Zero-cost abstraction register library generator.
 *svd2cpp* is a generator that parses .svd files provided by ARM chip vendor.
 It generates header file that allows for reading and writing to microcontroller's registers with zero overhead.
 
+### Benefits
+1. **Compile-time checking.** This is an aspect that is making this solution better than any other parser/pre-generated header.
+    * You won't be able to write to wrong register.
+    * You won't be able to write wrong value (i.e. 0b1011 to 3-bit field) to register.
+    * You can't read from write-only or write to read-only register.
+  Any attempt to do something wrong will succeed in error at **compile-time** - no more runtime debugging to find out misspelling errors!
+2. **Zero-cost abstraction.** Another strong aspect of headers generated by *svd2cpp* is that using it in code will result in zero overhead because all of the checking is done at compile-time.
+3. **Portability.** As long as manufacturer provides .svd files in CMSIS-SVD format (and most major manufacturers of Cortex-M based chips does), you can use it with this parser.
+
 ## How to get *svd2cpp*?
   Download source code and compile it. Note that this repo uses submodules thus do not forget to `git submodule init` and `git submodule update` after cloning.
 
@@ -24,23 +33,23 @@ Syntax is quite simple and easy to use:
 ```cpp
 operation<PERIPHERAL::REGISTER::BIT>();
 ```
-###Examples:
-Set bit UE(USART enable) in USART1 Control Register 1
+### Examples:
+Set bit UE(USART enable) in USART1 Control Register 1:
 ```cpp
 set<USART1::CR1::UE>();
 ```
 
-Reset bit UE(USART enable) in USART1 Control Register 1
+Reset bit UE(USART enable) in USART1 Control Register 1:
 ```cpp
 reset<USART1::CR1::UE>();
 ```
 
-Read Channel 1 Transfer Complete flag in DMA1 ISR Register
+Read Channel 1 Transfer Complete flag in DMA1 ISR Register:
 ```cpp
 bool transferComplete = read<DMA1::ISR::TCIF1>();
 ```
 
-Set Memory address for DMA1 channel 2
+Set Memory address for DMA1 channel 2:
 ```cpp
 set<DMA1::CMAR2::MA>(0xDEADBEEF);
 ```