From c83b8a73f1a4b350a7508b64019892d8f469b791 Mon Sep 17 00:00:00 2001
From: Aadi Desai <ad3919@ee-mill3.ee.ic.ac.uk>
Date: Mon, 7 Nov 2022 12:58:43 +0000
Subject: [PATCH] Switch all Verilog files to SystemVerilog file endings

---
 rtl/{AHBLITE_SYS.v => AHBLITE_SYS.sv}                       | 0
 rtl/AHB_BRAM/{AHB2BRAM.v => AHB2BRAM.sv}                    | 0
 rtl/AHB_BUS/{AHBDCD.v => AHBDCD.sv}                         | 0
 rtl/AHB_BUS/{AHBMUX.v => AHBMUX.sv}                         | 0
 rtl/AHB_GPIO/{AHBGPIO.v => AHBGPIO.sv}                      | 0
 rtl/AHB_VGA/{AHBVGASYS.v => AHBVGASYS.sv}                   | 0
 rtl/AHB_VGA/{counter.v => counter.sv}                       | 0
 rtl/AHB_VGA/{dual_port_ram_sync.v => dual_port_ram_sync.sv} | 0
 rtl/AHB_VGA/{font_rom.v => font_rom.sv}                     | 0
 rtl/AHB_VGA/{vga_console.v => vga_console.sv}               | 0
 rtl/AHB_VGA/{vga_image.v => vga_image.sv}                   | 0
 rtl/AHB_VGA/{vga_sync.v => vga_sync.sv}                     | 0
 tbench/{ahblite_sys_tb.v => ahblite_sys_tb.sv}              | 0
 13 files changed, 0 insertions(+), 0 deletions(-)
 rename rtl/{AHBLITE_SYS.v => AHBLITE_SYS.sv} (100%)
 rename rtl/AHB_BRAM/{AHB2BRAM.v => AHB2BRAM.sv} (100%)
 rename rtl/AHB_BUS/{AHBDCD.v => AHBDCD.sv} (100%)
 rename rtl/AHB_BUS/{AHBMUX.v => AHBMUX.sv} (100%)
 rename rtl/AHB_GPIO/{AHBGPIO.v => AHBGPIO.sv} (100%)
 rename rtl/AHB_VGA/{AHBVGASYS.v => AHBVGASYS.sv} (100%)
 rename rtl/AHB_VGA/{counter.v => counter.sv} (100%)
 rename rtl/AHB_VGA/{dual_port_ram_sync.v => dual_port_ram_sync.sv} (100%)
 rename rtl/AHB_VGA/{font_rom.v => font_rom.sv} (100%)
 rename rtl/AHB_VGA/{vga_console.v => vga_console.sv} (100%)
 rename rtl/AHB_VGA/{vga_image.v => vga_image.sv} (100%)
 rename rtl/AHB_VGA/{vga_sync.v => vga_sync.sv} (100%)
 rename tbench/{ahblite_sys_tb.v => ahblite_sys_tb.sv} (100%)

diff --git a/rtl/AHBLITE_SYS.v b/rtl/AHBLITE_SYS.sv
similarity index 100%
rename from rtl/AHBLITE_SYS.v
rename to rtl/AHBLITE_SYS.sv
diff --git a/rtl/AHB_BRAM/AHB2BRAM.v b/rtl/AHB_BRAM/AHB2BRAM.sv
similarity index 100%
rename from rtl/AHB_BRAM/AHB2BRAM.v
rename to rtl/AHB_BRAM/AHB2BRAM.sv
diff --git a/rtl/AHB_BUS/AHBDCD.v b/rtl/AHB_BUS/AHBDCD.sv
similarity index 100%
rename from rtl/AHB_BUS/AHBDCD.v
rename to rtl/AHB_BUS/AHBDCD.sv
diff --git a/rtl/AHB_BUS/AHBMUX.v b/rtl/AHB_BUS/AHBMUX.sv
similarity index 100%
rename from rtl/AHB_BUS/AHBMUX.v
rename to rtl/AHB_BUS/AHBMUX.sv
diff --git a/rtl/AHB_GPIO/AHBGPIO.v b/rtl/AHB_GPIO/AHBGPIO.sv
similarity index 100%
rename from rtl/AHB_GPIO/AHBGPIO.v
rename to rtl/AHB_GPIO/AHBGPIO.sv
diff --git a/rtl/AHB_VGA/AHBVGASYS.v b/rtl/AHB_VGA/AHBVGASYS.sv
similarity index 100%
rename from rtl/AHB_VGA/AHBVGASYS.v
rename to rtl/AHB_VGA/AHBVGASYS.sv
diff --git a/rtl/AHB_VGA/counter.v b/rtl/AHB_VGA/counter.sv
similarity index 100%
rename from rtl/AHB_VGA/counter.v
rename to rtl/AHB_VGA/counter.sv
diff --git a/rtl/AHB_VGA/dual_port_ram_sync.v b/rtl/AHB_VGA/dual_port_ram_sync.sv
similarity index 100%
rename from rtl/AHB_VGA/dual_port_ram_sync.v
rename to rtl/AHB_VGA/dual_port_ram_sync.sv
diff --git a/rtl/AHB_VGA/font_rom.v b/rtl/AHB_VGA/font_rom.sv
similarity index 100%
rename from rtl/AHB_VGA/font_rom.v
rename to rtl/AHB_VGA/font_rom.sv
diff --git a/rtl/AHB_VGA/vga_console.v b/rtl/AHB_VGA/vga_console.sv
similarity index 100%
rename from rtl/AHB_VGA/vga_console.v
rename to rtl/AHB_VGA/vga_console.sv
diff --git a/rtl/AHB_VGA/vga_image.v b/rtl/AHB_VGA/vga_image.sv
similarity index 100%
rename from rtl/AHB_VGA/vga_image.v
rename to rtl/AHB_VGA/vga_image.sv
diff --git a/rtl/AHB_VGA/vga_sync.v b/rtl/AHB_VGA/vga_sync.sv
similarity index 100%
rename from rtl/AHB_VGA/vga_sync.v
rename to rtl/AHB_VGA/vga_sync.sv
diff --git a/tbench/ahblite_sys_tb.v b/tbench/ahblite_sys_tb.sv
similarity index 100%
rename from tbench/ahblite_sys_tb.v
rename to tbench/ahblite_sys_tb.sv