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https://github.com/supleed2/ELEC70056-HSV-CW2.git
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Fixes and adding missing setup.do script for vsim
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@ -95,7 +95,6 @@ module AHBVGA(
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//VGA interface: control the synchronization and color signals for a particular resolution
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VGAInterface uVGAInterface (
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.CLK(HCLK),
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.resetn(HRESETn),
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.COLOUR_IN(cin),
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.cout(RGB),
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.hs(HSYNC),
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@ -132,48 +131,33 @@ module AHBVGA(
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assign sel_image = (last_HADDR[23:0] != 12'h000000000000);
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//Set console write and write data
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always @(posedge HCLK, negedge HRESETn)
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begin
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if(!HRESETn)
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begin
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console_write <= 0;
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console_wdata <= 0;
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end
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else if(last_HWRITE & last_HSEL & last_HTRANS[1] & HREADYOUT & sel_console)
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begin
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console_write <= 1'b1;
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console_wdata <= HWDATA[7:0];
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end
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else
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begin
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console_write <= 1'b0;
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console_wdata <= 0;
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end
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end
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always_ff @(posedge HCLK, negedge HRESETn)
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if(!HRESETn) begin
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console_write <= 0;
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console_wdata <= 0;
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end else if (last_HWRITE & last_HSEL & last_HTRANS[1] & HREADYOUT & sel_console) begin
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console_write <= 1'b1;
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console_wdata <= HWDATA[7:0];
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end else begin
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console_write <= 1'b0;
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console_wdata <= 0;
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end
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//Set image write and image write data
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always @(posedge HCLK, negedge HRESETn)
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begin
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if(!HRESETn)
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begin
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image_write <= 0;
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image_wdata <= 0;
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end
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else if(last_HWRITE & last_HSEL & last_HTRANS[1] & HREADYOUT & sel_image)
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begin
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image_write <= 1'b1;
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image_wdata <= HWDATA[7:0];
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end
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else
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begin
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image_write <= 1'b0;
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image_wdata <= 0;
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end
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end
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always_ff @(posedge HCLK, negedge HRESETn)
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if(!HRESETn) begin
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image_write <= 0;
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image_wdata <= 0;
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end else if(last_HWRITE & last_HSEL & last_HTRANS[1] & HREADYOUT & sel_image) begin
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image_write <= 1'b1;
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image_wdata <= HWDATA[7:0];
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end else begin
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image_write <= 1'b0;
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image_wdata <= 0;
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end
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//Select the rgb color for a particular region
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always @*
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begin
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always_comb
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if(!HRESETn)
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cin <= 8'h00;
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else
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@ -181,7 +165,6 @@ module AHBVGA(
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cin <= console_rgb ;
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else
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cin <= image_rgb;
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end
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endmodule
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