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Add initial assume to AHBGPIO.sv

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This commit is contained in:
Alden0012 2022-11-08 17:27:39 +00:00
parent 0f8578e1b8
commit 4edfce0e03
1 changed files with 32 additions and 29 deletions
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17
rtl/AHB_GPIO/AHBGPIO.sv
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@ -68,8 +68,6 @@ module AHBGPIO
reg last_HWRITE;
reg last_HSEL;
integer i;
assign HREADYOUT = 1'b1;
// Set Registers from address phase
@ -115,12 +113,12 @@ module AHBGPIO
//check behaviour
assert_parity: assert property
( @posedge(HCLK) disable iff (!HRESETn)
!PARITYERR;
( @(posedge HCLK) disable iff (!HRESETn)
!PARITYERR
);
assert_gpio_write: assert property
( @posedge(HCLK) disable iff (!HRESETn)
( @(posedge HCLK) disable iff (!HRESETn)
((gpio_dir == 16'h0001)
&& (HADDR[7:0] == gpio_data_addr)
&& HSEL
@ -130,7 +128,7 @@ module AHBGPIO
);
assert_gpio_read: assert property
( @posedge(HCLK) disable iff (!HRESETn)
( @(posedge HCLK) disable iff (!HRESETn)
((gpio_dir == 16'h0000)
&& (HADDR[7:0] == gpio_data_addr)
// && HSEL // HSEL not used in Read always_ff
@ -141,7 +139,7 @@ module AHBGPIO
);
assert_gpio_dir: assert property
( @posedge(HCLK) disable iff (!HRESETn)
( @(posedge HCLK) disable iff (!HRESETn)
((HADDR[7:0] == gpio_dir_addr)
&& HSEL
&& HWRITE
@ -149,4 +147,9 @@ module AHBGPIO
|-> (gpio_dir == $past(HWDATA[15:0], 1))
);
assume_initial_valid: assume
( gpio_dir == 16'h0000
|| gpio_dir == 16'h0001
);
endmodule