| .. |
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addiu
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testcase fix 2
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2020-12-20 16:03:43 +08:00 |
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addu
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Rename all instruction mem init files to .instr.txt
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2020-12-18 12:42:58 +00:00 |
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and
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testcase error fix
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2020-12-20 15:55:15 +08:00 |
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andi
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testcase error fix
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2020-12-20 15:55:15 +08:00 |
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beq
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added some jump testcases
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2020-12-19 15:24:34 +08:00 |
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bgez
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added more branch instructions testcases
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2020-12-19 14:15:44 +08:00 |
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bgezal
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added more branch instructions testcases
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2020-12-19 14:15:44 +08:00 |
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bgtz
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added more branch instructions testcases
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2020-12-19 14:15:44 +08:00 |
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blez
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fixed branch instr testcase
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2020-12-19 06:32:51 +00:00 |
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bltz
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added more branch instructions testcases
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2020-12-19 14:15:44 +08:00 |
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bltzal
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added more branch instructions testcases
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2020-12-19 14:15:44 +08:00 |
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bne
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added some jump testcases
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2020-12-19 15:24:34 +08:00 |
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div
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Rename all instruction mem init files to .instr.txt
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2020-12-18 12:42:58 +00:00 |
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divu
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Fix divu testcases and add divu-5 testcase
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2020-12-19 05:37:54 +00:00 |
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j
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fixing testcase errors
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2020-12-19 11:16:39 +00:00 |
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jal
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added some jump testcases
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2020-12-19 15:24:34 +08:00 |
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jalr
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added some jump testcases
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2020-12-19 15:24:34 +08:00 |
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jr
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weird cases added
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2020-12-18 23:10:15 +08:00 |
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lb
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load instr testcase
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2020-12-19 19:04:29 +08:00 |
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lbu
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fixing testcase errors
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2020-12-19 11:16:39 +00:00 |
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lh
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load instr testcase
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2020-12-19 19:04:29 +08:00 |
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lhu
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load instr testcase
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2020-12-19 19:04:29 +08:00 |
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lui
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load instr testcase
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2020-12-19 19:04:29 +08:00 |
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lw
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load instr testcase
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2020-12-19 19:04:29 +08:00 |
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lwl
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load instr testcase
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2020-12-19 19:04:29 +08:00 |
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lwr
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load instr testcase
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2020-12-19 19:04:29 +08:00 |
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mthi
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Add more testcases for mthi, mtlo, mult, multu
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2020-12-19 15:34:35 +00:00 |
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mtlo
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Add more testcases for mthi, mtlo, mult, multu
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2020-12-19 15:34:35 +00:00 |
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mult
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Add more testcases for mthi, mtlo, mult, multu
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2020-12-19 15:34:35 +00:00 |
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multu
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Add more testcases for mthi, mtlo, mult, multu
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2020-12-19 15:34:35 +00:00 |
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or
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Add more testcases for mthi, mtlo, mult, multu
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2020-12-19 15:34:35 +00:00 |
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ori
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Add testcases for or and ori
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2020-12-19 13:13:56 +00:00 |
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sb
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Add sb testcase
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2020-12-19 16:05:44 +00:00 |
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sh
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Rename all instruction mem init files to .instr.txt
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2020-12-18 12:42:58 +00:00 |
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sll
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testcase error fix
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2020-12-20 15:55:15 +08:00 |
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sllv
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testcase fix 3
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2020-12-20 16:29:24 +08:00 |
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slt
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last extra testcases
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2020-12-20 15:30:20 +08:00 |
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slti
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Fix sllv, srlv, srav to shift by A[4:0]
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2020-12-20 09:07:35 +00:00 |
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sltiu
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Fix sllv, srlv, srav to shift by A[4:0]
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2020-12-20 09:07:35 +00:00 |
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sltu
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last extra testcases
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2020-12-20 15:30:20 +08:00 |
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sra
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minor correction
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2020-12-20 10:31:18 +00:00 |
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srav
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Add more testcase for srav, srlv
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2020-12-20 09:23:22 +00:00 |
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srl
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sll, sllv & store and set instructions still to go
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2020-12-18 23:13:47 +00:00 |
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srlv
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Add more testcase for srav, srlv
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2020-12-20 09:23:22 +00:00 |
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subu
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sll, sllv & store and set instructions still to go
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2020-12-18 23:13:47 +00:00 |
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sw
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Rename all instruction mem init files to .instr.txt
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2020-12-18 12:42:58 +00:00 |
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xor
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sll, sllv & store and set instructions still to go
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2020-12-18 23:13:47 +00:00 |
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xori
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sll, sllv & store and set instructions still to go
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2020-12-18 23:13:47 +00:00 |
