== Instruction == Assembly code Hex code Reference Output ================ ==ADDIU Add immediate unsigned (no overflow)== ORI $4,$0,0xA JR $0 ADDIU $2,$4,20 3404000a 00000008 24820014 register_v0 = 30 == ADDU Add unsigned (no overflow) == ORI $4,$0,3 ORI $5,$0,5 JR $0 ADDU $2,$4,$5 34040003 34050005 00000008 00851021 register_v0 = 8 ==AND Bitwise and== LUI $5,0xCCCC ORI $5,$5,0xCCCC LUI $4,0xAAAA ORI $4,$4,0xAAAA JR $0 AND $2,$4,$5 3c05cccc 34A5cccc 3c04aaaa 3484aaaa 00000008 00851024 register_v0 = 0x88888888 / 2290649224 ==ANDI Bitwise and immediate== LUI $4,0xAAAA ORI $4,$0,0xAAAA JR $0 ANDI $2,$4,0xCCCC 3c04aaaa 3404aaaa 00000008 3082cccc register_v0 = 0x00008888 / 34952 ==BEQ Branch on equal== ORI $4,$0,5 ORI $5,$0,5 BEQ $4,$5,3 NOP JR $0 NOP ORI $2,$0,1 JR $0 34040005 34050005 10850003 00000000 00000008 00000000 34020001 00000008 register_v0 = 1 ==BGEZ Branch on greater than or equal to zero== ORI $4,$0,3 BGEZ $4,3 NOP JR $0 NOP ORI $2,$0,1 JR $0 34040003 04810003 00000000 00000008 00000000 34020001 00000008 register_v0 = 1 ==BGEZAL Branch on non-negative (>=0) and link== ORI $4,$0,3 BGEZAL $4,4 NOP ADDIU $2,$2,1 JR $0 NOP ORI $2,$0,1 JR $31 34040003 04910004 00000000 24420001 00000008 00000000 34020001 03E00008 register_v0 = 2 ==BGTZ Branch on greater than zero== ORI $4,$0,3 BGTZ $4,3 NOP JR $0 NOP ORI $2,$0,1 JR $0 34040003 1C800003 00000000 00000008 00000000 34020001 00000008 register_v0 = 1 ==BLEZ Branch on less than or equal to zero== LUI $4,0xFFFF BLEZ $4,3 NOP JR $0 NOP ORI $2,$0,1 JR $0 3C05FFFF 18800003 00000000 00000008 00000000 34020001 00000008 register_v0 = 1 ==BLTZ Branch on less than zero== LUI $4,0xFFFF BLTZ $4,3 NOP JR $0 NOP ORI $2,$0,1 JR $0 3C04FFFF 04800003 00000000 00000008 00000000 34020001 00000008 register_v0 = 1 ==BLTZAL Branch on less than zero and link== LUI $4,0xFFFF BLTZAL $4,4 NOP ADDIU $2,$2,1 JR $0 NOP ORI $2,$0,1 JR $31 3C05FFFF 04900004 00000000 24420001 00000008 00000000 34020001 03E00008 register_v0 = 2 ==BNE Branch on not equal== ORI $4,$0,3 ORI $5,$0,5 BNE $4,$5,3 NOP JR $0 NOP ORI $2,$0,1 JR $0 34040003 34040005 14850003 00000000 00000008 00000000 34020001 00000008 register_v0 = 1 ==DIV Divide== //May need other testcases for -ve/+ve, -ve/-ve ORI $4,$0,3 ORI $5,$0,9 DIV $5,$4 MFHI $4 MFLO $5 ADDU $2,$4,$5 JR $0 34040003 34050009 00A4001A 00002010 00002812 00851021 00000008 register_v0 = 3 ==DIVU Divide unsigned== //May need other testcases for -ve/+ve, -ve/-ve LUI $4,0x8000 ORI $5,$0,2 DIVU $4,$5 MFHI $4 MFLO $5 ADDU $2,$4,$5 JR $0 3C048000 34050002 0085001B 00002010 00002812 00851021 00000008 register_v0 = 0x40000000 / 1073741824 ==J Jump== J 4 NOP JR $0 NOP ORI $2,$0,1 JR $0 08000004 00000000 00000008 00000000 34020001 00000008 register_v0 = 1 ==JALR Jump and link register== LUI $5,0xBFC0 ORI $5,$5,0x001C JALR $4,$5 NOP ADDIU $2,$2,1 JR $0 NOP ORI $2,$0,1 JR $4 3C05BCF0 34A5001C 00A02009 00000000 24420001 00000008 00000000 34020001 00800008 register_v0 = 2 ==JAL Jump and link== JAL 5 NOP ADDIU $2,$2,1 JR $0 NOP ORI $2,$0,1 JR $31 0C000005 00000000 24420001 00000008 00000000 34020001 03E00008 register_v0 = 2 ==JR Jump register== LUI $5,0xBFC0 ORI $5,$5,0x0014 JR $5 NOP JR $0 NOP ORI $2,$0,0xA JR $0 3C05BFC0 34A50014 00A00008 00000000 00000008 3402000A 00000008 register_v0 = 10 ==LB Load byte== ORI $4,$0,0x1001 JR $0 LB $2,5($4) -Instruction Hex 34041001 00000008 80820005 -Memory Hex 00000000 008A0000 00000000 00000000 register_v0 = 0xFFFFFF8A / 4294967178 ==LBU Load byte unsigned== ORI $4,$0,0x1002 JR $0 LBU $2,4($4) -Instruction Hex 34041002 00000008 90820004 -Memory Hex 00000000 008A0000 00000000 00000000 register_v0 = 0x0000008A / 138 ==LH Load half-word== ORI $4,$0,0x1000 JR $0 LH $2,4($4) -Instruction Hex 34041003 00000008 84820004 -Memory Hex 00000000 00008123 00000000 00000000 register_v0 = 0xFFFF8123 / 4294934819 ==LHU Load half-word unsigned== ORI $4,$0,0x1000 JR $0 LHU $2,4($4) -Instruction Hex 34041000 00000008 94820004 -Memory Hex 00000000 00008123 00000000 00000000 register_v0 = 0x00008123 / 33059 ==LUI Load upper immediate== LUI $2,0x1234 ORI $2,$2,0x5678 JR $0 3C021234 34425678 00000008 register_v0 = 0x12345678 / 305419896 ==LW Load word== ORI $4,$0,0x1002 JR $0 LW $2, 2($4) -Instruction Hex 34041002 00000008 8C820002 -Memory Hex 00000000 12345678 00000000 00000000 register_v0 = 0x12345678 / 305419896 ==LWL Load word left== ORI $4,$0,0x1001 ORI $2,$0,0x5678 JR $0 LWL $2,3($4) -Instruction Hex 34041001 34025678 00000008 88820003 -Memory Hex 00000000 AAAA1234 00000000 00000000 register_v0 = 0x12345678 / 305419896 ==LWR Load word right== LUI $2,0x1234 ORI $4,$0,0x1002 JR $0 LWR $2,3($4) -Instruction Hex 3C021234 34041002 00000008 98820003 -Memory Hex 00000000 5678AAAA 00000000 00000000 register_v0 = 0x12345678 / 305419896 ==MTHI Move to HI== ori $4, $0, 5 mthi $4 mfhi $2 jr $0 34040005 00800011 00001010 00000008 register_v0 = 5 ==MTLO Move to LO== ori $4, $0, 5 mtlo $4 mflo $2 jr $0 34040005 00800013 00001012 00000008 register_v0 = 5 ==MULT Multiply== ori $4, $0, 4 ori $5, $0, 3 mult $4, $5 mflo $2 jr $0 34040004 34050003 00850018 00001012 00000008 register_v0 = 12 ==MULTU Multiply unsigned== ori $4, $0, 4 ori $5, $0, 3 multu $4, $5 mflo $2 jr $0 34040004 34050003 00850019 00001012 00000008 register_v0 = 12 ==OR Bitwise or== ori $4, $0, 5 ori $5, $0, 3 jr $0 or $2, $4, $5 34040005 34050003 00000008 00851025 register_v0 = 7 ==ORI Bitwise or immediate== ori $4, $0, 0xFFFF ori $5, $0, 0x1234 jr $0 or $2, $4, $5 3404FFFF 34051234 00851025 00000008 register_v0 = 65535 ==SB Store byte== lui $4, 0x1234 ori $4, $0, 0x5678 lui $5, 0xBFC0 ori $5, $0, 0x001C sb $4, 0($5) lb $2, 0($5) jr $0 3C041234 34045678 3C05BFC0 3405001C A0A40000 80A20000 00000008 register_v0 = 0x00000078 ==SH Store half-word== lui $4, 0x1234 ori $4, $0, 0x5678 lui $5, 0xBFC0 ori $5, $0, 0x001C sh $4, 0($5) lh $2, 0($5) jr $0 3C041234 34045678 3C05BFC0 3405001C A4A40000 84A40000 00000008 register_v0 = 0x00005678 ==SLL Shift left logical== ori $4,$0,3 jr $0 sll $2,$4,2 34040003 00000008 00041080 register_v0 = 12 ==SLLV Shift left logical variable== ori $4,$0,2 ori $5,$0,3 jr $0 sllv $2,$5,$4 34040002 34050003 00000008 00851004 register_v0 = 12 ==SLT Set on less than (signed)== ORI $4 $zero 0xFFFF ORI $5 $zero 0x000B jr $0 SLT $2 $4 $5 3404FFFF 3405000B 00000008 0085102A register_v0 = 0 ==SLTI Set on less than immediate (signed)== ori $4, $0, 10 jr $0 slti $2, $4, 9 3404000a 00000008 28820009 register_v0 = 0 ==SLTIU Set on less than immediate unsigned== ori $4, $0, 10 jr $0 sltiu $2, $4, 9 3404000a 00000008 2c820009 register_v0 = 0 ==SLTU Set on less than unsigned== ori $4, $0, 10 ori $5, $0, 9 jr $0 sltu $2, $4, $5 3404000a 34050009 00000008 0085102b register_v0 = 0 ==SRA Shift right arithmetic== lui $5 $0,0xF000 jr $0 srav $2,$5,2 3C05F000 00000008 00051083 register_v0 = 0xFC000000 / 4227858432 ==SRAV Shift right arithmetic variable== ori $4,$0,2 lui $5, 0xF000 jr $0 srav $2,$5,$4 34040002 3C05F000 00000008 00851007 register_v0 = 0xFC000000 / 4227858432 ==SRL Shift right logical== ori $4,$0,16 jr $0 srl $2,$4,2 34040010 00000008 00041082 register_v0 = 4 ==SRLV Shift right logical variable== ori $4,$0,2 ori $5,$0,16 jr $0 srlv $2,$5,$4 34040002 34050010 00000008 00851006 register_v0 = 4 ==SUBU Subtract unsigned== ori $4,$0,5 ori $5,$0,3 jr $0 subu $2,$4,$5 34040005 34050003 00000008 00851023 register_v0 = 2 ==SW Store word== ori $4, $0, 0xFFFF ori $5, $0, 0x1008 sw $4, 4($5) lw $2, 4($5) jr $0 3404FFFF 34051008 ACA40004 8CA20004 00000008 register_v0 = 0x0000FFFF / 65535 -Negative Offset ori $4, $0, 0xFFFF ori $5, $0, 0x1008 sw $4, -4($5) lw $2, -4($5) jr $0 3404FFFF 34051008 ACA4FFFC 8CA2FFFC 00000008 register_v0 = 0x0000FFFF / 65535 ==XOR Bitwise exclusive or== ori $4, $0, 5 ori $5, $0, 2 jr $0 xor $2, $4, $5 34040005 34050002 00000008 00851026 register_v0 = 7 ==XORI Bitwise exclusive or immediate== ori $4,$0,5 jr $0 xori $2,$4,0x000F 34040005 00000008 3882000F register_v0 = 10