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Add missing opcodes to CtrlMemRead = 0
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@ -117,7 +117,7 @@ always @(*) begin
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CtrlMemtoReg = 3'd3;//write data port of regfile is fed from ALUHi
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CtrlMemtoReg = 3'd3;//write data port of regfile is fed from ALUHi
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end else if ((op==SPECIAL)&&(funct == MFLO))begin
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end else if ((op==SPECIAL)&&(funct == MFLO))begin
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CtrlMemtoReg = 3'd4;//write data port of regfile is fed from ALULo
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CtrlMemtoReg = 3'd4;//write data port of regfile is fed from ALULo
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end else if (((op==SPECIAL)&&(funct == JR)) || (op == BEQ) || ((op==REGIMM)&&(rt==BGEZ)) || (op==BGTZ) || ((op==REGIMM)&&(rt==BLTZ)) || (op==BLEZ) || (op==BNE) || (op==J))begin
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end else if (((op==SPECIAL)&&(funct == JR)) || (op == BEQ) || (op==SW) ||((op==REGIMM)&&(rt==BGEZ)) || (op==BGTZ) || ((op==REGIMM)&&(rt==BLTZ)) || (op==BLEZ) || (op==BNE) || (op==J) || ((op==SPECIAL)&&(funct==MTHI)) || ((op==SPECIAL)&&(funct==MTLO)) || ((op==SPECIAL)&&(funct==MULT)) || ((op==SPECIAL)&&(funct==MULTU)) || ((op==SPECIAL)&&(funct==DIV)) || ((op==SPECIAL)&&(funct==DIVU)) || (op==SB) || (op==SH))begin
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CtrlMemRead = 0;//Read disabled during jump
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CtrlMemRead = 0;//Read disabled during jump
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end else begin CtrlMemRead = 1'bx;end//Not all instructions are encompassed so, added incase for debug purposes
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end else begin CtrlMemRead = 1'bx;end//Not all instructions are encompassed so, added incase for debug purposes
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