diff --git a/rtl/mips_cpu_bus.v b/rtl/mips_cpu_bus.v
index 2794ca6..f3997fd 100644
--- a/rtl/mips_cpu_bus.v
+++ b/rtl/mips_cpu_bus.v
@@ -92,22 +92,22 @@ always_comb begin
             partial_write = 1'b1;
             case (harvard_data_address[1:0])
                 2'b00: begin
-                    partial_writedata = {24{1'b0}, harvard_writedata[7:0]};
+                    partial_writedata = {{24{1'b0}}, harvard_writedata[7:0]};
                     write_byteenable = 4'b0001;
                     write_data_address = {harvard_data_address[31:2], 2'b00};
                 end
                 2'b01: begin
-                    partial_writedata = {16{1'b0}, harvard_writedata[7:0], 8{1'b0}};
+                    partial_writedata = {{16{1'b0}}, harvard_writedata[7:0], {8{1'b0}}};
                     write_byteenable = 4'b0010;
                     write_data_address = {harvard_data_address[31:2], 2'b00};
                 end
                 2'b10: begin
-                    partial_writedata = {8{1'b0}, harvard_writedata[7:0], 16{1'b0}};
+                    partial_writedata = {{8{1'b0}}, harvard_writedata[7:0], {16{1'b0}}};
                     write_byteenable = 4'b0100;
                     write_data_address = {harvard_data_address[31:2], 2'b00};
                 end
                 2'b11: begin
-                    partial_writedata = {harvard_writedata[7:0], 24{1'b0}};
+                    partial_writedata = {harvard_writedata[7:0], {24{1'b0}}};
                     write_byteenable = 4'b1000;
                     write_data_address = {harvard_data_address[31:2], 2'b00};
                 end
@@ -117,7 +117,7 @@ always_comb begin
             partial_write = 1'b1;
             case (harvard_data_address[1:0])
                 2'b00: begin
-                    partial_writedata = {16{1'b0}, harvard_writedata[15:0]};
+                    partial_writedata = {{16{1'b0}}, harvard_writedata[15:0]};
                     write_byteenable = 4'b0011;
                     write_data_address = {harvard_data_address[31:2], 2'b00};
                 end
@@ -127,7 +127,7 @@ always_comb begin
                     write_data_address = 32'hxxxxxxxx;
                 end
                 2'b10: begin
-                    partial_writedata = {harvard_writedata[15:0], 16{1'b0}};
+                    partial_writedata = {harvard_writedata[15:0], {16{1'b0}}};
                     write_byteenable = 4'b1100;
                     write_data_address = {harvard_data_address[31:2], 2'b00};
                 end
@@ -221,4 +221,4 @@ mips_cpu_harvard mips_cpu_harvard( // Harvard CPU within wrapper
 .data_readdata(harvard_readdata) // data in from read instruction, input
 );
 
-endmodule : mips_cpu_bus
+endmodule
diff --git a/test/test_mips_cpu_bus.sh b/test/test_mips_cpu_bus.sh
index 1b90fe7..352244b 100755
--- a/test/test_mips_cpu_bus.sh
+++ b/test/test_mips_cpu_bus.sh
@@ -47,10 +47,10 @@ else
         -P mips_cpu_bus_tb.INSTR_INIT_FILE=\"inputs/${INSTR}/${TESTCASE}.txt\" \
         -P mips_cpu_bus_tb.DATA_INIT_FILE=\"inputs/${INSTR}/${TESTCASE}.data.txt\" \
         -o exec/mips_cpu_bus_tb_${TESTCASE} testbench/mips_cpu_bus_tb.v \
-        ${SRC} 2> /dev/null
+        ${SRC} #2> /dev/null
         ./exec/mips_cpu_bus_tb_${TESTCASE} &> ./inputs/${INSTR}/${TESTCASE}.log.txt;             # log file for debugging (contains $display)
         echo "$(tail -1 ./inputs/${INSTR}/${TESTCASE}.log.txt)" > ./inputs/${INSTR}/${TESTCASE}.out.txt;      # register v0 output to compare with reference
-        if diff -w ./inputs/${INSTR}/${TESTCASE}.out.txt ./inputs/${INSTR}/${TESTCASE}.ref.txt &> /dev/null   # compare
+        if diff -w ./inputs/${INSTR}/${TESTCASE}.out.txt ./inputs/${INSTR}/${TESTCASE}.ref.txt #&> /dev/null   # compare
         then 
             echo ${TESTCASE} ${INSTR} "Pass";
         else