From a56410ceae8f69b2658d8eadb8aee18fcc9a362b Mon Sep 17 00:00:00 2001
From: Ibrahim <ibzmo28@gmail.com>
Date: Wed, 2 Dec 2020 14:32:42 +0000
Subject: [PATCH] -

---
 rtl/mips_cpu_alu.v | 19 ++++++++-----------
 1 file changed, 8 insertions(+), 11 deletions(-)

diff --git a/rtl/mips_cpu_alu.v b/rtl/mips_cpu_alu.v
index 96a45f9..d59ed08 100644
--- a/rtl/mips_cpu_alu.v
+++ b/rtl/mips_cpu_alu.v
@@ -9,13 +9,10 @@ module mips_cpu_alu(
 
   output logic[31:0] ALUOut, // The ouput of the ALU 
   
-  input logic[15:0] immediate, 
-
   input logic[4:0] shamt
 
 );
 
-  input [15:0] immediate;
 
   reg [31:0] SignExtend, ZeroExtend;
 // Instructions commented out have been accounted for 
@@ -139,38 +136,38 @@ module mips_cpu_alu(
 
       BGEZ: begin
           if A>=0 begin
-            ALUOut = 0;
+            Cond = 1;
           end
           else begin
-            ALUOut = ALUOut;
+            Cond = 0;
           end
       end
 
       BGEZAL: begin
           if A>=0 begin
-            ALUOut = 0;
+            Cond = 1;
           end
           else begin
-            ALUOut = ALUOut;
+            Cond = 0;
           end
       end
 
       BGTZ: begin
           if A>0 begin
-            ALUOut = 0;
+            Cond = 1;
           end
           else begin
-            ALUOut = ALUOut;
+            Cond = 0;
           end
       end
 
 
       BLEZ: begin
           if A<=0 begin
-            ALUOut = 0;
+            Cond = 1;
           end
           else begin
-            ALUOut = ALUOut;
+            Cond = 0;
           end
       end