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Rename all instruction mem init files to .instr.txt

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jl7719 2020-12-18 12:42:58 +00:00
parent dd4f6346be
commit a31d41512b
62 changed files with 5 additions and 5 deletions
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0
inputs/addiu/addiu-1.txt → inputs/addiu/addiu-1.instr.txt
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inputs/addu/addu-1.txt → inputs/addu/addu-1.instr.txt
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inputs/addu/addu-2.txt → inputs/addu/addu-2.instr.txt
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inputs/and/and-1.txt → inputs/and/and-1.instr.txt
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inputs/andi/andi-1.txt → inputs/andi/andi-1.instr.txt
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inputs/beq/beq-1.txt → inputs/beq/beq-1.instr.txt
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inputs/bgez/bgez-1.txt → inputs/bgez/bgez-1.instr.txt
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inputs/bgezal/bgezal-1.txt → inputs/bgezal/bgezal-1.instr.txt
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inputs/bgezal/bgezal-2.txt → inputs/bgezal/bgezal-2.instr.txt
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inputs/bgtz/bgtz-1.txt → inputs/bgtz/bgtz-1.instr.txt
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inputs/blez/blez-1.txt → inputs/blez/blez-1.instr.txt
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inputs/bltz/bltz-1.txt → inputs/bltz/bltz-1.instr.txt
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inputs/bltzal/bltzal-1.txt → inputs/bltzal/bltzal-1.instr.txt
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inputs/bne/bne-1.txt → inputs/bne/bne-1.instr.txt
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inputs/div/div-1.txt → inputs/div/div-1.instr.txt
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inputs/div/div-2.txt → inputs/div/div-2.instr.txt
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inputs/div/div-3.txt → inputs/div/div-3.instr.txt
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inputs/div/div-4.txt → inputs/div/div-4.instr.txt
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inputs/div/div-5.txt → inputs/div/div-5.instr.txt
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inputs/divu/divu-1.txt → inputs/divu/divu-1.instr.txt
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inputs/j/j-1.txt → inputs/j/j-1.instr.txt
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inputs/jal/jal-1.txt → inputs/jal/jal-1.instr.txt
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inputs/jalr/jalr-1.txt → inputs/jalr/jalr-1.instr.txt
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inputs/jr/jr-1.txt → inputs/jr/jr-1.instr.txt
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inputs/jr/jr-2.txt → inputs/jr/jr-2.instr.txt
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inputs/jr/jr-3.txt → inputs/jr/jr-3.instr.txt
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inputs/lb/lb-1.txt → inputs/lb/lb-1.instr.txt
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inputs/lbu/lbu-1.txt → inputs/lbu/lbu-1.instr.txt
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inputs/lh/lh-1.txt → inputs/lh/lh-1.instr.txt
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inputs/lhu/lhu-1.txt → inputs/lhu/lhu-1.instr.txt
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inputs/lui/lui-1.txt → inputs/lui/lui-1.instr.txt
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inputs/lw/lw-1.txt → inputs/lw/lw-1.instr.txt
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inputs/lwl/lwl-1.txt → inputs/lwl/lwl-1.instr.txt
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inputs/lwr/lwr-1.txt → inputs/lwr/lwr-1.instr.txt
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inputs/mthi/mthi-1.txt → inputs/mthi/mthi-1.instr.txt
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inputs/mtlo/mtlo-1.txt → inputs/mtlo/mtlo-1.instr.txt
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inputs/mult/mult-1.txt → inputs/mult/mult-1.instr.txt
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inputs/multu/multu-1.txt → inputs/multu/multu-1.instr.txt
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inputs/or/or-1.txt → inputs/or/or-1.instr.txt
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inputs/ori/ori-1.txt → inputs/ori/ori-1.instr.txt
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inputs/sb/sb-1.txt → inputs/sb/sb-1.instr.txt
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inputs/sh/sh-1.txt → inputs/sh/sh-1.instr.txt
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inputs/sh/sh-2.txt → inputs/sh/sh-2.instr.txt
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inputs/sll/sll-1.txt → inputs/sll/sll-1.instr.txt
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inputs/sllv/sllv-1.txt → inputs/sllv/sllv-1.instr.txt
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inputs/slt/slt-1.txt → inputs/slt/slt-1.instr.txt
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inputs/slti/slti-1.txt → inputs/slti/slti-1.instr.txt
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inputs/sltiu/sltiu-1.txt → inputs/sltiu/sltiu-1.instr.txt
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inputs/sltu/sltu-1.txt → inputs/sltu/sltu-1.instr.txt
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inputs/sra/sra-1.txt → inputs/sra/sra-1.instr.txt
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inputs/srav/srav-1.txt → inputs/srav/srav-1.instr.txt
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inputs/srl/srl-1.txt → inputs/srl/srl-1.instr.txt
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inputs/srlv/srlv-1.txt → inputs/srlv/srlv-1.instr.txt
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inputs/subu/subu-1.txt → inputs/subu/subu-1.instr.txt
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inputs/sw/sw-1.txt → inputs/sw/sw-1.instr.txt
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inputs/sw/sw-2.txt → inputs/sw/sw-2.instr.txt
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inputs/xor/xor-1.txt → inputs/xor/xor-1.instr.txt
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inputs/xor/xor-2.txt → inputs/xor/xor-2.instr.txt
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inputs/xori/xori-1.txt → inputs/xori/xori-1.instr.txt
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inputs/xori/xori-2.txt → inputs/xori/xori-2.instr.txt
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6
test/test_mips_cpu_bus.sh
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@ -1,7 +1,7 @@
#!/bin/bash #!/bin/bash
SRC_DIR=${1?Error: no source directory given in argument}; SRC_DIR=${1?Error: no source directory given in argument};
SRC=$(find ./${SRC_DIR}/*); SRC=$(find ${SRC_DIR}/*);
SRC_TEMP=""; SRC_TEMP="";
for src in ${SRC} for src in ${SRC}
do do
@ -23,7 +23,7 @@ then
TESTCASE=$([[ ${TESTCASE} =~ /([^./]+)\. ]] && echo "${BASH_REMATCH[1]}"); TESTCASE=$([[ ${TESTCASE} =~ /([^./]+)\. ]] && echo "${BASH_REMATCH[1]}");
iverilog -Wall -g2012 \ iverilog -Wall -g2012 \
-s mips_cpu_bus_tb \ -s mips_cpu_bus_tb \
-P mips_cpu_bus_tb.INSTR_INIT_FILE=\"inputs/${DIR}/${TESTCASE}.txt\" \ -P mips_cpu_bus_tb.INSTR_INIT_FILE=\"inputs/${DIR}/${TESTCASE}.instr.txt\" \
-P mips_cpu_bus_tb.DATA_INIT_FILE=\"inputs/${DIR}/${TESTCASE}.data.txt\" \ -P mips_cpu_bus_tb.DATA_INIT_FILE=\"inputs/${DIR}/${TESTCASE}.data.txt\" \
-o exec/mips_cpu_bus_tb_${TESTCASE} testbench/mips_cpu_bus_tb.v testbench/mips_cpu_bus_memory.v \ -o exec/mips_cpu_bus_tb_${TESTCASE} testbench/mips_cpu_bus_tb.v testbench/mips_cpu_bus_memory.v \
${SRC} 2> inputs/${DIR}/${TESTCASE}.stderr.txt ${SRC} 2> inputs/${DIR}/${TESTCASE}.stderr.txt
@ -44,7 +44,7 @@ else
TESTCASE=$([[ ${TESTCASE} =~ /([^./]+)\. ]] && echo "${BASH_REMATCH[1]}"); TESTCASE=$([[ ${TESTCASE} =~ /([^./]+)\. ]] && echo "${BASH_REMATCH[1]}");
iverilog -Wall -g2012 \ iverilog -Wall -g2012 \
-s mips_cpu_bus_tb \ -s mips_cpu_bus_tb \
-P mips_cpu_bus_tb.INSTR_INIT_FILE=\"inputs/${INSTR}/${TESTCASE}.txt\" \ -P mips_cpu_bus_tb.INSTR_INIT_FILE=\"inputs/${INSTR}/${TESTCASE}.instr.txt\" \
-P mips_cpu_bus_tb.DATA_INIT_FILE=\"inputs/${INSTR}/${TESTCASE}.data.txt\" \ -P mips_cpu_bus_tb.DATA_INIT_FILE=\"inputs/${INSTR}/${TESTCASE}.data.txt\" \
-o exec/mips_cpu_bus_tb_${TESTCASE} testbench/mips_cpu_bus_tb.v testbench/mips_cpu_bus_memory.v \ -o exec/mips_cpu_bus_tb_${TESTCASE} testbench/mips_cpu_bus_tb.v testbench/mips_cpu_bus_memory.v \
${SRC} 2> inputs/${INSTR}/${TESTCASE}.stderr.txt ${SRC} 2> inputs/${INSTR}/${TESTCASE}.stderr.txt

4
test/test_mips_cpu_harvard.sh
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@ -23,7 +23,7 @@ then
TESTCASE=$([[ ${TESTCASE} =~ /([^./]+)\. ]] && echo "${BASH_REMATCH[1]}"); TESTCASE=$([[ ${TESTCASE} =~ /([^./]+)\. ]] && echo "${BASH_REMATCH[1]}");
iverilog -Wall -g2012 \ iverilog -Wall -g2012 \
-s mips_cpu_harvard_tb \ -s mips_cpu_harvard_tb \
-P mips_cpu_harvard_tb.INSTR_INIT_FILE=\"inputs/${DIR}/${TESTCASE}.txt\" \ -P mips_cpu_harvard_tb.INSTR_INIT_FILE=\"inputs/${DIR}/${TESTCASE}.instr.txt\" \
-P mips_cpu_harvard_tb.DATA_INIT_FILE=\"inputs/${DIR}/${TESTCASE}.data.txt\" \ -P mips_cpu_harvard_tb.DATA_INIT_FILE=\"inputs/${DIR}/${TESTCASE}.data.txt\" \
-o exec/mips_cpu_harvard_tb_${TESTCASE} testbench/mips_cpu_harvard_tb.v testbench/mips_cpu_harvard_memory.v\ -o exec/mips_cpu_harvard_tb_${TESTCASE} testbench/mips_cpu_harvard_tb.v testbench/mips_cpu_harvard_memory.v\
${SRC} 2> inputs/${DIR}/${TESTCASE}.stderr.txt ${SRC} 2> inputs/${DIR}/${TESTCASE}.stderr.txt
@ -44,7 +44,7 @@ else
TESTCASE=$([[ ${TESTCASE} =~ /([^./]+)\. ]] && echo "${BASH_REMATCH[1]}"); TESTCASE=$([[ ${TESTCASE} =~ /([^./]+)\. ]] && echo "${BASH_REMATCH[1]}");
iverilog -Wall -g2012 \ iverilog -Wall -g2012 \
-s mips_cpu_harvard_tb \ -s mips_cpu_harvard_tb \
-P mips_cpu_harvard_tb.INSTR_INIT_FILE=\"inputs/${INSTR}/${TESTCASE}.txt\" \ -P mips_cpu_harvard_tb.INSTR_INIT_FILE=\"inputs/${INSTR}/${TESTCASE}.instr.txt\" \
-P mips_cpu_harvard_tb.DATA_INIT_FILE=\"inputs/${INSTR}/${TESTCASE}.data.txt\" \ -P mips_cpu_harvard_tb.DATA_INIT_FILE=\"inputs/${INSTR}/${TESTCASE}.data.txt\" \
-o exec/mips_cpu_harvard_tb_${TESTCASE} testbench/mips_cpu_harvard_tb.v testbench/mips_cpu_harvard_memory.v\ -o exec/mips_cpu_harvard_tb_${TESTCASE} testbench/mips_cpu_harvard_tb.v testbench/mips_cpu_harvard_memory.v\
${SRC} 2> inputs/${INSTR}/${TESTCASE}.stderr.txt ${SRC} 2> inputs/${INSTR}/${TESTCASE}.stderr.txt