Merge branch 'jl7719' of https://github.com/supleed2/AM04_CPU into jl7719

inputs/addu/addu-1.ref.txt

@@ -1 +1 @@
-4294963199
+8

inputs/addu/addu-1.txt

@@ -1,8 +1,4 @@
-3404FFFF
+34040003
-3405F000
+34050005
 00851021
-00000008
+00000008
-00000000
-00000000
-00000000
-00000000

inputs/and/and-1.ref.txt

@@ -1 +1 @@
-10
+2290649224

inputs/and/and-1.txt

@@ -1,4 +1,6 @@
-3404000A
+3c05cccc
-3405000F
+3405cccc
+3c04aaaa
+3404aaaa
 00851024
 00000008

inputs/andi/andi-1.ref.txt

@@ -1 +1 @@
-5
+34952

inputs/andi/andi-1.txt

@@ -1,5 +1,4 @@
-34040005
+3c04aaaa
-3082000f
+3404aaaa
-00000008
+3082cccc
-00000000
+00000008
-00000000

inputs/div/div-1.txt

@@ -1,4 +1,7 @@
-34040004
+34040003
-34050003
+34050009
-0085001A
+00A4001A
+00002010
+00002812
+00851021
 00000008

inputs/divu/divu-1.ref.txt

@@ -0,0 +1 @@
+1073741824

inputs/divu/divu-1.txt

@@ -1,4 +1,7 @@
-34040004
+34048000
-34050003
+34050002
 0085001B
+00002010
+00002812
+00851021
 00000008

inputs/j/j-1.ref.txt

@@ -1 +1 @@
-7
+1

inputs/j/j-1.txt

@@ -1,11 +1,6 @@
-083F0004
+08000004
 00000000
-00000000
-00000000
-00000000
-
 00000008
 00000000
-34020007
+34020001
-00000008
+00000008
-

inputs/jalr/jalr-1.txt

@@ -1,5 +1,5 @@
-3405001C
 3C05BCF0
+3405001C
 00A02009
 00000000
 24420001

inputs/jr/jr-1.ref.txt

@@ -1 +1 @@
-16
+1

inputs/jr/jr-1.txt

@@ -1,7 +1,7 @@
 3C05BFC0
-34A50014
+34050014
 00A00008
 00000000
 00000008
-34020010
+34020001
 00000008

inputs/lwl/lwl-1.txt

@@ -1,4 +1,4 @@
-34041001
+34041003
 34025678
 88820003
 00000008

inputs/lwr/lwr-1.txt

@@ -1,4 +1,4 @@
-34041002
 3C021234
-98820002
+34041002
+98820003
 00000008

inputs/mfhi/mfhi-1.ref.txt

@@ -1 +0,0 @@
-3

inputs/mfhi/mfhi-1.txt

@@ -1,4 +0,0 @@
-34040003
-00800011
-00001010
-00000008

inputs/mflo/mflo-1.ref.txt

@@ -1 +0,0 @@
-12

inputs/mflo/mflo-1.txt

@@ -1,5 +0,0 @@
-34040004
-34050003
-00850019
-00001012
-00000008

inputs/mthi/mthi-1.txt

@@ -1,3 +1,4 @@
 34040005
 00800011
+00001010
 00000008

inputs/mtlo/mtlo-1.ref.txt

@@ -0,0 +1 @@
+5

inputs/mtlo/mtlo-1.txt

@@ -1,3 +1,4 @@
 34040005
 00800013
+00001012
 00000008

inputs/multcurrent/multcurrent-1.txt

@@ -1,4 +0,0 @@
-34040004
-34050003
-00850018
-00000008

inputs/multucurrent/multucurrent-1.txt

@@ -1,4 +0,0 @@
-34040004
-34050003
-00850019
-00000008

inputs/ori/ori-1.ref.txt

@@ -1 +1 @@
-8
+7

inputs/ori/ori-1.txt

@@ -1,8 +1,3 @@
+34020003
 00000008
-34020008
+34020005
-00000000
-00000000
-00000000
-00000000
-00000000
-00000000

inputs/sb/sb-1.ref.txt

@@ -0,0 +1 @@
+120

inputs/sb/sb-1.txt

@@ -1,4 +1,7 @@
-34040405
+3C041234
-34050001
+34045678
-a0a40001
+3C05BFC0
+3405001C
+A0A40000
+80A20000
 00000008

inputs/sh/sh-1.ref.txt

@@ -0,0 +1 @@
+22136

inputs/sh/sh-1.txt

@@ -0,0 +1,7 @@
+3C041234
+34045678
+3C05BFC0
+3405001C
+A4A40000
+84A40000
+00000008

inputs/slt/slt-1.ref.txt

@@ -1 +1 @@
-1
+0

reference.txt

@@ -36,7 +36,6 @@ LUI $5,0xCCCC
 ORI $5,$0,0xCCCC
 LUI $4,0xAAAA 
 ORI $4,$0,0xAAAA
- 
 AND  $2,$4,$5
 JR $0
 
@@ -473,14 +472,14 @@ register_v0 = 0x12345678
 
 ==LWL	Load word left==
 
-ORI $4,$0,0x1001
+ORI $4,$0,0x1003
 ORI $2,$0,0x5678
 LWL  $2,3($4)
 JR $0
 
 -Instruction Hex
 
-34041001
+34041003
 34025678
 88820003
 00000008
@@ -498,14 +497,14 @@ register_v0 = 0x12345678
 
 LUI $2,0x1234
 ORI $4,$0,0x1002
-LWR $2,2($4)
+LWR $2,3($4)
 JR $0
 
 -Instruction Hex
 
 3C021234
 34041002
-98820002
+98820003
 00000008
 
 -Memory Hex
@@ -653,7 +652,7 @@ jr $0
 00041080
 00000008
 
-register_v0 = 16
+register_v0 = 12
 
 ==SLLV	Shift left logical variable==
 
@@ -667,7 +666,7 @@ jr $0
 00851004
 00000008
 
-register_v0 = 16
+register_v0 = 12
 
 ==SLT	Set on less than (signed)==
 
@@ -721,7 +720,7 @@ jr $0
 
 register_v0 = 0
 
-==SRA	Shift right arithmetic==
+#==SRA	Shift right arithmetic==
 
 ori $4,$0,2
 sra $2,$4,1

reference/ibrahimreference.txt

@@ -1,483 +0,0 @@
-===== ADDIU ==========
-int main(void) {
-    int a = -2147483648 + -32768 ;
-}
-
-ORI $4,$0,-2147483648
-ADDIU $2,$4,-32768
-JR $0
-
-//used to check for overflow 32768 is 2^15 which should 
-be sign extended. 21... is 2^31 
-
-
-register_v0 = 
-
-==========XORI	Bitwise exclusive or immediate=============
-
-int main(void) {
-    int a = 5 ^ 2;
-}
-
-ori $4,$0,5
-xori $2,$4,2
-jr $0
-
-register 0 = 7
-
-34040005
-38820002
-00000008
-
-convert to little endian
-
-////////
-
-====XOR	Bitwise exclusive or==========
-
-int main(void) {
-    int a = 5 ^ 2;
-}
-
-ori $4, $0, 5
-ori $5, $0, 2
-xor $2, $4, $5
-jr $0
-
-register 0 = 7
-
-34040005
-34050002
-00851026
-00000008
-
-convert to little endian
-
-////////
-
-========SW	Store word==============
-
-int main(void) {
-
-
-ori $4, $0, 5 
-ori $5, $0, 1
-sw $4, 1($5)
-jr $0
-
-register 0 = 5
-
-34040005
-34050001
-aca40001
-00000008
-
-
-=========== SUBU	Subtract unsigned ===========
-
-int main(void) {
-    int a = 5-3;
-}
-
-ori $4,$0,5
-ori $5,$0,3
-subu $2,$4,$5
-jr $0
-
-
-register_v0 = 2
-
-
-34040005
-34050003
-00851023
-00000008
-
-
-========= SRLV	Shift right logical variable ======
-
-
-int main(void) {
-    int a = 2;
-    int b = 16>>a;
-}
-
-ori $4,$0,2
-ori $5,$0,16
-srlv $2,$5,$4
-jr $0
-
-register 0 = 3
-
-34040002
-34050010
-//////
-//////
-
-===============  SRL	Shift right logical  ==============
-
-
-int main(void) {
-    int a = -2147483647>>2; #logical shift - should feed in 0s
-}
-
-ori $4,$0,-2147483647
-srl $2,$4,$2
-jr $0
-
-register 0 = 536870912 (2^29)
-
-34040001
-00041002
-00000008
-
-========== SRAV	Shift right arithmetic variable =======
-
-int main(void) {
-    int a = 2;
-    int b = -2147483647>>2; #arithemtic shift not logical - feed in 1s (sign extension)
-}
-
-ori $4, $0, 4
-ori $5,$0,0xF000
-srav $2,$5,$4
-SRAv $v0 $a1 $a0
-jr $0
-
-register 0 = -536870912 (first 3 bits high - rest low)
-
-34040004
-3405F000
-
-////////
-///////
-
-====== SRA	Shift right arithmetic ==========
-
-int main(void) {
-    int a = -2147483647>>2; #arithemtic shift not logical - feed in 1s (sign extension)
-}
-
-
-ori $4,$0,-2147483647
-sra $2,$4,$2
-jr $0
-
-register 0 = -536870912 (first 3 bits high - rest low)
-
-34040001
-00041003
-00000008
-
-======= SLTU	Set on less than unsigned =====
-
-int main() {
-    int a = 10;
-    int b = 9;
-
-    max = a < b ? 1 : 0;
-
-    return max;
-}
-
-
-ori $4, $0, 10
-ori $5, $0, 9
-sltu $2, $4, $5
-jr $0
-
-register 0 = 0
-
-3404000a
-34050009
-0085102b
-00000008
-
-=========== SLTIU	Set on less than immediate unsigned ==================
-
-int main() {
-    int a = 10;
-
-    max = a < 9 ? 1 : 0;
-
-    return max;
-}
-
-
-ori $4, $0, 10
-sltiu $2, $4, 9
-jr $0
-
-register 0 = 0
-
-3404000a
-2c820009
-00000008
-
-======= SLTI	Set on less than immediate (signed) ========
-
-int main() {
-    int a = 10;
-
-    max = a < 9 ? 1 : 0;
-
-    return max;
-}
-
-
-ori $4, $0, 10
-slti $2, $4, 9
-jr $0
-
-register 0 = 0
-
-3404000a
-28820009
-00000008
-
-
-
-======= SLLV	Shift left logical variable ======
-
-
-int main(void) {
-    int a = 2;
-    int b = 3<<a;
-}
-
-ori $4,$0,2
-ori $5,$0,3
-sllv $2,$5,$4
-jr $0
-
-register 0 = 16
-
-34040002
-34050003
-//////
-//////
-
-
-======= SLL	Shift left logical  ======
-
-
-int main(void) {
-    int a = 3<<2;
-}
-
-ori $4,$0,3
-sll $2,$4,2
-jr $0
-
-register 0 = 16
-
-34040003
-00041080
-00000008
-
-======== SB	Store byte =======
-
-ori $4, $0, 1029
-ori $5, $0, 1
-sb $4, 1($5)
-jr $0
-
-register 0 = 5
-
-34040405
-34050001
-a0a40001
-00000008
-
- ======== ORI	Bitwise or immediate ===
-
-ori $4,$0,3
-jr $0
-
-register a0 = 3
-
-34040003
-00000008
-
-======== OR	Bitwise or  ===
-
-int main(){
-    int a =5;
-    int b= 3;
-
-    int c = 5 | 3;
-
-    return 0;
-}
-
-
-ori $4, $0, 5
-ori $5, $0, 3
-or $2, $4, $5
-jr $0
-
-
-34040005
-34050003
-00851025
-00000008
-
-register 0 = 7
-
-======= MULT	Multiply =====
-
-ori $4, $0, 4
-ori $5, $0, 3
-mult $4, $5
-jr $0
-
-$LO = 12
-
-34040004
-34050003
-00850018
-00000008
-
-
-======= MULT Multiply =====
-
-ori $4, $0, 4
-ori $5, $0, 3
-mult $4, $5
-mflo $2
-jr $0
-
-register v0 = 12
-
-34040004
-34050003
-00850018
-00001012
-00000008
-
-======= MULTU	Multiply unsigned =====
-
-ori $4, $0, 4
-ori $5, $0, 3
-multu $4, $5
-jr $0
-
-
-$LO = 12
-
-34040004
-34050003
-00850019
-00000008
-
-
-======= MULTU	Multiply unsigned =====
-
-ori $4, $0, 4
-ori $5, $0, 3
-multu $4, $5
-mflo $2
-jr $0
-
-
-$2 = 12
-
-34040004
-34050003
-00850019
-00001012
-00000008
-
-======= MFLO Move from lo ======
-
-ori $4, $0, 4
-ori $5, $0, 3
-multu $4, $5
-mflo $2
-jr $0
-
-
-$2 = 12
-
-34040004
-34050003
-00850019
-00001012
-00000008
-
-=========== MFHI Move from Hi ==========
-
-ori $4, $0, 3
-mthi $4
-mfhi $2
-jr $0
-
-register v0 = 3
-
-34040003
-00800011
-00001010
-00000008
-
-======== MTHI	Move to HI ====
-
-ori $4, $0, 5
-mthi $4
-jr $0
-
-
-$HI = 5
-
-34040005
-00800011
-00000008
-
-======= MTLO	Move to LO ===
-
-ori $4, $0, 5
-mtlo $4
-jr $0
-
-
-$HI = 5
-
-34040005
-00800013
-00000008
-
-==================== SH	Store half-word =======
-
-/////////
-
-
-======== DIV Divide  ======
-
-
-ori $4, $0, 4
-ori $5, $0, 3
-div $4, $5
-jr $0
-
-
-$LO = 1
-$HI = 1
-
-34040004
-34050003
-0085001A
-00000008
-
-========= DIVU Divide unsigned =====
-
-ori $4, $0, 4
-ori $5, $0, 3
-divu $4, $5
-jr $0
-
-$LO = 1
-$HI = 1
-
-34040004
-34050003
-0085001B
-00000008