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Rename initialisation files

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This commit is contained in:
jl7719 2020-12-13 14:54:53 +09:00
parent 943745a1e0
commit 7150487472
4 changed files with 20 additions and 21 deletions
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16
rtl/mips_cpu_memory.v
View file

@ -13,8 +13,8 @@ module mips_cpu_memory(
output logic[31:0] instr_readdata output logic[31:0] instr_readdata
); );
parameter RAM_INIT_FILE = ""; parameter INSTR_INIT_FILE = "";
parameter MEM_INIT_FILE = ""; parameter DATA_INIT_FILE = "";
reg [31:0] data_memory [0:31]; reg [31:0] data_memory [0:31];
reg [31:0] instr_memory [0:31]; reg [31:0] instr_memory [0:31];
@ -28,18 +28,18 @@ module mips_cpu_memory(
instr_memory[i] = 0; instr_memory[i] = 0;
end end
//Load contents from file if specified //Load contents from file if specified
if (RAM_INIT_FILE != "") begin if (INSTR_INIT_FILE != "") begin
$display("RAM: Loading RAM contents from %s", RAM_INIT_FILE); $display("RAM: Loading RAM contents from %s", INSTR_INIT_FILE);
$readmemh(RAM_INIT_FILE, instr_memory); $readmemh(INSTR_INIT_FILE, instr_memory);
end end
for (integer j = 0; j<$size(instr_memory); j++) begin for (integer j = 0; j<$size(instr_memory); j++) begin
$display("byte +%h: %h", 32'hBFC00000+j*4, instr_memory[j]); $display("byte +%h: %h", 32'hBFC00000+j*4, instr_memory[j]);
end end
if (MEM_INIT_FILE != "") begin if (DATA_INIT_FILE != "") begin
$display("MEM: Loading MEM contents from %s", MEM_INIT_FILE); $display("MEM: Loading MEM contents from %s", DATA_INIT_FILE);
$readmemh(MEM_INIT_FILE, data_memory); $readmemh(DATA_INIT_FILE, data_memory);
end else begin end else begin
$display("MEM FILE NOT GIVEN"); $display("MEM FILE NOT GIVEN");
end end

4
rtl/mips_cpu_pc.v
View file

@ -36,15 +36,13 @@ always_ff @(posedge clk) begin
end end
2'd2: begin // Jump 2'd2: begin // Jump
pc_next <= {pc_lit_next[31:28], instr[25:0], 2'b00}; pc_next <= {pc_lit_next[31:28], instr[25:0], 2'b00};
$display("Im JUMPING"); $display("JUMPING");
$display("pc_lit_next: %h", pc_lit_next[31:28]); $display("pc_lit_next: %h", pc_lit_next[31:28]);
$display("instr: %b", instr[25:0]); $display("instr: %b", instr[25:0]);
$display("%h",pc_next); $display("%h",pc_next);
end end
2'd3: begin // Jump using Register 2'd3: begin // Jump using Register
pc_next <= reg_readdata; pc_next <= reg_readdata;
$display("Im JUMPING AROUND LOLOLOL");
$display("%h",reg_readdata);
end end
endcase endcase
end end

15
test/test_mips_cpu_harvard.sh
View file

@ -21,18 +21,19 @@ INSTR=${2:-"No instruction specified: running all testcases"}; # e.g. addiu
if [[ ${INSTR} == "No instruction specified: running all testcases" ]]; if [[ ${INSTR} == "No instruction specified: running all testcases" ]];
then then
# All Testcase Files # All Testcase Files
TESTCASES=$(find ./inputs ! -name '*ref*' ! -name '*log*' ! -name '*out*' ! -name 'inputs' ! -name 'data' | sed 's#.*/##'); TESTCASES=$(find ./inputs ! -name '*ref*' ! -name '*log*' ! -name '*out*' ! -name '*inputs*' ! -name '*data*' | sed 's#.*/##');
#echo ${TESTCASES} #echo ${TESTCASES}
for TESTCASE in ${TESTCASES} for TESTCASE in ${TESTCASES}
do do
# Run Each Testcase File # Run Each Testcase File
TESTCASE="${TESTCASE%%.*}";
#echo ${TESTCASE}; #echo ${TESTCASE};
TESTCASE="${TESTCASE%%.*}";
/mnt/c/Windows/System32/cmd.exe /C \ /mnt/c/Windows/System32/cmd.exe /C \
iverilog -Wall -g2012 \ iverilog -Wall -g2012 \
-s mips_cpu_harvard_tb \ -s mips_cpu_harvard_tb \
-P mips_cpu_harvard_tb.RAM_INIT_FILE=\"inputs/${TESTCASE}.txt\" \ -P mips_cpu_harvard_tb.INSTR_INIT_FILE=\"inputs/${TESTCASE}.txt\" \
-P mips_cpu_harvard_tb.MEM_INIT_FILE=\"inputs/${TESTCASE}.data.txt\" \ -P mips_cpu_harvard_tb.DATA_INIT_FILE=\"inputs/${TESTCASE}.data.txt\" \
-o exec/mips_cpu_harvard_tb_${TESTCASE} testbench/mips_cpu_harvard_tb.v \ -o exec/mips_cpu_harvard_tb_${TESTCASE} testbench/mips_cpu_harvard_tb.v \
${SRC} 2> /dev/null ${SRC} 2> /dev/null
/mnt/c/Windows/System32/cmd.exe /C vvp ./exec/mips_cpu_harvard_tb_${TESTCASE} &> ./inputs/${TESTCASE}.log.txt; # log file for debugging (contains $display) /mnt/c/Windows/System32/cmd.exe /C vvp ./exec/mips_cpu_harvard_tb_${TESTCASE} &> ./inputs/${TESTCASE}.log.txt; # log file for debugging (contains $display)
@ -50,10 +51,10 @@ else
/mnt/c/Windows/System32/cmd.exe /C \ /mnt/c/Windows/System32/cmd.exe /C \
iverilog -Wall -g2012 \ iverilog -Wall -g2012 \
-s mips_cpu_harvard_tb \ -s mips_cpu_harvard_tb \
-P mips_cpu_harvard_tb.RAM_INIT_FILE=\"inputs/${INSTR}.txt\" \ -P mips_cpu_harvard_tb.INSTR_INIT_FILE=\"inputs/${INSTR}.txt\" \
-P mips_cpu_harvard_tb.MEM_INIT_FILE=\"inputs/${INSTR}.data.txt\" \ -P mips_cpu_harvard_tb.DATA_INIT_FILE=\"inputs/${INSTR}.data.txt\" \
-o exec/mips_cpu_harvard_tb_${INSTR} testbench/mips_cpu_harvard_tb.v \ -o exec/mips_cpu_harvard_tb_${INSTR} testbench/mips_cpu_harvard_tb.v \
${SRC} #2> /dev/null ${SRC} 2> /dev/null
/mnt/c/Windows/System32/cmd.exe /C vvp ./exec/mips_cpu_harvard_tb_${INSTR} &> ./inputs/${INSTR}.log.txt; # log file for debugging (contains $display) /mnt/c/Windows/System32/cmd.exe /C vvp ./exec/mips_cpu_harvard_tb_${INSTR} &> ./inputs/${INSTR}.log.txt; # log file for debugging (contains $display)
echo "$(tail -1 ./inputs/${INSTR}.log.txt)" > ./inputs/${INSTR}.out.txt; # register v0 output to compare with reference echo "$(tail -1 ./inputs/${INSTR}.log.txt)" > ./inputs/${INSTR}.out.txt; # register v0 output to compare with reference
if diff -w ./inputs/${INSTR}.out.txt ./inputs/${INSTR}.ref.txt &> /dev/null # compare if diff -w ./inputs/${INSTR}.out.txt ./inputs/${INSTR}.ref.txt &> /dev/null # compare

6
testbench/mips_cpu_harvard_tb.v
View file

@ -1,13 +1,13 @@
module mips_cpu_harvard_tb; module mips_cpu_harvard_tb;
parameter RAM_INIT_FILE = "inputs/addiu.txt"; parameter INSTR_INIT_FILE = "inputs/addiu.txt";
parameter MEM_INIT_FILE = "inputs/addiu.data.txt"; parameter DATA_INIT_FILE = "inputs/addiu.data.txt";
parameter TIMEOUT_CYCLES = 100; parameter TIMEOUT_CYCLES = 100;
logic clk, clk_enable, reset, active, data_read, data_write; logic clk, clk_enable, reset, active, data_read, data_write;
logic[31:0] register_v0, instr_address, instr_readdata, data_readdata, data_writedata, data_address; logic[31:0] register_v0, instr_address, instr_readdata, data_readdata, data_writedata, data_address;
mips_cpu_memory #(RAM_INIT_FILE, MEM_INIT_FILE) ramInst( mips_cpu_memory #(INSTR_INIT_FILE, DATA_INIT_FILE) ramInst(
.clk(clk), .clk(clk),
.data_address(data_address), .data_address(data_address),
.data_write(data_write), .data_write(data_write),