From 5e62dd82d8d9e3530673b62df70309942773caa1 Mon Sep 17 00:00:00 2001
From: Aadi Desai <21363892+supleed2@users.noreply.github.com>
Date: Wed, 16 Dec 2020 14:08:28 -0800
Subject: [PATCH] Add bus vcd to gitignore, fix missing case in bus

---
 .gitignore         | 1 +
 rtl/mips_cpu_bus.v | 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/.gitignore b/.gitignore
index ea6eaf9..15145de 100644
--- a/.gitignore
+++ b/.gitignore
@@ -3,5 +3,6 @@ exec/*
 *.log.txt
 *.out.txt
 mips_cpu_harvard.vcd
+mips_cpu_bus.vcd
 .DS_Store
 inputs/.DS_Store
diff --git a/rtl/mips_cpu_bus.v b/rtl/mips_cpu_bus.v
index f3997fd..ca00dc9 100644
--- a/rtl/mips_cpu_bus.v
+++ b/rtl/mips_cpu_bus.v
@@ -69,7 +69,8 @@ end
 always_ff @(negedge clk) begin // CLK Falling Edge
     if (!waitrequest && clk_state) begin
         case (state)
-            2'b00: // nothing happens on fetch negedge
+            2'b00: begin // nothing happens on fetch negedge
+            end
             2'b01: begin // execute negedge
                 if (!harvard_read && !harvard_write) begin // instruction complete, trigger writeback
                     clk_internal <= 1'b0;