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fixed naming convention errors in pc and harvard
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@ -20,13 +20,13 @@ module mips_cpu_harvard(
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input logic[31:0] data_readdata//port from data memory out, going to the 'Write Register' port in regfile.
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);
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assign instr_address = in_pc_in;
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assign instr_address = out_pc_out;
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assign data_address = out_ALURes;
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assign data_write = out_MemWrite;
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assign data_read = out_MemRead;
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assign data_writedata = out_readdata2;
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logic[31:0] in_pc_in, out_pc_out = 32'hBFC00000, out_ALURes, out_readdata1, out_readdata2, in_B, in_writedata;
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logic[31:0] out_pc_out, out_ALURes, out_readdata1, out_readdata2, in_B, in_writedata;
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logic[4:0] in_readreg1, in_readreg2, in_writereg, out_shamt, out_ALUOp;
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logic[5:0] in_opcode;
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logic out_ALUCond, out_RegWrite, out_ALUSrc, out_MemWrite, out_MemRead;
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@ -81,9 +81,8 @@ mips_cpu_pc pc(
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.instr(instr_readdata), //needed for branches and jumps
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.reg_readdata(out_readdata1), //needed for jump register
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.pc_ctrl(out_PC),
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.pc_in(out_pc_out),//what the pc will output on the next clock cycle taken from either: PC itself + 4(Normal/Default Operation); or 16-bit signed valued taken from Instr[15-0] sign extend to 32bit then shifted by 2 then added to PC + 4(Branch Operation); or 26-bit instruction address taken from J-type instr[25-0] shifted left by 2 then concatanated to form Jump Address (PC-region branch); or from the GPR rs.
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//PC outputs
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.pc_out(in_pc_in),//What the pc outputs at every clock edge that goes into the 'Read address' port of Instruction Memory.
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.pc_out(out_pc_out),//What the pc outputs at every clock edge that goes into the 'Read address' port of Instruction Memory.
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.active(active)
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);
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@ -2,7 +2,6 @@ module mips_cpu_pc(
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input logic clk,
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input logic rst,
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input logic[1:0] pc_ctrl,
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input logic[31:0] pc_in,
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input logic[31:0] instr,
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input logic[31:0] reg_readdata,
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output logic[31:0] pc_out,
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@ -12,7 +11,7 @@ module mips_cpu_pc(
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reg [31:0] pc_next, pc_lit_next;
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initial begin
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pc_out = pc_in;
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pc_out = 32'hBFC00000;
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pc_next = pc_out + 32'd4;
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end
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