diff --git a/rtl/mips_cpu_regfile.v b/rtl/mips_cpu_regfile.v
index 71a3007..c7f8ff0 100644
--- a/rtl/mips_cpu_regfile.v
+++ b/rtl/mips_cpu_regfile.v
@@ -27,7 +27,7 @@ always_comb begin
 	readdata2 = memory[readreg2]; //combinatorially output register value based on read port 2 selector
 end
 
-always_ff @(posedge clk) begin
+always_ff @(negedge clk) begin
 	if (regwrite) begin
 		case (opcode)
 			6'b100000: begin //lb, load byte