supleed2/ELEC50010-IAC-CW
1
0
Fork 0
mirror of https://github.com/supleed2/ELEC50010-IAC-CW.git synced 2024-12-22 21:35:48 +00:00
Code Issues Packages Projects Releases Wiki Activity

Update test_mips_cpu_bus.sh

Browse source 
Needs checking for source file for bus version
This commit is contained in:
jl7719 2020-12-16 15:58:03 +00:00
parent d8c918c9b4
commit 4be3149300
1 changed files with 58 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

60
test/test_mips_cpu_bus.sh
View file

@ -1,4 +1,60 @@
#!/bin/bash #!/bin/bash
# should not create any files in the rtl dir SRC_DIR=${1?Error: no source directory given in argument};
# but auxiliary files / dirs can be utilised SRC=$(ls ${SRC_DIR} | grep -E "harvard|memory|alu|regfile|pc|control"); # *** UPDATE THE SRC FOR BUS ***
SRC_TEMP="";
for src in ${SRC}
do
SRC_TEMP+=${SRC_DIR}/${src}" ";
done
SRC=${SRC_TEMP}
INSTR=${2:-"No instruction specified: running all testcases"};
if [[ ${INSTR} == "No instruction specified: running all testcases" ]];
then
for DIR in inputs/*/
do
DIR=$(basename ${DIR});
LOOP=$(find inputs/${DIR}/* ! -name '*ref*' ! -name '*log*' ! -name '*data*' ! -name '*out*');
for TESTCASE in ${LOOP}
do
TESTCASE=$([[ ${TESTCASE} =~ /([^./]+)\. ]] && echo "${BASH_REMATCH[1]}");
iverilog -Wall -g2012 \
-s mips_cpu_harvard_tb \
-P mips_cpu_harvard_tb.INSTR_INIT_FILE=\"inputs/${DIR}/${TESTCASE}.txt\" \
-P mips_cpu_harvard_tb.DATA_INIT_FILE=\"inputs/${DIR}/${TESTCASE}.data.txt\" \
-o exec/mips_cpu_harvard_tb_${TESTCASE} testbench/mips_cpu_harvard_tb.v \
${SRC} 2> /dev/null
./exec/mips_cpu_harvard_tb_${TESTCASE} &> ./inputs/${DIR}/${TESTCASE}.log.txt; # log file for debugging (contains $display)
echo "$(tail -1 ./inputs/${DIR}/${TESTCASE}.log.txt)" > ./inputs/${DIR}/${TESTCASE}.out.txt; # register v0 output to compare with reference
if diff -w ./inputs/${DIR}/${TESTCASE}.out.txt ./inputs/${DIR}/${TESTCASE}.ref.txt &> /dev/null # compare
then
echo ${TESTCASE} ${DIR} "Pass";
else
printf '%s %s %s%d %s%d%s\n' "${TESTCASE}" "${DIR}" "Fail Output=" "$(tail -1 ./inputs/${DIR}/${TESTCASE}.out.txt)" "Ref=" "$(tail -1 ./inputs/${DIR}/${TESTCASE}.ref.txt)" 2> /dev/null;
fi
done
done
else
LOOP=$(find inputs/${INSTR}/* ! -name '*ref*' ! -name '*log*' ! -name '*data*' ! -name '*out*');
for TESTCASE in ${LOOP}
do
TESTCASE=$([[ ${TESTCASE} =~ /([^./]+)\. ]] && echo "${BASH_REMATCH[1]}");
iverilog -Wall -g2012 \
-s mips_cpu_harvard_tb \
-P mips_cpu_harvard_tb.INSTR_INIT_FILE=\"inputs/${INSTR}/${TESTCASE}.txt\" \
-P mips_cpu_harvard_tb.DATA_INIT_FILE=\"inputs/${INSTR}/${TESTCASE}.data.txt\" \
-o exec/mips_cpu_harvard_tb_${TESTCASE} testbench/mips_cpu_harvard_tb.v \
${SRC} 2> /dev/null
./exec/mips_cpu_harvard_tb_${TESTCASE} &> ./inputs/${INSTR}/${TESTCASE}.log.txt; # log file for debugging (contains $display)
echo "$(tail -1 ./inputs/${INSTR}/${TESTCASE}.log.txt)" > ./inputs/${INSTR}/${TESTCASE}.out.txt; # register v0 output to compare with reference
if diff -w ./inputs/${INSTR}/${TESTCASE}.out.txt ./inputs/${INSTR}/${TESTCASE}.ref.txt &> /dev/null # compare
then
echo ${TESTCASE} ${INSTR} "Pass";
else
printf '%s %s %s%d %s%d%s\n' "${TESTCASE}" "${INSTR}" "Fail Output=" "$(tail -1 ./inputs/${INSTR}/${TESTCASE}.out.txt)" "Ref=" "$(tail -1 ./inputs/${INSTR}/${TESTCASE}.ref.txt)" 2> /dev/null;
fi
done
fi