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Update Harvard for new regfile input

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Aadi Desai 2020-12-19 10:27:17 +00:00 committed by GitHub
parent a598321539
commit 49b7fdbe07
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1 changed files with 3 additions and 1 deletions
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rtl/mips_cpu_harvard.v
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@ -30,12 +30,13 @@ logic[31:0] out_pc_out, out_ALURes, out_readdata1, out_readdata2, in_B, in_write
logic[4:0] in_readreg1, in_readreg2, in_writereg, out_shamt, out_ALUOp; logic[4:0] in_readreg1, in_readreg2, in_writereg, out_shamt, out_ALUOp;
logic[5:0] in_opcode; logic[5:0] in_opcode;
logic out_ALUCond, out_RegWrite, out_MemWrite, out_MemRead, out_SpcRegWriteEn; logic out_ALUCond, out_RegWrite, out_MemWrite, out_MemRead, out_SpcRegWriteEn;
logic[1:0] out_RegDst, out_PC, out_ALUSrc; logic[1:0] out_RegDst, out_PC, out_ALUSrc, ALURes_offset;
logic[2:0] out_MemtoReg; logic[2:0] out_MemtoReg;
assign in_readreg1 = instr_readdata[25:21]; assign in_readreg1 = instr_readdata[25:21];
assign in_readreg2 = instr_readdata[20:16]; assign in_readreg2 = instr_readdata[20:16];
assign in_opcode = instr_readdata[31:26]; assign in_opcode = instr_readdata[31:26];
assign ALURes_offset = out_ALURes[1:0];
always @(*) begin always @(*) begin
//Picking what register should be written to. //Picking what register should be written to.
@ -125,6 +126,7 @@ mips_cpu_regfile regfile(
//Outputs from regfile //Outputs from regfile
.readdata1(out_readdata1), //read port 1 output .readdata1(out_readdata1), //read port 1 output
.readdata2(out_readdata2), //read port 2 output .readdata2(out_readdata2), //read port 2 output
.vaddr(ALURes_offset), //base+offset[1:0]
.regv0(register_v0) //debug output of $v0 or $2 (first register for returning function results .regv0(register_v0) //debug output of $v0 or $2 (first register for returning function results
); );