From 2d9cca262ddd9949eebbb1a1f21373e2de31c29b Mon Sep 17 00:00:00 2001 From: jl7719 Date: Thu, 17 Dec 2020 14:51:08 +0000 Subject: [PATCH] Fix display appearing at the end of log file --- rtl/mips_cpu_control.v | 6 +-- test/test_mips_cpu_custom.sh | 67 --------------------------------- testbench/mips_cpu_harvard_tb.v | 4 +- 3 files changed, 5 insertions(+), 72 deletions(-) delete mode 100755 test/test_mips_cpu_custom.sh diff --git a/rtl/mips_cpu_control.v b/rtl/mips_cpu_control.v index 5ce988b..a37b490 100644 --- a/rtl/mips_cpu_control.v +++ b/rtl/mips_cpu_control.v @@ -96,7 +96,7 @@ always @(*) begin end else if ((op == JAL) || ((op==REGIMM)&&((rt==BGEZAL) || (rt==BLTZAL))))begin CtrlRegDst = 2'd2; //const reg 31, for writing to the link register $display("CTRLREGDST: Link"); - end else begin CtrlRegDst = 1'bx; $display("xxxxxxxxxxxxxx");end//Not all instructions are encompassed so, added incase for debug purposes + end else begin CtrlRegDst = 1'bx; end//Not all instructions are encompassed so, added incase for debug purposes //CtrlPC logic if(ALUCond && ((op==BEQ) || (op==BGTZ) || (op==BLEZ) || (op==BNE) || ((op==REGIMM)&&((rt==BGEZ) || (rt==BGEZAL) || (rt==BLTZ) || (rt==BLTZAL)))))begin @@ -106,7 +106,7 @@ always @(*) begin $display("Jump PC Ctrl"); end else if((op==SPECIAL)&&((funct==JR) || (funct==JALR)))begin CtrlPC = 2'd3; // Jumps using Register. - $display("Ctrl PC Jump Register"); + //$display("Ctrl PC Jump Register"); end else begin CtrlPC = 2'd0; /*/$display("Ctrl PC No Jump/Branch");*/end // No jumps or branches, just increment to next word //CtrlMemRead and CtrlMemtoReg logic -- Interesting quirk that they have the same logic where both are concerned. Makes sense bc you'd only want to select the read data out when the memory itself is read enabled. @@ -125,7 +125,7 @@ always @(*) begin end else if ((op==SPECIAL)&&(funct == MFLO))begin CtrlMemtoReg = 3'd4;//write data port of regfile is fed from ALULo end else begin CtrlMemRead = 1'bx;end//Not all instructions are encompassed so, added incase for debug purposes - $display("OP: %d, Funct: %d", op, funct); + //$display("OP: %d, Funct: %d", op, funct); //CtrlALUOp Logic if((op==ADDIU) || ((op==SPECIAL)&&(funct==ADDU)))begin CtrlALUOp = 5'd0; //ADD from ALUOps diff --git a/test/test_mips_cpu_custom.sh b/test/test_mips_cpu_custom.sh deleted file mode 100755 index 0027de0..0000000 --- a/test/test_mips_cpu_custom.sh +++ /dev/null @@ -1,67 +0,0 @@ -#!/bin/bash - -# arithmetic -./test/test_mips_cpu_harvard.sh rtl addu #Pass -./test/test_mips_cpu_harvard.sh rtl addiu #Pass -./test/test_mips_cpu_harvard.sh rtl subu #Pass -./test/test_mips_cpu_harvard.sh rtl and #Pass -./test/test_mips_cpu_harvard.sh rtl andi #Pass -./test/test_mips_cpu_harvard.sh rtl or #Pass -./test/test_mips_cpu_harvard.sh rtl ori #Pass -./test/test_mips_cpu_harvard.sh rtl xor #Pass -./test/test_mips_cpu_harvard.sh rtl xori #Pass -./test/test_mips_cpu_harvard.sh rtl div #Pass -./test/test_mips_cpu_harvard.sh rtl divu #pass -./test/test_mips_cpu_harvard.sh rtl mthi #Pass -./test/test_mips_cpu_harvard.sh rtl mtlo #Pass -./test/test_mips_cpu_harvard.sh rtl mult #Pass -./test/test_mips_cpu_harvard.sh rtl multu #Pass - - -# branches -./test/test_mips_cpu_harvard.sh rtl beq #Pass -./test/test_mips_cpu_harvard.sh rtl bgez #Pass -./test/test_mips_cpu_harvard.sh rtl bgezal #Pass -./test/test_mips_cpu_harvard.sh rtl bgtz #Pass -./test/test_mips_cpu_harvard.sh rtl blez #Pass -./test/test_mips_cpu_harvard.sh rtl bltz #Pass -./test/test_mips_cpu_harvard.sh rtl bltzal #Pass -./test/test_mips_cpu_harvard.sh rtl bne #Pass - -# jumps -./test/test_mips_cpu_harvard.sh rtl j #Pass -./test/test_mips_cpu_harvard.sh rtl jalr #Pass -./test/test_mips_cpu_harvard.sh rtl jal #Pass -./test/test_mips_cpu_harvard.sh rtl jr #Pass - -# shift -./test/test_mips_cpu_harvard.sh rtl sll #Pass -./test/test_mips_cpu_harvard.sh rtl srl #Pass -./test/test_mips_cpu_harvard.sh rtl sra #Pass -./test/test_mips_cpu_harvard.sh rtl srav #Pass -./test/test_mips_cpu_harvard.sh rtl sllv #Pass -./test/test_mips_cpu_harvard.sh rtl srlv #Pass - - - -# load & store -./test/test_mips_cpu_harvard.sh rtl lw #Pass -./test/test_mips_cpu_harvard.sh rtl lb #Pass -./test/test_mips_cpu_harvard.sh rtl lbu #Pass -./test/test_mips_cpu_harvard.sh rtl lh #Pass -./test/test_mips_cpu_harvard.sh rtl lhu #Pass -./test/test_mips_cpu_harvard.sh rtl lui #Pass -./test/test_mips_cpu_harvard.sh rtl lwl #Pass -./test/test_mips_cpu_harvard.sh rtl lwr #Pass -./test/test_mips_cpu_harvard.sh rtl sw #Pass -#./test/test_mips_cpu_harvard.sh rtl sb #Once switched to bus -#./test/test_mips_cpu_harvard.sh rtl sh #Once switched to bus - - -# set on less than **Branch delay slots dont work on these... -./test/test_mips_cpu_harvard.sh rtl slti #Pass -./test/test_mips_cpu_harvard.sh rtl sltiu #Pass -./test/test_mips_cpu_harvard.sh rtl slt #Pass -./test/test_mips_cpu_harvard.sh rtl sltu #Pass - - diff --git a/testbench/mips_cpu_harvard_tb.v b/testbench/mips_cpu_harvard_tb.v index 624f9c5..016d844 100644 --- a/testbench/mips_cpu_harvard_tb.v +++ b/testbench/mips_cpu_harvard_tb.v @@ -63,8 +63,8 @@ module mips_cpu_harvard_tb; @(posedge clk); //$display("Register v0: %d", register_v0); //$display("Reg File Write data: %d", cpuInst.in_writedata); - $display("Reg File Out Read data: %h", cpuInst.out_readdata1); - $display("Reg File opcode: %b", cpuInst.regfile.opcode); + //$display("Reg File Out Read data: %h", cpuInst.out_readdata1); + //$display("Reg File opcode: %b", cpuInst.regfile.opcode); //$display("ALU output: %h", cpuInst.out_ALURes); //$display("ALU input B: %h", cpuInst.alu.B); end