diff --git a/test/test_mips_cpu_bus.sh b/test/test_mips_cpu_bus.sh old mode 100644 new mode 100755 diff --git a/test/test_mips_cpu_custom.sh b/test/test_mips_cpu_custom.sh old mode 100644 new mode 100755 diff --git a/test/test_mips_cpu_harvard.sh b/test/test_mips_cpu_harvard.sh old mode 100644 new mode 100755 index a4d2a48..f051312 --- a/test/test_mips_cpu_harvard.sh +++ b/test/test_mips_cpu_harvard.sh @@ -29,14 +29,15 @@ then #echo ${TESTCASE}; TESTCASE="${TESTCASE%%.*}"; -/mnt/c/Windows/System32/cmd.exe /C \ +#/mnt/c/Windows/System32/cmd.exe /C \ iverilog -Wall -g2012 \ -s mips_cpu_harvard_tb \ -P mips_cpu_harvard_tb.INSTR_INIT_FILE=\"inputs/${TESTCASE}.txt\" \ -P mips_cpu_harvard_tb.DATA_INIT_FILE=\"inputs/${TESTCASE}.data.txt\" \ -o exec/mips_cpu_harvard_tb_${TESTCASE} testbench/mips_cpu_harvard_tb.v \ ${SRC} 2> /dev/null -/mnt/c/Windows/System32/cmd.exe /C vvp ./exec/mips_cpu_harvard_tb_${TESTCASE} &> ./inputs/${TESTCASE}.log.txt; # log file for debugging (contains $display) +#/mnt/c/Windows/System32/cmd.exe /C vvp +./exec/mips_cpu_harvard_tb_${TESTCASE} &> ./inputs/${TESTCASE}.log.txt; # log file for debugging (contains $display) echo "$(tail -1 ./inputs/${TESTCASE}.log.txt)" > ./inputs/${TESTCASE}.out.txt; # register v0 output to compare with reference if diff -w ./inputs/${TESTCASE}.out.txt ./inputs/${TESTCASE}.ref.txt &> /dev/null # compare then @@ -48,14 +49,15 @@ fi else # Run Testcase File Of Specified Instruction -/mnt/c/Windows/System32/cmd.exe /C \ +#/mnt/c/Windows/System32/cmd.exe /C \ iverilog -Wall -g2012 \ -s mips_cpu_harvard_tb \ -P mips_cpu_harvard_tb.INSTR_INIT_FILE=\"inputs/${INSTR}.txt\" \ -P mips_cpu_harvard_tb.DATA_INIT_FILE=\"inputs/${INSTR}.data.txt\" \ -o exec/mips_cpu_harvard_tb_${INSTR} testbench/mips_cpu_harvard_tb.v \ ${SRC} 2> /dev/null -/mnt/c/Windows/System32/cmd.exe /C vvp ./exec/mips_cpu_harvard_tb_${INSTR} &> ./inputs/${INSTR}.log.txt; # log file for debugging (contains $display) +#/mnt/c/Windows/System32/cmd.exe /C vvp +./exec/mips_cpu_harvard_tb_${INSTR} &> ./inputs/${INSTR}.log.txt; # log file for debugging (contains $display) echo "$(tail -1 ./inputs/${INSTR}.log.txt)" > ./inputs/${INSTR}.out.txt; # register v0 output to compare with reference if diff -w ./inputs/${INSTR}.out.txt ./inputs/${INSTR}.ref.txt &> /dev/null # compare then diff --git a/test/test_mips_cpu_harvard_windows.sh b/test/test_mips_cpu_harvard_windows.sh new file mode 100755 index 0000000..a4d2a48 --- /dev/null +++ b/test/test_mips_cpu_harvard_windows.sh @@ -0,0 +1,67 @@ +#!/bin/bash + +#**Delete command for windows before submission** +#rm inputs/*.log.txt inputs/*.out.txt + +# Source File & Source Directory Parsing +SRC_DIR=${1?Error: no source directory given in argument}; # e.g. rtl +SRC=$(ls ${SRC_DIR} | grep -E "harvard|memory|alu|regfile|pc|control"); +SRC_TEMP=""; +for src in ${SRC} +do + SRC_TEMP+=${SRC_DIR}/${src}" "; +done +SRC=${SRC_TEMP} +#echo ${SRC}; + +# Instruction Argument +INSTR=${2:-"No instruction specified: running all testcases"}; # e.g. addiu + +# Start Testing +if [[ ${INSTR} == "No instruction specified: running all testcases" ]]; +then + # All Testcase Files + TESTCASES=$(find ./inputs ! -name '*ref*' ! -name '*log*' ! -name '*out*' ! -name '*inputs*' ! -name '*data*' | sed 's#.*/##'); + #echo ${TESTCASES} + for TESTCASE in ${TESTCASES} + do + # Run Each Testcase File + #echo ${TESTCASE}; + TESTCASE="${TESTCASE%%.*}"; + +/mnt/c/Windows/System32/cmd.exe /C \ +iverilog -Wall -g2012 \ + -s mips_cpu_harvard_tb \ + -P mips_cpu_harvard_tb.INSTR_INIT_FILE=\"inputs/${TESTCASE}.txt\" \ + -P mips_cpu_harvard_tb.DATA_INIT_FILE=\"inputs/${TESTCASE}.data.txt\" \ + -o exec/mips_cpu_harvard_tb_${TESTCASE} testbench/mips_cpu_harvard_tb.v \ + ${SRC} 2> /dev/null +/mnt/c/Windows/System32/cmd.exe /C vvp ./exec/mips_cpu_harvard_tb_${TESTCASE} &> ./inputs/${TESTCASE}.log.txt; # log file for debugging (contains $display) +echo "$(tail -1 ./inputs/${TESTCASE}.log.txt)" > ./inputs/${TESTCASE}.out.txt; # register v0 output to compare with reference +if diff -w ./inputs/${TESTCASE}.out.txt ./inputs/${TESTCASE}.ref.txt &> /dev/null # compare +then + echo ${TESTCASE} ${TESTCASE} "Pass"; +else + printf '%s %s %s%d %s%d%s\n' "${TESTCASE}" "${TESTCASE}" "Fail Output=" "$(tail -1 ./inputs/${TESTCASE}.out.txt)" "Ref=" "$(tail -1 ./inputs/${TESTCASE}.ref.txt)" 2> /dev/null; +fi + done + +else + # Run Testcase File Of Specified Instruction +/mnt/c/Windows/System32/cmd.exe /C \ +iverilog -Wall -g2012 \ + -s mips_cpu_harvard_tb \ + -P mips_cpu_harvard_tb.INSTR_INIT_FILE=\"inputs/${INSTR}.txt\" \ + -P mips_cpu_harvard_tb.DATA_INIT_FILE=\"inputs/${INSTR}.data.txt\" \ + -o exec/mips_cpu_harvard_tb_${INSTR} testbench/mips_cpu_harvard_tb.v \ + ${SRC} 2> /dev/null +/mnt/c/Windows/System32/cmd.exe /C vvp ./exec/mips_cpu_harvard_tb_${INSTR} &> ./inputs/${INSTR}.log.txt; # log file for debugging (contains $display) +echo "$(tail -1 ./inputs/${INSTR}.log.txt)" > ./inputs/${INSTR}.out.txt; # register v0 output to compare with reference +if diff -w ./inputs/${INSTR}.out.txt ./inputs/${INSTR}.ref.txt &> /dev/null # compare +then + echo ${INSTR} ${INSTR} "Pass"; +else + printf '%s %s %s%d %s%d%s\n' "${INSTR}" "${INSTR}" "Fail Output=" "$(tail -1 ./inputs/${INSTR}.out.txt)" "Ref=" "$(tail -1 ./inputs/${INSTR}.ref.txt)" 2> /dev/null; +fi + +fi