From 47e0f42f92ac3688286569c11c68cded554994b2 Mon Sep 17 00:00:00 2001 From: yhp19 Date: Fri, 11 Dec 2020 15:54:23 +0800 Subject: [PATCH 1/9] added load instructions --- inputs/reference.txt | 189 ++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 178 insertions(+), 11 deletions(-) diff --git a/inputs/reference.txt b/inputs/reference.txt index 10792b3..ed39c2c 100644 --- a/inputs/reference.txt +++ b/inputs/reference.txt @@ -34,15 +34,27 @@ LUI $4,0xAAAA AND $2,$4,$5 JR $0 +3405cccc +3c05cccc +3404aaaa +3c04aaaa +00851024 +00000008 + register_v0 = 0x88888888 ==ANDI Bitwise and immediate== ORI $4,$0,0xAAAA LUI $4,0xAAAA -ANDI $2,$4,0xCCCC +ANDI $2,$4,0xCCCC JR $0 +3404aaaa +3c04aaaa +3082cccc +00000008 + register_v0 = 0x00008888 ==BEQ Branch on equal== @@ -223,18 +235,34 @@ MFLO $5 ADDU $2,$4,$5 JR $0 +34040003 +34050009 +00A4001A +00002010 +00002812 +00851021 +00000008 + register_v0 = 3 ==DIVU Divide unsigned== //May need other testcases for -ve/+ve, -ve/-ve LUI $4,0x8000 ORI $5,$0,2 -DIV $4,$5 +DIVU $4,$5 MFHI $4 MFLO $5 ADDU $2,$4,$5 JR $0 +34048000 +34050002 +0085001B +00002010 +00002812 +00851021 +00000008 + register_v0 = 0x40000000 ==J Jump== @@ -277,7 +305,6 @@ JR $4 34020001 00800008 - register_v0 = 2 ==JAL Jump and link== @@ -321,14 +348,154 @@ JR $0 register_v0 = 1 -LB Load byte -LBU Load byte unsigned -LH Load half-word -LHU Load half-word unsigned -LUI Load upper immediate -LW Load word -LWL Load word left -LWR Load word right +==LB Load byte== + +ORI $4,$0,0x1003 +LB $2,3($4) +JR $0 + +-Instruction Hex + +34041003 +80820003 +00000008 + +-Memory Hex + +00000000 +008A0000 + +register_v0 = 0xFFFFFF8A + +==LBU Load byte unsigned== + +ORI $4,$0,0x1003 +LBU $2,3($4) +JR $0 + +-Instruction Hex + +34041003 +90820003 +00000008 + +-Memory Hex + +00000000 +008A0000 + +register_v0 = 0x0000008A + +==LH Load half-word== + +ORI $4,$0,0x1003 +LH $2,4($4) +JR $0 + +-Instruction Hex + +34041003 +84820004 +00000008 + +-Memory Hex + +00000000 +00008123 + +register_v0 = 0xFFFF8123 + +==LHU Load half-word unsigned== + +ORI $4,$0,0x1003 +LHU $2,4($4) +JR $0 + +-Instruction Hex + +34041003 +94820004 +00000008 + +-Memory Hex + +00000000 +00008123 + +register_v0 = 0x00008123 + +==LUI Load upper immediate== + +ORI $2,$0,0x5678 +LUI $2,0x1234 +JR $0 + +34045678 +3C021234 +00000008 + +register_v0 = 0x12345678 + +==LW Load word== + +ORI $4,$0,0x1002 +LW $2, 2($4) +JR $0 + +-Instruction Hex + +34041002 +8C820002 +00000008 + +-Memory Hex + +00000000 +12345678 + +register_v0 = 0x12345678 + +==LWL Load word left== + +ORI $4,$0,0x1003 +ORI $2,$0,0x5678 +LWL $2,3($4) +JR $0 + +-Instruction Hex + +34041003 +34025678 +88820003 +00000008 + +-Memory Hex + +00000000 +AAAA1234 + +register_v0 = 0x12345678 + +==LWR Load word right== + +ORI $4,$0,0x1003 +LUI $2,0x1234 +LWR $2,2($4) +JR $0 + +-Instruction Hex + +34041003 +3C021234 +98820002 +00000008 + +-Memory Hex + +00000000 +5678AAAA + +register_v0 = 0x12345678 // DIVU Divide unsigned From 69cd711cfcc54e8d1baa2ff2947e32cfbc2e99db Mon Sep 17 00:00:00 2001 From: yhp19 Date: Sat, 12 Dec 2020 23:39:00 +0800 Subject: [PATCH 2/9] Added load instruction txt and data.txt --- inputs/lb.data.txt | 4 ++++ inputs/lb.txt | 3 +++ inputs/lbu.data.txt | 4 ++++ inputs/lbu.txt | 3 +++ inputs/lh.data.txt | 4 ++++ inputs/lh.txt | 3 +++ inputs/lhu.data.txt | 4 ++++ inputs/lhu.txt | 3 +++ inputs/lui.txt | 3 +++ inputs/lw.data.txt | 4 ++++ inputs/lw.txt | 3 +++ inputs/lwl.data.txt | 4 ++++ inputs/lwl.txt | 4 ++++ inputs/lwr.data.txt | 4 ++++ inputs/lwr.txt | 4 ++++ inputs/reference.txt | 14 ++++++++++++++ 16 files changed, 68 insertions(+) create mode 100644 inputs/lb.data.txt create mode 100644 inputs/lb.txt create mode 100644 inputs/lbu.data.txt create mode 100644 inputs/lbu.txt create mode 100644 inputs/lh.data.txt create mode 100644 inputs/lh.txt create mode 100644 inputs/lhu.data.txt create mode 100644 inputs/lhu.txt create mode 100644 inputs/lui.txt create mode 100644 inputs/lw.data.txt create mode 100644 inputs/lw.txt create mode 100644 inputs/lwl.data.txt create mode 100644 inputs/lwl.txt create mode 100644 inputs/lwr.data.txt create mode 100644 inputs/lwr.txt diff --git a/inputs/lb.data.txt b/inputs/lb.data.txt new file mode 100644 index 0000000..47c26d6 --- /dev/null +++ b/inputs/lb.data.txt @@ -0,0 +1,4 @@ +00000000 +008A0000 +00000000 +00000000 \ No newline at end of file diff --git a/inputs/lb.txt b/inputs/lb.txt new file mode 100644 index 0000000..83898a5 --- /dev/null +++ b/inputs/lb.txt @@ -0,0 +1,3 @@ +34041003 +80820003 +00000008 \ No newline at end of file diff --git a/inputs/lbu.data.txt b/inputs/lbu.data.txt new file mode 100644 index 0000000..47c26d6 --- /dev/null +++ b/inputs/lbu.data.txt @@ -0,0 +1,4 @@ +00000000 +008A0000 +00000000 +00000000 \ No newline at end of file diff --git a/inputs/lbu.txt b/inputs/lbu.txt new file mode 100644 index 0000000..06c0f06 --- /dev/null +++ b/inputs/lbu.txt @@ -0,0 +1,3 @@ +34041003 +90820003 +00000008 \ No newline at end of file diff --git a/inputs/lh.data.txt b/inputs/lh.data.txt new file mode 100644 index 0000000..f3b4cfd --- /dev/null +++ b/inputs/lh.data.txt @@ -0,0 +1,4 @@ +00000000 +00008123 +00000000 +00000000 \ No newline at end of file diff --git a/inputs/lh.txt b/inputs/lh.txt new file mode 100644 index 0000000..3a583e1 --- /dev/null +++ b/inputs/lh.txt @@ -0,0 +1,3 @@ +34041003 +84820004 +00000008 \ No newline at end of file diff --git a/inputs/lhu.data.txt b/inputs/lhu.data.txt new file mode 100644 index 0000000..f3b4cfd --- /dev/null +++ b/inputs/lhu.data.txt @@ -0,0 +1,4 @@ +00000000 +00008123 +00000000 +00000000 \ No newline at end of file diff --git a/inputs/lhu.txt b/inputs/lhu.txt new file mode 100644 index 0000000..54a3692 --- /dev/null +++ b/inputs/lhu.txt @@ -0,0 +1,3 @@ +34041003 +94820004 +00000008 \ No newline at end of file diff --git a/inputs/lui.txt b/inputs/lui.txt new file mode 100644 index 0000000..6c9915e --- /dev/null +++ b/inputs/lui.txt @@ -0,0 +1,3 @@ +34045678 +3C021234 +00000008 \ No newline at end of file diff --git a/inputs/lw.data.txt b/inputs/lw.data.txt new file mode 100644 index 0000000..50de8d2 --- /dev/null +++ b/inputs/lw.data.txt @@ -0,0 +1,4 @@ +00000000 +12345678 +00000000 +00000000 \ No newline at end of file diff --git a/inputs/lw.txt b/inputs/lw.txt new file mode 100644 index 0000000..7c6a2ee --- /dev/null +++ b/inputs/lw.txt @@ -0,0 +1,3 @@ +34041002 +8C820002 +00000008 \ No newline at end of file diff --git a/inputs/lwl.data.txt b/inputs/lwl.data.txt new file mode 100644 index 0000000..325d898 --- /dev/null +++ b/inputs/lwl.data.txt @@ -0,0 +1,4 @@ +00000000 +AAAA1234 +00000000 +00000000 \ No newline at end of file diff --git a/inputs/lwl.txt b/inputs/lwl.txt new file mode 100644 index 0000000..a62ec0b --- /dev/null +++ b/inputs/lwl.txt @@ -0,0 +1,4 @@ +34041003 +34025678 +88820003 +00000008 \ No newline at end of file diff --git a/inputs/lwr.data.txt b/inputs/lwr.data.txt new file mode 100644 index 0000000..ca679b8 --- /dev/null +++ b/inputs/lwr.data.txt @@ -0,0 +1,4 @@ +00000000 +5678AAAA +00000000 +00000000 \ No newline at end of file diff --git a/inputs/lwr.txt b/inputs/lwr.txt new file mode 100644 index 0000000..22f33f9 --- /dev/null +++ b/inputs/lwr.txt @@ -0,0 +1,4 @@ +34041003 +3C021234 +98820002 +00000008 \ No newline at end of file diff --git a/inputs/reference.txt b/inputs/reference.txt index ed39c2c..ff067cb 100644 --- a/inputs/reference.txt +++ b/inputs/reference.txt @@ -364,6 +364,8 @@ JR $0 00000000 008A0000 +00000000 +00000000 register_v0 = 0xFFFFFF8A @@ -383,6 +385,8 @@ JR $0 00000000 008A0000 +00000000 +00000000 register_v0 = 0x0000008A @@ -402,6 +406,8 @@ JR $0 00000000 00008123 +00000000 +00000000 register_v0 = 0xFFFF8123 @@ -421,6 +427,8 @@ JR $0 00000000 00008123 +00000000 +00000000 register_v0 = 0x00008123 @@ -452,6 +460,8 @@ JR $0 00000000 12345678 +00000000 +00000000 register_v0 = 0x12345678 @@ -473,6 +483,8 @@ JR $0 00000000 AAAA1234 +00000000 +00000000 register_v0 = 0x12345678 @@ -494,6 +506,8 @@ JR $0 00000000 5678AAAA +00000000 +00000000 register_v0 = 0x12345678 From ab27fcaed379881e4723cf5f762a2128be0d632a Mon Sep 17 00:00:00 2001 From: yhp19 Date: Sat, 12 Dec 2020 23:46:42 +0800 Subject: [PATCH 3/9] Reference txt now in reference folders --- .DS_Store | Bin 0 -> 10244 bytes inputs/.DS_Store | Bin 0 -> 10244 bytes inputs/{ => reference}/ibrahimreference.txt | 0 inputs/{ => reference}/reference.txt | 0 4 files changed, 0 insertions(+), 0 deletions(-) create mode 100644 .DS_Store create mode 100644 inputs/.DS_Store rename inputs/{ => reference}/ibrahimreference.txt (100%) rename inputs/{ => reference}/reference.txt (100%) diff --git a/.DS_Store b/.DS_Store new file mode 100644 index 0000000000000000000000000000000000000000..d6cace5b3b482de4a8700a09e4a767c40f3a57e6 GIT binary patch literal 10244 zcmeHMU2GIp6h3FW!puSEd`;qE%b+M*BmqF8k5RRjvRM*qXWuy~7IGF7Mbd{(+s$QdH%oQ( z9O;M=c_8vY*?u9D3IbeYU z1t>xQen(GtOVJNJ-p?M;Ax{H-MS~>Cl02*~J$iJ*=5Z+Ee>`#?vFDvtE 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a/inputs/.DS_Store b/inputs/.DS_Store new file mode 100644 index 0000000000000000000000000000000000000000..6dacc4f72b26423abeda22eab0deea7702347e0d GIT binary patch literal 10244 zcmeHMOKuZE5UqBMJtiM=0mLj>MdSu1m<8+X5wV@bK@&ST;{>um-Xk~yS3rmxzbk9^f*&v~)2hCKl-|L!s{kmtmO+;pAHryu4i74X}adV9?%7O23){chz zq{q=PpJ+x~G^Kqy;Fyl2KvEznkQ7J?BnAFQ1^AhbBU`mGU6TSyfuz7f0n86MpNL%- z=QhgJ!53KqaBT9&a`4~04iHZ6V%NpFjY8!%?dries&PvUW9j^T4miiIi*p+-os6ZE zahZ)F<7o#`;}hwHGV}-8ihEQ44Y$ zEzi>UUg4pZYo3y4qOP zLwxet^9k@p{GJFdspF&Vi#vQgYA9Hp3syE#gMmYQ4pbfUJ*lc1I3q-(pU-r(IKxM0 z;)*jFPfDMOBYgZldabv-g5LF!ZAM0Gl)m-RnL|(Y)|=>8AKzkp1dBd38(yETveJES zcgXis@~P^Go()(n$5K>5uLjsP!D6OZngcx>@Y)NWmW6vZK%&E@>T^DC z=sj_W&qLLgr(_Y2_-LC2o?WV~c*N(~ED^6`^cx?Y(J}97k7DYIJL>p?Cc0MQkSe~6 zw=d4911H>&s<>sspfBku6=54c{7A8?$?p8hz>hD&^QXTiqUReDjp^3(ImrpLHN zM)8c#Z?V#`zQnBJW7~qoGh4Yc@rjS_NbLvwoWSoIV;azY_)gT^;Z@K#TgwxkPWhe4 z{sQ7Lio@;Q!Q}V^U%Nv=9Zz~a_pX)w`f>X1)8!@Jw^ZctmdKM)E%SQ){vujn6!==S z=u~EWMK>7%RqV3)(Z{yA-9lyxrDgHHkIo!A@+=nb*YRa+?27k&d`H>`KH^@P6@7-i zqcVnv+Z!)Ex1-+avL|MMM(aRF>cxy0;BD(m-hu+OZM}%L&K{`YXY7KAHt<1!hi4*B z49tQ7w#_S!=s1QC0(9okk&z4^1o-Qbmts;NDF6jltPDB!|DVTy|F@`gO$sCh?xX^y z+1u^$Ybj(DQb3R}3i37N~jY8oIAoyIij(_Yvlh Date: Sat, 12 Dec 2020 23:59:04 +0800 Subject: [PATCH 4/9] Added ref files for j and load instructions --- inputs/j.ref.txt | 1 + inputs/jal.ref.txt | 1 + inputs/jalr.ref.txt | 1 + inputs/jr.ref.txt | 1 + inputs/lb.ref.txt | 1 + inputs/lbu.ref.txt | 1 + inputs/lh.ref.txt | 1 + inputs/lhu.ref.txt | 1 + inputs/lui.ref.txt | 1 + inputs/lw.ref.txt | 1 + inputs/lwl.ref.txt | 1 + inputs/lwr.ref.txt | 1 + 12 files changed, 12 insertions(+) create mode 100644 inputs/j.ref.txt create mode 100644 inputs/jal.ref.txt create mode 100644 inputs/jalr.ref.txt create mode 100644 inputs/jr.ref.txt create mode 100644 inputs/lb.ref.txt create mode 100644 inputs/lbu.ref.txt create mode 100644 inputs/lh.ref.txt create mode 100644 inputs/lhu.ref.txt create mode 100644 inputs/lui.ref.txt create mode 100644 inputs/lw.ref.txt create mode 100644 inputs/lwl.ref.txt create mode 100644 inputs/lwr.ref.txt diff --git a/inputs/j.ref.txt b/inputs/j.ref.txt new file mode 100644 index 0000000..56a6051 --- /dev/null +++ b/inputs/j.ref.txt @@ -0,0 +1 @@ +1 \ No newline at end of file diff --git a/inputs/jal.ref.txt b/inputs/jal.ref.txt new file mode 100644 index 0000000..d8263ee --- /dev/null +++ b/inputs/jal.ref.txt @@ -0,0 +1 @@ +2 \ No newline at end of file diff --git a/inputs/jalr.ref.txt b/inputs/jalr.ref.txt new file mode 100644 index 0000000..d8263ee --- /dev/null +++ b/inputs/jalr.ref.txt @@ -0,0 +1 @@ +2 \ No newline at end of file diff --git a/inputs/jr.ref.txt b/inputs/jr.ref.txt new file mode 100644 index 0000000..56a6051 --- /dev/null +++ b/inputs/jr.ref.txt @@ -0,0 +1 @@ +1 \ No newline at end of file diff --git a/inputs/lb.ref.txt b/inputs/lb.ref.txt new file mode 100644 index 0000000..f8ff60d --- /dev/null +++ b/inputs/lb.ref.txt @@ -0,0 +1 @@ +4294967178 \ No newline at end of file diff --git a/inputs/lbu.ref.txt b/inputs/lbu.ref.txt new file mode 100644 index 0000000..eafdfb0 --- /dev/null +++ b/inputs/lbu.ref.txt @@ -0,0 +1 @@ +138 \ No newline at end of file diff --git a/inputs/lh.ref.txt b/inputs/lh.ref.txt new file mode 100644 index 0000000..9e489ac --- /dev/null +++ b/inputs/lh.ref.txt @@ -0,0 +1 @@ +4294934819 \ No newline at end of file diff --git a/inputs/lhu.ref.txt b/inputs/lhu.ref.txt new file mode 100644 index 0000000..db277c1 --- /dev/null +++ b/inputs/lhu.ref.txt @@ -0,0 +1 @@ +33059 \ No newline at end of file diff --git a/inputs/lui.ref.txt b/inputs/lui.ref.txt new file mode 100644 index 0000000..7751570 --- /dev/null +++ b/inputs/lui.ref.txt @@ -0,0 +1 @@ +305419896 \ No newline at end of file diff --git a/inputs/lw.ref.txt b/inputs/lw.ref.txt new file mode 100644 index 0000000..7751570 --- /dev/null +++ b/inputs/lw.ref.txt @@ -0,0 +1 @@ +305419896 \ No newline at end of file diff --git a/inputs/lwl.ref.txt b/inputs/lwl.ref.txt new file mode 100644 index 0000000..7751570 --- /dev/null +++ b/inputs/lwl.ref.txt @@ -0,0 +1 @@ +305419896 \ No newline at end of file diff --git a/inputs/lwr.ref.txt b/inputs/lwr.ref.txt new file mode 100644 index 0000000..7751570 --- /dev/null +++ b/inputs/lwr.ref.txt @@ -0,0 +1 @@ +305419896 \ No newline at end of file From be27fdc1cecb2cf4d75dca7a2c806d2ef9d6e798 Mon Sep 17 00:00:00 2001 From: jc4419 <60656643+jc4419@users.noreply.github.com> Date: Sun, 13 Dec 2020 15:37:44 +0400 Subject: [PATCH 5/9] Updated PC/Harvard, should work with delay slot --- rtl/mips_cpu_cpc.v | 27 +++++++++++++++++++++ rtl/mips_cpu_harvard.v | 22 ++++------------- rtl/mips_cpu_npc.v | 27 +++++++++++++++++++++ rtl/mips_cpu_pc.v | 54 ++++++++++++++++++++++++++++++------------ 4 files changed, 97 insertions(+), 33 deletions(-) create mode 100644 rtl/mips_cpu_cpc.v create mode 100644 rtl/mips_cpu_npc.v diff --git a/rtl/mips_cpu_cpc.v b/rtl/mips_cpu_cpc.v new file mode 100644 index 0000000..91beb59 --- /dev/null +++ b/rtl/mips_cpu_cpc.v @@ -0,0 +1,27 @@ +module cpc( +input logic clk, +input logic rst, +input logic[31:0] cpc_in, +output logic[31:0] cpc_out +); + +reg[31:0] cpc_curr; + +initial begin + cpc_curr = 32'hBFC00000; +end // initial + +always_comb begin + if (rst) begin + cpc_curr = 32'hBFC00000; + end else begin + cpc_curr = cpc_in; + end + +end + +always_ff @(posedge clk) begin + cpc_out <= cpc_curr; +end + +endmodule // pc \ No newline at end of file diff --git a/rtl/mips_cpu_harvard.v b/rtl/mips_cpu_harvard.v index 1731dfd..a6e9d49 100644 --- a/rtl/mips_cpu_harvard.v +++ b/rtl/mips_cpu_harvard.v @@ -42,22 +42,6 @@ always_comb begin in_readreg2 = instr_readdata[20:16]; in_opcode = instr_readdata[31:26]; -//Picking what the next value of PC should be. - case(out_PC) - 2'd0: begin - in_pc_in = out_pc_out + 32'd4;//No branch or jump or load, so no delay slot. - end - 2'd1: begin - in_pc_in = //help - end - 2'd2: begin - in_pc_in = //my brain hurts - end - 2'd3: begin - in_pc_in = //I need to sleep...... - end - endcase - //Picking what register should be written to. case(out_RegDst) 2'd0:begin @@ -95,11 +79,13 @@ always_comb begin endcase end -pc pc( +mips_cpu_pc pc( //PC inputs .clk(clk),//clk taken from the Standard signals .rst(reset),//clk taken from the Standard signals - .pc_in(in_pc_in),//what the pc will output on the next clock cycle taken from either: PC itself + 4(Normal/Default Operation); or 16-bit signed valued taken from Instr[15-0] sign extend to 32bit then shifted by 2 then added to PC + 4(Branch Operation); or 26-bit instruction address taken from J-type instr[25-0] shifted left by 2 then concatanated to form Jump Address (PC-region branch); or from the GPR rs. + .Instr(instr_readdata),//what the pc will output on the next clock cycle taken from either: PC itself + 4(Normal/Default Operation); or 16-bit signed valued taken from Instr[15-0] sign extend to 32bit then shifted by 2 then added to PC + 4(Branch Operation); or 26-bit instruction address taken from J-type instr[25-0] shifted left by 2 then concatanated to form Jump Address (PC-region branch); or from the GPR rs. + .JumpReg(out_readdata1), + .pc_ctrl(out_PC), //PC outputs .pc_out(out_pc_out)//What the pc outputs at every clock edge that goes into the 'Read address' port of Instruction Memory. ); diff --git a/rtl/mips_cpu_npc.v b/rtl/mips_cpu_npc.v new file mode 100644 index 0000000..b44baf6 --- /dev/null +++ b/rtl/mips_cpu_npc.v @@ -0,0 +1,27 @@ +module npc( +input logic clk, +input logic rst, +input logic[31:0] npc_in, +output logic[31:0] npc_out +); + +reg[31:0] npc_curr; + +initial begin + npc_curr = (32'hBFC00000 + 32'd4); +end // initial + +always_comb begin + if (rst) begin + npc_curr = (32'hBFC00000 + 32'd4); + end else begin + npc_curr = npc_in; + end + +end + +always_ff @(posedge clk) begin + npc_out <= npc_curr; +end + +endmodule // pc \ No newline at end of file diff --git a/rtl/mips_cpu_pc.v b/rtl/mips_cpu_pc.v index 0ff578f..323ca98 100644 --- a/rtl/mips_cpu_pc.v +++ b/rtl/mips_cpu_pc.v @@ -1,27 +1,51 @@ module pc( input logic clk, input logic rst, -input logic[31:0] pc_in, +input logic[31:0] Instr, +input logic[31:0] JumpReg, +input logic[1:0] pc_ctrl output logic[31:0] pc_out ); -reg[31:0] pc_curr; +logic[31:0] out_cpc_out; +logic[31:0] out_npc_out; +logic[31:0] in_npc_in; -initial begin - pc_curr = 32'hBFC00000; -end // initial +assign pc_out = out_cpc_out; always_comb begin - if (rst) begin - pc_curr = 32'hBFC00000; - end else begin - pc_curr = pc_in; - end - + case(pc_ctrl) + 2'd0: begin + in_npc_in = out_npc_out + 32'd4;//No branch or jump or load. + end + 2'd1: begin + in_npc_in = out_npc_out + {{14{Instr[15]}}, Instr[15:0], 2'b00}; + end + 2'd2: begin + in_npc_in = {out_npc_out[31:28], Instr[25:0], 2'b00}; + end + 2'd3: begin + in_npc_in = JumpReg; + end + endcase end -always_ff @(posedge clk) begin - pc_out <= pc_curr; -end +mips_cpu_cpc cpc( +//Inputs for cpc + .clk(clk), + .rst(rst), + .cpc_in(out_npc_out), +//Outputs for cpc + .cpc_out(out_cpc_out) +); -endmodule // pc \ No newline at end of file +mips_cpu_cpc npc( +//Inputs for npc + .clk(clk), + .rst(rst), + .npc_in(in_npc_in), +//Outputs for npc + .npc_out(out_npc_out) +); + +endmodule \ No newline at end of file From d72676c30c159b6319a33575bd2eb9615639feea Mon Sep 17 00:00:00 2001 From: theexecutor13 Date: Mon, 14 Dec 2020 23:58:08 +0800 Subject: [PATCH 6/9] Update bltzal.txt --- inputs/bltzal.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/inputs/bltzal.txt b/inputs/bltzal.txt index 6e01f55..56ff984 100644 --- a/inputs/bltzal.txt +++ b/inputs/bltzal.txt @@ -2,7 +2,7 @@ 04900004 00000000 24420001 -00000000 00000008 +00000000 34020001 -03E00008 \ No newline at end of file +03E00008 From 6519be9a9eab1d8c2c89a4129e131c1814979411 Mon Sep 17 00:00:00 2001 From: theexecutor13 Date: Mon, 14 Dec 2020 23:59:08 +0800 Subject: [PATCH 7/9] Update reference.txt --- inputs/reference/reference.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/inputs/reference/reference.txt b/inputs/reference/reference.txt index ff067cb..2230764 100644 --- a/inputs/reference/reference.txt +++ b/inputs/reference/reference.txt @@ -196,8 +196,8 @@ JR $31 04900004 00000000 24420001 -00000000 00000008 +00000000 34020001 03E00008 From 26ccff50579bc71eab015f308cb7331c8408c66d Mon Sep 17 00:00:00 2001 From: Ibrahim Date: Tue, 15 Dec 2020 13:38:04 +0000 Subject: [PATCH 8/9] Merge branch 'jl7719' of https://github.com/supleed2/AM04_CPU into main --- inputs/reference/divquotient.txt | 5 ++ inputs/reference/divremainder.txt | 5 ++ inputs/reference/divuquotient | 5 ++ inputs/reference/divuremainder.txt | 5 ++ inputs/reference/ibrahimreference.txt | 72 ++++++++++++++++++++++----- inputs/reference/reference.txt | 6 +-- inputs/reference/sh.txt | 5 ++ inputs/sllv.txt | 4 +- inputs/srav.txt | 4 +- inputs/srlv.txt | 4 +- 10 files changed, 93 insertions(+), 22 deletions(-) create mode 100644 inputs/reference/divquotient.txt create mode 100644 inputs/reference/divremainder.txt create mode 100644 inputs/reference/divuquotient create mode 100644 inputs/reference/divuremainder.txt create mode 100644 inputs/reference/sh.txt diff --git a/inputs/reference/divquotient.txt b/inputs/reference/divquotient.txt new file mode 100644 index 0000000..e8a53e9 --- /dev/null +++ b/inputs/reference/divquotient.txt @@ -0,0 +1,5 @@ +34040004 +34050003 +0085001A +00001012 +00000008 \ No newline at end of file diff --git a/inputs/reference/divremainder.txt b/inputs/reference/divremainder.txt new file mode 100644 index 0000000..66e5dba --- /dev/null +++ b/inputs/reference/divremainder.txt @@ -0,0 +1,5 @@ +34040004 +34050003 +0085001A +00001010 +00000008 \ No newline at end of file diff --git a/inputs/reference/divuquotient b/inputs/reference/divuquotient new file mode 100644 index 0000000..e19a2cf --- /dev/null +++ b/inputs/reference/divuquotient @@ -0,0 +1,5 @@ +34040004 +34050003 +0085001B +00001012 +00000008 \ No newline at end of file diff --git a/inputs/reference/divuremainder.txt b/inputs/reference/divuremainder.txt new file mode 100644 index 0000000..5384638 --- /dev/null +++ b/inputs/reference/divuremainder.txt @@ -0,0 +1,5 @@ +34040004 +34050003 +0085001B +00001010 +00000008 \ No newline at end of file diff --git a/inputs/reference/ibrahimreference.txt b/inputs/reference/ibrahimreference.txt index ddcf491..695e603 100644 --- a/inputs/reference/ibrahimreference.txt +++ b/inputs/reference/ibrahimreference.txt @@ -111,8 +111,8 @@ register 0 = 3 34040002 34050010 -////// -////// +00851006 +00000008 =============== SRL Shift right logical ============== @@ -147,8 +147,8 @@ register 0 = -536870912 (first 3 bits high - rest low) 34040002 34050001 -//////// -/////// +00851007 +00000008 ====== SRA Shift right arithmetic ========== @@ -252,8 +252,8 @@ register 0 = 16 34040002 34050003 -////// -////// +00851004 +00000008 ======= SLL Shift left logical ====== @@ -445,37 +445,83 @@ $HI = 5 ==================== SH Store half-word ======= -///////// +lui $4, 3 +ori $5, $0, 3 +or $6, $4, $5 +sh $6, 1($1) +jr $0 + +3c040003 +34050003 +00853025 +A4260001 +00000008 -======== DIV Divide ====== +======== DIV Divide quotient ====== ori $4, $0, 4 ori $5, $0, 3 div $4, $5 +mflo $2 jr $0 -$LO = 1 -$HI = 1 +register v0 = 1 + 34040004 34050003 0085001A +00001012 00000008 -========= DIVU Divide unsigned ===== +======== DIV Divide remainder ====== + + +ori $4, $0, 4 +ori $5, $0, 3 +div $4, $5 +mfhi $2 +jr $0 + +register v0 = 1 + +34040004 +34050003 +0085001A +00001010 +00000008 + +========= DIVU Divide unsigned quotient ===== ori $4, $0, 4 ori $5, $0, 3 divu $4, $5 +mflo $2 jr $0 -$LO = 1 -$HI = 1 +register_vo = 1 34040004 34050003 0085001B +00001012 +00000008 + +========= DIVU Divide unsigned remainder ===== + +ori $4, $0, 4 +ori $5, $0, 3 +divu $4, $5 +mfhi $2 +jr $0 + +register_vo = 1 + +34040004 +34050003 +0085001B +00001010 00000008 \ No newline at end of file diff --git a/inputs/reference/reference.txt b/inputs/reference/reference.txt index 2230764..0bd130b 100644 --- a/inputs/reference/reference.txt +++ b/inputs/reference/reference.txt @@ -537,7 +537,7 @@ register_v0 = 0x12345678 //SLL Shift left logical -//SLLV Shift left logical variable ** +//SLLV Shift left logical variable //SLT Set on less than (signed) @@ -549,11 +549,11 @@ register_v0 = 0x12345678 //SRA Shift right arithmetic -//SRAV Shift right arithmetic** +//SRAV Shift right arithmetic //SRL Shift right logical -//SRLV Shift right logical variable** +//SRLV Shift right logical variable //SUBU Subtract unsigned diff --git a/inputs/reference/sh.txt b/inputs/reference/sh.txt new file mode 100644 index 0000000..50387ed --- /dev/null +++ b/inputs/reference/sh.txt @@ -0,0 +1,5 @@ +3c040003 +34050003 +00853025 +A4260001 +00000008 diff --git a/inputs/sllv.txt b/inputs/sllv.txt index 93c2eb4..89c4fdd 100644 --- a/inputs/sllv.txt +++ b/inputs/sllv.txt @@ -1,4 +1,4 @@ 34040002 34050003 -////// -////// \ No newline at end of file +00851004 +00000008 diff --git a/inputs/srav.txt b/inputs/srav.txt index bb14f29..cf23bc9 100644 --- a/inputs/srav.txt +++ b/inputs/srav.txt @@ -1,4 +1,4 @@ 34040002 34050001 -//////// -/////// \ No newline at end of file +00851007 +00000008 \ No newline at end of file diff --git a/inputs/srlv.txt b/inputs/srlv.txt index fa1b6a4..ae99941 100644 --- a/inputs/srlv.txt +++ b/inputs/srlv.txt @@ -1,4 +1,4 @@ 34040002 34050010 -////// -////// \ No newline at end of file +00851006 +00000008 \ No newline at end of file From adb4b5d6fd0aae5c000ef611dcc8578d60847cc7 Mon Sep 17 00:00:00 2001 From: Ibrahim Date: Tue, 15 Dec 2020 13:42:09 +0000 Subject: [PATCH 9/9] created seperate division testcases, fived srlv, sllu, srav & added sh (forgot this instruction previously) --- inputs/{reference => }/divquotient.txt | 0 inputs/{reference => }/divremainder.txt | 0 inputs/{reference => }/divuquotient | 0 inputs/{reference => }/divuremainder.txt | 0 inputs/reference/sh.txt | 5 ----- inputs/sh.txt | 5 +++++ 6 files changed, 5 insertions(+), 5 deletions(-) rename inputs/{reference => }/divquotient.txt (100%) rename inputs/{reference => }/divremainder.txt (100%) rename inputs/{reference => }/divuquotient (100%) rename inputs/{reference => }/divuremainder.txt (100%) delete mode 100644 inputs/reference/sh.txt diff --git a/inputs/reference/divquotient.txt b/inputs/divquotient.txt similarity index 100% rename from inputs/reference/divquotient.txt rename to inputs/divquotient.txt diff --git a/inputs/reference/divremainder.txt b/inputs/divremainder.txt similarity index 100% rename from inputs/reference/divremainder.txt rename to inputs/divremainder.txt diff --git a/inputs/reference/divuquotient b/inputs/divuquotient similarity index 100% rename from inputs/reference/divuquotient rename to inputs/divuquotient diff --git a/inputs/reference/divuremainder.txt b/inputs/divuremainder.txt similarity index 100% rename from inputs/reference/divuremainder.txt rename to inputs/divuremainder.txt diff --git a/inputs/reference/sh.txt b/inputs/reference/sh.txt deleted file mode 100644 index 50387ed..0000000 --- a/inputs/reference/sh.txt +++ /dev/null @@ -1,5 +0,0 @@ -3c040003 -34050003 -00853025 -A4260001 -00000008 diff --git a/inputs/sh.txt b/inputs/sh.txt index e69de29..50387ed 100644 --- a/inputs/sh.txt +++ b/inputs/sh.txt @@ -0,0 +1,5 @@ +3c040003 +34050003 +00853025 +A4260001 +00000008