supleed2/ELEC50010-IAC-CW
1
0
Fork 0
mirror of https://github.com/supleed2/ELEC50010-IAC-CW.git synced 2024-12-22 21:35:48 +00:00
Code Issues Packages Projects Releases Wiki Activity

Update reference.txt

Browse source
This commit is contained in:
theexecutor13 2020-12-17 19:44:23 +08:00 committed by GitHub
parent 6e626c5931
commit 15dfce09c9
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
1 changed files with 132 additions and 153 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

285
reference.txt
View file

@ -7,12 +7,12 @@ Reference Output
==ADDIU Add immediate unsigned (no overflow)== ==ADDIU Add immediate unsigned (no overflow)==
ORI $4,$0,0xA ORI $4,$0,0xA
ADDIU $2,$4,20
JR $0 JR $0
ADDIU $2,$4,20
3404000a 3404000a
24820014
00000008 00000008
24820014
register_v0 = 30 register_v0 = 30
@ -20,13 +20,13 @@ register_v0 = 30
ORI $4,$0,3 ORI $4,$0,3
ORI $5,$0,5 ORI $5,$0,5
ADDU $2,$4,$5
JR $0 JR $0
ADDU $2,$4,$5
34040003 34040003
34050005 34050005
00851021
00000008 00000008
00851021
register_v0 = 8 register_v0 = 8
@ -36,31 +36,31 @@ LUI $5,0xCCCC
ORI $5,$5,0xCCCC ORI $5,$5,0xCCCC
LUI $4,0xAAAA LUI $4,0xAAAA
ORI $4,$4,0xAAAA ORI $4,$4,0xAAAA
AND $2,$4,$5
JR $0 JR $0
AND $2,$4,$5
3c05cccc 3c05cccc
34A5cccc 34A5cccc
3c04aaaa 3c04aaaa
3484aaaa 3484aaaa
00851024
00000008 00000008
00851024
register_v0 = 0x88888888 register_v0 = 0x88888888 / 2290649224
==ANDI Bitwise and immediate== ==ANDI Bitwise and immediate==
LUI $4,0xAAAA LUI $4,0xAAAA
ORI $4,$0,0xAAAA ORI $4,$0,0xAAAA
ANDI $2,$4,0xCCCC
JR $0 JR $0
ANDI $2,$4,0xCCCC
3c04aaaa 3c04aaaa
3404aaaa 3404aaaa
3082cccc
00000008 00000008
3082cccc
register_v0 = 0x00008888 register_v0 = 0x00008888 / 34952
==BEQ Branch on equal== ==BEQ Branch on equal==
@ -104,22 +104,6 @@ JR $0
register_v0 = 1 register_v0 = 1
ORI $4,$0,3
BGEZ $4,3
NOP
ADDIU $2,$2,1
NOP
ADDIU $2,$2,5
JR $0
34040003
04810003
00000000
24420001
00000000
24420005
00000008
==BGEZAL Branch on non-negative (>=0) and link== ==BGEZAL Branch on non-negative (>=0) and link==
ORI $4,$0,3 ORI $4,$0,3
@ -284,7 +268,7 @@ JR $0
00851021 00851021
00000008 00000008
register_v0 = 0x40000000 register_v0 = 0x40000000 / 1073741824
==J Jump== ==J Jump==
@ -307,7 +291,7 @@ register_v0 = 1
==JALR Jump and link register== ==JALR Jump and link register==
LUI $5,0xBFC0 LUI $5,0xBFC0
ORI $5,$0,0x001C ORI $5,$5,0x001C
JALR $4,$5 JALR $4,$5
NOP NOP
ADDIU $2,$2,1 ADDIU $2,$2,1
@ -317,7 +301,7 @@ ORI $2,$0,1
JR $4 JR $4
3C05BCF0 3C05BCF0
3405001C 34A5001C
00A02009 00A02009
00000000 00000000
24420001 24420001
@ -371,78 +355,78 @@ register_v0 = 10
==LB Load byte== ==LB Load byte==
ORI $4,$0,0x1003 ORI $4,$0,0x1001
LB $2,3($4)
JR $0 JR $0
LB $2,5($4)
-Instruction Hex
34041001
00000008
80820005
-Memory Hex
00000000
008A0000
00000000
00000000
register_v0 = 0xFFFFFF8A / 4294967178
==LBU Load byte unsigned==
ORI $4,$0,0x1002
JR $0
LBU $2,4($4)
-Instruction Hex
34041002
00000008
90820004
-Memory Hex
00000000
008A0000
00000000
00000000
register_v0 = 0x0000008A / 138
==LH Load half-word==
ORI $4,$0,0x1000
JR $0
LH $2,4($4)
-Instruction Hex
34041003
00000008
84820004
-Memory Hex
00000000
00008123
00000000
00000000
register_v0 = 0xFFFF8123 / 4294934819
==LHU Load half-word unsigned==
ORI $4,$0,0x1000
JR $0
LHU $2,4($4)
-Instruction Hex -Instruction Hex
34041000 34041000
80820006
00000008 00000008
-Memory Hex
00000000
008A0000
00000000
00000000
register_v0 = 0xFFFFFF8A
==LBU Load byte unsigned==
ORI $4,$0,0x1003
LBU $2,3($4)
JR $0
-Instruction Hex
34041003
90820003
00000008
-Memory Hex
00000000
008A0000
00000000
00000000
register_v0 = 0x0000008A
==LH Load half-word==
ORI $4,$0,0x1003
LH $2,4($4)
JR $0
-Instruction Hex
34041003
84820004
00000008
-Memory Hex
00000000
00008123
00000000
00000000
register_v0 = 0xFFFF8123
==LHU Load half-word unsigned==
ORI $4,$0,0x1003
LHU $2,4($4)
JR $0
-Instruction Hex
34041003
94820004 94820004
00000008
-Memory Hex -Memory Hex
@ -451,7 +435,7 @@ JR $0
00000000 00000000
00000000 00000000
register_v0 = 0x00008123 register_v0 = 0x00008123 / 33059
==LUI Load upper immediate== ==LUI Load upper immediate==
@ -463,19 +447,19 @@ JR $0
34425678 34425678
00000008 00000008
register_v0 = 0x12345678 register_v0 = 0x12345678 / 305419896
==LW Load word== ==LW Load word==
ORI $4,$0,0x1002 ORI $4,$0,0x1002
LW $2, 2($4)
JR $0 JR $0
LW $2, 2($4)
-Instruction Hex -Instruction Hex
34041002 34041002
8C820002
00000008 00000008
8C820002
-Memory Hex -Memory Hex
@ -484,21 +468,21 @@ JR $0
00000000 00000000
00000000 00000000
register_v0 = 0x12345678 register_v0 = 0x12345678 / 305419896
==LWL Load word left== ==LWL Load word left==
ORI $4,$0,0x1001 ORI $4,$0,0x1001
ORI $2,$0,0x5678 ORI $2,$0,0x5678
LWL $2,3($4)
JR $0 JR $0
LWL $2,3($4)
-Instruction Hex -Instruction Hex
34041001 34041001
34025678 34025678
88820003
00000008 00000008
88820003
-Memory Hex -Memory Hex
@ -507,21 +491,21 @@ AAAA1234
00000000 00000000
00000000 00000000
register_v0 = 0x12345678 register_v0 = 0x12345678 / 305419896
==LWR Load word right== ==LWR Load word right==
LUI $2,0x1234 LUI $2,0x1234
ORI $4,$0,0x1002 ORI $4,$0,0x1002
LWR $2,3($4)
JR $0 JR $0
LWR $2,3($4)
-Instruction Hex -Instruction Hex
3C021234 3C021234
34041002 34041002
98820003
00000008 00000008
98820003
-Memory Hex -Memory Hex
@ -530,7 +514,7 @@ JR $0
00000000 00000000
00000000 00000000
register_v0 = 0x12345678 register_v0 = 0x12345678 / 305419896
==MTHI Move to HI== ==MTHI Move to HI==
@ -596,33 +580,27 @@ register_v0 = 12
ori $4, $0, 5 ori $4, $0, 5
ori $5, $0, 3 ori $5, $0, 3
or $2, $4, $5
jr $0 jr $0
or $2, $4, $5
34040005 34040005
34050003 34050003
00851025
00000008 00000008
00851025
register_v0 = 7 register_v0 = 7
==ORI Bitwise or immediate== ==ORI Bitwise or immediate==
ori $2, $0, 3
ori $2, $2, 5
jr $0
34020003
00000008
34420005
register_v0 = 7
ori $4, $0, 0xFFFF ori $4, $0, 0xFFFF
ori $5, $0, 0x1234 ori $5, $0, 0x1234
or $2, $4, $5
jr $0 jr $0
or $2, $4, $5
3404FFFF
34051234
00851025
00000008
register_v0 = 65535 register_v0 = 65535
@ -669,12 +647,13 @@ register_v0 = 0x00005678
==SLL Shift left logical== ==SLL Shift left logical==
ori $4,$0,3 ori $4,$0,3
sll $2,$4,2
jr $0 jr $0
sll $2,$4,2
34040003 34040003
00041080
00000008 00000008
00041080
register_v0 = 12 register_v0 = 12
@ -682,13 +661,13 @@ register_v0 = 12
ori $4,$0,2 ori $4,$0,2
ori $5,$0,3 ori $5,$0,3
sllv $2,$5,$4
jr $0 jr $0
sllv $2,$5,$4
34040002 34040002
34050003 34050003
00851004
00000008 00000008
00851004
register_v0 = 12 register_v0 = 12
@ -696,37 +675,37 @@ register_v0 = 12
ORI $4 $zero 0xFFFF ORI $4 $zero 0xFFFF
ORI $5 $zero 0x000B ORI $5 $zero 0x000B
SLT $2 $4 $5
jr $0 jr $0
SLT $2 $4 $5
3404FFFF 3404FFFF
3405000B 3405000B
0085102A
00000008 00000008
0085102A
register_v0 = 0 register_v0 = 0
==SLTI Set on less than immediate (signed)== ==SLTI Set on less than immediate (signed)==
ori $4, $0, 10 ori $4, $0, 10
slti $2, $4, 9
jr $0 jr $0
slti $2, $4, 9
3404000a 3404000a
28820009
00000008 00000008
28820009
register_v0 = 0 register_v0 = 0
==SLTIU Set on less than immediate unsigned== ==SLTIU Set on less than immediate unsigned==
ori $4, $0, 10 ori $4, $0, 10
sltiu $2, $4, 9
jr $0 jr $0
sltiu $2, $4, 9
3404000a 3404000a
2c820009
00000008 00000008
2c820009
register_v0 = 0 register_v0 = 0
@ -734,53 +713,51 @@ register_v0 = 0
ori $4, $0, 10 ori $4, $0, 10
ori $5, $0, 9 ori $5, $0, 9
sltu $2, $4, $5
jr $0 jr $0
sltu $2, $4, $5
3404000a 3404000a
34050009 34050009
0085102b
00000008 00000008
0085102b
register_v0 = 0 register_v0 = 0
==SRA Shift right arithmetic== ==SRA Shift right arithmetic==
lui $5 $0,0xF000 lui $5 $0,0xF000
jr $0
srav $2,$5,2 srav $2,$5,2
jr $0
3C05F000 3C05F000
00051083
00000008 00000008
00051083
register_v0 = 0xFC000000 register_v0 = 0xFC000000 / 4227858432
==SRAV Shift right arithmetic variable== ==SRAV Shift right arithmetic variable==
ori $4,$0,2 ori $4,$0,2
lui $5, 0xF000 lui $5, 0xF000
jr $0
srav $2,$5,$4 srav $2,$5,$4
jr $0
F000000 -> FC000000 34040002
34040004
3C05F000 3C05F000
00851007
00000008 00000008
00851007
register_v0 = 0xFC000000 register_v0 = 0xFC000000 / 4227858432
==SRL Shift right logical== ==SRL Shift right logical==
ori $4,$0,16 ori $4,$0,16
srl $2,$4,2
jr $0 jr $0
srl $2,$4,2
34040010 34040010
00041082
00000008 00000008
00041082
register_v0 = 4 register_v0 = 4
@ -788,13 +765,13 @@ register_v0 = 4
ori $4,$0,2 ori $4,$0,2
ori $5,$0,16 ori $5,$0,16
srlv $2,$5,$4
jr $0 jr $0
srlv $2,$5,$4
34040002 34040002
34050010 34050010
00851006
00000008 00000008
00851006
register_v0 = 4 register_v0 = 4
@ -802,13 +779,13 @@ register_v0 = 4
ori $4,$0,5 ori $4,$0,5
ori $5,$0,3 ori $5,$0,3
subu $2,$4,$5
jr $0 jr $0
subu $2,$4,$5
34040005 34040005
34050003 34050003
00851023
00000008 00000008
00851023
register_v0 = 2 register_v0 = 2
@ -826,7 +803,9 @@ ACA40004
8CA20004 8CA20004
00000008 00000008
register_v0 = 0x0000FFFF register_v0 = 0x0000FFFF / 65535
-Negative Offset
ori $4, $0, 0xFFFF ori $4, $0, 0xFFFF
ori $5, $0, 0x1008 ori $5, $0, 0x1008
@ -840,30 +819,30 @@ ACA4FFFC
8CA2FFFC 8CA2FFFC
00000008 00000008
register_v0 = 0x0000FFFF register_v0 = 0x0000FFFF / 65535
==XOR Bitwise exclusive or== ==XOR Bitwise exclusive or==
ori $4, $0, 5 ori $4, $0, 5
ori $5, $0, 2 ori $5, $0, 2
xor $2, $4, $5
jr $0 jr $0
xor $2, $4, $5
34040005 34040005
34050002 34050002
00851026
00000008 00000008
00851026
register_v0 = 7 register_v0 = 7
==XORI Bitwise exclusive or immediate== ==XORI Bitwise exclusive or immediate==
ori $4,$0,5 ori $4,$0,5
xori $2,$4,0x000F
jr $0 jr $0
xori $2,$4,0x000F
34040005 34040005
3882000F
00000008 00000008
3882000F
register_v0 = 10 register_v0 = 10