From 14ad7fa0ce4619aa73a9697fd24cf73622a162f3 Mon Sep 17 00:00:00 2001 From: jl7719 Date: Sat, 12 Dec 2020 15:59:14 +0900 Subject: [PATCH] Update program counter Logic for instructions with linking not implemented. Can do basic branch delay slots. More left to do with return register --- .gitignore | 4 + MIPS.txt | 60 - exec/mips_cpu_harvard_tb_add | 2738 ------------------------------- exec/mips_cpu_harvard_tb_addiu | 2774 -------------------------------- exec/mips_cpu_harvard_tb_addu | 2738 ------------------------------- exec/mips_cpu_harvard_tb_and | 2738 ------------------------------- exec/mips_cpu_harvard_tb_andi | 2738 ------------------------------- exec/mips_cpu_harvard_tb_andiu | 2738 ------------------------------- exec/mips_cpu_harvard_tb_cori | 2724 ------------------------------- exec/mips_cpu_harvard_tb_o | 2738 ------------------------------- exec/mips_cpu_harvard_tb_or | 2738 ------------------------------- exec/mips_cpu_harvard_tb_ori | 2738 ------------------------------- exec/mips_cpu_harvard_tb_sll | 2738 ------------------------------- exec/mips_cpu_harvard_tb_slti | 2738 ------------------------------- exec/mips_cpu_harvard_tb_sltiu | 2738 ------------------------------- exec/mips_cpu_harvard_tb_sltu | 2738 ------------------------------- exec/mips_cpu_harvard_tb_sra | 2738 ------------------------------- exec/mips_cpu_harvard_tb_srl | 2738 ------------------------------- exec/mips_cpu_harvard_tb_subu | 2738 ------------------------------- exec/mips_cpu_harvard_tb_xor | 2738 ------------------------------- exec/mips_cpu_harvard_tb_xori | 2738 ------------------------------- exec/mips_cpu_harvard_tb_xxor | 2731 ------------------------------- inputs/add.log.txt | 288 ---- inputs/add.out.txt | 1 - inputs/addiu.log.txt | 181 --- inputs/addiu.out.txt | 1 - inputs/addu.log.txt | 125 -- inputs/addu.out.txt | 1 - inputs/and.log.txt | 123 -- inputs/and.out.txt | 1 - inputs/andi.log.txt | 113 -- inputs/andi.out.txt | 1 - inputs/andiu.log.txt | 288 ---- inputs/andiu.out.txt | 1 - inputs/beq.ref.txt | 1 + inputs/beq.txt | 15 +- inputs/bgez.ref.txt | 1 + inputs/bgez.txt | 13 +- inputs/bgezal.ref.txt | 1 + inputs/bgezal.txt | 15 +- inputs/bgtz.ref.txt | 1 + inputs/bgtz.txt | 13 +- inputs/blez.ref.txt | 1 + inputs/blez.txt | 13 +- inputs/bltz.ref.txt | 1 + inputs/bltz.txt | 13 +- inputs/bltzal.ref.txt | 1 + inputs/bltzal.txt | 15 +- inputs/bne.ref.txt | 1 + inputs/bne.txt | 15 +- inputs/bqtz.ref.txt | 1 + rtl/mips_cpu_harvard.v | 18 +- rtl/mips_cpu_pc.v | 51 +- test/test_mips_cpu_custom.sh | 41 +- test/test_mips_cpu_harvard.sh | 2 +- 55 files changed, 141 insertions(+), 56055 deletions(-) create mode 100644 .gitignore delete mode 100644 MIPS.txt delete mode 100644 exec/mips_cpu_harvard_tb_add delete mode 100644 exec/mips_cpu_harvard_tb_addiu delete mode 100644 exec/mips_cpu_harvard_tb_addu delete mode 100644 exec/mips_cpu_harvard_tb_and delete mode 100644 exec/mips_cpu_harvard_tb_andi delete mode 100644 exec/mips_cpu_harvard_tb_andiu delete mode 100644 exec/mips_cpu_harvard_tb_cori delete mode 100644 exec/mips_cpu_harvard_tb_o delete mode 100644 exec/mips_cpu_harvard_tb_or delete mode 100644 exec/mips_cpu_harvard_tb_ori delete mode 100644 exec/mips_cpu_harvard_tb_sll delete mode 100644 exec/mips_cpu_harvard_tb_slti delete mode 100644 exec/mips_cpu_harvard_tb_sltiu delete mode 100644 exec/mips_cpu_harvard_tb_sltu delete mode 100644 exec/mips_cpu_harvard_tb_sra delete mode 100644 exec/mips_cpu_harvard_tb_srl delete mode 100644 exec/mips_cpu_harvard_tb_subu delete mode 100644 exec/mips_cpu_harvard_tb_xor delete mode 100644 exec/mips_cpu_harvard_tb_xori delete mode 100644 exec/mips_cpu_harvard_tb_xxor delete mode 100644 inputs/add.log.txt delete mode 100644 inputs/add.out.txt delete mode 100644 inputs/addiu.log.txt delete mode 100644 inputs/addiu.out.txt delete mode 100644 inputs/addu.log.txt delete mode 100644 inputs/addu.out.txt delete mode 100644 inputs/and.log.txt delete mode 100644 inputs/and.out.txt delete mode 100644 inputs/andi.log.txt delete mode 100644 inputs/andi.out.txt delete mode 100644 inputs/andiu.log.txt delete mode 100644 inputs/andiu.out.txt create mode 100644 inputs/beq.ref.txt create mode 100644 inputs/bgez.ref.txt create mode 100644 inputs/bgezal.ref.txt create mode 100644 inputs/bgtz.ref.txt create mode 100644 inputs/blez.ref.txt create mode 100644 inputs/bltz.ref.txt create mode 100644 inputs/bltzal.ref.txt create mode 100644 inputs/bne.ref.txt create mode 100644 inputs/bqtz.ref.txt diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..6d3b2db --- /dev/null +++ b/.gitignore @@ -0,0 +1,4 @@ +exec/* +inputs/*.log.txt +inputs/*.out.txt +mips_cpu_harvard.vcd \ No newline at end of file diff --git a/MIPS.txt b/MIPS.txt deleted file mode 100644 index 5b0b3d7..0000000 --- a/MIPS.txt +++ /dev/null @@ -1,60 +0,0 @@ -MIPS 32 bits - -== Bits, Bytes, Hex == --- 8 bits = 1 byte = 2 hex --- 32 bits = 4 bytes = 8 hex --- e.g. 00000000 00000000 00000000 00000000 -> 0x00000000 - -== CPU == -inputs: --- manual MIPS assembly code -> instructions in binaries --- C code -> compiled c program under mips -> disassemble binaries -> assembly code -> instruction in binaries --- these binary instructions goes into instruction memory -outputs: --- output of the instructions -errors: --- ?????? how do we detect errors ?????? - -== Submodules == --- ALU --- Register File --- Data Memory --- Instruction Register --- PC --- Control Unit - -== Testbench == --- ????? not so sure yet ????? - -== Endianess == --- big endian: bytes are numbered starting with byte 0 at MSB --- use -EB flag to ensure big endian - -== Instruction Access == --- PC (program counter): 32 bit register --- PC is initialised to 0xBFC00000 --- PC changed as instructions are executed --- IR = Mem[PC] -> instruction is fetched from data memory using data at the address given by program counter - -Address bus: CPU -> Memory -Data bus: CPU <=> Memory - -== Register File == --- 32 general-purpose registers - -== Program Counter == --- PC is just a 32 bit register in which the value (address of instruction) get updated by other blocks --- Controlled by PCSrc (for branching or regular increment by 4 bytes) - -== Questions == -Pseudo-instructions -> how to deal with them -> convert to actual instructions? -Do we implement big-endian mips? -What verilator could be useful for -How would a testbench in c++ be helpful? -Don't understand that part where we need to implement cache - -== Todo == -Testbench in c++ -Cache -CPU stall cycle - diff --git a/exec/mips_cpu_harvard_tb_add b/exec/mips_cpu_harvard_tb_add deleted file mode 100644 index 0289451..0000000 --- a/exec/mips_cpu_harvard_tb_add +++ /dev/null @@ -1,2738 +0,0 @@ -#! /usr/local/iverilog/bin/vvp -:ivl_version "11.0 (devel)"; -:ivl_delay_selection "TYPICAL"; -:vpi_time_precision + 0; -:vpi_module "C:\iverilog\lib\ivl\system.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_sys.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_textio.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2005_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\va_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2009.vpi"; -S_00000000010ac010 .scope package, "$unit" "$unit" 2 1; - .timescale 0 0; -S_00000000010aa580 .scope module, "mips_cpu_harvard_tb" "mips_cpu_harvard_tb" 3 1; - .timescale 0 0; -P_0000000001073b70 .param/str "RAM_INIT_FILE" 0 3 3, "inputs/add.txt"; -P_0000000001073ba8 .param/l "TIMEOUT_CYCLES" 0 3 4, +C4<00000000000000000000000001100100>; -v00000000011057c0_0 .net "active", 0 0, v00000000010a9f60_0; 1 drivers -v0000000001104be0_0 .var "clk", 0 0; -v0000000001104b40_0 .var "clk_enable", 0 0; -v0000000001105900_0 .net "data_address", 31 0, v00000000010a8980_0; 1 drivers -v00000000011061c0_0 .net "data_read", 0 0, v00000000010a8a20_0; 1 drivers -v0000000001106580_0 .net "data_readdata", 31 0, L_0000000001104fa0; 1 drivers -v0000000001105f40_0 .net "data_write", 0 0, v00000000010a8c00_0; 1 drivers -v0000000001106440_0 .net "data_writedata", 31 0, v00000000010a8ca0_0; 1 drivers -v0000000001106080_0 .net "instr_address", 31 0, v00000000011042f0_0; 1 drivers -v0000000001106120_0 .net "instr_readdata", 31 0, L_0000000001106300; 1 drivers -v0000000001106760_0 .net "register_v0", 31 0, L_000000000109b8c0; 1 drivers -v0000000001106800_0 .var "reset", 0 0; -S_00000000010ab580 .scope module, "cpuInst" "mips_cpu_harvard" 3 19, 4 1 0, S_00000000010aa580; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "reset"; - .port_info 2 /OUTPUT 1 "active"; - .port_info 3 /OUTPUT 32 "register_v0"; - .port_info 4 /INPUT 1 "clk_enable"; - .port_info 5 /OUTPUT 32 "instr_address"; - .port_info 6 /INPUT 32 "instr_readdata"; - .port_info 7 /OUTPUT 32 "data_address"; - .port_info 8 /OUTPUT 1 "data_write"; - .port_info 9 /OUTPUT 1 "data_read"; - .port_info 10 /OUTPUT 32 "data_writedata"; - .port_info 11 /INPUT 32 "data_readdata"; -v00000000010a8700_0 .net "active", 0 0, v00000000010a9f60_0; alias, 1 drivers -v00000000010a8840_0 .net "clk", 0 0, v0000000001104be0_0; 1 drivers -v00000000010a88e0_0 .net "clk_enable", 0 0, v0000000001104b40_0; 1 drivers -v00000000010a8980_0 .var "data_address", 31 0; -v00000000010a8a20_0 .var "data_read", 0 0; -v00000000010a8b60_0 .net "data_readdata", 31 0, L_0000000001104fa0; alias, 1 drivers -v00000000010a8c00_0 .var "data_write", 0 0; -v00000000010a8ca0_0 .var "data_writedata", 31 0; -v00000000010194d0_0 .var "in_B", 31 0; -v0000000001103ad0_0 .net "in_opcode", 5 0, L_0000000001104f00; 1 drivers -v0000000001104430_0 .net "in_pc_in", 31 0, v00000000010a94c0_0; 1 drivers -v0000000001103b70_0 .net "in_readreg1", 4 0, L_00000000011066c0; 1 drivers -v00000000011044d0_0 .net "in_readreg2", 4 0, L_0000000001104e60; 1 drivers -v0000000001103f30_0 .var "in_writedata", 31 0; -v0000000001103990_0 .var "in_writereg", 4 0; -v00000000011042f0_0 .var "instr_address", 31 0; -v00000000011032b0_0 .net "instr_readdata", 31 0, L_0000000001106300; alias, 1 drivers -v00000000011038f0_0 .net "out_ALUCond", 0 0, v00000000010a9600_0; 1 drivers -v0000000001103cb0_0 .net "out_ALUOp", 4 0, v00000000010aa460_0; 1 drivers -v0000000001104610_0 .net "out_ALURes", 31 0, v00000000010a9ba0_0; 1 drivers -v00000000011030d0_0 .net "out_ALUSrc", 0 0, v00000000010aa1e0_0; 1 drivers -v00000000011035d0_0 .net "out_MemRead", 0 0, v00000000010aa0a0_0; 1 drivers -v0000000001102b30_0 .net "out_MemWrite", 0 0, v00000000010aa140_0; 1 drivers -v0000000001103710_0 .net "out_MemtoReg", 1 0, v00000000010a9240_0; 1 drivers -v0000000001104070_0 .net "out_PC", 1 0, v00000000010a97e0_0; 1 drivers -v00000000011046b0_0 .net "out_RegDst", 1 0, v00000000010a91a0_0; 1 drivers -v0000000001103fd0_0 .net "out_RegWrite", 0 0, v00000000010a96a0_0; 1 drivers -v0000000001104570_0 .var "out_pc_out", 31 0; -v0000000001103a30_0 .net "out_readdata1", 31 0, v00000000010a9560_0; 1 drivers -v00000000011047f0_0 .net "out_readdata2", 31 0, v00000000010a9ce0_0; 1 drivers -v0000000001103e90_0 .net "out_shamt", 4 0, v00000000010a9880_0; 1 drivers -v0000000001103210_0 .net "register_v0", 31 0, L_000000000109b8c0; alias, 1 drivers -v0000000001104750_0 .net "reset", 0 0, v0000000001106800_0; 1 drivers -E_0000000001086b80/0 .event edge, v00000000010a91a0_0, v00000000010a8e80_0, v00000000010a8e80_0, v00000000010a9240_0; -E_0000000001086b80/1 .event edge, v00000000010a9ba0_0, v00000000010a8b60_0, v00000000010a8de0_0, v00000000010aa1e0_0; -E_0000000001086b80/2 .event edge, v00000000010a8e80_0, v00000000010a8e80_0, v00000000010a9ce0_0; -E_0000000001086b80 .event/or E_0000000001086b80/0, E_0000000001086b80/1, E_0000000001086b80/2; -E_0000000001086400/0 .event edge, v00000000010a94c0_0, v00000000010a9ba0_0, v00000000010aa140_0, v00000000010aa0a0_0; -E_0000000001086400/1 .event edge, v00000000010a9ce0_0; -E_0000000001086400 .event/or E_0000000001086400/0, E_0000000001086400/1; -L_00000000011066c0 .part L_0000000001106300, 21, 5; -L_0000000001104e60 .part L_0000000001106300, 16, 5; -L_0000000001104f00 .part L_0000000001106300, 26, 6; -S_00000000010ab710 .scope module, "alu" "mips_cpu_alu" 4 121, 5 1 0, S_00000000010ab580; - .timescale 0 0; - .port_info 0 /INPUT 32 "A"; - .port_info 1 /INPUT 32 "B"; - .port_info 2 /INPUT 5 "ALUOp"; - .port_info 3 /INPUT 5 "shamt"; - .port_info 4 /OUTPUT 1 "ALUCond"; - .port_info 5 /OUTPUT 32 "ALURes"; -enum0000000000f8bd00 .enum4 (5) - "ADD" 5'b00000, - "SUB" 5'b00001, - "MUL" 5'b00010, - "DIV" 5'b00011, - "AND" 5'b00100, - "OR" 5'b00101, - "XOR" 5'b00110, - "SLL" 5'b00111, - "SLLV" 5'b01000, - "SRL" 5'b01001, - "SRLV" 5'b01010, - "SRA" 5'b01011, - "SRAV" 5'b01100, - "EQ" 5'b01101, - "LES" 5'b01110, - "LEQ" 5'b01111, - "GRT" 5'b10000, - "GEQ" 5'b10001, - "NEQ" 5'b10010, - "PAS" 5'b10011, - "SLT" 5'b10100, - "SLTU" 5'b10101, - "MULU" 5'b10110, - "DIVU" 5'b10111 - ; -L_000000000109baf0 .functor BUFZ 5, v00000000010aa460_0, C4<00000>, C4<00000>, C4<00000>; -v00000000010a8fc0_0 .net "A", 31 0, v00000000010a9560_0; alias, 1 drivers -v00000000010a9600_0 .var "ALUCond", 0 0; -v00000000010a9a60_0 .net "ALUOp", 4 0, v00000000010aa460_0; alias, 1 drivers -v00000000010a8f20_0 .net "ALUOps", 4 0, L_000000000109baf0; 1 drivers -v00000000010a9ba0_0 .var/s "ALURes", 31 0; -v00000000010a8ac0_0 .net "B", 31 0, v00000000010194d0_0; 1 drivers -v00000000010a9740_0 .net "shamt", 4 0, v00000000010a9880_0; alias, 1 drivers -E_0000000001081200 .event edge, v00000000010a8f20_0, v00000000010a8fc0_0, v00000000010a8ac0_0, v00000000010a9740_0; -S_0000000001049390 .scope module, "control" "mips_cpu_control" 4 90, 6 1 0, S_00000000010ab580; - .timescale 0 0; - .port_info 0 /INPUT 32 "Instr"; - .port_info 1 /INPUT 1 "ALUCond"; - .port_info 2 /OUTPUT 2 "CtrlRegDst"; - .port_info 3 /OUTPUT 2 "CtrlPC"; - .port_info 4 /OUTPUT 1 "CtrlMemRead"; - .port_info 5 /OUTPUT 2 "CtrlMemtoReg"; - .port_info 6 /OUTPUT 5 "CtrlALUOp"; - .port_info 7 /OUTPUT 5 "Ctrlshamt"; - .port_info 8 /OUTPUT 1 "CtrlMemWrite"; - .port_info 9 /OUTPUT 1 "CtrlALUSrc"; - .port_info 10 /OUTPUT 1 "CtrlRegWrite"; -enum0000000000f89270 .enum4 (5) - "BLTZ" 5'b00000, - "BGEZ" 5'b00001, - "BLTZAL" 5'b10000, - "BGEZAL" 5'b10001 - ; -enum0000000000f89730 .enum4 (6) - "SPECIAL" 6'b000000, - "REGIMM" 6'b000001, - "J" 6'b000010, - "JAL" 6'b000011, - "BEQ" 6'b000100, - "BNE" 6'b000101, - "BLEZ" 6'b000110, - "BGTZ" 6'b000111, - "ADDI" 6'b001000, - "ADDIU" 6'b001001, - "SLTI" 6'b001010, - "SLTIU" 6'b001011, - "ANDI" 6'b001100, - "ORI" 6'b001101, - "XORI" 6'b001110, - "LUI" 6'b001111, - "LB" 6'b100000, - "LH" 6'b100001, - "LWL" 6'b100010, - "LW" 6'b100011, - "LBU" 6'b100100, - "LHU" 6'b100101, - "LWR" 6'b100110, - "SB" 6'b101000, - "SH" 6'b101001, - "SW" 6'b101011 - ; -enum0000000000f8b7f0 .enum4 (6) - "SLL" 6'b000000, - "SRL" 6'b000010, - "SRA" 6'b000011, - "SLLV" 6'b000100, - "SRLV" 6'b000110, - "SRAV" 6'b000111, - "JR" 6'b001000, - "JALR" 6'b001001, - "MTHI" 6'b010001, - "MTLO" 6'b010011, - "MULT" 6'b011000, - "MULTU" 6'b011001, - "DIV" 6'b011010, - "DIVU" 6'b011011, - "ADDU" 6'b100001, - "SUBU" 6'b100011, - "AND" 6'b100100, - "OR" 6'b100101, - "XOR" 6'b100110, - "SLT" 6'b101010, - "SLTU" 6'b101011 - ; -v00000000010aa3c0_0 .net "ALUCond", 0 0, v00000000010a9600_0; alias, 1 drivers -v00000000010aa460_0 .var "CtrlALUOp", 4 0; -v00000000010aa1e0_0 .var "CtrlALUSrc", 0 0; -v00000000010aa0a0_0 .var "CtrlMemRead", 0 0; -v00000000010aa140_0 .var "CtrlMemWrite", 0 0; -v00000000010a9240_0 .var "CtrlMemtoReg", 1 0; -v00000000010a97e0_0 .var "CtrlPC", 1 0; -v00000000010a91a0_0 .var "CtrlRegDst", 1 0; -v00000000010a96a0_0 .var "CtrlRegWrite", 0 0; -v00000000010a9880_0 .var "Ctrlshamt", 4 0; -v00000000010a8e80_0 .net "Instr", 31 0, L_0000000001106300; alias, 1 drivers -v00000000010a9920_0 .net "funct", 5 0, L_00000000011063a0; 1 drivers -v00000000010a92e0_0 .net "op", 5 0, L_00000000011050e0; 1 drivers -v00000000010a99c0_0 .net "rt", 4 0, L_00000000011064e0; 1 drivers -E_0000000001087700/0 .event edge, v00000000010a92e0_0, v00000000010a9920_0, v00000000010a9600_0, v00000000010a99c0_0; -E_0000000001087700/1 .event edge, v00000000010a8e80_0; -E_0000000001087700 .event/or E_0000000001087700/0, E_0000000001087700/1; -L_00000000011050e0 .part L_0000000001106300, 26, 6; -L_00000000011063a0 .part L_0000000001106300, 0, 6; -L_00000000011064e0 .part L_0000000001106300, 16, 5; -S_0000000001049520 .scope module, "pc" "pc" 4 79, 7 1 0, S_00000000010ab580; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "rst"; - .port_info 2 /INPUT 2 "pc_ctrl"; - .port_info 3 /INPUT 32 "pc_in"; - .port_info 4 /INPUT 5 "rs"; - .port_info 5 /OUTPUT 32 "pc_out"; - .port_info 6 /OUTPUT 1 "active"; -v00000000010a9f60_0 .var "active", 0 0; -v00000000010a9b00_0 .net "clk", 0 0, v0000000001104be0_0; alias, 1 drivers -v00000000010a9420_0 .net "pc_ctrl", 1 0, v00000000010a97e0_0; alias, 1 drivers -v00000000010a8d40_0 .var "pc_curr", 31 0; -v00000000010a8de0_0 .net "pc_in", 31 0, v0000000001104570_0; 1 drivers -v00000000010a94c0_0 .var "pc_out", 31 0; -o00000000010ad1d8 .functor BUFZ 5, C4; HiZ drive -v00000000010a9c40_0 .net "rs", 4 0, o00000000010ad1d8; 0 drivers -v00000000010aa000_0 .net "rst", 0 0, v0000000001106800_0; alias, 1 drivers -E_0000000001081300 .event posedge, v00000000010a9b00_0; -S_00000000010496b0 .scope module, "regfile" "mips_cpu_regfile" 4 106, 8 1 0, S_00000000010ab580; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 5 "readreg1"; - .port_info 2 /INPUT 5 "readreg2"; - .port_info 3 /INPUT 5 "writereg"; - .port_info 4 /INPUT 32 "writedata"; - .port_info 5 /INPUT 1 "regwrite"; - .port_info 6 /INPUT 6 "opcode"; - .port_info 7 /OUTPUT 32 "readdata1"; - .port_info 8 /OUTPUT 32 "readdata2"; - .port_info 9 /OUTPUT 32 "regv0"; -v00000000010a9380_2 .array/port v00000000010a9380, 2; -L_000000000109b8c0 .functor BUFZ 32, v00000000010a9380_2, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; -v00000000010a9060_0 .net "clk", 0 0, v0000000001104be0_0; alias, 1 drivers -v00000000010a9380 .array "memory", 0 31, 31 0; -v00000000010aa320_0 .net "opcode", 5 0, L_0000000001104f00; alias, 1 drivers -v00000000010a9560_0 .var "readdata1", 31 0; -v00000000010a9ce0_0 .var "readdata2", 31 0; -v00000000010a9d80_0 .net "readreg1", 4 0, L_00000000011066c0; alias, 1 drivers -v00000000010a9100_0 .net "readreg2", 4 0, L_0000000001104e60; alias, 1 drivers -v00000000010a9e20_0 .net "regv0", 31 0, L_000000000109b8c0; alias, 1 drivers -v00000000010a9ec0_0 .net "regwrite", 0 0, v00000000010a96a0_0; alias, 1 drivers -v00000000010a85c0_0 .net "writedata", 31 0, v0000000001103f30_0; 1 drivers -v00000000010a8660_0 .net "writereg", 4 0, v0000000001103990_0; 1 drivers -E_0000000001080540 .event negedge, v00000000010a9b00_0; -v00000000010a9380_0 .array/port v00000000010a9380, 0; -v00000000010a9380_1 .array/port v00000000010a9380, 1; -E_0000000001081340/0 .event edge, v00000000010a9d80_0, v00000000010a9380_0, v00000000010a9380_1, v00000000010a9380_2; -v00000000010a9380_3 .array/port v00000000010a9380, 3; -v00000000010a9380_4 .array/port v00000000010a9380, 4; -v00000000010a9380_5 .array/port v00000000010a9380, 5; -v00000000010a9380_6 .array/port v00000000010a9380, 6; -E_0000000001081340/1 .event edge, v00000000010a9380_3, v00000000010a9380_4, v00000000010a9380_5, v00000000010a9380_6; -v00000000010a9380_7 .array/port v00000000010a9380, 7; -v00000000010a9380_8 .array/port v00000000010a9380, 8; -v00000000010a9380_9 .array/port v00000000010a9380, 9; -v00000000010a9380_10 .array/port v00000000010a9380, 10; -E_0000000001081340/2 .event edge, v00000000010a9380_7, v00000000010a9380_8, v00000000010a9380_9, v00000000010a9380_10; -v00000000010a9380_11 .array/port v00000000010a9380, 11; -v00000000010a9380_12 .array/port v00000000010a9380, 12; -v00000000010a9380_13 .array/port v00000000010a9380, 13; -v00000000010a9380_14 .array/port v00000000010a9380, 14; -E_0000000001081340/3 .event edge, v00000000010a9380_11, v00000000010a9380_12, v00000000010a9380_13, v00000000010a9380_14; -v00000000010a9380_15 .array/port v00000000010a9380, 15; -v00000000010a9380_16 .array/port v00000000010a9380, 16; -v00000000010a9380_17 .array/port v00000000010a9380, 17; -v00000000010a9380_18 .array/port v00000000010a9380, 18; -E_0000000001081340/4 .event edge, v00000000010a9380_15, v00000000010a9380_16, v00000000010a9380_17, v00000000010a9380_18; -v00000000010a9380_19 .array/port v00000000010a9380, 19; -v00000000010a9380_20 .array/port v00000000010a9380, 20; -v00000000010a9380_21 .array/port v00000000010a9380, 21; -v00000000010a9380_22 .array/port v00000000010a9380, 22; -E_0000000001081340/5 .event edge, v00000000010a9380_19, v00000000010a9380_20, v00000000010a9380_21, v00000000010a9380_22; -v00000000010a9380_23 .array/port v00000000010a9380, 23; -v00000000010a9380_24 .array/port v00000000010a9380, 24; -v00000000010a9380_25 .array/port v00000000010a9380, 25; -v00000000010a9380_26 .array/port v00000000010a9380, 26; -E_0000000001081340/6 .event edge, v00000000010a9380_23, v00000000010a9380_24, v00000000010a9380_25, v00000000010a9380_26; -v00000000010a9380_27 .array/port v00000000010a9380, 27; -v00000000010a9380_28 .array/port v00000000010a9380, 28; -v00000000010a9380_29 .array/port v00000000010a9380, 29; -v00000000010a9380_30 .array/port v00000000010a9380, 30; -E_0000000001081340/7 .event edge, v00000000010a9380_27, v00000000010a9380_28, v00000000010a9380_29, v00000000010a9380_30; -v00000000010a9380_31 .array/port v00000000010a9380, 31; -E_0000000001081340/8 .event edge, v00000000010a9380_31, v00000000010a9100_0; -E_0000000001081340 .event/or E_0000000001081340/0, E_0000000001081340/1, E_0000000001081340/2, E_0000000001081340/3, E_0000000001081340/4, E_0000000001081340/5, E_0000000001081340/6, E_0000000001081340/7, E_0000000001081340/8; -S_00000000010391d0 .scope begin, "$unm_blk_121" "$unm_blk_121" 8 16, 8 16 0, S_00000000010496b0; - .timescale 0 0; -v00000000010aa280_0 .var/i "i", 31 0; -S_0000000001039470 .scope module, "ramInst" "mips_cpu_memory" 3 9, 9 1 0, S_00000000010aa580; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 32 "data_address"; - .port_info 2 /INPUT 1 "data_write"; - .port_info 3 /INPUT 1 "data_read"; - .port_info 4 /INPUT 32 "data_writedata"; - .port_info 5 /OUTPUT 32 "data_readdata"; - .port_info 6 /INPUT 32 "instr_address"; - .port_info 7 /OUTPUT 32 "instr_readdata"; -P_0000000001080480 .param/str "RAM_INIT_FILE" 0 9 16, "inputs/add.txt"; -L_000000000109b850 .functor AND 1, L_0000000001106260, L_0000000001104dc0, C4<1>, C4<1>; -v0000000001103170_0 .net *"_ivl_0", 31 0, L_0000000001105ea0; 1 drivers -L_0000000001107ba8 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v0000000001103350_0 .net/2u *"_ivl_12", 31 0, L_0000000001107ba8; 1 drivers -v0000000001102ef0_0 .net *"_ivl_14", 0 0, L_0000000001106260; 1 drivers -L_0000000001107bf0 .functor BUFT 1, C4<10111111110000000000000001000000>, C4<0>, C4<0>, C4<0>; -v00000000011037b0_0 .net/2u *"_ivl_16", 31 0, L_0000000001107bf0; 1 drivers -v0000000001104110_0 .net *"_ivl_18", 0 0, L_0000000001104dc0; 1 drivers -v0000000001104890_0 .net *"_ivl_2", 31 0, L_0000000001104c80; 1 drivers -v00000000011033f0_0 .net *"_ivl_21", 0 0, L_000000000109b850; 1 drivers -v0000000001103490_0 .net *"_ivl_22", 31 0, L_00000000011068a0; 1 drivers -L_0000000001107c38 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v0000000001103530_0 .net/2u *"_ivl_24", 31 0, L_0000000001107c38; 1 drivers -v0000000001103670_0 .net *"_ivl_26", 31 0, L_0000000001106940; 1 drivers -v0000000001102db0_0 .net *"_ivl_28", 31 0, L_00000000011055e0; 1 drivers -v00000000011041b0_0 .net *"_ivl_30", 29 0, L_0000000001105b80; 1 drivers -L_0000000001107c80 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0000000001102bd0_0 .net *"_ivl_32", 1 0, L_0000000001107c80; 1 drivers -L_0000000001107cc8 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v0000000001102f90_0 .net *"_ivl_34", 31 0, L_0000000001107cc8; 1 drivers -v0000000001103850_0 .net *"_ivl_4", 29 0, L_0000000001105e00; 1 drivers -L_0000000001107b18 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0000000001103c10_0 .net *"_ivl_6", 1 0, L_0000000001107b18; 1 drivers -L_0000000001107b60 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v0000000001104930_0 .net *"_ivl_8", 31 0, L_0000000001107b60; 1 drivers -v0000000001103df0_0 .net "clk", 0 0, v0000000001104be0_0; alias, 1 drivers -v0000000001104250_0 .net "data_address", 31 0, v00000000010a8980_0; alias, 1 drivers -v0000000001104390 .array "data_memory", 63 0, 31 0; -v00000000011049d0_0 .net "data_read", 0 0, v00000000010a8a20_0; alias, 1 drivers -v0000000001102c70_0 .net "data_readdata", 31 0, L_0000000001104fa0; alias, 1 drivers -v0000000001102d10_0 .net "data_write", 0 0, v00000000010a8c00_0; alias, 1 drivers -v0000000001103030_0 .net "data_writedata", 31 0, v00000000010a8ca0_0; alias, 1 drivers -v0000000001105ae0_0 .net "instr_address", 31 0, v00000000011042f0_0; alias, 1 drivers -v0000000001104d20 .array "instr_memory", 63 0, 31 0; -v0000000001105fe0_0 .net "instr_readdata", 31 0, L_0000000001106300; alias, 1 drivers -L_0000000001105ea0 .array/port v0000000001104390, L_0000000001104c80; -L_0000000001105e00 .part v00000000010a8980_0, 2, 30; -L_0000000001104c80 .concat [ 30 2 0 0], L_0000000001105e00, L_0000000001107b18; -L_0000000001104fa0 .functor MUXZ 32, L_0000000001107b60, L_0000000001105ea0, v00000000010a8a20_0, C4<>; -L_0000000001106260 .cmp/ge 32, v00000000011042f0_0, L_0000000001107ba8; -L_0000000001104dc0 .cmp/gt 32, L_0000000001107bf0, v00000000011042f0_0; -L_00000000011068a0 .array/port v0000000001104d20, L_00000000011055e0; -L_0000000001106940 .arith/sub 32, v00000000011042f0_0, L_0000000001107c38; -L_0000000001105b80 .part L_0000000001106940, 2, 30; -L_00000000011055e0 .concat [ 30 2 0 0], L_0000000001105b80, L_0000000001107c80; -L_0000000001106300 .functor MUXZ 32, L_0000000001107cc8, L_00000000011068a0, L_000000000109b850, C4<>; -S_000000000102e5e0 .scope begin, "$unm_blk_104" "$unm_blk_104" 9 21, 9 21 0, S_0000000001039470; - .timescale 0 0; -v0000000001103d50_0 .var/i "i", 31 0; -S_0000000000ff2680 .scope begin, "$ivl_for_loop0" "$ivl_for_loop0" 9 36, 9 36 0, S_000000000102e5e0; - .timescale 0 0; -v0000000001102e50_0 .var/i "j", 31 0; - .scope S_0000000001039470; -T_0 ; - %fork t_1, S_000000000102e5e0; - %jmp t_0; - .scope S_000000000102e5e0; -t_1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v0000000001103d50_0, 0, 32; -T_0.0 ; - %load/vec4 v0000000001103d50_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v0000000001103d50_0; - %store/vec4a v0000000001104390, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0000000001103d50_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v0000000001103d50_0, 0, 32; - %jmp T_0.0; -T_0.1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v0000000001103d50_0, 0, 32; -T_0.2 ; - %load/vec4 v0000000001103d50_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.3, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v0000000001103d50_0; - %store/vec4a v0000000001104d20, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0000000001103d50_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v0000000001103d50_0, 0, 32; - %jmp T_0.2; -T_0.3 ; - %vpi_call/w 9 32 "$display", "RAM: Loading RAM contents from %s", P_0000000001080480 {0 0 0}; - %vpi_call/w 9 33 "$readmemh", P_0000000001080480, v0000000001104d20 {0 0 0}; - %fork t_3, S_0000000000ff2680; - %jmp t_2; - .scope S_0000000000ff2680; -t_3 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v0000000001102e50_0, 0, 32; -T_0.4 ; - %load/vec4 v0000000001102e50_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.5, 5; - %pushi/vec4 3217031168, 0, 32; - %load/vec4 v0000000001102e50_0; - %muli 4, 0, 32; - %add; - %vpi_call/w 9 37 "$display", "byte +%h: %h", S<0,vec4,u32>, &A {1 0 0}; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0000000001102e50_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v0000000001102e50_0, 0, 32; - %jmp T_0.4; -T_0.5 ; - %end; - .scope S_000000000102e5e0; -t_2 %join; - %end; - .scope S_0000000001039470; -t_0 %join; - %end; - .thread T_0; - .scope S_0000000001039470; -T_1 ; - %wait E_0000000001081300; - %load/vec4 v00000000011049d0_0; - %nor/r; - %load/vec4 v0000000001102d10_0; - %and; - %flag_set/vec4 8; - %jmp/0xz T_1.0, 8; - %load/vec4 v0000000001105ae0_0; - %load/vec4 v0000000001104250_0; - %cmp/ne; - %jmp/0xz T_1.2, 4; - %load/vec4 v0000000001103030_0; - %load/vec4 v0000000001104250_0; - %ix/load 4, 2, 0; - %flag_set/imm 4, 0; - %shiftr 4; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001104390, 0, 4; -T_1.2 ; -T_1.0 ; - %jmp T_1; - .thread T_1; - .scope S_0000000001049520; -T_2 ; - %load/vec4 v00000000010a8de0_0; - %store/vec4 v00000000010a94c0_0, 0, 32; - %end; - .thread T_2; - .scope S_0000000001049520; -T_3 ; - %wait E_0000000001081300; - %load/vec4 v00000000010aa000_0; - %flag_set/vec4 8; - %jmp/0xz T_3.0, 8; - %pushi/vec4 1, 0, 1; - %assign/vec4 v00000000010a9f60_0, 0; - %pushi/vec4 3217031168, 0, 32; - %assign/vec4 v00000000010a94c0_0, 0; - %jmp T_3.1; -T_3.0 ; - %load/vec4 v00000000010a94c0_0; - %cmpi/ne 0, 0, 32; - %jmp/0xz T_3.2, 4; - %load/vec4 v00000000010a9f60_0; - %assign/vec4 v00000000010a9f60_0, 0; - %load/vec4 v00000000010a9420_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_3.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_3.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_3.6, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_3.7, 6; - %jmp T_3.8; -T_3.4 ; - %load/vec4 v00000000010a94c0_0; - %assign/vec4 v00000000010a8d40_0, 0; - %load/vec4 v00000000010a8d40_0; - %addi 4, 0, 32; - %assign/vec4 v00000000010a94c0_0, 0; - %vpi_call/w 7 27 "$display", "New PC from %h to %h", v00000000010a8d40_0, v00000000010a94c0_0 {0 0 0}; - %jmp T_3.8; -T_3.5 ; - %load/vec4 v00000000010a8de0_0; - %assign/vec4 v00000000010a94c0_0, 0; - %jmp T_3.8; -T_3.6 ; - %load/vec4 v00000000010a8de0_0; - %assign/vec4 v00000000010a94c0_0, 0; - %jmp T_3.8; -T_3.7 ; - %vpi_call/w 7 36 "$display", "JUMP REGISTER" {0 0 0}; - %pushi/vec4 0, 0, 32; - %assign/vec4 v00000000010a94c0_0, 0; - %jmp T_3.8; -T_3.8 ; - %pop/vec4 1; - %jmp T_3.3; -T_3.2 ; - %load/vec4 v00000000010a94c0_0; - %cmpi/e 0, 0, 32; - %jmp/0xz T_3.9, 4; - %pushi/vec4 0, 0, 1; - %assign/vec4 v00000000010a9f60_0, 0; -T_3.9 ; -T_3.3 ; -T_3.1 ; - %jmp T_3; - .thread T_3; - .scope S_0000000001049390; -T_4 ; - %wait E_0000000001087700; - %vpi_call/w 6 86 "$display", "Opcode: %h", v00000000010a92e0_0 {0 0 0}; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.0, 4; - %pushi/vec4 0, 0, 2; - %store/vec4 v00000000010a91a0_0, 0, 2; - %vpi_call/w 6 89 "$display", "CTRLREGDST: Rt" {0 0 0}; - %jmp T_4.1; -T_4.0 ; - %load/vec4 v00000000010a92e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.2, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v00000000010a91a0_0, 0, 2; - %vpi_call/w 6 92 "$display", "CTRLREGDST: Rd" {0 0 0}; - %jmp T_4.3; -T_4.2 ; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 3, 0, 6; - %jmp/0xz T_4.4, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v00000000010a91a0_0, 0, 2; - %vpi_call/w 6 95 "$display", "CTRLREGDST: Link" {0 0 0}; - %jmp T_4.5; -T_4.4 ; - %pushi/vec4 1, 1, 2; - %store/vec4 v00000000010a91a0_0, 0, 2; - %vpi_call/w 6 96 "$display", "xxxxxxxxxxxxxx" {0 0 0}; -T_4.5 ; -T_4.3 ; -T_4.1 ; - %load/vec4 v00000000010aa3c0_0; - %load/vec4 v00000000010a92e0_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a92e0_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a92e0_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a92e0_0; - %pushi/vec4 5, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a92e0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a99c0_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a99c0_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a99c0_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a99c0_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.6, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v00000000010a97e0_0, 0, 2; - %jmp T_4.7; -T_4.6 ; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 2, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 3, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.8, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v00000000010a97e0_0, 0, 2; - %jmp T_4.9; -T_4.8 ; - %load/vec4 v00000000010a9920_0; - %cmpi/e 8, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010a9920_0; - %cmpi/e 9, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.10, 4; - %pushi/vec4 3, 0, 2; - %store/vec4 v00000000010a97e0_0, 0, 2; - %jmp T_4.11; -T_4.10 ; - %pushi/vec4 0, 0, 2; - %store/vec4 v00000000010a97e0_0, 0, 2; -T_4.11 ; -T_4.9 ; -T_4.7 ; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.12, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000010aa0a0_0, 0, 1; - %pushi/vec4 1, 0, 2; - %store/vec4 v00000000010a9240_0, 0, 2; - %vpi_call/w 6 112 "$display", "Memory read enabled" {0 0 0}; - %jmp T_4.13; -T_4.12 ; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.14, 9; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000010aa0a0_0, 0, 1; - %pushi/vec4 0, 0, 2; - %store/vec4 v00000000010a9240_0, 0, 2; - %vpi_call/w 6 116 "$display", "Memory read disabled" {0 0 0}; - %jmp T_4.15; -T_4.14 ; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 3, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.16, 9; - %pushi/vec4 2, 0, 2; - %store/vec4 v00000000010a9240_0, 0, 2; - %jmp T_4.17; -T_4.16 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v00000000010aa0a0_0, 0, 1; -T_4.17 ; -T_4.15 ; -T_4.13 ; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.18, 9; - %pushi/vec4 0, 0, 5; - %store/vec4 v00000000010aa460_0, 0, 5; - %vpi_call/w 6 124 "$display", "ALU OP = 0 (ADDU/ADDIU)" {0 0 0}; - %jmp T_4.19; -T_4.18 ; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 12, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.20, 9; - %pushi/vec4 4, 0, 5; - %store/vec4 v00000000010aa460_0, 0, 5; - %jmp T_4.21; -T_4.20 ; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 4, 0, 6; - %jmp/0xz T_4.22, 4; - %pushi/vec4 13, 0, 5; - %store/vec4 v00000000010aa460_0, 0, 5; - %jmp T_4.23; -T_4.22 ; - %load/vec4 v00000000010a92e0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a99c0_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a99c0_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.24, 8; - %pushi/vec4 17, 0, 5; - %store/vec4 v00000000010aa460_0, 0, 5; - %jmp T_4.25; -T_4.24 ; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 7, 0, 6; - %jmp/0xz T_4.26, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v00000000010aa460_0, 0, 5; - %jmp T_4.27; -T_4.26 ; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 6, 0, 6; - %jmp/0xz T_4.28, 4; - %pushi/vec4 15, 0, 5; - %store/vec4 v00000000010aa460_0, 0, 5; - %jmp T_4.29; -T_4.28 ; - %load/vec4 v00000000010a92e0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a99c0_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a99c0_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.30, 8; - %pushi/vec4 14, 0, 5; - %store/vec4 v00000000010aa460_0, 0, 5; - %jmp T_4.31; -T_4.30 ; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 5, 0, 6; - %jmp/0xz T_4.32, 4; - %pushi/vec4 18, 0, 5; - %store/vec4 v00000000010aa460_0, 0, 5; - %jmp T_4.33; -T_4.32 ; - %load/vec4 v00000000010a92e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.34, 8; - %pushi/vec4 3, 0, 5; - %store/vec4 v00000000010aa460_0, 0, 5; - %jmp T_4.35; -T_4.34 ; - %load/vec4 v00000000010a92e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.36, 8; - %pushi/vec4 23, 0, 5; - %store/vec4 v00000000010aa460_0, 0, 5; - %jmp T_4.37; -T_4.36 ; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.38, 4; - %pushi/vec4 0, 0, 5; - %store/vec4 v00000000010aa460_0, 0, 5; - %jmp T_4.39; -T_4.38 ; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.40, 4; - %pushi/vec4 7, 0, 5; - %store/vec4 v00000000010aa460_0, 0, 5; - %jmp T_4.41; -T_4.40 ; - %load/vec4 v00000000010a92e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.42, 8; - %pushi/vec4 19, 0, 5; - %store/vec4 v00000000010aa460_0, 0, 5; - %jmp T_4.43; -T_4.42 ; - %load/vec4 v00000000010a92e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.44, 8; - %pushi/vec4 2, 0, 5; - %store/vec4 v00000000010aa460_0, 0, 5; - %jmp T_4.45; -T_4.44 ; - %load/vec4 v00000000010a92e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.46, 8; - %pushi/vec4 22, 0, 5; - %store/vec4 v00000000010aa460_0, 0, 5; - %jmp T_4.47; -T_4.46 ; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 13, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.48, 9; - %pushi/vec4 5, 0, 5; - %store/vec4 v00000000010aa460_0, 0, 5; - %jmp T_4.49; -T_4.48 ; - %load/vec4 v00000000010a92e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.50, 8; - %pushi/vec4 7, 0, 5; - %store/vec4 v00000000010aa460_0, 0, 5; - %jmp T_4.51; -T_4.50 ; - %load/vec4 v00000000010a92e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.52, 8; - %pushi/vec4 8, 0, 5; - %store/vec4 v00000000010aa460_0, 0, 5; - %jmp T_4.53; -T_4.52 ; - %load/vec4 v00000000010a92e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.54, 8; - %pushi/vec4 11, 0, 5; - %store/vec4 v00000000010aa460_0, 0, 5; - %jmp T_4.55; -T_4.54 ; - %load/vec4 v00000000010a92e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.56, 8; - %pushi/vec4 12, 0, 5; - %store/vec4 v00000000010aa460_0, 0, 5; - %jmp T_4.57; -T_4.56 ; - %load/vec4 v00000000010a92e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.58, 8; - %pushi/vec4 9, 0, 5; - %store/vec4 v00000000010aa460_0, 0, 5; - %jmp T_4.59; -T_4.58 ; - %load/vec4 v00000000010a92e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.60, 8; - %pushi/vec4 10, 0, 5; - %store/vec4 v00000000010aa460_0, 0, 5; - %jmp T_4.61; -T_4.60 ; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 10, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.62, 9; - %pushi/vec4 20, 0, 5; - %store/vec4 v00000000010aa460_0, 0, 5; - %jmp T_4.63; -T_4.62 ; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 11, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.64, 9; - %pushi/vec4 21, 0, 5; - %store/vec4 v00000000010aa460_0, 0, 5; - %jmp T_4.65; -T_4.64 ; - %load/vec4 v00000000010a92e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.66, 8; - %pushi/vec4 1, 0, 5; - %store/vec4 v00000000010aa460_0, 0, 5; - %jmp T_4.67; -T_4.66 ; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 14, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.68, 9; - %pushi/vec4 6, 0, 5; - %store/vec4 v00000000010aa460_0, 0, 5; - %vpi_call/w 6 175 "$display", "ALU Op = 6 (XOR)" {0 0 0}; - %jmp T_4.69; -T_4.68 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v00000000010aa460_0, 0, 5; -T_4.69 ; -T_4.67 ; -T_4.65 ; -T_4.63 ; -T_4.61 ; -T_4.59 ; -T_4.57 ; -T_4.55 ; -T_4.53 ; -T_4.51 ; -T_4.49 ; -T_4.47 ; -T_4.45 ; -T_4.43 ; -T_4.41 ; -T_4.39 ; -T_4.37 ; -T_4.35 ; -T_4.33 ; -T_4.31 ; -T_4.29 ; -T_4.27 ; -T_4.25 ; -T_4.23 ; -T_4.21 ; -T_4.19 ; - %load/vec4 v00000000010a92e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.70, 8; - %load/vec4 v00000000010a8e80_0; - %parti/s 5, 6, 4; - %store/vec4 v00000000010a9880_0, 0, 5; - %jmp T_4.71; -T_4.70 ; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.72, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v00000000010a9880_0, 0, 5; - %jmp T_4.73; -T_4.72 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v00000000010a9880_0, 0, 5; -T_4.73 ; -T_4.71 ; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 40, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.74, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000010aa140_0, 0, 1; - %jmp T_4.75; -T_4.74 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000010aa140_0, 0, 1; -T_4.75 ; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.76, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000010aa1e0_0, 0, 1; - %jmp T_4.77; -T_4.76 ; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 4, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 7, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 6, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 5, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %load/vec4 v00000000010a92e0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a99c0_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a99c0_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a99c0_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a99c0_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %flag_or 8, 9; - %jmp/0xz T_4.78, 8; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000010aa1e0_0, 0, 1; - %jmp T_4.79; -T_4.78 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v00000000010aa1e0_0, 0, 1; -T_4.79 ; -T_4.77 ; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010a92e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010a9920_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.80, 9; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000010a96a0_0, 0, 1; - %jmp T_4.81; -T_4.80 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000010a96a0_0, 0, 1; -T_4.81 ; - %jmp T_4; - .thread T_4, $push; - .scope S_00000000010496b0; -T_5 ; - %fork t_5, S_00000000010391d0; - %jmp t_4; - .scope S_00000000010391d0; -t_5 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000010aa280_0, 0, 32; -T_5.0 ; - %load/vec4 v00000000010aa280_0; - %cmpi/s 32, 0, 32; - %jmp/0xz T_5.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v00000000010aa280_0; - %store/vec4a v00000000010a9380, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000010aa280_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000010aa280_0, 0, 32; - %jmp T_5.0; -T_5.1 ; - %end; - .scope S_00000000010496b0; -t_4 %join; - %end; - .thread T_5; - .scope S_00000000010496b0; -T_6 ; -Ewait_0 .event/or E_0000000001081340, E_0x0; - %wait Ewait_0; - %load/vec4 v00000000010a9d80_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v00000000010a9380, 4; - %store/vec4 v00000000010a9560_0, 0, 32; - %load/vec4 v00000000010a9100_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v00000000010a9380, 4; - %store/vec4 v00000000010a9ce0_0, 0, 32; - %jmp T_6; - .thread T_6, $push; - .scope S_00000000010496b0; -T_7 ; - %wait E_0000000001080540; - %load/vec4 v00000000010a8660_0; - %cmpi/e 0, 0, 5; - %jmp/0xz T_7.0, 4; - %jmp T_7.1; -T_7.0 ; - %load/vec4 v00000000010a9ec0_0; - %flag_set/vec4 8; - %jmp/0xz T_7.2, 8; - %load/vec4 v00000000010aa320_0; - %dup/vec4; - %pushi/vec4 32, 0, 6; - %cmp/u; - %jmp/1 T_7.4, 6; - %dup/vec4; - %pushi/vec4 36, 0, 6; - %cmp/u; - %jmp/1 T_7.5, 6; - %dup/vec4; - %pushi/vec4 33, 0, 6; - %cmp/u; - %jmp/1 T_7.6, 6; - %dup/vec4; - %pushi/vec4 37, 0, 6; - %cmp/u; - %jmp/1 T_7.7, 6; - %dup/vec4; - %pushi/vec4 34, 0, 6; - %cmp/u; - %jmp/1 T_7.8, 6; - %dup/vec4; - %pushi/vec4 38, 0, 6; - %cmp/u; - %jmp/1 T_7.9, 6; - %load/vec4 v00000000010a85c0_0; - %load/vec4 v00000000010a8660_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010a9380, 0, 4; - %jmp T_7.11; -T_7.4 ; - %load/vec4 v00000000010a9560_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.12, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.13, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.14, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.15, 6; - %jmp T_7.16; -T_7.12 ; - %load/vec4 v00000000010a85c0_0; - %parti/s 1, 7, 4; - %replicate 24; - %load/vec4 v00000000010a85c0_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000010a8660_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010a9380, 0, 4; - %jmp T_7.16; -T_7.13 ; - %load/vec4 v00000000010a85c0_0; - %parti/s 1, 15, 5; - %replicate 24; - %load/vec4 v00000000010a85c0_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000010a8660_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010a9380, 0, 4; - %jmp T_7.16; -T_7.14 ; - %load/vec4 v00000000010a85c0_0; - %parti/s 1, 23, 6; - %replicate 24; - %load/vec4 v00000000010a85c0_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000010a8660_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010a9380, 0, 4; - %jmp T_7.16; -T_7.15 ; - %load/vec4 v00000000010a85c0_0; - %parti/s 1, 31, 6; - %replicate 24; - %load/vec4 v00000000010a85c0_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000010a8660_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010a9380, 0, 4; - %jmp T_7.16; -T_7.16 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.5 ; - %load/vec4 v00000000010a9560_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.17, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.18, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.19, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.20, 6; - %jmp T_7.21; -T_7.17 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000010a85c0_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000010a8660_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010a9380, 0, 4; - %jmp T_7.21; -T_7.18 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000010a85c0_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000010a8660_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010a9380, 0, 4; - %jmp T_7.21; -T_7.19 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000010a85c0_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000010a8660_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010a9380, 0, 4; - %jmp T_7.21; -T_7.20 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000010a85c0_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000010a8660_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010a9380, 0, 4; - %jmp T_7.21; -T_7.21 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.6 ; - %load/vec4 v00000000010a9560_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.22, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.23, 6; - %jmp T_7.24; -T_7.22 ; - %load/vec4 v00000000010a85c0_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v00000000010a85c0_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000010a8660_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010a9380, 0, 4; - %jmp T_7.24; -T_7.23 ; - %load/vec4 v00000000010a85c0_0; - %parti/s 1, 31, 6; - %replicate 16; - %load/vec4 v00000000010a85c0_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000010a8660_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010a9380, 0, 4; - %jmp T_7.24; -T_7.24 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.7 ; - %load/vec4 v00000000010a9560_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.25, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.26, 6; - %jmp T_7.27; -T_7.25 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v00000000010a85c0_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000010a8660_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010a9380, 0, 4; - %jmp T_7.27; -T_7.26 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v00000000010a85c0_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000010a8660_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010a9380, 0, 4; - %jmp T_7.27; -T_7.27 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.8 ; - %load/vec4 v00000000010a9560_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.28, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.29, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.30, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.31, 6; - %jmp T_7.32; -T_7.28 ; - %load/vec4 v00000000010a85c0_0; - %parti/s 8, 0, 2; - %load/vec4 v00000000010a8660_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 24, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v00000000010a9380, 4, 5; - %jmp T_7.32; -T_7.29 ; - %load/vec4 v00000000010a85c0_0; - %parti/s 16, 0, 2; - %load/vec4 v00000000010a8660_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 16, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v00000000010a9380, 4, 5; - %jmp T_7.32; -T_7.30 ; - %load/vec4 v00000000010a85c0_0; - %parti/s 24, 0, 2; - %load/vec4 v00000000010a8660_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 8, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v00000000010a9380, 4, 5; - %jmp T_7.32; -T_7.31 ; - %load/vec4 v00000000010a85c0_0; - %load/vec4 v00000000010a8660_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010a9380, 0, 4; - %jmp T_7.32; -T_7.32 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.9 ; - %load/vec4 v00000000010a9560_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.33, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.34, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.35, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.36, 6; - %jmp T_7.37; -T_7.33 ; - %load/vec4 v00000000010a85c0_0; - %load/vec4 v00000000010a8660_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010a9380, 0, 4; - %jmp T_7.37; -T_7.34 ; - %load/vec4 v00000000010a85c0_0; - %parti/s 24, 8, 5; - %load/vec4 v00000000010a8660_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010a9380, 0, 4; - %jmp T_7.37; -T_7.35 ; - %load/vec4 v00000000010a85c0_0; - %parti/s 16, 16, 6; - %load/vec4 v00000000010a8660_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010a9380, 0, 4; - %jmp T_7.37; -T_7.36 ; - %load/vec4 v00000000010a85c0_0; - %parti/s 8, 24, 6; - %load/vec4 v00000000010a8660_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010a9380, 0, 4; - %jmp T_7.37; -T_7.37 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.11 ; - %pop/vec4 1; -T_7.2 ; -T_7.1 ; - %jmp T_7; - .thread T_7; - .scope S_00000000010ab710; -T_8 ; -Ewait_1 .event/or E_0000000001081200, E_0x0; - %wait Ewait_1; - %load/vec4 v00000000010a8f20_0; - %dup/vec4; - %pushi/vec4 0, 0, 5; - %cmp/u; - %jmp/1 T_8.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 5; - %cmp/u; - %jmp/1 T_8.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 5; - %cmp/u; - %jmp/1 T_8.2, 6; - %dup/vec4; - %pushi/vec4 3, 0, 5; - %cmp/u; - %jmp/1 T_8.3, 6; - %dup/vec4; - %pushi/vec4 4, 0, 5; - %cmp/u; - %jmp/1 T_8.4, 6; - %dup/vec4; - %pushi/vec4 5, 0, 5; - %cmp/u; - %jmp/1 T_8.5, 6; - %dup/vec4; - %pushi/vec4 6, 0, 5; - %cmp/u; - %jmp/1 T_8.6, 6; - %dup/vec4; - %pushi/vec4 7, 0, 5; - %cmp/u; - %jmp/1 T_8.7, 6; - %dup/vec4; - %pushi/vec4 8, 0, 5; - %cmp/u; - %jmp/1 T_8.8, 6; - %dup/vec4; - %pushi/vec4 9, 0, 5; - %cmp/u; - %jmp/1 T_8.9, 6; - %dup/vec4; - %pushi/vec4 10, 0, 5; - %cmp/u; - %jmp/1 T_8.10, 6; - %dup/vec4; - %pushi/vec4 11, 0, 5; - %cmp/u; - %jmp/1 T_8.11, 6; - %dup/vec4; - %pushi/vec4 12, 0, 5; - %cmp/u; - %jmp/1 T_8.12, 6; - %dup/vec4; - %pushi/vec4 13, 0, 5; - %cmp/u; - %jmp/1 T_8.13, 6; - %dup/vec4; - %pushi/vec4 14, 0, 5; - %cmp/u; - %jmp/1 T_8.14, 6; - %dup/vec4; - %pushi/vec4 15, 0, 5; - %cmp/u; - %jmp/1 T_8.15, 6; - %dup/vec4; - %pushi/vec4 16, 0, 5; - %cmp/u; - %jmp/1 T_8.16, 6; - %dup/vec4; - %pushi/vec4 17, 0, 5; - %cmp/u; - %jmp/1 T_8.17, 6; - %dup/vec4; - %pushi/vec4 18, 0, 5; - %cmp/u; - %jmp/1 T_8.18, 6; - %dup/vec4; - %pushi/vec4 19, 0, 5; - %cmp/u; - %jmp/1 T_8.19, 6; - %dup/vec4; - %pushi/vec4 20, 0, 5; - %cmp/u; - %jmp/1 T_8.20, 6; - %dup/vec4; - %pushi/vec4 21, 0, 5; - %cmp/u; - %jmp/1 T_8.21, 6; - %dup/vec4; - %pushi/vec4 22, 0, 5; - %cmp/u; - %jmp/1 T_8.22, 6; - %dup/vec4; - %pushi/vec4 23, 0, 5; - %cmp/u; - %jmp/1 T_8.23, 6; - %jmp T_8.24; -T_8.0 ; - %load/vec4 v00000000010a8fc0_0; - %load/vec4 v00000000010a8ac0_0; - %add; - %store/vec4 v00000000010a9ba0_0, 0, 32; - %jmp T_8.24; -T_8.1 ; - %load/vec4 v00000000010a8fc0_0; - %load/vec4 v00000000010a8ac0_0; - %sub; - %store/vec4 v00000000010a9ba0_0, 0, 32; - %jmp T_8.24; -T_8.2 ; - %load/vec4 v00000000010a8fc0_0; - %load/vec4 v00000000010a8ac0_0; - %mul; - %store/vec4 v00000000010a9ba0_0, 0, 32; - %jmp T_8.24; -T_8.3 ; - %load/vec4 v00000000010a8fc0_0; - %load/vec4 v00000000010a8ac0_0; - %div/s; - %store/vec4 v00000000010a9ba0_0, 0, 32; - %jmp T_8.24; -T_8.4 ; - %load/vec4 v00000000010a8fc0_0; - %load/vec4 v00000000010a8ac0_0; - %and; - %store/vec4 v00000000010a9ba0_0, 0, 32; - %jmp T_8.24; -T_8.5 ; - %load/vec4 v00000000010a8fc0_0; - %load/vec4 v00000000010a8ac0_0; - %or; - %store/vec4 v00000000010a9ba0_0, 0, 32; - %jmp T_8.24; -T_8.6 ; - %load/vec4 v00000000010a8fc0_0; - %load/vec4 v00000000010a8ac0_0; - %xor; - %store/vec4 v00000000010a9ba0_0, 0, 32; - %jmp T_8.24; -T_8.7 ; - %load/vec4 v00000000010a8ac0_0; - %ix/getv 4, v00000000010a9740_0; - %shiftl 4; - %store/vec4 v00000000010a9ba0_0, 0, 32; - %jmp T_8.24; -T_8.8 ; - %load/vec4 v00000000010a8ac0_0; - %ix/getv 4, v00000000010a8fc0_0; - %shiftl 4; - %store/vec4 v00000000010a9ba0_0, 0, 32; - %jmp T_8.24; -T_8.9 ; - %load/vec4 v00000000010a8ac0_0; - %ix/getv 4, v00000000010a9740_0; - %shiftr 4; - %store/vec4 v00000000010a9ba0_0, 0, 32; - %jmp T_8.24; -T_8.10 ; - %load/vec4 v00000000010a8ac0_0; - %ix/getv 4, v00000000010a8fc0_0; - %shiftr 4; - %store/vec4 v00000000010a9ba0_0, 0, 32; - %jmp T_8.24; -T_8.11 ; - %load/vec4 v00000000010a8ac0_0; - %ix/getv 4, v00000000010a9740_0; - %shiftr 4; - %store/vec4 v00000000010a9ba0_0, 0, 32; - %jmp T_8.24; -T_8.12 ; - %load/vec4 v00000000010a8ac0_0; - %ix/getv 4, v00000000010a8fc0_0; - %shiftr 4; - %store/vec4 v00000000010a9ba0_0, 0, 32; - %jmp T_8.24; -T_8.13 ; - %load/vec4 v00000000010a8fc0_0; - %load/vec4 v00000000010a8ac0_0; - %cmp/e; - %jmp/0xz T_8.25, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000010a9600_0, 0, 1; - %jmp T_8.26; -T_8.25 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000010a9600_0, 0, 1; -T_8.26 ; - %jmp T_8.24; -T_8.14 ; - %load/vec4 v00000000010a8fc0_0; - %load/vec4 v00000000010a8ac0_0; - %cmp/s; - %jmp/0xz T_8.27, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000010a9600_0, 0, 1; - %jmp T_8.28; -T_8.27 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000010a9600_0, 0, 1; -T_8.28 ; - %jmp T_8.24; -T_8.15 ; - %load/vec4 v00000000010a8fc0_0; - %load/vec4 v00000000010a8ac0_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.29, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000010a9600_0, 0, 1; - %jmp T_8.30; -T_8.29 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000010a9600_0, 0, 1; -T_8.30 ; - %jmp T_8.24; -T_8.16 ; - %load/vec4 v00000000010a8ac0_0; - %load/vec4 v00000000010a8fc0_0; - %cmp/s; - %jmp/0xz T_8.31, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000010a9600_0, 0, 1; - %jmp T_8.32; -T_8.31 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000010a9600_0, 0, 1; -T_8.32 ; - %jmp T_8.24; -T_8.17 ; - %load/vec4 v00000000010a8ac0_0; - %load/vec4 v00000000010a8fc0_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.33, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000010a9600_0, 0, 1; - %jmp T_8.34; -T_8.33 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000010a9600_0, 0, 1; -T_8.34 ; - %jmp T_8.24; -T_8.18 ; - %load/vec4 v00000000010a8fc0_0; - %load/vec4 v00000000010a8ac0_0; - %cmp/ne; - %jmp/0xz T_8.35, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000010a9600_0, 0, 1; - %jmp T_8.36; -T_8.35 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000010a9600_0, 0, 1; -T_8.36 ; - %jmp T_8.24; -T_8.19 ; - %load/vec4 v00000000010a8fc0_0; - %store/vec4 v00000000010a9ba0_0, 0, 32; - %jmp T_8.24; -T_8.20 ; - %load/vec4 v00000000010a8fc0_0; - %load/vec4 v00000000010a8ac0_0; - %cmp/s; - %jmp/0xz T_8.37, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v00000000010a9ba0_0, 0, 32; -T_8.37 ; - %jmp T_8.24; -T_8.21 ; - %load/vec4 v00000000010a8fc0_0; - %load/vec4 v00000000010a8ac0_0; - %cmp/u; - %jmp/0xz T_8.39, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v00000000010a9ba0_0, 0, 32; -T_8.39 ; - %jmp T_8.24; -T_8.22 ; - %load/vec4 v00000000010a8fc0_0; - %load/vec4 v00000000010a8ac0_0; - %mul; - %store/vec4 v00000000010a9ba0_0, 0, 32; - %jmp T_8.24; -T_8.23 ; - %load/vec4 v00000000010a8fc0_0; - %load/vec4 v00000000010a8ac0_0; - %div; - %store/vec4 v00000000010a9ba0_0, 0, 32; - %jmp T_8.24; -T_8.24 ; - %pop/vec4 1; - %jmp T_8; - .thread T_8, $push; - .scope S_00000000010ab580; -T_9 ; - %pushi/vec4 3217031168, 0, 32; - %store/vec4 v0000000001104570_0, 0, 32; - %end; - .thread T_9, $init; - .scope S_00000000010ab580; -T_10 ; -Ewait_2 .event/or E_0000000001086400, E_0x0; - %wait Ewait_2; - %load/vec4 v0000000001104430_0; - %store/vec4 v00000000011042f0_0, 0, 32; - %load/vec4 v0000000001104610_0; - %store/vec4 v00000000010a8980_0, 0, 32; - %load/vec4 v0000000001102b30_0; - %store/vec4 v00000000010a8c00_0, 0, 1; - %load/vec4 v00000000011035d0_0; - %store/vec4 v00000000010a8a20_0, 0, 1; - %load/vec4 v00000000011047f0_0; - %store/vec4 v00000000010a8ca0_0, 0, 32; - %jmp T_10; - .thread T_10, $push; - .scope S_00000000010ab580; -T_11 ; -Ewait_3 .event/or E_0000000001086b80, E_0x0; - %wait Ewait_3; - %load/vec4 v00000000011046b0_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.2, 6; - %jmp T_11.3; -T_11.0 ; - %load/vec4 v00000000011032b0_0; - %parti/s 5, 16, 6; - %store/vec4 v0000000001103990_0, 0, 5; - %jmp T_11.3; -T_11.1 ; - %load/vec4 v00000000011032b0_0; - %parti/s 5, 11, 5; - %store/vec4 v0000000001103990_0, 0, 5; - %jmp T_11.3; -T_11.2 ; - %pushi/vec4 31, 0, 5; - %store/vec4 v0000000001103990_0, 0, 5; - %jmp T_11.3; -T_11.3 ; - %pop/vec4 1; - %load/vec4 v0000000001103710_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.6, 6; - %jmp T_11.7; -T_11.4 ; - %load/vec4 v0000000001104610_0; - %store/vec4 v0000000001103f30_0, 0, 32; - %jmp T_11.7; -T_11.5 ; - %load/vec4 v00000000010a8b60_0; - %store/vec4 v0000000001103f30_0, 0, 32; - %jmp T_11.7; -T_11.6 ; - %load/vec4 v0000000001104570_0; - %addi 8, 0, 32; - %store/vec4 v0000000001103f30_0, 0, 32; - %jmp T_11.7; -T_11.7 ; - %pop/vec4 1; - %load/vec4 v00000000011030d0_0; - %dup/vec4; - %pushi/vec4 1, 0, 1; - %cmp/u; - %jmp/1 T_11.8, 6; - %dup/vec4; - %pushi/vec4 0, 0, 1; - %cmp/u; - %jmp/1 T_11.9, 6; - %jmp T_11.10; -T_11.8 ; - %load/vec4 v00000000011032b0_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v00000000011032b0_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %store/vec4 v00000000010194d0_0, 0, 32; - %jmp T_11.10; -T_11.9 ; - %load/vec4 v00000000011047f0_0; - %store/vec4 v00000000010194d0_0, 0, 32; - %jmp T_11.10; -T_11.10 ; - %pop/vec4 1; - %jmp T_11; - .thread T_11, $push; - .scope S_00000000010aa580; -T_12 ; - %vpi_call/w 3 36 "$dumpfile", "mips_cpu_harvard.vcd" {0 0 0}; - %vpi_call/w 3 37 "$dumpvars", 32'sb00000000000000000000000000000000, S_00000000010aa580 {0 0 0}; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001104be0_0, 0, 1; - %pushi/vec4 100, 0, 32; -T_12.0 %dup/vec4; - %pushi/vec4 0, 0, 32; - %cmp/s; - %jmp/1xz T_12.1, 5; - %jmp/1 T_12.1, 4; - %pushi/vec4 1, 0, 32; - %sub; - %delay 10, 0; - %load/vec4 v0000000001104be0_0; - %nor/r; - %store/vec4 v0000000001104be0_0, 0, 1; - %delay 10, 0; - %load/vec4 v0000000001104be0_0; - %nor/r; - %store/vec4 v0000000001104be0_0, 0, 1; - %jmp T_12.0; -T_12.1 ; - %pop/vec4 1; - %vpi_call/w 3 47 "$fatal", 32'sb00000000000000000000000000000010, "Simulation did not finish within %d cycles.", P_0000000001073ba8 {0 0 0}; - %end; - .thread T_12; - .scope S_00000000010aa580; -T_13 ; - %vpi_call/w 3 51 "$display", "Initial Reset 0" {0 0 0}; - %pushi/vec4 0, 0, 1; - %assign/vec4 v0000000001106800_0, 0; - %vpi_call/w 3 55 "$display", "Initial Reset 1" {0 0 0}; - %wait E_0000000001081300; - %pushi/vec4 1, 0, 1; - %assign/vec4 v0000000001106800_0, 0; - %vpi_call/w 3 59 "$display", "Initial Reset 0: Start Program" {0 0 0}; - %wait E_0000000001081300; - %pushi/vec4 0, 0, 1; - %assign/vec4 v0000000001106800_0, 0; - %wait E_0000000001081300; - %load/vec4 v00000000011057c0_0; - %pad/u 32; - %cmpi/e 1, 0, 32; - %jmp/0xz T_13.0, 4; - %jmp T_13.1; -T_13.0 ; - %vpi_call/w 3 65 "$display", "TB: CPU did not set active=1 after reset." {0 0 0}; -T_13.1 ; -T_13.2 ; - %load/vec4 v00000000011057c0_0; - %flag_set/vec4 8; - %jmp/0xz T_13.3, 8; - %wait E_0000000001081300; - %vpi_call/w 3 71 "$display", "Reg File Write data: %d", v0000000001103f30_0 {0 0 0}; - %jmp T_13.2; -T_13.3 ; - %wait E_0000000001081300; - %vpi_call/w 3 74 "$display", "TB: CPU Halt; active=0" {0 0 0}; - %vpi_call/w 3 75 "$display", "Output:" {0 0 0}; - %vpi_call/w 3 76 "$display", "%d", v0000000001106760_0 {0 0 0}; - %vpi_call/w 3 77 "$finish" {0 0 0}; - %end; - .thread T_13; -# The file index is used to find the file name in the following table. -:file_names 10; - "N/A"; - ""; - "-"; - "testbench/mips_cpu_harvard_tb.v"; - "rtl/mips_cpu_harvard.v"; - "rtl/mips_cpu_alu.v"; - "rtl/mips_cpu_control.v"; - "rtl/mips_cpu_pc.v"; - "rtl/mips_cpu_regfile.v"; - "rtl/mips_cpu_memory.v"; diff --git a/exec/mips_cpu_harvard_tb_addiu b/exec/mips_cpu_harvard_tb_addiu deleted file mode 100644 index 50307d9..0000000 --- a/exec/mips_cpu_harvard_tb_addiu +++ /dev/null @@ -1,2774 +0,0 @@ -#! /usr/local/iverilog/bin/vvp -:ivl_version "11.0 (devel)"; -:ivl_delay_selection "TYPICAL"; -:vpi_time_precision + 0; -:vpi_module "C:\iverilog\lib\ivl\system.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_sys.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_textio.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2005_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\va_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2009.vpi"; -S_0000000000a2b190 .scope package, "$unit" "$unit" 2 1; - .timescale 0 0; -S_00000000009e7f40 .scope module, "mips_cpu_harvard_tb" "mips_cpu_harvard_tb" 3 1; - .timescale 0 0; -P_0000000001153300 .param/str "MEM_INIT_FILE" 0 3 4, "inputs/addiu.data.txt"; -P_0000000001153338 .param/str "RAM_INIT_FILE" 0 3 3, "inputs/addiu.txt"; -P_0000000001153370 .param/l "TIMEOUT_CYCLES" 0 3 5, +C4<00000000000000000000000001100100>; -v00000000011b7870_0 .net "active", 0 0, v000000000114ddf0_0; 1 drivers -v00000000011b5e30_0 .var "clk", 0 0; -v00000000011b61f0_0 .var "clk_enable", 0 0; -v00000000011b6290_0 .net "data_address", 31 0, v000000000114d530_0; 1 drivers -v00000000011b5bb0_0 .net "data_read", 0 0, v000000000114d5d0_0; 1 drivers -v00000000011b7050_0 .net "data_readdata", 31 0, L_00000000011b5c50; 1 drivers -v00000000011b70f0_0 .net "data_write", 0 0, v0000000000973870_0; 1 drivers -v00000000011b6d30_0 .net "data_writedata", 31 0, v00000000011b3e50_0; 1 drivers -v00000000011b7550_0 .net "instr_address", 31 0, v00000000011b2b90_0; 1 drivers -v00000000011b7370_0 .net "instr_readdata", 31 0, L_00000000011b6a10; 1 drivers -v00000000011b7230_0 .net "register_v0", 31 0, L_0000000000a2e8e0; 1 drivers -v00000000011b7410_0 .var "reset", 0 0; -S_00000000009e80d0 .scope module, "cpuInst" "mips_cpu_harvard" 3 20, 4 1 0, S_00000000009e7f40; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "reset"; - .port_info 2 /OUTPUT 1 "active"; - .port_info 3 /OUTPUT 32 "register_v0"; - .port_info 4 /INPUT 1 "clk_enable"; - .port_info 5 /OUTPUT 32 "instr_address"; - .port_info 6 /INPUT 32 "instr_readdata"; - .port_info 7 /OUTPUT 32 "data_address"; - .port_info 8 /OUTPUT 1 "data_write"; - .port_info 9 /OUTPUT 1 "data_read"; - .port_info 10 /OUTPUT 32 "data_writedata"; - .port_info 11 /INPUT 32 "data_readdata"; -v000000000114d3f0_0 .net "active", 0 0, v000000000114ddf0_0; alias, 1 drivers -v000000000114d170_0 .net "clk", 0 0, v00000000011b5e30_0; 1 drivers -v000000000114d7b0_0 .net "clk_enable", 0 0, v00000000011b61f0_0; 1 drivers -v000000000114d530_0 .var "data_address", 31 0; -v000000000114d5d0_0 .var "data_read", 0 0; -v000000000114d710_0 .net "data_readdata", 31 0, L_00000000011b5c50; alias, 1 drivers -v0000000000973870_0 .var "data_write", 0 0; -v00000000011b3e50_0 .var "data_writedata", 31 0; -v00000000011b3310_0 .var "in_B", 31 0; -v00000000011b3270_0 .net "in_opcode", 5 0, L_00000000011b63d0; 1 drivers -v00000000011b3450_0 .net "in_pc_in", 31 0, v000000000114e890_0; 1 drivers -v00000000011b4850_0 .net "in_readreg1", 4 0, L_00000000011b5ed0; 1 drivers -v00000000011b2e10_0 .net "in_readreg2", 4 0, L_00000000011b7190; 1 drivers -v00000000011b3130_0 .var "in_writedata", 31 0; -v00000000011b31d0_0 .var "in_writereg", 4 0; -v00000000011b2b90_0 .var "instr_address", 31 0; -v00000000011b3f90_0 .net "instr_readdata", 31 0, L_00000000011b6a10; alias, 1 drivers -v00000000011b40d0_0 .net "out_ALUCond", 0 0, v000000000114e610_0; 1 drivers -v00000000011b3d10_0 .net "out_ALUOp", 4 0, v000000000114da30_0; 1 drivers -v00000000011b4530_0 .net "out_ALURes", 31 0, v000000000114d670_0; 1 drivers -v00000000011b4170_0 .net "out_ALUSrc", 0 0, v000000000114ec50_0; 1 drivers -v00000000011b3630_0 .net "out_MemRead", 0 0, v000000000114e390_0; 1 drivers -v00000000011b33b0_0 .net "out_MemWrite", 0 0, v000000000114ea70_0; 1 drivers -v00000000011b42b0_0 .net "out_MemtoReg", 1 0, v000000000114dad0_0; 1 drivers -v00000000011b34f0_0 .net "out_PC", 1 0, v000000000114df30_0; 1 drivers -v00000000011b43f0_0 .net "out_RegDst", 1 0, v000000000114d210_0; 1 drivers -v00000000011b38b0_0 .net "out_RegWrite", 0 0, v000000000114d2b0_0; 1 drivers -v00000000011b4a30_0 .var "out_pc_out", 31 0; -v00000000011b36d0_0 .net "out_readdata1", 31 0, v000000000114cef0_0; 1 drivers -v00000000011b45d0_0 .net "out_readdata2", 31 0, v000000000114e250_0; 1 drivers -v00000000011b3ef0_0 .net "out_shamt", 4 0, v000000000114e750_0; 1 drivers -v00000000011b2cd0_0 .net "register_v0", 31 0, L_0000000000a2e8e0; alias, 1 drivers -v00000000011b47b0_0 .net "reset", 0 0, v00000000011b7410_0; 1 drivers -E_00000000011451e0/0 .event edge, v000000000114d210_0, v000000000114d850_0, v000000000114d850_0, v000000000114dad0_0; -E_00000000011451e0/1 .event edge, v000000000114d670_0, v000000000114d710_0, v000000000114e4d0_0, v000000000114ec50_0; -E_00000000011451e0/2 .event edge, v000000000114d850_0, v000000000114d850_0, v000000000114e250_0; -E_00000000011451e0 .event/or E_00000000011451e0/0, E_00000000011451e0/1, E_00000000011451e0/2; -E_00000000011452e0/0 .event edge, v000000000114e890_0, v000000000114d670_0, v000000000114ea70_0, v000000000114e390_0; -E_00000000011452e0/1 .event edge, v000000000114e250_0; -E_00000000011452e0 .event/or E_00000000011452e0/0, E_00000000011452e0/1; -L_00000000011b5ed0 .part L_00000000011b6a10, 21, 5; -L_00000000011b7190 .part L_00000000011b6a10, 16, 5; -L_00000000011b63d0 .part L_00000000011b6a10, 26, 6; -S_00000000009e9490 .scope module, "alu" "mips_cpu_alu" 4 121, 5 1 0, S_00000000009e80d0; - .timescale 0 0; - .port_info 0 /INPUT 32 "A"; - .port_info 1 /INPUT 32 "B"; - .port_info 2 /INPUT 5 "ALUOp"; - .port_info 3 /INPUT 5 "shamt"; - .port_info 4 /OUTPUT 1 "ALUCond"; - .port_info 5 /OUTPUT 32 "ALURes"; -enum000000000092bef0 .enum4 (5) - "ADD" 5'b00000, - "SUB" 5'b00001, - "MUL" 5'b00010, - "DIV" 5'b00011, - "AND" 5'b00100, - "OR" 5'b00101, - "XOR" 5'b00110, - "SLL" 5'b00111, - "SLLV" 5'b01000, - "SRL" 5'b01001, - "SRLV" 5'b01010, - "SRA" 5'b01011, - "SRAV" 5'b01100, - "EQ" 5'b01101, - "LES" 5'b01110, - "LEQ" 5'b01111, - "GRT" 5'b10000, - "GEQ" 5'b10001, - "NEQ" 5'b10010, - "PAS" 5'b10011, - "SLT" 5'b10100, - "SLTU" 5'b10101, - "MULU" 5'b10110, - "DIVU" 5'b10111 - ; -L_0000000000a2ed40 .functor BUFZ 5, v000000000114da30_0, C4<00000>, C4<00000>, C4<00000>; -v000000000114d490_0 .net "A", 31 0, v000000000114cef0_0; alias, 1 drivers -v000000000114e610_0 .var "ALUCond", 0 0; -v000000000114d990_0 .net "ALUOp", 4 0, v000000000114da30_0; alias, 1 drivers -v000000000114eb10_0 .net "ALUOps", 4 0, L_0000000000a2ed40; 1 drivers -v000000000114d670_0 .var/s "ALURes", 31 0; -v000000000114e1b0_0 .net "B", 31 0, v00000000011b3310_0; 1 drivers -v000000000114dcb0_0 .net "shamt", 4 0, v000000000114e750_0; alias, 1 drivers -E_0000000001144ee0 .event edge, v000000000114eb10_0, v000000000114d490_0, v000000000114e1b0_0, v000000000114dcb0_0; -S_00000000009e9620 .scope module, "control" "mips_cpu_control" 4 90, 6 1 0, S_00000000009e80d0; - .timescale 0 0; - .port_info 0 /INPUT 32 "Instr"; - .port_info 1 /INPUT 1 "ALUCond"; - .port_info 2 /OUTPUT 2 "CtrlRegDst"; - .port_info 3 /OUTPUT 2 "CtrlPC"; - .port_info 4 /OUTPUT 1 "CtrlMemRead"; - .port_info 5 /OUTPUT 2 "CtrlMemtoReg"; - .port_info 6 /OUTPUT 5 "CtrlALUOp"; - .port_info 7 /OUTPUT 5 "Ctrlshamt"; - .port_info 8 /OUTPUT 1 "CtrlMemWrite"; - .port_info 9 /OUTPUT 1 "CtrlALUSrc"; - .port_info 10 /OUTPUT 1 "CtrlRegWrite"; -enum0000000000929b70 .enum4 (6) - "SPECIAL" 6'b000000, - "REGIMM" 6'b000001, - "J" 6'b000010, - "JAL" 6'b000011, - "BEQ" 6'b000100, - "BNE" 6'b000101, - "BLEZ" 6'b000110, - "BGTZ" 6'b000111, - "ADDI" 6'b001000, - "ADDIU" 6'b001001, - "SLTI" 6'b001010, - "SLTIU" 6'b001011, - "ANDI" 6'b001100, - "ORI" 6'b001101, - "XORI" 6'b001110, - "LUI" 6'b001111, - "LB" 6'b100000, - "LH" 6'b100001, - "LWL" 6'b100010, - "LW" 6'b100011, - "LBU" 6'b100100, - "LHU" 6'b100101, - "LWR" 6'b100110, - "SB" 6'b101000, - "SH" 6'b101001, - "SW" 6'b101011 - ; -enum000000000092bc30 .enum4 (6) - "SLL" 6'b000000, - "SRL" 6'b000010, - "SRA" 6'b000011, - "SLLV" 6'b000100, - "SRLV" 6'b000110, - "SRAV" 6'b000111, - "JR" 6'b001000, - "JALR" 6'b001001, - "MTHI" 6'b010001, - "MTLO" 6'b010011, - "MULT" 6'b011000, - "MULTU" 6'b011001, - "DIV" 6'b011010, - "DIVU" 6'b011011, - "ADDU" 6'b100001, - "SUBU" 6'b100011, - "AND" 6'b100100, - "OR" 6'b100101, - "XOR" 6'b100110, - "SLT" 6'b101010, - "SLTU" 6'b101011 - ; -enum000000000092be40 .enum4 (5) - "BLTZ" 5'b00000, - "BGEZ" 5'b00001, - "BLTZAL" 5'b10000, - "BGEZAL" 5'b10001 - ; -v000000000114e6b0_0 .net "ALUCond", 0 0, v000000000114e610_0; alias, 1 drivers -v000000000114da30_0 .var "CtrlALUOp", 4 0; -v000000000114ec50_0 .var "CtrlALUSrc", 0 0; -v000000000114e390_0 .var "CtrlMemRead", 0 0; -v000000000114ea70_0 .var "CtrlMemWrite", 0 0; -v000000000114dad0_0 .var "CtrlMemtoReg", 1 0; -v000000000114df30_0 .var "CtrlPC", 1 0; -v000000000114d210_0 .var "CtrlRegDst", 1 0; -v000000000114d2b0_0 .var "CtrlRegWrite", 0 0; -v000000000114e750_0 .var "Ctrlshamt", 4 0; -v000000000114d850_0 .net "Instr", 31 0, L_00000000011b6a10; alias, 1 drivers -v000000000114e930_0 .net "funct", 5 0, L_00000000011b66f0; 1 drivers -v000000000114cdb0_0 .net "op", 5 0, L_00000000011b6510; 1 drivers -v000000000114dfd0_0 .net "rt", 4 0, L_00000000011b5f70; 1 drivers -E_00000000011453a0/0 .event edge, v000000000114cdb0_0, v000000000114e930_0, v000000000114e610_0, v000000000114dfd0_0; -E_00000000011453a0/1 .event edge, v000000000114d850_0; -E_00000000011453a0 .event/or E_00000000011453a0/0, E_00000000011453a0/1; -L_00000000011b6510 .part L_00000000011b6a10, 26, 6; -L_00000000011b66f0 .part L_00000000011b6a10, 0, 6; -L_00000000011b5f70 .part L_00000000011b6a10, 16, 5; -S_00000000009e97b0 .scope module, "pc" "pc" 4 79, 7 1 0, S_00000000009e80d0; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "rst"; - .port_info 2 /INPUT 2 "pc_ctrl"; - .port_info 3 /INPUT 32 "pc_in"; - .port_info 4 /INPUT 5 "rs"; - .port_info 5 /OUTPUT 32 "pc_out"; - .port_info 6 /OUTPUT 1 "active"; -v000000000114ddf0_0 .var "active", 0 0; -v000000000114e7f0_0 .net "clk", 0 0, v00000000011b5e30_0; alias, 1 drivers -v000000000114db70_0 .net "pc_ctrl", 1 0, v000000000114df30_0; alias, 1 drivers -v000000000114ce50_0 .var "pc_curr", 31 0; -v000000000114e4d0_0 .net "pc_in", 31 0, v00000000011b4a30_0; 1 drivers -v000000000114e890_0 .var "pc_out", 31 0; -o000000000115d238 .functor BUFZ 5, C4; HiZ drive -v000000000114e070_0 .net "rs", 4 0, o000000000115d238; 0 drivers -v000000000114d350_0 .net "rst", 0 0, v00000000011b7410_0; alias, 1 drivers -E_00000000011454a0 .event posedge, v000000000114e7f0_0; -S_00000000009ce450 .scope module, "regfile" "mips_cpu_regfile" 4 106, 8 1 0, S_00000000009e80d0; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 5 "readreg1"; - .port_info 2 /INPUT 5 "readreg2"; - .port_info 3 /INPUT 5 "writereg"; - .port_info 4 /INPUT 32 "writedata"; - .port_info 5 /INPUT 1 "regwrite"; - .port_info 6 /INPUT 6 "opcode"; - .port_info 7 /OUTPUT 32 "readdata1"; - .port_info 8 /OUTPUT 32 "readdata2"; - .port_info 9 /OUTPUT 32 "regv0"; -v000000000114e570_2 .array/port v000000000114e570, 2; -L_0000000000a2e8e0 .functor BUFZ 32, v000000000114e570_2, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; -v000000000114dd50_0 .net "clk", 0 0, v00000000011b5e30_0; alias, 1 drivers -v000000000114e570 .array "memory", 0 31, 31 0; -v000000000114d8f0_0 .net "opcode", 5 0, L_00000000011b63d0; alias, 1 drivers -v000000000114cef0_0 .var "readdata1", 31 0; -v000000000114e250_0 .var "readdata2", 31 0; -v000000000114e2f0_0 .net "readreg1", 4 0, L_00000000011b5ed0; alias, 1 drivers -v000000000114e430_0 .net "readreg2", 4 0, L_00000000011b7190; alias, 1 drivers -v000000000114e9d0_0 .net "regv0", 31 0, L_0000000000a2e8e0; alias, 1 drivers -v000000000114d030_0 .net "regwrite", 0 0, v000000000114d2b0_0; alias, 1 drivers -v000000000114de90_0 .net "writedata", 31 0, v00000000011b3130_0; 1 drivers -v000000000114d0d0_0 .net "writereg", 4 0, v00000000011b31d0_0; 1 drivers -E_0000000001145da0 .event negedge, v000000000114e7f0_0; -v000000000114e570_0 .array/port v000000000114e570, 0; -v000000000114e570_1 .array/port v000000000114e570, 1; -E_0000000001145620/0 .event edge, v000000000114e2f0_0, v000000000114e570_0, v000000000114e570_1, v000000000114e570_2; -v000000000114e570_3 .array/port v000000000114e570, 3; -v000000000114e570_4 .array/port v000000000114e570, 4; -v000000000114e570_5 .array/port v000000000114e570, 5; -v000000000114e570_6 .array/port v000000000114e570, 6; -E_0000000001145620/1 .event edge, v000000000114e570_3, v000000000114e570_4, v000000000114e570_5, v000000000114e570_6; -v000000000114e570_7 .array/port v000000000114e570, 7; -v000000000114e570_8 .array/port v000000000114e570, 8; -v000000000114e570_9 .array/port v000000000114e570, 9; -v000000000114e570_10 .array/port v000000000114e570, 10; -E_0000000001145620/2 .event edge, v000000000114e570_7, v000000000114e570_8, v000000000114e570_9, v000000000114e570_10; -v000000000114e570_11 .array/port v000000000114e570, 11; -v000000000114e570_12 .array/port v000000000114e570, 12; -v000000000114e570_13 .array/port v000000000114e570, 13; -v000000000114e570_14 .array/port v000000000114e570, 14; -E_0000000001145620/3 .event edge, v000000000114e570_11, v000000000114e570_12, v000000000114e570_13, v000000000114e570_14; -v000000000114e570_15 .array/port v000000000114e570, 15; -v000000000114e570_16 .array/port v000000000114e570, 16; -v000000000114e570_17 .array/port v000000000114e570, 17; -v000000000114e570_18 .array/port v000000000114e570, 18; -E_0000000001145620/4 .event edge, v000000000114e570_15, v000000000114e570_16, v000000000114e570_17, v000000000114e570_18; -v000000000114e570_19 .array/port v000000000114e570, 19; -v000000000114e570_20 .array/port v000000000114e570, 20; -v000000000114e570_21 .array/port v000000000114e570, 21; -v000000000114e570_22 .array/port v000000000114e570, 22; -E_0000000001145620/5 .event edge, v000000000114e570_19, v000000000114e570_20, v000000000114e570_21, v000000000114e570_22; -v000000000114e570_23 .array/port v000000000114e570, 23; -v000000000114e570_24 .array/port v000000000114e570, 24; -v000000000114e570_25 .array/port v000000000114e570, 25; -v000000000114e570_26 .array/port v000000000114e570, 26; -E_0000000001145620/6 .event edge, v000000000114e570_23, v000000000114e570_24, v000000000114e570_25, v000000000114e570_26; -v000000000114e570_27 .array/port v000000000114e570, 27; -v000000000114e570_28 .array/port v000000000114e570, 28; -v000000000114e570_29 .array/port v000000000114e570, 29; -v000000000114e570_30 .array/port v000000000114e570, 30; -E_0000000001145620/7 .event edge, v000000000114e570_27, v000000000114e570_28, v000000000114e570_29, v000000000114e570_30; -v000000000114e570_31 .array/port v000000000114e570, 31; -E_0000000001145620/8 .event edge, v000000000114e570_31, v000000000114e430_0; -E_0000000001145620 .event/or E_0000000001145620/0, E_0000000001145620/1, E_0000000001145620/2, E_0000000001145620/3, E_0000000001145620/4, E_0000000001145620/5, E_0000000001145620/6, E_0000000001145620/7, E_0000000001145620/8; -S_00000000009ce5e0 .scope begin, "$unm_blk_124" "$unm_blk_124" 8 16, 8 16 0, S_00000000009ce450; - .timescale 0 0; -v000000000114e110_0 .var/i "i", 31 0; -S_00000000009928e0 .scope module, "ramInst" "mips_cpu_memory" 3 10, 9 1 0, S_00000000009e7f40; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 32 "data_address"; - .port_info 2 /INPUT 1 "data_write"; - .port_info 3 /INPUT 1 "data_read"; - .port_info 4 /INPUT 32 "data_writedata"; - .port_info 5 /OUTPUT 32 "data_readdata"; - .port_info 6 /INPUT 32 "instr_address"; - .port_info 7 /OUTPUT 32 "instr_readdata"; -P_00000000009f7d10 .param/str "MEM_INIT_FILE" 0 9 17, "inputs/addiu.data.txt"; -P_00000000009f7d48 .param/str "RAM_INIT_FILE" 0 9 16, "inputs/addiu.txt"; -L_0000000000a2e790 .functor AND 1, L_00000000011b6330, L_00000000011b5cf0, C4<1>, C4<1>; -v00000000011b4030_0 .net *"_ivl_0", 31 0, L_00000000011b74b0; 1 drivers -L_00000000011b7bc0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v00000000011b3770_0 .net *"_ivl_10", 1 0, L_00000000011b7bc0; 1 drivers -L_00000000011b7c08 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v00000000011b3810_0 .net *"_ivl_12", 31 0, L_00000000011b7c08; 1 drivers -L_00000000011b7c50 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v00000000011b4490_0 .net/2u *"_ivl_16", 31 0, L_00000000011b7c50; 1 drivers -v00000000011b3950_0 .net *"_ivl_18", 0 0, L_00000000011b6330; 1 drivers -L_00000000011b7b78 .functor BUFT 1, C4<00000000000000000001000000000000>, C4<0>, C4<0>, C4<0>; -v00000000011b3590_0 .net/2u *"_ivl_2", 31 0, L_00000000011b7b78; 1 drivers -L_00000000011b7c98 .functor BUFT 1, C4<10111111110000000000000001000000>, C4<0>, C4<0>, C4<0>; -v00000000011b3bd0_0 .net/2u *"_ivl_20", 31 0, L_00000000011b7c98; 1 drivers -v00000000011b39f0_0 .net *"_ivl_22", 0 0, L_00000000011b5cf0; 1 drivers -v00000000011b3a90_0 .net *"_ivl_25", 0 0, L_0000000000a2e790; 1 drivers -v00000000011b3b30_0 .net *"_ivl_26", 31 0, L_00000000011b75f0; 1 drivers -L_00000000011b7ce0 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v00000000011b2ff0_0 .net/2u *"_ivl_28", 31 0, L_00000000011b7ce0; 1 drivers -v00000000011b4210_0 .net *"_ivl_30", 31 0, L_00000000011b65b0; 1 drivers -v00000000011b3c70_0 .net *"_ivl_32", 31 0, L_00000000011b6c90; 1 drivers -v00000000011b3090_0 .net *"_ivl_34", 29 0, L_00000000011b6dd0; 1 drivers -L_00000000011b7d28 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v00000000011b3db0_0 .net *"_ivl_36", 1 0, L_00000000011b7d28; 1 drivers -L_00000000011b7d70 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v00000000011b48f0_0 .net *"_ivl_38", 31 0, L_00000000011b7d70; 1 drivers -v00000000011b4350_0 .net *"_ivl_4", 31 0, L_00000000011b6970; 1 drivers -v00000000011b4670_0 .net *"_ivl_6", 31 0, L_00000000011b6e70; 1 drivers -v00000000011b4990_0 .net *"_ivl_8", 29 0, L_00000000011b6650; 1 drivers -v00000000011b2eb0_0 .net "clk", 0 0, v00000000011b5e30_0; alias, 1 drivers -v00000000011b2f50_0 .net "data_address", 31 0, v000000000114d530_0; alias, 1 drivers -v00000000011b5d90 .array "data_memory", 63 0, 31 0; -v00000000011b68d0_0 .net "data_read", 0 0, v000000000114d5d0_0; alias, 1 drivers -v00000000011b72d0_0 .net "data_readdata", 31 0, L_00000000011b5c50; alias, 1 drivers -v00000000011b6bf0_0 .net "data_write", 0 0, v0000000000973870_0; alias, 1 drivers -v00000000011b60b0_0 .net "data_writedata", 31 0, v00000000011b3e50_0; alias, 1 drivers -v00000000011b6150_0 .net "instr_address", 31 0, v00000000011b2b90_0; alias, 1 drivers -v00000000011b6f10 .array "instr_memory", 63 0, 31 0; -v00000000011b6fb0_0 .net "instr_readdata", 31 0, L_00000000011b6a10; alias, 1 drivers -L_00000000011b74b0 .array/port v00000000011b5d90, L_00000000011b6e70; -L_00000000011b6970 .arith/sub 32, v000000000114d530_0, L_00000000011b7b78; -L_00000000011b6650 .part L_00000000011b6970, 2, 30; -L_00000000011b6e70 .concat [ 30 2 0 0], L_00000000011b6650, L_00000000011b7bc0; -L_00000000011b5c50 .functor MUXZ 32, L_00000000011b7c08, L_00000000011b74b0, v000000000114d5d0_0, C4<>; -L_00000000011b6330 .cmp/ge 32, v00000000011b2b90_0, L_00000000011b7c50; -L_00000000011b5cf0 .cmp/gt 32, L_00000000011b7c98, v00000000011b2b90_0; -L_00000000011b75f0 .array/port v00000000011b6f10, L_00000000011b6c90; -L_00000000011b65b0 .arith/sub 32, v00000000011b2b90_0, L_00000000011b7ce0; -L_00000000011b6dd0 .part L_00000000011b65b0, 2, 30; -L_00000000011b6c90 .concat [ 30 2 0 0], L_00000000011b6dd0, L_00000000011b7d28; -L_00000000011b6a10 .functor MUXZ 32, L_00000000011b7d70, L_00000000011b75f0, L_0000000000a2e790, C4<>; -S_000000000097ae90 .scope begin, "$unm_blk_104" "$unm_blk_104" 9 21, 9 21 0, S_00000000009928e0; - .timescale 0 0; -v00000000011b2d70_0 .var/i "i", 31 0; -S_000000000097b020 .scope begin, "$ivl_for_loop0" "$ivl_for_loop0" 9 36, 9 36 0, S_000000000097ae90; - .timescale 0 0; -v00000000011b4710_0 .var/i "j", 31 0; -S_000000000097b1b0 .scope begin, "$ivl_for_loop1" "$ivl_for_loop1" 9 47, 9 47 0, S_000000000097ae90; - .timescale 0 0; -v00000000011b2c30_0 .var/i "k", 31 0; - .scope S_00000000009928e0; -T_0 ; - %fork t_1, S_000000000097ae90; - %jmp t_0; - .scope S_000000000097ae90; -t_1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000011b2d70_0, 0, 32; -T_0.0 ; - %load/vec4 v00000000011b2d70_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v00000000011b2d70_0; - %store/vec4a v00000000011b5d90, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000011b2d70_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000011b2d70_0, 0, 32; - %jmp T_0.0; -T_0.1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000011b2d70_0, 0, 32; -T_0.2 ; - %load/vec4 v00000000011b2d70_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.3, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v00000000011b2d70_0; - %store/vec4a v00000000011b6f10, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000011b2d70_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000011b2d70_0, 0, 32; - %jmp T_0.2; -T_0.3 ; - %vpi_call/w 9 32 "$display", "RAM: Loading RAM contents from %s", P_00000000009f7d48 {0 0 0}; - %vpi_call/w 9 33 "$readmemh", P_00000000009f7d48, v00000000011b6f10 {0 0 0}; - %fork t_3, S_000000000097b020; - %jmp t_2; - .scope S_000000000097b020; -t_3 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000011b4710_0, 0, 32; -T_0.4 ; - %load/vec4 v00000000011b4710_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.5, 5; - %pushi/vec4 3217031168, 0, 32; - %load/vec4 v00000000011b4710_0; - %muli 4, 0, 32; - %add; - %vpi_call/w 9 37 "$display", "byte +%h: %h", S<0,vec4,u32>, &A {1 0 0}; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000011b4710_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000011b4710_0, 0, 32; - %jmp T_0.4; -T_0.5 ; - %end; - .scope S_000000000097ae90; -t_2 %join; - %vpi_call/w 9 41 "$display", "MEM: Loading MEM contents from %s", P_00000000009f7d10 {0 0 0}; - %vpi_call/w 9 42 "$readmemh", P_00000000009f7d10, v00000000011b5d90 {0 0 0}; - %fork t_5, S_000000000097b1b0; - %jmp t_4; - .scope S_000000000097b1b0; -t_5 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000011b2c30_0, 0, 32; -T_0.6 ; - %load/vec4 v00000000011b2c30_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.7, 5; - %pushi/vec4 4096, 0, 32; - %load/vec4 v00000000011b2c30_0; - %muli 4, 0, 32; - %add; - %vpi_call/w 9 48 "$display", "byte +%h: %h", S<0,vec4,u32>, &A {1 0 0}; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000011b2c30_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000011b2c30_0, 0, 32; - %jmp T_0.6; -T_0.7 ; - %end; - .scope S_000000000097ae90; -t_4 %join; - %end; - .scope S_00000000009928e0; -t_0 %join; - %end; - .thread T_0; - .scope S_00000000009928e0; -T_1 ; - %wait E_00000000011454a0; - %load/vec4 v00000000011b68d0_0; - %nor/r; - %load/vec4 v00000000011b6bf0_0; - %and; - %flag_set/vec4 8; - %jmp/0xz T_1.0, 8; - %load/vec4 v00000000011b6150_0; - %load/vec4 v00000000011b2f50_0; - %cmp/ne; - %jmp/0xz T_1.2, 4; - %load/vec4 v00000000011b60b0_0; - %load/vec4 v00000000011b2f50_0; - %ix/load 4, 2, 0; - %flag_set/imm 4, 0; - %shiftr 4; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011b5d90, 0, 4; -T_1.2 ; -T_1.0 ; - %jmp T_1; - .thread T_1; - .scope S_00000000009e97b0; -T_2 ; - %load/vec4 v000000000114e4d0_0; - %store/vec4 v000000000114e890_0, 0, 32; - %end; - .thread T_2; - .scope S_00000000009e97b0; -T_3 ; - %wait E_00000000011454a0; - %load/vec4 v000000000114d350_0; - %flag_set/vec4 8; - %jmp/0xz T_3.0, 8; - %pushi/vec4 1, 0, 1; - %assign/vec4 v000000000114ddf0_0, 0; - %pushi/vec4 3217031168, 0, 32; - %assign/vec4 v000000000114e890_0, 0; - %jmp T_3.1; -T_3.0 ; - %load/vec4 v000000000114e890_0; - %cmpi/ne 0, 0, 32; - %jmp/0xz T_3.2, 4; - %load/vec4 v000000000114ddf0_0; - %assign/vec4 v000000000114ddf0_0, 0; - %load/vec4 v000000000114db70_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_3.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_3.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_3.6, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_3.7, 6; - %jmp T_3.8; -T_3.4 ; - %load/vec4 v000000000114e890_0; - %assign/vec4 v000000000114ce50_0, 0; - %load/vec4 v000000000114ce50_0; - %addi 4, 0, 32; - %assign/vec4 v000000000114e890_0, 0; - %vpi_call/w 7 27 "$display", "New PC from %h to %h", v000000000114ce50_0, v000000000114e890_0 {0 0 0}; - %jmp T_3.8; -T_3.5 ; - %load/vec4 v000000000114e4d0_0; - %assign/vec4 v000000000114e890_0, 0; - %jmp T_3.8; -T_3.6 ; - %load/vec4 v000000000114e4d0_0; - %assign/vec4 v000000000114e890_0, 0; - %jmp T_3.8; -T_3.7 ; - %vpi_call/w 7 36 "$display", "JUMP REGISTER" {0 0 0}; - %pushi/vec4 0, 0, 32; - %assign/vec4 v000000000114e890_0, 0; - %jmp T_3.8; -T_3.8 ; - %pop/vec4 1; - %jmp T_3.3; -T_3.2 ; - %load/vec4 v000000000114e890_0; - %cmpi/e 0, 0, 32; - %jmp/0xz T_3.9, 4; - %pushi/vec4 0, 0, 1; - %assign/vec4 v000000000114ddf0_0, 0; -T_3.9 ; -T_3.3 ; -T_3.1 ; - %jmp T_3; - .thread T_3; - .scope S_00000000009e9620; -T_4 ; - %wait E_00000000011453a0; - %vpi_call/w 6 86 "$display", "Opcode: %h", v000000000114cdb0_0 {0 0 0}; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.0, 4; - %pushi/vec4 0, 0, 2; - %store/vec4 v000000000114d210_0, 0, 2; - %vpi_call/w 6 89 "$display", "CTRLREGDST: Rt" {0 0 0}; - %jmp T_4.1; -T_4.0 ; - %load/vec4 v000000000114cdb0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114e930_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114e930_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.2, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v000000000114d210_0, 0, 2; - %vpi_call/w 6 92 "$display", "CTRLREGDST: Rd" {0 0 0}; - %jmp T_4.3; -T_4.2 ; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 3, 0, 6; - %jmp/0xz T_4.4, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v000000000114d210_0, 0, 2; - %vpi_call/w 6 95 "$display", "CTRLREGDST: Link" {0 0 0}; - %jmp T_4.5; -T_4.4 ; - %pushi/vec4 1, 1, 2; - %store/vec4 v000000000114d210_0, 0, 2; - %vpi_call/w 6 96 "$display", "xxxxxxxxxxxxxx" {0 0 0}; -T_4.5 ; -T_4.3 ; -T_4.1 ; - %load/vec4 v000000000114e6b0_0; - %load/vec4 v000000000114cdb0_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114cdb0_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114cdb0_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114cdb0_0; - %pushi/vec4 5, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114cdb0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114dfd0_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114dfd0_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114dfd0_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114dfd0_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.6, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v000000000114df30_0, 0, 2; - %jmp T_4.7; -T_4.6 ; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 2, 0, 6; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 3, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.8, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v000000000114df30_0, 0, 2; - %jmp T_4.9; -T_4.8 ; - %load/vec4 v000000000114e930_0; - %cmpi/e 8, 0, 6; - %flag_mov 8, 4; - %load/vec4 v000000000114e930_0; - %cmpi/e 9, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.10, 4; - %pushi/vec4 3, 0, 2; - %store/vec4 v000000000114df30_0, 0, 2; - %jmp T_4.11; -T_4.10 ; - %pushi/vec4 0, 0, 2; - %store/vec4 v000000000114df30_0, 0, 2; -T_4.11 ; -T_4.9 ; -T_4.7 ; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.12, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000114e390_0, 0, 1; - %pushi/vec4 1, 0, 2; - %store/vec4 v000000000114dad0_0, 0, 2; - %vpi_call/w 6 112 "$display", "Memory read enabled" {0 0 0}; - %jmp T_4.13; -T_4.12 ; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114e930_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114e930_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.14, 9; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000114e390_0, 0, 1; - %pushi/vec4 0, 0, 2; - %store/vec4 v000000000114dad0_0, 0, 2; - %vpi_call/w 6 116 "$display", "Memory read disabled" {0 0 0}; - %jmp T_4.15; -T_4.14 ; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 3, 0, 6; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114e930_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.16, 9; - %pushi/vec4 2, 0, 2; - %store/vec4 v000000000114dad0_0, 0, 2; - %jmp T_4.17; -T_4.16 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v000000000114e390_0, 0, 1; -T_4.17 ; -T_4.15 ; -T_4.13 ; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114e930_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.18, 9; - %pushi/vec4 0, 0, 5; - %store/vec4 v000000000114da30_0, 0, 5; - %vpi_call/w 6 124 "$display", "ALU OP = 0 (ADDU/ADDIU)" {0 0 0}; - %jmp T_4.19; -T_4.18 ; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 12, 0, 6; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114e930_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.20, 9; - %pushi/vec4 4, 0, 5; - %store/vec4 v000000000114da30_0, 0, 5; - %jmp T_4.21; -T_4.20 ; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 4, 0, 6; - %jmp/0xz T_4.22, 4; - %pushi/vec4 13, 0, 5; - %store/vec4 v000000000114da30_0, 0, 5; - %jmp T_4.23; -T_4.22 ; - %load/vec4 v000000000114cdb0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114dfd0_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114dfd0_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.24, 8; - %pushi/vec4 17, 0, 5; - %store/vec4 v000000000114da30_0, 0, 5; - %jmp T_4.25; -T_4.24 ; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 7, 0, 6; - %jmp/0xz T_4.26, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v000000000114da30_0, 0, 5; - %jmp T_4.27; -T_4.26 ; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 6, 0, 6; - %jmp/0xz T_4.28, 4; - %pushi/vec4 15, 0, 5; - %store/vec4 v000000000114da30_0, 0, 5; - %jmp T_4.29; -T_4.28 ; - %load/vec4 v000000000114cdb0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114dfd0_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114dfd0_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.30, 8; - %pushi/vec4 14, 0, 5; - %store/vec4 v000000000114da30_0, 0, 5; - %jmp T_4.31; -T_4.30 ; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 5, 0, 6; - %jmp/0xz T_4.32, 4; - %pushi/vec4 18, 0, 5; - %store/vec4 v000000000114da30_0, 0, 5; - %jmp T_4.33; -T_4.32 ; - %load/vec4 v000000000114cdb0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114e930_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.34, 8; - %pushi/vec4 3, 0, 5; - %store/vec4 v000000000114da30_0, 0, 5; - %jmp T_4.35; -T_4.34 ; - %load/vec4 v000000000114cdb0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114e930_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.36, 8; - %pushi/vec4 23, 0, 5; - %store/vec4 v000000000114da30_0, 0, 5; - %jmp T_4.37; -T_4.36 ; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.38, 4; - %pushi/vec4 0, 0, 5; - %store/vec4 v000000000114da30_0, 0, 5; - %jmp T_4.39; -T_4.38 ; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.40, 4; - %pushi/vec4 7, 0, 5; - %store/vec4 v000000000114da30_0, 0, 5; - %jmp T_4.41; -T_4.40 ; - %load/vec4 v000000000114cdb0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114e930_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114e930_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.42, 8; - %pushi/vec4 19, 0, 5; - %store/vec4 v000000000114da30_0, 0, 5; - %jmp T_4.43; -T_4.42 ; - %load/vec4 v000000000114cdb0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114e930_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.44, 8; - %pushi/vec4 2, 0, 5; - %store/vec4 v000000000114da30_0, 0, 5; - %jmp T_4.45; -T_4.44 ; - %load/vec4 v000000000114cdb0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114e930_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.46, 8; - %pushi/vec4 22, 0, 5; - %store/vec4 v000000000114da30_0, 0, 5; - %jmp T_4.47; -T_4.46 ; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 13, 0, 6; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114e930_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.48, 9; - %pushi/vec4 5, 0, 5; - %store/vec4 v000000000114da30_0, 0, 5; - %jmp T_4.49; -T_4.48 ; - %load/vec4 v000000000114cdb0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114e930_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.50, 8; - %pushi/vec4 7, 0, 5; - %store/vec4 v000000000114da30_0, 0, 5; - %jmp T_4.51; -T_4.50 ; - %load/vec4 v000000000114cdb0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114e930_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.52, 8; - %pushi/vec4 8, 0, 5; - %store/vec4 v000000000114da30_0, 0, 5; - %jmp T_4.53; -T_4.52 ; - %load/vec4 v000000000114cdb0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114e930_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.54, 8; - %pushi/vec4 11, 0, 5; - %store/vec4 v000000000114da30_0, 0, 5; - %jmp T_4.55; -T_4.54 ; - %load/vec4 v000000000114cdb0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114e930_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.56, 8; - %pushi/vec4 12, 0, 5; - %store/vec4 v000000000114da30_0, 0, 5; - %jmp T_4.57; -T_4.56 ; - %load/vec4 v000000000114cdb0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114e930_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.58, 8; - %pushi/vec4 9, 0, 5; - %store/vec4 v000000000114da30_0, 0, 5; - %jmp T_4.59; -T_4.58 ; - %load/vec4 v000000000114cdb0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114e930_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.60, 8; - %pushi/vec4 10, 0, 5; - %store/vec4 v000000000114da30_0, 0, 5; - %jmp T_4.61; -T_4.60 ; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 10, 0, 6; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114e930_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.62, 9; - %pushi/vec4 20, 0, 5; - %store/vec4 v000000000114da30_0, 0, 5; - %jmp T_4.63; -T_4.62 ; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 11, 0, 6; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114e930_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.64, 9; - %pushi/vec4 21, 0, 5; - %store/vec4 v000000000114da30_0, 0, 5; - %jmp T_4.65; -T_4.64 ; - %load/vec4 v000000000114cdb0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114e930_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.66, 8; - %pushi/vec4 1, 0, 5; - %store/vec4 v000000000114da30_0, 0, 5; - %jmp T_4.67; -T_4.66 ; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 14, 0, 6; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114e930_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.68, 9; - %pushi/vec4 6, 0, 5; - %store/vec4 v000000000114da30_0, 0, 5; - %vpi_call/w 6 175 "$display", "ALU Op = 6 (XOR)" {0 0 0}; - %jmp T_4.69; -T_4.68 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v000000000114da30_0, 0, 5; -T_4.69 ; -T_4.67 ; -T_4.65 ; -T_4.63 ; -T_4.61 ; -T_4.59 ; -T_4.57 ; -T_4.55 ; -T_4.53 ; -T_4.51 ; -T_4.49 ; -T_4.47 ; -T_4.45 ; -T_4.43 ; -T_4.41 ; -T_4.39 ; -T_4.37 ; -T_4.35 ; -T_4.33 ; -T_4.31 ; -T_4.29 ; -T_4.27 ; -T_4.25 ; -T_4.23 ; -T_4.21 ; -T_4.19 ; - %load/vec4 v000000000114cdb0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114e930_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114e930_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.70, 8; - %load/vec4 v000000000114d850_0; - %parti/s 5, 6, 4; - %store/vec4 v000000000114e750_0, 0, 5; - %jmp T_4.71; -T_4.70 ; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.72, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v000000000114e750_0, 0, 5; - %jmp T_4.73; -T_4.72 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v000000000114e750_0, 0, 5; -T_4.73 ; -T_4.71 ; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 40, 0, 6; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.74, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000114ea70_0, 0, 1; - %jmp T_4.75; -T_4.74 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000114ea70_0, 0, 1; -T_4.75 ; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.76, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000114ec50_0, 0, 1; - %jmp T_4.77; -T_4.76 ; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 4, 0, 6; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 7, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 6, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 5, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114e930_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114e930_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %load/vec4 v000000000114cdb0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114dfd0_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114dfd0_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114dfd0_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114dfd0_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %flag_or 8, 9; - %jmp/0xz T_4.78, 8; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000114ec50_0, 0, 1; - %jmp T_4.79; -T_4.78 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v000000000114ec50_0, 0, 1; -T_4.79 ; -T_4.77 ; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v000000000114cdb0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114e930_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000114e930_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000114e930_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.80, 9; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000114d2b0_0, 0, 1; - %jmp T_4.81; -T_4.80 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000114d2b0_0, 0, 1; -T_4.81 ; - %jmp T_4; - .thread T_4, $push; - .scope S_00000000009ce450; -T_5 ; - %fork t_7, S_00000000009ce5e0; - %jmp t_6; - .scope S_00000000009ce5e0; -t_7 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v000000000114e110_0, 0, 32; -T_5.0 ; - %load/vec4 v000000000114e110_0; - %cmpi/s 32, 0, 32; - %jmp/0xz T_5.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v000000000114e110_0; - %store/vec4a v000000000114e570, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v000000000114e110_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v000000000114e110_0, 0, 32; - %jmp T_5.0; -T_5.1 ; - %end; - .scope S_00000000009ce450; -t_6 %join; - %end; - .thread T_5; - .scope S_00000000009ce450; -T_6 ; -Ewait_0 .event/or E_0000000001145620, E_0x0; - %wait Ewait_0; - %load/vec4 v000000000114e2f0_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v000000000114e570, 4; - %store/vec4 v000000000114cef0_0, 0, 32; - %load/vec4 v000000000114e430_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v000000000114e570, 4; - %store/vec4 v000000000114e250_0, 0, 32; - %jmp T_6; - .thread T_6, $push; - .scope S_00000000009ce450; -T_7 ; - %wait E_0000000001145da0; - %load/vec4 v000000000114d0d0_0; - %cmpi/e 0, 0, 5; - %jmp/0xz T_7.0, 4; - %jmp T_7.1; -T_7.0 ; - %load/vec4 v000000000114d030_0; - %flag_set/vec4 8; - %jmp/0xz T_7.2, 8; - %load/vec4 v000000000114d8f0_0; - %dup/vec4; - %pushi/vec4 32, 0, 6; - %cmp/u; - %jmp/1 T_7.4, 6; - %dup/vec4; - %pushi/vec4 36, 0, 6; - %cmp/u; - %jmp/1 T_7.5, 6; - %dup/vec4; - %pushi/vec4 33, 0, 6; - %cmp/u; - %jmp/1 T_7.6, 6; - %dup/vec4; - %pushi/vec4 37, 0, 6; - %cmp/u; - %jmp/1 T_7.7, 6; - %dup/vec4; - %pushi/vec4 34, 0, 6; - %cmp/u; - %jmp/1 T_7.8, 6; - %dup/vec4; - %pushi/vec4 38, 0, 6; - %cmp/u; - %jmp/1 T_7.9, 6; - %load/vec4 v000000000114de90_0; - %load/vec4 v000000000114d0d0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000114e570, 0, 4; - %jmp T_7.11; -T_7.4 ; - %load/vec4 v000000000114cef0_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.12, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.13, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.14, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.15, 6; - %jmp T_7.16; -T_7.12 ; - %load/vec4 v000000000114de90_0; - %parti/s 1, 7, 4; - %replicate 24; - %load/vec4 v000000000114de90_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000114d0d0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000114e570, 0, 4; - %jmp T_7.16; -T_7.13 ; - %load/vec4 v000000000114de90_0; - %parti/s 1, 15, 5; - %replicate 24; - %load/vec4 v000000000114de90_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000114d0d0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000114e570, 0, 4; - %jmp T_7.16; -T_7.14 ; - %load/vec4 v000000000114de90_0; - %parti/s 1, 23, 6; - %replicate 24; - %load/vec4 v000000000114de90_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000114d0d0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000114e570, 0, 4; - %jmp T_7.16; -T_7.15 ; - %load/vec4 v000000000114de90_0; - %parti/s 1, 31, 6; - %replicate 24; - %load/vec4 v000000000114de90_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000114d0d0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000114e570, 0, 4; - %jmp T_7.16; -T_7.16 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.5 ; - %load/vec4 v000000000114cef0_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.17, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.18, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.19, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.20, 6; - %jmp T_7.21; -T_7.17 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v000000000114de90_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000114d0d0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000114e570, 0, 4; - %jmp T_7.21; -T_7.18 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v000000000114de90_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000114d0d0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000114e570, 0, 4; - %jmp T_7.21; -T_7.19 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v000000000114de90_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000114d0d0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000114e570, 0, 4; - %jmp T_7.21; -T_7.20 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v000000000114de90_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000114d0d0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000114e570, 0, 4; - %jmp T_7.21; -T_7.21 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.6 ; - %load/vec4 v000000000114cef0_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.22, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.23, 6; - %jmp T_7.24; -T_7.22 ; - %load/vec4 v000000000114de90_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v000000000114de90_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000114d0d0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000114e570, 0, 4; - %jmp T_7.24; -T_7.23 ; - %load/vec4 v000000000114de90_0; - %parti/s 1, 31, 6; - %replicate 16; - %load/vec4 v000000000114de90_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000114d0d0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000114e570, 0, 4; - %jmp T_7.24; -T_7.24 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.7 ; - %load/vec4 v000000000114cef0_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.25, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.26, 6; - %jmp T_7.27; -T_7.25 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v000000000114de90_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000114d0d0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000114e570, 0, 4; - %jmp T_7.27; -T_7.26 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v000000000114de90_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000114d0d0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000114e570, 0, 4; - %jmp T_7.27; -T_7.27 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.8 ; - %load/vec4 v000000000114cef0_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.28, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.29, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.30, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.31, 6; - %jmp T_7.32; -T_7.28 ; - %load/vec4 v000000000114de90_0; - %parti/s 8, 0, 2; - %load/vec4 v000000000114d0d0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 24, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v000000000114e570, 4, 5; - %jmp T_7.32; -T_7.29 ; - %load/vec4 v000000000114de90_0; - %parti/s 16, 0, 2; - %load/vec4 v000000000114d0d0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 16, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v000000000114e570, 4, 5; - %jmp T_7.32; -T_7.30 ; - %load/vec4 v000000000114de90_0; - %parti/s 24, 0, 2; - %load/vec4 v000000000114d0d0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 8, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v000000000114e570, 4, 5; - %jmp T_7.32; -T_7.31 ; - %load/vec4 v000000000114de90_0; - %load/vec4 v000000000114d0d0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000114e570, 0, 4; - %jmp T_7.32; -T_7.32 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.9 ; - %load/vec4 v000000000114cef0_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.33, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.34, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.35, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.36, 6; - %jmp T_7.37; -T_7.33 ; - %load/vec4 v000000000114de90_0; - %load/vec4 v000000000114d0d0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000114e570, 0, 4; - %jmp T_7.37; -T_7.34 ; - %load/vec4 v000000000114de90_0; - %parti/s 24, 8, 5; - %load/vec4 v000000000114d0d0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000114e570, 0, 4; - %jmp T_7.37; -T_7.35 ; - %load/vec4 v000000000114de90_0; - %parti/s 16, 16, 6; - %load/vec4 v000000000114d0d0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000114e570, 0, 4; - %jmp T_7.37; -T_7.36 ; - %load/vec4 v000000000114de90_0; - %parti/s 8, 24, 6; - %load/vec4 v000000000114d0d0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000114e570, 0, 4; - %jmp T_7.37; -T_7.37 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.11 ; - %pop/vec4 1; -T_7.2 ; -T_7.1 ; - %jmp T_7; - .thread T_7; - .scope S_00000000009e9490; -T_8 ; -Ewait_1 .event/or E_0000000001144ee0, E_0x0; - %wait Ewait_1; - %load/vec4 v000000000114eb10_0; - %dup/vec4; - %pushi/vec4 0, 0, 5; - %cmp/u; - %jmp/1 T_8.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 5; - %cmp/u; - %jmp/1 T_8.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 5; - %cmp/u; - %jmp/1 T_8.2, 6; - %dup/vec4; - %pushi/vec4 3, 0, 5; - %cmp/u; - %jmp/1 T_8.3, 6; - %dup/vec4; - %pushi/vec4 4, 0, 5; - %cmp/u; - %jmp/1 T_8.4, 6; - %dup/vec4; - %pushi/vec4 5, 0, 5; - %cmp/u; - %jmp/1 T_8.5, 6; - %dup/vec4; - %pushi/vec4 6, 0, 5; - %cmp/u; - %jmp/1 T_8.6, 6; - %dup/vec4; - %pushi/vec4 7, 0, 5; - %cmp/u; - %jmp/1 T_8.7, 6; - %dup/vec4; - %pushi/vec4 8, 0, 5; - %cmp/u; - %jmp/1 T_8.8, 6; - %dup/vec4; - %pushi/vec4 9, 0, 5; - %cmp/u; - %jmp/1 T_8.9, 6; - %dup/vec4; - %pushi/vec4 10, 0, 5; - %cmp/u; - %jmp/1 T_8.10, 6; - %dup/vec4; - %pushi/vec4 11, 0, 5; - %cmp/u; - %jmp/1 T_8.11, 6; - %dup/vec4; - %pushi/vec4 12, 0, 5; - %cmp/u; - %jmp/1 T_8.12, 6; - %dup/vec4; - %pushi/vec4 13, 0, 5; - %cmp/u; - %jmp/1 T_8.13, 6; - %dup/vec4; - %pushi/vec4 14, 0, 5; - %cmp/u; - %jmp/1 T_8.14, 6; - %dup/vec4; - %pushi/vec4 15, 0, 5; - %cmp/u; - %jmp/1 T_8.15, 6; - %dup/vec4; - %pushi/vec4 16, 0, 5; - %cmp/u; - %jmp/1 T_8.16, 6; - %dup/vec4; - %pushi/vec4 17, 0, 5; - %cmp/u; - %jmp/1 T_8.17, 6; - %dup/vec4; - %pushi/vec4 18, 0, 5; - %cmp/u; - %jmp/1 T_8.18, 6; - %dup/vec4; - %pushi/vec4 19, 0, 5; - %cmp/u; - %jmp/1 T_8.19, 6; - %dup/vec4; - %pushi/vec4 20, 0, 5; - %cmp/u; - %jmp/1 T_8.20, 6; - %dup/vec4; - %pushi/vec4 21, 0, 5; - %cmp/u; - %jmp/1 T_8.21, 6; - %dup/vec4; - %pushi/vec4 22, 0, 5; - %cmp/u; - %jmp/1 T_8.22, 6; - %dup/vec4; - %pushi/vec4 23, 0, 5; - %cmp/u; - %jmp/1 T_8.23, 6; - %jmp T_8.24; -T_8.0 ; - %load/vec4 v000000000114d490_0; - %load/vec4 v000000000114e1b0_0; - %add; - %store/vec4 v000000000114d670_0, 0, 32; - %jmp T_8.24; -T_8.1 ; - %load/vec4 v000000000114d490_0; - %load/vec4 v000000000114e1b0_0; - %sub; - %store/vec4 v000000000114d670_0, 0, 32; - %jmp T_8.24; -T_8.2 ; - %load/vec4 v000000000114d490_0; - %load/vec4 v000000000114e1b0_0; - %mul; - %store/vec4 v000000000114d670_0, 0, 32; - %jmp T_8.24; -T_8.3 ; - %load/vec4 v000000000114d490_0; - %load/vec4 v000000000114e1b0_0; - %div/s; - %store/vec4 v000000000114d670_0, 0, 32; - %jmp T_8.24; -T_8.4 ; - %load/vec4 v000000000114d490_0; - %load/vec4 v000000000114e1b0_0; - %and; - %store/vec4 v000000000114d670_0, 0, 32; - %jmp T_8.24; -T_8.5 ; - %load/vec4 v000000000114d490_0; - %load/vec4 v000000000114e1b0_0; - %or; - %store/vec4 v000000000114d670_0, 0, 32; - %jmp T_8.24; -T_8.6 ; - %load/vec4 v000000000114d490_0; - %load/vec4 v000000000114e1b0_0; - %xor; - %store/vec4 v000000000114d670_0, 0, 32; - %jmp T_8.24; -T_8.7 ; - %load/vec4 v000000000114e1b0_0; - %ix/getv 4, v000000000114dcb0_0; - %shiftl 4; - %store/vec4 v000000000114d670_0, 0, 32; - %jmp T_8.24; -T_8.8 ; - %load/vec4 v000000000114e1b0_0; - %ix/getv 4, v000000000114d490_0; - %shiftl 4; - %store/vec4 v000000000114d670_0, 0, 32; - %jmp T_8.24; -T_8.9 ; - %load/vec4 v000000000114e1b0_0; - %ix/getv 4, v000000000114dcb0_0; - %shiftr 4; - %store/vec4 v000000000114d670_0, 0, 32; - %jmp T_8.24; -T_8.10 ; - %load/vec4 v000000000114e1b0_0; - %ix/getv 4, v000000000114d490_0; - %shiftr 4; - %store/vec4 v000000000114d670_0, 0, 32; - %jmp T_8.24; -T_8.11 ; - %load/vec4 v000000000114e1b0_0; - %ix/getv 4, v000000000114dcb0_0; - %shiftr 4; - %store/vec4 v000000000114d670_0, 0, 32; - %jmp T_8.24; -T_8.12 ; - %load/vec4 v000000000114e1b0_0; - %ix/getv 4, v000000000114d490_0; - %shiftr 4; - %store/vec4 v000000000114d670_0, 0, 32; - %jmp T_8.24; -T_8.13 ; - %load/vec4 v000000000114d490_0; - %load/vec4 v000000000114e1b0_0; - %cmp/e; - %jmp/0xz T_8.25, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000114e610_0, 0, 1; - %jmp T_8.26; -T_8.25 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000114e610_0, 0, 1; -T_8.26 ; - %jmp T_8.24; -T_8.14 ; - %load/vec4 v000000000114d490_0; - %load/vec4 v000000000114e1b0_0; - %cmp/s; - %jmp/0xz T_8.27, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000114e610_0, 0, 1; - %jmp T_8.28; -T_8.27 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000114e610_0, 0, 1; -T_8.28 ; - %jmp T_8.24; -T_8.15 ; - %load/vec4 v000000000114d490_0; - %load/vec4 v000000000114e1b0_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.29, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000114e610_0, 0, 1; - %jmp T_8.30; -T_8.29 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000114e610_0, 0, 1; -T_8.30 ; - %jmp T_8.24; -T_8.16 ; - %load/vec4 v000000000114e1b0_0; - %load/vec4 v000000000114d490_0; - %cmp/s; - %jmp/0xz T_8.31, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000114e610_0, 0, 1; - %jmp T_8.32; -T_8.31 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000114e610_0, 0, 1; -T_8.32 ; - %jmp T_8.24; -T_8.17 ; - %load/vec4 v000000000114e1b0_0; - %load/vec4 v000000000114d490_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.33, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000114e610_0, 0, 1; - %jmp T_8.34; -T_8.33 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000114e610_0, 0, 1; -T_8.34 ; - %jmp T_8.24; -T_8.18 ; - %load/vec4 v000000000114d490_0; - %load/vec4 v000000000114e1b0_0; - %cmp/ne; - %jmp/0xz T_8.35, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000114e610_0, 0, 1; - %jmp T_8.36; -T_8.35 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000114e610_0, 0, 1; -T_8.36 ; - %jmp T_8.24; -T_8.19 ; - %load/vec4 v000000000114d490_0; - %store/vec4 v000000000114d670_0, 0, 32; - %jmp T_8.24; -T_8.20 ; - %load/vec4 v000000000114d490_0; - %load/vec4 v000000000114e1b0_0; - %cmp/s; - %jmp/0xz T_8.37, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v000000000114d670_0, 0, 32; -T_8.37 ; - %jmp T_8.24; -T_8.21 ; - %load/vec4 v000000000114d490_0; - %load/vec4 v000000000114e1b0_0; - %cmp/u; - %jmp/0xz T_8.39, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v000000000114d670_0, 0, 32; -T_8.39 ; - %jmp T_8.24; -T_8.22 ; - %load/vec4 v000000000114d490_0; - %load/vec4 v000000000114e1b0_0; - %mul; - %store/vec4 v000000000114d670_0, 0, 32; - %jmp T_8.24; -T_8.23 ; - %load/vec4 v000000000114d490_0; - %load/vec4 v000000000114e1b0_0; - %div; - %store/vec4 v000000000114d670_0, 0, 32; - %jmp T_8.24; -T_8.24 ; - %pop/vec4 1; - %jmp T_8; - .thread T_8, $push; - .scope S_00000000009e80d0; -T_9 ; - %pushi/vec4 3217031168, 0, 32; - %store/vec4 v00000000011b4a30_0, 0, 32; - %end; - .thread T_9, $init; - .scope S_00000000009e80d0; -T_10 ; -Ewait_2 .event/or E_00000000011452e0, E_0x0; - %wait Ewait_2; - %load/vec4 v00000000011b3450_0; - %store/vec4 v00000000011b2b90_0, 0, 32; - %load/vec4 v00000000011b4530_0; - %store/vec4 v000000000114d530_0, 0, 32; - %load/vec4 v00000000011b33b0_0; - %store/vec4 v0000000000973870_0, 0, 1; - %load/vec4 v00000000011b3630_0; - %store/vec4 v000000000114d5d0_0, 0, 1; - %load/vec4 v00000000011b45d0_0; - %store/vec4 v00000000011b3e50_0, 0, 32; - %jmp T_10; - .thread T_10, $push; - .scope S_00000000009e80d0; -T_11 ; -Ewait_3 .event/or E_00000000011451e0, E_0x0; - %wait Ewait_3; - %load/vec4 v00000000011b43f0_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.2, 6; - %jmp T_11.3; -T_11.0 ; - %load/vec4 v00000000011b3f90_0; - %parti/s 5, 16, 6; - %store/vec4 v00000000011b31d0_0, 0, 5; - %jmp T_11.3; -T_11.1 ; - %load/vec4 v00000000011b3f90_0; - %parti/s 5, 11, 5; - %store/vec4 v00000000011b31d0_0, 0, 5; - %jmp T_11.3; -T_11.2 ; - %pushi/vec4 31, 0, 5; - %store/vec4 v00000000011b31d0_0, 0, 5; - %jmp T_11.3; -T_11.3 ; - %pop/vec4 1; - %load/vec4 v00000000011b42b0_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.6, 6; - %jmp T_11.7; -T_11.4 ; - %load/vec4 v00000000011b4530_0; - %store/vec4 v00000000011b3130_0, 0, 32; - %jmp T_11.7; -T_11.5 ; - %load/vec4 v000000000114d710_0; - %store/vec4 v00000000011b3130_0, 0, 32; - %jmp T_11.7; -T_11.6 ; - %load/vec4 v00000000011b4a30_0; - %addi 8, 0, 32; - %store/vec4 v00000000011b3130_0, 0, 32; - %jmp T_11.7; -T_11.7 ; - %pop/vec4 1; - %load/vec4 v00000000011b4170_0; - %dup/vec4; - %pushi/vec4 1, 0, 1; - %cmp/u; - %jmp/1 T_11.8, 6; - %dup/vec4; - %pushi/vec4 0, 0, 1; - %cmp/u; - %jmp/1 T_11.9, 6; - %jmp T_11.10; -T_11.8 ; - %load/vec4 v00000000011b3f90_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v00000000011b3f90_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %store/vec4 v00000000011b3310_0, 0, 32; - %jmp T_11.10; -T_11.9 ; - %load/vec4 v00000000011b45d0_0; - %store/vec4 v00000000011b3310_0, 0, 32; - %jmp T_11.10; -T_11.10 ; - %pop/vec4 1; - %jmp T_11; - .thread T_11, $push; - .scope S_00000000009e7f40; -T_12 ; - %vpi_call/w 3 37 "$dumpfile", "mips_cpu_harvard.vcd" {0 0 0}; - %vpi_call/w 3 38 "$dumpvars", 32'sb00000000000000000000000000000000, S_00000000009e7f40 {0 0 0}; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011b5e30_0, 0, 1; - %pushi/vec4 100, 0, 32; -T_12.0 %dup/vec4; - %pushi/vec4 0, 0, 32; - %cmp/s; - %jmp/1xz T_12.1, 5; - %jmp/1 T_12.1, 4; - %pushi/vec4 1, 0, 32; - %sub; - %delay 10, 0; - %load/vec4 v00000000011b5e30_0; - %nor/r; - %store/vec4 v00000000011b5e30_0, 0, 1; - %delay 10, 0; - %load/vec4 v00000000011b5e30_0; - %nor/r; - %store/vec4 v00000000011b5e30_0, 0, 1; - %jmp T_12.0; -T_12.1 ; - %pop/vec4 1; - %vpi_call/w 3 48 "$fatal", 32'sb00000000000000000000000000000010, "Simulation did not finish within %d cycles.", P_0000000001153370 {0 0 0}; - %end; - .thread T_12; - .scope S_00000000009e7f40; -T_13 ; - %vpi_call/w 3 52 "$display", "Initial Reset 0" {0 0 0}; - %pushi/vec4 0, 0, 1; - %assign/vec4 v00000000011b7410_0, 0; - %vpi_call/w 3 56 "$display", "Initial Reset 1" {0 0 0}; - %wait E_00000000011454a0; - %pushi/vec4 1, 0, 1; - %assign/vec4 v00000000011b7410_0, 0; - %vpi_call/w 3 60 "$display", "Initial Reset 0: Start Program" {0 0 0}; - %wait E_00000000011454a0; - %pushi/vec4 0, 0, 1; - %assign/vec4 v00000000011b7410_0, 0; - %wait E_00000000011454a0; - %load/vec4 v00000000011b7870_0; - %pad/u 32; - %cmpi/e 1, 0, 32; - %jmp/0xz T_13.0, 4; - %jmp T_13.1; -T_13.0 ; - %vpi_call/w 3 66 "$display", "TB: CPU did not set active=1 after reset." {0 0 0}; -T_13.1 ; -T_13.2 ; - %load/vec4 v00000000011b7870_0; - %flag_set/vec4 8; - %jmp/0xz T_13.3, 8; - %wait E_00000000011454a0; - %vpi_call/w 3 72 "$display", "Reg File Write data: %d", v00000000011b3130_0 {0 0 0}; - %jmp T_13.2; -T_13.3 ; - %wait E_00000000011454a0; - %vpi_call/w 3 75 "$display", "TB: CPU Halt; active=0" {0 0 0}; - %vpi_call/w 3 76 "$display", "Output:" {0 0 0}; - %vpi_call/w 3 77 "$display", "%d", v00000000011b7230_0 {0 0 0}; - %vpi_call/w 3 78 "$finish" {0 0 0}; - %end; - .thread T_13; -# The file index is used to find the file name in the following table. -:file_names 10; - "N/A"; - ""; - "-"; - "testbench/mips_cpu_harvard_tb.v"; - "rtl/mips_cpu_harvard.v"; - "rtl/mips_cpu_alu.v"; - "rtl/mips_cpu_control.v"; - "rtl/mips_cpu_pc.v"; - "rtl/mips_cpu_regfile.v"; - "rtl/mips_cpu_memory.v"; diff --git a/exec/mips_cpu_harvard_tb_addu b/exec/mips_cpu_harvard_tb_addu deleted file mode 100644 index 9ab51df..0000000 --- a/exec/mips_cpu_harvard_tb_addu +++ /dev/null @@ -1,2738 +0,0 @@ -#! /usr/local/iverilog/bin/vvp -:ivl_version "11.0 (devel)"; -:ivl_delay_selection "TYPICAL"; -:vpi_time_precision + 0; -:vpi_module "C:\iverilog\lib\ivl\system.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_sys.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_textio.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2005_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\va_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2009.vpi"; -S_000000000116c100 .scope package, "$unit" "$unit" 2 1; - .timescale 0 0; -S_000000000112aab0 .scope module, "mips_cpu_harvard_tb" "mips_cpu_harvard_tb" 3 1; - .timescale 0 0; -P_0000000001073be0 .param/str "RAM_INIT_FILE" 0 3 3, "inputs/addu.txt"; -P_0000000001073c18 .param/l "TIMEOUT_CYCLES" 0 3 4, +C4<00000000000000000000000001100100>; -v00000000011c63c0_0 .net "active", 0 0, v000000000116a440_0; 1 drivers -v00000000011c5380_0 .var "clk", 0 0; -v00000000011c5600_0 .var "clk_enable", 0 0; -v00000000011c4b60_0 .net "data_address", 31 0, v0000000001169040_0; 1 drivers -v00000000011c6820_0 .net "data_read", 0 0, v0000000001169720_0; 1 drivers -v00000000011c5c40_0 .net "data_readdata", 31 0, L_00000000011c4d40; 1 drivers -v00000000011c5420_0 .net "data_write", 0 0, v000000000116a760_0; 1 drivers -v00000000011c5d80_0 .net "data_writedata", 31 0, v000000000116a800_0; 1 drivers -v00000000011c6320_0 .net "instr_address", 31 0, v00000000011c3050_0; 1 drivers -v00000000011c4fc0_0 .net "instr_readdata", 31 0, L_00000000011c4de0; 1 drivers -v00000000011c6460_0 .net "register_v0", 31 0, L_000000000112e4c0; 1 drivers -v00000000011c5560_0 .var "reset", 0 0; -S_00000000010e5e30 .scope module, "cpuInst" "mips_cpu_harvard" 3 19, 4 1 0, S_000000000112aab0; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "reset"; - .port_info 2 /OUTPUT 1 "active"; - .port_info 3 /OUTPUT 32 "register_v0"; - .port_info 4 /INPUT 1 "clk_enable"; - .port_info 5 /OUTPUT 32 "instr_address"; - .port_info 6 /INPUT 32 "instr_readdata"; - .port_info 7 /OUTPUT 32 "data_address"; - .port_info 8 /OUTPUT 1 "data_write"; - .port_info 9 /OUTPUT 1 "data_read"; - .port_info 10 /OUTPUT 32 "data_writedata"; - .port_info 11 /INPUT 32 "data_readdata"; -v0000000001168fa0_0 .net "active", 0 0, v000000000116a440_0; alias, 1 drivers -v0000000001169540_0 .net "clk", 0 0, v00000000011c5380_0; 1 drivers -v000000000116a300_0 .net "clk_enable", 0 0, v00000000011c5600_0; 1 drivers -v0000000001169040_0 .var "data_address", 31 0; -v0000000001169720_0 .var "data_read", 0 0; -v0000000001169860_0 .net "data_readdata", 31 0, L_00000000011c4d40; alias, 1 drivers -v000000000116a760_0 .var "data_write", 0 0; -v000000000116a800_0 .var "data_writedata", 31 0; -v000000000110df20_0 .var "in_B", 31 0; -v00000000011c2e70_0 .net "in_opcode", 5 0, L_00000000011c61e0; 1 drivers -v00000000011c4310_0 .net "in_pc_in", 31 0, v000000000116a120_0; 1 drivers -v00000000011c2fb0_0 .net "in_readreg1", 4 0, L_00000000011c60a0; 1 drivers -v00000000011c35f0_0 .net "in_readreg2", 4 0, L_00000000011c6780; 1 drivers -v00000000011c3550_0 .var "in_writedata", 31 0; -v00000000011c4630_0 .var "in_writereg", 4 0; -v00000000011c3050_0 .var "instr_address", 31 0; -v00000000011c2f10_0 .net "instr_readdata", 31 0, L_00000000011c4de0; alias, 1 drivers -v00000000011c2970_0 .net "out_ALUCond", 0 0, v0000000001168be0_0; 1 drivers -v00000000011c32d0_0 .net "out_ALUOp", 4 0, v0000000001169cc0_0; 1 drivers -v00000000011c3f50_0 .net "out_ALURes", 31 0, v00000000011690e0_0; 1 drivers -v00000000011c3730_0 .net "out_ALUSrc", 0 0, v0000000001169ae0_0; 1 drivers -v00000000011c3cd0_0 .net "out_MemRead", 0 0, v0000000001168d20_0; 1 drivers -v00000000011c2b50_0 .net "out_MemWrite", 0 0, v0000000001168c80_0; 1 drivers -v00000000011c39b0_0 .net "out_MemtoReg", 1 0, v0000000001169180_0; 1 drivers -v00000000011c3370_0 .net "out_PC", 1 0, v00000000011699a0_0; 1 drivers -v00000000011c30f0_0 .net "out_RegDst", 1 0, v00000000011694a0_0; 1 drivers -v00000000011c3e10_0 .net "out_RegWrite", 0 0, v0000000001169a40_0; 1 drivers -v00000000011c37d0_0 .var "out_pc_out", 31 0; -v00000000011c3a50_0 .net "out_readdata1", 31 0, v000000000116a580_0; 1 drivers -v00000000011c46d0_0 .net "out_readdata2", 31 0, v000000000116a1c0_0; 1 drivers -v00000000011c4770_0 .net "out_shamt", 4 0, v0000000001169b80_0; 1 drivers -v00000000011c3d70_0 .net "register_v0", 31 0, L_000000000112e4c0; alias, 1 drivers -v00000000011c2a10_0 .net "reset", 0 0, v00000000011c5560_0; 1 drivers -E_0000000001126380/0 .event edge, v00000000011694a0_0, v0000000001168aa0_0, v0000000001168aa0_0, v0000000001169180_0; -E_0000000001126380/1 .event edge, v00000000011690e0_0, v0000000001169860_0, v00000000011695e0_0, v0000000001169ae0_0; -E_0000000001126380/2 .event edge, v0000000001168aa0_0, v0000000001168aa0_0, v000000000116a1c0_0; -E_0000000001126380 .event/or E_0000000001126380/0, E_0000000001126380/1, E_0000000001126380/2; -E_0000000001125940/0 .event edge, v000000000116a120_0, v00000000011690e0_0, v0000000001168c80_0, v0000000001168d20_0; -E_0000000001125940/1 .event edge, v000000000116a1c0_0; -E_0000000001125940 .event/or E_0000000001125940/0, E_0000000001125940/1; -L_00000000011c60a0 .part L_00000000011c4de0, 21, 5; -L_00000000011c6780 .part L_00000000011c4de0, 16, 5; -L_00000000011c61e0 .part L_00000000011c4de0, 26, 6; -S_00000000010e5fc0 .scope module, "alu" "mips_cpu_alu" 4 121, 5 1 0, S_00000000010e5e30; - .timescale 0 0; - .port_info 0 /INPUT 32 "A"; - .port_info 1 /INPUT 32 "B"; - .port_info 2 /INPUT 5 "ALUOp"; - .port_info 3 /INPUT 5 "shamt"; - .port_info 4 /OUTPUT 1 "ALUCond"; - .port_info 5 /OUTPUT 32 "ALURes"; -enum000000000114bd00 .enum4 (5) - "ADD" 5'b00000, - "SUB" 5'b00001, - "MUL" 5'b00010, - "DIV" 5'b00011, - "AND" 5'b00100, - "OR" 5'b00101, - "XOR" 5'b00110, - "SLL" 5'b00111, - "SLLV" 5'b01000, - "SRL" 5'b01001, - "SRLV" 5'b01010, - "SRA" 5'b01011, - "SRAV" 5'b01100, - "EQ" 5'b01101, - "LES" 5'b01110, - "LEQ" 5'b01111, - "GRT" 5'b10000, - "GEQ" 5'b10001, - "NEQ" 5'b10010, - "PAS" 5'b10011, - "SLT" 5'b10100, - "SLTU" 5'b10101, - "MULU" 5'b10110, - "DIVU" 5'b10111 - ; -L_000000000112e060 .functor BUFZ 5, v0000000001169cc0_0, C4<00000>, C4<00000>, C4<00000>; -v000000000116a080_0 .net "A", 31 0, v000000000116a580_0; alias, 1 drivers -v0000000001168be0_0 .var "ALUCond", 0 0; -v0000000001168b40_0 .net "ALUOp", 4 0, v0000000001169cc0_0; alias, 1 drivers -v0000000001169c20_0 .net "ALUOps", 4 0, L_000000000112e060; 1 drivers -v00000000011690e0_0 .var/s "ALURes", 31 0; -v0000000001169220_0 .net "B", 31 0, v000000000110df20_0; 1 drivers -v0000000001168e60_0 .net "shamt", 4 0, v0000000001169b80_0; alias, 1 drivers -E_0000000001127bc0 .event edge, v0000000001169c20_0, v000000000116a080_0, v0000000001169220_0, v0000000001168e60_0; -S_00000000010e6150 .scope module, "control" "mips_cpu_control" 4 90, 6 1 0, S_00000000010e5e30; - .timescale 0 0; - .port_info 0 /INPUT 32 "Instr"; - .port_info 1 /INPUT 1 "ALUCond"; - .port_info 2 /OUTPUT 2 "CtrlRegDst"; - .port_info 3 /OUTPUT 2 "CtrlPC"; - .port_info 4 /OUTPUT 1 "CtrlMemRead"; - .port_info 5 /OUTPUT 2 "CtrlMemtoReg"; - .port_info 6 /OUTPUT 5 "CtrlALUOp"; - .port_info 7 /OUTPUT 5 "Ctrlshamt"; - .port_info 8 /OUTPUT 1 "CtrlMemWrite"; - .port_info 9 /OUTPUT 1 "CtrlALUSrc"; - .port_info 10 /OUTPUT 1 "CtrlRegWrite"; -enum0000000001149270 .enum4 (6) - "SLL" 6'b000000, - "SRL" 6'b000010, - "SRA" 6'b000011, - "SLLV" 6'b000100, - "SRLV" 6'b000110, - "SRAV" 6'b000111, - "JR" 6'b001000, - "JALR" 6'b001001, - "MTHI" 6'b010001, - "MTLO" 6'b010011, - "MULT" 6'b011000, - "MULTU" 6'b011001, - "DIV" 6'b011010, - "DIVU" 6'b011011, - "ADDU" 6'b100001, - "SUBU" 6'b100011, - "AND" 6'b100100, - "OR" 6'b100101, - "XOR" 6'b100110, - "SLT" 6'b101010, - "SLTU" 6'b101011 - ; -enum000000000114b8a0 .enum4 (6) - "SPECIAL" 6'b000000, - "REGIMM" 6'b000001, - "J" 6'b000010, - "JAL" 6'b000011, - "BEQ" 6'b000100, - "BNE" 6'b000101, - "BLEZ" 6'b000110, - "BGTZ" 6'b000111, - "ADDI" 6'b001000, - "ADDIU" 6'b001001, - "SLTI" 6'b001010, - "SLTIU" 6'b001011, - "ANDI" 6'b001100, - "ORI" 6'b001101, - "XORI" 6'b001110, - "LUI" 6'b001111, - "LB" 6'b100000, - "LH" 6'b100001, - "LWL" 6'b100010, - "LW" 6'b100011, - "LBU" 6'b100100, - "LHU" 6'b100101, - "LWR" 6'b100110, - "SB" 6'b101000, - "SH" 6'b101001, - "SW" 6'b101011 - ; -enum000000000114b950 .enum4 (5) - "BLTZ" 5'b00000, - "BGEZ" 5'b00001, - "BLTZAL" 5'b10000, - "BGEZAL" 5'b10001 - ; -v000000000116a3a0_0 .net "ALUCond", 0 0, v0000000001168be0_0; alias, 1 drivers -v0000000001169cc0_0 .var "CtrlALUOp", 4 0; -v0000000001169ae0_0 .var "CtrlALUSrc", 0 0; -v0000000001168d20_0 .var "CtrlMemRead", 0 0; -v0000000001168c80_0 .var "CtrlMemWrite", 0 0; -v0000000001169180_0 .var "CtrlMemtoReg", 1 0; -v00000000011699a0_0 .var "CtrlPC", 1 0; -v00000000011694a0_0 .var "CtrlRegDst", 1 0; -v0000000001169a40_0 .var "CtrlRegWrite", 0 0; -v0000000001169b80_0 .var "Ctrlshamt", 4 0; -v0000000001168aa0_0 .net "Instr", 31 0, L_00000000011c4de0; alias, 1 drivers -v0000000001169d60_0 .net "funct", 5 0, L_00000000011c5060; 1 drivers -v0000000001169360_0 .net "op", 5 0, L_00000000011c4ac0; 1 drivers -v0000000001169fe0_0 .net "rt", 4 0, L_00000000011c4e80; 1 drivers -E_0000000001126cc0/0 .event edge, v0000000001169360_0, v0000000001169d60_0, v0000000001168be0_0, v0000000001169fe0_0; -E_0000000001126cc0/1 .event edge, v0000000001168aa0_0; -E_0000000001126cc0 .event/or E_0000000001126cc0/0, E_0000000001126cc0/1; -L_00000000011c4ac0 .part L_00000000011c4de0, 26, 6; -L_00000000011c5060 .part L_00000000011c4de0, 0, 6; -L_00000000011c4e80 .part L_00000000011c4de0, 16, 5; -S_00000000010d91d0 .scope module, "pc" "pc" 4 79, 7 1 0, S_00000000010e5e30; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "rst"; - .port_info 2 /INPUT 2 "pc_ctrl"; - .port_info 3 /INPUT 32 "pc_in"; - .port_info 4 /INPUT 5 "rs"; - .port_info 5 /OUTPUT 32 "pc_out"; - .port_info 6 /OUTPUT 1 "active"; -v000000000116a440_0 .var "active", 0 0; -v00000000011697c0_0 .net "clk", 0 0, v00000000011c5380_0; alias, 1 drivers -v0000000001169e00_0 .net "pc_ctrl", 1 0, v00000000011699a0_0; alias, 1 drivers -v00000000011692c0_0 .var "pc_curr", 31 0; -v00000000011695e0_0 .net "pc_in", 31 0, v00000000011c37d0_0; 1 drivers -v000000000116a120_0 .var "pc_out", 31 0; -o000000000116d018 .functor BUFZ 5, C4; HiZ drive -v0000000001168f00_0 .net "rs", 4 0, o000000000116d018; 0 drivers -v0000000001168960_0 .net "rst", 0 0, v00000000011c5560_0; alias, 1 drivers -E_0000000001128480 .event posedge, v00000000011697c0_0; -S_00000000010d9360 .scope module, "regfile" "mips_cpu_regfile" 4 106, 8 1 0, S_00000000010e5e30; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 5 "readreg1"; - .port_info 2 /INPUT 5 "readreg2"; - .port_info 3 /INPUT 5 "writereg"; - .port_info 4 /INPUT 32 "writedata"; - .port_info 5 /INPUT 1 "regwrite"; - .port_info 6 /INPUT 6 "opcode"; - .port_info 7 /OUTPUT 32 "readdata1"; - .port_info 8 /OUTPUT 32 "readdata2"; - .port_info 9 /OUTPUT 32 "regv0"; -v0000000001169ea0_2 .array/port v0000000001169ea0, 2; -L_000000000112e4c0 .functor BUFZ 32, v0000000001169ea0_2, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; -v0000000001169400_0 .net "clk", 0 0, v00000000011c5380_0; alias, 1 drivers -v0000000001169ea0 .array "memory", 0 31, 31 0; -v000000000116a260_0 .net "opcode", 5 0, L_00000000011c61e0; alias, 1 drivers -v000000000116a580_0 .var "readdata1", 31 0; -v000000000116a1c0_0 .var "readdata2", 31 0; -v000000000116a620_0 .net "readreg1", 4 0, L_00000000011c60a0; alias, 1 drivers -v0000000001169680_0 .net "readreg2", 4 0, L_00000000011c6780; alias, 1 drivers -v0000000001169f40_0 .net "regv0", 31 0, L_000000000112e4c0; alias, 1 drivers -v0000000001168dc0_0 .net "regwrite", 0 0, v0000000001169a40_0; alias, 1 drivers -v000000000116a6c0_0 .net "writedata", 31 0, v00000000011c3550_0; 1 drivers -v0000000001168a00_0 .net "writereg", 4 0, v00000000011c4630_0; 1 drivers -E_0000000001127640 .event negedge, v00000000011697c0_0; -v0000000001169ea0_0 .array/port v0000000001169ea0, 0; -v0000000001169ea0_1 .array/port v0000000001169ea0, 1; -E_0000000001127c00/0 .event edge, v000000000116a620_0, v0000000001169ea0_0, v0000000001169ea0_1, v0000000001169ea0_2; -v0000000001169ea0_3 .array/port v0000000001169ea0, 3; -v0000000001169ea0_4 .array/port v0000000001169ea0, 4; -v0000000001169ea0_5 .array/port v0000000001169ea0, 5; -v0000000001169ea0_6 .array/port v0000000001169ea0, 6; -E_0000000001127c00/1 .event edge, v0000000001169ea0_3, v0000000001169ea0_4, v0000000001169ea0_5, v0000000001169ea0_6; -v0000000001169ea0_7 .array/port v0000000001169ea0, 7; -v0000000001169ea0_8 .array/port v0000000001169ea0, 8; -v0000000001169ea0_9 .array/port v0000000001169ea0, 9; -v0000000001169ea0_10 .array/port v0000000001169ea0, 10; -E_0000000001127c00/2 .event edge, v0000000001169ea0_7, v0000000001169ea0_8, v0000000001169ea0_9, v0000000001169ea0_10; -v0000000001169ea0_11 .array/port v0000000001169ea0, 11; -v0000000001169ea0_12 .array/port v0000000001169ea0, 12; -v0000000001169ea0_13 .array/port v0000000001169ea0, 13; -v0000000001169ea0_14 .array/port v0000000001169ea0, 14; -E_0000000001127c00/3 .event edge, v0000000001169ea0_11, v0000000001169ea0_12, v0000000001169ea0_13, v0000000001169ea0_14; -v0000000001169ea0_15 .array/port v0000000001169ea0, 15; -v0000000001169ea0_16 .array/port v0000000001169ea0, 16; -v0000000001169ea0_17 .array/port v0000000001169ea0, 17; -v0000000001169ea0_18 .array/port v0000000001169ea0, 18; -E_0000000001127c00/4 .event edge, v0000000001169ea0_15, v0000000001169ea0_16, v0000000001169ea0_17, v0000000001169ea0_18; -v0000000001169ea0_19 .array/port v0000000001169ea0, 19; -v0000000001169ea0_20 .array/port v0000000001169ea0, 20; -v0000000001169ea0_21 .array/port v0000000001169ea0, 21; -v0000000001169ea0_22 .array/port v0000000001169ea0, 22; -E_0000000001127c00/5 .event edge, v0000000001169ea0_19, v0000000001169ea0_20, v0000000001169ea0_21, v0000000001169ea0_22; -v0000000001169ea0_23 .array/port v0000000001169ea0, 23; -v0000000001169ea0_24 .array/port v0000000001169ea0, 24; -v0000000001169ea0_25 .array/port v0000000001169ea0, 25; -v0000000001169ea0_26 .array/port v0000000001169ea0, 26; -E_0000000001127c00/6 .event edge, v0000000001169ea0_23, v0000000001169ea0_24, v0000000001169ea0_25, v0000000001169ea0_26; -v0000000001169ea0_27 .array/port v0000000001169ea0, 27; -v0000000001169ea0_28 .array/port v0000000001169ea0, 28; -v0000000001169ea0_29 .array/port v0000000001169ea0, 29; -v0000000001169ea0_30 .array/port v0000000001169ea0, 30; -E_0000000001127c00/7 .event edge, v0000000001169ea0_27, v0000000001169ea0_28, v0000000001169ea0_29, v0000000001169ea0_30; -v0000000001169ea0_31 .array/port v0000000001169ea0, 31; -E_0000000001127c00/8 .event edge, v0000000001169ea0_31, v0000000001169680_0; -E_0000000001127c00 .event/or E_0000000001127c00/0, E_0000000001127c00/1, E_0000000001127c00/2, E_0000000001127c00/3, E_0000000001127c00/4, E_0000000001127c00/5, E_0000000001127c00/6, E_0000000001127c00/7, E_0000000001127c00/8; -S_00000000010d94f0 .scope begin, "$unm_blk_121" "$unm_blk_121" 8 16, 8 16 0, S_00000000010d9360; - .timescale 0 0; -v000000000116a4e0_0 .var/i "i", 31 0; -S_00000000010ce6f0 .scope module, "ramInst" "mips_cpu_memory" 3 9, 9 1 0, S_000000000112aab0; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 32 "data_address"; - .port_info 2 /INPUT 1 "data_write"; - .port_info 3 /INPUT 1 "data_read"; - .port_info 4 /INPUT 32 "data_writedata"; - .port_info 5 /OUTPUT 32 "data_readdata"; - .port_info 6 /INPUT 32 "instr_address"; - .port_info 7 /OUTPUT 32 "instr_readdata"; -P_0000000001127d40 .param/str "RAM_INIT_FILE" 0 9 16, "inputs/addu.txt"; -L_000000000112dd50 .functor AND 1, L_00000000011c5740, L_00000000011c6140, C4<1>, C4<1>; -v00000000011c2ab0_0 .net *"_ivl_0", 31 0, L_00000000011c5880; 1 drivers -L_00000000011c79e8 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v00000000011c4270_0 .net/2u *"_ivl_12", 31 0, L_00000000011c79e8; 1 drivers -v00000000011c3ff0_0 .net *"_ivl_14", 0 0, L_00000000011c5740; 1 drivers -L_00000000011c7a30 .functor BUFT 1, C4<10111111110000000000000001000000>, C4<0>, C4<0>, C4<0>; -v00000000011c3190_0 .net/2u *"_ivl_16", 31 0, L_00000000011c7a30; 1 drivers -v00000000011c3910_0 .net *"_ivl_18", 0 0, L_00000000011c6140; 1 drivers -v00000000011c3b90_0 .net *"_ivl_2", 31 0, L_00000000011c5ba0; 1 drivers -v00000000011c4590_0 .net *"_ivl_21", 0 0, L_000000000112dd50; 1 drivers -v00000000011c3af0_0 .net *"_ivl_22", 31 0, L_00000000011c54c0; 1 drivers -L_00000000011c7a78 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v00000000011c2bf0_0 .net/2u *"_ivl_24", 31 0, L_00000000011c7a78; 1 drivers -v00000000011c3230_0 .net *"_ivl_26", 31 0, L_00000000011c5a60; 1 drivers -v00000000011c3eb0_0 .net *"_ivl_28", 31 0, L_00000000011c4c00; 1 drivers -v00000000011c4810_0 .net *"_ivl_30", 29 0, L_00000000011c5ce0; 1 drivers -L_00000000011c7ac0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v00000000011c2c90_0 .net *"_ivl_32", 1 0, L_00000000011c7ac0; 1 drivers -L_00000000011c7b08 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v00000000011c4090_0 .net *"_ivl_34", 31 0, L_00000000011c7b08; 1 drivers -v00000000011c3410_0 .net *"_ivl_4", 29 0, L_00000000011c56a0; 1 drivers -L_00000000011c7958 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v00000000011c4130_0 .net *"_ivl_6", 1 0, L_00000000011c7958; 1 drivers -L_00000000011c79a0 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v00000000011c34b0_0 .net *"_ivl_8", 31 0, L_00000000011c79a0; 1 drivers -v00000000011c3690_0 .net "clk", 0 0, v00000000011c5380_0; alias, 1 drivers -v00000000011c41d0_0 .net "data_address", 31 0, v0000000001169040_0; alias, 1 drivers -v00000000011c43b0 .array "data_memory", 63 0, 31 0; -v00000000011c2d30_0 .net "data_read", 0 0, v0000000001169720_0; alias, 1 drivers -v00000000011c4450_0 .net "data_readdata", 31 0, L_00000000011c4d40; alias, 1 drivers -v00000000011c44f0_0 .net "data_write", 0 0, v000000000116a760_0; alias, 1 drivers -v00000000011c2dd0_0 .net "data_writedata", 31 0, v000000000116a800_0; alias, 1 drivers -v00000000011c4f20_0 .net "instr_address", 31 0, v00000000011c3050_0; alias, 1 drivers -v00000000011c4ca0 .array "instr_memory", 63 0, 31 0; -v00000000011c4980_0 .net "instr_readdata", 31 0, L_00000000011c4de0; alias, 1 drivers -L_00000000011c5880 .array/port v00000000011c43b0, L_00000000011c5ba0; -L_00000000011c56a0 .part v0000000001169040_0, 2, 30; -L_00000000011c5ba0 .concat [ 30 2 0 0], L_00000000011c56a0, L_00000000011c7958; -L_00000000011c4d40 .functor MUXZ 32, L_00000000011c79a0, L_00000000011c5880, v0000000001169720_0, C4<>; -L_00000000011c5740 .cmp/ge 32, v00000000011c3050_0, L_00000000011c79e8; -L_00000000011c6140 .cmp/gt 32, L_00000000011c7a30, v00000000011c3050_0; -L_00000000011c54c0 .array/port v00000000011c4ca0, L_00000000011c4c00; -L_00000000011c5a60 .arith/sub 32, v00000000011c3050_0, L_00000000011c7a78; -L_00000000011c5ce0 .part L_00000000011c5a60, 2, 30; -L_00000000011c4c00 .concat [ 30 2 0 0], L_00000000011c5ce0, L_00000000011c7ac0; -L_00000000011c4de0 .functor MUXZ 32, L_00000000011c7b08, L_00000000011c54c0, L_000000000112dd50, C4<>; -S_0000000001092680 .scope begin, "$unm_blk_104" "$unm_blk_104" 9 21, 9 21 0, S_00000000010ce6f0; - .timescale 0 0; -v00000000011c3870_0 .var/i "i", 31 0; -S_0000000001092810 .scope begin, "$ivl_for_loop0" "$ivl_for_loop0" 9 36, 9 36 0, S_0000000001092680; - .timescale 0 0; -v00000000011c3c30_0 .var/i "j", 31 0; - .scope S_00000000010ce6f0; -T_0 ; - %fork t_1, S_0000000001092680; - %jmp t_0; - .scope S_0000000001092680; -t_1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000011c3870_0, 0, 32; -T_0.0 ; - %load/vec4 v00000000011c3870_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v00000000011c3870_0; - %store/vec4a v00000000011c43b0, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000011c3870_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000011c3870_0, 0, 32; - %jmp T_0.0; -T_0.1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000011c3870_0, 0, 32; -T_0.2 ; - %load/vec4 v00000000011c3870_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.3, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v00000000011c3870_0; - %store/vec4a v00000000011c4ca0, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000011c3870_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000011c3870_0, 0, 32; - %jmp T_0.2; -T_0.3 ; - %vpi_call/w 9 32 "$display", "RAM: Loading RAM contents from %s", P_0000000001127d40 {0 0 0}; - %vpi_call/w 9 33 "$readmemh", P_0000000001127d40, v00000000011c4ca0 {0 0 0}; - %fork t_3, S_0000000001092810; - %jmp t_2; - .scope S_0000000001092810; -t_3 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000011c3c30_0, 0, 32; -T_0.4 ; - %load/vec4 v00000000011c3c30_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.5, 5; - %pushi/vec4 3217031168, 0, 32; - %load/vec4 v00000000011c3c30_0; - %muli 4, 0, 32; - %add; - %vpi_call/w 9 37 "$display", "byte +%h: %h", S<0,vec4,u32>, &A {1 0 0}; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000011c3c30_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000011c3c30_0, 0, 32; - %jmp T_0.4; -T_0.5 ; - %end; - .scope S_0000000001092680; -t_2 %join; - %end; - .scope S_00000000010ce6f0; -t_0 %join; - %end; - .thread T_0; - .scope S_00000000010ce6f0; -T_1 ; - %wait E_0000000001128480; - %load/vec4 v00000000011c2d30_0; - %nor/r; - %load/vec4 v00000000011c44f0_0; - %and; - %flag_set/vec4 8; - %jmp/0xz T_1.0, 8; - %load/vec4 v00000000011c4f20_0; - %load/vec4 v00000000011c41d0_0; - %cmp/ne; - %jmp/0xz T_1.2, 4; - %load/vec4 v00000000011c2dd0_0; - %load/vec4 v00000000011c41d0_0; - %ix/load 4, 2, 0; - %flag_set/imm 4, 0; - %shiftr 4; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011c43b0, 0, 4; -T_1.2 ; -T_1.0 ; - %jmp T_1; - .thread T_1; - .scope S_00000000010d91d0; -T_2 ; - %load/vec4 v00000000011695e0_0; - %store/vec4 v000000000116a120_0, 0, 32; - %end; - .thread T_2; - .scope S_00000000010d91d0; -T_3 ; - %wait E_0000000001128480; - %load/vec4 v0000000001168960_0; - %flag_set/vec4 8; - %jmp/0xz T_3.0, 8; - %pushi/vec4 1, 0, 1; - %assign/vec4 v000000000116a440_0, 0; - %pushi/vec4 3217031168, 0, 32; - %assign/vec4 v000000000116a120_0, 0; - %jmp T_3.1; -T_3.0 ; - %load/vec4 v000000000116a120_0; - %cmpi/ne 0, 0, 32; - %jmp/0xz T_3.2, 4; - %load/vec4 v000000000116a440_0; - %assign/vec4 v000000000116a440_0, 0; - %load/vec4 v0000000001169e00_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_3.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_3.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_3.6, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_3.7, 6; - %jmp T_3.8; -T_3.4 ; - %load/vec4 v000000000116a120_0; - %assign/vec4 v00000000011692c0_0, 0; - %load/vec4 v00000000011692c0_0; - %addi 4, 0, 32; - %assign/vec4 v000000000116a120_0, 0; - %vpi_call/w 7 27 "$display", "New PC from %h to %h", v00000000011692c0_0, v000000000116a120_0 {0 0 0}; - %jmp T_3.8; -T_3.5 ; - %load/vec4 v00000000011695e0_0; - %assign/vec4 v000000000116a120_0, 0; - %jmp T_3.8; -T_3.6 ; - %load/vec4 v00000000011695e0_0; - %assign/vec4 v000000000116a120_0, 0; - %jmp T_3.8; -T_3.7 ; - %vpi_call/w 7 36 "$display", "JUMP REGISTER" {0 0 0}; - %pushi/vec4 0, 0, 32; - %assign/vec4 v000000000116a120_0, 0; - %jmp T_3.8; -T_3.8 ; - %pop/vec4 1; - %jmp T_3.3; -T_3.2 ; - %load/vec4 v000000000116a120_0; - %cmpi/e 0, 0, 32; - %jmp/0xz T_3.9, 4; - %pushi/vec4 0, 0, 1; - %assign/vec4 v000000000116a440_0, 0; -T_3.9 ; -T_3.3 ; -T_3.1 ; - %jmp T_3; - .thread T_3; - .scope S_00000000010e6150; -T_4 ; - %wait E_0000000001126cc0; - %vpi_call/w 6 86 "$display", "Opcode: %h", v0000000001169360_0 {0 0 0}; - %load/vec4 v0000000001169360_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.0, 4; - %pushi/vec4 0, 0, 2; - %store/vec4 v00000000011694a0_0, 0, 2; - %vpi_call/w 6 89 "$display", "CTRLREGDST: Rt" {0 0 0}; - %jmp T_4.1; -T_4.0 ; - %load/vec4 v0000000001169360_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.2, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v00000000011694a0_0, 0, 2; - %vpi_call/w 6 92 "$display", "CTRLREGDST: Rd" {0 0 0}; - %jmp T_4.3; -T_4.2 ; - %load/vec4 v0000000001169360_0; - %cmpi/e 3, 0, 6; - %jmp/0xz T_4.4, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v00000000011694a0_0, 0, 2; - %vpi_call/w 6 95 "$display", "CTRLREGDST: Link" {0 0 0}; - %jmp T_4.5; -T_4.4 ; - %pushi/vec4 1, 1, 2; - %store/vec4 v00000000011694a0_0, 0, 2; - %vpi_call/w 6 96 "$display", "xxxxxxxxxxxxxx" {0 0 0}; -T_4.5 ; -T_4.3 ; -T_4.1 ; - %load/vec4 v000000000116a3a0_0; - %load/vec4 v0000000001169360_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169360_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169360_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169360_0; - %pushi/vec4 5, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169360_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169fe0_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169fe0_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169fe0_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169fe0_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.6, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v00000000011699a0_0, 0, 2; - %jmp T_4.7; -T_4.6 ; - %load/vec4 v0000000001169360_0; - %cmpi/e 2, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 3, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.8, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v00000000011699a0_0, 0, 2; - %jmp T_4.9; -T_4.8 ; - %load/vec4 v0000000001169d60_0; - %cmpi/e 8, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001169d60_0; - %cmpi/e 9, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.10, 4; - %pushi/vec4 3, 0, 2; - %store/vec4 v00000000011699a0_0, 0, 2; - %jmp T_4.11; -T_4.10 ; - %pushi/vec4 0, 0, 2; - %store/vec4 v00000000011699a0_0, 0, 2; -T_4.11 ; -T_4.9 ; -T_4.7 ; - %load/vec4 v0000000001169360_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.12, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001168d20_0, 0, 1; - %pushi/vec4 1, 0, 2; - %store/vec4 v0000000001169180_0, 0, 2; - %vpi_call/w 6 112 "$display", "Memory read enabled" {0 0 0}; - %jmp T_4.13; -T_4.12 ; - %load/vec4 v0000000001169360_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.14, 9; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001168d20_0, 0, 1; - %pushi/vec4 0, 0, 2; - %store/vec4 v0000000001169180_0, 0, 2; - %vpi_call/w 6 116 "$display", "Memory read disabled" {0 0 0}; - %jmp T_4.15; -T_4.14 ; - %load/vec4 v0000000001169360_0; - %cmpi/e 3, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.16, 9; - %pushi/vec4 2, 0, 2; - %store/vec4 v0000000001169180_0, 0, 2; - %jmp T_4.17; -T_4.16 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v0000000001168d20_0, 0, 1; -T_4.17 ; -T_4.15 ; -T_4.13 ; - %load/vec4 v0000000001169360_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.18, 9; - %pushi/vec4 0, 0, 5; - %store/vec4 v0000000001169cc0_0, 0, 5; - %vpi_call/w 6 124 "$display", "ALU OP = 0 (ADDU/ADDIU)" {0 0 0}; - %jmp T_4.19; -T_4.18 ; - %load/vec4 v0000000001169360_0; - %cmpi/e 12, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.20, 9; - %pushi/vec4 4, 0, 5; - %store/vec4 v0000000001169cc0_0, 0, 5; - %jmp T_4.21; -T_4.20 ; - %load/vec4 v0000000001169360_0; - %cmpi/e 4, 0, 6; - %jmp/0xz T_4.22, 4; - %pushi/vec4 13, 0, 5; - %store/vec4 v0000000001169cc0_0, 0, 5; - %jmp T_4.23; -T_4.22 ; - %load/vec4 v0000000001169360_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169fe0_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169fe0_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.24, 8; - %pushi/vec4 17, 0, 5; - %store/vec4 v0000000001169cc0_0, 0, 5; - %jmp T_4.25; -T_4.24 ; - %load/vec4 v0000000001169360_0; - %cmpi/e 7, 0, 6; - %jmp/0xz T_4.26, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v0000000001169cc0_0, 0, 5; - %jmp T_4.27; -T_4.26 ; - %load/vec4 v0000000001169360_0; - %cmpi/e 6, 0, 6; - %jmp/0xz T_4.28, 4; - %pushi/vec4 15, 0, 5; - %store/vec4 v0000000001169cc0_0, 0, 5; - %jmp T_4.29; -T_4.28 ; - %load/vec4 v0000000001169360_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169fe0_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169fe0_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.30, 8; - %pushi/vec4 14, 0, 5; - %store/vec4 v0000000001169cc0_0, 0, 5; - %jmp T_4.31; -T_4.30 ; - %load/vec4 v0000000001169360_0; - %cmpi/e 5, 0, 6; - %jmp/0xz T_4.32, 4; - %pushi/vec4 18, 0, 5; - %store/vec4 v0000000001169cc0_0, 0, 5; - %jmp T_4.33; -T_4.32 ; - %load/vec4 v0000000001169360_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.34, 8; - %pushi/vec4 3, 0, 5; - %store/vec4 v0000000001169cc0_0, 0, 5; - %jmp T_4.35; -T_4.34 ; - %load/vec4 v0000000001169360_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.36, 8; - %pushi/vec4 23, 0, 5; - %store/vec4 v0000000001169cc0_0, 0, 5; - %jmp T_4.37; -T_4.36 ; - %load/vec4 v0000000001169360_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.38, 4; - %pushi/vec4 0, 0, 5; - %store/vec4 v0000000001169cc0_0, 0, 5; - %jmp T_4.39; -T_4.38 ; - %load/vec4 v0000000001169360_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.40, 4; - %pushi/vec4 7, 0, 5; - %store/vec4 v0000000001169cc0_0, 0, 5; - %jmp T_4.41; -T_4.40 ; - %load/vec4 v0000000001169360_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.42, 8; - %pushi/vec4 19, 0, 5; - %store/vec4 v0000000001169cc0_0, 0, 5; - %jmp T_4.43; -T_4.42 ; - %load/vec4 v0000000001169360_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.44, 8; - %pushi/vec4 2, 0, 5; - %store/vec4 v0000000001169cc0_0, 0, 5; - %jmp T_4.45; -T_4.44 ; - %load/vec4 v0000000001169360_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.46, 8; - %pushi/vec4 22, 0, 5; - %store/vec4 v0000000001169cc0_0, 0, 5; - %jmp T_4.47; -T_4.46 ; - %load/vec4 v0000000001169360_0; - %cmpi/e 13, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.48, 9; - %pushi/vec4 5, 0, 5; - %store/vec4 v0000000001169cc0_0, 0, 5; - %jmp T_4.49; -T_4.48 ; - %load/vec4 v0000000001169360_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.50, 8; - %pushi/vec4 7, 0, 5; - %store/vec4 v0000000001169cc0_0, 0, 5; - %jmp T_4.51; -T_4.50 ; - %load/vec4 v0000000001169360_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.52, 8; - %pushi/vec4 8, 0, 5; - %store/vec4 v0000000001169cc0_0, 0, 5; - %jmp T_4.53; -T_4.52 ; - %load/vec4 v0000000001169360_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.54, 8; - %pushi/vec4 11, 0, 5; - %store/vec4 v0000000001169cc0_0, 0, 5; - %jmp T_4.55; -T_4.54 ; - %load/vec4 v0000000001169360_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.56, 8; - %pushi/vec4 12, 0, 5; - %store/vec4 v0000000001169cc0_0, 0, 5; - %jmp T_4.57; -T_4.56 ; - %load/vec4 v0000000001169360_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.58, 8; - %pushi/vec4 9, 0, 5; - %store/vec4 v0000000001169cc0_0, 0, 5; - %jmp T_4.59; -T_4.58 ; - %load/vec4 v0000000001169360_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.60, 8; - %pushi/vec4 10, 0, 5; - %store/vec4 v0000000001169cc0_0, 0, 5; - %jmp T_4.61; -T_4.60 ; - %load/vec4 v0000000001169360_0; - %cmpi/e 10, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.62, 9; - %pushi/vec4 20, 0, 5; - %store/vec4 v0000000001169cc0_0, 0, 5; - %jmp T_4.63; -T_4.62 ; - %load/vec4 v0000000001169360_0; - %cmpi/e 11, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.64, 9; - %pushi/vec4 21, 0, 5; - %store/vec4 v0000000001169cc0_0, 0, 5; - %jmp T_4.65; -T_4.64 ; - %load/vec4 v0000000001169360_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.66, 8; - %pushi/vec4 1, 0, 5; - %store/vec4 v0000000001169cc0_0, 0, 5; - %jmp T_4.67; -T_4.66 ; - %load/vec4 v0000000001169360_0; - %cmpi/e 14, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.68, 9; - %pushi/vec4 6, 0, 5; - %store/vec4 v0000000001169cc0_0, 0, 5; - %vpi_call/w 6 175 "$display", "ALU Op = 6 (XOR)" {0 0 0}; - %jmp T_4.69; -T_4.68 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v0000000001169cc0_0, 0, 5; -T_4.69 ; -T_4.67 ; -T_4.65 ; -T_4.63 ; -T_4.61 ; -T_4.59 ; -T_4.57 ; -T_4.55 ; -T_4.53 ; -T_4.51 ; -T_4.49 ; -T_4.47 ; -T_4.45 ; -T_4.43 ; -T_4.41 ; -T_4.39 ; -T_4.37 ; -T_4.35 ; -T_4.33 ; -T_4.31 ; -T_4.29 ; -T_4.27 ; -T_4.25 ; -T_4.23 ; -T_4.21 ; -T_4.19 ; - %load/vec4 v0000000001169360_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.70, 8; - %load/vec4 v0000000001168aa0_0; - %parti/s 5, 6, 4; - %store/vec4 v0000000001169b80_0, 0, 5; - %jmp T_4.71; -T_4.70 ; - %load/vec4 v0000000001169360_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.72, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v0000000001169b80_0, 0, 5; - %jmp T_4.73; -T_4.72 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v0000000001169b80_0, 0, 5; -T_4.73 ; -T_4.71 ; - %load/vec4 v0000000001169360_0; - %cmpi/e 40, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.74, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001168c80_0, 0, 1; - %jmp T_4.75; -T_4.74 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001168c80_0, 0, 1; -T_4.75 ; - %load/vec4 v0000000001169360_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.76, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001169ae0_0, 0, 1; - %jmp T_4.77; -T_4.76 ; - %load/vec4 v0000000001169360_0; - %cmpi/e 4, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 7, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 6, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 5, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %load/vec4 v0000000001169360_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169fe0_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169fe0_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169fe0_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169fe0_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %flag_or 8, 9; - %jmp/0xz T_4.78, 8; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001169ae0_0, 0, 1; - %jmp T_4.79; -T_4.78 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v0000000001169ae0_0, 0, 1; -T_4.79 ; -T_4.77 ; - %load/vec4 v0000000001169360_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001169360_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001169d60_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.80, 9; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001169a40_0, 0, 1; - %jmp T_4.81; -T_4.80 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001169a40_0, 0, 1; -T_4.81 ; - %jmp T_4; - .thread T_4, $push; - .scope S_00000000010d9360; -T_5 ; - %fork t_5, S_00000000010d94f0; - %jmp t_4; - .scope S_00000000010d94f0; -t_5 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v000000000116a4e0_0, 0, 32; -T_5.0 ; - %load/vec4 v000000000116a4e0_0; - %cmpi/s 32, 0, 32; - %jmp/0xz T_5.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v000000000116a4e0_0; - %store/vec4a v0000000001169ea0, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v000000000116a4e0_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v000000000116a4e0_0, 0, 32; - %jmp T_5.0; -T_5.1 ; - %end; - .scope S_00000000010d9360; -t_4 %join; - %end; - .thread T_5; - .scope S_00000000010d9360; -T_6 ; -Ewait_0 .event/or E_0000000001127c00, E_0x0; - %wait Ewait_0; - %load/vec4 v000000000116a620_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v0000000001169ea0, 4; - %store/vec4 v000000000116a580_0, 0, 32; - %load/vec4 v0000000001169680_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v0000000001169ea0, 4; - %store/vec4 v000000000116a1c0_0, 0, 32; - %jmp T_6; - .thread T_6, $push; - .scope S_00000000010d9360; -T_7 ; - %wait E_0000000001127640; - %load/vec4 v0000000001168a00_0; - %cmpi/e 0, 0, 5; - %jmp/0xz T_7.0, 4; - %jmp T_7.1; -T_7.0 ; - %load/vec4 v0000000001168dc0_0; - %flag_set/vec4 8; - %jmp/0xz T_7.2, 8; - %load/vec4 v000000000116a260_0; - %dup/vec4; - %pushi/vec4 32, 0, 6; - %cmp/u; - %jmp/1 T_7.4, 6; - %dup/vec4; - %pushi/vec4 36, 0, 6; - %cmp/u; - %jmp/1 T_7.5, 6; - %dup/vec4; - %pushi/vec4 33, 0, 6; - %cmp/u; - %jmp/1 T_7.6, 6; - %dup/vec4; - %pushi/vec4 37, 0, 6; - %cmp/u; - %jmp/1 T_7.7, 6; - %dup/vec4; - %pushi/vec4 34, 0, 6; - %cmp/u; - %jmp/1 T_7.8, 6; - %dup/vec4; - %pushi/vec4 38, 0, 6; - %cmp/u; - %jmp/1 T_7.9, 6; - %load/vec4 v000000000116a6c0_0; - %load/vec4 v0000000001168a00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001169ea0, 0, 4; - %jmp T_7.11; -T_7.4 ; - %load/vec4 v000000000116a580_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.12, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.13, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.14, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.15, 6; - %jmp T_7.16; -T_7.12 ; - %load/vec4 v000000000116a6c0_0; - %parti/s 1, 7, 4; - %replicate 24; - %load/vec4 v000000000116a6c0_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001168a00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001169ea0, 0, 4; - %jmp T_7.16; -T_7.13 ; - %load/vec4 v000000000116a6c0_0; - %parti/s 1, 15, 5; - %replicate 24; - %load/vec4 v000000000116a6c0_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001168a00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001169ea0, 0, 4; - %jmp T_7.16; -T_7.14 ; - %load/vec4 v000000000116a6c0_0; - %parti/s 1, 23, 6; - %replicate 24; - %load/vec4 v000000000116a6c0_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001168a00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001169ea0, 0, 4; - %jmp T_7.16; -T_7.15 ; - %load/vec4 v000000000116a6c0_0; - %parti/s 1, 31, 6; - %replicate 24; - %load/vec4 v000000000116a6c0_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001168a00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001169ea0, 0, 4; - %jmp T_7.16; -T_7.16 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.5 ; - %load/vec4 v000000000116a580_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.17, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.18, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.19, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.20, 6; - %jmp T_7.21; -T_7.17 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v000000000116a6c0_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001168a00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001169ea0, 0, 4; - %jmp T_7.21; -T_7.18 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v000000000116a6c0_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001168a00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001169ea0, 0, 4; - %jmp T_7.21; -T_7.19 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v000000000116a6c0_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001168a00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001169ea0, 0, 4; - %jmp T_7.21; -T_7.20 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v000000000116a6c0_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001168a00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001169ea0, 0, 4; - %jmp T_7.21; -T_7.21 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.6 ; - %load/vec4 v000000000116a580_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.22, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.23, 6; - %jmp T_7.24; -T_7.22 ; - %load/vec4 v000000000116a6c0_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v000000000116a6c0_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001168a00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001169ea0, 0, 4; - %jmp T_7.24; -T_7.23 ; - %load/vec4 v000000000116a6c0_0; - %parti/s 1, 31, 6; - %replicate 16; - %load/vec4 v000000000116a6c0_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001168a00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001169ea0, 0, 4; - %jmp T_7.24; -T_7.24 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.7 ; - %load/vec4 v000000000116a580_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.25, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.26, 6; - %jmp T_7.27; -T_7.25 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v000000000116a6c0_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001168a00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001169ea0, 0, 4; - %jmp T_7.27; -T_7.26 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v000000000116a6c0_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001168a00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001169ea0, 0, 4; - %jmp T_7.27; -T_7.27 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.8 ; - %load/vec4 v000000000116a580_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.28, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.29, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.30, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.31, 6; - %jmp T_7.32; -T_7.28 ; - %load/vec4 v000000000116a6c0_0; - %parti/s 8, 0, 2; - %load/vec4 v0000000001168a00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 24, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v0000000001169ea0, 4, 5; - %jmp T_7.32; -T_7.29 ; - %load/vec4 v000000000116a6c0_0; - %parti/s 16, 0, 2; - %load/vec4 v0000000001168a00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 16, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v0000000001169ea0, 4, 5; - %jmp T_7.32; -T_7.30 ; - %load/vec4 v000000000116a6c0_0; - %parti/s 24, 0, 2; - %load/vec4 v0000000001168a00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 8, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v0000000001169ea0, 4, 5; - %jmp T_7.32; -T_7.31 ; - %load/vec4 v000000000116a6c0_0; - %load/vec4 v0000000001168a00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001169ea0, 0, 4; - %jmp T_7.32; -T_7.32 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.9 ; - %load/vec4 v000000000116a580_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.33, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.34, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.35, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.36, 6; - %jmp T_7.37; -T_7.33 ; - %load/vec4 v000000000116a6c0_0; - %load/vec4 v0000000001168a00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001169ea0, 0, 4; - %jmp T_7.37; -T_7.34 ; - %load/vec4 v000000000116a6c0_0; - %parti/s 24, 8, 5; - %load/vec4 v0000000001168a00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001169ea0, 0, 4; - %jmp T_7.37; -T_7.35 ; - %load/vec4 v000000000116a6c0_0; - %parti/s 16, 16, 6; - %load/vec4 v0000000001168a00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001169ea0, 0, 4; - %jmp T_7.37; -T_7.36 ; - %load/vec4 v000000000116a6c0_0; - %parti/s 8, 24, 6; - %load/vec4 v0000000001168a00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001169ea0, 0, 4; - %jmp T_7.37; -T_7.37 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.11 ; - %pop/vec4 1; -T_7.2 ; -T_7.1 ; - %jmp T_7; - .thread T_7; - .scope S_00000000010e5fc0; -T_8 ; -Ewait_1 .event/or E_0000000001127bc0, E_0x0; - %wait Ewait_1; - %load/vec4 v0000000001169c20_0; - %dup/vec4; - %pushi/vec4 0, 0, 5; - %cmp/u; - %jmp/1 T_8.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 5; - %cmp/u; - %jmp/1 T_8.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 5; - %cmp/u; - %jmp/1 T_8.2, 6; - %dup/vec4; - %pushi/vec4 3, 0, 5; - %cmp/u; - %jmp/1 T_8.3, 6; - %dup/vec4; - %pushi/vec4 4, 0, 5; - %cmp/u; - %jmp/1 T_8.4, 6; - %dup/vec4; - %pushi/vec4 5, 0, 5; - %cmp/u; - %jmp/1 T_8.5, 6; - %dup/vec4; - %pushi/vec4 6, 0, 5; - %cmp/u; - %jmp/1 T_8.6, 6; - %dup/vec4; - %pushi/vec4 7, 0, 5; - %cmp/u; - %jmp/1 T_8.7, 6; - %dup/vec4; - %pushi/vec4 8, 0, 5; - %cmp/u; - %jmp/1 T_8.8, 6; - %dup/vec4; - %pushi/vec4 9, 0, 5; - %cmp/u; - %jmp/1 T_8.9, 6; - %dup/vec4; - %pushi/vec4 10, 0, 5; - %cmp/u; - %jmp/1 T_8.10, 6; - %dup/vec4; - %pushi/vec4 11, 0, 5; - %cmp/u; - %jmp/1 T_8.11, 6; - %dup/vec4; - %pushi/vec4 12, 0, 5; - %cmp/u; - %jmp/1 T_8.12, 6; - %dup/vec4; - %pushi/vec4 13, 0, 5; - %cmp/u; - %jmp/1 T_8.13, 6; - %dup/vec4; - %pushi/vec4 14, 0, 5; - %cmp/u; - %jmp/1 T_8.14, 6; - %dup/vec4; - %pushi/vec4 15, 0, 5; - %cmp/u; - %jmp/1 T_8.15, 6; - %dup/vec4; - %pushi/vec4 16, 0, 5; - %cmp/u; - %jmp/1 T_8.16, 6; - %dup/vec4; - %pushi/vec4 17, 0, 5; - %cmp/u; - %jmp/1 T_8.17, 6; - %dup/vec4; - %pushi/vec4 18, 0, 5; - %cmp/u; - %jmp/1 T_8.18, 6; - %dup/vec4; - %pushi/vec4 19, 0, 5; - %cmp/u; - %jmp/1 T_8.19, 6; - %dup/vec4; - %pushi/vec4 20, 0, 5; - %cmp/u; - %jmp/1 T_8.20, 6; - %dup/vec4; - %pushi/vec4 21, 0, 5; - %cmp/u; - %jmp/1 T_8.21, 6; - %dup/vec4; - %pushi/vec4 22, 0, 5; - %cmp/u; - %jmp/1 T_8.22, 6; - %dup/vec4; - %pushi/vec4 23, 0, 5; - %cmp/u; - %jmp/1 T_8.23, 6; - %jmp T_8.24; -T_8.0 ; - %load/vec4 v000000000116a080_0; - %load/vec4 v0000000001169220_0; - %add; - %store/vec4 v00000000011690e0_0, 0, 32; - %jmp T_8.24; -T_8.1 ; - %load/vec4 v000000000116a080_0; - %load/vec4 v0000000001169220_0; - %sub; - %store/vec4 v00000000011690e0_0, 0, 32; - %jmp T_8.24; -T_8.2 ; - %load/vec4 v000000000116a080_0; - %load/vec4 v0000000001169220_0; - %mul; - %store/vec4 v00000000011690e0_0, 0, 32; - %jmp T_8.24; -T_8.3 ; - %load/vec4 v000000000116a080_0; - %load/vec4 v0000000001169220_0; - %div/s; - %store/vec4 v00000000011690e0_0, 0, 32; - %jmp T_8.24; -T_8.4 ; - %load/vec4 v000000000116a080_0; - %load/vec4 v0000000001169220_0; - %and; - %store/vec4 v00000000011690e0_0, 0, 32; - %jmp T_8.24; -T_8.5 ; - %load/vec4 v000000000116a080_0; - %load/vec4 v0000000001169220_0; - %or; - %store/vec4 v00000000011690e0_0, 0, 32; - %jmp T_8.24; -T_8.6 ; - %load/vec4 v000000000116a080_0; - %load/vec4 v0000000001169220_0; - %xor; - %store/vec4 v00000000011690e0_0, 0, 32; - %jmp T_8.24; -T_8.7 ; - %load/vec4 v0000000001169220_0; - %ix/getv 4, v0000000001168e60_0; - %shiftl 4; - %store/vec4 v00000000011690e0_0, 0, 32; - %jmp T_8.24; -T_8.8 ; - %load/vec4 v0000000001169220_0; - %ix/getv 4, v000000000116a080_0; - %shiftl 4; - %store/vec4 v00000000011690e0_0, 0, 32; - %jmp T_8.24; -T_8.9 ; - %load/vec4 v0000000001169220_0; - %ix/getv 4, v0000000001168e60_0; - %shiftr 4; - %store/vec4 v00000000011690e0_0, 0, 32; - %jmp T_8.24; -T_8.10 ; - %load/vec4 v0000000001169220_0; - %ix/getv 4, v000000000116a080_0; - %shiftr 4; - %store/vec4 v00000000011690e0_0, 0, 32; - %jmp T_8.24; -T_8.11 ; - %load/vec4 v0000000001169220_0; - %ix/getv 4, v0000000001168e60_0; - %shiftr 4; - %store/vec4 v00000000011690e0_0, 0, 32; - %jmp T_8.24; -T_8.12 ; - %load/vec4 v0000000001169220_0; - %ix/getv 4, v000000000116a080_0; - %shiftr 4; - %store/vec4 v00000000011690e0_0, 0, 32; - %jmp T_8.24; -T_8.13 ; - %load/vec4 v000000000116a080_0; - %load/vec4 v0000000001169220_0; - %cmp/e; - %jmp/0xz T_8.25, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001168be0_0, 0, 1; - %jmp T_8.26; -T_8.25 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001168be0_0, 0, 1; -T_8.26 ; - %jmp T_8.24; -T_8.14 ; - %load/vec4 v000000000116a080_0; - %load/vec4 v0000000001169220_0; - %cmp/s; - %jmp/0xz T_8.27, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001168be0_0, 0, 1; - %jmp T_8.28; -T_8.27 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001168be0_0, 0, 1; -T_8.28 ; - %jmp T_8.24; -T_8.15 ; - %load/vec4 v000000000116a080_0; - %load/vec4 v0000000001169220_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.29, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001168be0_0, 0, 1; - %jmp T_8.30; -T_8.29 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001168be0_0, 0, 1; -T_8.30 ; - %jmp T_8.24; -T_8.16 ; - %load/vec4 v0000000001169220_0; - %load/vec4 v000000000116a080_0; - %cmp/s; - %jmp/0xz T_8.31, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001168be0_0, 0, 1; - %jmp T_8.32; -T_8.31 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001168be0_0, 0, 1; -T_8.32 ; - %jmp T_8.24; -T_8.17 ; - %load/vec4 v0000000001169220_0; - %load/vec4 v000000000116a080_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.33, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001168be0_0, 0, 1; - %jmp T_8.34; -T_8.33 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001168be0_0, 0, 1; -T_8.34 ; - %jmp T_8.24; -T_8.18 ; - %load/vec4 v000000000116a080_0; - %load/vec4 v0000000001169220_0; - %cmp/ne; - %jmp/0xz T_8.35, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001168be0_0, 0, 1; - %jmp T_8.36; -T_8.35 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001168be0_0, 0, 1; -T_8.36 ; - %jmp T_8.24; -T_8.19 ; - %load/vec4 v000000000116a080_0; - %store/vec4 v00000000011690e0_0, 0, 32; - %jmp T_8.24; -T_8.20 ; - %load/vec4 v000000000116a080_0; - %load/vec4 v0000000001169220_0; - %cmp/s; - %jmp/0xz T_8.37, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v00000000011690e0_0, 0, 32; -T_8.37 ; - %jmp T_8.24; -T_8.21 ; - %load/vec4 v000000000116a080_0; - %load/vec4 v0000000001169220_0; - %cmp/u; - %jmp/0xz T_8.39, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v00000000011690e0_0, 0, 32; -T_8.39 ; - %jmp T_8.24; -T_8.22 ; - %load/vec4 v000000000116a080_0; - %load/vec4 v0000000001169220_0; - %mul; - %store/vec4 v00000000011690e0_0, 0, 32; - %jmp T_8.24; -T_8.23 ; - %load/vec4 v000000000116a080_0; - %load/vec4 v0000000001169220_0; - %div; - %store/vec4 v00000000011690e0_0, 0, 32; - %jmp T_8.24; -T_8.24 ; - %pop/vec4 1; - %jmp T_8; - .thread T_8, $push; - .scope S_00000000010e5e30; -T_9 ; - %pushi/vec4 3217031168, 0, 32; - %store/vec4 v00000000011c37d0_0, 0, 32; - %end; - .thread T_9, $init; - .scope S_00000000010e5e30; -T_10 ; -Ewait_2 .event/or E_0000000001125940, E_0x0; - %wait Ewait_2; - %load/vec4 v00000000011c4310_0; - %store/vec4 v00000000011c3050_0, 0, 32; - %load/vec4 v00000000011c3f50_0; - %store/vec4 v0000000001169040_0, 0, 32; - %load/vec4 v00000000011c2b50_0; - %store/vec4 v000000000116a760_0, 0, 1; - %load/vec4 v00000000011c3cd0_0; - %store/vec4 v0000000001169720_0, 0, 1; - %load/vec4 v00000000011c46d0_0; - %store/vec4 v000000000116a800_0, 0, 32; - %jmp T_10; - .thread T_10, $push; - .scope S_00000000010e5e30; -T_11 ; -Ewait_3 .event/or E_0000000001126380, E_0x0; - %wait Ewait_3; - %load/vec4 v00000000011c30f0_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.2, 6; - %jmp T_11.3; -T_11.0 ; - %load/vec4 v00000000011c2f10_0; - %parti/s 5, 16, 6; - %store/vec4 v00000000011c4630_0, 0, 5; - %jmp T_11.3; -T_11.1 ; - %load/vec4 v00000000011c2f10_0; - %parti/s 5, 11, 5; - %store/vec4 v00000000011c4630_0, 0, 5; - %jmp T_11.3; -T_11.2 ; - %pushi/vec4 31, 0, 5; - %store/vec4 v00000000011c4630_0, 0, 5; - %jmp T_11.3; -T_11.3 ; - %pop/vec4 1; - %load/vec4 v00000000011c39b0_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.6, 6; - %jmp T_11.7; -T_11.4 ; - %load/vec4 v00000000011c3f50_0; - %store/vec4 v00000000011c3550_0, 0, 32; - %jmp T_11.7; -T_11.5 ; - %load/vec4 v0000000001169860_0; - %store/vec4 v00000000011c3550_0, 0, 32; - %jmp T_11.7; -T_11.6 ; - %load/vec4 v00000000011c37d0_0; - %addi 8, 0, 32; - %store/vec4 v00000000011c3550_0, 0, 32; - %jmp T_11.7; -T_11.7 ; - %pop/vec4 1; - %load/vec4 v00000000011c3730_0; - %dup/vec4; - %pushi/vec4 1, 0, 1; - %cmp/u; - %jmp/1 T_11.8, 6; - %dup/vec4; - %pushi/vec4 0, 0, 1; - %cmp/u; - %jmp/1 T_11.9, 6; - %jmp T_11.10; -T_11.8 ; - %load/vec4 v00000000011c2f10_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v00000000011c2f10_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %store/vec4 v000000000110df20_0, 0, 32; - %jmp T_11.10; -T_11.9 ; - %load/vec4 v00000000011c46d0_0; - %store/vec4 v000000000110df20_0, 0, 32; - %jmp T_11.10; -T_11.10 ; - %pop/vec4 1; - %jmp T_11; - .thread T_11, $push; - .scope S_000000000112aab0; -T_12 ; - %vpi_call/w 3 36 "$dumpfile", "mips_cpu_harvard.vcd" {0 0 0}; - %vpi_call/w 3 37 "$dumpvars", 32'sb00000000000000000000000000000000, S_000000000112aab0 {0 0 0}; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011c5380_0, 0, 1; - %pushi/vec4 100, 0, 32; -T_12.0 %dup/vec4; - %pushi/vec4 0, 0, 32; - %cmp/s; - %jmp/1xz T_12.1, 5; - %jmp/1 T_12.1, 4; - %pushi/vec4 1, 0, 32; - %sub; - %delay 10, 0; - %load/vec4 v00000000011c5380_0; - %nor/r; - %store/vec4 v00000000011c5380_0, 0, 1; - %delay 10, 0; - %load/vec4 v00000000011c5380_0; - %nor/r; - %store/vec4 v00000000011c5380_0, 0, 1; - %jmp T_12.0; -T_12.1 ; - %pop/vec4 1; - %vpi_call/w 3 47 "$fatal", 32'sb00000000000000000000000000000010, "Simulation did not finish within %d cycles.", P_0000000001073c18 {0 0 0}; - %end; - .thread T_12; - .scope S_000000000112aab0; -T_13 ; - %vpi_call/w 3 51 "$display", "Initial Reset 0" {0 0 0}; - %pushi/vec4 0, 0, 1; - %assign/vec4 v00000000011c5560_0, 0; - %vpi_call/w 3 55 "$display", "Initial Reset 1" {0 0 0}; - %wait E_0000000001128480; - %pushi/vec4 1, 0, 1; - %assign/vec4 v00000000011c5560_0, 0; - %vpi_call/w 3 59 "$display", "Initial Reset 0: Start Program" {0 0 0}; - %wait E_0000000001128480; - %pushi/vec4 0, 0, 1; - %assign/vec4 v00000000011c5560_0, 0; - %wait E_0000000001128480; - %load/vec4 v00000000011c63c0_0; - %pad/u 32; - %cmpi/e 1, 0, 32; - %jmp/0xz T_13.0, 4; - %jmp T_13.1; -T_13.0 ; - %vpi_call/w 3 65 "$display", "TB: CPU did not set active=1 after reset." {0 0 0}; -T_13.1 ; -T_13.2 ; - %load/vec4 v00000000011c63c0_0; - %flag_set/vec4 8; - %jmp/0xz T_13.3, 8; - %wait E_0000000001128480; - %vpi_call/w 3 71 "$display", "Reg File Write data: %d", v00000000011c3550_0 {0 0 0}; - %jmp T_13.2; -T_13.3 ; - %wait E_0000000001128480; - %vpi_call/w 3 74 "$display", "TB: CPU Halt; active=0" {0 0 0}; - %vpi_call/w 3 75 "$display", "Output:" {0 0 0}; - %vpi_call/w 3 76 "$display", "%d", v00000000011c6460_0 {0 0 0}; - %vpi_call/w 3 77 "$finish" {0 0 0}; - %end; - .thread T_13; -# The file index is used to find the file name in the following table. -:file_names 10; - "N/A"; - ""; - "-"; - "testbench/mips_cpu_harvard_tb.v"; - "rtl/mips_cpu_harvard.v"; - "rtl/mips_cpu_alu.v"; - "rtl/mips_cpu_control.v"; - "rtl/mips_cpu_pc.v"; - "rtl/mips_cpu_regfile.v"; - "rtl/mips_cpu_memory.v"; diff --git a/exec/mips_cpu_harvard_tb_and b/exec/mips_cpu_harvard_tb_and deleted file mode 100644 index e921809..0000000 --- a/exec/mips_cpu_harvard_tb_and +++ /dev/null @@ -1,2738 +0,0 @@ -#! /usr/local/iverilog/bin/vvp -:ivl_version "11.0 (devel)"; -:ivl_delay_selection "TYPICAL"; -:vpi_time_precision + 0; -:vpi_module "C:\iverilog\lib\ivl\system.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_sys.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_textio.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2005_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\va_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2009.vpi"; -S_000000000124af90 .scope package, "$unit" "$unit" 2 1; - .timescale 0 0; -S_000000000094ec90 .scope module, "mips_cpu_harvard_tb" "mips_cpu_harvard_tb" 3 1; - .timescale 0 0; -P_0000000000934f30 .param/str "RAM_INIT_FILE" 0 3 3, "inputs/and.txt"; -P_0000000000934f68 .param/l "TIMEOUT_CYCLES" 0 3 4, +C4<00000000000000000000000001100100>; -v00000000012a5560_0 .net "active", 0 0, v000000000124a4e0_0; 1 drivers -v00000000012a4de0_0 .var "clk", 0 0; -v00000000012a6780_0 .var "clk_enable", 0 0; -v00000000012a51a0_0 .net "data_address", 31 0, v0000000001248e60_0; 1 drivers -v00000000012a5880_0 .net "data_read", 0 0, v0000000001248fa0_0; 1 drivers -v00000000012a6460_0 .net "data_readdata", 31 0, L_00000000012a5ce0; 1 drivers -v00000000012a5b00_0 .net "data_write", 0 0, v0000000001249540_0; 1 drivers -v00000000012a5920_0 .net "data_writedata", 31 0, v00000000012495e0_0; 1 drivers -v00000000012a5d80_0 .net "instr_address", 31 0, v00000000012a30f0_0; 1 drivers -v00000000012a59c0_0 .net "instr_readdata", 31 0, L_00000000012a65a0; 1 drivers -v00000000012a57e0_0 .net "register_v0", 31 0, L_000000000094ead0; 1 drivers -v00000000012a5380_0 .var "reset", 0 0; -S_000000000094ee20 .scope module, "cpuInst" "mips_cpu_harvard" 3 19, 4 1 0, S_000000000094ec90; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "reset"; - .port_info 2 /OUTPUT 1 "active"; - .port_info 3 /OUTPUT 32 "register_v0"; - .port_info 4 /INPUT 1 "clk_enable"; - .port_info 5 /OUTPUT 32 "instr_address"; - .port_info 6 /INPUT 32 "instr_readdata"; - .port_info 7 /OUTPUT 32 "data_address"; - .port_info 8 /OUTPUT 1 "data_write"; - .port_info 9 /OUTPUT 1 "data_read"; - .port_info 10 /OUTPUT 32 "data_writedata"; - .port_info 11 /INPUT 32 "data_readdata"; -v000000000124a6c0_0 .net "active", 0 0, v000000000124a4e0_0; alias, 1 drivers -v0000000001249400_0 .net "clk", 0 0, v00000000012a4de0_0; 1 drivers -v0000000001248dc0_0 .net "clk_enable", 0 0, v00000000012a6780_0; 1 drivers -v0000000001248e60_0 .var "data_address", 31 0; -v0000000001248fa0_0 .var "data_read", 0 0; -v00000000012494a0_0 .net "data_readdata", 31 0, L_00000000012a5ce0; alias, 1 drivers -v0000000001249540_0 .var "data_write", 0 0; -v00000000012495e0_0 .var "data_writedata", 31 0; -v000000000092ed00_0 .var "in_B", 31 0; -v00000000012a3370_0 .net "in_opcode", 5 0, L_00000000012a5600; 1 drivers -v00000000012a4130_0 .net "in_pc_in", 31 0, v0000000001249ae0_0; 1 drivers -v00000000012a4270_0 .net "in_readreg1", 4 0, L_00000000012a4fc0; 1 drivers -v00000000012a3690_0 .net "in_readreg2", 4 0, L_00000000012a5ec0; 1 drivers -v00000000012a3910_0 .var "in_writedata", 31 0; -v00000000012a43b0_0 .var "in_writereg", 4 0; -v00000000012a30f0_0 .var "instr_address", 31 0; -v00000000012a4630_0 .net "instr_readdata", 31 0, L_00000000012a65a0; alias, 1 drivers -v00000000012a3190_0 .net "out_ALUCond", 0 0, v0000000001249d60_0; 1 drivers -v00000000012a3410_0 .net "out_ALUOp", 4 0, v0000000001249180_0; 1 drivers -v00000000012a4770_0 .net "out_ALURes", 31 0, v00000000012490e0_0; 1 drivers -v00000000012a4810_0 .net "out_ALUSrc", 0 0, v0000000001248a00_0; 1 drivers -v00000000012a3a50_0 .net "out_MemRead", 0 0, v0000000001248aa0_0; 1 drivers -v00000000012a41d0_0 .net "out_MemWrite", 0 0, v0000000001249f40_0; 1 drivers -v00000000012a4310_0 .net "out_MemtoReg", 1 0, v0000000001248960_0; 1 drivers -v00000000012a46d0_0 .net "out_PC", 1 0, v0000000001249720_0; 1 drivers -v00000000012a34b0_0 .net "out_RegDst", 1 0, v00000000012497c0_0; 1 drivers -v00000000012a3e10_0 .net "out_RegWrite", 0 0, v000000000124a580_0; 1 drivers -v00000000012a3b90_0 .var "out_pc_out", 31 0; -v00000000012a3c30_0 .net "out_readdata1", 31 0, v000000000124a800_0; 1 drivers -v00000000012a44f0_0 .net "out_readdata2", 31 0, v0000000001249c20_0; 1 drivers -v00000000012a3550_0 .net "out_shamt", 4 0, v0000000001249b80_0; 1 drivers -v00000000012a35f0_0 .net "register_v0", 31 0, L_000000000094ead0; alias, 1 drivers -v00000000012a39b0_0 .net "reset", 0 0, v00000000012a5380_0; 1 drivers -E_00000000009473c0/0 .event edge, v00000000012497c0_0, v0000000001249ea0_0, v0000000001249ea0_0, v0000000001248960_0; -E_00000000009473c0/1 .event edge, v00000000012490e0_0, v00000000012494a0_0, v0000000001248f00_0, v0000000001248a00_0; -E_00000000009473c0/2 .event edge, v0000000001249ea0_0, v0000000001249ea0_0, v0000000001249c20_0; -E_00000000009473c0 .event/or E_00000000009473c0/0, E_00000000009473c0/1, E_00000000009473c0/2; -E_0000000000946ac0/0 .event edge, v0000000001249ae0_0, v00000000012490e0_0, v0000000001249f40_0, v0000000001248aa0_0; -E_0000000000946ac0/1 .event edge, v0000000001249c20_0; -E_0000000000946ac0 .event/or E_0000000000946ac0/0, E_0000000000946ac0/1; -L_00000000012a4fc0 .part L_00000000012a65a0, 21, 5; -L_00000000012a5ec0 .part L_00000000012a65a0, 16, 5; -L_00000000012a5600 .part L_00000000012a65a0, 26, 6; -S_0000000000905e30 .scope module, "alu" "mips_cpu_alu" 4 121, 5 1 0, S_000000000094ee20; - .timescale 0 0; - .port_info 0 /INPUT 32 "A"; - .port_info 1 /INPUT 32 "B"; - .port_info 2 /INPUT 5 "ALUOp"; - .port_info 3 /INPUT 5 "shamt"; - .port_info 4 /OUTPUT 1 "ALUCond"; - .port_info 5 /OUTPUT 32 "ALURes"; -enum000000000122bd00 .enum4 (5) - "ADD" 5'b00000, - "SUB" 5'b00001, - "MUL" 5'b00010, - "DIV" 5'b00011, - "AND" 5'b00100, - "OR" 5'b00101, - "XOR" 5'b00110, - "SLL" 5'b00111, - "SLLV" 5'b01000, - "SRL" 5'b01001, - "SRLV" 5'b01010, - "SRA" 5'b01011, - "SRAV" 5'b01100, - "EQ" 5'b01101, - "LES" 5'b01110, - "LEQ" 5'b01111, - "GRT" 5'b10000, - "GEQ" 5'b10001, - "NEQ" 5'b10010, - "PAS" 5'b10011, - "SLT" 5'b10100, - "SLTU" 5'b10101, - "MULU" 5'b10110, - "DIVU" 5'b10111 - ; -L_000000000094e7c0 .functor BUFZ 5, v0000000001249180_0, C4<00000>, C4<00000>, C4<00000>; -v0000000001249e00_0 .net "A", 31 0, v000000000124a800_0; alias, 1 drivers -v0000000001249d60_0 .var "ALUCond", 0 0; -v0000000001249a40_0 .net "ALUOp", 4 0, v0000000001249180_0; alias, 1 drivers -v000000000124a620_0 .net "ALUOps", 4 0, L_000000000094e7c0; 1 drivers -v00000000012490e0_0 .var/s "ALURes", 31 0; -v0000000001249040_0 .net "B", 31 0, v000000000092ed00_0; 1 drivers -v0000000001249220_0 .net "shamt", 4 0, v0000000001249b80_0; alias, 1 drivers -E_0000000000940c40 .event edge, v000000000124a620_0, v0000000001249e00_0, v0000000001249040_0, v0000000001249220_0; -S_0000000000905fc0 .scope module, "control" "mips_cpu_control" 4 90, 6 1 0, S_000000000094ee20; - .timescale 0 0; - .port_info 0 /INPUT 32 "Instr"; - .port_info 1 /INPUT 1 "ALUCond"; - .port_info 2 /OUTPUT 2 "CtrlRegDst"; - .port_info 3 /OUTPUT 2 "CtrlPC"; - .port_info 4 /OUTPUT 1 "CtrlMemRead"; - .port_info 5 /OUTPUT 2 "CtrlMemtoReg"; - .port_info 6 /OUTPUT 5 "CtrlALUOp"; - .port_info 7 /OUTPUT 5 "Ctrlshamt"; - .port_info 8 /OUTPUT 1 "CtrlMemWrite"; - .port_info 9 /OUTPUT 1 "CtrlALUSrc"; - .port_info 10 /OUTPUT 1 "CtrlRegWrite"; -enum0000000001229270 .enum4 (6) - "SLL" 6'b000000, - "SRL" 6'b000010, - "SRA" 6'b000011, - "SLLV" 6'b000100, - "SRLV" 6'b000110, - "SRAV" 6'b000111, - "JR" 6'b001000, - "JALR" 6'b001001, - "MTHI" 6'b010001, - "MTLO" 6'b010011, - "MULT" 6'b011000, - "MULTU" 6'b011001, - "DIV" 6'b011010, - "DIVU" 6'b011011, - "ADDU" 6'b100001, - "SUBU" 6'b100011, - "AND" 6'b100100, - "OR" 6'b100101, - "XOR" 6'b100110, - "SLT" 6'b101010, - "SLTU" 6'b101011 - ; -enum000000000122b8a0 .enum4 (6) - "SPECIAL" 6'b000000, - "REGIMM" 6'b000001, - "J" 6'b000010, - "JAL" 6'b000011, - "BEQ" 6'b000100, - "BNE" 6'b000101, - "BLEZ" 6'b000110, - "BGTZ" 6'b000111, - "ADDI" 6'b001000, - "ADDIU" 6'b001001, - "SLTI" 6'b001010, - "SLTIU" 6'b001011, - "ANDI" 6'b001100, - "ORI" 6'b001101, - "XORI" 6'b001110, - "LUI" 6'b001111, - "LB" 6'b100000, - "LH" 6'b100001, - "LWL" 6'b100010, - "LW" 6'b100011, - "LBU" 6'b100100, - "LHU" 6'b100101, - "LWR" 6'b100110, - "SB" 6'b101000, - "SH" 6'b101001, - "SW" 6'b101011 - ; -enum000000000122b950 .enum4 (5) - "BLTZ" 5'b00000, - "BGEZ" 5'b00001, - "BLTZAL" 5'b10000, - "BGEZAL" 5'b10001 - ; -v000000000124a760_0 .net "ALUCond", 0 0, v0000000001249d60_0; alias, 1 drivers -v0000000001249180_0 .var "CtrlALUOp", 4 0; -v0000000001248a00_0 .var "CtrlALUSrc", 0 0; -v0000000001248aa0_0 .var "CtrlMemRead", 0 0; -v0000000001249f40_0 .var "CtrlMemWrite", 0 0; -v0000000001248960_0 .var "CtrlMemtoReg", 1 0; -v0000000001249720_0 .var "CtrlPC", 1 0; -v00000000012497c0_0 .var "CtrlRegDst", 1 0; -v000000000124a580_0 .var "CtrlRegWrite", 0 0; -v0000000001249b80_0 .var "Ctrlshamt", 4 0; -v0000000001249ea0_0 .net "Instr", 31 0, L_00000000012a65a0; alias, 1 drivers -v0000000001248b40_0 .net "funct", 5 0, L_00000000012a5420; 1 drivers -v0000000001249fe0_0 .net "op", 5 0, L_00000000012a4ac0; 1 drivers -v000000000124a440_0 .net "rt", 4 0, L_00000000012a56a0; 1 drivers -E_0000000000947580/0 .event edge, v0000000001249fe0_0, v0000000001248b40_0, v0000000001249d60_0, v000000000124a440_0; -E_0000000000947580/1 .event edge, v0000000001249ea0_0; -E_0000000000947580 .event/or E_0000000000947580/0, E_0000000000947580/1; -L_00000000012a4ac0 .part L_00000000012a65a0, 26, 6; -L_00000000012a5420 .part L_00000000012a65a0, 0, 6; -L_00000000012a56a0 .part L_00000000012a65a0, 16, 5; -S_0000000000906150 .scope module, "pc" "pc" 4 79, 7 1 0, S_000000000094ee20; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "rst"; - .port_info 2 /INPUT 2 "pc_ctrl"; - .port_info 3 /INPUT 32 "pc_in"; - .port_info 4 /INPUT 5 "rs"; - .port_info 5 /OUTPUT 32 "pc_out"; - .port_info 6 /OUTPUT 1 "active"; -v000000000124a4e0_0 .var "active", 0 0; -v00000000012492c0_0 .net "clk", 0 0, v00000000012a4de0_0; alias, 1 drivers -v0000000001249cc0_0 .net "pc_ctrl", 1 0, v0000000001249720_0; alias, 1 drivers -v000000000124a080_0 .var "pc_curr", 31 0; -v0000000001248f00_0 .net "pc_in", 31 0, v00000000012a3b90_0; 1 drivers -v0000000001249ae0_0 .var "pc_out", 31 0; -o000000000124d018 .functor BUFZ 5, C4; HiZ drive -v000000000124a120_0 .net "rs", 4 0, o000000000124d018; 0 drivers -v0000000001248be0_0 .net "rst", 0 0, v00000000012a5380_0; alias, 1 drivers -E_0000000000940d00 .event posedge, v00000000012492c0_0; -S_00000000008f91d0 .scope module, "regfile" "mips_cpu_regfile" 4 106, 8 1 0, S_000000000094ee20; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 5 "readreg1"; - .port_info 2 /INPUT 5 "readreg2"; - .port_info 3 /INPUT 5 "writereg"; - .port_info 4 /INPUT 32 "writedata"; - .port_info 5 /INPUT 1 "regwrite"; - .port_info 6 /INPUT 6 "opcode"; - .port_info 7 /OUTPUT 32 "readdata1"; - .port_info 8 /OUTPUT 32 "readdata2"; - .port_info 9 /OUTPUT 32 "regv0"; -v0000000001249360_2 .array/port v0000000001249360, 2; -L_000000000094ead0 .functor BUFZ 32, v0000000001249360_2, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; -v0000000001248c80_0 .net "clk", 0 0, v00000000012a4de0_0; alias, 1 drivers -v0000000001249360 .array "memory", 0 31, 31 0; -v000000000124a300_0 .net "opcode", 5 0, L_00000000012a5600; alias, 1 drivers -v000000000124a800_0 .var "readdata1", 31 0; -v0000000001249c20_0 .var "readdata2", 31 0; -v0000000001248d20_0 .net "readreg1", 4 0, L_00000000012a4fc0; alias, 1 drivers -v000000000124a1c0_0 .net "readreg2", 4 0, L_00000000012a5ec0; alias, 1 drivers -v0000000001249860_0 .net "regv0", 31 0, L_000000000094ead0; alias, 1 drivers -v000000000124a260_0 .net "regwrite", 0 0, v000000000124a580_0; alias, 1 drivers -v00000000012499a0_0 .net "writedata", 31 0, v00000000012a3910_0; 1 drivers -v000000000124a3a0_0 .net "writereg", 4 0, v00000000012a43b0_0; 1 drivers -E_0000000000940dc0 .event negedge, v00000000012492c0_0; -v0000000001249360_0 .array/port v0000000001249360, 0; -v0000000001249360_1 .array/port v0000000001249360, 1; -E_00000000009411c0/0 .event edge, v0000000001248d20_0, v0000000001249360_0, v0000000001249360_1, v0000000001249360_2; -v0000000001249360_3 .array/port v0000000001249360, 3; -v0000000001249360_4 .array/port v0000000001249360, 4; -v0000000001249360_5 .array/port v0000000001249360, 5; -v0000000001249360_6 .array/port v0000000001249360, 6; -E_00000000009411c0/1 .event edge, v0000000001249360_3, v0000000001249360_4, v0000000001249360_5, v0000000001249360_6; -v0000000001249360_7 .array/port v0000000001249360, 7; -v0000000001249360_8 .array/port v0000000001249360, 8; -v0000000001249360_9 .array/port v0000000001249360, 9; -v0000000001249360_10 .array/port v0000000001249360, 10; -E_00000000009411c0/2 .event edge, v0000000001249360_7, v0000000001249360_8, v0000000001249360_9, v0000000001249360_10; -v0000000001249360_11 .array/port v0000000001249360, 11; -v0000000001249360_12 .array/port v0000000001249360, 12; -v0000000001249360_13 .array/port v0000000001249360, 13; -v0000000001249360_14 .array/port v0000000001249360, 14; -E_00000000009411c0/3 .event edge, v0000000001249360_11, v0000000001249360_12, v0000000001249360_13, v0000000001249360_14; -v0000000001249360_15 .array/port v0000000001249360, 15; -v0000000001249360_16 .array/port v0000000001249360, 16; -v0000000001249360_17 .array/port v0000000001249360, 17; -v0000000001249360_18 .array/port v0000000001249360, 18; -E_00000000009411c0/4 .event edge, v0000000001249360_15, v0000000001249360_16, v0000000001249360_17, v0000000001249360_18; -v0000000001249360_19 .array/port v0000000001249360, 19; -v0000000001249360_20 .array/port v0000000001249360, 20; -v0000000001249360_21 .array/port v0000000001249360, 21; -v0000000001249360_22 .array/port v0000000001249360, 22; -E_00000000009411c0/5 .event edge, v0000000001249360_19, v0000000001249360_20, v0000000001249360_21, v0000000001249360_22; -v0000000001249360_23 .array/port v0000000001249360, 23; -v0000000001249360_24 .array/port v0000000001249360, 24; -v0000000001249360_25 .array/port v0000000001249360, 25; -v0000000001249360_26 .array/port v0000000001249360, 26; -E_00000000009411c0/6 .event edge, v0000000001249360_23, v0000000001249360_24, v0000000001249360_25, v0000000001249360_26; -v0000000001249360_27 .array/port v0000000001249360, 27; -v0000000001249360_28 .array/port v0000000001249360, 28; -v0000000001249360_29 .array/port v0000000001249360, 29; -v0000000001249360_30 .array/port v0000000001249360, 30; -E_00000000009411c0/7 .event edge, v0000000001249360_27, v0000000001249360_28, v0000000001249360_29, v0000000001249360_30; -v0000000001249360_31 .array/port v0000000001249360, 31; -E_00000000009411c0/8 .event edge, v0000000001249360_31, v000000000124a1c0_0; -E_00000000009411c0 .event/or E_00000000009411c0/0, E_00000000009411c0/1, E_00000000009411c0/2, E_00000000009411c0/3, E_00000000009411c0/4, E_00000000009411c0/5, E_00000000009411c0/6, E_00000000009411c0/7, E_00000000009411c0/8; -S_00000000008f9360 .scope begin, "$unm_blk_121" "$unm_blk_121" 8 16, 8 16 0, S_00000000008f91d0; - .timescale 0 0; -v0000000001249900_0 .var/i "i", 31 0; -S_00000000008ee6f0 .scope module, "ramInst" "mips_cpu_memory" 3 9, 9 1 0, S_000000000094ec90; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 32 "data_address"; - .port_info 2 /INPUT 1 "data_write"; - .port_info 3 /INPUT 1 "data_read"; - .port_info 4 /INPUT 32 "data_writedata"; - .port_info 5 /OUTPUT 32 "data_readdata"; - .port_info 6 /INPUT 32 "instr_address"; - .port_info 7 /OUTPUT 32 "instr_readdata"; -P_00000000009412c0 .param/str "RAM_INIT_FILE" 0 9 16, "inputs/and.txt"; -L_000000000094ea60 .functor AND 1, L_00000000012a54c0, L_00000000012a6640, C4<1>, C4<1>; -v00000000012a2970_0 .net *"_ivl_0", 31 0, L_00000000012a5e20; 1 drivers -L_00000000012a79e8 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v00000000012a4590_0 .net/2u *"_ivl_12", 31 0, L_00000000012a79e8; 1 drivers -v00000000012a3ff0_0 .net *"_ivl_14", 0 0, L_00000000012a54c0; 1 drivers -L_00000000012a7a30 .functor BUFT 1, C4<10111111110000000000000001000000>, C4<0>, C4<0>, C4<0>; -v00000000012a3730_0 .net/2u *"_ivl_16", 31 0, L_00000000012a7a30; 1 drivers -v00000000012a3af0_0 .net *"_ivl_18", 0 0, L_00000000012a6640; 1 drivers -v00000000012a3eb0_0 .net *"_ivl_2", 31 0, L_00000000012a5a60; 1 drivers -v00000000012a3cd0_0 .net *"_ivl_21", 0 0, L_000000000094ea60; 1 drivers -v00000000012a2a10_0 .net *"_ivl_22", 31 0, L_00000000012a6820; 1 drivers -L_00000000012a7a78 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v00000000012a2ab0_0 .net/2u *"_ivl_24", 31 0, L_00000000012a7a78; 1 drivers -v00000000012a3d70_0 .net *"_ivl_26", 31 0, L_00000000012a5240; 1 drivers -v00000000012a2b50_0 .net *"_ivl_28", 31 0, L_00000000012a4980; 1 drivers -v00000000012a2dd0_0 .net *"_ivl_30", 29 0, L_00000000012a4a20; 1 drivers -L_00000000012a7ac0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v00000000012a2bf0_0 .net *"_ivl_32", 1 0, L_00000000012a7ac0; 1 drivers -L_00000000012a7b08 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v00000000012a2c90_0 .net *"_ivl_34", 31 0, L_00000000012a7b08; 1 drivers -v00000000012a4090_0 .net *"_ivl_4", 29 0, L_00000000012a6500; 1 drivers -L_00000000012a7958 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v00000000012a2e70_0 .net *"_ivl_6", 1 0, L_00000000012a7958; 1 drivers -L_00000000012a79a0 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v00000000012a2f10_0 .net *"_ivl_8", 31 0, L_00000000012a79a0; 1 drivers -v00000000012a3f50_0 .net "clk", 0 0, v00000000012a4de0_0; alias, 1 drivers -v00000000012a2fb0_0 .net "data_address", 31 0, v0000000001248e60_0; alias, 1 drivers -v00000000012a3050 .array "data_memory", 63 0, 31 0; -v00000000012a3230_0 .net "data_read", 0 0, v0000000001248fa0_0; alias, 1 drivers -v00000000012a32d0_0 .net "data_readdata", 31 0, L_00000000012a5ce0; alias, 1 drivers -v00000000012a37d0_0 .net "data_write", 0 0, v0000000001249540_0; alias, 1 drivers -v00000000012a3870_0 .net "data_writedata", 31 0, v00000000012495e0_0; alias, 1 drivers -v00000000012a5100_0 .net "instr_address", 31 0, v00000000012a30f0_0; alias, 1 drivers -v00000000012a5c40 .array "instr_memory", 63 0, 31 0; -v00000000012a5ba0_0 .net "instr_readdata", 31 0, L_00000000012a65a0; alias, 1 drivers -L_00000000012a5e20 .array/port v00000000012a3050, L_00000000012a5a60; -L_00000000012a6500 .part v0000000001248e60_0, 2, 30; -L_00000000012a5a60 .concat [ 30 2 0 0], L_00000000012a6500, L_00000000012a7958; -L_00000000012a5ce0 .functor MUXZ 32, L_00000000012a79a0, L_00000000012a5e20, v0000000001248fa0_0, C4<>; -L_00000000012a54c0 .cmp/ge 32, v00000000012a30f0_0, L_00000000012a79e8; -L_00000000012a6640 .cmp/gt 32, L_00000000012a7a30, v00000000012a30f0_0; -L_00000000012a6820 .array/port v00000000012a5c40, L_00000000012a4980; -L_00000000012a5240 .arith/sub 32, v00000000012a30f0_0, L_00000000012a7a78; -L_00000000012a4a20 .part L_00000000012a5240, 2, 30; -L_00000000012a4980 .concat [ 30 2 0 0], L_00000000012a4a20, L_00000000012a7ac0; -L_00000000012a65a0 .functor MUXZ 32, L_00000000012a7b08, L_00000000012a6820, L_000000000094ea60, C4<>; -S_00000000008b2680 .scope begin, "$unm_blk_104" "$unm_blk_104" 9 21, 9 21 0, S_00000000008ee6f0; - .timescale 0 0; -v00000000012a2d30_0 .var/i "i", 31 0; -S_00000000008b2810 .scope begin, "$ivl_for_loop0" "$ivl_for_loop0" 9 36, 9 36 0, S_00000000008b2680; - .timescale 0 0; -v00000000012a4450_0 .var/i "j", 31 0; - .scope S_00000000008ee6f0; -T_0 ; - %fork t_1, S_00000000008b2680; - %jmp t_0; - .scope S_00000000008b2680; -t_1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000012a2d30_0, 0, 32; -T_0.0 ; - %load/vec4 v00000000012a2d30_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v00000000012a2d30_0; - %store/vec4a v00000000012a3050, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000012a2d30_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000012a2d30_0, 0, 32; - %jmp T_0.0; -T_0.1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000012a2d30_0, 0, 32; -T_0.2 ; - %load/vec4 v00000000012a2d30_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.3, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v00000000012a2d30_0; - %store/vec4a v00000000012a5c40, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000012a2d30_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000012a2d30_0, 0, 32; - %jmp T_0.2; -T_0.3 ; - %vpi_call/w 9 32 "$display", "RAM: Loading RAM contents from %s", P_00000000009412c0 {0 0 0}; - %vpi_call/w 9 33 "$readmemh", P_00000000009412c0, v00000000012a5c40 {0 0 0}; - %fork t_3, S_00000000008b2810; - %jmp t_2; - .scope S_00000000008b2810; -t_3 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000012a4450_0, 0, 32; -T_0.4 ; - %load/vec4 v00000000012a4450_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.5, 5; - %pushi/vec4 3217031168, 0, 32; - %load/vec4 v00000000012a4450_0; - %muli 4, 0, 32; - %add; - %vpi_call/w 9 37 "$display", "byte +%h: %h", S<0,vec4,u32>, &A {1 0 0}; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000012a4450_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000012a4450_0, 0, 32; - %jmp T_0.4; -T_0.5 ; - %end; - .scope S_00000000008b2680; -t_2 %join; - %end; - .scope S_00000000008ee6f0; -t_0 %join; - %end; - .thread T_0; - .scope S_00000000008ee6f0; -T_1 ; - %wait E_0000000000940d00; - %load/vec4 v00000000012a3230_0; - %nor/r; - %load/vec4 v00000000012a37d0_0; - %and; - %flag_set/vec4 8; - %jmp/0xz T_1.0, 8; - %load/vec4 v00000000012a5100_0; - %load/vec4 v00000000012a2fb0_0; - %cmp/ne; - %jmp/0xz T_1.2, 4; - %load/vec4 v00000000012a3870_0; - %load/vec4 v00000000012a2fb0_0; - %ix/load 4, 2, 0; - %flag_set/imm 4, 0; - %shiftr 4; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012a3050, 0, 4; -T_1.2 ; -T_1.0 ; - %jmp T_1; - .thread T_1; - .scope S_0000000000906150; -T_2 ; - %load/vec4 v0000000001248f00_0; - %store/vec4 v0000000001249ae0_0, 0, 32; - %end; - .thread T_2; - .scope S_0000000000906150; -T_3 ; - %wait E_0000000000940d00; - %load/vec4 v0000000001248be0_0; - %flag_set/vec4 8; - %jmp/0xz T_3.0, 8; - %pushi/vec4 1, 0, 1; - %assign/vec4 v000000000124a4e0_0, 0; - %pushi/vec4 3217031168, 0, 32; - %assign/vec4 v0000000001249ae0_0, 0; - %jmp T_3.1; -T_3.0 ; - %load/vec4 v0000000001249ae0_0; - %cmpi/ne 0, 0, 32; - %jmp/0xz T_3.2, 4; - %load/vec4 v000000000124a4e0_0; - %assign/vec4 v000000000124a4e0_0, 0; - %load/vec4 v0000000001249cc0_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_3.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_3.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_3.6, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_3.7, 6; - %jmp T_3.8; -T_3.4 ; - %load/vec4 v0000000001249ae0_0; - %assign/vec4 v000000000124a080_0, 0; - %load/vec4 v000000000124a080_0; - %addi 4, 0, 32; - %assign/vec4 v0000000001249ae0_0, 0; - %vpi_call/w 7 27 "$display", "New PC from %h to %h", v000000000124a080_0, v0000000001249ae0_0 {0 0 0}; - %jmp T_3.8; -T_3.5 ; - %load/vec4 v0000000001248f00_0; - %assign/vec4 v0000000001249ae0_0, 0; - %jmp T_3.8; -T_3.6 ; - %load/vec4 v0000000001248f00_0; - %assign/vec4 v0000000001249ae0_0, 0; - %jmp T_3.8; -T_3.7 ; - %vpi_call/w 7 36 "$display", "JUMP REGISTER" {0 0 0}; - %pushi/vec4 0, 0, 32; - %assign/vec4 v0000000001249ae0_0, 0; - %jmp T_3.8; -T_3.8 ; - %pop/vec4 1; - %jmp T_3.3; -T_3.2 ; - %load/vec4 v0000000001249ae0_0; - %cmpi/e 0, 0, 32; - %jmp/0xz T_3.9, 4; - %pushi/vec4 0, 0, 1; - %assign/vec4 v000000000124a4e0_0, 0; -T_3.9 ; -T_3.3 ; -T_3.1 ; - %jmp T_3; - .thread T_3; - .scope S_0000000000905fc0; -T_4 ; - %wait E_0000000000947580; - %vpi_call/w 6 86 "$display", "Opcode: %h", v0000000001249fe0_0 {0 0 0}; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.0, 4; - %pushi/vec4 0, 0, 2; - %store/vec4 v00000000012497c0_0, 0, 2; - %vpi_call/w 6 89 "$display", "CTRLREGDST: Rt" {0 0 0}; - %jmp T_4.1; -T_4.0 ; - %load/vec4 v0000000001249fe0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.2, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v00000000012497c0_0, 0, 2; - %vpi_call/w 6 92 "$display", "CTRLREGDST: Rd" {0 0 0}; - %jmp T_4.3; -T_4.2 ; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 3, 0, 6; - %jmp/0xz T_4.4, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v00000000012497c0_0, 0, 2; - %vpi_call/w 6 95 "$display", "CTRLREGDST: Link" {0 0 0}; - %jmp T_4.5; -T_4.4 ; - %pushi/vec4 1, 1, 2; - %store/vec4 v00000000012497c0_0, 0, 2; - %vpi_call/w 6 96 "$display", "xxxxxxxxxxxxxx" {0 0 0}; -T_4.5 ; -T_4.3 ; -T_4.1 ; - %load/vec4 v000000000124a760_0; - %load/vec4 v0000000001249fe0_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001249fe0_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001249fe0_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001249fe0_0; - %pushi/vec4 5, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001249fe0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000124a440_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000124a440_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000124a440_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000124a440_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.6, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v0000000001249720_0, 0, 2; - %jmp T_4.7; -T_4.6 ; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 2, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 3, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.8, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v0000000001249720_0, 0, 2; - %jmp T_4.9; -T_4.8 ; - %load/vec4 v0000000001248b40_0; - %cmpi/e 8, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001248b40_0; - %cmpi/e 9, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.10, 4; - %pushi/vec4 3, 0, 2; - %store/vec4 v0000000001249720_0, 0, 2; - %jmp T_4.11; -T_4.10 ; - %pushi/vec4 0, 0, 2; - %store/vec4 v0000000001249720_0, 0, 2; -T_4.11 ; -T_4.9 ; -T_4.7 ; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.12, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001248aa0_0, 0, 1; - %pushi/vec4 1, 0, 2; - %store/vec4 v0000000001248960_0, 0, 2; - %vpi_call/w 6 112 "$display", "Memory read enabled" {0 0 0}; - %jmp T_4.13; -T_4.12 ; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.14, 9; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001248aa0_0, 0, 1; - %pushi/vec4 0, 0, 2; - %store/vec4 v0000000001248960_0, 0, 2; - %vpi_call/w 6 116 "$display", "Memory read disabled" {0 0 0}; - %jmp T_4.15; -T_4.14 ; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 3, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.16, 9; - %pushi/vec4 2, 0, 2; - %store/vec4 v0000000001248960_0, 0, 2; - %jmp T_4.17; -T_4.16 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v0000000001248aa0_0, 0, 1; -T_4.17 ; -T_4.15 ; -T_4.13 ; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.18, 9; - %pushi/vec4 0, 0, 5; - %store/vec4 v0000000001249180_0, 0, 5; - %vpi_call/w 6 124 "$display", "ALU OP = 0 (ADDU/ADDIU)" {0 0 0}; - %jmp T_4.19; -T_4.18 ; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 12, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.20, 9; - %pushi/vec4 4, 0, 5; - %store/vec4 v0000000001249180_0, 0, 5; - %jmp T_4.21; -T_4.20 ; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 4, 0, 6; - %jmp/0xz T_4.22, 4; - %pushi/vec4 13, 0, 5; - %store/vec4 v0000000001249180_0, 0, 5; - %jmp T_4.23; -T_4.22 ; - %load/vec4 v0000000001249fe0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000124a440_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000124a440_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.24, 8; - %pushi/vec4 17, 0, 5; - %store/vec4 v0000000001249180_0, 0, 5; - %jmp T_4.25; -T_4.24 ; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 7, 0, 6; - %jmp/0xz T_4.26, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v0000000001249180_0, 0, 5; - %jmp T_4.27; -T_4.26 ; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 6, 0, 6; - %jmp/0xz T_4.28, 4; - %pushi/vec4 15, 0, 5; - %store/vec4 v0000000001249180_0, 0, 5; - %jmp T_4.29; -T_4.28 ; - %load/vec4 v0000000001249fe0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000124a440_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000124a440_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.30, 8; - %pushi/vec4 14, 0, 5; - %store/vec4 v0000000001249180_0, 0, 5; - %jmp T_4.31; -T_4.30 ; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 5, 0, 6; - %jmp/0xz T_4.32, 4; - %pushi/vec4 18, 0, 5; - %store/vec4 v0000000001249180_0, 0, 5; - %jmp T_4.33; -T_4.32 ; - %load/vec4 v0000000001249fe0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.34, 8; - %pushi/vec4 3, 0, 5; - %store/vec4 v0000000001249180_0, 0, 5; - %jmp T_4.35; -T_4.34 ; - %load/vec4 v0000000001249fe0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.36, 8; - %pushi/vec4 23, 0, 5; - %store/vec4 v0000000001249180_0, 0, 5; - %jmp T_4.37; -T_4.36 ; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.38, 4; - %pushi/vec4 0, 0, 5; - %store/vec4 v0000000001249180_0, 0, 5; - %jmp T_4.39; -T_4.38 ; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.40, 4; - %pushi/vec4 7, 0, 5; - %store/vec4 v0000000001249180_0, 0, 5; - %jmp T_4.41; -T_4.40 ; - %load/vec4 v0000000001249fe0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.42, 8; - %pushi/vec4 19, 0, 5; - %store/vec4 v0000000001249180_0, 0, 5; - %jmp T_4.43; -T_4.42 ; - %load/vec4 v0000000001249fe0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.44, 8; - %pushi/vec4 2, 0, 5; - %store/vec4 v0000000001249180_0, 0, 5; - %jmp T_4.45; -T_4.44 ; - %load/vec4 v0000000001249fe0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.46, 8; - %pushi/vec4 22, 0, 5; - %store/vec4 v0000000001249180_0, 0, 5; - %jmp T_4.47; -T_4.46 ; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 13, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.48, 9; - %pushi/vec4 5, 0, 5; - %store/vec4 v0000000001249180_0, 0, 5; - %jmp T_4.49; -T_4.48 ; - %load/vec4 v0000000001249fe0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.50, 8; - %pushi/vec4 7, 0, 5; - %store/vec4 v0000000001249180_0, 0, 5; - %jmp T_4.51; -T_4.50 ; - %load/vec4 v0000000001249fe0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.52, 8; - %pushi/vec4 8, 0, 5; - %store/vec4 v0000000001249180_0, 0, 5; - %jmp T_4.53; -T_4.52 ; - %load/vec4 v0000000001249fe0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.54, 8; - %pushi/vec4 11, 0, 5; - %store/vec4 v0000000001249180_0, 0, 5; - %jmp T_4.55; -T_4.54 ; - %load/vec4 v0000000001249fe0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.56, 8; - %pushi/vec4 12, 0, 5; - %store/vec4 v0000000001249180_0, 0, 5; - %jmp T_4.57; -T_4.56 ; - %load/vec4 v0000000001249fe0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.58, 8; - %pushi/vec4 9, 0, 5; - %store/vec4 v0000000001249180_0, 0, 5; - %jmp T_4.59; -T_4.58 ; - %load/vec4 v0000000001249fe0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.60, 8; - %pushi/vec4 10, 0, 5; - %store/vec4 v0000000001249180_0, 0, 5; - %jmp T_4.61; -T_4.60 ; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 10, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.62, 9; - %pushi/vec4 20, 0, 5; - %store/vec4 v0000000001249180_0, 0, 5; - %jmp T_4.63; -T_4.62 ; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 11, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.64, 9; - %pushi/vec4 21, 0, 5; - %store/vec4 v0000000001249180_0, 0, 5; - %jmp T_4.65; -T_4.64 ; - %load/vec4 v0000000001249fe0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.66, 8; - %pushi/vec4 1, 0, 5; - %store/vec4 v0000000001249180_0, 0, 5; - %jmp T_4.67; -T_4.66 ; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 14, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.68, 9; - %pushi/vec4 6, 0, 5; - %store/vec4 v0000000001249180_0, 0, 5; - %vpi_call/w 6 175 "$display", "ALU Op = 6 (XOR)" {0 0 0}; - %jmp T_4.69; -T_4.68 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v0000000001249180_0, 0, 5; -T_4.69 ; -T_4.67 ; -T_4.65 ; -T_4.63 ; -T_4.61 ; -T_4.59 ; -T_4.57 ; -T_4.55 ; -T_4.53 ; -T_4.51 ; -T_4.49 ; -T_4.47 ; -T_4.45 ; -T_4.43 ; -T_4.41 ; -T_4.39 ; -T_4.37 ; -T_4.35 ; -T_4.33 ; -T_4.31 ; -T_4.29 ; -T_4.27 ; -T_4.25 ; -T_4.23 ; -T_4.21 ; -T_4.19 ; - %load/vec4 v0000000001249fe0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.70, 8; - %load/vec4 v0000000001249ea0_0; - %parti/s 5, 6, 4; - %store/vec4 v0000000001249b80_0, 0, 5; - %jmp T_4.71; -T_4.70 ; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.72, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v0000000001249b80_0, 0, 5; - %jmp T_4.73; -T_4.72 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v0000000001249b80_0, 0, 5; -T_4.73 ; -T_4.71 ; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 40, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.74, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001249f40_0, 0, 1; - %jmp T_4.75; -T_4.74 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001249f40_0, 0, 1; -T_4.75 ; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.76, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001248a00_0, 0, 1; - %jmp T_4.77; -T_4.76 ; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 4, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 7, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 6, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 5, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %load/vec4 v0000000001249fe0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000124a440_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000124a440_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000124a440_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000124a440_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %flag_or 8, 9; - %jmp/0xz T_4.78, 8; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001248a00_0, 0, 1; - %jmp T_4.79; -T_4.78 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v0000000001248a00_0, 0, 1; -T_4.79 ; -T_4.77 ; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001249fe0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001248b40_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.80, 9; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000124a580_0, 0, 1; - %jmp T_4.81; -T_4.80 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000124a580_0, 0, 1; -T_4.81 ; - %jmp T_4; - .thread T_4, $push; - .scope S_00000000008f91d0; -T_5 ; - %fork t_5, S_00000000008f9360; - %jmp t_4; - .scope S_00000000008f9360; -t_5 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v0000000001249900_0, 0, 32; -T_5.0 ; - %load/vec4 v0000000001249900_0; - %cmpi/s 32, 0, 32; - %jmp/0xz T_5.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v0000000001249900_0; - %store/vec4a v0000000001249360, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0000000001249900_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v0000000001249900_0, 0, 32; - %jmp T_5.0; -T_5.1 ; - %end; - .scope S_00000000008f91d0; -t_4 %join; - %end; - .thread T_5; - .scope S_00000000008f91d0; -T_6 ; -Ewait_0 .event/or E_00000000009411c0, E_0x0; - %wait Ewait_0; - %load/vec4 v0000000001248d20_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v0000000001249360, 4; - %store/vec4 v000000000124a800_0, 0, 32; - %load/vec4 v000000000124a1c0_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v0000000001249360, 4; - %store/vec4 v0000000001249c20_0, 0, 32; - %jmp T_6; - .thread T_6, $push; - .scope S_00000000008f91d0; -T_7 ; - %wait E_0000000000940dc0; - %load/vec4 v000000000124a3a0_0; - %cmpi/e 0, 0, 5; - %jmp/0xz T_7.0, 4; - %jmp T_7.1; -T_7.0 ; - %load/vec4 v000000000124a260_0; - %flag_set/vec4 8; - %jmp/0xz T_7.2, 8; - %load/vec4 v000000000124a300_0; - %dup/vec4; - %pushi/vec4 32, 0, 6; - %cmp/u; - %jmp/1 T_7.4, 6; - %dup/vec4; - %pushi/vec4 36, 0, 6; - %cmp/u; - %jmp/1 T_7.5, 6; - %dup/vec4; - %pushi/vec4 33, 0, 6; - %cmp/u; - %jmp/1 T_7.6, 6; - %dup/vec4; - %pushi/vec4 37, 0, 6; - %cmp/u; - %jmp/1 T_7.7, 6; - %dup/vec4; - %pushi/vec4 34, 0, 6; - %cmp/u; - %jmp/1 T_7.8, 6; - %dup/vec4; - %pushi/vec4 38, 0, 6; - %cmp/u; - %jmp/1 T_7.9, 6; - %load/vec4 v00000000012499a0_0; - %load/vec4 v000000000124a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001249360, 0, 4; - %jmp T_7.11; -T_7.4 ; - %load/vec4 v000000000124a800_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.12, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.13, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.14, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.15, 6; - %jmp T_7.16; -T_7.12 ; - %load/vec4 v00000000012499a0_0; - %parti/s 1, 7, 4; - %replicate 24; - %load/vec4 v00000000012499a0_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000124a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001249360, 0, 4; - %jmp T_7.16; -T_7.13 ; - %load/vec4 v00000000012499a0_0; - %parti/s 1, 15, 5; - %replicate 24; - %load/vec4 v00000000012499a0_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000124a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001249360, 0, 4; - %jmp T_7.16; -T_7.14 ; - %load/vec4 v00000000012499a0_0; - %parti/s 1, 23, 6; - %replicate 24; - %load/vec4 v00000000012499a0_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000124a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001249360, 0, 4; - %jmp T_7.16; -T_7.15 ; - %load/vec4 v00000000012499a0_0; - %parti/s 1, 31, 6; - %replicate 24; - %load/vec4 v00000000012499a0_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000124a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001249360, 0, 4; - %jmp T_7.16; -T_7.16 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.5 ; - %load/vec4 v000000000124a800_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.17, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.18, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.19, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.20, 6; - %jmp T_7.21; -T_7.17 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000012499a0_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000124a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001249360, 0, 4; - %jmp T_7.21; -T_7.18 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000012499a0_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000124a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001249360, 0, 4; - %jmp T_7.21; -T_7.19 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000012499a0_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000124a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001249360, 0, 4; - %jmp T_7.21; -T_7.20 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000012499a0_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000124a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001249360, 0, 4; - %jmp T_7.21; -T_7.21 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.6 ; - %load/vec4 v000000000124a800_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.22, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.23, 6; - %jmp T_7.24; -T_7.22 ; - %load/vec4 v00000000012499a0_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v00000000012499a0_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000124a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001249360, 0, 4; - %jmp T_7.24; -T_7.23 ; - %load/vec4 v00000000012499a0_0; - %parti/s 1, 31, 6; - %replicate 16; - %load/vec4 v00000000012499a0_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000124a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001249360, 0, 4; - %jmp T_7.24; -T_7.24 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.7 ; - %load/vec4 v000000000124a800_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.25, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.26, 6; - %jmp T_7.27; -T_7.25 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v00000000012499a0_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000124a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001249360, 0, 4; - %jmp T_7.27; -T_7.26 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v00000000012499a0_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000124a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001249360, 0, 4; - %jmp T_7.27; -T_7.27 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.8 ; - %load/vec4 v000000000124a800_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.28, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.29, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.30, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.31, 6; - %jmp T_7.32; -T_7.28 ; - %load/vec4 v00000000012499a0_0; - %parti/s 8, 0, 2; - %load/vec4 v000000000124a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 24, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v0000000001249360, 4, 5; - %jmp T_7.32; -T_7.29 ; - %load/vec4 v00000000012499a0_0; - %parti/s 16, 0, 2; - %load/vec4 v000000000124a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 16, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v0000000001249360, 4, 5; - %jmp T_7.32; -T_7.30 ; - %load/vec4 v00000000012499a0_0; - %parti/s 24, 0, 2; - %load/vec4 v000000000124a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 8, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v0000000001249360, 4, 5; - %jmp T_7.32; -T_7.31 ; - %load/vec4 v00000000012499a0_0; - %load/vec4 v000000000124a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001249360, 0, 4; - %jmp T_7.32; -T_7.32 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.9 ; - %load/vec4 v000000000124a800_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.33, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.34, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.35, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.36, 6; - %jmp T_7.37; -T_7.33 ; - %load/vec4 v00000000012499a0_0; - %load/vec4 v000000000124a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001249360, 0, 4; - %jmp T_7.37; -T_7.34 ; - %load/vec4 v00000000012499a0_0; - %parti/s 24, 8, 5; - %load/vec4 v000000000124a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001249360, 0, 4; - %jmp T_7.37; -T_7.35 ; - %load/vec4 v00000000012499a0_0; - %parti/s 16, 16, 6; - %load/vec4 v000000000124a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001249360, 0, 4; - %jmp T_7.37; -T_7.36 ; - %load/vec4 v00000000012499a0_0; - %parti/s 8, 24, 6; - %load/vec4 v000000000124a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001249360, 0, 4; - %jmp T_7.37; -T_7.37 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.11 ; - %pop/vec4 1; -T_7.2 ; -T_7.1 ; - %jmp T_7; - .thread T_7; - .scope S_0000000000905e30; -T_8 ; -Ewait_1 .event/or E_0000000000940c40, E_0x0; - %wait Ewait_1; - %load/vec4 v000000000124a620_0; - %dup/vec4; - %pushi/vec4 0, 0, 5; - %cmp/u; - %jmp/1 T_8.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 5; - %cmp/u; - %jmp/1 T_8.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 5; - %cmp/u; - %jmp/1 T_8.2, 6; - %dup/vec4; - %pushi/vec4 3, 0, 5; - %cmp/u; - %jmp/1 T_8.3, 6; - %dup/vec4; - %pushi/vec4 4, 0, 5; - %cmp/u; - %jmp/1 T_8.4, 6; - %dup/vec4; - %pushi/vec4 5, 0, 5; - %cmp/u; - %jmp/1 T_8.5, 6; - %dup/vec4; - %pushi/vec4 6, 0, 5; - %cmp/u; - %jmp/1 T_8.6, 6; - %dup/vec4; - %pushi/vec4 7, 0, 5; - %cmp/u; - %jmp/1 T_8.7, 6; - %dup/vec4; - %pushi/vec4 8, 0, 5; - %cmp/u; - %jmp/1 T_8.8, 6; - %dup/vec4; - %pushi/vec4 9, 0, 5; - %cmp/u; - %jmp/1 T_8.9, 6; - %dup/vec4; - %pushi/vec4 10, 0, 5; - %cmp/u; - %jmp/1 T_8.10, 6; - %dup/vec4; - %pushi/vec4 11, 0, 5; - %cmp/u; - %jmp/1 T_8.11, 6; - %dup/vec4; - %pushi/vec4 12, 0, 5; - %cmp/u; - %jmp/1 T_8.12, 6; - %dup/vec4; - %pushi/vec4 13, 0, 5; - %cmp/u; - %jmp/1 T_8.13, 6; - %dup/vec4; - %pushi/vec4 14, 0, 5; - %cmp/u; - %jmp/1 T_8.14, 6; - %dup/vec4; - %pushi/vec4 15, 0, 5; - %cmp/u; - %jmp/1 T_8.15, 6; - %dup/vec4; - %pushi/vec4 16, 0, 5; - %cmp/u; - %jmp/1 T_8.16, 6; - %dup/vec4; - %pushi/vec4 17, 0, 5; - %cmp/u; - %jmp/1 T_8.17, 6; - %dup/vec4; - %pushi/vec4 18, 0, 5; - %cmp/u; - %jmp/1 T_8.18, 6; - %dup/vec4; - %pushi/vec4 19, 0, 5; - %cmp/u; - %jmp/1 T_8.19, 6; - %dup/vec4; - %pushi/vec4 20, 0, 5; - %cmp/u; - %jmp/1 T_8.20, 6; - %dup/vec4; - %pushi/vec4 21, 0, 5; - %cmp/u; - %jmp/1 T_8.21, 6; - %dup/vec4; - %pushi/vec4 22, 0, 5; - %cmp/u; - %jmp/1 T_8.22, 6; - %dup/vec4; - %pushi/vec4 23, 0, 5; - %cmp/u; - %jmp/1 T_8.23, 6; - %jmp T_8.24; -T_8.0 ; - %load/vec4 v0000000001249e00_0; - %load/vec4 v0000000001249040_0; - %add; - %store/vec4 v00000000012490e0_0, 0, 32; - %jmp T_8.24; -T_8.1 ; - %load/vec4 v0000000001249e00_0; - %load/vec4 v0000000001249040_0; - %sub; - %store/vec4 v00000000012490e0_0, 0, 32; - %jmp T_8.24; -T_8.2 ; - %load/vec4 v0000000001249e00_0; - %load/vec4 v0000000001249040_0; - %mul; - %store/vec4 v00000000012490e0_0, 0, 32; - %jmp T_8.24; -T_8.3 ; - %load/vec4 v0000000001249e00_0; - %load/vec4 v0000000001249040_0; - %div/s; - %store/vec4 v00000000012490e0_0, 0, 32; - %jmp T_8.24; -T_8.4 ; - %load/vec4 v0000000001249e00_0; - %load/vec4 v0000000001249040_0; - %and; - %store/vec4 v00000000012490e0_0, 0, 32; - %jmp T_8.24; -T_8.5 ; - %load/vec4 v0000000001249e00_0; - %load/vec4 v0000000001249040_0; - %or; - %store/vec4 v00000000012490e0_0, 0, 32; - %jmp T_8.24; -T_8.6 ; - %load/vec4 v0000000001249e00_0; - %load/vec4 v0000000001249040_0; - %xor; - %store/vec4 v00000000012490e0_0, 0, 32; - %jmp T_8.24; -T_8.7 ; - %load/vec4 v0000000001249040_0; - %ix/getv 4, v0000000001249220_0; - %shiftl 4; - %store/vec4 v00000000012490e0_0, 0, 32; - %jmp T_8.24; -T_8.8 ; - %load/vec4 v0000000001249040_0; - %ix/getv 4, v0000000001249e00_0; - %shiftl 4; - %store/vec4 v00000000012490e0_0, 0, 32; - %jmp T_8.24; -T_8.9 ; - %load/vec4 v0000000001249040_0; - %ix/getv 4, v0000000001249220_0; - %shiftr 4; - %store/vec4 v00000000012490e0_0, 0, 32; - %jmp T_8.24; -T_8.10 ; - %load/vec4 v0000000001249040_0; - %ix/getv 4, v0000000001249e00_0; - %shiftr 4; - %store/vec4 v00000000012490e0_0, 0, 32; - %jmp T_8.24; -T_8.11 ; - %load/vec4 v0000000001249040_0; - %ix/getv 4, v0000000001249220_0; - %shiftr 4; - %store/vec4 v00000000012490e0_0, 0, 32; - %jmp T_8.24; -T_8.12 ; - %load/vec4 v0000000001249040_0; - %ix/getv 4, v0000000001249e00_0; - %shiftr 4; - %store/vec4 v00000000012490e0_0, 0, 32; - %jmp T_8.24; -T_8.13 ; - %load/vec4 v0000000001249e00_0; - %load/vec4 v0000000001249040_0; - %cmp/e; - %jmp/0xz T_8.25, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001249d60_0, 0, 1; - %jmp T_8.26; -T_8.25 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001249d60_0, 0, 1; -T_8.26 ; - %jmp T_8.24; -T_8.14 ; - %load/vec4 v0000000001249e00_0; - %load/vec4 v0000000001249040_0; - %cmp/s; - %jmp/0xz T_8.27, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001249d60_0, 0, 1; - %jmp T_8.28; -T_8.27 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001249d60_0, 0, 1; -T_8.28 ; - %jmp T_8.24; -T_8.15 ; - %load/vec4 v0000000001249e00_0; - %load/vec4 v0000000001249040_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.29, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001249d60_0, 0, 1; - %jmp T_8.30; -T_8.29 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001249d60_0, 0, 1; -T_8.30 ; - %jmp T_8.24; -T_8.16 ; - %load/vec4 v0000000001249040_0; - %load/vec4 v0000000001249e00_0; - %cmp/s; - %jmp/0xz T_8.31, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001249d60_0, 0, 1; - %jmp T_8.32; -T_8.31 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001249d60_0, 0, 1; -T_8.32 ; - %jmp T_8.24; -T_8.17 ; - %load/vec4 v0000000001249040_0; - %load/vec4 v0000000001249e00_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.33, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001249d60_0, 0, 1; - %jmp T_8.34; -T_8.33 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001249d60_0, 0, 1; -T_8.34 ; - %jmp T_8.24; -T_8.18 ; - %load/vec4 v0000000001249e00_0; - %load/vec4 v0000000001249040_0; - %cmp/ne; - %jmp/0xz T_8.35, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001249d60_0, 0, 1; - %jmp T_8.36; -T_8.35 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001249d60_0, 0, 1; -T_8.36 ; - %jmp T_8.24; -T_8.19 ; - %load/vec4 v0000000001249e00_0; - %store/vec4 v00000000012490e0_0, 0, 32; - %jmp T_8.24; -T_8.20 ; - %load/vec4 v0000000001249e00_0; - %load/vec4 v0000000001249040_0; - %cmp/s; - %jmp/0xz T_8.37, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v00000000012490e0_0, 0, 32; -T_8.37 ; - %jmp T_8.24; -T_8.21 ; - %load/vec4 v0000000001249e00_0; - %load/vec4 v0000000001249040_0; - %cmp/u; - %jmp/0xz T_8.39, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v00000000012490e0_0, 0, 32; -T_8.39 ; - %jmp T_8.24; -T_8.22 ; - %load/vec4 v0000000001249e00_0; - %load/vec4 v0000000001249040_0; - %mul; - %store/vec4 v00000000012490e0_0, 0, 32; - %jmp T_8.24; -T_8.23 ; - %load/vec4 v0000000001249e00_0; - %load/vec4 v0000000001249040_0; - %div; - %store/vec4 v00000000012490e0_0, 0, 32; - %jmp T_8.24; -T_8.24 ; - %pop/vec4 1; - %jmp T_8; - .thread T_8, $push; - .scope S_000000000094ee20; -T_9 ; - %pushi/vec4 3217031168, 0, 32; - %store/vec4 v00000000012a3b90_0, 0, 32; - %end; - .thread T_9, $init; - .scope S_000000000094ee20; -T_10 ; -Ewait_2 .event/or E_0000000000946ac0, E_0x0; - %wait Ewait_2; - %load/vec4 v00000000012a4130_0; - %store/vec4 v00000000012a30f0_0, 0, 32; - %load/vec4 v00000000012a4770_0; - %store/vec4 v0000000001248e60_0, 0, 32; - %load/vec4 v00000000012a41d0_0; - %store/vec4 v0000000001249540_0, 0, 1; - %load/vec4 v00000000012a3a50_0; - %store/vec4 v0000000001248fa0_0, 0, 1; - %load/vec4 v00000000012a44f0_0; - %store/vec4 v00000000012495e0_0, 0, 32; - %jmp T_10; - .thread T_10, $push; - .scope S_000000000094ee20; -T_11 ; -Ewait_3 .event/or E_00000000009473c0, E_0x0; - %wait Ewait_3; - %load/vec4 v00000000012a34b0_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.2, 6; - %jmp T_11.3; -T_11.0 ; - %load/vec4 v00000000012a4630_0; - %parti/s 5, 16, 6; - %store/vec4 v00000000012a43b0_0, 0, 5; - %jmp T_11.3; -T_11.1 ; - %load/vec4 v00000000012a4630_0; - %parti/s 5, 11, 5; - %store/vec4 v00000000012a43b0_0, 0, 5; - %jmp T_11.3; -T_11.2 ; - %pushi/vec4 31, 0, 5; - %store/vec4 v00000000012a43b0_0, 0, 5; - %jmp T_11.3; -T_11.3 ; - %pop/vec4 1; - %load/vec4 v00000000012a4310_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.6, 6; - %jmp T_11.7; -T_11.4 ; - %load/vec4 v00000000012a4770_0; - %store/vec4 v00000000012a3910_0, 0, 32; - %jmp T_11.7; -T_11.5 ; - %load/vec4 v00000000012494a0_0; - %store/vec4 v00000000012a3910_0, 0, 32; - %jmp T_11.7; -T_11.6 ; - %load/vec4 v00000000012a3b90_0; - %addi 8, 0, 32; - %store/vec4 v00000000012a3910_0, 0, 32; - %jmp T_11.7; -T_11.7 ; - %pop/vec4 1; - %load/vec4 v00000000012a4810_0; - %dup/vec4; - %pushi/vec4 1, 0, 1; - %cmp/u; - %jmp/1 T_11.8, 6; - %dup/vec4; - %pushi/vec4 0, 0, 1; - %cmp/u; - %jmp/1 T_11.9, 6; - %jmp T_11.10; -T_11.8 ; - %load/vec4 v00000000012a4630_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v00000000012a4630_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %store/vec4 v000000000092ed00_0, 0, 32; - %jmp T_11.10; -T_11.9 ; - %load/vec4 v00000000012a44f0_0; - %store/vec4 v000000000092ed00_0, 0, 32; - %jmp T_11.10; -T_11.10 ; - %pop/vec4 1; - %jmp T_11; - .thread T_11, $push; - .scope S_000000000094ec90; -T_12 ; - %vpi_call/w 3 36 "$dumpfile", "mips_cpu_harvard.vcd" {0 0 0}; - %vpi_call/w 3 37 "$dumpvars", 32'sb00000000000000000000000000000000, S_000000000094ec90 {0 0 0}; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000012a4de0_0, 0, 1; - %pushi/vec4 100, 0, 32; -T_12.0 %dup/vec4; - %pushi/vec4 0, 0, 32; - %cmp/s; - %jmp/1xz T_12.1, 5; - %jmp/1 T_12.1, 4; - %pushi/vec4 1, 0, 32; - %sub; - %delay 10, 0; - %load/vec4 v00000000012a4de0_0; - %nor/r; - %store/vec4 v00000000012a4de0_0, 0, 1; - %delay 10, 0; - %load/vec4 v00000000012a4de0_0; - %nor/r; - %store/vec4 v00000000012a4de0_0, 0, 1; - %jmp T_12.0; -T_12.1 ; - %pop/vec4 1; - %vpi_call/w 3 47 "$fatal", 32'sb00000000000000000000000000000010, "Simulation did not finish within %d cycles.", P_0000000000934f68 {0 0 0}; - %end; - .thread T_12; - .scope S_000000000094ec90; -T_13 ; - %vpi_call/w 3 51 "$display", "Initial Reset 0" {0 0 0}; - %pushi/vec4 0, 0, 1; - %assign/vec4 v00000000012a5380_0, 0; - %vpi_call/w 3 55 "$display", "Initial Reset 1" {0 0 0}; - %wait E_0000000000940d00; - %pushi/vec4 1, 0, 1; - %assign/vec4 v00000000012a5380_0, 0; - %vpi_call/w 3 59 "$display", "Initial Reset 0: Start Program" {0 0 0}; - %wait E_0000000000940d00; - %pushi/vec4 0, 0, 1; - %assign/vec4 v00000000012a5380_0, 0; - %wait E_0000000000940d00; - %load/vec4 v00000000012a5560_0; - %pad/u 32; - %cmpi/e 1, 0, 32; - %jmp/0xz T_13.0, 4; - %jmp T_13.1; -T_13.0 ; - %vpi_call/w 3 65 "$display", "TB: CPU did not set active=1 after reset." {0 0 0}; -T_13.1 ; -T_13.2 ; - %load/vec4 v00000000012a5560_0; - %flag_set/vec4 8; - %jmp/0xz T_13.3, 8; - %wait E_0000000000940d00; - %vpi_call/w 3 71 "$display", "Reg File Write data: %d", v00000000012a3910_0 {0 0 0}; - %jmp T_13.2; -T_13.3 ; - %wait E_0000000000940d00; - %vpi_call/w 3 74 "$display", "TB: CPU Halt; active=0" {0 0 0}; - %vpi_call/w 3 75 "$display", "Output:" {0 0 0}; - %vpi_call/w 3 76 "$display", "%d", v00000000012a57e0_0 {0 0 0}; - %vpi_call/w 3 77 "$finish" {0 0 0}; - %end; - .thread T_13; -# The file index is used to find the file name in the following table. -:file_names 10; - "N/A"; - ""; - "-"; - "testbench/mips_cpu_harvard_tb.v"; - "rtl/mips_cpu_harvard.v"; - "rtl/mips_cpu_alu.v"; - "rtl/mips_cpu_control.v"; - "rtl/mips_cpu_pc.v"; - "rtl/mips_cpu_regfile.v"; - "rtl/mips_cpu_memory.v"; diff --git a/exec/mips_cpu_harvard_tb_andi b/exec/mips_cpu_harvard_tb_andi deleted file mode 100644 index 408082f..0000000 --- a/exec/mips_cpu_harvard_tb_andi +++ /dev/null @@ -1,2738 +0,0 @@ -#! /usr/local/iverilog/bin/vvp -:ivl_version "11.0 (devel)"; -:ivl_delay_selection "TYPICAL"; -:vpi_time_precision + 0; -:vpi_module "C:\iverilog\lib\ivl\system.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_sys.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_textio.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2005_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\va_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2009.vpi"; -S_000000000115c100 .scope package, "$unit" "$unit" 2 1; - .timescale 0 0; -S_000000000113aab0 .scope module, "mips_cpu_harvard_tb" "mips_cpu_harvard_tb" 3 1; - .timescale 0 0; -P_0000000001083a60 .param/str "RAM_INIT_FILE" 0 3 3, "inputs/andi.txt"; -P_0000000001083a98 .param/l "TIMEOUT_CYCLES" 0 3 4, +C4<00000000000000000000000001100100>; -v00000000011b63c0_0 .net "active", 0 0, v000000000115a260_0; 1 drivers -v00000000011b4d40_0 .var "clk", 0 0; -v00000000011b4fc0_0 .var "clk_enable", 0 0; -v00000000011b5c40_0 .net "data_address", 31 0, v0000000001158c80_0; 1 drivers -v00000000011b5a60_0 .net "data_read", 0 0, v0000000001158d20_0; 1 drivers -v00000000011b4de0_0 .net "data_readdata", 31 0, L_00000000011b5880; 1 drivers -v00000000011b5e20_0 .net "data_write", 0 0, v0000000001158f00_0; 1 drivers -v00000000011b6460_0 .net "data_writedata", 31 0, v00000000011590e0_0; 1 drivers -v00000000011b6500_0 .net "instr_address", 31 0, v00000000011b35f0_0; 1 drivers -v00000000011b5740_0 .net "instr_readdata", 31 0, L_00000000011b5240; 1 drivers -v00000000011b5b00_0 .net "register_v0", 31 0, L_000000000113df80; 1 drivers -v00000000011b54c0_0 .var "reset", 0 0; -S_00000000010f5e30 .scope module, "cpuInst" "mips_cpu_harvard" 3 19, 4 1 0, S_000000000113aab0; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "reset"; - .port_info 2 /OUTPUT 1 "active"; - .port_info 3 /OUTPUT 32 "register_v0"; - .port_info 4 /INPUT 1 "clk_enable"; - .port_info 5 /OUTPUT 32 "instr_address"; - .port_info 6 /INPUT 32 "instr_readdata"; - .port_info 7 /OUTPUT 32 "data_address"; - .port_info 8 /OUTPUT 1 "data_write"; - .port_info 9 /OUTPUT 1 "data_read"; - .port_info 10 /OUTPUT 32 "data_writedata"; - .port_info 11 /INPUT 32 "data_readdata"; -v0000000001158a00_0 .net "active", 0 0, v000000000115a260_0; alias, 1 drivers -v0000000001158e60_0 .net "clk", 0 0, v00000000011b4d40_0; 1 drivers -v0000000001158aa0_0 .net "clk_enable", 0 0, v00000000011b4fc0_0; 1 drivers -v0000000001158c80_0 .var "data_address", 31 0; -v0000000001158d20_0 .var "data_read", 0 0; -v0000000001158dc0_0 .net "data_readdata", 31 0, L_00000000011b5880; alias, 1 drivers -v0000000001158f00_0 .var "data_write", 0 0; -v00000000011590e0_0 .var "data_writedata", 31 0; -v000000000111e1a0_0 .var "in_B", 31 0; -v00000000011b3230_0 .net "in_opcode", 5 0, L_00000000011b5600; 1 drivers -v00000000011b3a50_0 .net "in_pc_in", 31 0, v0000000001159720_0; 1 drivers -v00000000011b34b0_0 .net "in_readreg1", 4 0, L_00000000011b5380; 1 drivers -v00000000011b3550_0 .net "in_readreg2", 4 0, L_00000000011b5ba0; 1 drivers -v00000000011b3730_0 .var "in_writedata", 31 0; -v00000000011b2e70_0 .var "in_writereg", 4 0; -v00000000011b35f0_0 .var "instr_address", 31 0; -v00000000011b3c30_0 .net "instr_readdata", 31 0, L_00000000011b5240; alias, 1 drivers -v00000000011b43b0_0 .net "out_ALUCond", 0 0, v000000000115a3a0_0; 1 drivers -v00000000011b4270_0 .net "out_ALUOp", 4 0, v0000000001159a40_0; 1 drivers -v00000000011b4450_0 .net "out_ALURes", 31 0, v0000000001159d60_0; 1 drivers -v00000000011b44f0_0 .net "out_ALUSrc", 0 0, v0000000001159f40_0; 1 drivers -v00000000011b4590_0 .net "out_MemRead", 0 0, v0000000001159cc0_0; 1 drivers -v00000000011b3870_0 .net "out_MemWrite", 0 0, v0000000001159ea0_0; 1 drivers -v00000000011b2bf0_0 .net "out_MemtoReg", 1 0, v0000000001159400_0; 1 drivers -v00000000011b2f10_0 .net "out_PC", 1 0, v0000000001159220_0; 1 drivers -v00000000011b4630_0 .net "out_RegDst", 1 0, v0000000001159b80_0; 1 drivers -v00000000011b2b50_0 .net "out_RegWrite", 0 0, v0000000001159540_0; 1 drivers -v00000000011b2c90_0 .var "out_pc_out", 31 0; -v00000000011b2d30_0 .net "out_readdata1", 31 0, v00000000011597c0_0; 1 drivers -v00000000011b3cd0_0 .net "out_readdata2", 31 0, v000000000115a620_0; 1 drivers -v00000000011b2fb0_0 .net "out_shamt", 4 0, v0000000001158b40_0; 1 drivers -v00000000011b4770_0 .net "register_v0", 31 0, L_000000000113df80; alias, 1 drivers -v00000000011b3050_0 .net "reset", 0 0, v00000000011b54c0_0; 1 drivers -E_00000000011362c0/0 .event edge, v0000000001159b80_0, v000000000115a4e0_0, v000000000115a4e0_0, v0000000001159400_0; -E_00000000011362c0/1 .event edge, v0000000001159d60_0, v0000000001158dc0_0, v0000000001159fe0_0, v0000000001159f40_0; -E_00000000011362c0/2 .event edge, v000000000115a4e0_0, v000000000115a4e0_0, v000000000115a620_0; -E_00000000011362c0 .event/or E_00000000011362c0/0, E_00000000011362c0/1, E_00000000011362c0/2; -E_0000000001136580/0 .event edge, v0000000001159720_0, v0000000001159d60_0, v0000000001159ea0_0, v0000000001159cc0_0; -E_0000000001136580/1 .event edge, v000000000115a620_0; -E_0000000001136580 .event/or E_0000000001136580/0, E_0000000001136580/1; -L_00000000011b5380 .part L_00000000011b5240, 21, 5; -L_00000000011b5ba0 .part L_00000000011b5240, 16, 5; -L_00000000011b5600 .part L_00000000011b5240, 26, 6; -S_00000000010f5fc0 .scope module, "alu" "mips_cpu_alu" 4 121, 5 1 0, S_00000000010f5e30; - .timescale 0 0; - .port_info 0 /INPUT 32 "A"; - .port_info 1 /INPUT 32 "B"; - .port_info 2 /INPUT 5 "ALUOp"; - .port_info 3 /INPUT 5 "shamt"; - .port_info 4 /OUTPUT 1 "ALUCond"; - .port_info 5 /OUTPUT 32 "ALURes"; -enum000000000092bd00 .enum4 (5) - "ADD" 5'b00000, - "SUB" 5'b00001, - "MUL" 5'b00010, - "DIV" 5'b00011, - "AND" 5'b00100, - "OR" 5'b00101, - "XOR" 5'b00110, - "SLL" 5'b00111, - "SLLV" 5'b01000, - "SRL" 5'b01001, - "SRLV" 5'b01010, - "SRA" 5'b01011, - "SRAV" 5'b01100, - "EQ" 5'b01101, - "LES" 5'b01110, - "LEQ" 5'b01111, - "GRT" 5'b10000, - "GEQ" 5'b10001, - "NEQ" 5'b10010, - "PAS" 5'b10011, - "SLT" 5'b10100, - "SLTU" 5'b10101, - "MULU" 5'b10110, - "DIVU" 5'b10111 - ; -L_000000000113e450 .functor BUFZ 5, v0000000001159a40_0, C4<00000>, C4<00000>, C4<00000>; -v00000000011594a0_0 .net "A", 31 0, v00000000011597c0_0; alias, 1 drivers -v000000000115a3a0_0 .var "ALUCond", 0 0; -v00000000011595e0_0 .net "ALUOp", 4 0, v0000000001159a40_0; alias, 1 drivers -v000000000115a120_0 .net "ALUOps", 4 0, L_000000000113e450; 1 drivers -v0000000001159d60_0 .var/s "ALURes", 31 0; -v00000000011592c0_0 .net "B", 31 0, v000000000111e1a0_0; 1 drivers -v0000000001159e00_0 .net "shamt", 4 0, v0000000001158b40_0; alias, 1 drivers -E_0000000001137640 .event edge, v000000000115a120_0, v00000000011594a0_0, v00000000011592c0_0, v0000000001159e00_0; -S_00000000010f6150 .scope module, "control" "mips_cpu_control" 4 90, 6 1 0, S_00000000010f5e30; - .timescale 0 0; - .port_info 0 /INPUT 32 "Instr"; - .port_info 1 /INPUT 1 "ALUCond"; - .port_info 2 /OUTPUT 2 "CtrlRegDst"; - .port_info 3 /OUTPUT 2 "CtrlPC"; - .port_info 4 /OUTPUT 1 "CtrlMemRead"; - .port_info 5 /OUTPUT 2 "CtrlMemtoReg"; - .port_info 6 /OUTPUT 5 "CtrlALUOp"; - .port_info 7 /OUTPUT 5 "Ctrlshamt"; - .port_info 8 /OUTPUT 1 "CtrlMemWrite"; - .port_info 9 /OUTPUT 1 "CtrlALUSrc"; - .port_info 10 /OUTPUT 1 "CtrlRegWrite"; -enum0000000000929270 .enum4 (6) - "SLL" 6'b000000, - "SRL" 6'b000010, - "SRA" 6'b000011, - "SLLV" 6'b000100, - "SRLV" 6'b000110, - "SRAV" 6'b000111, - "JR" 6'b001000, - "JALR" 6'b001001, - "MTHI" 6'b010001, - "MTLO" 6'b010011, - "MULT" 6'b011000, - "MULTU" 6'b011001, - "DIV" 6'b011010, - "DIVU" 6'b011011, - "ADDU" 6'b100001, - "SUBU" 6'b100011, - "AND" 6'b100100, - "OR" 6'b100101, - "XOR" 6'b100110, - "SLT" 6'b101010, - "SLTU" 6'b101011 - ; -enum000000000092b8a0 .enum4 (6) - "SPECIAL" 6'b000000, - "REGIMM" 6'b000001, - "J" 6'b000010, - "JAL" 6'b000011, - "BEQ" 6'b000100, - "BNE" 6'b000101, - "BLEZ" 6'b000110, - "BGTZ" 6'b000111, - "ADDI" 6'b001000, - "ADDIU" 6'b001001, - "SLTI" 6'b001010, - "SLTIU" 6'b001011, - "ANDI" 6'b001100, - "ORI" 6'b001101, - "XORI" 6'b001110, - "LUI" 6'b001111, - "LB" 6'b100000, - "LH" 6'b100001, - "LWL" 6'b100010, - "LW" 6'b100011, - "LBU" 6'b100100, - "LHU" 6'b100101, - "LWR" 6'b100110, - "SB" 6'b101000, - "SH" 6'b101001, - "SW" 6'b101011 - ; -enum000000000092b950 .enum4 (5) - "BLTZ" 5'b00000, - "BGEZ" 5'b00001, - "BLTZAL" 5'b10000, - "BGEZAL" 5'b10001 - ; -v0000000001159c20_0 .net "ALUCond", 0 0, v000000000115a3a0_0; alias, 1 drivers -v0000000001159a40_0 .var "CtrlALUOp", 4 0; -v0000000001159f40_0 .var "CtrlALUSrc", 0 0; -v0000000001159cc0_0 .var "CtrlMemRead", 0 0; -v0000000001159ea0_0 .var "CtrlMemWrite", 0 0; -v0000000001159400_0 .var "CtrlMemtoReg", 1 0; -v0000000001159220_0 .var "CtrlPC", 1 0; -v0000000001159b80_0 .var "CtrlRegDst", 1 0; -v0000000001159540_0 .var "CtrlRegWrite", 0 0; -v0000000001158b40_0 .var "Ctrlshamt", 4 0; -v000000000115a4e0_0 .net "Instr", 31 0, L_00000000011b5240; alias, 1 drivers -v000000000115a6c0_0 .net "funct", 5 0, L_00000000011b56a0; 1 drivers -v0000000001158fa0_0 .net "op", 5 0, L_00000000011b5ce0; 1 drivers -v0000000001159360_0 .net "rt", 4 0, L_00000000011b57e0; 1 drivers -E_0000000001137240/0 .event edge, v0000000001158fa0_0, v000000000115a6c0_0, v000000000115a3a0_0, v0000000001159360_0; -E_0000000001137240/1 .event edge, v000000000115a4e0_0; -E_0000000001137240 .event/or E_0000000001137240/0, E_0000000001137240/1; -L_00000000011b5ce0 .part L_00000000011b5240, 26, 6; -L_00000000011b56a0 .part L_00000000011b5240, 0, 6; -L_00000000011b57e0 .part L_00000000011b5240, 16, 5; -S_00000000010e91d0 .scope module, "pc" "pc" 4 79, 7 1 0, S_00000000010f5e30; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "rst"; - .port_info 2 /INPUT 2 "pc_ctrl"; - .port_info 3 /INPUT 32 "pc_in"; - .port_info 4 /INPUT 5 "rs"; - .port_info 5 /OUTPUT 32 "pc_out"; - .port_info 6 /OUTPUT 1 "active"; -v000000000115a260_0 .var "active", 0 0; -v0000000001159680_0 .net "clk", 0 0, v00000000011b4d40_0; alias, 1 drivers -v0000000001159860_0 .net "pc_ctrl", 1 0, v0000000001159220_0; alias, 1 drivers -v000000000115a440_0 .var "pc_curr", 31 0; -v0000000001159fe0_0 .net "pc_in", 31 0, v00000000011b2c90_0; 1 drivers -v0000000001159720_0 .var "pc_out", 31 0; -o000000000115d018 .functor BUFZ 5, C4; HiZ drive -v0000000001159040_0 .net "rs", 4 0, o000000000115d018; 0 drivers -v000000000115a080_0 .net "rst", 0 0, v00000000011b54c0_0; alias, 1 drivers -E_00000000011376c0 .event posedge, v0000000001159680_0; -S_00000000010e9360 .scope module, "regfile" "mips_cpu_regfile" 4 106, 8 1 0, S_00000000010f5e30; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 5 "readreg1"; - .port_info 2 /INPUT 5 "readreg2"; - .port_info 3 /INPUT 5 "writereg"; - .port_info 4 /INPUT 32 "writedata"; - .port_info 5 /INPUT 1 "regwrite"; - .port_info 6 /INPUT 6 "opcode"; - .port_info 7 /OUTPUT 32 "readdata1"; - .port_info 8 /OUTPUT 32 "readdata2"; - .port_info 9 /OUTPUT 32 "regv0"; -v000000000115a580_2 .array/port v000000000115a580, 2; -L_000000000113df80 .functor BUFZ 32, v000000000115a580_2, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; -v000000000115a1c0_0 .net "clk", 0 0, v00000000011b4d40_0; alias, 1 drivers -v000000000115a580 .array "memory", 0 31, 31 0; -v000000000115a300_0 .net "opcode", 5 0, L_00000000011b5600; alias, 1 drivers -v00000000011597c0_0 .var "readdata1", 31 0; -v000000000115a620_0 .var "readdata2", 31 0; -v000000000115a760_0 .net "readreg1", 4 0, L_00000000011b5380; alias, 1 drivers -v00000000011599a0_0 .net "readreg2", 4 0, L_00000000011b5ba0; alias, 1 drivers -v000000000115a800_0 .net "regv0", 31 0, L_000000000113df80; alias, 1 drivers -v0000000001159180_0 .net "regwrite", 0 0, v0000000001159540_0; alias, 1 drivers -v0000000001158be0_0 .net "writedata", 31 0, v00000000011b3730_0; 1 drivers -v0000000001158960_0 .net "writereg", 4 0, v00000000011b2e70_0; 1 drivers -E_0000000001138400 .event negedge, v0000000001159680_0; -v000000000115a580_0 .array/port v000000000115a580, 0; -v000000000115a580_1 .array/port v000000000115a580, 1; -E_0000000001138480/0 .event edge, v000000000115a760_0, v000000000115a580_0, v000000000115a580_1, v000000000115a580_2; -v000000000115a580_3 .array/port v000000000115a580, 3; -v000000000115a580_4 .array/port v000000000115a580, 4; -v000000000115a580_5 .array/port v000000000115a580, 5; -v000000000115a580_6 .array/port v000000000115a580, 6; -E_0000000001138480/1 .event edge, v000000000115a580_3, v000000000115a580_4, v000000000115a580_5, v000000000115a580_6; -v000000000115a580_7 .array/port v000000000115a580, 7; -v000000000115a580_8 .array/port v000000000115a580, 8; -v000000000115a580_9 .array/port v000000000115a580, 9; -v000000000115a580_10 .array/port v000000000115a580, 10; -E_0000000001138480/2 .event edge, v000000000115a580_7, v000000000115a580_8, v000000000115a580_9, v000000000115a580_10; -v000000000115a580_11 .array/port v000000000115a580, 11; -v000000000115a580_12 .array/port v000000000115a580, 12; -v000000000115a580_13 .array/port v000000000115a580, 13; -v000000000115a580_14 .array/port v000000000115a580, 14; -E_0000000001138480/3 .event edge, v000000000115a580_11, v000000000115a580_12, v000000000115a580_13, v000000000115a580_14; -v000000000115a580_15 .array/port v000000000115a580, 15; -v000000000115a580_16 .array/port v000000000115a580, 16; -v000000000115a580_17 .array/port v000000000115a580, 17; -v000000000115a580_18 .array/port v000000000115a580, 18; -E_0000000001138480/4 .event edge, v000000000115a580_15, v000000000115a580_16, v000000000115a580_17, v000000000115a580_18; -v000000000115a580_19 .array/port v000000000115a580, 19; -v000000000115a580_20 .array/port v000000000115a580, 20; -v000000000115a580_21 .array/port v000000000115a580, 21; -v000000000115a580_22 .array/port v000000000115a580, 22; -E_0000000001138480/5 .event edge, v000000000115a580_19, v000000000115a580_20, v000000000115a580_21, v000000000115a580_22; -v000000000115a580_23 .array/port v000000000115a580, 23; -v000000000115a580_24 .array/port v000000000115a580, 24; -v000000000115a580_25 .array/port v000000000115a580, 25; -v000000000115a580_26 .array/port v000000000115a580, 26; -E_0000000001138480/6 .event edge, v000000000115a580_23, v000000000115a580_24, v000000000115a580_25, v000000000115a580_26; -v000000000115a580_27 .array/port v000000000115a580, 27; -v000000000115a580_28 .array/port v000000000115a580, 28; -v000000000115a580_29 .array/port v000000000115a580, 29; -v000000000115a580_30 .array/port v000000000115a580, 30; -E_0000000001138480/7 .event edge, v000000000115a580_27, v000000000115a580_28, v000000000115a580_29, v000000000115a580_30; -v000000000115a580_31 .array/port v000000000115a580, 31; -E_0000000001138480/8 .event edge, v000000000115a580_31, v00000000011599a0_0; -E_0000000001138480 .event/or E_0000000001138480/0, E_0000000001138480/1, E_0000000001138480/2, E_0000000001138480/3, E_0000000001138480/4, E_0000000001138480/5, E_0000000001138480/6, E_0000000001138480/7, E_0000000001138480/8; -S_00000000010e94f0 .scope begin, "$unm_blk_121" "$unm_blk_121" 8 16, 8 16 0, S_00000000010e9360; - .timescale 0 0; -v0000000001159900_0 .var/i "i", 31 0; -S_00000000010de6f0 .scope module, "ramInst" "mips_cpu_memory" 3 9, 9 1 0, S_000000000113aab0; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 32 "data_address"; - .port_info 2 /INPUT 1 "data_write"; - .port_info 3 /INPUT 1 "data_read"; - .port_info 4 /INPUT 32 "data_writedata"; - .port_info 5 /OUTPUT 32 "data_readdata"; - .port_info 6 /INPUT 32 "instr_address"; - .port_info 7 /OUTPUT 32 "instr_readdata"; -P_00000000011384c0 .param/str "RAM_INIT_FILE" 0 9 16, "inputs/andi.txt"; -L_000000000113ea00 .functor AND 1, L_00000000011b5560, L_00000000011b5060, C4<1>, C4<1>; -v00000000011b3f50_0 .net *"_ivl_0", 31 0, L_00000000011b4e80; 1 drivers -L_00000000011b79e8 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v00000000011b32d0_0 .net/2u *"_ivl_12", 31 0, L_00000000011b79e8; 1 drivers -v00000000011b4810_0 .net *"_ivl_14", 0 0, L_00000000011b5560; 1 drivers -L_00000000011b7a30 .functor BUFT 1, C4<10111111110000000000000001000000>, C4<0>, C4<0>, C4<0>; -v00000000011b2970_0 .net/2u *"_ivl_16", 31 0, L_00000000011b7a30; 1 drivers -v00000000011b3690_0 .net *"_ivl_18", 0 0, L_00000000011b5060; 1 drivers -v00000000011b30f0_0 .net *"_ivl_2", 31 0, L_00000000011b59c0; 1 drivers -v00000000011b2ab0_0 .net *"_ivl_21", 0 0, L_000000000113ea00; 1 drivers -v00000000011b2a10_0 .net *"_ivl_22", 31 0, L_00000000011b5920; 1 drivers -L_00000000011b7a78 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v00000000011b3190_0 .net/2u *"_ivl_24", 31 0, L_00000000011b7a78; 1 drivers -v00000000011b3b90_0 .net *"_ivl_26", 31 0, L_00000000011b5100; 1 drivers -v00000000011b3370_0 .net *"_ivl_28", 31 0, L_00000000011b51a0; 1 drivers -v00000000011b37d0_0 .net *"_ivl_30", 29 0, L_00000000011b4b60; 1 drivers -L_00000000011b7ac0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v00000000011b3410_0 .net *"_ivl_32", 1 0, L_00000000011b7ac0; 1 drivers -L_00000000011b7b08 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v00000000011b3eb0_0 .net *"_ivl_34", 31 0, L_00000000011b7b08; 1 drivers -v00000000011b3910_0 .net *"_ivl_4", 29 0, L_00000000011b66e0; 1 drivers -L_00000000011b7958 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v00000000011b3ff0_0 .net *"_ivl_6", 1 0, L_00000000011b7958; 1 drivers -L_00000000011b79a0 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v00000000011b39b0_0 .net *"_ivl_8", 31 0, L_00000000011b79a0; 1 drivers -v00000000011b3af0_0 .net "clk", 0 0, v00000000011b4d40_0; alias, 1 drivers -v00000000011b3d70_0 .net "data_address", 31 0, v0000000001158c80_0; alias, 1 drivers -v00000000011b3e10 .array "data_memory", 63 0, 31 0; -v00000000011b4090_0 .net "data_read", 0 0, v0000000001158d20_0; alias, 1 drivers -v00000000011b4130_0 .net "data_readdata", 31 0, L_00000000011b5880; alias, 1 drivers -v00000000011b41d0_0 .net "data_write", 0 0, v0000000001158f00_0; alias, 1 drivers -v00000000011b4310_0 .net "data_writedata", 31 0, v00000000011590e0_0; alias, 1 drivers -v00000000011b6140_0 .net "instr_address", 31 0, v00000000011b35f0_0; alias, 1 drivers -v00000000011b4ca0 .array "instr_memory", 63 0, 31 0; -v00000000011b4f20_0 .net "instr_readdata", 31 0, L_00000000011b5240; alias, 1 drivers -L_00000000011b4e80 .array/port v00000000011b3e10, L_00000000011b59c0; -L_00000000011b66e0 .part v0000000001158c80_0, 2, 30; -L_00000000011b59c0 .concat [ 30 2 0 0], L_00000000011b66e0, L_00000000011b7958; -L_00000000011b5880 .functor MUXZ 32, L_00000000011b79a0, L_00000000011b4e80, v0000000001158d20_0, C4<>; -L_00000000011b5560 .cmp/ge 32, v00000000011b35f0_0, L_00000000011b79e8; -L_00000000011b5060 .cmp/gt 32, L_00000000011b7a30, v00000000011b35f0_0; -L_00000000011b5920 .array/port v00000000011b4ca0, L_00000000011b51a0; -L_00000000011b5100 .arith/sub 32, v00000000011b35f0_0, L_00000000011b7a78; -L_00000000011b4b60 .part L_00000000011b5100, 2, 30; -L_00000000011b51a0 .concat [ 30 2 0 0], L_00000000011b4b60, L_00000000011b7ac0; -L_00000000011b5240 .functor MUXZ 32, L_00000000011b7b08, L_00000000011b5920, L_000000000113ea00, C4<>; -S_00000000010a2680 .scope begin, "$unm_blk_104" "$unm_blk_104" 9 21, 9 21 0, S_00000000010de6f0; - .timescale 0 0; -v00000000011b46d0_0 .var/i "i", 31 0; -S_00000000010a2810 .scope begin, "$ivl_for_loop0" "$ivl_for_loop0" 9 36, 9 36 0, S_00000000010a2680; - .timescale 0 0; -v00000000011b2dd0_0 .var/i "j", 31 0; - .scope S_00000000010de6f0; -T_0 ; - %fork t_1, S_00000000010a2680; - %jmp t_0; - .scope S_00000000010a2680; -t_1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000011b46d0_0, 0, 32; -T_0.0 ; - %load/vec4 v00000000011b46d0_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v00000000011b46d0_0; - %store/vec4a v00000000011b3e10, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000011b46d0_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000011b46d0_0, 0, 32; - %jmp T_0.0; -T_0.1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000011b46d0_0, 0, 32; -T_0.2 ; - %load/vec4 v00000000011b46d0_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.3, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v00000000011b46d0_0; - %store/vec4a v00000000011b4ca0, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000011b46d0_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000011b46d0_0, 0, 32; - %jmp T_0.2; -T_0.3 ; - %vpi_call/w 9 32 "$display", "RAM: Loading RAM contents from %s", P_00000000011384c0 {0 0 0}; - %vpi_call/w 9 33 "$readmemh", P_00000000011384c0, v00000000011b4ca0 {0 0 0}; - %fork t_3, S_00000000010a2810; - %jmp t_2; - .scope S_00000000010a2810; -t_3 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000011b2dd0_0, 0, 32; -T_0.4 ; - %load/vec4 v00000000011b2dd0_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.5, 5; - %pushi/vec4 3217031168, 0, 32; - %load/vec4 v00000000011b2dd0_0; - %muli 4, 0, 32; - %add; - %vpi_call/w 9 37 "$display", "byte +%h: %h", S<0,vec4,u32>, &A {1 0 0}; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000011b2dd0_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000011b2dd0_0, 0, 32; - %jmp T_0.4; -T_0.5 ; - %end; - .scope S_00000000010a2680; -t_2 %join; - %end; - .scope S_00000000010de6f0; -t_0 %join; - %end; - .thread T_0; - .scope S_00000000010de6f0; -T_1 ; - %wait E_00000000011376c0; - %load/vec4 v00000000011b4090_0; - %nor/r; - %load/vec4 v00000000011b41d0_0; - %and; - %flag_set/vec4 8; - %jmp/0xz T_1.0, 8; - %load/vec4 v00000000011b6140_0; - %load/vec4 v00000000011b3d70_0; - %cmp/ne; - %jmp/0xz T_1.2, 4; - %load/vec4 v00000000011b4310_0; - %load/vec4 v00000000011b3d70_0; - %ix/load 4, 2, 0; - %flag_set/imm 4, 0; - %shiftr 4; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011b3e10, 0, 4; -T_1.2 ; -T_1.0 ; - %jmp T_1; - .thread T_1; - .scope S_00000000010e91d0; -T_2 ; - %load/vec4 v0000000001159fe0_0; - %store/vec4 v0000000001159720_0, 0, 32; - %end; - .thread T_2; - .scope S_00000000010e91d0; -T_3 ; - %wait E_00000000011376c0; - %load/vec4 v000000000115a080_0; - %flag_set/vec4 8; - %jmp/0xz T_3.0, 8; - %pushi/vec4 1, 0, 1; - %assign/vec4 v000000000115a260_0, 0; - %pushi/vec4 3217031168, 0, 32; - %assign/vec4 v0000000001159720_0, 0; - %jmp T_3.1; -T_3.0 ; - %load/vec4 v0000000001159720_0; - %cmpi/ne 0, 0, 32; - %jmp/0xz T_3.2, 4; - %load/vec4 v000000000115a260_0; - %assign/vec4 v000000000115a260_0, 0; - %load/vec4 v0000000001159860_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_3.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_3.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_3.6, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_3.7, 6; - %jmp T_3.8; -T_3.4 ; - %load/vec4 v0000000001159720_0; - %assign/vec4 v000000000115a440_0, 0; - %load/vec4 v000000000115a440_0; - %addi 4, 0, 32; - %assign/vec4 v0000000001159720_0, 0; - %vpi_call/w 7 27 "$display", "New PC from %h to %h", v000000000115a440_0, v0000000001159720_0 {0 0 0}; - %jmp T_3.8; -T_3.5 ; - %load/vec4 v0000000001159fe0_0; - %assign/vec4 v0000000001159720_0, 0; - %jmp T_3.8; -T_3.6 ; - %load/vec4 v0000000001159fe0_0; - %assign/vec4 v0000000001159720_0, 0; - %jmp T_3.8; -T_3.7 ; - %vpi_call/w 7 36 "$display", "JUMP REGISTER" {0 0 0}; - %pushi/vec4 0, 0, 32; - %assign/vec4 v0000000001159720_0, 0; - %jmp T_3.8; -T_3.8 ; - %pop/vec4 1; - %jmp T_3.3; -T_3.2 ; - %load/vec4 v0000000001159720_0; - %cmpi/e 0, 0, 32; - %jmp/0xz T_3.9, 4; - %pushi/vec4 0, 0, 1; - %assign/vec4 v000000000115a260_0, 0; -T_3.9 ; -T_3.3 ; -T_3.1 ; - %jmp T_3; - .thread T_3; - .scope S_00000000010f6150; -T_4 ; - %wait E_0000000001137240; - %vpi_call/w 6 86 "$display", "Opcode: %h", v0000000001158fa0_0 {0 0 0}; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.0, 4; - %pushi/vec4 0, 0, 2; - %store/vec4 v0000000001159b80_0, 0, 2; - %vpi_call/w 6 89 "$display", "CTRLREGDST: Rt" {0 0 0}; - %jmp T_4.1; -T_4.0 ; - %load/vec4 v0000000001158fa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.2, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v0000000001159b80_0, 0, 2; - %vpi_call/w 6 92 "$display", "CTRLREGDST: Rd" {0 0 0}; - %jmp T_4.3; -T_4.2 ; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 3, 0, 6; - %jmp/0xz T_4.4, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v0000000001159b80_0, 0, 2; - %vpi_call/w 6 95 "$display", "CTRLREGDST: Link" {0 0 0}; - %jmp T_4.5; -T_4.4 ; - %pushi/vec4 1, 1, 2; - %store/vec4 v0000000001159b80_0, 0, 2; - %vpi_call/w 6 96 "$display", "xxxxxxxxxxxxxx" {0 0 0}; -T_4.5 ; -T_4.3 ; -T_4.1 ; - %load/vec4 v0000000001159c20_0; - %load/vec4 v0000000001158fa0_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001158fa0_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001158fa0_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001158fa0_0; - %pushi/vec4 5, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001158fa0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001159360_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001159360_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001159360_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001159360_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.6, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v0000000001159220_0, 0, 2; - %jmp T_4.7; -T_4.6 ; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 2, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 3, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.8, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v0000000001159220_0, 0, 2; - %jmp T_4.9; -T_4.8 ; - %load/vec4 v000000000115a6c0_0; - %cmpi/e 8, 0, 6; - %flag_mov 8, 4; - %load/vec4 v000000000115a6c0_0; - %cmpi/e 9, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.10, 4; - %pushi/vec4 3, 0, 2; - %store/vec4 v0000000001159220_0, 0, 2; - %jmp T_4.11; -T_4.10 ; - %pushi/vec4 0, 0, 2; - %store/vec4 v0000000001159220_0, 0, 2; -T_4.11 ; -T_4.9 ; -T_4.7 ; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.12, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001159cc0_0, 0, 1; - %pushi/vec4 1, 0, 2; - %store/vec4 v0000000001159400_0, 0, 2; - %vpi_call/w 6 112 "$display", "Memory read enabled" {0 0 0}; - %jmp T_4.13; -T_4.12 ; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.14, 9; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001159cc0_0, 0, 1; - %pushi/vec4 0, 0, 2; - %store/vec4 v0000000001159400_0, 0, 2; - %vpi_call/w 6 116 "$display", "Memory read disabled" {0 0 0}; - %jmp T_4.15; -T_4.14 ; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 3, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.16, 9; - %pushi/vec4 2, 0, 2; - %store/vec4 v0000000001159400_0, 0, 2; - %jmp T_4.17; -T_4.16 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v0000000001159cc0_0, 0, 1; -T_4.17 ; -T_4.15 ; -T_4.13 ; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.18, 9; - %pushi/vec4 0, 0, 5; - %store/vec4 v0000000001159a40_0, 0, 5; - %vpi_call/w 6 124 "$display", "ALU OP = 0 (ADDU/ADDIU)" {0 0 0}; - %jmp T_4.19; -T_4.18 ; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 12, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.20, 9; - %pushi/vec4 4, 0, 5; - %store/vec4 v0000000001159a40_0, 0, 5; - %jmp T_4.21; -T_4.20 ; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 4, 0, 6; - %jmp/0xz T_4.22, 4; - %pushi/vec4 13, 0, 5; - %store/vec4 v0000000001159a40_0, 0, 5; - %jmp T_4.23; -T_4.22 ; - %load/vec4 v0000000001158fa0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001159360_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001159360_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.24, 8; - %pushi/vec4 17, 0, 5; - %store/vec4 v0000000001159a40_0, 0, 5; - %jmp T_4.25; -T_4.24 ; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 7, 0, 6; - %jmp/0xz T_4.26, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v0000000001159a40_0, 0, 5; - %jmp T_4.27; -T_4.26 ; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 6, 0, 6; - %jmp/0xz T_4.28, 4; - %pushi/vec4 15, 0, 5; - %store/vec4 v0000000001159a40_0, 0, 5; - %jmp T_4.29; -T_4.28 ; - %load/vec4 v0000000001158fa0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001159360_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001159360_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.30, 8; - %pushi/vec4 14, 0, 5; - %store/vec4 v0000000001159a40_0, 0, 5; - %jmp T_4.31; -T_4.30 ; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 5, 0, 6; - %jmp/0xz T_4.32, 4; - %pushi/vec4 18, 0, 5; - %store/vec4 v0000000001159a40_0, 0, 5; - %jmp T_4.33; -T_4.32 ; - %load/vec4 v0000000001158fa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.34, 8; - %pushi/vec4 3, 0, 5; - %store/vec4 v0000000001159a40_0, 0, 5; - %jmp T_4.35; -T_4.34 ; - %load/vec4 v0000000001158fa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.36, 8; - %pushi/vec4 23, 0, 5; - %store/vec4 v0000000001159a40_0, 0, 5; - %jmp T_4.37; -T_4.36 ; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.38, 4; - %pushi/vec4 0, 0, 5; - %store/vec4 v0000000001159a40_0, 0, 5; - %jmp T_4.39; -T_4.38 ; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.40, 4; - %pushi/vec4 7, 0, 5; - %store/vec4 v0000000001159a40_0, 0, 5; - %jmp T_4.41; -T_4.40 ; - %load/vec4 v0000000001158fa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.42, 8; - %pushi/vec4 19, 0, 5; - %store/vec4 v0000000001159a40_0, 0, 5; - %jmp T_4.43; -T_4.42 ; - %load/vec4 v0000000001158fa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.44, 8; - %pushi/vec4 2, 0, 5; - %store/vec4 v0000000001159a40_0, 0, 5; - %jmp T_4.45; -T_4.44 ; - %load/vec4 v0000000001158fa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.46, 8; - %pushi/vec4 22, 0, 5; - %store/vec4 v0000000001159a40_0, 0, 5; - %jmp T_4.47; -T_4.46 ; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 13, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.48, 9; - %pushi/vec4 5, 0, 5; - %store/vec4 v0000000001159a40_0, 0, 5; - %jmp T_4.49; -T_4.48 ; - %load/vec4 v0000000001158fa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.50, 8; - %pushi/vec4 7, 0, 5; - %store/vec4 v0000000001159a40_0, 0, 5; - %jmp T_4.51; -T_4.50 ; - %load/vec4 v0000000001158fa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.52, 8; - %pushi/vec4 8, 0, 5; - %store/vec4 v0000000001159a40_0, 0, 5; - %jmp T_4.53; -T_4.52 ; - %load/vec4 v0000000001158fa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.54, 8; - %pushi/vec4 11, 0, 5; - %store/vec4 v0000000001159a40_0, 0, 5; - %jmp T_4.55; -T_4.54 ; - %load/vec4 v0000000001158fa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.56, 8; - %pushi/vec4 12, 0, 5; - %store/vec4 v0000000001159a40_0, 0, 5; - %jmp T_4.57; -T_4.56 ; - %load/vec4 v0000000001158fa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.58, 8; - %pushi/vec4 9, 0, 5; - %store/vec4 v0000000001159a40_0, 0, 5; - %jmp T_4.59; -T_4.58 ; - %load/vec4 v0000000001158fa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.60, 8; - %pushi/vec4 10, 0, 5; - %store/vec4 v0000000001159a40_0, 0, 5; - %jmp T_4.61; -T_4.60 ; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 10, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.62, 9; - %pushi/vec4 20, 0, 5; - %store/vec4 v0000000001159a40_0, 0, 5; - %jmp T_4.63; -T_4.62 ; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 11, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.64, 9; - %pushi/vec4 21, 0, 5; - %store/vec4 v0000000001159a40_0, 0, 5; - %jmp T_4.65; -T_4.64 ; - %load/vec4 v0000000001158fa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.66, 8; - %pushi/vec4 1, 0, 5; - %store/vec4 v0000000001159a40_0, 0, 5; - %jmp T_4.67; -T_4.66 ; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 14, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.68, 9; - %pushi/vec4 6, 0, 5; - %store/vec4 v0000000001159a40_0, 0, 5; - %vpi_call/w 6 175 "$display", "ALU Op = 6 (XOR)" {0 0 0}; - %jmp T_4.69; -T_4.68 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v0000000001159a40_0, 0, 5; -T_4.69 ; -T_4.67 ; -T_4.65 ; -T_4.63 ; -T_4.61 ; -T_4.59 ; -T_4.57 ; -T_4.55 ; -T_4.53 ; -T_4.51 ; -T_4.49 ; -T_4.47 ; -T_4.45 ; -T_4.43 ; -T_4.41 ; -T_4.39 ; -T_4.37 ; -T_4.35 ; -T_4.33 ; -T_4.31 ; -T_4.29 ; -T_4.27 ; -T_4.25 ; -T_4.23 ; -T_4.21 ; -T_4.19 ; - %load/vec4 v0000000001158fa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.70, 8; - %load/vec4 v000000000115a4e0_0; - %parti/s 5, 6, 4; - %store/vec4 v0000000001158b40_0, 0, 5; - %jmp T_4.71; -T_4.70 ; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.72, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v0000000001158b40_0, 0, 5; - %jmp T_4.73; -T_4.72 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v0000000001158b40_0, 0, 5; -T_4.73 ; -T_4.71 ; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 40, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.74, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001159ea0_0, 0, 1; - %jmp T_4.75; -T_4.74 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001159ea0_0, 0, 1; -T_4.75 ; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.76, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001159f40_0, 0, 1; - %jmp T_4.77; -T_4.76 ; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 4, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 7, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 6, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 5, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %load/vec4 v0000000001158fa0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001159360_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001159360_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001159360_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001159360_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %flag_or 8, 9; - %jmp/0xz T_4.78, 8; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001159f40_0, 0, 1; - %jmp T_4.79; -T_4.78 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v0000000001159f40_0, 0, 1; -T_4.79 ; -T_4.77 ; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158fa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a6c0_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.80, 9; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001159540_0, 0, 1; - %jmp T_4.81; -T_4.80 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001159540_0, 0, 1; -T_4.81 ; - %jmp T_4; - .thread T_4, $push; - .scope S_00000000010e9360; -T_5 ; - %fork t_5, S_00000000010e94f0; - %jmp t_4; - .scope S_00000000010e94f0; -t_5 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v0000000001159900_0, 0, 32; -T_5.0 ; - %load/vec4 v0000000001159900_0; - %cmpi/s 32, 0, 32; - %jmp/0xz T_5.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v0000000001159900_0; - %store/vec4a v000000000115a580, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0000000001159900_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v0000000001159900_0, 0, 32; - %jmp T_5.0; -T_5.1 ; - %end; - .scope S_00000000010e9360; -t_4 %join; - %end; - .thread T_5; - .scope S_00000000010e9360; -T_6 ; -Ewait_0 .event/or E_0000000001138480, E_0x0; - %wait Ewait_0; - %load/vec4 v000000000115a760_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v000000000115a580, 4; - %store/vec4 v00000000011597c0_0, 0, 32; - %load/vec4 v00000000011599a0_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v000000000115a580, 4; - %store/vec4 v000000000115a620_0, 0, 32; - %jmp T_6; - .thread T_6, $push; - .scope S_00000000010e9360; -T_7 ; - %wait E_0000000001138400; - %load/vec4 v0000000001158960_0; - %cmpi/e 0, 0, 5; - %jmp/0xz T_7.0, 4; - %jmp T_7.1; -T_7.0 ; - %load/vec4 v0000000001159180_0; - %flag_set/vec4 8; - %jmp/0xz T_7.2, 8; - %load/vec4 v000000000115a300_0; - %dup/vec4; - %pushi/vec4 32, 0, 6; - %cmp/u; - %jmp/1 T_7.4, 6; - %dup/vec4; - %pushi/vec4 36, 0, 6; - %cmp/u; - %jmp/1 T_7.5, 6; - %dup/vec4; - %pushi/vec4 33, 0, 6; - %cmp/u; - %jmp/1 T_7.6, 6; - %dup/vec4; - %pushi/vec4 37, 0, 6; - %cmp/u; - %jmp/1 T_7.7, 6; - %dup/vec4; - %pushi/vec4 34, 0, 6; - %cmp/u; - %jmp/1 T_7.8, 6; - %dup/vec4; - %pushi/vec4 38, 0, 6; - %cmp/u; - %jmp/1 T_7.9, 6; - %load/vec4 v0000000001158be0_0; - %load/vec4 v0000000001158960_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000115a580, 0, 4; - %jmp T_7.11; -T_7.4 ; - %load/vec4 v00000000011597c0_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.12, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.13, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.14, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.15, 6; - %jmp T_7.16; -T_7.12 ; - %load/vec4 v0000000001158be0_0; - %parti/s 1, 7, 4; - %replicate 24; - %load/vec4 v0000000001158be0_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001158960_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000115a580, 0, 4; - %jmp T_7.16; -T_7.13 ; - %load/vec4 v0000000001158be0_0; - %parti/s 1, 15, 5; - %replicate 24; - %load/vec4 v0000000001158be0_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001158960_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000115a580, 0, 4; - %jmp T_7.16; -T_7.14 ; - %load/vec4 v0000000001158be0_0; - %parti/s 1, 23, 6; - %replicate 24; - %load/vec4 v0000000001158be0_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001158960_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000115a580, 0, 4; - %jmp T_7.16; -T_7.15 ; - %load/vec4 v0000000001158be0_0; - %parti/s 1, 31, 6; - %replicate 24; - %load/vec4 v0000000001158be0_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001158960_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000115a580, 0, 4; - %jmp T_7.16; -T_7.16 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.5 ; - %load/vec4 v00000000011597c0_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.17, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.18, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.19, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.20, 6; - %jmp T_7.21; -T_7.17 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v0000000001158be0_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001158960_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000115a580, 0, 4; - %jmp T_7.21; -T_7.18 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v0000000001158be0_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001158960_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000115a580, 0, 4; - %jmp T_7.21; -T_7.19 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v0000000001158be0_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001158960_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000115a580, 0, 4; - %jmp T_7.21; -T_7.20 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v0000000001158be0_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001158960_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000115a580, 0, 4; - %jmp T_7.21; -T_7.21 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.6 ; - %load/vec4 v00000000011597c0_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.22, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.23, 6; - %jmp T_7.24; -T_7.22 ; - %load/vec4 v0000000001158be0_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v0000000001158be0_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001158960_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000115a580, 0, 4; - %jmp T_7.24; -T_7.23 ; - %load/vec4 v0000000001158be0_0; - %parti/s 1, 31, 6; - %replicate 16; - %load/vec4 v0000000001158be0_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001158960_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000115a580, 0, 4; - %jmp T_7.24; -T_7.24 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.7 ; - %load/vec4 v00000000011597c0_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.25, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.26, 6; - %jmp T_7.27; -T_7.25 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v0000000001158be0_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001158960_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000115a580, 0, 4; - %jmp T_7.27; -T_7.26 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v0000000001158be0_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001158960_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000115a580, 0, 4; - %jmp T_7.27; -T_7.27 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.8 ; - %load/vec4 v00000000011597c0_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.28, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.29, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.30, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.31, 6; - %jmp T_7.32; -T_7.28 ; - %load/vec4 v0000000001158be0_0; - %parti/s 8, 0, 2; - %load/vec4 v0000000001158960_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 24, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v000000000115a580, 4, 5; - %jmp T_7.32; -T_7.29 ; - %load/vec4 v0000000001158be0_0; - %parti/s 16, 0, 2; - %load/vec4 v0000000001158960_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 16, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v000000000115a580, 4, 5; - %jmp T_7.32; -T_7.30 ; - %load/vec4 v0000000001158be0_0; - %parti/s 24, 0, 2; - %load/vec4 v0000000001158960_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 8, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v000000000115a580, 4, 5; - %jmp T_7.32; -T_7.31 ; - %load/vec4 v0000000001158be0_0; - %load/vec4 v0000000001158960_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000115a580, 0, 4; - %jmp T_7.32; -T_7.32 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.9 ; - %load/vec4 v00000000011597c0_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.33, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.34, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.35, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.36, 6; - %jmp T_7.37; -T_7.33 ; - %load/vec4 v0000000001158be0_0; - %load/vec4 v0000000001158960_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000115a580, 0, 4; - %jmp T_7.37; -T_7.34 ; - %load/vec4 v0000000001158be0_0; - %parti/s 24, 8, 5; - %load/vec4 v0000000001158960_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000115a580, 0, 4; - %jmp T_7.37; -T_7.35 ; - %load/vec4 v0000000001158be0_0; - %parti/s 16, 16, 6; - %load/vec4 v0000000001158960_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000115a580, 0, 4; - %jmp T_7.37; -T_7.36 ; - %load/vec4 v0000000001158be0_0; - %parti/s 8, 24, 6; - %load/vec4 v0000000001158960_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000115a580, 0, 4; - %jmp T_7.37; -T_7.37 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.11 ; - %pop/vec4 1; -T_7.2 ; -T_7.1 ; - %jmp T_7; - .thread T_7; - .scope S_00000000010f5fc0; -T_8 ; -Ewait_1 .event/or E_0000000001137640, E_0x0; - %wait Ewait_1; - %load/vec4 v000000000115a120_0; - %dup/vec4; - %pushi/vec4 0, 0, 5; - %cmp/u; - %jmp/1 T_8.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 5; - %cmp/u; - %jmp/1 T_8.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 5; - %cmp/u; - %jmp/1 T_8.2, 6; - %dup/vec4; - %pushi/vec4 3, 0, 5; - %cmp/u; - %jmp/1 T_8.3, 6; - %dup/vec4; - %pushi/vec4 4, 0, 5; - %cmp/u; - %jmp/1 T_8.4, 6; - %dup/vec4; - %pushi/vec4 5, 0, 5; - %cmp/u; - %jmp/1 T_8.5, 6; - %dup/vec4; - %pushi/vec4 6, 0, 5; - %cmp/u; - %jmp/1 T_8.6, 6; - %dup/vec4; - %pushi/vec4 7, 0, 5; - %cmp/u; - %jmp/1 T_8.7, 6; - %dup/vec4; - %pushi/vec4 8, 0, 5; - %cmp/u; - %jmp/1 T_8.8, 6; - %dup/vec4; - %pushi/vec4 9, 0, 5; - %cmp/u; - %jmp/1 T_8.9, 6; - %dup/vec4; - %pushi/vec4 10, 0, 5; - %cmp/u; - %jmp/1 T_8.10, 6; - %dup/vec4; - %pushi/vec4 11, 0, 5; - %cmp/u; - %jmp/1 T_8.11, 6; - %dup/vec4; - %pushi/vec4 12, 0, 5; - %cmp/u; - %jmp/1 T_8.12, 6; - %dup/vec4; - %pushi/vec4 13, 0, 5; - %cmp/u; - %jmp/1 T_8.13, 6; - %dup/vec4; - %pushi/vec4 14, 0, 5; - %cmp/u; - %jmp/1 T_8.14, 6; - %dup/vec4; - %pushi/vec4 15, 0, 5; - %cmp/u; - %jmp/1 T_8.15, 6; - %dup/vec4; - %pushi/vec4 16, 0, 5; - %cmp/u; - %jmp/1 T_8.16, 6; - %dup/vec4; - %pushi/vec4 17, 0, 5; - %cmp/u; - %jmp/1 T_8.17, 6; - %dup/vec4; - %pushi/vec4 18, 0, 5; - %cmp/u; - %jmp/1 T_8.18, 6; - %dup/vec4; - %pushi/vec4 19, 0, 5; - %cmp/u; - %jmp/1 T_8.19, 6; - %dup/vec4; - %pushi/vec4 20, 0, 5; - %cmp/u; - %jmp/1 T_8.20, 6; - %dup/vec4; - %pushi/vec4 21, 0, 5; - %cmp/u; - %jmp/1 T_8.21, 6; - %dup/vec4; - %pushi/vec4 22, 0, 5; - %cmp/u; - %jmp/1 T_8.22, 6; - %dup/vec4; - %pushi/vec4 23, 0, 5; - %cmp/u; - %jmp/1 T_8.23, 6; - %jmp T_8.24; -T_8.0 ; - %load/vec4 v00000000011594a0_0; - %load/vec4 v00000000011592c0_0; - %add; - %store/vec4 v0000000001159d60_0, 0, 32; - %jmp T_8.24; -T_8.1 ; - %load/vec4 v00000000011594a0_0; - %load/vec4 v00000000011592c0_0; - %sub; - %store/vec4 v0000000001159d60_0, 0, 32; - %jmp T_8.24; -T_8.2 ; - %load/vec4 v00000000011594a0_0; - %load/vec4 v00000000011592c0_0; - %mul; - %store/vec4 v0000000001159d60_0, 0, 32; - %jmp T_8.24; -T_8.3 ; - %load/vec4 v00000000011594a0_0; - %load/vec4 v00000000011592c0_0; - %div/s; - %store/vec4 v0000000001159d60_0, 0, 32; - %jmp T_8.24; -T_8.4 ; - %load/vec4 v00000000011594a0_0; - %load/vec4 v00000000011592c0_0; - %and; - %store/vec4 v0000000001159d60_0, 0, 32; - %jmp T_8.24; -T_8.5 ; - %load/vec4 v00000000011594a0_0; - %load/vec4 v00000000011592c0_0; - %or; - %store/vec4 v0000000001159d60_0, 0, 32; - %jmp T_8.24; -T_8.6 ; - %load/vec4 v00000000011594a0_0; - %load/vec4 v00000000011592c0_0; - %xor; - %store/vec4 v0000000001159d60_0, 0, 32; - %jmp T_8.24; -T_8.7 ; - %load/vec4 v00000000011592c0_0; - %ix/getv 4, v0000000001159e00_0; - %shiftl 4; - %store/vec4 v0000000001159d60_0, 0, 32; - %jmp T_8.24; -T_8.8 ; - %load/vec4 v00000000011592c0_0; - %ix/getv 4, v00000000011594a0_0; - %shiftl 4; - %store/vec4 v0000000001159d60_0, 0, 32; - %jmp T_8.24; -T_8.9 ; - %load/vec4 v00000000011592c0_0; - %ix/getv 4, v0000000001159e00_0; - %shiftr 4; - %store/vec4 v0000000001159d60_0, 0, 32; - %jmp T_8.24; -T_8.10 ; - %load/vec4 v00000000011592c0_0; - %ix/getv 4, v00000000011594a0_0; - %shiftr 4; - %store/vec4 v0000000001159d60_0, 0, 32; - %jmp T_8.24; -T_8.11 ; - %load/vec4 v00000000011592c0_0; - %ix/getv 4, v0000000001159e00_0; - %shiftr 4; - %store/vec4 v0000000001159d60_0, 0, 32; - %jmp T_8.24; -T_8.12 ; - %load/vec4 v00000000011592c0_0; - %ix/getv 4, v00000000011594a0_0; - %shiftr 4; - %store/vec4 v0000000001159d60_0, 0, 32; - %jmp T_8.24; -T_8.13 ; - %load/vec4 v00000000011594a0_0; - %load/vec4 v00000000011592c0_0; - %cmp/e; - %jmp/0xz T_8.25, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000115a3a0_0, 0, 1; - %jmp T_8.26; -T_8.25 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000115a3a0_0, 0, 1; -T_8.26 ; - %jmp T_8.24; -T_8.14 ; - %load/vec4 v00000000011594a0_0; - %load/vec4 v00000000011592c0_0; - %cmp/s; - %jmp/0xz T_8.27, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000115a3a0_0, 0, 1; - %jmp T_8.28; -T_8.27 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000115a3a0_0, 0, 1; -T_8.28 ; - %jmp T_8.24; -T_8.15 ; - %load/vec4 v00000000011594a0_0; - %load/vec4 v00000000011592c0_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.29, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000115a3a0_0, 0, 1; - %jmp T_8.30; -T_8.29 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000115a3a0_0, 0, 1; -T_8.30 ; - %jmp T_8.24; -T_8.16 ; - %load/vec4 v00000000011592c0_0; - %load/vec4 v00000000011594a0_0; - %cmp/s; - %jmp/0xz T_8.31, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000115a3a0_0, 0, 1; - %jmp T_8.32; -T_8.31 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000115a3a0_0, 0, 1; -T_8.32 ; - %jmp T_8.24; -T_8.17 ; - %load/vec4 v00000000011592c0_0; - %load/vec4 v00000000011594a0_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.33, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000115a3a0_0, 0, 1; - %jmp T_8.34; -T_8.33 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000115a3a0_0, 0, 1; -T_8.34 ; - %jmp T_8.24; -T_8.18 ; - %load/vec4 v00000000011594a0_0; - %load/vec4 v00000000011592c0_0; - %cmp/ne; - %jmp/0xz T_8.35, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000115a3a0_0, 0, 1; - %jmp T_8.36; -T_8.35 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000115a3a0_0, 0, 1; -T_8.36 ; - %jmp T_8.24; -T_8.19 ; - %load/vec4 v00000000011594a0_0; - %store/vec4 v0000000001159d60_0, 0, 32; - %jmp T_8.24; -T_8.20 ; - %load/vec4 v00000000011594a0_0; - %load/vec4 v00000000011592c0_0; - %cmp/s; - %jmp/0xz T_8.37, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v0000000001159d60_0, 0, 32; -T_8.37 ; - %jmp T_8.24; -T_8.21 ; - %load/vec4 v00000000011594a0_0; - %load/vec4 v00000000011592c0_0; - %cmp/u; - %jmp/0xz T_8.39, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v0000000001159d60_0, 0, 32; -T_8.39 ; - %jmp T_8.24; -T_8.22 ; - %load/vec4 v00000000011594a0_0; - %load/vec4 v00000000011592c0_0; - %mul; - %store/vec4 v0000000001159d60_0, 0, 32; - %jmp T_8.24; -T_8.23 ; - %load/vec4 v00000000011594a0_0; - %load/vec4 v00000000011592c0_0; - %div; - %store/vec4 v0000000001159d60_0, 0, 32; - %jmp T_8.24; -T_8.24 ; - %pop/vec4 1; - %jmp T_8; - .thread T_8, $push; - .scope S_00000000010f5e30; -T_9 ; - %pushi/vec4 3217031168, 0, 32; - %store/vec4 v00000000011b2c90_0, 0, 32; - %end; - .thread T_9, $init; - .scope S_00000000010f5e30; -T_10 ; -Ewait_2 .event/or E_0000000001136580, E_0x0; - %wait Ewait_2; - %load/vec4 v00000000011b3a50_0; - %store/vec4 v00000000011b35f0_0, 0, 32; - %load/vec4 v00000000011b4450_0; - %store/vec4 v0000000001158c80_0, 0, 32; - %load/vec4 v00000000011b3870_0; - %store/vec4 v0000000001158f00_0, 0, 1; - %load/vec4 v00000000011b4590_0; - %store/vec4 v0000000001158d20_0, 0, 1; - %load/vec4 v00000000011b3cd0_0; - %store/vec4 v00000000011590e0_0, 0, 32; - %jmp T_10; - .thread T_10, $push; - .scope S_00000000010f5e30; -T_11 ; -Ewait_3 .event/or E_00000000011362c0, E_0x0; - %wait Ewait_3; - %load/vec4 v00000000011b4630_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.2, 6; - %jmp T_11.3; -T_11.0 ; - %load/vec4 v00000000011b3c30_0; - %parti/s 5, 16, 6; - %store/vec4 v00000000011b2e70_0, 0, 5; - %jmp T_11.3; -T_11.1 ; - %load/vec4 v00000000011b3c30_0; - %parti/s 5, 11, 5; - %store/vec4 v00000000011b2e70_0, 0, 5; - %jmp T_11.3; -T_11.2 ; - %pushi/vec4 31, 0, 5; - %store/vec4 v00000000011b2e70_0, 0, 5; - %jmp T_11.3; -T_11.3 ; - %pop/vec4 1; - %load/vec4 v00000000011b2bf0_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.6, 6; - %jmp T_11.7; -T_11.4 ; - %load/vec4 v00000000011b4450_0; - %store/vec4 v00000000011b3730_0, 0, 32; - %jmp T_11.7; -T_11.5 ; - %load/vec4 v0000000001158dc0_0; - %store/vec4 v00000000011b3730_0, 0, 32; - %jmp T_11.7; -T_11.6 ; - %load/vec4 v00000000011b2c90_0; - %addi 8, 0, 32; - %store/vec4 v00000000011b3730_0, 0, 32; - %jmp T_11.7; -T_11.7 ; - %pop/vec4 1; - %load/vec4 v00000000011b44f0_0; - %dup/vec4; - %pushi/vec4 1, 0, 1; - %cmp/u; - %jmp/1 T_11.8, 6; - %dup/vec4; - %pushi/vec4 0, 0, 1; - %cmp/u; - %jmp/1 T_11.9, 6; - %jmp T_11.10; -T_11.8 ; - %load/vec4 v00000000011b3c30_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v00000000011b3c30_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %store/vec4 v000000000111e1a0_0, 0, 32; - %jmp T_11.10; -T_11.9 ; - %load/vec4 v00000000011b3cd0_0; - %store/vec4 v000000000111e1a0_0, 0, 32; - %jmp T_11.10; -T_11.10 ; - %pop/vec4 1; - %jmp T_11; - .thread T_11, $push; - .scope S_000000000113aab0; -T_12 ; - %vpi_call/w 3 36 "$dumpfile", "mips_cpu_harvard.vcd" {0 0 0}; - %vpi_call/w 3 37 "$dumpvars", 32'sb00000000000000000000000000000000, S_000000000113aab0 {0 0 0}; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011b4d40_0, 0, 1; - %pushi/vec4 100, 0, 32; -T_12.0 %dup/vec4; - %pushi/vec4 0, 0, 32; - %cmp/s; - %jmp/1xz T_12.1, 5; - %jmp/1 T_12.1, 4; - %pushi/vec4 1, 0, 32; - %sub; - %delay 10, 0; - %load/vec4 v00000000011b4d40_0; - %nor/r; - %store/vec4 v00000000011b4d40_0, 0, 1; - %delay 10, 0; - %load/vec4 v00000000011b4d40_0; - %nor/r; - %store/vec4 v00000000011b4d40_0, 0, 1; - %jmp T_12.0; -T_12.1 ; - %pop/vec4 1; - %vpi_call/w 3 47 "$fatal", 32'sb00000000000000000000000000000010, "Simulation did not finish within %d cycles.", P_0000000001083a98 {0 0 0}; - %end; - .thread T_12; - .scope S_000000000113aab0; -T_13 ; - %vpi_call/w 3 51 "$display", "Initial Reset 0" {0 0 0}; - %pushi/vec4 0, 0, 1; - %assign/vec4 v00000000011b54c0_0, 0; - %vpi_call/w 3 55 "$display", "Initial Reset 1" {0 0 0}; - %wait E_00000000011376c0; - %pushi/vec4 1, 0, 1; - %assign/vec4 v00000000011b54c0_0, 0; - %vpi_call/w 3 59 "$display", "Initial Reset 0: Start Program" {0 0 0}; - %wait E_00000000011376c0; - %pushi/vec4 0, 0, 1; - %assign/vec4 v00000000011b54c0_0, 0; - %wait E_00000000011376c0; - %load/vec4 v00000000011b63c0_0; - %pad/u 32; - %cmpi/e 1, 0, 32; - %jmp/0xz T_13.0, 4; - %jmp T_13.1; -T_13.0 ; - %vpi_call/w 3 65 "$display", "TB: CPU did not set active=1 after reset." {0 0 0}; -T_13.1 ; -T_13.2 ; - %load/vec4 v00000000011b63c0_0; - %flag_set/vec4 8; - %jmp/0xz T_13.3, 8; - %wait E_00000000011376c0; - %vpi_call/w 3 71 "$display", "Reg File Write data: %d", v00000000011b3730_0 {0 0 0}; - %jmp T_13.2; -T_13.3 ; - %wait E_00000000011376c0; - %vpi_call/w 3 74 "$display", "TB: CPU Halt; active=0" {0 0 0}; - %vpi_call/w 3 75 "$display", "Output:" {0 0 0}; - %vpi_call/w 3 76 "$display", "%d", v00000000011b5b00_0 {0 0 0}; - %vpi_call/w 3 77 "$finish" {0 0 0}; - %end; - .thread T_13; -# The file index is used to find the file name in the following table. -:file_names 10; - "N/A"; - ""; - "-"; - "testbench/mips_cpu_harvard_tb.v"; - "rtl/mips_cpu_harvard.v"; - "rtl/mips_cpu_alu.v"; - "rtl/mips_cpu_control.v"; - "rtl/mips_cpu_pc.v"; - "rtl/mips_cpu_regfile.v"; - "rtl/mips_cpu_memory.v"; diff --git a/exec/mips_cpu_harvard_tb_andiu b/exec/mips_cpu_harvard_tb_andiu deleted file mode 100644 index fb29326..0000000 --- a/exec/mips_cpu_harvard_tb_andiu +++ /dev/null @@ -1,2738 +0,0 @@ -#! /usr/local/iverilog/bin/vvp -:ivl_version "11.0 (devel)"; -:ivl_delay_selection "TYPICAL"; -:vpi_time_precision + 0; -:vpi_module "C:\iverilog\lib\ivl\system.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_sys.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_textio.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2005_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\va_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2009.vpi"; -S_000000000109af90 .scope package, "$unit" "$unit" 2 1; - .timescale 0 0; -S_000000000101aad0 .scope module, "mips_cpu_harvard_tb" "mips_cpu_harvard_tb" 3 1; - .timescale 0 0; -P_0000000000f64380 .param/str "RAM_INIT_FILE" 0 3 3, "inputs/andiu.txt"; -P_0000000000f643b8 .param/l "TIMEOUT_CYCLES" 0 3 4, +C4<00000000000000000000000001100100>; -v00000000010f5ec0_0 .net "active", 0 0, v0000000001099680_0; 1 drivers -v00000000010f60a0_0 .var "clk", 0 0; -v00000000010f6500_0 .var "clk_enable", 0 0; -v00000000010f6640_0 .net "data_address", 31 0, v00000000010999a0_0; 1 drivers -v00000000010f5d80_0 .net "data_read", 0 0, v0000000001099ae0_0; 1 drivers -v00000000010f5240_0 .net "data_readdata", 31 0, L_00000000010f4c00; 1 drivers -v00000000010f4f20_0 .net "data_write", 0 0, v000000000109a260_0; 1 drivers -v00000000010f5ce0_0 .net "data_writedata", 31 0, v000000000109a300_0; 1 drivers -v00000000010f5100_0 .net "instr_address", 31 0, v00000000010f2c90_0; 1 drivers -v00000000010f56a0_0 .net "instr_readdata", 31 0, L_00000000010f65a0; 1 drivers -v00000000010f5420_0 .net "register_v0", 31 0, L_000000000101eb70; 1 drivers -v00000000010f5740_0 .var "reset", 0 0; -S_0000000000fd5e30 .scope module, "cpuInst" "mips_cpu_harvard" 3 19, 4 1 0, S_000000000101aad0; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "reset"; - .port_info 2 /OUTPUT 1 "active"; - .port_info 3 /OUTPUT 32 "register_v0"; - .port_info 4 /INPUT 1 "clk_enable"; - .port_info 5 /OUTPUT 32 "instr_address"; - .port_info 6 /INPUT 32 "instr_readdata"; - .port_info 7 /OUTPUT 32 "data_address"; - .port_info 8 /OUTPUT 1 "data_write"; - .port_info 9 /OUTPUT 1 "data_read"; - .port_info 10 /OUTPUT 32 "data_writedata"; - .port_info 11 /INPUT 32 "data_readdata"; -v0000000001099900_0 .net "active", 0 0, v0000000001099680_0; alias, 1 drivers -v0000000001099400_0 .net "clk", 0 0, v00000000010f60a0_0; 1 drivers -v0000000001099860_0 .net "clk_enable", 0 0, v00000000010f6500_0; 1 drivers -v00000000010999a0_0 .var "data_address", 31 0; -v0000000001099ae0_0 .var "data_read", 0 0; -v0000000001099f40_0 .net "data_readdata", 31 0, L_00000000010f4c00; alias, 1 drivers -v000000000109a260_0 .var "data_write", 0 0; -v000000000109a300_0 .var "data_writedata", 31 0; -v0000000000ffe980_0 .var "in_B", 31 0; -v00000000010f41d0_0 .net "in_opcode", 5 0, L_00000000010f4d40; 1 drivers -v00000000010f3c30_0 .net "in_pc_in", 31 0, v0000000001099fe0_0; 1 drivers -v00000000010f4270_0 .net "in_readreg1", 4 0, L_00000000010f5e20; 1 drivers -v00000000010f2dd0_0 .net "in_readreg2", 4 0, L_00000000010f5060; 1 drivers -v00000000010f3f50_0 .var "in_writedata", 31 0; -v00000000010f3690_0 .var "in_writereg", 4 0; -v00000000010f2c90_0 .var "instr_address", 31 0; -v00000000010f3870_0 .net "instr_readdata", 31 0, L_00000000010f65a0; alias, 1 drivers -v00000000010f3910_0 .net "out_ALUCond", 0 0, v0000000001099b80_0; 1 drivers -v00000000010f4090_0 .net "out_ALUOp", 4 0, v0000000001099a40_0; 1 drivers -v00000000010f4310_0 .net "out_ALURes", 31 0, v000000000109a760_0; 1 drivers -v00000000010f4450_0 .net "out_ALUSrc", 0 0, v0000000001098b40_0; 1 drivers -v00000000010f3ff0_0 .net "out_MemRead", 0 0, v000000000109a120_0; 1 drivers -v00000000010f3410_0 .net "out_MemWrite", 0 0, v000000000109a580_0; 1 drivers -v00000000010f43b0_0 .net "out_MemtoReg", 1 0, v0000000001099c20_0; 1 drivers -v00000000010f3cd0_0 .net "out_PC", 1 0, v0000000001099180_0; 1 drivers -v00000000010f3050_0 .net "out_RegDst", 1 0, v000000000109a4e0_0; 1 drivers -v00000000010f2b50_0 .net "out_RegWrite", 0 0, v000000000109a620_0; 1 drivers -v00000000010f4770_0 .var "out_pc_out", 31 0; -v00000000010f3d70_0 .net "out_readdata1", 31 0, v0000000001098aa0_0; 1 drivers -v00000000010f39b0_0 .net "out_readdata2", 31 0, v0000000001098be0_0; 1 drivers -v00000000010f2d30_0 .net "out_shamt", 4 0, v0000000001099540_0; 1 drivers -v00000000010f4590_0 .net "register_v0", 31 0, L_000000000101eb70; alias, 1 drivers -v00000000010f32d0_0 .net "reset", 0 0, v00000000010f5740_0; 1 drivers -E_0000000001016020/0 .event edge, v000000000109a4e0_0, v0000000001099e00_0, v0000000001099e00_0, v0000000001099c20_0; -E_0000000001016020/1 .event edge, v000000000109a760_0, v0000000001099f40_0, v0000000001098fa0_0, v0000000001098b40_0; -E_0000000001016020/2 .event edge, v0000000001099e00_0, v0000000001099e00_0, v0000000001098be0_0; -E_0000000001016020 .event/or E_0000000001016020/0, E_0000000001016020/1, E_0000000001016020/2; -E_00000000010161e0/0 .event edge, v0000000001099fe0_0, v000000000109a760_0, v000000000109a580_0, v000000000109a120_0; -E_00000000010161e0/1 .event edge, v0000000001098be0_0; -E_00000000010161e0 .event/or E_00000000010161e0/0, E_00000000010161e0/1; -L_00000000010f5e20 .part L_00000000010f65a0, 21, 5; -L_00000000010f5060 .part L_00000000010f65a0, 16, 5; -L_00000000010f4d40 .part L_00000000010f65a0, 26, 6; -S_0000000000fd5fc0 .scope module, "alu" "mips_cpu_alu" 4 121, 5 1 0, S_0000000000fd5e30; - .timescale 0 0; - .port_info 0 /INPUT 32 "A"; - .port_info 1 /INPUT 32 "B"; - .port_info 2 /INPUT 5 "ALUOp"; - .port_info 3 /INPUT 5 "shamt"; - .port_info 4 /OUTPUT 1 "ALUCond"; - .port_info 5 /OUTPUT 32 "ALURes"; -enum000000000103bd00 .enum4 (5) - "ADD" 5'b00000, - "SUB" 5'b00001, - "MUL" 5'b00010, - "DIV" 5'b00011, - "AND" 5'b00100, - "OR" 5'b00101, - "XOR" 5'b00110, - "SLL" 5'b00111, - "SLLV" 5'b01000, - "SRL" 5'b01001, - "SRLV" 5'b01010, - "SRA" 5'b01011, - "SRAV" 5'b01100, - "EQ" 5'b01101, - "LES" 5'b01110, - "LEQ" 5'b01111, - "GRT" 5'b10000, - "GEQ" 5'b10001, - "NEQ" 5'b10010, - "PAS" 5'b10011, - "SLT" 5'b10100, - "SLTU" 5'b10101, - "MULU" 5'b10110, - "DIVU" 5'b10111 - ; -L_000000000101ea90 .functor BUFZ 5, v0000000001099a40_0, C4<00000>, C4<00000>, C4<00000>; -v000000000109a440_0 .net "A", 31 0, v0000000001098aa0_0; alias, 1 drivers -v0000000001099b80_0 .var "ALUCond", 0 0; -v000000000109a6c0_0 .net "ALUOp", 4 0, v0000000001099a40_0; alias, 1 drivers -v0000000001098d20_0 .net "ALUOps", 4 0, L_000000000101ea90; 1 drivers -v000000000109a760_0 .var/s "ALURes", 31 0; -v00000000010994a0_0 .net "B", 31 0, v0000000000ffe980_0; 1 drivers -v0000000001098f00_0 .net "shamt", 4 0, v0000000001099540_0; alias, 1 drivers -E_0000000001017f20 .event edge, v0000000001098d20_0, v000000000109a440_0, v00000000010994a0_0, v0000000001098f00_0; -S_0000000000fd6150 .scope module, "control" "mips_cpu_control" 4 90, 6 1 0, S_0000000000fd5e30; - .timescale 0 0; - .port_info 0 /INPUT 32 "Instr"; - .port_info 1 /INPUT 1 "ALUCond"; - .port_info 2 /OUTPUT 2 "CtrlRegDst"; - .port_info 3 /OUTPUT 2 "CtrlPC"; - .port_info 4 /OUTPUT 1 "CtrlMemRead"; - .port_info 5 /OUTPUT 2 "CtrlMemtoReg"; - .port_info 6 /OUTPUT 5 "CtrlALUOp"; - .port_info 7 /OUTPUT 5 "Ctrlshamt"; - .port_info 8 /OUTPUT 1 "CtrlMemWrite"; - .port_info 9 /OUTPUT 1 "CtrlALUSrc"; - .port_info 10 /OUTPUT 1 "CtrlRegWrite"; -enum0000000001039270 .enum4 (6) - "SPECIAL" 6'b000000, - "REGIMM" 6'b000001, - "J" 6'b000010, - "JAL" 6'b000011, - "BEQ" 6'b000100, - "BNE" 6'b000101, - "BLEZ" 6'b000110, - "BGTZ" 6'b000111, - "ADDI" 6'b001000, - "ADDIU" 6'b001001, - "SLTI" 6'b001010, - "SLTIU" 6'b001011, - "ANDI" 6'b001100, - "ORI" 6'b001101, - "XORI" 6'b001110, - "LUI" 6'b001111, - "LB" 6'b100000, - "LH" 6'b100001, - "LWL" 6'b100010, - "LW" 6'b100011, - "LBU" 6'b100100, - "LHU" 6'b100101, - "LWR" 6'b100110, - "SB" 6'b101000, - "SH" 6'b101001, - "SW" 6'b101011 - ; -enum000000000103b740 .enum4 (6) - "SLL" 6'b000000, - "SRL" 6'b000010, - "SRA" 6'b000011, - "SLLV" 6'b000100, - "SRLV" 6'b000110, - "SRAV" 6'b000111, - "JR" 6'b001000, - "JALR" 6'b001001, - "MTHI" 6'b010001, - "MTLO" 6'b010011, - "MULT" 6'b011000, - "MULTU" 6'b011001, - "DIV" 6'b011010, - "DIVU" 6'b011011, - "ADDU" 6'b100001, - "SUBU" 6'b100011, - "AND" 6'b100100, - "OR" 6'b100101, - "XOR" 6'b100110, - "SLT" 6'b101010, - "SLTU" 6'b101011 - ; -enum000000000103b950 .enum4 (5) - "BLTZ" 5'b00000, - "BGEZ" 5'b00001, - "BLTZAL" 5'b10000, - "BGEZAL" 5'b10001 - ; -v0000000001098960_0 .net "ALUCond", 0 0, v0000000001099b80_0; alias, 1 drivers -v0000000001099a40_0 .var "CtrlALUOp", 4 0; -v0000000001098b40_0 .var "CtrlALUSrc", 0 0; -v000000000109a120_0 .var "CtrlMemRead", 0 0; -v000000000109a580_0 .var "CtrlMemWrite", 0 0; -v0000000001099c20_0 .var "CtrlMemtoReg", 1 0; -v0000000001099180_0 .var "CtrlPC", 1 0; -v000000000109a4e0_0 .var "CtrlRegDst", 1 0; -v000000000109a620_0 .var "CtrlRegWrite", 0 0; -v0000000001099540_0 .var "Ctrlshamt", 4 0; -v0000000001099e00_0 .net "Instr", 31 0, L_00000000010f65a0; alias, 1 drivers -v000000000109a800_0 .net "funct", 5 0, L_00000000010f4e80; 1 drivers -v00000000010995e0_0 .net "op", 5 0, L_00000000010f5b00; 1 drivers -v0000000001099220_0 .net "rt", 4 0, L_00000000010f5560; 1 drivers -E_0000000001017360/0 .event edge, v00000000010995e0_0, v000000000109a800_0, v0000000001099b80_0, v0000000001099220_0; -E_0000000001017360/1 .event edge, v0000000001099e00_0; -E_0000000001017360 .event/or E_0000000001017360/0, E_0000000001017360/1; -L_00000000010f5b00 .part L_00000000010f65a0, 26, 6; -L_00000000010f4e80 .part L_00000000010f65a0, 0, 6; -L_00000000010f5560 .part L_00000000010f65a0, 16, 5; -S_0000000000fc91d0 .scope module, "pc" "pc" 4 79, 7 1 0, S_0000000000fd5e30; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "rst"; - .port_info 2 /INPUT 2 "pc_ctrl"; - .port_info 3 /INPUT 32 "pc_in"; - .port_info 4 /INPUT 5 "rs"; - .port_info 5 /OUTPUT 32 "pc_out"; - .port_info 6 /OUTPUT 1 "active"; -v0000000001099680_0 .var "active", 0 0; -v0000000001098a00_0 .net "clk", 0 0, v00000000010f60a0_0; alias, 1 drivers -v000000000109a080_0 .net "pc_ctrl", 1 0, v0000000001099180_0; alias, 1 drivers -v0000000001099720_0 .var "pc_curr", 31 0; -v0000000001098fa0_0 .net "pc_in", 31 0, v00000000010f4770_0; 1 drivers -v0000000001099fe0_0 .var "pc_out", 31 0; -o000000000109d018 .functor BUFZ 5, C4; HiZ drive -v00000000010992c0_0 .net "rs", 4 0, o000000000109d018; 0 drivers -v0000000001098c80_0 .net "rst", 0 0, v00000000010f5740_0; alias, 1 drivers -E_0000000001018220 .event posedge, v0000000001098a00_0; -S_0000000000fc9360 .scope module, "regfile" "mips_cpu_regfile" 4 106, 8 1 0, S_0000000000fd5e30; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 5 "readreg1"; - .port_info 2 /INPUT 5 "readreg2"; - .port_info 3 /INPUT 5 "writereg"; - .port_info 4 /INPUT 32 "writedata"; - .port_info 5 /INPUT 1 "regwrite"; - .port_info 6 /INPUT 6 "opcode"; - .port_info 7 /OUTPUT 32 "readdata1"; - .port_info 8 /OUTPUT 32 "readdata2"; - .port_info 9 /OUTPUT 32 "regv0"; -v00000000010997c0_2 .array/port v00000000010997c0, 2; -L_000000000101eb70 .functor BUFZ 32, v00000000010997c0_2, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; -v000000000109a1c0_0 .net "clk", 0 0, v00000000010f60a0_0; alias, 1 drivers -v00000000010997c0 .array "memory", 0 31, 31 0; -v0000000001098dc0_0 .net "opcode", 5 0, L_00000000010f4d40; alias, 1 drivers -v0000000001098aa0_0 .var "readdata1", 31 0; -v0000000001098be0_0 .var "readdata2", 31 0; -v0000000001099040_0 .net "readreg1", 4 0, L_00000000010f5e20; alias, 1 drivers -v0000000001099cc0_0 .net "readreg2", 4 0, L_00000000010f5060; alias, 1 drivers -v00000000010990e0_0 .net "regv0", 31 0, L_000000000101eb70; alias, 1 drivers -v0000000001099360_0 .net "regwrite", 0 0, v000000000109a620_0; alias, 1 drivers -v0000000001099ea0_0 .net "writedata", 31 0, v00000000010f3f50_0; 1 drivers -v0000000001099d60_0 .net "writereg", 4 0, v00000000010f3690_0; 1 drivers -E_00000000010180e0 .event negedge, v0000000001098a00_0; -v00000000010997c0_0 .array/port v00000000010997c0, 0; -v00000000010997c0_1 .array/port v00000000010997c0, 1; -E_0000000001018160/0 .event edge, v0000000001099040_0, v00000000010997c0_0, v00000000010997c0_1, v00000000010997c0_2; -v00000000010997c0_3 .array/port v00000000010997c0, 3; -v00000000010997c0_4 .array/port v00000000010997c0, 4; -v00000000010997c0_5 .array/port v00000000010997c0, 5; -v00000000010997c0_6 .array/port v00000000010997c0, 6; -E_0000000001018160/1 .event edge, v00000000010997c0_3, v00000000010997c0_4, v00000000010997c0_5, v00000000010997c0_6; -v00000000010997c0_7 .array/port v00000000010997c0, 7; -v00000000010997c0_8 .array/port v00000000010997c0, 8; -v00000000010997c0_9 .array/port v00000000010997c0, 9; -v00000000010997c0_10 .array/port v00000000010997c0, 10; -E_0000000001018160/2 .event edge, v00000000010997c0_7, v00000000010997c0_8, v00000000010997c0_9, v00000000010997c0_10; -v00000000010997c0_11 .array/port v00000000010997c0, 11; -v00000000010997c0_12 .array/port v00000000010997c0, 12; -v00000000010997c0_13 .array/port v00000000010997c0, 13; -v00000000010997c0_14 .array/port v00000000010997c0, 14; -E_0000000001018160/3 .event edge, v00000000010997c0_11, v00000000010997c0_12, v00000000010997c0_13, v00000000010997c0_14; -v00000000010997c0_15 .array/port v00000000010997c0, 15; -v00000000010997c0_16 .array/port v00000000010997c0, 16; -v00000000010997c0_17 .array/port v00000000010997c0, 17; -v00000000010997c0_18 .array/port v00000000010997c0, 18; -E_0000000001018160/4 .event edge, v00000000010997c0_15, v00000000010997c0_16, v00000000010997c0_17, v00000000010997c0_18; -v00000000010997c0_19 .array/port v00000000010997c0, 19; -v00000000010997c0_20 .array/port v00000000010997c0, 20; -v00000000010997c0_21 .array/port v00000000010997c0, 21; -v00000000010997c0_22 .array/port v00000000010997c0, 22; -E_0000000001018160/5 .event edge, v00000000010997c0_19, v00000000010997c0_20, v00000000010997c0_21, v00000000010997c0_22; -v00000000010997c0_23 .array/port v00000000010997c0, 23; -v00000000010997c0_24 .array/port v00000000010997c0, 24; -v00000000010997c0_25 .array/port v00000000010997c0, 25; -v00000000010997c0_26 .array/port v00000000010997c0, 26; -E_0000000001018160/6 .event edge, v00000000010997c0_23, v00000000010997c0_24, v00000000010997c0_25, v00000000010997c0_26; -v00000000010997c0_27 .array/port v00000000010997c0, 27; -v00000000010997c0_28 .array/port v00000000010997c0, 28; -v00000000010997c0_29 .array/port v00000000010997c0, 29; -v00000000010997c0_30 .array/port v00000000010997c0, 30; -E_0000000001018160/7 .event edge, v00000000010997c0_27, v00000000010997c0_28, v00000000010997c0_29, v00000000010997c0_30; -v00000000010997c0_31 .array/port v00000000010997c0, 31; -E_0000000001018160/8 .event edge, v00000000010997c0_31, v0000000001099cc0_0; -E_0000000001018160 .event/or E_0000000001018160/0, E_0000000001018160/1, E_0000000001018160/2, E_0000000001018160/3, E_0000000001018160/4, E_0000000001018160/5, E_0000000001018160/6, E_0000000001018160/7, E_0000000001018160/8; -S_0000000000fc94f0 .scope begin, "$unm_blk_121" "$unm_blk_121" 8 16, 8 16 0, S_0000000000fc9360; - .timescale 0 0; -v0000000001098e60_0 .var/i "i", 31 0; -S_0000000000f82680 .scope module, "ramInst" "mips_cpu_memory" 3 9, 9 1 0, S_000000000101aad0; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 32 "data_address"; - .port_info 2 /INPUT 1 "data_write"; - .port_info 3 /INPUT 1 "data_read"; - .port_info 4 /INPUT 32 "data_writedata"; - .port_info 5 /OUTPUT 32 "data_readdata"; - .port_info 6 /INPUT 32 "instr_address"; - .port_info 7 /OUTPUT 32 "instr_readdata"; -P_00000000010181a0 .param/str "RAM_INIT_FILE" 0 9 16, "inputs/andiu.txt"; -L_000000000101e9b0 .functor AND 1, L_00000000010f4ca0, L_00000000010f52e0, C4<1>, C4<1>; -v00000000010f4810_0 .net *"_ivl_0", 31 0, L_00000000010f6820; 1 drivers -L_00000000010f79e8 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v00000000010f2a10_0 .net/2u *"_ivl_12", 31 0, L_00000000010f79e8; 1 drivers -v00000000010f30f0_0 .net *"_ivl_14", 0 0, L_00000000010f4ca0; 1 drivers -L_00000000010f7a30 .functor BUFT 1, C4<10111111110000000000000001000000>, C4<0>, C4<0>, C4<0>; -v00000000010f2e70_0 .net/2u *"_ivl_16", 31 0, L_00000000010f7a30; 1 drivers -v00000000010f2970_0 .net *"_ivl_18", 0 0, L_00000000010f52e0; 1 drivers -v00000000010f2fb0_0 .net *"_ivl_2", 31 0, L_00000000010f4ac0; 1 drivers -v00000000010f44f0_0 .net *"_ivl_21", 0 0, L_000000000101e9b0; 1 drivers -v00000000010f2f10_0 .net *"_ivl_22", 31 0, L_00000000010f5380; 1 drivers -L_00000000010f7a78 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v00000000010f35f0_0 .net/2u *"_ivl_24", 31 0, L_00000000010f7a78; 1 drivers -v00000000010f4630_0 .net *"_ivl_26", 31 0, L_00000000010f6460; 1 drivers -v00000000010f3190_0 .net *"_ivl_28", 31 0, L_00000000010f4b60; 1 drivers -v00000000010f3230_0 .net *"_ivl_30", 29 0, L_00000000010f54c0; 1 drivers -L_00000000010f7ac0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v00000000010f3a50_0 .net *"_ivl_32", 1 0, L_00000000010f7ac0; 1 drivers -L_00000000010f7b08 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v00000000010f3730_0 .net *"_ivl_34", 31 0, L_00000000010f7b08; 1 drivers -v00000000010f3370_0 .net *"_ivl_4", 29 0, L_00000000010f66e0; 1 drivers -L_00000000010f7958 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v00000000010f46d0_0 .net *"_ivl_6", 1 0, L_00000000010f7958; 1 drivers -L_00000000010f79a0 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v00000000010f34b0_0 .net *"_ivl_8", 31 0, L_00000000010f79a0; 1 drivers -v00000000010f3af0_0 .net "clk", 0 0, v00000000010f60a0_0; alias, 1 drivers -v00000000010f3550_0 .net "data_address", 31 0, v00000000010999a0_0; alias, 1 drivers -v00000000010f2ab0 .array "data_memory", 63 0, 31 0; -v00000000010f3b90_0 .net "data_read", 0 0, v0000000001099ae0_0; alias, 1 drivers -v00000000010f37d0_0 .net "data_readdata", 31 0, L_00000000010f4c00; alias, 1 drivers -v00000000010f3e10_0 .net "data_write", 0 0, v000000000109a260_0; alias, 1 drivers -v00000000010f3eb0_0 .net "data_writedata", 31 0, v000000000109a300_0; alias, 1 drivers -v00000000010f57e0_0 .net "instr_address", 31 0, v00000000010f2c90_0; alias, 1 drivers -v00000000010f4980 .array "instr_memory", 63 0, 31 0; -v00000000010f51a0_0 .net "instr_readdata", 31 0, L_00000000010f65a0; alias, 1 drivers -L_00000000010f6820 .array/port v00000000010f2ab0, L_00000000010f4ac0; -L_00000000010f66e0 .part v00000000010999a0_0, 2, 30; -L_00000000010f4ac0 .concat [ 30 2 0 0], L_00000000010f66e0, L_00000000010f7958; -L_00000000010f4c00 .functor MUXZ 32, L_00000000010f79a0, L_00000000010f6820, v0000000001099ae0_0, C4<>; -L_00000000010f4ca0 .cmp/ge 32, v00000000010f2c90_0, L_00000000010f79e8; -L_00000000010f52e0 .cmp/gt 32, L_00000000010f7a30, v00000000010f2c90_0; -L_00000000010f5380 .array/port v00000000010f4980, L_00000000010f4b60; -L_00000000010f6460 .arith/sub 32, v00000000010f2c90_0, L_00000000010f7a78; -L_00000000010f54c0 .part L_00000000010f6460, 2, 30; -L_00000000010f4b60 .concat [ 30 2 0 0], L_00000000010f54c0, L_00000000010f7ac0; -L_00000000010f65a0 .functor MUXZ 32, L_00000000010f7b08, L_00000000010f5380, L_000000000101e9b0, C4<>; -S_0000000000f82810 .scope begin, "$unm_blk_104" "$unm_blk_104" 9 21, 9 21 0, S_0000000000f82680; - .timescale 0 0; -v00000000010f2bf0_0 .var/i "i", 31 0; -S_0000000000f829a0 .scope begin, "$ivl_for_loop0" "$ivl_for_loop0" 9 36, 9 36 0, S_0000000000f82810; - .timescale 0 0; -v00000000010f4130_0 .var/i "j", 31 0; - .scope S_0000000000f82680; -T_0 ; - %fork t_1, S_0000000000f82810; - %jmp t_0; - .scope S_0000000000f82810; -t_1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000010f2bf0_0, 0, 32; -T_0.0 ; - %load/vec4 v00000000010f2bf0_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v00000000010f2bf0_0; - %store/vec4a v00000000010f2ab0, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000010f2bf0_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000010f2bf0_0, 0, 32; - %jmp T_0.0; -T_0.1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000010f2bf0_0, 0, 32; -T_0.2 ; - %load/vec4 v00000000010f2bf0_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.3, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v00000000010f2bf0_0; - %store/vec4a v00000000010f4980, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000010f2bf0_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000010f2bf0_0, 0, 32; - %jmp T_0.2; -T_0.3 ; - %vpi_call/w 9 32 "$display", "RAM: Loading RAM contents from %s", P_00000000010181a0 {0 0 0}; - %vpi_call/w 9 33 "$readmemh", P_00000000010181a0, v00000000010f4980 {0 0 0}; - %fork t_3, S_0000000000f829a0; - %jmp t_2; - .scope S_0000000000f829a0; -t_3 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000010f4130_0, 0, 32; -T_0.4 ; - %load/vec4 v00000000010f4130_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.5, 5; - %pushi/vec4 3217031168, 0, 32; - %load/vec4 v00000000010f4130_0; - %muli 4, 0, 32; - %add; - %vpi_call/w 9 37 "$display", "byte +%h: %h", S<0,vec4,u32>, &A {1 0 0}; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000010f4130_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000010f4130_0, 0, 32; - %jmp T_0.4; -T_0.5 ; - %end; - .scope S_0000000000f82810; -t_2 %join; - %end; - .scope S_0000000000f82680; -t_0 %join; - %end; - .thread T_0; - .scope S_0000000000f82680; -T_1 ; - %wait E_0000000001018220; - %load/vec4 v00000000010f3b90_0; - %nor/r; - %load/vec4 v00000000010f3e10_0; - %and; - %flag_set/vec4 8; - %jmp/0xz T_1.0, 8; - %load/vec4 v00000000010f57e0_0; - %load/vec4 v00000000010f3550_0; - %cmp/ne; - %jmp/0xz T_1.2, 4; - %load/vec4 v00000000010f3eb0_0; - %load/vec4 v00000000010f3550_0; - %ix/load 4, 2, 0; - %flag_set/imm 4, 0; - %shiftr 4; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010f2ab0, 0, 4; -T_1.2 ; -T_1.0 ; - %jmp T_1; - .thread T_1; - .scope S_0000000000fc91d0; -T_2 ; - %load/vec4 v0000000001098fa0_0; - %store/vec4 v0000000001099fe0_0, 0, 32; - %end; - .thread T_2; - .scope S_0000000000fc91d0; -T_3 ; - %wait E_0000000001018220; - %load/vec4 v0000000001098c80_0; - %flag_set/vec4 8; - %jmp/0xz T_3.0, 8; - %pushi/vec4 1, 0, 1; - %assign/vec4 v0000000001099680_0, 0; - %pushi/vec4 3217031168, 0, 32; - %assign/vec4 v0000000001099fe0_0, 0; - %jmp T_3.1; -T_3.0 ; - %load/vec4 v0000000001099fe0_0; - %cmpi/ne 0, 0, 32; - %jmp/0xz T_3.2, 4; - %load/vec4 v0000000001099680_0; - %assign/vec4 v0000000001099680_0, 0; - %load/vec4 v000000000109a080_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_3.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_3.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_3.6, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_3.7, 6; - %jmp T_3.8; -T_3.4 ; - %load/vec4 v0000000001099fe0_0; - %assign/vec4 v0000000001099720_0, 0; - %load/vec4 v0000000001099720_0; - %addi 4, 0, 32; - %assign/vec4 v0000000001099fe0_0, 0; - %vpi_call/w 7 27 "$display", "New PC from %h to %h", v0000000001099720_0, v0000000001099fe0_0 {0 0 0}; - %jmp T_3.8; -T_3.5 ; - %load/vec4 v0000000001098fa0_0; - %assign/vec4 v0000000001099fe0_0, 0; - %jmp T_3.8; -T_3.6 ; - %load/vec4 v0000000001098fa0_0; - %assign/vec4 v0000000001099fe0_0, 0; - %jmp T_3.8; -T_3.7 ; - %vpi_call/w 7 36 "$display", "JUMP REGISTER" {0 0 0}; - %pushi/vec4 0, 0, 32; - %assign/vec4 v0000000001099fe0_0, 0; - %jmp T_3.8; -T_3.8 ; - %pop/vec4 1; - %jmp T_3.3; -T_3.2 ; - %load/vec4 v0000000001099fe0_0; - %cmpi/e 0, 0, 32; - %jmp/0xz T_3.9, 4; - %pushi/vec4 0, 0, 1; - %assign/vec4 v0000000001099680_0, 0; -T_3.9 ; -T_3.3 ; -T_3.1 ; - %jmp T_3; - .thread T_3; - .scope S_0000000000fd6150; -T_4 ; - %wait E_0000000001017360; - %vpi_call/w 6 86 "$display", "Opcode: %h", v00000000010995e0_0 {0 0 0}; - %load/vec4 v00000000010995e0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.0, 4; - %pushi/vec4 0, 0, 2; - %store/vec4 v000000000109a4e0_0, 0, 2; - %vpi_call/w 6 89 "$display", "CTRLREGDST: Rt" {0 0 0}; - %jmp T_4.1; -T_4.0 ; - %load/vec4 v00000000010995e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000109a800_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000109a800_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.2, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v000000000109a4e0_0, 0, 2; - %vpi_call/w 6 92 "$display", "CTRLREGDST: Rd" {0 0 0}; - %jmp T_4.3; -T_4.2 ; - %load/vec4 v00000000010995e0_0; - %cmpi/e 3, 0, 6; - %jmp/0xz T_4.4, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v000000000109a4e0_0, 0, 2; - %vpi_call/w 6 95 "$display", "CTRLREGDST: Link" {0 0 0}; - %jmp T_4.5; -T_4.4 ; - %pushi/vec4 1, 1, 2; - %store/vec4 v000000000109a4e0_0, 0, 2; - %vpi_call/w 6 96 "$display", "xxxxxxxxxxxxxx" {0 0 0}; -T_4.5 ; -T_4.3 ; -T_4.1 ; - %load/vec4 v0000000001098960_0; - %load/vec4 v00000000010995e0_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010995e0_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010995e0_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010995e0_0; - %pushi/vec4 5, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010995e0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001099220_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001099220_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001099220_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001099220_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.6, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v0000000001099180_0, 0, 2; - %jmp T_4.7; -T_4.6 ; - %load/vec4 v00000000010995e0_0; - %cmpi/e 2, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 3, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.8, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v0000000001099180_0, 0, 2; - %jmp T_4.9; -T_4.8 ; - %load/vec4 v000000000109a800_0; - %cmpi/e 8, 0, 6; - %flag_mov 8, 4; - %load/vec4 v000000000109a800_0; - %cmpi/e 9, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.10, 4; - %pushi/vec4 3, 0, 2; - %store/vec4 v0000000001099180_0, 0, 2; - %jmp T_4.11; -T_4.10 ; - %pushi/vec4 0, 0, 2; - %store/vec4 v0000000001099180_0, 0, 2; -T_4.11 ; -T_4.9 ; -T_4.7 ; - %load/vec4 v00000000010995e0_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.12, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000109a120_0, 0, 1; - %pushi/vec4 1, 0, 2; - %store/vec4 v0000000001099c20_0, 0, 2; - %vpi_call/w 6 112 "$display", "Memory read enabled" {0 0 0}; - %jmp T_4.13; -T_4.12 ; - %load/vec4 v00000000010995e0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000109a800_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000109a800_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.14, 9; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000109a120_0, 0, 1; - %pushi/vec4 0, 0, 2; - %store/vec4 v0000000001099c20_0, 0, 2; - %vpi_call/w 6 116 "$display", "Memory read disabled" {0 0 0}; - %jmp T_4.15; -T_4.14 ; - %load/vec4 v00000000010995e0_0; - %cmpi/e 3, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000109a800_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.16, 9; - %pushi/vec4 2, 0, 2; - %store/vec4 v0000000001099c20_0, 0, 2; - %jmp T_4.17; -T_4.16 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v000000000109a120_0, 0, 1; -T_4.17 ; -T_4.15 ; -T_4.13 ; - %load/vec4 v00000000010995e0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000109a800_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.18, 9; - %pushi/vec4 0, 0, 5; - %store/vec4 v0000000001099a40_0, 0, 5; - %vpi_call/w 6 124 "$display", "ALU OP = 0 (ADDU/ADDIU)" {0 0 0}; - %jmp T_4.19; -T_4.18 ; - %load/vec4 v00000000010995e0_0; - %cmpi/e 12, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000109a800_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.20, 9; - %pushi/vec4 4, 0, 5; - %store/vec4 v0000000001099a40_0, 0, 5; - %jmp T_4.21; -T_4.20 ; - %load/vec4 v00000000010995e0_0; - %cmpi/e 4, 0, 6; - %jmp/0xz T_4.22, 4; - %pushi/vec4 13, 0, 5; - %store/vec4 v0000000001099a40_0, 0, 5; - %jmp T_4.23; -T_4.22 ; - %load/vec4 v00000000010995e0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001099220_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001099220_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.24, 8; - %pushi/vec4 17, 0, 5; - %store/vec4 v0000000001099a40_0, 0, 5; - %jmp T_4.25; -T_4.24 ; - %load/vec4 v00000000010995e0_0; - %cmpi/e 7, 0, 6; - %jmp/0xz T_4.26, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v0000000001099a40_0, 0, 5; - %jmp T_4.27; -T_4.26 ; - %load/vec4 v00000000010995e0_0; - %cmpi/e 6, 0, 6; - %jmp/0xz T_4.28, 4; - %pushi/vec4 15, 0, 5; - %store/vec4 v0000000001099a40_0, 0, 5; - %jmp T_4.29; -T_4.28 ; - %load/vec4 v00000000010995e0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001099220_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001099220_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.30, 8; - %pushi/vec4 14, 0, 5; - %store/vec4 v0000000001099a40_0, 0, 5; - %jmp T_4.31; -T_4.30 ; - %load/vec4 v00000000010995e0_0; - %cmpi/e 5, 0, 6; - %jmp/0xz T_4.32, 4; - %pushi/vec4 18, 0, 5; - %store/vec4 v0000000001099a40_0, 0, 5; - %jmp T_4.33; -T_4.32 ; - %load/vec4 v00000000010995e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000109a800_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.34, 8; - %pushi/vec4 3, 0, 5; - %store/vec4 v0000000001099a40_0, 0, 5; - %jmp T_4.35; -T_4.34 ; - %load/vec4 v00000000010995e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000109a800_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.36, 8; - %pushi/vec4 23, 0, 5; - %store/vec4 v0000000001099a40_0, 0, 5; - %jmp T_4.37; -T_4.36 ; - %load/vec4 v00000000010995e0_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.38, 4; - %pushi/vec4 0, 0, 5; - %store/vec4 v0000000001099a40_0, 0, 5; - %jmp T_4.39; -T_4.38 ; - %load/vec4 v00000000010995e0_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.40, 4; - %pushi/vec4 7, 0, 5; - %store/vec4 v0000000001099a40_0, 0, 5; - %jmp T_4.41; -T_4.40 ; - %load/vec4 v00000000010995e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000109a800_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000109a800_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.42, 8; - %pushi/vec4 19, 0, 5; - %store/vec4 v0000000001099a40_0, 0, 5; - %jmp T_4.43; -T_4.42 ; - %load/vec4 v00000000010995e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000109a800_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.44, 8; - %pushi/vec4 2, 0, 5; - %store/vec4 v0000000001099a40_0, 0, 5; - %jmp T_4.45; -T_4.44 ; - %load/vec4 v00000000010995e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000109a800_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.46, 8; - %pushi/vec4 22, 0, 5; - %store/vec4 v0000000001099a40_0, 0, 5; - %jmp T_4.47; -T_4.46 ; - %load/vec4 v00000000010995e0_0; - %cmpi/e 13, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000109a800_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.48, 9; - %pushi/vec4 5, 0, 5; - %store/vec4 v0000000001099a40_0, 0, 5; - %jmp T_4.49; -T_4.48 ; - %load/vec4 v00000000010995e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000109a800_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.50, 8; - %pushi/vec4 7, 0, 5; - %store/vec4 v0000000001099a40_0, 0, 5; - %jmp T_4.51; -T_4.50 ; - %load/vec4 v00000000010995e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000109a800_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.52, 8; - %pushi/vec4 8, 0, 5; - %store/vec4 v0000000001099a40_0, 0, 5; - %jmp T_4.53; -T_4.52 ; - %load/vec4 v00000000010995e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000109a800_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.54, 8; - %pushi/vec4 11, 0, 5; - %store/vec4 v0000000001099a40_0, 0, 5; - %jmp T_4.55; -T_4.54 ; - %load/vec4 v00000000010995e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000109a800_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.56, 8; - %pushi/vec4 12, 0, 5; - %store/vec4 v0000000001099a40_0, 0, 5; - %jmp T_4.57; -T_4.56 ; - %load/vec4 v00000000010995e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000109a800_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.58, 8; - %pushi/vec4 9, 0, 5; - %store/vec4 v0000000001099a40_0, 0, 5; - %jmp T_4.59; -T_4.58 ; - %load/vec4 v00000000010995e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000109a800_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.60, 8; - %pushi/vec4 10, 0, 5; - %store/vec4 v0000000001099a40_0, 0, 5; - %jmp T_4.61; -T_4.60 ; - %load/vec4 v00000000010995e0_0; - %cmpi/e 10, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000109a800_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.62, 9; - %pushi/vec4 20, 0, 5; - %store/vec4 v0000000001099a40_0, 0, 5; - %jmp T_4.63; -T_4.62 ; - %load/vec4 v00000000010995e0_0; - %cmpi/e 11, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000109a800_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.64, 9; - %pushi/vec4 21, 0, 5; - %store/vec4 v0000000001099a40_0, 0, 5; - %jmp T_4.65; -T_4.64 ; - %load/vec4 v00000000010995e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000109a800_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.66, 8; - %pushi/vec4 1, 0, 5; - %store/vec4 v0000000001099a40_0, 0, 5; - %jmp T_4.67; -T_4.66 ; - %load/vec4 v00000000010995e0_0; - %cmpi/e 14, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000109a800_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.68, 9; - %pushi/vec4 6, 0, 5; - %store/vec4 v0000000001099a40_0, 0, 5; - %vpi_call/w 6 175 "$display", "ALU Op = 6 (XOR)" {0 0 0}; - %jmp T_4.69; -T_4.68 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v0000000001099a40_0, 0, 5; -T_4.69 ; -T_4.67 ; -T_4.65 ; -T_4.63 ; -T_4.61 ; -T_4.59 ; -T_4.57 ; -T_4.55 ; -T_4.53 ; -T_4.51 ; -T_4.49 ; -T_4.47 ; -T_4.45 ; -T_4.43 ; -T_4.41 ; -T_4.39 ; -T_4.37 ; -T_4.35 ; -T_4.33 ; -T_4.31 ; -T_4.29 ; -T_4.27 ; -T_4.25 ; -T_4.23 ; -T_4.21 ; -T_4.19 ; - %load/vec4 v00000000010995e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000109a800_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000109a800_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.70, 8; - %load/vec4 v0000000001099e00_0; - %parti/s 5, 6, 4; - %store/vec4 v0000000001099540_0, 0, 5; - %jmp T_4.71; -T_4.70 ; - %load/vec4 v00000000010995e0_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.72, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v0000000001099540_0, 0, 5; - %jmp T_4.73; -T_4.72 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v0000000001099540_0, 0, 5; -T_4.73 ; -T_4.71 ; - %load/vec4 v00000000010995e0_0; - %cmpi/e 40, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.74, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000109a580_0, 0, 1; - %jmp T_4.75; -T_4.74 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000109a580_0, 0, 1; -T_4.75 ; - %load/vec4 v00000000010995e0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.76, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001098b40_0, 0, 1; - %jmp T_4.77; -T_4.76 ; - %load/vec4 v00000000010995e0_0; - %cmpi/e 4, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 7, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 6, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 5, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000109a800_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000109a800_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %load/vec4 v00000000010995e0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001099220_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001099220_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001099220_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001099220_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %flag_or 8, 9; - %jmp/0xz T_4.78, 8; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001098b40_0, 0, 1; - %jmp T_4.79; -T_4.78 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v0000000001098b40_0, 0, 1; -T_4.79 ; -T_4.77 ; - %load/vec4 v00000000010995e0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010995e0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000109a800_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000109a800_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000109a800_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.80, 9; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000109a620_0, 0, 1; - %jmp T_4.81; -T_4.80 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000109a620_0, 0, 1; -T_4.81 ; - %jmp T_4; - .thread T_4, $push; - .scope S_0000000000fc9360; -T_5 ; - %fork t_5, S_0000000000fc94f0; - %jmp t_4; - .scope S_0000000000fc94f0; -t_5 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v0000000001098e60_0, 0, 32; -T_5.0 ; - %load/vec4 v0000000001098e60_0; - %cmpi/s 32, 0, 32; - %jmp/0xz T_5.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v0000000001098e60_0; - %store/vec4a v00000000010997c0, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0000000001098e60_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v0000000001098e60_0, 0, 32; - %jmp T_5.0; -T_5.1 ; - %end; - .scope S_0000000000fc9360; -t_4 %join; - %end; - .thread T_5; - .scope S_0000000000fc9360; -T_6 ; -Ewait_0 .event/or E_0000000001018160, E_0x0; - %wait Ewait_0; - %load/vec4 v0000000001099040_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v00000000010997c0, 4; - %store/vec4 v0000000001098aa0_0, 0, 32; - %load/vec4 v0000000001099cc0_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v00000000010997c0, 4; - %store/vec4 v0000000001098be0_0, 0, 32; - %jmp T_6; - .thread T_6, $push; - .scope S_0000000000fc9360; -T_7 ; - %wait E_00000000010180e0; - %load/vec4 v0000000001099d60_0; - %cmpi/e 0, 0, 5; - %jmp/0xz T_7.0, 4; - %jmp T_7.1; -T_7.0 ; - %load/vec4 v0000000001099360_0; - %flag_set/vec4 8; - %jmp/0xz T_7.2, 8; - %load/vec4 v0000000001098dc0_0; - %dup/vec4; - %pushi/vec4 32, 0, 6; - %cmp/u; - %jmp/1 T_7.4, 6; - %dup/vec4; - %pushi/vec4 36, 0, 6; - %cmp/u; - %jmp/1 T_7.5, 6; - %dup/vec4; - %pushi/vec4 33, 0, 6; - %cmp/u; - %jmp/1 T_7.6, 6; - %dup/vec4; - %pushi/vec4 37, 0, 6; - %cmp/u; - %jmp/1 T_7.7, 6; - %dup/vec4; - %pushi/vec4 34, 0, 6; - %cmp/u; - %jmp/1 T_7.8, 6; - %dup/vec4; - %pushi/vec4 38, 0, 6; - %cmp/u; - %jmp/1 T_7.9, 6; - %load/vec4 v0000000001099ea0_0; - %load/vec4 v0000000001099d60_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010997c0, 0, 4; - %jmp T_7.11; -T_7.4 ; - %load/vec4 v0000000001098aa0_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.12, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.13, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.14, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.15, 6; - %jmp T_7.16; -T_7.12 ; - %load/vec4 v0000000001099ea0_0; - %parti/s 1, 7, 4; - %replicate 24; - %load/vec4 v0000000001099ea0_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001099d60_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010997c0, 0, 4; - %jmp T_7.16; -T_7.13 ; - %load/vec4 v0000000001099ea0_0; - %parti/s 1, 15, 5; - %replicate 24; - %load/vec4 v0000000001099ea0_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001099d60_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010997c0, 0, 4; - %jmp T_7.16; -T_7.14 ; - %load/vec4 v0000000001099ea0_0; - %parti/s 1, 23, 6; - %replicate 24; - %load/vec4 v0000000001099ea0_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001099d60_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010997c0, 0, 4; - %jmp T_7.16; -T_7.15 ; - %load/vec4 v0000000001099ea0_0; - %parti/s 1, 31, 6; - %replicate 24; - %load/vec4 v0000000001099ea0_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001099d60_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010997c0, 0, 4; - %jmp T_7.16; -T_7.16 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.5 ; - %load/vec4 v0000000001098aa0_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.17, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.18, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.19, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.20, 6; - %jmp T_7.21; -T_7.17 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v0000000001099ea0_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001099d60_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010997c0, 0, 4; - %jmp T_7.21; -T_7.18 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v0000000001099ea0_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001099d60_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010997c0, 0, 4; - %jmp T_7.21; -T_7.19 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v0000000001099ea0_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001099d60_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010997c0, 0, 4; - %jmp T_7.21; -T_7.20 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v0000000001099ea0_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001099d60_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010997c0, 0, 4; - %jmp T_7.21; -T_7.21 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.6 ; - %load/vec4 v0000000001098aa0_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.22, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.23, 6; - %jmp T_7.24; -T_7.22 ; - %load/vec4 v0000000001099ea0_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v0000000001099ea0_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001099d60_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010997c0, 0, 4; - %jmp T_7.24; -T_7.23 ; - %load/vec4 v0000000001099ea0_0; - %parti/s 1, 31, 6; - %replicate 16; - %load/vec4 v0000000001099ea0_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001099d60_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010997c0, 0, 4; - %jmp T_7.24; -T_7.24 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.7 ; - %load/vec4 v0000000001098aa0_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.25, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.26, 6; - %jmp T_7.27; -T_7.25 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v0000000001099ea0_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001099d60_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010997c0, 0, 4; - %jmp T_7.27; -T_7.26 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v0000000001099ea0_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001099d60_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010997c0, 0, 4; - %jmp T_7.27; -T_7.27 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.8 ; - %load/vec4 v0000000001098aa0_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.28, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.29, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.30, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.31, 6; - %jmp T_7.32; -T_7.28 ; - %load/vec4 v0000000001099ea0_0; - %parti/s 8, 0, 2; - %load/vec4 v0000000001099d60_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 24, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v00000000010997c0, 4, 5; - %jmp T_7.32; -T_7.29 ; - %load/vec4 v0000000001099ea0_0; - %parti/s 16, 0, 2; - %load/vec4 v0000000001099d60_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 16, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v00000000010997c0, 4, 5; - %jmp T_7.32; -T_7.30 ; - %load/vec4 v0000000001099ea0_0; - %parti/s 24, 0, 2; - %load/vec4 v0000000001099d60_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 8, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v00000000010997c0, 4, 5; - %jmp T_7.32; -T_7.31 ; - %load/vec4 v0000000001099ea0_0; - %load/vec4 v0000000001099d60_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010997c0, 0, 4; - %jmp T_7.32; -T_7.32 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.9 ; - %load/vec4 v0000000001098aa0_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.33, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.34, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.35, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.36, 6; - %jmp T_7.37; -T_7.33 ; - %load/vec4 v0000000001099ea0_0; - %load/vec4 v0000000001099d60_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010997c0, 0, 4; - %jmp T_7.37; -T_7.34 ; - %load/vec4 v0000000001099ea0_0; - %parti/s 24, 8, 5; - %load/vec4 v0000000001099d60_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010997c0, 0, 4; - %jmp T_7.37; -T_7.35 ; - %load/vec4 v0000000001099ea0_0; - %parti/s 16, 16, 6; - %load/vec4 v0000000001099d60_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010997c0, 0, 4; - %jmp T_7.37; -T_7.36 ; - %load/vec4 v0000000001099ea0_0; - %parti/s 8, 24, 6; - %load/vec4 v0000000001099d60_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010997c0, 0, 4; - %jmp T_7.37; -T_7.37 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.11 ; - %pop/vec4 1; -T_7.2 ; -T_7.1 ; - %jmp T_7; - .thread T_7; - .scope S_0000000000fd5fc0; -T_8 ; -Ewait_1 .event/or E_0000000001017f20, E_0x0; - %wait Ewait_1; - %load/vec4 v0000000001098d20_0; - %dup/vec4; - %pushi/vec4 0, 0, 5; - %cmp/u; - %jmp/1 T_8.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 5; - %cmp/u; - %jmp/1 T_8.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 5; - %cmp/u; - %jmp/1 T_8.2, 6; - %dup/vec4; - %pushi/vec4 3, 0, 5; - %cmp/u; - %jmp/1 T_8.3, 6; - %dup/vec4; - %pushi/vec4 4, 0, 5; - %cmp/u; - %jmp/1 T_8.4, 6; - %dup/vec4; - %pushi/vec4 5, 0, 5; - %cmp/u; - %jmp/1 T_8.5, 6; - %dup/vec4; - %pushi/vec4 6, 0, 5; - %cmp/u; - %jmp/1 T_8.6, 6; - %dup/vec4; - %pushi/vec4 7, 0, 5; - %cmp/u; - %jmp/1 T_8.7, 6; - %dup/vec4; - %pushi/vec4 8, 0, 5; - %cmp/u; - %jmp/1 T_8.8, 6; - %dup/vec4; - %pushi/vec4 9, 0, 5; - %cmp/u; - %jmp/1 T_8.9, 6; - %dup/vec4; - %pushi/vec4 10, 0, 5; - %cmp/u; - %jmp/1 T_8.10, 6; - %dup/vec4; - %pushi/vec4 11, 0, 5; - %cmp/u; - %jmp/1 T_8.11, 6; - %dup/vec4; - %pushi/vec4 12, 0, 5; - %cmp/u; - %jmp/1 T_8.12, 6; - %dup/vec4; - %pushi/vec4 13, 0, 5; - %cmp/u; - %jmp/1 T_8.13, 6; - %dup/vec4; - %pushi/vec4 14, 0, 5; - %cmp/u; - %jmp/1 T_8.14, 6; - %dup/vec4; - %pushi/vec4 15, 0, 5; - %cmp/u; - %jmp/1 T_8.15, 6; - %dup/vec4; - %pushi/vec4 16, 0, 5; - %cmp/u; - %jmp/1 T_8.16, 6; - %dup/vec4; - %pushi/vec4 17, 0, 5; - %cmp/u; - %jmp/1 T_8.17, 6; - %dup/vec4; - %pushi/vec4 18, 0, 5; - %cmp/u; - %jmp/1 T_8.18, 6; - %dup/vec4; - %pushi/vec4 19, 0, 5; - %cmp/u; - %jmp/1 T_8.19, 6; - %dup/vec4; - %pushi/vec4 20, 0, 5; - %cmp/u; - %jmp/1 T_8.20, 6; - %dup/vec4; - %pushi/vec4 21, 0, 5; - %cmp/u; - %jmp/1 T_8.21, 6; - %dup/vec4; - %pushi/vec4 22, 0, 5; - %cmp/u; - %jmp/1 T_8.22, 6; - %dup/vec4; - %pushi/vec4 23, 0, 5; - %cmp/u; - %jmp/1 T_8.23, 6; - %jmp T_8.24; -T_8.0 ; - %load/vec4 v000000000109a440_0; - %load/vec4 v00000000010994a0_0; - %add; - %store/vec4 v000000000109a760_0, 0, 32; - %jmp T_8.24; -T_8.1 ; - %load/vec4 v000000000109a440_0; - %load/vec4 v00000000010994a0_0; - %sub; - %store/vec4 v000000000109a760_0, 0, 32; - %jmp T_8.24; -T_8.2 ; - %load/vec4 v000000000109a440_0; - %load/vec4 v00000000010994a0_0; - %mul; - %store/vec4 v000000000109a760_0, 0, 32; - %jmp T_8.24; -T_8.3 ; - %load/vec4 v000000000109a440_0; - %load/vec4 v00000000010994a0_0; - %div/s; - %store/vec4 v000000000109a760_0, 0, 32; - %jmp T_8.24; -T_8.4 ; - %load/vec4 v000000000109a440_0; - %load/vec4 v00000000010994a0_0; - %and; - %store/vec4 v000000000109a760_0, 0, 32; - %jmp T_8.24; -T_8.5 ; - %load/vec4 v000000000109a440_0; - %load/vec4 v00000000010994a0_0; - %or; - %store/vec4 v000000000109a760_0, 0, 32; - %jmp T_8.24; -T_8.6 ; - %load/vec4 v000000000109a440_0; - %load/vec4 v00000000010994a0_0; - %xor; - %store/vec4 v000000000109a760_0, 0, 32; - %jmp T_8.24; -T_8.7 ; - %load/vec4 v00000000010994a0_0; - %ix/getv 4, v0000000001098f00_0; - %shiftl 4; - %store/vec4 v000000000109a760_0, 0, 32; - %jmp T_8.24; -T_8.8 ; - %load/vec4 v00000000010994a0_0; - %ix/getv 4, v000000000109a440_0; - %shiftl 4; - %store/vec4 v000000000109a760_0, 0, 32; - %jmp T_8.24; -T_8.9 ; - %load/vec4 v00000000010994a0_0; - %ix/getv 4, v0000000001098f00_0; - %shiftr 4; - %store/vec4 v000000000109a760_0, 0, 32; - %jmp T_8.24; -T_8.10 ; - %load/vec4 v00000000010994a0_0; - %ix/getv 4, v000000000109a440_0; - %shiftr 4; - %store/vec4 v000000000109a760_0, 0, 32; - %jmp T_8.24; -T_8.11 ; - %load/vec4 v00000000010994a0_0; - %ix/getv 4, v0000000001098f00_0; - %shiftr 4; - %store/vec4 v000000000109a760_0, 0, 32; - %jmp T_8.24; -T_8.12 ; - %load/vec4 v00000000010994a0_0; - %ix/getv 4, v000000000109a440_0; - %shiftr 4; - %store/vec4 v000000000109a760_0, 0, 32; - %jmp T_8.24; -T_8.13 ; - %load/vec4 v000000000109a440_0; - %load/vec4 v00000000010994a0_0; - %cmp/e; - %jmp/0xz T_8.25, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001099b80_0, 0, 1; - %jmp T_8.26; -T_8.25 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001099b80_0, 0, 1; -T_8.26 ; - %jmp T_8.24; -T_8.14 ; - %load/vec4 v000000000109a440_0; - %load/vec4 v00000000010994a0_0; - %cmp/s; - %jmp/0xz T_8.27, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001099b80_0, 0, 1; - %jmp T_8.28; -T_8.27 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001099b80_0, 0, 1; -T_8.28 ; - %jmp T_8.24; -T_8.15 ; - %load/vec4 v000000000109a440_0; - %load/vec4 v00000000010994a0_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.29, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001099b80_0, 0, 1; - %jmp T_8.30; -T_8.29 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001099b80_0, 0, 1; -T_8.30 ; - %jmp T_8.24; -T_8.16 ; - %load/vec4 v00000000010994a0_0; - %load/vec4 v000000000109a440_0; - %cmp/s; - %jmp/0xz T_8.31, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001099b80_0, 0, 1; - %jmp T_8.32; -T_8.31 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001099b80_0, 0, 1; -T_8.32 ; - %jmp T_8.24; -T_8.17 ; - %load/vec4 v00000000010994a0_0; - %load/vec4 v000000000109a440_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.33, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001099b80_0, 0, 1; - %jmp T_8.34; -T_8.33 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001099b80_0, 0, 1; -T_8.34 ; - %jmp T_8.24; -T_8.18 ; - %load/vec4 v000000000109a440_0; - %load/vec4 v00000000010994a0_0; - %cmp/ne; - %jmp/0xz T_8.35, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001099b80_0, 0, 1; - %jmp T_8.36; -T_8.35 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001099b80_0, 0, 1; -T_8.36 ; - %jmp T_8.24; -T_8.19 ; - %load/vec4 v000000000109a440_0; - %store/vec4 v000000000109a760_0, 0, 32; - %jmp T_8.24; -T_8.20 ; - %load/vec4 v000000000109a440_0; - %load/vec4 v00000000010994a0_0; - %cmp/s; - %jmp/0xz T_8.37, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v000000000109a760_0, 0, 32; -T_8.37 ; - %jmp T_8.24; -T_8.21 ; - %load/vec4 v000000000109a440_0; - %load/vec4 v00000000010994a0_0; - %cmp/u; - %jmp/0xz T_8.39, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v000000000109a760_0, 0, 32; -T_8.39 ; - %jmp T_8.24; -T_8.22 ; - %load/vec4 v000000000109a440_0; - %load/vec4 v00000000010994a0_0; - %mul; - %store/vec4 v000000000109a760_0, 0, 32; - %jmp T_8.24; -T_8.23 ; - %load/vec4 v000000000109a440_0; - %load/vec4 v00000000010994a0_0; - %div; - %store/vec4 v000000000109a760_0, 0, 32; - %jmp T_8.24; -T_8.24 ; - %pop/vec4 1; - %jmp T_8; - .thread T_8, $push; - .scope S_0000000000fd5e30; -T_9 ; - %pushi/vec4 3217031168, 0, 32; - %store/vec4 v00000000010f4770_0, 0, 32; - %end; - .thread T_9, $init; - .scope S_0000000000fd5e30; -T_10 ; -Ewait_2 .event/or E_00000000010161e0, E_0x0; - %wait Ewait_2; - %load/vec4 v00000000010f3c30_0; - %store/vec4 v00000000010f2c90_0, 0, 32; - %load/vec4 v00000000010f4310_0; - %store/vec4 v00000000010999a0_0, 0, 32; - %load/vec4 v00000000010f3410_0; - %store/vec4 v000000000109a260_0, 0, 1; - %load/vec4 v00000000010f3ff0_0; - %store/vec4 v0000000001099ae0_0, 0, 1; - %load/vec4 v00000000010f39b0_0; - %store/vec4 v000000000109a300_0, 0, 32; - %jmp T_10; - .thread T_10, $push; - .scope S_0000000000fd5e30; -T_11 ; -Ewait_3 .event/or E_0000000001016020, E_0x0; - %wait Ewait_3; - %load/vec4 v00000000010f3050_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.2, 6; - %jmp T_11.3; -T_11.0 ; - %load/vec4 v00000000010f3870_0; - %parti/s 5, 16, 6; - %store/vec4 v00000000010f3690_0, 0, 5; - %jmp T_11.3; -T_11.1 ; - %load/vec4 v00000000010f3870_0; - %parti/s 5, 11, 5; - %store/vec4 v00000000010f3690_0, 0, 5; - %jmp T_11.3; -T_11.2 ; - %pushi/vec4 31, 0, 5; - %store/vec4 v00000000010f3690_0, 0, 5; - %jmp T_11.3; -T_11.3 ; - %pop/vec4 1; - %load/vec4 v00000000010f43b0_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.6, 6; - %jmp T_11.7; -T_11.4 ; - %load/vec4 v00000000010f4310_0; - %store/vec4 v00000000010f3f50_0, 0, 32; - %jmp T_11.7; -T_11.5 ; - %load/vec4 v0000000001099f40_0; - %store/vec4 v00000000010f3f50_0, 0, 32; - %jmp T_11.7; -T_11.6 ; - %load/vec4 v00000000010f4770_0; - %addi 8, 0, 32; - %store/vec4 v00000000010f3f50_0, 0, 32; - %jmp T_11.7; -T_11.7 ; - %pop/vec4 1; - %load/vec4 v00000000010f4450_0; - %dup/vec4; - %pushi/vec4 1, 0, 1; - %cmp/u; - %jmp/1 T_11.8, 6; - %dup/vec4; - %pushi/vec4 0, 0, 1; - %cmp/u; - %jmp/1 T_11.9, 6; - %jmp T_11.10; -T_11.8 ; - %load/vec4 v00000000010f3870_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v00000000010f3870_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %store/vec4 v0000000000ffe980_0, 0, 32; - %jmp T_11.10; -T_11.9 ; - %load/vec4 v00000000010f39b0_0; - %store/vec4 v0000000000ffe980_0, 0, 32; - %jmp T_11.10; -T_11.10 ; - %pop/vec4 1; - %jmp T_11; - .thread T_11, $push; - .scope S_000000000101aad0; -T_12 ; - %vpi_call/w 3 36 "$dumpfile", "mips_cpu_harvard.vcd" {0 0 0}; - %vpi_call/w 3 37 "$dumpvars", 32'sb00000000000000000000000000000000, S_000000000101aad0 {0 0 0}; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000010f60a0_0, 0, 1; - %pushi/vec4 100, 0, 32; -T_12.0 %dup/vec4; - %pushi/vec4 0, 0, 32; - %cmp/s; - %jmp/1xz T_12.1, 5; - %jmp/1 T_12.1, 4; - %pushi/vec4 1, 0, 32; - %sub; - %delay 10, 0; - %load/vec4 v00000000010f60a0_0; - %nor/r; - %store/vec4 v00000000010f60a0_0, 0, 1; - %delay 10, 0; - %load/vec4 v00000000010f60a0_0; - %nor/r; - %store/vec4 v00000000010f60a0_0, 0, 1; - %jmp T_12.0; -T_12.1 ; - %pop/vec4 1; - %vpi_call/w 3 47 "$fatal", 32'sb00000000000000000000000000000010, "Simulation did not finish within %d cycles.", P_0000000000f643b8 {0 0 0}; - %end; - .thread T_12; - .scope S_000000000101aad0; -T_13 ; - %vpi_call/w 3 51 "$display", "Initial Reset 0" {0 0 0}; - %pushi/vec4 0, 0, 1; - %assign/vec4 v00000000010f5740_0, 0; - %vpi_call/w 3 55 "$display", "Initial Reset 1" {0 0 0}; - %wait E_0000000001018220; - %pushi/vec4 1, 0, 1; - %assign/vec4 v00000000010f5740_0, 0; - %vpi_call/w 3 59 "$display", "Initial Reset 0: Start Program" {0 0 0}; - %wait E_0000000001018220; - %pushi/vec4 0, 0, 1; - %assign/vec4 v00000000010f5740_0, 0; - %wait E_0000000001018220; - %load/vec4 v00000000010f5ec0_0; - %pad/u 32; - %cmpi/e 1, 0, 32; - %jmp/0xz T_13.0, 4; - %jmp T_13.1; -T_13.0 ; - %vpi_call/w 3 65 "$display", "TB: CPU did not set active=1 after reset." {0 0 0}; -T_13.1 ; -T_13.2 ; - %load/vec4 v00000000010f5ec0_0; - %flag_set/vec4 8; - %jmp/0xz T_13.3, 8; - %wait E_0000000001018220; - %vpi_call/w 3 71 "$display", "Reg File Write data: %d", v00000000010f3f50_0 {0 0 0}; - %jmp T_13.2; -T_13.3 ; - %wait E_0000000001018220; - %vpi_call/w 3 74 "$display", "TB: CPU Halt; active=0" {0 0 0}; - %vpi_call/w 3 75 "$display", "Output:" {0 0 0}; - %vpi_call/w 3 76 "$display", "%d", v00000000010f5420_0 {0 0 0}; - %vpi_call/w 3 77 "$finish" {0 0 0}; - %end; - .thread T_13; -# The file index is used to find the file name in the following table. -:file_names 10; - "N/A"; - ""; - "-"; - "testbench/mips_cpu_harvard_tb.v"; - "rtl/mips_cpu_harvard.v"; - "rtl/mips_cpu_alu.v"; - "rtl/mips_cpu_control.v"; - "rtl/mips_cpu_pc.v"; - "rtl/mips_cpu_regfile.v"; - "rtl/mips_cpu_memory.v"; diff --git a/exec/mips_cpu_harvard_tb_cori b/exec/mips_cpu_harvard_tb_cori deleted file mode 100644 index 7c8bd65..0000000 --- a/exec/mips_cpu_harvard_tb_cori +++ /dev/null @@ -1,2724 +0,0 @@ -#! /usr/local/iverilog/bin/vvp -:ivl_version "11.0 (devel)"; -:ivl_delay_selection "TYPICAL"; -:vpi_time_precision + 0; -:vpi_module "C:\iverilog\lib\ivl\system.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_sys.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_textio.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2005_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\va_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2009.vpi"; -S_00000000010dd810 .scope package, "$unit" "$unit" 2 1; - .timescale 0 0; -S_00000000010dd9a0 .scope module, "mips_cpu_harvard_tb" "mips_cpu_harvard_tb" 3 1; - .timescale 0 0; -P_00000000010d37e0 .param/str "RAM_INIT_FILE" 0 3 3, "inputs/cori.txt"; -P_00000000010d3818 .param/l "TIMEOUT_CYCLES" 0 3 4, +C4<00000000000000000000000001100100>; -v00000000011f4e10_0 .net "active", 0 0, v00000000011f1110_0; 1 drivers -v00000000011f5f90_0 .var "clk", 0 0; -v00000000011f5090_0 .var "clk_enable", 0 0; -v00000000011f5b30_0 .net "data_address", 31 0, v00000000011f23d0_0; 1 drivers -v00000000011f6030_0 .net "data_read", 0 0, v00000000011f0530_0; 1 drivers -v00000000011f5db0_0 .net "data_readdata", 31 0, L_00000000011f5c70; 1 drivers -v00000000011f53b0_0 .net "data_write", 0 0, v00000000011f0d50_0; 1 drivers -v00000000011f4730_0 .net "data_writedata", 31 0, v00000000011f0ad0_0; 1 drivers -v00000000011f5a90_0 .net "instr_address", 31 0, v00000000011f2f40_0; 1 drivers -v00000000011f60d0_0 .net "instr_readdata", 31 0, L_00000000011f4b90; 1 drivers -v00000000011f5450_0 .net "register_v0", 31 0, L_000000000118d690; 1 drivers -v00000000011f47d0_0 .var "reset", 0 0; -S_00000000010ed840 .scope module, "cpuInst" "mips_cpu_harvard" 3 19, 4 1 0, S_00000000010dd9a0; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "reset"; - .port_info 2 /OUTPUT 1 "active"; - .port_info 3 /OUTPUT 32 "register_v0"; - .port_info 4 /INPUT 1 "clk_enable"; - .port_info 5 /OUTPUT 32 "instr_address"; - .port_info 6 /INPUT 32 "instr_readdata"; - .port_info 7 /OUTPUT 32 "data_address"; - .port_info 8 /OUTPUT 1 "data_write"; - .port_info 9 /OUTPUT 1 "data_read"; - .port_info 10 /OUTPUT 32 "data_writedata"; - .port_info 11 /INPUT 32 "data_readdata"; -v00000000011f21f0_0 .net "active", 0 0, v00000000011f1110_0; alias, 1 drivers -v00000000011f2290_0 .net "clk", 0 0, v00000000011f5f90_0; 1 drivers -v00000000011f2330_0 .net "clk_enable", 0 0, v00000000011f5090_0; 1 drivers -v00000000011f23d0_0 .var "data_address", 31 0; -v00000000011f0530_0 .var "data_read", 0 0; -v00000000011f0e90_0 .net "data_readdata", 31 0, L_00000000011f5c70; alias, 1 drivers -v00000000011f0d50_0 .var "data_write", 0 0; -v00000000011f0ad0_0 .var "data_writedata", 31 0; -v00000000011f0df0_0 .var "in_B", 31 0; -v00000000011f0f30_0 .net "in_opcode", 5 0, L_00000000011f58b0; 1 drivers -v00000000011f1070_0 .net "in_pc_in", 31 0, v00000000011f07b0_0; 1 drivers -v00000000011f3580_0 .net "in_readreg1", 4 0, L_00000000011f5630; 1 drivers -v00000000011f2e00_0 .net "in_readreg2", 4 0, L_00000000011f5d10; 1 drivers -v00000000011f34e0_0 .var "in_writedata", 31 0; -v00000000011f2ea0_0 .var "in_writereg", 4 0; -v00000000011f2f40_0 .var "instr_address", 31 0; -v00000000011f3a80_0 .net "instr_readdata", 31 0, L_00000000011f4b90; alias, 1 drivers -v00000000011f3b20_0 .net "out_ALUCond", 0 0, v0000000001076b60_0; 1 drivers -v00000000011f3620_0 .net "out_ALUOp", 4 0, v00000000011f1610_0; 1 drivers -v00000000011f2900_0 .net "out_ALURes", 31 0, v00000000011f1570_0; 1 drivers -v00000000011f3bc0_0 .net "out_ALUSrc", 0 0, v00000000011f1250_0; 1 drivers -v00000000011f2860_0 .net "out_MemRead", 0 0, v00000000011f12f0_0; 1 drivers -v00000000011f2fe0_0 .net "out_MemWrite", 0 0, v00000000011f0670_0; 1 drivers -v00000000011f36c0_0 .net "out_MemtoReg", 1 0, v00000000011f0b70_0; 1 drivers -v00000000011f4200_0 .net "out_PC", 1 0, v00000000011f20b0_0; 1 drivers -v00000000011f2720_0 .net "out_RegDst", 1 0, v00000000011f0710_0; 1 drivers -v00000000011f3080_0 .net "out_RegWrite", 0 0, v00000000011f0c10_0; 1 drivers -v00000000011f3f80_0 .var "out_pc_out", 31 0; -v00000000011f3120_0 .net "out_readdata1", 31 0, v00000000011f1d90_0; 1 drivers -v00000000011f4340_0 .net "out_readdata2", 31 0, v00000000011f0a30_0; 1 drivers -v00000000011f3760_0 .net "out_shamt", 4 0, v00000000011f1c50_0; 1 drivers -v00000000011f2c20_0 .net "register_v0", 31 0, L_000000000118d690; alias, 1 drivers -v00000000011f3940_0 .net "reset", 0 0, v00000000011f47d0_0; 1 drivers -E_00000000010e8be0/0 .event edge, v00000000011f07b0_0, v00000000011f1570_0, v00000000011f0670_0, v00000000011f12f0_0; -E_00000000010e8be0/1 .event edge, v00000000011f0a30_0; -E_00000000010e8be0 .event/or E_00000000010e8be0/0, E_00000000010e8be0/1; -L_00000000011f5630 .part L_00000000011f4b90, 21, 5; -L_00000000011f5d10 .part L_00000000011f4b90, 16, 5; -L_00000000011f58b0 .part L_00000000011f4b90, 26, 6; -S_00000000010ed9d0 .scope module, "alu" "mips_cpu_alu" 4 121, 5 1 0, S_00000000010ed840; - .timescale 0 0; - .port_info 0 /INPUT 32 "A"; - .port_info 1 /INPUT 32 "B"; - .port_info 2 /INPUT 5 "ALUOp"; - .port_info 3 /INPUT 5 "shamt"; - .port_info 4 /OUTPUT 1 "ALUCond"; - .port_info 5 /OUTPUT 32 "ALURes"; -enum000000000117b970 .enum4 (5) - "ADD" 5'b00000, - "SUB" 5'b00001, - "MUL" 5'b00010, - "DIV" 5'b00011, - "AND" 5'b00100, - "OR" 5'b00101, - "XOR" 5'b00110, - "SLL" 5'b00111, - "SLLV" 5'b01000, - "SRL" 5'b01001, - "SRLV" 5'b01010, - "SRA" 5'b01011, - "SRAV" 5'b01100, - "EQ" 5'b01101, - "LES" 5'b01110, - "LEQ" 5'b01111, - "GRT" 5'b10000, - "GEQ" 5'b10001, - "NEQ" 5'b10010, - "PAS" 5'b10011, - "SLT" 5'b10100, - "SLTU" 5'b10101, - "MULU" 5'b10110, - "DIVU" 5'b10111 - ; -L_000000000118d5b0 .functor BUFZ 5, v00000000011f1610_0, C4<00000>, C4<00000>, C4<00000>; -v0000000001077920_0 .net "A", 31 0, v00000000011f1d90_0; alias, 1 drivers -v0000000001076b60_0 .var "ALUCond", 0 0; -v00000000011f14d0_0 .net "ALUOp", 4 0, v00000000011f1610_0; alias, 1 drivers -v00000000011f1430_0 .net "ALUOps", 4 0, L_000000000118d5b0; 1 drivers -v00000000011f1570_0 .var/s "ALURes", 31 0; -v00000000011f1890_0 .net "B", 31 0, v00000000011f0df0_0; 1 drivers -v00000000011f05d0_0 .net "shamt", 4 0, v00000000011f1c50_0; alias, 1 drivers -E_00000000010ea960 .event edge, v00000000011f1430_0, v0000000001077920_0, v00000000011f1890_0, v00000000011f05d0_0; -S_00000000010a8ec0 .scope module, "control" "mips_cpu_control" 4 90, 6 1 0, S_00000000010ed840; - .timescale 0 0; - .port_info 0 /INPUT 32 "Instr"; - .port_info 1 /INPUT 1 "ALUCond"; - .port_info 2 /OUTPUT 2 "CtrlRegDst"; - .port_info 3 /OUTPUT 2 "CtrlPC"; - .port_info 4 /OUTPUT 1 "CtrlMemRead"; - .port_info 5 /OUTPUT 2 "CtrlMemtoReg"; - .port_info 6 /OUTPUT 5 "CtrlALUOp"; - .port_info 7 /OUTPUT 5 "Ctrlshamt"; - .port_info 8 /OUTPUT 1 "CtrlMemWrite"; - .port_info 9 /OUTPUT 1 "CtrlALUSrc"; - .port_info 10 /OUTPUT 1 "CtrlRegWrite"; -enum00000000010bae50 .enum4 (6) - "SLL" 6'b000000, - "SRL" 6'b000010, - "SRA" 6'b000011, - "SLLV" 6'b000100, - "SRLV" 6'b000110, - "SRAV" 6'b000111, - "JR" 6'b001000, - "JALR" 6'b001001, - "MTHI" 6'b010001, - "MTLO" 6'b010011, - "MULT" 6'b011000, - "MULTU" 6'b011001, - "DIV" 6'b011010, - "DIVU" 6'b011011, - "ADDU" 6'b100001, - "SUBU" 6'b100011, - "AND" 6'b100100, - "OR" 6'b100101, - "XOR" 6'b100110, - "SLT" 6'b101010, - "SLTU" 6'b101011 - ; -enum000000000117af10 .enum4 (6) - "SPECIAL" 6'b000000, - "REGIMM" 6'b000001, - "J" 6'b000010, - "JAL" 6'b000011, - "BEQ" 6'b000100, - "BNE" 6'b000101, - "BLEZ" 6'b000110, - "BGTZ" 6'b000111, - "ADDI" 6'b001000, - "ADDIU" 6'b001001, - "SLTI" 6'b001010, - "SLTIU" 6'b001011, - "ANDI" 6'b001100, - "ORI" 6'b001101, - "XORI" 6'b001110, - "LUI" 6'b001111, - "LB" 6'b100000, - "LH" 6'b100001, - "LWL" 6'b100010, - "LW" 6'b100011, - "LBU" 6'b100100, - "LHU" 6'b100101, - "LWR" 6'b100110, - "SB" 6'b101000, - "SH" 6'b101001, - "SW" 6'b101011 - ; -enum000000000117afc0 .enum4 (5) - "BLTZ" 5'b00000, - "BGEZ" 5'b00001, - "BLTZAL" 5'b10000, - "BGEZAL" 5'b10001 - ; -v00000000011f0850_0 .net "ALUCond", 0 0, v0000000001076b60_0; alias, 1 drivers -v00000000011f1610_0 .var "CtrlALUOp", 4 0; -v00000000011f1250_0 .var "CtrlALUSrc", 0 0; -v00000000011f12f0_0 .var "CtrlMemRead", 0 0; -v00000000011f0670_0 .var "CtrlMemWrite", 0 0; -v00000000011f0b70_0 .var "CtrlMemtoReg", 1 0; -v00000000011f20b0_0 .var "CtrlPC", 1 0; -v00000000011f0710_0 .var "CtrlRegDst", 1 0; -v00000000011f0c10_0 .var "CtrlRegWrite", 0 0; -v00000000011f1c50_0 .var "Ctrlshamt", 4 0; -v00000000011f1930_0 .net "Instr", 31 0, L_00000000011f4b90; alias, 1 drivers -v00000000011f2150_0 .net "funct", 5 0, L_00000000011f59f0; 1 drivers -v00000000011f17f0_0 .net "op", 5 0, L_00000000011f56d0; 1 drivers -v00000000011f19d0_0 .net "rt", 4 0, L_00000000011f5950; 1 drivers -E_00000000010e85a0/0 .event edge, v00000000011f17f0_0, v00000000011f2150_0, v0000000001076b60_0, v00000000011f19d0_0; -E_00000000010e85a0/1 .event edge, v00000000011f1930_0; -E_00000000010e85a0 .event/or E_00000000010e85a0/0, E_00000000010e85a0/1; -L_00000000011f56d0 .part L_00000000011f4b90, 26, 6; -L_00000000011f59f0 .part L_00000000011f4b90, 0, 6; -L_00000000011f5950 .part L_00000000011f4b90, 16, 5; -S_00000000010a9050 .scope module, "pc" "pc" 4 79, 7 1 0, S_00000000010ed840; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "rst"; - .port_info 2 /INPUT 2 "pc_ctrl"; - .port_info 3 /INPUT 32 "pc_in"; - .port_info 4 /INPUT 5 "rs"; - .port_info 5 /OUTPUT 32 "pc_out"; - .port_info 6 /OUTPUT 1 "active"; -v00000000011f1110_0 .var "active", 0 0; -v00000000011f0fd0_0 .net "clk", 0 0, v00000000011f5f90_0; alias, 1 drivers -v00000000011f1390_0 .net "pc_ctrl", 1 0, v00000000011f20b0_0; alias, 1 drivers -v00000000011f11b0_0 .var "pc_curr", 31 0; -v00000000011f16b0_0 .net "pc_in", 31 0, v00000000011f3f80_0; 1 drivers -v00000000011f07b0_0 .var "pc_out", 31 0; -o000000000119cbe8 .functor BUFZ 5, C4; HiZ drive -v00000000011f08f0_0 .net "rs", 4 0, o000000000119cbe8; 0 drivers -v00000000011f1750_0 .net "rst", 0 0, v00000000011f47d0_0; alias, 1 drivers -E_00000000010e3760 .event posedge, v00000000011f0fd0_0; -S_00000000010a91e0 .scope module, "regfile" "mips_cpu_regfile" 4 106, 8 1 0, S_00000000010ed840; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 5 "readreg1"; - .port_info 2 /INPUT 5 "readreg2"; - .port_info 3 /INPUT 5 "writereg"; - .port_info 4 /INPUT 32 "writedata"; - .port_info 5 /INPUT 1 "regwrite"; - .port_info 6 /INPUT 6 "opcode"; - .port_info 7 /OUTPUT 32 "readdata1"; - .port_info 8 /OUTPUT 32 "readdata2"; - .port_info 9 /OUTPUT 32 "regv0"; -v00000000011f1b10_2 .array/port v00000000011f1b10, 2; -L_000000000118d690 .functor BUFZ 32, v00000000011f1b10_2, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; -v00000000011f1a70_0 .net "clk", 0 0, v00000000011f5f90_0; alias, 1 drivers -v00000000011f1b10 .array "memory", 0 31, 31 0; -v00000000011f0990_0 .net "opcode", 5 0, L_00000000011f58b0; alias, 1 drivers -v00000000011f1d90_0 .var "readdata1", 31 0; -v00000000011f0a30_0 .var "readdata2", 31 0; -v00000000011f1e30_0 .net "readreg1", 4 0, L_00000000011f5630; alias, 1 drivers -v00000000011f1bb0_0 .net "readreg2", 4 0, L_00000000011f5d10; alias, 1 drivers -v00000000011f1ed0_0 .net "regv0", 31 0, L_000000000118d690; alias, 1 drivers -v00000000011f0cb0_0 .net "regwrite", 0 0, v00000000011f0c10_0; alias, 1 drivers -v00000000011f1f70_0 .net "writedata", 31 0, v00000000011f34e0_0; 1 drivers -v00000000011f2010_0 .net "writereg", 4 0, v00000000011f2ea0_0; 1 drivers -E_00000000010e3fe0 .event negedge, v00000000011f0fd0_0; -v00000000011f1b10_0 .array/port v00000000011f1b10, 0; -v00000000011f1b10_1 .array/port v00000000011f1b10, 1; -E_00000000010e37e0/0 .event edge, v00000000011f1e30_0, v00000000011f1b10_0, v00000000011f1b10_1, v00000000011f1b10_2; -v00000000011f1b10_3 .array/port v00000000011f1b10, 3; -v00000000011f1b10_4 .array/port v00000000011f1b10, 4; -v00000000011f1b10_5 .array/port v00000000011f1b10, 5; -v00000000011f1b10_6 .array/port v00000000011f1b10, 6; -E_00000000010e37e0/1 .event edge, v00000000011f1b10_3, v00000000011f1b10_4, v00000000011f1b10_5, v00000000011f1b10_6; -v00000000011f1b10_7 .array/port v00000000011f1b10, 7; -v00000000011f1b10_8 .array/port v00000000011f1b10, 8; -v00000000011f1b10_9 .array/port v00000000011f1b10, 9; -v00000000011f1b10_10 .array/port v00000000011f1b10, 10; -E_00000000010e37e0/2 .event edge, v00000000011f1b10_7, v00000000011f1b10_8, v00000000011f1b10_9, v00000000011f1b10_10; -v00000000011f1b10_11 .array/port v00000000011f1b10, 11; -v00000000011f1b10_12 .array/port v00000000011f1b10, 12; -v00000000011f1b10_13 .array/port v00000000011f1b10, 13; -v00000000011f1b10_14 .array/port v00000000011f1b10, 14; -E_00000000010e37e0/3 .event edge, v00000000011f1b10_11, v00000000011f1b10_12, v00000000011f1b10_13, v00000000011f1b10_14; -v00000000011f1b10_15 .array/port v00000000011f1b10, 15; -v00000000011f1b10_16 .array/port v00000000011f1b10, 16; -v00000000011f1b10_17 .array/port v00000000011f1b10, 17; -v00000000011f1b10_18 .array/port v00000000011f1b10, 18; -E_00000000010e37e0/4 .event edge, v00000000011f1b10_15, v00000000011f1b10_16, v00000000011f1b10_17, v00000000011f1b10_18; -v00000000011f1b10_19 .array/port v00000000011f1b10, 19; -v00000000011f1b10_20 .array/port v00000000011f1b10, 20; -v00000000011f1b10_21 .array/port v00000000011f1b10, 21; -v00000000011f1b10_22 .array/port v00000000011f1b10, 22; -E_00000000010e37e0/5 .event edge, v00000000011f1b10_19, v00000000011f1b10_20, v00000000011f1b10_21, v00000000011f1b10_22; -v00000000011f1b10_23 .array/port v00000000011f1b10, 23; -v00000000011f1b10_24 .array/port v00000000011f1b10, 24; -v00000000011f1b10_25 .array/port v00000000011f1b10, 25; -v00000000011f1b10_26 .array/port v00000000011f1b10, 26; -E_00000000010e37e0/6 .event edge, v00000000011f1b10_23, v00000000011f1b10_24, v00000000011f1b10_25, v00000000011f1b10_26; -v00000000011f1b10_27 .array/port v00000000011f1b10, 27; -v00000000011f1b10_28 .array/port v00000000011f1b10, 28; -v00000000011f1b10_29 .array/port v00000000011f1b10, 29; -v00000000011f1b10_30 .array/port v00000000011f1b10, 30; -E_00000000010e37e0/7 .event edge, v00000000011f1b10_27, v00000000011f1b10_28, v00000000011f1b10_29, v00000000011f1b10_30; -v00000000011f1b10_31 .array/port v00000000011f1b10, 31; -E_00000000010e37e0/8 .event edge, v00000000011f1b10_31, v00000000011f1bb0_0; -E_00000000010e37e0 .event/or E_00000000010e37e0/0, E_00000000010e37e0/1, E_00000000010e37e0/2, E_00000000010e37e0/3, E_00000000010e37e0/4, E_00000000010e37e0/5, E_00000000010e37e0/6, E_00000000010e37e0/7, E_00000000010e37e0/8; -S_0000000001098900 .scope begin, "$unm_blk_121" "$unm_blk_121" 8 16, 8 16 0, S_00000000010a91e0; - .timescale 0 0; -v00000000011f1cf0_0 .var/i "i", 31 0; -S_0000000001098ba0 .scope module, "ramInst" "mips_cpu_memory" 3 9, 9 1 0, S_00000000010dd9a0; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 32 "data_address"; - .port_info 2 /INPUT 1 "data_write"; - .port_info 3 /INPUT 1 "data_read"; - .port_info 4 /INPUT 32 "data_writedata"; - .port_info 5 /OUTPUT 32 "data_readdata"; - .port_info 6 /INPUT 32 "instr_address"; - .port_info 7 /OUTPUT 32 "instr_readdata"; -P_00000000010e4060 .param/str "RAM_INIT_FILE" 0 9 16, "inputs/cori.txt"; -L_000000000118ce40 .functor AND 1, L_00000000011f5590, L_00000000011f4870, C4<1>, C4<1>; -v00000000011f3c60_0 .net *"_ivl_0", 31 0, L_00000000011f6350; 1 drivers -L_00000000011f65a8 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v00000000011f2cc0_0 .net/2u *"_ivl_12", 31 0, L_00000000011f65a8; 1 drivers -v00000000011f31c0_0 .net *"_ivl_14", 0 0, L_00000000011f5590; 1 drivers -L_00000000011f65f0 .functor BUFT 1, C4<10111111110000000000000001000000>, C4<0>, C4<0>, C4<0>; -v00000000011f3d00_0 .net/2u *"_ivl_16", 31 0, L_00000000011f65f0; 1 drivers -v00000000011f3260_0 .net *"_ivl_18", 0 0, L_00000000011f4870; 1 drivers -v00000000011f3300_0 .net *"_ivl_2", 31 0, L_00000000011f45f0; 1 drivers -v00000000011f3800_0 .net *"_ivl_21", 0 0, L_000000000118ce40; 1 drivers -v00000000011f4020_0 .net *"_ivl_22", 31 0, L_00000000011f6210; 1 drivers -L_00000000011f6638 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v00000000011f3da0_0 .net/2u *"_ivl_24", 31 0, L_00000000011f6638; 1 drivers -v00000000011f38a0_0 .net *"_ivl_26", 31 0, L_00000000011f4910; 1 drivers -v00000000011f39e0_0 .net *"_ivl_28", 31 0, L_00000000011f62b0; 1 drivers -v00000000011f3ee0_0 .net *"_ivl_30", 29 0, L_00000000011f54f0; 1 drivers -L_00000000011f6680 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v00000000011f29a0_0 .net *"_ivl_32", 1 0, L_00000000011f6680; 1 drivers -L_00000000011f66c8 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v00000000011f2680_0 .net *"_ivl_34", 31 0, L_00000000011f66c8; 1 drivers -v00000000011f40c0_0 .net *"_ivl_4", 29 0, L_00000000011f5bd0; 1 drivers -L_00000000011f6518 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v00000000011f3e40_0 .net *"_ivl_6", 1 0, L_00000000011f6518; 1 drivers -L_00000000011f6560 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v00000000011f4160_0 .net *"_ivl_8", 31 0, L_00000000011f6560; 1 drivers -v00000000011f2a40_0 .net "clk", 0 0, v00000000011f5f90_0; alias, 1 drivers -v00000000011f2b80_0 .net "data_address", 31 0, v00000000011f23d0_0; alias, 1 drivers -v00000000011f42a0 .array "data_memory", 63 0, 31 0; -v00000000011f43e0_0 .net "data_read", 0 0, v00000000011f0530_0; alias, 1 drivers -v00000000011f2540_0 .net "data_readdata", 31 0, L_00000000011f5c70; alias, 1 drivers -v00000000011f25e0_0 .net "data_write", 0 0, v00000000011f0d50_0; alias, 1 drivers -v00000000011f33a0_0 .net "data_writedata", 31 0, v00000000011f0ad0_0; alias, 1 drivers -v00000000011f27c0_0 .net "instr_address", 31 0, v00000000011f2f40_0; alias, 1 drivers -v00000000011f2d60 .array "instr_memory", 63 0, 31 0; -v00000000011f4690_0 .net "instr_readdata", 31 0, L_00000000011f4b90; alias, 1 drivers -L_00000000011f6350 .array/port v00000000011f42a0, L_00000000011f45f0; -L_00000000011f5bd0 .part v00000000011f23d0_0, 2, 30; -L_00000000011f45f0 .concat [ 30 2 0 0], L_00000000011f5bd0, L_00000000011f6518; -L_00000000011f5c70 .functor MUXZ 32, L_00000000011f6560, L_00000000011f6350, v00000000011f0530_0, C4<>; -L_00000000011f5590 .cmp/ge 32, v00000000011f2f40_0, L_00000000011f65a8; -L_00000000011f4870 .cmp/gt 32, L_00000000011f65f0, v00000000011f2f40_0; -L_00000000011f6210 .array/port v00000000011f2d60, L_00000000011f62b0; -L_00000000011f4910 .arith/sub 32, v00000000011f2f40_0, L_00000000011f6638; -L_00000000011f54f0 .part L_00000000011f4910, 2, 30; -L_00000000011f62b0 .concat [ 30 2 0 0], L_00000000011f54f0, L_00000000011f6680; -L_00000000011f4b90 .functor MUXZ 32, L_00000000011f66c8, L_00000000011f6210, L_000000000118ce40, C4<>; -S_00000000010898f0 .scope begin, "$unm_blk_104" "$unm_blk_104" 9 21, 9 21 0, S_0000000001098ba0; - .timescale 0 0; -v00000000011f2ae0_0 .var/i "i", 31 0; -S_0000000001051900 .scope begin, "$ivl_for_loop0" "$ivl_for_loop0" 9 36, 9 36 0, S_00000000010898f0; - .timescale 0 0; -v00000000011f3440_0 .var/i "j", 31 0; - .scope S_0000000001098ba0; -T_0 ; - %fork t_1, S_00000000010898f0; - %jmp t_0; - .scope S_00000000010898f0; -t_1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000011f2ae0_0, 0, 32; -T_0.0 ; - %load/vec4 v00000000011f2ae0_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v00000000011f2ae0_0; - %store/vec4a v00000000011f42a0, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000011f2ae0_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000011f2ae0_0, 0, 32; - %jmp T_0.0; -T_0.1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000011f2ae0_0, 0, 32; -T_0.2 ; - %load/vec4 v00000000011f2ae0_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.3, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v00000000011f2ae0_0; - %store/vec4a v00000000011f2d60, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000011f2ae0_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000011f2ae0_0, 0, 32; - %jmp T_0.2; -T_0.3 ; - %vpi_call/w 9 32 "$display", "RAM: Loading RAM contents from %s", P_00000000010e4060 {0 0 0}; - %vpi_call/w 9 33 "$readmemh", P_00000000010e4060, v00000000011f2d60 {0 0 0}; - %fork t_3, S_0000000001051900; - %jmp t_2; - .scope S_0000000001051900; -t_3 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000011f3440_0, 0, 32; -T_0.4 ; - %load/vec4 v00000000011f3440_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.5, 5; - %pushi/vec4 3217031168, 0, 32; - %load/vec4 v00000000011f3440_0; - %muli 4, 0, 32; - %add; - %vpi_call/w 9 37 "$display", "byte +%h: %h", S<0,vec4,u32>, &A {1 0 0}; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000011f3440_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000011f3440_0, 0, 32; - %jmp T_0.4; -T_0.5 ; - %end; - .scope S_00000000010898f0; -t_2 %join; - %end; - .scope S_0000000001098ba0; -t_0 %join; - %end; - .thread T_0; - .scope S_0000000001098ba0; -T_1 ; - %wait E_00000000010e3760; - %load/vec4 v00000000011f43e0_0; - %nor/r; - %load/vec4 v00000000011f25e0_0; - %and; - %flag_set/vec4 8; - %jmp/0xz T_1.0, 8; - %load/vec4 v00000000011f27c0_0; - %load/vec4 v00000000011f2b80_0; - %cmp/ne; - %jmp/0xz T_1.2, 4; - %load/vec4 v00000000011f33a0_0; - %load/vec4 v00000000011f2b80_0; - %ix/load 4, 2, 0; - %flag_set/imm 4, 0; - %shiftr 4; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011f42a0, 0, 4; -T_1.2 ; -T_1.0 ; - %jmp T_1; - .thread T_1; - .scope S_00000000010a9050; -T_2 ; - %load/vec4 v00000000011f16b0_0; - %store/vec4 v00000000011f07b0_0, 0, 32; - %end; - .thread T_2; - .scope S_00000000010a9050; -T_3 ; - %wait E_00000000010e3760; - %load/vec4 v00000000011f1750_0; - %flag_set/vec4 8; - %jmp/0xz T_3.0, 8; - %pushi/vec4 1, 0, 1; - %assign/vec4 v00000000011f1110_0, 0; - %pushi/vec4 3217031168, 0, 32; - %assign/vec4 v00000000011f07b0_0, 0; - %jmp T_3.1; -T_3.0 ; - %load/vec4 v00000000011f07b0_0; - %cmpi/ne 0, 0, 32; - %jmp/0xz T_3.2, 4; - %load/vec4 v00000000011f1110_0; - %assign/vec4 v00000000011f1110_0, 0; - %load/vec4 v00000000011f1390_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_3.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_3.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_3.6, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_3.7, 6; - %jmp T_3.8; -T_3.4 ; - %load/vec4 v00000000011f07b0_0; - %assign/vec4 v00000000011f11b0_0, 0; - %load/vec4 v00000000011f11b0_0; - %addi 4, 0, 32; - %assign/vec4 v00000000011f07b0_0, 0; - %vpi_call/w 7 27 "$display", "New PC from %h to %h", v00000000011f11b0_0, v00000000011f07b0_0 {0 0 0}; - %jmp T_3.8; -T_3.5 ; - %load/vec4 v00000000011f16b0_0; - %assign/vec4 v00000000011f07b0_0, 0; - %jmp T_3.8; -T_3.6 ; - %load/vec4 v00000000011f16b0_0; - %assign/vec4 v00000000011f07b0_0, 0; - %jmp T_3.8; -T_3.7 ; - %vpi_call/w 7 36 "$display", "JUMP REGISTER" {0 0 0}; - %pushi/vec4 0, 0, 32; - %assign/vec4 v00000000011f07b0_0, 0; - %jmp T_3.8; -T_3.8 ; - %pop/vec4 1; - %jmp T_3.3; -T_3.2 ; - %load/vec4 v00000000011f07b0_0; - %cmpi/e 0, 0, 32; - %jmp/0xz T_3.9, 4; - %pushi/vec4 0, 0, 1; - %assign/vec4 v00000000011f1110_0, 0; -T_3.9 ; -T_3.3 ; -T_3.1 ; - %jmp T_3; - .thread T_3; - .scope S_00000000010a8ec0; -T_4 ; - %wait E_00000000010e85a0; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.0, 4; - %pushi/vec4 0, 0, 2; - %store/vec4 v00000000011f0710_0, 0, 2; - %vpi_call/w 6 88 "$display", "CTRLREGDSTWqweqweqwe" {0 0 0}; - %jmp T_4.1; -T_4.0 ; - %load/vec4 v00000000011f17f0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.2, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v00000000011f0710_0, 0, 2; - %vpi_call/w 6 91 "$display", "CTRLREGDSTWORKSWORKSWORKS" {0 0 0}; - %jmp T_4.3; -T_4.2 ; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 3, 0, 6; - %jmp/0xz T_4.4, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v00000000011f0710_0, 0, 2; - %vpi_call/w 6 94 "$display", "CTRLREGDSTWOR12343125435KS" {0 0 0}; - %jmp T_4.5; -T_4.4 ; - %pushi/vec4 1, 1, 2; - %store/vec4 v00000000011f0710_0, 0, 2; - %vpi_call/w 6 95 "$display", "CTRLREGDSamskdmaksldmklasmdTWORKSWORKSWORKS" {0 0 0}; -T_4.5 ; -T_4.3 ; -T_4.1 ; - %load/vec4 v00000000011f0850_0; - %load/vec4 v00000000011f17f0_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f17f0_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f17f0_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f17f0_0; - %pushi/vec4 5, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f17f0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f19d0_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f19d0_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f19d0_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f19d0_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.6, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v00000000011f20b0_0, 0, 2; - %jmp T_4.7; -T_4.6 ; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 2, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 3, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.8, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v00000000011f20b0_0, 0, 2; - %jmp T_4.9; -T_4.8 ; - %load/vec4 v00000000011f2150_0; - %cmpi/e 8, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011f2150_0; - %cmpi/e 9, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.10, 4; - %pushi/vec4 3, 0, 2; - %store/vec4 v00000000011f20b0_0, 0, 2; - %jmp T_4.11; -T_4.10 ; - %pushi/vec4 0, 0, 2; - %store/vec4 v00000000011f20b0_0, 0, 2; -T_4.11 ; -T_4.9 ; -T_4.7 ; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.12, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000011f12f0_0, 0, 1; - %pushi/vec4 1, 0, 2; - %store/vec4 v00000000011f0b70_0, 0, 2; - %jmp T_4.13; -T_4.12 ; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.14, 9; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011f12f0_0, 0, 1; - %pushi/vec4 0, 0, 2; - %store/vec4 v00000000011f0b70_0, 0, 2; - %jmp T_4.15; -T_4.14 ; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 3, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.16, 9; - %pushi/vec4 2, 0, 2; - %store/vec4 v00000000011f0b70_0, 0, 2; - %jmp T_4.17; -T_4.16 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v00000000011f12f0_0, 0, 1; -T_4.17 ; -T_4.15 ; -T_4.13 ; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.18, 9; - %pushi/vec4 0, 0, 5; - %store/vec4 v00000000011f1610_0, 0, 5; - %jmp T_4.19; -T_4.18 ; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 12, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.20, 9; - %pushi/vec4 4, 0, 5; - %store/vec4 v00000000011f1610_0, 0, 5; - %jmp T_4.21; -T_4.20 ; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 4, 0, 6; - %jmp/0xz T_4.22, 4; - %pushi/vec4 13, 0, 5; - %store/vec4 v00000000011f1610_0, 0, 5; - %jmp T_4.23; -T_4.22 ; - %load/vec4 v00000000011f17f0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f19d0_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f19d0_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.24, 8; - %pushi/vec4 17, 0, 5; - %store/vec4 v00000000011f1610_0, 0, 5; - %jmp T_4.25; -T_4.24 ; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 7, 0, 6; - %jmp/0xz T_4.26, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v00000000011f1610_0, 0, 5; - %jmp T_4.27; -T_4.26 ; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 6, 0, 6; - %jmp/0xz T_4.28, 4; - %pushi/vec4 15, 0, 5; - %store/vec4 v00000000011f1610_0, 0, 5; - %jmp T_4.29; -T_4.28 ; - %load/vec4 v00000000011f17f0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f19d0_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f19d0_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.30, 8; - %pushi/vec4 14, 0, 5; - %store/vec4 v00000000011f1610_0, 0, 5; - %jmp T_4.31; -T_4.30 ; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 5, 0, 6; - %jmp/0xz T_4.32, 4; - %pushi/vec4 18, 0, 5; - %store/vec4 v00000000011f1610_0, 0, 5; - %jmp T_4.33; -T_4.32 ; - %load/vec4 v00000000011f17f0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.34, 8; - %pushi/vec4 3, 0, 5; - %store/vec4 v00000000011f1610_0, 0, 5; - %jmp T_4.35; -T_4.34 ; - %load/vec4 v00000000011f17f0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.36, 8; - %pushi/vec4 23, 0, 5; - %store/vec4 v00000000011f1610_0, 0, 5; - %jmp T_4.37; -T_4.36 ; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.38, 4; - %pushi/vec4 0, 0, 5; - %store/vec4 v00000000011f1610_0, 0, 5; - %jmp T_4.39; -T_4.38 ; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.40, 4; - %pushi/vec4 7, 0, 5; - %store/vec4 v00000000011f1610_0, 0, 5; - %jmp T_4.41; -T_4.40 ; - %load/vec4 v00000000011f17f0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.42, 8; - %pushi/vec4 19, 0, 5; - %store/vec4 v00000000011f1610_0, 0, 5; - %jmp T_4.43; -T_4.42 ; - %load/vec4 v00000000011f17f0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.44, 8; - %pushi/vec4 2, 0, 5; - %store/vec4 v00000000011f1610_0, 0, 5; - %jmp T_4.45; -T_4.44 ; - %load/vec4 v00000000011f17f0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.46, 8; - %pushi/vec4 22, 0, 5; - %store/vec4 v00000000011f1610_0, 0, 5; - %jmp T_4.47; -T_4.46 ; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 13, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.48, 9; - %pushi/vec4 5, 0, 5; - %store/vec4 v00000000011f1610_0, 0, 5; - %jmp T_4.49; -T_4.48 ; - %load/vec4 v00000000011f17f0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.50, 8; - %pushi/vec4 7, 0, 5; - %store/vec4 v00000000011f1610_0, 0, 5; - %jmp T_4.51; -T_4.50 ; - %load/vec4 v00000000011f17f0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.52, 8; - %pushi/vec4 8, 0, 5; - %store/vec4 v00000000011f1610_0, 0, 5; - %jmp T_4.53; -T_4.52 ; - %load/vec4 v00000000011f17f0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.54, 8; - %pushi/vec4 11, 0, 5; - %store/vec4 v00000000011f1610_0, 0, 5; - %jmp T_4.55; -T_4.54 ; - %load/vec4 v00000000011f17f0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.56, 8; - %pushi/vec4 12, 0, 5; - %store/vec4 v00000000011f1610_0, 0, 5; - %jmp T_4.57; -T_4.56 ; - %load/vec4 v00000000011f17f0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.58, 8; - %pushi/vec4 9, 0, 5; - %store/vec4 v00000000011f1610_0, 0, 5; - %jmp T_4.59; -T_4.58 ; - %load/vec4 v00000000011f17f0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.60, 8; - %pushi/vec4 10, 0, 5; - %store/vec4 v00000000011f1610_0, 0, 5; - %jmp T_4.61; -T_4.60 ; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 10, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.62, 9; - %pushi/vec4 20, 0, 5; - %store/vec4 v00000000011f1610_0, 0, 5; - %jmp T_4.63; -T_4.62 ; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 11, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.64, 9; - %pushi/vec4 21, 0, 5; - %store/vec4 v00000000011f1610_0, 0, 5; - %jmp T_4.65; -T_4.64 ; - %load/vec4 v00000000011f17f0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.66, 8; - %pushi/vec4 1, 0, 5; - %store/vec4 v00000000011f1610_0, 0, 5; - %jmp T_4.67; -T_4.66 ; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 14, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.68, 9; - %pushi/vec4 6, 0, 5; - %store/vec4 v00000000011f1610_0, 0, 5; - %jmp T_4.69; -T_4.68 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v00000000011f1610_0, 0, 5; -T_4.69 ; -T_4.67 ; -T_4.65 ; -T_4.63 ; -T_4.61 ; -T_4.59 ; -T_4.57 ; -T_4.55 ; -T_4.53 ; -T_4.51 ; -T_4.49 ; -T_4.47 ; -T_4.45 ; -T_4.43 ; -T_4.41 ; -T_4.39 ; -T_4.37 ; -T_4.35 ; -T_4.33 ; -T_4.31 ; -T_4.29 ; -T_4.27 ; -T_4.25 ; -T_4.23 ; -T_4.21 ; -T_4.19 ; - %load/vec4 v00000000011f17f0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.70, 8; - %load/vec4 v00000000011f1930_0; - %parti/s 5, 6, 4; - %store/vec4 v00000000011f1c50_0, 0, 5; - %jmp T_4.71; -T_4.70 ; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.72, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v00000000011f1c50_0, 0, 5; - %jmp T_4.73; -T_4.72 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v00000000011f1c50_0, 0, 5; -T_4.73 ; -T_4.71 ; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 40, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.74, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000011f0670_0, 0, 1; - %jmp T_4.75; -T_4.74 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011f0670_0, 0, 1; -T_4.75 ; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.76, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000011f1250_0, 0, 1; - %jmp T_4.77; -T_4.76 ; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 4, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 7, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 6, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 5, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %load/vec4 v00000000011f17f0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f19d0_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f19d0_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f19d0_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f19d0_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %flag_or 8, 9; - %jmp/0xz T_4.78, 8; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011f1250_0, 0, 1; - %jmp T_4.79; -T_4.78 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v00000000011f1250_0, 0, 1; -T_4.79 ; -T_4.77 ; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011f17f0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011f2150_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.80, 9; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000011f0c10_0, 0, 1; - %jmp T_4.81; -T_4.80 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011f0c10_0, 0, 1; -T_4.81 ; - %jmp T_4; - .thread T_4, $push; - .scope S_00000000010a91e0; -T_5 ; - %fork t_5, S_0000000001098900; - %jmp t_4; - .scope S_0000000001098900; -t_5 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000011f1cf0_0, 0, 32; -T_5.0 ; - %load/vec4 v00000000011f1cf0_0; - %cmpi/s 32, 0, 32; - %jmp/0xz T_5.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v00000000011f1cf0_0; - %store/vec4a v00000000011f1b10, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000011f1cf0_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000011f1cf0_0, 0, 32; - %jmp T_5.0; -T_5.1 ; - %end; - .scope S_00000000010a91e0; -t_4 %join; - %end; - .thread T_5; - .scope S_00000000010a91e0; -T_6 ; -Ewait_0 .event/or E_00000000010e37e0, E_0x0; - %wait Ewait_0; - %load/vec4 v00000000011f1e30_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v00000000011f1b10, 4; - %store/vec4 v00000000011f1d90_0, 0, 32; - %load/vec4 v00000000011f1bb0_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v00000000011f1b10, 4; - %store/vec4 v00000000011f0a30_0, 0, 32; - %jmp T_6; - .thread T_6, $push; - .scope S_00000000010a91e0; -T_7 ; - %wait E_00000000010e3fe0; - %load/vec4 v00000000011f2010_0; - %cmpi/e 0, 0, 5; - %jmp/0xz T_7.0, 4; - %jmp T_7.1; -T_7.0 ; - %load/vec4 v00000000011f0cb0_0; - %flag_set/vec4 8; - %jmp/0xz T_7.2, 8; - %load/vec4 v00000000011f0990_0; - %dup/vec4; - %pushi/vec4 32, 0, 6; - %cmp/u; - %jmp/1 T_7.4, 6; - %dup/vec4; - %pushi/vec4 36, 0, 6; - %cmp/u; - %jmp/1 T_7.5, 6; - %dup/vec4; - %pushi/vec4 33, 0, 6; - %cmp/u; - %jmp/1 T_7.6, 6; - %dup/vec4; - %pushi/vec4 37, 0, 6; - %cmp/u; - %jmp/1 T_7.7, 6; - %dup/vec4; - %pushi/vec4 34, 0, 6; - %cmp/u; - %jmp/1 T_7.8, 6; - %dup/vec4; - %pushi/vec4 38, 0, 6; - %cmp/u; - %jmp/1 T_7.9, 6; - %load/vec4 v00000000011f1f70_0; - %load/vec4 v00000000011f2010_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011f1b10, 0, 4; - %jmp T_7.11; -T_7.4 ; - %load/vec4 v00000000011f1d90_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.12, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.13, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.14, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.15, 6; - %jmp T_7.16; -T_7.12 ; - %load/vec4 v00000000011f1f70_0; - %parti/s 1, 7, 4; - %replicate 24; - %load/vec4 v00000000011f1f70_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000011f2010_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011f1b10, 0, 4; - %jmp T_7.16; -T_7.13 ; - %load/vec4 v00000000011f1f70_0; - %parti/s 1, 15, 5; - %replicate 24; - %load/vec4 v00000000011f1f70_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000011f2010_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011f1b10, 0, 4; - %jmp T_7.16; -T_7.14 ; - %load/vec4 v00000000011f1f70_0; - %parti/s 1, 23, 6; - %replicate 24; - %load/vec4 v00000000011f1f70_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000011f2010_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011f1b10, 0, 4; - %jmp T_7.16; -T_7.15 ; - %load/vec4 v00000000011f1f70_0; - %parti/s 1, 31, 6; - %replicate 24; - %load/vec4 v00000000011f1f70_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000011f2010_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011f1b10, 0, 4; - %jmp T_7.16; -T_7.16 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.5 ; - %load/vec4 v00000000011f1d90_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.17, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.18, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.19, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.20, 6; - %jmp T_7.21; -T_7.17 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000011f1f70_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000011f2010_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011f1b10, 0, 4; - %jmp T_7.21; -T_7.18 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000011f1f70_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000011f2010_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011f1b10, 0, 4; - %jmp T_7.21; -T_7.19 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000011f1f70_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000011f2010_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011f1b10, 0, 4; - %jmp T_7.21; -T_7.20 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000011f1f70_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000011f2010_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011f1b10, 0, 4; - %jmp T_7.21; -T_7.21 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.6 ; - %load/vec4 v00000000011f1d90_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.22, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.23, 6; - %jmp T_7.24; -T_7.22 ; - %load/vec4 v00000000011f1f70_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v00000000011f1f70_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000011f2010_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011f1b10, 0, 4; - %jmp T_7.24; -T_7.23 ; - %load/vec4 v00000000011f1f70_0; - %parti/s 1, 31, 6; - %replicate 16; - %load/vec4 v00000000011f1f70_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000011f2010_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011f1b10, 0, 4; - %jmp T_7.24; -T_7.24 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.7 ; - %load/vec4 v00000000011f1d90_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.25, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.26, 6; - %jmp T_7.27; -T_7.25 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v00000000011f1f70_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000011f2010_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011f1b10, 0, 4; - %jmp T_7.27; -T_7.26 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v00000000011f1f70_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000011f2010_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011f1b10, 0, 4; - %jmp T_7.27; -T_7.27 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.8 ; - %load/vec4 v00000000011f1d90_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.28, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.29, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.30, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.31, 6; - %jmp T_7.32; -T_7.28 ; - %load/vec4 v00000000011f1f70_0; - %parti/s 8, 0, 2; - %load/vec4 v00000000011f2010_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 24, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v00000000011f1b10, 4, 5; - %jmp T_7.32; -T_7.29 ; - %load/vec4 v00000000011f1f70_0; - %parti/s 16, 0, 2; - %load/vec4 v00000000011f2010_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 16, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v00000000011f1b10, 4, 5; - %jmp T_7.32; -T_7.30 ; - %load/vec4 v00000000011f1f70_0; - %parti/s 24, 0, 2; - %load/vec4 v00000000011f2010_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 8, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v00000000011f1b10, 4, 5; - %jmp T_7.32; -T_7.31 ; - %load/vec4 v00000000011f1f70_0; - %load/vec4 v00000000011f2010_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011f1b10, 0, 4; - %jmp T_7.32; -T_7.32 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.9 ; - %load/vec4 v00000000011f1d90_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.33, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.34, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.35, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.36, 6; - %jmp T_7.37; -T_7.33 ; - %load/vec4 v00000000011f1f70_0; - %load/vec4 v00000000011f2010_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011f1b10, 0, 4; - %jmp T_7.37; -T_7.34 ; - %load/vec4 v00000000011f1f70_0; - %parti/s 24, 8, 5; - %load/vec4 v00000000011f2010_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011f1b10, 0, 4; - %jmp T_7.37; -T_7.35 ; - %load/vec4 v00000000011f1f70_0; - %parti/s 16, 16, 6; - %load/vec4 v00000000011f2010_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011f1b10, 0, 4; - %jmp T_7.37; -T_7.36 ; - %load/vec4 v00000000011f1f70_0; - %parti/s 8, 24, 6; - %load/vec4 v00000000011f2010_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011f1b10, 0, 4; - %jmp T_7.37; -T_7.37 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.11 ; - %pop/vec4 1; -T_7.2 ; -T_7.1 ; - %jmp T_7; - .thread T_7; - .scope S_00000000010ed9d0; -T_8 ; -Ewait_1 .event/or E_00000000010ea960, E_0x0; - %wait Ewait_1; - %load/vec4 v00000000011f1430_0; - %dup/vec4; - %pushi/vec4 0, 0, 5; - %cmp/u; - %jmp/1 T_8.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 5; - %cmp/u; - %jmp/1 T_8.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 5; - %cmp/u; - %jmp/1 T_8.2, 6; - %dup/vec4; - %pushi/vec4 3, 0, 5; - %cmp/u; - %jmp/1 T_8.3, 6; - %dup/vec4; - %pushi/vec4 4, 0, 5; - %cmp/u; - %jmp/1 T_8.4, 6; - %dup/vec4; - %pushi/vec4 5, 0, 5; - %cmp/u; - %jmp/1 T_8.5, 6; - %dup/vec4; - %pushi/vec4 6, 0, 5; - %cmp/u; - %jmp/1 T_8.6, 6; - %dup/vec4; - %pushi/vec4 7, 0, 5; - %cmp/u; - %jmp/1 T_8.7, 6; - %dup/vec4; - %pushi/vec4 8, 0, 5; - %cmp/u; - %jmp/1 T_8.8, 6; - %dup/vec4; - %pushi/vec4 9, 0, 5; - %cmp/u; - %jmp/1 T_8.9, 6; - %dup/vec4; - %pushi/vec4 10, 0, 5; - %cmp/u; - %jmp/1 T_8.10, 6; - %dup/vec4; - %pushi/vec4 11, 0, 5; - %cmp/u; - %jmp/1 T_8.11, 6; - %dup/vec4; - %pushi/vec4 12, 0, 5; - %cmp/u; - %jmp/1 T_8.12, 6; - %dup/vec4; - %pushi/vec4 13, 0, 5; - %cmp/u; - %jmp/1 T_8.13, 6; - %dup/vec4; - %pushi/vec4 14, 0, 5; - %cmp/u; - %jmp/1 T_8.14, 6; - %dup/vec4; - %pushi/vec4 15, 0, 5; - %cmp/u; - %jmp/1 T_8.15, 6; - %dup/vec4; - %pushi/vec4 16, 0, 5; - %cmp/u; - %jmp/1 T_8.16, 6; - %dup/vec4; - %pushi/vec4 17, 0, 5; - %cmp/u; - %jmp/1 T_8.17, 6; - %dup/vec4; - %pushi/vec4 18, 0, 5; - %cmp/u; - %jmp/1 T_8.18, 6; - %dup/vec4; - %pushi/vec4 19, 0, 5; - %cmp/u; - %jmp/1 T_8.19, 6; - %dup/vec4; - %pushi/vec4 20, 0, 5; - %cmp/u; - %jmp/1 T_8.20, 6; - %dup/vec4; - %pushi/vec4 21, 0, 5; - %cmp/u; - %jmp/1 T_8.21, 6; - %dup/vec4; - %pushi/vec4 22, 0, 5; - %cmp/u; - %jmp/1 T_8.22, 6; - %dup/vec4; - %pushi/vec4 23, 0, 5; - %cmp/u; - %jmp/1 T_8.23, 6; - %jmp T_8.24; -T_8.0 ; - %load/vec4 v0000000001077920_0; - %load/vec4 v00000000011f1890_0; - %add; - %store/vec4 v00000000011f1570_0, 0, 32; - %jmp T_8.24; -T_8.1 ; - %load/vec4 v0000000001077920_0; - %load/vec4 v00000000011f1890_0; - %sub; - %store/vec4 v00000000011f1570_0, 0, 32; - %jmp T_8.24; -T_8.2 ; - %load/vec4 v0000000001077920_0; - %load/vec4 v00000000011f1890_0; - %mul; - %store/vec4 v00000000011f1570_0, 0, 32; - %jmp T_8.24; -T_8.3 ; - %load/vec4 v0000000001077920_0; - %load/vec4 v00000000011f1890_0; - %div/s; - %store/vec4 v00000000011f1570_0, 0, 32; - %jmp T_8.24; -T_8.4 ; - %load/vec4 v0000000001077920_0; - %load/vec4 v00000000011f1890_0; - %and; - %store/vec4 v00000000011f1570_0, 0, 32; - %jmp T_8.24; -T_8.5 ; - %load/vec4 v0000000001077920_0; - %load/vec4 v00000000011f1890_0; - %or; - %store/vec4 v00000000011f1570_0, 0, 32; - %jmp T_8.24; -T_8.6 ; - %load/vec4 v0000000001077920_0; - %load/vec4 v00000000011f1890_0; - %xor; - %store/vec4 v00000000011f1570_0, 0, 32; - %jmp T_8.24; -T_8.7 ; - %load/vec4 v00000000011f1890_0; - %ix/getv 4, v00000000011f05d0_0; - %shiftl 4; - %store/vec4 v00000000011f1570_0, 0, 32; - %jmp T_8.24; -T_8.8 ; - %load/vec4 v00000000011f1890_0; - %ix/getv 4, v0000000001077920_0; - %shiftl 4; - %store/vec4 v00000000011f1570_0, 0, 32; - %jmp T_8.24; -T_8.9 ; - %load/vec4 v00000000011f1890_0; - %ix/getv 4, v00000000011f05d0_0; - %shiftr 4; - %store/vec4 v00000000011f1570_0, 0, 32; - %jmp T_8.24; -T_8.10 ; - %load/vec4 v00000000011f1890_0; - %ix/getv 4, v0000000001077920_0; - %shiftr 4; - %store/vec4 v00000000011f1570_0, 0, 32; - %jmp T_8.24; -T_8.11 ; - %load/vec4 v00000000011f1890_0; - %ix/getv 4, v00000000011f05d0_0; - %shiftr 4; - %store/vec4 v00000000011f1570_0, 0, 32; - %jmp T_8.24; -T_8.12 ; - %load/vec4 v00000000011f1890_0; - %ix/getv 4, v0000000001077920_0; - %shiftr 4; - %store/vec4 v00000000011f1570_0, 0, 32; - %jmp T_8.24; -T_8.13 ; - %load/vec4 v0000000001077920_0; - %load/vec4 v00000000011f1890_0; - %cmp/e; - %jmp/0xz T_8.25, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001076b60_0, 0, 1; - %jmp T_8.26; -T_8.25 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001076b60_0, 0, 1; -T_8.26 ; - %jmp T_8.24; -T_8.14 ; - %load/vec4 v0000000001077920_0; - %load/vec4 v00000000011f1890_0; - %cmp/s; - %jmp/0xz T_8.27, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001076b60_0, 0, 1; - %jmp T_8.28; -T_8.27 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001076b60_0, 0, 1; -T_8.28 ; - %jmp T_8.24; -T_8.15 ; - %load/vec4 v0000000001077920_0; - %load/vec4 v00000000011f1890_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.29, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001076b60_0, 0, 1; - %jmp T_8.30; -T_8.29 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001076b60_0, 0, 1; -T_8.30 ; - %jmp T_8.24; -T_8.16 ; - %load/vec4 v00000000011f1890_0; - %load/vec4 v0000000001077920_0; - %cmp/s; - %jmp/0xz T_8.31, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001076b60_0, 0, 1; - %jmp T_8.32; -T_8.31 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001076b60_0, 0, 1; -T_8.32 ; - %jmp T_8.24; -T_8.17 ; - %load/vec4 v00000000011f1890_0; - %load/vec4 v0000000001077920_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.33, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001076b60_0, 0, 1; - %jmp T_8.34; -T_8.33 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001076b60_0, 0, 1; -T_8.34 ; - %jmp T_8.24; -T_8.18 ; - %load/vec4 v0000000001077920_0; - %load/vec4 v00000000011f1890_0; - %cmp/ne; - %jmp/0xz T_8.35, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001076b60_0, 0, 1; - %jmp T_8.36; -T_8.35 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001076b60_0, 0, 1; -T_8.36 ; - %jmp T_8.24; -T_8.19 ; - %load/vec4 v0000000001077920_0; - %store/vec4 v00000000011f1570_0, 0, 32; - %jmp T_8.24; -T_8.20 ; - %load/vec4 v0000000001077920_0; - %load/vec4 v00000000011f1890_0; - %cmp/s; - %jmp/0xz T_8.37, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v00000000011f1570_0, 0, 32; -T_8.37 ; - %jmp T_8.24; -T_8.21 ; - %load/vec4 v0000000001077920_0; - %load/vec4 v00000000011f1890_0; - %cmp/u; - %jmp/0xz T_8.39, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v00000000011f1570_0, 0, 32; -T_8.39 ; - %jmp T_8.24; -T_8.22 ; - %load/vec4 v0000000001077920_0; - %load/vec4 v00000000011f1890_0; - %mul; - %store/vec4 v00000000011f1570_0, 0, 32; - %jmp T_8.24; -T_8.23 ; - %load/vec4 v0000000001077920_0; - %load/vec4 v00000000011f1890_0; - %div; - %store/vec4 v00000000011f1570_0, 0, 32; - %jmp T_8.24; -T_8.24 ; - %pop/vec4 1; - %jmp T_8; - .thread T_8, $push; - .scope S_00000000010ed840; -T_9 ; - %pushi/vec4 3217031168, 0, 32; - %store/vec4 v00000000011f3f80_0, 0, 32; - %end; - .thread T_9, $init; - .scope S_00000000010ed840; -T_10 ; -Ewait_2 .event/or E_00000000010e8be0, E_0x0; - %wait Ewait_2; - %load/vec4 v00000000011f1070_0; - %store/vec4 v00000000011f2f40_0, 0, 32; - %load/vec4 v00000000011f2900_0; - %store/vec4 v00000000011f23d0_0, 0, 32; - %load/vec4 v00000000011f2fe0_0; - %store/vec4 v00000000011f0d50_0, 0, 1; - %load/vec4 v00000000011f2860_0; - %store/vec4 v00000000011f0530_0, 0, 1; - %load/vec4 v00000000011f4340_0; - %store/vec4 v00000000011f0ad0_0, 0, 32; - %jmp T_10; - .thread T_10, $push; - .scope S_00000000010ed840; -T_11 ; - %wait E_00000000010e3760; - %load/vec4 v00000000011f2720_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.2, 6; - %jmp T_11.3; -T_11.0 ; - %load/vec4 v00000000011f3a80_0; - %parti/s 5, 16, 6; - %assign/vec4 v00000000011f2ea0_0, 0; - %jmp T_11.3; -T_11.1 ; - %load/vec4 v00000000011f3a80_0; - %parti/s 5, 11, 5; - %assign/vec4 v00000000011f2ea0_0, 0; - %jmp T_11.3; -T_11.2 ; - %pushi/vec4 31, 0, 5; - %assign/vec4 v00000000011f2ea0_0, 0; - %jmp T_11.3; -T_11.3 ; - %pop/vec4 1; - %load/vec4 v00000000011f36c0_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.6, 6; - %jmp T_11.7; -T_11.4 ; - %load/vec4 v00000000011f2900_0; - %assign/vec4 v00000000011f34e0_0, 0; - %jmp T_11.7; -T_11.5 ; - %load/vec4 v00000000011f0e90_0; - %assign/vec4 v00000000011f34e0_0, 0; - %jmp T_11.7; -T_11.6 ; - %load/vec4 v00000000011f3f80_0; - %addi 8, 0, 32; - %assign/vec4 v00000000011f34e0_0, 0; - %jmp T_11.7; -T_11.7 ; - %pop/vec4 1; - %load/vec4 v00000000011f3bc0_0; - %dup/vec4; - %pushi/vec4 1, 0, 1; - %cmp/u; - %jmp/1 T_11.8, 6; - %dup/vec4; - %pushi/vec4 0, 0, 1; - %cmp/u; - %jmp/1 T_11.9, 6; - %jmp T_11.10; -T_11.8 ; - %load/vec4 v00000000011f3a80_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v00000000011f3a80_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %assign/vec4 v00000000011f0df0_0, 0; - %jmp T_11.10; -T_11.9 ; - %load/vec4 v00000000011f4340_0; - %assign/vec4 v00000000011f0df0_0, 0; - %jmp T_11.10; -T_11.10 ; - %pop/vec4 1; - %jmp T_11; - .thread T_11; - .scope S_00000000010dd9a0; -T_12 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011f5f90_0, 0, 1; - %pushi/vec4 100, 0, 32; -T_12.0 %dup/vec4; - %pushi/vec4 0, 0, 32; - %cmp/s; - %jmp/1xz T_12.1, 5; - %jmp/1 T_12.1, 4; - %pushi/vec4 1, 0, 32; - %sub; - %delay 10, 0; - %load/vec4 v00000000011f5f90_0; - %nor/r; - %store/vec4 v00000000011f5f90_0, 0, 1; - %delay 10, 0; - %load/vec4 v00000000011f5f90_0; - %nor/r; - %store/vec4 v00000000011f5f90_0, 0, 1; - %jmp T_12.0; -T_12.1 ; - %pop/vec4 1; - %vpi_call/w 3 45 "$fatal", 32'sb00000000000000000000000000000010, "Simulation did not finish within %d cycles.", P_00000000010d3818 {0 0 0}; - %end; - .thread T_12; - .scope S_00000000010dd9a0; -T_13 ; - %vpi_call/w 3 49 "$display", "Initial Reset 0" {0 0 0}; - %pushi/vec4 0, 0, 1; - %assign/vec4 v00000000011f47d0_0, 0; - %vpi_call/w 3 53 "$display", "Initial Reset 1" {0 0 0}; - %wait E_00000000010e3760; - %pushi/vec4 1, 0, 1; - %assign/vec4 v00000000011f47d0_0, 0; - %vpi_call/w 3 57 "$display", "Initial Reset 0: Start Program" {0 0 0}; - %wait E_00000000010e3760; - %pushi/vec4 0, 0, 1; - %assign/vec4 v00000000011f47d0_0, 0; - %wait E_00000000010e3760; - %load/vec4 v00000000011f4e10_0; - %pad/u 32; - %cmpi/e 1, 0, 32; - %jmp/0xz T_13.0, 4; - %jmp T_13.1; -T_13.0 ; - %vpi_call/w 3 63 "$display", "TB: CPU did not set active=1 after reset." {0 0 0}; -T_13.1 ; -T_13.2 ; - %load/vec4 v00000000011f4e10_0; - %flag_set/vec4 8; - %jmp/0xz T_13.3, 8; - %wait E_00000000010e3760; - %jmp T_13.2; -T_13.3 ; - %vpi_call/w 3 71 "$display", "TB: finished; active=0" {0 0 0}; - %vpi_call/w 3 72 "$display", "Output:" {0 0 0}; - %vpi_call/w 3 73 "$display", "%d", v00000000011f5450_0 {0 0 0}; - %vpi_call/w 3 74 "$finish" {0 0 0}; - %end; - .thread T_13; -# The file index is used to find the file name in the following table. -:file_names 10; - "N/A"; - ""; - "-"; - "testbench/mips_cpu_harvard_tb.v"; - "rtl/mips_cpu_harvard.v"; - "rtl/mips_cpu_alu.v"; - "rtl/mips_cpu_control.v"; - "rtl/mips_cpu_pc.v"; - "rtl/mips_cpu_regfile.v"; - "rtl/mips_cpu_memory.v"; diff --git a/exec/mips_cpu_harvard_tb_o b/exec/mips_cpu_harvard_tb_o deleted file mode 100644 index f2a4d7a..0000000 --- a/exec/mips_cpu_harvard_tb_o +++ /dev/null @@ -1,2738 +0,0 @@ -#! /usr/local/iverilog/bin/vvp -:ivl_version "11.0 (devel)"; -:ivl_delay_selection "TYPICAL"; -:vpi_time_precision + 0; -:vpi_module "C:\iverilog\lib\ivl\system.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_sys.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_textio.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2005_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\va_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2009.vpi"; -S_00000000010e0110 .scope package, "$unit" "$unit" 2 1; - .timescale 0 0; -S_000000000110ada0 .scope module, "mips_cpu_harvard_tb" "mips_cpu_harvard_tb" 3 1; - .timescale 0 0; -P_00000000010d9790 .param/str "RAM_INIT_FILE" 0 3 3, "inputs/o.txt"; -P_00000000010d97c8 .param/l "TIMEOUT_CYCLES" 0 3 4, +C4<00000000000000000000000001100100>; -v0000000001165b00_0 .net "active", 0 0, v0000000001108d20_0; 1 drivers -v0000000001166460_0 .var "clk", 0 0; -v0000000001165060_0 .var "clk_enable", 0 0; -v0000000001166820_0 .net "data_address", 31 0, v0000000001109860_0; 1 drivers -v0000000001165ce0_0 .net "data_read", 0 0, v0000000001109900_0; 1 drivers -v0000000001164980_0 .net "data_readdata", 31 0, L_00000000011659c0; 1 drivers -v00000000011666e0_0 .net "data_write", 0 0, v0000000001109a40_0; 1 drivers -v0000000001166280_0 .net "data_writedata", 31 0, v0000000001109c20_0; 1 drivers -v0000000001165f60_0 .net "instr_address", 31 0, v0000000001162ab0_0; 1 drivers -v0000000001165100_0 .net "instr_readdata", 31 0, L_0000000001165600; 1 drivers -v0000000001165560_0 .net "register_v0", 31 0, L_00000000010ee000; 1 drivers -v0000000001166000_0 .var "reset", 0 0; -S_000000000110af30 .scope module, "cpuInst" "mips_cpu_harvard" 3 19, 4 1 0, S_000000000110ada0; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "reset"; - .port_info 2 /OUTPUT 1 "active"; - .port_info 3 /OUTPUT 32 "register_v0"; - .port_info 4 /INPUT 1 "clk_enable"; - .port_info 5 /OUTPUT 32 "instr_address"; - .port_info 6 /INPUT 32 "instr_readdata"; - .port_info 7 /OUTPUT 32 "data_address"; - .port_info 8 /OUTPUT 1 "data_write"; - .port_info 9 /OUTPUT 1 "data_read"; - .port_info 10 /OUTPUT 32 "data_writedata"; - .port_info 11 /INPUT 32 "data_readdata"; -v0000000001109720_0 .net "active", 0 0, v0000000001108d20_0; alias, 1 drivers -v00000000011094a0_0 .net "clk", 0 0, v0000000001166460_0; 1 drivers -v00000000011097c0_0 .net "clk_enable", 0 0, v0000000001165060_0; 1 drivers -v0000000001109860_0 .var "data_address", 31 0; -v0000000001109900_0 .var "data_read", 0 0; -v00000000011099a0_0 .net "data_readdata", 31 0, L_00000000011659c0; alias, 1 drivers -v0000000001109a40_0 .var "data_write", 0 0; -v0000000001109c20_0 .var "data_writedata", 31 0; -v00000000010ce2e0_0 .var "in_B", 31 0; -v0000000001162dd0_0 .net "in_opcode", 5 0, L_0000000001166320; 1 drivers -v0000000001163af0_0 .net "in_pc_in", 31 0, v0000000001109fe0_0; 1 drivers -v0000000001162b50_0 .net "in_readreg1", 4 0, L_0000000001165380; 1 drivers -v0000000001164770_0 .net "in_readreg2", 4 0, L_0000000001165ba0; 1 drivers -v0000000001164310_0 .var "in_writedata", 31 0; -v00000000011641d0_0 .var "in_writereg", 4 0; -v0000000001162ab0_0 .var "instr_address", 31 0; -v0000000001162d30_0 .net "instr_readdata", 31 0, L_0000000001165600; alias, 1 drivers -v0000000001163a50_0 .net "out_ALUCond", 0 0, v000000000110a1c0_0; 1 drivers -v00000000011639b0_0 .net "out_ALUOp", 4 0, v0000000001108b40_0; 1 drivers -v0000000001162bf0_0 .net "out_ALURes", 31 0, v0000000001109ae0_0; 1 drivers -v0000000001164270_0 .net "out_ALUSrc", 0 0, v00000000011090e0_0; 1 drivers -v00000000011643b0_0 .net "out_MemRead", 0 0, v000000000110a4e0_0; 1 drivers -v0000000001162c90_0 .net "out_MemWrite", 0 0, v0000000001109040_0; 1 drivers -v0000000001162e70_0 .net "out_MemtoReg", 1 0, v000000000110a800_0; 1 drivers -v00000000011644f0_0 .net "out_PC", 1 0, v0000000001109cc0_0; 1 drivers -v0000000001162a10_0 .net "out_RegDst", 1 0, v0000000001108960_0; 1 drivers -v0000000001163410_0 .net "out_RegWrite", 0 0, v000000000110a6c0_0; 1 drivers -v0000000001164090_0 .var "out_pc_out", 31 0; -v0000000001162f10_0 .net "out_readdata1", 31 0, v0000000001108f00_0; 1 drivers -v00000000011634b0_0 .net "out_readdata2", 31 0, v000000000110a120_0; 1 drivers -v00000000011630f0_0 .net "out_shamt", 4 0, v0000000001109e00_0; 1 drivers -v0000000001164590_0 .net "register_v0", 31 0, L_00000000010ee000; alias, 1 drivers -v0000000001162fb0_0 .net "reset", 0 0, v0000000001166000_0; 1 drivers -E_00000000010e5c00/0 .event edge, v0000000001108960_0, v0000000001109180_0, v0000000001109180_0, v000000000110a800_0; -E_00000000010e5c00/1 .event edge, v0000000001109ae0_0, v00000000011099a0_0, v0000000001109220_0, v00000000011090e0_0; -E_00000000010e5c00/2 .event edge, v0000000001109180_0, v0000000001109180_0, v000000000110a120_0; -E_00000000010e5c00 .event/or E_00000000010e5c00/0, E_00000000010e5c00/1, E_00000000010e5c00/2; -E_00000000010e61c0/0 .event edge, v0000000001109fe0_0, v0000000001109ae0_0, v0000000001109040_0, v000000000110a4e0_0; -E_00000000010e61c0/1 .event edge, v000000000110a120_0; -E_00000000010e61c0 .event/or E_00000000010e61c0/0, E_00000000010e61c0/1; -L_0000000001165380 .part L_0000000001165600, 21, 5; -L_0000000001165ba0 .part L_0000000001165600, 16, 5; -L_0000000001166320 .part L_0000000001165600, 26, 6; -S_00000000010a5e30 .scope module, "alu" "mips_cpu_alu" 4 121, 5 1 0, S_000000000110af30; - .timescale 0 0; - .port_info 0 /INPUT 32 "A"; - .port_info 1 /INPUT 32 "B"; - .port_info 2 /INPUT 5 "ALUOp"; - .port_info 3 /INPUT 5 "shamt"; - .port_info 4 /OUTPUT 1 "ALUCond"; - .port_info 5 /OUTPUT 32 "ALURes"; -enum0000000000febd00 .enum4 (5) - "ADD" 5'b00000, - "SUB" 5'b00001, - "MUL" 5'b00010, - "DIV" 5'b00011, - "AND" 5'b00100, - "OR" 5'b00101, - "XOR" 5'b00110, - "SLL" 5'b00111, - "SLLV" 5'b01000, - "SRL" 5'b01001, - "SRLV" 5'b01010, - "SRA" 5'b01011, - "SRAV" 5'b01100, - "EQ" 5'b01101, - "LES" 5'b01110, - "LEQ" 5'b01111, - "GRT" 5'b10000, - "GEQ" 5'b10001, - "NEQ" 5'b10010, - "PAS" 5'b10011, - "SLT" 5'b10100, - "SLTU" 5'b10101, - "MULU" 5'b10110, - "DIVU" 5'b10111 - ; -L_00000000010ee0e0 .functor BUFZ 5, v0000000001108b40_0, C4<00000>, C4<00000>, C4<00000>; -v000000000110a580_0 .net "A", 31 0, v0000000001108f00_0; alias, 1 drivers -v000000000110a1c0_0 .var "ALUCond", 0 0; -v0000000001108aa0_0 .net "ALUOp", 4 0, v0000000001108b40_0; alias, 1 drivers -v0000000001108fa0_0 .net "ALUOps", 4 0, L_00000000010ee0e0; 1 drivers -v0000000001109ae0_0 .var/s "ALURes", 31 0; -v0000000001108be0_0 .net "B", 31 0, v00000000010ce2e0_0; 1 drivers -v000000000110a260_0 .net "shamt", 4 0, v0000000001109e00_0; alias, 1 drivers -E_00000000010e7f00 .event edge, v0000000001108fa0_0, v000000000110a580_0, v0000000001108be0_0, v000000000110a260_0; -S_00000000010a5fc0 .scope module, "control" "mips_cpu_control" 4 90, 6 1 0, S_000000000110af30; - .timescale 0 0; - .port_info 0 /INPUT 32 "Instr"; - .port_info 1 /INPUT 1 "ALUCond"; - .port_info 2 /OUTPUT 2 "CtrlRegDst"; - .port_info 3 /OUTPUT 2 "CtrlPC"; - .port_info 4 /OUTPUT 1 "CtrlMemRead"; - .port_info 5 /OUTPUT 2 "CtrlMemtoReg"; - .port_info 6 /OUTPUT 5 "CtrlALUOp"; - .port_info 7 /OUTPUT 5 "Ctrlshamt"; - .port_info 8 /OUTPUT 1 "CtrlMemWrite"; - .port_info 9 /OUTPUT 1 "CtrlALUSrc"; - .port_info 10 /OUTPUT 1 "CtrlRegWrite"; -enum0000000000fe9270 .enum4 (6) - "SLL" 6'b000000, - "SRL" 6'b000010, - "SRA" 6'b000011, - "SLLV" 6'b000100, - "SRLV" 6'b000110, - "SRAV" 6'b000111, - "JR" 6'b001000, - "JALR" 6'b001001, - "MTHI" 6'b010001, - "MTLO" 6'b010011, - "MULT" 6'b011000, - "MULTU" 6'b011001, - "DIV" 6'b011010, - "DIVU" 6'b011011, - "ADDU" 6'b100001, - "SUBU" 6'b100011, - "AND" 6'b100100, - "OR" 6'b100101, - "XOR" 6'b100110, - "SLT" 6'b101010, - "SLTU" 6'b101011 - ; -enum0000000000feb8a0 .enum4 (6) - "SPECIAL" 6'b000000, - "REGIMM" 6'b000001, - "J" 6'b000010, - "JAL" 6'b000011, - "BEQ" 6'b000100, - "BNE" 6'b000101, - "BLEZ" 6'b000110, - "BGTZ" 6'b000111, - "ADDI" 6'b001000, - "ADDIU" 6'b001001, - "SLTI" 6'b001010, - "SLTIU" 6'b001011, - "ANDI" 6'b001100, - "ORI" 6'b001101, - "XORI" 6'b001110, - "LUI" 6'b001111, - "LB" 6'b100000, - "LH" 6'b100001, - "LWL" 6'b100010, - "LW" 6'b100011, - "LBU" 6'b100100, - "LHU" 6'b100101, - "LWR" 6'b100110, - "SB" 6'b101000, - "SH" 6'b101001, - "SW" 6'b101011 - ; -enum0000000000feb950 .enum4 (5) - "BLTZ" 5'b00000, - "BGEZ" 5'b00001, - "BLTZAL" 5'b10000, - "BGEZAL" 5'b10001 - ; -v0000000001109680_0 .net "ALUCond", 0 0, v000000000110a1c0_0; alias, 1 drivers -v0000000001108b40_0 .var "CtrlALUOp", 4 0; -v00000000011090e0_0 .var "CtrlALUSrc", 0 0; -v000000000110a4e0_0 .var "CtrlMemRead", 0 0; -v0000000001109040_0 .var "CtrlMemWrite", 0 0; -v000000000110a800_0 .var "CtrlMemtoReg", 1 0; -v0000000001109cc0_0 .var "CtrlPC", 1 0; -v0000000001108960_0 .var "CtrlRegDst", 1 0; -v000000000110a6c0_0 .var "CtrlRegWrite", 0 0; -v0000000001109e00_0 .var "Ctrlshamt", 4 0; -v0000000001109180_0 .net "Instr", 31 0, L_0000000001165600; alias, 1 drivers -v0000000001108c80_0 .net "funct", 5 0, L_0000000001164ac0; 1 drivers -v0000000001109540_0 .net "op", 5 0, L_0000000001166500; 1 drivers -v0000000001109f40_0 .net "rt", 4 0, L_0000000001164a20; 1 drivers -E_00000000010e7040/0 .event edge, v0000000001109540_0, v0000000001108c80_0, v000000000110a1c0_0, v0000000001109f40_0; -E_00000000010e7040/1 .event edge, v0000000001109180_0; -E_00000000010e7040 .event/or E_00000000010e7040/0, E_00000000010e7040/1; -L_0000000001166500 .part L_0000000001165600, 26, 6; -L_0000000001164ac0 .part L_0000000001165600, 0, 6; -L_0000000001164a20 .part L_0000000001165600, 16, 5; -S_00000000010a6150 .scope module, "pc" "pc" 4 79, 7 1 0, S_000000000110af30; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "rst"; - .port_info 2 /INPUT 2 "pc_ctrl"; - .port_info 3 /INPUT 32 "pc_in"; - .port_info 4 /INPUT 5 "rs"; - .port_info 5 /OUTPUT 32 "pc_out"; - .port_info 6 /OUTPUT 1 "active"; -v0000000001108d20_0 .var "active", 0 0; -v000000000110a620_0 .net "clk", 0 0, v0000000001166460_0; alias, 1 drivers -v0000000001109d60_0 .net "pc_ctrl", 1 0, v0000000001109cc0_0; alias, 1 drivers -v0000000001109ea0_0 .var "pc_curr", 31 0; -v0000000001109220_0 .net "pc_in", 31 0, v0000000001164090_0; 1 drivers -v0000000001109fe0_0 .var "pc_out", 31 0; -o000000000110d018 .functor BUFZ 5, C4; HiZ drive -v000000000110a080_0 .net "rs", 4 0, o000000000110d018; 0 drivers -v00000000011095e0_0 .net "rst", 0 0, v0000000001166000_0; alias, 1 drivers -E_00000000010e8000 .event posedge, v000000000110a620_0; -S_00000000010991d0 .scope module, "regfile" "mips_cpu_regfile" 4 106, 8 1 0, S_000000000110af30; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 5 "readreg1"; - .port_info 2 /INPUT 5 "readreg2"; - .port_info 3 /INPUT 5 "writereg"; - .port_info 4 /INPUT 32 "writedata"; - .port_info 5 /INPUT 1 "regwrite"; - .port_info 6 /INPUT 6 "opcode"; - .port_info 7 /OUTPUT 32 "readdata1"; - .port_info 8 /OUTPUT 32 "readdata2"; - .port_info 9 /OUTPUT 32 "regv0"; -v0000000001108e60_2 .array/port v0000000001108e60, 2; -L_00000000010ee000 .functor BUFZ 32, v0000000001108e60_2, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; -v000000000110a760_0 .net "clk", 0 0, v0000000001166460_0; alias, 1 drivers -v0000000001108e60 .array "memory", 0 31, 31 0; -v0000000001108a00_0 .net "opcode", 5 0, L_0000000001166320; alias, 1 drivers -v0000000001108f00_0 .var "readdata1", 31 0; -v000000000110a120_0 .var "readdata2", 31 0; -v000000000110a440_0 .net "readreg1", 4 0, L_0000000001165380; alias, 1 drivers -v00000000011092c0_0 .net "readreg2", 4 0, L_0000000001165ba0; alias, 1 drivers -v0000000001109360_0 .net "regv0", 31 0, L_00000000010ee000; alias, 1 drivers -v0000000001109400_0 .net "regwrite", 0 0, v000000000110a6c0_0; alias, 1 drivers -v000000000110a300_0 .net "writedata", 31 0, v0000000001164310_0; 1 drivers -v000000000110a3a0_0 .net "writereg", 4 0, v00000000011641d0_0; 1 drivers -E_00000000010e7f80 .event negedge, v000000000110a620_0; -v0000000001108e60_0 .array/port v0000000001108e60, 0; -v0000000001108e60_1 .array/port v0000000001108e60, 1; -E_00000000010e80c0/0 .event edge, v000000000110a440_0, v0000000001108e60_0, v0000000001108e60_1, v0000000001108e60_2; -v0000000001108e60_3 .array/port v0000000001108e60, 3; -v0000000001108e60_4 .array/port v0000000001108e60, 4; -v0000000001108e60_5 .array/port v0000000001108e60, 5; -v0000000001108e60_6 .array/port v0000000001108e60, 6; -E_00000000010e80c0/1 .event edge, v0000000001108e60_3, v0000000001108e60_4, v0000000001108e60_5, v0000000001108e60_6; -v0000000001108e60_7 .array/port v0000000001108e60, 7; -v0000000001108e60_8 .array/port v0000000001108e60, 8; -v0000000001108e60_9 .array/port v0000000001108e60, 9; -v0000000001108e60_10 .array/port v0000000001108e60, 10; -E_00000000010e80c0/2 .event edge, v0000000001108e60_7, v0000000001108e60_8, v0000000001108e60_9, v0000000001108e60_10; -v0000000001108e60_11 .array/port v0000000001108e60, 11; -v0000000001108e60_12 .array/port v0000000001108e60, 12; -v0000000001108e60_13 .array/port v0000000001108e60, 13; -v0000000001108e60_14 .array/port v0000000001108e60, 14; -E_00000000010e80c0/3 .event edge, v0000000001108e60_11, v0000000001108e60_12, v0000000001108e60_13, v0000000001108e60_14; -v0000000001108e60_15 .array/port v0000000001108e60, 15; -v0000000001108e60_16 .array/port v0000000001108e60, 16; -v0000000001108e60_17 .array/port v0000000001108e60, 17; -v0000000001108e60_18 .array/port v0000000001108e60, 18; -E_00000000010e80c0/4 .event edge, v0000000001108e60_15, v0000000001108e60_16, v0000000001108e60_17, v0000000001108e60_18; -v0000000001108e60_19 .array/port v0000000001108e60, 19; -v0000000001108e60_20 .array/port v0000000001108e60, 20; -v0000000001108e60_21 .array/port v0000000001108e60, 21; -v0000000001108e60_22 .array/port v0000000001108e60, 22; -E_00000000010e80c0/5 .event edge, v0000000001108e60_19, v0000000001108e60_20, v0000000001108e60_21, v0000000001108e60_22; -v0000000001108e60_23 .array/port v0000000001108e60, 23; -v0000000001108e60_24 .array/port v0000000001108e60, 24; -v0000000001108e60_25 .array/port v0000000001108e60, 25; -v0000000001108e60_26 .array/port v0000000001108e60, 26; -E_00000000010e80c0/6 .event edge, v0000000001108e60_23, v0000000001108e60_24, v0000000001108e60_25, v0000000001108e60_26; -v0000000001108e60_27 .array/port v0000000001108e60, 27; -v0000000001108e60_28 .array/port v0000000001108e60, 28; -v0000000001108e60_29 .array/port v0000000001108e60, 29; -v0000000001108e60_30 .array/port v0000000001108e60, 30; -E_00000000010e80c0/7 .event edge, v0000000001108e60_27, v0000000001108e60_28, v0000000001108e60_29, v0000000001108e60_30; -v0000000001108e60_31 .array/port v0000000001108e60, 31; -E_00000000010e80c0/8 .event edge, v0000000001108e60_31, v00000000011092c0_0; -E_00000000010e80c0 .event/or E_00000000010e80c0/0, E_00000000010e80c0/1, E_00000000010e80c0/2, E_00000000010e80c0/3, E_00000000010e80c0/4, E_00000000010e80c0/5, E_00000000010e80c0/6, E_00000000010e80c0/7, E_00000000010e80c0/8; -S_0000000001099360 .scope begin, "$unm_blk_121" "$unm_blk_121" 8 16, 8 16 0, S_00000000010991d0; - .timescale 0 0; -v0000000001108dc0_0 .var/i "i", 31 0; -S_000000000108e6f0 .scope module, "ramInst" "mips_cpu_memory" 3 9, 9 1 0, S_000000000110ada0; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 32 "data_address"; - .port_info 2 /INPUT 1 "data_write"; - .port_info 3 /INPUT 1 "data_read"; - .port_info 4 /INPUT 32 "data_writedata"; - .port_info 5 /OUTPUT 32 "data_readdata"; - .port_info 6 /INPUT 32 "instr_address"; - .port_info 7 /OUTPUT 32 "instr_readdata"; -P_00000000010e8100 .param/str "RAM_INIT_FILE" 0 9 16, "inputs/o.txt"; -L_00000000010ee230 .functor AND 1, L_00000000011660a0, L_0000000001165d80, C4<1>, C4<1>; -v0000000001163ff0_0 .net *"_ivl_0", 31 0, L_0000000001164f20; 1 drivers -L_00000000011679e8 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v0000000001163050_0 .net/2u *"_ivl_12", 31 0, L_00000000011679e8; 1 drivers -v0000000001164130_0 .net *"_ivl_14", 0 0, L_00000000011660a0; 1 drivers -L_0000000001167a30 .functor BUFT 1, C4<10111111110000000000000001000000>, C4<0>, C4<0>, C4<0>; -v0000000001164450_0 .net/2u *"_ivl_16", 31 0, L_0000000001167a30; 1 drivers -v0000000001163190_0 .net *"_ivl_18", 0 0, L_0000000001165d80; 1 drivers -v0000000001164630_0 .net *"_ivl_2", 31 0, L_00000000011654c0; 1 drivers -v0000000001163c30_0 .net *"_ivl_21", 0 0, L_00000000010ee230; 1 drivers -v0000000001163b90_0 .net *"_ivl_22", 31 0, L_00000000011661e0; 1 drivers -L_0000000001167a78 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v00000000011646d0_0 .net/2u *"_ivl_24", 31 0, L_0000000001167a78; 1 drivers -v0000000001164810_0 .net *"_ivl_26", 31 0, L_0000000001164b60; 1 drivers -v0000000001163230_0 .net *"_ivl_28", 31 0, L_0000000001166140; 1 drivers -v0000000001162970_0 .net *"_ivl_30", 29 0, L_0000000001165c40; 1 drivers -L_0000000001167ac0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v00000000011632d0_0 .net *"_ivl_32", 1 0, L_0000000001167ac0; 1 drivers -L_0000000001167b08 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v0000000001163370_0 .net *"_ivl_34", 31 0, L_0000000001167b08; 1 drivers -v00000000011635f0_0 .net *"_ivl_4", 29 0, L_0000000001165e20; 1 drivers -L_0000000001167958 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0000000001163cd0_0 .net *"_ivl_6", 1 0, L_0000000001167958; 1 drivers -L_00000000011679a0 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v0000000001163690_0 .net *"_ivl_8", 31 0, L_00000000011679a0; 1 drivers -v0000000001163d70_0 .net "clk", 0 0, v0000000001166460_0; alias, 1 drivers -v0000000001163730_0 .net "data_address", 31 0, v0000000001109860_0; alias, 1 drivers -v00000000011637d0 .array "data_memory", 63 0, 31 0; -v0000000001163e10_0 .net "data_read", 0 0, v0000000001109900_0; alias, 1 drivers -v0000000001163f50_0 .net "data_readdata", 31 0, L_00000000011659c0; alias, 1 drivers -v0000000001163870_0 .net "data_write", 0 0, v0000000001109a40_0; alias, 1 drivers -v0000000001163910_0 .net "data_writedata", 31 0, v0000000001109c20_0; alias, 1 drivers -v0000000001164c00_0 .net "instr_address", 31 0, v0000000001162ab0_0; alias, 1 drivers -v00000000011665a0 .array "instr_memory", 63 0, 31 0; -v00000000011663c0_0 .net "instr_readdata", 31 0, L_0000000001165600; alias, 1 drivers -L_0000000001164f20 .array/port v00000000011637d0, L_00000000011654c0; -L_0000000001165e20 .part v0000000001109860_0, 2, 30; -L_00000000011654c0 .concat [ 30 2 0 0], L_0000000001165e20, L_0000000001167958; -L_00000000011659c0 .functor MUXZ 32, L_00000000011679a0, L_0000000001164f20, v0000000001109900_0, C4<>; -L_00000000011660a0 .cmp/ge 32, v0000000001162ab0_0, L_00000000011679e8; -L_0000000001165d80 .cmp/gt 32, L_0000000001167a30, v0000000001162ab0_0; -L_00000000011661e0 .array/port v00000000011665a0, L_0000000001166140; -L_0000000001164b60 .arith/sub 32, v0000000001162ab0_0, L_0000000001167a78; -L_0000000001165c40 .part L_0000000001164b60, 2, 30; -L_0000000001166140 .concat [ 30 2 0 0], L_0000000001165c40, L_0000000001167ac0; -L_0000000001165600 .functor MUXZ 32, L_0000000001167b08, L_00000000011661e0, L_00000000010ee230, C4<>; -S_0000000001052680 .scope begin, "$unm_blk_104" "$unm_blk_104" 9 21, 9 21 0, S_000000000108e6f0; - .timescale 0 0; -v0000000001163550_0 .var/i "i", 31 0; -S_0000000001052810 .scope begin, "$ivl_for_loop0" "$ivl_for_loop0" 9 36, 9 36 0, S_0000000001052680; - .timescale 0 0; -v0000000001163eb0_0 .var/i "j", 31 0; - .scope S_000000000108e6f0; -T_0 ; - %fork t_1, S_0000000001052680; - %jmp t_0; - .scope S_0000000001052680; -t_1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v0000000001163550_0, 0, 32; -T_0.0 ; - %load/vec4 v0000000001163550_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v0000000001163550_0; - %store/vec4a v00000000011637d0, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0000000001163550_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v0000000001163550_0, 0, 32; - %jmp T_0.0; -T_0.1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v0000000001163550_0, 0, 32; -T_0.2 ; - %load/vec4 v0000000001163550_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.3, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v0000000001163550_0; - %store/vec4a v00000000011665a0, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0000000001163550_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v0000000001163550_0, 0, 32; - %jmp T_0.2; -T_0.3 ; - %vpi_call/w 9 32 "$display", "RAM: Loading RAM contents from %s", P_00000000010e8100 {0 0 0}; - %vpi_call/w 9 33 "$readmemh", P_00000000010e8100, v00000000011665a0 {0 0 0}; - %fork t_3, S_0000000001052810; - %jmp t_2; - .scope S_0000000001052810; -t_3 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v0000000001163eb0_0, 0, 32; -T_0.4 ; - %load/vec4 v0000000001163eb0_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.5, 5; - %pushi/vec4 3217031168, 0, 32; - %load/vec4 v0000000001163eb0_0; - %muli 4, 0, 32; - %add; - %vpi_call/w 9 37 "$display", "byte +%h: %h", S<0,vec4,u32>, &A {1 0 0}; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0000000001163eb0_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v0000000001163eb0_0, 0, 32; - %jmp T_0.4; -T_0.5 ; - %end; - .scope S_0000000001052680; -t_2 %join; - %end; - .scope S_000000000108e6f0; -t_0 %join; - %end; - .thread T_0; - .scope S_000000000108e6f0; -T_1 ; - %wait E_00000000010e8000; - %load/vec4 v0000000001163e10_0; - %nor/r; - %load/vec4 v0000000001163870_0; - %and; - %flag_set/vec4 8; - %jmp/0xz T_1.0, 8; - %load/vec4 v0000000001164c00_0; - %load/vec4 v0000000001163730_0; - %cmp/ne; - %jmp/0xz T_1.2, 4; - %load/vec4 v0000000001163910_0; - %load/vec4 v0000000001163730_0; - %ix/load 4, 2, 0; - %flag_set/imm 4, 0; - %shiftr 4; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011637d0, 0, 4; -T_1.2 ; -T_1.0 ; - %jmp T_1; - .thread T_1; - .scope S_00000000010a6150; -T_2 ; - %load/vec4 v0000000001109220_0; - %store/vec4 v0000000001109fe0_0, 0, 32; - %end; - .thread T_2; - .scope S_00000000010a6150; -T_3 ; - %wait E_00000000010e8000; - %load/vec4 v00000000011095e0_0; - %flag_set/vec4 8; - %jmp/0xz T_3.0, 8; - %pushi/vec4 1, 0, 1; - %assign/vec4 v0000000001108d20_0, 0; - %pushi/vec4 3217031168, 0, 32; - %assign/vec4 v0000000001109fe0_0, 0; - %jmp T_3.1; -T_3.0 ; - %load/vec4 v0000000001109fe0_0; - %cmpi/ne 0, 0, 32; - %jmp/0xz T_3.2, 4; - %load/vec4 v0000000001108d20_0; - %assign/vec4 v0000000001108d20_0, 0; - %load/vec4 v0000000001109d60_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_3.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_3.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_3.6, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_3.7, 6; - %jmp T_3.8; -T_3.4 ; - %load/vec4 v0000000001109fe0_0; - %assign/vec4 v0000000001109ea0_0, 0; - %load/vec4 v0000000001109ea0_0; - %addi 4, 0, 32; - %assign/vec4 v0000000001109fe0_0, 0; - %vpi_call/w 7 27 "$display", "New PC from %h to %h", v0000000001109ea0_0, v0000000001109fe0_0 {0 0 0}; - %jmp T_3.8; -T_3.5 ; - %load/vec4 v0000000001109220_0; - %assign/vec4 v0000000001109fe0_0, 0; - %jmp T_3.8; -T_3.6 ; - %load/vec4 v0000000001109220_0; - %assign/vec4 v0000000001109fe0_0, 0; - %jmp T_3.8; -T_3.7 ; - %vpi_call/w 7 36 "$display", "JUMP REGISTER" {0 0 0}; - %pushi/vec4 0, 0, 32; - %assign/vec4 v0000000001109fe0_0, 0; - %jmp T_3.8; -T_3.8 ; - %pop/vec4 1; - %jmp T_3.3; -T_3.2 ; - %load/vec4 v0000000001109fe0_0; - %cmpi/e 0, 0, 32; - %jmp/0xz T_3.9, 4; - %pushi/vec4 0, 0, 1; - %assign/vec4 v0000000001108d20_0, 0; -T_3.9 ; -T_3.3 ; -T_3.1 ; - %jmp T_3; - .thread T_3; - .scope S_00000000010a5fc0; -T_4 ; - %wait E_00000000010e7040; - %vpi_call/w 6 86 "$display", "Opcode: %h", v0000000001109540_0 {0 0 0}; - %load/vec4 v0000000001109540_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.0, 4; - %pushi/vec4 0, 0, 2; - %store/vec4 v0000000001108960_0, 0, 2; - %vpi_call/w 6 89 "$display", "CTRLREGDST: Rt" {0 0 0}; - %jmp T_4.1; -T_4.0 ; - %load/vec4 v0000000001109540_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.2, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v0000000001108960_0, 0, 2; - %vpi_call/w 6 92 "$display", "CTRLREGDST: Rd" {0 0 0}; - %jmp T_4.3; -T_4.2 ; - %load/vec4 v0000000001109540_0; - %cmpi/e 3, 0, 6; - %jmp/0xz T_4.4, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v0000000001108960_0, 0, 2; - %vpi_call/w 6 95 "$display", "CTRLREGDST: Link" {0 0 0}; - %jmp T_4.5; -T_4.4 ; - %pushi/vec4 1, 1, 2; - %store/vec4 v0000000001108960_0, 0, 2; - %vpi_call/w 6 96 "$display", "xxxxxxxxxxxxxx" {0 0 0}; -T_4.5 ; -T_4.3 ; -T_4.1 ; - %load/vec4 v0000000001109680_0; - %load/vec4 v0000000001109540_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001109540_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001109540_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001109540_0; - %pushi/vec4 5, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001109540_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001109f40_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001109f40_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001109f40_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001109f40_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.6, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v0000000001109cc0_0, 0, 2; - %jmp T_4.7; -T_4.6 ; - %load/vec4 v0000000001109540_0; - %cmpi/e 2, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 3, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.8, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v0000000001109cc0_0, 0, 2; - %jmp T_4.9; -T_4.8 ; - %load/vec4 v0000000001108c80_0; - %cmpi/e 8, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001108c80_0; - %cmpi/e 9, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.10, 4; - %pushi/vec4 3, 0, 2; - %store/vec4 v0000000001109cc0_0, 0, 2; - %jmp T_4.11; -T_4.10 ; - %pushi/vec4 0, 0, 2; - %store/vec4 v0000000001109cc0_0, 0, 2; -T_4.11 ; -T_4.9 ; -T_4.7 ; - %load/vec4 v0000000001109540_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.12, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000110a4e0_0, 0, 1; - %pushi/vec4 1, 0, 2; - %store/vec4 v000000000110a800_0, 0, 2; - %vpi_call/w 6 112 "$display", "Memory read enabled" {0 0 0}; - %jmp T_4.13; -T_4.12 ; - %load/vec4 v0000000001109540_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.14, 9; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000110a4e0_0, 0, 1; - %pushi/vec4 0, 0, 2; - %store/vec4 v000000000110a800_0, 0, 2; - %vpi_call/w 6 116 "$display", "Memory read disabled" {0 0 0}; - %jmp T_4.15; -T_4.14 ; - %load/vec4 v0000000001109540_0; - %cmpi/e 3, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.16, 9; - %pushi/vec4 2, 0, 2; - %store/vec4 v000000000110a800_0, 0, 2; - %jmp T_4.17; -T_4.16 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v000000000110a4e0_0, 0, 1; -T_4.17 ; -T_4.15 ; -T_4.13 ; - %load/vec4 v0000000001109540_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.18, 9; - %pushi/vec4 0, 0, 5; - %store/vec4 v0000000001108b40_0, 0, 5; - %vpi_call/w 6 124 "$display", "ALU OP = 0 (ADDU/ADDIU)" {0 0 0}; - %jmp T_4.19; -T_4.18 ; - %load/vec4 v0000000001109540_0; - %cmpi/e 12, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.20, 9; - %pushi/vec4 4, 0, 5; - %store/vec4 v0000000001108b40_0, 0, 5; - %jmp T_4.21; -T_4.20 ; - %load/vec4 v0000000001109540_0; - %cmpi/e 4, 0, 6; - %jmp/0xz T_4.22, 4; - %pushi/vec4 13, 0, 5; - %store/vec4 v0000000001108b40_0, 0, 5; - %jmp T_4.23; -T_4.22 ; - %load/vec4 v0000000001109540_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001109f40_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001109f40_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.24, 8; - %pushi/vec4 17, 0, 5; - %store/vec4 v0000000001108b40_0, 0, 5; - %jmp T_4.25; -T_4.24 ; - %load/vec4 v0000000001109540_0; - %cmpi/e 7, 0, 6; - %jmp/0xz T_4.26, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v0000000001108b40_0, 0, 5; - %jmp T_4.27; -T_4.26 ; - %load/vec4 v0000000001109540_0; - %cmpi/e 6, 0, 6; - %jmp/0xz T_4.28, 4; - %pushi/vec4 15, 0, 5; - %store/vec4 v0000000001108b40_0, 0, 5; - %jmp T_4.29; -T_4.28 ; - %load/vec4 v0000000001109540_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001109f40_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001109f40_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.30, 8; - %pushi/vec4 14, 0, 5; - %store/vec4 v0000000001108b40_0, 0, 5; - %jmp T_4.31; -T_4.30 ; - %load/vec4 v0000000001109540_0; - %cmpi/e 5, 0, 6; - %jmp/0xz T_4.32, 4; - %pushi/vec4 18, 0, 5; - %store/vec4 v0000000001108b40_0, 0, 5; - %jmp T_4.33; -T_4.32 ; - %load/vec4 v0000000001109540_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.34, 8; - %pushi/vec4 3, 0, 5; - %store/vec4 v0000000001108b40_0, 0, 5; - %jmp T_4.35; -T_4.34 ; - %load/vec4 v0000000001109540_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.36, 8; - %pushi/vec4 23, 0, 5; - %store/vec4 v0000000001108b40_0, 0, 5; - %jmp T_4.37; -T_4.36 ; - %load/vec4 v0000000001109540_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.38, 4; - %pushi/vec4 0, 0, 5; - %store/vec4 v0000000001108b40_0, 0, 5; - %jmp T_4.39; -T_4.38 ; - %load/vec4 v0000000001109540_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.40, 4; - %pushi/vec4 7, 0, 5; - %store/vec4 v0000000001108b40_0, 0, 5; - %jmp T_4.41; -T_4.40 ; - %load/vec4 v0000000001109540_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.42, 8; - %pushi/vec4 19, 0, 5; - %store/vec4 v0000000001108b40_0, 0, 5; - %jmp T_4.43; -T_4.42 ; - %load/vec4 v0000000001109540_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.44, 8; - %pushi/vec4 2, 0, 5; - %store/vec4 v0000000001108b40_0, 0, 5; - %jmp T_4.45; -T_4.44 ; - %load/vec4 v0000000001109540_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.46, 8; - %pushi/vec4 22, 0, 5; - %store/vec4 v0000000001108b40_0, 0, 5; - %jmp T_4.47; -T_4.46 ; - %load/vec4 v0000000001109540_0; - %cmpi/e 13, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.48, 9; - %pushi/vec4 5, 0, 5; - %store/vec4 v0000000001108b40_0, 0, 5; - %jmp T_4.49; -T_4.48 ; - %load/vec4 v0000000001109540_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.50, 8; - %pushi/vec4 7, 0, 5; - %store/vec4 v0000000001108b40_0, 0, 5; - %jmp T_4.51; -T_4.50 ; - %load/vec4 v0000000001109540_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.52, 8; - %pushi/vec4 8, 0, 5; - %store/vec4 v0000000001108b40_0, 0, 5; - %jmp T_4.53; -T_4.52 ; - %load/vec4 v0000000001109540_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.54, 8; - %pushi/vec4 11, 0, 5; - %store/vec4 v0000000001108b40_0, 0, 5; - %jmp T_4.55; -T_4.54 ; - %load/vec4 v0000000001109540_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.56, 8; - %pushi/vec4 12, 0, 5; - %store/vec4 v0000000001108b40_0, 0, 5; - %jmp T_4.57; -T_4.56 ; - %load/vec4 v0000000001109540_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.58, 8; - %pushi/vec4 9, 0, 5; - %store/vec4 v0000000001108b40_0, 0, 5; - %jmp T_4.59; -T_4.58 ; - %load/vec4 v0000000001109540_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.60, 8; - %pushi/vec4 10, 0, 5; - %store/vec4 v0000000001108b40_0, 0, 5; - %jmp T_4.61; -T_4.60 ; - %load/vec4 v0000000001109540_0; - %cmpi/e 10, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.62, 9; - %pushi/vec4 20, 0, 5; - %store/vec4 v0000000001108b40_0, 0, 5; - %jmp T_4.63; -T_4.62 ; - %load/vec4 v0000000001109540_0; - %cmpi/e 11, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.64, 9; - %pushi/vec4 21, 0, 5; - %store/vec4 v0000000001108b40_0, 0, 5; - %jmp T_4.65; -T_4.64 ; - %load/vec4 v0000000001109540_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.66, 8; - %pushi/vec4 1, 0, 5; - %store/vec4 v0000000001108b40_0, 0, 5; - %jmp T_4.67; -T_4.66 ; - %load/vec4 v0000000001109540_0; - %cmpi/e 14, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.68, 9; - %pushi/vec4 6, 0, 5; - %store/vec4 v0000000001108b40_0, 0, 5; - %vpi_call/w 6 175 "$display", "ALU Op = 6 (XOR)" {0 0 0}; - %jmp T_4.69; -T_4.68 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v0000000001108b40_0, 0, 5; -T_4.69 ; -T_4.67 ; -T_4.65 ; -T_4.63 ; -T_4.61 ; -T_4.59 ; -T_4.57 ; -T_4.55 ; -T_4.53 ; -T_4.51 ; -T_4.49 ; -T_4.47 ; -T_4.45 ; -T_4.43 ; -T_4.41 ; -T_4.39 ; -T_4.37 ; -T_4.35 ; -T_4.33 ; -T_4.31 ; -T_4.29 ; -T_4.27 ; -T_4.25 ; -T_4.23 ; -T_4.21 ; -T_4.19 ; - %load/vec4 v0000000001109540_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.70, 8; - %load/vec4 v0000000001109180_0; - %parti/s 5, 6, 4; - %store/vec4 v0000000001109e00_0, 0, 5; - %jmp T_4.71; -T_4.70 ; - %load/vec4 v0000000001109540_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.72, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v0000000001109e00_0, 0, 5; - %jmp T_4.73; -T_4.72 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v0000000001109e00_0, 0, 5; -T_4.73 ; -T_4.71 ; - %load/vec4 v0000000001109540_0; - %cmpi/e 40, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.74, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001109040_0, 0, 1; - %jmp T_4.75; -T_4.74 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001109040_0, 0, 1; -T_4.75 ; - %load/vec4 v0000000001109540_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.76, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000011090e0_0, 0, 1; - %jmp T_4.77; -T_4.76 ; - %load/vec4 v0000000001109540_0; - %cmpi/e 4, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 7, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 6, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 5, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %load/vec4 v0000000001109540_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001109f40_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001109f40_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001109f40_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001109f40_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %flag_or 8, 9; - %jmp/0xz T_4.78, 8; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011090e0_0, 0, 1; - %jmp T_4.79; -T_4.78 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v00000000011090e0_0, 0, 1; -T_4.79 ; -T_4.77 ; - %load/vec4 v0000000001109540_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001109540_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001108c80_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.80, 9; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000110a6c0_0, 0, 1; - %jmp T_4.81; -T_4.80 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000110a6c0_0, 0, 1; -T_4.81 ; - %jmp T_4; - .thread T_4, $push; - .scope S_00000000010991d0; -T_5 ; - %fork t_5, S_0000000001099360; - %jmp t_4; - .scope S_0000000001099360; -t_5 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v0000000001108dc0_0, 0, 32; -T_5.0 ; - %load/vec4 v0000000001108dc0_0; - %cmpi/s 32, 0, 32; - %jmp/0xz T_5.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v0000000001108dc0_0; - %store/vec4a v0000000001108e60, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0000000001108dc0_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v0000000001108dc0_0, 0, 32; - %jmp T_5.0; -T_5.1 ; - %end; - .scope S_00000000010991d0; -t_4 %join; - %end; - .thread T_5; - .scope S_00000000010991d0; -T_6 ; -Ewait_0 .event/or E_00000000010e80c0, E_0x0; - %wait Ewait_0; - %load/vec4 v000000000110a440_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v0000000001108e60, 4; - %store/vec4 v0000000001108f00_0, 0, 32; - %load/vec4 v00000000011092c0_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v0000000001108e60, 4; - %store/vec4 v000000000110a120_0, 0, 32; - %jmp T_6; - .thread T_6, $push; - .scope S_00000000010991d0; -T_7 ; - %wait E_00000000010e7f80; - %load/vec4 v000000000110a3a0_0; - %cmpi/e 0, 0, 5; - %jmp/0xz T_7.0, 4; - %jmp T_7.1; -T_7.0 ; - %load/vec4 v0000000001109400_0; - %flag_set/vec4 8; - %jmp/0xz T_7.2, 8; - %load/vec4 v0000000001108a00_0; - %dup/vec4; - %pushi/vec4 32, 0, 6; - %cmp/u; - %jmp/1 T_7.4, 6; - %dup/vec4; - %pushi/vec4 36, 0, 6; - %cmp/u; - %jmp/1 T_7.5, 6; - %dup/vec4; - %pushi/vec4 33, 0, 6; - %cmp/u; - %jmp/1 T_7.6, 6; - %dup/vec4; - %pushi/vec4 37, 0, 6; - %cmp/u; - %jmp/1 T_7.7, 6; - %dup/vec4; - %pushi/vec4 34, 0, 6; - %cmp/u; - %jmp/1 T_7.8, 6; - %dup/vec4; - %pushi/vec4 38, 0, 6; - %cmp/u; - %jmp/1 T_7.9, 6; - %load/vec4 v000000000110a300_0; - %load/vec4 v000000000110a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001108e60, 0, 4; - %jmp T_7.11; -T_7.4 ; - %load/vec4 v0000000001108f00_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.12, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.13, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.14, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.15, 6; - %jmp T_7.16; -T_7.12 ; - %load/vec4 v000000000110a300_0; - %parti/s 1, 7, 4; - %replicate 24; - %load/vec4 v000000000110a300_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000110a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001108e60, 0, 4; - %jmp T_7.16; -T_7.13 ; - %load/vec4 v000000000110a300_0; - %parti/s 1, 15, 5; - %replicate 24; - %load/vec4 v000000000110a300_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000110a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001108e60, 0, 4; - %jmp T_7.16; -T_7.14 ; - %load/vec4 v000000000110a300_0; - %parti/s 1, 23, 6; - %replicate 24; - %load/vec4 v000000000110a300_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000110a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001108e60, 0, 4; - %jmp T_7.16; -T_7.15 ; - %load/vec4 v000000000110a300_0; - %parti/s 1, 31, 6; - %replicate 24; - %load/vec4 v000000000110a300_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000110a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001108e60, 0, 4; - %jmp T_7.16; -T_7.16 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.5 ; - %load/vec4 v0000000001108f00_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.17, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.18, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.19, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.20, 6; - %jmp T_7.21; -T_7.17 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v000000000110a300_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000110a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001108e60, 0, 4; - %jmp T_7.21; -T_7.18 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v000000000110a300_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000110a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001108e60, 0, 4; - %jmp T_7.21; -T_7.19 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v000000000110a300_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000110a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001108e60, 0, 4; - %jmp T_7.21; -T_7.20 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v000000000110a300_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000110a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001108e60, 0, 4; - %jmp T_7.21; -T_7.21 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.6 ; - %load/vec4 v0000000001108f00_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.22, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.23, 6; - %jmp T_7.24; -T_7.22 ; - %load/vec4 v000000000110a300_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v000000000110a300_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000110a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001108e60, 0, 4; - %jmp T_7.24; -T_7.23 ; - %load/vec4 v000000000110a300_0; - %parti/s 1, 31, 6; - %replicate 16; - %load/vec4 v000000000110a300_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000110a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001108e60, 0, 4; - %jmp T_7.24; -T_7.24 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.7 ; - %load/vec4 v0000000001108f00_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.25, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.26, 6; - %jmp T_7.27; -T_7.25 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v000000000110a300_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000110a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001108e60, 0, 4; - %jmp T_7.27; -T_7.26 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v000000000110a300_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000110a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001108e60, 0, 4; - %jmp T_7.27; -T_7.27 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.8 ; - %load/vec4 v0000000001108f00_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.28, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.29, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.30, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.31, 6; - %jmp T_7.32; -T_7.28 ; - %load/vec4 v000000000110a300_0; - %parti/s 8, 0, 2; - %load/vec4 v000000000110a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 24, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v0000000001108e60, 4, 5; - %jmp T_7.32; -T_7.29 ; - %load/vec4 v000000000110a300_0; - %parti/s 16, 0, 2; - %load/vec4 v000000000110a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 16, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v0000000001108e60, 4, 5; - %jmp T_7.32; -T_7.30 ; - %load/vec4 v000000000110a300_0; - %parti/s 24, 0, 2; - %load/vec4 v000000000110a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 8, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v0000000001108e60, 4, 5; - %jmp T_7.32; -T_7.31 ; - %load/vec4 v000000000110a300_0; - %load/vec4 v000000000110a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001108e60, 0, 4; - %jmp T_7.32; -T_7.32 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.9 ; - %load/vec4 v0000000001108f00_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.33, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.34, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.35, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.36, 6; - %jmp T_7.37; -T_7.33 ; - %load/vec4 v000000000110a300_0; - %load/vec4 v000000000110a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001108e60, 0, 4; - %jmp T_7.37; -T_7.34 ; - %load/vec4 v000000000110a300_0; - %parti/s 24, 8, 5; - %load/vec4 v000000000110a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001108e60, 0, 4; - %jmp T_7.37; -T_7.35 ; - %load/vec4 v000000000110a300_0; - %parti/s 16, 16, 6; - %load/vec4 v000000000110a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001108e60, 0, 4; - %jmp T_7.37; -T_7.36 ; - %load/vec4 v000000000110a300_0; - %parti/s 8, 24, 6; - %load/vec4 v000000000110a3a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001108e60, 0, 4; - %jmp T_7.37; -T_7.37 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.11 ; - %pop/vec4 1; -T_7.2 ; -T_7.1 ; - %jmp T_7; - .thread T_7; - .scope S_00000000010a5e30; -T_8 ; -Ewait_1 .event/or E_00000000010e7f00, E_0x0; - %wait Ewait_1; - %load/vec4 v0000000001108fa0_0; - %dup/vec4; - %pushi/vec4 0, 0, 5; - %cmp/u; - %jmp/1 T_8.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 5; - %cmp/u; - %jmp/1 T_8.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 5; - %cmp/u; - %jmp/1 T_8.2, 6; - %dup/vec4; - %pushi/vec4 3, 0, 5; - %cmp/u; - %jmp/1 T_8.3, 6; - %dup/vec4; - %pushi/vec4 4, 0, 5; - %cmp/u; - %jmp/1 T_8.4, 6; - %dup/vec4; - %pushi/vec4 5, 0, 5; - %cmp/u; - %jmp/1 T_8.5, 6; - %dup/vec4; - %pushi/vec4 6, 0, 5; - %cmp/u; - %jmp/1 T_8.6, 6; - %dup/vec4; - %pushi/vec4 7, 0, 5; - %cmp/u; - %jmp/1 T_8.7, 6; - %dup/vec4; - %pushi/vec4 8, 0, 5; - %cmp/u; - %jmp/1 T_8.8, 6; - %dup/vec4; - %pushi/vec4 9, 0, 5; - %cmp/u; - %jmp/1 T_8.9, 6; - %dup/vec4; - %pushi/vec4 10, 0, 5; - %cmp/u; - %jmp/1 T_8.10, 6; - %dup/vec4; - %pushi/vec4 11, 0, 5; - %cmp/u; - %jmp/1 T_8.11, 6; - %dup/vec4; - %pushi/vec4 12, 0, 5; - %cmp/u; - %jmp/1 T_8.12, 6; - %dup/vec4; - %pushi/vec4 13, 0, 5; - %cmp/u; - %jmp/1 T_8.13, 6; - %dup/vec4; - %pushi/vec4 14, 0, 5; - %cmp/u; - %jmp/1 T_8.14, 6; - %dup/vec4; - %pushi/vec4 15, 0, 5; - %cmp/u; - %jmp/1 T_8.15, 6; - %dup/vec4; - %pushi/vec4 16, 0, 5; - %cmp/u; - %jmp/1 T_8.16, 6; - %dup/vec4; - %pushi/vec4 17, 0, 5; - %cmp/u; - %jmp/1 T_8.17, 6; - %dup/vec4; - %pushi/vec4 18, 0, 5; - %cmp/u; - %jmp/1 T_8.18, 6; - %dup/vec4; - %pushi/vec4 19, 0, 5; - %cmp/u; - %jmp/1 T_8.19, 6; - %dup/vec4; - %pushi/vec4 20, 0, 5; - %cmp/u; - %jmp/1 T_8.20, 6; - %dup/vec4; - %pushi/vec4 21, 0, 5; - %cmp/u; - %jmp/1 T_8.21, 6; - %dup/vec4; - %pushi/vec4 22, 0, 5; - %cmp/u; - %jmp/1 T_8.22, 6; - %dup/vec4; - %pushi/vec4 23, 0, 5; - %cmp/u; - %jmp/1 T_8.23, 6; - %jmp T_8.24; -T_8.0 ; - %load/vec4 v000000000110a580_0; - %load/vec4 v0000000001108be0_0; - %add; - %store/vec4 v0000000001109ae0_0, 0, 32; - %jmp T_8.24; -T_8.1 ; - %load/vec4 v000000000110a580_0; - %load/vec4 v0000000001108be0_0; - %sub; - %store/vec4 v0000000001109ae0_0, 0, 32; - %jmp T_8.24; -T_8.2 ; - %load/vec4 v000000000110a580_0; - %load/vec4 v0000000001108be0_0; - %mul; - %store/vec4 v0000000001109ae0_0, 0, 32; - %jmp T_8.24; -T_8.3 ; - %load/vec4 v000000000110a580_0; - %load/vec4 v0000000001108be0_0; - %div/s; - %store/vec4 v0000000001109ae0_0, 0, 32; - %jmp T_8.24; -T_8.4 ; - %load/vec4 v000000000110a580_0; - %load/vec4 v0000000001108be0_0; - %and; - %store/vec4 v0000000001109ae0_0, 0, 32; - %jmp T_8.24; -T_8.5 ; - %load/vec4 v000000000110a580_0; - %load/vec4 v0000000001108be0_0; - %or; - %store/vec4 v0000000001109ae0_0, 0, 32; - %jmp T_8.24; -T_8.6 ; - %load/vec4 v000000000110a580_0; - %load/vec4 v0000000001108be0_0; - %xor; - %store/vec4 v0000000001109ae0_0, 0, 32; - %jmp T_8.24; -T_8.7 ; - %load/vec4 v0000000001108be0_0; - %ix/getv 4, v000000000110a260_0; - %shiftl 4; - %store/vec4 v0000000001109ae0_0, 0, 32; - %jmp T_8.24; -T_8.8 ; - %load/vec4 v0000000001108be0_0; - %ix/getv 4, v000000000110a580_0; - %shiftl 4; - %store/vec4 v0000000001109ae0_0, 0, 32; - %jmp T_8.24; -T_8.9 ; - %load/vec4 v0000000001108be0_0; - %ix/getv 4, v000000000110a260_0; - %shiftr 4; - %store/vec4 v0000000001109ae0_0, 0, 32; - %jmp T_8.24; -T_8.10 ; - %load/vec4 v0000000001108be0_0; - %ix/getv 4, v000000000110a580_0; - %shiftr 4; - %store/vec4 v0000000001109ae0_0, 0, 32; - %jmp T_8.24; -T_8.11 ; - %load/vec4 v0000000001108be0_0; - %ix/getv 4, v000000000110a260_0; - %shiftr 4; - %store/vec4 v0000000001109ae0_0, 0, 32; - %jmp T_8.24; -T_8.12 ; - %load/vec4 v0000000001108be0_0; - %ix/getv 4, v000000000110a580_0; - %shiftr 4; - %store/vec4 v0000000001109ae0_0, 0, 32; - %jmp T_8.24; -T_8.13 ; - %load/vec4 v000000000110a580_0; - %load/vec4 v0000000001108be0_0; - %cmp/e; - %jmp/0xz T_8.25, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000110a1c0_0, 0, 1; - %jmp T_8.26; -T_8.25 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000110a1c0_0, 0, 1; -T_8.26 ; - %jmp T_8.24; -T_8.14 ; - %load/vec4 v000000000110a580_0; - %load/vec4 v0000000001108be0_0; - %cmp/s; - %jmp/0xz T_8.27, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000110a1c0_0, 0, 1; - %jmp T_8.28; -T_8.27 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000110a1c0_0, 0, 1; -T_8.28 ; - %jmp T_8.24; -T_8.15 ; - %load/vec4 v000000000110a580_0; - %load/vec4 v0000000001108be0_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.29, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000110a1c0_0, 0, 1; - %jmp T_8.30; -T_8.29 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000110a1c0_0, 0, 1; -T_8.30 ; - %jmp T_8.24; -T_8.16 ; - %load/vec4 v0000000001108be0_0; - %load/vec4 v000000000110a580_0; - %cmp/s; - %jmp/0xz T_8.31, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000110a1c0_0, 0, 1; - %jmp T_8.32; -T_8.31 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000110a1c0_0, 0, 1; -T_8.32 ; - %jmp T_8.24; -T_8.17 ; - %load/vec4 v0000000001108be0_0; - %load/vec4 v000000000110a580_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.33, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000110a1c0_0, 0, 1; - %jmp T_8.34; -T_8.33 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000110a1c0_0, 0, 1; -T_8.34 ; - %jmp T_8.24; -T_8.18 ; - %load/vec4 v000000000110a580_0; - %load/vec4 v0000000001108be0_0; - %cmp/ne; - %jmp/0xz T_8.35, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000110a1c0_0, 0, 1; - %jmp T_8.36; -T_8.35 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000110a1c0_0, 0, 1; -T_8.36 ; - %jmp T_8.24; -T_8.19 ; - %load/vec4 v000000000110a580_0; - %store/vec4 v0000000001109ae0_0, 0, 32; - %jmp T_8.24; -T_8.20 ; - %load/vec4 v000000000110a580_0; - %load/vec4 v0000000001108be0_0; - %cmp/s; - %jmp/0xz T_8.37, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v0000000001109ae0_0, 0, 32; -T_8.37 ; - %jmp T_8.24; -T_8.21 ; - %load/vec4 v000000000110a580_0; - %load/vec4 v0000000001108be0_0; - %cmp/u; - %jmp/0xz T_8.39, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v0000000001109ae0_0, 0, 32; -T_8.39 ; - %jmp T_8.24; -T_8.22 ; - %load/vec4 v000000000110a580_0; - %load/vec4 v0000000001108be0_0; - %mul; - %store/vec4 v0000000001109ae0_0, 0, 32; - %jmp T_8.24; -T_8.23 ; - %load/vec4 v000000000110a580_0; - %load/vec4 v0000000001108be0_0; - %div; - %store/vec4 v0000000001109ae0_0, 0, 32; - %jmp T_8.24; -T_8.24 ; - %pop/vec4 1; - %jmp T_8; - .thread T_8, $push; - .scope S_000000000110af30; -T_9 ; - %pushi/vec4 3217031168, 0, 32; - %store/vec4 v0000000001164090_0, 0, 32; - %end; - .thread T_9, $init; - .scope S_000000000110af30; -T_10 ; -Ewait_2 .event/or E_00000000010e61c0, E_0x0; - %wait Ewait_2; - %load/vec4 v0000000001163af0_0; - %store/vec4 v0000000001162ab0_0, 0, 32; - %load/vec4 v0000000001162bf0_0; - %store/vec4 v0000000001109860_0, 0, 32; - %load/vec4 v0000000001162c90_0; - %store/vec4 v0000000001109a40_0, 0, 1; - %load/vec4 v00000000011643b0_0; - %store/vec4 v0000000001109900_0, 0, 1; - %load/vec4 v00000000011634b0_0; - %store/vec4 v0000000001109c20_0, 0, 32; - %jmp T_10; - .thread T_10, $push; - .scope S_000000000110af30; -T_11 ; -Ewait_3 .event/or E_00000000010e5c00, E_0x0; - %wait Ewait_3; - %load/vec4 v0000000001162a10_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.2, 6; - %jmp T_11.3; -T_11.0 ; - %load/vec4 v0000000001162d30_0; - %parti/s 5, 16, 6; - %store/vec4 v00000000011641d0_0, 0, 5; - %jmp T_11.3; -T_11.1 ; - %load/vec4 v0000000001162d30_0; - %parti/s 5, 11, 5; - %store/vec4 v00000000011641d0_0, 0, 5; - %jmp T_11.3; -T_11.2 ; - %pushi/vec4 31, 0, 5; - %store/vec4 v00000000011641d0_0, 0, 5; - %jmp T_11.3; -T_11.3 ; - %pop/vec4 1; - %load/vec4 v0000000001162e70_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.6, 6; - %jmp T_11.7; -T_11.4 ; - %load/vec4 v0000000001162bf0_0; - %store/vec4 v0000000001164310_0, 0, 32; - %jmp T_11.7; -T_11.5 ; - %load/vec4 v00000000011099a0_0; - %store/vec4 v0000000001164310_0, 0, 32; - %jmp T_11.7; -T_11.6 ; - %load/vec4 v0000000001164090_0; - %addi 8, 0, 32; - %store/vec4 v0000000001164310_0, 0, 32; - %jmp T_11.7; -T_11.7 ; - %pop/vec4 1; - %load/vec4 v0000000001164270_0; - %dup/vec4; - %pushi/vec4 1, 0, 1; - %cmp/u; - %jmp/1 T_11.8, 6; - %dup/vec4; - %pushi/vec4 0, 0, 1; - %cmp/u; - %jmp/1 T_11.9, 6; - %jmp T_11.10; -T_11.8 ; - %load/vec4 v0000000001162d30_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v0000000001162d30_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %store/vec4 v00000000010ce2e0_0, 0, 32; - %jmp T_11.10; -T_11.9 ; - %load/vec4 v00000000011634b0_0; - %store/vec4 v00000000010ce2e0_0, 0, 32; - %jmp T_11.10; -T_11.10 ; - %pop/vec4 1; - %jmp T_11; - .thread T_11, $push; - .scope S_000000000110ada0; -T_12 ; - %vpi_call/w 3 36 "$dumpfile", "mips_cpu_harvard.vcd" {0 0 0}; - %vpi_call/w 3 37 "$dumpvars", 32'sb00000000000000000000000000000000, S_000000000110ada0 {0 0 0}; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001166460_0, 0, 1; - %pushi/vec4 100, 0, 32; -T_12.0 %dup/vec4; - %pushi/vec4 0, 0, 32; - %cmp/s; - %jmp/1xz T_12.1, 5; - %jmp/1 T_12.1, 4; - %pushi/vec4 1, 0, 32; - %sub; - %delay 10, 0; - %load/vec4 v0000000001166460_0; - %nor/r; - %store/vec4 v0000000001166460_0, 0, 1; - %delay 10, 0; - %load/vec4 v0000000001166460_0; - %nor/r; - %store/vec4 v0000000001166460_0, 0, 1; - %jmp T_12.0; -T_12.1 ; - %pop/vec4 1; - %vpi_call/w 3 47 "$fatal", 32'sb00000000000000000000000000000010, "Simulation did not finish within %d cycles.", P_00000000010d97c8 {0 0 0}; - %end; - .thread T_12; - .scope S_000000000110ada0; -T_13 ; - %vpi_call/w 3 51 "$display", "Initial Reset 0" {0 0 0}; - %pushi/vec4 0, 0, 1; - %assign/vec4 v0000000001166000_0, 0; - %vpi_call/w 3 55 "$display", "Initial Reset 1" {0 0 0}; - %wait E_00000000010e8000; - %pushi/vec4 1, 0, 1; - %assign/vec4 v0000000001166000_0, 0; - %vpi_call/w 3 59 "$display", "Initial Reset 0: Start Program" {0 0 0}; - %wait E_00000000010e8000; - %pushi/vec4 0, 0, 1; - %assign/vec4 v0000000001166000_0, 0; - %wait E_00000000010e8000; - %load/vec4 v0000000001165b00_0; - %pad/u 32; - %cmpi/e 1, 0, 32; - %jmp/0xz T_13.0, 4; - %jmp T_13.1; -T_13.0 ; - %vpi_call/w 3 65 "$display", "TB: CPU did not set active=1 after reset." {0 0 0}; -T_13.1 ; -T_13.2 ; - %load/vec4 v0000000001165b00_0; - %flag_set/vec4 8; - %jmp/0xz T_13.3, 8; - %wait E_00000000010e8000; - %vpi_call/w 3 71 "$display", "Reg File Write data: %d", v0000000001164310_0 {0 0 0}; - %jmp T_13.2; -T_13.3 ; - %wait E_00000000010e8000; - %vpi_call/w 3 74 "$display", "TB: CPU Halt; active=0" {0 0 0}; - %vpi_call/w 3 75 "$display", "Output:" {0 0 0}; - %vpi_call/w 3 76 "$display", "%d", v0000000001165560_0 {0 0 0}; - %vpi_call/w 3 77 "$finish" {0 0 0}; - %end; - .thread T_13; -# The file index is used to find the file name in the following table. -:file_names 10; - "N/A"; - ""; - "-"; - "testbench/mips_cpu_harvard_tb.v"; - "rtl/mips_cpu_harvard.v"; - "rtl/mips_cpu_alu.v"; - "rtl/mips_cpu_control.v"; - "rtl/mips_cpu_pc.v"; - "rtl/mips_cpu_regfile.v"; - "rtl/mips_cpu_memory.v"; diff --git a/exec/mips_cpu_harvard_tb_or b/exec/mips_cpu_harvard_tb_or deleted file mode 100644 index b1fe1e3..0000000 --- a/exec/mips_cpu_harvard_tb_or +++ /dev/null @@ -1,2738 +0,0 @@ -#! /usr/local/iverilog/bin/vvp -:ivl_version "11.0 (devel)"; -:ivl_delay_selection "TYPICAL"; -:vpi_time_precision + 0; -:vpi_module "C:\iverilog\lib\ivl\system.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_sys.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_textio.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2005_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\va_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2009.vpi"; -S_000000000115c100 .scope package, "$unit" "$unit" 2 1; - .timescale 0 0; -S_000000000113aac0 .scope module, "mips_cpu_harvard_tb" "mips_cpu_harvard_tb" 3 1; - .timescale 0 0; -P_0000000001129dd0 .param/str "RAM_INIT_FILE" 0 3 3, "inputs/or.txt"; -P_0000000001129e08 .param/l "TIMEOUT_CYCLES" 0 3 4, +C4<00000000000000000000000001100100>; -v00000000011b4ac0_0 .net "active", 0 0, v0000000001159540_0; 1 drivers -v00000000011b4de0_0 .var "clk", 0 0; -v00000000011b5100_0 .var "clk_enable", 0 0; -v00000000011b6500_0 .net "data_address", 31 0, v0000000001159360_0; 1 drivers -v00000000011b51a0_0 .net "data_read", 0 0, v0000000001159cc0_0; 1 drivers -v00000000011b4b60_0 .net "data_readdata", 31 0, L_00000000011b6640; 1 drivers -v00000000011b5ce0_0 .net "data_write", 0 0, v0000000001158d20_0; 1 drivers -v00000000011b6780_0 .net "data_writedata", 31 0, v0000000001158e60_0; 1 drivers -v00000000011b63c0_0 .net "instr_address", 31 0, v00000000011b34b0_0; 1 drivers -v00000000011b5d80_0 .net "instr_readdata", 31 0, L_00000000011b4a20; 1 drivers -v00000000011b5240_0 .net "register_v0", 31 0, L_000000000113e2a0; 1 drivers -v00000000011b4fc0_0 .var "reset", 0 0; -S_00000000010f5e30 .scope module, "cpuInst" "mips_cpu_harvard" 3 19, 4 1 0, S_000000000113aac0; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "reset"; - .port_info 2 /OUTPUT 1 "active"; - .port_info 3 /OUTPUT 32 "register_v0"; - .port_info 4 /INPUT 1 "clk_enable"; - .port_info 5 /OUTPUT 32 "instr_address"; - .port_info 6 /INPUT 32 "instr_readdata"; - .port_info 7 /OUTPUT 32 "data_address"; - .port_info 8 /OUTPUT 1 "data_write"; - .port_info 9 /OUTPUT 1 "data_read"; - .port_info 10 /OUTPUT 32 "data_writedata"; - .port_info 11 /INPUT 32 "data_readdata"; -v00000000011592c0_0 .net "active", 0 0, v0000000001159540_0; alias, 1 drivers -v000000000115a6c0_0 .net "clk", 0 0, v00000000011b4de0_0; 1 drivers -v0000000001159c20_0 .net "clk_enable", 0 0, v00000000011b5100_0; 1 drivers -v0000000001159360_0 .var "data_address", 31 0; -v0000000001159cc0_0 .var "data_read", 0 0; -v0000000001158c80_0 .net "data_readdata", 31 0, L_00000000011b6640; alias, 1 drivers -v0000000001158d20_0 .var "data_write", 0 0; -v0000000001158e60_0 .var "data_writedata", 31 0; -v00000000010c8d50_0 .var "in_B", 31 0; -v00000000011b2c90_0 .net "in_opcode", 5 0, L_00000000011b5600; 1 drivers -v00000000011b3410_0 .net "in_pc_in", 31 0, v0000000001159fe0_0; 1 drivers -v00000000011b3230_0 .net "in_readreg1", 4 0, L_00000000011b4e80; 1 drivers -v00000000011b4090_0 .net "in_readreg2", 4 0, L_00000000011b61e0; 1 drivers -v00000000011b41d0_0 .var "in_writedata", 31 0; -v00000000011b4590_0 .var "in_writereg", 4 0; -v00000000011b34b0_0 .var "instr_address", 31 0; -v00000000011b43b0_0 .net "instr_readdata", 31 0, L_00000000011b4a20; alias, 1 drivers -v00000000011b3f50_0 .net "out_ALUCond", 0 0, v000000000115a080_0; 1 drivers -v00000000011b3eb0_0 .net "out_ALUOp", 4 0, v00000000011590e0_0; 1 drivers -v00000000011b3370_0 .net "out_ALURes", 31 0, v000000000115a440_0; 1 drivers -v00000000011b2e70_0 .net "out_ALUSrc", 0 0, v0000000001159860_0; 1 drivers -v00000000011b4270_0 .net "out_MemRead", 0 0, v0000000001159400_0; 1 drivers -v00000000011b3730_0 .net "out_MemWrite", 0 0, v00000000011594a0_0; 1 drivers -v00000000011b4630_0 .net "out_MemtoReg", 1 0, v000000000115a760_0; 1 drivers -v00000000011b32d0_0 .net "out_PC", 1 0, v0000000001159220_0; 1 drivers -v00000000011b3d70_0 .net "out_RegDst", 1 0, v0000000001159d60_0; 1 drivers -v00000000011b2d30_0 .net "out_RegWrite", 0 0, v000000000115a4e0_0; 1 drivers -v00000000011b3a50_0 .var "out_pc_out", 31 0; -v00000000011b3ff0_0 .net "out_readdata1", 31 0, v0000000001159680_0; 1 drivers -v00000000011b3190_0 .net "out_readdata2", 31 0, v00000000011595e0_0; 1 drivers -v00000000011b3550_0 .net "out_shamt", 4 0, v0000000001159720_0; 1 drivers -v00000000011b3050_0 .net "register_v0", 31 0, L_000000000113e2a0; alias, 1 drivers -v00000000011b3e10_0 .net "reset", 0 0, v00000000011b4fc0_0; 1 drivers -E_0000000001135a50/0 .event edge, v0000000001159d60_0, v0000000001159900_0, v0000000001159900_0, v000000000115a760_0; -E_0000000001135a50/1 .event edge, v000000000115a440_0, v0000000001158c80_0, v0000000001159f40_0, v0000000001159860_0; -E_0000000001135a50/2 .event edge, v0000000001159900_0, v0000000001159900_0, v00000000011595e0_0; -E_0000000001135a50 .event/or E_0000000001135a50/0, E_0000000001135a50/1, E_0000000001135a50/2; -E_00000000011362d0/0 .event edge, v0000000001159fe0_0, v000000000115a440_0, v00000000011594a0_0, v0000000001159400_0; -E_00000000011362d0/1 .event edge, v00000000011595e0_0; -E_00000000011362d0 .event/or E_00000000011362d0/0, E_00000000011362d0/1; -L_00000000011b4e80 .part L_00000000011b4a20, 21, 5; -L_00000000011b61e0 .part L_00000000011b4a20, 16, 5; -L_00000000011b5600 .part L_00000000011b4a20, 26, 6; -S_00000000010f5fc0 .scope module, "alu" "mips_cpu_alu" 4 121, 5 1 0, S_00000000010f5e30; - .timescale 0 0; - .port_info 0 /INPUT 32 "A"; - .port_info 1 /INPUT 32 "B"; - .port_info 2 /INPUT 5 "ALUOp"; - .port_info 3 /INPUT 5 "shamt"; - .port_info 4 /OUTPUT 1 "ALUCond"; - .port_info 5 /OUTPUT 32 "ALURes"; -enum00000000008cbd00 .enum4 (5) - "ADD" 5'b00000, - "SUB" 5'b00001, - "MUL" 5'b00010, - "DIV" 5'b00011, - "AND" 5'b00100, - "OR" 5'b00101, - "XOR" 5'b00110, - "SLL" 5'b00111, - "SLLV" 5'b01000, - "SRL" 5'b01001, - "SRLV" 5'b01010, - "SRA" 5'b01011, - "SRAV" 5'b01100, - "EQ" 5'b01101, - "LES" 5'b01110, - "LEQ" 5'b01111, - "GRT" 5'b10000, - "GEQ" 5'b10001, - "NEQ" 5'b10010, - "PAS" 5'b10011, - "SLT" 5'b10100, - "SLTU" 5'b10101, - "MULU" 5'b10110, - "DIVU" 5'b10111 - ; -L_000000000113ebd0 .functor BUFZ 5, v00000000011590e0_0, C4<00000>, C4<00000>, C4<00000>; -v000000000115a3a0_0 .net "A", 31 0, v0000000001159680_0; alias, 1 drivers -v000000000115a080_0 .var "ALUCond", 0 0; -v0000000001158a00_0 .net "ALUOp", 4 0, v00000000011590e0_0; alias, 1 drivers -v000000000115a800_0 .net "ALUOps", 4 0, L_000000000113ebd0; 1 drivers -v000000000115a440_0 .var/s "ALURes", 31 0; -v0000000001159ae0_0 .net "B", 31 0, v00000000010c8d50_0; 1 drivers -v0000000001158f00_0 .net "shamt", 4 0, v0000000001159720_0; alias, 1 drivers -E_0000000001137750 .event edge, v000000000115a800_0, v000000000115a3a0_0, v0000000001159ae0_0, v0000000001158f00_0; -S_00000000010f6150 .scope module, "control" "mips_cpu_control" 4 90, 6 1 0, S_00000000010f5e30; - .timescale 0 0; - .port_info 0 /INPUT 32 "Instr"; - .port_info 1 /INPUT 1 "ALUCond"; - .port_info 2 /OUTPUT 2 "CtrlRegDst"; - .port_info 3 /OUTPUT 2 "CtrlPC"; - .port_info 4 /OUTPUT 1 "CtrlMemRead"; - .port_info 5 /OUTPUT 2 "CtrlMemtoReg"; - .port_info 6 /OUTPUT 5 "CtrlALUOp"; - .port_info 7 /OUTPUT 5 "Ctrlshamt"; - .port_info 8 /OUTPUT 1 "CtrlMemWrite"; - .port_info 9 /OUTPUT 1 "CtrlALUSrc"; - .port_info 10 /OUTPUT 1 "CtrlRegWrite"; -enum00000000008c9270 .enum4 (5) - "BLTZ" 5'b00000, - "BGEZ" 5'b00001, - "BLTZAL" 5'b10000, - "BGEZAL" 5'b10001 - ; -enum00000000008c9730 .enum4 (6) - "SLL" 6'b000000, - "SRL" 6'b000010, - "SRA" 6'b000011, - "SLLV" 6'b000100, - "SRLV" 6'b000110, - "SRAV" 6'b000111, - "JR" 6'b001000, - "JALR" 6'b001001, - "MTHI" 6'b010001, - "MTLO" 6'b010011, - "MULT" 6'b011000, - "MULTU" 6'b011001, - "DIV" 6'b011010, - "DIVU" 6'b011011, - "ADDU" 6'b100001, - "SUBU" 6'b100011, - "AND" 6'b100100, - "OR" 6'b100101, - "XOR" 6'b100110, - "SLT" 6'b101010, - "SLTU" 6'b101011 - ; -enum00000000008cb950 .enum4 (6) - "SPECIAL" 6'b000000, - "REGIMM" 6'b000001, - "J" 6'b000010, - "JAL" 6'b000011, - "BEQ" 6'b000100, - "BNE" 6'b000101, - "BLEZ" 6'b000110, - "BGTZ" 6'b000111, - "ADDI" 6'b001000, - "ADDIU" 6'b001001, - "SLTI" 6'b001010, - "SLTIU" 6'b001011, - "ANDI" 6'b001100, - "ORI" 6'b001101, - "XORI" 6'b001110, - "LUI" 6'b001111, - "LB" 6'b100000, - "LH" 6'b100001, - "LWL" 6'b100010, - "LW" 6'b100011, - "LBU" 6'b100100, - "LHU" 6'b100101, - "LWR" 6'b100110, - "SB" 6'b101000, - "SH" 6'b101001, - "SW" 6'b101011 - ; -v0000000001159180_0 .net "ALUCond", 0 0, v000000000115a080_0; alias, 1 drivers -v00000000011590e0_0 .var "CtrlALUOp", 4 0; -v0000000001159860_0 .var "CtrlALUSrc", 0 0; -v0000000001159400_0 .var "CtrlMemRead", 0 0; -v00000000011594a0_0 .var "CtrlMemWrite", 0 0; -v000000000115a760_0 .var "CtrlMemtoReg", 1 0; -v0000000001159220_0 .var "CtrlPC", 1 0; -v0000000001159d60_0 .var "CtrlRegDst", 1 0; -v000000000115a4e0_0 .var "CtrlRegWrite", 0 0; -v0000000001159720_0 .var "Ctrlshamt", 4 0; -v0000000001159900_0 .net "Instr", 31 0, L_00000000011b4a20; alias, 1 drivers -v000000000115a300_0 .net "funct", 5 0, L_00000000011b6320; 1 drivers -v0000000001158aa0_0 .net "op", 5 0, L_00000000011b5420; 1 drivers -v0000000001158dc0_0 .net "rt", 4 0, L_00000000011b4c00; 1 drivers -E_0000000001137090/0 .event edge, v0000000001158aa0_0, v000000000115a300_0, v000000000115a080_0, v0000000001158dc0_0; -E_0000000001137090/1 .event edge, v0000000001159900_0; -E_0000000001137090 .event/or E_0000000001137090/0, E_0000000001137090/1; -L_00000000011b5420 .part L_00000000011b4a20, 26, 6; -L_00000000011b6320 .part L_00000000011b4a20, 0, 6; -L_00000000011b4c00 .part L_00000000011b4a20, 16, 5; -S_00000000010e91d0 .scope module, "pc" "pc" 4 79, 7 1 0, S_00000000010f5e30; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "rst"; - .port_info 2 /INPUT 2 "pc_ctrl"; - .port_info 3 /INPUT 32 "pc_in"; - .port_info 4 /INPUT 5 "rs"; - .port_info 5 /OUTPUT 32 "pc_out"; - .port_info 6 /OUTPUT 1 "active"; -v0000000001159540_0 .var "active", 0 0; -v0000000001159e00_0 .net "clk", 0 0, v00000000011b4de0_0; alias, 1 drivers -v0000000001159ea0_0 .net "pc_ctrl", 1 0, v0000000001159220_0; alias, 1 drivers -v000000000115a120_0 .var "pc_curr", 31 0; -v0000000001159f40_0 .net "pc_in", 31 0, v00000000011b3a50_0; 1 drivers -v0000000001159fe0_0 .var "pc_out", 31 0; -o000000000115d018 .functor BUFZ 5, C4; HiZ drive -v000000000115a1c0_0 .net "rs", 4 0, o000000000115d018; 0 drivers -v0000000001158fa0_0 .net "rst", 0 0, v00000000011b4fc0_0; alias, 1 drivers -E_0000000001137e50 .event posedge, v0000000001159e00_0; -S_00000000010e9360 .scope module, "regfile" "mips_cpu_regfile" 4 106, 8 1 0, S_00000000010f5e30; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 5 "readreg1"; - .port_info 2 /INPUT 5 "readreg2"; - .port_info 3 /INPUT 5 "writereg"; - .port_info 4 /INPUT 32 "writedata"; - .port_info 5 /INPUT 1 "regwrite"; - .port_info 6 /INPUT 6 "opcode"; - .port_info 7 /OUTPUT 32 "readdata1"; - .port_info 8 /OUTPUT 32 "readdata2"; - .port_info 9 /OUTPUT 32 "regv0"; -v00000000011597c0_2 .array/port v00000000011597c0, 2; -L_000000000113e2a0 .functor BUFZ 32, v00000000011597c0_2, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; -v0000000001159a40_0 .net "clk", 0 0, v00000000011b4de0_0; alias, 1 drivers -v00000000011597c0 .array "memory", 0 31, 31 0; -v0000000001158b40_0 .net "opcode", 5 0, L_00000000011b5600; alias, 1 drivers -v0000000001159680_0 .var "readdata1", 31 0; -v00000000011595e0_0 .var "readdata2", 31 0; -v000000000115a580_0 .net "readreg1", 4 0, L_00000000011b4e80; alias, 1 drivers -v000000000115a260_0 .net "readreg2", 4 0, L_00000000011b61e0; alias, 1 drivers -v0000000001158be0_0 .net "regv0", 31 0, L_000000000113e2a0; alias, 1 drivers -v00000000011599a0_0 .net "regwrite", 0 0, v000000000115a4e0_0; alias, 1 drivers -v0000000001158960_0 .net "writedata", 31 0, v00000000011b41d0_0; 1 drivers -v000000000115a620_0 .net "writereg", 4 0, v00000000011b4590_0; 1 drivers -E_0000000001137790 .event negedge, v0000000001159e00_0; -v00000000011597c0_0 .array/port v00000000011597c0, 0; -v00000000011597c0_1 .array/port v00000000011597c0, 1; -E_00000000011377d0/0 .event edge, v000000000115a580_0, v00000000011597c0_0, v00000000011597c0_1, v00000000011597c0_2; -v00000000011597c0_3 .array/port v00000000011597c0, 3; -v00000000011597c0_4 .array/port v00000000011597c0, 4; -v00000000011597c0_5 .array/port v00000000011597c0, 5; -v00000000011597c0_6 .array/port v00000000011597c0, 6; -E_00000000011377d0/1 .event edge, v00000000011597c0_3, v00000000011597c0_4, v00000000011597c0_5, v00000000011597c0_6; -v00000000011597c0_7 .array/port v00000000011597c0, 7; -v00000000011597c0_8 .array/port v00000000011597c0, 8; -v00000000011597c0_9 .array/port v00000000011597c0, 9; -v00000000011597c0_10 .array/port v00000000011597c0, 10; -E_00000000011377d0/2 .event edge, v00000000011597c0_7, v00000000011597c0_8, v00000000011597c0_9, v00000000011597c0_10; -v00000000011597c0_11 .array/port v00000000011597c0, 11; -v00000000011597c0_12 .array/port v00000000011597c0, 12; -v00000000011597c0_13 .array/port v00000000011597c0, 13; -v00000000011597c0_14 .array/port v00000000011597c0, 14; -E_00000000011377d0/3 .event edge, v00000000011597c0_11, v00000000011597c0_12, v00000000011597c0_13, v00000000011597c0_14; -v00000000011597c0_15 .array/port v00000000011597c0, 15; -v00000000011597c0_16 .array/port v00000000011597c0, 16; -v00000000011597c0_17 .array/port v00000000011597c0, 17; -v00000000011597c0_18 .array/port v00000000011597c0, 18; -E_00000000011377d0/4 .event edge, v00000000011597c0_15, v00000000011597c0_16, v00000000011597c0_17, v00000000011597c0_18; -v00000000011597c0_19 .array/port v00000000011597c0, 19; -v00000000011597c0_20 .array/port v00000000011597c0, 20; -v00000000011597c0_21 .array/port v00000000011597c0, 21; -v00000000011597c0_22 .array/port v00000000011597c0, 22; -E_00000000011377d0/5 .event edge, v00000000011597c0_19, v00000000011597c0_20, v00000000011597c0_21, v00000000011597c0_22; -v00000000011597c0_23 .array/port v00000000011597c0, 23; -v00000000011597c0_24 .array/port v00000000011597c0, 24; -v00000000011597c0_25 .array/port v00000000011597c0, 25; -v00000000011597c0_26 .array/port v00000000011597c0, 26; -E_00000000011377d0/6 .event edge, v00000000011597c0_23, v00000000011597c0_24, v00000000011597c0_25, v00000000011597c0_26; -v00000000011597c0_27 .array/port v00000000011597c0, 27; -v00000000011597c0_28 .array/port v00000000011597c0, 28; -v00000000011597c0_29 .array/port v00000000011597c0, 29; -v00000000011597c0_30 .array/port v00000000011597c0, 30; -E_00000000011377d0/7 .event edge, v00000000011597c0_27, v00000000011597c0_28, v00000000011597c0_29, v00000000011597c0_30; -v00000000011597c0_31 .array/port v00000000011597c0, 31; -E_00000000011377d0/8 .event edge, v00000000011597c0_31, v000000000115a260_0; -E_00000000011377d0 .event/or E_00000000011377d0/0, E_00000000011377d0/1, E_00000000011377d0/2, E_00000000011377d0/3, E_00000000011377d0/4, E_00000000011377d0/5, E_00000000011377d0/6, E_00000000011377d0/7, E_00000000011377d0/8; -S_00000000010e94f0 .scope begin, "$unm_blk_121" "$unm_blk_121" 8 16, 8 16 0, S_00000000010e9360; - .timescale 0 0; -v0000000001159b80_0 .var/i "i", 31 0; -S_00000000010de6f0 .scope module, "ramInst" "mips_cpu_memory" 3 9, 9 1 0, S_000000000113aac0; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 32 "data_address"; - .port_info 2 /INPUT 1 "data_write"; - .port_info 3 /INPUT 1 "data_read"; - .port_info 4 /INPUT 32 "data_writedata"; - .port_info 5 /OUTPUT 32 "data_readdata"; - .port_info 6 /INPUT 32 "instr_address"; - .port_info 7 /OUTPUT 32 "instr_readdata"; -P_0000000001137910 .param/str "RAM_INIT_FILE" 0 9 16, "inputs/or.txt"; -L_000000000113df20 .functor AND 1, L_00000000011b5920, L_00000000011b5380, C4<1>, C4<1>; -v00000000011b46d0_0 .net *"_ivl_0", 31 0, L_00000000011b5880; 1 drivers -L_00000000011b79e8 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v00000000011b4310_0 .net/2u *"_ivl_12", 31 0, L_00000000011b79e8; 1 drivers -v00000000011b4450_0 .net *"_ivl_14", 0 0, L_00000000011b5920; 1 drivers -L_00000000011b7a30 .functor BUFT 1, C4<10111111110000000000000001000000>, C4<0>, C4<0>, C4<0>; -v00000000011b2dd0_0 .net/2u *"_ivl_16", 31 0, L_00000000011b7a30; 1 drivers -v00000000011b37d0_0 .net *"_ivl_18", 0 0, L_00000000011b5380; 1 drivers -v00000000011b2b50_0 .net *"_ivl_2", 31 0, L_00000000011b52e0; 1 drivers -v00000000011b44f0_0 .net *"_ivl_21", 0 0, L_000000000113df20; 1 drivers -v00000000011b4810_0 .net *"_ivl_22", 31 0, L_00000000011b6280; 1 drivers -L_00000000011b7a78 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v00000000011b4770_0 .net/2u *"_ivl_24", 31 0, L_00000000011b7a78; 1 drivers -v00000000011b3af0_0 .net *"_ivl_26", 31 0, L_00000000011b6820; 1 drivers -v00000000011b2f10_0 .net *"_ivl_28", 31 0, L_00000000011b6140; 1 drivers -v00000000011b30f0_0 .net *"_ivl_30", 29 0, L_00000000011b4980; 1 drivers -L_00000000011b7ac0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v00000000011b2970_0 .net *"_ivl_32", 1 0, L_00000000011b7ac0; 1 drivers -L_00000000011b7b08 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v00000000011b35f0_0 .net *"_ivl_34", 31 0, L_00000000011b7b08; 1 drivers -v00000000011b2a10_0 .net *"_ivl_4", 29 0, L_00000000011b65a0; 1 drivers -L_00000000011b7958 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v00000000011b2ab0_0 .net *"_ivl_6", 1 0, L_00000000011b7958; 1 drivers -L_00000000011b79a0 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v00000000011b2bf0_0 .net *"_ivl_8", 31 0, L_00000000011b79a0; 1 drivers -v00000000011b2fb0_0 .net "clk", 0 0, v00000000011b4de0_0; alias, 1 drivers -v00000000011b3690_0 .net "data_address", 31 0, v0000000001159360_0; alias, 1 drivers -v00000000011b3910 .array "data_memory", 63 0, 31 0; -v00000000011b39b0_0 .net "data_read", 0 0, v0000000001159cc0_0; alias, 1 drivers -v00000000011b3870_0 .net "data_readdata", 31 0, L_00000000011b6640; alias, 1 drivers -v00000000011b3b90_0 .net "data_write", 0 0, v0000000001158d20_0; alias, 1 drivers -v00000000011b3cd0_0 .net "data_writedata", 31 0, v0000000001158e60_0; alias, 1 drivers -v00000000011b59c0_0 .net "instr_address", 31 0, v00000000011b34b0_0; alias, 1 drivers -v00000000011b66e0 .array "instr_memory", 63 0, 31 0; -v00000000011b6460_0 .net "instr_readdata", 31 0, L_00000000011b4a20; alias, 1 drivers -L_00000000011b5880 .array/port v00000000011b3910, L_00000000011b52e0; -L_00000000011b65a0 .part v0000000001159360_0, 2, 30; -L_00000000011b52e0 .concat [ 30 2 0 0], L_00000000011b65a0, L_00000000011b7958; -L_00000000011b6640 .functor MUXZ 32, L_00000000011b79a0, L_00000000011b5880, v0000000001159cc0_0, C4<>; -L_00000000011b5920 .cmp/ge 32, v00000000011b34b0_0, L_00000000011b79e8; -L_00000000011b5380 .cmp/gt 32, L_00000000011b7a30, v00000000011b34b0_0; -L_00000000011b6280 .array/port v00000000011b66e0, L_00000000011b6140; -L_00000000011b6820 .arith/sub 32, v00000000011b34b0_0, L_00000000011b7a78; -L_00000000011b4980 .part L_00000000011b6820, 2, 30; -L_00000000011b6140 .concat [ 30 2 0 0], L_00000000011b4980, L_00000000011b7ac0; -L_00000000011b4a20 .functor MUXZ 32, L_00000000011b7b08, L_00000000011b6280, L_000000000113df20, C4<>; -S_00000000010a2680 .scope begin, "$unm_blk_104" "$unm_blk_104" 9 21, 9 21 0, S_00000000010de6f0; - .timescale 0 0; -v00000000011b3c30_0 .var/i "i", 31 0; -S_00000000010a2810 .scope begin, "$ivl_for_loop0" "$ivl_for_loop0" 9 36, 9 36 0, S_00000000010a2680; - .timescale 0 0; -v00000000011b4130_0 .var/i "j", 31 0; - .scope S_00000000010de6f0; -T_0 ; - %fork t_1, S_00000000010a2680; - %jmp t_0; - .scope S_00000000010a2680; -t_1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000011b3c30_0, 0, 32; -T_0.0 ; - %load/vec4 v00000000011b3c30_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v00000000011b3c30_0; - %store/vec4a v00000000011b3910, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000011b3c30_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000011b3c30_0, 0, 32; - %jmp T_0.0; -T_0.1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000011b3c30_0, 0, 32; -T_0.2 ; - %load/vec4 v00000000011b3c30_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.3, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v00000000011b3c30_0; - %store/vec4a v00000000011b66e0, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000011b3c30_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000011b3c30_0, 0, 32; - %jmp T_0.2; -T_0.3 ; - %vpi_call/w 9 32 "$display", "RAM: Loading RAM contents from %s", P_0000000001137910 {0 0 0}; - %vpi_call/w 9 33 "$readmemh", P_0000000001137910, v00000000011b66e0 {0 0 0}; - %fork t_3, S_00000000010a2810; - %jmp t_2; - .scope S_00000000010a2810; -t_3 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000011b4130_0, 0, 32; -T_0.4 ; - %load/vec4 v00000000011b4130_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.5, 5; - %pushi/vec4 3217031168, 0, 32; - %load/vec4 v00000000011b4130_0; - %muli 4, 0, 32; - %add; - %vpi_call/w 9 37 "$display", "byte +%h: %h", S<0,vec4,u32>, &A {1 0 0}; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000011b4130_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000011b4130_0, 0, 32; - %jmp T_0.4; -T_0.5 ; - %end; - .scope S_00000000010a2680; -t_2 %join; - %end; - .scope S_00000000010de6f0; -t_0 %join; - %end; - .thread T_0; - .scope S_00000000010de6f0; -T_1 ; - %wait E_0000000001137e50; - %load/vec4 v00000000011b39b0_0; - %nor/r; - %load/vec4 v00000000011b3b90_0; - %and; - %flag_set/vec4 8; - %jmp/0xz T_1.0, 8; - %load/vec4 v00000000011b59c0_0; - %load/vec4 v00000000011b3690_0; - %cmp/ne; - %jmp/0xz T_1.2, 4; - %load/vec4 v00000000011b3cd0_0; - %load/vec4 v00000000011b3690_0; - %ix/load 4, 2, 0; - %flag_set/imm 4, 0; - %shiftr 4; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011b3910, 0, 4; -T_1.2 ; -T_1.0 ; - %jmp T_1; - .thread T_1; - .scope S_00000000010e91d0; -T_2 ; - %load/vec4 v0000000001159f40_0; - %store/vec4 v0000000001159fe0_0, 0, 32; - %end; - .thread T_2; - .scope S_00000000010e91d0; -T_3 ; - %wait E_0000000001137e50; - %load/vec4 v0000000001158fa0_0; - %flag_set/vec4 8; - %jmp/0xz T_3.0, 8; - %pushi/vec4 1, 0, 1; - %assign/vec4 v0000000001159540_0, 0; - %pushi/vec4 3217031168, 0, 32; - %assign/vec4 v0000000001159fe0_0, 0; - %jmp T_3.1; -T_3.0 ; - %load/vec4 v0000000001159fe0_0; - %cmpi/ne 0, 0, 32; - %jmp/0xz T_3.2, 4; - %load/vec4 v0000000001159540_0; - %assign/vec4 v0000000001159540_0, 0; - %load/vec4 v0000000001159ea0_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_3.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_3.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_3.6, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_3.7, 6; - %jmp T_3.8; -T_3.4 ; - %load/vec4 v0000000001159fe0_0; - %assign/vec4 v000000000115a120_0, 0; - %load/vec4 v000000000115a120_0; - %addi 4, 0, 32; - %assign/vec4 v0000000001159fe0_0, 0; - %vpi_call/w 7 27 "$display", "New PC from %h to %h", v000000000115a120_0, v0000000001159fe0_0 {0 0 0}; - %jmp T_3.8; -T_3.5 ; - %load/vec4 v0000000001159f40_0; - %assign/vec4 v0000000001159fe0_0, 0; - %jmp T_3.8; -T_3.6 ; - %load/vec4 v0000000001159f40_0; - %assign/vec4 v0000000001159fe0_0, 0; - %jmp T_3.8; -T_3.7 ; - %vpi_call/w 7 36 "$display", "JUMP REGISTER" {0 0 0}; - %pushi/vec4 0, 0, 32; - %assign/vec4 v0000000001159fe0_0, 0; - %jmp T_3.8; -T_3.8 ; - %pop/vec4 1; - %jmp T_3.3; -T_3.2 ; - %load/vec4 v0000000001159fe0_0; - %cmpi/e 0, 0, 32; - %jmp/0xz T_3.9, 4; - %pushi/vec4 0, 0, 1; - %assign/vec4 v0000000001159540_0, 0; -T_3.9 ; -T_3.3 ; -T_3.1 ; - %jmp T_3; - .thread T_3; - .scope S_00000000010f6150; -T_4 ; - %wait E_0000000001137090; - %vpi_call/w 6 86 "$display", "Opcode: %h", v0000000001158aa0_0 {0 0 0}; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.0, 4; - %pushi/vec4 0, 0, 2; - %store/vec4 v0000000001159d60_0, 0, 2; - %vpi_call/w 6 89 "$display", "CTRLREGDST: Rt" {0 0 0}; - %jmp T_4.1; -T_4.0 ; - %load/vec4 v0000000001158aa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a300_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a300_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.2, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v0000000001159d60_0, 0, 2; - %vpi_call/w 6 92 "$display", "CTRLREGDST: Rd" {0 0 0}; - %jmp T_4.3; -T_4.2 ; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 3, 0, 6; - %jmp/0xz T_4.4, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v0000000001159d60_0, 0, 2; - %vpi_call/w 6 95 "$display", "CTRLREGDST: Link" {0 0 0}; - %jmp T_4.5; -T_4.4 ; - %pushi/vec4 1, 1, 2; - %store/vec4 v0000000001159d60_0, 0, 2; - %vpi_call/w 6 96 "$display", "xxxxxxxxxxxxxx" {0 0 0}; -T_4.5 ; -T_4.3 ; -T_4.1 ; - %load/vec4 v0000000001159180_0; - %load/vec4 v0000000001158aa0_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001158aa0_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001158aa0_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001158aa0_0; - %pushi/vec4 5, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001158aa0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001158dc0_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001158dc0_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001158dc0_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001158dc0_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.6, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v0000000001159220_0, 0, 2; - %jmp T_4.7; -T_4.6 ; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 2, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 3, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.8, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v0000000001159220_0, 0, 2; - %jmp T_4.9; -T_4.8 ; - %load/vec4 v000000000115a300_0; - %cmpi/e 8, 0, 6; - %flag_mov 8, 4; - %load/vec4 v000000000115a300_0; - %cmpi/e 9, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.10, 4; - %pushi/vec4 3, 0, 2; - %store/vec4 v0000000001159220_0, 0, 2; - %jmp T_4.11; -T_4.10 ; - %pushi/vec4 0, 0, 2; - %store/vec4 v0000000001159220_0, 0, 2; -T_4.11 ; -T_4.9 ; -T_4.7 ; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.12, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001159400_0, 0, 1; - %pushi/vec4 1, 0, 2; - %store/vec4 v000000000115a760_0, 0, 2; - %vpi_call/w 6 112 "$display", "Memory read enabled" {0 0 0}; - %jmp T_4.13; -T_4.12 ; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a300_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a300_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.14, 9; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001159400_0, 0, 1; - %pushi/vec4 0, 0, 2; - %store/vec4 v000000000115a760_0, 0, 2; - %vpi_call/w 6 116 "$display", "Memory read disabled" {0 0 0}; - %jmp T_4.15; -T_4.14 ; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 3, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a300_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.16, 9; - %pushi/vec4 2, 0, 2; - %store/vec4 v000000000115a760_0, 0, 2; - %jmp T_4.17; -T_4.16 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v0000000001159400_0, 0, 1; -T_4.17 ; -T_4.15 ; -T_4.13 ; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a300_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.18, 9; - %pushi/vec4 0, 0, 5; - %store/vec4 v00000000011590e0_0, 0, 5; - %vpi_call/w 6 124 "$display", "ALU OP = 0 (ADDU/ADDIU)" {0 0 0}; - %jmp T_4.19; -T_4.18 ; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 12, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a300_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.20, 9; - %pushi/vec4 4, 0, 5; - %store/vec4 v00000000011590e0_0, 0, 5; - %jmp T_4.21; -T_4.20 ; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 4, 0, 6; - %jmp/0xz T_4.22, 4; - %pushi/vec4 13, 0, 5; - %store/vec4 v00000000011590e0_0, 0, 5; - %jmp T_4.23; -T_4.22 ; - %load/vec4 v0000000001158aa0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001158dc0_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001158dc0_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.24, 8; - %pushi/vec4 17, 0, 5; - %store/vec4 v00000000011590e0_0, 0, 5; - %jmp T_4.25; -T_4.24 ; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 7, 0, 6; - %jmp/0xz T_4.26, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v00000000011590e0_0, 0, 5; - %jmp T_4.27; -T_4.26 ; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 6, 0, 6; - %jmp/0xz T_4.28, 4; - %pushi/vec4 15, 0, 5; - %store/vec4 v00000000011590e0_0, 0, 5; - %jmp T_4.29; -T_4.28 ; - %load/vec4 v0000000001158aa0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001158dc0_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001158dc0_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.30, 8; - %pushi/vec4 14, 0, 5; - %store/vec4 v00000000011590e0_0, 0, 5; - %jmp T_4.31; -T_4.30 ; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 5, 0, 6; - %jmp/0xz T_4.32, 4; - %pushi/vec4 18, 0, 5; - %store/vec4 v00000000011590e0_0, 0, 5; - %jmp T_4.33; -T_4.32 ; - %load/vec4 v0000000001158aa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a300_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.34, 8; - %pushi/vec4 3, 0, 5; - %store/vec4 v00000000011590e0_0, 0, 5; - %jmp T_4.35; -T_4.34 ; - %load/vec4 v0000000001158aa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a300_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.36, 8; - %pushi/vec4 23, 0, 5; - %store/vec4 v00000000011590e0_0, 0, 5; - %jmp T_4.37; -T_4.36 ; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.38, 4; - %pushi/vec4 0, 0, 5; - %store/vec4 v00000000011590e0_0, 0, 5; - %jmp T_4.39; -T_4.38 ; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.40, 4; - %pushi/vec4 7, 0, 5; - %store/vec4 v00000000011590e0_0, 0, 5; - %jmp T_4.41; -T_4.40 ; - %load/vec4 v0000000001158aa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a300_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a300_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.42, 8; - %pushi/vec4 19, 0, 5; - %store/vec4 v00000000011590e0_0, 0, 5; - %jmp T_4.43; -T_4.42 ; - %load/vec4 v0000000001158aa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a300_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.44, 8; - %pushi/vec4 2, 0, 5; - %store/vec4 v00000000011590e0_0, 0, 5; - %jmp T_4.45; -T_4.44 ; - %load/vec4 v0000000001158aa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a300_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.46, 8; - %pushi/vec4 22, 0, 5; - %store/vec4 v00000000011590e0_0, 0, 5; - %jmp T_4.47; -T_4.46 ; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 13, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a300_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.48, 9; - %pushi/vec4 5, 0, 5; - %store/vec4 v00000000011590e0_0, 0, 5; - %jmp T_4.49; -T_4.48 ; - %load/vec4 v0000000001158aa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a300_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.50, 8; - %pushi/vec4 7, 0, 5; - %store/vec4 v00000000011590e0_0, 0, 5; - %jmp T_4.51; -T_4.50 ; - %load/vec4 v0000000001158aa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a300_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.52, 8; - %pushi/vec4 8, 0, 5; - %store/vec4 v00000000011590e0_0, 0, 5; - %jmp T_4.53; -T_4.52 ; - %load/vec4 v0000000001158aa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a300_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.54, 8; - %pushi/vec4 11, 0, 5; - %store/vec4 v00000000011590e0_0, 0, 5; - %jmp T_4.55; -T_4.54 ; - %load/vec4 v0000000001158aa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a300_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.56, 8; - %pushi/vec4 12, 0, 5; - %store/vec4 v00000000011590e0_0, 0, 5; - %jmp T_4.57; -T_4.56 ; - %load/vec4 v0000000001158aa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a300_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.58, 8; - %pushi/vec4 9, 0, 5; - %store/vec4 v00000000011590e0_0, 0, 5; - %jmp T_4.59; -T_4.58 ; - %load/vec4 v0000000001158aa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a300_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.60, 8; - %pushi/vec4 10, 0, 5; - %store/vec4 v00000000011590e0_0, 0, 5; - %jmp T_4.61; -T_4.60 ; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 10, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a300_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.62, 9; - %pushi/vec4 20, 0, 5; - %store/vec4 v00000000011590e0_0, 0, 5; - %jmp T_4.63; -T_4.62 ; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 11, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a300_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.64, 9; - %pushi/vec4 21, 0, 5; - %store/vec4 v00000000011590e0_0, 0, 5; - %jmp T_4.65; -T_4.64 ; - %load/vec4 v0000000001158aa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a300_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.66, 8; - %pushi/vec4 1, 0, 5; - %store/vec4 v00000000011590e0_0, 0, 5; - %jmp T_4.67; -T_4.66 ; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 14, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a300_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.68, 9; - %pushi/vec4 6, 0, 5; - %store/vec4 v00000000011590e0_0, 0, 5; - %vpi_call/w 6 175 "$display", "ALU Op = 6 (XOR)" {0 0 0}; - %jmp T_4.69; -T_4.68 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v00000000011590e0_0, 0, 5; -T_4.69 ; -T_4.67 ; -T_4.65 ; -T_4.63 ; -T_4.61 ; -T_4.59 ; -T_4.57 ; -T_4.55 ; -T_4.53 ; -T_4.51 ; -T_4.49 ; -T_4.47 ; -T_4.45 ; -T_4.43 ; -T_4.41 ; -T_4.39 ; -T_4.37 ; -T_4.35 ; -T_4.33 ; -T_4.31 ; -T_4.29 ; -T_4.27 ; -T_4.25 ; -T_4.23 ; -T_4.21 ; -T_4.19 ; - %load/vec4 v0000000001158aa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a300_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a300_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.70, 8; - %load/vec4 v0000000001159900_0; - %parti/s 5, 6, 4; - %store/vec4 v0000000001159720_0, 0, 5; - %jmp T_4.71; -T_4.70 ; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.72, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v0000000001159720_0, 0, 5; - %jmp T_4.73; -T_4.72 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v0000000001159720_0, 0, 5; -T_4.73 ; -T_4.71 ; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 40, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.74, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000011594a0_0, 0, 1; - %jmp T_4.75; -T_4.74 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011594a0_0, 0, 1; -T_4.75 ; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.76, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001159860_0, 0, 1; - %jmp T_4.77; -T_4.76 ; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 4, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 7, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 6, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 5, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a300_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a300_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %load/vec4 v0000000001158aa0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001158dc0_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001158dc0_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001158dc0_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001158dc0_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %flag_or 8, 9; - %jmp/0xz T_4.78, 8; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001159860_0, 0, 1; - %jmp T_4.79; -T_4.78 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v0000000001159860_0, 0, 1; -T_4.79 ; -T_4.77 ; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001158aa0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a300_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v000000000115a300_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v000000000115a300_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.80, 9; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000115a4e0_0, 0, 1; - %jmp T_4.81; -T_4.80 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000115a4e0_0, 0, 1; -T_4.81 ; - %jmp T_4; - .thread T_4, $push; - .scope S_00000000010e9360; -T_5 ; - %fork t_5, S_00000000010e94f0; - %jmp t_4; - .scope S_00000000010e94f0; -t_5 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v0000000001159b80_0, 0, 32; -T_5.0 ; - %load/vec4 v0000000001159b80_0; - %cmpi/s 32, 0, 32; - %jmp/0xz T_5.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v0000000001159b80_0; - %store/vec4a v00000000011597c0, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0000000001159b80_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v0000000001159b80_0, 0, 32; - %jmp T_5.0; -T_5.1 ; - %end; - .scope S_00000000010e9360; -t_4 %join; - %end; - .thread T_5; - .scope S_00000000010e9360; -T_6 ; -Ewait_0 .event/or E_00000000011377d0, E_0x0; - %wait Ewait_0; - %load/vec4 v000000000115a580_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v00000000011597c0, 4; - %store/vec4 v0000000001159680_0, 0, 32; - %load/vec4 v000000000115a260_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v00000000011597c0, 4; - %store/vec4 v00000000011595e0_0, 0, 32; - %jmp T_6; - .thread T_6, $push; - .scope S_00000000010e9360; -T_7 ; - %wait E_0000000001137790; - %load/vec4 v000000000115a620_0; - %cmpi/e 0, 0, 5; - %jmp/0xz T_7.0, 4; - %jmp T_7.1; -T_7.0 ; - %load/vec4 v00000000011599a0_0; - %flag_set/vec4 8; - %jmp/0xz T_7.2, 8; - %load/vec4 v0000000001158b40_0; - %dup/vec4; - %pushi/vec4 32, 0, 6; - %cmp/u; - %jmp/1 T_7.4, 6; - %dup/vec4; - %pushi/vec4 36, 0, 6; - %cmp/u; - %jmp/1 T_7.5, 6; - %dup/vec4; - %pushi/vec4 33, 0, 6; - %cmp/u; - %jmp/1 T_7.6, 6; - %dup/vec4; - %pushi/vec4 37, 0, 6; - %cmp/u; - %jmp/1 T_7.7, 6; - %dup/vec4; - %pushi/vec4 34, 0, 6; - %cmp/u; - %jmp/1 T_7.8, 6; - %dup/vec4; - %pushi/vec4 38, 0, 6; - %cmp/u; - %jmp/1 T_7.9, 6; - %load/vec4 v0000000001158960_0; - %load/vec4 v000000000115a620_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011597c0, 0, 4; - %jmp T_7.11; -T_7.4 ; - %load/vec4 v0000000001159680_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.12, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.13, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.14, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.15, 6; - %jmp T_7.16; -T_7.12 ; - %load/vec4 v0000000001158960_0; - %parti/s 1, 7, 4; - %replicate 24; - %load/vec4 v0000000001158960_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000115a620_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011597c0, 0, 4; - %jmp T_7.16; -T_7.13 ; - %load/vec4 v0000000001158960_0; - %parti/s 1, 15, 5; - %replicate 24; - %load/vec4 v0000000001158960_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000115a620_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011597c0, 0, 4; - %jmp T_7.16; -T_7.14 ; - %load/vec4 v0000000001158960_0; - %parti/s 1, 23, 6; - %replicate 24; - %load/vec4 v0000000001158960_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000115a620_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011597c0, 0, 4; - %jmp T_7.16; -T_7.15 ; - %load/vec4 v0000000001158960_0; - %parti/s 1, 31, 6; - %replicate 24; - %load/vec4 v0000000001158960_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000115a620_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011597c0, 0, 4; - %jmp T_7.16; -T_7.16 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.5 ; - %load/vec4 v0000000001159680_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.17, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.18, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.19, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.20, 6; - %jmp T_7.21; -T_7.17 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v0000000001158960_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000115a620_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011597c0, 0, 4; - %jmp T_7.21; -T_7.18 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v0000000001158960_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000115a620_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011597c0, 0, 4; - %jmp T_7.21; -T_7.19 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v0000000001158960_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000115a620_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011597c0, 0, 4; - %jmp T_7.21; -T_7.20 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v0000000001158960_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000115a620_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011597c0, 0, 4; - %jmp T_7.21; -T_7.21 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.6 ; - %load/vec4 v0000000001159680_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.22, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.23, 6; - %jmp T_7.24; -T_7.22 ; - %load/vec4 v0000000001158960_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v0000000001158960_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000115a620_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011597c0, 0, 4; - %jmp T_7.24; -T_7.23 ; - %load/vec4 v0000000001158960_0; - %parti/s 1, 31, 6; - %replicate 16; - %load/vec4 v0000000001158960_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000115a620_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011597c0, 0, 4; - %jmp T_7.24; -T_7.24 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.7 ; - %load/vec4 v0000000001159680_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.25, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.26, 6; - %jmp T_7.27; -T_7.25 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v0000000001158960_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000115a620_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011597c0, 0, 4; - %jmp T_7.27; -T_7.26 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v0000000001158960_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000115a620_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011597c0, 0, 4; - %jmp T_7.27; -T_7.27 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.8 ; - %load/vec4 v0000000001159680_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.28, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.29, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.30, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.31, 6; - %jmp T_7.32; -T_7.28 ; - %load/vec4 v0000000001158960_0; - %parti/s 8, 0, 2; - %load/vec4 v000000000115a620_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 24, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v00000000011597c0, 4, 5; - %jmp T_7.32; -T_7.29 ; - %load/vec4 v0000000001158960_0; - %parti/s 16, 0, 2; - %load/vec4 v000000000115a620_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 16, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v00000000011597c0, 4, 5; - %jmp T_7.32; -T_7.30 ; - %load/vec4 v0000000001158960_0; - %parti/s 24, 0, 2; - %load/vec4 v000000000115a620_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 8, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v00000000011597c0, 4, 5; - %jmp T_7.32; -T_7.31 ; - %load/vec4 v0000000001158960_0; - %load/vec4 v000000000115a620_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011597c0, 0, 4; - %jmp T_7.32; -T_7.32 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.9 ; - %load/vec4 v0000000001159680_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.33, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.34, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.35, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.36, 6; - %jmp T_7.37; -T_7.33 ; - %load/vec4 v0000000001158960_0; - %load/vec4 v000000000115a620_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011597c0, 0, 4; - %jmp T_7.37; -T_7.34 ; - %load/vec4 v0000000001158960_0; - %parti/s 24, 8, 5; - %load/vec4 v000000000115a620_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011597c0, 0, 4; - %jmp T_7.37; -T_7.35 ; - %load/vec4 v0000000001158960_0; - %parti/s 16, 16, 6; - %load/vec4 v000000000115a620_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011597c0, 0, 4; - %jmp T_7.37; -T_7.36 ; - %load/vec4 v0000000001158960_0; - %parti/s 8, 24, 6; - %load/vec4 v000000000115a620_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011597c0, 0, 4; - %jmp T_7.37; -T_7.37 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.11 ; - %pop/vec4 1; -T_7.2 ; -T_7.1 ; - %jmp T_7; - .thread T_7; - .scope S_00000000010f5fc0; -T_8 ; -Ewait_1 .event/or E_0000000001137750, E_0x0; - %wait Ewait_1; - %load/vec4 v000000000115a800_0; - %dup/vec4; - %pushi/vec4 0, 0, 5; - %cmp/u; - %jmp/1 T_8.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 5; - %cmp/u; - %jmp/1 T_8.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 5; - %cmp/u; - %jmp/1 T_8.2, 6; - %dup/vec4; - %pushi/vec4 3, 0, 5; - %cmp/u; - %jmp/1 T_8.3, 6; - %dup/vec4; - %pushi/vec4 4, 0, 5; - %cmp/u; - %jmp/1 T_8.4, 6; - %dup/vec4; - %pushi/vec4 5, 0, 5; - %cmp/u; - %jmp/1 T_8.5, 6; - %dup/vec4; - %pushi/vec4 6, 0, 5; - %cmp/u; - %jmp/1 T_8.6, 6; - %dup/vec4; - %pushi/vec4 7, 0, 5; - %cmp/u; - %jmp/1 T_8.7, 6; - %dup/vec4; - %pushi/vec4 8, 0, 5; - %cmp/u; - %jmp/1 T_8.8, 6; - %dup/vec4; - %pushi/vec4 9, 0, 5; - %cmp/u; - %jmp/1 T_8.9, 6; - %dup/vec4; - %pushi/vec4 10, 0, 5; - %cmp/u; - %jmp/1 T_8.10, 6; - %dup/vec4; - %pushi/vec4 11, 0, 5; - %cmp/u; - %jmp/1 T_8.11, 6; - %dup/vec4; - %pushi/vec4 12, 0, 5; - %cmp/u; - %jmp/1 T_8.12, 6; - %dup/vec4; - %pushi/vec4 13, 0, 5; - %cmp/u; - %jmp/1 T_8.13, 6; - %dup/vec4; - %pushi/vec4 14, 0, 5; - %cmp/u; - %jmp/1 T_8.14, 6; - %dup/vec4; - %pushi/vec4 15, 0, 5; - %cmp/u; - %jmp/1 T_8.15, 6; - %dup/vec4; - %pushi/vec4 16, 0, 5; - %cmp/u; - %jmp/1 T_8.16, 6; - %dup/vec4; - %pushi/vec4 17, 0, 5; - %cmp/u; - %jmp/1 T_8.17, 6; - %dup/vec4; - %pushi/vec4 18, 0, 5; - %cmp/u; - %jmp/1 T_8.18, 6; - %dup/vec4; - %pushi/vec4 19, 0, 5; - %cmp/u; - %jmp/1 T_8.19, 6; - %dup/vec4; - %pushi/vec4 20, 0, 5; - %cmp/u; - %jmp/1 T_8.20, 6; - %dup/vec4; - %pushi/vec4 21, 0, 5; - %cmp/u; - %jmp/1 T_8.21, 6; - %dup/vec4; - %pushi/vec4 22, 0, 5; - %cmp/u; - %jmp/1 T_8.22, 6; - %dup/vec4; - %pushi/vec4 23, 0, 5; - %cmp/u; - %jmp/1 T_8.23, 6; - %jmp T_8.24; -T_8.0 ; - %load/vec4 v000000000115a3a0_0; - %load/vec4 v0000000001159ae0_0; - %add; - %store/vec4 v000000000115a440_0, 0, 32; - %jmp T_8.24; -T_8.1 ; - %load/vec4 v000000000115a3a0_0; - %load/vec4 v0000000001159ae0_0; - %sub; - %store/vec4 v000000000115a440_0, 0, 32; - %jmp T_8.24; -T_8.2 ; - %load/vec4 v000000000115a3a0_0; - %load/vec4 v0000000001159ae0_0; - %mul; - %store/vec4 v000000000115a440_0, 0, 32; - %jmp T_8.24; -T_8.3 ; - %load/vec4 v000000000115a3a0_0; - %load/vec4 v0000000001159ae0_0; - %div/s; - %store/vec4 v000000000115a440_0, 0, 32; - %jmp T_8.24; -T_8.4 ; - %load/vec4 v000000000115a3a0_0; - %load/vec4 v0000000001159ae0_0; - %and; - %store/vec4 v000000000115a440_0, 0, 32; - %jmp T_8.24; -T_8.5 ; - %load/vec4 v000000000115a3a0_0; - %load/vec4 v0000000001159ae0_0; - %or; - %store/vec4 v000000000115a440_0, 0, 32; - %jmp T_8.24; -T_8.6 ; - %load/vec4 v000000000115a3a0_0; - %load/vec4 v0000000001159ae0_0; - %xor; - %store/vec4 v000000000115a440_0, 0, 32; - %jmp T_8.24; -T_8.7 ; - %load/vec4 v0000000001159ae0_0; - %ix/getv 4, v0000000001158f00_0; - %shiftl 4; - %store/vec4 v000000000115a440_0, 0, 32; - %jmp T_8.24; -T_8.8 ; - %load/vec4 v0000000001159ae0_0; - %ix/getv 4, v000000000115a3a0_0; - %shiftl 4; - %store/vec4 v000000000115a440_0, 0, 32; - %jmp T_8.24; -T_8.9 ; - %load/vec4 v0000000001159ae0_0; - %ix/getv 4, v0000000001158f00_0; - %shiftr 4; - %store/vec4 v000000000115a440_0, 0, 32; - %jmp T_8.24; -T_8.10 ; - %load/vec4 v0000000001159ae0_0; - %ix/getv 4, v000000000115a3a0_0; - %shiftr 4; - %store/vec4 v000000000115a440_0, 0, 32; - %jmp T_8.24; -T_8.11 ; - %load/vec4 v0000000001159ae0_0; - %ix/getv 4, v0000000001158f00_0; - %shiftr 4; - %store/vec4 v000000000115a440_0, 0, 32; - %jmp T_8.24; -T_8.12 ; - %load/vec4 v0000000001159ae0_0; - %ix/getv 4, v000000000115a3a0_0; - %shiftr 4; - %store/vec4 v000000000115a440_0, 0, 32; - %jmp T_8.24; -T_8.13 ; - %load/vec4 v000000000115a3a0_0; - %load/vec4 v0000000001159ae0_0; - %cmp/e; - %jmp/0xz T_8.25, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000115a080_0, 0, 1; - %jmp T_8.26; -T_8.25 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000115a080_0, 0, 1; -T_8.26 ; - %jmp T_8.24; -T_8.14 ; - %load/vec4 v000000000115a3a0_0; - %load/vec4 v0000000001159ae0_0; - %cmp/s; - %jmp/0xz T_8.27, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000115a080_0, 0, 1; - %jmp T_8.28; -T_8.27 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000115a080_0, 0, 1; -T_8.28 ; - %jmp T_8.24; -T_8.15 ; - %load/vec4 v000000000115a3a0_0; - %load/vec4 v0000000001159ae0_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.29, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000115a080_0, 0, 1; - %jmp T_8.30; -T_8.29 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000115a080_0, 0, 1; -T_8.30 ; - %jmp T_8.24; -T_8.16 ; - %load/vec4 v0000000001159ae0_0; - %load/vec4 v000000000115a3a0_0; - %cmp/s; - %jmp/0xz T_8.31, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000115a080_0, 0, 1; - %jmp T_8.32; -T_8.31 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000115a080_0, 0, 1; -T_8.32 ; - %jmp T_8.24; -T_8.17 ; - %load/vec4 v0000000001159ae0_0; - %load/vec4 v000000000115a3a0_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.33, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000115a080_0, 0, 1; - %jmp T_8.34; -T_8.33 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000115a080_0, 0, 1; -T_8.34 ; - %jmp T_8.24; -T_8.18 ; - %load/vec4 v000000000115a3a0_0; - %load/vec4 v0000000001159ae0_0; - %cmp/ne; - %jmp/0xz T_8.35, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000115a080_0, 0, 1; - %jmp T_8.36; -T_8.35 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000115a080_0, 0, 1; -T_8.36 ; - %jmp T_8.24; -T_8.19 ; - %load/vec4 v000000000115a3a0_0; - %store/vec4 v000000000115a440_0, 0, 32; - %jmp T_8.24; -T_8.20 ; - %load/vec4 v000000000115a3a0_0; - %load/vec4 v0000000001159ae0_0; - %cmp/s; - %jmp/0xz T_8.37, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v000000000115a440_0, 0, 32; -T_8.37 ; - %jmp T_8.24; -T_8.21 ; - %load/vec4 v000000000115a3a0_0; - %load/vec4 v0000000001159ae0_0; - %cmp/u; - %jmp/0xz T_8.39, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v000000000115a440_0, 0, 32; -T_8.39 ; - %jmp T_8.24; -T_8.22 ; - %load/vec4 v000000000115a3a0_0; - %load/vec4 v0000000001159ae0_0; - %mul; - %store/vec4 v000000000115a440_0, 0, 32; - %jmp T_8.24; -T_8.23 ; - %load/vec4 v000000000115a3a0_0; - %load/vec4 v0000000001159ae0_0; - %div; - %store/vec4 v000000000115a440_0, 0, 32; - %jmp T_8.24; -T_8.24 ; - %pop/vec4 1; - %jmp T_8; - .thread T_8, $push; - .scope S_00000000010f5e30; -T_9 ; - %pushi/vec4 3217031168, 0, 32; - %store/vec4 v00000000011b3a50_0, 0, 32; - %end; - .thread T_9, $init; - .scope S_00000000010f5e30; -T_10 ; -Ewait_2 .event/or E_00000000011362d0, E_0x0; - %wait Ewait_2; - %load/vec4 v00000000011b3410_0; - %store/vec4 v00000000011b34b0_0, 0, 32; - %load/vec4 v00000000011b3370_0; - %store/vec4 v0000000001159360_0, 0, 32; - %load/vec4 v00000000011b3730_0; - %store/vec4 v0000000001158d20_0, 0, 1; - %load/vec4 v00000000011b4270_0; - %store/vec4 v0000000001159cc0_0, 0, 1; - %load/vec4 v00000000011b3190_0; - %store/vec4 v0000000001158e60_0, 0, 32; - %jmp T_10; - .thread T_10, $push; - .scope S_00000000010f5e30; -T_11 ; -Ewait_3 .event/or E_0000000001135a50, E_0x0; - %wait Ewait_3; - %load/vec4 v00000000011b3d70_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.2, 6; - %jmp T_11.3; -T_11.0 ; - %load/vec4 v00000000011b43b0_0; - %parti/s 5, 16, 6; - %store/vec4 v00000000011b4590_0, 0, 5; - %jmp T_11.3; -T_11.1 ; - %load/vec4 v00000000011b43b0_0; - %parti/s 5, 11, 5; - %store/vec4 v00000000011b4590_0, 0, 5; - %jmp T_11.3; -T_11.2 ; - %pushi/vec4 31, 0, 5; - %store/vec4 v00000000011b4590_0, 0, 5; - %jmp T_11.3; -T_11.3 ; - %pop/vec4 1; - %load/vec4 v00000000011b4630_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.6, 6; - %jmp T_11.7; -T_11.4 ; - %load/vec4 v00000000011b3370_0; - %store/vec4 v00000000011b41d0_0, 0, 32; - %jmp T_11.7; -T_11.5 ; - %load/vec4 v0000000001158c80_0; - %store/vec4 v00000000011b41d0_0, 0, 32; - %jmp T_11.7; -T_11.6 ; - %load/vec4 v00000000011b3a50_0; - %addi 8, 0, 32; - %store/vec4 v00000000011b41d0_0, 0, 32; - %jmp T_11.7; -T_11.7 ; - %pop/vec4 1; - %load/vec4 v00000000011b2e70_0; - %dup/vec4; - %pushi/vec4 1, 0, 1; - %cmp/u; - %jmp/1 T_11.8, 6; - %dup/vec4; - %pushi/vec4 0, 0, 1; - %cmp/u; - %jmp/1 T_11.9, 6; - %jmp T_11.10; -T_11.8 ; - %load/vec4 v00000000011b43b0_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v00000000011b43b0_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %store/vec4 v00000000010c8d50_0, 0, 32; - %jmp T_11.10; -T_11.9 ; - %load/vec4 v00000000011b3190_0; - %store/vec4 v00000000010c8d50_0, 0, 32; - %jmp T_11.10; -T_11.10 ; - %pop/vec4 1; - %jmp T_11; - .thread T_11, $push; - .scope S_000000000113aac0; -T_12 ; - %vpi_call/w 3 36 "$dumpfile", "mips_cpu_harvard.vcd" {0 0 0}; - %vpi_call/w 3 37 "$dumpvars", 32'sb00000000000000000000000000000000, S_000000000113aac0 {0 0 0}; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011b4de0_0, 0, 1; - %pushi/vec4 100, 0, 32; -T_12.0 %dup/vec4; - %pushi/vec4 0, 0, 32; - %cmp/s; - %jmp/1xz T_12.1, 5; - %jmp/1 T_12.1, 4; - %pushi/vec4 1, 0, 32; - %sub; - %delay 10, 0; - %load/vec4 v00000000011b4de0_0; - %nor/r; - %store/vec4 v00000000011b4de0_0, 0, 1; - %delay 10, 0; - %load/vec4 v00000000011b4de0_0; - %nor/r; - %store/vec4 v00000000011b4de0_0, 0, 1; - %jmp T_12.0; -T_12.1 ; - %pop/vec4 1; - %vpi_call/w 3 47 "$fatal", 32'sb00000000000000000000000000000010, "Simulation did not finish within %d cycles.", P_0000000001129e08 {0 0 0}; - %end; - .thread T_12; - .scope S_000000000113aac0; -T_13 ; - %vpi_call/w 3 51 "$display", "Initial Reset 0" {0 0 0}; - %pushi/vec4 0, 0, 1; - %assign/vec4 v00000000011b4fc0_0, 0; - %vpi_call/w 3 55 "$display", "Initial Reset 1" {0 0 0}; - %wait E_0000000001137e50; - %pushi/vec4 1, 0, 1; - %assign/vec4 v00000000011b4fc0_0, 0; - %vpi_call/w 3 59 "$display", "Initial Reset 0: Start Program" {0 0 0}; - %wait E_0000000001137e50; - %pushi/vec4 0, 0, 1; - %assign/vec4 v00000000011b4fc0_0, 0; - %wait E_0000000001137e50; - %load/vec4 v00000000011b4ac0_0; - %pad/u 32; - %cmpi/e 1, 0, 32; - %jmp/0xz T_13.0, 4; - %jmp T_13.1; -T_13.0 ; - %vpi_call/w 3 65 "$display", "TB: CPU did not set active=1 after reset." {0 0 0}; -T_13.1 ; -T_13.2 ; - %load/vec4 v00000000011b4ac0_0; - %flag_set/vec4 8; - %jmp/0xz T_13.3, 8; - %wait E_0000000001137e50; - %vpi_call/w 3 71 "$display", "Reg File Write data: %d", v00000000011b41d0_0 {0 0 0}; - %jmp T_13.2; -T_13.3 ; - %wait E_0000000001137e50; - %vpi_call/w 3 74 "$display", "TB: CPU Halt; active=0" {0 0 0}; - %vpi_call/w 3 75 "$display", "Output:" {0 0 0}; - %vpi_call/w 3 76 "$display", "%d", v00000000011b5240_0 {0 0 0}; - %vpi_call/w 3 77 "$finish" {0 0 0}; - %end; - .thread T_13; -# The file index is used to find the file name in the following table. -:file_names 10; - "N/A"; - ""; - "-"; - "testbench/mips_cpu_harvard_tb.v"; - "rtl/mips_cpu_harvard.v"; - "rtl/mips_cpu_alu.v"; - "rtl/mips_cpu_control.v"; - "rtl/mips_cpu_pc.v"; - "rtl/mips_cpu_regfile.v"; - "rtl/mips_cpu_memory.v"; diff --git a/exec/mips_cpu_harvard_tb_ori b/exec/mips_cpu_harvard_tb_ori deleted file mode 100644 index 9942c31..0000000 --- a/exec/mips_cpu_harvard_tb_ori +++ /dev/null @@ -1,2738 +0,0 @@ -#! /usr/local/iverilog/bin/vvp -:ivl_version "11.0 (devel)"; -:ivl_delay_selection "TYPICAL"; -:vpi_time_precision + 0; -:vpi_module "C:\iverilog\lib\ivl\system.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_sys.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_textio.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2005_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\va_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2009.vpi"; -S_000000000112c010 .scope package, "$unit" "$unit" 2 1; - .timescale 0 0; -S_000000000112a580 .scope module, "mips_cpu_harvard_tb" "mips_cpu_harvard_tb" 3 1; - .timescale 0 0; -P_00000000010f3ef0 .param/str "RAM_INIT_FILE" 0 3 3, "inputs/ori.txt"; -P_00000000010f3f28 .param/l "TIMEOUT_CYCLES" 0 3 4, +C4<00000000000000000000000001100100>; -v0000000001184fa0_0 .net "active", 0 0, v0000000001129380_0; 1 drivers -v0000000001184b40_0 .var "clk", 0 0; -v0000000001186800_0 .var "clk_enable", 0 0; -v0000000001184d20_0 .net "data_address", 31 0, v0000000001129e20_0; 1 drivers -v00000000011859a0_0 .net "data_read", 0 0, v0000000001129ec0_0; 1 drivers -v00000000011863a0_0 .net "data_readdata", 31 0, L_0000000001184be0; 1 drivers -v0000000001185040_0 .net "data_write", 0 0, v0000000001129f60_0; 1 drivers -v0000000001186300_0 .net "data_writedata", 31 0, v000000000112a1e0_0; 1 drivers -v0000000001186080_0 .net "instr_address", 31 0, v0000000001184070_0; 1 drivers -v0000000001184c80_0 .net "instr_readdata", 31 0, L_0000000001185180; 1 drivers -v00000000011869e0_0 .net "register_v0", 31 0, L_000000000111b8c0; 1 drivers -v00000000011868a0_0 .var "reset", 0 0; -S_000000000112b580 .scope module, "cpuInst" "mips_cpu_harvard" 3 19, 4 1 0, S_000000000112a580; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "reset"; - .port_info 2 /OUTPUT 1 "active"; - .port_info 3 /OUTPUT 32 "register_v0"; - .port_info 4 /INPUT 1 "clk_enable"; - .port_info 5 /OUTPUT 32 "instr_address"; - .port_info 6 /INPUT 32 "instr_readdata"; - .port_info 7 /OUTPUT 32 "data_address"; - .port_info 8 /OUTPUT 1 "data_write"; - .port_info 9 /OUTPUT 1 "data_read"; - .port_info 10 /OUTPUT 32 "data_writedata"; - .port_info 11 /INPUT 32 "data_readdata"; -v000000000112a280_0 .net "active", 0 0, v0000000001129380_0; alias, 1 drivers -v0000000001129ce0_0 .net "clk", 0 0, v0000000001184b40_0; 1 drivers -v0000000001129d80_0 .net "clk_enable", 0 0, v0000000001186800_0; 1 drivers -v0000000001129e20_0 .var "data_address", 31 0; -v0000000001129ec0_0 .var "data_read", 0 0; -v000000000112a000_0 .net "data_readdata", 31 0, L_0000000001184be0; alias, 1 drivers -v0000000001129f60_0 .var "data_write", 0 0; -v000000000112a1e0_0 .var "data_writedata", 31 0; -v0000000001099930_0 .var "in_B", 31 0; -v0000000001182e50_0 .net "in_opcode", 5 0, L_0000000001185360; 1 drivers -v00000000011835d0_0 .net "in_pc_in", 31 0, v00000000011294c0_0; 1 drivers -v0000000001183e90_0 .net "in_readreg1", 4 0, L_0000000001186120; 1 drivers -v0000000001183cb0_0 .net "in_readreg2", 4 0, L_0000000001185c20; 1 drivers -v00000000011833f0_0 .var "in_writedata", 31 0; -v0000000001183990_0 .var "in_writereg", 4 0; -v0000000001184070_0 .var "instr_address", 31 0; -v0000000001182d10_0 .net "instr_readdata", 31 0, L_0000000001185180; alias, 1 drivers -v0000000001184570_0 .net "out_ALUCond", 0 0, v0000000001129060_0; 1 drivers -v0000000001184610_0 .net "out_ALUOp", 4 0, v0000000001128f20_0; 1 drivers -v0000000001183d50_0 .net "out_ALURes", 31 0, v0000000001128980_0; 1 drivers -v0000000001183670_0 .net "out_ALUSrc", 0 0, v00000000011291a0_0; 1 drivers -v0000000001183350_0 .net "out_MemRead", 0 0, v00000000011297e0_0; 1 drivers -v0000000001183df0_0 .net "out_MemWrite", 0 0, v00000000011292e0_0; 1 drivers -v0000000001183210_0 .net "out_MemtoReg", 1 0, v0000000001128a20_0; 1 drivers -v00000000011846b0_0 .net "out_PC", 1 0, v0000000001129ba0_0; 1 drivers -v0000000001183710_0 .net "out_RegDst", 1 0, v0000000001128b60_0; 1 drivers -v0000000001183fd0_0 .net "out_RegWrite", 0 0, v0000000001129240_0; 1 drivers -v0000000001182ef0_0 .var "out_pc_out", 31 0; -v0000000001184390_0 .net "out_readdata1", 31 0, v0000000001129600_0; 1 drivers -v0000000001183490_0 .net "out_readdata2", 31 0, v00000000011296a0_0; 1 drivers -v0000000001184250_0 .net "out_shamt", 4 0, v0000000001128de0_0; 1 drivers -v00000000011841b0_0 .net "register_v0", 31 0, L_000000000111b8c0; alias, 1 drivers -v0000000001183f30_0 .net "reset", 0 0, v00000000011868a0_0; 1 drivers -E_0000000001105ac0/0 .event edge, v0000000001128b60_0, v0000000001129420_0, v0000000001129420_0, v0000000001128a20_0; -E_0000000001105ac0/1 .event edge, v0000000001128980_0, v000000000112a000_0, v00000000011288e0_0, v00000000011291a0_0; -E_0000000001105ac0/2 .event edge, v0000000001129420_0, v0000000001129420_0, v00000000011296a0_0; -E_0000000001105ac0 .event/or E_0000000001105ac0/0, E_0000000001105ac0/1, E_0000000001105ac0/2; -E_0000000001105c00/0 .event edge, v00000000011294c0_0, v0000000001128980_0, v00000000011292e0_0, v00000000011297e0_0; -E_0000000001105c00/1 .event edge, v00000000011296a0_0; -E_0000000001105c00 .event/or E_0000000001105c00/0, E_0000000001105c00/1; -L_0000000001186120 .part L_0000000001185180, 21, 5; -L_0000000001185c20 .part L_0000000001185180, 16, 5; -L_0000000001185360 .part L_0000000001185180, 26, 6; -S_000000000112b710 .scope module, "alu" "mips_cpu_alu" 4 121, 5 1 0, S_000000000112b580; - .timescale 0 0; - .port_info 0 /INPUT 32 "A"; - .port_info 1 /INPUT 32 "B"; - .port_info 2 /INPUT 5 "ALUOp"; - .port_info 3 /INPUT 5 "shamt"; - .port_info 4 /OUTPUT 1 "ALUCond"; - .port_info 5 /OUTPUT 32 "ALURes"; -enum000000000100bd00 .enum4 (5) - "ADD" 5'b00000, - "SUB" 5'b00001, - "MUL" 5'b00010, - "DIV" 5'b00011, - "AND" 5'b00100, - "OR" 5'b00101, - "XOR" 5'b00110, - "SLL" 5'b00111, - "SLLV" 5'b01000, - "SRL" 5'b01001, - "SRLV" 5'b01010, - "SRA" 5'b01011, - "SRAV" 5'b01100, - "EQ" 5'b01101, - "LES" 5'b01110, - "LEQ" 5'b01111, - "GRT" 5'b10000, - "GEQ" 5'b10001, - "NEQ" 5'b10010, - "PAS" 5'b10011, - "SLT" 5'b10100, - "SLTU" 5'b10101, - "MULU" 5'b10110, - "DIVU" 5'b10111 - ; -L_000000000111bc40 .functor BUFZ 5, v0000000001128f20_0, C4<00000>, C4<00000>, C4<00000>; -v000000000112a460_0 .net "A", 31 0, v0000000001129600_0; alias, 1 drivers -v0000000001129060_0 .var "ALUCond", 0 0; -v000000000112a140_0 .net "ALUOp", 4 0, v0000000001128f20_0; alias, 1 drivers -v00000000011285c0_0 .net "ALUOps", 4 0, L_000000000111bc40; 1 drivers -v0000000001128980_0 .var/s "ALURes", 31 0; -v0000000001128c00_0 .net "B", 31 0, v0000000001099930_0; 1 drivers -v0000000001128660_0 .net "shamt", 4 0, v0000000001128de0_0; alias, 1 drivers -E_0000000001107a80 .event edge, v00000000011285c0_0, v000000000112a460_0, v0000000001128c00_0, v0000000001128660_0; -S_00000000010c9390 .scope module, "control" "mips_cpu_control" 4 90, 6 1 0, S_000000000112b580; - .timescale 0 0; - .port_info 0 /INPUT 32 "Instr"; - .port_info 1 /INPUT 1 "ALUCond"; - .port_info 2 /OUTPUT 2 "CtrlRegDst"; - .port_info 3 /OUTPUT 2 "CtrlPC"; - .port_info 4 /OUTPUT 1 "CtrlMemRead"; - .port_info 5 /OUTPUT 2 "CtrlMemtoReg"; - .port_info 6 /OUTPUT 5 "CtrlALUOp"; - .port_info 7 /OUTPUT 5 "Ctrlshamt"; - .port_info 8 /OUTPUT 1 "CtrlMemWrite"; - .port_info 9 /OUTPUT 1 "CtrlALUSrc"; - .port_info 10 /OUTPUT 1 "CtrlRegWrite"; -enum0000000001009270 .enum4 (5) - "BLTZ" 5'b00000, - "BGEZ" 5'b00001, - "BLTZAL" 5'b10000, - "BGEZAL" 5'b10001 - ; -enum0000000001009730 .enum4 (6) - "SPECIAL" 6'b000000, - "REGIMM" 6'b000001, - "J" 6'b000010, - "JAL" 6'b000011, - "BEQ" 6'b000100, - "BNE" 6'b000101, - "BLEZ" 6'b000110, - "BGTZ" 6'b000111, - "ADDI" 6'b001000, - "ADDIU" 6'b001001, - "SLTI" 6'b001010, - "SLTIU" 6'b001011, - "ANDI" 6'b001100, - "ORI" 6'b001101, - "XORI" 6'b001110, - "LUI" 6'b001111, - "LB" 6'b100000, - "LH" 6'b100001, - "LWL" 6'b100010, - "LW" 6'b100011, - "LBU" 6'b100100, - "LHU" 6'b100101, - "LWR" 6'b100110, - "SB" 6'b101000, - "SH" 6'b101001, - "SW" 6'b101011 - ; -enum000000000100b7f0 .enum4 (6) - "SLL" 6'b000000, - "SRL" 6'b000010, - "SRA" 6'b000011, - "SLLV" 6'b000100, - "SRLV" 6'b000110, - "SRAV" 6'b000111, - "JR" 6'b001000, - "JALR" 6'b001001, - "MTHI" 6'b010001, - "MTLO" 6'b010011, - "MULT" 6'b011000, - "MULTU" 6'b011001, - "DIV" 6'b011010, - "DIVU" 6'b011011, - "ADDU" 6'b100001, - "SUBU" 6'b100011, - "AND" 6'b100100, - "OR" 6'b100101, - "XOR" 6'b100110, - "SLT" 6'b101010, - "SLTU" 6'b101011 - ; -v0000000001129100_0 .net "ALUCond", 0 0, v0000000001129060_0; alias, 1 drivers -v0000000001128f20_0 .var "CtrlALUOp", 4 0; -v00000000011291a0_0 .var "CtrlALUSrc", 0 0; -v00000000011297e0_0 .var "CtrlMemRead", 0 0; -v00000000011292e0_0 .var "CtrlMemWrite", 0 0; -v0000000001128a20_0 .var "CtrlMemtoReg", 1 0; -v0000000001129ba0_0 .var "CtrlPC", 1 0; -v0000000001128b60_0 .var "CtrlRegDst", 1 0; -v0000000001129240_0 .var "CtrlRegWrite", 0 0; -v0000000001128de0_0 .var "Ctrlshamt", 4 0; -v0000000001129420_0 .net "Instr", 31 0, L_0000000001185180; alias, 1 drivers -v0000000001128700_0 .net "funct", 5 0, L_0000000001185f40; 1 drivers -v0000000001128e80_0 .net "op", 5 0, L_0000000001185cc0; 1 drivers -v0000000001128ac0_0 .net "rt", 4 0, L_0000000001185400; 1 drivers -E_0000000001106ec0/0 .event edge, v0000000001128e80_0, v0000000001128700_0, v0000000001129060_0, v0000000001128ac0_0; -E_0000000001106ec0/1 .event edge, v0000000001129420_0; -E_0000000001106ec0 .event/or E_0000000001106ec0/0, E_0000000001106ec0/1; -L_0000000001185cc0 .part L_0000000001185180, 26, 6; -L_0000000001185f40 .part L_0000000001185180, 0, 6; -L_0000000001185400 .part L_0000000001185180, 16, 5; -S_00000000010c9520 .scope module, "pc" "pc" 4 79, 7 1 0, S_000000000112b580; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "rst"; - .port_info 2 /INPUT 2 "pc_ctrl"; - .port_info 3 /INPUT 32 "pc_in"; - .port_info 4 /INPUT 5 "rs"; - .port_info 5 /OUTPUT 32 "pc_out"; - .port_info 6 /OUTPUT 1 "active"; -v0000000001129380_0 .var "active", 0 0; -v00000000011287a0_0 .net "clk", 0 0, v0000000001184b40_0; alias, 1 drivers -v0000000001128840_0 .net "pc_ctrl", 1 0, v0000000001129ba0_0; alias, 1 drivers -v0000000001129920_0 .var "pc_curr", 31 0; -v00000000011288e0_0 .net "pc_in", 31 0, v0000000001182ef0_0; 1 drivers -v00000000011294c0_0 .var "pc_out", 31 0; -o000000000112d1d8 .functor BUFZ 5, C4; HiZ drive -v000000000112a320_0 .net "rs", 4 0, o000000000112d1d8; 0 drivers -v0000000001128fc0_0 .net "rst", 0 0, v00000000011868a0_0; alias, 1 drivers -E_0000000001107bc0 .event posedge, v00000000011287a0_0; -S_00000000010c96b0 .scope module, "regfile" "mips_cpu_regfile" 4 106, 8 1 0, S_000000000112b580; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 5 "readreg1"; - .port_info 2 /INPUT 5 "readreg2"; - .port_info 3 /INPUT 5 "writereg"; - .port_info 4 /INPUT 32 "writedata"; - .port_info 5 /INPUT 1 "regwrite"; - .port_info 6 /INPUT 6 "opcode"; - .port_info 7 /OUTPUT 32 "readdata1"; - .port_info 8 /OUTPUT 32 "readdata2"; - .port_info 9 /OUTPUT 32 "regv0"; -v0000000001129560_2 .array/port v0000000001129560, 2; -L_000000000111b8c0 .functor BUFZ 32, v0000000001129560_2, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; -v0000000001129740_0 .net "clk", 0 0, v0000000001184b40_0; alias, 1 drivers -v0000000001129560 .array "memory", 0 31, 31 0; -v0000000001128d40_0 .net "opcode", 5 0, L_0000000001185360; alias, 1 drivers -v0000000001129600_0 .var "readdata1", 31 0; -v00000000011296a0_0 .var "readdata2", 31 0; -v00000000011299c0_0 .net "readreg1", 4 0, L_0000000001186120; alias, 1 drivers -v0000000001129880_0 .net "readreg2", 4 0, L_0000000001185c20; alias, 1 drivers -v000000000112a0a0_0 .net "regv0", 31 0, L_000000000111b8c0; alias, 1 drivers -v0000000001129a60_0 .net "regwrite", 0 0, v0000000001129240_0; alias, 1 drivers -v0000000001129b00_0 .net "writedata", 31 0, v00000000011833f0_0; 1 drivers -v0000000001129c40_0 .net "writereg", 4 0, v0000000001183990_0; 1 drivers -E_0000000001107b80 .event negedge, v00000000011287a0_0; -v0000000001129560_0 .array/port v0000000001129560, 0; -v0000000001129560_1 .array/port v0000000001129560, 1; -E_0000000001107d00/0 .event edge, v00000000011299c0_0, v0000000001129560_0, v0000000001129560_1, v0000000001129560_2; -v0000000001129560_3 .array/port v0000000001129560, 3; -v0000000001129560_4 .array/port v0000000001129560, 4; -v0000000001129560_5 .array/port v0000000001129560, 5; -v0000000001129560_6 .array/port v0000000001129560, 6; -E_0000000001107d00/1 .event edge, v0000000001129560_3, v0000000001129560_4, v0000000001129560_5, v0000000001129560_6; -v0000000001129560_7 .array/port v0000000001129560, 7; -v0000000001129560_8 .array/port v0000000001129560, 8; -v0000000001129560_9 .array/port v0000000001129560, 9; -v0000000001129560_10 .array/port v0000000001129560, 10; -E_0000000001107d00/2 .event edge, v0000000001129560_7, v0000000001129560_8, v0000000001129560_9, v0000000001129560_10; -v0000000001129560_11 .array/port v0000000001129560, 11; -v0000000001129560_12 .array/port v0000000001129560, 12; -v0000000001129560_13 .array/port v0000000001129560, 13; -v0000000001129560_14 .array/port v0000000001129560, 14; -E_0000000001107d00/3 .event edge, v0000000001129560_11, v0000000001129560_12, v0000000001129560_13, v0000000001129560_14; -v0000000001129560_15 .array/port v0000000001129560, 15; -v0000000001129560_16 .array/port v0000000001129560, 16; -v0000000001129560_17 .array/port v0000000001129560, 17; -v0000000001129560_18 .array/port v0000000001129560, 18; -E_0000000001107d00/4 .event edge, v0000000001129560_15, v0000000001129560_16, v0000000001129560_17, v0000000001129560_18; -v0000000001129560_19 .array/port v0000000001129560, 19; -v0000000001129560_20 .array/port v0000000001129560, 20; -v0000000001129560_21 .array/port v0000000001129560, 21; -v0000000001129560_22 .array/port v0000000001129560, 22; -E_0000000001107d00/5 .event edge, v0000000001129560_19, v0000000001129560_20, v0000000001129560_21, v0000000001129560_22; -v0000000001129560_23 .array/port v0000000001129560, 23; -v0000000001129560_24 .array/port v0000000001129560, 24; -v0000000001129560_25 .array/port v0000000001129560, 25; -v0000000001129560_26 .array/port v0000000001129560, 26; -E_0000000001107d00/6 .event edge, v0000000001129560_23, v0000000001129560_24, v0000000001129560_25, v0000000001129560_26; -v0000000001129560_27 .array/port v0000000001129560, 27; -v0000000001129560_28 .array/port v0000000001129560, 28; -v0000000001129560_29 .array/port v0000000001129560, 29; -v0000000001129560_30 .array/port v0000000001129560, 30; -E_0000000001107d00/7 .event edge, v0000000001129560_27, v0000000001129560_28, v0000000001129560_29, v0000000001129560_30; -v0000000001129560_31 .array/port v0000000001129560, 31; -E_0000000001107d00/8 .event edge, v0000000001129560_31, v0000000001129880_0; -E_0000000001107d00 .event/or E_0000000001107d00/0, E_0000000001107d00/1, E_0000000001107d00/2, E_0000000001107d00/3, E_0000000001107d00/4, E_0000000001107d00/5, E_0000000001107d00/6, E_0000000001107d00/7, E_0000000001107d00/8; -S_00000000010b91d0 .scope begin, "$unm_blk_121" "$unm_blk_121" 8 16, 8 16 0, S_00000000010c96b0; - .timescale 0 0; -v0000000001128ca0_0 .var/i "i", 31 0; -S_00000000010b9470 .scope module, "ramInst" "mips_cpu_memory" 3 9, 9 1 0, S_000000000112a580; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 32 "data_address"; - .port_info 2 /INPUT 1 "data_write"; - .port_info 3 /INPUT 1 "data_read"; - .port_info 4 /INPUT 32 "data_writedata"; - .port_info 5 /OUTPUT 32 "data_readdata"; - .port_info 6 /INPUT 32 "instr_address"; - .port_info 7 /OUTPUT 32 "instr_readdata"; -P_0000000001107d80 .param/str "RAM_INIT_FILE" 0 9 16, "inputs/ori.txt"; -L_000000000111baf0 .functor AND 1, L_00000000011852c0, L_0000000001185860, C4<1>, C4<1>; -v0000000001182db0_0 .net *"_ivl_0", 31 0, L_0000000001184dc0; 1 drivers -L_0000000001187ba8 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v0000000001184110_0 .net/2u *"_ivl_12", 31 0, L_0000000001187ba8; 1 drivers -v00000000011847f0_0 .net *"_ivl_14", 0 0, L_00000000011852c0; 1 drivers -L_0000000001187bf0 .functor BUFT 1, C4<10111111110000000000000001000000>, C4<0>, C4<0>, C4<0>; -v0000000001184750_0 .net/2u *"_ivl_16", 31 0, L_0000000001187bf0; 1 drivers -v00000000011837b0_0 .net *"_ivl_18", 0 0, L_0000000001185860; 1 drivers -v0000000001184930_0 .net *"_ivl_2", 31 0, L_0000000001186940; 1 drivers -v0000000001184890_0 .net *"_ivl_21", 0 0, L_000000000111baf0; 1 drivers -v0000000001182f90_0 .net *"_ivl_22", 31 0, L_0000000001185900; 1 drivers -L_0000000001187c38 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v0000000001183030_0 .net/2u *"_ivl_24", 31 0, L_0000000001187c38; 1 drivers -v00000000011842f0_0 .net *"_ivl_26", 31 0, L_0000000001186580; 1 drivers -v0000000001184430_0 .net *"_ivl_28", 31 0, L_0000000001185a40; 1 drivers -v00000000011844d0_0 .net *"_ivl_30", 29 0, L_0000000001184e60; 1 drivers -L_0000000001187c80 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v00000000011849d0_0 .net *"_ivl_32", 1 0, L_0000000001187c80; 1 drivers -L_0000000001187cc8 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v00000000011830d0_0 .net *"_ivl_34", 31 0, L_0000000001187cc8; 1 drivers -v0000000001182b30_0 .net *"_ivl_4", 29 0, L_00000000011850e0; 1 drivers -L_0000000001187b18 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0000000001182bd0_0 .net *"_ivl_6", 1 0, L_0000000001187b18; 1 drivers -L_0000000001187b60 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v0000000001183c10_0 .net *"_ivl_8", 31 0, L_0000000001187b60; 1 drivers -v0000000001183850_0 .net "clk", 0 0, v0000000001184b40_0; alias, 1 drivers -v0000000001183170_0 .net "data_address", 31 0, v0000000001129e20_0; alias, 1 drivers -v00000000011832b0 .array "data_memory", 63 0, 31 0; -v00000000011838f0_0 .net "data_read", 0 0, v0000000001129ec0_0; alias, 1 drivers -v0000000001183b70_0 .net "data_readdata", 31 0, L_0000000001184be0; alias, 1 drivers -v0000000001183a30_0 .net "data_write", 0 0, v0000000001129f60_0; alias, 1 drivers -v0000000001183ad0_0 .net "data_writedata", 31 0, v000000000112a1e0_0; alias, 1 drivers -v0000000001185220_0 .net "instr_address", 31 0, v0000000001184070_0; alias, 1 drivers -v0000000001185ea0 .array "instr_memory", 63 0, 31 0; -v0000000001184f00_0 .net "instr_readdata", 31 0, L_0000000001185180; alias, 1 drivers -L_0000000001184dc0 .array/port v00000000011832b0, L_0000000001186940; -L_00000000011850e0 .part v0000000001129e20_0, 2, 30; -L_0000000001186940 .concat [ 30 2 0 0], L_00000000011850e0, L_0000000001187b18; -L_0000000001184be0 .functor MUXZ 32, L_0000000001187b60, L_0000000001184dc0, v0000000001129ec0_0, C4<>; -L_00000000011852c0 .cmp/ge 32, v0000000001184070_0, L_0000000001187ba8; -L_0000000001185860 .cmp/gt 32, L_0000000001187bf0, v0000000001184070_0; -L_0000000001185900 .array/port v0000000001185ea0, L_0000000001185a40; -L_0000000001186580 .arith/sub 32, v0000000001184070_0, L_0000000001187c38; -L_0000000001184e60 .part L_0000000001186580, 2, 30; -L_0000000001185a40 .concat [ 30 2 0 0], L_0000000001184e60, L_0000000001187c80; -L_0000000001185180 .functor MUXZ 32, L_0000000001187cc8, L_0000000001185900, L_000000000111baf0, C4<>; -S_00000000010ae5e0 .scope begin, "$unm_blk_104" "$unm_blk_104" 9 21, 9 21 0, S_00000000010b9470; - .timescale 0 0; -v0000000001182c70_0 .var/i "i", 31 0; -S_0000000001072680 .scope begin, "$ivl_for_loop0" "$ivl_for_loop0" 9 36, 9 36 0, S_00000000010ae5e0; - .timescale 0 0; -v0000000001183530_0 .var/i "j", 31 0; - .scope S_00000000010b9470; -T_0 ; - %fork t_1, S_00000000010ae5e0; - %jmp t_0; - .scope S_00000000010ae5e0; -t_1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v0000000001182c70_0, 0, 32; -T_0.0 ; - %load/vec4 v0000000001182c70_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v0000000001182c70_0; - %store/vec4a v00000000011832b0, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0000000001182c70_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v0000000001182c70_0, 0, 32; - %jmp T_0.0; -T_0.1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v0000000001182c70_0, 0, 32; -T_0.2 ; - %load/vec4 v0000000001182c70_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.3, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v0000000001182c70_0; - %store/vec4a v0000000001185ea0, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0000000001182c70_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v0000000001182c70_0, 0, 32; - %jmp T_0.2; -T_0.3 ; - %vpi_call/w 9 32 "$display", "RAM: Loading RAM contents from %s", P_0000000001107d80 {0 0 0}; - %vpi_call/w 9 33 "$readmemh", P_0000000001107d80, v0000000001185ea0 {0 0 0}; - %fork t_3, S_0000000001072680; - %jmp t_2; - .scope S_0000000001072680; -t_3 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v0000000001183530_0, 0, 32; -T_0.4 ; - %load/vec4 v0000000001183530_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.5, 5; - %pushi/vec4 3217031168, 0, 32; - %load/vec4 v0000000001183530_0; - %muli 4, 0, 32; - %add; - %vpi_call/w 9 37 "$display", "byte +%h: %h", S<0,vec4,u32>, &A {1 0 0}; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0000000001183530_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v0000000001183530_0, 0, 32; - %jmp T_0.4; -T_0.5 ; - %end; - .scope S_00000000010ae5e0; -t_2 %join; - %end; - .scope S_00000000010b9470; -t_0 %join; - %end; - .thread T_0; - .scope S_00000000010b9470; -T_1 ; - %wait E_0000000001107bc0; - %load/vec4 v00000000011838f0_0; - %nor/r; - %load/vec4 v0000000001183a30_0; - %and; - %flag_set/vec4 8; - %jmp/0xz T_1.0, 8; - %load/vec4 v0000000001185220_0; - %load/vec4 v0000000001183170_0; - %cmp/ne; - %jmp/0xz T_1.2, 4; - %load/vec4 v0000000001183ad0_0; - %load/vec4 v0000000001183170_0; - %ix/load 4, 2, 0; - %flag_set/imm 4, 0; - %shiftr 4; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011832b0, 0, 4; -T_1.2 ; -T_1.0 ; - %jmp T_1; - .thread T_1; - .scope S_00000000010c9520; -T_2 ; - %load/vec4 v00000000011288e0_0; - %store/vec4 v00000000011294c0_0, 0, 32; - %end; - .thread T_2; - .scope S_00000000010c9520; -T_3 ; - %wait E_0000000001107bc0; - %load/vec4 v0000000001128fc0_0; - %flag_set/vec4 8; - %jmp/0xz T_3.0, 8; - %pushi/vec4 1, 0, 1; - %assign/vec4 v0000000001129380_0, 0; - %pushi/vec4 3217031168, 0, 32; - %assign/vec4 v00000000011294c0_0, 0; - %jmp T_3.1; -T_3.0 ; - %load/vec4 v00000000011294c0_0; - %cmpi/ne 0, 0, 32; - %jmp/0xz T_3.2, 4; - %load/vec4 v0000000001129380_0; - %assign/vec4 v0000000001129380_0, 0; - %load/vec4 v0000000001128840_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_3.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_3.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_3.6, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_3.7, 6; - %jmp T_3.8; -T_3.4 ; - %load/vec4 v00000000011294c0_0; - %assign/vec4 v0000000001129920_0, 0; - %load/vec4 v0000000001129920_0; - %addi 4, 0, 32; - %assign/vec4 v00000000011294c0_0, 0; - %vpi_call/w 7 27 "$display", "New PC from %h to %h", v0000000001129920_0, v00000000011294c0_0 {0 0 0}; - %jmp T_3.8; -T_3.5 ; - %load/vec4 v00000000011288e0_0; - %assign/vec4 v00000000011294c0_0, 0; - %jmp T_3.8; -T_3.6 ; - %load/vec4 v00000000011288e0_0; - %assign/vec4 v00000000011294c0_0, 0; - %jmp T_3.8; -T_3.7 ; - %vpi_call/w 7 36 "$display", "JUMP REGISTER" {0 0 0}; - %pushi/vec4 0, 0, 32; - %assign/vec4 v00000000011294c0_0, 0; - %jmp T_3.8; -T_3.8 ; - %pop/vec4 1; - %jmp T_3.3; -T_3.2 ; - %load/vec4 v00000000011294c0_0; - %cmpi/e 0, 0, 32; - %jmp/0xz T_3.9, 4; - %pushi/vec4 0, 0, 1; - %assign/vec4 v0000000001129380_0, 0; -T_3.9 ; -T_3.3 ; -T_3.1 ; - %jmp T_3; - .thread T_3; - .scope S_00000000010c9390; -T_4 ; - %wait E_0000000001106ec0; - %vpi_call/w 6 86 "$display", "Opcode: %h", v0000000001128e80_0 {0 0 0}; - %load/vec4 v0000000001128e80_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.0, 4; - %pushi/vec4 0, 0, 2; - %store/vec4 v0000000001128b60_0, 0, 2; - %vpi_call/w 6 89 "$display", "CTRLREGDST: Rt" {0 0 0}; - %jmp T_4.1; -T_4.0 ; - %load/vec4 v0000000001128e80_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128700_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128700_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.2, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v0000000001128b60_0, 0, 2; - %vpi_call/w 6 92 "$display", "CTRLREGDST: Rd" {0 0 0}; - %jmp T_4.3; -T_4.2 ; - %load/vec4 v0000000001128e80_0; - %cmpi/e 3, 0, 6; - %jmp/0xz T_4.4, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v0000000001128b60_0, 0, 2; - %vpi_call/w 6 95 "$display", "CTRLREGDST: Link" {0 0 0}; - %jmp T_4.5; -T_4.4 ; - %pushi/vec4 1, 1, 2; - %store/vec4 v0000000001128b60_0, 0, 2; - %vpi_call/w 6 96 "$display", "xxxxxxxxxxxxxx" {0 0 0}; -T_4.5 ; -T_4.3 ; -T_4.1 ; - %load/vec4 v0000000001129100_0; - %load/vec4 v0000000001128e80_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128e80_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128e80_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128e80_0; - %pushi/vec4 5, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128e80_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128ac0_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128ac0_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128ac0_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128ac0_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.6, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v0000000001129ba0_0, 0, 2; - %jmp T_4.7; -T_4.6 ; - %load/vec4 v0000000001128e80_0; - %cmpi/e 2, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 3, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.8, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v0000000001129ba0_0, 0, 2; - %jmp T_4.9; -T_4.8 ; - %load/vec4 v0000000001128700_0; - %cmpi/e 8, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001128700_0; - %cmpi/e 9, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.10, 4; - %pushi/vec4 3, 0, 2; - %store/vec4 v0000000001129ba0_0, 0, 2; - %jmp T_4.11; -T_4.10 ; - %pushi/vec4 0, 0, 2; - %store/vec4 v0000000001129ba0_0, 0, 2; -T_4.11 ; -T_4.9 ; -T_4.7 ; - %load/vec4 v0000000001128e80_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.12, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000011297e0_0, 0, 1; - %pushi/vec4 1, 0, 2; - %store/vec4 v0000000001128a20_0, 0, 2; - %vpi_call/w 6 112 "$display", "Memory read enabled" {0 0 0}; - %jmp T_4.13; -T_4.12 ; - %load/vec4 v0000000001128e80_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128700_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128700_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.14, 9; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011297e0_0, 0, 1; - %pushi/vec4 0, 0, 2; - %store/vec4 v0000000001128a20_0, 0, 2; - %vpi_call/w 6 116 "$display", "Memory read disabled" {0 0 0}; - %jmp T_4.15; -T_4.14 ; - %load/vec4 v0000000001128e80_0; - %cmpi/e 3, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128700_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.16, 9; - %pushi/vec4 2, 0, 2; - %store/vec4 v0000000001128a20_0, 0, 2; - %jmp T_4.17; -T_4.16 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v00000000011297e0_0, 0, 1; -T_4.17 ; -T_4.15 ; -T_4.13 ; - %load/vec4 v0000000001128e80_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128700_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.18, 9; - %pushi/vec4 0, 0, 5; - %store/vec4 v0000000001128f20_0, 0, 5; - %vpi_call/w 6 124 "$display", "ALU OP = 0 (ADDU/ADDIU)" {0 0 0}; - %jmp T_4.19; -T_4.18 ; - %load/vec4 v0000000001128e80_0; - %cmpi/e 12, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128700_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.20, 9; - %pushi/vec4 4, 0, 5; - %store/vec4 v0000000001128f20_0, 0, 5; - %jmp T_4.21; -T_4.20 ; - %load/vec4 v0000000001128e80_0; - %cmpi/e 4, 0, 6; - %jmp/0xz T_4.22, 4; - %pushi/vec4 13, 0, 5; - %store/vec4 v0000000001128f20_0, 0, 5; - %jmp T_4.23; -T_4.22 ; - %load/vec4 v0000000001128e80_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128ac0_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128ac0_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.24, 8; - %pushi/vec4 17, 0, 5; - %store/vec4 v0000000001128f20_0, 0, 5; - %jmp T_4.25; -T_4.24 ; - %load/vec4 v0000000001128e80_0; - %cmpi/e 7, 0, 6; - %jmp/0xz T_4.26, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v0000000001128f20_0, 0, 5; - %jmp T_4.27; -T_4.26 ; - %load/vec4 v0000000001128e80_0; - %cmpi/e 6, 0, 6; - %jmp/0xz T_4.28, 4; - %pushi/vec4 15, 0, 5; - %store/vec4 v0000000001128f20_0, 0, 5; - %jmp T_4.29; -T_4.28 ; - %load/vec4 v0000000001128e80_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128ac0_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128ac0_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.30, 8; - %pushi/vec4 14, 0, 5; - %store/vec4 v0000000001128f20_0, 0, 5; - %jmp T_4.31; -T_4.30 ; - %load/vec4 v0000000001128e80_0; - %cmpi/e 5, 0, 6; - %jmp/0xz T_4.32, 4; - %pushi/vec4 18, 0, 5; - %store/vec4 v0000000001128f20_0, 0, 5; - %jmp T_4.33; -T_4.32 ; - %load/vec4 v0000000001128e80_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128700_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.34, 8; - %pushi/vec4 3, 0, 5; - %store/vec4 v0000000001128f20_0, 0, 5; - %jmp T_4.35; -T_4.34 ; - %load/vec4 v0000000001128e80_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128700_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.36, 8; - %pushi/vec4 23, 0, 5; - %store/vec4 v0000000001128f20_0, 0, 5; - %jmp T_4.37; -T_4.36 ; - %load/vec4 v0000000001128e80_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.38, 4; - %pushi/vec4 0, 0, 5; - %store/vec4 v0000000001128f20_0, 0, 5; - %jmp T_4.39; -T_4.38 ; - %load/vec4 v0000000001128e80_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.40, 4; - %pushi/vec4 7, 0, 5; - %store/vec4 v0000000001128f20_0, 0, 5; - %jmp T_4.41; -T_4.40 ; - %load/vec4 v0000000001128e80_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128700_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128700_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.42, 8; - %pushi/vec4 19, 0, 5; - %store/vec4 v0000000001128f20_0, 0, 5; - %jmp T_4.43; -T_4.42 ; - %load/vec4 v0000000001128e80_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128700_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.44, 8; - %pushi/vec4 2, 0, 5; - %store/vec4 v0000000001128f20_0, 0, 5; - %jmp T_4.45; -T_4.44 ; - %load/vec4 v0000000001128e80_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128700_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.46, 8; - %pushi/vec4 22, 0, 5; - %store/vec4 v0000000001128f20_0, 0, 5; - %jmp T_4.47; -T_4.46 ; - %load/vec4 v0000000001128e80_0; - %cmpi/e 13, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128700_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.48, 9; - %pushi/vec4 5, 0, 5; - %store/vec4 v0000000001128f20_0, 0, 5; - %jmp T_4.49; -T_4.48 ; - %load/vec4 v0000000001128e80_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128700_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.50, 8; - %pushi/vec4 7, 0, 5; - %store/vec4 v0000000001128f20_0, 0, 5; - %jmp T_4.51; -T_4.50 ; - %load/vec4 v0000000001128e80_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128700_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.52, 8; - %pushi/vec4 8, 0, 5; - %store/vec4 v0000000001128f20_0, 0, 5; - %jmp T_4.53; -T_4.52 ; - %load/vec4 v0000000001128e80_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128700_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.54, 8; - %pushi/vec4 11, 0, 5; - %store/vec4 v0000000001128f20_0, 0, 5; - %jmp T_4.55; -T_4.54 ; - %load/vec4 v0000000001128e80_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128700_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.56, 8; - %pushi/vec4 12, 0, 5; - %store/vec4 v0000000001128f20_0, 0, 5; - %jmp T_4.57; -T_4.56 ; - %load/vec4 v0000000001128e80_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128700_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.58, 8; - %pushi/vec4 9, 0, 5; - %store/vec4 v0000000001128f20_0, 0, 5; - %jmp T_4.59; -T_4.58 ; - %load/vec4 v0000000001128e80_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128700_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.60, 8; - %pushi/vec4 10, 0, 5; - %store/vec4 v0000000001128f20_0, 0, 5; - %jmp T_4.61; -T_4.60 ; - %load/vec4 v0000000001128e80_0; - %cmpi/e 10, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128700_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.62, 9; - %pushi/vec4 20, 0, 5; - %store/vec4 v0000000001128f20_0, 0, 5; - %jmp T_4.63; -T_4.62 ; - %load/vec4 v0000000001128e80_0; - %cmpi/e 11, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128700_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.64, 9; - %pushi/vec4 21, 0, 5; - %store/vec4 v0000000001128f20_0, 0, 5; - %jmp T_4.65; -T_4.64 ; - %load/vec4 v0000000001128e80_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128700_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.66, 8; - %pushi/vec4 1, 0, 5; - %store/vec4 v0000000001128f20_0, 0, 5; - %jmp T_4.67; -T_4.66 ; - %load/vec4 v0000000001128e80_0; - %cmpi/e 14, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128700_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.68, 9; - %pushi/vec4 6, 0, 5; - %store/vec4 v0000000001128f20_0, 0, 5; - %vpi_call/w 6 175 "$display", "ALU Op = 6 (XOR)" {0 0 0}; - %jmp T_4.69; -T_4.68 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v0000000001128f20_0, 0, 5; -T_4.69 ; -T_4.67 ; -T_4.65 ; -T_4.63 ; -T_4.61 ; -T_4.59 ; -T_4.57 ; -T_4.55 ; -T_4.53 ; -T_4.51 ; -T_4.49 ; -T_4.47 ; -T_4.45 ; -T_4.43 ; -T_4.41 ; -T_4.39 ; -T_4.37 ; -T_4.35 ; -T_4.33 ; -T_4.31 ; -T_4.29 ; -T_4.27 ; -T_4.25 ; -T_4.23 ; -T_4.21 ; -T_4.19 ; - %load/vec4 v0000000001128e80_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128700_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128700_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.70, 8; - %load/vec4 v0000000001129420_0; - %parti/s 5, 6, 4; - %store/vec4 v0000000001128de0_0, 0, 5; - %jmp T_4.71; -T_4.70 ; - %load/vec4 v0000000001128e80_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.72, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v0000000001128de0_0, 0, 5; - %jmp T_4.73; -T_4.72 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v0000000001128de0_0, 0, 5; -T_4.73 ; -T_4.71 ; - %load/vec4 v0000000001128e80_0; - %cmpi/e 40, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.74, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000011292e0_0, 0, 1; - %jmp T_4.75; -T_4.74 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011292e0_0, 0, 1; -T_4.75 ; - %load/vec4 v0000000001128e80_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.76, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000011291a0_0, 0, 1; - %jmp T_4.77; -T_4.76 ; - %load/vec4 v0000000001128e80_0; - %cmpi/e 4, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 7, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 6, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 5, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128700_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128700_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %load/vec4 v0000000001128e80_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128ac0_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128ac0_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128ac0_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128ac0_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %flag_or 8, 9; - %jmp/0xz T_4.78, 8; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011291a0_0, 0, 1; - %jmp T_4.79; -T_4.78 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v00000000011291a0_0, 0, 1; -T_4.79 ; -T_4.77 ; - %load/vec4 v0000000001128e80_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001128e80_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128700_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001128700_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001128700_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.80, 9; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001129240_0, 0, 1; - %jmp T_4.81; -T_4.80 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001129240_0, 0, 1; -T_4.81 ; - %jmp T_4; - .thread T_4, $push; - .scope S_00000000010c96b0; -T_5 ; - %fork t_5, S_00000000010b91d0; - %jmp t_4; - .scope S_00000000010b91d0; -t_5 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v0000000001128ca0_0, 0, 32; -T_5.0 ; - %load/vec4 v0000000001128ca0_0; - %cmpi/s 32, 0, 32; - %jmp/0xz T_5.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v0000000001128ca0_0; - %store/vec4a v0000000001129560, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0000000001128ca0_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v0000000001128ca0_0, 0, 32; - %jmp T_5.0; -T_5.1 ; - %end; - .scope S_00000000010c96b0; -t_4 %join; - %end; - .thread T_5; - .scope S_00000000010c96b0; -T_6 ; -Ewait_0 .event/or E_0000000001107d00, E_0x0; - %wait Ewait_0; - %load/vec4 v00000000011299c0_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v0000000001129560, 4; - %store/vec4 v0000000001129600_0, 0, 32; - %load/vec4 v0000000001129880_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v0000000001129560, 4; - %store/vec4 v00000000011296a0_0, 0, 32; - %jmp T_6; - .thread T_6, $push; - .scope S_00000000010c96b0; -T_7 ; - %wait E_0000000001107b80; - %load/vec4 v0000000001129c40_0; - %cmpi/e 0, 0, 5; - %jmp/0xz T_7.0, 4; - %jmp T_7.1; -T_7.0 ; - %load/vec4 v0000000001129a60_0; - %flag_set/vec4 8; - %jmp/0xz T_7.2, 8; - %load/vec4 v0000000001128d40_0; - %dup/vec4; - %pushi/vec4 32, 0, 6; - %cmp/u; - %jmp/1 T_7.4, 6; - %dup/vec4; - %pushi/vec4 36, 0, 6; - %cmp/u; - %jmp/1 T_7.5, 6; - %dup/vec4; - %pushi/vec4 33, 0, 6; - %cmp/u; - %jmp/1 T_7.6, 6; - %dup/vec4; - %pushi/vec4 37, 0, 6; - %cmp/u; - %jmp/1 T_7.7, 6; - %dup/vec4; - %pushi/vec4 34, 0, 6; - %cmp/u; - %jmp/1 T_7.8, 6; - %dup/vec4; - %pushi/vec4 38, 0, 6; - %cmp/u; - %jmp/1 T_7.9, 6; - %load/vec4 v0000000001129b00_0; - %load/vec4 v0000000001129c40_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001129560, 0, 4; - %jmp T_7.11; -T_7.4 ; - %load/vec4 v0000000001129600_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.12, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.13, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.14, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.15, 6; - %jmp T_7.16; -T_7.12 ; - %load/vec4 v0000000001129b00_0; - %parti/s 1, 7, 4; - %replicate 24; - %load/vec4 v0000000001129b00_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001129c40_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001129560, 0, 4; - %jmp T_7.16; -T_7.13 ; - %load/vec4 v0000000001129b00_0; - %parti/s 1, 15, 5; - %replicate 24; - %load/vec4 v0000000001129b00_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001129c40_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001129560, 0, 4; - %jmp T_7.16; -T_7.14 ; - %load/vec4 v0000000001129b00_0; - %parti/s 1, 23, 6; - %replicate 24; - %load/vec4 v0000000001129b00_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001129c40_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001129560, 0, 4; - %jmp T_7.16; -T_7.15 ; - %load/vec4 v0000000001129b00_0; - %parti/s 1, 31, 6; - %replicate 24; - %load/vec4 v0000000001129b00_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001129c40_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001129560, 0, 4; - %jmp T_7.16; -T_7.16 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.5 ; - %load/vec4 v0000000001129600_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.17, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.18, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.19, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.20, 6; - %jmp T_7.21; -T_7.17 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v0000000001129b00_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001129c40_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001129560, 0, 4; - %jmp T_7.21; -T_7.18 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v0000000001129b00_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001129c40_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001129560, 0, 4; - %jmp T_7.21; -T_7.19 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v0000000001129b00_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001129c40_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001129560, 0, 4; - %jmp T_7.21; -T_7.20 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v0000000001129b00_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001129c40_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001129560, 0, 4; - %jmp T_7.21; -T_7.21 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.6 ; - %load/vec4 v0000000001129600_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.22, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.23, 6; - %jmp T_7.24; -T_7.22 ; - %load/vec4 v0000000001129b00_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v0000000001129b00_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001129c40_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001129560, 0, 4; - %jmp T_7.24; -T_7.23 ; - %load/vec4 v0000000001129b00_0; - %parti/s 1, 31, 6; - %replicate 16; - %load/vec4 v0000000001129b00_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001129c40_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001129560, 0, 4; - %jmp T_7.24; -T_7.24 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.7 ; - %load/vec4 v0000000001129600_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.25, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.26, 6; - %jmp T_7.27; -T_7.25 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v0000000001129b00_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001129c40_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001129560, 0, 4; - %jmp T_7.27; -T_7.26 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v0000000001129b00_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v0000000001129c40_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001129560, 0, 4; - %jmp T_7.27; -T_7.27 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.8 ; - %load/vec4 v0000000001129600_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.28, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.29, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.30, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.31, 6; - %jmp T_7.32; -T_7.28 ; - %load/vec4 v0000000001129b00_0; - %parti/s 8, 0, 2; - %load/vec4 v0000000001129c40_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 24, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v0000000001129560, 4, 5; - %jmp T_7.32; -T_7.29 ; - %load/vec4 v0000000001129b00_0; - %parti/s 16, 0, 2; - %load/vec4 v0000000001129c40_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 16, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v0000000001129560, 4, 5; - %jmp T_7.32; -T_7.30 ; - %load/vec4 v0000000001129b00_0; - %parti/s 24, 0, 2; - %load/vec4 v0000000001129c40_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 8, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v0000000001129560, 4, 5; - %jmp T_7.32; -T_7.31 ; - %load/vec4 v0000000001129b00_0; - %load/vec4 v0000000001129c40_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001129560, 0, 4; - %jmp T_7.32; -T_7.32 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.9 ; - %load/vec4 v0000000001129600_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.33, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.34, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.35, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.36, 6; - %jmp T_7.37; -T_7.33 ; - %load/vec4 v0000000001129b00_0; - %load/vec4 v0000000001129c40_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001129560, 0, 4; - %jmp T_7.37; -T_7.34 ; - %load/vec4 v0000000001129b00_0; - %parti/s 24, 8, 5; - %load/vec4 v0000000001129c40_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001129560, 0, 4; - %jmp T_7.37; -T_7.35 ; - %load/vec4 v0000000001129b00_0; - %parti/s 16, 16, 6; - %load/vec4 v0000000001129c40_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001129560, 0, 4; - %jmp T_7.37; -T_7.36 ; - %load/vec4 v0000000001129b00_0; - %parti/s 8, 24, 6; - %load/vec4 v0000000001129c40_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001129560, 0, 4; - %jmp T_7.37; -T_7.37 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.11 ; - %pop/vec4 1; -T_7.2 ; -T_7.1 ; - %jmp T_7; - .thread T_7; - .scope S_000000000112b710; -T_8 ; -Ewait_1 .event/or E_0000000001107a80, E_0x0; - %wait Ewait_1; - %load/vec4 v00000000011285c0_0; - %dup/vec4; - %pushi/vec4 0, 0, 5; - %cmp/u; - %jmp/1 T_8.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 5; - %cmp/u; - %jmp/1 T_8.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 5; - %cmp/u; - %jmp/1 T_8.2, 6; - %dup/vec4; - %pushi/vec4 3, 0, 5; - %cmp/u; - %jmp/1 T_8.3, 6; - %dup/vec4; - %pushi/vec4 4, 0, 5; - %cmp/u; - %jmp/1 T_8.4, 6; - %dup/vec4; - %pushi/vec4 5, 0, 5; - %cmp/u; - %jmp/1 T_8.5, 6; - %dup/vec4; - %pushi/vec4 6, 0, 5; - %cmp/u; - %jmp/1 T_8.6, 6; - %dup/vec4; - %pushi/vec4 7, 0, 5; - %cmp/u; - %jmp/1 T_8.7, 6; - %dup/vec4; - %pushi/vec4 8, 0, 5; - %cmp/u; - %jmp/1 T_8.8, 6; - %dup/vec4; - %pushi/vec4 9, 0, 5; - %cmp/u; - %jmp/1 T_8.9, 6; - %dup/vec4; - %pushi/vec4 10, 0, 5; - %cmp/u; - %jmp/1 T_8.10, 6; - %dup/vec4; - %pushi/vec4 11, 0, 5; - %cmp/u; - %jmp/1 T_8.11, 6; - %dup/vec4; - %pushi/vec4 12, 0, 5; - %cmp/u; - %jmp/1 T_8.12, 6; - %dup/vec4; - %pushi/vec4 13, 0, 5; - %cmp/u; - %jmp/1 T_8.13, 6; - %dup/vec4; - %pushi/vec4 14, 0, 5; - %cmp/u; - %jmp/1 T_8.14, 6; - %dup/vec4; - %pushi/vec4 15, 0, 5; - %cmp/u; - %jmp/1 T_8.15, 6; - %dup/vec4; - %pushi/vec4 16, 0, 5; - %cmp/u; - %jmp/1 T_8.16, 6; - %dup/vec4; - %pushi/vec4 17, 0, 5; - %cmp/u; - %jmp/1 T_8.17, 6; - %dup/vec4; - %pushi/vec4 18, 0, 5; - %cmp/u; - %jmp/1 T_8.18, 6; - %dup/vec4; - %pushi/vec4 19, 0, 5; - %cmp/u; - %jmp/1 T_8.19, 6; - %dup/vec4; - %pushi/vec4 20, 0, 5; - %cmp/u; - %jmp/1 T_8.20, 6; - %dup/vec4; - %pushi/vec4 21, 0, 5; - %cmp/u; - %jmp/1 T_8.21, 6; - %dup/vec4; - %pushi/vec4 22, 0, 5; - %cmp/u; - %jmp/1 T_8.22, 6; - %dup/vec4; - %pushi/vec4 23, 0, 5; - %cmp/u; - %jmp/1 T_8.23, 6; - %jmp T_8.24; -T_8.0 ; - %load/vec4 v000000000112a460_0; - %load/vec4 v0000000001128c00_0; - %add; - %store/vec4 v0000000001128980_0, 0, 32; - %jmp T_8.24; -T_8.1 ; - %load/vec4 v000000000112a460_0; - %load/vec4 v0000000001128c00_0; - %sub; - %store/vec4 v0000000001128980_0, 0, 32; - %jmp T_8.24; -T_8.2 ; - %load/vec4 v000000000112a460_0; - %load/vec4 v0000000001128c00_0; - %mul; - %store/vec4 v0000000001128980_0, 0, 32; - %jmp T_8.24; -T_8.3 ; - %load/vec4 v000000000112a460_0; - %load/vec4 v0000000001128c00_0; - %div/s; - %store/vec4 v0000000001128980_0, 0, 32; - %jmp T_8.24; -T_8.4 ; - %load/vec4 v000000000112a460_0; - %load/vec4 v0000000001128c00_0; - %and; - %store/vec4 v0000000001128980_0, 0, 32; - %jmp T_8.24; -T_8.5 ; - %load/vec4 v000000000112a460_0; - %load/vec4 v0000000001128c00_0; - %or; - %store/vec4 v0000000001128980_0, 0, 32; - %jmp T_8.24; -T_8.6 ; - %load/vec4 v000000000112a460_0; - %load/vec4 v0000000001128c00_0; - %xor; - %store/vec4 v0000000001128980_0, 0, 32; - %jmp T_8.24; -T_8.7 ; - %load/vec4 v0000000001128c00_0; - %ix/getv 4, v0000000001128660_0; - %shiftl 4; - %store/vec4 v0000000001128980_0, 0, 32; - %jmp T_8.24; -T_8.8 ; - %load/vec4 v0000000001128c00_0; - %ix/getv 4, v000000000112a460_0; - %shiftl 4; - %store/vec4 v0000000001128980_0, 0, 32; - %jmp T_8.24; -T_8.9 ; - %load/vec4 v0000000001128c00_0; - %ix/getv 4, v0000000001128660_0; - %shiftr 4; - %store/vec4 v0000000001128980_0, 0, 32; - %jmp T_8.24; -T_8.10 ; - %load/vec4 v0000000001128c00_0; - %ix/getv 4, v000000000112a460_0; - %shiftr 4; - %store/vec4 v0000000001128980_0, 0, 32; - %jmp T_8.24; -T_8.11 ; - %load/vec4 v0000000001128c00_0; - %ix/getv 4, v0000000001128660_0; - %shiftr 4; - %store/vec4 v0000000001128980_0, 0, 32; - %jmp T_8.24; -T_8.12 ; - %load/vec4 v0000000001128c00_0; - %ix/getv 4, v000000000112a460_0; - %shiftr 4; - %store/vec4 v0000000001128980_0, 0, 32; - %jmp T_8.24; -T_8.13 ; - %load/vec4 v000000000112a460_0; - %load/vec4 v0000000001128c00_0; - %cmp/e; - %jmp/0xz T_8.25, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001129060_0, 0, 1; - %jmp T_8.26; -T_8.25 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001129060_0, 0, 1; -T_8.26 ; - %jmp T_8.24; -T_8.14 ; - %load/vec4 v000000000112a460_0; - %load/vec4 v0000000001128c00_0; - %cmp/s; - %jmp/0xz T_8.27, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001129060_0, 0, 1; - %jmp T_8.28; -T_8.27 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001129060_0, 0, 1; -T_8.28 ; - %jmp T_8.24; -T_8.15 ; - %load/vec4 v000000000112a460_0; - %load/vec4 v0000000001128c00_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.29, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001129060_0, 0, 1; - %jmp T_8.30; -T_8.29 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001129060_0, 0, 1; -T_8.30 ; - %jmp T_8.24; -T_8.16 ; - %load/vec4 v0000000001128c00_0; - %load/vec4 v000000000112a460_0; - %cmp/s; - %jmp/0xz T_8.31, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001129060_0, 0, 1; - %jmp T_8.32; -T_8.31 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001129060_0, 0, 1; -T_8.32 ; - %jmp T_8.24; -T_8.17 ; - %load/vec4 v0000000001128c00_0; - %load/vec4 v000000000112a460_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.33, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001129060_0, 0, 1; - %jmp T_8.34; -T_8.33 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001129060_0, 0, 1; -T_8.34 ; - %jmp T_8.24; -T_8.18 ; - %load/vec4 v000000000112a460_0; - %load/vec4 v0000000001128c00_0; - %cmp/ne; - %jmp/0xz T_8.35, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001129060_0, 0, 1; - %jmp T_8.36; -T_8.35 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001129060_0, 0, 1; -T_8.36 ; - %jmp T_8.24; -T_8.19 ; - %load/vec4 v000000000112a460_0; - %store/vec4 v0000000001128980_0, 0, 32; - %jmp T_8.24; -T_8.20 ; - %load/vec4 v000000000112a460_0; - %load/vec4 v0000000001128c00_0; - %cmp/s; - %jmp/0xz T_8.37, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v0000000001128980_0, 0, 32; -T_8.37 ; - %jmp T_8.24; -T_8.21 ; - %load/vec4 v000000000112a460_0; - %load/vec4 v0000000001128c00_0; - %cmp/u; - %jmp/0xz T_8.39, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v0000000001128980_0, 0, 32; -T_8.39 ; - %jmp T_8.24; -T_8.22 ; - %load/vec4 v000000000112a460_0; - %load/vec4 v0000000001128c00_0; - %mul; - %store/vec4 v0000000001128980_0, 0, 32; - %jmp T_8.24; -T_8.23 ; - %load/vec4 v000000000112a460_0; - %load/vec4 v0000000001128c00_0; - %div; - %store/vec4 v0000000001128980_0, 0, 32; - %jmp T_8.24; -T_8.24 ; - %pop/vec4 1; - %jmp T_8; - .thread T_8, $push; - .scope S_000000000112b580; -T_9 ; - %pushi/vec4 3217031168, 0, 32; - %store/vec4 v0000000001182ef0_0, 0, 32; - %end; - .thread T_9, $init; - .scope S_000000000112b580; -T_10 ; -Ewait_2 .event/or E_0000000001105c00, E_0x0; - %wait Ewait_2; - %load/vec4 v00000000011835d0_0; - %store/vec4 v0000000001184070_0, 0, 32; - %load/vec4 v0000000001183d50_0; - %store/vec4 v0000000001129e20_0, 0, 32; - %load/vec4 v0000000001183df0_0; - %store/vec4 v0000000001129f60_0, 0, 1; - %load/vec4 v0000000001183350_0; - %store/vec4 v0000000001129ec0_0, 0, 1; - %load/vec4 v0000000001183490_0; - %store/vec4 v000000000112a1e0_0, 0, 32; - %jmp T_10; - .thread T_10, $push; - .scope S_000000000112b580; -T_11 ; -Ewait_3 .event/or E_0000000001105ac0, E_0x0; - %wait Ewait_3; - %load/vec4 v0000000001183710_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.2, 6; - %jmp T_11.3; -T_11.0 ; - %load/vec4 v0000000001182d10_0; - %parti/s 5, 16, 6; - %store/vec4 v0000000001183990_0, 0, 5; - %jmp T_11.3; -T_11.1 ; - %load/vec4 v0000000001182d10_0; - %parti/s 5, 11, 5; - %store/vec4 v0000000001183990_0, 0, 5; - %jmp T_11.3; -T_11.2 ; - %pushi/vec4 31, 0, 5; - %store/vec4 v0000000001183990_0, 0, 5; - %jmp T_11.3; -T_11.3 ; - %pop/vec4 1; - %load/vec4 v0000000001183210_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.6, 6; - %jmp T_11.7; -T_11.4 ; - %load/vec4 v0000000001183d50_0; - %store/vec4 v00000000011833f0_0, 0, 32; - %jmp T_11.7; -T_11.5 ; - %load/vec4 v000000000112a000_0; - %store/vec4 v00000000011833f0_0, 0, 32; - %jmp T_11.7; -T_11.6 ; - %load/vec4 v0000000001182ef0_0; - %addi 8, 0, 32; - %store/vec4 v00000000011833f0_0, 0, 32; - %jmp T_11.7; -T_11.7 ; - %pop/vec4 1; - %load/vec4 v0000000001183670_0; - %dup/vec4; - %pushi/vec4 1, 0, 1; - %cmp/u; - %jmp/1 T_11.8, 6; - %dup/vec4; - %pushi/vec4 0, 0, 1; - %cmp/u; - %jmp/1 T_11.9, 6; - %jmp T_11.10; -T_11.8 ; - %load/vec4 v0000000001182d10_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v0000000001182d10_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %store/vec4 v0000000001099930_0, 0, 32; - %jmp T_11.10; -T_11.9 ; - %load/vec4 v0000000001183490_0; - %store/vec4 v0000000001099930_0, 0, 32; - %jmp T_11.10; -T_11.10 ; - %pop/vec4 1; - %jmp T_11; - .thread T_11, $push; - .scope S_000000000112a580; -T_12 ; - %vpi_call/w 3 36 "$dumpfile", "mips_cpu_harvard.vcd" {0 0 0}; - %vpi_call/w 3 37 "$dumpvars", 32'sb00000000000000000000000000000000, S_000000000112a580 {0 0 0}; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001184b40_0, 0, 1; - %pushi/vec4 100, 0, 32; -T_12.0 %dup/vec4; - %pushi/vec4 0, 0, 32; - %cmp/s; - %jmp/1xz T_12.1, 5; - %jmp/1 T_12.1, 4; - %pushi/vec4 1, 0, 32; - %sub; - %delay 10, 0; - %load/vec4 v0000000001184b40_0; - %nor/r; - %store/vec4 v0000000001184b40_0, 0, 1; - %delay 10, 0; - %load/vec4 v0000000001184b40_0; - %nor/r; - %store/vec4 v0000000001184b40_0, 0, 1; - %jmp T_12.0; -T_12.1 ; - %pop/vec4 1; - %vpi_call/w 3 47 "$fatal", 32'sb00000000000000000000000000000010, "Simulation did not finish within %d cycles.", P_00000000010f3f28 {0 0 0}; - %end; - .thread T_12; - .scope S_000000000112a580; -T_13 ; - %vpi_call/w 3 51 "$display", "Initial Reset 0" {0 0 0}; - %pushi/vec4 0, 0, 1; - %assign/vec4 v00000000011868a0_0, 0; - %vpi_call/w 3 55 "$display", "Initial Reset 1" {0 0 0}; - %wait E_0000000001107bc0; - %pushi/vec4 1, 0, 1; - %assign/vec4 v00000000011868a0_0, 0; - %vpi_call/w 3 59 "$display", "Initial Reset 0: Start Program" {0 0 0}; - %wait E_0000000001107bc0; - %pushi/vec4 0, 0, 1; - %assign/vec4 v00000000011868a0_0, 0; - %wait E_0000000001107bc0; - %load/vec4 v0000000001184fa0_0; - %pad/u 32; - %cmpi/e 1, 0, 32; - %jmp/0xz T_13.0, 4; - %jmp T_13.1; -T_13.0 ; - %vpi_call/w 3 65 "$display", "TB: CPU did not set active=1 after reset." {0 0 0}; -T_13.1 ; -T_13.2 ; - %load/vec4 v0000000001184fa0_0; - %flag_set/vec4 8; - %jmp/0xz T_13.3, 8; - %wait E_0000000001107bc0; - %vpi_call/w 3 71 "$display", "Reg File Write data: %d", v00000000011833f0_0 {0 0 0}; - %jmp T_13.2; -T_13.3 ; - %wait E_0000000001107bc0; - %vpi_call/w 3 74 "$display", "TB: CPU Halt; active=0" {0 0 0}; - %vpi_call/w 3 75 "$display", "Output:" {0 0 0}; - %vpi_call/w 3 76 "$display", "%d", v00000000011869e0_0 {0 0 0}; - %vpi_call/w 3 77 "$finish" {0 0 0}; - %end; - .thread T_13; -# The file index is used to find the file name in the following table. -:file_names 10; - "N/A"; - ""; - "-"; - "testbench/mips_cpu_harvard_tb.v"; - "rtl/mips_cpu_harvard.v"; - "rtl/mips_cpu_alu.v"; - "rtl/mips_cpu_control.v"; - "rtl/mips_cpu_pc.v"; - "rtl/mips_cpu_regfile.v"; - "rtl/mips_cpu_memory.v"; diff --git a/exec/mips_cpu_harvard_tb_sll b/exec/mips_cpu_harvard_tb_sll deleted file mode 100644 index 6006717..0000000 --- a/exec/mips_cpu_harvard_tb_sll +++ /dev/null @@ -1,2738 +0,0 @@ -#! /usr/local/iverilog/bin/vvp -:ivl_version "11.0 (devel)"; -:ivl_delay_selection "TYPICAL"; -:vpi_time_precision + 0; -:vpi_module "C:\iverilog\lib\ivl\system.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_sys.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_textio.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2005_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\va_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2009.vpi"; -S_00000000012ec010 .scope package, "$unit" "$unit" 2 1; - .timescale 0 0; -S_00000000012ea580 .scope module, "mips_cpu_harvard_tb" "mips_cpu_harvard_tb" 3 1; - .timescale 0 0; -P_0000000000933d70 .param/str "RAM_INIT_FILE" 0 3 3, "inputs/sll.txt"; -P_0000000000933da8 .param/l "TIMEOUT_CYCLES" 0 3 4, +C4<00000000000000000000000001100100>; -v0000000001345860_0 .net "active", 0 0, v00000000012e9c40_0; 1 drivers -v00000000013469e0_0 .var "clk", 0 0; -v00000000013464e0_0 .var "clk_enable", 0 0; -v0000000001344c80_0 .net "data_address", 31 0, v00000000012e8b60_0; 1 drivers -v0000000001346580_0 .net "data_read", 0 0, v00000000012e8ca0_0; 1 drivers -v0000000001346940_0 .net "data_readdata", 31 0, L_0000000001345cc0; 1 drivers -v0000000001346800_0 .net "data_write", 0 0, v00000000012e8de0_0; 1 drivers -v0000000001346620_0 .net "data_writedata", 31 0, v00000000012e8e80_0; 1 drivers -v0000000001345900_0 .net "instr_address", 31 0, v0000000001343d50_0; 1 drivers -v0000000001345c20_0 .net "instr_readdata", 31 0, L_0000000001345ea0; 1 drivers -v0000000001345ae0_0 .net "register_v0", 31 0, L_00000000012db5b0; 1 drivers -v0000000001345b80_0 .var "reset", 0 0; -S_00000000012eb580 .scope module, "cpuInst" "mips_cpu_harvard" 3 19, 4 1 0, S_00000000012ea580; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "reset"; - .port_info 2 /OUTPUT 1 "active"; - .port_info 3 /OUTPUT 32 "register_v0"; - .port_info 4 /INPUT 1 "clk_enable"; - .port_info 5 /OUTPUT 32 "instr_address"; - .port_info 6 /INPUT 32 "instr_readdata"; - .port_info 7 /OUTPUT 32 "data_address"; - .port_info 8 /OUTPUT 1 "data_write"; - .port_info 9 /OUTPUT 1 "data_read"; - .port_info 10 /OUTPUT 32 "data_writedata"; - .port_info 11 /INPUT 32 "data_readdata"; -v00000000012e88e0_0 .net "active", 0 0, v00000000012e9c40_0; alias, 1 drivers -v00000000012e8980_0 .net "clk", 0 0, v00000000013469e0_0; 1 drivers -v00000000012e8c00_0 .net "clk_enable", 0 0, v00000000013464e0_0; 1 drivers -v00000000012e8b60_0 .var "data_address", 31 0; -v00000000012e8ca0_0 .var "data_read", 0 0; -v00000000012e8d40_0 .net "data_readdata", 31 0, L_0000000001345cc0; alias, 1 drivers -v00000000012e8de0_0 .var "data_write", 0 0; -v00000000012e8e80_0 .var "data_writedata", 31 0; -v00000000008d97f0_0 .var "in_B", 31 0; -v00000000013437b0_0 .net "in_opcode", 5 0, L_0000000001344e60; 1 drivers -v00000000013441b0_0 .net "in_pc_in", 31 0, v00000000012e9100_0; 1 drivers -v0000000001343530_0 .net "in_readreg1", 4 0, L_0000000001346260; 1 drivers -v0000000001342d10_0 .net "in_readreg2", 4 0, L_0000000001344d20; 1 drivers -v0000000001344430_0 .var "in_writedata", 31 0; -v00000000013444d0_0 .var "in_writereg", 4 0; -v0000000001343d50_0 .var "instr_address", 31 0; -v0000000001343850_0 .net "instr_readdata", 31 0, L_0000000001345ea0; alias, 1 drivers -v0000000001343670_0 .net "out_ALUCond", 0 0, v00000000012e9380_0; 1 drivers -v0000000001343b70_0 .net "out_ALUOp", 4 0, v00000000012e9880_0; 1 drivers -v0000000001343cb0_0 .net "out_ALURes", 31 0, v00000000012ea140_0; 1 drivers -v0000000001343c10_0 .net "out_ALUSrc", 0 0, v00000000012e8a20_0; 1 drivers -v0000000001343df0_0 .net "out_MemRead", 0 0, v00000000012e9a60_0; 1 drivers -v00000000013433f0_0 .net "out_MemWrite", 0 0, v00000000012e9ba0_0; 1 drivers -v0000000001344930_0 .net "out_MemtoReg", 1 0, v00000000012ea1e0_0; 1 drivers -v0000000001343ad0_0 .net "out_PC", 1 0, v00000000012e94c0_0; 1 drivers -v0000000001343990_0 .net "out_RegDst", 1 0, v00000000012ea280_0; 1 drivers -v0000000001344250_0 .net "out_RegWrite", 0 0, v00000000012e85c0_0; 1 drivers -v00000000013447f0_0 .var "out_pc_out", 31 0; -v0000000001344570_0 .net "out_readdata1", 31 0, v00000000012ea0a0_0; 1 drivers -v0000000001342f90_0 .net "out_readdata2", 31 0, v00000000012e9740_0; 1 drivers -v00000000013435d0_0 .net "out_shamt", 4 0, v00000000012e8700_0; 1 drivers -v0000000001344070_0 .net "register_v0", 31 0, L_00000000012db5b0; alias, 1 drivers -v0000000001343e90_0 .net "reset", 0 0, v0000000001345b80_0; 1 drivers -E_0000000000947100/0 .event edge, v00000000012ea280_0, v00000000012e97e0_0, v00000000012e97e0_0, v00000000012ea1e0_0; -E_0000000000947100/1 .event edge, v00000000012ea140_0, v00000000012e8d40_0, v00000000012e91a0_0, v00000000012e8a20_0; -E_0000000000947100/2 .event edge, v00000000012e97e0_0, v00000000012e97e0_0, v00000000012e9740_0; -E_0000000000947100 .event/or E_0000000000947100/0, E_0000000000947100/1, E_0000000000947100/2; -E_00000000009468c0/0 .event edge, v00000000012e9100_0, v00000000012ea140_0, v00000000012e9ba0_0, v00000000012e9a60_0; -E_00000000009468c0/1 .event edge, v00000000012e9740_0; -E_00000000009468c0 .event/or E_00000000009468c0/0, E_00000000009468c0/1; -L_0000000001346260 .part L_0000000001345ea0, 21, 5; -L_0000000001344d20 .part L_0000000001345ea0, 16, 5; -L_0000000001344e60 .part L_0000000001345ea0, 26, 6; -S_00000000012eb710 .scope module, "alu" "mips_cpu_alu" 4 121, 5 1 0, S_00000000012eb580; - .timescale 0 0; - .port_info 0 /INPUT 32 "A"; - .port_info 1 /INPUT 32 "B"; - .port_info 2 /INPUT 5 "ALUOp"; - .port_info 3 /INPUT 5 "shamt"; - .port_info 4 /OUTPUT 1 "ALUCond"; - .port_info 5 /OUTPUT 32 "ALURes"; -enum00000000012cbd00 .enum4 (5) - "ADD" 5'b00000, - "SUB" 5'b00001, - "MUL" 5'b00010, - "DIV" 5'b00011, - "AND" 5'b00100, - "OR" 5'b00101, - "XOR" 5'b00110, - "SLL" 5'b00111, - "SLLV" 5'b01000, - "SRL" 5'b01001, - "SRLV" 5'b01010, - "SRA" 5'b01011, - "SRAV" 5'b01100, - "EQ" 5'b01101, - "LES" 5'b01110, - "LEQ" 5'b01111, - "GRT" 5'b10000, - "GEQ" 5'b10001, - "NEQ" 5'b10010, - "PAS" 5'b10011, - "SLT" 5'b10100, - "SLTU" 5'b10101, - "MULU" 5'b10110, - "DIVU" 5'b10111 - ; -L_00000000012db150 .functor BUFZ 5, v00000000012e9880_0, C4<00000>, C4<00000>, C4<00000>; -v00000000012e9060_0 .net "A", 31 0, v00000000012ea0a0_0; alias, 1 drivers -v00000000012e9380_0 .var "ALUCond", 0 0; -v00000000012ea320_0 .net "ALUOp", 4 0, v00000000012e9880_0; alias, 1 drivers -v00000000012e9420_0 .net "ALUOps", 4 0, L_00000000012db150; 1 drivers -v00000000012ea140_0 .var/s "ALURes", 31 0; -v00000000012e8fc0_0 .net "B", 31 0, v00000000008d97f0_0; 1 drivers -v00000000012e9920_0 .net "shamt", 4 0, v00000000012e8700_0; alias, 1 drivers -E_0000000000940f80 .event edge, v00000000012e9420_0, v00000000012e9060_0, v00000000012e8fc0_0, v00000000012e9920_0; -S_0000000000909390 .scope module, "control" "mips_cpu_control" 4 90, 6 1 0, S_00000000012eb580; - .timescale 0 0; - .port_info 0 /INPUT 32 "Instr"; - .port_info 1 /INPUT 1 "ALUCond"; - .port_info 2 /OUTPUT 2 "CtrlRegDst"; - .port_info 3 /OUTPUT 2 "CtrlPC"; - .port_info 4 /OUTPUT 1 "CtrlMemRead"; - .port_info 5 /OUTPUT 2 "CtrlMemtoReg"; - .port_info 6 /OUTPUT 5 "CtrlALUOp"; - .port_info 7 /OUTPUT 5 "Ctrlshamt"; - .port_info 8 /OUTPUT 1 "CtrlMemWrite"; - .port_info 9 /OUTPUT 1 "CtrlALUSrc"; - .port_info 10 /OUTPUT 1 "CtrlRegWrite"; -enum00000000012c9270 .enum4 (5) - "BLTZ" 5'b00000, - "BGEZ" 5'b00001, - "BLTZAL" 5'b10000, - "BGEZAL" 5'b10001 - ; -enum00000000012c9730 .enum4 (6) - "SPECIAL" 6'b000000, - "REGIMM" 6'b000001, - "J" 6'b000010, - "JAL" 6'b000011, - "BEQ" 6'b000100, - "BNE" 6'b000101, - "BLEZ" 6'b000110, - "BGTZ" 6'b000111, - "ADDI" 6'b001000, - "ADDIU" 6'b001001, - "SLTI" 6'b001010, - "SLTIU" 6'b001011, - "ANDI" 6'b001100, - "ORI" 6'b001101, - "XORI" 6'b001110, - "LUI" 6'b001111, - "LB" 6'b100000, - "LH" 6'b100001, - "LWL" 6'b100010, - "LW" 6'b100011, - "LBU" 6'b100100, - "LHU" 6'b100101, - "LWR" 6'b100110, - "SB" 6'b101000, - "SH" 6'b101001, - "SW" 6'b101011 - ; -enum00000000012cb7f0 .enum4 (6) - "SLL" 6'b000000, - "SRL" 6'b000010, - "SRA" 6'b000011, - "SLLV" 6'b000100, - "SRLV" 6'b000110, - "SRAV" 6'b000111, - "JR" 6'b001000, - "JALR" 6'b001001, - "MTHI" 6'b010001, - "MTLO" 6'b010011, - "MULT" 6'b011000, - "MULTU" 6'b011001, - "DIV" 6'b011010, - "DIVU" 6'b011011, - "ADDU" 6'b100001, - "SUBU" 6'b100011, - "AND" 6'b100100, - "OR" 6'b100101, - "XOR" 6'b100110, - "SLT" 6'b101010, - "SLTU" 6'b101011 - ; -v00000000012e9b00_0 .net "ALUCond", 0 0, v00000000012e9380_0; alias, 1 drivers -v00000000012e9880_0 .var "CtrlALUOp", 4 0; -v00000000012e8a20_0 .var "CtrlALUSrc", 0 0; -v00000000012e9a60_0 .var "CtrlMemRead", 0 0; -v00000000012e9ba0_0 .var "CtrlMemWrite", 0 0; -v00000000012ea1e0_0 .var "CtrlMemtoReg", 1 0; -v00000000012e94c0_0 .var "CtrlPC", 1 0; -v00000000012ea280_0 .var "CtrlRegDst", 1 0; -v00000000012e85c0_0 .var "CtrlRegWrite", 0 0; -v00000000012e8700_0 .var "Ctrlshamt", 4 0; -v00000000012e97e0_0 .net "Instr", 31 0, L_0000000001345ea0; alias, 1 drivers -v00000000012ea000_0 .net "funct", 5 0, L_0000000001345d60; 1 drivers -v00000000012e9560_0 .net "op", 5 0, L_00000000013468a0; 1 drivers -v00000000012e92e0_0 .net "rt", 4 0, L_0000000001346080; 1 drivers -E_0000000000947d80/0 .event edge, v00000000012e9560_0, v00000000012ea000_0, v00000000012e9380_0, v00000000012e92e0_0; -E_0000000000947d80/1 .event edge, v00000000012e97e0_0; -E_0000000000947d80 .event/or E_0000000000947d80/0, E_0000000000947d80/1; -L_00000000013468a0 .part L_0000000001345ea0, 26, 6; -L_0000000001345d60 .part L_0000000001345ea0, 0, 6; -L_0000000001346080 .part L_0000000001345ea0, 16, 5; -S_0000000000909520 .scope module, "pc" "pc" 4 79, 7 1 0, S_00000000012eb580; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "rst"; - .port_info 2 /INPUT 2 "pc_ctrl"; - .port_info 3 /INPUT 32 "pc_in"; - .port_info 4 /INPUT 5 "rs"; - .port_info 5 /OUTPUT 32 "pc_out"; - .port_info 6 /OUTPUT 1 "active"; -v00000000012e9c40_0 .var "active", 0 0; -v00000000012e9240_0 .net "clk", 0 0, v00000000013469e0_0; alias, 1 drivers -v00000000012e8660_0 .net "pc_ctrl", 1 0, v00000000012e94c0_0; alias, 1 drivers -v00000000012e9600_0 .var "pc_curr", 31 0; -v00000000012e91a0_0 .net "pc_in", 31 0, v00000000013447f0_0; 1 drivers -v00000000012e9100_0 .var "pc_out", 31 0; -o00000000012ed1d8 .functor BUFZ 5, C4; HiZ drive -v00000000012e96a0_0 .net "rs", 4 0, o00000000012ed1d8; 0 drivers -v00000000012e99c0_0 .net "rst", 0 0, v0000000001345b80_0; alias, 1 drivers -E_00000000009407c0 .event posedge, v00000000012e9240_0; -S_00000000009096b0 .scope module, "regfile" "mips_cpu_regfile" 4 106, 8 1 0, S_00000000012eb580; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 5 "readreg1"; - .port_info 2 /INPUT 5 "readreg2"; - .port_info 3 /INPUT 5 "writereg"; - .port_info 4 /INPUT 32 "writedata"; - .port_info 5 /INPUT 1 "regwrite"; - .port_info 6 /INPUT 6 "opcode"; - .port_info 7 /OUTPUT 32 "readdata1"; - .port_info 8 /OUTPUT 32 "readdata2"; - .port_info 9 /OUTPUT 32 "regv0"; -v00000000012e9ce0_2 .array/port v00000000012e9ce0, 2; -L_00000000012db5b0 .functor BUFZ 32, v00000000012e9ce0_2, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; -v00000000012ea3c0_0 .net "clk", 0 0, v00000000013469e0_0; alias, 1 drivers -v00000000012e9ce0 .array "memory", 0 31, 31 0; -v00000000012e8f20_0 .net "opcode", 5 0, L_0000000001344e60; alias, 1 drivers -v00000000012ea0a0_0 .var "readdata1", 31 0; -v00000000012e9740_0 .var "readdata2", 31 0; -v00000000012e9d80_0 .net "readreg1", 4 0, L_0000000001346260; alias, 1 drivers -v00000000012e87a0_0 .net "readreg2", 4 0, L_0000000001344d20; alias, 1 drivers -v00000000012e9e20_0 .net "regv0", 31 0, L_00000000012db5b0; alias, 1 drivers -v00000000012e9f60_0 .net "regwrite", 0 0, v00000000012e85c0_0; alias, 1 drivers -v00000000012e8840_0 .net "writedata", 31 0, v0000000001344430_0; 1 drivers -v00000000012ea460_0 .net "writereg", 4 0, v00000000013444d0_0; 1 drivers -E_0000000000940640 .event negedge, v00000000012e9240_0; -v00000000012e9ce0_0 .array/port v00000000012e9ce0, 0; -v00000000012e9ce0_1 .array/port v00000000012e9ce0, 1; -E_0000000000940880/0 .event edge, v00000000012e9d80_0, v00000000012e9ce0_0, v00000000012e9ce0_1, v00000000012e9ce0_2; -v00000000012e9ce0_3 .array/port v00000000012e9ce0, 3; -v00000000012e9ce0_4 .array/port v00000000012e9ce0, 4; -v00000000012e9ce0_5 .array/port v00000000012e9ce0, 5; -v00000000012e9ce0_6 .array/port v00000000012e9ce0, 6; -E_0000000000940880/1 .event edge, v00000000012e9ce0_3, v00000000012e9ce0_4, v00000000012e9ce0_5, v00000000012e9ce0_6; -v00000000012e9ce0_7 .array/port v00000000012e9ce0, 7; -v00000000012e9ce0_8 .array/port v00000000012e9ce0, 8; -v00000000012e9ce0_9 .array/port v00000000012e9ce0, 9; -v00000000012e9ce0_10 .array/port v00000000012e9ce0, 10; -E_0000000000940880/2 .event edge, v00000000012e9ce0_7, v00000000012e9ce0_8, v00000000012e9ce0_9, v00000000012e9ce0_10; -v00000000012e9ce0_11 .array/port v00000000012e9ce0, 11; -v00000000012e9ce0_12 .array/port v00000000012e9ce0, 12; -v00000000012e9ce0_13 .array/port v00000000012e9ce0, 13; -v00000000012e9ce0_14 .array/port v00000000012e9ce0, 14; -E_0000000000940880/3 .event edge, v00000000012e9ce0_11, v00000000012e9ce0_12, v00000000012e9ce0_13, v00000000012e9ce0_14; -v00000000012e9ce0_15 .array/port v00000000012e9ce0, 15; -v00000000012e9ce0_16 .array/port v00000000012e9ce0, 16; -v00000000012e9ce0_17 .array/port v00000000012e9ce0, 17; -v00000000012e9ce0_18 .array/port v00000000012e9ce0, 18; -E_0000000000940880/4 .event edge, v00000000012e9ce0_15, v00000000012e9ce0_16, v00000000012e9ce0_17, v00000000012e9ce0_18; -v00000000012e9ce0_19 .array/port v00000000012e9ce0, 19; -v00000000012e9ce0_20 .array/port v00000000012e9ce0, 20; -v00000000012e9ce0_21 .array/port v00000000012e9ce0, 21; -v00000000012e9ce0_22 .array/port v00000000012e9ce0, 22; -E_0000000000940880/5 .event edge, v00000000012e9ce0_19, v00000000012e9ce0_20, v00000000012e9ce0_21, v00000000012e9ce0_22; -v00000000012e9ce0_23 .array/port v00000000012e9ce0, 23; -v00000000012e9ce0_24 .array/port v00000000012e9ce0, 24; -v00000000012e9ce0_25 .array/port v00000000012e9ce0, 25; -v00000000012e9ce0_26 .array/port v00000000012e9ce0, 26; -E_0000000000940880/6 .event edge, v00000000012e9ce0_23, v00000000012e9ce0_24, v00000000012e9ce0_25, v00000000012e9ce0_26; -v00000000012e9ce0_27 .array/port v00000000012e9ce0, 27; -v00000000012e9ce0_28 .array/port v00000000012e9ce0, 28; -v00000000012e9ce0_29 .array/port v00000000012e9ce0, 29; -v00000000012e9ce0_30 .array/port v00000000012e9ce0, 30; -E_0000000000940880/7 .event edge, v00000000012e9ce0_27, v00000000012e9ce0_28, v00000000012e9ce0_29, v00000000012e9ce0_30; -v00000000012e9ce0_31 .array/port v00000000012e9ce0, 31; -E_0000000000940880/8 .event edge, v00000000012e9ce0_31, v00000000012e87a0_0; -E_0000000000940880 .event/or E_0000000000940880/0, E_0000000000940880/1, E_0000000000940880/2, E_0000000000940880/3, E_0000000000940880/4, E_0000000000940880/5, E_0000000000940880/6, E_0000000000940880/7, E_0000000000940880/8; -S_00000000008f91d0 .scope begin, "$unm_blk_121" "$unm_blk_121" 8 16, 8 16 0, S_00000000009096b0; - .timescale 0 0; -v00000000012e8ac0_0 .var/i "i", 31 0; -S_00000000008f9470 .scope module, "ramInst" "mips_cpu_memory" 3 9, 9 1 0, S_00000000012ea580; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 32 "data_address"; - .port_info 2 /INPUT 1 "data_write"; - .port_info 3 /INPUT 1 "data_read"; - .port_info 4 /INPUT 32 "data_writedata"; - .port_info 5 /OUTPUT 32 "data_readdata"; - .port_info 6 /INPUT 32 "instr_address"; - .port_info 7 /OUTPUT 32 "instr_readdata"; -P_0000000000940840 .param/str "RAM_INIT_FILE" 0 9 16, "inputs/sll.txt"; -L_00000000012db9a0 .functor AND 1, L_0000000001344be0, L_0000000001345680, C4<1>, C4<1>; -v0000000001344110_0 .net *"_ivl_0", 31 0, L_0000000001345720; 1 drivers -L_0000000001347ba8 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v0000000001343030_0 .net/2u *"_ivl_12", 31 0, L_0000000001347ba8; 1 drivers -v00000000013442f0_0 .net *"_ivl_14", 0 0, L_0000000001344be0; 1 drivers -L_0000000001347bf0 .functor BUFT 1, C4<10111111110000000000000001000000>, C4<0>, C4<0>, C4<0>; -v0000000001344390_0 .net/2u *"_ivl_16", 31 0, L_0000000001347bf0; 1 drivers -v0000000001343fd0_0 .net *"_ivl_18", 0 0, L_0000000001345680; 1 drivers -v0000000001344890_0 .net *"_ivl_2", 31 0, L_00000000013450e0; 1 drivers -v0000000001342c70_0 .net *"_ivl_21", 0 0, L_00000000012db9a0; 1 drivers -v0000000001344610_0 .net *"_ivl_22", 31 0, L_00000000013461c0; 1 drivers -L_0000000001347c38 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v0000000001342db0_0 .net/2u *"_ivl_24", 31 0, L_0000000001347c38; 1 drivers -v00000000013446b0_0 .net *"_ivl_26", 31 0, L_00000000013466c0; 1 drivers -v0000000001344750_0 .net *"_ivl_28", 31 0, L_0000000001345e00; 1 drivers -v0000000001342e50_0 .net *"_ivl_30", 29 0, L_0000000001346760; 1 drivers -L_0000000001347c80 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v00000000013438f0_0 .net *"_ivl_32", 1 0, L_0000000001347c80; 1 drivers -L_0000000001347cc8 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v00000000013449d0_0 .net *"_ivl_34", 31 0, L_0000000001347cc8; 1 drivers -v0000000001343a30_0 .net *"_ivl_4", 29 0, L_0000000001344fa0; 1 drivers -L_0000000001347b18 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v00000000013430d0_0 .net *"_ivl_6", 1 0, L_0000000001347b18; 1 drivers -L_0000000001347b60 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v0000000001342b30_0 .net *"_ivl_8", 31 0, L_0000000001347b60; 1 drivers -v0000000001342bd0_0 .net "clk", 0 0, v00000000013469e0_0; alias, 1 drivers -v0000000001342ef0_0 .net "data_address", 31 0, v00000000012e8b60_0; alias, 1 drivers -v0000000001343170 .array "data_memory", 63 0, 31 0; -v0000000001343210_0 .net "data_read", 0 0, v00000000012e8ca0_0; alias, 1 drivers -v00000000013432b0_0 .net "data_readdata", 31 0, L_0000000001345cc0; alias, 1 drivers -v0000000001343350_0 .net "data_write", 0 0, v00000000012e8de0_0; alias, 1 drivers -v0000000001343490_0 .net "data_writedata", 31 0, v00000000012e8e80_0; alias, 1 drivers -v0000000001346440_0 .net "instr_address", 31 0, v0000000001343d50_0; alias, 1 drivers -v0000000001344b40 .array "instr_memory", 63 0, 31 0; -v00000000013455e0_0 .net "instr_readdata", 31 0, L_0000000001345ea0; alias, 1 drivers -L_0000000001345720 .array/port v0000000001343170, L_00000000013450e0; -L_0000000001344fa0 .part v00000000012e8b60_0, 2, 30; -L_00000000013450e0 .concat [ 30 2 0 0], L_0000000001344fa0, L_0000000001347b18; -L_0000000001345cc0 .functor MUXZ 32, L_0000000001347b60, L_0000000001345720, v00000000012e8ca0_0, C4<>; -L_0000000001344be0 .cmp/ge 32, v0000000001343d50_0, L_0000000001347ba8; -L_0000000001345680 .cmp/gt 32, L_0000000001347bf0, v0000000001343d50_0; -L_00000000013461c0 .array/port v0000000001344b40, L_0000000001345e00; -L_00000000013466c0 .arith/sub 32, v0000000001343d50_0, L_0000000001347c38; -L_0000000001346760 .part L_00000000013466c0, 2, 30; -L_0000000001345e00 .concat [ 30 2 0 0], L_0000000001346760, L_0000000001347c80; -L_0000000001345ea0 .functor MUXZ 32, L_0000000001347cc8, L_00000000013461c0, L_00000000012db9a0, C4<>; -S_00000000008ee5e0 .scope begin, "$unm_blk_104" "$unm_blk_104" 9 21, 9 21 0, S_00000000008f9470; - .timescale 0 0; -v0000000001343710_0 .var/i "i", 31 0; -S_00000000008b2680 .scope begin, "$ivl_for_loop0" "$ivl_for_loop0" 9 36, 9 36 0, S_00000000008ee5e0; - .timescale 0 0; -v0000000001343f30_0 .var/i "j", 31 0; - .scope S_00000000008f9470; -T_0 ; - %fork t_1, S_00000000008ee5e0; - %jmp t_0; - .scope S_00000000008ee5e0; -t_1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v0000000001343710_0, 0, 32; -T_0.0 ; - %load/vec4 v0000000001343710_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v0000000001343710_0; - %store/vec4a v0000000001343170, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0000000001343710_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v0000000001343710_0, 0, 32; - %jmp T_0.0; -T_0.1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v0000000001343710_0, 0, 32; -T_0.2 ; - %load/vec4 v0000000001343710_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.3, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v0000000001343710_0; - %store/vec4a v0000000001344b40, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0000000001343710_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v0000000001343710_0, 0, 32; - %jmp T_0.2; -T_0.3 ; - %vpi_call/w 9 32 "$display", "RAM: Loading RAM contents from %s", P_0000000000940840 {0 0 0}; - %vpi_call/w 9 33 "$readmemh", P_0000000000940840, v0000000001344b40 {0 0 0}; - %fork t_3, S_00000000008b2680; - %jmp t_2; - .scope S_00000000008b2680; -t_3 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v0000000001343f30_0, 0, 32; -T_0.4 ; - %load/vec4 v0000000001343f30_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.5, 5; - %pushi/vec4 3217031168, 0, 32; - %load/vec4 v0000000001343f30_0; - %muli 4, 0, 32; - %add; - %vpi_call/w 9 37 "$display", "byte +%h: %h", S<0,vec4,u32>, &A {1 0 0}; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0000000001343f30_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v0000000001343f30_0, 0, 32; - %jmp T_0.4; -T_0.5 ; - %end; - .scope S_00000000008ee5e0; -t_2 %join; - %end; - .scope S_00000000008f9470; -t_0 %join; - %end; - .thread T_0; - .scope S_00000000008f9470; -T_1 ; - %wait E_00000000009407c0; - %load/vec4 v0000000001343210_0; - %nor/r; - %load/vec4 v0000000001343350_0; - %and; - %flag_set/vec4 8; - %jmp/0xz T_1.0, 8; - %load/vec4 v0000000001346440_0; - %load/vec4 v0000000001342ef0_0; - %cmp/ne; - %jmp/0xz T_1.2, 4; - %load/vec4 v0000000001343490_0; - %load/vec4 v0000000001342ef0_0; - %ix/load 4, 2, 0; - %flag_set/imm 4, 0; - %shiftr 4; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001343170, 0, 4; -T_1.2 ; -T_1.0 ; - %jmp T_1; - .thread T_1; - .scope S_0000000000909520; -T_2 ; - %load/vec4 v00000000012e91a0_0; - %store/vec4 v00000000012e9100_0, 0, 32; - %end; - .thread T_2; - .scope S_0000000000909520; -T_3 ; - %wait E_00000000009407c0; - %load/vec4 v00000000012e99c0_0; - %flag_set/vec4 8; - %jmp/0xz T_3.0, 8; - %pushi/vec4 1, 0, 1; - %assign/vec4 v00000000012e9c40_0, 0; - %pushi/vec4 3217031168, 0, 32; - %assign/vec4 v00000000012e9100_0, 0; - %jmp T_3.1; -T_3.0 ; - %load/vec4 v00000000012e9100_0; - %cmpi/ne 0, 0, 32; - %jmp/0xz T_3.2, 4; - %load/vec4 v00000000012e9c40_0; - %assign/vec4 v00000000012e9c40_0, 0; - %load/vec4 v00000000012e8660_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_3.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_3.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_3.6, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_3.7, 6; - %jmp T_3.8; -T_3.4 ; - %load/vec4 v00000000012e9100_0; - %assign/vec4 v00000000012e9600_0, 0; - %load/vec4 v00000000012e9600_0; - %addi 4, 0, 32; - %assign/vec4 v00000000012e9100_0, 0; - %vpi_call/w 7 27 "$display", "New PC from %h to %h", v00000000012e9600_0, v00000000012e9100_0 {0 0 0}; - %jmp T_3.8; -T_3.5 ; - %load/vec4 v00000000012e91a0_0; - %assign/vec4 v00000000012e9100_0, 0; - %jmp T_3.8; -T_3.6 ; - %load/vec4 v00000000012e91a0_0; - %assign/vec4 v00000000012e9100_0, 0; - %jmp T_3.8; -T_3.7 ; - %vpi_call/w 7 36 "$display", "JUMP REGISTER" {0 0 0}; - %pushi/vec4 0, 0, 32; - %assign/vec4 v00000000012e9100_0, 0; - %jmp T_3.8; -T_3.8 ; - %pop/vec4 1; - %jmp T_3.3; -T_3.2 ; - %load/vec4 v00000000012e9100_0; - %cmpi/e 0, 0, 32; - %jmp/0xz T_3.9, 4; - %pushi/vec4 0, 0, 1; - %assign/vec4 v00000000012e9c40_0, 0; -T_3.9 ; -T_3.3 ; -T_3.1 ; - %jmp T_3; - .thread T_3; - .scope S_0000000000909390; -T_4 ; - %wait E_0000000000947d80; - %vpi_call/w 6 86 "$display", "Opcode: %h", v00000000012e9560_0 {0 0 0}; - %load/vec4 v00000000012e9560_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.0, 4; - %pushi/vec4 0, 0, 2; - %store/vec4 v00000000012ea280_0, 0, 2; - %vpi_call/w 6 89 "$display", "CTRLREGDST: Rt" {0 0 0}; - %jmp T_4.1; -T_4.0 ; - %load/vec4 v00000000012e9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.2, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v00000000012ea280_0, 0, 2; - %vpi_call/w 6 92 "$display", "CTRLREGDST: Rd" {0 0 0}; - %jmp T_4.3; -T_4.2 ; - %load/vec4 v00000000012e9560_0; - %cmpi/e 3, 0, 6; - %jmp/0xz T_4.4, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v00000000012ea280_0, 0, 2; - %vpi_call/w 6 95 "$display", "CTRLREGDST: Link" {0 0 0}; - %jmp T_4.5; -T_4.4 ; - %pushi/vec4 1, 1, 2; - %store/vec4 v00000000012ea280_0, 0, 2; - %vpi_call/w 6 96 "$display", "xxxxxxxxxxxxxx" {0 0 0}; -T_4.5 ; -T_4.3 ; -T_4.1 ; - %load/vec4 v00000000012e9b00_0; - %load/vec4 v00000000012e9560_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012e9560_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012e9560_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012e9560_0; - %pushi/vec4 5, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012e9560_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012e92e0_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012e92e0_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012e92e0_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012e92e0_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.6, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v00000000012e94c0_0, 0, 2; - %jmp T_4.7; -T_4.6 ; - %load/vec4 v00000000012e9560_0; - %cmpi/e 2, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 3, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.8, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v00000000012e94c0_0, 0, 2; - %jmp T_4.9; -T_4.8 ; - %load/vec4 v00000000012ea000_0; - %cmpi/e 8, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012ea000_0; - %cmpi/e 9, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.10, 4; - %pushi/vec4 3, 0, 2; - %store/vec4 v00000000012e94c0_0, 0, 2; - %jmp T_4.11; -T_4.10 ; - %pushi/vec4 0, 0, 2; - %store/vec4 v00000000012e94c0_0, 0, 2; -T_4.11 ; -T_4.9 ; -T_4.7 ; - %load/vec4 v00000000012e9560_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.12, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000012e9a60_0, 0, 1; - %pushi/vec4 1, 0, 2; - %store/vec4 v00000000012ea1e0_0, 0, 2; - %vpi_call/w 6 112 "$display", "Memory read enabled" {0 0 0}; - %jmp T_4.13; -T_4.12 ; - %load/vec4 v00000000012e9560_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.14, 9; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000012e9a60_0, 0, 1; - %pushi/vec4 0, 0, 2; - %store/vec4 v00000000012ea1e0_0, 0, 2; - %vpi_call/w 6 116 "$display", "Memory read disabled" {0 0 0}; - %jmp T_4.15; -T_4.14 ; - %load/vec4 v00000000012e9560_0; - %cmpi/e 3, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.16, 9; - %pushi/vec4 2, 0, 2; - %store/vec4 v00000000012ea1e0_0, 0, 2; - %jmp T_4.17; -T_4.16 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v00000000012e9a60_0, 0, 1; -T_4.17 ; -T_4.15 ; -T_4.13 ; - %load/vec4 v00000000012e9560_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.18, 9; - %pushi/vec4 0, 0, 5; - %store/vec4 v00000000012e9880_0, 0, 5; - %vpi_call/w 6 124 "$display", "ALU OP = 0 (ADDU/ADDIU)" {0 0 0}; - %jmp T_4.19; -T_4.18 ; - %load/vec4 v00000000012e9560_0; - %cmpi/e 12, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.20, 9; - %pushi/vec4 4, 0, 5; - %store/vec4 v00000000012e9880_0, 0, 5; - %jmp T_4.21; -T_4.20 ; - %load/vec4 v00000000012e9560_0; - %cmpi/e 4, 0, 6; - %jmp/0xz T_4.22, 4; - %pushi/vec4 13, 0, 5; - %store/vec4 v00000000012e9880_0, 0, 5; - %jmp T_4.23; -T_4.22 ; - %load/vec4 v00000000012e9560_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012e92e0_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012e92e0_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.24, 8; - %pushi/vec4 17, 0, 5; - %store/vec4 v00000000012e9880_0, 0, 5; - %jmp T_4.25; -T_4.24 ; - %load/vec4 v00000000012e9560_0; - %cmpi/e 7, 0, 6; - %jmp/0xz T_4.26, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v00000000012e9880_0, 0, 5; - %jmp T_4.27; -T_4.26 ; - %load/vec4 v00000000012e9560_0; - %cmpi/e 6, 0, 6; - %jmp/0xz T_4.28, 4; - %pushi/vec4 15, 0, 5; - %store/vec4 v00000000012e9880_0, 0, 5; - %jmp T_4.29; -T_4.28 ; - %load/vec4 v00000000012e9560_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012e92e0_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012e92e0_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.30, 8; - %pushi/vec4 14, 0, 5; - %store/vec4 v00000000012e9880_0, 0, 5; - %jmp T_4.31; -T_4.30 ; - %load/vec4 v00000000012e9560_0; - %cmpi/e 5, 0, 6; - %jmp/0xz T_4.32, 4; - %pushi/vec4 18, 0, 5; - %store/vec4 v00000000012e9880_0, 0, 5; - %jmp T_4.33; -T_4.32 ; - %load/vec4 v00000000012e9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.34, 8; - %pushi/vec4 3, 0, 5; - %store/vec4 v00000000012e9880_0, 0, 5; - %jmp T_4.35; -T_4.34 ; - %load/vec4 v00000000012e9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.36, 8; - %pushi/vec4 23, 0, 5; - %store/vec4 v00000000012e9880_0, 0, 5; - %jmp T_4.37; -T_4.36 ; - %load/vec4 v00000000012e9560_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.38, 4; - %pushi/vec4 0, 0, 5; - %store/vec4 v00000000012e9880_0, 0, 5; - %jmp T_4.39; -T_4.38 ; - %load/vec4 v00000000012e9560_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.40, 4; - %pushi/vec4 7, 0, 5; - %store/vec4 v00000000012e9880_0, 0, 5; - %jmp T_4.41; -T_4.40 ; - %load/vec4 v00000000012e9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.42, 8; - %pushi/vec4 19, 0, 5; - %store/vec4 v00000000012e9880_0, 0, 5; - %jmp T_4.43; -T_4.42 ; - %load/vec4 v00000000012e9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.44, 8; - %pushi/vec4 2, 0, 5; - %store/vec4 v00000000012e9880_0, 0, 5; - %jmp T_4.45; -T_4.44 ; - %load/vec4 v00000000012e9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.46, 8; - %pushi/vec4 22, 0, 5; - %store/vec4 v00000000012e9880_0, 0, 5; - %jmp T_4.47; -T_4.46 ; - %load/vec4 v00000000012e9560_0; - %cmpi/e 13, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.48, 9; - %pushi/vec4 5, 0, 5; - %store/vec4 v00000000012e9880_0, 0, 5; - %jmp T_4.49; -T_4.48 ; - %load/vec4 v00000000012e9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.50, 8; - %pushi/vec4 7, 0, 5; - %store/vec4 v00000000012e9880_0, 0, 5; - %jmp T_4.51; -T_4.50 ; - %load/vec4 v00000000012e9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.52, 8; - %pushi/vec4 8, 0, 5; - %store/vec4 v00000000012e9880_0, 0, 5; - %jmp T_4.53; -T_4.52 ; - %load/vec4 v00000000012e9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.54, 8; - %pushi/vec4 11, 0, 5; - %store/vec4 v00000000012e9880_0, 0, 5; - %jmp T_4.55; -T_4.54 ; - %load/vec4 v00000000012e9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.56, 8; - %pushi/vec4 12, 0, 5; - %store/vec4 v00000000012e9880_0, 0, 5; - %jmp T_4.57; -T_4.56 ; - %load/vec4 v00000000012e9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.58, 8; - %pushi/vec4 9, 0, 5; - %store/vec4 v00000000012e9880_0, 0, 5; - %jmp T_4.59; -T_4.58 ; - %load/vec4 v00000000012e9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.60, 8; - %pushi/vec4 10, 0, 5; - %store/vec4 v00000000012e9880_0, 0, 5; - %jmp T_4.61; -T_4.60 ; - %load/vec4 v00000000012e9560_0; - %cmpi/e 10, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.62, 9; - %pushi/vec4 20, 0, 5; - %store/vec4 v00000000012e9880_0, 0, 5; - %jmp T_4.63; -T_4.62 ; - %load/vec4 v00000000012e9560_0; - %cmpi/e 11, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.64, 9; - %pushi/vec4 21, 0, 5; - %store/vec4 v00000000012e9880_0, 0, 5; - %jmp T_4.65; -T_4.64 ; - %load/vec4 v00000000012e9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.66, 8; - %pushi/vec4 1, 0, 5; - %store/vec4 v00000000012e9880_0, 0, 5; - %jmp T_4.67; -T_4.66 ; - %load/vec4 v00000000012e9560_0; - %cmpi/e 14, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.68, 9; - %pushi/vec4 6, 0, 5; - %store/vec4 v00000000012e9880_0, 0, 5; - %vpi_call/w 6 175 "$display", "ALU Op = 6 (XOR)" {0 0 0}; - %jmp T_4.69; -T_4.68 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v00000000012e9880_0, 0, 5; -T_4.69 ; -T_4.67 ; -T_4.65 ; -T_4.63 ; -T_4.61 ; -T_4.59 ; -T_4.57 ; -T_4.55 ; -T_4.53 ; -T_4.51 ; -T_4.49 ; -T_4.47 ; -T_4.45 ; -T_4.43 ; -T_4.41 ; -T_4.39 ; -T_4.37 ; -T_4.35 ; -T_4.33 ; -T_4.31 ; -T_4.29 ; -T_4.27 ; -T_4.25 ; -T_4.23 ; -T_4.21 ; -T_4.19 ; - %load/vec4 v00000000012e9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.70, 8; - %load/vec4 v00000000012e97e0_0; - %parti/s 5, 6, 4; - %store/vec4 v00000000012e8700_0, 0, 5; - %jmp T_4.71; -T_4.70 ; - %load/vec4 v00000000012e9560_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.72, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v00000000012e8700_0, 0, 5; - %jmp T_4.73; -T_4.72 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v00000000012e8700_0, 0, 5; -T_4.73 ; -T_4.71 ; - %load/vec4 v00000000012e9560_0; - %cmpi/e 40, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.74, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000012e9ba0_0, 0, 1; - %jmp T_4.75; -T_4.74 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000012e9ba0_0, 0, 1; -T_4.75 ; - %load/vec4 v00000000012e9560_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.76, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000012e8a20_0, 0, 1; - %jmp T_4.77; -T_4.76 ; - %load/vec4 v00000000012e9560_0; - %cmpi/e 4, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 7, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 6, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 5, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %load/vec4 v00000000012e9560_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012e92e0_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012e92e0_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012e92e0_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012e92e0_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %flag_or 8, 9; - %jmp/0xz T_4.78, 8; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000012e8a20_0, 0, 1; - %jmp T_4.79; -T_4.78 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v00000000012e8a20_0, 0, 1; -T_4.79 ; -T_4.77 ; - %load/vec4 v00000000012e9560_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012e9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ea000_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.80, 9; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000012e85c0_0, 0, 1; - %jmp T_4.81; -T_4.80 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000012e85c0_0, 0, 1; -T_4.81 ; - %jmp T_4; - .thread T_4, $push; - .scope S_00000000009096b0; -T_5 ; - %fork t_5, S_00000000008f91d0; - %jmp t_4; - .scope S_00000000008f91d0; -t_5 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000012e8ac0_0, 0, 32; -T_5.0 ; - %load/vec4 v00000000012e8ac0_0; - %cmpi/s 32, 0, 32; - %jmp/0xz T_5.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v00000000012e8ac0_0; - %store/vec4a v00000000012e9ce0, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000012e8ac0_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000012e8ac0_0, 0, 32; - %jmp T_5.0; -T_5.1 ; - %end; - .scope S_00000000009096b0; -t_4 %join; - %end; - .thread T_5; - .scope S_00000000009096b0; -T_6 ; -Ewait_0 .event/or E_0000000000940880, E_0x0; - %wait Ewait_0; - %load/vec4 v00000000012e9d80_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v00000000012e9ce0, 4; - %store/vec4 v00000000012ea0a0_0, 0, 32; - %load/vec4 v00000000012e87a0_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v00000000012e9ce0, 4; - %store/vec4 v00000000012e9740_0, 0, 32; - %jmp T_6; - .thread T_6, $push; - .scope S_00000000009096b0; -T_7 ; - %wait E_0000000000940640; - %load/vec4 v00000000012ea460_0; - %cmpi/e 0, 0, 5; - %jmp/0xz T_7.0, 4; - %jmp T_7.1; -T_7.0 ; - %load/vec4 v00000000012e9f60_0; - %flag_set/vec4 8; - %jmp/0xz T_7.2, 8; - %load/vec4 v00000000012e8f20_0; - %dup/vec4; - %pushi/vec4 32, 0, 6; - %cmp/u; - %jmp/1 T_7.4, 6; - %dup/vec4; - %pushi/vec4 36, 0, 6; - %cmp/u; - %jmp/1 T_7.5, 6; - %dup/vec4; - %pushi/vec4 33, 0, 6; - %cmp/u; - %jmp/1 T_7.6, 6; - %dup/vec4; - %pushi/vec4 37, 0, 6; - %cmp/u; - %jmp/1 T_7.7, 6; - %dup/vec4; - %pushi/vec4 34, 0, 6; - %cmp/u; - %jmp/1 T_7.8, 6; - %dup/vec4; - %pushi/vec4 38, 0, 6; - %cmp/u; - %jmp/1 T_7.9, 6; - %load/vec4 v00000000012e8840_0; - %load/vec4 v00000000012ea460_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012e9ce0, 0, 4; - %jmp T_7.11; -T_7.4 ; - %load/vec4 v00000000012ea0a0_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.12, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.13, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.14, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.15, 6; - %jmp T_7.16; -T_7.12 ; - %load/vec4 v00000000012e8840_0; - %parti/s 1, 7, 4; - %replicate 24; - %load/vec4 v00000000012e8840_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000012ea460_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012e9ce0, 0, 4; - %jmp T_7.16; -T_7.13 ; - %load/vec4 v00000000012e8840_0; - %parti/s 1, 15, 5; - %replicate 24; - %load/vec4 v00000000012e8840_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000012ea460_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012e9ce0, 0, 4; - %jmp T_7.16; -T_7.14 ; - %load/vec4 v00000000012e8840_0; - %parti/s 1, 23, 6; - %replicate 24; - %load/vec4 v00000000012e8840_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000012ea460_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012e9ce0, 0, 4; - %jmp T_7.16; -T_7.15 ; - %load/vec4 v00000000012e8840_0; - %parti/s 1, 31, 6; - %replicate 24; - %load/vec4 v00000000012e8840_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000012ea460_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012e9ce0, 0, 4; - %jmp T_7.16; -T_7.16 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.5 ; - %load/vec4 v00000000012ea0a0_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.17, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.18, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.19, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.20, 6; - %jmp T_7.21; -T_7.17 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000012e8840_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000012ea460_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012e9ce0, 0, 4; - %jmp T_7.21; -T_7.18 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000012e8840_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000012ea460_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012e9ce0, 0, 4; - %jmp T_7.21; -T_7.19 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000012e8840_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000012ea460_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012e9ce0, 0, 4; - %jmp T_7.21; -T_7.20 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000012e8840_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000012ea460_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012e9ce0, 0, 4; - %jmp T_7.21; -T_7.21 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.6 ; - %load/vec4 v00000000012ea0a0_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.22, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.23, 6; - %jmp T_7.24; -T_7.22 ; - %load/vec4 v00000000012e8840_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v00000000012e8840_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000012ea460_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012e9ce0, 0, 4; - %jmp T_7.24; -T_7.23 ; - %load/vec4 v00000000012e8840_0; - %parti/s 1, 31, 6; - %replicate 16; - %load/vec4 v00000000012e8840_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000012ea460_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012e9ce0, 0, 4; - %jmp T_7.24; -T_7.24 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.7 ; - %load/vec4 v00000000012ea0a0_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.25, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.26, 6; - %jmp T_7.27; -T_7.25 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v00000000012e8840_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000012ea460_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012e9ce0, 0, 4; - %jmp T_7.27; -T_7.26 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v00000000012e8840_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000012ea460_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012e9ce0, 0, 4; - %jmp T_7.27; -T_7.27 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.8 ; - %load/vec4 v00000000012ea0a0_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.28, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.29, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.30, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.31, 6; - %jmp T_7.32; -T_7.28 ; - %load/vec4 v00000000012e8840_0; - %parti/s 8, 0, 2; - %load/vec4 v00000000012ea460_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 24, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v00000000012e9ce0, 4, 5; - %jmp T_7.32; -T_7.29 ; - %load/vec4 v00000000012e8840_0; - %parti/s 16, 0, 2; - %load/vec4 v00000000012ea460_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 16, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v00000000012e9ce0, 4, 5; - %jmp T_7.32; -T_7.30 ; - %load/vec4 v00000000012e8840_0; - %parti/s 24, 0, 2; - %load/vec4 v00000000012ea460_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 8, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v00000000012e9ce0, 4, 5; - %jmp T_7.32; -T_7.31 ; - %load/vec4 v00000000012e8840_0; - %load/vec4 v00000000012ea460_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012e9ce0, 0, 4; - %jmp T_7.32; -T_7.32 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.9 ; - %load/vec4 v00000000012ea0a0_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.33, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.34, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.35, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.36, 6; - %jmp T_7.37; -T_7.33 ; - %load/vec4 v00000000012e8840_0; - %load/vec4 v00000000012ea460_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012e9ce0, 0, 4; - %jmp T_7.37; -T_7.34 ; - %load/vec4 v00000000012e8840_0; - %parti/s 24, 8, 5; - %load/vec4 v00000000012ea460_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012e9ce0, 0, 4; - %jmp T_7.37; -T_7.35 ; - %load/vec4 v00000000012e8840_0; - %parti/s 16, 16, 6; - %load/vec4 v00000000012ea460_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012e9ce0, 0, 4; - %jmp T_7.37; -T_7.36 ; - %load/vec4 v00000000012e8840_0; - %parti/s 8, 24, 6; - %load/vec4 v00000000012ea460_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012e9ce0, 0, 4; - %jmp T_7.37; -T_7.37 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.11 ; - %pop/vec4 1; -T_7.2 ; -T_7.1 ; - %jmp T_7; - .thread T_7; - .scope S_00000000012eb710; -T_8 ; -Ewait_1 .event/or E_0000000000940f80, E_0x0; - %wait Ewait_1; - %load/vec4 v00000000012e9420_0; - %dup/vec4; - %pushi/vec4 0, 0, 5; - %cmp/u; - %jmp/1 T_8.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 5; - %cmp/u; - %jmp/1 T_8.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 5; - %cmp/u; - %jmp/1 T_8.2, 6; - %dup/vec4; - %pushi/vec4 3, 0, 5; - %cmp/u; - %jmp/1 T_8.3, 6; - %dup/vec4; - %pushi/vec4 4, 0, 5; - %cmp/u; - %jmp/1 T_8.4, 6; - %dup/vec4; - %pushi/vec4 5, 0, 5; - %cmp/u; - %jmp/1 T_8.5, 6; - %dup/vec4; - %pushi/vec4 6, 0, 5; - %cmp/u; - %jmp/1 T_8.6, 6; - %dup/vec4; - %pushi/vec4 7, 0, 5; - %cmp/u; - %jmp/1 T_8.7, 6; - %dup/vec4; - %pushi/vec4 8, 0, 5; - %cmp/u; - %jmp/1 T_8.8, 6; - %dup/vec4; - %pushi/vec4 9, 0, 5; - %cmp/u; - %jmp/1 T_8.9, 6; - %dup/vec4; - %pushi/vec4 10, 0, 5; - %cmp/u; - %jmp/1 T_8.10, 6; - %dup/vec4; - %pushi/vec4 11, 0, 5; - %cmp/u; - %jmp/1 T_8.11, 6; - %dup/vec4; - %pushi/vec4 12, 0, 5; - %cmp/u; - %jmp/1 T_8.12, 6; - %dup/vec4; - %pushi/vec4 13, 0, 5; - %cmp/u; - %jmp/1 T_8.13, 6; - %dup/vec4; - %pushi/vec4 14, 0, 5; - %cmp/u; - %jmp/1 T_8.14, 6; - %dup/vec4; - %pushi/vec4 15, 0, 5; - %cmp/u; - %jmp/1 T_8.15, 6; - %dup/vec4; - %pushi/vec4 16, 0, 5; - %cmp/u; - %jmp/1 T_8.16, 6; - %dup/vec4; - %pushi/vec4 17, 0, 5; - %cmp/u; - %jmp/1 T_8.17, 6; - %dup/vec4; - %pushi/vec4 18, 0, 5; - %cmp/u; - %jmp/1 T_8.18, 6; - %dup/vec4; - %pushi/vec4 19, 0, 5; - %cmp/u; - %jmp/1 T_8.19, 6; - %dup/vec4; - %pushi/vec4 20, 0, 5; - %cmp/u; - %jmp/1 T_8.20, 6; - %dup/vec4; - %pushi/vec4 21, 0, 5; - %cmp/u; - %jmp/1 T_8.21, 6; - %dup/vec4; - %pushi/vec4 22, 0, 5; - %cmp/u; - %jmp/1 T_8.22, 6; - %dup/vec4; - %pushi/vec4 23, 0, 5; - %cmp/u; - %jmp/1 T_8.23, 6; - %jmp T_8.24; -T_8.0 ; - %load/vec4 v00000000012e9060_0; - %load/vec4 v00000000012e8fc0_0; - %add; - %store/vec4 v00000000012ea140_0, 0, 32; - %jmp T_8.24; -T_8.1 ; - %load/vec4 v00000000012e9060_0; - %load/vec4 v00000000012e8fc0_0; - %sub; - %store/vec4 v00000000012ea140_0, 0, 32; - %jmp T_8.24; -T_8.2 ; - %load/vec4 v00000000012e9060_0; - %load/vec4 v00000000012e8fc0_0; - %mul; - %store/vec4 v00000000012ea140_0, 0, 32; - %jmp T_8.24; -T_8.3 ; - %load/vec4 v00000000012e9060_0; - %load/vec4 v00000000012e8fc0_0; - %div/s; - %store/vec4 v00000000012ea140_0, 0, 32; - %jmp T_8.24; -T_8.4 ; - %load/vec4 v00000000012e9060_0; - %load/vec4 v00000000012e8fc0_0; - %and; - %store/vec4 v00000000012ea140_0, 0, 32; - %jmp T_8.24; -T_8.5 ; - %load/vec4 v00000000012e9060_0; - %load/vec4 v00000000012e8fc0_0; - %or; - %store/vec4 v00000000012ea140_0, 0, 32; - %jmp T_8.24; -T_8.6 ; - %load/vec4 v00000000012e9060_0; - %load/vec4 v00000000012e8fc0_0; - %xor; - %store/vec4 v00000000012ea140_0, 0, 32; - %jmp T_8.24; -T_8.7 ; - %load/vec4 v00000000012e8fc0_0; - %ix/getv 4, v00000000012e9920_0; - %shiftl 4; - %store/vec4 v00000000012ea140_0, 0, 32; - %jmp T_8.24; -T_8.8 ; - %load/vec4 v00000000012e8fc0_0; - %ix/getv 4, v00000000012e9060_0; - %shiftl 4; - %store/vec4 v00000000012ea140_0, 0, 32; - %jmp T_8.24; -T_8.9 ; - %load/vec4 v00000000012e8fc0_0; - %ix/getv 4, v00000000012e9920_0; - %shiftr 4; - %store/vec4 v00000000012ea140_0, 0, 32; - %jmp T_8.24; -T_8.10 ; - %load/vec4 v00000000012e8fc0_0; - %ix/getv 4, v00000000012e9060_0; - %shiftr 4; - %store/vec4 v00000000012ea140_0, 0, 32; - %jmp T_8.24; -T_8.11 ; - %load/vec4 v00000000012e8fc0_0; - %ix/getv 4, v00000000012e9920_0; - %shiftr 4; - %store/vec4 v00000000012ea140_0, 0, 32; - %jmp T_8.24; -T_8.12 ; - %load/vec4 v00000000012e8fc0_0; - %ix/getv 4, v00000000012e9060_0; - %shiftr 4; - %store/vec4 v00000000012ea140_0, 0, 32; - %jmp T_8.24; -T_8.13 ; - %load/vec4 v00000000012e9060_0; - %load/vec4 v00000000012e8fc0_0; - %cmp/e; - %jmp/0xz T_8.25, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000012e9380_0, 0, 1; - %jmp T_8.26; -T_8.25 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000012e9380_0, 0, 1; -T_8.26 ; - %jmp T_8.24; -T_8.14 ; - %load/vec4 v00000000012e9060_0; - %load/vec4 v00000000012e8fc0_0; - %cmp/s; - %jmp/0xz T_8.27, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000012e9380_0, 0, 1; - %jmp T_8.28; -T_8.27 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000012e9380_0, 0, 1; -T_8.28 ; - %jmp T_8.24; -T_8.15 ; - %load/vec4 v00000000012e9060_0; - %load/vec4 v00000000012e8fc0_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.29, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000012e9380_0, 0, 1; - %jmp T_8.30; -T_8.29 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000012e9380_0, 0, 1; -T_8.30 ; - %jmp T_8.24; -T_8.16 ; - %load/vec4 v00000000012e8fc0_0; - %load/vec4 v00000000012e9060_0; - %cmp/s; - %jmp/0xz T_8.31, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000012e9380_0, 0, 1; - %jmp T_8.32; -T_8.31 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000012e9380_0, 0, 1; -T_8.32 ; - %jmp T_8.24; -T_8.17 ; - %load/vec4 v00000000012e8fc0_0; - %load/vec4 v00000000012e9060_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.33, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000012e9380_0, 0, 1; - %jmp T_8.34; -T_8.33 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000012e9380_0, 0, 1; -T_8.34 ; - %jmp T_8.24; -T_8.18 ; - %load/vec4 v00000000012e9060_0; - %load/vec4 v00000000012e8fc0_0; - %cmp/ne; - %jmp/0xz T_8.35, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000012e9380_0, 0, 1; - %jmp T_8.36; -T_8.35 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000012e9380_0, 0, 1; -T_8.36 ; - %jmp T_8.24; -T_8.19 ; - %load/vec4 v00000000012e9060_0; - %store/vec4 v00000000012ea140_0, 0, 32; - %jmp T_8.24; -T_8.20 ; - %load/vec4 v00000000012e9060_0; - %load/vec4 v00000000012e8fc0_0; - %cmp/s; - %jmp/0xz T_8.37, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v00000000012ea140_0, 0, 32; -T_8.37 ; - %jmp T_8.24; -T_8.21 ; - %load/vec4 v00000000012e9060_0; - %load/vec4 v00000000012e8fc0_0; - %cmp/u; - %jmp/0xz T_8.39, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v00000000012ea140_0, 0, 32; -T_8.39 ; - %jmp T_8.24; -T_8.22 ; - %load/vec4 v00000000012e9060_0; - %load/vec4 v00000000012e8fc0_0; - %mul; - %store/vec4 v00000000012ea140_0, 0, 32; - %jmp T_8.24; -T_8.23 ; - %load/vec4 v00000000012e9060_0; - %load/vec4 v00000000012e8fc0_0; - %div; - %store/vec4 v00000000012ea140_0, 0, 32; - %jmp T_8.24; -T_8.24 ; - %pop/vec4 1; - %jmp T_8; - .thread T_8, $push; - .scope S_00000000012eb580; -T_9 ; - %pushi/vec4 3217031168, 0, 32; - %store/vec4 v00000000013447f0_0, 0, 32; - %end; - .thread T_9, $init; - .scope S_00000000012eb580; -T_10 ; -Ewait_2 .event/or E_00000000009468c0, E_0x0; - %wait Ewait_2; - %load/vec4 v00000000013441b0_0; - %store/vec4 v0000000001343d50_0, 0, 32; - %load/vec4 v0000000001343cb0_0; - %store/vec4 v00000000012e8b60_0, 0, 32; - %load/vec4 v00000000013433f0_0; - %store/vec4 v00000000012e8de0_0, 0, 1; - %load/vec4 v0000000001343df0_0; - %store/vec4 v00000000012e8ca0_0, 0, 1; - %load/vec4 v0000000001342f90_0; - %store/vec4 v00000000012e8e80_0, 0, 32; - %jmp T_10; - .thread T_10, $push; - .scope S_00000000012eb580; -T_11 ; -Ewait_3 .event/or E_0000000000947100, E_0x0; - %wait Ewait_3; - %load/vec4 v0000000001343990_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.2, 6; - %jmp T_11.3; -T_11.0 ; - %load/vec4 v0000000001343850_0; - %parti/s 5, 16, 6; - %store/vec4 v00000000013444d0_0, 0, 5; - %jmp T_11.3; -T_11.1 ; - %load/vec4 v0000000001343850_0; - %parti/s 5, 11, 5; - %store/vec4 v00000000013444d0_0, 0, 5; - %jmp T_11.3; -T_11.2 ; - %pushi/vec4 31, 0, 5; - %store/vec4 v00000000013444d0_0, 0, 5; - %jmp T_11.3; -T_11.3 ; - %pop/vec4 1; - %load/vec4 v0000000001344930_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.6, 6; - %jmp T_11.7; -T_11.4 ; - %load/vec4 v0000000001343cb0_0; - %store/vec4 v0000000001344430_0, 0, 32; - %jmp T_11.7; -T_11.5 ; - %load/vec4 v00000000012e8d40_0; - %store/vec4 v0000000001344430_0, 0, 32; - %jmp T_11.7; -T_11.6 ; - %load/vec4 v00000000013447f0_0; - %addi 8, 0, 32; - %store/vec4 v0000000001344430_0, 0, 32; - %jmp T_11.7; -T_11.7 ; - %pop/vec4 1; - %load/vec4 v0000000001343c10_0; - %dup/vec4; - %pushi/vec4 1, 0, 1; - %cmp/u; - %jmp/1 T_11.8, 6; - %dup/vec4; - %pushi/vec4 0, 0, 1; - %cmp/u; - %jmp/1 T_11.9, 6; - %jmp T_11.10; -T_11.8 ; - %load/vec4 v0000000001343850_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v0000000001343850_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %store/vec4 v00000000008d97f0_0, 0, 32; - %jmp T_11.10; -T_11.9 ; - %load/vec4 v0000000001342f90_0; - %store/vec4 v00000000008d97f0_0, 0, 32; - %jmp T_11.10; -T_11.10 ; - %pop/vec4 1; - %jmp T_11; - .thread T_11, $push; - .scope S_00000000012ea580; -T_12 ; - %vpi_call/w 3 36 "$dumpfile", "mips_cpu_harvard.vcd" {0 0 0}; - %vpi_call/w 3 37 "$dumpvars", 32'sb00000000000000000000000000000000, S_00000000012ea580 {0 0 0}; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000013469e0_0, 0, 1; - %pushi/vec4 100, 0, 32; -T_12.0 %dup/vec4; - %pushi/vec4 0, 0, 32; - %cmp/s; - %jmp/1xz T_12.1, 5; - %jmp/1 T_12.1, 4; - %pushi/vec4 1, 0, 32; - %sub; - %delay 10, 0; - %load/vec4 v00000000013469e0_0; - %nor/r; - %store/vec4 v00000000013469e0_0, 0, 1; - %delay 10, 0; - %load/vec4 v00000000013469e0_0; - %nor/r; - %store/vec4 v00000000013469e0_0, 0, 1; - %jmp T_12.0; -T_12.1 ; - %pop/vec4 1; - %vpi_call/w 3 47 "$fatal", 32'sb00000000000000000000000000000010, "Simulation did not finish within %d cycles.", P_0000000000933da8 {0 0 0}; - %end; - .thread T_12; - .scope S_00000000012ea580; -T_13 ; - %vpi_call/w 3 51 "$display", "Initial Reset 0" {0 0 0}; - %pushi/vec4 0, 0, 1; - %assign/vec4 v0000000001345b80_0, 0; - %vpi_call/w 3 55 "$display", "Initial Reset 1" {0 0 0}; - %wait E_00000000009407c0; - %pushi/vec4 1, 0, 1; - %assign/vec4 v0000000001345b80_0, 0; - %vpi_call/w 3 59 "$display", "Initial Reset 0: Start Program" {0 0 0}; - %wait E_00000000009407c0; - %pushi/vec4 0, 0, 1; - %assign/vec4 v0000000001345b80_0, 0; - %wait E_00000000009407c0; - %load/vec4 v0000000001345860_0; - %pad/u 32; - %cmpi/e 1, 0, 32; - %jmp/0xz T_13.0, 4; - %jmp T_13.1; -T_13.0 ; - %vpi_call/w 3 65 "$display", "TB: CPU did not set active=1 after reset." {0 0 0}; -T_13.1 ; -T_13.2 ; - %load/vec4 v0000000001345860_0; - %flag_set/vec4 8; - %jmp/0xz T_13.3, 8; - %wait E_00000000009407c0; - %vpi_call/w 3 71 "$display", "Reg File Write data: %d", v0000000001344430_0 {0 0 0}; - %jmp T_13.2; -T_13.3 ; - %wait E_00000000009407c0; - %vpi_call/w 3 74 "$display", "TB: CPU Halt; active=0" {0 0 0}; - %vpi_call/w 3 75 "$display", "Output:" {0 0 0}; - %vpi_call/w 3 76 "$display", "%d", v0000000001345ae0_0 {0 0 0}; - %vpi_call/w 3 77 "$finish" {0 0 0}; - %end; - .thread T_13; -# The file index is used to find the file name in the following table. -:file_names 10; - "N/A"; - ""; - "-"; - "testbench/mips_cpu_harvard_tb.v"; - "rtl/mips_cpu_harvard.v"; - "rtl/mips_cpu_alu.v"; - "rtl/mips_cpu_control.v"; - "rtl/mips_cpu_pc.v"; - "rtl/mips_cpu_regfile.v"; - "rtl/mips_cpu_memory.v"; diff --git a/exec/mips_cpu_harvard_tb_slti b/exec/mips_cpu_harvard_tb_slti deleted file mode 100644 index 1f9cccb..0000000 --- a/exec/mips_cpu_harvard_tb_slti +++ /dev/null @@ -1,2738 +0,0 @@ -#! /usr/local/iverilog/bin/vvp -:ivl_version "11.0 (devel)"; -:ivl_delay_selection "TYPICAL"; -:vpi_time_precision + 0; -:vpi_module "C:\iverilog\lib\ivl\system.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_sys.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_textio.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2005_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\va_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2009.vpi"; -S_000000000114a580 .scope package, "$unit" "$unit" 2 1; - .timescale 0 0; -S_000000000114b580 .scope module, "mips_cpu_harvard_tb" "mips_cpu_harvard_tb" 3 1; - .timescale 0 0; -P_00000000010d33d0 .param/str "RAM_INIT_FILE" 0 3 3, "inputs/slti.txt"; -P_00000000010d3408 .param/l "TIMEOUT_CYCLES" 0 3 4, +C4<00000000000000000000000001100100>; -v00000000011a5180_0 .net "active", 0 0, v0000000001148c00_0; 1 drivers -v00000000011a5b80_0 .var "clk", 0 0; -v00000000011a4e60_0 .var "clk_enable", 0 0; -v00000000011a5680_0 .net "data_address", 31 0, v000000000114a320_0; 1 drivers -v00000000011a5fe0_0 .net "data_read", 0 0, v000000000114a3c0_0; 1 drivers -v00000000011a5ae0_0 .net "data_readdata", 31 0, L_00000000011a6440; 1 drivers -v00000000011a5d60_0 .net "data_write", 0 0, v00000000011485c0_0; 1 drivers -v00000000011a63a0_0 .net "data_writedata", 31 0, v0000000001148700_0; 1 drivers -v00000000011a5f40_0 .net "instr_address", 31 0, v00000000011a3710_0; 1 drivers -v00000000011a6580_0 .net "instr_readdata", 31 0, L_00000000011a54a0; 1 drivers -v00000000011a5e00_0 .net "register_v0", 31 0, L_000000000113af20; 1 drivers -v00000000011a5ea0_0 .var "reset", 0 0; -S_000000000114b710 .scope module, "cpuInst" "mips_cpu_harvard" 3 19, 4 1 0, S_000000000114b580; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "reset"; - .port_info 2 /OUTPUT 1 "active"; - .port_info 3 /OUTPUT 32 "register_v0"; - .port_info 4 /INPUT 1 "clk_enable"; - .port_info 5 /OUTPUT 32 "instr_address"; - .port_info 6 /INPUT 32 "instr_readdata"; - .port_info 7 /OUTPUT 32 "data_address"; - .port_info 8 /OUTPUT 1 "data_write"; - .port_info 9 /OUTPUT 1 "data_read"; - .port_info 10 /OUTPUT 32 "data_writedata"; - .port_info 11 /INPUT 32 "data_readdata"; -v000000000114a280_0 .net "active", 0 0, v0000000001148c00_0; alias, 1 drivers -v0000000001148e80_0 .net "clk", 0 0, v00000000011a5b80_0; 1 drivers -v0000000001149600_0 .net "clk_enable", 0 0, v00000000011a4e60_0; 1 drivers -v000000000114a320_0 .var "data_address", 31 0; -v000000000114a3c0_0 .var "data_read", 0 0; -v000000000114a460_0 .net "data_readdata", 31 0, L_00000000011a6440; alias, 1 drivers -v00000000011485c0_0 .var "data_write", 0 0; -v0000000001148700_0 .var "data_writedata", 31 0; -v0000000001079b90_0 .var "in_B", 31 0; -v00000000011a2b30_0 .net "in_opcode", 5 0, L_00000000011a59a0; 1 drivers -v00000000011a3210_0 .net "in_pc_in", 31 0, v0000000001149420_0; 1 drivers -v00000000011a3c10_0 .net "in_readreg1", 4 0, L_00000000011a64e0; 1 drivers -v00000000011a3ad0_0 .net "in_readreg2", 4 0, L_00000000011a5220; 1 drivers -v00000000011a42f0_0 .var "in_writedata", 31 0; -v00000000011a4110_0 .var "in_writereg", 4 0; -v00000000011a3710_0 .var "instr_address", 31 0; -v00000000011a3850_0 .net "instr_readdata", 31 0, L_00000000011a54a0; alias, 1 drivers -v00000000011a2ef0_0 .net "out_ALUCond", 0 0, v00000000011499c0_0; 1 drivers -v00000000011a4430_0 .net "out_ALUOp", 4 0, v00000000011496a0_0; 1 drivers -v00000000011a3fd0_0 .net "out_ALURes", 31 0, v0000000001149880_0; 1 drivers -v00000000011a2bd0_0 .net "out_ALUSrc", 0 0, v0000000001148fc0_0; 1 drivers -v00000000011a4930_0 .net "out_MemRead", 0 0, v0000000001148a20_0; 1 drivers -v00000000011a3170_0 .net "out_MemWrite", 0 0, v0000000001149920_0; 1 drivers -v00000000011a38f0_0 .net "out_MemtoReg", 1 0, v0000000001148ac0_0; 1 drivers -v00000000011a3b70_0 .net "out_PC", 1 0, v0000000001149100_0; 1 drivers -v00000000011a35d0_0 .net "out_RegDst", 1 0, v0000000001149740_0; 1 drivers -v00000000011a2c70_0 .net "out_RegWrite", 0 0, v0000000001149ec0_0; 1 drivers -v00000000011a3cb0_0 .var "out_pc_out", 31 0; -v00000000011a4070_0 .net "out_readdata1", 31 0, v00000000011487a0_0; 1 drivers -v00000000011a41b0_0 .net "out_readdata2", 31 0, v0000000001148840_0; 1 drivers -v00000000011a3530_0 .net "out_shamt", 4 0, v0000000001149ba0_0; 1 drivers -v00000000011a49d0_0 .net "register_v0", 31 0, L_000000000113af20; alias, 1 drivers -v00000000011a2f90_0 .net "reset", 0 0, v00000000011a5ea0_0; 1 drivers -E_00000000010e6e00/0 .event edge, v0000000001149740_0, v0000000001148b60_0, v0000000001148b60_0, v0000000001148ac0_0; -E_00000000010e6e00/1 .event edge, v0000000001149880_0, v000000000114a460_0, v0000000001148ca0_0, v0000000001148fc0_0; -E_00000000010e6e00/2 .event edge, v0000000001148b60_0, v0000000001148b60_0, v0000000001148840_0; -E_00000000010e6e00 .event/or E_00000000010e6e00/0, E_00000000010e6e00/1, E_00000000010e6e00/2; -E_00000000010e70c0/0 .event edge, v0000000001149420_0, v0000000001149880_0, v0000000001149920_0, v0000000001148a20_0; -E_00000000010e70c0/1 .event edge, v0000000001148840_0; -E_00000000010e70c0 .event/or E_00000000010e70c0/0, E_00000000010e70c0/1; -L_00000000011a64e0 .part L_00000000011a54a0, 21, 5; -L_00000000011a5220 .part L_00000000011a54a0, 16, 5; -L_00000000011a59a0 .part L_00000000011a54a0, 26, 6; -S_00000000010a5e30 .scope module, "alu" "mips_cpu_alu" 4 121, 5 1 0, S_000000000114b710; - .timescale 0 0; - .port_info 0 /INPUT 32 "A"; - .port_info 1 /INPUT 32 "B"; - .port_info 2 /INPUT 5 "ALUOp"; - .port_info 3 /INPUT 5 "shamt"; - .port_info 4 /OUTPUT 1 "ALUCond"; - .port_info 5 /OUTPUT 32 "ALURes"; -enum000000000112bd00 .enum4 (5) - "ADD" 5'b00000, - "SUB" 5'b00001, - "MUL" 5'b00010, - "DIV" 5'b00011, - "AND" 5'b00100, - "OR" 5'b00101, - "XOR" 5'b00110, - "SLL" 5'b00111, - "SLLV" 5'b01000, - "SRL" 5'b01001, - "SRLV" 5'b01010, - "SRA" 5'b01011, - "SRAV" 5'b01100, - "EQ" 5'b01101, - "LES" 5'b01110, - "LEQ" 5'b01111, - "GRT" 5'b10000, - "GEQ" 5'b10001, - "NEQ" 5'b10010, - "PAS" 5'b10011, - "SLT" 5'b10100, - "SLTU" 5'b10101, - "MULU" 5'b10110, - "DIVU" 5'b10111 - ; -L_000000000113b540 .functor BUFZ 5, v00000000011496a0_0, C4<00000>, C4<00000>, C4<00000>; -v00000000011488e0_0 .net "A", 31 0, v00000000011487a0_0; alias, 1 drivers -v00000000011499c0_0 .var "ALUCond", 0 0; -v0000000001149a60_0 .net "ALUOp", 4 0, v00000000011496a0_0; alias, 1 drivers -v00000000011497e0_0 .net "ALUOps", 4 0, L_000000000113b540; 1 drivers -v0000000001149880_0 .var/s "ALURes", 31 0; -v0000000001148f20_0 .net "B", 31 0, v0000000001079b90_0; 1 drivers -v00000000011492e0_0 .net "shamt", 4 0, v0000000001149ba0_0; alias, 1 drivers -E_00000000010e1200 .event edge, v00000000011497e0_0, v00000000011488e0_0, v0000000001148f20_0, v00000000011492e0_0; -S_00000000010a5fc0 .scope module, "control" "mips_cpu_control" 4 90, 6 1 0, S_000000000114b710; - .timescale 0 0; - .port_info 0 /INPUT 32 "Instr"; - .port_info 1 /INPUT 1 "ALUCond"; - .port_info 2 /OUTPUT 2 "CtrlRegDst"; - .port_info 3 /OUTPUT 2 "CtrlPC"; - .port_info 4 /OUTPUT 1 "CtrlMemRead"; - .port_info 5 /OUTPUT 2 "CtrlMemtoReg"; - .port_info 6 /OUTPUT 5 "CtrlALUOp"; - .port_info 7 /OUTPUT 5 "Ctrlshamt"; - .port_info 8 /OUTPUT 1 "CtrlMemWrite"; - .port_info 9 /OUTPUT 1 "CtrlALUSrc"; - .port_info 10 /OUTPUT 1 "CtrlRegWrite"; -enum0000000001129270 .enum4 (5) - "BLTZ" 5'b00000, - "BGEZ" 5'b00001, - "BLTZAL" 5'b10000, - "BGEZAL" 5'b10001 - ; -enum0000000001129730 .enum4 (6) - "SLL" 6'b000000, - "SRL" 6'b000010, - "SRA" 6'b000011, - "SLLV" 6'b000100, - "SRLV" 6'b000110, - "SRAV" 6'b000111, - "JR" 6'b001000, - "JALR" 6'b001001, - "MTHI" 6'b010001, - "MTLO" 6'b010011, - "MULT" 6'b011000, - "MULTU" 6'b011001, - "DIV" 6'b011010, - "DIVU" 6'b011011, - "ADDU" 6'b100001, - "SUBU" 6'b100011, - "AND" 6'b100100, - "OR" 6'b100101, - "XOR" 6'b100110, - "SLT" 6'b101010, - "SLTU" 6'b101011 - ; -enum000000000112b950 .enum4 (6) - "SPECIAL" 6'b000000, - "REGIMM" 6'b000001, - "J" 6'b000010, - "JAL" 6'b000011, - "BEQ" 6'b000100, - "BNE" 6'b000101, - "BLEZ" 6'b000110, - "BGTZ" 6'b000111, - "ADDI" 6'b001000, - "ADDIU" 6'b001001, - "SLTI" 6'b001010, - "SLTIU" 6'b001011, - "ANDI" 6'b001100, - "ORI" 6'b001101, - "XORI" 6'b001110, - "LUI" 6'b001111, - "LB" 6'b100000, - "LH" 6'b100001, - "LWL" 6'b100010, - "LW" 6'b100011, - "LBU" 6'b100100, - "LHU" 6'b100101, - "LWR" 6'b100110, - "SB" 6'b101000, - "SH" 6'b101001, - "SW" 6'b101011 - ; -v0000000001148d40_0 .net "ALUCond", 0 0, v00000000011499c0_0; alias, 1 drivers -v00000000011496a0_0 .var "CtrlALUOp", 4 0; -v0000000001148fc0_0 .var "CtrlALUSrc", 0 0; -v0000000001148a20_0 .var "CtrlMemRead", 0 0; -v0000000001149920_0 .var "CtrlMemWrite", 0 0; -v0000000001148ac0_0 .var "CtrlMemtoReg", 1 0; -v0000000001149100_0 .var "CtrlPC", 1 0; -v0000000001149740_0 .var "CtrlRegDst", 1 0; -v0000000001149ec0_0 .var "CtrlRegWrite", 0 0; -v0000000001149ba0_0 .var "Ctrlshamt", 4 0; -v0000000001148b60_0 .net "Instr", 31 0, L_00000000011a54a0; alias, 1 drivers -v0000000001149c40_0 .net "funct", 5 0, L_00000000011a66c0; 1 drivers -v0000000001149ce0_0 .net "op", 5 0, L_00000000011a5a40; 1 drivers -v0000000001149d80_0 .net "rt", 4 0, L_00000000011a69e0; 1 drivers -E_00000000010e7d00/0 .event edge, v0000000001149ce0_0, v0000000001149c40_0, v00000000011499c0_0, v0000000001149d80_0; -E_00000000010e7d00/1 .event edge, v0000000001148b60_0; -E_00000000010e7d00 .event/or E_00000000010e7d00/0, E_00000000010e7d00/1; -L_00000000011a5a40 .part L_00000000011a54a0, 26, 6; -L_00000000011a66c0 .part L_00000000011a54a0, 0, 6; -L_00000000011a69e0 .part L_00000000011a54a0, 16, 5; -S_00000000010a6150 .scope module, "pc" "pc" 4 79, 7 1 0, S_000000000114b710; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "rst"; - .port_info 2 /INPUT 2 "pc_ctrl"; - .port_info 3 /INPUT 32 "pc_in"; - .port_info 4 /INPUT 5 "rs"; - .port_info 5 /OUTPUT 32 "pc_out"; - .port_info 6 /OUTPUT 1 "active"; -v0000000001148c00_0 .var "active", 0 0; -v000000000114a000_0 .net "clk", 0 0, v00000000011a5b80_0; alias, 1 drivers -v0000000001149e20_0 .net "pc_ctrl", 1 0, v0000000001149100_0; alias, 1 drivers -v0000000001149380_0 .var "pc_curr", 31 0; -v0000000001148ca0_0 .net "pc_in", 31 0, v00000000011a3cb0_0; 1 drivers -v0000000001149420_0 .var "pc_out", 31 0; -o000000000114d1d8 .functor BUFZ 5, C4; HiZ drive -v0000000001148660_0 .net "rs", 4 0, o000000000114d1d8; 0 drivers -v00000000011491a0_0 .net "rst", 0 0, v00000000011a5ea0_0; alias, 1 drivers -E_00000000010e03c0 .event posedge, v000000000114a000_0; -S_00000000010991d0 .scope module, "regfile" "mips_cpu_regfile" 4 106, 8 1 0, S_000000000114b710; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 5 "readreg1"; - .port_info 2 /INPUT 5 "readreg2"; - .port_info 3 /INPUT 5 "writereg"; - .port_info 4 /INPUT 32 "writedata"; - .port_info 5 /INPUT 1 "regwrite"; - .port_info 6 /INPUT 6 "opcode"; - .port_info 7 /OUTPUT 32 "readdata1"; - .port_info 8 /OUTPUT 32 "readdata2"; - .port_info 9 /OUTPUT 32 "regv0"; -v0000000001149240_2 .array/port v0000000001149240, 2; -L_000000000113af20 .functor BUFZ 32, v0000000001149240_2, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; -v0000000001149060_0 .net "clk", 0 0, v00000000011a5b80_0; alias, 1 drivers -v0000000001149240 .array "memory", 0 31, 31 0; -v00000000011494c0_0 .net "opcode", 5 0, L_00000000011a59a0; alias, 1 drivers -v00000000011487a0_0 .var "readdata1", 31 0; -v0000000001148840_0 .var "readdata2", 31 0; -v0000000001149560_0 .net "readreg1", 4 0, L_00000000011a64e0; alias, 1 drivers -v0000000001149f60_0 .net "readreg2", 4 0, L_00000000011a5220; alias, 1 drivers -v000000000114a0a0_0 .net "regv0", 31 0, L_000000000113af20; alias, 1 drivers -v000000000114a140_0 .net "regwrite", 0 0, v0000000001149ec0_0; alias, 1 drivers -v0000000001148de0_0 .net "writedata", 31 0, v00000000011a42f0_0; 1 drivers -v000000000114a1e0_0 .net "writereg", 4 0, v00000000011a4110_0; 1 drivers -E_00000000010e1240 .event negedge, v000000000114a000_0; -v0000000001149240_0 .array/port v0000000001149240, 0; -v0000000001149240_1 .array/port v0000000001149240, 1; -E_00000000010e0440/0 .event edge, v0000000001149560_0, v0000000001149240_0, v0000000001149240_1, v0000000001149240_2; -v0000000001149240_3 .array/port v0000000001149240, 3; -v0000000001149240_4 .array/port v0000000001149240, 4; -v0000000001149240_5 .array/port v0000000001149240, 5; -v0000000001149240_6 .array/port v0000000001149240, 6; -E_00000000010e0440/1 .event edge, v0000000001149240_3, v0000000001149240_4, v0000000001149240_5, v0000000001149240_6; -v0000000001149240_7 .array/port v0000000001149240, 7; -v0000000001149240_8 .array/port v0000000001149240, 8; -v0000000001149240_9 .array/port v0000000001149240, 9; -v0000000001149240_10 .array/port v0000000001149240, 10; -E_00000000010e0440/2 .event edge, v0000000001149240_7, v0000000001149240_8, v0000000001149240_9, v0000000001149240_10; -v0000000001149240_11 .array/port v0000000001149240, 11; -v0000000001149240_12 .array/port v0000000001149240, 12; -v0000000001149240_13 .array/port v0000000001149240, 13; -v0000000001149240_14 .array/port v0000000001149240, 14; -E_00000000010e0440/3 .event edge, v0000000001149240_11, v0000000001149240_12, v0000000001149240_13, v0000000001149240_14; -v0000000001149240_15 .array/port v0000000001149240, 15; -v0000000001149240_16 .array/port v0000000001149240, 16; -v0000000001149240_17 .array/port v0000000001149240, 17; -v0000000001149240_18 .array/port v0000000001149240, 18; -E_00000000010e0440/4 .event edge, v0000000001149240_15, v0000000001149240_16, v0000000001149240_17, v0000000001149240_18; -v0000000001149240_19 .array/port v0000000001149240, 19; -v0000000001149240_20 .array/port v0000000001149240, 20; -v0000000001149240_21 .array/port v0000000001149240, 21; -v0000000001149240_22 .array/port v0000000001149240, 22; -E_00000000010e0440/5 .event edge, v0000000001149240_19, v0000000001149240_20, v0000000001149240_21, v0000000001149240_22; -v0000000001149240_23 .array/port v0000000001149240, 23; -v0000000001149240_24 .array/port v0000000001149240, 24; -v0000000001149240_25 .array/port v0000000001149240, 25; -v0000000001149240_26 .array/port v0000000001149240, 26; -E_00000000010e0440/6 .event edge, v0000000001149240_23, v0000000001149240_24, v0000000001149240_25, v0000000001149240_26; -v0000000001149240_27 .array/port v0000000001149240, 27; -v0000000001149240_28 .array/port v0000000001149240, 28; -v0000000001149240_29 .array/port v0000000001149240, 29; -v0000000001149240_30 .array/port v0000000001149240, 30; -E_00000000010e0440/7 .event edge, v0000000001149240_27, v0000000001149240_28, v0000000001149240_29, v0000000001149240_30; -v0000000001149240_31 .array/port v0000000001149240, 31; -E_00000000010e0440/8 .event edge, v0000000001149240_31, v0000000001149f60_0; -E_00000000010e0440 .event/or E_00000000010e0440/0, E_00000000010e0440/1, E_00000000010e0440/2, E_00000000010e0440/3, E_00000000010e0440/4, E_00000000010e0440/5, E_00000000010e0440/6, E_00000000010e0440/7, E_00000000010e0440/8; -S_0000000001099360 .scope begin, "$unm_blk_121" "$unm_blk_121" 8 16, 8 16 0, S_00000000010991d0; - .timescale 0 0; -v0000000001148980_0 .var/i "i", 31 0; -S_00000000010994f0 .scope module, "ramInst" "mips_cpu_memory" 3 9, 9 1 0, S_000000000114b580; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 32 "data_address"; - .port_info 2 /INPUT 1 "data_write"; - .port_info 3 /INPUT 1 "data_read"; - .port_info 4 /INPUT 32 "data_writedata"; - .port_info 5 /OUTPUT 32 "data_readdata"; - .port_info 6 /INPUT 32 "instr_address"; - .port_info 7 /OUTPUT 32 "instr_readdata"; -P_00000000010e0480 .param/str "RAM_INIT_FILE" 0 9 16, "inputs/slti.txt"; -L_000000000113ae40 .functor AND 1, L_00000000011a5720, L_00000000011a5400, C4<1>, C4<1>; -v00000000011a3d50_0 .net *"_ivl_0", 31 0, L_00000000011a6080; 1 drivers -L_00000000011a7ba8 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v00000000011a46b0_0 .net/2u *"_ivl_12", 31 0, L_00000000011a7ba8; 1 drivers -v00000000011a32b0_0 .net *"_ivl_14", 0 0, L_00000000011a5720; 1 drivers -L_00000000011a7bf0 .functor BUFT 1, C4<10111111110000000000000001000000>, C4<0>, C4<0>, C4<0>; -v00000000011a3350_0 .net/2u *"_ivl_16", 31 0, L_00000000011a7bf0; 1 drivers -v00000000011a3e90_0 .net *"_ivl_18", 0 0, L_00000000011a5400; 1 drivers -v00000000011a4250_0 .net *"_ivl_2", 31 0, L_00000000011a5860; 1 drivers -v00000000011a4390_0 .net *"_ivl_21", 0 0, L_000000000113ae40; 1 drivers -v00000000011a2d10_0 .net *"_ivl_22", 31 0, L_00000000011a52c0; 1 drivers -L_00000000011a7c38 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v00000000011a4750_0 .net/2u *"_ivl_24", 31 0, L_00000000011a7c38; 1 drivers -v00000000011a3030_0 .net *"_ivl_26", 31 0, L_00000000011a5900; 1 drivers -v00000000011a2db0_0 .net *"_ivl_28", 31 0, L_00000000011a6300; 1 drivers -v00000000011a3f30_0 .net *"_ivl_30", 29 0, L_00000000011a61c0; 1 drivers -L_00000000011a7c80 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v00000000011a33f0_0 .net *"_ivl_32", 1 0, L_00000000011a7c80; 1 drivers -L_00000000011a7cc8 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v00000000011a3490_0 .net *"_ivl_34", 31 0, L_00000000011a7cc8; 1 drivers -v00000000011a37b0_0 .net *"_ivl_4", 29 0, L_00000000011a6120; 1 drivers -L_00000000011a7b18 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v00000000011a2e50_0 .net *"_ivl_6", 1 0, L_00000000011a7b18; 1 drivers -L_00000000011a7b60 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v00000000011a44d0_0 .net *"_ivl_8", 31 0, L_00000000011a7b60; 1 drivers -v00000000011a4570_0 .net "clk", 0 0, v00000000011a5b80_0; alias, 1 drivers -v00000000011a3990_0 .net "data_address", 31 0, v000000000114a320_0; alias, 1 drivers -v00000000011a4610 .array "data_memory", 63 0, 31 0; -v00000000011a3a30_0 .net "data_read", 0 0, v000000000114a3c0_0; alias, 1 drivers -v00000000011a47f0_0 .net "data_readdata", 31 0, L_00000000011a6440; alias, 1 drivers -v00000000011a4890_0 .net "data_write", 0 0, v00000000011485c0_0; alias, 1 drivers -v00000000011a30d0_0 .net "data_writedata", 31 0, v0000000001148700_0; alias, 1 drivers -v00000000011a4dc0_0 .net "instr_address", 31 0, v00000000011a3710_0; alias, 1 drivers -v00000000011a55e0 .array "instr_memory", 63 0, 31 0; -v00000000011a6260_0 .net "instr_readdata", 31 0, L_00000000011a54a0; alias, 1 drivers -L_00000000011a6080 .array/port v00000000011a4610, L_00000000011a5860; -L_00000000011a6120 .part v000000000114a320_0, 2, 30; -L_00000000011a5860 .concat [ 30 2 0 0], L_00000000011a6120, L_00000000011a7b18; -L_00000000011a6440 .functor MUXZ 32, L_00000000011a7b60, L_00000000011a6080, v000000000114a3c0_0, C4<>; -L_00000000011a5720 .cmp/ge 32, v00000000011a3710_0, L_00000000011a7ba8; -L_00000000011a5400 .cmp/gt 32, L_00000000011a7bf0, v00000000011a3710_0; -L_00000000011a52c0 .array/port v00000000011a55e0, L_00000000011a6300; -L_00000000011a5900 .arith/sub 32, v00000000011a3710_0, L_00000000011a7c38; -L_00000000011a61c0 .part L_00000000011a5900, 2, 30; -L_00000000011a6300 .concat [ 30 2 0 0], L_00000000011a61c0, L_00000000011a7c80; -L_00000000011a54a0 .functor MUXZ 32, L_00000000011a7cc8, L_00000000011a52c0, L_000000000113ae40, C4<>; -S_000000000108e5e0 .scope begin, "$unm_blk_104" "$unm_blk_104" 9 21, 9 21 0, S_00000000010994f0; - .timescale 0 0; -v00000000011a3670_0 .var/i "i", 31 0; -S_0000000001052680 .scope begin, "$ivl_for_loop0" "$ivl_for_loop0" 9 36, 9 36 0, S_000000000108e5e0; - .timescale 0 0; -v00000000011a3df0_0 .var/i "j", 31 0; - .scope S_00000000010994f0; -T_0 ; - %fork t_1, S_000000000108e5e0; - %jmp t_0; - .scope S_000000000108e5e0; -t_1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000011a3670_0, 0, 32; -T_0.0 ; - %load/vec4 v00000000011a3670_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v00000000011a3670_0; - %store/vec4a v00000000011a4610, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000011a3670_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000011a3670_0, 0, 32; - %jmp T_0.0; -T_0.1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000011a3670_0, 0, 32; -T_0.2 ; - %load/vec4 v00000000011a3670_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.3, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v00000000011a3670_0; - %store/vec4a v00000000011a55e0, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000011a3670_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000011a3670_0, 0, 32; - %jmp T_0.2; -T_0.3 ; - %vpi_call/w 9 32 "$display", "RAM: Loading RAM contents from %s", P_00000000010e0480 {0 0 0}; - %vpi_call/w 9 33 "$readmemh", P_00000000010e0480, v00000000011a55e0 {0 0 0}; - %fork t_3, S_0000000001052680; - %jmp t_2; - .scope S_0000000001052680; -t_3 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000011a3df0_0, 0, 32; -T_0.4 ; - %load/vec4 v00000000011a3df0_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.5, 5; - %pushi/vec4 3217031168, 0, 32; - %load/vec4 v00000000011a3df0_0; - %muli 4, 0, 32; - %add; - %vpi_call/w 9 37 "$display", "byte +%h: %h", S<0,vec4,u32>, &A {1 0 0}; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000011a3df0_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000011a3df0_0, 0, 32; - %jmp T_0.4; -T_0.5 ; - %end; - .scope S_000000000108e5e0; -t_2 %join; - %end; - .scope S_00000000010994f0; -t_0 %join; - %end; - .thread T_0; - .scope S_00000000010994f0; -T_1 ; - %wait E_00000000010e03c0; - %load/vec4 v00000000011a3a30_0; - %nor/r; - %load/vec4 v00000000011a4890_0; - %and; - %flag_set/vec4 8; - %jmp/0xz T_1.0, 8; - %load/vec4 v00000000011a4dc0_0; - %load/vec4 v00000000011a3990_0; - %cmp/ne; - %jmp/0xz T_1.2, 4; - %load/vec4 v00000000011a30d0_0; - %load/vec4 v00000000011a3990_0; - %ix/load 4, 2, 0; - %flag_set/imm 4, 0; - %shiftr 4; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011a4610, 0, 4; -T_1.2 ; -T_1.0 ; - %jmp T_1; - .thread T_1; - .scope S_00000000010a6150; -T_2 ; - %load/vec4 v0000000001148ca0_0; - %store/vec4 v0000000001149420_0, 0, 32; - %end; - .thread T_2; - .scope S_00000000010a6150; -T_3 ; - %wait E_00000000010e03c0; - %load/vec4 v00000000011491a0_0; - %flag_set/vec4 8; - %jmp/0xz T_3.0, 8; - %pushi/vec4 1, 0, 1; - %assign/vec4 v0000000001148c00_0, 0; - %pushi/vec4 3217031168, 0, 32; - %assign/vec4 v0000000001149420_0, 0; - %jmp T_3.1; -T_3.0 ; - %load/vec4 v0000000001149420_0; - %cmpi/ne 0, 0, 32; - %jmp/0xz T_3.2, 4; - %load/vec4 v0000000001148c00_0; - %assign/vec4 v0000000001148c00_0, 0; - %load/vec4 v0000000001149e20_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_3.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_3.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_3.6, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_3.7, 6; - %jmp T_3.8; -T_3.4 ; - %load/vec4 v0000000001149420_0; - %assign/vec4 v0000000001149380_0, 0; - %load/vec4 v0000000001149380_0; - %addi 4, 0, 32; - %assign/vec4 v0000000001149420_0, 0; - %vpi_call/w 7 27 "$display", "New PC from %h to %h", v0000000001149380_0, v0000000001149420_0 {0 0 0}; - %jmp T_3.8; -T_3.5 ; - %load/vec4 v0000000001148ca0_0; - %assign/vec4 v0000000001149420_0, 0; - %jmp T_3.8; -T_3.6 ; - %load/vec4 v0000000001148ca0_0; - %assign/vec4 v0000000001149420_0, 0; - %jmp T_3.8; -T_3.7 ; - %vpi_call/w 7 36 "$display", "JUMP REGISTER" {0 0 0}; - %pushi/vec4 0, 0, 32; - %assign/vec4 v0000000001149420_0, 0; - %jmp T_3.8; -T_3.8 ; - %pop/vec4 1; - %jmp T_3.3; -T_3.2 ; - %load/vec4 v0000000001149420_0; - %cmpi/e 0, 0, 32; - %jmp/0xz T_3.9, 4; - %pushi/vec4 0, 0, 1; - %assign/vec4 v0000000001148c00_0, 0; -T_3.9 ; -T_3.3 ; -T_3.1 ; - %jmp T_3; - .thread T_3; - .scope S_00000000010a5fc0; -T_4 ; - %wait E_00000000010e7d00; - %vpi_call/w 6 86 "$display", "Opcode: %h", v0000000001149ce0_0 {0 0 0}; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.0, 4; - %pushi/vec4 0, 0, 2; - %store/vec4 v0000000001149740_0, 0, 2; - %vpi_call/w 6 89 "$display", "CTRLREGDST: Rt" {0 0 0}; - %jmp T_4.1; -T_4.0 ; - %load/vec4 v0000000001149ce0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.2, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v0000000001149740_0, 0, 2; - %vpi_call/w 6 92 "$display", "CTRLREGDST: Rd" {0 0 0}; - %jmp T_4.3; -T_4.2 ; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 3, 0, 6; - %jmp/0xz T_4.4, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v0000000001149740_0, 0, 2; - %vpi_call/w 6 95 "$display", "CTRLREGDST: Link" {0 0 0}; - %jmp T_4.5; -T_4.4 ; - %pushi/vec4 1, 1, 2; - %store/vec4 v0000000001149740_0, 0, 2; - %vpi_call/w 6 96 "$display", "xxxxxxxxxxxxxx" {0 0 0}; -T_4.5 ; -T_4.3 ; -T_4.1 ; - %load/vec4 v0000000001148d40_0; - %load/vec4 v0000000001149ce0_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149ce0_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149ce0_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149ce0_0; - %pushi/vec4 5, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149ce0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149d80_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149d80_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149d80_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149d80_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.6, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v0000000001149100_0, 0, 2; - %jmp T_4.7; -T_4.6 ; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 2, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 3, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.8, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v0000000001149100_0, 0, 2; - %jmp T_4.9; -T_4.8 ; - %load/vec4 v0000000001149c40_0; - %cmpi/e 8, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001149c40_0; - %cmpi/e 9, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.10, 4; - %pushi/vec4 3, 0, 2; - %store/vec4 v0000000001149100_0, 0, 2; - %jmp T_4.11; -T_4.10 ; - %pushi/vec4 0, 0, 2; - %store/vec4 v0000000001149100_0, 0, 2; -T_4.11 ; -T_4.9 ; -T_4.7 ; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.12, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001148a20_0, 0, 1; - %pushi/vec4 1, 0, 2; - %store/vec4 v0000000001148ac0_0, 0, 2; - %vpi_call/w 6 112 "$display", "Memory read enabled" {0 0 0}; - %jmp T_4.13; -T_4.12 ; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.14, 9; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001148a20_0, 0, 1; - %pushi/vec4 0, 0, 2; - %store/vec4 v0000000001148ac0_0, 0, 2; - %vpi_call/w 6 116 "$display", "Memory read disabled" {0 0 0}; - %jmp T_4.15; -T_4.14 ; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 3, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.16, 9; - %pushi/vec4 2, 0, 2; - %store/vec4 v0000000001148ac0_0, 0, 2; - %jmp T_4.17; -T_4.16 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v0000000001148a20_0, 0, 1; -T_4.17 ; -T_4.15 ; -T_4.13 ; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.18, 9; - %pushi/vec4 0, 0, 5; - %store/vec4 v00000000011496a0_0, 0, 5; - %vpi_call/w 6 124 "$display", "ALU OP = 0 (ADDU/ADDIU)" {0 0 0}; - %jmp T_4.19; -T_4.18 ; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 12, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.20, 9; - %pushi/vec4 4, 0, 5; - %store/vec4 v00000000011496a0_0, 0, 5; - %jmp T_4.21; -T_4.20 ; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 4, 0, 6; - %jmp/0xz T_4.22, 4; - %pushi/vec4 13, 0, 5; - %store/vec4 v00000000011496a0_0, 0, 5; - %jmp T_4.23; -T_4.22 ; - %load/vec4 v0000000001149ce0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149d80_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149d80_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.24, 8; - %pushi/vec4 17, 0, 5; - %store/vec4 v00000000011496a0_0, 0, 5; - %jmp T_4.25; -T_4.24 ; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 7, 0, 6; - %jmp/0xz T_4.26, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v00000000011496a0_0, 0, 5; - %jmp T_4.27; -T_4.26 ; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 6, 0, 6; - %jmp/0xz T_4.28, 4; - %pushi/vec4 15, 0, 5; - %store/vec4 v00000000011496a0_0, 0, 5; - %jmp T_4.29; -T_4.28 ; - %load/vec4 v0000000001149ce0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149d80_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149d80_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.30, 8; - %pushi/vec4 14, 0, 5; - %store/vec4 v00000000011496a0_0, 0, 5; - %jmp T_4.31; -T_4.30 ; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 5, 0, 6; - %jmp/0xz T_4.32, 4; - %pushi/vec4 18, 0, 5; - %store/vec4 v00000000011496a0_0, 0, 5; - %jmp T_4.33; -T_4.32 ; - %load/vec4 v0000000001149ce0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.34, 8; - %pushi/vec4 3, 0, 5; - %store/vec4 v00000000011496a0_0, 0, 5; - %jmp T_4.35; -T_4.34 ; - %load/vec4 v0000000001149ce0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.36, 8; - %pushi/vec4 23, 0, 5; - %store/vec4 v00000000011496a0_0, 0, 5; - %jmp T_4.37; -T_4.36 ; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.38, 4; - %pushi/vec4 0, 0, 5; - %store/vec4 v00000000011496a0_0, 0, 5; - %jmp T_4.39; -T_4.38 ; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.40, 4; - %pushi/vec4 7, 0, 5; - %store/vec4 v00000000011496a0_0, 0, 5; - %jmp T_4.41; -T_4.40 ; - %load/vec4 v0000000001149ce0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.42, 8; - %pushi/vec4 19, 0, 5; - %store/vec4 v00000000011496a0_0, 0, 5; - %jmp T_4.43; -T_4.42 ; - %load/vec4 v0000000001149ce0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.44, 8; - %pushi/vec4 2, 0, 5; - %store/vec4 v00000000011496a0_0, 0, 5; - %jmp T_4.45; -T_4.44 ; - %load/vec4 v0000000001149ce0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.46, 8; - %pushi/vec4 22, 0, 5; - %store/vec4 v00000000011496a0_0, 0, 5; - %jmp T_4.47; -T_4.46 ; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 13, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.48, 9; - %pushi/vec4 5, 0, 5; - %store/vec4 v00000000011496a0_0, 0, 5; - %jmp T_4.49; -T_4.48 ; - %load/vec4 v0000000001149ce0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.50, 8; - %pushi/vec4 7, 0, 5; - %store/vec4 v00000000011496a0_0, 0, 5; - %jmp T_4.51; -T_4.50 ; - %load/vec4 v0000000001149ce0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.52, 8; - %pushi/vec4 8, 0, 5; - %store/vec4 v00000000011496a0_0, 0, 5; - %jmp T_4.53; -T_4.52 ; - %load/vec4 v0000000001149ce0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.54, 8; - %pushi/vec4 11, 0, 5; - %store/vec4 v00000000011496a0_0, 0, 5; - %jmp T_4.55; -T_4.54 ; - %load/vec4 v0000000001149ce0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.56, 8; - %pushi/vec4 12, 0, 5; - %store/vec4 v00000000011496a0_0, 0, 5; - %jmp T_4.57; -T_4.56 ; - %load/vec4 v0000000001149ce0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.58, 8; - %pushi/vec4 9, 0, 5; - %store/vec4 v00000000011496a0_0, 0, 5; - %jmp T_4.59; -T_4.58 ; - %load/vec4 v0000000001149ce0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.60, 8; - %pushi/vec4 10, 0, 5; - %store/vec4 v00000000011496a0_0, 0, 5; - %jmp T_4.61; -T_4.60 ; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 10, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.62, 9; - %pushi/vec4 20, 0, 5; - %store/vec4 v00000000011496a0_0, 0, 5; - %jmp T_4.63; -T_4.62 ; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 11, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.64, 9; - %pushi/vec4 21, 0, 5; - %store/vec4 v00000000011496a0_0, 0, 5; - %jmp T_4.65; -T_4.64 ; - %load/vec4 v0000000001149ce0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.66, 8; - %pushi/vec4 1, 0, 5; - %store/vec4 v00000000011496a0_0, 0, 5; - %jmp T_4.67; -T_4.66 ; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 14, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.68, 9; - %pushi/vec4 6, 0, 5; - %store/vec4 v00000000011496a0_0, 0, 5; - %vpi_call/w 6 175 "$display", "ALU Op = 6 (XOR)" {0 0 0}; - %jmp T_4.69; -T_4.68 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v00000000011496a0_0, 0, 5; -T_4.69 ; -T_4.67 ; -T_4.65 ; -T_4.63 ; -T_4.61 ; -T_4.59 ; -T_4.57 ; -T_4.55 ; -T_4.53 ; -T_4.51 ; -T_4.49 ; -T_4.47 ; -T_4.45 ; -T_4.43 ; -T_4.41 ; -T_4.39 ; -T_4.37 ; -T_4.35 ; -T_4.33 ; -T_4.31 ; -T_4.29 ; -T_4.27 ; -T_4.25 ; -T_4.23 ; -T_4.21 ; -T_4.19 ; - %load/vec4 v0000000001149ce0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.70, 8; - %load/vec4 v0000000001148b60_0; - %parti/s 5, 6, 4; - %store/vec4 v0000000001149ba0_0, 0, 5; - %jmp T_4.71; -T_4.70 ; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.72, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v0000000001149ba0_0, 0, 5; - %jmp T_4.73; -T_4.72 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v0000000001149ba0_0, 0, 5; -T_4.73 ; -T_4.71 ; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 40, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.74, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001149920_0, 0, 1; - %jmp T_4.75; -T_4.74 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001149920_0, 0, 1; -T_4.75 ; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.76, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001148fc0_0, 0, 1; - %jmp T_4.77; -T_4.76 ; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 4, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 7, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 6, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 5, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %load/vec4 v0000000001149ce0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149d80_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149d80_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149d80_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149d80_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %flag_or 8, 9; - %jmp/0xz T_4.78, 8; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001148fc0_0, 0, 1; - %jmp T_4.79; -T_4.78 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v0000000001148fc0_0, 0, 1; -T_4.79 ; -T_4.77 ; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001149ce0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001149c40_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.80, 9; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001149ec0_0, 0, 1; - %jmp T_4.81; -T_4.80 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001149ec0_0, 0, 1; -T_4.81 ; - %jmp T_4; - .thread T_4, $push; - .scope S_00000000010991d0; -T_5 ; - %fork t_5, S_0000000001099360; - %jmp t_4; - .scope S_0000000001099360; -t_5 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v0000000001148980_0, 0, 32; -T_5.0 ; - %load/vec4 v0000000001148980_0; - %cmpi/s 32, 0, 32; - %jmp/0xz T_5.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v0000000001148980_0; - %store/vec4a v0000000001149240, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0000000001148980_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v0000000001148980_0, 0, 32; - %jmp T_5.0; -T_5.1 ; - %end; - .scope S_00000000010991d0; -t_4 %join; - %end; - .thread T_5; - .scope S_00000000010991d0; -T_6 ; -Ewait_0 .event/or E_00000000010e0440, E_0x0; - %wait Ewait_0; - %load/vec4 v0000000001149560_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v0000000001149240, 4; - %store/vec4 v00000000011487a0_0, 0, 32; - %load/vec4 v0000000001149f60_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v0000000001149240, 4; - %store/vec4 v0000000001148840_0, 0, 32; - %jmp T_6; - .thread T_6, $push; - .scope S_00000000010991d0; -T_7 ; - %wait E_00000000010e1240; - %load/vec4 v000000000114a1e0_0; - %cmpi/e 0, 0, 5; - %jmp/0xz T_7.0, 4; - %jmp T_7.1; -T_7.0 ; - %load/vec4 v000000000114a140_0; - %flag_set/vec4 8; - %jmp/0xz T_7.2, 8; - %load/vec4 v00000000011494c0_0; - %dup/vec4; - %pushi/vec4 32, 0, 6; - %cmp/u; - %jmp/1 T_7.4, 6; - %dup/vec4; - %pushi/vec4 36, 0, 6; - %cmp/u; - %jmp/1 T_7.5, 6; - %dup/vec4; - %pushi/vec4 33, 0, 6; - %cmp/u; - %jmp/1 T_7.6, 6; - %dup/vec4; - %pushi/vec4 37, 0, 6; - %cmp/u; - %jmp/1 T_7.7, 6; - %dup/vec4; - %pushi/vec4 34, 0, 6; - %cmp/u; - %jmp/1 T_7.8, 6; - %dup/vec4; - %pushi/vec4 38, 0, 6; - %cmp/u; - %jmp/1 T_7.9, 6; - %load/vec4 v0000000001148de0_0; - %load/vec4 v000000000114a1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001149240, 0, 4; - %jmp T_7.11; -T_7.4 ; - %load/vec4 v00000000011487a0_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.12, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.13, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.14, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.15, 6; - %jmp T_7.16; -T_7.12 ; - %load/vec4 v0000000001148de0_0; - %parti/s 1, 7, 4; - %replicate 24; - %load/vec4 v0000000001148de0_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000114a1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001149240, 0, 4; - %jmp T_7.16; -T_7.13 ; - %load/vec4 v0000000001148de0_0; - %parti/s 1, 15, 5; - %replicate 24; - %load/vec4 v0000000001148de0_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000114a1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001149240, 0, 4; - %jmp T_7.16; -T_7.14 ; - %load/vec4 v0000000001148de0_0; - %parti/s 1, 23, 6; - %replicate 24; - %load/vec4 v0000000001148de0_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000114a1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001149240, 0, 4; - %jmp T_7.16; -T_7.15 ; - %load/vec4 v0000000001148de0_0; - %parti/s 1, 31, 6; - %replicate 24; - %load/vec4 v0000000001148de0_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000114a1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001149240, 0, 4; - %jmp T_7.16; -T_7.16 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.5 ; - %load/vec4 v00000000011487a0_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.17, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.18, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.19, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.20, 6; - %jmp T_7.21; -T_7.17 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v0000000001148de0_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000114a1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001149240, 0, 4; - %jmp T_7.21; -T_7.18 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v0000000001148de0_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000114a1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001149240, 0, 4; - %jmp T_7.21; -T_7.19 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v0000000001148de0_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000114a1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001149240, 0, 4; - %jmp T_7.21; -T_7.20 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v0000000001148de0_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000114a1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001149240, 0, 4; - %jmp T_7.21; -T_7.21 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.6 ; - %load/vec4 v00000000011487a0_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.22, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.23, 6; - %jmp T_7.24; -T_7.22 ; - %load/vec4 v0000000001148de0_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v0000000001148de0_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000114a1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001149240, 0, 4; - %jmp T_7.24; -T_7.23 ; - %load/vec4 v0000000001148de0_0; - %parti/s 1, 31, 6; - %replicate 16; - %load/vec4 v0000000001148de0_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000114a1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001149240, 0, 4; - %jmp T_7.24; -T_7.24 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.7 ; - %load/vec4 v00000000011487a0_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.25, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.26, 6; - %jmp T_7.27; -T_7.25 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v0000000001148de0_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000114a1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001149240, 0, 4; - %jmp T_7.27; -T_7.26 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v0000000001148de0_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000114a1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001149240, 0, 4; - %jmp T_7.27; -T_7.27 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.8 ; - %load/vec4 v00000000011487a0_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.28, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.29, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.30, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.31, 6; - %jmp T_7.32; -T_7.28 ; - %load/vec4 v0000000001148de0_0; - %parti/s 8, 0, 2; - %load/vec4 v000000000114a1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 24, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v0000000001149240, 4, 5; - %jmp T_7.32; -T_7.29 ; - %load/vec4 v0000000001148de0_0; - %parti/s 16, 0, 2; - %load/vec4 v000000000114a1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 16, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v0000000001149240, 4, 5; - %jmp T_7.32; -T_7.30 ; - %load/vec4 v0000000001148de0_0; - %parti/s 24, 0, 2; - %load/vec4 v000000000114a1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 8, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v0000000001149240, 4, 5; - %jmp T_7.32; -T_7.31 ; - %load/vec4 v0000000001148de0_0; - %load/vec4 v000000000114a1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001149240, 0, 4; - %jmp T_7.32; -T_7.32 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.9 ; - %load/vec4 v00000000011487a0_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.33, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.34, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.35, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.36, 6; - %jmp T_7.37; -T_7.33 ; - %load/vec4 v0000000001148de0_0; - %load/vec4 v000000000114a1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001149240, 0, 4; - %jmp T_7.37; -T_7.34 ; - %load/vec4 v0000000001148de0_0; - %parti/s 24, 8, 5; - %load/vec4 v000000000114a1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001149240, 0, 4; - %jmp T_7.37; -T_7.35 ; - %load/vec4 v0000000001148de0_0; - %parti/s 16, 16, 6; - %load/vec4 v000000000114a1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001149240, 0, 4; - %jmp T_7.37; -T_7.36 ; - %load/vec4 v0000000001148de0_0; - %parti/s 8, 24, 6; - %load/vec4 v000000000114a1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001149240, 0, 4; - %jmp T_7.37; -T_7.37 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.11 ; - %pop/vec4 1; -T_7.2 ; -T_7.1 ; - %jmp T_7; - .thread T_7; - .scope S_00000000010a5e30; -T_8 ; -Ewait_1 .event/or E_00000000010e1200, E_0x0; - %wait Ewait_1; - %load/vec4 v00000000011497e0_0; - %dup/vec4; - %pushi/vec4 0, 0, 5; - %cmp/u; - %jmp/1 T_8.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 5; - %cmp/u; - %jmp/1 T_8.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 5; - %cmp/u; - %jmp/1 T_8.2, 6; - %dup/vec4; - %pushi/vec4 3, 0, 5; - %cmp/u; - %jmp/1 T_8.3, 6; - %dup/vec4; - %pushi/vec4 4, 0, 5; - %cmp/u; - %jmp/1 T_8.4, 6; - %dup/vec4; - %pushi/vec4 5, 0, 5; - %cmp/u; - %jmp/1 T_8.5, 6; - %dup/vec4; - %pushi/vec4 6, 0, 5; - %cmp/u; - %jmp/1 T_8.6, 6; - %dup/vec4; - %pushi/vec4 7, 0, 5; - %cmp/u; - %jmp/1 T_8.7, 6; - %dup/vec4; - %pushi/vec4 8, 0, 5; - %cmp/u; - %jmp/1 T_8.8, 6; - %dup/vec4; - %pushi/vec4 9, 0, 5; - %cmp/u; - %jmp/1 T_8.9, 6; - %dup/vec4; - %pushi/vec4 10, 0, 5; - %cmp/u; - %jmp/1 T_8.10, 6; - %dup/vec4; - %pushi/vec4 11, 0, 5; - %cmp/u; - %jmp/1 T_8.11, 6; - %dup/vec4; - %pushi/vec4 12, 0, 5; - %cmp/u; - %jmp/1 T_8.12, 6; - %dup/vec4; - %pushi/vec4 13, 0, 5; - %cmp/u; - %jmp/1 T_8.13, 6; - %dup/vec4; - %pushi/vec4 14, 0, 5; - %cmp/u; - %jmp/1 T_8.14, 6; - %dup/vec4; - %pushi/vec4 15, 0, 5; - %cmp/u; - %jmp/1 T_8.15, 6; - %dup/vec4; - %pushi/vec4 16, 0, 5; - %cmp/u; - %jmp/1 T_8.16, 6; - %dup/vec4; - %pushi/vec4 17, 0, 5; - %cmp/u; - %jmp/1 T_8.17, 6; - %dup/vec4; - %pushi/vec4 18, 0, 5; - %cmp/u; - %jmp/1 T_8.18, 6; - %dup/vec4; - %pushi/vec4 19, 0, 5; - %cmp/u; - %jmp/1 T_8.19, 6; - %dup/vec4; - %pushi/vec4 20, 0, 5; - %cmp/u; - %jmp/1 T_8.20, 6; - %dup/vec4; - %pushi/vec4 21, 0, 5; - %cmp/u; - %jmp/1 T_8.21, 6; - %dup/vec4; - %pushi/vec4 22, 0, 5; - %cmp/u; - %jmp/1 T_8.22, 6; - %dup/vec4; - %pushi/vec4 23, 0, 5; - %cmp/u; - %jmp/1 T_8.23, 6; - %jmp T_8.24; -T_8.0 ; - %load/vec4 v00000000011488e0_0; - %load/vec4 v0000000001148f20_0; - %add; - %store/vec4 v0000000001149880_0, 0, 32; - %jmp T_8.24; -T_8.1 ; - %load/vec4 v00000000011488e0_0; - %load/vec4 v0000000001148f20_0; - %sub; - %store/vec4 v0000000001149880_0, 0, 32; - %jmp T_8.24; -T_8.2 ; - %load/vec4 v00000000011488e0_0; - %load/vec4 v0000000001148f20_0; - %mul; - %store/vec4 v0000000001149880_0, 0, 32; - %jmp T_8.24; -T_8.3 ; - %load/vec4 v00000000011488e0_0; - %load/vec4 v0000000001148f20_0; - %div/s; - %store/vec4 v0000000001149880_0, 0, 32; - %jmp T_8.24; -T_8.4 ; - %load/vec4 v00000000011488e0_0; - %load/vec4 v0000000001148f20_0; - %and; - %store/vec4 v0000000001149880_0, 0, 32; - %jmp T_8.24; -T_8.5 ; - %load/vec4 v00000000011488e0_0; - %load/vec4 v0000000001148f20_0; - %or; - %store/vec4 v0000000001149880_0, 0, 32; - %jmp T_8.24; -T_8.6 ; - %load/vec4 v00000000011488e0_0; - %load/vec4 v0000000001148f20_0; - %xor; - %store/vec4 v0000000001149880_0, 0, 32; - %jmp T_8.24; -T_8.7 ; - %load/vec4 v0000000001148f20_0; - %ix/getv 4, v00000000011492e0_0; - %shiftl 4; - %store/vec4 v0000000001149880_0, 0, 32; - %jmp T_8.24; -T_8.8 ; - %load/vec4 v0000000001148f20_0; - %ix/getv 4, v00000000011488e0_0; - %shiftl 4; - %store/vec4 v0000000001149880_0, 0, 32; - %jmp T_8.24; -T_8.9 ; - %load/vec4 v0000000001148f20_0; - %ix/getv 4, v00000000011492e0_0; - %shiftr 4; - %store/vec4 v0000000001149880_0, 0, 32; - %jmp T_8.24; -T_8.10 ; - %load/vec4 v0000000001148f20_0; - %ix/getv 4, v00000000011488e0_0; - %shiftr 4; - %store/vec4 v0000000001149880_0, 0, 32; - %jmp T_8.24; -T_8.11 ; - %load/vec4 v0000000001148f20_0; - %ix/getv 4, v00000000011492e0_0; - %shiftr 4; - %store/vec4 v0000000001149880_0, 0, 32; - %jmp T_8.24; -T_8.12 ; - %load/vec4 v0000000001148f20_0; - %ix/getv 4, v00000000011488e0_0; - %shiftr 4; - %store/vec4 v0000000001149880_0, 0, 32; - %jmp T_8.24; -T_8.13 ; - %load/vec4 v00000000011488e0_0; - %load/vec4 v0000000001148f20_0; - %cmp/e; - %jmp/0xz T_8.25, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000011499c0_0, 0, 1; - %jmp T_8.26; -T_8.25 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011499c0_0, 0, 1; -T_8.26 ; - %jmp T_8.24; -T_8.14 ; - %load/vec4 v00000000011488e0_0; - %load/vec4 v0000000001148f20_0; - %cmp/s; - %jmp/0xz T_8.27, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000011499c0_0, 0, 1; - %jmp T_8.28; -T_8.27 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011499c0_0, 0, 1; -T_8.28 ; - %jmp T_8.24; -T_8.15 ; - %load/vec4 v00000000011488e0_0; - %load/vec4 v0000000001148f20_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.29, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000011499c0_0, 0, 1; - %jmp T_8.30; -T_8.29 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011499c0_0, 0, 1; -T_8.30 ; - %jmp T_8.24; -T_8.16 ; - %load/vec4 v0000000001148f20_0; - %load/vec4 v00000000011488e0_0; - %cmp/s; - %jmp/0xz T_8.31, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000011499c0_0, 0, 1; - %jmp T_8.32; -T_8.31 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011499c0_0, 0, 1; -T_8.32 ; - %jmp T_8.24; -T_8.17 ; - %load/vec4 v0000000001148f20_0; - %load/vec4 v00000000011488e0_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.33, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000011499c0_0, 0, 1; - %jmp T_8.34; -T_8.33 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011499c0_0, 0, 1; -T_8.34 ; - %jmp T_8.24; -T_8.18 ; - %load/vec4 v00000000011488e0_0; - %load/vec4 v0000000001148f20_0; - %cmp/ne; - %jmp/0xz T_8.35, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000011499c0_0, 0, 1; - %jmp T_8.36; -T_8.35 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011499c0_0, 0, 1; -T_8.36 ; - %jmp T_8.24; -T_8.19 ; - %load/vec4 v00000000011488e0_0; - %store/vec4 v0000000001149880_0, 0, 32; - %jmp T_8.24; -T_8.20 ; - %load/vec4 v00000000011488e0_0; - %load/vec4 v0000000001148f20_0; - %cmp/s; - %jmp/0xz T_8.37, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v0000000001149880_0, 0, 32; -T_8.37 ; - %jmp T_8.24; -T_8.21 ; - %load/vec4 v00000000011488e0_0; - %load/vec4 v0000000001148f20_0; - %cmp/u; - %jmp/0xz T_8.39, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v0000000001149880_0, 0, 32; -T_8.39 ; - %jmp T_8.24; -T_8.22 ; - %load/vec4 v00000000011488e0_0; - %load/vec4 v0000000001148f20_0; - %mul; - %store/vec4 v0000000001149880_0, 0, 32; - %jmp T_8.24; -T_8.23 ; - %load/vec4 v00000000011488e0_0; - %load/vec4 v0000000001148f20_0; - %div; - %store/vec4 v0000000001149880_0, 0, 32; - %jmp T_8.24; -T_8.24 ; - %pop/vec4 1; - %jmp T_8; - .thread T_8, $push; - .scope S_000000000114b710; -T_9 ; - %pushi/vec4 3217031168, 0, 32; - %store/vec4 v00000000011a3cb0_0, 0, 32; - %end; - .thread T_9, $init; - .scope S_000000000114b710; -T_10 ; -Ewait_2 .event/or E_00000000010e70c0, E_0x0; - %wait Ewait_2; - %load/vec4 v00000000011a3210_0; - %store/vec4 v00000000011a3710_0, 0, 32; - %load/vec4 v00000000011a3fd0_0; - %store/vec4 v000000000114a320_0, 0, 32; - %load/vec4 v00000000011a3170_0; - %store/vec4 v00000000011485c0_0, 0, 1; - %load/vec4 v00000000011a4930_0; - %store/vec4 v000000000114a3c0_0, 0, 1; - %load/vec4 v00000000011a41b0_0; - %store/vec4 v0000000001148700_0, 0, 32; - %jmp T_10; - .thread T_10, $push; - .scope S_000000000114b710; -T_11 ; -Ewait_3 .event/or E_00000000010e6e00, E_0x0; - %wait Ewait_3; - %load/vec4 v00000000011a35d0_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.2, 6; - %jmp T_11.3; -T_11.0 ; - %load/vec4 v00000000011a3850_0; - %parti/s 5, 16, 6; - %store/vec4 v00000000011a4110_0, 0, 5; - %jmp T_11.3; -T_11.1 ; - %load/vec4 v00000000011a3850_0; - %parti/s 5, 11, 5; - %store/vec4 v00000000011a4110_0, 0, 5; - %jmp T_11.3; -T_11.2 ; - %pushi/vec4 31, 0, 5; - %store/vec4 v00000000011a4110_0, 0, 5; - %jmp T_11.3; -T_11.3 ; - %pop/vec4 1; - %load/vec4 v00000000011a38f0_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.6, 6; - %jmp T_11.7; -T_11.4 ; - %load/vec4 v00000000011a3fd0_0; - %store/vec4 v00000000011a42f0_0, 0, 32; - %jmp T_11.7; -T_11.5 ; - %load/vec4 v000000000114a460_0; - %store/vec4 v00000000011a42f0_0, 0, 32; - %jmp T_11.7; -T_11.6 ; - %load/vec4 v00000000011a3cb0_0; - %addi 8, 0, 32; - %store/vec4 v00000000011a42f0_0, 0, 32; - %jmp T_11.7; -T_11.7 ; - %pop/vec4 1; - %load/vec4 v00000000011a2bd0_0; - %dup/vec4; - %pushi/vec4 1, 0, 1; - %cmp/u; - %jmp/1 T_11.8, 6; - %dup/vec4; - %pushi/vec4 0, 0, 1; - %cmp/u; - %jmp/1 T_11.9, 6; - %jmp T_11.10; -T_11.8 ; - %load/vec4 v00000000011a3850_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v00000000011a3850_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %store/vec4 v0000000001079b90_0, 0, 32; - %jmp T_11.10; -T_11.9 ; - %load/vec4 v00000000011a41b0_0; - %store/vec4 v0000000001079b90_0, 0, 32; - %jmp T_11.10; -T_11.10 ; - %pop/vec4 1; - %jmp T_11; - .thread T_11, $push; - .scope S_000000000114b580; -T_12 ; - %vpi_call/w 3 36 "$dumpfile", "mips_cpu_harvard.vcd" {0 0 0}; - %vpi_call/w 3 37 "$dumpvars", 32'sb00000000000000000000000000000000, S_000000000114b580 {0 0 0}; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011a5b80_0, 0, 1; - %pushi/vec4 100, 0, 32; -T_12.0 %dup/vec4; - %pushi/vec4 0, 0, 32; - %cmp/s; - %jmp/1xz T_12.1, 5; - %jmp/1 T_12.1, 4; - %pushi/vec4 1, 0, 32; - %sub; - %delay 10, 0; - %load/vec4 v00000000011a5b80_0; - %nor/r; - %store/vec4 v00000000011a5b80_0, 0, 1; - %delay 10, 0; - %load/vec4 v00000000011a5b80_0; - %nor/r; - %store/vec4 v00000000011a5b80_0, 0, 1; - %jmp T_12.0; -T_12.1 ; - %pop/vec4 1; - %vpi_call/w 3 47 "$fatal", 32'sb00000000000000000000000000000010, "Simulation did not finish within %d cycles.", P_00000000010d3408 {0 0 0}; - %end; - .thread T_12; - .scope S_000000000114b580; -T_13 ; - %vpi_call/w 3 51 "$display", "Initial Reset 0" {0 0 0}; - %pushi/vec4 0, 0, 1; - %assign/vec4 v00000000011a5ea0_0, 0; - %vpi_call/w 3 55 "$display", "Initial Reset 1" {0 0 0}; - %wait E_00000000010e03c0; - %pushi/vec4 1, 0, 1; - %assign/vec4 v00000000011a5ea0_0, 0; - %vpi_call/w 3 59 "$display", "Initial Reset 0: Start Program" {0 0 0}; - %wait E_00000000010e03c0; - %pushi/vec4 0, 0, 1; - %assign/vec4 v00000000011a5ea0_0, 0; - %wait E_00000000010e03c0; - %load/vec4 v00000000011a5180_0; - %pad/u 32; - %cmpi/e 1, 0, 32; - %jmp/0xz T_13.0, 4; - %jmp T_13.1; -T_13.0 ; - %vpi_call/w 3 65 "$display", "TB: CPU did not set active=1 after reset." {0 0 0}; -T_13.1 ; -T_13.2 ; - %load/vec4 v00000000011a5180_0; - %flag_set/vec4 8; - %jmp/0xz T_13.3, 8; - %wait E_00000000010e03c0; - %vpi_call/w 3 71 "$display", "Reg File Write data: %d", v00000000011a42f0_0 {0 0 0}; - %jmp T_13.2; -T_13.3 ; - %wait E_00000000010e03c0; - %vpi_call/w 3 74 "$display", "TB: CPU Halt; active=0" {0 0 0}; - %vpi_call/w 3 75 "$display", "Output:" {0 0 0}; - %vpi_call/w 3 76 "$display", "%d", v00000000011a5e00_0 {0 0 0}; - %vpi_call/w 3 77 "$finish" {0 0 0}; - %end; - .thread T_13; -# The file index is used to find the file name in the following table. -:file_names 10; - "N/A"; - ""; - "-"; - "testbench/mips_cpu_harvard_tb.v"; - "rtl/mips_cpu_harvard.v"; - "rtl/mips_cpu_alu.v"; - "rtl/mips_cpu_control.v"; - "rtl/mips_cpu_pc.v"; - "rtl/mips_cpu_regfile.v"; - "rtl/mips_cpu_memory.v"; diff --git a/exec/mips_cpu_harvard_tb_sltiu b/exec/mips_cpu_harvard_tb_sltiu deleted file mode 100644 index 015398b..0000000 --- a/exec/mips_cpu_harvard_tb_sltiu +++ /dev/null @@ -1,2738 +0,0 @@ -#! /usr/local/iverilog/bin/vvp -:ivl_version "11.0 (devel)"; -:ivl_delay_selection "TYPICAL"; -:vpi_time_precision + 0; -:vpi_module "C:\iverilog\lib\ivl\system.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_sys.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_textio.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2005_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\va_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2009.vpi"; -S_00000000011daf90 .scope package, "$unit" "$unit" 2 1; - .timescale 0 0; -S_00000000011baad0 .scope module, "mips_cpu_harvard_tb" "mips_cpu_harvard_tb" 3 1; - .timescale 0 0; -P_0000000001104480 .param/str "RAM_INIT_FILE" 0 3 3, "inputs/sltiu.txt"; -P_00000000011044b8 .param/l "TIMEOUT_CYCLES" 0 3 4, +C4<00000000000000000000000001100100>; -v00000000012366e0_0 .net "active", 0 0, v00000000011d9900_0; 1 drivers -v00000000012361e0_0 .var "clk", 0 0; -v0000000001235ce0_0 .var "clk_enable", 0 0; -v0000000001235c40_0 .net "data_address", 31 0, v00000000011d9c20_0; 1 drivers -v0000000001235380_0 .net "data_read", 0 0, v00000000011d9e00_0; 1 drivers -v0000000001234fc0_0 .net "data_readdata", 31 0, L_0000000001235740; 1 drivers -v0000000001234de0_0 .net "data_write", 0 0, v00000000011d9fe0_0; 1 drivers -v0000000001236780_0 .net "data_writedata", 31 0, v00000000011da300_0; 1 drivers -v00000000012359c0_0 .net "instr_address", 31 0, v0000000001233690_0; 1 drivers -v0000000001235560_0 .net "instr_readdata", 31 0, L_0000000001235100; 1 drivers -v0000000001234e80_0 .net "register_v0", 31 0, L_00000000011bdec0; 1 drivers -v0000000001234b60_0 .var "reset", 0 0; -S_0000000001175e30 .scope module, "cpuInst" "mips_cpu_harvard" 3 19, 4 1 0, S_00000000011baad0; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "reset"; - .port_info 2 /OUTPUT 1 "active"; - .port_info 3 /OUTPUT 32 "register_v0"; - .port_info 4 /INPUT 1 "clk_enable"; - .port_info 5 /OUTPUT 32 "instr_address"; - .port_info 6 /INPUT 32 "instr_readdata"; - .port_info 7 /OUTPUT 32 "data_address"; - .port_info 8 /OUTPUT 1 "data_write"; - .port_info 9 /OUTPUT 1 "data_read"; - .port_info 10 /OUTPUT 32 "data_writedata"; - .port_info 11 /INPUT 32 "data_readdata"; -v00000000011d9540_0 .net "active", 0 0, v00000000011d9900_0; alias, 1 drivers -v00000000011d92c0_0 .net "clk", 0 0, v00000000012361e0_0; 1 drivers -v00000000011d9f40_0 .net "clk_enable", 0 0, v0000000001235ce0_0; 1 drivers -v00000000011d9c20_0 .var "data_address", 31 0; -v00000000011d9e00_0 .var "data_read", 0 0; -v00000000011d9680_0 .net "data_readdata", 31 0, L_0000000001235740; alias, 1 drivers -v00000000011d9fe0_0 .var "data_write", 0 0; -v00000000011da300_0 .var "data_writedata", 31 0; -v000000000119e2a0_0 .var "in_B", 31 0; -v00000000012343b0_0 .net "in_opcode", 5 0, L_0000000001235880; 1 drivers -v0000000001233e10_0 .net "in_pc_in", 31 0, v00000000011d8be0_0; 1 drivers -v0000000001233870_0 .net "in_readreg1", 4 0, L_0000000001235600; 1 drivers -v0000000001232c90_0 .net "in_readreg2", 4 0, L_0000000001236320; 1 drivers -v0000000001233d70_0 .var "in_writedata", 31 0; -v0000000001233c30_0 .var "in_writereg", 4 0; -v0000000001233690_0 .var "instr_address", 31 0; -v0000000001233eb0_0 .net "instr_readdata", 31 0, L_0000000001235100; alias, 1 drivers -v0000000001234630_0 .net "out_ALUCond", 0 0, v00000000011d9a40_0; 1 drivers -v0000000001233f50_0 .net "out_ALUOp", 4 0, v00000000011da6c0_0; 1 drivers -v0000000001232a10_0 .net "out_ALURes", 31 0, v00000000011d9400_0; 1 drivers -v0000000001233ff0_0 .net "out_ALUSrc", 0 0, v00000000011d9860_0; 1 drivers -v00000000012337d0_0 .net "out_MemRead", 0 0, v00000000011d97c0_0; 1 drivers -v0000000001233550_0 .net "out_MemWrite", 0 0, v00000000011d9040_0; 1 drivers -v0000000001233050_0 .net "out_MemtoReg", 1 0, v00000000011d90e0_0; 1 drivers -v0000000001233910_0 .net "out_PC", 1 0, v00000000011da1c0_0; 1 drivers -v00000000012339b0_0 .net "out_RegDst", 1 0, v00000000011d8aa0_0; 1 drivers -v0000000001233a50_0 .net "out_RegWrite", 0 0, v00000000011d8f00_0; 1 drivers -v0000000001234090_0 .var "out_pc_out", 31 0; -v0000000001232bf0_0 .net "out_readdata1", 31 0, v00000000011d8a00_0; 1 drivers -v0000000001233cd0_0 .net "out_readdata2", 31 0, v00000000011d9ea0_0; 1 drivers -v0000000001232d30_0 .net "out_shamt", 4 0, v00000000011d8b40_0; 1 drivers -v00000000012335f0_0 .net "register_v0", 31 0, L_00000000011bdec0; alias, 1 drivers -v0000000001232ab0_0 .net "reset", 0 0, v0000000001234b60_0; 1 drivers -E_00000000011b67a0/0 .event edge, v00000000011d8aa0_0, v00000000011da080_0, v00000000011da080_0, v00000000011d90e0_0; -E_00000000011b67a0/1 .event edge, v00000000011d9400_0, v00000000011d9680_0, v00000000011da800_0, v00000000011d9860_0; -E_00000000011b67a0/2 .event edge, v00000000011da080_0, v00000000011da080_0, v00000000011d9ea0_0; -E_00000000011b67a0 .event/or E_00000000011b67a0/0, E_00000000011b67a0/1, E_00000000011b67a0/2; -E_00000000011b6a60/0 .event edge, v00000000011d8be0_0, v00000000011d9400_0, v00000000011d9040_0, v00000000011d97c0_0; -E_00000000011b6a60/1 .event edge, v00000000011d9ea0_0; -E_00000000011b6a60 .event/or E_00000000011b6a60/0, E_00000000011b6a60/1; -L_0000000001235600 .part L_0000000001235100, 21, 5; -L_0000000001236320 .part L_0000000001235100, 16, 5; -L_0000000001235880 .part L_0000000001235100, 26, 6; -S_0000000001175fc0 .scope module, "alu" "mips_cpu_alu" 4 121, 5 1 0, S_0000000001175e30; - .timescale 0 0; - .port_info 0 /INPUT 32 "A"; - .port_info 1 /INPUT 32 "B"; - .port_info 2 /INPUT 5 "ALUOp"; - .port_info 3 /INPUT 5 "shamt"; - .port_info 4 /OUTPUT 1 "ALUCond"; - .port_info 5 /OUTPUT 32 "ALURes"; -enum00000000010bbd00 .enum4 (5) - "ADD" 5'b00000, - "SUB" 5'b00001, - "MUL" 5'b00010, - "DIV" 5'b00011, - "AND" 5'b00100, - "OR" 5'b00101, - "XOR" 5'b00110, - "SLL" 5'b00111, - "SLLV" 5'b01000, - "SRL" 5'b01001, - "SRLV" 5'b01010, - "SRA" 5'b01011, - "SRAV" 5'b01100, - "EQ" 5'b01101, - "LES" 5'b01110, - "LEQ" 5'b01111, - "GRT" 5'b10000, - "GEQ" 5'b10001, - "NEQ" 5'b10010, - "PAS" 5'b10011, - "SLT" 5'b10100, - "SLTU" 5'b10101, - "MULU" 5'b10110, - "DIVU" 5'b10111 - ; -L_00000000011be940 .functor BUFZ 5, v00000000011da6c0_0, C4<00000>, C4<00000>, C4<00000>; -v00000000011d9cc0_0 .net "A", 31 0, v00000000011d8a00_0; alias, 1 drivers -v00000000011d9a40_0 .var "ALUCond", 0 0; -v00000000011da620_0 .net "ALUOp", 4 0, v00000000011da6c0_0; alias, 1 drivers -v00000000011da4e0_0 .net "ALUOps", 4 0, L_00000000011be940; 1 drivers -v00000000011d9400_0 .var/s "ALURes", 31 0; -v00000000011d8dc0_0 .net "B", 31 0, v000000000119e2a0_0; 1 drivers -v00000000011d9ae0_0 .net "shamt", 4 0, v00000000011d8b40_0; alias, 1 drivers -E_00000000011b1460 .event edge, v00000000011da4e0_0, v00000000011d9cc0_0, v00000000011d8dc0_0, v00000000011d9ae0_0; -S_0000000001176150 .scope module, "control" "mips_cpu_control" 4 90, 6 1 0, S_0000000001175e30; - .timescale 0 0; - .port_info 0 /INPUT 32 "Instr"; - .port_info 1 /INPUT 1 "ALUCond"; - .port_info 2 /OUTPUT 2 "CtrlRegDst"; - .port_info 3 /OUTPUT 2 "CtrlPC"; - .port_info 4 /OUTPUT 1 "CtrlMemRead"; - .port_info 5 /OUTPUT 2 "CtrlMemtoReg"; - .port_info 6 /OUTPUT 5 "CtrlALUOp"; - .port_info 7 /OUTPUT 5 "Ctrlshamt"; - .port_info 8 /OUTPUT 1 "CtrlMemWrite"; - .port_info 9 /OUTPUT 1 "CtrlALUSrc"; - .port_info 10 /OUTPUT 1 "CtrlRegWrite"; -enum00000000010b9270 .enum4 (6) - "SPECIAL" 6'b000000, - "REGIMM" 6'b000001, - "J" 6'b000010, - "JAL" 6'b000011, - "BEQ" 6'b000100, - "BNE" 6'b000101, - "BLEZ" 6'b000110, - "BGTZ" 6'b000111, - "ADDI" 6'b001000, - "ADDIU" 6'b001001, - "SLTI" 6'b001010, - "SLTIU" 6'b001011, - "ANDI" 6'b001100, - "ORI" 6'b001101, - "XORI" 6'b001110, - "LUI" 6'b001111, - "LB" 6'b100000, - "LH" 6'b100001, - "LWL" 6'b100010, - "LW" 6'b100011, - "LBU" 6'b100100, - "LHU" 6'b100101, - "LWR" 6'b100110, - "SB" 6'b101000, - "SH" 6'b101001, - "SW" 6'b101011 - ; -enum00000000010bb740 .enum4 (5) - "BLTZ" 5'b00000, - "BGEZ" 5'b00001, - "BLTZAL" 5'b10000, - "BGEZAL" 5'b10001 - ; -enum00000000010bb7f0 .enum4 (6) - "SLL" 6'b000000, - "SRL" 6'b000010, - "SRA" 6'b000011, - "SLLV" 6'b000100, - "SRLV" 6'b000110, - "SRAV" 6'b000111, - "JR" 6'b001000, - "JALR" 6'b001001, - "MTHI" 6'b010001, - "MTLO" 6'b010011, - "MULT" 6'b011000, - "MULTU" 6'b011001, - "DIV" 6'b011010, - "DIVU" 6'b011011, - "ADDU" 6'b100001, - "SUBU" 6'b100011, - "AND" 6'b100100, - "OR" 6'b100101, - "XOR" 6'b100110, - "SLT" 6'b101010, - "SLTU" 6'b101011 - ; -v00000000011d8fa0_0 .net "ALUCond", 0 0, v00000000011d9a40_0; alias, 1 drivers -v00000000011da6c0_0 .var "CtrlALUOp", 4 0; -v00000000011d9860_0 .var "CtrlALUSrc", 0 0; -v00000000011d97c0_0 .var "CtrlMemRead", 0 0; -v00000000011d9040_0 .var "CtrlMemWrite", 0 0; -v00000000011d90e0_0 .var "CtrlMemtoReg", 1 0; -v00000000011da1c0_0 .var "CtrlPC", 1 0; -v00000000011d8aa0_0 .var "CtrlRegDst", 1 0; -v00000000011d8f00_0 .var "CtrlRegWrite", 0 0; -v00000000011d8b40_0 .var "Ctrlshamt", 4 0; -v00000000011da080_0 .net "Instr", 31 0, L_0000000001235100; alias, 1 drivers -v00000000011d99a0_0 .net "funct", 5 0, L_00000000012365a0; 1 drivers -v00000000011da120_0 .net "op", 5 0, L_0000000001236460; 1 drivers -v00000000011d8960_0 .net "rt", 4 0, L_0000000001235ba0; 1 drivers -E_00000000011b76e0/0 .event edge, v00000000011da120_0, v00000000011d99a0_0, v00000000011d9a40_0, v00000000011d8960_0; -E_00000000011b76e0/1 .event edge, v00000000011da080_0; -E_00000000011b76e0 .event/or E_00000000011b76e0/0, E_00000000011b76e0/1; -L_0000000001236460 .part L_0000000001235100, 26, 6; -L_00000000012365a0 .part L_0000000001235100, 0, 6; -L_0000000001235ba0 .part L_0000000001235100, 16, 5; -S_00000000011691d0 .scope module, "pc" "pc" 4 79, 7 1 0, S_0000000001175e30; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "rst"; - .port_info 2 /INPUT 2 "pc_ctrl"; - .port_info 3 /INPUT 32 "pc_in"; - .port_info 4 /INPUT 5 "rs"; - .port_info 5 /OUTPUT 32 "pc_out"; - .port_info 6 /OUTPUT 1 "active"; -v00000000011d9900_0 .var "active", 0 0; -v00000000011da580_0 .net "clk", 0 0, v00000000012361e0_0; alias, 1 drivers -v00000000011d9b80_0 .net "pc_ctrl", 1 0, v00000000011da1c0_0; alias, 1 drivers -v00000000011d8e60_0 .var "pc_curr", 31 0; -v00000000011da800_0 .net "pc_in", 31 0, v0000000001234090_0; 1 drivers -v00000000011d8be0_0 .var "pc_out", 31 0; -o00000000011dd018 .functor BUFZ 5, C4; HiZ drive -v00000000011d9180_0 .net "rs", 4 0, o00000000011dd018; 0 drivers -v00000000011d9d60_0 .net "rst", 0 0, v0000000001234b60_0; alias, 1 drivers -E_00000000011b0ba0 .event posedge, v00000000011da580_0; -S_0000000001169360 .scope module, "regfile" "mips_cpu_regfile" 4 106, 8 1 0, S_0000000001175e30; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 5 "readreg1"; - .port_info 2 /INPUT 5 "readreg2"; - .port_info 3 /INPUT 5 "writereg"; - .port_info 4 /INPUT 32 "writedata"; - .port_info 5 /INPUT 1 "regwrite"; - .port_info 6 /INPUT 6 "opcode"; - .port_info 7 /OUTPUT 32 "readdata1"; - .port_info 8 /OUTPUT 32 "readdata2"; - .port_info 9 /OUTPUT 32 "regv0"; -v00000000011da3a0_2 .array/port v00000000011da3a0, 2; -L_00000000011bdec0 .functor BUFZ 32, v00000000011da3a0_2, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; -v00000000011d9220_0 .net "clk", 0 0, v00000000012361e0_0; alias, 1 drivers -v00000000011da3a0 .array "memory", 0 31, 31 0; -v00000000011d95e0_0 .net "opcode", 5 0, L_0000000001235880; alias, 1 drivers -v00000000011d8a00_0 .var "readdata1", 31 0; -v00000000011d9ea0_0 .var "readdata2", 31 0; -v00000000011d9360_0 .net "readreg1", 4 0, L_0000000001235600; alias, 1 drivers -v00000000011da440_0 .net "readreg2", 4 0, L_0000000001236320; alias, 1 drivers -v00000000011da260_0 .net "regv0", 31 0, L_00000000011bdec0; alias, 1 drivers -v00000000011d8c80_0 .net "regwrite", 0 0, v00000000011d8f00_0; alias, 1 drivers -v00000000011d8d20_0 .net "writedata", 31 0, v0000000001233d70_0; 1 drivers -v00000000011d94a0_0 .net "writereg", 4 0, v0000000001233c30_0; 1 drivers -E_00000000011b0b60 .event negedge, v00000000011da580_0; -v00000000011da3a0_0 .array/port v00000000011da3a0, 0; -v00000000011da3a0_1 .array/port v00000000011da3a0, 1; -E_00000000011b0ca0/0 .event edge, v00000000011d9360_0, v00000000011da3a0_0, v00000000011da3a0_1, v00000000011da3a0_2; -v00000000011da3a0_3 .array/port v00000000011da3a0, 3; -v00000000011da3a0_4 .array/port v00000000011da3a0, 4; -v00000000011da3a0_5 .array/port v00000000011da3a0, 5; -v00000000011da3a0_6 .array/port v00000000011da3a0, 6; -E_00000000011b0ca0/1 .event edge, v00000000011da3a0_3, v00000000011da3a0_4, v00000000011da3a0_5, v00000000011da3a0_6; -v00000000011da3a0_7 .array/port v00000000011da3a0, 7; -v00000000011da3a0_8 .array/port v00000000011da3a0, 8; -v00000000011da3a0_9 .array/port v00000000011da3a0, 9; -v00000000011da3a0_10 .array/port v00000000011da3a0, 10; -E_00000000011b0ca0/2 .event edge, v00000000011da3a0_7, v00000000011da3a0_8, v00000000011da3a0_9, v00000000011da3a0_10; -v00000000011da3a0_11 .array/port v00000000011da3a0, 11; -v00000000011da3a0_12 .array/port v00000000011da3a0, 12; -v00000000011da3a0_13 .array/port v00000000011da3a0, 13; -v00000000011da3a0_14 .array/port v00000000011da3a0, 14; -E_00000000011b0ca0/3 .event edge, v00000000011da3a0_11, v00000000011da3a0_12, v00000000011da3a0_13, v00000000011da3a0_14; -v00000000011da3a0_15 .array/port v00000000011da3a0, 15; -v00000000011da3a0_16 .array/port v00000000011da3a0, 16; -v00000000011da3a0_17 .array/port v00000000011da3a0, 17; -v00000000011da3a0_18 .array/port v00000000011da3a0, 18; -E_00000000011b0ca0/4 .event edge, v00000000011da3a0_15, v00000000011da3a0_16, v00000000011da3a0_17, v00000000011da3a0_18; -v00000000011da3a0_19 .array/port v00000000011da3a0, 19; -v00000000011da3a0_20 .array/port v00000000011da3a0, 20; -v00000000011da3a0_21 .array/port v00000000011da3a0, 21; -v00000000011da3a0_22 .array/port v00000000011da3a0, 22; -E_00000000011b0ca0/5 .event edge, v00000000011da3a0_19, v00000000011da3a0_20, v00000000011da3a0_21, v00000000011da3a0_22; -v00000000011da3a0_23 .array/port v00000000011da3a0, 23; -v00000000011da3a0_24 .array/port v00000000011da3a0, 24; -v00000000011da3a0_25 .array/port v00000000011da3a0, 25; -v00000000011da3a0_26 .array/port v00000000011da3a0, 26; -E_00000000011b0ca0/6 .event edge, v00000000011da3a0_23, v00000000011da3a0_24, v00000000011da3a0_25, v00000000011da3a0_26; -v00000000011da3a0_27 .array/port v00000000011da3a0, 27; -v00000000011da3a0_28 .array/port v00000000011da3a0, 28; -v00000000011da3a0_29 .array/port v00000000011da3a0, 29; -v00000000011da3a0_30 .array/port v00000000011da3a0, 30; -E_00000000011b0ca0/7 .event edge, v00000000011da3a0_27, v00000000011da3a0_28, v00000000011da3a0_29, v00000000011da3a0_30; -v00000000011da3a0_31 .array/port v00000000011da3a0, 31; -E_00000000011b0ca0/8 .event edge, v00000000011da3a0_31, v00000000011da440_0; -E_00000000011b0ca0 .event/or E_00000000011b0ca0/0, E_00000000011b0ca0/1, E_00000000011b0ca0/2, E_00000000011b0ca0/3, E_00000000011b0ca0/4, E_00000000011b0ca0/5, E_00000000011b0ca0/6, E_00000000011b0ca0/7, E_00000000011b0ca0/8; -S_00000000011694f0 .scope begin, "$unm_blk_121" "$unm_blk_121" 8 16, 8 16 0, S_0000000001169360; - .timescale 0 0; -v00000000011d9720_0 .var/i "i", 31 0; -S_0000000001122680 .scope module, "ramInst" "mips_cpu_memory" 3 9, 9 1 0, S_00000000011baad0; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 32 "data_address"; - .port_info 2 /INPUT 1 "data_write"; - .port_info 3 /INPUT 1 "data_read"; - .port_info 4 /INPUT 32 "data_writedata"; - .port_info 5 /OUTPUT 32 "data_readdata"; - .port_info 6 /INPUT 32 "instr_address"; - .port_info 7 /OUTPUT 32 "instr_readdata"; -P_00000000011b0ce0 .param/str "RAM_INIT_FILE" 0 9 16, "inputs/sltiu.txt"; -L_00000000011bdf30 .functor AND 1, L_0000000001235ec0, L_0000000001236820, C4<1>, C4<1>; -v0000000001233af0_0 .net *"_ivl_0", 31 0, L_00000000012357e0; 1 drivers -L_00000000012379e8 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v0000000001233370_0 .net/2u *"_ivl_12", 31 0, L_00000000012379e8; 1 drivers -v0000000001233730_0 .net *"_ivl_14", 0 0, L_0000000001235ec0; 1 drivers -L_0000000001237a30 .functor BUFT 1, C4<10111111110000000000000001000000>, C4<0>, C4<0>, C4<0>; -v0000000001234590_0 .net/2u *"_ivl_16", 31 0, L_0000000001237a30; 1 drivers -v0000000001233b90_0 .net *"_ivl_18", 0 0, L_0000000001236820; 1 drivers -v0000000001232970_0 .net *"_ivl_2", 31 0, L_0000000001235420; 1 drivers -v00000000012341d0_0 .net *"_ivl_21", 0 0, L_00000000011bdf30; 1 drivers -v0000000001232e70_0 .net *"_ivl_22", 31 0, L_0000000001235060; 1 drivers -L_0000000001237a78 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v0000000001234270_0 .net/2u *"_ivl_24", 31 0, L_0000000001237a78; 1 drivers -v0000000001232f10_0 .net *"_ivl_26", 31 0, L_0000000001234f20; 1 drivers -v0000000001232b50_0 .net *"_ivl_28", 31 0, L_00000000012354c0; 1 drivers -v0000000001234310_0 .net *"_ivl_30", 29 0, L_0000000001235f60; 1 drivers -L_0000000001237ac0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0000000001232dd0_0 .net *"_ivl_32", 1 0, L_0000000001237ac0; 1 drivers -L_0000000001237b08 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v00000000012330f0_0 .net *"_ivl_34", 31 0, L_0000000001237b08; 1 drivers -v0000000001234450_0 .net *"_ivl_4", 29 0, L_0000000001234d40; 1 drivers -L_0000000001237958 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v00000000012344f0_0 .net *"_ivl_6", 1 0, L_0000000001237958; 1 drivers -L_00000000012379a0 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v0000000001232fb0_0 .net *"_ivl_8", 31 0, L_00000000012379a0; 1 drivers -v00000000012346d0_0 .net "clk", 0 0, v00000000012361e0_0; alias, 1 drivers -v0000000001234770_0 .net "data_address", 31 0, v00000000011d9c20_0; alias, 1 drivers -v0000000001234810 .array "data_memory", 63 0, 31 0; -v0000000001233190_0 .net "data_read", 0 0, v00000000011d9e00_0; alias, 1 drivers -v0000000001233230_0 .net "data_readdata", 31 0, L_0000000001235740; alias, 1 drivers -v0000000001233410_0 .net "data_write", 0 0, v00000000011d9fe0_0; alias, 1 drivers -v00000000012334b0_0 .net "data_writedata", 31 0, v00000000011da300_0; alias, 1 drivers -v00000000012356a0_0 .net "instr_address", 31 0, v0000000001233690_0; alias, 1 drivers -v0000000001236500 .array "instr_memory", 63 0, 31 0; -v00000000012352e0_0 .net "instr_readdata", 31 0, L_0000000001235100; alias, 1 drivers -L_00000000012357e0 .array/port v0000000001234810, L_0000000001235420; -L_0000000001234d40 .part v00000000011d9c20_0, 2, 30; -L_0000000001235420 .concat [ 30 2 0 0], L_0000000001234d40, L_0000000001237958; -L_0000000001235740 .functor MUXZ 32, L_00000000012379a0, L_00000000012357e0, v00000000011d9e00_0, C4<>; -L_0000000001235ec0 .cmp/ge 32, v0000000001233690_0, L_00000000012379e8; -L_0000000001236820 .cmp/gt 32, L_0000000001237a30, v0000000001233690_0; -L_0000000001235060 .array/port v0000000001236500, L_00000000012354c0; -L_0000000001234f20 .arith/sub 32, v0000000001233690_0, L_0000000001237a78; -L_0000000001235f60 .part L_0000000001234f20, 2, 30; -L_00000000012354c0 .concat [ 30 2 0 0], L_0000000001235f60, L_0000000001237ac0; -L_0000000001235100 .functor MUXZ 32, L_0000000001237b08, L_0000000001235060, L_00000000011bdf30, C4<>; -S_0000000001122810 .scope begin, "$unm_blk_104" "$unm_blk_104" 9 21, 9 21 0, S_0000000001122680; - .timescale 0 0; -v0000000001234130_0 .var/i "i", 31 0; -S_00000000011229a0 .scope begin, "$ivl_for_loop0" "$ivl_for_loop0" 9 36, 9 36 0, S_0000000001122810; - .timescale 0 0; -v00000000012332d0_0 .var/i "j", 31 0; - .scope S_0000000001122680; -T_0 ; - %fork t_1, S_0000000001122810; - %jmp t_0; - .scope S_0000000001122810; -t_1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v0000000001234130_0, 0, 32; -T_0.0 ; - %load/vec4 v0000000001234130_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v0000000001234130_0; - %store/vec4a v0000000001234810, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0000000001234130_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v0000000001234130_0, 0, 32; - %jmp T_0.0; -T_0.1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v0000000001234130_0, 0, 32; -T_0.2 ; - %load/vec4 v0000000001234130_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.3, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v0000000001234130_0; - %store/vec4a v0000000001236500, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0000000001234130_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v0000000001234130_0, 0, 32; - %jmp T_0.2; -T_0.3 ; - %vpi_call/w 9 32 "$display", "RAM: Loading RAM contents from %s", P_00000000011b0ce0 {0 0 0}; - %vpi_call/w 9 33 "$readmemh", P_00000000011b0ce0, v0000000001236500 {0 0 0}; - %fork t_3, S_00000000011229a0; - %jmp t_2; - .scope S_00000000011229a0; -t_3 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000012332d0_0, 0, 32; -T_0.4 ; - %load/vec4 v00000000012332d0_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.5, 5; - %pushi/vec4 3217031168, 0, 32; - %load/vec4 v00000000012332d0_0; - %muli 4, 0, 32; - %add; - %vpi_call/w 9 37 "$display", "byte +%h: %h", S<0,vec4,u32>, &A {1 0 0}; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000012332d0_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000012332d0_0, 0, 32; - %jmp T_0.4; -T_0.5 ; - %end; - .scope S_0000000001122810; -t_2 %join; - %end; - .scope S_0000000001122680; -t_0 %join; - %end; - .thread T_0; - .scope S_0000000001122680; -T_1 ; - %wait E_00000000011b0ba0; - %load/vec4 v0000000001233190_0; - %nor/r; - %load/vec4 v0000000001233410_0; - %and; - %flag_set/vec4 8; - %jmp/0xz T_1.0, 8; - %load/vec4 v00000000012356a0_0; - %load/vec4 v0000000001234770_0; - %cmp/ne; - %jmp/0xz T_1.2, 4; - %load/vec4 v00000000012334b0_0; - %load/vec4 v0000000001234770_0; - %ix/load 4, 2, 0; - %flag_set/imm 4, 0; - %shiftr 4; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001234810, 0, 4; -T_1.2 ; -T_1.0 ; - %jmp T_1; - .thread T_1; - .scope S_00000000011691d0; -T_2 ; - %load/vec4 v00000000011da800_0; - %store/vec4 v00000000011d8be0_0, 0, 32; - %end; - .thread T_2; - .scope S_00000000011691d0; -T_3 ; - %wait E_00000000011b0ba0; - %load/vec4 v00000000011d9d60_0; - %flag_set/vec4 8; - %jmp/0xz T_3.0, 8; - %pushi/vec4 1, 0, 1; - %assign/vec4 v00000000011d9900_0, 0; - %pushi/vec4 3217031168, 0, 32; - %assign/vec4 v00000000011d8be0_0, 0; - %jmp T_3.1; -T_3.0 ; - %load/vec4 v00000000011d8be0_0; - %cmpi/ne 0, 0, 32; - %jmp/0xz T_3.2, 4; - %load/vec4 v00000000011d9900_0; - %assign/vec4 v00000000011d9900_0, 0; - %load/vec4 v00000000011d9b80_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_3.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_3.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_3.6, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_3.7, 6; - %jmp T_3.8; -T_3.4 ; - %load/vec4 v00000000011d8be0_0; - %assign/vec4 v00000000011d8e60_0, 0; - %load/vec4 v00000000011d8e60_0; - %addi 4, 0, 32; - %assign/vec4 v00000000011d8be0_0, 0; - %vpi_call/w 7 27 "$display", "New PC from %h to %h", v00000000011d8e60_0, v00000000011d8be0_0 {0 0 0}; - %jmp T_3.8; -T_3.5 ; - %load/vec4 v00000000011da800_0; - %assign/vec4 v00000000011d8be0_0, 0; - %jmp T_3.8; -T_3.6 ; - %load/vec4 v00000000011da800_0; - %assign/vec4 v00000000011d8be0_0, 0; - %jmp T_3.8; -T_3.7 ; - %vpi_call/w 7 36 "$display", "JUMP REGISTER" {0 0 0}; - %pushi/vec4 0, 0, 32; - %assign/vec4 v00000000011d8be0_0, 0; - %jmp T_3.8; -T_3.8 ; - %pop/vec4 1; - %jmp T_3.3; -T_3.2 ; - %load/vec4 v00000000011d8be0_0; - %cmpi/e 0, 0, 32; - %jmp/0xz T_3.9, 4; - %pushi/vec4 0, 0, 1; - %assign/vec4 v00000000011d9900_0, 0; -T_3.9 ; -T_3.3 ; -T_3.1 ; - %jmp T_3; - .thread T_3; - .scope S_0000000001176150; -T_4 ; - %wait E_00000000011b76e0; - %vpi_call/w 6 86 "$display", "Opcode: %h", v00000000011da120_0 {0 0 0}; - %load/vec4 v00000000011da120_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.0, 4; - %pushi/vec4 0, 0, 2; - %store/vec4 v00000000011d8aa0_0, 0, 2; - %vpi_call/w 6 89 "$display", "CTRLREGDST: Rt" {0 0 0}; - %jmp T_4.1; -T_4.0 ; - %load/vec4 v00000000011da120_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.2, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v00000000011d8aa0_0, 0, 2; - %vpi_call/w 6 92 "$display", "CTRLREGDST: Rd" {0 0 0}; - %jmp T_4.3; -T_4.2 ; - %load/vec4 v00000000011da120_0; - %cmpi/e 3, 0, 6; - %jmp/0xz T_4.4, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v00000000011d8aa0_0, 0, 2; - %vpi_call/w 6 95 "$display", "CTRLREGDST: Link" {0 0 0}; - %jmp T_4.5; -T_4.4 ; - %pushi/vec4 1, 1, 2; - %store/vec4 v00000000011d8aa0_0, 0, 2; - %vpi_call/w 6 96 "$display", "xxxxxxxxxxxxxx" {0 0 0}; -T_4.5 ; -T_4.3 ; -T_4.1 ; - %load/vec4 v00000000011d8fa0_0; - %load/vec4 v00000000011da120_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011da120_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011da120_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011da120_0; - %pushi/vec4 5, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011da120_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d8960_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d8960_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d8960_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d8960_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.6, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v00000000011da1c0_0, 0, 2; - %jmp T_4.7; -T_4.6 ; - %load/vec4 v00000000011da120_0; - %cmpi/e 2, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 3, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.8, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v00000000011da1c0_0, 0, 2; - %jmp T_4.9; -T_4.8 ; - %load/vec4 v00000000011d99a0_0; - %cmpi/e 8, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011d99a0_0; - %cmpi/e 9, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.10, 4; - %pushi/vec4 3, 0, 2; - %store/vec4 v00000000011da1c0_0, 0, 2; - %jmp T_4.11; -T_4.10 ; - %pushi/vec4 0, 0, 2; - %store/vec4 v00000000011da1c0_0, 0, 2; -T_4.11 ; -T_4.9 ; -T_4.7 ; - %load/vec4 v00000000011da120_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.12, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000011d97c0_0, 0, 1; - %pushi/vec4 1, 0, 2; - %store/vec4 v00000000011d90e0_0, 0, 2; - %vpi_call/w 6 112 "$display", "Memory read enabled" {0 0 0}; - %jmp T_4.13; -T_4.12 ; - %load/vec4 v00000000011da120_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.14, 9; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011d97c0_0, 0, 1; - %pushi/vec4 0, 0, 2; - %store/vec4 v00000000011d90e0_0, 0, 2; - %vpi_call/w 6 116 "$display", "Memory read disabled" {0 0 0}; - %jmp T_4.15; -T_4.14 ; - %load/vec4 v00000000011da120_0; - %cmpi/e 3, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.16, 9; - %pushi/vec4 2, 0, 2; - %store/vec4 v00000000011d90e0_0, 0, 2; - %jmp T_4.17; -T_4.16 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v00000000011d97c0_0, 0, 1; -T_4.17 ; -T_4.15 ; -T_4.13 ; - %load/vec4 v00000000011da120_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.18, 9; - %pushi/vec4 0, 0, 5; - %store/vec4 v00000000011da6c0_0, 0, 5; - %vpi_call/w 6 124 "$display", "ALU OP = 0 (ADDU/ADDIU)" {0 0 0}; - %jmp T_4.19; -T_4.18 ; - %load/vec4 v00000000011da120_0; - %cmpi/e 12, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.20, 9; - %pushi/vec4 4, 0, 5; - %store/vec4 v00000000011da6c0_0, 0, 5; - %jmp T_4.21; -T_4.20 ; - %load/vec4 v00000000011da120_0; - %cmpi/e 4, 0, 6; - %jmp/0xz T_4.22, 4; - %pushi/vec4 13, 0, 5; - %store/vec4 v00000000011da6c0_0, 0, 5; - %jmp T_4.23; -T_4.22 ; - %load/vec4 v00000000011da120_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d8960_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d8960_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.24, 8; - %pushi/vec4 17, 0, 5; - %store/vec4 v00000000011da6c0_0, 0, 5; - %jmp T_4.25; -T_4.24 ; - %load/vec4 v00000000011da120_0; - %cmpi/e 7, 0, 6; - %jmp/0xz T_4.26, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v00000000011da6c0_0, 0, 5; - %jmp T_4.27; -T_4.26 ; - %load/vec4 v00000000011da120_0; - %cmpi/e 6, 0, 6; - %jmp/0xz T_4.28, 4; - %pushi/vec4 15, 0, 5; - %store/vec4 v00000000011da6c0_0, 0, 5; - %jmp T_4.29; -T_4.28 ; - %load/vec4 v00000000011da120_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d8960_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d8960_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.30, 8; - %pushi/vec4 14, 0, 5; - %store/vec4 v00000000011da6c0_0, 0, 5; - %jmp T_4.31; -T_4.30 ; - %load/vec4 v00000000011da120_0; - %cmpi/e 5, 0, 6; - %jmp/0xz T_4.32, 4; - %pushi/vec4 18, 0, 5; - %store/vec4 v00000000011da6c0_0, 0, 5; - %jmp T_4.33; -T_4.32 ; - %load/vec4 v00000000011da120_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.34, 8; - %pushi/vec4 3, 0, 5; - %store/vec4 v00000000011da6c0_0, 0, 5; - %jmp T_4.35; -T_4.34 ; - %load/vec4 v00000000011da120_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.36, 8; - %pushi/vec4 23, 0, 5; - %store/vec4 v00000000011da6c0_0, 0, 5; - %jmp T_4.37; -T_4.36 ; - %load/vec4 v00000000011da120_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.38, 4; - %pushi/vec4 0, 0, 5; - %store/vec4 v00000000011da6c0_0, 0, 5; - %jmp T_4.39; -T_4.38 ; - %load/vec4 v00000000011da120_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.40, 4; - %pushi/vec4 7, 0, 5; - %store/vec4 v00000000011da6c0_0, 0, 5; - %jmp T_4.41; -T_4.40 ; - %load/vec4 v00000000011da120_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.42, 8; - %pushi/vec4 19, 0, 5; - %store/vec4 v00000000011da6c0_0, 0, 5; - %jmp T_4.43; -T_4.42 ; - %load/vec4 v00000000011da120_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.44, 8; - %pushi/vec4 2, 0, 5; - %store/vec4 v00000000011da6c0_0, 0, 5; - %jmp T_4.45; -T_4.44 ; - %load/vec4 v00000000011da120_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.46, 8; - %pushi/vec4 22, 0, 5; - %store/vec4 v00000000011da6c0_0, 0, 5; - %jmp T_4.47; -T_4.46 ; - %load/vec4 v00000000011da120_0; - %cmpi/e 13, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.48, 9; - %pushi/vec4 5, 0, 5; - %store/vec4 v00000000011da6c0_0, 0, 5; - %jmp T_4.49; -T_4.48 ; - %load/vec4 v00000000011da120_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.50, 8; - %pushi/vec4 7, 0, 5; - %store/vec4 v00000000011da6c0_0, 0, 5; - %jmp T_4.51; -T_4.50 ; - %load/vec4 v00000000011da120_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.52, 8; - %pushi/vec4 8, 0, 5; - %store/vec4 v00000000011da6c0_0, 0, 5; - %jmp T_4.53; -T_4.52 ; - %load/vec4 v00000000011da120_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.54, 8; - %pushi/vec4 11, 0, 5; - %store/vec4 v00000000011da6c0_0, 0, 5; - %jmp T_4.55; -T_4.54 ; - %load/vec4 v00000000011da120_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.56, 8; - %pushi/vec4 12, 0, 5; - %store/vec4 v00000000011da6c0_0, 0, 5; - %jmp T_4.57; -T_4.56 ; - %load/vec4 v00000000011da120_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.58, 8; - %pushi/vec4 9, 0, 5; - %store/vec4 v00000000011da6c0_0, 0, 5; - %jmp T_4.59; -T_4.58 ; - %load/vec4 v00000000011da120_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.60, 8; - %pushi/vec4 10, 0, 5; - %store/vec4 v00000000011da6c0_0, 0, 5; - %jmp T_4.61; -T_4.60 ; - %load/vec4 v00000000011da120_0; - %cmpi/e 10, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.62, 9; - %pushi/vec4 20, 0, 5; - %store/vec4 v00000000011da6c0_0, 0, 5; - %jmp T_4.63; -T_4.62 ; - %load/vec4 v00000000011da120_0; - %cmpi/e 11, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.64, 9; - %pushi/vec4 21, 0, 5; - %store/vec4 v00000000011da6c0_0, 0, 5; - %jmp T_4.65; -T_4.64 ; - %load/vec4 v00000000011da120_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.66, 8; - %pushi/vec4 1, 0, 5; - %store/vec4 v00000000011da6c0_0, 0, 5; - %jmp T_4.67; -T_4.66 ; - %load/vec4 v00000000011da120_0; - %cmpi/e 14, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.68, 9; - %pushi/vec4 6, 0, 5; - %store/vec4 v00000000011da6c0_0, 0, 5; - %vpi_call/w 6 175 "$display", "ALU Op = 6 (XOR)" {0 0 0}; - %jmp T_4.69; -T_4.68 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v00000000011da6c0_0, 0, 5; -T_4.69 ; -T_4.67 ; -T_4.65 ; -T_4.63 ; -T_4.61 ; -T_4.59 ; -T_4.57 ; -T_4.55 ; -T_4.53 ; -T_4.51 ; -T_4.49 ; -T_4.47 ; -T_4.45 ; -T_4.43 ; -T_4.41 ; -T_4.39 ; -T_4.37 ; -T_4.35 ; -T_4.33 ; -T_4.31 ; -T_4.29 ; -T_4.27 ; -T_4.25 ; -T_4.23 ; -T_4.21 ; -T_4.19 ; - %load/vec4 v00000000011da120_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.70, 8; - %load/vec4 v00000000011da080_0; - %parti/s 5, 6, 4; - %store/vec4 v00000000011d8b40_0, 0, 5; - %jmp T_4.71; -T_4.70 ; - %load/vec4 v00000000011da120_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.72, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v00000000011d8b40_0, 0, 5; - %jmp T_4.73; -T_4.72 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v00000000011d8b40_0, 0, 5; -T_4.73 ; -T_4.71 ; - %load/vec4 v00000000011da120_0; - %cmpi/e 40, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.74, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000011d9040_0, 0, 1; - %jmp T_4.75; -T_4.74 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011d9040_0, 0, 1; -T_4.75 ; - %load/vec4 v00000000011da120_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.76, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000011d9860_0, 0, 1; - %jmp T_4.77; -T_4.76 ; - %load/vec4 v00000000011da120_0; - %cmpi/e 4, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 7, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 6, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 5, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %load/vec4 v00000000011da120_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d8960_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d8960_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d8960_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d8960_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %flag_or 8, 9; - %jmp/0xz T_4.78, 8; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011d9860_0, 0, 1; - %jmp T_4.79; -T_4.78 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v00000000011d9860_0, 0, 1; -T_4.79 ; -T_4.77 ; - %load/vec4 v00000000011da120_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011da120_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011d99a0_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.80, 9; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000011d8f00_0, 0, 1; - %jmp T_4.81; -T_4.80 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011d8f00_0, 0, 1; -T_4.81 ; - %jmp T_4; - .thread T_4, $push; - .scope S_0000000001169360; -T_5 ; - %fork t_5, S_00000000011694f0; - %jmp t_4; - .scope S_00000000011694f0; -t_5 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000011d9720_0, 0, 32; -T_5.0 ; - %load/vec4 v00000000011d9720_0; - %cmpi/s 32, 0, 32; - %jmp/0xz T_5.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v00000000011d9720_0; - %store/vec4a v00000000011da3a0, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000011d9720_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000011d9720_0, 0, 32; - %jmp T_5.0; -T_5.1 ; - %end; - .scope S_0000000001169360; -t_4 %join; - %end; - .thread T_5; - .scope S_0000000001169360; -T_6 ; -Ewait_0 .event/or E_00000000011b0ca0, E_0x0; - %wait Ewait_0; - %load/vec4 v00000000011d9360_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v00000000011da3a0, 4; - %store/vec4 v00000000011d8a00_0, 0, 32; - %load/vec4 v00000000011da440_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v00000000011da3a0, 4; - %store/vec4 v00000000011d9ea0_0, 0, 32; - %jmp T_6; - .thread T_6, $push; - .scope S_0000000001169360; -T_7 ; - %wait E_00000000011b0b60; - %load/vec4 v00000000011d94a0_0; - %cmpi/e 0, 0, 5; - %jmp/0xz T_7.0, 4; - %jmp T_7.1; -T_7.0 ; - %load/vec4 v00000000011d8c80_0; - %flag_set/vec4 8; - %jmp/0xz T_7.2, 8; - %load/vec4 v00000000011d95e0_0; - %dup/vec4; - %pushi/vec4 32, 0, 6; - %cmp/u; - %jmp/1 T_7.4, 6; - %dup/vec4; - %pushi/vec4 36, 0, 6; - %cmp/u; - %jmp/1 T_7.5, 6; - %dup/vec4; - %pushi/vec4 33, 0, 6; - %cmp/u; - %jmp/1 T_7.6, 6; - %dup/vec4; - %pushi/vec4 37, 0, 6; - %cmp/u; - %jmp/1 T_7.7, 6; - %dup/vec4; - %pushi/vec4 34, 0, 6; - %cmp/u; - %jmp/1 T_7.8, 6; - %dup/vec4; - %pushi/vec4 38, 0, 6; - %cmp/u; - %jmp/1 T_7.9, 6; - %load/vec4 v00000000011d8d20_0; - %load/vec4 v00000000011d94a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011da3a0, 0, 4; - %jmp T_7.11; -T_7.4 ; - %load/vec4 v00000000011d8a00_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.12, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.13, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.14, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.15, 6; - %jmp T_7.16; -T_7.12 ; - %load/vec4 v00000000011d8d20_0; - %parti/s 1, 7, 4; - %replicate 24; - %load/vec4 v00000000011d8d20_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000011d94a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011da3a0, 0, 4; - %jmp T_7.16; -T_7.13 ; - %load/vec4 v00000000011d8d20_0; - %parti/s 1, 15, 5; - %replicate 24; - %load/vec4 v00000000011d8d20_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000011d94a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011da3a0, 0, 4; - %jmp T_7.16; -T_7.14 ; - %load/vec4 v00000000011d8d20_0; - %parti/s 1, 23, 6; - %replicate 24; - %load/vec4 v00000000011d8d20_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000011d94a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011da3a0, 0, 4; - %jmp T_7.16; -T_7.15 ; - %load/vec4 v00000000011d8d20_0; - %parti/s 1, 31, 6; - %replicate 24; - %load/vec4 v00000000011d8d20_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000011d94a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011da3a0, 0, 4; - %jmp T_7.16; -T_7.16 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.5 ; - %load/vec4 v00000000011d8a00_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.17, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.18, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.19, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.20, 6; - %jmp T_7.21; -T_7.17 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000011d8d20_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000011d94a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011da3a0, 0, 4; - %jmp T_7.21; -T_7.18 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000011d8d20_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000011d94a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011da3a0, 0, 4; - %jmp T_7.21; -T_7.19 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000011d8d20_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000011d94a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011da3a0, 0, 4; - %jmp T_7.21; -T_7.20 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000011d8d20_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000011d94a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011da3a0, 0, 4; - %jmp T_7.21; -T_7.21 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.6 ; - %load/vec4 v00000000011d8a00_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.22, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.23, 6; - %jmp T_7.24; -T_7.22 ; - %load/vec4 v00000000011d8d20_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v00000000011d8d20_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000011d94a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011da3a0, 0, 4; - %jmp T_7.24; -T_7.23 ; - %load/vec4 v00000000011d8d20_0; - %parti/s 1, 31, 6; - %replicate 16; - %load/vec4 v00000000011d8d20_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000011d94a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011da3a0, 0, 4; - %jmp T_7.24; -T_7.24 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.7 ; - %load/vec4 v00000000011d8a00_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.25, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.26, 6; - %jmp T_7.27; -T_7.25 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v00000000011d8d20_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000011d94a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011da3a0, 0, 4; - %jmp T_7.27; -T_7.26 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v00000000011d8d20_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000011d94a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011da3a0, 0, 4; - %jmp T_7.27; -T_7.27 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.8 ; - %load/vec4 v00000000011d8a00_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.28, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.29, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.30, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.31, 6; - %jmp T_7.32; -T_7.28 ; - %load/vec4 v00000000011d8d20_0; - %parti/s 8, 0, 2; - %load/vec4 v00000000011d94a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 24, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v00000000011da3a0, 4, 5; - %jmp T_7.32; -T_7.29 ; - %load/vec4 v00000000011d8d20_0; - %parti/s 16, 0, 2; - %load/vec4 v00000000011d94a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 16, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v00000000011da3a0, 4, 5; - %jmp T_7.32; -T_7.30 ; - %load/vec4 v00000000011d8d20_0; - %parti/s 24, 0, 2; - %load/vec4 v00000000011d94a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 8, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v00000000011da3a0, 4, 5; - %jmp T_7.32; -T_7.31 ; - %load/vec4 v00000000011d8d20_0; - %load/vec4 v00000000011d94a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011da3a0, 0, 4; - %jmp T_7.32; -T_7.32 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.9 ; - %load/vec4 v00000000011d8a00_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.33, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.34, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.35, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.36, 6; - %jmp T_7.37; -T_7.33 ; - %load/vec4 v00000000011d8d20_0; - %load/vec4 v00000000011d94a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011da3a0, 0, 4; - %jmp T_7.37; -T_7.34 ; - %load/vec4 v00000000011d8d20_0; - %parti/s 24, 8, 5; - %load/vec4 v00000000011d94a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011da3a0, 0, 4; - %jmp T_7.37; -T_7.35 ; - %load/vec4 v00000000011d8d20_0; - %parti/s 16, 16, 6; - %load/vec4 v00000000011d94a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011da3a0, 0, 4; - %jmp T_7.37; -T_7.36 ; - %load/vec4 v00000000011d8d20_0; - %parti/s 8, 24, 6; - %load/vec4 v00000000011d94a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011da3a0, 0, 4; - %jmp T_7.37; -T_7.37 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.11 ; - %pop/vec4 1; -T_7.2 ; -T_7.1 ; - %jmp T_7; - .thread T_7; - .scope S_0000000001175fc0; -T_8 ; -Ewait_1 .event/or E_00000000011b1460, E_0x0; - %wait Ewait_1; - %load/vec4 v00000000011da4e0_0; - %dup/vec4; - %pushi/vec4 0, 0, 5; - %cmp/u; - %jmp/1 T_8.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 5; - %cmp/u; - %jmp/1 T_8.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 5; - %cmp/u; - %jmp/1 T_8.2, 6; - %dup/vec4; - %pushi/vec4 3, 0, 5; - %cmp/u; - %jmp/1 T_8.3, 6; - %dup/vec4; - %pushi/vec4 4, 0, 5; - %cmp/u; - %jmp/1 T_8.4, 6; - %dup/vec4; - %pushi/vec4 5, 0, 5; - %cmp/u; - %jmp/1 T_8.5, 6; - %dup/vec4; - %pushi/vec4 6, 0, 5; - %cmp/u; - %jmp/1 T_8.6, 6; - %dup/vec4; - %pushi/vec4 7, 0, 5; - %cmp/u; - %jmp/1 T_8.7, 6; - %dup/vec4; - %pushi/vec4 8, 0, 5; - %cmp/u; - %jmp/1 T_8.8, 6; - %dup/vec4; - %pushi/vec4 9, 0, 5; - %cmp/u; - %jmp/1 T_8.9, 6; - %dup/vec4; - %pushi/vec4 10, 0, 5; - %cmp/u; - %jmp/1 T_8.10, 6; - %dup/vec4; - %pushi/vec4 11, 0, 5; - %cmp/u; - %jmp/1 T_8.11, 6; - %dup/vec4; - %pushi/vec4 12, 0, 5; - %cmp/u; - %jmp/1 T_8.12, 6; - %dup/vec4; - %pushi/vec4 13, 0, 5; - %cmp/u; - %jmp/1 T_8.13, 6; - %dup/vec4; - %pushi/vec4 14, 0, 5; - %cmp/u; - %jmp/1 T_8.14, 6; - %dup/vec4; - %pushi/vec4 15, 0, 5; - %cmp/u; - %jmp/1 T_8.15, 6; - %dup/vec4; - %pushi/vec4 16, 0, 5; - %cmp/u; - %jmp/1 T_8.16, 6; - %dup/vec4; - %pushi/vec4 17, 0, 5; - %cmp/u; - %jmp/1 T_8.17, 6; - %dup/vec4; - %pushi/vec4 18, 0, 5; - %cmp/u; - %jmp/1 T_8.18, 6; - %dup/vec4; - %pushi/vec4 19, 0, 5; - %cmp/u; - %jmp/1 T_8.19, 6; - %dup/vec4; - %pushi/vec4 20, 0, 5; - %cmp/u; - %jmp/1 T_8.20, 6; - %dup/vec4; - %pushi/vec4 21, 0, 5; - %cmp/u; - %jmp/1 T_8.21, 6; - %dup/vec4; - %pushi/vec4 22, 0, 5; - %cmp/u; - %jmp/1 T_8.22, 6; - %dup/vec4; - %pushi/vec4 23, 0, 5; - %cmp/u; - %jmp/1 T_8.23, 6; - %jmp T_8.24; -T_8.0 ; - %load/vec4 v00000000011d9cc0_0; - %load/vec4 v00000000011d8dc0_0; - %add; - %store/vec4 v00000000011d9400_0, 0, 32; - %jmp T_8.24; -T_8.1 ; - %load/vec4 v00000000011d9cc0_0; - %load/vec4 v00000000011d8dc0_0; - %sub; - %store/vec4 v00000000011d9400_0, 0, 32; - %jmp T_8.24; -T_8.2 ; - %load/vec4 v00000000011d9cc0_0; - %load/vec4 v00000000011d8dc0_0; - %mul; - %store/vec4 v00000000011d9400_0, 0, 32; - %jmp T_8.24; -T_8.3 ; - %load/vec4 v00000000011d9cc0_0; - %load/vec4 v00000000011d8dc0_0; - %div/s; - %store/vec4 v00000000011d9400_0, 0, 32; - %jmp T_8.24; -T_8.4 ; - %load/vec4 v00000000011d9cc0_0; - %load/vec4 v00000000011d8dc0_0; - %and; - %store/vec4 v00000000011d9400_0, 0, 32; - %jmp T_8.24; -T_8.5 ; - %load/vec4 v00000000011d9cc0_0; - %load/vec4 v00000000011d8dc0_0; - %or; - %store/vec4 v00000000011d9400_0, 0, 32; - %jmp T_8.24; -T_8.6 ; - %load/vec4 v00000000011d9cc0_0; - %load/vec4 v00000000011d8dc0_0; - %xor; - %store/vec4 v00000000011d9400_0, 0, 32; - %jmp T_8.24; -T_8.7 ; - %load/vec4 v00000000011d8dc0_0; - %ix/getv 4, v00000000011d9ae0_0; - %shiftl 4; - %store/vec4 v00000000011d9400_0, 0, 32; - %jmp T_8.24; -T_8.8 ; - %load/vec4 v00000000011d8dc0_0; - %ix/getv 4, v00000000011d9cc0_0; - %shiftl 4; - %store/vec4 v00000000011d9400_0, 0, 32; - %jmp T_8.24; -T_8.9 ; - %load/vec4 v00000000011d8dc0_0; - %ix/getv 4, v00000000011d9ae0_0; - %shiftr 4; - %store/vec4 v00000000011d9400_0, 0, 32; - %jmp T_8.24; -T_8.10 ; - %load/vec4 v00000000011d8dc0_0; - %ix/getv 4, v00000000011d9cc0_0; - %shiftr 4; - %store/vec4 v00000000011d9400_0, 0, 32; - %jmp T_8.24; -T_8.11 ; - %load/vec4 v00000000011d8dc0_0; - %ix/getv 4, v00000000011d9ae0_0; - %shiftr 4; - %store/vec4 v00000000011d9400_0, 0, 32; - %jmp T_8.24; -T_8.12 ; - %load/vec4 v00000000011d8dc0_0; - %ix/getv 4, v00000000011d9cc0_0; - %shiftr 4; - %store/vec4 v00000000011d9400_0, 0, 32; - %jmp T_8.24; -T_8.13 ; - %load/vec4 v00000000011d9cc0_0; - %load/vec4 v00000000011d8dc0_0; - %cmp/e; - %jmp/0xz T_8.25, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000011d9a40_0, 0, 1; - %jmp T_8.26; -T_8.25 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011d9a40_0, 0, 1; -T_8.26 ; - %jmp T_8.24; -T_8.14 ; - %load/vec4 v00000000011d9cc0_0; - %load/vec4 v00000000011d8dc0_0; - %cmp/s; - %jmp/0xz T_8.27, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000011d9a40_0, 0, 1; - %jmp T_8.28; -T_8.27 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011d9a40_0, 0, 1; -T_8.28 ; - %jmp T_8.24; -T_8.15 ; - %load/vec4 v00000000011d9cc0_0; - %load/vec4 v00000000011d8dc0_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.29, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000011d9a40_0, 0, 1; - %jmp T_8.30; -T_8.29 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011d9a40_0, 0, 1; -T_8.30 ; - %jmp T_8.24; -T_8.16 ; - %load/vec4 v00000000011d8dc0_0; - %load/vec4 v00000000011d9cc0_0; - %cmp/s; - %jmp/0xz T_8.31, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000011d9a40_0, 0, 1; - %jmp T_8.32; -T_8.31 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011d9a40_0, 0, 1; -T_8.32 ; - %jmp T_8.24; -T_8.17 ; - %load/vec4 v00000000011d8dc0_0; - %load/vec4 v00000000011d9cc0_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.33, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000011d9a40_0, 0, 1; - %jmp T_8.34; -T_8.33 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011d9a40_0, 0, 1; -T_8.34 ; - %jmp T_8.24; -T_8.18 ; - %load/vec4 v00000000011d9cc0_0; - %load/vec4 v00000000011d8dc0_0; - %cmp/ne; - %jmp/0xz T_8.35, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000011d9a40_0, 0, 1; - %jmp T_8.36; -T_8.35 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011d9a40_0, 0, 1; -T_8.36 ; - %jmp T_8.24; -T_8.19 ; - %load/vec4 v00000000011d9cc0_0; - %store/vec4 v00000000011d9400_0, 0, 32; - %jmp T_8.24; -T_8.20 ; - %load/vec4 v00000000011d9cc0_0; - %load/vec4 v00000000011d8dc0_0; - %cmp/s; - %jmp/0xz T_8.37, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v00000000011d9400_0, 0, 32; -T_8.37 ; - %jmp T_8.24; -T_8.21 ; - %load/vec4 v00000000011d9cc0_0; - %load/vec4 v00000000011d8dc0_0; - %cmp/u; - %jmp/0xz T_8.39, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v00000000011d9400_0, 0, 32; -T_8.39 ; - %jmp T_8.24; -T_8.22 ; - %load/vec4 v00000000011d9cc0_0; - %load/vec4 v00000000011d8dc0_0; - %mul; - %store/vec4 v00000000011d9400_0, 0, 32; - %jmp T_8.24; -T_8.23 ; - %load/vec4 v00000000011d9cc0_0; - %load/vec4 v00000000011d8dc0_0; - %div; - %store/vec4 v00000000011d9400_0, 0, 32; - %jmp T_8.24; -T_8.24 ; - %pop/vec4 1; - %jmp T_8; - .thread T_8, $push; - .scope S_0000000001175e30; -T_9 ; - %pushi/vec4 3217031168, 0, 32; - %store/vec4 v0000000001234090_0, 0, 32; - %end; - .thread T_9, $init; - .scope S_0000000001175e30; -T_10 ; -Ewait_2 .event/or E_00000000011b6a60, E_0x0; - %wait Ewait_2; - %load/vec4 v0000000001233e10_0; - %store/vec4 v0000000001233690_0, 0, 32; - %load/vec4 v0000000001232a10_0; - %store/vec4 v00000000011d9c20_0, 0, 32; - %load/vec4 v0000000001233550_0; - %store/vec4 v00000000011d9fe0_0, 0, 1; - %load/vec4 v00000000012337d0_0; - %store/vec4 v00000000011d9e00_0, 0, 1; - %load/vec4 v0000000001233cd0_0; - %store/vec4 v00000000011da300_0, 0, 32; - %jmp T_10; - .thread T_10, $push; - .scope S_0000000001175e30; -T_11 ; -Ewait_3 .event/or E_00000000011b67a0, E_0x0; - %wait Ewait_3; - %load/vec4 v00000000012339b0_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.2, 6; - %jmp T_11.3; -T_11.0 ; - %load/vec4 v0000000001233eb0_0; - %parti/s 5, 16, 6; - %store/vec4 v0000000001233c30_0, 0, 5; - %jmp T_11.3; -T_11.1 ; - %load/vec4 v0000000001233eb0_0; - %parti/s 5, 11, 5; - %store/vec4 v0000000001233c30_0, 0, 5; - %jmp T_11.3; -T_11.2 ; - %pushi/vec4 31, 0, 5; - %store/vec4 v0000000001233c30_0, 0, 5; - %jmp T_11.3; -T_11.3 ; - %pop/vec4 1; - %load/vec4 v0000000001233050_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.6, 6; - %jmp T_11.7; -T_11.4 ; - %load/vec4 v0000000001232a10_0; - %store/vec4 v0000000001233d70_0, 0, 32; - %jmp T_11.7; -T_11.5 ; - %load/vec4 v00000000011d9680_0; - %store/vec4 v0000000001233d70_0, 0, 32; - %jmp T_11.7; -T_11.6 ; - %load/vec4 v0000000001234090_0; - %addi 8, 0, 32; - %store/vec4 v0000000001233d70_0, 0, 32; - %jmp T_11.7; -T_11.7 ; - %pop/vec4 1; - %load/vec4 v0000000001233ff0_0; - %dup/vec4; - %pushi/vec4 1, 0, 1; - %cmp/u; - %jmp/1 T_11.8, 6; - %dup/vec4; - %pushi/vec4 0, 0, 1; - %cmp/u; - %jmp/1 T_11.9, 6; - %jmp T_11.10; -T_11.8 ; - %load/vec4 v0000000001233eb0_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v0000000001233eb0_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %store/vec4 v000000000119e2a0_0, 0, 32; - %jmp T_11.10; -T_11.9 ; - %load/vec4 v0000000001233cd0_0; - %store/vec4 v000000000119e2a0_0, 0, 32; - %jmp T_11.10; -T_11.10 ; - %pop/vec4 1; - %jmp T_11; - .thread T_11, $push; - .scope S_00000000011baad0; -T_12 ; - %vpi_call/w 3 36 "$dumpfile", "mips_cpu_harvard.vcd" {0 0 0}; - %vpi_call/w 3 37 "$dumpvars", 32'sb00000000000000000000000000000000, S_00000000011baad0 {0 0 0}; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000012361e0_0, 0, 1; - %pushi/vec4 100, 0, 32; -T_12.0 %dup/vec4; - %pushi/vec4 0, 0, 32; - %cmp/s; - %jmp/1xz T_12.1, 5; - %jmp/1 T_12.1, 4; - %pushi/vec4 1, 0, 32; - %sub; - %delay 10, 0; - %load/vec4 v00000000012361e0_0; - %nor/r; - %store/vec4 v00000000012361e0_0, 0, 1; - %delay 10, 0; - %load/vec4 v00000000012361e0_0; - %nor/r; - %store/vec4 v00000000012361e0_0, 0, 1; - %jmp T_12.0; -T_12.1 ; - %pop/vec4 1; - %vpi_call/w 3 47 "$fatal", 32'sb00000000000000000000000000000010, "Simulation did not finish within %d cycles.", P_00000000011044b8 {0 0 0}; - %end; - .thread T_12; - .scope S_00000000011baad0; -T_13 ; - %vpi_call/w 3 51 "$display", "Initial Reset 0" {0 0 0}; - %pushi/vec4 0, 0, 1; - %assign/vec4 v0000000001234b60_0, 0; - %vpi_call/w 3 55 "$display", "Initial Reset 1" {0 0 0}; - %wait E_00000000011b0ba0; - %pushi/vec4 1, 0, 1; - %assign/vec4 v0000000001234b60_0, 0; - %vpi_call/w 3 59 "$display", "Initial Reset 0: Start Program" {0 0 0}; - %wait E_00000000011b0ba0; - %pushi/vec4 0, 0, 1; - %assign/vec4 v0000000001234b60_0, 0; - %wait E_00000000011b0ba0; - %load/vec4 v00000000012366e0_0; - %pad/u 32; - %cmpi/e 1, 0, 32; - %jmp/0xz T_13.0, 4; - %jmp T_13.1; -T_13.0 ; - %vpi_call/w 3 65 "$display", "TB: CPU did not set active=1 after reset." {0 0 0}; -T_13.1 ; -T_13.2 ; - %load/vec4 v00000000012366e0_0; - %flag_set/vec4 8; - %jmp/0xz T_13.3, 8; - %wait E_00000000011b0ba0; - %vpi_call/w 3 71 "$display", "Reg File Write data: %d", v0000000001233d70_0 {0 0 0}; - %jmp T_13.2; -T_13.3 ; - %wait E_00000000011b0ba0; - %vpi_call/w 3 74 "$display", "TB: CPU Halt; active=0" {0 0 0}; - %vpi_call/w 3 75 "$display", "Output:" {0 0 0}; - %vpi_call/w 3 76 "$display", "%d", v0000000001234e80_0 {0 0 0}; - %vpi_call/w 3 77 "$finish" {0 0 0}; - %end; - .thread T_13; -# The file index is used to find the file name in the following table. -:file_names 10; - "N/A"; - ""; - "-"; - "testbench/mips_cpu_harvard_tb.v"; - "rtl/mips_cpu_harvard.v"; - "rtl/mips_cpu_alu.v"; - "rtl/mips_cpu_control.v"; - "rtl/mips_cpu_pc.v"; - "rtl/mips_cpu_regfile.v"; - "rtl/mips_cpu_memory.v"; diff --git a/exec/mips_cpu_harvard_tb_sltu b/exec/mips_cpu_harvard_tb_sltu deleted file mode 100644 index e999362..0000000 --- a/exec/mips_cpu_harvard_tb_sltu +++ /dev/null @@ -1,2738 +0,0 @@ -#! /usr/local/iverilog/bin/vvp -:ivl_version "11.0 (devel)"; -:ivl_delay_selection "TYPICAL"; -:vpi_time_precision + 0; -:vpi_module "C:\iverilog\lib\ivl\system.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_sys.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_textio.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2005_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\va_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2009.vpi"; -S_000000000107a580 .scope package, "$unit" "$unit" 2 1; - .timescale 0 0; -S_000000000107b580 .scope module, "mips_cpu_harvard_tb" "mips_cpu_harvard_tb" 3 1; - .timescale 0 0; -P_0000000001003650 .param/str "RAM_INIT_FILE" 0 3 3, "inputs/sltu.txt"; -P_0000000001003688 .param/l "TIMEOUT_CYCLES" 0 3 4, +C4<00000000000000000000000001100100>; -v00000000010d68a0_0 .net "active", 0 0, v0000000001079ba0_0; 1 drivers -v00000000010d6760_0 .var "clk", 0 0; -v00000000010d55e0_0 .var "clk_enable", 0 0; -v00000000010d5680_0 .net "data_address", 31 0, v00000000010787a0_0; 1 drivers -v00000000010d66c0_0 .net "data_read", 0 0, v0000000001078a20_0; 1 drivers -v00000000010d4c80_0 .net "data_readdata", 31 0, L_00000000010d5220; 1 drivers -v00000000010d63a0_0 .net "data_write", 0 0, v0000000001078d40_0; 1 drivers -v00000000010d4d20_0 .net "data_writedata", 31 0, v0000000001078e80_0; 1 drivers -v00000000010d6940_0 .net "instr_address", 31 0, v00000000010d4430_0; 1 drivers -v00000000010d69e0_0 .net "instr_readdata", 31 0, L_00000000010d5f40; 1 drivers -v00000000010d4dc0_0 .net "register_v0", 31 0, L_000000000106b7e0; 1 drivers -v00000000010d5180_0 .var "reset", 0 0; -S_000000000107b710 .scope module, "cpuInst" "mips_cpu_harvard" 3 19, 4 1 0, S_000000000107b580; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "reset"; - .port_info 2 /OUTPUT 1 "active"; - .port_info 3 /OUTPUT 32 "register_v0"; - .port_info 4 /INPUT 1 "clk_enable"; - .port_info 5 /OUTPUT 32 "instr_address"; - .port_info 6 /INPUT 32 "instr_readdata"; - .port_info 7 /OUTPUT 32 "data_address"; - .port_info 8 /OUTPUT 1 "data_write"; - .port_info 9 /OUTPUT 1 "data_read"; - .port_info 10 /OUTPUT 32 "data_writedata"; - .port_info 11 /INPUT 32 "data_readdata"; -v00000000010794c0_0 .net "active", 0 0, v0000000001079ba0_0; alias, 1 drivers -v0000000001078b60_0 .net "clk", 0 0, v00000000010d6760_0; 1 drivers -v0000000001079560_0 .net "clk_enable", 0 0, v00000000010d55e0_0; 1 drivers -v00000000010787a0_0 .var "data_address", 31 0; -v0000000001078a20_0 .var "data_read", 0 0; -v0000000001078c00_0 .net "data_readdata", 31 0, L_00000000010d5220; alias, 1 drivers -v0000000001078d40_0 .var "data_write", 0 0; -v0000000001078e80_0 .var "data_writedata", 31 0; -v0000000000fa9b90_0 .var "in_B", 31 0; -v00000000010d4070_0 .net "in_opcode", 5 0, L_00000000010d4fa0; 1 drivers -v00000000010d3530_0 .net "in_pc_in", 31 0, v0000000001079ce0_0; 1 drivers -v00000000010d3170_0 .net "in_readreg1", 4 0, L_00000000010d5860; 1 drivers -v00000000010d4390_0 .net "in_readreg2", 4 0, L_00000000010d5900; 1 drivers -v00000000010d33f0_0 .var "in_writedata", 31 0; -v00000000010d3df0_0 .var "in_writereg", 4 0; -v00000000010d4430_0 .var "instr_address", 31 0; -v00000000010d3f30_0 .net "instr_readdata", 31 0, L_00000000010d5f40; alias, 1 drivers -v00000000010d3490_0 .net "out_ALUCond", 0 0, v0000000001079e20_0; 1 drivers -v00000000010d2e50_0 .net "out_ALUOp", 4 0, v0000000001079060_0; 1 drivers -v00000000010d35d0_0 .net "out_ALURes", 31 0, v00000000010788e0_0; 1 drivers -v00000000010d46b0_0 .net "out_ALUSrc", 0 0, v000000000107a280_0; 1 drivers -v00000000010d3670_0 .net "out_MemRead", 0 0, v00000000010796a0_0; 1 drivers -v00000000010d3cb0_0 .net "out_MemWrite", 0 0, v000000000107a000_0; 1 drivers -v00000000010d3e90_0 .net "out_MemtoReg", 1 0, v0000000001078de0_0; 1 drivers -v00000000010d3710_0 .net "out_PC", 1 0, v0000000001079880_0; 1 drivers -v00000000010d41b0_0 .net "out_RegDst", 1 0, v0000000001079b00_0; 1 drivers -v00000000010d4570_0 .net "out_RegWrite", 0 0, v0000000001079100_0; 1 drivers -v00000000010d3350_0 .var "out_pc_out", 31 0; -v00000000010d3fd0_0 .net "out_readdata1", 31 0, v0000000001078700_0; 1 drivers -v00000000010d4750_0 .net "out_readdata2", 31 0, v0000000001078980_0; 1 drivers -v00000000010d2ef0_0 .net "out_shamt", 4 0, v00000000010792e0_0; 1 drivers -v00000000010d30d0_0 .net "register_v0", 31 0, L_000000000106b7e0; alias, 1 drivers -v00000000010d2f90_0 .net "reset", 0 0, v00000000010d5180_0; 1 drivers -E_00000000010154c0/0 .event edge, v0000000001079b00_0, v0000000001079740_0, v0000000001079740_0, v0000000001078de0_0; -E_00000000010154c0/1 .event edge, v00000000010788e0_0, v0000000001078c00_0, v0000000001079600_0, v000000000107a280_0; -E_00000000010154c0/2 .event edge, v0000000001079740_0, v0000000001079740_0, v0000000001078980_0; -E_00000000010154c0 .event/or E_00000000010154c0/0, E_00000000010154c0/1, E_00000000010154c0/2; -E_00000000010155c0/0 .event edge, v0000000001079ce0_0, v00000000010788e0_0, v000000000107a000_0, v00000000010796a0_0; -E_00000000010155c0/1 .event edge, v0000000001078980_0; -E_00000000010155c0 .event/or E_00000000010155c0/0, E_00000000010155c0/1; -L_00000000010d5860 .part L_00000000010d5f40, 21, 5; -L_00000000010d5900 .part L_00000000010d5f40, 16, 5; -L_00000000010d4fa0 .part L_00000000010d5f40, 26, 6; -S_0000000000fd5e30 .scope module, "alu" "mips_cpu_alu" 4 121, 5 1 0, S_000000000107b710; - .timescale 0 0; - .port_info 0 /INPUT 32 "A"; - .port_info 1 /INPUT 32 "B"; - .port_info 2 /INPUT 5 "ALUOp"; - .port_info 3 /INPUT 5 "shamt"; - .port_info 4 /OUTPUT 1 "ALUCond"; - .port_info 5 /OUTPUT 32 "ALURes"; -enum00000000001fbd00 .enum4 (5) - "ADD" 5'b00000, - "SUB" 5'b00001, - "MUL" 5'b00010, - "DIV" 5'b00011, - "AND" 5'b00100, - "OR" 5'b00101, - "XOR" 5'b00110, - "SLL" 5'b00111, - "SLLV" 5'b01000, - "SRL" 5'b01001, - "SRLV" 5'b01010, - "SRA" 5'b01011, - "SRAV" 5'b01100, - "EQ" 5'b01101, - "LES" 5'b01110, - "LEQ" 5'b01111, - "GRT" 5'b10000, - "GEQ" 5'b10001, - "NEQ" 5'b10010, - "PAS" 5'b10011, - "SLT" 5'b10100, - "SLTU" 5'b10101, - "MULU" 5'b10110, - "DIVU" 5'b10111 - ; -L_000000000106ba10 .functor BUFZ 5, v0000000001079060_0, C4<00000>, C4<00000>, C4<00000>; -v00000000010797e0_0 .net "A", 31 0, v0000000001078700_0; alias, 1 drivers -v0000000001079e20_0 .var "ALUCond", 0 0; -v0000000001078660_0 .net "ALUOp", 4 0, v0000000001079060_0; alias, 1 drivers -v00000000010799c0_0 .net "ALUOps", 4 0, L_000000000106ba10; 1 drivers -v00000000010788e0_0 .var/s "ALURes", 31 0; -v00000000010785c0_0 .net "B", 31 0, v0000000000fa9b90_0; 1 drivers -v000000000107a1e0_0 .net "shamt", 4 0, v00000000010792e0_0; alias, 1 drivers -E_0000000001017c80 .event edge, v00000000010799c0_0, v00000000010797e0_0, v00000000010785c0_0, v000000000107a1e0_0; -S_0000000000fd5fc0 .scope module, "control" "mips_cpu_control" 4 90, 6 1 0, S_000000000107b710; - .timescale 0 0; - .port_info 0 /INPUT 32 "Instr"; - .port_info 1 /INPUT 1 "ALUCond"; - .port_info 2 /OUTPUT 2 "CtrlRegDst"; - .port_info 3 /OUTPUT 2 "CtrlPC"; - .port_info 4 /OUTPUT 1 "CtrlMemRead"; - .port_info 5 /OUTPUT 2 "CtrlMemtoReg"; - .port_info 6 /OUTPUT 5 "CtrlALUOp"; - .port_info 7 /OUTPUT 5 "Ctrlshamt"; - .port_info 8 /OUTPUT 1 "CtrlMemWrite"; - .port_info 9 /OUTPUT 1 "CtrlALUSrc"; - .port_info 10 /OUTPUT 1 "CtrlRegWrite"; -enum00000000001f9270 .enum4 (5) - "BLTZ" 5'b00000, - "BGEZ" 5'b00001, - "BLTZAL" 5'b10000, - "BGEZAL" 5'b10001 - ; -enum00000000001f9730 .enum4 (6) - "SPECIAL" 6'b000000, - "REGIMM" 6'b000001, - "J" 6'b000010, - "JAL" 6'b000011, - "BEQ" 6'b000100, - "BNE" 6'b000101, - "BLEZ" 6'b000110, - "BGTZ" 6'b000111, - "ADDI" 6'b001000, - "ADDIU" 6'b001001, - "SLTI" 6'b001010, - "SLTIU" 6'b001011, - "ANDI" 6'b001100, - "ORI" 6'b001101, - "XORI" 6'b001110, - "LUI" 6'b001111, - "LB" 6'b100000, - "LH" 6'b100001, - "LWL" 6'b100010, - "LW" 6'b100011, - "LBU" 6'b100100, - "LHU" 6'b100101, - "LWR" 6'b100110, - "SB" 6'b101000, - "SH" 6'b101001, - "SW" 6'b101011 - ; -enum00000000001fb7f0 .enum4 (6) - "SLL" 6'b000000, - "SRL" 6'b000010, - "SRA" 6'b000011, - "SLLV" 6'b000100, - "SRLV" 6'b000110, - "SRAV" 6'b000111, - "JR" 6'b001000, - "JALR" 6'b001001, - "MTHI" 6'b010001, - "MTLO" 6'b010011, - "MULT" 6'b011000, - "MULTU" 6'b011001, - "DIV" 6'b011010, - "DIVU" 6'b011011, - "ADDU" 6'b100001, - "SUBU" 6'b100011, - "AND" 6'b100100, - "OR" 6'b100101, - "XOR" 6'b100110, - "SLT" 6'b101010, - "SLTU" 6'b101011 - ; -v0000000001079a60_0 .net "ALUCond", 0 0, v0000000001079e20_0; alias, 1 drivers -v0000000001079060_0 .var "CtrlALUOp", 4 0; -v000000000107a280_0 .var "CtrlALUSrc", 0 0; -v00000000010796a0_0 .var "CtrlMemRead", 0 0; -v000000000107a000_0 .var "CtrlMemWrite", 0 0; -v0000000001078de0_0 .var "CtrlMemtoReg", 1 0; -v0000000001079880_0 .var "CtrlPC", 1 0; -v0000000001079b00_0 .var "CtrlRegDst", 1 0; -v0000000001079100_0 .var "CtrlRegWrite", 0 0; -v00000000010792e0_0 .var "Ctrlshamt", 4 0; -v0000000001079740_0 .net "Instr", 31 0, L_00000000010d5f40; alias, 1 drivers -v0000000001078840_0 .net "funct", 5 0, L_00000000010d5040; 1 drivers -v0000000001078ca0_0 .net "op", 5 0, L_00000000010d52c0; 1 drivers -v0000000001079920_0 .net "rt", 4 0, L_00000000010d59a0; 1 drivers -E_0000000001016b00/0 .event edge, v0000000001078ca0_0, v0000000001078840_0, v0000000001079e20_0, v0000000001079920_0; -E_0000000001016b00/1 .event edge, v0000000001079740_0; -E_0000000001016b00 .event/or E_0000000001016b00/0, E_0000000001016b00/1; -L_00000000010d52c0 .part L_00000000010d5f40, 26, 6; -L_00000000010d5040 .part L_00000000010d5f40, 0, 6; -L_00000000010d59a0 .part L_00000000010d5f40, 16, 5; -S_0000000000fd6150 .scope module, "pc" "pc" 4 79, 7 1 0, S_000000000107b710; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "rst"; - .port_info 2 /INPUT 2 "pc_ctrl"; - .port_info 3 /INPUT 32 "pc_in"; - .port_info 4 /INPUT 5 "rs"; - .port_info 5 /OUTPUT 32 "pc_out"; - .port_info 6 /OUTPUT 1 "active"; -v0000000001079ba0_0 .var "active", 0 0; -v0000000001078f20_0 .net "clk", 0 0, v00000000010d6760_0; alias, 1 drivers -v00000000010791a0_0 .net "pc_ctrl", 1 0, v0000000001079880_0; alias, 1 drivers -v0000000001079c40_0 .var "pc_curr", 31 0; -v0000000001079600_0 .net "pc_in", 31 0, v00000000010d3350_0; 1 drivers -v0000000001079ce0_0 .var "pc_out", 31 0; -o000000000107d1d8 .functor BUFZ 5, C4; HiZ drive -v000000000107a320_0 .net "rs", 4 0, o000000000107d1d8; 0 drivers -v000000000107a3c0_0 .net "rst", 0 0, v00000000010d5180_0; alias, 1 drivers -E_00000000010177c0 .event posedge, v0000000001078f20_0; -S_0000000000fc91d0 .scope module, "regfile" "mips_cpu_regfile" 4 106, 8 1 0, S_000000000107b710; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 5 "readreg1"; - .port_info 2 /INPUT 5 "readreg2"; - .port_info 3 /INPUT 5 "writereg"; - .port_info 4 /INPUT 32 "writedata"; - .port_info 5 /INPUT 1 "regwrite"; - .port_info 6 /INPUT 6 "opcode"; - .port_info 7 /OUTPUT 32 "readdata1"; - .port_info 8 /OUTPUT 32 "readdata2"; - .port_info 9 /OUTPUT 32 "regv0"; -v0000000001079d80_2 .array/port v0000000001079d80, 2; -L_000000000106b7e0 .functor BUFZ 32, v0000000001079d80_2, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; -v000000000107a460_0 .net "clk", 0 0, v00000000010d6760_0; alias, 1 drivers -v0000000001079d80 .array "memory", 0 31, 31 0; -v0000000001078ac0_0 .net "opcode", 5 0, L_00000000010d4fa0; alias, 1 drivers -v0000000001078700_0 .var "readdata1", 31 0; -v0000000001078980_0 .var "readdata2", 31 0; -v0000000001078fc0_0 .net "readreg1", 4 0, L_00000000010d5860; alias, 1 drivers -v0000000001079380_0 .net "readreg2", 4 0, L_00000000010d5900; alias, 1 drivers -v0000000001079ec0_0 .net "regv0", 31 0, L_000000000106b7e0; alias, 1 drivers -v0000000001079f60_0 .net "regwrite", 0 0, v0000000001079100_0; alias, 1 drivers -v0000000001079420_0 .net "writedata", 31 0, v00000000010d33f0_0; 1 drivers -v000000000107a0a0_0 .net "writereg", 4 0, v00000000010d3df0_0; 1 drivers -E_0000000001017780 .event negedge, v0000000001078f20_0; -v0000000001079d80_0 .array/port v0000000001079d80, 0; -v0000000001079d80_1 .array/port v0000000001079d80, 1; -E_0000000001017940/0 .event edge, v0000000001078fc0_0, v0000000001079d80_0, v0000000001079d80_1, v0000000001079d80_2; -v0000000001079d80_3 .array/port v0000000001079d80, 3; -v0000000001079d80_4 .array/port v0000000001079d80, 4; -v0000000001079d80_5 .array/port v0000000001079d80, 5; -v0000000001079d80_6 .array/port v0000000001079d80, 6; -E_0000000001017940/1 .event edge, v0000000001079d80_3, v0000000001079d80_4, v0000000001079d80_5, v0000000001079d80_6; -v0000000001079d80_7 .array/port v0000000001079d80, 7; -v0000000001079d80_8 .array/port v0000000001079d80, 8; -v0000000001079d80_9 .array/port v0000000001079d80, 9; -v0000000001079d80_10 .array/port v0000000001079d80, 10; -E_0000000001017940/2 .event edge, v0000000001079d80_7, v0000000001079d80_8, v0000000001079d80_9, v0000000001079d80_10; -v0000000001079d80_11 .array/port v0000000001079d80, 11; -v0000000001079d80_12 .array/port v0000000001079d80, 12; -v0000000001079d80_13 .array/port v0000000001079d80, 13; -v0000000001079d80_14 .array/port v0000000001079d80, 14; -E_0000000001017940/3 .event edge, v0000000001079d80_11, v0000000001079d80_12, v0000000001079d80_13, v0000000001079d80_14; -v0000000001079d80_15 .array/port v0000000001079d80, 15; -v0000000001079d80_16 .array/port v0000000001079d80, 16; -v0000000001079d80_17 .array/port v0000000001079d80, 17; -v0000000001079d80_18 .array/port v0000000001079d80, 18; -E_0000000001017940/4 .event edge, v0000000001079d80_15, v0000000001079d80_16, v0000000001079d80_17, v0000000001079d80_18; -v0000000001079d80_19 .array/port v0000000001079d80, 19; -v0000000001079d80_20 .array/port v0000000001079d80, 20; -v0000000001079d80_21 .array/port v0000000001079d80, 21; -v0000000001079d80_22 .array/port v0000000001079d80, 22; -E_0000000001017940/5 .event edge, v0000000001079d80_19, v0000000001079d80_20, v0000000001079d80_21, v0000000001079d80_22; -v0000000001079d80_23 .array/port v0000000001079d80, 23; -v0000000001079d80_24 .array/port v0000000001079d80, 24; -v0000000001079d80_25 .array/port v0000000001079d80, 25; -v0000000001079d80_26 .array/port v0000000001079d80, 26; -E_0000000001017940/6 .event edge, v0000000001079d80_23, v0000000001079d80_24, v0000000001079d80_25, v0000000001079d80_26; -v0000000001079d80_27 .array/port v0000000001079d80, 27; -v0000000001079d80_28 .array/port v0000000001079d80, 28; -v0000000001079d80_29 .array/port v0000000001079d80, 29; -v0000000001079d80_30 .array/port v0000000001079d80, 30; -E_0000000001017940/7 .event edge, v0000000001079d80_27, v0000000001079d80_28, v0000000001079d80_29, v0000000001079d80_30; -v0000000001079d80_31 .array/port v0000000001079d80, 31; -E_0000000001017940/8 .event edge, v0000000001079d80_31, v0000000001079380_0; -E_0000000001017940 .event/or E_0000000001017940/0, E_0000000001017940/1, E_0000000001017940/2, E_0000000001017940/3, E_0000000001017940/4, E_0000000001017940/5, E_0000000001017940/6, E_0000000001017940/7, E_0000000001017940/8; -S_0000000000fc9360 .scope begin, "$unm_blk_121" "$unm_blk_121" 8 16, 8 16 0, S_0000000000fc91d0; - .timescale 0 0; -v0000000001079240_0 .var/i "i", 31 0; -S_0000000000fc94f0 .scope module, "ramInst" "mips_cpu_memory" 3 9, 9 1 0, S_000000000107b580; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 32 "data_address"; - .port_info 2 /INPUT 1 "data_write"; - .port_info 3 /INPUT 1 "data_read"; - .port_info 4 /INPUT 32 "data_writedata"; - .port_info 5 /OUTPUT 32 "data_readdata"; - .port_info 6 /INPUT 32 "instr_address"; - .port_info 7 /OUTPUT 32 "instr_readdata"; -P_00000000010179c0 .param/str "RAM_INIT_FILE" 0 9 16, "inputs/sltu.txt"; -L_000000000106b380 .functor AND 1, L_00000000010d4e60, L_00000000010d61c0, C4<1>, C4<1>; -v00000000010d37b0_0 .net *"_ivl_0", 31 0, L_00000000010d4be0; 1 drivers -L_00000000010d7ba8 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v00000000010d49d0_0 .net/2u *"_ivl_12", 31 0, L_00000000010d7ba8; 1 drivers -v00000000010d2db0_0 .net *"_ivl_14", 0 0, L_00000000010d4e60; 1 drivers -L_00000000010d7bf0 .functor BUFT 1, C4<10111111110000000000000001000000>, C4<0>, C4<0>, C4<0>; -v00000000010d3030_0 .net/2u *"_ivl_16", 31 0, L_00000000010d7bf0; 1 drivers -v00000000010d4250_0 .net *"_ivl_18", 0 0, L_00000000010d61c0; 1 drivers -v00000000010d42f0_0 .net *"_ivl_2", 31 0, L_00000000010d4b40; 1 drivers -v00000000010d2d10_0 .net *"_ivl_21", 0 0, L_000000000106b380; 1 drivers -v00000000010d44d0_0 .net *"_ivl_22", 31 0, L_00000000010d5720; 1 drivers -L_00000000010d7c38 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v00000000010d3850_0 .net/2u *"_ivl_24", 31 0, L_00000000010d7c38; 1 drivers -v00000000010d32b0_0 .net *"_ivl_26", 31 0, L_00000000010d4f00; 1 drivers -v00000000010d38f0_0 .net *"_ivl_28", 31 0, L_00000000010d57c0; 1 drivers -v00000000010d3990_0 .net *"_ivl_30", 29 0, L_00000000010d5cc0; 1 drivers -L_00000000010d7c80 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v00000000010d4610_0 .net *"_ivl_32", 1 0, L_00000000010d7c80; 1 drivers -L_00000000010d7cc8 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v00000000010d47f0_0 .net *"_ivl_34", 31 0, L_00000000010d7cc8; 1 drivers -v00000000010d4930_0 .net *"_ivl_4", 29 0, L_00000000010d5400; 1 drivers -L_00000000010d7b18 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v00000000010d4890_0 .net *"_ivl_6", 1 0, L_00000000010d7b18; 1 drivers -L_00000000010d7b60 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v00000000010d2b30_0 .net *"_ivl_8", 31 0, L_00000000010d7b60; 1 drivers -v00000000010d2c70_0 .net "clk", 0 0, v00000000010d6760_0; alias, 1 drivers -v00000000010d3a30_0 .net "data_address", 31 0, v00000000010787a0_0; alias, 1 drivers -v00000000010d3ad0 .array "data_memory", 63 0, 31 0; -v00000000010d2bd0_0 .net "data_read", 0 0, v0000000001078a20_0; alias, 1 drivers -v00000000010d3b70_0 .net "data_readdata", 31 0, L_00000000010d5220; alias, 1 drivers -v00000000010d3d50_0 .net "data_write", 0 0, v0000000001078d40_0; alias, 1 drivers -v00000000010d3c10_0 .net "data_writedata", 31 0, v0000000001078e80_0; alias, 1 drivers -v00000000010d50e0_0 .net "instr_address", 31 0, v00000000010d4430_0; alias, 1 drivers -v00000000010d5a40 .array "instr_memory", 63 0, 31 0; -v00000000010d5ae0_0 .net "instr_readdata", 31 0, L_00000000010d5f40; alias, 1 drivers -L_00000000010d4be0 .array/port v00000000010d3ad0, L_00000000010d4b40; -L_00000000010d5400 .part v00000000010787a0_0, 2, 30; -L_00000000010d4b40 .concat [ 30 2 0 0], L_00000000010d5400, L_00000000010d7b18; -L_00000000010d5220 .functor MUXZ 32, L_00000000010d7b60, L_00000000010d4be0, v0000000001078a20_0, C4<>; -L_00000000010d4e60 .cmp/ge 32, v00000000010d4430_0, L_00000000010d7ba8; -L_00000000010d61c0 .cmp/gt 32, L_00000000010d7bf0, v00000000010d4430_0; -L_00000000010d5720 .array/port v00000000010d5a40, L_00000000010d57c0; -L_00000000010d4f00 .arith/sub 32, v00000000010d4430_0, L_00000000010d7c38; -L_00000000010d5cc0 .part L_00000000010d4f00, 2, 30; -L_00000000010d57c0 .concat [ 30 2 0 0], L_00000000010d5cc0, L_00000000010d7c80; -L_00000000010d5f40 .functor MUXZ 32, L_00000000010d7cc8, L_00000000010d5720, L_000000000106b380, C4<>; -S_0000000000fbe5e0 .scope begin, "$unm_blk_104" "$unm_blk_104" 9 21, 9 21 0, S_0000000000fc94f0; - .timescale 0 0; -v00000000010d3210_0 .var/i "i", 31 0; -S_0000000000f82680 .scope begin, "$ivl_for_loop0" "$ivl_for_loop0" 9 36, 9 36 0, S_0000000000fbe5e0; - .timescale 0 0; -v00000000010d4110_0 .var/i "j", 31 0; - .scope S_0000000000fc94f0; -T_0 ; - %fork t_1, S_0000000000fbe5e0; - %jmp t_0; - .scope S_0000000000fbe5e0; -t_1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000010d3210_0, 0, 32; -T_0.0 ; - %load/vec4 v00000000010d3210_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v00000000010d3210_0; - %store/vec4a v00000000010d3ad0, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000010d3210_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000010d3210_0, 0, 32; - %jmp T_0.0; -T_0.1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000010d3210_0, 0, 32; -T_0.2 ; - %load/vec4 v00000000010d3210_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.3, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v00000000010d3210_0; - %store/vec4a v00000000010d5a40, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000010d3210_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000010d3210_0, 0, 32; - %jmp T_0.2; -T_0.3 ; - %vpi_call/w 9 32 "$display", "RAM: Loading RAM contents from %s", P_00000000010179c0 {0 0 0}; - %vpi_call/w 9 33 "$readmemh", P_00000000010179c0, v00000000010d5a40 {0 0 0}; - %fork t_3, S_0000000000f82680; - %jmp t_2; - .scope S_0000000000f82680; -t_3 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000010d4110_0, 0, 32; -T_0.4 ; - %load/vec4 v00000000010d4110_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.5, 5; - %pushi/vec4 3217031168, 0, 32; - %load/vec4 v00000000010d4110_0; - %muli 4, 0, 32; - %add; - %vpi_call/w 9 37 "$display", "byte +%h: %h", S<0,vec4,u32>, &A {1 0 0}; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000010d4110_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000010d4110_0, 0, 32; - %jmp T_0.4; -T_0.5 ; - %end; - .scope S_0000000000fbe5e0; -t_2 %join; - %end; - .scope S_0000000000fc94f0; -t_0 %join; - %end; - .thread T_0; - .scope S_0000000000fc94f0; -T_1 ; - %wait E_00000000010177c0; - %load/vec4 v00000000010d2bd0_0; - %nor/r; - %load/vec4 v00000000010d3d50_0; - %and; - %flag_set/vec4 8; - %jmp/0xz T_1.0, 8; - %load/vec4 v00000000010d50e0_0; - %load/vec4 v00000000010d3a30_0; - %cmp/ne; - %jmp/0xz T_1.2, 4; - %load/vec4 v00000000010d3c10_0; - %load/vec4 v00000000010d3a30_0; - %ix/load 4, 2, 0; - %flag_set/imm 4, 0; - %shiftr 4; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010d3ad0, 0, 4; -T_1.2 ; -T_1.0 ; - %jmp T_1; - .thread T_1; - .scope S_0000000000fd6150; -T_2 ; - %load/vec4 v0000000001079600_0; - %store/vec4 v0000000001079ce0_0, 0, 32; - %end; - .thread T_2; - .scope S_0000000000fd6150; -T_3 ; - %wait E_00000000010177c0; - %load/vec4 v000000000107a3c0_0; - %flag_set/vec4 8; - %jmp/0xz T_3.0, 8; - %pushi/vec4 1, 0, 1; - %assign/vec4 v0000000001079ba0_0, 0; - %pushi/vec4 3217031168, 0, 32; - %assign/vec4 v0000000001079ce0_0, 0; - %jmp T_3.1; -T_3.0 ; - %load/vec4 v0000000001079ce0_0; - %cmpi/ne 0, 0, 32; - %jmp/0xz T_3.2, 4; - %load/vec4 v0000000001079ba0_0; - %assign/vec4 v0000000001079ba0_0, 0; - %load/vec4 v00000000010791a0_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_3.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_3.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_3.6, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_3.7, 6; - %jmp T_3.8; -T_3.4 ; - %load/vec4 v0000000001079ce0_0; - %assign/vec4 v0000000001079c40_0, 0; - %load/vec4 v0000000001079c40_0; - %addi 4, 0, 32; - %assign/vec4 v0000000001079ce0_0, 0; - %vpi_call/w 7 27 "$display", "New PC from %h to %h", v0000000001079c40_0, v0000000001079ce0_0 {0 0 0}; - %jmp T_3.8; -T_3.5 ; - %load/vec4 v0000000001079600_0; - %assign/vec4 v0000000001079ce0_0, 0; - %jmp T_3.8; -T_3.6 ; - %load/vec4 v0000000001079600_0; - %assign/vec4 v0000000001079ce0_0, 0; - %jmp T_3.8; -T_3.7 ; - %vpi_call/w 7 36 "$display", "JUMP REGISTER" {0 0 0}; - %pushi/vec4 0, 0, 32; - %assign/vec4 v0000000001079ce0_0, 0; - %jmp T_3.8; -T_3.8 ; - %pop/vec4 1; - %jmp T_3.3; -T_3.2 ; - %load/vec4 v0000000001079ce0_0; - %cmpi/e 0, 0, 32; - %jmp/0xz T_3.9, 4; - %pushi/vec4 0, 0, 1; - %assign/vec4 v0000000001079ba0_0, 0; -T_3.9 ; -T_3.3 ; -T_3.1 ; - %jmp T_3; - .thread T_3; - .scope S_0000000000fd5fc0; -T_4 ; - %wait E_0000000001016b00; - %vpi_call/w 6 86 "$display", "Opcode: %h", v0000000001078ca0_0 {0 0 0}; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.0, 4; - %pushi/vec4 0, 0, 2; - %store/vec4 v0000000001079b00_0, 0, 2; - %vpi_call/w 6 89 "$display", "CTRLREGDST: Rt" {0 0 0}; - %jmp T_4.1; -T_4.0 ; - %load/vec4 v0000000001078ca0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001078840_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001078840_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.2, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v0000000001079b00_0, 0, 2; - %vpi_call/w 6 92 "$display", "CTRLREGDST: Rd" {0 0 0}; - %jmp T_4.3; -T_4.2 ; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 3, 0, 6; - %jmp/0xz T_4.4, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v0000000001079b00_0, 0, 2; - %vpi_call/w 6 95 "$display", "CTRLREGDST: Link" {0 0 0}; - %jmp T_4.5; -T_4.4 ; - %pushi/vec4 1, 1, 2; - %store/vec4 v0000000001079b00_0, 0, 2; - %vpi_call/w 6 96 "$display", "xxxxxxxxxxxxxx" {0 0 0}; -T_4.5 ; -T_4.3 ; -T_4.1 ; - %load/vec4 v0000000001079a60_0; - %load/vec4 v0000000001078ca0_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001078ca0_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078ca0_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078ca0_0; - %pushi/vec4 5, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078ca0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001079920_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001079920_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001079920_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001079920_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.6, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v0000000001079880_0, 0, 2; - %jmp T_4.7; -T_4.6 ; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 2, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 3, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.8, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v0000000001079880_0, 0, 2; - %jmp T_4.9; -T_4.8 ; - %load/vec4 v0000000001078840_0; - %cmpi/e 8, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001078840_0; - %cmpi/e 9, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.10, 4; - %pushi/vec4 3, 0, 2; - %store/vec4 v0000000001079880_0, 0, 2; - %jmp T_4.11; -T_4.10 ; - %pushi/vec4 0, 0, 2; - %store/vec4 v0000000001079880_0, 0, 2; -T_4.11 ; -T_4.9 ; -T_4.7 ; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.12, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000010796a0_0, 0, 1; - %pushi/vec4 1, 0, 2; - %store/vec4 v0000000001078de0_0, 0, 2; - %vpi_call/w 6 112 "$display", "Memory read enabled" {0 0 0}; - %jmp T_4.13; -T_4.12 ; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001078840_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001078840_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.14, 9; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000010796a0_0, 0, 1; - %pushi/vec4 0, 0, 2; - %store/vec4 v0000000001078de0_0, 0, 2; - %vpi_call/w 6 116 "$display", "Memory read disabled" {0 0 0}; - %jmp T_4.15; -T_4.14 ; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 3, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001078840_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.16, 9; - %pushi/vec4 2, 0, 2; - %store/vec4 v0000000001078de0_0, 0, 2; - %jmp T_4.17; -T_4.16 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v00000000010796a0_0, 0, 1; -T_4.17 ; -T_4.15 ; -T_4.13 ; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001078840_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.18, 9; - %pushi/vec4 0, 0, 5; - %store/vec4 v0000000001079060_0, 0, 5; - %vpi_call/w 6 124 "$display", "ALU OP = 0 (ADDU/ADDIU)" {0 0 0}; - %jmp T_4.19; -T_4.18 ; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 12, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001078840_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.20, 9; - %pushi/vec4 4, 0, 5; - %store/vec4 v0000000001079060_0, 0, 5; - %jmp T_4.21; -T_4.20 ; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 4, 0, 6; - %jmp/0xz T_4.22, 4; - %pushi/vec4 13, 0, 5; - %store/vec4 v0000000001079060_0, 0, 5; - %jmp T_4.23; -T_4.22 ; - %load/vec4 v0000000001078ca0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001079920_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001079920_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.24, 8; - %pushi/vec4 17, 0, 5; - %store/vec4 v0000000001079060_0, 0, 5; - %jmp T_4.25; -T_4.24 ; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 7, 0, 6; - %jmp/0xz T_4.26, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v0000000001079060_0, 0, 5; - %jmp T_4.27; -T_4.26 ; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 6, 0, 6; - %jmp/0xz T_4.28, 4; - %pushi/vec4 15, 0, 5; - %store/vec4 v0000000001079060_0, 0, 5; - %jmp T_4.29; -T_4.28 ; - %load/vec4 v0000000001078ca0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001079920_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001079920_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.30, 8; - %pushi/vec4 14, 0, 5; - %store/vec4 v0000000001079060_0, 0, 5; - %jmp T_4.31; -T_4.30 ; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 5, 0, 6; - %jmp/0xz T_4.32, 4; - %pushi/vec4 18, 0, 5; - %store/vec4 v0000000001079060_0, 0, 5; - %jmp T_4.33; -T_4.32 ; - %load/vec4 v0000000001078ca0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001078840_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.34, 8; - %pushi/vec4 3, 0, 5; - %store/vec4 v0000000001079060_0, 0, 5; - %jmp T_4.35; -T_4.34 ; - %load/vec4 v0000000001078ca0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001078840_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.36, 8; - %pushi/vec4 23, 0, 5; - %store/vec4 v0000000001079060_0, 0, 5; - %jmp T_4.37; -T_4.36 ; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.38, 4; - %pushi/vec4 0, 0, 5; - %store/vec4 v0000000001079060_0, 0, 5; - %jmp T_4.39; -T_4.38 ; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.40, 4; - %pushi/vec4 7, 0, 5; - %store/vec4 v0000000001079060_0, 0, 5; - %jmp T_4.41; -T_4.40 ; - %load/vec4 v0000000001078ca0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001078840_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001078840_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.42, 8; - %pushi/vec4 19, 0, 5; - %store/vec4 v0000000001079060_0, 0, 5; - %jmp T_4.43; -T_4.42 ; - %load/vec4 v0000000001078ca0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001078840_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.44, 8; - %pushi/vec4 2, 0, 5; - %store/vec4 v0000000001079060_0, 0, 5; - %jmp T_4.45; -T_4.44 ; - %load/vec4 v0000000001078ca0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001078840_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.46, 8; - %pushi/vec4 22, 0, 5; - %store/vec4 v0000000001079060_0, 0, 5; - %jmp T_4.47; -T_4.46 ; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 13, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001078840_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.48, 9; - %pushi/vec4 5, 0, 5; - %store/vec4 v0000000001079060_0, 0, 5; - %jmp T_4.49; -T_4.48 ; - %load/vec4 v0000000001078ca0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001078840_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.50, 8; - %pushi/vec4 7, 0, 5; - %store/vec4 v0000000001079060_0, 0, 5; - %jmp T_4.51; -T_4.50 ; - %load/vec4 v0000000001078ca0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001078840_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.52, 8; - %pushi/vec4 8, 0, 5; - %store/vec4 v0000000001079060_0, 0, 5; - %jmp T_4.53; -T_4.52 ; - %load/vec4 v0000000001078ca0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001078840_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.54, 8; - %pushi/vec4 11, 0, 5; - %store/vec4 v0000000001079060_0, 0, 5; - %jmp T_4.55; -T_4.54 ; - %load/vec4 v0000000001078ca0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001078840_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.56, 8; - %pushi/vec4 12, 0, 5; - %store/vec4 v0000000001079060_0, 0, 5; - %jmp T_4.57; -T_4.56 ; - %load/vec4 v0000000001078ca0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001078840_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.58, 8; - %pushi/vec4 9, 0, 5; - %store/vec4 v0000000001079060_0, 0, 5; - %jmp T_4.59; -T_4.58 ; - %load/vec4 v0000000001078ca0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001078840_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.60, 8; - %pushi/vec4 10, 0, 5; - %store/vec4 v0000000001079060_0, 0, 5; - %jmp T_4.61; -T_4.60 ; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 10, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001078840_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.62, 9; - %pushi/vec4 20, 0, 5; - %store/vec4 v0000000001079060_0, 0, 5; - %jmp T_4.63; -T_4.62 ; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 11, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001078840_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.64, 9; - %pushi/vec4 21, 0, 5; - %store/vec4 v0000000001079060_0, 0, 5; - %jmp T_4.65; -T_4.64 ; - %load/vec4 v0000000001078ca0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001078840_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.66, 8; - %pushi/vec4 1, 0, 5; - %store/vec4 v0000000001079060_0, 0, 5; - %jmp T_4.67; -T_4.66 ; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 14, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001078840_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.68, 9; - %pushi/vec4 6, 0, 5; - %store/vec4 v0000000001079060_0, 0, 5; - %vpi_call/w 6 175 "$display", "ALU Op = 6 (XOR)" {0 0 0}; - %jmp T_4.69; -T_4.68 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v0000000001079060_0, 0, 5; -T_4.69 ; -T_4.67 ; -T_4.65 ; -T_4.63 ; -T_4.61 ; -T_4.59 ; -T_4.57 ; -T_4.55 ; -T_4.53 ; -T_4.51 ; -T_4.49 ; -T_4.47 ; -T_4.45 ; -T_4.43 ; -T_4.41 ; -T_4.39 ; -T_4.37 ; -T_4.35 ; -T_4.33 ; -T_4.31 ; -T_4.29 ; -T_4.27 ; -T_4.25 ; -T_4.23 ; -T_4.21 ; -T_4.19 ; - %load/vec4 v0000000001078ca0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001078840_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001078840_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.70, 8; - %load/vec4 v0000000001079740_0; - %parti/s 5, 6, 4; - %store/vec4 v00000000010792e0_0, 0, 5; - %jmp T_4.71; -T_4.70 ; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.72, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v00000000010792e0_0, 0, 5; - %jmp T_4.73; -T_4.72 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v00000000010792e0_0, 0, 5; -T_4.73 ; -T_4.71 ; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 40, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.74, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000107a000_0, 0, 1; - %jmp T_4.75; -T_4.74 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000107a000_0, 0, 1; -T_4.75 ; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.76, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000107a280_0, 0, 1; - %jmp T_4.77; -T_4.76 ; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 4, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 7, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 6, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 5, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001078840_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001078840_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %load/vec4 v0000000001078ca0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001079920_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001079920_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001079920_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001079920_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %flag_or 8, 9; - %jmp/0xz T_4.78, 8; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000107a280_0, 0, 1; - %jmp T_4.79; -T_4.78 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v000000000107a280_0, 0, 1; -T_4.79 ; -T_4.77 ; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001078ca0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001078840_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001078840_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001078840_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.80, 9; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001079100_0, 0, 1; - %jmp T_4.81; -T_4.80 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001079100_0, 0, 1; -T_4.81 ; - %jmp T_4; - .thread T_4, $push; - .scope S_0000000000fc91d0; -T_5 ; - %fork t_5, S_0000000000fc9360; - %jmp t_4; - .scope S_0000000000fc9360; -t_5 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v0000000001079240_0, 0, 32; -T_5.0 ; - %load/vec4 v0000000001079240_0; - %cmpi/s 32, 0, 32; - %jmp/0xz T_5.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v0000000001079240_0; - %store/vec4a v0000000001079d80, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0000000001079240_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v0000000001079240_0, 0, 32; - %jmp T_5.0; -T_5.1 ; - %end; - .scope S_0000000000fc91d0; -t_4 %join; - %end; - .thread T_5; - .scope S_0000000000fc91d0; -T_6 ; -Ewait_0 .event/or E_0000000001017940, E_0x0; - %wait Ewait_0; - %load/vec4 v0000000001078fc0_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v0000000001079d80, 4; - %store/vec4 v0000000001078700_0, 0, 32; - %load/vec4 v0000000001079380_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v0000000001079d80, 4; - %store/vec4 v0000000001078980_0, 0, 32; - %jmp T_6; - .thread T_6, $push; - .scope S_0000000000fc91d0; -T_7 ; - %wait E_0000000001017780; - %load/vec4 v000000000107a0a0_0; - %cmpi/e 0, 0, 5; - %jmp/0xz T_7.0, 4; - %jmp T_7.1; -T_7.0 ; - %load/vec4 v0000000001079f60_0; - %flag_set/vec4 8; - %jmp/0xz T_7.2, 8; - %load/vec4 v0000000001078ac0_0; - %dup/vec4; - %pushi/vec4 32, 0, 6; - %cmp/u; - %jmp/1 T_7.4, 6; - %dup/vec4; - %pushi/vec4 36, 0, 6; - %cmp/u; - %jmp/1 T_7.5, 6; - %dup/vec4; - %pushi/vec4 33, 0, 6; - %cmp/u; - %jmp/1 T_7.6, 6; - %dup/vec4; - %pushi/vec4 37, 0, 6; - %cmp/u; - %jmp/1 T_7.7, 6; - %dup/vec4; - %pushi/vec4 34, 0, 6; - %cmp/u; - %jmp/1 T_7.8, 6; - %dup/vec4; - %pushi/vec4 38, 0, 6; - %cmp/u; - %jmp/1 T_7.9, 6; - %load/vec4 v0000000001079420_0; - %load/vec4 v000000000107a0a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001079d80, 0, 4; - %jmp T_7.11; -T_7.4 ; - %load/vec4 v0000000001078700_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.12, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.13, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.14, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.15, 6; - %jmp T_7.16; -T_7.12 ; - %load/vec4 v0000000001079420_0; - %parti/s 1, 7, 4; - %replicate 24; - %load/vec4 v0000000001079420_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000107a0a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001079d80, 0, 4; - %jmp T_7.16; -T_7.13 ; - %load/vec4 v0000000001079420_0; - %parti/s 1, 15, 5; - %replicate 24; - %load/vec4 v0000000001079420_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000107a0a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001079d80, 0, 4; - %jmp T_7.16; -T_7.14 ; - %load/vec4 v0000000001079420_0; - %parti/s 1, 23, 6; - %replicate 24; - %load/vec4 v0000000001079420_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000107a0a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001079d80, 0, 4; - %jmp T_7.16; -T_7.15 ; - %load/vec4 v0000000001079420_0; - %parti/s 1, 31, 6; - %replicate 24; - %load/vec4 v0000000001079420_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000107a0a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001079d80, 0, 4; - %jmp T_7.16; -T_7.16 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.5 ; - %load/vec4 v0000000001078700_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.17, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.18, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.19, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.20, 6; - %jmp T_7.21; -T_7.17 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v0000000001079420_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000107a0a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001079d80, 0, 4; - %jmp T_7.21; -T_7.18 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v0000000001079420_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000107a0a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001079d80, 0, 4; - %jmp T_7.21; -T_7.19 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v0000000001079420_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000107a0a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001079d80, 0, 4; - %jmp T_7.21; -T_7.20 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v0000000001079420_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000107a0a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001079d80, 0, 4; - %jmp T_7.21; -T_7.21 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.6 ; - %load/vec4 v0000000001078700_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.22, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.23, 6; - %jmp T_7.24; -T_7.22 ; - %load/vec4 v0000000001079420_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v0000000001079420_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000107a0a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001079d80, 0, 4; - %jmp T_7.24; -T_7.23 ; - %load/vec4 v0000000001079420_0; - %parti/s 1, 31, 6; - %replicate 16; - %load/vec4 v0000000001079420_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000107a0a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001079d80, 0, 4; - %jmp T_7.24; -T_7.24 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.7 ; - %load/vec4 v0000000001078700_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.25, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.26, 6; - %jmp T_7.27; -T_7.25 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v0000000001079420_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000107a0a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001079d80, 0, 4; - %jmp T_7.27; -T_7.26 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v0000000001079420_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v000000000107a0a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001079d80, 0, 4; - %jmp T_7.27; -T_7.27 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.8 ; - %load/vec4 v0000000001078700_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.28, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.29, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.30, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.31, 6; - %jmp T_7.32; -T_7.28 ; - %load/vec4 v0000000001079420_0; - %parti/s 8, 0, 2; - %load/vec4 v000000000107a0a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 24, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v0000000001079d80, 4, 5; - %jmp T_7.32; -T_7.29 ; - %load/vec4 v0000000001079420_0; - %parti/s 16, 0, 2; - %load/vec4 v000000000107a0a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 16, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v0000000001079d80, 4, 5; - %jmp T_7.32; -T_7.30 ; - %load/vec4 v0000000001079420_0; - %parti/s 24, 0, 2; - %load/vec4 v000000000107a0a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 8, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v0000000001079d80, 4, 5; - %jmp T_7.32; -T_7.31 ; - %load/vec4 v0000000001079420_0; - %load/vec4 v000000000107a0a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001079d80, 0, 4; - %jmp T_7.32; -T_7.32 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.9 ; - %load/vec4 v0000000001078700_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.33, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.34, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.35, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.36, 6; - %jmp T_7.37; -T_7.33 ; - %load/vec4 v0000000001079420_0; - %load/vec4 v000000000107a0a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001079d80, 0, 4; - %jmp T_7.37; -T_7.34 ; - %load/vec4 v0000000001079420_0; - %parti/s 24, 8, 5; - %load/vec4 v000000000107a0a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001079d80, 0, 4; - %jmp T_7.37; -T_7.35 ; - %load/vec4 v0000000001079420_0; - %parti/s 16, 16, 6; - %load/vec4 v000000000107a0a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001079d80, 0, 4; - %jmp T_7.37; -T_7.36 ; - %load/vec4 v0000000001079420_0; - %parti/s 8, 24, 6; - %load/vec4 v000000000107a0a0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001079d80, 0, 4; - %jmp T_7.37; -T_7.37 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.11 ; - %pop/vec4 1; -T_7.2 ; -T_7.1 ; - %jmp T_7; - .thread T_7; - .scope S_0000000000fd5e30; -T_8 ; -Ewait_1 .event/or E_0000000001017c80, E_0x0; - %wait Ewait_1; - %load/vec4 v00000000010799c0_0; - %dup/vec4; - %pushi/vec4 0, 0, 5; - %cmp/u; - %jmp/1 T_8.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 5; - %cmp/u; - %jmp/1 T_8.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 5; - %cmp/u; - %jmp/1 T_8.2, 6; - %dup/vec4; - %pushi/vec4 3, 0, 5; - %cmp/u; - %jmp/1 T_8.3, 6; - %dup/vec4; - %pushi/vec4 4, 0, 5; - %cmp/u; - %jmp/1 T_8.4, 6; - %dup/vec4; - %pushi/vec4 5, 0, 5; - %cmp/u; - %jmp/1 T_8.5, 6; - %dup/vec4; - %pushi/vec4 6, 0, 5; - %cmp/u; - %jmp/1 T_8.6, 6; - %dup/vec4; - %pushi/vec4 7, 0, 5; - %cmp/u; - %jmp/1 T_8.7, 6; - %dup/vec4; - %pushi/vec4 8, 0, 5; - %cmp/u; - %jmp/1 T_8.8, 6; - %dup/vec4; - %pushi/vec4 9, 0, 5; - %cmp/u; - %jmp/1 T_8.9, 6; - %dup/vec4; - %pushi/vec4 10, 0, 5; - %cmp/u; - %jmp/1 T_8.10, 6; - %dup/vec4; - %pushi/vec4 11, 0, 5; - %cmp/u; - %jmp/1 T_8.11, 6; - %dup/vec4; - %pushi/vec4 12, 0, 5; - %cmp/u; - %jmp/1 T_8.12, 6; - %dup/vec4; - %pushi/vec4 13, 0, 5; - %cmp/u; - %jmp/1 T_8.13, 6; - %dup/vec4; - %pushi/vec4 14, 0, 5; - %cmp/u; - %jmp/1 T_8.14, 6; - %dup/vec4; - %pushi/vec4 15, 0, 5; - %cmp/u; - %jmp/1 T_8.15, 6; - %dup/vec4; - %pushi/vec4 16, 0, 5; - %cmp/u; - %jmp/1 T_8.16, 6; - %dup/vec4; - %pushi/vec4 17, 0, 5; - %cmp/u; - %jmp/1 T_8.17, 6; - %dup/vec4; - %pushi/vec4 18, 0, 5; - %cmp/u; - %jmp/1 T_8.18, 6; - %dup/vec4; - %pushi/vec4 19, 0, 5; - %cmp/u; - %jmp/1 T_8.19, 6; - %dup/vec4; - %pushi/vec4 20, 0, 5; - %cmp/u; - %jmp/1 T_8.20, 6; - %dup/vec4; - %pushi/vec4 21, 0, 5; - %cmp/u; - %jmp/1 T_8.21, 6; - %dup/vec4; - %pushi/vec4 22, 0, 5; - %cmp/u; - %jmp/1 T_8.22, 6; - %dup/vec4; - %pushi/vec4 23, 0, 5; - %cmp/u; - %jmp/1 T_8.23, 6; - %jmp T_8.24; -T_8.0 ; - %load/vec4 v00000000010797e0_0; - %load/vec4 v00000000010785c0_0; - %add; - %store/vec4 v00000000010788e0_0, 0, 32; - %jmp T_8.24; -T_8.1 ; - %load/vec4 v00000000010797e0_0; - %load/vec4 v00000000010785c0_0; - %sub; - %store/vec4 v00000000010788e0_0, 0, 32; - %jmp T_8.24; -T_8.2 ; - %load/vec4 v00000000010797e0_0; - %load/vec4 v00000000010785c0_0; - %mul; - %store/vec4 v00000000010788e0_0, 0, 32; - %jmp T_8.24; -T_8.3 ; - %load/vec4 v00000000010797e0_0; - %load/vec4 v00000000010785c0_0; - %div/s; - %store/vec4 v00000000010788e0_0, 0, 32; - %jmp T_8.24; -T_8.4 ; - %load/vec4 v00000000010797e0_0; - %load/vec4 v00000000010785c0_0; - %and; - %store/vec4 v00000000010788e0_0, 0, 32; - %jmp T_8.24; -T_8.5 ; - %load/vec4 v00000000010797e0_0; - %load/vec4 v00000000010785c0_0; - %or; - %store/vec4 v00000000010788e0_0, 0, 32; - %jmp T_8.24; -T_8.6 ; - %load/vec4 v00000000010797e0_0; - %load/vec4 v00000000010785c0_0; - %xor; - %store/vec4 v00000000010788e0_0, 0, 32; - %jmp T_8.24; -T_8.7 ; - %load/vec4 v00000000010785c0_0; - %ix/getv 4, v000000000107a1e0_0; - %shiftl 4; - %store/vec4 v00000000010788e0_0, 0, 32; - %jmp T_8.24; -T_8.8 ; - %load/vec4 v00000000010785c0_0; - %ix/getv 4, v00000000010797e0_0; - %shiftl 4; - %store/vec4 v00000000010788e0_0, 0, 32; - %jmp T_8.24; -T_8.9 ; - %load/vec4 v00000000010785c0_0; - %ix/getv 4, v000000000107a1e0_0; - %shiftr 4; - %store/vec4 v00000000010788e0_0, 0, 32; - %jmp T_8.24; -T_8.10 ; - %load/vec4 v00000000010785c0_0; - %ix/getv 4, v00000000010797e0_0; - %shiftr 4; - %store/vec4 v00000000010788e0_0, 0, 32; - %jmp T_8.24; -T_8.11 ; - %load/vec4 v00000000010785c0_0; - %ix/getv 4, v000000000107a1e0_0; - %shiftr 4; - %store/vec4 v00000000010788e0_0, 0, 32; - %jmp T_8.24; -T_8.12 ; - %load/vec4 v00000000010785c0_0; - %ix/getv 4, v00000000010797e0_0; - %shiftr 4; - %store/vec4 v00000000010788e0_0, 0, 32; - %jmp T_8.24; -T_8.13 ; - %load/vec4 v00000000010797e0_0; - %load/vec4 v00000000010785c0_0; - %cmp/e; - %jmp/0xz T_8.25, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001079e20_0, 0, 1; - %jmp T_8.26; -T_8.25 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001079e20_0, 0, 1; -T_8.26 ; - %jmp T_8.24; -T_8.14 ; - %load/vec4 v00000000010797e0_0; - %load/vec4 v00000000010785c0_0; - %cmp/s; - %jmp/0xz T_8.27, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001079e20_0, 0, 1; - %jmp T_8.28; -T_8.27 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001079e20_0, 0, 1; -T_8.28 ; - %jmp T_8.24; -T_8.15 ; - %load/vec4 v00000000010797e0_0; - %load/vec4 v00000000010785c0_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.29, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001079e20_0, 0, 1; - %jmp T_8.30; -T_8.29 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001079e20_0, 0, 1; -T_8.30 ; - %jmp T_8.24; -T_8.16 ; - %load/vec4 v00000000010785c0_0; - %load/vec4 v00000000010797e0_0; - %cmp/s; - %jmp/0xz T_8.31, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001079e20_0, 0, 1; - %jmp T_8.32; -T_8.31 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001079e20_0, 0, 1; -T_8.32 ; - %jmp T_8.24; -T_8.17 ; - %load/vec4 v00000000010785c0_0; - %load/vec4 v00000000010797e0_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.33, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001079e20_0, 0, 1; - %jmp T_8.34; -T_8.33 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001079e20_0, 0, 1; -T_8.34 ; - %jmp T_8.24; -T_8.18 ; - %load/vec4 v00000000010797e0_0; - %load/vec4 v00000000010785c0_0; - %cmp/ne; - %jmp/0xz T_8.35, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001079e20_0, 0, 1; - %jmp T_8.36; -T_8.35 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001079e20_0, 0, 1; -T_8.36 ; - %jmp T_8.24; -T_8.19 ; - %load/vec4 v00000000010797e0_0; - %store/vec4 v00000000010788e0_0, 0, 32; - %jmp T_8.24; -T_8.20 ; - %load/vec4 v00000000010797e0_0; - %load/vec4 v00000000010785c0_0; - %cmp/s; - %jmp/0xz T_8.37, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v00000000010788e0_0, 0, 32; -T_8.37 ; - %jmp T_8.24; -T_8.21 ; - %load/vec4 v00000000010797e0_0; - %load/vec4 v00000000010785c0_0; - %cmp/u; - %jmp/0xz T_8.39, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v00000000010788e0_0, 0, 32; -T_8.39 ; - %jmp T_8.24; -T_8.22 ; - %load/vec4 v00000000010797e0_0; - %load/vec4 v00000000010785c0_0; - %mul; - %store/vec4 v00000000010788e0_0, 0, 32; - %jmp T_8.24; -T_8.23 ; - %load/vec4 v00000000010797e0_0; - %load/vec4 v00000000010785c0_0; - %div; - %store/vec4 v00000000010788e0_0, 0, 32; - %jmp T_8.24; -T_8.24 ; - %pop/vec4 1; - %jmp T_8; - .thread T_8, $push; - .scope S_000000000107b710; -T_9 ; - %pushi/vec4 3217031168, 0, 32; - %store/vec4 v00000000010d3350_0, 0, 32; - %end; - .thread T_9, $init; - .scope S_000000000107b710; -T_10 ; -Ewait_2 .event/or E_00000000010155c0, E_0x0; - %wait Ewait_2; - %load/vec4 v00000000010d3530_0; - %store/vec4 v00000000010d4430_0, 0, 32; - %load/vec4 v00000000010d35d0_0; - %store/vec4 v00000000010787a0_0, 0, 32; - %load/vec4 v00000000010d3cb0_0; - %store/vec4 v0000000001078d40_0, 0, 1; - %load/vec4 v00000000010d3670_0; - %store/vec4 v0000000001078a20_0, 0, 1; - %load/vec4 v00000000010d4750_0; - %store/vec4 v0000000001078e80_0, 0, 32; - %jmp T_10; - .thread T_10, $push; - .scope S_000000000107b710; -T_11 ; -Ewait_3 .event/or E_00000000010154c0, E_0x0; - %wait Ewait_3; - %load/vec4 v00000000010d41b0_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.2, 6; - %jmp T_11.3; -T_11.0 ; - %load/vec4 v00000000010d3f30_0; - %parti/s 5, 16, 6; - %store/vec4 v00000000010d3df0_0, 0, 5; - %jmp T_11.3; -T_11.1 ; - %load/vec4 v00000000010d3f30_0; - %parti/s 5, 11, 5; - %store/vec4 v00000000010d3df0_0, 0, 5; - %jmp T_11.3; -T_11.2 ; - %pushi/vec4 31, 0, 5; - %store/vec4 v00000000010d3df0_0, 0, 5; - %jmp T_11.3; -T_11.3 ; - %pop/vec4 1; - %load/vec4 v00000000010d3e90_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.6, 6; - %jmp T_11.7; -T_11.4 ; - %load/vec4 v00000000010d35d0_0; - %store/vec4 v00000000010d33f0_0, 0, 32; - %jmp T_11.7; -T_11.5 ; - %load/vec4 v0000000001078c00_0; - %store/vec4 v00000000010d33f0_0, 0, 32; - %jmp T_11.7; -T_11.6 ; - %load/vec4 v00000000010d3350_0; - %addi 8, 0, 32; - %store/vec4 v00000000010d33f0_0, 0, 32; - %jmp T_11.7; -T_11.7 ; - %pop/vec4 1; - %load/vec4 v00000000010d46b0_0; - %dup/vec4; - %pushi/vec4 1, 0, 1; - %cmp/u; - %jmp/1 T_11.8, 6; - %dup/vec4; - %pushi/vec4 0, 0, 1; - %cmp/u; - %jmp/1 T_11.9, 6; - %jmp T_11.10; -T_11.8 ; - %load/vec4 v00000000010d3f30_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v00000000010d3f30_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %store/vec4 v0000000000fa9b90_0, 0, 32; - %jmp T_11.10; -T_11.9 ; - %load/vec4 v00000000010d4750_0; - %store/vec4 v0000000000fa9b90_0, 0, 32; - %jmp T_11.10; -T_11.10 ; - %pop/vec4 1; - %jmp T_11; - .thread T_11, $push; - .scope S_000000000107b580; -T_12 ; - %vpi_call/w 3 36 "$dumpfile", "mips_cpu_harvard.vcd" {0 0 0}; - %vpi_call/w 3 37 "$dumpvars", 32'sb00000000000000000000000000000000, S_000000000107b580 {0 0 0}; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000010d6760_0, 0, 1; - %pushi/vec4 100, 0, 32; -T_12.0 %dup/vec4; - %pushi/vec4 0, 0, 32; - %cmp/s; - %jmp/1xz T_12.1, 5; - %jmp/1 T_12.1, 4; - %pushi/vec4 1, 0, 32; - %sub; - %delay 10, 0; - %load/vec4 v00000000010d6760_0; - %nor/r; - %store/vec4 v00000000010d6760_0, 0, 1; - %delay 10, 0; - %load/vec4 v00000000010d6760_0; - %nor/r; - %store/vec4 v00000000010d6760_0, 0, 1; - %jmp T_12.0; -T_12.1 ; - %pop/vec4 1; - %vpi_call/w 3 47 "$fatal", 32'sb00000000000000000000000000000010, "Simulation did not finish within %d cycles.", P_0000000001003688 {0 0 0}; - %end; - .thread T_12; - .scope S_000000000107b580; -T_13 ; - %vpi_call/w 3 51 "$display", "Initial Reset 0" {0 0 0}; - %pushi/vec4 0, 0, 1; - %assign/vec4 v00000000010d5180_0, 0; - %vpi_call/w 3 55 "$display", "Initial Reset 1" {0 0 0}; - %wait E_00000000010177c0; - %pushi/vec4 1, 0, 1; - %assign/vec4 v00000000010d5180_0, 0; - %vpi_call/w 3 59 "$display", "Initial Reset 0: Start Program" {0 0 0}; - %wait E_00000000010177c0; - %pushi/vec4 0, 0, 1; - %assign/vec4 v00000000010d5180_0, 0; - %wait E_00000000010177c0; - %load/vec4 v00000000010d68a0_0; - %pad/u 32; - %cmpi/e 1, 0, 32; - %jmp/0xz T_13.0, 4; - %jmp T_13.1; -T_13.0 ; - %vpi_call/w 3 65 "$display", "TB: CPU did not set active=1 after reset." {0 0 0}; -T_13.1 ; -T_13.2 ; - %load/vec4 v00000000010d68a0_0; - %flag_set/vec4 8; - %jmp/0xz T_13.3, 8; - %wait E_00000000010177c0; - %vpi_call/w 3 71 "$display", "Reg File Write data: %d", v00000000010d33f0_0 {0 0 0}; - %jmp T_13.2; -T_13.3 ; - %wait E_00000000010177c0; - %vpi_call/w 3 74 "$display", "TB: CPU Halt; active=0" {0 0 0}; - %vpi_call/w 3 75 "$display", "Output:" {0 0 0}; - %vpi_call/w 3 76 "$display", "%d", v00000000010d4dc0_0 {0 0 0}; - %vpi_call/w 3 77 "$finish" {0 0 0}; - %end; - .thread T_13; -# The file index is used to find the file name in the following table. -:file_names 10; - "N/A"; - ""; - "-"; - "testbench/mips_cpu_harvard_tb.v"; - "rtl/mips_cpu_harvard.v"; - "rtl/mips_cpu_alu.v"; - "rtl/mips_cpu_control.v"; - "rtl/mips_cpu_pc.v"; - "rtl/mips_cpu_regfile.v"; - "rtl/mips_cpu_memory.v"; diff --git a/exec/mips_cpu_harvard_tb_sra b/exec/mips_cpu_harvard_tb_sra deleted file mode 100644 index 4fbe253..0000000 --- a/exec/mips_cpu_harvard_tb_sra +++ /dev/null @@ -1,2738 +0,0 @@ -#! /usr/local/iverilog/bin/vvp -:ivl_version "11.0 (devel)"; -:ivl_delay_selection "TYPICAL"; -:vpi_time_precision + 0; -:vpi_module "C:\iverilog\lib\ivl\system.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_sys.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_textio.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2005_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\va_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2009.vpi"; -S_00000000011bc010 .scope package, "$unit" "$unit" 2 1; - .timescale 0 0; -S_00000000011ba580 .scope module, "mips_cpu_harvard_tb" "mips_cpu_harvard_tb" 3 1; - .timescale 0 0; -P_00000000011839f0 .param/str "RAM_INIT_FILE" 0 3 3, "inputs/sra.txt"; -P_0000000001183a28 .param/l "TIMEOUT_CYCLES" 0 3 4, +C4<00000000000000000000000001100100>; -v0000000001215f40_0 .net "active", 0 0, v00000000011b96a0_0; 1 drivers -v0000000001215040_0 .var "clk", 0 0; -v0000000001215360_0 .var "clk_enable", 0 0; -v0000000001215fe0_0 .net "data_address", 31 0, v00000000011b8c00_0; 1 drivers -v0000000001215860_0 .net "data_read", 0 0, v00000000011b87a0_0; 1 drivers -v0000000001216080_0 .net "data_readdata", 31 0, L_0000000001216620; 1 drivers -v00000000012164e0_0 .net "data_write", 0 0, v00000000011b8a20_0; 1 drivers -v0000000001215400_0 .net "data_writedata", 31 0, v00000000011b8ca0_0; 1 drivers -v0000000001214dc0_0 .net "instr_address", 31 0, v00000000012138f0_0; 1 drivers -v00000000012161c0_0 .net "instr_readdata", 31 0, L_00000000012155e0; 1 drivers -v00000000012154a0_0 .net "register_v0", 31 0, L_00000000011aad60; 1 drivers -v0000000001215900_0 .var "reset", 0 0; -S_00000000011bb580 .scope module, "cpuInst" "mips_cpu_harvard" 3 19, 4 1 0, S_00000000011ba580; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "reset"; - .port_info 2 /OUTPUT 1 "active"; - .port_info 3 /OUTPUT 32 "register_v0"; - .port_info 4 /INPUT 1 "clk_enable"; - .port_info 5 /OUTPUT 32 "instr_address"; - .port_info 6 /INPUT 32 "instr_readdata"; - .port_info 7 /OUTPUT 32 "data_address"; - .port_info 8 /OUTPUT 1 "data_write"; - .port_info 9 /OUTPUT 1 "data_read"; - .port_info 10 /OUTPUT 32 "data_writedata"; - .port_info 11 /INPUT 32 "data_readdata"; -v00000000011ba320_0 .net "active", 0 0, v00000000011b96a0_0; alias, 1 drivers -v00000000011ba3c0_0 .net "clk", 0 0, v0000000001215040_0; 1 drivers -v00000000011ba460_0 .net "clk_enable", 0 0, v0000000001215360_0; 1 drivers -v00000000011b8c00_0 .var "data_address", 31 0; -v00000000011b87a0_0 .var "data_read", 0 0; -v00000000011b85c0_0 .net "data_readdata", 31 0, L_0000000001216620; alias, 1 drivers -v00000000011b8a20_0 .var "data_write", 0 0; -v00000000011b8ca0_0 .var "data_writedata", 31 0; -v00000000011292f0_0 .var "in_B", 31 0; -v00000000012133f0_0 .net "in_opcode", 5 0, L_0000000001216300; 1 drivers -v0000000001213490_0 .net "in_pc_in", 31 0, v00000000011b8b60_0; 1 drivers -v0000000001213e90_0 .net "in_readreg1", 4 0, L_0000000001215680; 1 drivers -v00000000012135d0_0 .net "in_readreg2", 4 0, L_00000000012150e0; 1 drivers -v0000000001213170_0 .var "in_writedata", 31 0; -v0000000001213fd0_0 .var "in_writereg", 4 0; -v00000000012138f0_0 .var "instr_address", 31 0; -v0000000001213df0_0 .net "instr_readdata", 31 0, L_00000000012155e0; alias, 1 drivers -v0000000001213f30_0 .net "out_ALUCond", 0 0, v00000000011ba0a0_0; 1 drivers -v00000000012132b0_0 .net "out_ALUOp", 4 0, v00000000011b99c0_0; 1 drivers -v0000000001214070_0 .net "out_ALURes", 31 0, v00000000011b9420_0; 1 drivers -v0000000001213850_0 .net "out_ALUSrc", 0 0, v00000000011b9920_0; 1 drivers -v0000000001213030_0 .net "out_MemRead", 0 0, v00000000011b8840_0; 1 drivers -v0000000001212db0_0 .net "out_MemWrite", 0 0, v00000000011b9f60_0; 1 drivers -v00000000012144d0_0 .net "out_MemtoReg", 1 0, v00000000011b88e0_0; 1 drivers -v0000000001212e50_0 .net "out_PC", 1 0, v00000000011b9240_0; 1 drivers -v00000000012137b0_0 .net "out_RegDst", 1 0, v00000000011b92e0_0; 1 drivers -v0000000001213990_0 .net "out_RegWrite", 0 0, v00000000011b8de0_0; 1 drivers -v0000000001213a30_0 .var "out_pc_out", 31 0; -v0000000001214250_0 .net "out_readdata1", 31 0, v00000000011b8980_0; 1 drivers -v0000000001214110_0 .net "out_readdata2", 31 0, v00000000011b9ce0_0; 1 drivers -v00000000012130d0_0 .net "out_shamt", 4 0, v00000000011b9380_0; 1 drivers -v00000000012141b0_0 .net "register_v0", 31 0, L_00000000011aad60; alias, 1 drivers -v0000000001212b30_0 .net "reset", 0 0, v0000000001215900_0; 1 drivers -E_0000000001196540/0 .event edge, v00000000011b92e0_0, v00000000011b8660_0, v00000000011b8660_0, v00000000011b88e0_0; -E_0000000001196540/1 .event edge, v00000000011b9420_0, v00000000011b85c0_0, v00000000011b9100_0, v00000000011b9920_0; -E_0000000001196540/2 .event edge, v00000000011b8660_0, v00000000011b8660_0, v00000000011b9ce0_0; -E_0000000001196540 .event/or E_0000000001196540/0, E_0000000001196540/1, E_0000000001196540/2; -E_0000000001196580/0 .event edge, v00000000011b8b60_0, v00000000011b9420_0, v00000000011b9f60_0, v00000000011b8840_0; -E_0000000001196580/1 .event edge, v00000000011b9ce0_0; -E_0000000001196580 .event/or E_0000000001196580/0, E_0000000001196580/1; -L_0000000001215680 .part L_00000000012155e0, 21, 5; -L_00000000012150e0 .part L_00000000012155e0, 16, 5; -L_0000000001216300 .part L_00000000012155e0, 26, 6; -S_00000000011bb710 .scope module, "alu" "mips_cpu_alu" 4 121, 5 1 0, S_00000000011bb580; - .timescale 0 0; - .port_info 0 /INPUT 32 "A"; - .port_info 1 /INPUT 32 "B"; - .port_info 2 /INPUT 5 "ALUOp"; - .port_info 3 /INPUT 5 "shamt"; - .port_info 4 /OUTPUT 1 "ALUCond"; - .port_info 5 /OUTPUT 32 "ALURes"; -enum000000000091bd00 .enum4 (5) - "ADD" 5'b00000, - "SUB" 5'b00001, - "MUL" 5'b00010, - "DIV" 5'b00011, - "AND" 5'b00100, - "OR" 5'b00101, - "XOR" 5'b00110, - "SLL" 5'b00111, - "SLLV" 5'b01000, - "SRL" 5'b01001, - "SRLV" 5'b01010, - "SRA" 5'b01011, - "SRAV" 5'b01100, - "EQ" 5'b01101, - "LES" 5'b01110, - "LEQ" 5'b01111, - "GRT" 5'b10000, - "GEQ" 5'b10001, - "NEQ" 5'b10010, - "PAS" 5'b10011, - "SLT" 5'b10100, - "SLTU" 5'b10101, - "MULU" 5'b10110, - "DIVU" 5'b10111 - ; -L_00000000011ab930 .functor BUFZ 5, v00000000011b99c0_0, C4<00000>, C4<00000>, C4<00000>; -v00000000011b8e80_0 .net "A", 31 0, v00000000011b8980_0; alias, 1 drivers -v00000000011ba0a0_0 .var "ALUCond", 0 0; -v00000000011b91a0_0 .net "ALUOp", 4 0, v00000000011b99c0_0; alias, 1 drivers -v00000000011b94c0_0 .net "ALUOps", 4 0, L_00000000011ab930; 1 drivers -v00000000011b9420_0 .var/s "ALURes", 31 0; -v00000000011b8fc0_0 .net "B", 31 0, v00000000011292f0_0; 1 drivers -v00000000011b9a60_0 .net "shamt", 4 0, v00000000011b9380_0; alias, 1 drivers -E_0000000001190940 .event edge, v00000000011b94c0_0, v00000000011b8e80_0, v00000000011b8fc0_0, v00000000011b9a60_0; -S_0000000001159390 .scope module, "control" "mips_cpu_control" 4 90, 6 1 0, S_00000000011bb580; - .timescale 0 0; - .port_info 0 /INPUT 32 "Instr"; - .port_info 1 /INPUT 1 "ALUCond"; - .port_info 2 /OUTPUT 2 "CtrlRegDst"; - .port_info 3 /OUTPUT 2 "CtrlPC"; - .port_info 4 /OUTPUT 1 "CtrlMemRead"; - .port_info 5 /OUTPUT 2 "CtrlMemtoReg"; - .port_info 6 /OUTPUT 5 "CtrlALUOp"; - .port_info 7 /OUTPUT 5 "Ctrlshamt"; - .port_info 8 /OUTPUT 1 "CtrlMemWrite"; - .port_info 9 /OUTPUT 1 "CtrlALUSrc"; - .port_info 10 /OUTPUT 1 "CtrlRegWrite"; -enum0000000000919270 .enum4 (5) - "BLTZ" 5'b00000, - "BGEZ" 5'b00001, - "BLTZAL" 5'b10000, - "BGEZAL" 5'b10001 - ; -enum0000000000919730 .enum4 (6) - "SPECIAL" 6'b000000, - "REGIMM" 6'b000001, - "J" 6'b000010, - "JAL" 6'b000011, - "BEQ" 6'b000100, - "BNE" 6'b000101, - "BLEZ" 6'b000110, - "BGTZ" 6'b000111, - "ADDI" 6'b001000, - "ADDIU" 6'b001001, - "SLTI" 6'b001010, - "SLTIU" 6'b001011, - "ANDI" 6'b001100, - "ORI" 6'b001101, - "XORI" 6'b001110, - "LUI" 6'b001111, - "LB" 6'b100000, - "LH" 6'b100001, - "LWL" 6'b100010, - "LW" 6'b100011, - "LBU" 6'b100100, - "LHU" 6'b100101, - "LWR" 6'b100110, - "SB" 6'b101000, - "SH" 6'b101001, - "SW" 6'b101011 - ; -enum000000000091b7f0 .enum4 (6) - "SLL" 6'b000000, - "SRL" 6'b000010, - "SRA" 6'b000011, - "SLLV" 6'b000100, - "SRLV" 6'b000110, - "SRAV" 6'b000111, - "JR" 6'b001000, - "JALR" 6'b001001, - "MTHI" 6'b010001, - "MTLO" 6'b010011, - "MULT" 6'b011000, - "MULTU" 6'b011001, - "DIV" 6'b011010, - "DIVU" 6'b011011, - "ADDU" 6'b100001, - "SUBU" 6'b100011, - "AND" 6'b100100, - "OR" 6'b100101, - "XOR" 6'b100110, - "SLT" 6'b101010, - "SLTU" 6'b101011 - ; -v00000000011b8d40_0 .net "ALUCond", 0 0, v00000000011ba0a0_0; alias, 1 drivers -v00000000011b99c0_0 .var "CtrlALUOp", 4 0; -v00000000011b9920_0 .var "CtrlALUSrc", 0 0; -v00000000011b8840_0 .var "CtrlMemRead", 0 0; -v00000000011b9f60_0 .var "CtrlMemWrite", 0 0; -v00000000011b88e0_0 .var "CtrlMemtoReg", 1 0; -v00000000011b9240_0 .var "CtrlPC", 1 0; -v00000000011b92e0_0 .var "CtrlRegDst", 1 0; -v00000000011b8de0_0 .var "CtrlRegWrite", 0 0; -v00000000011b9380_0 .var "Ctrlshamt", 4 0; -v00000000011b8660_0 .net "Instr", 31 0, L_00000000012155e0; alias, 1 drivers -v00000000011b8700_0 .net "funct", 5 0, L_0000000001215720; 1 drivers -v00000000011b9560_0 .net "op", 5 0, L_0000000001215180; 1 drivers -v00000000011b9600_0 .net "rt", 4 0, L_0000000001216580; 1 drivers -E_0000000001197840/0 .event edge, v00000000011b9560_0, v00000000011b8700_0, v00000000011ba0a0_0, v00000000011b9600_0; -E_0000000001197840/1 .event edge, v00000000011b8660_0; -E_0000000001197840 .event/or E_0000000001197840/0, E_0000000001197840/1; -L_0000000001215180 .part L_00000000012155e0, 26, 6; -L_0000000001215720 .part L_00000000012155e0, 0, 6; -L_0000000001216580 .part L_00000000012155e0, 16, 5; -S_0000000001159520 .scope module, "pc" "pc" 4 79, 7 1 0, S_00000000011bb580; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "rst"; - .port_info 2 /INPUT 2 "pc_ctrl"; - .port_info 3 /INPUT 32 "pc_in"; - .port_info 4 /INPUT 5 "rs"; - .port_info 5 /OUTPUT 32 "pc_out"; - .port_info 6 /OUTPUT 1 "active"; -v00000000011b96a0_0 .var "active", 0 0; -v00000000011b9b00_0 .net "clk", 0 0, v0000000001215040_0; alias, 1 drivers -v00000000011b9ba0_0 .net "pc_ctrl", 1 0, v00000000011b9240_0; alias, 1 drivers -v00000000011b9060_0 .var "pc_curr", 31 0; -v00000000011b9100_0 .net "pc_in", 31 0, v0000000001213a30_0; 1 drivers -v00000000011b8b60_0 .var "pc_out", 31 0; -o00000000011bd1d8 .functor BUFZ 5, C4; HiZ drive -v00000000011b8f20_0 .net "rs", 4 0, o00000000011bd1d8; 0 drivers -v00000000011b9740_0 .net "rst", 0 0, v0000000001215900_0; alias, 1 drivers -E_0000000001190b80 .event posedge, v00000000011b9b00_0; -S_00000000011596b0 .scope module, "regfile" "mips_cpu_regfile" 4 106, 8 1 0, S_00000000011bb580; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 5 "readreg1"; - .port_info 2 /INPUT 5 "readreg2"; - .port_info 3 /INPUT 5 "writereg"; - .port_info 4 /INPUT 32 "writedata"; - .port_info 5 /INPUT 1 "regwrite"; - .port_info 6 /INPUT 6 "opcode"; - .port_info 7 /OUTPUT 32 "readdata1"; - .port_info 8 /OUTPUT 32 "readdata2"; - .port_info 9 /OUTPUT 32 "regv0"; -v00000000011b9880_2 .array/port v00000000011b9880, 2; -L_00000000011aad60 .functor BUFZ 32, v00000000011b9880_2, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; -v00000000011ba280_0 .net "clk", 0 0, v0000000001215040_0; alias, 1 drivers -v00000000011b9880 .array "memory", 0 31, 31 0; -v00000000011b9c40_0 .net "opcode", 5 0, L_0000000001216300; alias, 1 drivers -v00000000011b8980_0 .var "readdata1", 31 0; -v00000000011b9ce0_0 .var "readdata2", 31 0; -v00000000011b9d80_0 .net "readreg1", 4 0, L_0000000001215680; alias, 1 drivers -v00000000011b9ec0_0 .net "readreg2", 4 0, L_00000000012150e0; alias, 1 drivers -v00000000011b9e20_0 .net "regv0", 31 0, L_00000000011aad60; alias, 1 drivers -v00000000011ba000_0 .net "regwrite", 0 0, v00000000011b8de0_0; alias, 1 drivers -v00000000011ba140_0 .net "writedata", 31 0, v0000000001213170_0; 1 drivers -v00000000011ba1e0_0 .net "writereg", 4 0, v0000000001213fd0_0; 1 drivers -E_0000000001190a80 .event negedge, v00000000011b9b00_0; -v00000000011b9880_0 .array/port v00000000011b9880, 0; -v00000000011b9880_1 .array/port v00000000011b9880, 1; -E_0000000001190c00/0 .event edge, v00000000011b9d80_0, v00000000011b9880_0, v00000000011b9880_1, v00000000011b9880_2; -v00000000011b9880_3 .array/port v00000000011b9880, 3; -v00000000011b9880_4 .array/port v00000000011b9880, 4; -v00000000011b9880_5 .array/port v00000000011b9880, 5; -v00000000011b9880_6 .array/port v00000000011b9880, 6; -E_0000000001190c00/1 .event edge, v00000000011b9880_3, v00000000011b9880_4, v00000000011b9880_5, v00000000011b9880_6; -v00000000011b9880_7 .array/port v00000000011b9880, 7; -v00000000011b9880_8 .array/port v00000000011b9880, 8; -v00000000011b9880_9 .array/port v00000000011b9880, 9; -v00000000011b9880_10 .array/port v00000000011b9880, 10; -E_0000000001190c00/2 .event edge, v00000000011b9880_7, v00000000011b9880_8, v00000000011b9880_9, v00000000011b9880_10; -v00000000011b9880_11 .array/port v00000000011b9880, 11; -v00000000011b9880_12 .array/port v00000000011b9880, 12; -v00000000011b9880_13 .array/port v00000000011b9880, 13; -v00000000011b9880_14 .array/port v00000000011b9880, 14; -E_0000000001190c00/3 .event edge, v00000000011b9880_11, v00000000011b9880_12, v00000000011b9880_13, v00000000011b9880_14; -v00000000011b9880_15 .array/port v00000000011b9880, 15; -v00000000011b9880_16 .array/port v00000000011b9880, 16; -v00000000011b9880_17 .array/port v00000000011b9880, 17; -v00000000011b9880_18 .array/port v00000000011b9880, 18; -E_0000000001190c00/4 .event edge, v00000000011b9880_15, v00000000011b9880_16, v00000000011b9880_17, v00000000011b9880_18; -v00000000011b9880_19 .array/port v00000000011b9880, 19; -v00000000011b9880_20 .array/port v00000000011b9880, 20; -v00000000011b9880_21 .array/port v00000000011b9880, 21; -v00000000011b9880_22 .array/port v00000000011b9880, 22; -E_0000000001190c00/5 .event edge, v00000000011b9880_19, v00000000011b9880_20, v00000000011b9880_21, v00000000011b9880_22; -v00000000011b9880_23 .array/port v00000000011b9880, 23; -v00000000011b9880_24 .array/port v00000000011b9880, 24; -v00000000011b9880_25 .array/port v00000000011b9880, 25; -v00000000011b9880_26 .array/port v00000000011b9880, 26; -E_0000000001190c00/6 .event edge, v00000000011b9880_23, v00000000011b9880_24, v00000000011b9880_25, v00000000011b9880_26; -v00000000011b9880_27 .array/port v00000000011b9880, 27; -v00000000011b9880_28 .array/port v00000000011b9880, 28; -v00000000011b9880_29 .array/port v00000000011b9880, 29; -v00000000011b9880_30 .array/port v00000000011b9880, 30; -E_0000000001190c00/7 .event edge, v00000000011b9880_27, v00000000011b9880_28, v00000000011b9880_29, v00000000011b9880_30; -v00000000011b9880_31 .array/port v00000000011b9880, 31; -E_0000000001190c00/8 .event edge, v00000000011b9880_31, v00000000011b9ec0_0; -E_0000000001190c00 .event/or E_0000000001190c00/0, E_0000000001190c00/1, E_0000000001190c00/2, E_0000000001190c00/3, E_0000000001190c00/4, E_0000000001190c00/5, E_0000000001190c00/6, E_0000000001190c00/7, E_0000000001190c00/8; -S_00000000011491d0 .scope begin, "$unm_blk_121" "$unm_blk_121" 8 16, 8 16 0, S_00000000011596b0; - .timescale 0 0; -v00000000011b97e0_0 .var/i "i", 31 0; -S_0000000001149470 .scope module, "ramInst" "mips_cpu_memory" 3 9, 9 1 0, S_00000000011ba580; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 32 "data_address"; - .port_info 2 /INPUT 1 "data_write"; - .port_info 3 /INPUT 1 "data_read"; - .port_info 4 /INPUT 32 "data_writedata"; - .port_info 5 /OUTPUT 32 "data_readdata"; - .port_info 6 /INPUT 32 "instr_address"; - .port_info 7 /OUTPUT 32 "instr_readdata"; -P_0000000001191000 .param/str "RAM_INIT_FILE" 0 9 16, "inputs/sra.txt"; -L_00000000011ab7e0 .functor AND 1, L_0000000001214f00, L_0000000001215a40, C4<1>, C4<1>; -v0000000001213530_0 .net *"_ivl_0", 31 0, L_0000000001215ea0; 1 drivers -L_0000000001217ba8 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v0000000001213b70_0 .net/2u *"_ivl_12", 31 0, L_0000000001217ba8; 1 drivers -v0000000001212ef0_0 .net *"_ivl_14", 0 0, L_0000000001214f00; 1 drivers -L_0000000001217bf0 .functor BUFT 1, C4<10111111110000000000000001000000>, C4<0>, C4<0>, C4<0>; -v0000000001214610_0 .net/2u *"_ivl_16", 31 0, L_0000000001217bf0; 1 drivers -v0000000001214930_0 .net *"_ivl_18", 0 0, L_0000000001215a40; 1 drivers -v0000000001213d50_0 .net *"_ivl_2", 31 0, L_0000000001214b40; 1 drivers -v0000000001214750_0 .net *"_ivl_21", 0 0, L_00000000011ab7e0; 1 drivers -v0000000001214430_0 .net *"_ivl_22", 31 0, L_0000000001214fa0; 1 drivers -L_0000000001217c38 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v0000000001214570_0 .net/2u *"_ivl_24", 31 0, L_0000000001217c38; 1 drivers -v00000000012146b0_0 .net *"_ivl_26", 31 0, L_0000000001215c20; 1 drivers -v00000000012147f0_0 .net *"_ivl_28", 31 0, L_00000000012169e0; 1 drivers -v0000000001214890_0 .net *"_ivl_30", 29 0, L_0000000001215540; 1 drivers -L_0000000001217c80 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v00000000012149d0_0 .net *"_ivl_32", 1 0, L_0000000001217c80; 1 drivers -L_0000000001217cc8 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v0000000001213ad0_0 .net *"_ivl_34", 31 0, L_0000000001217cc8; 1 drivers -v0000000001212bd0_0 .net *"_ivl_4", 29 0, L_0000000001214be0; 1 drivers -L_0000000001217b18 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0000000001212c70_0 .net *"_ivl_6", 1 0, L_0000000001217b18; 1 drivers -L_0000000001217b60 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v0000000001213c10_0 .net *"_ivl_8", 31 0, L_0000000001217b60; 1 drivers -v0000000001212d10_0 .net "clk", 0 0, v0000000001215040_0; alias, 1 drivers -v0000000001212f90_0 .net "data_address", 31 0, v00000000011b8c00_0; alias, 1 drivers -v0000000001213210 .array "data_memory", 63 0, 31 0; -v0000000001213350_0 .net "data_read", 0 0, v00000000011b87a0_0; alias, 1 drivers -v0000000001213cb0_0 .net "data_readdata", 31 0, L_0000000001216620; alias, 1 drivers -v0000000001213670_0 .net "data_write", 0 0, v00000000011b8a20_0; alias, 1 drivers -v0000000001213710_0 .net "data_writedata", 31 0, v00000000011b8ca0_0; alias, 1 drivers -v00000000012159a0_0 .net "instr_address", 31 0, v00000000012138f0_0; alias, 1 drivers -v0000000001215220 .array "instr_memory", 63 0, 31 0; -v00000000012152c0_0 .net "instr_readdata", 31 0, L_00000000012155e0; alias, 1 drivers -L_0000000001215ea0 .array/port v0000000001213210, L_0000000001214b40; -L_0000000001214be0 .part v00000000011b8c00_0, 2, 30; -L_0000000001214b40 .concat [ 30 2 0 0], L_0000000001214be0, L_0000000001217b18; -L_0000000001216620 .functor MUXZ 32, L_0000000001217b60, L_0000000001215ea0, v00000000011b87a0_0, C4<>; -L_0000000001214f00 .cmp/ge 32, v00000000012138f0_0, L_0000000001217ba8; -L_0000000001215a40 .cmp/gt 32, L_0000000001217bf0, v00000000012138f0_0; -L_0000000001214fa0 .array/port v0000000001215220, L_00000000012169e0; -L_0000000001215c20 .arith/sub 32, v00000000012138f0_0, L_0000000001217c38; -L_0000000001215540 .part L_0000000001215c20, 2, 30; -L_00000000012169e0 .concat [ 30 2 0 0], L_0000000001215540, L_0000000001217c80; -L_00000000012155e0 .functor MUXZ 32, L_0000000001217cc8, L_0000000001214fa0, L_00000000011ab7e0, C4<>; -S_000000000113e5e0 .scope begin, "$unm_blk_104" "$unm_blk_104" 9 21, 9 21 0, S_0000000001149470; - .timescale 0 0; -v0000000001214390_0 .var/i "i", 31 0; -S_0000000001102680 .scope begin, "$ivl_for_loop0" "$ivl_for_loop0" 9 36, 9 36 0, S_000000000113e5e0; - .timescale 0 0; -v00000000012142f0_0 .var/i "j", 31 0; - .scope S_0000000001149470; -T_0 ; - %fork t_1, S_000000000113e5e0; - %jmp t_0; - .scope S_000000000113e5e0; -t_1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v0000000001214390_0, 0, 32; -T_0.0 ; - %load/vec4 v0000000001214390_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v0000000001214390_0; - %store/vec4a v0000000001213210, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0000000001214390_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v0000000001214390_0, 0, 32; - %jmp T_0.0; -T_0.1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v0000000001214390_0, 0, 32; -T_0.2 ; - %load/vec4 v0000000001214390_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.3, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v0000000001214390_0; - %store/vec4a v0000000001215220, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0000000001214390_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v0000000001214390_0, 0, 32; - %jmp T_0.2; -T_0.3 ; - %vpi_call/w 9 32 "$display", "RAM: Loading RAM contents from %s", P_0000000001191000 {0 0 0}; - %vpi_call/w 9 33 "$readmemh", P_0000000001191000, v0000000001215220 {0 0 0}; - %fork t_3, S_0000000001102680; - %jmp t_2; - .scope S_0000000001102680; -t_3 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000012142f0_0, 0, 32; -T_0.4 ; - %load/vec4 v00000000012142f0_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.5, 5; - %pushi/vec4 3217031168, 0, 32; - %load/vec4 v00000000012142f0_0; - %muli 4, 0, 32; - %add; - %vpi_call/w 9 37 "$display", "byte +%h: %h", S<0,vec4,u32>, &A {1 0 0}; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000012142f0_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000012142f0_0, 0, 32; - %jmp T_0.4; -T_0.5 ; - %end; - .scope S_000000000113e5e0; -t_2 %join; - %end; - .scope S_0000000001149470; -t_0 %join; - %end; - .thread T_0; - .scope S_0000000001149470; -T_1 ; - %wait E_0000000001190b80; - %load/vec4 v0000000001213350_0; - %nor/r; - %load/vec4 v0000000001213670_0; - %and; - %flag_set/vec4 8; - %jmp/0xz T_1.0, 8; - %load/vec4 v00000000012159a0_0; - %load/vec4 v0000000001212f90_0; - %cmp/ne; - %jmp/0xz T_1.2, 4; - %load/vec4 v0000000001213710_0; - %load/vec4 v0000000001212f90_0; - %ix/load 4, 2, 0; - %flag_set/imm 4, 0; - %shiftr 4; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001213210, 0, 4; -T_1.2 ; -T_1.0 ; - %jmp T_1; - .thread T_1; - .scope S_0000000001159520; -T_2 ; - %load/vec4 v00000000011b9100_0; - %store/vec4 v00000000011b8b60_0, 0, 32; - %end; - .thread T_2; - .scope S_0000000001159520; -T_3 ; - %wait E_0000000001190b80; - %load/vec4 v00000000011b9740_0; - %flag_set/vec4 8; - %jmp/0xz T_3.0, 8; - %pushi/vec4 1, 0, 1; - %assign/vec4 v00000000011b96a0_0, 0; - %pushi/vec4 3217031168, 0, 32; - %assign/vec4 v00000000011b8b60_0, 0; - %jmp T_3.1; -T_3.0 ; - %load/vec4 v00000000011b8b60_0; - %cmpi/ne 0, 0, 32; - %jmp/0xz T_3.2, 4; - %load/vec4 v00000000011b96a0_0; - %assign/vec4 v00000000011b96a0_0, 0; - %load/vec4 v00000000011b9ba0_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_3.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_3.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_3.6, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_3.7, 6; - %jmp T_3.8; -T_3.4 ; - %load/vec4 v00000000011b8b60_0; - %assign/vec4 v00000000011b9060_0, 0; - %load/vec4 v00000000011b9060_0; - %addi 4, 0, 32; - %assign/vec4 v00000000011b8b60_0, 0; - %vpi_call/w 7 27 "$display", "New PC from %h to %h", v00000000011b9060_0, v00000000011b8b60_0 {0 0 0}; - %jmp T_3.8; -T_3.5 ; - %load/vec4 v00000000011b9100_0; - %assign/vec4 v00000000011b8b60_0, 0; - %jmp T_3.8; -T_3.6 ; - %load/vec4 v00000000011b9100_0; - %assign/vec4 v00000000011b8b60_0, 0; - %jmp T_3.8; -T_3.7 ; - %vpi_call/w 7 36 "$display", "JUMP REGISTER" {0 0 0}; - %pushi/vec4 0, 0, 32; - %assign/vec4 v00000000011b8b60_0, 0; - %jmp T_3.8; -T_3.8 ; - %pop/vec4 1; - %jmp T_3.3; -T_3.2 ; - %load/vec4 v00000000011b8b60_0; - %cmpi/e 0, 0, 32; - %jmp/0xz T_3.9, 4; - %pushi/vec4 0, 0, 1; - %assign/vec4 v00000000011b96a0_0, 0; -T_3.9 ; -T_3.3 ; -T_3.1 ; - %jmp T_3; - .thread T_3; - .scope S_0000000001159390; -T_4 ; - %wait E_0000000001197840; - %vpi_call/w 6 86 "$display", "Opcode: %h", v00000000011b9560_0 {0 0 0}; - %load/vec4 v00000000011b9560_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.0, 4; - %pushi/vec4 0, 0, 2; - %store/vec4 v00000000011b92e0_0, 0, 2; - %vpi_call/w 6 89 "$display", "CTRLREGDST: Rt" {0 0 0}; - %jmp T_4.1; -T_4.0 ; - %load/vec4 v00000000011b9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.2, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v00000000011b92e0_0, 0, 2; - %vpi_call/w 6 92 "$display", "CTRLREGDST: Rd" {0 0 0}; - %jmp T_4.3; -T_4.2 ; - %load/vec4 v00000000011b9560_0; - %cmpi/e 3, 0, 6; - %jmp/0xz T_4.4, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v00000000011b92e0_0, 0, 2; - %vpi_call/w 6 95 "$display", "CTRLREGDST: Link" {0 0 0}; - %jmp T_4.5; -T_4.4 ; - %pushi/vec4 1, 1, 2; - %store/vec4 v00000000011b92e0_0, 0, 2; - %vpi_call/w 6 96 "$display", "xxxxxxxxxxxxxx" {0 0 0}; -T_4.5 ; -T_4.3 ; -T_4.1 ; - %load/vec4 v00000000011b8d40_0; - %load/vec4 v00000000011b9560_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b9560_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b9560_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b9560_0; - %pushi/vec4 5, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b9560_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b9600_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b9600_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b9600_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b9600_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.6, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v00000000011b9240_0, 0, 2; - %jmp T_4.7; -T_4.6 ; - %load/vec4 v00000000011b9560_0; - %cmpi/e 2, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 3, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.8, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v00000000011b9240_0, 0, 2; - %jmp T_4.9; -T_4.8 ; - %load/vec4 v00000000011b8700_0; - %cmpi/e 8, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011b8700_0; - %cmpi/e 9, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.10, 4; - %pushi/vec4 3, 0, 2; - %store/vec4 v00000000011b9240_0, 0, 2; - %jmp T_4.11; -T_4.10 ; - %pushi/vec4 0, 0, 2; - %store/vec4 v00000000011b9240_0, 0, 2; -T_4.11 ; -T_4.9 ; -T_4.7 ; - %load/vec4 v00000000011b9560_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.12, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000011b8840_0, 0, 1; - %pushi/vec4 1, 0, 2; - %store/vec4 v00000000011b88e0_0, 0, 2; - %vpi_call/w 6 112 "$display", "Memory read enabled" {0 0 0}; - %jmp T_4.13; -T_4.12 ; - %load/vec4 v00000000011b9560_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.14, 9; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011b8840_0, 0, 1; - %pushi/vec4 0, 0, 2; - %store/vec4 v00000000011b88e0_0, 0, 2; - %vpi_call/w 6 116 "$display", "Memory read disabled" {0 0 0}; - %jmp T_4.15; -T_4.14 ; - %load/vec4 v00000000011b9560_0; - %cmpi/e 3, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.16, 9; - %pushi/vec4 2, 0, 2; - %store/vec4 v00000000011b88e0_0, 0, 2; - %jmp T_4.17; -T_4.16 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v00000000011b8840_0, 0, 1; -T_4.17 ; -T_4.15 ; -T_4.13 ; - %load/vec4 v00000000011b9560_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.18, 9; - %pushi/vec4 0, 0, 5; - %store/vec4 v00000000011b99c0_0, 0, 5; - %vpi_call/w 6 124 "$display", "ALU OP = 0 (ADDU/ADDIU)" {0 0 0}; - %jmp T_4.19; -T_4.18 ; - %load/vec4 v00000000011b9560_0; - %cmpi/e 12, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.20, 9; - %pushi/vec4 4, 0, 5; - %store/vec4 v00000000011b99c0_0, 0, 5; - %jmp T_4.21; -T_4.20 ; - %load/vec4 v00000000011b9560_0; - %cmpi/e 4, 0, 6; - %jmp/0xz T_4.22, 4; - %pushi/vec4 13, 0, 5; - %store/vec4 v00000000011b99c0_0, 0, 5; - %jmp T_4.23; -T_4.22 ; - %load/vec4 v00000000011b9560_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b9600_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b9600_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.24, 8; - %pushi/vec4 17, 0, 5; - %store/vec4 v00000000011b99c0_0, 0, 5; - %jmp T_4.25; -T_4.24 ; - %load/vec4 v00000000011b9560_0; - %cmpi/e 7, 0, 6; - %jmp/0xz T_4.26, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v00000000011b99c0_0, 0, 5; - %jmp T_4.27; -T_4.26 ; - %load/vec4 v00000000011b9560_0; - %cmpi/e 6, 0, 6; - %jmp/0xz T_4.28, 4; - %pushi/vec4 15, 0, 5; - %store/vec4 v00000000011b99c0_0, 0, 5; - %jmp T_4.29; -T_4.28 ; - %load/vec4 v00000000011b9560_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b9600_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b9600_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.30, 8; - %pushi/vec4 14, 0, 5; - %store/vec4 v00000000011b99c0_0, 0, 5; - %jmp T_4.31; -T_4.30 ; - %load/vec4 v00000000011b9560_0; - %cmpi/e 5, 0, 6; - %jmp/0xz T_4.32, 4; - %pushi/vec4 18, 0, 5; - %store/vec4 v00000000011b99c0_0, 0, 5; - %jmp T_4.33; -T_4.32 ; - %load/vec4 v00000000011b9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.34, 8; - %pushi/vec4 3, 0, 5; - %store/vec4 v00000000011b99c0_0, 0, 5; - %jmp T_4.35; -T_4.34 ; - %load/vec4 v00000000011b9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.36, 8; - %pushi/vec4 23, 0, 5; - %store/vec4 v00000000011b99c0_0, 0, 5; - %jmp T_4.37; -T_4.36 ; - %load/vec4 v00000000011b9560_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.38, 4; - %pushi/vec4 0, 0, 5; - %store/vec4 v00000000011b99c0_0, 0, 5; - %jmp T_4.39; -T_4.38 ; - %load/vec4 v00000000011b9560_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.40, 4; - %pushi/vec4 7, 0, 5; - %store/vec4 v00000000011b99c0_0, 0, 5; - %jmp T_4.41; -T_4.40 ; - %load/vec4 v00000000011b9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.42, 8; - %pushi/vec4 19, 0, 5; - %store/vec4 v00000000011b99c0_0, 0, 5; - %jmp T_4.43; -T_4.42 ; - %load/vec4 v00000000011b9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.44, 8; - %pushi/vec4 2, 0, 5; - %store/vec4 v00000000011b99c0_0, 0, 5; - %jmp T_4.45; -T_4.44 ; - %load/vec4 v00000000011b9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.46, 8; - %pushi/vec4 22, 0, 5; - %store/vec4 v00000000011b99c0_0, 0, 5; - %jmp T_4.47; -T_4.46 ; - %load/vec4 v00000000011b9560_0; - %cmpi/e 13, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.48, 9; - %pushi/vec4 5, 0, 5; - %store/vec4 v00000000011b99c0_0, 0, 5; - %jmp T_4.49; -T_4.48 ; - %load/vec4 v00000000011b9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.50, 8; - %pushi/vec4 7, 0, 5; - %store/vec4 v00000000011b99c0_0, 0, 5; - %jmp T_4.51; -T_4.50 ; - %load/vec4 v00000000011b9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.52, 8; - %pushi/vec4 8, 0, 5; - %store/vec4 v00000000011b99c0_0, 0, 5; - %jmp T_4.53; -T_4.52 ; - %load/vec4 v00000000011b9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.54, 8; - %pushi/vec4 11, 0, 5; - %store/vec4 v00000000011b99c0_0, 0, 5; - %jmp T_4.55; -T_4.54 ; - %load/vec4 v00000000011b9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.56, 8; - %pushi/vec4 12, 0, 5; - %store/vec4 v00000000011b99c0_0, 0, 5; - %jmp T_4.57; -T_4.56 ; - %load/vec4 v00000000011b9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.58, 8; - %pushi/vec4 9, 0, 5; - %store/vec4 v00000000011b99c0_0, 0, 5; - %jmp T_4.59; -T_4.58 ; - %load/vec4 v00000000011b9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.60, 8; - %pushi/vec4 10, 0, 5; - %store/vec4 v00000000011b99c0_0, 0, 5; - %jmp T_4.61; -T_4.60 ; - %load/vec4 v00000000011b9560_0; - %cmpi/e 10, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.62, 9; - %pushi/vec4 20, 0, 5; - %store/vec4 v00000000011b99c0_0, 0, 5; - %jmp T_4.63; -T_4.62 ; - %load/vec4 v00000000011b9560_0; - %cmpi/e 11, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.64, 9; - %pushi/vec4 21, 0, 5; - %store/vec4 v00000000011b99c0_0, 0, 5; - %jmp T_4.65; -T_4.64 ; - %load/vec4 v00000000011b9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.66, 8; - %pushi/vec4 1, 0, 5; - %store/vec4 v00000000011b99c0_0, 0, 5; - %jmp T_4.67; -T_4.66 ; - %load/vec4 v00000000011b9560_0; - %cmpi/e 14, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.68, 9; - %pushi/vec4 6, 0, 5; - %store/vec4 v00000000011b99c0_0, 0, 5; - %vpi_call/w 6 175 "$display", "ALU Op = 6 (XOR)" {0 0 0}; - %jmp T_4.69; -T_4.68 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v00000000011b99c0_0, 0, 5; -T_4.69 ; -T_4.67 ; -T_4.65 ; -T_4.63 ; -T_4.61 ; -T_4.59 ; -T_4.57 ; -T_4.55 ; -T_4.53 ; -T_4.51 ; -T_4.49 ; -T_4.47 ; -T_4.45 ; -T_4.43 ; -T_4.41 ; -T_4.39 ; -T_4.37 ; -T_4.35 ; -T_4.33 ; -T_4.31 ; -T_4.29 ; -T_4.27 ; -T_4.25 ; -T_4.23 ; -T_4.21 ; -T_4.19 ; - %load/vec4 v00000000011b9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.70, 8; - %load/vec4 v00000000011b8660_0; - %parti/s 5, 6, 4; - %store/vec4 v00000000011b9380_0, 0, 5; - %jmp T_4.71; -T_4.70 ; - %load/vec4 v00000000011b9560_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.72, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v00000000011b9380_0, 0, 5; - %jmp T_4.73; -T_4.72 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v00000000011b9380_0, 0, 5; -T_4.73 ; -T_4.71 ; - %load/vec4 v00000000011b9560_0; - %cmpi/e 40, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.74, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000011b9f60_0, 0, 1; - %jmp T_4.75; -T_4.74 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011b9f60_0, 0, 1; -T_4.75 ; - %load/vec4 v00000000011b9560_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.76, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000011b9920_0, 0, 1; - %jmp T_4.77; -T_4.76 ; - %load/vec4 v00000000011b9560_0; - %cmpi/e 4, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 7, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 6, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 5, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %load/vec4 v00000000011b9560_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b9600_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b9600_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b9600_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b9600_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %flag_or 8, 9; - %jmp/0xz T_4.78, 8; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011b9920_0, 0, 1; - %jmp T_4.79; -T_4.78 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v00000000011b9920_0, 0, 1; -T_4.79 ; -T_4.77 ; - %load/vec4 v00000000011b9560_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000011b9560_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000011b8700_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.80, 9; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000011b8de0_0, 0, 1; - %jmp T_4.81; -T_4.80 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011b8de0_0, 0, 1; -T_4.81 ; - %jmp T_4; - .thread T_4, $push; - .scope S_00000000011596b0; -T_5 ; - %fork t_5, S_00000000011491d0; - %jmp t_4; - .scope S_00000000011491d0; -t_5 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000011b97e0_0, 0, 32; -T_5.0 ; - %load/vec4 v00000000011b97e0_0; - %cmpi/s 32, 0, 32; - %jmp/0xz T_5.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v00000000011b97e0_0; - %store/vec4a v00000000011b9880, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000011b97e0_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000011b97e0_0, 0, 32; - %jmp T_5.0; -T_5.1 ; - %end; - .scope S_00000000011596b0; -t_4 %join; - %end; - .thread T_5; - .scope S_00000000011596b0; -T_6 ; -Ewait_0 .event/or E_0000000001190c00, E_0x0; - %wait Ewait_0; - %load/vec4 v00000000011b9d80_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v00000000011b9880, 4; - %store/vec4 v00000000011b8980_0, 0, 32; - %load/vec4 v00000000011b9ec0_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v00000000011b9880, 4; - %store/vec4 v00000000011b9ce0_0, 0, 32; - %jmp T_6; - .thread T_6, $push; - .scope S_00000000011596b0; -T_7 ; - %wait E_0000000001190a80; - %load/vec4 v00000000011ba1e0_0; - %cmpi/e 0, 0, 5; - %jmp/0xz T_7.0, 4; - %jmp T_7.1; -T_7.0 ; - %load/vec4 v00000000011ba000_0; - %flag_set/vec4 8; - %jmp/0xz T_7.2, 8; - %load/vec4 v00000000011b9c40_0; - %dup/vec4; - %pushi/vec4 32, 0, 6; - %cmp/u; - %jmp/1 T_7.4, 6; - %dup/vec4; - %pushi/vec4 36, 0, 6; - %cmp/u; - %jmp/1 T_7.5, 6; - %dup/vec4; - %pushi/vec4 33, 0, 6; - %cmp/u; - %jmp/1 T_7.6, 6; - %dup/vec4; - %pushi/vec4 37, 0, 6; - %cmp/u; - %jmp/1 T_7.7, 6; - %dup/vec4; - %pushi/vec4 34, 0, 6; - %cmp/u; - %jmp/1 T_7.8, 6; - %dup/vec4; - %pushi/vec4 38, 0, 6; - %cmp/u; - %jmp/1 T_7.9, 6; - %load/vec4 v00000000011ba140_0; - %load/vec4 v00000000011ba1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011b9880, 0, 4; - %jmp T_7.11; -T_7.4 ; - %load/vec4 v00000000011b8980_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.12, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.13, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.14, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.15, 6; - %jmp T_7.16; -T_7.12 ; - %load/vec4 v00000000011ba140_0; - %parti/s 1, 7, 4; - %replicate 24; - %load/vec4 v00000000011ba140_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000011ba1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011b9880, 0, 4; - %jmp T_7.16; -T_7.13 ; - %load/vec4 v00000000011ba140_0; - %parti/s 1, 15, 5; - %replicate 24; - %load/vec4 v00000000011ba140_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000011ba1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011b9880, 0, 4; - %jmp T_7.16; -T_7.14 ; - %load/vec4 v00000000011ba140_0; - %parti/s 1, 23, 6; - %replicate 24; - %load/vec4 v00000000011ba140_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000011ba1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011b9880, 0, 4; - %jmp T_7.16; -T_7.15 ; - %load/vec4 v00000000011ba140_0; - %parti/s 1, 31, 6; - %replicate 24; - %load/vec4 v00000000011ba140_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000011ba1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011b9880, 0, 4; - %jmp T_7.16; -T_7.16 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.5 ; - %load/vec4 v00000000011b8980_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.17, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.18, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.19, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.20, 6; - %jmp T_7.21; -T_7.17 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000011ba140_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000011ba1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011b9880, 0, 4; - %jmp T_7.21; -T_7.18 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000011ba140_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000011ba1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011b9880, 0, 4; - %jmp T_7.21; -T_7.19 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000011ba140_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000011ba1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011b9880, 0, 4; - %jmp T_7.21; -T_7.20 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000011ba140_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000011ba1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011b9880, 0, 4; - %jmp T_7.21; -T_7.21 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.6 ; - %load/vec4 v00000000011b8980_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.22, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.23, 6; - %jmp T_7.24; -T_7.22 ; - %load/vec4 v00000000011ba140_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v00000000011ba140_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000011ba1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011b9880, 0, 4; - %jmp T_7.24; -T_7.23 ; - %load/vec4 v00000000011ba140_0; - %parti/s 1, 31, 6; - %replicate 16; - %load/vec4 v00000000011ba140_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000011ba1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011b9880, 0, 4; - %jmp T_7.24; -T_7.24 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.7 ; - %load/vec4 v00000000011b8980_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.25, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.26, 6; - %jmp T_7.27; -T_7.25 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v00000000011ba140_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000011ba1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011b9880, 0, 4; - %jmp T_7.27; -T_7.26 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v00000000011ba140_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000011ba1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011b9880, 0, 4; - %jmp T_7.27; -T_7.27 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.8 ; - %load/vec4 v00000000011b8980_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.28, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.29, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.30, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.31, 6; - %jmp T_7.32; -T_7.28 ; - %load/vec4 v00000000011ba140_0; - %parti/s 8, 0, 2; - %load/vec4 v00000000011ba1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 24, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v00000000011b9880, 4, 5; - %jmp T_7.32; -T_7.29 ; - %load/vec4 v00000000011ba140_0; - %parti/s 16, 0, 2; - %load/vec4 v00000000011ba1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 16, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v00000000011b9880, 4, 5; - %jmp T_7.32; -T_7.30 ; - %load/vec4 v00000000011ba140_0; - %parti/s 24, 0, 2; - %load/vec4 v00000000011ba1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 8, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v00000000011b9880, 4, 5; - %jmp T_7.32; -T_7.31 ; - %load/vec4 v00000000011ba140_0; - %load/vec4 v00000000011ba1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011b9880, 0, 4; - %jmp T_7.32; -T_7.32 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.9 ; - %load/vec4 v00000000011b8980_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.33, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.34, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.35, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.36, 6; - %jmp T_7.37; -T_7.33 ; - %load/vec4 v00000000011ba140_0; - %load/vec4 v00000000011ba1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011b9880, 0, 4; - %jmp T_7.37; -T_7.34 ; - %load/vec4 v00000000011ba140_0; - %parti/s 24, 8, 5; - %load/vec4 v00000000011ba1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011b9880, 0, 4; - %jmp T_7.37; -T_7.35 ; - %load/vec4 v00000000011ba140_0; - %parti/s 16, 16, 6; - %load/vec4 v00000000011ba1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011b9880, 0, 4; - %jmp T_7.37; -T_7.36 ; - %load/vec4 v00000000011ba140_0; - %parti/s 8, 24, 6; - %load/vec4 v00000000011ba1e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000011b9880, 0, 4; - %jmp T_7.37; -T_7.37 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.11 ; - %pop/vec4 1; -T_7.2 ; -T_7.1 ; - %jmp T_7; - .thread T_7; - .scope S_00000000011bb710; -T_8 ; -Ewait_1 .event/or E_0000000001190940, E_0x0; - %wait Ewait_1; - %load/vec4 v00000000011b94c0_0; - %dup/vec4; - %pushi/vec4 0, 0, 5; - %cmp/u; - %jmp/1 T_8.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 5; - %cmp/u; - %jmp/1 T_8.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 5; - %cmp/u; - %jmp/1 T_8.2, 6; - %dup/vec4; - %pushi/vec4 3, 0, 5; - %cmp/u; - %jmp/1 T_8.3, 6; - %dup/vec4; - %pushi/vec4 4, 0, 5; - %cmp/u; - %jmp/1 T_8.4, 6; - %dup/vec4; - %pushi/vec4 5, 0, 5; - %cmp/u; - %jmp/1 T_8.5, 6; - %dup/vec4; - %pushi/vec4 6, 0, 5; - %cmp/u; - %jmp/1 T_8.6, 6; - %dup/vec4; - %pushi/vec4 7, 0, 5; - %cmp/u; - %jmp/1 T_8.7, 6; - %dup/vec4; - %pushi/vec4 8, 0, 5; - %cmp/u; - %jmp/1 T_8.8, 6; - %dup/vec4; - %pushi/vec4 9, 0, 5; - %cmp/u; - %jmp/1 T_8.9, 6; - %dup/vec4; - %pushi/vec4 10, 0, 5; - %cmp/u; - %jmp/1 T_8.10, 6; - %dup/vec4; - %pushi/vec4 11, 0, 5; - %cmp/u; - %jmp/1 T_8.11, 6; - %dup/vec4; - %pushi/vec4 12, 0, 5; - %cmp/u; - %jmp/1 T_8.12, 6; - %dup/vec4; - %pushi/vec4 13, 0, 5; - %cmp/u; - %jmp/1 T_8.13, 6; - %dup/vec4; - %pushi/vec4 14, 0, 5; - %cmp/u; - %jmp/1 T_8.14, 6; - %dup/vec4; - %pushi/vec4 15, 0, 5; - %cmp/u; - %jmp/1 T_8.15, 6; - %dup/vec4; - %pushi/vec4 16, 0, 5; - %cmp/u; - %jmp/1 T_8.16, 6; - %dup/vec4; - %pushi/vec4 17, 0, 5; - %cmp/u; - %jmp/1 T_8.17, 6; - %dup/vec4; - %pushi/vec4 18, 0, 5; - %cmp/u; - %jmp/1 T_8.18, 6; - %dup/vec4; - %pushi/vec4 19, 0, 5; - %cmp/u; - %jmp/1 T_8.19, 6; - %dup/vec4; - %pushi/vec4 20, 0, 5; - %cmp/u; - %jmp/1 T_8.20, 6; - %dup/vec4; - %pushi/vec4 21, 0, 5; - %cmp/u; - %jmp/1 T_8.21, 6; - %dup/vec4; - %pushi/vec4 22, 0, 5; - %cmp/u; - %jmp/1 T_8.22, 6; - %dup/vec4; - %pushi/vec4 23, 0, 5; - %cmp/u; - %jmp/1 T_8.23, 6; - %jmp T_8.24; -T_8.0 ; - %load/vec4 v00000000011b8e80_0; - %load/vec4 v00000000011b8fc0_0; - %add; - %store/vec4 v00000000011b9420_0, 0, 32; - %jmp T_8.24; -T_8.1 ; - %load/vec4 v00000000011b8e80_0; - %load/vec4 v00000000011b8fc0_0; - %sub; - %store/vec4 v00000000011b9420_0, 0, 32; - %jmp T_8.24; -T_8.2 ; - %load/vec4 v00000000011b8e80_0; - %load/vec4 v00000000011b8fc0_0; - %mul; - %store/vec4 v00000000011b9420_0, 0, 32; - %jmp T_8.24; -T_8.3 ; - %load/vec4 v00000000011b8e80_0; - %load/vec4 v00000000011b8fc0_0; - %div/s; - %store/vec4 v00000000011b9420_0, 0, 32; - %jmp T_8.24; -T_8.4 ; - %load/vec4 v00000000011b8e80_0; - %load/vec4 v00000000011b8fc0_0; - %and; - %store/vec4 v00000000011b9420_0, 0, 32; - %jmp T_8.24; -T_8.5 ; - %load/vec4 v00000000011b8e80_0; - %load/vec4 v00000000011b8fc0_0; - %or; - %store/vec4 v00000000011b9420_0, 0, 32; - %jmp T_8.24; -T_8.6 ; - %load/vec4 v00000000011b8e80_0; - %load/vec4 v00000000011b8fc0_0; - %xor; - %store/vec4 v00000000011b9420_0, 0, 32; - %jmp T_8.24; -T_8.7 ; - %load/vec4 v00000000011b8fc0_0; - %ix/getv 4, v00000000011b9a60_0; - %shiftl 4; - %store/vec4 v00000000011b9420_0, 0, 32; - %jmp T_8.24; -T_8.8 ; - %load/vec4 v00000000011b8fc0_0; - %ix/getv 4, v00000000011b8e80_0; - %shiftl 4; - %store/vec4 v00000000011b9420_0, 0, 32; - %jmp T_8.24; -T_8.9 ; - %load/vec4 v00000000011b8fc0_0; - %ix/getv 4, v00000000011b9a60_0; - %shiftr 4; - %store/vec4 v00000000011b9420_0, 0, 32; - %jmp T_8.24; -T_8.10 ; - %load/vec4 v00000000011b8fc0_0; - %ix/getv 4, v00000000011b8e80_0; - %shiftr 4; - %store/vec4 v00000000011b9420_0, 0, 32; - %jmp T_8.24; -T_8.11 ; - %load/vec4 v00000000011b8fc0_0; - %ix/getv 4, v00000000011b9a60_0; - %shiftr 4; - %store/vec4 v00000000011b9420_0, 0, 32; - %jmp T_8.24; -T_8.12 ; - %load/vec4 v00000000011b8fc0_0; - %ix/getv 4, v00000000011b8e80_0; - %shiftr 4; - %store/vec4 v00000000011b9420_0, 0, 32; - %jmp T_8.24; -T_8.13 ; - %load/vec4 v00000000011b8e80_0; - %load/vec4 v00000000011b8fc0_0; - %cmp/e; - %jmp/0xz T_8.25, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000011ba0a0_0, 0, 1; - %jmp T_8.26; -T_8.25 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011ba0a0_0, 0, 1; -T_8.26 ; - %jmp T_8.24; -T_8.14 ; - %load/vec4 v00000000011b8e80_0; - %load/vec4 v00000000011b8fc0_0; - %cmp/s; - %jmp/0xz T_8.27, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000011ba0a0_0, 0, 1; - %jmp T_8.28; -T_8.27 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011ba0a0_0, 0, 1; -T_8.28 ; - %jmp T_8.24; -T_8.15 ; - %load/vec4 v00000000011b8e80_0; - %load/vec4 v00000000011b8fc0_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.29, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000011ba0a0_0, 0, 1; - %jmp T_8.30; -T_8.29 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011ba0a0_0, 0, 1; -T_8.30 ; - %jmp T_8.24; -T_8.16 ; - %load/vec4 v00000000011b8fc0_0; - %load/vec4 v00000000011b8e80_0; - %cmp/s; - %jmp/0xz T_8.31, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000011ba0a0_0, 0, 1; - %jmp T_8.32; -T_8.31 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011ba0a0_0, 0, 1; -T_8.32 ; - %jmp T_8.24; -T_8.17 ; - %load/vec4 v00000000011b8fc0_0; - %load/vec4 v00000000011b8e80_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.33, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000011ba0a0_0, 0, 1; - %jmp T_8.34; -T_8.33 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011ba0a0_0, 0, 1; -T_8.34 ; - %jmp T_8.24; -T_8.18 ; - %load/vec4 v00000000011b8e80_0; - %load/vec4 v00000000011b8fc0_0; - %cmp/ne; - %jmp/0xz T_8.35, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000011ba0a0_0, 0, 1; - %jmp T_8.36; -T_8.35 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011ba0a0_0, 0, 1; -T_8.36 ; - %jmp T_8.24; -T_8.19 ; - %load/vec4 v00000000011b8e80_0; - %store/vec4 v00000000011b9420_0, 0, 32; - %jmp T_8.24; -T_8.20 ; - %load/vec4 v00000000011b8e80_0; - %load/vec4 v00000000011b8fc0_0; - %cmp/s; - %jmp/0xz T_8.37, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v00000000011b9420_0, 0, 32; -T_8.37 ; - %jmp T_8.24; -T_8.21 ; - %load/vec4 v00000000011b8e80_0; - %load/vec4 v00000000011b8fc0_0; - %cmp/u; - %jmp/0xz T_8.39, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v00000000011b9420_0, 0, 32; -T_8.39 ; - %jmp T_8.24; -T_8.22 ; - %load/vec4 v00000000011b8e80_0; - %load/vec4 v00000000011b8fc0_0; - %mul; - %store/vec4 v00000000011b9420_0, 0, 32; - %jmp T_8.24; -T_8.23 ; - %load/vec4 v00000000011b8e80_0; - %load/vec4 v00000000011b8fc0_0; - %div; - %store/vec4 v00000000011b9420_0, 0, 32; - %jmp T_8.24; -T_8.24 ; - %pop/vec4 1; - %jmp T_8; - .thread T_8, $push; - .scope S_00000000011bb580; -T_9 ; - %pushi/vec4 3217031168, 0, 32; - %store/vec4 v0000000001213a30_0, 0, 32; - %end; - .thread T_9, $init; - .scope S_00000000011bb580; -T_10 ; -Ewait_2 .event/or E_0000000001196580, E_0x0; - %wait Ewait_2; - %load/vec4 v0000000001213490_0; - %store/vec4 v00000000012138f0_0, 0, 32; - %load/vec4 v0000000001214070_0; - %store/vec4 v00000000011b8c00_0, 0, 32; - %load/vec4 v0000000001212db0_0; - %store/vec4 v00000000011b8a20_0, 0, 1; - %load/vec4 v0000000001213030_0; - %store/vec4 v00000000011b87a0_0, 0, 1; - %load/vec4 v0000000001214110_0; - %store/vec4 v00000000011b8ca0_0, 0, 32; - %jmp T_10; - .thread T_10, $push; - .scope S_00000000011bb580; -T_11 ; -Ewait_3 .event/or E_0000000001196540, E_0x0; - %wait Ewait_3; - %load/vec4 v00000000012137b0_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.2, 6; - %jmp T_11.3; -T_11.0 ; - %load/vec4 v0000000001213df0_0; - %parti/s 5, 16, 6; - %store/vec4 v0000000001213fd0_0, 0, 5; - %jmp T_11.3; -T_11.1 ; - %load/vec4 v0000000001213df0_0; - %parti/s 5, 11, 5; - %store/vec4 v0000000001213fd0_0, 0, 5; - %jmp T_11.3; -T_11.2 ; - %pushi/vec4 31, 0, 5; - %store/vec4 v0000000001213fd0_0, 0, 5; - %jmp T_11.3; -T_11.3 ; - %pop/vec4 1; - %load/vec4 v00000000012144d0_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.6, 6; - %jmp T_11.7; -T_11.4 ; - %load/vec4 v0000000001214070_0; - %store/vec4 v0000000001213170_0, 0, 32; - %jmp T_11.7; -T_11.5 ; - %load/vec4 v00000000011b85c0_0; - %store/vec4 v0000000001213170_0, 0, 32; - %jmp T_11.7; -T_11.6 ; - %load/vec4 v0000000001213a30_0; - %addi 8, 0, 32; - %store/vec4 v0000000001213170_0, 0, 32; - %jmp T_11.7; -T_11.7 ; - %pop/vec4 1; - %load/vec4 v0000000001213850_0; - %dup/vec4; - %pushi/vec4 1, 0, 1; - %cmp/u; - %jmp/1 T_11.8, 6; - %dup/vec4; - %pushi/vec4 0, 0, 1; - %cmp/u; - %jmp/1 T_11.9, 6; - %jmp T_11.10; -T_11.8 ; - %load/vec4 v0000000001213df0_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v0000000001213df0_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %store/vec4 v00000000011292f0_0, 0, 32; - %jmp T_11.10; -T_11.9 ; - %load/vec4 v0000000001214110_0; - %store/vec4 v00000000011292f0_0, 0, 32; - %jmp T_11.10; -T_11.10 ; - %pop/vec4 1; - %jmp T_11; - .thread T_11, $push; - .scope S_00000000011ba580; -T_12 ; - %vpi_call/w 3 36 "$dumpfile", "mips_cpu_harvard.vcd" {0 0 0}; - %vpi_call/w 3 37 "$dumpvars", 32'sb00000000000000000000000000000000, S_00000000011ba580 {0 0 0}; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001215040_0, 0, 1; - %pushi/vec4 100, 0, 32; -T_12.0 %dup/vec4; - %pushi/vec4 0, 0, 32; - %cmp/s; - %jmp/1xz T_12.1, 5; - %jmp/1 T_12.1, 4; - %pushi/vec4 1, 0, 32; - %sub; - %delay 10, 0; - %load/vec4 v0000000001215040_0; - %nor/r; - %store/vec4 v0000000001215040_0, 0, 1; - %delay 10, 0; - %load/vec4 v0000000001215040_0; - %nor/r; - %store/vec4 v0000000001215040_0, 0, 1; - %jmp T_12.0; -T_12.1 ; - %pop/vec4 1; - %vpi_call/w 3 47 "$fatal", 32'sb00000000000000000000000000000010, "Simulation did not finish within %d cycles.", P_0000000001183a28 {0 0 0}; - %end; - .thread T_12; - .scope S_00000000011ba580; -T_13 ; - %vpi_call/w 3 51 "$display", "Initial Reset 0" {0 0 0}; - %pushi/vec4 0, 0, 1; - %assign/vec4 v0000000001215900_0, 0; - %vpi_call/w 3 55 "$display", "Initial Reset 1" {0 0 0}; - %wait E_0000000001190b80; - %pushi/vec4 1, 0, 1; - %assign/vec4 v0000000001215900_0, 0; - %vpi_call/w 3 59 "$display", "Initial Reset 0: Start Program" {0 0 0}; - %wait E_0000000001190b80; - %pushi/vec4 0, 0, 1; - %assign/vec4 v0000000001215900_0, 0; - %wait E_0000000001190b80; - %load/vec4 v0000000001215f40_0; - %pad/u 32; - %cmpi/e 1, 0, 32; - %jmp/0xz T_13.0, 4; - %jmp T_13.1; -T_13.0 ; - %vpi_call/w 3 65 "$display", "TB: CPU did not set active=1 after reset." {0 0 0}; -T_13.1 ; -T_13.2 ; - %load/vec4 v0000000001215f40_0; - %flag_set/vec4 8; - %jmp/0xz T_13.3, 8; - %wait E_0000000001190b80; - %vpi_call/w 3 71 "$display", "Reg File Write data: %d", v0000000001213170_0 {0 0 0}; - %jmp T_13.2; -T_13.3 ; - %wait E_0000000001190b80; - %vpi_call/w 3 74 "$display", "TB: CPU Halt; active=0" {0 0 0}; - %vpi_call/w 3 75 "$display", "Output:" {0 0 0}; - %vpi_call/w 3 76 "$display", "%d", v00000000012154a0_0 {0 0 0}; - %vpi_call/w 3 77 "$finish" {0 0 0}; - %end; - .thread T_13; -# The file index is used to find the file name in the following table. -:file_names 10; - "N/A"; - ""; - "-"; - "testbench/mips_cpu_harvard_tb.v"; - "rtl/mips_cpu_harvard.v"; - "rtl/mips_cpu_alu.v"; - "rtl/mips_cpu_control.v"; - "rtl/mips_cpu_pc.v"; - "rtl/mips_cpu_regfile.v"; - "rtl/mips_cpu_memory.v"; diff --git a/exec/mips_cpu_harvard_tb_srl b/exec/mips_cpu_harvard_tb_srl deleted file mode 100644 index d826034..0000000 --- a/exec/mips_cpu_harvard_tb_srl +++ /dev/null @@ -1,2738 +0,0 @@ -#! /usr/local/iverilog/bin/vvp -:ivl_version "11.0 (devel)"; -:ivl_delay_selection "TYPICAL"; -:vpi_time_precision + 0; -:vpi_module "C:\iverilog\lib\ivl\system.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_sys.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_textio.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2005_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\va_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2009.vpi"; -S_00000000012cc010 .scope package, "$unit" "$unit" 2 1; - .timescale 0 0; -S_00000000012ca580 .scope module, "mips_cpu_harvard_tb" "mips_cpu_harvard_tb" 3 1; - .timescale 0 0; -P_0000000000933270 .param/str "RAM_INIT_FILE" 0 3 3, "inputs/srl.txt"; -P_00000000009332a8 .param/l "TIMEOUT_CYCLES" 0 3 4, +C4<00000000000000000000000001100100>; -v0000000001325cc0_0 .net "active", 0 0, v00000000012ca460_0; 1 drivers -v00000000013259a0_0 .var "clk", 0 0; -v0000000001324e60_0 .var "clk_enable", 0 0; -v0000000001326300_0 .net "data_address", 31 0, v00000000012ca000_0; 1 drivers -v0000000001325360_0 .net "data_read", 0 0, v00000000012c9d80_0; 1 drivers -v0000000001325ea0_0 .net "data_readdata", 31 0, L_0000000001324f00; 1 drivers -v00000000013269e0_0 .net "data_write", 0 0, v00000000012c91a0_0; 1 drivers -v00000000013252c0_0 .net "data_writedata", 31 0, v00000000012c94c0_0; 1 drivers -v0000000001325c20_0 .net "instr_address", 31 0, v0000000001323d50_0; 1 drivers -v0000000001325f40_0 .net "instr_readdata", 31 0, L_0000000001324b40; 1 drivers -v0000000001326260_0 .net "register_v0", 31 0, L_00000000012bb460; 1 drivers -v00000000013261c0_0 .var "reset", 0 0; -S_00000000012cb580 .scope module, "cpuInst" "mips_cpu_harvard" 3 19, 4 1 0, S_00000000012ca580; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "reset"; - .port_info 2 /OUTPUT 1 "active"; - .port_info 3 /OUTPUT 32 "register_v0"; - .port_info 4 /INPUT 1 "clk_enable"; - .port_info 5 /OUTPUT 32 "instr_address"; - .port_info 6 /INPUT 32 "instr_readdata"; - .port_info 7 /OUTPUT 32 "data_address"; - .port_info 8 /OUTPUT 1 "data_write"; - .port_info 9 /OUTPUT 1 "data_read"; - .port_info 10 /OUTPUT 32 "data_writedata"; - .port_info 11 /INPUT 32 "data_readdata"; -v00000000012c9240_0 .net "active", 0 0, v00000000012ca460_0; alias, 1 drivers -v00000000012c9c40_0 .net "clk", 0 0, v00000000013259a0_0; 1 drivers -v00000000012c8de0_0 .net "clk_enable", 0 0, v0000000001324e60_0; 1 drivers -v00000000012ca000_0 .var "data_address", 31 0; -v00000000012c9d80_0 .var "data_read", 0 0; -v00000000012c8fc0_0 .net "data_readdata", 31 0, L_0000000001324f00; alias, 1 drivers -v00000000012c91a0_0 .var "data_write", 0 0; -v00000000012c94c0_0 .var "data_writedata", 31 0; -v00000000008d8cb0_0 .var "in_B", 31 0; -v0000000001323170_0 .net "in_opcode", 5 0, L_0000000001326120; 1 drivers -v0000000001323f30_0 .net "in_pc_in", 31 0, v00000000012c9600_0; 1 drivers -v0000000001322d10_0 .net "in_readreg1", 4 0, L_0000000001325d60; 1 drivers -v0000000001323b70_0 .net "in_readreg2", 4 0, L_0000000001325e00; 1 drivers -v0000000001324570_0 .var "in_writedata", 31 0; -v0000000001322f90_0 .var "in_writereg", 4 0; -v0000000001323d50_0 .var "instr_address", 31 0; -v0000000001324390_0 .net "instr_readdata", 31 0, L_0000000001324b40; alias, 1 drivers -v0000000001323c10_0 .net "out_ALUCond", 0 0, v00000000012c88e0_0; 1 drivers -v00000000013241b0_0 .net "out_ALUOp", 4 0, v00000000012ca280_0; 1 drivers -v0000000001323fd0_0 .net "out_ALURes", 31 0, v00000000012c85c0_0; 1 drivers -v0000000001324930_0 .net "out_ALUSrc", 0 0, v00000000012c9740_0; 1 drivers -v0000000001323670_0 .net "out_MemRead", 0 0, v00000000012ca320_0; 1 drivers -v0000000001322db0_0 .net "out_MemWrite", 0 0, v00000000012ca140_0; 1 drivers -v0000000001322b30_0 .net "out_MemtoReg", 1 0, v00000000012c9560_0; 1 drivers -v00000000013235d0_0 .net "out_PC", 1 0, v00000000012c8ca0_0; 1 drivers -v0000000001324070_0 .net "out_RegDst", 1 0, v00000000012ca1e0_0; 1 drivers -v00000000013233f0_0 .net "out_RegWrite", 0 0, v00000000012c97e0_0; 1 drivers -v0000000001322bd0_0 .var "out_pc_out", 31 0; -v0000000001322c70_0 .net "out_readdata1", 31 0, v00000000012c8b60_0; 1 drivers -v0000000001323cb0_0 .net "out_readdata2", 31 0, v00000000012c9b00_0; 1 drivers -v0000000001324110_0 .net "out_shamt", 4 0, v00000000012ca3c0_0; 1 drivers -v0000000001323df0_0 .net "register_v0", 31 0, L_00000000012bb460; alias, 1 drivers -v0000000001323210_0 .net "reset", 0 0, v00000000013261c0_0; 1 drivers -E_0000000000947300/0 .event edge, v00000000012ca1e0_0, v00000000012c8d40_0, v00000000012c8d40_0, v00000000012c9560_0; -E_0000000000947300/1 .event edge, v00000000012c85c0_0, v00000000012c8fc0_0, v00000000012c8700_0, v00000000012c9740_0; -E_0000000000947300/2 .event edge, v00000000012c8d40_0, v00000000012c8d40_0, v00000000012c9b00_0; -E_0000000000947300 .event/or E_0000000000947300/0, E_0000000000947300/1, E_0000000000947300/2; -E_0000000000946700/0 .event edge, v00000000012c9600_0, v00000000012c85c0_0, v00000000012ca140_0, v00000000012ca320_0; -E_0000000000946700/1 .event edge, v00000000012c9b00_0; -E_0000000000946700 .event/or E_0000000000946700/0, E_0000000000946700/1; -L_0000000001325d60 .part L_0000000001324b40, 21, 5; -L_0000000001325e00 .part L_0000000001324b40, 16, 5; -L_0000000001326120 .part L_0000000001324b40, 26, 6; -S_00000000012cb710 .scope module, "alu" "mips_cpu_alu" 4 121, 5 1 0, S_00000000012cb580; - .timescale 0 0; - .port_info 0 /INPUT 32 "A"; - .port_info 1 /INPUT 32 "B"; - .port_info 2 /INPUT 5 "ALUOp"; - .port_info 3 /INPUT 5 "shamt"; - .port_info 4 /OUTPUT 1 "ALUCond"; - .port_info 5 /OUTPUT 32 "ALURes"; -enum00000000012abd00 .enum4 (5) - "ADD" 5'b00000, - "SUB" 5'b00001, - "MUL" 5'b00010, - "DIV" 5'b00011, - "AND" 5'b00100, - "OR" 5'b00101, - "XOR" 5'b00110, - "SLL" 5'b00111, - "SLLV" 5'b01000, - "SRL" 5'b01001, - "SRLV" 5'b01010, - "SRA" 5'b01011, - "SRAV" 5'b01100, - "EQ" 5'b01101, - "LES" 5'b01110, - "LEQ" 5'b01111, - "GRT" 5'b10000, - "GEQ" 5'b10001, - "NEQ" 5'b10010, - "PAS" 5'b10011, - "SLT" 5'b10100, - "SLTU" 5'b10101, - "MULU" 5'b10110, - "DIVU" 5'b10111 - ; -L_00000000012bb310 .functor BUFZ 5, v00000000012ca280_0, C4<00000>, C4<00000>, C4<00000>; -v00000000012c9100_0 .net "A", 31 0, v00000000012c8b60_0; alias, 1 drivers -v00000000012c88e0_0 .var "ALUCond", 0 0; -v00000000012c8e80_0 .net "ALUOp", 4 0, v00000000012ca280_0; alias, 1 drivers -v00000000012c9ce0_0 .net "ALUOps", 4 0, L_00000000012bb310; 1 drivers -v00000000012c85c0_0 .var/s "ALURes", 31 0; -v00000000012c9e20_0 .net "B", 31 0, v00000000008d8cb0_0; 1 drivers -v00000000012c8ac0_0 .net "shamt", 4 0, v00000000012ca3c0_0; alias, 1 drivers -E_00000000009404c0 .event edge, v00000000012c9ce0_0, v00000000012c9100_0, v00000000012c9e20_0, v00000000012c8ac0_0; -S_0000000000909390 .scope module, "control" "mips_cpu_control" 4 90, 6 1 0, S_00000000012cb580; - .timescale 0 0; - .port_info 0 /INPUT 32 "Instr"; - .port_info 1 /INPUT 1 "ALUCond"; - .port_info 2 /OUTPUT 2 "CtrlRegDst"; - .port_info 3 /OUTPUT 2 "CtrlPC"; - .port_info 4 /OUTPUT 1 "CtrlMemRead"; - .port_info 5 /OUTPUT 2 "CtrlMemtoReg"; - .port_info 6 /OUTPUT 5 "CtrlALUOp"; - .port_info 7 /OUTPUT 5 "Ctrlshamt"; - .port_info 8 /OUTPUT 1 "CtrlMemWrite"; - .port_info 9 /OUTPUT 1 "CtrlALUSrc"; - .port_info 10 /OUTPUT 1 "CtrlRegWrite"; -enum00000000012a9270 .enum4 (5) - "BLTZ" 5'b00000, - "BGEZ" 5'b00001, - "BLTZAL" 5'b10000, - "BGEZAL" 5'b10001 - ; -enum00000000012a9730 .enum4 (6) - "SPECIAL" 6'b000000, - "REGIMM" 6'b000001, - "J" 6'b000010, - "JAL" 6'b000011, - "BEQ" 6'b000100, - "BNE" 6'b000101, - "BLEZ" 6'b000110, - "BGTZ" 6'b000111, - "ADDI" 6'b001000, - "ADDIU" 6'b001001, - "SLTI" 6'b001010, - "SLTIU" 6'b001011, - "ANDI" 6'b001100, - "ORI" 6'b001101, - "XORI" 6'b001110, - "LUI" 6'b001111, - "LB" 6'b100000, - "LH" 6'b100001, - "LWL" 6'b100010, - "LW" 6'b100011, - "LBU" 6'b100100, - "LHU" 6'b100101, - "LWR" 6'b100110, - "SB" 6'b101000, - "SH" 6'b101001, - "SW" 6'b101011 - ; -enum00000000012ab7f0 .enum4 (6) - "SLL" 6'b000000, - "SRL" 6'b000010, - "SRA" 6'b000011, - "SLLV" 6'b000100, - "SRLV" 6'b000110, - "SRAV" 6'b000111, - "JR" 6'b001000, - "JALR" 6'b001001, - "MTHI" 6'b010001, - "MTLO" 6'b010011, - "MULT" 6'b011000, - "MULTU" 6'b011001, - "DIV" 6'b011010, - "DIVU" 6'b011011, - "ADDU" 6'b100001, - "SUBU" 6'b100011, - "AND" 6'b100100, - "OR" 6'b100101, - "XOR" 6'b100110, - "SLT" 6'b101010, - "SLTU" 6'b101011 - ; -v00000000012c8f20_0 .net "ALUCond", 0 0, v00000000012c88e0_0; alias, 1 drivers -v00000000012ca280_0 .var "CtrlALUOp", 4 0; -v00000000012c9740_0 .var "CtrlALUSrc", 0 0; -v00000000012ca320_0 .var "CtrlMemRead", 0 0; -v00000000012ca140_0 .var "CtrlMemWrite", 0 0; -v00000000012c9560_0 .var "CtrlMemtoReg", 1 0; -v00000000012c8ca0_0 .var "CtrlPC", 1 0; -v00000000012ca1e0_0 .var "CtrlRegDst", 1 0; -v00000000012c97e0_0 .var "CtrlRegWrite", 0 0; -v00000000012ca3c0_0 .var "Ctrlshamt", 4 0; -v00000000012c8d40_0 .net "Instr", 31 0, L_0000000001324b40; alias, 1 drivers -v00000000012c96a0_0 .net "funct", 5 0, L_0000000001324d20; 1 drivers -v00000000012c9060_0 .net "op", 5 0, L_0000000001325720; 1 drivers -v00000000012c8a20_0 .net "rt", 4 0, L_0000000001326440; 1 drivers -E_0000000000947440/0 .event edge, v00000000012c9060_0, v00000000012c96a0_0, v00000000012c88e0_0, v00000000012c8a20_0; -E_0000000000947440/1 .event edge, v00000000012c8d40_0; -E_0000000000947440 .event/or E_0000000000947440/0, E_0000000000947440/1; -L_0000000001325720 .part L_0000000001324b40, 26, 6; -L_0000000001324d20 .part L_0000000001324b40, 0, 6; -L_0000000001326440 .part L_0000000001324b40, 16, 5; -S_0000000000909520 .scope module, "pc" "pc" 4 79, 7 1 0, S_00000000012cb580; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "rst"; - .port_info 2 /INPUT 2 "pc_ctrl"; - .port_info 3 /INPUT 32 "pc_in"; - .port_info 4 /INPUT 5 "rs"; - .port_info 5 /OUTPUT 32 "pc_out"; - .port_info 6 /OUTPUT 1 "active"; -v00000000012ca460_0 .var "active", 0 0; -v00000000012c9a60_0 .net "clk", 0 0, v00000000013259a0_0; alias, 1 drivers -v00000000012c9380_0 .net "pc_ctrl", 1 0, v00000000012c8ca0_0; alias, 1 drivers -v00000000012c8660_0 .var "pc_curr", 31 0; -v00000000012c8700_0 .net "pc_in", 31 0, v0000000001322bd0_0; 1 drivers -v00000000012c9600_0 .var "pc_out", 31 0; -o00000000012cd1d8 .functor BUFZ 5, C4; HiZ drive -v00000000012c87a0_0 .net "rs", 4 0, o00000000012cd1d8; 0 drivers -v00000000012c8840_0 .net "rst", 0 0, v00000000013261c0_0; alias, 1 drivers -E_00000000009408c0 .event posedge, v00000000012c9a60_0; -S_00000000009096b0 .scope module, "regfile" "mips_cpu_regfile" 4 106, 8 1 0, S_00000000012cb580; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 5 "readreg1"; - .port_info 2 /INPUT 5 "readreg2"; - .port_info 3 /INPUT 5 "writereg"; - .port_info 4 /INPUT 32 "writedata"; - .port_info 5 /INPUT 1 "regwrite"; - .port_info 6 /INPUT 6 "opcode"; - .port_info 7 /OUTPUT 32 "readdata1"; - .port_info 8 /OUTPUT 32 "readdata2"; - .port_info 9 /OUTPUT 32 "regv0"; -v00000000012c9420_2 .array/port v00000000012c9420, 2; -L_00000000012bb460 .functor BUFZ 32, v00000000012c9420_2, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; -v00000000012c8980_0 .net "clk", 0 0, v00000000013259a0_0; alias, 1 drivers -v00000000012c9420 .array "memory", 0 31, 31 0; -v00000000012c9880_0 .net "opcode", 5 0, L_0000000001326120; alias, 1 drivers -v00000000012c8b60_0 .var "readdata1", 31 0; -v00000000012c9b00_0 .var "readdata2", 31 0; -v00000000012c99c0_0 .net "readreg1", 4 0, L_0000000001325d60; alias, 1 drivers -v00000000012c9f60_0 .net "readreg2", 4 0, L_0000000001325e00; alias, 1 drivers -v00000000012c92e0_0 .net "regv0", 31 0, L_00000000012bb460; alias, 1 drivers -v00000000012ca0a0_0 .net "regwrite", 0 0, v00000000012c97e0_0; alias, 1 drivers -v00000000012c9ba0_0 .net "writedata", 31 0, v0000000001324570_0; 1 drivers -v00000000012c8c00_0 .net "writereg", 4 0, v0000000001322f90_0; 1 drivers -E_0000000000940980 .event negedge, v00000000012c9a60_0; -v00000000012c9420_0 .array/port v00000000012c9420, 0; -v00000000012c9420_1 .array/port v00000000012c9420, 1; -E_0000000000940880/0 .event edge, v00000000012c99c0_0, v00000000012c9420_0, v00000000012c9420_1, v00000000012c9420_2; -v00000000012c9420_3 .array/port v00000000012c9420, 3; -v00000000012c9420_4 .array/port v00000000012c9420, 4; -v00000000012c9420_5 .array/port v00000000012c9420, 5; -v00000000012c9420_6 .array/port v00000000012c9420, 6; -E_0000000000940880/1 .event edge, v00000000012c9420_3, v00000000012c9420_4, v00000000012c9420_5, v00000000012c9420_6; -v00000000012c9420_7 .array/port v00000000012c9420, 7; -v00000000012c9420_8 .array/port v00000000012c9420, 8; -v00000000012c9420_9 .array/port v00000000012c9420, 9; -v00000000012c9420_10 .array/port v00000000012c9420, 10; -E_0000000000940880/2 .event edge, v00000000012c9420_7, v00000000012c9420_8, v00000000012c9420_9, v00000000012c9420_10; -v00000000012c9420_11 .array/port v00000000012c9420, 11; -v00000000012c9420_12 .array/port v00000000012c9420, 12; -v00000000012c9420_13 .array/port v00000000012c9420, 13; -v00000000012c9420_14 .array/port v00000000012c9420, 14; -E_0000000000940880/3 .event edge, v00000000012c9420_11, v00000000012c9420_12, v00000000012c9420_13, v00000000012c9420_14; -v00000000012c9420_15 .array/port v00000000012c9420, 15; -v00000000012c9420_16 .array/port v00000000012c9420, 16; -v00000000012c9420_17 .array/port v00000000012c9420, 17; -v00000000012c9420_18 .array/port v00000000012c9420, 18; -E_0000000000940880/4 .event edge, v00000000012c9420_15, v00000000012c9420_16, v00000000012c9420_17, v00000000012c9420_18; -v00000000012c9420_19 .array/port v00000000012c9420, 19; -v00000000012c9420_20 .array/port v00000000012c9420, 20; -v00000000012c9420_21 .array/port v00000000012c9420, 21; -v00000000012c9420_22 .array/port v00000000012c9420, 22; -E_0000000000940880/5 .event edge, v00000000012c9420_19, v00000000012c9420_20, v00000000012c9420_21, v00000000012c9420_22; -v00000000012c9420_23 .array/port v00000000012c9420, 23; -v00000000012c9420_24 .array/port v00000000012c9420, 24; -v00000000012c9420_25 .array/port v00000000012c9420, 25; -v00000000012c9420_26 .array/port v00000000012c9420, 26; -E_0000000000940880/6 .event edge, v00000000012c9420_23, v00000000012c9420_24, v00000000012c9420_25, v00000000012c9420_26; -v00000000012c9420_27 .array/port v00000000012c9420, 27; -v00000000012c9420_28 .array/port v00000000012c9420, 28; -v00000000012c9420_29 .array/port v00000000012c9420, 29; -v00000000012c9420_30 .array/port v00000000012c9420, 30; -E_0000000000940880/7 .event edge, v00000000012c9420_27, v00000000012c9420_28, v00000000012c9420_29, v00000000012c9420_30; -v00000000012c9420_31 .array/port v00000000012c9420, 31; -E_0000000000940880/8 .event edge, v00000000012c9420_31, v00000000012c9f60_0; -E_0000000000940880 .event/or E_0000000000940880/0, E_0000000000940880/1, E_0000000000940880/2, E_0000000000940880/3, E_0000000000940880/4, E_0000000000940880/5, E_0000000000940880/6, E_0000000000940880/7, E_0000000000940880/8; -S_00000000008f91d0 .scope begin, "$unm_blk_121" "$unm_blk_121" 8 16, 8 16 0, S_00000000009096b0; - .timescale 0 0; -v00000000012c9ec0_0 .var/i "i", 31 0; -S_00000000008f9470 .scope module, "ramInst" "mips_cpu_memory" 3 9, 9 1 0, S_00000000012ca580; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 32 "data_address"; - .port_info 2 /INPUT 1 "data_write"; - .port_info 3 /INPUT 1 "data_read"; - .port_info 4 /INPUT 32 "data_writedata"; - .port_info 5 /OUTPUT 32 "data_readdata"; - .port_info 6 /INPUT 32 "instr_address"; - .port_info 7 /OUTPUT 32 "instr_readdata"; -P_00000000009409c0 .param/str "RAM_INIT_FILE" 0 9 16, "inputs/srl.txt"; -L_00000000012bb000 .functor AND 1, L_0000000001325220, L_0000000001326940, C4<1>, C4<1>; -v00000000013249d0_0 .net *"_ivl_0", 31 0, L_0000000001325400; 1 drivers -L_0000000001327ba8 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v0000000001322e50_0 .net/2u *"_ivl_12", 31 0, L_0000000001327ba8; 1 drivers -v0000000001323710_0 .net *"_ivl_14", 0 0, L_0000000001325220; 1 drivers -L_0000000001327bf0 .functor BUFT 1, C4<10111111110000000000000001000000>, C4<0>, C4<0>, C4<0>; -v0000000001323490_0 .net/2u *"_ivl_16", 31 0, L_0000000001327bf0; 1 drivers -v0000000001322ef0_0 .net *"_ivl_18", 0 0, L_0000000001326940; 1 drivers -v0000000001324430_0 .net *"_ivl_2", 31 0, L_0000000001326620; 1 drivers -v0000000001324250_0 .net *"_ivl_21", 0 0, L_00000000012bb000; 1 drivers -v0000000001323530_0 .net *"_ivl_22", 31 0, L_0000000001326080; 1 drivers -L_0000000001327c38 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v00000000013237b0_0 .net/2u *"_ivl_24", 31 0, L_0000000001327c38; 1 drivers -v0000000001323850_0 .net *"_ivl_26", 31 0, L_0000000001325ae0; 1 drivers -v00000000013244d0_0 .net *"_ivl_28", 31 0, L_00000000013266c0; 1 drivers -v00000000013232b0_0 .net *"_ivl_30", 29 0, L_00000000013255e0; 1 drivers -L_0000000001327c80 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v00000000013242f0_0 .net *"_ivl_32", 1 0, L_0000000001327c80; 1 drivers -L_0000000001327cc8 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v0000000001323030_0 .net *"_ivl_34", 31 0, L_0000000001327cc8; 1 drivers -v0000000001323990_0 .net *"_ivl_4", 29 0, L_00000000013263a0; 1 drivers -L_0000000001327b18 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0000000001324610_0 .net *"_ivl_6", 1 0, L_0000000001327b18; 1 drivers -L_0000000001327b60 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v00000000013230d0_0 .net *"_ivl_8", 31 0, L_0000000001327b60; 1 drivers -v00000000013246b0_0 .net "clk", 0 0, v00000000013259a0_0; alias, 1 drivers -v0000000001324750_0 .net "data_address", 31 0, v00000000012ca000_0; alias, 1 drivers -v0000000001323a30 .array "data_memory", 63 0, 31 0; -v0000000001323350_0 .net "data_read", 0 0, v00000000012c9d80_0; alias, 1 drivers -v0000000001323ad0_0 .net "data_readdata", 31 0, L_0000000001324f00; alias, 1 drivers -v00000000013247f0_0 .net "data_write", 0 0, v00000000012c91a0_0; alias, 1 drivers -v0000000001324890_0 .net "data_writedata", 31 0, v00000000012c94c0_0; alias, 1 drivers -v0000000001325b80_0 .net "instr_address", 31 0, v0000000001323d50_0; alias, 1 drivers -v0000000001325fe0 .array "instr_memory", 63 0, 31 0; -v0000000001325180_0 .net "instr_readdata", 31 0, L_0000000001324b40; alias, 1 drivers -L_0000000001325400 .array/port v0000000001323a30, L_0000000001326620; -L_00000000013263a0 .part v00000000012ca000_0, 2, 30; -L_0000000001326620 .concat [ 30 2 0 0], L_00000000013263a0, L_0000000001327b18; -L_0000000001324f00 .functor MUXZ 32, L_0000000001327b60, L_0000000001325400, v00000000012c9d80_0, C4<>; -L_0000000001325220 .cmp/ge 32, v0000000001323d50_0, L_0000000001327ba8; -L_0000000001326940 .cmp/gt 32, L_0000000001327bf0, v0000000001323d50_0; -L_0000000001326080 .array/port v0000000001325fe0, L_00000000013266c0; -L_0000000001325ae0 .arith/sub 32, v0000000001323d50_0, L_0000000001327c38; -L_00000000013255e0 .part L_0000000001325ae0, 2, 30; -L_00000000013266c0 .concat [ 30 2 0 0], L_00000000013255e0, L_0000000001327c80; -L_0000000001324b40 .functor MUXZ 32, L_0000000001327cc8, L_0000000001326080, L_00000000012bb000, C4<>; -S_00000000008ee5e0 .scope begin, "$unm_blk_104" "$unm_blk_104" 9 21, 9 21 0, S_00000000008f9470; - .timescale 0 0; -v00000000013238f0_0 .var/i "i", 31 0; -S_00000000008b2680 .scope begin, "$ivl_for_loop0" "$ivl_for_loop0" 9 36, 9 36 0, S_00000000008ee5e0; - .timescale 0 0; -v0000000001323e90_0 .var/i "j", 31 0; - .scope S_00000000008f9470; -T_0 ; - %fork t_1, S_00000000008ee5e0; - %jmp t_0; - .scope S_00000000008ee5e0; -t_1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000013238f0_0, 0, 32; -T_0.0 ; - %load/vec4 v00000000013238f0_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v00000000013238f0_0; - %store/vec4a v0000000001323a30, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000013238f0_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000013238f0_0, 0, 32; - %jmp T_0.0; -T_0.1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000013238f0_0, 0, 32; -T_0.2 ; - %load/vec4 v00000000013238f0_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.3, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v00000000013238f0_0; - %store/vec4a v0000000001325fe0, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000013238f0_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000013238f0_0, 0, 32; - %jmp T_0.2; -T_0.3 ; - %vpi_call/w 9 32 "$display", "RAM: Loading RAM contents from %s", P_00000000009409c0 {0 0 0}; - %vpi_call/w 9 33 "$readmemh", P_00000000009409c0, v0000000001325fe0 {0 0 0}; - %fork t_3, S_00000000008b2680; - %jmp t_2; - .scope S_00000000008b2680; -t_3 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v0000000001323e90_0, 0, 32; -T_0.4 ; - %load/vec4 v0000000001323e90_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.5, 5; - %pushi/vec4 3217031168, 0, 32; - %load/vec4 v0000000001323e90_0; - %muli 4, 0, 32; - %add; - %vpi_call/w 9 37 "$display", "byte +%h: %h", S<0,vec4,u32>, &A {1 0 0}; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0000000001323e90_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v0000000001323e90_0, 0, 32; - %jmp T_0.4; -T_0.5 ; - %end; - .scope S_00000000008ee5e0; -t_2 %join; - %end; - .scope S_00000000008f9470; -t_0 %join; - %end; - .thread T_0; - .scope S_00000000008f9470; -T_1 ; - %wait E_00000000009408c0; - %load/vec4 v0000000001323350_0; - %nor/r; - %load/vec4 v00000000013247f0_0; - %and; - %flag_set/vec4 8; - %jmp/0xz T_1.0, 8; - %load/vec4 v0000000001325b80_0; - %load/vec4 v0000000001324750_0; - %cmp/ne; - %jmp/0xz T_1.2, 4; - %load/vec4 v0000000001324890_0; - %load/vec4 v0000000001324750_0; - %ix/load 4, 2, 0; - %flag_set/imm 4, 0; - %shiftr 4; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001323a30, 0, 4; -T_1.2 ; -T_1.0 ; - %jmp T_1; - .thread T_1; - .scope S_0000000000909520; -T_2 ; - %load/vec4 v00000000012c8700_0; - %store/vec4 v00000000012c9600_0, 0, 32; - %end; - .thread T_2; - .scope S_0000000000909520; -T_3 ; - %wait E_00000000009408c0; - %load/vec4 v00000000012c8840_0; - %flag_set/vec4 8; - %jmp/0xz T_3.0, 8; - %pushi/vec4 1, 0, 1; - %assign/vec4 v00000000012ca460_0, 0; - %pushi/vec4 3217031168, 0, 32; - %assign/vec4 v00000000012c9600_0, 0; - %jmp T_3.1; -T_3.0 ; - %load/vec4 v00000000012c9600_0; - %cmpi/ne 0, 0, 32; - %jmp/0xz T_3.2, 4; - %load/vec4 v00000000012ca460_0; - %assign/vec4 v00000000012ca460_0, 0; - %load/vec4 v00000000012c9380_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_3.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_3.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_3.6, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_3.7, 6; - %jmp T_3.8; -T_3.4 ; - %load/vec4 v00000000012c9600_0; - %assign/vec4 v00000000012c8660_0, 0; - %load/vec4 v00000000012c8660_0; - %addi 4, 0, 32; - %assign/vec4 v00000000012c9600_0, 0; - %vpi_call/w 7 27 "$display", "New PC from %h to %h", v00000000012c8660_0, v00000000012c9600_0 {0 0 0}; - %jmp T_3.8; -T_3.5 ; - %load/vec4 v00000000012c8700_0; - %assign/vec4 v00000000012c9600_0, 0; - %jmp T_3.8; -T_3.6 ; - %load/vec4 v00000000012c8700_0; - %assign/vec4 v00000000012c9600_0, 0; - %jmp T_3.8; -T_3.7 ; - %vpi_call/w 7 36 "$display", "JUMP REGISTER" {0 0 0}; - %pushi/vec4 0, 0, 32; - %assign/vec4 v00000000012c9600_0, 0; - %jmp T_3.8; -T_3.8 ; - %pop/vec4 1; - %jmp T_3.3; -T_3.2 ; - %load/vec4 v00000000012c9600_0; - %cmpi/e 0, 0, 32; - %jmp/0xz T_3.9, 4; - %pushi/vec4 0, 0, 1; - %assign/vec4 v00000000012ca460_0, 0; -T_3.9 ; -T_3.3 ; -T_3.1 ; - %jmp T_3; - .thread T_3; - .scope S_0000000000909390; -T_4 ; - %wait E_0000000000947440; - %vpi_call/w 6 86 "$display", "Opcode: %h", v00000000012c9060_0 {0 0 0}; - %load/vec4 v00000000012c9060_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.0, 4; - %pushi/vec4 0, 0, 2; - %store/vec4 v00000000012ca1e0_0, 0, 2; - %vpi_call/w 6 89 "$display", "CTRLREGDST: Rt" {0 0 0}; - %jmp T_4.1; -T_4.0 ; - %load/vec4 v00000000012c9060_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.2, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v00000000012ca1e0_0, 0, 2; - %vpi_call/w 6 92 "$display", "CTRLREGDST: Rd" {0 0 0}; - %jmp T_4.3; -T_4.2 ; - %load/vec4 v00000000012c9060_0; - %cmpi/e 3, 0, 6; - %jmp/0xz T_4.4, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v00000000012ca1e0_0, 0, 2; - %vpi_call/w 6 95 "$display", "CTRLREGDST: Link" {0 0 0}; - %jmp T_4.5; -T_4.4 ; - %pushi/vec4 1, 1, 2; - %store/vec4 v00000000012ca1e0_0, 0, 2; - %vpi_call/w 6 96 "$display", "xxxxxxxxxxxxxx" {0 0 0}; -T_4.5 ; -T_4.3 ; -T_4.1 ; - %load/vec4 v00000000012c8f20_0; - %load/vec4 v00000000012c9060_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c9060_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c9060_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c9060_0; - %pushi/vec4 5, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c9060_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c8a20_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c8a20_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c8a20_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c8a20_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.6, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v00000000012c8ca0_0, 0, 2; - %jmp T_4.7; -T_4.6 ; - %load/vec4 v00000000012c9060_0; - %cmpi/e 2, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 3, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.8, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v00000000012c8ca0_0, 0, 2; - %jmp T_4.9; -T_4.8 ; - %load/vec4 v00000000012c96a0_0; - %cmpi/e 8, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012c96a0_0; - %cmpi/e 9, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.10, 4; - %pushi/vec4 3, 0, 2; - %store/vec4 v00000000012c8ca0_0, 0, 2; - %jmp T_4.11; -T_4.10 ; - %pushi/vec4 0, 0, 2; - %store/vec4 v00000000012c8ca0_0, 0, 2; -T_4.11 ; -T_4.9 ; -T_4.7 ; - %load/vec4 v00000000012c9060_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.12, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000012ca320_0, 0, 1; - %pushi/vec4 1, 0, 2; - %store/vec4 v00000000012c9560_0, 0, 2; - %vpi_call/w 6 112 "$display", "Memory read enabled" {0 0 0}; - %jmp T_4.13; -T_4.12 ; - %load/vec4 v00000000012c9060_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.14, 9; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000012ca320_0, 0, 1; - %pushi/vec4 0, 0, 2; - %store/vec4 v00000000012c9560_0, 0, 2; - %vpi_call/w 6 116 "$display", "Memory read disabled" {0 0 0}; - %jmp T_4.15; -T_4.14 ; - %load/vec4 v00000000012c9060_0; - %cmpi/e 3, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.16, 9; - %pushi/vec4 2, 0, 2; - %store/vec4 v00000000012c9560_0, 0, 2; - %jmp T_4.17; -T_4.16 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v00000000012ca320_0, 0, 1; -T_4.17 ; -T_4.15 ; -T_4.13 ; - %load/vec4 v00000000012c9060_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.18, 9; - %pushi/vec4 0, 0, 5; - %store/vec4 v00000000012ca280_0, 0, 5; - %vpi_call/w 6 124 "$display", "ALU OP = 0 (ADDU/ADDIU)" {0 0 0}; - %jmp T_4.19; -T_4.18 ; - %load/vec4 v00000000012c9060_0; - %cmpi/e 12, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.20, 9; - %pushi/vec4 4, 0, 5; - %store/vec4 v00000000012ca280_0, 0, 5; - %jmp T_4.21; -T_4.20 ; - %load/vec4 v00000000012c9060_0; - %cmpi/e 4, 0, 6; - %jmp/0xz T_4.22, 4; - %pushi/vec4 13, 0, 5; - %store/vec4 v00000000012ca280_0, 0, 5; - %jmp T_4.23; -T_4.22 ; - %load/vec4 v00000000012c9060_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c8a20_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c8a20_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.24, 8; - %pushi/vec4 17, 0, 5; - %store/vec4 v00000000012ca280_0, 0, 5; - %jmp T_4.25; -T_4.24 ; - %load/vec4 v00000000012c9060_0; - %cmpi/e 7, 0, 6; - %jmp/0xz T_4.26, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v00000000012ca280_0, 0, 5; - %jmp T_4.27; -T_4.26 ; - %load/vec4 v00000000012c9060_0; - %cmpi/e 6, 0, 6; - %jmp/0xz T_4.28, 4; - %pushi/vec4 15, 0, 5; - %store/vec4 v00000000012ca280_0, 0, 5; - %jmp T_4.29; -T_4.28 ; - %load/vec4 v00000000012c9060_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c8a20_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c8a20_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.30, 8; - %pushi/vec4 14, 0, 5; - %store/vec4 v00000000012ca280_0, 0, 5; - %jmp T_4.31; -T_4.30 ; - %load/vec4 v00000000012c9060_0; - %cmpi/e 5, 0, 6; - %jmp/0xz T_4.32, 4; - %pushi/vec4 18, 0, 5; - %store/vec4 v00000000012ca280_0, 0, 5; - %jmp T_4.33; -T_4.32 ; - %load/vec4 v00000000012c9060_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.34, 8; - %pushi/vec4 3, 0, 5; - %store/vec4 v00000000012ca280_0, 0, 5; - %jmp T_4.35; -T_4.34 ; - %load/vec4 v00000000012c9060_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.36, 8; - %pushi/vec4 23, 0, 5; - %store/vec4 v00000000012ca280_0, 0, 5; - %jmp T_4.37; -T_4.36 ; - %load/vec4 v00000000012c9060_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.38, 4; - %pushi/vec4 0, 0, 5; - %store/vec4 v00000000012ca280_0, 0, 5; - %jmp T_4.39; -T_4.38 ; - %load/vec4 v00000000012c9060_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.40, 4; - %pushi/vec4 7, 0, 5; - %store/vec4 v00000000012ca280_0, 0, 5; - %jmp T_4.41; -T_4.40 ; - %load/vec4 v00000000012c9060_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.42, 8; - %pushi/vec4 19, 0, 5; - %store/vec4 v00000000012ca280_0, 0, 5; - %jmp T_4.43; -T_4.42 ; - %load/vec4 v00000000012c9060_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.44, 8; - %pushi/vec4 2, 0, 5; - %store/vec4 v00000000012ca280_0, 0, 5; - %jmp T_4.45; -T_4.44 ; - %load/vec4 v00000000012c9060_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.46, 8; - %pushi/vec4 22, 0, 5; - %store/vec4 v00000000012ca280_0, 0, 5; - %jmp T_4.47; -T_4.46 ; - %load/vec4 v00000000012c9060_0; - %cmpi/e 13, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.48, 9; - %pushi/vec4 5, 0, 5; - %store/vec4 v00000000012ca280_0, 0, 5; - %jmp T_4.49; -T_4.48 ; - %load/vec4 v00000000012c9060_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.50, 8; - %pushi/vec4 7, 0, 5; - %store/vec4 v00000000012ca280_0, 0, 5; - %jmp T_4.51; -T_4.50 ; - %load/vec4 v00000000012c9060_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.52, 8; - %pushi/vec4 8, 0, 5; - %store/vec4 v00000000012ca280_0, 0, 5; - %jmp T_4.53; -T_4.52 ; - %load/vec4 v00000000012c9060_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.54, 8; - %pushi/vec4 11, 0, 5; - %store/vec4 v00000000012ca280_0, 0, 5; - %jmp T_4.55; -T_4.54 ; - %load/vec4 v00000000012c9060_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.56, 8; - %pushi/vec4 12, 0, 5; - %store/vec4 v00000000012ca280_0, 0, 5; - %jmp T_4.57; -T_4.56 ; - %load/vec4 v00000000012c9060_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.58, 8; - %pushi/vec4 9, 0, 5; - %store/vec4 v00000000012ca280_0, 0, 5; - %jmp T_4.59; -T_4.58 ; - %load/vec4 v00000000012c9060_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.60, 8; - %pushi/vec4 10, 0, 5; - %store/vec4 v00000000012ca280_0, 0, 5; - %jmp T_4.61; -T_4.60 ; - %load/vec4 v00000000012c9060_0; - %cmpi/e 10, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.62, 9; - %pushi/vec4 20, 0, 5; - %store/vec4 v00000000012ca280_0, 0, 5; - %jmp T_4.63; -T_4.62 ; - %load/vec4 v00000000012c9060_0; - %cmpi/e 11, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.64, 9; - %pushi/vec4 21, 0, 5; - %store/vec4 v00000000012ca280_0, 0, 5; - %jmp T_4.65; -T_4.64 ; - %load/vec4 v00000000012c9060_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.66, 8; - %pushi/vec4 1, 0, 5; - %store/vec4 v00000000012ca280_0, 0, 5; - %jmp T_4.67; -T_4.66 ; - %load/vec4 v00000000012c9060_0; - %cmpi/e 14, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.68, 9; - %pushi/vec4 6, 0, 5; - %store/vec4 v00000000012ca280_0, 0, 5; - %vpi_call/w 6 175 "$display", "ALU Op = 6 (XOR)" {0 0 0}; - %jmp T_4.69; -T_4.68 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v00000000012ca280_0, 0, 5; -T_4.69 ; -T_4.67 ; -T_4.65 ; -T_4.63 ; -T_4.61 ; -T_4.59 ; -T_4.57 ; -T_4.55 ; -T_4.53 ; -T_4.51 ; -T_4.49 ; -T_4.47 ; -T_4.45 ; -T_4.43 ; -T_4.41 ; -T_4.39 ; -T_4.37 ; -T_4.35 ; -T_4.33 ; -T_4.31 ; -T_4.29 ; -T_4.27 ; -T_4.25 ; -T_4.23 ; -T_4.21 ; -T_4.19 ; - %load/vec4 v00000000012c9060_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.70, 8; - %load/vec4 v00000000012c8d40_0; - %parti/s 5, 6, 4; - %store/vec4 v00000000012ca3c0_0, 0, 5; - %jmp T_4.71; -T_4.70 ; - %load/vec4 v00000000012c9060_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.72, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v00000000012ca3c0_0, 0, 5; - %jmp T_4.73; -T_4.72 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v00000000012ca3c0_0, 0, 5; -T_4.73 ; -T_4.71 ; - %load/vec4 v00000000012c9060_0; - %cmpi/e 40, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.74, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000012ca140_0, 0, 1; - %jmp T_4.75; -T_4.74 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000012ca140_0, 0, 1; -T_4.75 ; - %load/vec4 v00000000012c9060_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.76, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000012c9740_0, 0, 1; - %jmp T_4.77; -T_4.76 ; - %load/vec4 v00000000012c9060_0; - %cmpi/e 4, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 7, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 6, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 5, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %load/vec4 v00000000012c9060_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c8a20_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c8a20_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c8a20_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c8a20_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %flag_or 8, 9; - %jmp/0xz T_4.78, 8; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000012c9740_0, 0, 1; - %jmp T_4.79; -T_4.78 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v00000000012c9740_0, 0, 1; -T_4.79 ; -T_4.77 ; - %load/vec4 v00000000012c9060_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012c9060_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012c96a0_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.80, 9; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000012c97e0_0, 0, 1; - %jmp T_4.81; -T_4.80 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000012c97e0_0, 0, 1; -T_4.81 ; - %jmp T_4; - .thread T_4, $push; - .scope S_00000000009096b0; -T_5 ; - %fork t_5, S_00000000008f91d0; - %jmp t_4; - .scope S_00000000008f91d0; -t_5 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000012c9ec0_0, 0, 32; -T_5.0 ; - %load/vec4 v00000000012c9ec0_0; - %cmpi/s 32, 0, 32; - %jmp/0xz T_5.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v00000000012c9ec0_0; - %store/vec4a v00000000012c9420, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000012c9ec0_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000012c9ec0_0, 0, 32; - %jmp T_5.0; -T_5.1 ; - %end; - .scope S_00000000009096b0; -t_4 %join; - %end; - .thread T_5; - .scope S_00000000009096b0; -T_6 ; -Ewait_0 .event/or E_0000000000940880, E_0x0; - %wait Ewait_0; - %load/vec4 v00000000012c99c0_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v00000000012c9420, 4; - %store/vec4 v00000000012c8b60_0, 0, 32; - %load/vec4 v00000000012c9f60_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v00000000012c9420, 4; - %store/vec4 v00000000012c9b00_0, 0, 32; - %jmp T_6; - .thread T_6, $push; - .scope S_00000000009096b0; -T_7 ; - %wait E_0000000000940980; - %load/vec4 v00000000012c8c00_0; - %cmpi/e 0, 0, 5; - %jmp/0xz T_7.0, 4; - %jmp T_7.1; -T_7.0 ; - %load/vec4 v00000000012ca0a0_0; - %flag_set/vec4 8; - %jmp/0xz T_7.2, 8; - %load/vec4 v00000000012c9880_0; - %dup/vec4; - %pushi/vec4 32, 0, 6; - %cmp/u; - %jmp/1 T_7.4, 6; - %dup/vec4; - %pushi/vec4 36, 0, 6; - %cmp/u; - %jmp/1 T_7.5, 6; - %dup/vec4; - %pushi/vec4 33, 0, 6; - %cmp/u; - %jmp/1 T_7.6, 6; - %dup/vec4; - %pushi/vec4 37, 0, 6; - %cmp/u; - %jmp/1 T_7.7, 6; - %dup/vec4; - %pushi/vec4 34, 0, 6; - %cmp/u; - %jmp/1 T_7.8, 6; - %dup/vec4; - %pushi/vec4 38, 0, 6; - %cmp/u; - %jmp/1 T_7.9, 6; - %load/vec4 v00000000012c9ba0_0; - %load/vec4 v00000000012c8c00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9420, 0, 4; - %jmp T_7.11; -T_7.4 ; - %load/vec4 v00000000012c8b60_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.12, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.13, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.14, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.15, 6; - %jmp T_7.16; -T_7.12 ; - %load/vec4 v00000000012c9ba0_0; - %parti/s 1, 7, 4; - %replicate 24; - %load/vec4 v00000000012c9ba0_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000012c8c00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9420, 0, 4; - %jmp T_7.16; -T_7.13 ; - %load/vec4 v00000000012c9ba0_0; - %parti/s 1, 15, 5; - %replicate 24; - %load/vec4 v00000000012c9ba0_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000012c8c00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9420, 0, 4; - %jmp T_7.16; -T_7.14 ; - %load/vec4 v00000000012c9ba0_0; - %parti/s 1, 23, 6; - %replicate 24; - %load/vec4 v00000000012c9ba0_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000012c8c00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9420, 0, 4; - %jmp T_7.16; -T_7.15 ; - %load/vec4 v00000000012c9ba0_0; - %parti/s 1, 31, 6; - %replicate 24; - %load/vec4 v00000000012c9ba0_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000012c8c00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9420, 0, 4; - %jmp T_7.16; -T_7.16 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.5 ; - %load/vec4 v00000000012c8b60_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.17, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.18, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.19, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.20, 6; - %jmp T_7.21; -T_7.17 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000012c9ba0_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000012c8c00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9420, 0, 4; - %jmp T_7.21; -T_7.18 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000012c9ba0_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000012c8c00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9420, 0, 4; - %jmp T_7.21; -T_7.19 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000012c9ba0_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000012c8c00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9420, 0, 4; - %jmp T_7.21; -T_7.20 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000012c9ba0_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000012c8c00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9420, 0, 4; - %jmp T_7.21; -T_7.21 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.6 ; - %load/vec4 v00000000012c8b60_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.22, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.23, 6; - %jmp T_7.24; -T_7.22 ; - %load/vec4 v00000000012c9ba0_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v00000000012c9ba0_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000012c8c00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9420, 0, 4; - %jmp T_7.24; -T_7.23 ; - %load/vec4 v00000000012c9ba0_0; - %parti/s 1, 31, 6; - %replicate 16; - %load/vec4 v00000000012c9ba0_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000012c8c00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9420, 0, 4; - %jmp T_7.24; -T_7.24 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.7 ; - %load/vec4 v00000000012c8b60_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.25, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.26, 6; - %jmp T_7.27; -T_7.25 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v00000000012c9ba0_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000012c8c00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9420, 0, 4; - %jmp T_7.27; -T_7.26 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v00000000012c9ba0_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000012c8c00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9420, 0, 4; - %jmp T_7.27; -T_7.27 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.8 ; - %load/vec4 v00000000012c8b60_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.28, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.29, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.30, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.31, 6; - %jmp T_7.32; -T_7.28 ; - %load/vec4 v00000000012c9ba0_0; - %parti/s 8, 0, 2; - %load/vec4 v00000000012c8c00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 24, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9420, 4, 5; - %jmp T_7.32; -T_7.29 ; - %load/vec4 v00000000012c9ba0_0; - %parti/s 16, 0, 2; - %load/vec4 v00000000012c8c00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 16, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9420, 4, 5; - %jmp T_7.32; -T_7.30 ; - %load/vec4 v00000000012c9ba0_0; - %parti/s 24, 0, 2; - %load/vec4 v00000000012c8c00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 8, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9420, 4, 5; - %jmp T_7.32; -T_7.31 ; - %load/vec4 v00000000012c9ba0_0; - %load/vec4 v00000000012c8c00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9420, 0, 4; - %jmp T_7.32; -T_7.32 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.9 ; - %load/vec4 v00000000012c8b60_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.33, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.34, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.35, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.36, 6; - %jmp T_7.37; -T_7.33 ; - %load/vec4 v00000000012c9ba0_0; - %load/vec4 v00000000012c8c00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9420, 0, 4; - %jmp T_7.37; -T_7.34 ; - %load/vec4 v00000000012c9ba0_0; - %parti/s 24, 8, 5; - %load/vec4 v00000000012c8c00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9420, 0, 4; - %jmp T_7.37; -T_7.35 ; - %load/vec4 v00000000012c9ba0_0; - %parti/s 16, 16, 6; - %load/vec4 v00000000012c8c00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9420, 0, 4; - %jmp T_7.37; -T_7.36 ; - %load/vec4 v00000000012c9ba0_0; - %parti/s 8, 24, 6; - %load/vec4 v00000000012c8c00_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9420, 0, 4; - %jmp T_7.37; -T_7.37 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.11 ; - %pop/vec4 1; -T_7.2 ; -T_7.1 ; - %jmp T_7; - .thread T_7; - .scope S_00000000012cb710; -T_8 ; -Ewait_1 .event/or E_00000000009404c0, E_0x0; - %wait Ewait_1; - %load/vec4 v00000000012c9ce0_0; - %dup/vec4; - %pushi/vec4 0, 0, 5; - %cmp/u; - %jmp/1 T_8.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 5; - %cmp/u; - %jmp/1 T_8.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 5; - %cmp/u; - %jmp/1 T_8.2, 6; - %dup/vec4; - %pushi/vec4 3, 0, 5; - %cmp/u; - %jmp/1 T_8.3, 6; - %dup/vec4; - %pushi/vec4 4, 0, 5; - %cmp/u; - %jmp/1 T_8.4, 6; - %dup/vec4; - %pushi/vec4 5, 0, 5; - %cmp/u; - %jmp/1 T_8.5, 6; - %dup/vec4; - %pushi/vec4 6, 0, 5; - %cmp/u; - %jmp/1 T_8.6, 6; - %dup/vec4; - %pushi/vec4 7, 0, 5; - %cmp/u; - %jmp/1 T_8.7, 6; - %dup/vec4; - %pushi/vec4 8, 0, 5; - %cmp/u; - %jmp/1 T_8.8, 6; - %dup/vec4; - %pushi/vec4 9, 0, 5; - %cmp/u; - %jmp/1 T_8.9, 6; - %dup/vec4; - %pushi/vec4 10, 0, 5; - %cmp/u; - %jmp/1 T_8.10, 6; - %dup/vec4; - %pushi/vec4 11, 0, 5; - %cmp/u; - %jmp/1 T_8.11, 6; - %dup/vec4; - %pushi/vec4 12, 0, 5; - %cmp/u; - %jmp/1 T_8.12, 6; - %dup/vec4; - %pushi/vec4 13, 0, 5; - %cmp/u; - %jmp/1 T_8.13, 6; - %dup/vec4; - %pushi/vec4 14, 0, 5; - %cmp/u; - %jmp/1 T_8.14, 6; - %dup/vec4; - %pushi/vec4 15, 0, 5; - %cmp/u; - %jmp/1 T_8.15, 6; - %dup/vec4; - %pushi/vec4 16, 0, 5; - %cmp/u; - %jmp/1 T_8.16, 6; - %dup/vec4; - %pushi/vec4 17, 0, 5; - %cmp/u; - %jmp/1 T_8.17, 6; - %dup/vec4; - %pushi/vec4 18, 0, 5; - %cmp/u; - %jmp/1 T_8.18, 6; - %dup/vec4; - %pushi/vec4 19, 0, 5; - %cmp/u; - %jmp/1 T_8.19, 6; - %dup/vec4; - %pushi/vec4 20, 0, 5; - %cmp/u; - %jmp/1 T_8.20, 6; - %dup/vec4; - %pushi/vec4 21, 0, 5; - %cmp/u; - %jmp/1 T_8.21, 6; - %dup/vec4; - %pushi/vec4 22, 0, 5; - %cmp/u; - %jmp/1 T_8.22, 6; - %dup/vec4; - %pushi/vec4 23, 0, 5; - %cmp/u; - %jmp/1 T_8.23, 6; - %jmp T_8.24; -T_8.0 ; - %load/vec4 v00000000012c9100_0; - %load/vec4 v00000000012c9e20_0; - %add; - %store/vec4 v00000000012c85c0_0, 0, 32; - %jmp T_8.24; -T_8.1 ; - %load/vec4 v00000000012c9100_0; - %load/vec4 v00000000012c9e20_0; - %sub; - %store/vec4 v00000000012c85c0_0, 0, 32; - %jmp T_8.24; -T_8.2 ; - %load/vec4 v00000000012c9100_0; - %load/vec4 v00000000012c9e20_0; - %mul; - %store/vec4 v00000000012c85c0_0, 0, 32; - %jmp T_8.24; -T_8.3 ; - %load/vec4 v00000000012c9100_0; - %load/vec4 v00000000012c9e20_0; - %div/s; - %store/vec4 v00000000012c85c0_0, 0, 32; - %jmp T_8.24; -T_8.4 ; - %load/vec4 v00000000012c9100_0; - %load/vec4 v00000000012c9e20_0; - %and; - %store/vec4 v00000000012c85c0_0, 0, 32; - %jmp T_8.24; -T_8.5 ; - %load/vec4 v00000000012c9100_0; - %load/vec4 v00000000012c9e20_0; - %or; - %store/vec4 v00000000012c85c0_0, 0, 32; - %jmp T_8.24; -T_8.6 ; - %load/vec4 v00000000012c9100_0; - %load/vec4 v00000000012c9e20_0; - %xor; - %store/vec4 v00000000012c85c0_0, 0, 32; - %jmp T_8.24; -T_8.7 ; - %load/vec4 v00000000012c9e20_0; - %ix/getv 4, v00000000012c8ac0_0; - %shiftl 4; - %store/vec4 v00000000012c85c0_0, 0, 32; - %jmp T_8.24; -T_8.8 ; - %load/vec4 v00000000012c9e20_0; - %ix/getv 4, v00000000012c9100_0; - %shiftl 4; - %store/vec4 v00000000012c85c0_0, 0, 32; - %jmp T_8.24; -T_8.9 ; - %load/vec4 v00000000012c9e20_0; - %ix/getv 4, v00000000012c8ac0_0; - %shiftr 4; - %store/vec4 v00000000012c85c0_0, 0, 32; - %jmp T_8.24; -T_8.10 ; - %load/vec4 v00000000012c9e20_0; - %ix/getv 4, v00000000012c9100_0; - %shiftr 4; - %store/vec4 v00000000012c85c0_0, 0, 32; - %jmp T_8.24; -T_8.11 ; - %load/vec4 v00000000012c9e20_0; - %ix/getv 4, v00000000012c8ac0_0; - %shiftr 4; - %store/vec4 v00000000012c85c0_0, 0, 32; - %jmp T_8.24; -T_8.12 ; - %load/vec4 v00000000012c9e20_0; - %ix/getv 4, v00000000012c9100_0; - %shiftr 4; - %store/vec4 v00000000012c85c0_0, 0, 32; - %jmp T_8.24; -T_8.13 ; - %load/vec4 v00000000012c9100_0; - %load/vec4 v00000000012c9e20_0; - %cmp/e; - %jmp/0xz T_8.25, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000012c88e0_0, 0, 1; - %jmp T_8.26; -T_8.25 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000012c88e0_0, 0, 1; -T_8.26 ; - %jmp T_8.24; -T_8.14 ; - %load/vec4 v00000000012c9100_0; - %load/vec4 v00000000012c9e20_0; - %cmp/s; - %jmp/0xz T_8.27, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000012c88e0_0, 0, 1; - %jmp T_8.28; -T_8.27 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000012c88e0_0, 0, 1; -T_8.28 ; - %jmp T_8.24; -T_8.15 ; - %load/vec4 v00000000012c9100_0; - %load/vec4 v00000000012c9e20_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.29, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000012c88e0_0, 0, 1; - %jmp T_8.30; -T_8.29 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000012c88e0_0, 0, 1; -T_8.30 ; - %jmp T_8.24; -T_8.16 ; - %load/vec4 v00000000012c9e20_0; - %load/vec4 v00000000012c9100_0; - %cmp/s; - %jmp/0xz T_8.31, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000012c88e0_0, 0, 1; - %jmp T_8.32; -T_8.31 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000012c88e0_0, 0, 1; -T_8.32 ; - %jmp T_8.24; -T_8.17 ; - %load/vec4 v00000000012c9e20_0; - %load/vec4 v00000000012c9100_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.33, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000012c88e0_0, 0, 1; - %jmp T_8.34; -T_8.33 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000012c88e0_0, 0, 1; -T_8.34 ; - %jmp T_8.24; -T_8.18 ; - %load/vec4 v00000000012c9100_0; - %load/vec4 v00000000012c9e20_0; - %cmp/ne; - %jmp/0xz T_8.35, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000012c88e0_0, 0, 1; - %jmp T_8.36; -T_8.35 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000012c88e0_0, 0, 1; -T_8.36 ; - %jmp T_8.24; -T_8.19 ; - %load/vec4 v00000000012c9100_0; - %store/vec4 v00000000012c85c0_0, 0, 32; - %jmp T_8.24; -T_8.20 ; - %load/vec4 v00000000012c9100_0; - %load/vec4 v00000000012c9e20_0; - %cmp/s; - %jmp/0xz T_8.37, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v00000000012c85c0_0, 0, 32; -T_8.37 ; - %jmp T_8.24; -T_8.21 ; - %load/vec4 v00000000012c9100_0; - %load/vec4 v00000000012c9e20_0; - %cmp/u; - %jmp/0xz T_8.39, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v00000000012c85c0_0, 0, 32; -T_8.39 ; - %jmp T_8.24; -T_8.22 ; - %load/vec4 v00000000012c9100_0; - %load/vec4 v00000000012c9e20_0; - %mul; - %store/vec4 v00000000012c85c0_0, 0, 32; - %jmp T_8.24; -T_8.23 ; - %load/vec4 v00000000012c9100_0; - %load/vec4 v00000000012c9e20_0; - %div; - %store/vec4 v00000000012c85c0_0, 0, 32; - %jmp T_8.24; -T_8.24 ; - %pop/vec4 1; - %jmp T_8; - .thread T_8, $push; - .scope S_00000000012cb580; -T_9 ; - %pushi/vec4 3217031168, 0, 32; - %store/vec4 v0000000001322bd0_0, 0, 32; - %end; - .thread T_9, $init; - .scope S_00000000012cb580; -T_10 ; -Ewait_2 .event/or E_0000000000946700, E_0x0; - %wait Ewait_2; - %load/vec4 v0000000001323f30_0; - %store/vec4 v0000000001323d50_0, 0, 32; - %load/vec4 v0000000001323fd0_0; - %store/vec4 v00000000012ca000_0, 0, 32; - %load/vec4 v0000000001322db0_0; - %store/vec4 v00000000012c91a0_0, 0, 1; - %load/vec4 v0000000001323670_0; - %store/vec4 v00000000012c9d80_0, 0, 1; - %load/vec4 v0000000001323cb0_0; - %store/vec4 v00000000012c94c0_0, 0, 32; - %jmp T_10; - .thread T_10, $push; - .scope S_00000000012cb580; -T_11 ; -Ewait_3 .event/or E_0000000000947300, E_0x0; - %wait Ewait_3; - %load/vec4 v0000000001324070_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.2, 6; - %jmp T_11.3; -T_11.0 ; - %load/vec4 v0000000001324390_0; - %parti/s 5, 16, 6; - %store/vec4 v0000000001322f90_0, 0, 5; - %jmp T_11.3; -T_11.1 ; - %load/vec4 v0000000001324390_0; - %parti/s 5, 11, 5; - %store/vec4 v0000000001322f90_0, 0, 5; - %jmp T_11.3; -T_11.2 ; - %pushi/vec4 31, 0, 5; - %store/vec4 v0000000001322f90_0, 0, 5; - %jmp T_11.3; -T_11.3 ; - %pop/vec4 1; - %load/vec4 v0000000001322b30_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.6, 6; - %jmp T_11.7; -T_11.4 ; - %load/vec4 v0000000001323fd0_0; - %store/vec4 v0000000001324570_0, 0, 32; - %jmp T_11.7; -T_11.5 ; - %load/vec4 v00000000012c8fc0_0; - %store/vec4 v0000000001324570_0, 0, 32; - %jmp T_11.7; -T_11.6 ; - %load/vec4 v0000000001322bd0_0; - %addi 8, 0, 32; - %store/vec4 v0000000001324570_0, 0, 32; - %jmp T_11.7; -T_11.7 ; - %pop/vec4 1; - %load/vec4 v0000000001324930_0; - %dup/vec4; - %pushi/vec4 1, 0, 1; - %cmp/u; - %jmp/1 T_11.8, 6; - %dup/vec4; - %pushi/vec4 0, 0, 1; - %cmp/u; - %jmp/1 T_11.9, 6; - %jmp T_11.10; -T_11.8 ; - %load/vec4 v0000000001324390_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v0000000001324390_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %store/vec4 v00000000008d8cb0_0, 0, 32; - %jmp T_11.10; -T_11.9 ; - %load/vec4 v0000000001323cb0_0; - %store/vec4 v00000000008d8cb0_0, 0, 32; - %jmp T_11.10; -T_11.10 ; - %pop/vec4 1; - %jmp T_11; - .thread T_11, $push; - .scope S_00000000012ca580; -T_12 ; - %vpi_call/w 3 36 "$dumpfile", "mips_cpu_harvard.vcd" {0 0 0}; - %vpi_call/w 3 37 "$dumpvars", 32'sb00000000000000000000000000000000, S_00000000012ca580 {0 0 0}; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000013259a0_0, 0, 1; - %pushi/vec4 100, 0, 32; -T_12.0 %dup/vec4; - %pushi/vec4 0, 0, 32; - %cmp/s; - %jmp/1xz T_12.1, 5; - %jmp/1 T_12.1, 4; - %pushi/vec4 1, 0, 32; - %sub; - %delay 10, 0; - %load/vec4 v00000000013259a0_0; - %nor/r; - %store/vec4 v00000000013259a0_0, 0, 1; - %delay 10, 0; - %load/vec4 v00000000013259a0_0; - %nor/r; - %store/vec4 v00000000013259a0_0, 0, 1; - %jmp T_12.0; -T_12.1 ; - %pop/vec4 1; - %vpi_call/w 3 47 "$fatal", 32'sb00000000000000000000000000000010, "Simulation did not finish within %d cycles.", P_00000000009332a8 {0 0 0}; - %end; - .thread T_12; - .scope S_00000000012ca580; -T_13 ; - %vpi_call/w 3 51 "$display", "Initial Reset 0" {0 0 0}; - %pushi/vec4 0, 0, 1; - %assign/vec4 v00000000013261c0_0, 0; - %vpi_call/w 3 55 "$display", "Initial Reset 1" {0 0 0}; - %wait E_00000000009408c0; - %pushi/vec4 1, 0, 1; - %assign/vec4 v00000000013261c0_0, 0; - %vpi_call/w 3 59 "$display", "Initial Reset 0: Start Program" {0 0 0}; - %wait E_00000000009408c0; - %pushi/vec4 0, 0, 1; - %assign/vec4 v00000000013261c0_0, 0; - %wait E_00000000009408c0; - %load/vec4 v0000000001325cc0_0; - %pad/u 32; - %cmpi/e 1, 0, 32; - %jmp/0xz T_13.0, 4; - %jmp T_13.1; -T_13.0 ; - %vpi_call/w 3 65 "$display", "TB: CPU did not set active=1 after reset." {0 0 0}; -T_13.1 ; -T_13.2 ; - %load/vec4 v0000000001325cc0_0; - %flag_set/vec4 8; - %jmp/0xz T_13.3, 8; - %wait E_00000000009408c0; - %vpi_call/w 3 71 "$display", "Reg File Write data: %d", v0000000001324570_0 {0 0 0}; - %jmp T_13.2; -T_13.3 ; - %wait E_00000000009408c0; - %vpi_call/w 3 74 "$display", "TB: CPU Halt; active=0" {0 0 0}; - %vpi_call/w 3 75 "$display", "Output:" {0 0 0}; - %vpi_call/w 3 76 "$display", "%d", v0000000001326260_0 {0 0 0}; - %vpi_call/w 3 77 "$finish" {0 0 0}; - %end; - .thread T_13; -# The file index is used to find the file name in the following table. -:file_names 10; - "N/A"; - ""; - "-"; - "testbench/mips_cpu_harvard_tb.v"; - "rtl/mips_cpu_harvard.v"; - "rtl/mips_cpu_alu.v"; - "rtl/mips_cpu_control.v"; - "rtl/mips_cpu_pc.v"; - "rtl/mips_cpu_regfile.v"; - "rtl/mips_cpu_memory.v"; diff --git a/exec/mips_cpu_harvard_tb_subu b/exec/mips_cpu_harvard_tb_subu deleted file mode 100644 index 441c655..0000000 --- a/exec/mips_cpu_harvard_tb_subu +++ /dev/null @@ -1,2738 +0,0 @@ -#! /usr/local/iverilog/bin/vvp -:ivl_version "11.0 (devel)"; -:ivl_delay_selection "TYPICAL"; -:vpi_time_precision + 0; -:vpi_module "C:\iverilog\lib\ivl\system.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_sys.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_textio.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2005_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\va_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2009.vpi"; -S_00000000012cc100 .scope package, "$unit" "$unit" 2 1; - .timescale 0 0; -S_000000000094aab0 .scope module, "mips_cpu_harvard_tb" "mips_cpu_harvard_tb" 3 1; - .timescale 0 0; -P_0000000000894560 .param/str "RAM_INIT_FILE" 0 3 3, "inputs/subu.txt"; -P_0000000000894598 .param/l "TIMEOUT_CYCLES" 0 3 4, +C4<00000000000000000000000001100100>; -v0000000001324ac0_0 .net "active", 0 0, v00000000012c9040_0; 1 drivers -v0000000001325e20_0 .var "clk", 0 0; -v0000000001324980_0 .var "clk_enable", 0 0; -v0000000001325420_0 .net "data_address", 31 0, v00000000012c9720_0; 1 drivers -v00000000013265a0_0 .net "data_read", 0 0, v00000000012c8f00_0; 1 drivers -v0000000001324a20_0 .net "data_readdata", 31 0, L_0000000001325c40; 1 drivers -v0000000001325060_0 .net "data_write", 0 0, v00000000012c9860_0; 1 drivers -v0000000001326280_0 .net "data_writedata", 31 0, v00000000012c9a40_0; 1 drivers -v0000000001325ec0_0 .net "instr_address", 31 0, v0000000001323a50_0; 1 drivers -v0000000001325f60_0 .net "instr_readdata", 31 0, L_00000000013252e0; 1 drivers -v0000000001326000_0 .net "register_v0", 31 0, L_000000000094e290; 1 drivers -v0000000001326320_0 .var "reset", 0 0; -S_0000000000905e30 .scope module, "cpuInst" "mips_cpu_harvard" 3 19, 4 1 0, S_000000000094aab0; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "reset"; - .port_info 2 /OUTPUT 1 "active"; - .port_info 3 /OUTPUT 32 "register_v0"; - .port_info 4 /INPUT 1 "clk_enable"; - .port_info 5 /OUTPUT 32 "instr_address"; - .port_info 6 /INPUT 32 "instr_readdata"; - .port_info 7 /OUTPUT 32 "data_address"; - .port_info 8 /OUTPUT 1 "data_write"; - .port_info 9 /OUTPUT 1 "data_read"; - .port_info 10 /OUTPUT 32 "data_writedata"; - .port_info 11 /INPUT 32 "data_readdata"; -v00000000012c8d20_0 .net "active", 0 0, v00000000012c9040_0; alias, 1 drivers -v00000000012c99a0_0 .net "clk", 0 0, v0000000001325e20_0; 1 drivers -v00000000012c9680_0 .net "clk_enable", 0 0, v0000000001324980_0; 1 drivers -v00000000012c9720_0 .var "data_address", 31 0; -v00000000012c8f00_0 .var "data_read", 0 0; -v00000000012c97c0_0 .net "data_readdata", 31 0, L_0000000001325c40; alias, 1 drivers -v00000000012c9860_0 .var "data_write", 0 0; -v00000000012c9a40_0 .var "data_writedata", 31 0; -v000000000092e600_0 .var "in_B", 31 0; -v0000000001322dd0_0 .net "in_opcode", 5 0, L_0000000001325ce0; 1 drivers -v0000000001323d70_0 .net "in_pc_in", 31 0, v00000000012c9b80_0; 1 drivers -v0000000001323f50_0 .net "in_readreg1", 4 0, L_0000000001325380; 1 drivers -v0000000001324270_0 .net "in_readreg2", 4 0, L_0000000001325560; 1 drivers -v00000000013237d0_0 .var "in_writedata", 31 0; -v00000000013244f0_0 .var "in_writereg", 4 0; -v0000000001323a50_0 .var "instr_address", 31 0; -v0000000001322970_0 .net "instr_readdata", 31 0, L_00000000013252e0; alias, 1 drivers -v0000000001323190_0 .net "out_ALUCond", 0 0, v00000000012c9c20_0; 1 drivers -v0000000001324590_0 .net "out_ALUOp", 4 0, v00000000012ca580_0; 1 drivers -v0000000001322b50_0 .net "out_ALURes", 31 0, v00000000012ca260_0; 1 drivers -v0000000001322f10_0 .net "out_ALUSrc", 0 0, v00000000012ca3a0_0; 1 drivers -v0000000001323870_0 .net "out_MemRead", 0 0, v00000000012c9900_0; 1 drivers -v0000000001322a10_0 .net "out_MemWrite", 0 0, v00000000012c95e0_0; 1 drivers -v0000000001322fb0_0 .net "out_MemtoReg", 1 0, v00000000012c9e00_0; 1 drivers -v0000000001323910_0 .net "out_PC", 1 0, v00000000012c9fe0_0; 1 drivers -v00000000013230f0_0 .net "out_RegDst", 1 0, v00000000012c9360_0; 1 drivers -v0000000001323370_0 .net "out_RegWrite", 0 0, v00000000012c8fa0_0; 1 drivers -v0000000001323050_0 .var "out_pc_out", 31 0; -v0000000001322bf0_0 .net "out_readdata1", 31 0, v00000000012c92c0_0; 1 drivers -v0000000001322c90_0 .net "out_readdata2", 31 0, v00000000012c9400_0; 1 drivers -v00000000013239b0_0 .net "out_shamt", 4 0, v00000000012c8dc0_0; 1 drivers -v0000000001323c30_0 .net "register_v0", 31 0, L_000000000094e290; alias, 1 drivers -v0000000001323230_0 .net "reset", 0 0, v0000000001326320_0; 1 drivers -E_0000000000945e00/0 .event edge, v00000000012c9360_0, v00000000012c9ae0_0, v00000000012c9ae0_0, v00000000012c9e00_0; -E_0000000000945e00/1 .event edge, v00000000012ca260_0, v00000000012c97c0_0, v00000000012ca4e0_0, v00000000012ca3a0_0; -E_0000000000945e00/2 .event edge, v00000000012c9ae0_0, v00000000012c9ae0_0, v00000000012c9400_0; -E_0000000000945e00 .event/or E_0000000000945e00/0, E_0000000000945e00/1, E_0000000000945e00/2; -E_0000000000945fc0/0 .event edge, v00000000012c9b80_0, v00000000012ca260_0, v00000000012c95e0_0, v00000000012c9900_0; -E_0000000000945fc0/1 .event edge, v00000000012c9400_0; -E_0000000000945fc0 .event/or E_0000000000945fc0/0, E_0000000000945fc0/1; -L_0000000001325380 .part L_00000000013252e0, 21, 5; -L_0000000001325560 .part L_00000000013252e0, 16, 5; -L_0000000001325ce0 .part L_00000000013252e0, 26, 6; -S_0000000000905fc0 .scope module, "alu" "mips_cpu_alu" 4 121, 5 1 0, S_0000000000905e30; - .timescale 0 0; - .port_info 0 /INPUT 32 "A"; - .port_info 1 /INPUT 32 "B"; - .port_info 2 /INPUT 5 "ALUOp"; - .port_info 3 /INPUT 5 "shamt"; - .port_info 4 /OUTPUT 1 "ALUCond"; - .port_info 5 /OUTPUT 32 "ALURes"; -enum00000000012abd00 .enum4 (5) - "ADD" 5'b00000, - "SUB" 5'b00001, - "MUL" 5'b00010, - "DIV" 5'b00011, - "AND" 5'b00100, - "OR" 5'b00101, - "XOR" 5'b00110, - "SLL" 5'b00111, - "SLLV" 5'b01000, - "SRL" 5'b01001, - "SRLV" 5'b01010, - "SRA" 5'b01011, - "SRAV" 5'b01100, - "EQ" 5'b01101, - "LES" 5'b01110, - "LEQ" 5'b01111, - "GRT" 5'b10000, - "GEQ" 5'b10001, - "NEQ" 5'b10010, - "PAS" 5'b10011, - "SLT" 5'b10100, - "SLTU" 5'b10101, - "MULU" 5'b10110, - "DIVU" 5'b10111 - ; -L_000000000094e300 .functor BUFZ 5, v00000000012ca580_0, C4<00000>, C4<00000>, C4<00000>; -v00000000012c9cc0_0 .net "A", 31 0, v00000000012c92c0_0; alias, 1 drivers -v00000000012c9c20_0 .var "ALUCond", 0 0; -v00000000012c9ea0_0 .net "ALUOp", 4 0, v00000000012ca580_0; alias, 1 drivers -v00000000012c8b40_0 .net "ALUOps", 4 0, L_000000000094e300; 1 drivers -v00000000012ca260_0 .var/s "ALURes", 31 0; -v00000000012c9d60_0 .net "B", 31 0, v000000000092e600_0; 1 drivers -v00000000012c9f40_0 .net "shamt", 4 0, v00000000012c8dc0_0; alias, 1 drivers -E_0000000000947cc0 .event edge, v00000000012c8b40_0, v00000000012c9cc0_0, v00000000012c9d60_0, v00000000012c9f40_0; -S_0000000000906150 .scope module, "control" "mips_cpu_control" 4 90, 6 1 0, S_0000000000905e30; - .timescale 0 0; - .port_info 0 /INPUT 32 "Instr"; - .port_info 1 /INPUT 1 "ALUCond"; - .port_info 2 /OUTPUT 2 "CtrlRegDst"; - .port_info 3 /OUTPUT 2 "CtrlPC"; - .port_info 4 /OUTPUT 1 "CtrlMemRead"; - .port_info 5 /OUTPUT 2 "CtrlMemtoReg"; - .port_info 6 /OUTPUT 5 "CtrlALUOp"; - .port_info 7 /OUTPUT 5 "Ctrlshamt"; - .port_info 8 /OUTPUT 1 "CtrlMemWrite"; - .port_info 9 /OUTPUT 1 "CtrlALUSrc"; - .port_info 10 /OUTPUT 1 "CtrlRegWrite"; -enum00000000012a9270 .enum4 (6) - "SLL" 6'b000000, - "SRL" 6'b000010, - "SRA" 6'b000011, - "SLLV" 6'b000100, - "SRLV" 6'b000110, - "SRAV" 6'b000111, - "JR" 6'b001000, - "JALR" 6'b001001, - "MTHI" 6'b010001, - "MTLO" 6'b010011, - "MULT" 6'b011000, - "MULTU" 6'b011001, - "DIV" 6'b011010, - "DIVU" 6'b011011, - "ADDU" 6'b100001, - "SUBU" 6'b100011, - "AND" 6'b100100, - "OR" 6'b100101, - "XOR" 6'b100110, - "SLT" 6'b101010, - "SLTU" 6'b101011 - ; -enum00000000012ab8a0 .enum4 (5) - "BLTZ" 5'b00000, - "BGEZ" 5'b00001, - "BLTZAL" 5'b10000, - "BGEZAL" 5'b10001 - ; -enum00000000012ab950 .enum4 (6) - "SPECIAL" 6'b000000, - "REGIMM" 6'b000001, - "J" 6'b000010, - "JAL" 6'b000011, - "BEQ" 6'b000100, - "BNE" 6'b000101, - "BLEZ" 6'b000110, - "BGTZ" 6'b000111, - "ADDI" 6'b001000, - "ADDIU" 6'b001001, - "SLTI" 6'b001010, - "SLTIU" 6'b001011, - "ANDI" 6'b001100, - "ORI" 6'b001101, - "XORI" 6'b001110, - "LUI" 6'b001111, - "LB" 6'b100000, - "LH" 6'b100001, - "LWL" 6'b100010, - "LW" 6'b100011, - "LBU" 6'b100100, - "LHU" 6'b100101, - "LWR" 6'b100110, - "SB" 6'b101000, - "SH" 6'b101001, - "SW" 6'b101011 - ; -v00000000012c8e60_0 .net "ALUCond", 0 0, v00000000012c9c20_0; alias, 1 drivers -v00000000012ca580_0 .var "CtrlALUOp", 4 0; -v00000000012ca3a0_0 .var "CtrlALUSrc", 0 0; -v00000000012c9900_0 .var "CtrlMemRead", 0 0; -v00000000012c95e0_0 .var "CtrlMemWrite", 0 0; -v00000000012c9e00_0 .var "CtrlMemtoReg", 1 0; -v00000000012c9fe0_0 .var "CtrlPC", 1 0; -v00000000012c9360_0 .var "CtrlRegDst", 1 0; -v00000000012c8fa0_0 .var "CtrlRegWrite", 0 0; -v00000000012c8dc0_0 .var "Ctrlshamt", 4 0; -v00000000012c9ae0_0 .net "Instr", 31 0, L_00000000013252e0; alias, 1 drivers -v00000000012ca120_0 .net "funct", 5 0, L_00000000013260a0; 1 drivers -v00000000012ca6c0_0 .net "op", 5 0, L_0000000001326640; 1 drivers -v00000000012ca080_0 .net "rt", 4 0, L_0000000001325240; 1 drivers -E_0000000000947200/0 .event edge, v00000000012ca6c0_0, v00000000012ca120_0, v00000000012c9c20_0, v00000000012ca080_0; -E_0000000000947200/1 .event edge, v00000000012c9ae0_0; -E_0000000000947200 .event/or E_0000000000947200/0, E_0000000000947200/1; -L_0000000001326640 .part L_00000000013252e0, 26, 6; -L_00000000013260a0 .part L_00000000013252e0, 0, 6; -L_0000000001325240 .part L_00000000013252e0, 16, 5; -S_00000000008f91d0 .scope module, "pc" "pc" 4 79, 7 1 0, S_0000000000905e30; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "rst"; - .port_info 2 /INPUT 2 "pc_ctrl"; - .port_info 3 /INPUT 32 "pc_in"; - .port_info 4 /INPUT 5 "rs"; - .port_info 5 /OUTPUT 32 "pc_out"; - .port_info 6 /OUTPUT 1 "active"; -v00000000012c9040_0 .var "active", 0 0; -v00000000012c9220_0 .net "clk", 0 0, v0000000001325e20_0; alias, 1 drivers -v00000000012c90e0_0 .net "pc_ctrl", 1 0, v00000000012c9fe0_0; alias, 1 drivers -v00000000012c9180_0 .var "pc_curr", 31 0; -v00000000012ca4e0_0 .net "pc_in", 31 0, v0000000001323050_0; 1 drivers -v00000000012c9b80_0 .var "pc_out", 31 0; -o00000000012cd018 .functor BUFZ 5, C4; HiZ drive -v00000000012ca300_0 .net "rs", 4 0, o00000000012cd018; 0 drivers -v00000000012c8a00_0 .net "rst", 0 0, v0000000001326320_0; alias, 1 drivers -E_0000000000947b00 .event posedge, v00000000012c9220_0; -S_00000000008f9360 .scope module, "regfile" "mips_cpu_regfile" 4 106, 8 1 0, S_0000000000905e30; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 5 "readreg1"; - .port_info 2 /INPUT 5 "readreg2"; - .port_info 3 /INPUT 5 "writereg"; - .port_info 4 /INPUT 32 "writedata"; - .port_info 5 /INPUT 1 "regwrite"; - .port_info 6 /INPUT 6 "opcode"; - .port_info 7 /OUTPUT 32 "readdata1"; - .port_info 8 /OUTPUT 32 "readdata2"; - .port_info 9 /OUTPUT 32 "regv0"; -v00000000012c9540_2 .array/port v00000000012c9540, 2; -L_000000000094e290 .functor BUFZ 32, v00000000012c9540_2, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; -v00000000012ca440_0 .net "clk", 0 0, v0000000001325e20_0; alias, 1 drivers -v00000000012c9540 .array "memory", 0 31, 31 0; -v00000000012ca760_0 .net "opcode", 5 0, L_0000000001325ce0; alias, 1 drivers -v00000000012c92c0_0 .var "readdata1", 31 0; -v00000000012c9400_0 .var "readdata2", 31 0; -v00000000012ca800_0 .net "readreg1", 4 0, L_0000000001325380; alias, 1 drivers -v00000000012c8960_0 .net "readreg2", 4 0, L_0000000001325560; alias, 1 drivers -v00000000012c94a0_0 .net "regv0", 31 0, L_000000000094e290; alias, 1 drivers -v00000000012c8aa0_0 .net "regwrite", 0 0, v00000000012c8fa0_0; alias, 1 drivers -v00000000012c8be0_0 .net "writedata", 31 0, v00000000013237d0_0; 1 drivers -v00000000012c8c80_0 .net "writereg", 4 0, v00000000013244f0_0; 1 drivers -E_00000000009480c0 .event negedge, v00000000012c9220_0; -v00000000012c9540_0 .array/port v00000000012c9540, 0; -v00000000012c9540_1 .array/port v00000000012c9540, 1; -E_0000000000947e40/0 .event edge, v00000000012ca800_0, v00000000012c9540_0, v00000000012c9540_1, v00000000012c9540_2; -v00000000012c9540_3 .array/port v00000000012c9540, 3; -v00000000012c9540_4 .array/port v00000000012c9540, 4; -v00000000012c9540_5 .array/port v00000000012c9540, 5; -v00000000012c9540_6 .array/port v00000000012c9540, 6; -E_0000000000947e40/1 .event edge, v00000000012c9540_3, v00000000012c9540_4, v00000000012c9540_5, v00000000012c9540_6; -v00000000012c9540_7 .array/port v00000000012c9540, 7; -v00000000012c9540_8 .array/port v00000000012c9540, 8; -v00000000012c9540_9 .array/port v00000000012c9540, 9; -v00000000012c9540_10 .array/port v00000000012c9540, 10; -E_0000000000947e40/2 .event edge, v00000000012c9540_7, v00000000012c9540_8, v00000000012c9540_9, v00000000012c9540_10; -v00000000012c9540_11 .array/port v00000000012c9540, 11; -v00000000012c9540_12 .array/port v00000000012c9540, 12; -v00000000012c9540_13 .array/port v00000000012c9540, 13; -v00000000012c9540_14 .array/port v00000000012c9540, 14; -E_0000000000947e40/3 .event edge, v00000000012c9540_11, v00000000012c9540_12, v00000000012c9540_13, v00000000012c9540_14; -v00000000012c9540_15 .array/port v00000000012c9540, 15; -v00000000012c9540_16 .array/port v00000000012c9540, 16; -v00000000012c9540_17 .array/port v00000000012c9540, 17; -v00000000012c9540_18 .array/port v00000000012c9540, 18; -E_0000000000947e40/4 .event edge, v00000000012c9540_15, v00000000012c9540_16, v00000000012c9540_17, v00000000012c9540_18; -v00000000012c9540_19 .array/port v00000000012c9540, 19; -v00000000012c9540_20 .array/port v00000000012c9540, 20; -v00000000012c9540_21 .array/port v00000000012c9540, 21; -v00000000012c9540_22 .array/port v00000000012c9540, 22; -E_0000000000947e40/5 .event edge, v00000000012c9540_19, v00000000012c9540_20, v00000000012c9540_21, v00000000012c9540_22; -v00000000012c9540_23 .array/port v00000000012c9540, 23; -v00000000012c9540_24 .array/port v00000000012c9540, 24; -v00000000012c9540_25 .array/port v00000000012c9540, 25; -v00000000012c9540_26 .array/port v00000000012c9540, 26; -E_0000000000947e40/6 .event edge, v00000000012c9540_23, v00000000012c9540_24, v00000000012c9540_25, v00000000012c9540_26; -v00000000012c9540_27 .array/port v00000000012c9540, 27; -v00000000012c9540_28 .array/port v00000000012c9540, 28; -v00000000012c9540_29 .array/port v00000000012c9540, 29; -v00000000012c9540_30 .array/port v00000000012c9540, 30; -E_0000000000947e40/7 .event edge, v00000000012c9540_27, v00000000012c9540_28, v00000000012c9540_29, v00000000012c9540_30; -v00000000012c9540_31 .array/port v00000000012c9540, 31; -E_0000000000947e40/8 .event edge, v00000000012c9540_31, v00000000012c8960_0; -E_0000000000947e40 .event/or E_0000000000947e40/0, E_0000000000947e40/1, E_0000000000947e40/2, E_0000000000947e40/3, E_0000000000947e40/4, E_0000000000947e40/5, E_0000000000947e40/6, E_0000000000947e40/7, E_0000000000947e40/8; -S_00000000008f94f0 .scope begin, "$unm_blk_121" "$unm_blk_121" 8 16, 8 16 0, S_00000000008f9360; - .timescale 0 0; -v00000000012ca620_0 .var/i "i", 31 0; -S_00000000008ee6f0 .scope module, "ramInst" "mips_cpu_memory" 3 9, 9 1 0, S_000000000094aab0; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 32 "data_address"; - .port_info 2 /INPUT 1 "data_write"; - .port_info 3 /INPUT 1 "data_read"; - .port_info 4 /INPUT 32 "data_writedata"; - .port_info 5 /OUTPUT 32 "data_readdata"; - .port_info 6 /INPUT 32 "instr_address"; - .port_info 7 /OUTPUT 32 "instr_readdata"; -P_0000000000947f80 .param/str "RAM_INIT_FILE" 0 9 16, "inputs/subu.txt"; -L_000000000094eb50 .functor AND 1, L_0000000001324b60, L_0000000001324ca0, C4<1>, C4<1>; -v0000000001322d30_0 .net *"_ivl_0", 31 0, L_0000000001324fc0; 1 drivers -L_00000000013279e8 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v0000000001322e70_0 .net/2u *"_ivl_12", 31 0, L_00000000013279e8; 1 drivers -v00000000013232d0_0 .net *"_ivl_14", 0 0, L_0000000001324b60; 1 drivers -L_0000000001327a30 .functor BUFT 1, C4<10111111110000000000000001000000>, C4<0>, C4<0>, C4<0>; -v0000000001324310_0 .net/2u *"_ivl_16", 31 0, L_0000000001327a30; 1 drivers -v0000000001323410_0 .net *"_ivl_18", 0 0, L_0000000001324ca0; 1 drivers -v0000000001323cd0_0 .net *"_ivl_2", 31 0, L_0000000001326460; 1 drivers -v0000000001323af0_0 .net *"_ivl_21", 0 0, L_000000000094eb50; 1 drivers -v00000000013241d0_0 .net *"_ivl_22", 31 0, L_0000000001325920; 1 drivers -L_0000000001327a78 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v00000000013234b0_0 .net/2u *"_ivl_24", 31 0, L_0000000001327a78; 1 drivers -v0000000001323b90_0 .net *"_ivl_26", 31 0, L_00000000013254c0; 1 drivers -v0000000001323e10_0 .net *"_ivl_28", 31 0, L_0000000001324c00; 1 drivers -v0000000001323eb0_0 .net *"_ivl_30", 29 0, L_0000000001324d40; 1 drivers -L_0000000001327ac0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0000000001323550_0 .net *"_ivl_32", 1 0, L_0000000001327ac0; 1 drivers -L_0000000001327b08 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v00000000013235f0_0 .net *"_ivl_34", 31 0, L_0000000001327b08; 1 drivers -v0000000001323690_0 .net *"_ivl_4", 29 0, L_00000000013251a0; 1 drivers -L_0000000001327958 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0000000001323ff0_0 .net *"_ivl_6", 1 0, L_0000000001327958; 1 drivers -L_00000000013279a0 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v0000000001324630_0 .net *"_ivl_8", 31 0, L_00000000013279a0; 1 drivers -v0000000001324090_0 .net "clk", 0 0, v0000000001325e20_0; alias, 1 drivers -v0000000001323730_0 .net "data_address", 31 0, v00000000012c9720_0; alias, 1 drivers -v0000000001324130 .array "data_memory", 63 0, 31 0; -v00000000013243b0_0 .net "data_read", 0 0, v00000000012c8f00_0; alias, 1 drivers -v0000000001324450_0 .net "data_readdata", 31 0, L_0000000001325c40; alias, 1 drivers -v00000000013246d0_0 .net "data_write", 0 0, v00000000012c9860_0; alias, 1 drivers -v0000000001324770_0 .net "data_writedata", 31 0, v00000000012c9a40_0; alias, 1 drivers -v0000000001326780_0 .net "instr_address", 31 0, v0000000001323a50_0; alias, 1 drivers -v0000000001326820 .array "instr_memory", 63 0, 31 0; -v0000000001325d80_0 .net "instr_readdata", 31 0, L_00000000013252e0; alias, 1 drivers -L_0000000001324fc0 .array/port v0000000001324130, L_0000000001326460; -L_00000000013251a0 .part v00000000012c9720_0, 2, 30; -L_0000000001326460 .concat [ 30 2 0 0], L_00000000013251a0, L_0000000001327958; -L_0000000001325c40 .functor MUXZ 32, L_00000000013279a0, L_0000000001324fc0, v00000000012c8f00_0, C4<>; -L_0000000001324b60 .cmp/ge 32, v0000000001323a50_0, L_00000000013279e8; -L_0000000001324ca0 .cmp/gt 32, L_0000000001327a30, v0000000001323a50_0; -L_0000000001325920 .array/port v0000000001326820, L_0000000001324c00; -L_00000000013254c0 .arith/sub 32, v0000000001323a50_0, L_0000000001327a78; -L_0000000001324d40 .part L_00000000013254c0, 2, 30; -L_0000000001324c00 .concat [ 30 2 0 0], L_0000000001324d40, L_0000000001327ac0; -L_00000000013252e0 .functor MUXZ 32, L_0000000001327b08, L_0000000001325920, L_000000000094eb50, C4<>; -S_00000000008b2680 .scope begin, "$unm_blk_104" "$unm_blk_104" 9 21, 9 21 0, S_00000000008ee6f0; - .timescale 0 0; -v0000000001324810_0 .var/i "i", 31 0; -S_00000000008b2810 .scope begin, "$ivl_for_loop0" "$ivl_for_loop0" 9 36, 9 36 0, S_00000000008b2680; - .timescale 0 0; -v0000000001322ab0_0 .var/i "j", 31 0; - .scope S_00000000008ee6f0; -T_0 ; - %fork t_1, S_00000000008b2680; - %jmp t_0; - .scope S_00000000008b2680; -t_1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v0000000001324810_0, 0, 32; -T_0.0 ; - %load/vec4 v0000000001324810_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v0000000001324810_0; - %store/vec4a v0000000001324130, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0000000001324810_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v0000000001324810_0, 0, 32; - %jmp T_0.0; -T_0.1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v0000000001324810_0, 0, 32; -T_0.2 ; - %load/vec4 v0000000001324810_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.3, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v0000000001324810_0; - %store/vec4a v0000000001326820, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0000000001324810_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v0000000001324810_0, 0, 32; - %jmp T_0.2; -T_0.3 ; - %vpi_call/w 9 32 "$display", "RAM: Loading RAM contents from %s", P_0000000000947f80 {0 0 0}; - %vpi_call/w 9 33 "$readmemh", P_0000000000947f80, v0000000001326820 {0 0 0}; - %fork t_3, S_00000000008b2810; - %jmp t_2; - .scope S_00000000008b2810; -t_3 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v0000000001322ab0_0, 0, 32; -T_0.4 ; - %load/vec4 v0000000001322ab0_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.5, 5; - %pushi/vec4 3217031168, 0, 32; - %load/vec4 v0000000001322ab0_0; - %muli 4, 0, 32; - %add; - %vpi_call/w 9 37 "$display", "byte +%h: %h", S<0,vec4,u32>, &A {1 0 0}; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0000000001322ab0_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v0000000001322ab0_0, 0, 32; - %jmp T_0.4; -T_0.5 ; - %end; - .scope S_00000000008b2680; -t_2 %join; - %end; - .scope S_00000000008ee6f0; -t_0 %join; - %end; - .thread T_0; - .scope S_00000000008ee6f0; -T_1 ; - %wait E_0000000000947b00; - %load/vec4 v00000000013243b0_0; - %nor/r; - %load/vec4 v00000000013246d0_0; - %and; - %flag_set/vec4 8; - %jmp/0xz T_1.0, 8; - %load/vec4 v0000000001326780_0; - %load/vec4 v0000000001323730_0; - %cmp/ne; - %jmp/0xz T_1.2, 4; - %load/vec4 v0000000001324770_0; - %load/vec4 v0000000001323730_0; - %ix/load 4, 2, 0; - %flag_set/imm 4, 0; - %shiftr 4; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001324130, 0, 4; -T_1.2 ; -T_1.0 ; - %jmp T_1; - .thread T_1; - .scope S_00000000008f91d0; -T_2 ; - %load/vec4 v00000000012ca4e0_0; - %store/vec4 v00000000012c9b80_0, 0, 32; - %end; - .thread T_2; - .scope S_00000000008f91d0; -T_3 ; - %wait E_0000000000947b00; - %load/vec4 v00000000012c8a00_0; - %flag_set/vec4 8; - %jmp/0xz T_3.0, 8; - %pushi/vec4 1, 0, 1; - %assign/vec4 v00000000012c9040_0, 0; - %pushi/vec4 3217031168, 0, 32; - %assign/vec4 v00000000012c9b80_0, 0; - %jmp T_3.1; -T_3.0 ; - %load/vec4 v00000000012c9b80_0; - %cmpi/ne 0, 0, 32; - %jmp/0xz T_3.2, 4; - %load/vec4 v00000000012c9040_0; - %assign/vec4 v00000000012c9040_0, 0; - %load/vec4 v00000000012c90e0_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_3.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_3.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_3.6, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_3.7, 6; - %jmp T_3.8; -T_3.4 ; - %load/vec4 v00000000012c9b80_0; - %assign/vec4 v00000000012c9180_0, 0; - %load/vec4 v00000000012c9180_0; - %addi 4, 0, 32; - %assign/vec4 v00000000012c9b80_0, 0; - %vpi_call/w 7 27 "$display", "New PC from %h to %h", v00000000012c9180_0, v00000000012c9b80_0 {0 0 0}; - %jmp T_3.8; -T_3.5 ; - %load/vec4 v00000000012ca4e0_0; - %assign/vec4 v00000000012c9b80_0, 0; - %jmp T_3.8; -T_3.6 ; - %load/vec4 v00000000012ca4e0_0; - %assign/vec4 v00000000012c9b80_0, 0; - %jmp T_3.8; -T_3.7 ; - %vpi_call/w 7 36 "$display", "JUMP REGISTER" {0 0 0}; - %pushi/vec4 0, 0, 32; - %assign/vec4 v00000000012c9b80_0, 0; - %jmp T_3.8; -T_3.8 ; - %pop/vec4 1; - %jmp T_3.3; -T_3.2 ; - %load/vec4 v00000000012c9b80_0; - %cmpi/e 0, 0, 32; - %jmp/0xz T_3.9, 4; - %pushi/vec4 0, 0, 1; - %assign/vec4 v00000000012c9040_0, 0; -T_3.9 ; -T_3.3 ; -T_3.1 ; - %jmp T_3; - .thread T_3; - .scope S_0000000000906150; -T_4 ; - %wait E_0000000000947200; - %vpi_call/w 6 86 "$display", "Opcode: %h", v00000000012ca6c0_0 {0 0 0}; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.0, 4; - %pushi/vec4 0, 0, 2; - %store/vec4 v00000000012c9360_0, 0, 2; - %vpi_call/w 6 89 "$display", "CTRLREGDST: Rt" {0 0 0}; - %jmp T_4.1; -T_4.0 ; - %load/vec4 v00000000012ca6c0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.2, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v00000000012c9360_0, 0, 2; - %vpi_call/w 6 92 "$display", "CTRLREGDST: Rd" {0 0 0}; - %jmp T_4.3; -T_4.2 ; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 3, 0, 6; - %jmp/0xz T_4.4, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v00000000012c9360_0, 0, 2; - %vpi_call/w 6 95 "$display", "CTRLREGDST: Link" {0 0 0}; - %jmp T_4.5; -T_4.4 ; - %pushi/vec4 1, 1, 2; - %store/vec4 v00000000012c9360_0, 0, 2; - %vpi_call/w 6 96 "$display", "xxxxxxxxxxxxxx" {0 0 0}; -T_4.5 ; -T_4.3 ; -T_4.1 ; - %load/vec4 v00000000012c8e60_0; - %load/vec4 v00000000012ca6c0_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca6c0_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca6c0_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca6c0_0; - %pushi/vec4 5, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca6c0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca080_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca080_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca080_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca080_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.6, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v00000000012c9fe0_0, 0, 2; - %jmp T_4.7; -T_4.6 ; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 2, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 3, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.8, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v00000000012c9fe0_0, 0, 2; - %jmp T_4.9; -T_4.8 ; - %load/vec4 v00000000012ca120_0; - %cmpi/e 8, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012ca120_0; - %cmpi/e 9, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.10, 4; - %pushi/vec4 3, 0, 2; - %store/vec4 v00000000012c9fe0_0, 0, 2; - %jmp T_4.11; -T_4.10 ; - %pushi/vec4 0, 0, 2; - %store/vec4 v00000000012c9fe0_0, 0, 2; -T_4.11 ; -T_4.9 ; -T_4.7 ; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.12, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000012c9900_0, 0, 1; - %pushi/vec4 1, 0, 2; - %store/vec4 v00000000012c9e00_0, 0, 2; - %vpi_call/w 6 112 "$display", "Memory read enabled" {0 0 0}; - %jmp T_4.13; -T_4.12 ; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.14, 9; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000012c9900_0, 0, 1; - %pushi/vec4 0, 0, 2; - %store/vec4 v00000000012c9e00_0, 0, 2; - %vpi_call/w 6 116 "$display", "Memory read disabled" {0 0 0}; - %jmp T_4.15; -T_4.14 ; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 3, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.16, 9; - %pushi/vec4 2, 0, 2; - %store/vec4 v00000000012c9e00_0, 0, 2; - %jmp T_4.17; -T_4.16 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v00000000012c9900_0, 0, 1; -T_4.17 ; -T_4.15 ; -T_4.13 ; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.18, 9; - %pushi/vec4 0, 0, 5; - %store/vec4 v00000000012ca580_0, 0, 5; - %vpi_call/w 6 124 "$display", "ALU OP = 0 (ADDU/ADDIU)" {0 0 0}; - %jmp T_4.19; -T_4.18 ; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 12, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.20, 9; - %pushi/vec4 4, 0, 5; - %store/vec4 v00000000012ca580_0, 0, 5; - %jmp T_4.21; -T_4.20 ; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 4, 0, 6; - %jmp/0xz T_4.22, 4; - %pushi/vec4 13, 0, 5; - %store/vec4 v00000000012ca580_0, 0, 5; - %jmp T_4.23; -T_4.22 ; - %load/vec4 v00000000012ca6c0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca080_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca080_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.24, 8; - %pushi/vec4 17, 0, 5; - %store/vec4 v00000000012ca580_0, 0, 5; - %jmp T_4.25; -T_4.24 ; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 7, 0, 6; - %jmp/0xz T_4.26, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v00000000012ca580_0, 0, 5; - %jmp T_4.27; -T_4.26 ; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 6, 0, 6; - %jmp/0xz T_4.28, 4; - %pushi/vec4 15, 0, 5; - %store/vec4 v00000000012ca580_0, 0, 5; - %jmp T_4.29; -T_4.28 ; - %load/vec4 v00000000012ca6c0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca080_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca080_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.30, 8; - %pushi/vec4 14, 0, 5; - %store/vec4 v00000000012ca580_0, 0, 5; - %jmp T_4.31; -T_4.30 ; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 5, 0, 6; - %jmp/0xz T_4.32, 4; - %pushi/vec4 18, 0, 5; - %store/vec4 v00000000012ca580_0, 0, 5; - %jmp T_4.33; -T_4.32 ; - %load/vec4 v00000000012ca6c0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.34, 8; - %pushi/vec4 3, 0, 5; - %store/vec4 v00000000012ca580_0, 0, 5; - %jmp T_4.35; -T_4.34 ; - %load/vec4 v00000000012ca6c0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.36, 8; - %pushi/vec4 23, 0, 5; - %store/vec4 v00000000012ca580_0, 0, 5; - %jmp T_4.37; -T_4.36 ; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.38, 4; - %pushi/vec4 0, 0, 5; - %store/vec4 v00000000012ca580_0, 0, 5; - %jmp T_4.39; -T_4.38 ; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.40, 4; - %pushi/vec4 7, 0, 5; - %store/vec4 v00000000012ca580_0, 0, 5; - %jmp T_4.41; -T_4.40 ; - %load/vec4 v00000000012ca6c0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.42, 8; - %pushi/vec4 19, 0, 5; - %store/vec4 v00000000012ca580_0, 0, 5; - %jmp T_4.43; -T_4.42 ; - %load/vec4 v00000000012ca6c0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.44, 8; - %pushi/vec4 2, 0, 5; - %store/vec4 v00000000012ca580_0, 0, 5; - %jmp T_4.45; -T_4.44 ; - %load/vec4 v00000000012ca6c0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.46, 8; - %pushi/vec4 22, 0, 5; - %store/vec4 v00000000012ca580_0, 0, 5; - %jmp T_4.47; -T_4.46 ; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 13, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.48, 9; - %pushi/vec4 5, 0, 5; - %store/vec4 v00000000012ca580_0, 0, 5; - %jmp T_4.49; -T_4.48 ; - %load/vec4 v00000000012ca6c0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.50, 8; - %pushi/vec4 7, 0, 5; - %store/vec4 v00000000012ca580_0, 0, 5; - %jmp T_4.51; -T_4.50 ; - %load/vec4 v00000000012ca6c0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.52, 8; - %pushi/vec4 8, 0, 5; - %store/vec4 v00000000012ca580_0, 0, 5; - %jmp T_4.53; -T_4.52 ; - %load/vec4 v00000000012ca6c0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.54, 8; - %pushi/vec4 11, 0, 5; - %store/vec4 v00000000012ca580_0, 0, 5; - %jmp T_4.55; -T_4.54 ; - %load/vec4 v00000000012ca6c0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.56, 8; - %pushi/vec4 12, 0, 5; - %store/vec4 v00000000012ca580_0, 0, 5; - %jmp T_4.57; -T_4.56 ; - %load/vec4 v00000000012ca6c0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.58, 8; - %pushi/vec4 9, 0, 5; - %store/vec4 v00000000012ca580_0, 0, 5; - %jmp T_4.59; -T_4.58 ; - %load/vec4 v00000000012ca6c0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.60, 8; - %pushi/vec4 10, 0, 5; - %store/vec4 v00000000012ca580_0, 0, 5; - %jmp T_4.61; -T_4.60 ; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 10, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.62, 9; - %pushi/vec4 20, 0, 5; - %store/vec4 v00000000012ca580_0, 0, 5; - %jmp T_4.63; -T_4.62 ; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 11, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.64, 9; - %pushi/vec4 21, 0, 5; - %store/vec4 v00000000012ca580_0, 0, 5; - %jmp T_4.65; -T_4.64 ; - %load/vec4 v00000000012ca6c0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.66, 8; - %pushi/vec4 1, 0, 5; - %store/vec4 v00000000012ca580_0, 0, 5; - %jmp T_4.67; -T_4.66 ; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 14, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.68, 9; - %pushi/vec4 6, 0, 5; - %store/vec4 v00000000012ca580_0, 0, 5; - %vpi_call/w 6 175 "$display", "ALU Op = 6 (XOR)" {0 0 0}; - %jmp T_4.69; -T_4.68 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v00000000012ca580_0, 0, 5; -T_4.69 ; -T_4.67 ; -T_4.65 ; -T_4.63 ; -T_4.61 ; -T_4.59 ; -T_4.57 ; -T_4.55 ; -T_4.53 ; -T_4.51 ; -T_4.49 ; -T_4.47 ; -T_4.45 ; -T_4.43 ; -T_4.41 ; -T_4.39 ; -T_4.37 ; -T_4.35 ; -T_4.33 ; -T_4.31 ; -T_4.29 ; -T_4.27 ; -T_4.25 ; -T_4.23 ; -T_4.21 ; -T_4.19 ; - %load/vec4 v00000000012ca6c0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.70, 8; - %load/vec4 v00000000012c9ae0_0; - %parti/s 5, 6, 4; - %store/vec4 v00000000012c8dc0_0, 0, 5; - %jmp T_4.71; -T_4.70 ; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.72, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v00000000012c8dc0_0, 0, 5; - %jmp T_4.73; -T_4.72 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v00000000012c8dc0_0, 0, 5; -T_4.73 ; -T_4.71 ; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 40, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.74, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000012c95e0_0, 0, 1; - %jmp T_4.75; -T_4.74 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000012c95e0_0, 0, 1; -T_4.75 ; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.76, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000012ca3a0_0, 0, 1; - %jmp T_4.77; -T_4.76 ; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 4, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 7, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 6, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 5, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %load/vec4 v00000000012ca6c0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca080_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca080_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca080_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca080_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %flag_or 8, 9; - %jmp/0xz T_4.78, 8; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000012ca3a0_0, 0, 1; - %jmp T_4.79; -T_4.78 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v00000000012ca3a0_0, 0, 1; -T_4.79 ; -T_4.77 ; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000012ca6c0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000012ca120_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.80, 9; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000012c8fa0_0, 0, 1; - %jmp T_4.81; -T_4.80 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000012c8fa0_0, 0, 1; -T_4.81 ; - %jmp T_4; - .thread T_4, $push; - .scope S_00000000008f9360; -T_5 ; - %fork t_5, S_00000000008f94f0; - %jmp t_4; - .scope S_00000000008f94f0; -t_5 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000012ca620_0, 0, 32; -T_5.0 ; - %load/vec4 v00000000012ca620_0; - %cmpi/s 32, 0, 32; - %jmp/0xz T_5.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v00000000012ca620_0; - %store/vec4a v00000000012c9540, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000012ca620_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000012ca620_0, 0, 32; - %jmp T_5.0; -T_5.1 ; - %end; - .scope S_00000000008f9360; -t_4 %join; - %end; - .thread T_5; - .scope S_00000000008f9360; -T_6 ; -Ewait_0 .event/or E_0000000000947e40, E_0x0; - %wait Ewait_0; - %load/vec4 v00000000012ca800_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v00000000012c9540, 4; - %store/vec4 v00000000012c92c0_0, 0, 32; - %load/vec4 v00000000012c8960_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v00000000012c9540, 4; - %store/vec4 v00000000012c9400_0, 0, 32; - %jmp T_6; - .thread T_6, $push; - .scope S_00000000008f9360; -T_7 ; - %wait E_00000000009480c0; - %load/vec4 v00000000012c8c80_0; - %cmpi/e 0, 0, 5; - %jmp/0xz T_7.0, 4; - %jmp T_7.1; -T_7.0 ; - %load/vec4 v00000000012c8aa0_0; - %flag_set/vec4 8; - %jmp/0xz T_7.2, 8; - %load/vec4 v00000000012ca760_0; - %dup/vec4; - %pushi/vec4 32, 0, 6; - %cmp/u; - %jmp/1 T_7.4, 6; - %dup/vec4; - %pushi/vec4 36, 0, 6; - %cmp/u; - %jmp/1 T_7.5, 6; - %dup/vec4; - %pushi/vec4 33, 0, 6; - %cmp/u; - %jmp/1 T_7.6, 6; - %dup/vec4; - %pushi/vec4 37, 0, 6; - %cmp/u; - %jmp/1 T_7.7, 6; - %dup/vec4; - %pushi/vec4 34, 0, 6; - %cmp/u; - %jmp/1 T_7.8, 6; - %dup/vec4; - %pushi/vec4 38, 0, 6; - %cmp/u; - %jmp/1 T_7.9, 6; - %load/vec4 v00000000012c8be0_0; - %load/vec4 v00000000012c8c80_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9540, 0, 4; - %jmp T_7.11; -T_7.4 ; - %load/vec4 v00000000012c92c0_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.12, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.13, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.14, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.15, 6; - %jmp T_7.16; -T_7.12 ; - %load/vec4 v00000000012c8be0_0; - %parti/s 1, 7, 4; - %replicate 24; - %load/vec4 v00000000012c8be0_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000012c8c80_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9540, 0, 4; - %jmp T_7.16; -T_7.13 ; - %load/vec4 v00000000012c8be0_0; - %parti/s 1, 15, 5; - %replicate 24; - %load/vec4 v00000000012c8be0_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000012c8c80_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9540, 0, 4; - %jmp T_7.16; -T_7.14 ; - %load/vec4 v00000000012c8be0_0; - %parti/s 1, 23, 6; - %replicate 24; - %load/vec4 v00000000012c8be0_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000012c8c80_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9540, 0, 4; - %jmp T_7.16; -T_7.15 ; - %load/vec4 v00000000012c8be0_0; - %parti/s 1, 31, 6; - %replicate 24; - %load/vec4 v00000000012c8be0_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000012c8c80_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9540, 0, 4; - %jmp T_7.16; -T_7.16 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.5 ; - %load/vec4 v00000000012c92c0_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.17, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.18, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.19, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.20, 6; - %jmp T_7.21; -T_7.17 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000012c8be0_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000012c8c80_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9540, 0, 4; - %jmp T_7.21; -T_7.18 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000012c8be0_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000012c8c80_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9540, 0, 4; - %jmp T_7.21; -T_7.19 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000012c8be0_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000012c8c80_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9540, 0, 4; - %jmp T_7.21; -T_7.20 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000012c8be0_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000012c8c80_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9540, 0, 4; - %jmp T_7.21; -T_7.21 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.6 ; - %load/vec4 v00000000012c92c0_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.22, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.23, 6; - %jmp T_7.24; -T_7.22 ; - %load/vec4 v00000000012c8be0_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v00000000012c8be0_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000012c8c80_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9540, 0, 4; - %jmp T_7.24; -T_7.23 ; - %load/vec4 v00000000012c8be0_0; - %parti/s 1, 31, 6; - %replicate 16; - %load/vec4 v00000000012c8be0_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000012c8c80_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9540, 0, 4; - %jmp T_7.24; -T_7.24 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.7 ; - %load/vec4 v00000000012c92c0_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.25, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.26, 6; - %jmp T_7.27; -T_7.25 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v00000000012c8be0_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000012c8c80_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9540, 0, 4; - %jmp T_7.27; -T_7.26 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v00000000012c8be0_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000012c8c80_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9540, 0, 4; - %jmp T_7.27; -T_7.27 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.8 ; - %load/vec4 v00000000012c92c0_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.28, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.29, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.30, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.31, 6; - %jmp T_7.32; -T_7.28 ; - %load/vec4 v00000000012c8be0_0; - %parti/s 8, 0, 2; - %load/vec4 v00000000012c8c80_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 24, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9540, 4, 5; - %jmp T_7.32; -T_7.29 ; - %load/vec4 v00000000012c8be0_0; - %parti/s 16, 0, 2; - %load/vec4 v00000000012c8c80_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 16, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9540, 4, 5; - %jmp T_7.32; -T_7.30 ; - %load/vec4 v00000000012c8be0_0; - %parti/s 24, 0, 2; - %load/vec4 v00000000012c8c80_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 8, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9540, 4, 5; - %jmp T_7.32; -T_7.31 ; - %load/vec4 v00000000012c8be0_0; - %load/vec4 v00000000012c8c80_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9540, 0, 4; - %jmp T_7.32; -T_7.32 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.9 ; - %load/vec4 v00000000012c92c0_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.33, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.34, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.35, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.36, 6; - %jmp T_7.37; -T_7.33 ; - %load/vec4 v00000000012c8be0_0; - %load/vec4 v00000000012c8c80_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9540, 0, 4; - %jmp T_7.37; -T_7.34 ; - %load/vec4 v00000000012c8be0_0; - %parti/s 24, 8, 5; - %load/vec4 v00000000012c8c80_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9540, 0, 4; - %jmp T_7.37; -T_7.35 ; - %load/vec4 v00000000012c8be0_0; - %parti/s 16, 16, 6; - %load/vec4 v00000000012c8c80_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9540, 0, 4; - %jmp T_7.37; -T_7.36 ; - %load/vec4 v00000000012c8be0_0; - %parti/s 8, 24, 6; - %load/vec4 v00000000012c8c80_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000012c9540, 0, 4; - %jmp T_7.37; -T_7.37 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.11 ; - %pop/vec4 1; -T_7.2 ; -T_7.1 ; - %jmp T_7; - .thread T_7; - .scope S_0000000000905fc0; -T_8 ; -Ewait_1 .event/or E_0000000000947cc0, E_0x0; - %wait Ewait_1; - %load/vec4 v00000000012c8b40_0; - %dup/vec4; - %pushi/vec4 0, 0, 5; - %cmp/u; - %jmp/1 T_8.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 5; - %cmp/u; - %jmp/1 T_8.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 5; - %cmp/u; - %jmp/1 T_8.2, 6; - %dup/vec4; - %pushi/vec4 3, 0, 5; - %cmp/u; - %jmp/1 T_8.3, 6; - %dup/vec4; - %pushi/vec4 4, 0, 5; - %cmp/u; - %jmp/1 T_8.4, 6; - %dup/vec4; - %pushi/vec4 5, 0, 5; - %cmp/u; - %jmp/1 T_8.5, 6; - %dup/vec4; - %pushi/vec4 6, 0, 5; - %cmp/u; - %jmp/1 T_8.6, 6; - %dup/vec4; - %pushi/vec4 7, 0, 5; - %cmp/u; - %jmp/1 T_8.7, 6; - %dup/vec4; - %pushi/vec4 8, 0, 5; - %cmp/u; - %jmp/1 T_8.8, 6; - %dup/vec4; - %pushi/vec4 9, 0, 5; - %cmp/u; - %jmp/1 T_8.9, 6; - %dup/vec4; - %pushi/vec4 10, 0, 5; - %cmp/u; - %jmp/1 T_8.10, 6; - %dup/vec4; - %pushi/vec4 11, 0, 5; - %cmp/u; - %jmp/1 T_8.11, 6; - %dup/vec4; - %pushi/vec4 12, 0, 5; - %cmp/u; - %jmp/1 T_8.12, 6; - %dup/vec4; - %pushi/vec4 13, 0, 5; - %cmp/u; - %jmp/1 T_8.13, 6; - %dup/vec4; - %pushi/vec4 14, 0, 5; - %cmp/u; - %jmp/1 T_8.14, 6; - %dup/vec4; - %pushi/vec4 15, 0, 5; - %cmp/u; - %jmp/1 T_8.15, 6; - %dup/vec4; - %pushi/vec4 16, 0, 5; - %cmp/u; - %jmp/1 T_8.16, 6; - %dup/vec4; - %pushi/vec4 17, 0, 5; - %cmp/u; - %jmp/1 T_8.17, 6; - %dup/vec4; - %pushi/vec4 18, 0, 5; - %cmp/u; - %jmp/1 T_8.18, 6; - %dup/vec4; - %pushi/vec4 19, 0, 5; - %cmp/u; - %jmp/1 T_8.19, 6; - %dup/vec4; - %pushi/vec4 20, 0, 5; - %cmp/u; - %jmp/1 T_8.20, 6; - %dup/vec4; - %pushi/vec4 21, 0, 5; - %cmp/u; - %jmp/1 T_8.21, 6; - %dup/vec4; - %pushi/vec4 22, 0, 5; - %cmp/u; - %jmp/1 T_8.22, 6; - %dup/vec4; - %pushi/vec4 23, 0, 5; - %cmp/u; - %jmp/1 T_8.23, 6; - %jmp T_8.24; -T_8.0 ; - %load/vec4 v00000000012c9cc0_0; - %load/vec4 v00000000012c9d60_0; - %add; - %store/vec4 v00000000012ca260_0, 0, 32; - %jmp T_8.24; -T_8.1 ; - %load/vec4 v00000000012c9cc0_0; - %load/vec4 v00000000012c9d60_0; - %sub; - %store/vec4 v00000000012ca260_0, 0, 32; - %jmp T_8.24; -T_8.2 ; - %load/vec4 v00000000012c9cc0_0; - %load/vec4 v00000000012c9d60_0; - %mul; - %store/vec4 v00000000012ca260_0, 0, 32; - %jmp T_8.24; -T_8.3 ; - %load/vec4 v00000000012c9cc0_0; - %load/vec4 v00000000012c9d60_0; - %div/s; - %store/vec4 v00000000012ca260_0, 0, 32; - %jmp T_8.24; -T_8.4 ; - %load/vec4 v00000000012c9cc0_0; - %load/vec4 v00000000012c9d60_0; - %and; - %store/vec4 v00000000012ca260_0, 0, 32; - %jmp T_8.24; -T_8.5 ; - %load/vec4 v00000000012c9cc0_0; - %load/vec4 v00000000012c9d60_0; - %or; - %store/vec4 v00000000012ca260_0, 0, 32; - %jmp T_8.24; -T_8.6 ; - %load/vec4 v00000000012c9cc0_0; - %load/vec4 v00000000012c9d60_0; - %xor; - %store/vec4 v00000000012ca260_0, 0, 32; - %jmp T_8.24; -T_8.7 ; - %load/vec4 v00000000012c9d60_0; - %ix/getv 4, v00000000012c9f40_0; - %shiftl 4; - %store/vec4 v00000000012ca260_0, 0, 32; - %jmp T_8.24; -T_8.8 ; - %load/vec4 v00000000012c9d60_0; - %ix/getv 4, v00000000012c9cc0_0; - %shiftl 4; - %store/vec4 v00000000012ca260_0, 0, 32; - %jmp T_8.24; -T_8.9 ; - %load/vec4 v00000000012c9d60_0; - %ix/getv 4, v00000000012c9f40_0; - %shiftr 4; - %store/vec4 v00000000012ca260_0, 0, 32; - %jmp T_8.24; -T_8.10 ; - %load/vec4 v00000000012c9d60_0; - %ix/getv 4, v00000000012c9cc0_0; - %shiftr 4; - %store/vec4 v00000000012ca260_0, 0, 32; - %jmp T_8.24; -T_8.11 ; - %load/vec4 v00000000012c9d60_0; - %ix/getv 4, v00000000012c9f40_0; - %shiftr 4; - %store/vec4 v00000000012ca260_0, 0, 32; - %jmp T_8.24; -T_8.12 ; - %load/vec4 v00000000012c9d60_0; - %ix/getv 4, v00000000012c9cc0_0; - %shiftr 4; - %store/vec4 v00000000012ca260_0, 0, 32; - %jmp T_8.24; -T_8.13 ; - %load/vec4 v00000000012c9cc0_0; - %load/vec4 v00000000012c9d60_0; - %cmp/e; - %jmp/0xz T_8.25, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000012c9c20_0, 0, 1; - %jmp T_8.26; -T_8.25 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000012c9c20_0, 0, 1; -T_8.26 ; - %jmp T_8.24; -T_8.14 ; - %load/vec4 v00000000012c9cc0_0; - %load/vec4 v00000000012c9d60_0; - %cmp/s; - %jmp/0xz T_8.27, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000012c9c20_0, 0, 1; - %jmp T_8.28; -T_8.27 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000012c9c20_0, 0, 1; -T_8.28 ; - %jmp T_8.24; -T_8.15 ; - %load/vec4 v00000000012c9cc0_0; - %load/vec4 v00000000012c9d60_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.29, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000012c9c20_0, 0, 1; - %jmp T_8.30; -T_8.29 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000012c9c20_0, 0, 1; -T_8.30 ; - %jmp T_8.24; -T_8.16 ; - %load/vec4 v00000000012c9d60_0; - %load/vec4 v00000000012c9cc0_0; - %cmp/s; - %jmp/0xz T_8.31, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000012c9c20_0, 0, 1; - %jmp T_8.32; -T_8.31 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000012c9c20_0, 0, 1; -T_8.32 ; - %jmp T_8.24; -T_8.17 ; - %load/vec4 v00000000012c9d60_0; - %load/vec4 v00000000012c9cc0_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.33, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000012c9c20_0, 0, 1; - %jmp T_8.34; -T_8.33 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000012c9c20_0, 0, 1; -T_8.34 ; - %jmp T_8.24; -T_8.18 ; - %load/vec4 v00000000012c9cc0_0; - %load/vec4 v00000000012c9d60_0; - %cmp/ne; - %jmp/0xz T_8.35, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000012c9c20_0, 0, 1; - %jmp T_8.36; -T_8.35 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000012c9c20_0, 0, 1; -T_8.36 ; - %jmp T_8.24; -T_8.19 ; - %load/vec4 v00000000012c9cc0_0; - %store/vec4 v00000000012ca260_0, 0, 32; - %jmp T_8.24; -T_8.20 ; - %load/vec4 v00000000012c9cc0_0; - %load/vec4 v00000000012c9d60_0; - %cmp/s; - %jmp/0xz T_8.37, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v00000000012ca260_0, 0, 32; -T_8.37 ; - %jmp T_8.24; -T_8.21 ; - %load/vec4 v00000000012c9cc0_0; - %load/vec4 v00000000012c9d60_0; - %cmp/u; - %jmp/0xz T_8.39, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v00000000012ca260_0, 0, 32; -T_8.39 ; - %jmp T_8.24; -T_8.22 ; - %load/vec4 v00000000012c9cc0_0; - %load/vec4 v00000000012c9d60_0; - %mul; - %store/vec4 v00000000012ca260_0, 0, 32; - %jmp T_8.24; -T_8.23 ; - %load/vec4 v00000000012c9cc0_0; - %load/vec4 v00000000012c9d60_0; - %div; - %store/vec4 v00000000012ca260_0, 0, 32; - %jmp T_8.24; -T_8.24 ; - %pop/vec4 1; - %jmp T_8; - .thread T_8, $push; - .scope S_0000000000905e30; -T_9 ; - %pushi/vec4 3217031168, 0, 32; - %store/vec4 v0000000001323050_0, 0, 32; - %end; - .thread T_9, $init; - .scope S_0000000000905e30; -T_10 ; -Ewait_2 .event/or E_0000000000945fc0, E_0x0; - %wait Ewait_2; - %load/vec4 v0000000001323d70_0; - %store/vec4 v0000000001323a50_0, 0, 32; - %load/vec4 v0000000001322b50_0; - %store/vec4 v00000000012c9720_0, 0, 32; - %load/vec4 v0000000001322a10_0; - %store/vec4 v00000000012c9860_0, 0, 1; - %load/vec4 v0000000001323870_0; - %store/vec4 v00000000012c8f00_0, 0, 1; - %load/vec4 v0000000001322c90_0; - %store/vec4 v00000000012c9a40_0, 0, 32; - %jmp T_10; - .thread T_10, $push; - .scope S_0000000000905e30; -T_11 ; -Ewait_3 .event/or E_0000000000945e00, E_0x0; - %wait Ewait_3; - %load/vec4 v00000000013230f0_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.2, 6; - %jmp T_11.3; -T_11.0 ; - %load/vec4 v0000000001322970_0; - %parti/s 5, 16, 6; - %store/vec4 v00000000013244f0_0, 0, 5; - %jmp T_11.3; -T_11.1 ; - %load/vec4 v0000000001322970_0; - %parti/s 5, 11, 5; - %store/vec4 v00000000013244f0_0, 0, 5; - %jmp T_11.3; -T_11.2 ; - %pushi/vec4 31, 0, 5; - %store/vec4 v00000000013244f0_0, 0, 5; - %jmp T_11.3; -T_11.3 ; - %pop/vec4 1; - %load/vec4 v0000000001322fb0_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.6, 6; - %jmp T_11.7; -T_11.4 ; - %load/vec4 v0000000001322b50_0; - %store/vec4 v00000000013237d0_0, 0, 32; - %jmp T_11.7; -T_11.5 ; - %load/vec4 v00000000012c97c0_0; - %store/vec4 v00000000013237d0_0, 0, 32; - %jmp T_11.7; -T_11.6 ; - %load/vec4 v0000000001323050_0; - %addi 8, 0, 32; - %store/vec4 v00000000013237d0_0, 0, 32; - %jmp T_11.7; -T_11.7 ; - %pop/vec4 1; - %load/vec4 v0000000001322f10_0; - %dup/vec4; - %pushi/vec4 1, 0, 1; - %cmp/u; - %jmp/1 T_11.8, 6; - %dup/vec4; - %pushi/vec4 0, 0, 1; - %cmp/u; - %jmp/1 T_11.9, 6; - %jmp T_11.10; -T_11.8 ; - %load/vec4 v0000000001322970_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v0000000001322970_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %store/vec4 v000000000092e600_0, 0, 32; - %jmp T_11.10; -T_11.9 ; - %load/vec4 v0000000001322c90_0; - %store/vec4 v000000000092e600_0, 0, 32; - %jmp T_11.10; -T_11.10 ; - %pop/vec4 1; - %jmp T_11; - .thread T_11, $push; - .scope S_000000000094aab0; -T_12 ; - %vpi_call/w 3 36 "$dumpfile", "mips_cpu_harvard.vcd" {0 0 0}; - %vpi_call/w 3 37 "$dumpvars", 32'sb00000000000000000000000000000000, S_000000000094aab0 {0 0 0}; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001325e20_0, 0, 1; - %pushi/vec4 100, 0, 32; -T_12.0 %dup/vec4; - %pushi/vec4 0, 0, 32; - %cmp/s; - %jmp/1xz T_12.1, 5; - %jmp/1 T_12.1, 4; - %pushi/vec4 1, 0, 32; - %sub; - %delay 10, 0; - %load/vec4 v0000000001325e20_0; - %nor/r; - %store/vec4 v0000000001325e20_0, 0, 1; - %delay 10, 0; - %load/vec4 v0000000001325e20_0; - %nor/r; - %store/vec4 v0000000001325e20_0, 0, 1; - %jmp T_12.0; -T_12.1 ; - %pop/vec4 1; - %vpi_call/w 3 47 "$fatal", 32'sb00000000000000000000000000000010, "Simulation did not finish within %d cycles.", P_0000000000894598 {0 0 0}; - %end; - .thread T_12; - .scope S_000000000094aab0; -T_13 ; - %vpi_call/w 3 51 "$display", "Initial Reset 0" {0 0 0}; - %pushi/vec4 0, 0, 1; - %assign/vec4 v0000000001326320_0, 0; - %vpi_call/w 3 55 "$display", "Initial Reset 1" {0 0 0}; - %wait E_0000000000947b00; - %pushi/vec4 1, 0, 1; - %assign/vec4 v0000000001326320_0, 0; - %vpi_call/w 3 59 "$display", "Initial Reset 0: Start Program" {0 0 0}; - %wait E_0000000000947b00; - %pushi/vec4 0, 0, 1; - %assign/vec4 v0000000001326320_0, 0; - %wait E_0000000000947b00; - %load/vec4 v0000000001324ac0_0; - %pad/u 32; - %cmpi/e 1, 0, 32; - %jmp/0xz T_13.0, 4; - %jmp T_13.1; -T_13.0 ; - %vpi_call/w 3 65 "$display", "TB: CPU did not set active=1 after reset." {0 0 0}; -T_13.1 ; -T_13.2 ; - %load/vec4 v0000000001324ac0_0; - %flag_set/vec4 8; - %jmp/0xz T_13.3, 8; - %wait E_0000000000947b00; - %vpi_call/w 3 71 "$display", "Reg File Write data: %d", v00000000013237d0_0 {0 0 0}; - %jmp T_13.2; -T_13.3 ; - %wait E_0000000000947b00; - %vpi_call/w 3 74 "$display", "TB: CPU Halt; active=0" {0 0 0}; - %vpi_call/w 3 75 "$display", "Output:" {0 0 0}; - %vpi_call/w 3 76 "$display", "%d", v0000000001326000_0 {0 0 0}; - %vpi_call/w 3 77 "$finish" {0 0 0}; - %end; - .thread T_13; -# The file index is used to find the file name in the following table. -:file_names 10; - "N/A"; - ""; - "-"; - "testbench/mips_cpu_harvard_tb.v"; - "rtl/mips_cpu_harvard.v"; - "rtl/mips_cpu_alu.v"; - "rtl/mips_cpu_control.v"; - "rtl/mips_cpu_pc.v"; - "rtl/mips_cpu_regfile.v"; - "rtl/mips_cpu_memory.v"; diff --git a/exec/mips_cpu_harvard_tb_xor b/exec/mips_cpu_harvard_tb_xor deleted file mode 100644 index a55fa73..0000000 --- a/exec/mips_cpu_harvard_tb_xor +++ /dev/null @@ -1,2738 +0,0 @@ -#! /usr/local/iverilog/bin/vvp -:ivl_version "11.0 (devel)"; -:ivl_delay_selection "TYPICAL"; -:vpi_time_precision + 0; -:vpi_module "C:\iverilog\lib\ivl\system.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_sys.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_textio.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2005_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\va_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2009.vpi"; -S_00000000010daf90 .scope package, "$unit" "$unit" 2 1; - .timescale 0 0; -S_000000000101ec90 .scope module, "mips_cpu_harvard_tb" "mips_cpu_harvard_tb" 3 1; - .timescale 0 0; -P_0000000001004a30 .param/str "RAM_INIT_FILE" 0 3 3, "inputs/xor.txt"; -P_0000000001004a68 .param/l "TIMEOUT_CYCLES" 0 3 4, +C4<00000000000000000000000001100100>; -v0000000001135420_0 .net "active", 0 0, v00000000010da760_0; 1 drivers -v00000000011357e0_0 .var "clk", 0 0; -v0000000001134ac0_0 .var "clk_enable", 0 0; -v0000000001135060_0 .net "data_address", 31 0, v00000000010d8be0_0; 1 drivers -v0000000001135560_0 .net "data_read", 0 0, v00000000010d9400_0; 1 drivers -v0000000001136140_0 .net "data_readdata", 31 0, L_0000000001135100; 1 drivers -v00000000011361e0_0 .net "data_write", 0 0, v00000000010d95e0_0; 1 drivers -v00000000011363c0_0 .net "data_writedata", 31 0, v00000000010d9720_0; 1 drivers -v00000000011352e0_0 .net "instr_address", 31 0, v00000000011343b0_0; 1 drivers -v0000000001136460_0 .net "instr_readdata", 31 0, L_0000000001136640; 1 drivers -v0000000001135d80_0 .net "register_v0", 31 0, L_000000000101de90; 1 drivers -v0000000001134e80_0 .var "reset", 0 0; -S_000000000101ee20 .scope module, "cpuInst" "mips_cpu_harvard" 3 19, 4 1 0, S_000000000101ec90; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "reset"; - .port_info 2 /OUTPUT 1 "active"; - .port_info 3 /OUTPUT 32 "register_v0"; - .port_info 4 /INPUT 1 "clk_enable"; - .port_info 5 /OUTPUT 32 "instr_address"; - .port_info 6 /INPUT 32 "instr_readdata"; - .port_info 7 /OUTPUT 32 "data_address"; - .port_info 8 /OUTPUT 1 "data_write"; - .port_info 9 /OUTPUT 1 "data_read"; - .port_info 10 /OUTPUT 32 "data_writedata"; - .port_info 11 /INPUT 32 "data_readdata"; -v00000000010da3a0_0 .net "active", 0 0, v00000000010da760_0; alias, 1 drivers -v00000000010d9220_0 .net "clk", 0 0, v00000000011357e0_0; 1 drivers -v00000000010da580_0 .net "clk_enable", 0 0, v0000000001134ac0_0; 1 drivers -v00000000010d8be0_0 .var "data_address", 31 0; -v00000000010d9400_0 .var "data_read", 0 0; -v00000000010d8d20_0 .net "data_readdata", 31 0, L_0000000001135100; alias, 1 drivers -v00000000010d95e0_0 .var "data_write", 0 0; -v00000000010d9720_0 .var "data_writedata", 31 0; -v0000000000ffe440_0 .var "in_B", 31 0; -v0000000001133eb0_0 .net "in_opcode", 5 0, L_0000000001136320; 1 drivers -v0000000001133230_0 .net "in_pc_in", 31 0, v00000000010da080_0; 1 drivers -v00000000011335f0_0 .net "in_readreg1", 4 0, L_00000000011366e0; 1 drivers -v0000000001133a50_0 .net "in_readreg2", 4 0, L_0000000001136500; 1 drivers -v0000000001133550_0 .var "in_writedata", 31 0; -v0000000001132c90_0 .var "in_writereg", 4 0; -v00000000011343b0_0 .var "instr_address", 31 0; -v00000000011332d0_0 .net "instr_readdata", 31 0, L_0000000001136640; alias, 1 drivers -v0000000001133690_0 .net "out_ALUCond", 0 0, v00000000010d97c0_0; 1 drivers -v0000000001133e10_0 .net "out_ALUOp", 4 0, v00000000010d9540_0; 1 drivers -v0000000001133f50_0 .net "out_ALURes", 31 0, v00000000010d9ea0_0; 1 drivers -v00000000011337d0_0 .net "out_ALUSrc", 0 0, v00000000010d9180_0; 1 drivers -v0000000001133af0_0 .net "out_MemRead", 0 0, v00000000010d8a00_0; 1 drivers -v0000000001134090_0 .net "out_MemWrite", 0 0, v00000000010d9cc0_0; 1 drivers -v0000000001132b50_0 .net "out_MemtoReg", 1 0, v00000000010d9f40_0; 1 drivers -v0000000001132d30_0 .net "out_PC", 1 0, v00000000010d92c0_0; 1 drivers -v0000000001133d70_0 .net "out_RegDst", 1 0, v00000000010d9d60_0; 1 drivers -v0000000001133b90_0 .net "out_RegWrite", 0 0, v00000000010d8f00_0; 1 drivers -v0000000001133c30_0 .var "out_pc_out", 31 0; -v0000000001134450_0 .net "out_readdata1", 31 0, v00000000010d8b40_0; 1 drivers -v0000000001133190_0 .net "out_readdata2", 31 0, v00000000010da1c0_0; 1 drivers -v0000000001133ff0_0 .net "out_shamt", 4 0, v00000000010d9b80_0; 1 drivers -v0000000001133910_0 .net "register_v0", 31 0, L_000000000101de90; alias, 1 drivers -v0000000001132a10_0 .net "reset", 0 0, v0000000001134e80_0; 1 drivers -E_0000000001016f40/0 .event edge, v00000000010d9d60_0, v00000000010d9e00_0, v00000000010d9e00_0, v00000000010d9f40_0; -E_0000000001016f40/1 .event edge, v00000000010d9ea0_0, v00000000010d8d20_0, v00000000010d8c80_0, v00000000010d9180_0; -E_0000000001016f40/2 .event edge, v00000000010d9e00_0, v00000000010d9e00_0, v00000000010da1c0_0; -E_0000000001016f40 .event/or E_0000000001016f40/0, E_0000000001016f40/1, E_0000000001016f40/2; -E_0000000001016740/0 .event edge, v00000000010da080_0, v00000000010d9ea0_0, v00000000010d9cc0_0, v00000000010d8a00_0; -E_0000000001016740/1 .event edge, v00000000010da1c0_0; -E_0000000001016740 .event/or E_0000000001016740/0, E_0000000001016740/1; -L_00000000011366e0 .part L_0000000001136640, 21, 5; -L_0000000001136500 .part L_0000000001136640, 16, 5; -L_0000000001136320 .part L_0000000001136640, 26, 6; -S_0000000000fd5e30 .scope module, "alu" "mips_cpu_alu" 4 121, 5 1 0, S_000000000101ee20; - .timescale 0 0; - .port_info 0 /INPUT 32 "A"; - .port_info 1 /INPUT 32 "B"; - .port_info 2 /INPUT 5 "ALUOp"; - .port_info 3 /INPUT 5 "shamt"; - .port_info 4 /OUTPUT 1 "ALUCond"; - .port_info 5 /OUTPUT 32 "ALURes"; -enum00000000010bbd00 .enum4 (5) - "ADD" 5'b00000, - "SUB" 5'b00001, - "MUL" 5'b00010, - "DIV" 5'b00011, - "AND" 5'b00100, - "OR" 5'b00101, - "XOR" 5'b00110, - "SLL" 5'b00111, - "SLLV" 5'b01000, - "SRL" 5'b01001, - "SRLV" 5'b01010, - "SRA" 5'b01011, - "SRAV" 5'b01100, - "EQ" 5'b01101, - "LES" 5'b01110, - "LEQ" 5'b01111, - "GRT" 5'b10000, - "GEQ" 5'b10001, - "NEQ" 5'b10010, - "PAS" 5'b10011, - "SLT" 5'b10100, - "SLTU" 5'b10101, - "MULU" 5'b10110, - "DIVU" 5'b10111 - ; -L_000000000101dd40 .functor BUFZ 5, v00000000010d9540_0, C4<00000>, C4<00000>, C4<00000>; -v00000000010da620_0 .net "A", 31 0, v00000000010d8b40_0; alias, 1 drivers -v00000000010d97c0_0 .var "ALUCond", 0 0; -v00000000010d8e60_0 .net "ALUOp", 4 0, v00000000010d9540_0; alias, 1 drivers -v00000000010d9680_0 .net "ALUOps", 4 0, L_000000000101dd40; 1 drivers -v00000000010d9ea0_0 .var/s "ALURes", 31 0; -v00000000010d9ae0_0 .net "B", 31 0, v0000000000ffe440_0; 1 drivers -v00000000010da6c0_0 .net "shamt", 4 0, v00000000010d9b80_0; alias, 1 drivers -E_0000000001010cc0 .event edge, v00000000010d9680_0, v00000000010da620_0, v00000000010d9ae0_0, v00000000010da6c0_0; -S_0000000000fd5fc0 .scope module, "control" "mips_cpu_control" 4 90, 6 1 0, S_000000000101ee20; - .timescale 0 0; - .port_info 0 /INPUT 32 "Instr"; - .port_info 1 /INPUT 1 "ALUCond"; - .port_info 2 /OUTPUT 2 "CtrlRegDst"; - .port_info 3 /OUTPUT 2 "CtrlPC"; - .port_info 4 /OUTPUT 1 "CtrlMemRead"; - .port_info 5 /OUTPUT 2 "CtrlMemtoReg"; - .port_info 6 /OUTPUT 5 "CtrlALUOp"; - .port_info 7 /OUTPUT 5 "Ctrlshamt"; - .port_info 8 /OUTPUT 1 "CtrlMemWrite"; - .port_info 9 /OUTPUT 1 "CtrlALUSrc"; - .port_info 10 /OUTPUT 1 "CtrlRegWrite"; -enum00000000010b9270 .enum4 (6) - "SLL" 6'b000000, - "SRL" 6'b000010, - "SRA" 6'b000011, - "SLLV" 6'b000100, - "SRLV" 6'b000110, - "SRAV" 6'b000111, - "JR" 6'b001000, - "JALR" 6'b001001, - "MTHI" 6'b010001, - "MTLO" 6'b010011, - "MULT" 6'b011000, - "MULTU" 6'b011001, - "DIV" 6'b011010, - "DIVU" 6'b011011, - "ADDU" 6'b100001, - "SUBU" 6'b100011, - "AND" 6'b100100, - "OR" 6'b100101, - "XOR" 6'b100110, - "SLT" 6'b101010, - "SLTU" 6'b101011 - ; -enum00000000010bb8a0 .enum4 (5) - "BLTZ" 5'b00000, - "BGEZ" 5'b00001, - "BLTZAL" 5'b10000, - "BGEZAL" 5'b10001 - ; -enum00000000010bb950 .enum4 (6) - "SPECIAL" 6'b000000, - "REGIMM" 6'b000001, - "J" 6'b000010, - "JAL" 6'b000011, - "BEQ" 6'b000100, - "BNE" 6'b000101, - "BLEZ" 6'b000110, - "BGTZ" 6'b000111, - "ADDI" 6'b001000, - "ADDIU" 6'b001001, - "SLTI" 6'b001010, - "SLTIU" 6'b001011, - "ANDI" 6'b001100, - "ORI" 6'b001101, - "XORI" 6'b001110, - "LUI" 6'b001111, - "LB" 6'b100000, - "LH" 6'b100001, - "LWL" 6'b100010, - "LW" 6'b100011, - "LBU" 6'b100100, - "LHU" 6'b100101, - "LWR" 6'b100110, - "SB" 6'b101000, - "SH" 6'b101001, - "SW" 6'b101011 - ; -v00000000010d9040_0 .net "ALUCond", 0 0, v00000000010d97c0_0; alias, 1 drivers -v00000000010d9540_0 .var "CtrlALUOp", 4 0; -v00000000010d9180_0 .var "CtrlALUSrc", 0 0; -v00000000010d8a00_0 .var "CtrlMemRead", 0 0; -v00000000010d9cc0_0 .var "CtrlMemWrite", 0 0; -v00000000010d9f40_0 .var "CtrlMemtoReg", 1 0; -v00000000010d92c0_0 .var "CtrlPC", 1 0; -v00000000010d9d60_0 .var "CtrlRegDst", 1 0; -v00000000010d8f00_0 .var "CtrlRegWrite", 0 0; -v00000000010d9b80_0 .var "Ctrlshamt", 4 0; -v00000000010d9e00_0 .net "Instr", 31 0, L_0000000001136640; alias, 1 drivers -v00000000010d9fe0_0 .net "funct", 5 0, L_00000000011354c0; 1 drivers -v00000000010d8dc0_0 .net "op", 5 0, L_0000000001135ce0; 1 drivers -v00000000010d9860_0 .net "rt", 4 0, L_0000000001135240; 1 drivers -E_0000000001017800/0 .event edge, v00000000010d8dc0_0, v00000000010d9fe0_0, v00000000010d97c0_0, v00000000010d9860_0; -E_0000000001017800/1 .event edge, v00000000010d9e00_0; -E_0000000001017800 .event/or E_0000000001017800/0, E_0000000001017800/1; -L_0000000001135ce0 .part L_0000000001136640, 26, 6; -L_00000000011354c0 .part L_0000000001136640, 0, 6; -L_0000000001135240 .part L_0000000001136640, 16, 5; -S_0000000000fd6150 .scope module, "pc" "pc" 4 79, 7 1 0, S_000000000101ee20; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "rst"; - .port_info 2 /INPUT 2 "pc_ctrl"; - .port_info 3 /INPUT 32 "pc_in"; - .port_info 4 /INPUT 5 "rs"; - .port_info 5 /OUTPUT 32 "pc_out"; - .port_info 6 /OUTPUT 1 "active"; -v00000000010da760_0 .var "active", 0 0; -v00000000010da4e0_0 .net "clk", 0 0, v00000000011357e0_0; alias, 1 drivers -v00000000010d9360_0 .net "pc_ctrl", 1 0, v00000000010d92c0_0; alias, 1 drivers -v00000000010d9900_0 .var "pc_curr", 31 0; -v00000000010d8c80_0 .net "pc_in", 31 0, v0000000001133c30_0; 1 drivers -v00000000010da080_0 .var "pc_out", 31 0; -o00000000010dd018 .functor BUFZ 5, C4; HiZ drive -v00000000010d9c20_0 .net "rs", 4 0, o00000000010dd018; 0 drivers -v00000000010d8960_0 .net "rst", 0 0, v0000000001134e80_0; alias, 1 drivers -E_0000000001010600 .event posedge, v00000000010da4e0_0; -S_0000000000fc91d0 .scope module, "regfile" "mips_cpu_regfile" 4 106, 8 1 0, S_000000000101ee20; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 5 "readreg1"; - .port_info 2 /INPUT 5 "readreg2"; - .port_info 3 /INPUT 5 "writereg"; - .port_info 4 /INPUT 32 "writedata"; - .port_info 5 /INPUT 1 "regwrite"; - .port_info 6 /INPUT 6 "opcode"; - .port_info 7 /OUTPUT 32 "readdata1"; - .port_info 8 /OUTPUT 32 "readdata2"; - .port_info 9 /OUTPUT 32 "regv0"; -v00000000010da120_2 .array/port v00000000010da120, 2; -L_000000000101de90 .functor BUFZ 32, v00000000010da120_2, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; -v00000000010d99a0_0 .net "clk", 0 0, v00000000011357e0_0; alias, 1 drivers -v00000000010da120 .array "memory", 0 31, 31 0; -v00000000010d9a40_0 .net "opcode", 5 0, L_0000000001136320; alias, 1 drivers -v00000000010d8b40_0 .var "readdata1", 31 0; -v00000000010da1c0_0 .var "readdata2", 31 0; -v00000000010da800_0 .net "readreg1", 4 0, L_00000000011366e0; alias, 1 drivers -v00000000010d8fa0_0 .net "readreg2", 4 0, L_0000000001136500; alias, 1 drivers -v00000000010d8aa0_0 .net "regv0", 31 0, L_000000000101de90; alias, 1 drivers -v00000000010d94a0_0 .net "regwrite", 0 0, v00000000010d8f00_0; alias, 1 drivers -v00000000010da260_0 .net "writedata", 31 0, v0000000001133550_0; 1 drivers -v00000000010da300_0 .net "writereg", 4 0, v0000000001132c90_0; 1 drivers -E_00000000010105c0 .event negedge, v00000000010da4e0_0; -v00000000010da120_0 .array/port v00000000010da120, 0; -v00000000010da120_1 .array/port v00000000010da120, 1; -E_0000000001010640/0 .event edge, v00000000010da800_0, v00000000010da120_0, v00000000010da120_1, v00000000010da120_2; -v00000000010da120_3 .array/port v00000000010da120, 3; -v00000000010da120_4 .array/port v00000000010da120, 4; -v00000000010da120_5 .array/port v00000000010da120, 5; -v00000000010da120_6 .array/port v00000000010da120, 6; -E_0000000001010640/1 .event edge, v00000000010da120_3, v00000000010da120_4, v00000000010da120_5, v00000000010da120_6; -v00000000010da120_7 .array/port v00000000010da120, 7; -v00000000010da120_8 .array/port v00000000010da120, 8; -v00000000010da120_9 .array/port v00000000010da120, 9; -v00000000010da120_10 .array/port v00000000010da120, 10; -E_0000000001010640/2 .event edge, v00000000010da120_7, v00000000010da120_8, v00000000010da120_9, v00000000010da120_10; -v00000000010da120_11 .array/port v00000000010da120, 11; -v00000000010da120_12 .array/port v00000000010da120, 12; -v00000000010da120_13 .array/port v00000000010da120, 13; -v00000000010da120_14 .array/port v00000000010da120, 14; -E_0000000001010640/3 .event edge, v00000000010da120_11, v00000000010da120_12, v00000000010da120_13, v00000000010da120_14; -v00000000010da120_15 .array/port v00000000010da120, 15; -v00000000010da120_16 .array/port v00000000010da120, 16; -v00000000010da120_17 .array/port v00000000010da120, 17; -v00000000010da120_18 .array/port v00000000010da120, 18; -E_0000000001010640/4 .event edge, v00000000010da120_15, v00000000010da120_16, v00000000010da120_17, v00000000010da120_18; -v00000000010da120_19 .array/port v00000000010da120, 19; -v00000000010da120_20 .array/port v00000000010da120, 20; -v00000000010da120_21 .array/port v00000000010da120, 21; -v00000000010da120_22 .array/port v00000000010da120, 22; -E_0000000001010640/5 .event edge, v00000000010da120_19, v00000000010da120_20, v00000000010da120_21, v00000000010da120_22; -v00000000010da120_23 .array/port v00000000010da120, 23; -v00000000010da120_24 .array/port v00000000010da120, 24; -v00000000010da120_25 .array/port v00000000010da120, 25; -v00000000010da120_26 .array/port v00000000010da120, 26; -E_0000000001010640/6 .event edge, v00000000010da120_23, v00000000010da120_24, v00000000010da120_25, v00000000010da120_26; -v00000000010da120_27 .array/port v00000000010da120, 27; -v00000000010da120_28 .array/port v00000000010da120, 28; -v00000000010da120_29 .array/port v00000000010da120, 29; -v00000000010da120_30 .array/port v00000000010da120, 30; -E_0000000001010640/7 .event edge, v00000000010da120_27, v00000000010da120_28, v00000000010da120_29, v00000000010da120_30; -v00000000010da120_31 .array/port v00000000010da120, 31; -E_0000000001010640/8 .event edge, v00000000010da120_31, v00000000010d8fa0_0; -E_0000000001010640 .event/or E_0000000001010640/0, E_0000000001010640/1, E_0000000001010640/2, E_0000000001010640/3, E_0000000001010640/4, E_0000000001010640/5, E_0000000001010640/6, E_0000000001010640/7, E_0000000001010640/8; -S_0000000000fc9360 .scope begin, "$unm_blk_121" "$unm_blk_121" 8 16, 8 16 0, S_0000000000fc91d0; - .timescale 0 0; -v00000000010d90e0_0 .var/i "i", 31 0; -S_0000000000fbe6f0 .scope module, "ramInst" "mips_cpu_memory" 3 9, 9 1 0, S_000000000101ec90; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 32 "data_address"; - .port_info 2 /INPUT 1 "data_write"; - .port_info 3 /INPUT 1 "data_read"; - .port_info 4 /INPUT 32 "data_writedata"; - .port_info 5 /OUTPUT 32 "data_readdata"; - .port_info 6 /INPUT 32 "instr_address"; - .port_info 7 /OUTPUT 32 "instr_readdata"; -P_0000000001010680 .param/str "RAM_INIT_FILE" 0 9 16, "inputs/xor.txt"; -L_000000000101ebb0 .functor AND 1, L_0000000001136000, L_0000000001134a20, C4<1>, C4<1>; -v0000000001133410_0 .net *"_ivl_0", 31 0, L_0000000001134fc0; 1 drivers -L_00000000011379e8 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v0000000001132fb0_0 .net/2u *"_ivl_12", 31 0, L_00000000011379e8; 1 drivers -v00000000011334b0_0 .net *"_ivl_14", 0 0, L_0000000001136000; 1 drivers -L_0000000001137a30 .functor BUFT 1, C4<10111111110000000000000001000000>, C4<0>, C4<0>, C4<0>; -v0000000001134310_0 .net/2u *"_ivl_16", 31 0, L_0000000001137a30; 1 drivers -v0000000001134130_0 .net *"_ivl_18", 0 0, L_0000000001134a20; 1 drivers -v00000000011339b0_0 .net *"_ivl_2", 31 0, L_0000000001134c00; 1 drivers -v0000000001133cd0_0 .net *"_ivl_21", 0 0, L_000000000101ebb0; 1 drivers -v0000000001134270_0 .net *"_ivl_22", 31 0, L_0000000001135380; 1 drivers -L_0000000001137a78 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v0000000001132ab0_0 .net/2u *"_ivl_24", 31 0, L_0000000001137a78; 1 drivers -v0000000001132bf0_0 .net *"_ivl_26", 31 0, L_0000000001136780; 1 drivers -v0000000001134630_0 .net *"_ivl_28", 31 0, L_00000000011351a0; 1 drivers -v0000000001132dd0_0 .net *"_ivl_30", 29 0, L_0000000001136280; 1 drivers -L_0000000001137ac0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v00000000011346d0_0 .net *"_ivl_32", 1 0, L_0000000001137ac0; 1 drivers -L_0000000001137b08 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v0000000001133730_0 .net *"_ivl_34", 31 0, L_0000000001137b08; 1 drivers -v00000000011341d0_0 .net *"_ivl_4", 29 0, L_0000000001135e20; 1 drivers -L_0000000001137958 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0000000001133870_0 .net *"_ivl_6", 1 0, L_0000000001137958; 1 drivers -L_00000000011379a0 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v00000000011344f0_0 .net *"_ivl_8", 31 0, L_00000000011379a0; 1 drivers -v0000000001134590_0 .net "clk", 0 0, v00000000011357e0_0; alias, 1 drivers -v0000000001134770_0 .net "data_address", 31 0, v00000000010d8be0_0; alias, 1 drivers -v0000000001134810 .array "data_memory", 63 0, 31 0; -v0000000001132970_0 .net "data_read", 0 0, v00000000010d9400_0; alias, 1 drivers -v0000000001132e70_0 .net "data_readdata", 31 0, L_0000000001135100; alias, 1 drivers -v0000000001132f10_0 .net "data_write", 0 0, v00000000010d95e0_0; alias, 1 drivers -v0000000001133050_0 .net "data_writedata", 31 0, v00000000010d9720_0; alias, 1 drivers -v00000000011360a0_0 .net "instr_address", 31 0, v00000000011343b0_0; alias, 1 drivers -v0000000001134de0 .array "instr_memory", 63 0, 31 0; -v0000000001135600_0 .net "instr_readdata", 31 0, L_0000000001136640; alias, 1 drivers -L_0000000001134fc0 .array/port v0000000001134810, L_0000000001134c00; -L_0000000001135e20 .part v00000000010d8be0_0, 2, 30; -L_0000000001134c00 .concat [ 30 2 0 0], L_0000000001135e20, L_0000000001137958; -L_0000000001135100 .functor MUXZ 32, L_00000000011379a0, L_0000000001134fc0, v00000000010d9400_0, C4<>; -L_0000000001136000 .cmp/ge 32, v00000000011343b0_0, L_00000000011379e8; -L_0000000001134a20 .cmp/gt 32, L_0000000001137a30, v00000000011343b0_0; -L_0000000001135380 .array/port v0000000001134de0, L_00000000011351a0; -L_0000000001136780 .arith/sub 32, v00000000011343b0_0, L_0000000001137a78; -L_0000000001136280 .part L_0000000001136780, 2, 30; -L_00000000011351a0 .concat [ 30 2 0 0], L_0000000001136280, L_0000000001137ac0; -L_0000000001136640 .functor MUXZ 32, L_0000000001137b08, L_0000000001135380, L_000000000101ebb0, C4<>; -S_0000000000f82680 .scope begin, "$unm_blk_104" "$unm_blk_104" 9 21, 9 21 0, S_0000000000fbe6f0; - .timescale 0 0; -v0000000001133370_0 .var/i "i", 31 0; -S_0000000000f82810 .scope begin, "$ivl_for_loop0" "$ivl_for_loop0" 9 36, 9 36 0, S_0000000000f82680; - .timescale 0 0; -v00000000011330f0_0 .var/i "j", 31 0; - .scope S_0000000000fbe6f0; -T_0 ; - %fork t_1, S_0000000000f82680; - %jmp t_0; - .scope S_0000000000f82680; -t_1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v0000000001133370_0, 0, 32; -T_0.0 ; - %load/vec4 v0000000001133370_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v0000000001133370_0; - %store/vec4a v0000000001134810, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0000000001133370_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v0000000001133370_0, 0, 32; - %jmp T_0.0; -T_0.1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v0000000001133370_0, 0, 32; -T_0.2 ; - %load/vec4 v0000000001133370_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.3, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v0000000001133370_0; - %store/vec4a v0000000001134de0, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0000000001133370_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v0000000001133370_0, 0, 32; - %jmp T_0.2; -T_0.3 ; - %vpi_call/w 9 32 "$display", "RAM: Loading RAM contents from %s", P_0000000001010680 {0 0 0}; - %vpi_call/w 9 33 "$readmemh", P_0000000001010680, v0000000001134de0 {0 0 0}; - %fork t_3, S_0000000000f82810; - %jmp t_2; - .scope S_0000000000f82810; -t_3 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000011330f0_0, 0, 32; -T_0.4 ; - %load/vec4 v00000000011330f0_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.5, 5; - %pushi/vec4 3217031168, 0, 32; - %load/vec4 v00000000011330f0_0; - %muli 4, 0, 32; - %add; - %vpi_call/w 9 37 "$display", "byte +%h: %h", S<0,vec4,u32>, &A {1 0 0}; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000011330f0_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000011330f0_0, 0, 32; - %jmp T_0.4; -T_0.5 ; - %end; - .scope S_0000000000f82680; -t_2 %join; - %end; - .scope S_0000000000fbe6f0; -t_0 %join; - %end; - .thread T_0; - .scope S_0000000000fbe6f0; -T_1 ; - %wait E_0000000001010600; - %load/vec4 v0000000001132970_0; - %nor/r; - %load/vec4 v0000000001132f10_0; - %and; - %flag_set/vec4 8; - %jmp/0xz T_1.0, 8; - %load/vec4 v00000000011360a0_0; - %load/vec4 v0000000001134770_0; - %cmp/ne; - %jmp/0xz T_1.2, 4; - %load/vec4 v0000000001133050_0; - %load/vec4 v0000000001134770_0; - %ix/load 4, 2, 0; - %flag_set/imm 4, 0; - %shiftr 4; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001134810, 0, 4; -T_1.2 ; -T_1.0 ; - %jmp T_1; - .thread T_1; - .scope S_0000000000fd6150; -T_2 ; - %load/vec4 v00000000010d8c80_0; - %store/vec4 v00000000010da080_0, 0, 32; - %end; - .thread T_2; - .scope S_0000000000fd6150; -T_3 ; - %wait E_0000000001010600; - %load/vec4 v00000000010d8960_0; - %flag_set/vec4 8; - %jmp/0xz T_3.0, 8; - %pushi/vec4 1, 0, 1; - %assign/vec4 v00000000010da760_0, 0; - %pushi/vec4 3217031168, 0, 32; - %assign/vec4 v00000000010da080_0, 0; - %jmp T_3.1; -T_3.0 ; - %load/vec4 v00000000010da080_0; - %cmpi/ne 0, 0, 32; - %jmp/0xz T_3.2, 4; - %load/vec4 v00000000010da760_0; - %assign/vec4 v00000000010da760_0, 0; - %load/vec4 v00000000010d9360_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_3.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_3.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_3.6, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_3.7, 6; - %jmp T_3.8; -T_3.4 ; - %load/vec4 v00000000010da080_0; - %assign/vec4 v00000000010d9900_0, 0; - %load/vec4 v00000000010d9900_0; - %addi 4, 0, 32; - %assign/vec4 v00000000010da080_0, 0; - %vpi_call/w 7 27 "$display", "New PC from %h to %h", v00000000010d9900_0, v00000000010da080_0 {0 0 0}; - %jmp T_3.8; -T_3.5 ; - %load/vec4 v00000000010d8c80_0; - %assign/vec4 v00000000010da080_0, 0; - %jmp T_3.8; -T_3.6 ; - %load/vec4 v00000000010d8c80_0; - %assign/vec4 v00000000010da080_0, 0; - %jmp T_3.8; -T_3.7 ; - %vpi_call/w 7 36 "$display", "JUMP REGISTER" {0 0 0}; - %pushi/vec4 0, 0, 32; - %assign/vec4 v00000000010da080_0, 0; - %jmp T_3.8; -T_3.8 ; - %pop/vec4 1; - %jmp T_3.3; -T_3.2 ; - %load/vec4 v00000000010da080_0; - %cmpi/e 0, 0, 32; - %jmp/0xz T_3.9, 4; - %pushi/vec4 0, 0, 1; - %assign/vec4 v00000000010da760_0, 0; -T_3.9 ; -T_3.3 ; -T_3.1 ; - %jmp T_3; - .thread T_3; - .scope S_0000000000fd5fc0; -T_4 ; - %wait E_0000000001017800; - %vpi_call/w 6 86 "$display", "Opcode: %h", v00000000010d8dc0_0 {0 0 0}; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.0, 4; - %pushi/vec4 0, 0, 2; - %store/vec4 v00000000010d9d60_0, 0, 2; - %vpi_call/w 6 89 "$display", "CTRLREGDST: Rt" {0 0 0}; - %jmp T_4.1; -T_4.0 ; - %load/vec4 v00000000010d8dc0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.2, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v00000000010d9d60_0, 0, 2; - %vpi_call/w 6 92 "$display", "CTRLREGDST: Rd" {0 0 0}; - %jmp T_4.3; -T_4.2 ; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 3, 0, 6; - %jmp/0xz T_4.4, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v00000000010d9d60_0, 0, 2; - %vpi_call/w 6 95 "$display", "CTRLREGDST: Link" {0 0 0}; - %jmp T_4.5; -T_4.4 ; - %pushi/vec4 1, 1, 2; - %store/vec4 v00000000010d9d60_0, 0, 2; - %vpi_call/w 6 96 "$display", "xxxxxxxxxxxxxx" {0 0 0}; -T_4.5 ; -T_4.3 ; -T_4.1 ; - %load/vec4 v00000000010d9040_0; - %load/vec4 v00000000010d8dc0_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d8dc0_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d8dc0_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d8dc0_0; - %pushi/vec4 5, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d8dc0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9860_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9860_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9860_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9860_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.6, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v00000000010d92c0_0, 0, 2; - %jmp T_4.7; -T_4.6 ; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 2, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 3, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.8, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v00000000010d92c0_0, 0, 2; - %jmp T_4.9; -T_4.8 ; - %load/vec4 v00000000010d9fe0_0; - %cmpi/e 8, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010d9fe0_0; - %cmpi/e 9, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.10, 4; - %pushi/vec4 3, 0, 2; - %store/vec4 v00000000010d92c0_0, 0, 2; - %jmp T_4.11; -T_4.10 ; - %pushi/vec4 0, 0, 2; - %store/vec4 v00000000010d92c0_0, 0, 2; -T_4.11 ; -T_4.9 ; -T_4.7 ; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.12, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000010d8a00_0, 0, 1; - %pushi/vec4 1, 0, 2; - %store/vec4 v00000000010d9f40_0, 0, 2; - %vpi_call/w 6 112 "$display", "Memory read enabled" {0 0 0}; - %jmp T_4.13; -T_4.12 ; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.14, 9; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000010d8a00_0, 0, 1; - %pushi/vec4 0, 0, 2; - %store/vec4 v00000000010d9f40_0, 0, 2; - %vpi_call/w 6 116 "$display", "Memory read disabled" {0 0 0}; - %jmp T_4.15; -T_4.14 ; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 3, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.16, 9; - %pushi/vec4 2, 0, 2; - %store/vec4 v00000000010d9f40_0, 0, 2; - %jmp T_4.17; -T_4.16 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v00000000010d8a00_0, 0, 1; -T_4.17 ; -T_4.15 ; -T_4.13 ; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.18, 9; - %pushi/vec4 0, 0, 5; - %store/vec4 v00000000010d9540_0, 0, 5; - %vpi_call/w 6 124 "$display", "ALU OP = 0 (ADDU/ADDIU)" {0 0 0}; - %jmp T_4.19; -T_4.18 ; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 12, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.20, 9; - %pushi/vec4 4, 0, 5; - %store/vec4 v00000000010d9540_0, 0, 5; - %jmp T_4.21; -T_4.20 ; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 4, 0, 6; - %jmp/0xz T_4.22, 4; - %pushi/vec4 13, 0, 5; - %store/vec4 v00000000010d9540_0, 0, 5; - %jmp T_4.23; -T_4.22 ; - %load/vec4 v00000000010d8dc0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9860_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9860_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.24, 8; - %pushi/vec4 17, 0, 5; - %store/vec4 v00000000010d9540_0, 0, 5; - %jmp T_4.25; -T_4.24 ; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 7, 0, 6; - %jmp/0xz T_4.26, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v00000000010d9540_0, 0, 5; - %jmp T_4.27; -T_4.26 ; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 6, 0, 6; - %jmp/0xz T_4.28, 4; - %pushi/vec4 15, 0, 5; - %store/vec4 v00000000010d9540_0, 0, 5; - %jmp T_4.29; -T_4.28 ; - %load/vec4 v00000000010d8dc0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9860_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9860_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.30, 8; - %pushi/vec4 14, 0, 5; - %store/vec4 v00000000010d9540_0, 0, 5; - %jmp T_4.31; -T_4.30 ; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 5, 0, 6; - %jmp/0xz T_4.32, 4; - %pushi/vec4 18, 0, 5; - %store/vec4 v00000000010d9540_0, 0, 5; - %jmp T_4.33; -T_4.32 ; - %load/vec4 v00000000010d8dc0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.34, 8; - %pushi/vec4 3, 0, 5; - %store/vec4 v00000000010d9540_0, 0, 5; - %jmp T_4.35; -T_4.34 ; - %load/vec4 v00000000010d8dc0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.36, 8; - %pushi/vec4 23, 0, 5; - %store/vec4 v00000000010d9540_0, 0, 5; - %jmp T_4.37; -T_4.36 ; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.38, 4; - %pushi/vec4 0, 0, 5; - %store/vec4 v00000000010d9540_0, 0, 5; - %jmp T_4.39; -T_4.38 ; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.40, 4; - %pushi/vec4 7, 0, 5; - %store/vec4 v00000000010d9540_0, 0, 5; - %jmp T_4.41; -T_4.40 ; - %load/vec4 v00000000010d8dc0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.42, 8; - %pushi/vec4 19, 0, 5; - %store/vec4 v00000000010d9540_0, 0, 5; - %jmp T_4.43; -T_4.42 ; - %load/vec4 v00000000010d8dc0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.44, 8; - %pushi/vec4 2, 0, 5; - %store/vec4 v00000000010d9540_0, 0, 5; - %jmp T_4.45; -T_4.44 ; - %load/vec4 v00000000010d8dc0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.46, 8; - %pushi/vec4 22, 0, 5; - %store/vec4 v00000000010d9540_0, 0, 5; - %jmp T_4.47; -T_4.46 ; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 13, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.48, 9; - %pushi/vec4 5, 0, 5; - %store/vec4 v00000000010d9540_0, 0, 5; - %jmp T_4.49; -T_4.48 ; - %load/vec4 v00000000010d8dc0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.50, 8; - %pushi/vec4 7, 0, 5; - %store/vec4 v00000000010d9540_0, 0, 5; - %jmp T_4.51; -T_4.50 ; - %load/vec4 v00000000010d8dc0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.52, 8; - %pushi/vec4 8, 0, 5; - %store/vec4 v00000000010d9540_0, 0, 5; - %jmp T_4.53; -T_4.52 ; - %load/vec4 v00000000010d8dc0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.54, 8; - %pushi/vec4 11, 0, 5; - %store/vec4 v00000000010d9540_0, 0, 5; - %jmp T_4.55; -T_4.54 ; - %load/vec4 v00000000010d8dc0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.56, 8; - %pushi/vec4 12, 0, 5; - %store/vec4 v00000000010d9540_0, 0, 5; - %jmp T_4.57; -T_4.56 ; - %load/vec4 v00000000010d8dc0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.58, 8; - %pushi/vec4 9, 0, 5; - %store/vec4 v00000000010d9540_0, 0, 5; - %jmp T_4.59; -T_4.58 ; - %load/vec4 v00000000010d8dc0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.60, 8; - %pushi/vec4 10, 0, 5; - %store/vec4 v00000000010d9540_0, 0, 5; - %jmp T_4.61; -T_4.60 ; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 10, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.62, 9; - %pushi/vec4 20, 0, 5; - %store/vec4 v00000000010d9540_0, 0, 5; - %jmp T_4.63; -T_4.62 ; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 11, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.64, 9; - %pushi/vec4 21, 0, 5; - %store/vec4 v00000000010d9540_0, 0, 5; - %jmp T_4.65; -T_4.64 ; - %load/vec4 v00000000010d8dc0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.66, 8; - %pushi/vec4 1, 0, 5; - %store/vec4 v00000000010d9540_0, 0, 5; - %jmp T_4.67; -T_4.66 ; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 14, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.68, 9; - %pushi/vec4 6, 0, 5; - %store/vec4 v00000000010d9540_0, 0, 5; - %vpi_call/w 6 175 "$display", "ALU Op = 6 (XOR)" {0 0 0}; - %jmp T_4.69; -T_4.68 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v00000000010d9540_0, 0, 5; -T_4.69 ; -T_4.67 ; -T_4.65 ; -T_4.63 ; -T_4.61 ; -T_4.59 ; -T_4.57 ; -T_4.55 ; -T_4.53 ; -T_4.51 ; -T_4.49 ; -T_4.47 ; -T_4.45 ; -T_4.43 ; -T_4.41 ; -T_4.39 ; -T_4.37 ; -T_4.35 ; -T_4.33 ; -T_4.31 ; -T_4.29 ; -T_4.27 ; -T_4.25 ; -T_4.23 ; -T_4.21 ; -T_4.19 ; - %load/vec4 v00000000010d8dc0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.70, 8; - %load/vec4 v00000000010d9e00_0; - %parti/s 5, 6, 4; - %store/vec4 v00000000010d9b80_0, 0, 5; - %jmp T_4.71; -T_4.70 ; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.72, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v00000000010d9b80_0, 0, 5; - %jmp T_4.73; -T_4.72 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v00000000010d9b80_0, 0, 5; -T_4.73 ; -T_4.71 ; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 40, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.74, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000010d9cc0_0, 0, 1; - %jmp T_4.75; -T_4.74 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000010d9cc0_0, 0, 1; -T_4.75 ; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.76, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000010d9180_0, 0, 1; - %jmp T_4.77; -T_4.76 ; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 4, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 7, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 6, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 5, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %load/vec4 v00000000010d8dc0_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9860_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9860_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9860_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9860_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %flag_or 8, 9; - %jmp/0xz T_4.78, 8; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000010d9180_0, 0, 1; - %jmp T_4.79; -T_4.78 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v00000000010d9180_0, 0, 1; -T_4.79 ; -T_4.77 ; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010d8dc0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010d9fe0_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.80, 9; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000010d8f00_0, 0, 1; - %jmp T_4.81; -T_4.80 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000010d8f00_0, 0, 1; -T_4.81 ; - %jmp T_4; - .thread T_4, $push; - .scope S_0000000000fc91d0; -T_5 ; - %fork t_5, S_0000000000fc9360; - %jmp t_4; - .scope S_0000000000fc9360; -t_5 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000010d90e0_0, 0, 32; -T_5.0 ; - %load/vec4 v00000000010d90e0_0; - %cmpi/s 32, 0, 32; - %jmp/0xz T_5.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v00000000010d90e0_0; - %store/vec4a v00000000010da120, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000010d90e0_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000010d90e0_0, 0, 32; - %jmp T_5.0; -T_5.1 ; - %end; - .scope S_0000000000fc91d0; -t_4 %join; - %end; - .thread T_5; - .scope S_0000000000fc91d0; -T_6 ; -Ewait_0 .event/or E_0000000001010640, E_0x0; - %wait Ewait_0; - %load/vec4 v00000000010da800_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v00000000010da120, 4; - %store/vec4 v00000000010d8b40_0, 0, 32; - %load/vec4 v00000000010d8fa0_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v00000000010da120, 4; - %store/vec4 v00000000010da1c0_0, 0, 32; - %jmp T_6; - .thread T_6, $push; - .scope S_0000000000fc91d0; -T_7 ; - %wait E_00000000010105c0; - %load/vec4 v00000000010da300_0; - %cmpi/e 0, 0, 5; - %jmp/0xz T_7.0, 4; - %jmp T_7.1; -T_7.0 ; - %load/vec4 v00000000010d94a0_0; - %flag_set/vec4 8; - %jmp/0xz T_7.2, 8; - %load/vec4 v00000000010d9a40_0; - %dup/vec4; - %pushi/vec4 32, 0, 6; - %cmp/u; - %jmp/1 T_7.4, 6; - %dup/vec4; - %pushi/vec4 36, 0, 6; - %cmp/u; - %jmp/1 T_7.5, 6; - %dup/vec4; - %pushi/vec4 33, 0, 6; - %cmp/u; - %jmp/1 T_7.6, 6; - %dup/vec4; - %pushi/vec4 37, 0, 6; - %cmp/u; - %jmp/1 T_7.7, 6; - %dup/vec4; - %pushi/vec4 34, 0, 6; - %cmp/u; - %jmp/1 T_7.8, 6; - %dup/vec4; - %pushi/vec4 38, 0, 6; - %cmp/u; - %jmp/1 T_7.9, 6; - %load/vec4 v00000000010da260_0; - %load/vec4 v00000000010da300_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010da120, 0, 4; - %jmp T_7.11; -T_7.4 ; - %load/vec4 v00000000010d8b40_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.12, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.13, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.14, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.15, 6; - %jmp T_7.16; -T_7.12 ; - %load/vec4 v00000000010da260_0; - %parti/s 1, 7, 4; - %replicate 24; - %load/vec4 v00000000010da260_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000010da300_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010da120, 0, 4; - %jmp T_7.16; -T_7.13 ; - %load/vec4 v00000000010da260_0; - %parti/s 1, 15, 5; - %replicate 24; - %load/vec4 v00000000010da260_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000010da300_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010da120, 0, 4; - %jmp T_7.16; -T_7.14 ; - %load/vec4 v00000000010da260_0; - %parti/s 1, 23, 6; - %replicate 24; - %load/vec4 v00000000010da260_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000010da300_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010da120, 0, 4; - %jmp T_7.16; -T_7.15 ; - %load/vec4 v00000000010da260_0; - %parti/s 1, 31, 6; - %replicate 24; - %load/vec4 v00000000010da260_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000010da300_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010da120, 0, 4; - %jmp T_7.16; -T_7.16 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.5 ; - %load/vec4 v00000000010d8b40_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.17, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.18, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.19, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.20, 6; - %jmp T_7.21; -T_7.17 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000010da260_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000010da300_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010da120, 0, 4; - %jmp T_7.21; -T_7.18 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000010da260_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000010da300_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010da120, 0, 4; - %jmp T_7.21; -T_7.19 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000010da260_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000010da300_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010da120, 0, 4; - %jmp T_7.21; -T_7.20 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000010da260_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000010da300_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010da120, 0, 4; - %jmp T_7.21; -T_7.21 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.6 ; - %load/vec4 v00000000010d8b40_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.22, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.23, 6; - %jmp T_7.24; -T_7.22 ; - %load/vec4 v00000000010da260_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v00000000010da260_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000010da300_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010da120, 0, 4; - %jmp T_7.24; -T_7.23 ; - %load/vec4 v00000000010da260_0; - %parti/s 1, 31, 6; - %replicate 16; - %load/vec4 v00000000010da260_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000010da300_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010da120, 0, 4; - %jmp T_7.24; -T_7.24 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.7 ; - %load/vec4 v00000000010d8b40_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.25, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.26, 6; - %jmp T_7.27; -T_7.25 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v00000000010da260_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000010da300_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010da120, 0, 4; - %jmp T_7.27; -T_7.26 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v00000000010da260_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000010da300_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010da120, 0, 4; - %jmp T_7.27; -T_7.27 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.8 ; - %load/vec4 v00000000010d8b40_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.28, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.29, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.30, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.31, 6; - %jmp T_7.32; -T_7.28 ; - %load/vec4 v00000000010da260_0; - %parti/s 8, 0, 2; - %load/vec4 v00000000010da300_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 24, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v00000000010da120, 4, 5; - %jmp T_7.32; -T_7.29 ; - %load/vec4 v00000000010da260_0; - %parti/s 16, 0, 2; - %load/vec4 v00000000010da300_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 16, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v00000000010da120, 4, 5; - %jmp T_7.32; -T_7.30 ; - %load/vec4 v00000000010da260_0; - %parti/s 24, 0, 2; - %load/vec4 v00000000010da300_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 8, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v00000000010da120, 4, 5; - %jmp T_7.32; -T_7.31 ; - %load/vec4 v00000000010da260_0; - %load/vec4 v00000000010da300_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010da120, 0, 4; - %jmp T_7.32; -T_7.32 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.9 ; - %load/vec4 v00000000010d8b40_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.33, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.34, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.35, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.36, 6; - %jmp T_7.37; -T_7.33 ; - %load/vec4 v00000000010da260_0; - %load/vec4 v00000000010da300_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010da120, 0, 4; - %jmp T_7.37; -T_7.34 ; - %load/vec4 v00000000010da260_0; - %parti/s 24, 8, 5; - %load/vec4 v00000000010da300_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010da120, 0, 4; - %jmp T_7.37; -T_7.35 ; - %load/vec4 v00000000010da260_0; - %parti/s 16, 16, 6; - %load/vec4 v00000000010da300_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010da120, 0, 4; - %jmp T_7.37; -T_7.36 ; - %load/vec4 v00000000010da260_0; - %parti/s 8, 24, 6; - %load/vec4 v00000000010da300_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010da120, 0, 4; - %jmp T_7.37; -T_7.37 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.11 ; - %pop/vec4 1; -T_7.2 ; -T_7.1 ; - %jmp T_7; - .thread T_7; - .scope S_0000000000fd5e30; -T_8 ; -Ewait_1 .event/or E_0000000001010cc0, E_0x0; - %wait Ewait_1; - %load/vec4 v00000000010d9680_0; - %dup/vec4; - %pushi/vec4 0, 0, 5; - %cmp/u; - %jmp/1 T_8.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 5; - %cmp/u; - %jmp/1 T_8.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 5; - %cmp/u; - %jmp/1 T_8.2, 6; - %dup/vec4; - %pushi/vec4 3, 0, 5; - %cmp/u; - %jmp/1 T_8.3, 6; - %dup/vec4; - %pushi/vec4 4, 0, 5; - %cmp/u; - %jmp/1 T_8.4, 6; - %dup/vec4; - %pushi/vec4 5, 0, 5; - %cmp/u; - %jmp/1 T_8.5, 6; - %dup/vec4; - %pushi/vec4 6, 0, 5; - %cmp/u; - %jmp/1 T_8.6, 6; - %dup/vec4; - %pushi/vec4 7, 0, 5; - %cmp/u; - %jmp/1 T_8.7, 6; - %dup/vec4; - %pushi/vec4 8, 0, 5; - %cmp/u; - %jmp/1 T_8.8, 6; - %dup/vec4; - %pushi/vec4 9, 0, 5; - %cmp/u; - %jmp/1 T_8.9, 6; - %dup/vec4; - %pushi/vec4 10, 0, 5; - %cmp/u; - %jmp/1 T_8.10, 6; - %dup/vec4; - %pushi/vec4 11, 0, 5; - %cmp/u; - %jmp/1 T_8.11, 6; - %dup/vec4; - %pushi/vec4 12, 0, 5; - %cmp/u; - %jmp/1 T_8.12, 6; - %dup/vec4; - %pushi/vec4 13, 0, 5; - %cmp/u; - %jmp/1 T_8.13, 6; - %dup/vec4; - %pushi/vec4 14, 0, 5; - %cmp/u; - %jmp/1 T_8.14, 6; - %dup/vec4; - %pushi/vec4 15, 0, 5; - %cmp/u; - %jmp/1 T_8.15, 6; - %dup/vec4; - %pushi/vec4 16, 0, 5; - %cmp/u; - %jmp/1 T_8.16, 6; - %dup/vec4; - %pushi/vec4 17, 0, 5; - %cmp/u; - %jmp/1 T_8.17, 6; - %dup/vec4; - %pushi/vec4 18, 0, 5; - %cmp/u; - %jmp/1 T_8.18, 6; - %dup/vec4; - %pushi/vec4 19, 0, 5; - %cmp/u; - %jmp/1 T_8.19, 6; - %dup/vec4; - %pushi/vec4 20, 0, 5; - %cmp/u; - %jmp/1 T_8.20, 6; - %dup/vec4; - %pushi/vec4 21, 0, 5; - %cmp/u; - %jmp/1 T_8.21, 6; - %dup/vec4; - %pushi/vec4 22, 0, 5; - %cmp/u; - %jmp/1 T_8.22, 6; - %dup/vec4; - %pushi/vec4 23, 0, 5; - %cmp/u; - %jmp/1 T_8.23, 6; - %jmp T_8.24; -T_8.0 ; - %load/vec4 v00000000010da620_0; - %load/vec4 v00000000010d9ae0_0; - %add; - %store/vec4 v00000000010d9ea0_0, 0, 32; - %jmp T_8.24; -T_8.1 ; - %load/vec4 v00000000010da620_0; - %load/vec4 v00000000010d9ae0_0; - %sub; - %store/vec4 v00000000010d9ea0_0, 0, 32; - %jmp T_8.24; -T_8.2 ; - %load/vec4 v00000000010da620_0; - %load/vec4 v00000000010d9ae0_0; - %mul; - %store/vec4 v00000000010d9ea0_0, 0, 32; - %jmp T_8.24; -T_8.3 ; - %load/vec4 v00000000010da620_0; - %load/vec4 v00000000010d9ae0_0; - %div/s; - %store/vec4 v00000000010d9ea0_0, 0, 32; - %jmp T_8.24; -T_8.4 ; - %load/vec4 v00000000010da620_0; - %load/vec4 v00000000010d9ae0_0; - %and; - %store/vec4 v00000000010d9ea0_0, 0, 32; - %jmp T_8.24; -T_8.5 ; - %load/vec4 v00000000010da620_0; - %load/vec4 v00000000010d9ae0_0; - %or; - %store/vec4 v00000000010d9ea0_0, 0, 32; - %jmp T_8.24; -T_8.6 ; - %load/vec4 v00000000010da620_0; - %load/vec4 v00000000010d9ae0_0; - %xor; - %store/vec4 v00000000010d9ea0_0, 0, 32; - %jmp T_8.24; -T_8.7 ; - %load/vec4 v00000000010d9ae0_0; - %ix/getv 4, v00000000010da6c0_0; - %shiftl 4; - %store/vec4 v00000000010d9ea0_0, 0, 32; - %jmp T_8.24; -T_8.8 ; - %load/vec4 v00000000010d9ae0_0; - %ix/getv 4, v00000000010da620_0; - %shiftl 4; - %store/vec4 v00000000010d9ea0_0, 0, 32; - %jmp T_8.24; -T_8.9 ; - %load/vec4 v00000000010d9ae0_0; - %ix/getv 4, v00000000010da6c0_0; - %shiftr 4; - %store/vec4 v00000000010d9ea0_0, 0, 32; - %jmp T_8.24; -T_8.10 ; - %load/vec4 v00000000010d9ae0_0; - %ix/getv 4, v00000000010da620_0; - %shiftr 4; - %store/vec4 v00000000010d9ea0_0, 0, 32; - %jmp T_8.24; -T_8.11 ; - %load/vec4 v00000000010d9ae0_0; - %ix/getv 4, v00000000010da6c0_0; - %shiftr 4; - %store/vec4 v00000000010d9ea0_0, 0, 32; - %jmp T_8.24; -T_8.12 ; - %load/vec4 v00000000010d9ae0_0; - %ix/getv 4, v00000000010da620_0; - %shiftr 4; - %store/vec4 v00000000010d9ea0_0, 0, 32; - %jmp T_8.24; -T_8.13 ; - %load/vec4 v00000000010da620_0; - %load/vec4 v00000000010d9ae0_0; - %cmp/e; - %jmp/0xz T_8.25, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000010d97c0_0, 0, 1; - %jmp T_8.26; -T_8.25 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000010d97c0_0, 0, 1; -T_8.26 ; - %jmp T_8.24; -T_8.14 ; - %load/vec4 v00000000010da620_0; - %load/vec4 v00000000010d9ae0_0; - %cmp/s; - %jmp/0xz T_8.27, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000010d97c0_0, 0, 1; - %jmp T_8.28; -T_8.27 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000010d97c0_0, 0, 1; -T_8.28 ; - %jmp T_8.24; -T_8.15 ; - %load/vec4 v00000000010da620_0; - %load/vec4 v00000000010d9ae0_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.29, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000010d97c0_0, 0, 1; - %jmp T_8.30; -T_8.29 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000010d97c0_0, 0, 1; -T_8.30 ; - %jmp T_8.24; -T_8.16 ; - %load/vec4 v00000000010d9ae0_0; - %load/vec4 v00000000010da620_0; - %cmp/s; - %jmp/0xz T_8.31, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000010d97c0_0, 0, 1; - %jmp T_8.32; -T_8.31 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000010d97c0_0, 0, 1; -T_8.32 ; - %jmp T_8.24; -T_8.17 ; - %load/vec4 v00000000010d9ae0_0; - %load/vec4 v00000000010da620_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.33, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000010d97c0_0, 0, 1; - %jmp T_8.34; -T_8.33 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000010d97c0_0, 0, 1; -T_8.34 ; - %jmp T_8.24; -T_8.18 ; - %load/vec4 v00000000010da620_0; - %load/vec4 v00000000010d9ae0_0; - %cmp/ne; - %jmp/0xz T_8.35, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000010d97c0_0, 0, 1; - %jmp T_8.36; -T_8.35 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000010d97c0_0, 0, 1; -T_8.36 ; - %jmp T_8.24; -T_8.19 ; - %load/vec4 v00000000010da620_0; - %store/vec4 v00000000010d9ea0_0, 0, 32; - %jmp T_8.24; -T_8.20 ; - %load/vec4 v00000000010da620_0; - %load/vec4 v00000000010d9ae0_0; - %cmp/s; - %jmp/0xz T_8.37, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v00000000010d9ea0_0, 0, 32; -T_8.37 ; - %jmp T_8.24; -T_8.21 ; - %load/vec4 v00000000010da620_0; - %load/vec4 v00000000010d9ae0_0; - %cmp/u; - %jmp/0xz T_8.39, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v00000000010d9ea0_0, 0, 32; -T_8.39 ; - %jmp T_8.24; -T_8.22 ; - %load/vec4 v00000000010da620_0; - %load/vec4 v00000000010d9ae0_0; - %mul; - %store/vec4 v00000000010d9ea0_0, 0, 32; - %jmp T_8.24; -T_8.23 ; - %load/vec4 v00000000010da620_0; - %load/vec4 v00000000010d9ae0_0; - %div; - %store/vec4 v00000000010d9ea0_0, 0, 32; - %jmp T_8.24; -T_8.24 ; - %pop/vec4 1; - %jmp T_8; - .thread T_8, $push; - .scope S_000000000101ee20; -T_9 ; - %pushi/vec4 3217031168, 0, 32; - %store/vec4 v0000000001133c30_0, 0, 32; - %end; - .thread T_9, $init; - .scope S_000000000101ee20; -T_10 ; -Ewait_2 .event/or E_0000000001016740, E_0x0; - %wait Ewait_2; - %load/vec4 v0000000001133230_0; - %store/vec4 v00000000011343b0_0, 0, 32; - %load/vec4 v0000000001133f50_0; - %store/vec4 v00000000010d8be0_0, 0, 32; - %load/vec4 v0000000001134090_0; - %store/vec4 v00000000010d95e0_0, 0, 1; - %load/vec4 v0000000001133af0_0; - %store/vec4 v00000000010d9400_0, 0, 1; - %load/vec4 v0000000001133190_0; - %store/vec4 v00000000010d9720_0, 0, 32; - %jmp T_10; - .thread T_10, $push; - .scope S_000000000101ee20; -T_11 ; -Ewait_3 .event/or E_0000000001016f40, E_0x0; - %wait Ewait_3; - %load/vec4 v0000000001133d70_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.2, 6; - %jmp T_11.3; -T_11.0 ; - %load/vec4 v00000000011332d0_0; - %parti/s 5, 16, 6; - %store/vec4 v0000000001132c90_0, 0, 5; - %jmp T_11.3; -T_11.1 ; - %load/vec4 v00000000011332d0_0; - %parti/s 5, 11, 5; - %store/vec4 v0000000001132c90_0, 0, 5; - %jmp T_11.3; -T_11.2 ; - %pushi/vec4 31, 0, 5; - %store/vec4 v0000000001132c90_0, 0, 5; - %jmp T_11.3; -T_11.3 ; - %pop/vec4 1; - %load/vec4 v0000000001132b50_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.6, 6; - %jmp T_11.7; -T_11.4 ; - %load/vec4 v0000000001133f50_0; - %store/vec4 v0000000001133550_0, 0, 32; - %jmp T_11.7; -T_11.5 ; - %load/vec4 v00000000010d8d20_0; - %store/vec4 v0000000001133550_0, 0, 32; - %jmp T_11.7; -T_11.6 ; - %load/vec4 v0000000001133c30_0; - %addi 8, 0, 32; - %store/vec4 v0000000001133550_0, 0, 32; - %jmp T_11.7; -T_11.7 ; - %pop/vec4 1; - %load/vec4 v00000000011337d0_0; - %dup/vec4; - %pushi/vec4 1, 0, 1; - %cmp/u; - %jmp/1 T_11.8, 6; - %dup/vec4; - %pushi/vec4 0, 0, 1; - %cmp/u; - %jmp/1 T_11.9, 6; - %jmp T_11.10; -T_11.8 ; - %load/vec4 v00000000011332d0_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v00000000011332d0_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %store/vec4 v0000000000ffe440_0, 0, 32; - %jmp T_11.10; -T_11.9 ; - %load/vec4 v0000000001133190_0; - %store/vec4 v0000000000ffe440_0, 0, 32; - %jmp T_11.10; -T_11.10 ; - %pop/vec4 1; - %jmp T_11; - .thread T_11, $push; - .scope S_000000000101ec90; -T_12 ; - %vpi_call/w 3 36 "$dumpfile", "mips_cpu_harvard.vcd" {0 0 0}; - %vpi_call/w 3 37 "$dumpvars", 32'sb00000000000000000000000000000000, S_000000000101ec90 {0 0 0}; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000011357e0_0, 0, 1; - %pushi/vec4 100, 0, 32; -T_12.0 %dup/vec4; - %pushi/vec4 0, 0, 32; - %cmp/s; - %jmp/1xz T_12.1, 5; - %jmp/1 T_12.1, 4; - %pushi/vec4 1, 0, 32; - %sub; - %delay 10, 0; - %load/vec4 v00000000011357e0_0; - %nor/r; - %store/vec4 v00000000011357e0_0, 0, 1; - %delay 10, 0; - %load/vec4 v00000000011357e0_0; - %nor/r; - %store/vec4 v00000000011357e0_0, 0, 1; - %jmp T_12.0; -T_12.1 ; - %pop/vec4 1; - %vpi_call/w 3 47 "$fatal", 32'sb00000000000000000000000000000010, "Simulation did not finish within %d cycles.", P_0000000001004a68 {0 0 0}; - %end; - .thread T_12; - .scope S_000000000101ec90; -T_13 ; - %vpi_call/w 3 51 "$display", "Initial Reset 0" {0 0 0}; - %pushi/vec4 0, 0, 1; - %assign/vec4 v0000000001134e80_0, 0; - %vpi_call/w 3 55 "$display", "Initial Reset 1" {0 0 0}; - %wait E_0000000001010600; - %pushi/vec4 1, 0, 1; - %assign/vec4 v0000000001134e80_0, 0; - %vpi_call/w 3 59 "$display", "Initial Reset 0: Start Program" {0 0 0}; - %wait E_0000000001010600; - %pushi/vec4 0, 0, 1; - %assign/vec4 v0000000001134e80_0, 0; - %wait E_0000000001010600; - %load/vec4 v0000000001135420_0; - %pad/u 32; - %cmpi/e 1, 0, 32; - %jmp/0xz T_13.0, 4; - %jmp T_13.1; -T_13.0 ; - %vpi_call/w 3 65 "$display", "TB: CPU did not set active=1 after reset." {0 0 0}; -T_13.1 ; -T_13.2 ; - %load/vec4 v0000000001135420_0; - %flag_set/vec4 8; - %jmp/0xz T_13.3, 8; - %wait E_0000000001010600; - %vpi_call/w 3 71 "$display", "Reg File Write data: %d", v0000000001133550_0 {0 0 0}; - %jmp T_13.2; -T_13.3 ; - %wait E_0000000001010600; - %vpi_call/w 3 74 "$display", "TB: CPU Halt; active=0" {0 0 0}; - %vpi_call/w 3 75 "$display", "Output:" {0 0 0}; - %vpi_call/w 3 76 "$display", "%d", v0000000001135d80_0 {0 0 0}; - %vpi_call/w 3 77 "$finish" {0 0 0}; - %end; - .thread T_13; -# The file index is used to find the file name in the following table. -:file_names 10; - "N/A"; - ""; - "-"; - "testbench/mips_cpu_harvard_tb.v"; - "rtl/mips_cpu_harvard.v"; - "rtl/mips_cpu_alu.v"; - "rtl/mips_cpu_control.v"; - "rtl/mips_cpu_pc.v"; - "rtl/mips_cpu_regfile.v"; - "rtl/mips_cpu_memory.v"; diff --git a/exec/mips_cpu_harvard_tb_xori b/exec/mips_cpu_harvard_tb_xori deleted file mode 100644 index b9fe6b6..0000000 --- a/exec/mips_cpu_harvard_tb_xori +++ /dev/null @@ -1,2738 +0,0 @@ -#! /usr/local/iverilog/bin/vvp -:ivl_version "11.0 (devel)"; -:ivl_delay_selection "TYPICAL"; -:vpi_time_precision + 0; -:vpi_module "C:\iverilog\lib\ivl\system.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_sys.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_textio.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2005_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\va_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2009.vpi"; -S_00000000010fc100 .scope package, "$unit" "$unit" 2 1; - .timescale 0 0; -S_000000000094aab0 .scope module, "mips_cpu_harvard_tb" "mips_cpu_harvard_tb" 3 1; - .timescale 0 0; -P_00000000008941e0 .param/str "RAM_INIT_FILE" 0 3 3, "inputs/xori.txt"; -P_0000000000894218 .param/l "TIMEOUT_CYCLES" 0 3 4, +C4<00000000000000000000000001100100>; -v0000000001155240_0 .net "active", 0 0, v00000000010f9ae0_0; 1 drivers -v0000000001155e20_0 .var "clk", 0 0; -v0000000001154de0_0 .var "clk_enable", 0 0; -v0000000001155ba0_0 .net "data_address", 31 0, v00000000010f8c80_0; 1 drivers -v0000000001155d80_0 .net "data_read", 0 0, v00000000010f8d20_0; 1 drivers -v00000000011559c0_0 .net "data_readdata", 31 0, L_0000000001155560; 1 drivers -v0000000001156820_0 .net "data_write", 0 0, v00000000010f9400_0; 1 drivers -v0000000001156780_0 .net "data_writedata", 31 0, v00000000010f94a0_0; 1 drivers -v00000000011561e0_0 .net "instr_address", 31 0, v0000000001154630_0; 1 drivers -v00000000011554c0_0 .net "instr_readdata", 31 0, L_0000000001155380; 1 drivers -v0000000001155880_0 .net "register_v0", 31 0, L_000000000094df10; 1 drivers -v0000000001156460_0 .var "reset", 0 0; -S_0000000000905e30 .scope module, "cpuInst" "mips_cpu_harvard" 3 19, 4 1 0, S_000000000094aab0; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "reset"; - .port_info 2 /OUTPUT 1 "active"; - .port_info 3 /OUTPUT 32 "register_v0"; - .port_info 4 /INPUT 1 "clk_enable"; - .port_info 5 /OUTPUT 32 "instr_address"; - .port_info 6 /INPUT 32 "instr_readdata"; - .port_info 7 /OUTPUT 32 "data_address"; - .port_info 8 /OUTPUT 1 "data_write"; - .port_info 9 /OUTPUT 1 "data_read"; - .port_info 10 /OUTPUT 32 "data_writedata"; - .port_info 11 /INPUT 32 "data_readdata"; -v00000000010f8b40_0 .net "active", 0 0, v00000000010f9ae0_0; alias, 1 drivers -v00000000010f8be0_0 .net "clk", 0 0, v0000000001155e20_0; 1 drivers -v00000000010f9360_0 .net "clk_enable", 0 0, v0000000001154de0_0; 1 drivers -v00000000010f8c80_0 .var "data_address", 31 0; -v00000000010f8d20_0 .var "data_read", 0 0; -v00000000010f8dc0_0 .net "data_readdata", 31 0, L_0000000001155560; alias, 1 drivers -v00000000010f9400_0 .var "data_write", 0 0; -v00000000010f94a0_0 .var "data_writedata", 31 0; -v000000000092e1a0_0 .var "in_B", 31 0; -v0000000001153d70_0 .net "in_opcode", 5 0, L_0000000001155600; 1 drivers -v0000000001152e70_0 .net "in_pc_in", 31 0, v00000000010f97c0_0; 1 drivers -v0000000001153690_0 .net "in_readreg1", 4 0, L_0000000001156320; 1 drivers -v0000000001154090_0 .net "in_readreg2", 4 0, L_0000000001155a60; 1 drivers -v0000000001153410_0 .var "in_writedata", 31 0; -v0000000001153730_0 .var "in_writereg", 4 0; -v0000000001154630_0 .var "instr_address", 31 0; -v00000000011546d0_0 .net "instr_readdata", 31 0, L_0000000001155380; alias, 1 drivers -v0000000001152dd0_0 .net "out_ALUCond", 0 0, v00000000010fa3a0_0; 1 drivers -v0000000001152b50_0 .net "out_ALUOp", 4 0, v00000000010fa1c0_0; 1 drivers -v0000000001154130_0 .net "out_ALURes", 31 0, v00000000010fa6c0_0; 1 drivers -v00000000011530f0_0 .net "out_ALUSrc", 0 0, v00000000010f9d60_0; 1 drivers -v0000000001154270_0 .net "out_MemRead", 0 0, v00000000010f9f40_0; 1 drivers -v0000000001153230_0 .net "out_MemWrite", 0 0, v00000000010f9c20_0; 1 drivers -v00000000011543b0_0 .net "out_MemtoReg", 1 0, v00000000010fa300_0; 1 drivers -v0000000001152970_0 .net "out_PC", 1 0, v00000000010fa800_0; 1 drivers -v0000000001154590_0 .net "out_RegDst", 1 0, v00000000010f9680_0; 1 drivers -v0000000001154310_0 .net "out_RegWrite", 0 0, v00000000010f99a0_0; 1 drivers -v0000000001153910_0 .var "out_pc_out", 31 0; -v00000000011534b0_0 .net "out_readdata1", 31 0, v00000000010f9220_0; 1 drivers -v0000000001153e10_0 .net "out_readdata2", 31 0, v00000000010f9b80_0; 1 drivers -v0000000001154770_0 .net "out_shamt", 4 0, v00000000010f8f00_0; 1 drivers -v0000000001154450_0 .net "register_v0", 31 0, L_000000000094df10; alias, 1 drivers -v0000000001152c90_0 .net "reset", 0 0, v0000000001156460_0; 1 drivers -E_0000000000946680/0 .event edge, v00000000010f9680_0, v00000000010f8fa0_0, v00000000010f8fa0_0, v00000000010fa300_0; -E_0000000000946680/1 .event edge, v00000000010fa6c0_0, v00000000010f8dc0_0, v00000000010f9720_0, v00000000010f9d60_0; -E_0000000000946680/2 .event edge, v00000000010f8fa0_0, v00000000010f8fa0_0, v00000000010f9b80_0; -E_0000000000946680 .event/or E_0000000000946680/0, E_0000000000946680/1, E_0000000000946680/2; -E_0000000000946b40/0 .event edge, v00000000010f97c0_0, v00000000010fa6c0_0, v00000000010f9c20_0, v00000000010f9f40_0; -E_0000000000946b40/1 .event edge, v00000000010f9b80_0; -E_0000000000946b40 .event/or E_0000000000946b40/0, E_0000000000946b40/1; -L_0000000001156320 .part L_0000000001155380, 21, 5; -L_0000000001155a60 .part L_0000000001155380, 16, 5; -L_0000000001155600 .part L_0000000001155380, 26, 6; -S_0000000000905fc0 .scope module, "alu" "mips_cpu_alu" 4 121, 5 1 0, S_0000000000905e30; - .timescale 0 0; - .port_info 0 /INPUT 32 "A"; - .port_info 1 /INPUT 32 "B"; - .port_info 2 /INPUT 5 "ALUOp"; - .port_info 3 /INPUT 5 "shamt"; - .port_info 4 /OUTPUT 1 "ALUCond"; - .port_info 5 /OUTPUT 32 "ALURes"; -enum000000000018bd00 .enum4 (5) - "ADD" 5'b00000, - "SUB" 5'b00001, - "MUL" 5'b00010, - "DIV" 5'b00011, - "AND" 5'b00100, - "OR" 5'b00101, - "XOR" 5'b00110, - "SLL" 5'b00111, - "SLLV" 5'b01000, - "SRL" 5'b01001, - "SRLV" 5'b01010, - "SRA" 5'b01011, - "SRAV" 5'b01100, - "EQ" 5'b01101, - "LES" 5'b01110, - "LEQ" 5'b01111, - "GRT" 5'b10000, - "GEQ" 5'b10001, - "NEQ" 5'b10010, - "PAS" 5'b10011, - "SLT" 5'b10100, - "SLTU" 5'b10101, - "MULU" 5'b10110, - "DIVU" 5'b10111 - ; -L_000000000094e6f0 .functor BUFZ 5, v00000000010fa1c0_0, C4<00000>, C4<00000>, C4<00000>; -v00000000010fa760_0 .net "A", 31 0, v00000000010f9220_0; alias, 1 drivers -v00000000010fa3a0_0 .var "ALUCond", 0 0; -v00000000010f9040_0 .net "ALUOp", 4 0, v00000000010fa1c0_0; alias, 1 drivers -v00000000010f9860_0 .net "ALUOps", 4 0, L_000000000094e6f0; 1 drivers -v00000000010fa6c0_0 .var/s "ALURes", 31 0; -v00000000010fa260_0 .net "B", 31 0, v000000000092e1a0_0; 1 drivers -v00000000010f9540_0 .net "shamt", 4 0, v00000000010f8f00_0; alias, 1 drivers -E_00000000009412c0 .event edge, v00000000010f9860_0, v00000000010fa760_0, v00000000010fa260_0, v00000000010f9540_0; -S_0000000000906150 .scope module, "control" "mips_cpu_control" 4 90, 6 1 0, S_0000000000905e30; - .timescale 0 0; - .port_info 0 /INPUT 32 "Instr"; - .port_info 1 /INPUT 1 "ALUCond"; - .port_info 2 /OUTPUT 2 "CtrlRegDst"; - .port_info 3 /OUTPUT 2 "CtrlPC"; - .port_info 4 /OUTPUT 1 "CtrlMemRead"; - .port_info 5 /OUTPUT 2 "CtrlMemtoReg"; - .port_info 6 /OUTPUT 5 "CtrlALUOp"; - .port_info 7 /OUTPUT 5 "Ctrlshamt"; - .port_info 8 /OUTPUT 1 "CtrlMemWrite"; - .port_info 9 /OUTPUT 1 "CtrlALUSrc"; - .port_info 10 /OUTPUT 1 "CtrlRegWrite"; -enum0000000000189270 .enum4 (6) - "SLL" 6'b000000, - "SRL" 6'b000010, - "SRA" 6'b000011, - "SLLV" 6'b000100, - "SRLV" 6'b000110, - "SRAV" 6'b000111, - "JR" 6'b001000, - "JALR" 6'b001001, - "MTHI" 6'b010001, - "MTLO" 6'b010011, - "MULT" 6'b011000, - "MULTU" 6'b011001, - "DIV" 6'b011010, - "DIVU" 6'b011011, - "ADDU" 6'b100001, - "SUBU" 6'b100011, - "AND" 6'b100100, - "OR" 6'b100101, - "XOR" 6'b100110, - "SLT" 6'b101010, - "SLTU" 6'b101011 - ; -enum000000000018b8a0 .enum4 (5) - "BLTZ" 5'b00000, - "BGEZ" 5'b00001, - "BLTZAL" 5'b10000, - "BGEZAL" 5'b10001 - ; -enum000000000018b950 .enum4 (6) - "SPECIAL" 6'b000000, - "REGIMM" 6'b000001, - "J" 6'b000010, - "JAL" 6'b000011, - "BEQ" 6'b000100, - "BNE" 6'b000101, - "BLEZ" 6'b000110, - "BGTZ" 6'b000111, - "ADDI" 6'b001000, - "ADDIU" 6'b001001, - "SLTI" 6'b001010, - "SLTIU" 6'b001011, - "ANDI" 6'b001100, - "ORI" 6'b001101, - "XORI" 6'b001110, - "LUI" 6'b001111, - "LB" 6'b100000, - "LH" 6'b100001, - "LWL" 6'b100010, - "LW" 6'b100011, - "LBU" 6'b100100, - "LHU" 6'b100101, - "LWR" 6'b100110, - "SB" 6'b101000, - "SH" 6'b101001, - "SW" 6'b101011 - ; -v00000000010f95e0_0 .net "ALUCond", 0 0, v00000000010fa3a0_0; alias, 1 drivers -v00000000010fa1c0_0 .var "CtrlALUOp", 4 0; -v00000000010f9d60_0 .var "CtrlALUSrc", 0 0; -v00000000010f9f40_0 .var "CtrlMemRead", 0 0; -v00000000010f9c20_0 .var "CtrlMemWrite", 0 0; -v00000000010fa300_0 .var "CtrlMemtoReg", 1 0; -v00000000010fa800_0 .var "CtrlPC", 1 0; -v00000000010f9680_0 .var "CtrlRegDst", 1 0; -v00000000010f99a0_0 .var "CtrlRegWrite", 0 0; -v00000000010f8f00_0 .var "Ctrlshamt", 4 0; -v00000000010f8fa0_0 .net "Instr", 31 0, L_0000000001155380; alias, 1 drivers -v00000000010f8960_0 .net "funct", 5 0, L_0000000001156640; 1 drivers -v00000000010f9900_0 .net "op", 5 0, L_0000000001156000; 1 drivers -v00000000010f90e0_0 .net "rt", 4 0, L_00000000011563c0; 1 drivers -E_0000000000947fc0/0 .event edge, v00000000010f9900_0, v00000000010f8960_0, v00000000010fa3a0_0, v00000000010f90e0_0; -E_0000000000947fc0/1 .event edge, v00000000010f8fa0_0; -E_0000000000947fc0 .event/or E_0000000000947fc0/0, E_0000000000947fc0/1; -L_0000000001156000 .part L_0000000001155380, 26, 6; -L_0000000001156640 .part L_0000000001155380, 0, 6; -L_00000000011563c0 .part L_0000000001155380, 16, 5; -S_00000000008f91d0 .scope module, "pc" "pc" 4 79, 7 1 0, S_0000000000905e30; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "rst"; - .port_info 2 /INPUT 2 "pc_ctrl"; - .port_info 3 /INPUT 32 "pc_in"; - .port_info 4 /INPUT 5 "rs"; - .port_info 5 /OUTPUT 32 "pc_out"; - .port_info 6 /OUTPUT 1 "active"; -v00000000010f9ae0_0 .var "active", 0 0; -v00000000010f9180_0 .net "clk", 0 0, v0000000001155e20_0; alias, 1 drivers -v00000000010f9fe0_0 .net "pc_ctrl", 1 0, v00000000010fa800_0; alias, 1 drivers -v00000000010f8e60_0 .var "pc_curr", 31 0; -v00000000010f9720_0 .net "pc_in", 31 0, v0000000001153910_0; 1 drivers -v00000000010f97c0_0 .var "pc_out", 31 0; -o00000000010fd018 .functor BUFZ 5, C4; HiZ drive -v00000000010fa080_0 .net "rs", 4 0, o00000000010fd018; 0 drivers -v00000000010fa120_0 .net "rst", 0 0, v0000000001156460_0; alias, 1 drivers -E_0000000000941340 .event posedge, v00000000010f9180_0; -S_00000000008f9360 .scope module, "regfile" "mips_cpu_regfile" 4 106, 8 1 0, S_0000000000905e30; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 5 "readreg1"; - .port_info 2 /INPUT 5 "readreg2"; - .port_info 3 /INPUT 5 "writereg"; - .port_info 4 /INPUT 32 "writedata"; - .port_info 5 /INPUT 1 "regwrite"; - .port_info 6 /INPUT 6 "opcode"; - .port_info 7 /OUTPUT 32 "readdata1"; - .port_info 8 /OUTPUT 32 "readdata2"; - .port_info 9 /OUTPUT 32 "regv0"; -v00000000010fa4e0_2 .array/port v00000000010fa4e0, 2; -L_000000000094df10 .functor BUFZ 32, v00000000010fa4e0_2, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; -v00000000010f9e00_0 .net "clk", 0 0, v0000000001155e20_0; alias, 1 drivers -v00000000010fa4e0 .array "memory", 0 31, 31 0; -v00000000010fa580_0 .net "opcode", 5 0, L_0000000001155600; alias, 1 drivers -v00000000010f9220_0 .var "readdata1", 31 0; -v00000000010f9b80_0 .var "readdata2", 31 0; -v00000000010f9ea0_0 .net "readreg1", 4 0, L_0000000001156320; alias, 1 drivers -v00000000010f92c0_0 .net "readreg2", 4 0, L_0000000001155a60; alias, 1 drivers -v00000000010f9cc0_0 .net "regv0", 31 0, L_000000000094df10; alias, 1 drivers -v00000000010fa620_0 .net "regwrite", 0 0, v00000000010f99a0_0; alias, 1 drivers -v00000000010f8a00_0 .net "writedata", 31 0, v0000000001153410_0; 1 drivers -v00000000010f8aa0_0 .net "writereg", 4 0, v0000000001153730_0; 1 drivers -E_0000000000940640 .event negedge, v00000000010f9180_0; -v00000000010fa4e0_0 .array/port v00000000010fa4e0, 0; -v00000000010fa4e0_1 .array/port v00000000010fa4e0, 1; -E_0000000000940680/0 .event edge, v00000000010f9ea0_0, v00000000010fa4e0_0, v00000000010fa4e0_1, v00000000010fa4e0_2; -v00000000010fa4e0_3 .array/port v00000000010fa4e0, 3; -v00000000010fa4e0_4 .array/port v00000000010fa4e0, 4; -v00000000010fa4e0_5 .array/port v00000000010fa4e0, 5; -v00000000010fa4e0_6 .array/port v00000000010fa4e0, 6; -E_0000000000940680/1 .event edge, v00000000010fa4e0_3, v00000000010fa4e0_4, v00000000010fa4e0_5, v00000000010fa4e0_6; -v00000000010fa4e0_7 .array/port v00000000010fa4e0, 7; -v00000000010fa4e0_8 .array/port v00000000010fa4e0, 8; -v00000000010fa4e0_9 .array/port v00000000010fa4e0, 9; -v00000000010fa4e0_10 .array/port v00000000010fa4e0, 10; -E_0000000000940680/2 .event edge, v00000000010fa4e0_7, v00000000010fa4e0_8, v00000000010fa4e0_9, v00000000010fa4e0_10; -v00000000010fa4e0_11 .array/port v00000000010fa4e0, 11; -v00000000010fa4e0_12 .array/port v00000000010fa4e0, 12; -v00000000010fa4e0_13 .array/port v00000000010fa4e0, 13; -v00000000010fa4e0_14 .array/port v00000000010fa4e0, 14; -E_0000000000940680/3 .event edge, v00000000010fa4e0_11, v00000000010fa4e0_12, v00000000010fa4e0_13, v00000000010fa4e0_14; -v00000000010fa4e0_15 .array/port v00000000010fa4e0, 15; -v00000000010fa4e0_16 .array/port v00000000010fa4e0, 16; -v00000000010fa4e0_17 .array/port v00000000010fa4e0, 17; -v00000000010fa4e0_18 .array/port v00000000010fa4e0, 18; -E_0000000000940680/4 .event edge, v00000000010fa4e0_15, v00000000010fa4e0_16, v00000000010fa4e0_17, v00000000010fa4e0_18; -v00000000010fa4e0_19 .array/port v00000000010fa4e0, 19; -v00000000010fa4e0_20 .array/port v00000000010fa4e0, 20; -v00000000010fa4e0_21 .array/port v00000000010fa4e0, 21; -v00000000010fa4e0_22 .array/port v00000000010fa4e0, 22; -E_0000000000940680/5 .event edge, v00000000010fa4e0_19, v00000000010fa4e0_20, v00000000010fa4e0_21, v00000000010fa4e0_22; -v00000000010fa4e0_23 .array/port v00000000010fa4e0, 23; -v00000000010fa4e0_24 .array/port v00000000010fa4e0, 24; -v00000000010fa4e0_25 .array/port v00000000010fa4e0, 25; -v00000000010fa4e0_26 .array/port v00000000010fa4e0, 26; -E_0000000000940680/6 .event edge, v00000000010fa4e0_23, v00000000010fa4e0_24, v00000000010fa4e0_25, v00000000010fa4e0_26; -v00000000010fa4e0_27 .array/port v00000000010fa4e0, 27; -v00000000010fa4e0_28 .array/port v00000000010fa4e0, 28; -v00000000010fa4e0_29 .array/port v00000000010fa4e0, 29; -v00000000010fa4e0_30 .array/port v00000000010fa4e0, 30; -E_0000000000940680/7 .event edge, v00000000010fa4e0_27, v00000000010fa4e0_28, v00000000010fa4e0_29, v00000000010fa4e0_30; -v00000000010fa4e0_31 .array/port v00000000010fa4e0, 31; -E_0000000000940680/8 .event edge, v00000000010fa4e0_31, v00000000010f92c0_0; -E_0000000000940680 .event/or E_0000000000940680/0, E_0000000000940680/1, E_0000000000940680/2, E_0000000000940680/3, E_0000000000940680/4, E_0000000000940680/5, E_0000000000940680/6, E_0000000000940680/7, E_0000000000940680/8; -S_00000000008f94f0 .scope begin, "$unm_blk_121" "$unm_blk_121" 8 16, 8 16 0, S_00000000008f9360; - .timescale 0 0; -v00000000010fa440_0 .var/i "i", 31 0; -S_00000000008ee6f0 .scope module, "ramInst" "mips_cpu_memory" 3 9, 9 1 0, S_000000000094aab0; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 32 "data_address"; - .port_info 2 /INPUT 1 "data_write"; - .port_info 3 /INPUT 1 "data_read"; - .port_info 4 /INPUT 32 "data_writedata"; - .port_info 5 /OUTPUT 32 "data_readdata"; - .port_info 6 /INPUT 32 "instr_address"; - .port_info 7 /OUTPUT 32 "instr_readdata"; -P_00000000009406c0 .param/str "RAM_INIT_FILE" 0 9 16, "inputs/xori.txt"; -L_000000000094dd50 .functor AND 1, L_0000000001155ec0, L_0000000001156280, C4<1>, C4<1>; -v0000000001154810_0 .net *"_ivl_0", 31 0, L_0000000001155b00; 1 drivers -L_00000000011579e8 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v0000000001152a10_0 .net/2u *"_ivl_12", 31 0, L_00000000011579e8; 1 drivers -v0000000001152f10_0 .net *"_ivl_14", 0 0, L_0000000001155ec0; 1 drivers -L_0000000001157a30 .functor BUFT 1, C4<10111111110000000000000001000000>, C4<0>, C4<0>, C4<0>; -v0000000001153c30_0 .net/2u *"_ivl_16", 31 0, L_0000000001157a30; 1 drivers -v0000000001152d30_0 .net *"_ivl_18", 0 0, L_0000000001156280; 1 drivers -v0000000001152ab0_0 .net *"_ivl_2", 31 0, L_00000000011556a0; 1 drivers -v0000000001153550_0 .net *"_ivl_21", 0 0, L_000000000094dd50; 1 drivers -v0000000001153190_0 .net *"_ivl_22", 31 0, L_0000000001155740; 1 drivers -L_0000000001157a78 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v00000000011537d0_0 .net/2u *"_ivl_24", 31 0, L_0000000001157a78; 1 drivers -v0000000001153cd0_0 .net *"_ivl_26", 31 0, L_0000000001155f60; 1 drivers -v0000000001152bf0_0 .net *"_ivl_28", 31 0, L_0000000001155100; 1 drivers -v0000000001152fb0_0 .net *"_ivl_30", 29 0, L_0000000001155920; 1 drivers -L_0000000001157ac0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0000000001153050_0 .net *"_ivl_32", 1 0, L_0000000001157ac0; 1 drivers -L_0000000001157b08 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v00000000011532d0_0 .net *"_ivl_34", 31 0, L_0000000001157b08; 1 drivers -v0000000001153370_0 .net *"_ivl_4", 29 0, L_0000000001155420; 1 drivers -L_0000000001157958 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v00000000011535f0_0 .net *"_ivl_6", 1 0, L_0000000001157958; 1 drivers -L_00000000011579a0 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v0000000001153870_0 .net *"_ivl_8", 31 0, L_00000000011579a0; 1 drivers -v0000000001153a50_0 .net "clk", 0 0, v0000000001155e20_0; alias, 1 drivers -v0000000001153ff0_0 .net "data_address", 31 0, v00000000010f8c80_0; alias, 1 drivers -v0000000001153af0 .array "data_memory", 63 0, 31 0; -v0000000001153b90_0 .net "data_read", 0 0, v00000000010f8d20_0; alias, 1 drivers -v0000000001153eb0_0 .net "data_readdata", 31 0, L_0000000001155560; alias, 1 drivers -v0000000001153f50_0 .net "data_write", 0 0, v00000000010f9400_0; alias, 1 drivers -v00000000011541d0_0 .net "data_writedata", 31 0, v00000000010f94a0_0; alias, 1 drivers -v00000000011560a0_0 .net "instr_address", 31 0, v0000000001154630_0; alias, 1 drivers -v0000000001155ce0 .array "instr_memory", 63 0, 31 0; -v0000000001156140_0 .net "instr_readdata", 31 0, L_0000000001155380; alias, 1 drivers -L_0000000001155b00 .array/port v0000000001153af0, L_00000000011556a0; -L_0000000001155420 .part v00000000010f8c80_0, 2, 30; -L_00000000011556a0 .concat [ 30 2 0 0], L_0000000001155420, L_0000000001157958; -L_0000000001155560 .functor MUXZ 32, L_00000000011579a0, L_0000000001155b00, v00000000010f8d20_0, C4<>; -L_0000000001155ec0 .cmp/ge 32, v0000000001154630_0, L_00000000011579e8; -L_0000000001156280 .cmp/gt 32, L_0000000001157a30, v0000000001154630_0; -L_0000000001155740 .array/port v0000000001155ce0, L_0000000001155100; -L_0000000001155f60 .arith/sub 32, v0000000001154630_0, L_0000000001157a78; -L_0000000001155920 .part L_0000000001155f60, 2, 30; -L_0000000001155100 .concat [ 30 2 0 0], L_0000000001155920, L_0000000001157ac0; -L_0000000001155380 .functor MUXZ 32, L_0000000001157b08, L_0000000001155740, L_000000000094dd50, C4<>; -S_00000000008b2680 .scope begin, "$unm_blk_104" "$unm_blk_104" 9 21, 9 21 0, S_00000000008ee6f0; - .timescale 0 0; -v00000000011544f0_0 .var/i "i", 31 0; -S_00000000008b2810 .scope begin, "$ivl_for_loop0" "$ivl_for_loop0" 9 36, 9 36 0, S_00000000008b2680; - .timescale 0 0; -v00000000011539b0_0 .var/i "j", 31 0; - .scope S_00000000008ee6f0; -T_0 ; - %fork t_1, S_00000000008b2680; - %jmp t_0; - .scope S_00000000008b2680; -t_1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000011544f0_0, 0, 32; -T_0.0 ; - %load/vec4 v00000000011544f0_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v00000000011544f0_0; - %store/vec4a v0000000001153af0, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000011544f0_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000011544f0_0, 0, 32; - %jmp T_0.0; -T_0.1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000011544f0_0, 0, 32; -T_0.2 ; - %load/vec4 v00000000011544f0_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.3, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v00000000011544f0_0; - %store/vec4a v0000000001155ce0, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000011544f0_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000011544f0_0, 0, 32; - %jmp T_0.2; -T_0.3 ; - %vpi_call/w 9 32 "$display", "RAM: Loading RAM contents from %s", P_00000000009406c0 {0 0 0}; - %vpi_call/w 9 33 "$readmemh", P_00000000009406c0, v0000000001155ce0 {0 0 0}; - %fork t_3, S_00000000008b2810; - %jmp t_2; - .scope S_00000000008b2810; -t_3 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000011539b0_0, 0, 32; -T_0.4 ; - %load/vec4 v00000000011539b0_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.5, 5; - %pushi/vec4 3217031168, 0, 32; - %load/vec4 v00000000011539b0_0; - %muli 4, 0, 32; - %add; - %vpi_call/w 9 37 "$display", "byte +%h: %h", S<0,vec4,u32>, &A {1 0 0}; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000011539b0_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000011539b0_0, 0, 32; - %jmp T_0.4; -T_0.5 ; - %end; - .scope S_00000000008b2680; -t_2 %join; - %end; - .scope S_00000000008ee6f0; -t_0 %join; - %end; - .thread T_0; - .scope S_00000000008ee6f0; -T_1 ; - %wait E_0000000000941340; - %load/vec4 v0000000001153b90_0; - %nor/r; - %load/vec4 v0000000001153f50_0; - %and; - %flag_set/vec4 8; - %jmp/0xz T_1.0, 8; - %load/vec4 v00000000011560a0_0; - %load/vec4 v0000000001153ff0_0; - %cmp/ne; - %jmp/0xz T_1.2, 4; - %load/vec4 v00000000011541d0_0; - %load/vec4 v0000000001153ff0_0; - %ix/load 4, 2, 0; - %flag_set/imm 4, 0; - %shiftr 4; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0000000001153af0, 0, 4; -T_1.2 ; -T_1.0 ; - %jmp T_1; - .thread T_1; - .scope S_00000000008f91d0; -T_2 ; - %load/vec4 v00000000010f9720_0; - %store/vec4 v00000000010f97c0_0, 0, 32; - %end; - .thread T_2; - .scope S_00000000008f91d0; -T_3 ; - %wait E_0000000000941340; - %load/vec4 v00000000010fa120_0; - %flag_set/vec4 8; - %jmp/0xz T_3.0, 8; - %pushi/vec4 1, 0, 1; - %assign/vec4 v00000000010f9ae0_0, 0; - %pushi/vec4 3217031168, 0, 32; - %assign/vec4 v00000000010f97c0_0, 0; - %jmp T_3.1; -T_3.0 ; - %load/vec4 v00000000010f97c0_0; - %cmpi/ne 0, 0, 32; - %jmp/0xz T_3.2, 4; - %load/vec4 v00000000010f9ae0_0; - %assign/vec4 v00000000010f9ae0_0, 0; - %load/vec4 v00000000010f9fe0_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_3.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_3.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_3.6, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_3.7, 6; - %jmp T_3.8; -T_3.4 ; - %load/vec4 v00000000010f97c0_0; - %assign/vec4 v00000000010f8e60_0, 0; - %load/vec4 v00000000010f8e60_0; - %addi 4, 0, 32; - %assign/vec4 v00000000010f97c0_0, 0; - %vpi_call/w 7 27 "$display", "New PC from %h to %h", v00000000010f8e60_0, v00000000010f97c0_0 {0 0 0}; - %jmp T_3.8; -T_3.5 ; - %load/vec4 v00000000010f9720_0; - %assign/vec4 v00000000010f97c0_0, 0; - %jmp T_3.8; -T_3.6 ; - %load/vec4 v00000000010f9720_0; - %assign/vec4 v00000000010f97c0_0, 0; - %jmp T_3.8; -T_3.7 ; - %vpi_call/w 7 36 "$display", "JUMP REGISTER" {0 0 0}; - %pushi/vec4 0, 0, 32; - %assign/vec4 v00000000010f97c0_0, 0; - %jmp T_3.8; -T_3.8 ; - %pop/vec4 1; - %jmp T_3.3; -T_3.2 ; - %load/vec4 v00000000010f97c0_0; - %cmpi/e 0, 0, 32; - %jmp/0xz T_3.9, 4; - %pushi/vec4 0, 0, 1; - %assign/vec4 v00000000010f9ae0_0, 0; -T_3.9 ; -T_3.3 ; -T_3.1 ; - %jmp T_3; - .thread T_3; - .scope S_0000000000906150; -T_4 ; - %wait E_0000000000947fc0; - %vpi_call/w 6 86 "$display", "Opcode: %h", v00000000010f9900_0 {0 0 0}; - %load/vec4 v00000000010f9900_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.0, 4; - %pushi/vec4 0, 0, 2; - %store/vec4 v00000000010f9680_0, 0, 2; - %vpi_call/w 6 89 "$display", "CTRLREGDST: Rt" {0 0 0}; - %jmp T_4.1; -T_4.0 ; - %load/vec4 v00000000010f9900_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.2, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v00000000010f9680_0, 0, 2; - %vpi_call/w 6 92 "$display", "CTRLREGDST: Rd" {0 0 0}; - %jmp T_4.3; -T_4.2 ; - %load/vec4 v00000000010f9900_0; - %cmpi/e 3, 0, 6; - %jmp/0xz T_4.4, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v00000000010f9680_0, 0, 2; - %vpi_call/w 6 95 "$display", "CTRLREGDST: Link" {0 0 0}; - %jmp T_4.5; -T_4.4 ; - %pushi/vec4 1, 1, 2; - %store/vec4 v00000000010f9680_0, 0, 2; - %vpi_call/w 6 96 "$display", "xxxxxxxxxxxxxx" {0 0 0}; -T_4.5 ; -T_4.3 ; -T_4.1 ; - %load/vec4 v00000000010f95e0_0; - %load/vec4 v00000000010f9900_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f9900_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f9900_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f9900_0; - %pushi/vec4 5, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f9900_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f90e0_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f90e0_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f90e0_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f90e0_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.6, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v00000000010fa800_0, 0, 2; - %jmp T_4.7; -T_4.6 ; - %load/vec4 v00000000010f9900_0; - %cmpi/e 2, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 3, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.8, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v00000000010fa800_0, 0, 2; - %jmp T_4.9; -T_4.8 ; - %load/vec4 v00000000010f8960_0; - %cmpi/e 8, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010f8960_0; - %cmpi/e 9, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.10, 4; - %pushi/vec4 3, 0, 2; - %store/vec4 v00000000010fa800_0, 0, 2; - %jmp T_4.11; -T_4.10 ; - %pushi/vec4 0, 0, 2; - %store/vec4 v00000000010fa800_0, 0, 2; -T_4.11 ; -T_4.9 ; -T_4.7 ; - %load/vec4 v00000000010f9900_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.12, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000010f9f40_0, 0, 1; - %pushi/vec4 1, 0, 2; - %store/vec4 v00000000010fa300_0, 0, 2; - %vpi_call/w 6 112 "$display", "Memory read enabled" {0 0 0}; - %jmp T_4.13; -T_4.12 ; - %load/vec4 v00000000010f9900_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.14, 9; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000010f9f40_0, 0, 1; - %pushi/vec4 0, 0, 2; - %store/vec4 v00000000010fa300_0, 0, 2; - %vpi_call/w 6 116 "$display", "Memory read disabled" {0 0 0}; - %jmp T_4.15; -T_4.14 ; - %load/vec4 v00000000010f9900_0; - %cmpi/e 3, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.16, 9; - %pushi/vec4 2, 0, 2; - %store/vec4 v00000000010fa300_0, 0, 2; - %jmp T_4.17; -T_4.16 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v00000000010f9f40_0, 0, 1; -T_4.17 ; -T_4.15 ; -T_4.13 ; - %load/vec4 v00000000010f9900_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.18, 9; - %pushi/vec4 0, 0, 5; - %store/vec4 v00000000010fa1c0_0, 0, 5; - %vpi_call/w 6 124 "$display", "ALU OP = 0 (ADDU/ADDIU)" {0 0 0}; - %jmp T_4.19; -T_4.18 ; - %load/vec4 v00000000010f9900_0; - %cmpi/e 12, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.20, 9; - %pushi/vec4 4, 0, 5; - %store/vec4 v00000000010fa1c0_0, 0, 5; - %jmp T_4.21; -T_4.20 ; - %load/vec4 v00000000010f9900_0; - %cmpi/e 4, 0, 6; - %jmp/0xz T_4.22, 4; - %pushi/vec4 13, 0, 5; - %store/vec4 v00000000010fa1c0_0, 0, 5; - %jmp T_4.23; -T_4.22 ; - %load/vec4 v00000000010f9900_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f90e0_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f90e0_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.24, 8; - %pushi/vec4 17, 0, 5; - %store/vec4 v00000000010fa1c0_0, 0, 5; - %jmp T_4.25; -T_4.24 ; - %load/vec4 v00000000010f9900_0; - %cmpi/e 7, 0, 6; - %jmp/0xz T_4.26, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v00000000010fa1c0_0, 0, 5; - %jmp T_4.27; -T_4.26 ; - %load/vec4 v00000000010f9900_0; - %cmpi/e 6, 0, 6; - %jmp/0xz T_4.28, 4; - %pushi/vec4 15, 0, 5; - %store/vec4 v00000000010fa1c0_0, 0, 5; - %jmp T_4.29; -T_4.28 ; - %load/vec4 v00000000010f9900_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f90e0_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f90e0_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.30, 8; - %pushi/vec4 14, 0, 5; - %store/vec4 v00000000010fa1c0_0, 0, 5; - %jmp T_4.31; -T_4.30 ; - %load/vec4 v00000000010f9900_0; - %cmpi/e 5, 0, 6; - %jmp/0xz T_4.32, 4; - %pushi/vec4 18, 0, 5; - %store/vec4 v00000000010fa1c0_0, 0, 5; - %jmp T_4.33; -T_4.32 ; - %load/vec4 v00000000010f9900_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.34, 8; - %pushi/vec4 3, 0, 5; - %store/vec4 v00000000010fa1c0_0, 0, 5; - %jmp T_4.35; -T_4.34 ; - %load/vec4 v00000000010f9900_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.36, 8; - %pushi/vec4 23, 0, 5; - %store/vec4 v00000000010fa1c0_0, 0, 5; - %jmp T_4.37; -T_4.36 ; - %load/vec4 v00000000010f9900_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.38, 4; - %pushi/vec4 0, 0, 5; - %store/vec4 v00000000010fa1c0_0, 0, 5; - %jmp T_4.39; -T_4.38 ; - %load/vec4 v00000000010f9900_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.40, 4; - %pushi/vec4 7, 0, 5; - %store/vec4 v00000000010fa1c0_0, 0, 5; - %jmp T_4.41; -T_4.40 ; - %load/vec4 v00000000010f9900_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.42, 8; - %pushi/vec4 19, 0, 5; - %store/vec4 v00000000010fa1c0_0, 0, 5; - %jmp T_4.43; -T_4.42 ; - %load/vec4 v00000000010f9900_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.44, 8; - %pushi/vec4 2, 0, 5; - %store/vec4 v00000000010fa1c0_0, 0, 5; - %jmp T_4.45; -T_4.44 ; - %load/vec4 v00000000010f9900_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.46, 8; - %pushi/vec4 22, 0, 5; - %store/vec4 v00000000010fa1c0_0, 0, 5; - %jmp T_4.47; -T_4.46 ; - %load/vec4 v00000000010f9900_0; - %cmpi/e 13, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.48, 9; - %pushi/vec4 5, 0, 5; - %store/vec4 v00000000010fa1c0_0, 0, 5; - %jmp T_4.49; -T_4.48 ; - %load/vec4 v00000000010f9900_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.50, 8; - %pushi/vec4 7, 0, 5; - %store/vec4 v00000000010fa1c0_0, 0, 5; - %jmp T_4.51; -T_4.50 ; - %load/vec4 v00000000010f9900_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.52, 8; - %pushi/vec4 8, 0, 5; - %store/vec4 v00000000010fa1c0_0, 0, 5; - %jmp T_4.53; -T_4.52 ; - %load/vec4 v00000000010f9900_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.54, 8; - %pushi/vec4 11, 0, 5; - %store/vec4 v00000000010fa1c0_0, 0, 5; - %jmp T_4.55; -T_4.54 ; - %load/vec4 v00000000010f9900_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.56, 8; - %pushi/vec4 12, 0, 5; - %store/vec4 v00000000010fa1c0_0, 0, 5; - %jmp T_4.57; -T_4.56 ; - %load/vec4 v00000000010f9900_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.58, 8; - %pushi/vec4 9, 0, 5; - %store/vec4 v00000000010fa1c0_0, 0, 5; - %jmp T_4.59; -T_4.58 ; - %load/vec4 v00000000010f9900_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.60, 8; - %pushi/vec4 10, 0, 5; - %store/vec4 v00000000010fa1c0_0, 0, 5; - %jmp T_4.61; -T_4.60 ; - %load/vec4 v00000000010f9900_0; - %cmpi/e 10, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.62, 9; - %pushi/vec4 20, 0, 5; - %store/vec4 v00000000010fa1c0_0, 0, 5; - %jmp T_4.63; -T_4.62 ; - %load/vec4 v00000000010f9900_0; - %cmpi/e 11, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.64, 9; - %pushi/vec4 21, 0, 5; - %store/vec4 v00000000010fa1c0_0, 0, 5; - %jmp T_4.65; -T_4.64 ; - %load/vec4 v00000000010f9900_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.66, 8; - %pushi/vec4 1, 0, 5; - %store/vec4 v00000000010fa1c0_0, 0, 5; - %jmp T_4.67; -T_4.66 ; - %load/vec4 v00000000010f9900_0; - %cmpi/e 14, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.68, 9; - %pushi/vec4 6, 0, 5; - %store/vec4 v00000000010fa1c0_0, 0, 5; - %vpi_call/w 6 175 "$display", "ALU Op = 6 (XOR)" {0 0 0}; - %jmp T_4.69; -T_4.68 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v00000000010fa1c0_0, 0, 5; -T_4.69 ; -T_4.67 ; -T_4.65 ; -T_4.63 ; -T_4.61 ; -T_4.59 ; -T_4.57 ; -T_4.55 ; -T_4.53 ; -T_4.51 ; -T_4.49 ; -T_4.47 ; -T_4.45 ; -T_4.43 ; -T_4.41 ; -T_4.39 ; -T_4.37 ; -T_4.35 ; -T_4.33 ; -T_4.31 ; -T_4.29 ; -T_4.27 ; -T_4.25 ; -T_4.23 ; -T_4.21 ; -T_4.19 ; - %load/vec4 v00000000010f9900_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.70, 8; - %load/vec4 v00000000010f8fa0_0; - %parti/s 5, 6, 4; - %store/vec4 v00000000010f8f00_0, 0, 5; - %jmp T_4.71; -T_4.70 ; - %load/vec4 v00000000010f9900_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.72, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v00000000010f8f00_0, 0, 5; - %jmp T_4.73; -T_4.72 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v00000000010f8f00_0, 0, 5; -T_4.73 ; -T_4.71 ; - %load/vec4 v00000000010f9900_0; - %cmpi/e 40, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.74, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000010f9c20_0, 0, 1; - %jmp T_4.75; -T_4.74 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000010f9c20_0, 0, 1; -T_4.75 ; - %load/vec4 v00000000010f9900_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.76, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000010f9d60_0, 0, 1; - %jmp T_4.77; -T_4.76 ; - %load/vec4 v00000000010f9900_0; - %cmpi/e 4, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 7, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 6, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 5, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %load/vec4 v00000000010f9900_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f90e0_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f90e0_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f90e0_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f90e0_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %flag_or 8, 9; - %jmp/0xz T_4.78, 8; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000010f9d60_0, 0, 1; - %jmp T_4.79; -T_4.78 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v00000000010f9d60_0, 0, 1; -T_4.79 ; -T_4.77 ; - %load/vec4 v00000000010f9900_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v00000000010f9900_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v00000000010f8960_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.80, 9; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000010f99a0_0, 0, 1; - %jmp T_4.81; -T_4.80 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000010f99a0_0, 0, 1; -T_4.81 ; - %jmp T_4; - .thread T_4, $push; - .scope S_00000000008f9360; -T_5 ; - %fork t_5, S_00000000008f94f0; - %jmp t_4; - .scope S_00000000008f94f0; -t_5 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v00000000010fa440_0, 0, 32; -T_5.0 ; - %load/vec4 v00000000010fa440_0; - %cmpi/s 32, 0, 32; - %jmp/0xz T_5.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v00000000010fa440_0; - %store/vec4a v00000000010fa4e0, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v00000000010fa440_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v00000000010fa440_0, 0, 32; - %jmp T_5.0; -T_5.1 ; - %end; - .scope S_00000000008f9360; -t_4 %join; - %end; - .thread T_5; - .scope S_00000000008f9360; -T_6 ; -Ewait_0 .event/or E_0000000000940680, E_0x0; - %wait Ewait_0; - %load/vec4 v00000000010f9ea0_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v00000000010fa4e0, 4; - %store/vec4 v00000000010f9220_0, 0, 32; - %load/vec4 v00000000010f92c0_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v00000000010fa4e0, 4; - %store/vec4 v00000000010f9b80_0, 0, 32; - %jmp T_6; - .thread T_6, $push; - .scope S_00000000008f9360; -T_7 ; - %wait E_0000000000940640; - %load/vec4 v00000000010f8aa0_0; - %cmpi/e 0, 0, 5; - %jmp/0xz T_7.0, 4; - %jmp T_7.1; -T_7.0 ; - %load/vec4 v00000000010fa620_0; - %flag_set/vec4 8; - %jmp/0xz T_7.2, 8; - %load/vec4 v00000000010fa580_0; - %dup/vec4; - %pushi/vec4 32, 0, 6; - %cmp/u; - %jmp/1 T_7.4, 6; - %dup/vec4; - %pushi/vec4 36, 0, 6; - %cmp/u; - %jmp/1 T_7.5, 6; - %dup/vec4; - %pushi/vec4 33, 0, 6; - %cmp/u; - %jmp/1 T_7.6, 6; - %dup/vec4; - %pushi/vec4 37, 0, 6; - %cmp/u; - %jmp/1 T_7.7, 6; - %dup/vec4; - %pushi/vec4 34, 0, 6; - %cmp/u; - %jmp/1 T_7.8, 6; - %dup/vec4; - %pushi/vec4 38, 0, 6; - %cmp/u; - %jmp/1 T_7.9, 6; - %load/vec4 v00000000010f8a00_0; - %load/vec4 v00000000010f8aa0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010fa4e0, 0, 4; - %jmp T_7.11; -T_7.4 ; - %load/vec4 v00000000010f9220_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.12, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.13, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.14, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.15, 6; - %jmp T_7.16; -T_7.12 ; - %load/vec4 v00000000010f8a00_0; - %parti/s 1, 7, 4; - %replicate 24; - %load/vec4 v00000000010f8a00_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000010f8aa0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010fa4e0, 0, 4; - %jmp T_7.16; -T_7.13 ; - %load/vec4 v00000000010f8a00_0; - %parti/s 1, 15, 5; - %replicate 24; - %load/vec4 v00000000010f8a00_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000010f8aa0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010fa4e0, 0, 4; - %jmp T_7.16; -T_7.14 ; - %load/vec4 v00000000010f8a00_0; - %parti/s 1, 23, 6; - %replicate 24; - %load/vec4 v00000000010f8a00_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000010f8aa0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010fa4e0, 0, 4; - %jmp T_7.16; -T_7.15 ; - %load/vec4 v00000000010f8a00_0; - %parti/s 1, 31, 6; - %replicate 24; - %load/vec4 v00000000010f8a00_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000010f8aa0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010fa4e0, 0, 4; - %jmp T_7.16; -T_7.16 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.5 ; - %load/vec4 v00000000010f9220_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.17, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.18, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.19, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.20, 6; - %jmp T_7.21; -T_7.17 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000010f8a00_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000010f8aa0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010fa4e0, 0, 4; - %jmp T_7.21; -T_7.18 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000010f8a00_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000010f8aa0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010fa4e0, 0, 4; - %jmp T_7.21; -T_7.19 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000010f8a00_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000010f8aa0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010fa4e0, 0, 4; - %jmp T_7.21; -T_7.20 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v00000000010f8a00_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000010f8aa0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010fa4e0, 0, 4; - %jmp T_7.21; -T_7.21 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.6 ; - %load/vec4 v00000000010f9220_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.22, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.23, 6; - %jmp T_7.24; -T_7.22 ; - %load/vec4 v00000000010f8a00_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v00000000010f8a00_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000010f8aa0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010fa4e0, 0, 4; - %jmp T_7.24; -T_7.23 ; - %load/vec4 v00000000010f8a00_0; - %parti/s 1, 31, 6; - %replicate 16; - %load/vec4 v00000000010f8a00_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000010f8aa0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010fa4e0, 0, 4; - %jmp T_7.24; -T_7.24 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.7 ; - %load/vec4 v00000000010f9220_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.25, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.26, 6; - %jmp T_7.27; -T_7.25 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v00000000010f8a00_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000010f8aa0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010fa4e0, 0, 4; - %jmp T_7.27; -T_7.26 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v00000000010f8a00_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000010f8aa0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010fa4e0, 0, 4; - %jmp T_7.27; -T_7.27 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.8 ; - %load/vec4 v00000000010f9220_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.28, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.29, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.30, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.31, 6; - %jmp T_7.32; -T_7.28 ; - %load/vec4 v00000000010f8a00_0; - %parti/s 8, 0, 2; - %load/vec4 v00000000010f8aa0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 24, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v00000000010fa4e0, 4, 5; - %jmp T_7.32; -T_7.29 ; - %load/vec4 v00000000010f8a00_0; - %parti/s 16, 0, 2; - %load/vec4 v00000000010f8aa0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 16, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v00000000010fa4e0, 4, 5; - %jmp T_7.32; -T_7.30 ; - %load/vec4 v00000000010f8a00_0; - %parti/s 24, 0, 2; - %load/vec4 v00000000010f8aa0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 8, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v00000000010fa4e0, 4, 5; - %jmp T_7.32; -T_7.31 ; - %load/vec4 v00000000010f8a00_0; - %load/vec4 v00000000010f8aa0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010fa4e0, 0, 4; - %jmp T_7.32; -T_7.32 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.9 ; - %load/vec4 v00000000010f9220_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.33, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.34, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.35, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.36, 6; - %jmp T_7.37; -T_7.33 ; - %load/vec4 v00000000010f8a00_0; - %load/vec4 v00000000010f8aa0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010fa4e0, 0, 4; - %jmp T_7.37; -T_7.34 ; - %load/vec4 v00000000010f8a00_0; - %parti/s 24, 8, 5; - %load/vec4 v00000000010f8aa0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010fa4e0, 0, 4; - %jmp T_7.37; -T_7.35 ; - %load/vec4 v00000000010f8a00_0; - %parti/s 16, 16, 6; - %load/vec4 v00000000010f8aa0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010fa4e0, 0, 4; - %jmp T_7.37; -T_7.36 ; - %load/vec4 v00000000010f8a00_0; - %parti/s 8, 24, 6; - %load/vec4 v00000000010f8aa0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000010fa4e0, 0, 4; - %jmp T_7.37; -T_7.37 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.11 ; - %pop/vec4 1; -T_7.2 ; -T_7.1 ; - %jmp T_7; - .thread T_7; - .scope S_0000000000905fc0; -T_8 ; -Ewait_1 .event/or E_00000000009412c0, E_0x0; - %wait Ewait_1; - %load/vec4 v00000000010f9860_0; - %dup/vec4; - %pushi/vec4 0, 0, 5; - %cmp/u; - %jmp/1 T_8.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 5; - %cmp/u; - %jmp/1 T_8.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 5; - %cmp/u; - %jmp/1 T_8.2, 6; - %dup/vec4; - %pushi/vec4 3, 0, 5; - %cmp/u; - %jmp/1 T_8.3, 6; - %dup/vec4; - %pushi/vec4 4, 0, 5; - %cmp/u; - %jmp/1 T_8.4, 6; - %dup/vec4; - %pushi/vec4 5, 0, 5; - %cmp/u; - %jmp/1 T_8.5, 6; - %dup/vec4; - %pushi/vec4 6, 0, 5; - %cmp/u; - %jmp/1 T_8.6, 6; - %dup/vec4; - %pushi/vec4 7, 0, 5; - %cmp/u; - %jmp/1 T_8.7, 6; - %dup/vec4; - %pushi/vec4 8, 0, 5; - %cmp/u; - %jmp/1 T_8.8, 6; - %dup/vec4; - %pushi/vec4 9, 0, 5; - %cmp/u; - %jmp/1 T_8.9, 6; - %dup/vec4; - %pushi/vec4 10, 0, 5; - %cmp/u; - %jmp/1 T_8.10, 6; - %dup/vec4; - %pushi/vec4 11, 0, 5; - %cmp/u; - %jmp/1 T_8.11, 6; - %dup/vec4; - %pushi/vec4 12, 0, 5; - %cmp/u; - %jmp/1 T_8.12, 6; - %dup/vec4; - %pushi/vec4 13, 0, 5; - %cmp/u; - %jmp/1 T_8.13, 6; - %dup/vec4; - %pushi/vec4 14, 0, 5; - %cmp/u; - %jmp/1 T_8.14, 6; - %dup/vec4; - %pushi/vec4 15, 0, 5; - %cmp/u; - %jmp/1 T_8.15, 6; - %dup/vec4; - %pushi/vec4 16, 0, 5; - %cmp/u; - %jmp/1 T_8.16, 6; - %dup/vec4; - %pushi/vec4 17, 0, 5; - %cmp/u; - %jmp/1 T_8.17, 6; - %dup/vec4; - %pushi/vec4 18, 0, 5; - %cmp/u; - %jmp/1 T_8.18, 6; - %dup/vec4; - %pushi/vec4 19, 0, 5; - %cmp/u; - %jmp/1 T_8.19, 6; - %dup/vec4; - %pushi/vec4 20, 0, 5; - %cmp/u; - %jmp/1 T_8.20, 6; - %dup/vec4; - %pushi/vec4 21, 0, 5; - %cmp/u; - %jmp/1 T_8.21, 6; - %dup/vec4; - %pushi/vec4 22, 0, 5; - %cmp/u; - %jmp/1 T_8.22, 6; - %dup/vec4; - %pushi/vec4 23, 0, 5; - %cmp/u; - %jmp/1 T_8.23, 6; - %jmp T_8.24; -T_8.0 ; - %load/vec4 v00000000010fa760_0; - %load/vec4 v00000000010fa260_0; - %add; - %store/vec4 v00000000010fa6c0_0, 0, 32; - %jmp T_8.24; -T_8.1 ; - %load/vec4 v00000000010fa760_0; - %load/vec4 v00000000010fa260_0; - %sub; - %store/vec4 v00000000010fa6c0_0, 0, 32; - %jmp T_8.24; -T_8.2 ; - %load/vec4 v00000000010fa760_0; - %load/vec4 v00000000010fa260_0; - %mul; - %store/vec4 v00000000010fa6c0_0, 0, 32; - %jmp T_8.24; -T_8.3 ; - %load/vec4 v00000000010fa760_0; - %load/vec4 v00000000010fa260_0; - %div/s; - %store/vec4 v00000000010fa6c0_0, 0, 32; - %jmp T_8.24; -T_8.4 ; - %load/vec4 v00000000010fa760_0; - %load/vec4 v00000000010fa260_0; - %and; - %store/vec4 v00000000010fa6c0_0, 0, 32; - %jmp T_8.24; -T_8.5 ; - %load/vec4 v00000000010fa760_0; - %load/vec4 v00000000010fa260_0; - %or; - %store/vec4 v00000000010fa6c0_0, 0, 32; - %jmp T_8.24; -T_8.6 ; - %load/vec4 v00000000010fa760_0; - %load/vec4 v00000000010fa260_0; - %xor; - %store/vec4 v00000000010fa6c0_0, 0, 32; - %jmp T_8.24; -T_8.7 ; - %load/vec4 v00000000010fa260_0; - %ix/getv 4, v00000000010f9540_0; - %shiftl 4; - %store/vec4 v00000000010fa6c0_0, 0, 32; - %jmp T_8.24; -T_8.8 ; - %load/vec4 v00000000010fa260_0; - %ix/getv 4, v00000000010fa760_0; - %shiftl 4; - %store/vec4 v00000000010fa6c0_0, 0, 32; - %jmp T_8.24; -T_8.9 ; - %load/vec4 v00000000010fa260_0; - %ix/getv 4, v00000000010f9540_0; - %shiftr 4; - %store/vec4 v00000000010fa6c0_0, 0, 32; - %jmp T_8.24; -T_8.10 ; - %load/vec4 v00000000010fa260_0; - %ix/getv 4, v00000000010fa760_0; - %shiftr 4; - %store/vec4 v00000000010fa6c0_0, 0, 32; - %jmp T_8.24; -T_8.11 ; - %load/vec4 v00000000010fa260_0; - %ix/getv 4, v00000000010f9540_0; - %shiftr 4; - %store/vec4 v00000000010fa6c0_0, 0, 32; - %jmp T_8.24; -T_8.12 ; - %load/vec4 v00000000010fa260_0; - %ix/getv 4, v00000000010fa760_0; - %shiftr 4; - %store/vec4 v00000000010fa6c0_0, 0, 32; - %jmp T_8.24; -T_8.13 ; - %load/vec4 v00000000010fa760_0; - %load/vec4 v00000000010fa260_0; - %cmp/e; - %jmp/0xz T_8.25, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000010fa3a0_0, 0, 1; - %jmp T_8.26; -T_8.25 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000010fa3a0_0, 0, 1; -T_8.26 ; - %jmp T_8.24; -T_8.14 ; - %load/vec4 v00000000010fa760_0; - %load/vec4 v00000000010fa260_0; - %cmp/s; - %jmp/0xz T_8.27, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000010fa3a0_0, 0, 1; - %jmp T_8.28; -T_8.27 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000010fa3a0_0, 0, 1; -T_8.28 ; - %jmp T_8.24; -T_8.15 ; - %load/vec4 v00000000010fa760_0; - %load/vec4 v00000000010fa260_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.29, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000010fa3a0_0, 0, 1; - %jmp T_8.30; -T_8.29 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000010fa3a0_0, 0, 1; -T_8.30 ; - %jmp T_8.24; -T_8.16 ; - %load/vec4 v00000000010fa260_0; - %load/vec4 v00000000010fa760_0; - %cmp/s; - %jmp/0xz T_8.31, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000010fa3a0_0, 0, 1; - %jmp T_8.32; -T_8.31 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000010fa3a0_0, 0, 1; -T_8.32 ; - %jmp T_8.24; -T_8.17 ; - %load/vec4 v00000000010fa260_0; - %load/vec4 v00000000010fa760_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.33, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000010fa3a0_0, 0, 1; - %jmp T_8.34; -T_8.33 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000010fa3a0_0, 0, 1; -T_8.34 ; - %jmp T_8.24; -T_8.18 ; - %load/vec4 v00000000010fa760_0; - %load/vec4 v00000000010fa260_0; - %cmp/ne; - %jmp/0xz T_8.35, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000010fa3a0_0, 0, 1; - %jmp T_8.36; -T_8.35 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000010fa3a0_0, 0, 1; -T_8.36 ; - %jmp T_8.24; -T_8.19 ; - %load/vec4 v00000000010fa760_0; - %store/vec4 v00000000010fa6c0_0, 0, 32; - %jmp T_8.24; -T_8.20 ; - %load/vec4 v00000000010fa760_0; - %load/vec4 v00000000010fa260_0; - %cmp/s; - %jmp/0xz T_8.37, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v00000000010fa6c0_0, 0, 32; -T_8.37 ; - %jmp T_8.24; -T_8.21 ; - %load/vec4 v00000000010fa760_0; - %load/vec4 v00000000010fa260_0; - %cmp/u; - %jmp/0xz T_8.39, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v00000000010fa6c0_0, 0, 32; -T_8.39 ; - %jmp T_8.24; -T_8.22 ; - %load/vec4 v00000000010fa760_0; - %load/vec4 v00000000010fa260_0; - %mul; - %store/vec4 v00000000010fa6c0_0, 0, 32; - %jmp T_8.24; -T_8.23 ; - %load/vec4 v00000000010fa760_0; - %load/vec4 v00000000010fa260_0; - %div; - %store/vec4 v00000000010fa6c0_0, 0, 32; - %jmp T_8.24; -T_8.24 ; - %pop/vec4 1; - %jmp T_8; - .thread T_8, $push; - .scope S_0000000000905e30; -T_9 ; - %pushi/vec4 3217031168, 0, 32; - %store/vec4 v0000000001153910_0, 0, 32; - %end; - .thread T_9, $init; - .scope S_0000000000905e30; -T_10 ; -Ewait_2 .event/or E_0000000000946b40, E_0x0; - %wait Ewait_2; - %load/vec4 v0000000001152e70_0; - %store/vec4 v0000000001154630_0, 0, 32; - %load/vec4 v0000000001154130_0; - %store/vec4 v00000000010f8c80_0, 0, 32; - %load/vec4 v0000000001153230_0; - %store/vec4 v00000000010f9400_0, 0, 1; - %load/vec4 v0000000001154270_0; - %store/vec4 v00000000010f8d20_0, 0, 1; - %load/vec4 v0000000001153e10_0; - %store/vec4 v00000000010f94a0_0, 0, 32; - %jmp T_10; - .thread T_10, $push; - .scope S_0000000000905e30; -T_11 ; -Ewait_3 .event/or E_0000000000946680, E_0x0; - %wait Ewait_3; - %load/vec4 v0000000001154590_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.2, 6; - %jmp T_11.3; -T_11.0 ; - %load/vec4 v00000000011546d0_0; - %parti/s 5, 16, 6; - %store/vec4 v0000000001153730_0, 0, 5; - %jmp T_11.3; -T_11.1 ; - %load/vec4 v00000000011546d0_0; - %parti/s 5, 11, 5; - %store/vec4 v0000000001153730_0, 0, 5; - %jmp T_11.3; -T_11.2 ; - %pushi/vec4 31, 0, 5; - %store/vec4 v0000000001153730_0, 0, 5; - %jmp T_11.3; -T_11.3 ; - %pop/vec4 1; - %load/vec4 v00000000011543b0_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.6, 6; - %jmp T_11.7; -T_11.4 ; - %load/vec4 v0000000001154130_0; - %store/vec4 v0000000001153410_0, 0, 32; - %jmp T_11.7; -T_11.5 ; - %load/vec4 v00000000010f8dc0_0; - %store/vec4 v0000000001153410_0, 0, 32; - %jmp T_11.7; -T_11.6 ; - %load/vec4 v0000000001153910_0; - %addi 8, 0, 32; - %store/vec4 v0000000001153410_0, 0, 32; - %jmp T_11.7; -T_11.7 ; - %pop/vec4 1; - %load/vec4 v00000000011530f0_0; - %dup/vec4; - %pushi/vec4 1, 0, 1; - %cmp/u; - %jmp/1 T_11.8, 6; - %dup/vec4; - %pushi/vec4 0, 0, 1; - %cmp/u; - %jmp/1 T_11.9, 6; - %jmp T_11.10; -T_11.8 ; - %load/vec4 v00000000011546d0_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v00000000011546d0_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %store/vec4 v000000000092e1a0_0, 0, 32; - %jmp T_11.10; -T_11.9 ; - %load/vec4 v0000000001153e10_0; - %store/vec4 v000000000092e1a0_0, 0, 32; - %jmp T_11.10; -T_11.10 ; - %pop/vec4 1; - %jmp T_11; - .thread T_11, $push; - .scope S_000000000094aab0; -T_12 ; - %vpi_call/w 3 36 "$dumpfile", "mips_cpu_harvard.vcd" {0 0 0}; - %vpi_call/w 3 37 "$dumpvars", 32'sb00000000000000000000000000000000, S_000000000094aab0 {0 0 0}; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001155e20_0, 0, 1; - %pushi/vec4 100, 0, 32; -T_12.0 %dup/vec4; - %pushi/vec4 0, 0, 32; - %cmp/s; - %jmp/1xz T_12.1, 5; - %jmp/1 T_12.1, 4; - %pushi/vec4 1, 0, 32; - %sub; - %delay 10, 0; - %load/vec4 v0000000001155e20_0; - %nor/r; - %store/vec4 v0000000001155e20_0, 0, 1; - %delay 10, 0; - %load/vec4 v0000000001155e20_0; - %nor/r; - %store/vec4 v0000000001155e20_0, 0, 1; - %jmp T_12.0; -T_12.1 ; - %pop/vec4 1; - %vpi_call/w 3 47 "$fatal", 32'sb00000000000000000000000000000010, "Simulation did not finish within %d cycles.", P_0000000000894218 {0 0 0}; - %end; - .thread T_12; - .scope S_000000000094aab0; -T_13 ; - %vpi_call/w 3 51 "$display", "Initial Reset 0" {0 0 0}; - %pushi/vec4 0, 0, 1; - %assign/vec4 v0000000001156460_0, 0; - %vpi_call/w 3 55 "$display", "Initial Reset 1" {0 0 0}; - %wait E_0000000000941340; - %pushi/vec4 1, 0, 1; - %assign/vec4 v0000000001156460_0, 0; - %vpi_call/w 3 59 "$display", "Initial Reset 0: Start Program" {0 0 0}; - %wait E_0000000000941340; - %pushi/vec4 0, 0, 1; - %assign/vec4 v0000000001156460_0, 0; - %wait E_0000000000941340; - %load/vec4 v0000000001155240_0; - %pad/u 32; - %cmpi/e 1, 0, 32; - %jmp/0xz T_13.0, 4; - %jmp T_13.1; -T_13.0 ; - %vpi_call/w 3 65 "$display", "TB: CPU did not set active=1 after reset." {0 0 0}; -T_13.1 ; -T_13.2 ; - %load/vec4 v0000000001155240_0; - %flag_set/vec4 8; - %jmp/0xz T_13.3, 8; - %wait E_0000000000941340; - %vpi_call/w 3 71 "$display", "Reg File Write data: %d", v0000000001153410_0 {0 0 0}; - %jmp T_13.2; -T_13.3 ; - %wait E_0000000000941340; - %vpi_call/w 3 74 "$display", "TB: CPU Halt; active=0" {0 0 0}; - %vpi_call/w 3 75 "$display", "Output:" {0 0 0}; - %vpi_call/w 3 76 "$display", "%d", v0000000001155880_0 {0 0 0}; - %vpi_call/w 3 77 "$finish" {0 0 0}; - %end; - .thread T_13; -# The file index is used to find the file name in the following table. -:file_names 10; - "N/A"; - ""; - "-"; - "testbench/mips_cpu_harvard_tb.v"; - "rtl/mips_cpu_harvard.v"; - "rtl/mips_cpu_alu.v"; - "rtl/mips_cpu_control.v"; - "rtl/mips_cpu_pc.v"; - "rtl/mips_cpu_regfile.v"; - "rtl/mips_cpu_memory.v"; diff --git a/exec/mips_cpu_harvard_tb_xxor b/exec/mips_cpu_harvard_tb_xxor deleted file mode 100644 index a1837dd..0000000 --- a/exec/mips_cpu_harvard_tb_xxor +++ /dev/null @@ -1,2731 +0,0 @@ -#! /usr/local/iverilog/bin/vvp -:ivl_version "11.0 (devel)"; -:ivl_delay_selection "TYPICAL"; -:vpi_time_precision + 0; -:vpi_module "C:\iverilog\lib\ivl\system.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_sys.vpi"; -:vpi_module "C:\iverilog\lib\ivl\vhdl_textio.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2005_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\va_math.vpi"; -:vpi_module "C:\iverilog\lib\ivl\v2009.vpi"; -S_0000000000905a40 .scope package, "$unit" "$unit" 2 1; - .timescale 0 0; -S_0000000000905bd0 .scope module, "mips_cpu_harvard_tb" "mips_cpu_harvard_tb" 3 1; - .timescale 0 0; -P_0000000000934150 .param/str "RAM_INIT_FILE" 0 3 3, "inputs/xxor.txt"; -P_0000000000934188 .param/l "TIMEOUT_CYCLES" 0 3 4, +C4<00000000000000000000000001100100>; -v000000000133ce20_0 .net "active", 0 0, v0000000001337940_0; 1 drivers -v000000000133b340_0 .var "clk", 0 0; -v000000000133b700_0 .var "clk_enable", 0 0; -v000000000133c1a0_0 .net "data_address", 31 0, v0000000001337580_0; 1 drivers -v000000000133b3e0_0 .net "data_read", 0 0, v0000000001337620_0; 1 drivers -v000000000133bfc0_0 .net "data_readdata", 31 0, L_000000000133bb60; 1 drivers -v000000000133b7a0_0 .net "data_write", 0 0, v00000000013376c0_0; 1 drivers -v000000000133b480_0 .net "data_writedata", 31 0, v0000000001338ac0_0; 1 drivers -v000000000133bac0_0 .net "instr_address", 31 0, v000000000133a3f0_0; 1 drivers -v000000000133bd40_0 .net "instr_readdata", 31 0, L_000000000133b5c0; 1 drivers -v000000000133c240_0 .net "register_v0", 31 0, L_000000000094dfa0; 1 drivers -v000000000133ba20_0 .var "reset", 0 0; -S_0000000000908e90 .scope module, "cpuInst" "mips_cpu_harvard" 3 19, 4 1 0, S_0000000000905bd0; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "reset"; - .port_info 2 /OUTPUT 1 "active"; - .port_info 3 /OUTPUT 32 "register_v0"; - .port_info 4 /INPUT 1 "clk_enable"; - .port_info 5 /OUTPUT 32 "instr_address"; - .port_info 6 /INPUT 32 "instr_readdata"; - .port_info 7 /OUTPUT 32 "data_address"; - .port_info 8 /OUTPUT 1 "data_write"; - .port_info 9 /OUTPUT 1 "data_read"; - .port_info 10 /OUTPUT 32 "data_writedata"; - .port_info 11 /INPUT 32 "data_readdata"; -v0000000001338b60_0 .net "active", 0 0, v0000000001337940_0; alias, 1 drivers -v00000000013373a0_0 .net "clk", 0 0, v000000000133b340_0; 1 drivers -v0000000001338980_0 .net "clk_enable", 0 0, v000000000133b700_0; 1 drivers -v0000000001337580_0 .var "data_address", 31 0; -v0000000001337620_0 .var "data_read", 0 0; -v0000000001338200_0 .net "data_readdata", 31 0, L_000000000133bb60; alias, 1 drivers -v00000000013376c0_0 .var "data_write", 0 0; -v0000000001338ac0_0 .var "data_writedata", 31 0; -v0000000001337800_0 .var "in_B", 31 0; -v00000000013379e0_0 .net "in_opcode", 5 0, L_000000000133bca0; 1 drivers -v0000000001338c00_0 .net "in_pc_in", 31 0, v0000000001336ea0_0; 1 drivers -v0000000001338ff0_0 .net "in_readreg1", 4 0, L_000000000133bc00; 1 drivers -v000000000133a210_0 .net "in_readreg2", 4 0, L_000000000133b200; 1 drivers -v0000000001339810_0 .var "in_writedata", 31 0; -v000000000133a990_0 .var "in_writereg", 4 0; -v000000000133a3f0_0 .var "instr_address", 31 0; -v0000000001339450_0 .net "instr_readdata", 31 0, L_000000000133b5c0; alias, 1 drivers -v000000000133a530_0 .net "out_ALUCond", 0 0, v000000000092e210_0; 1 drivers -v000000000133a850_0 .net "out_ALUOp", 4 0, v0000000001337120_0; 1 drivers -v0000000001338eb0_0 .net "out_ALURes", 31 0, v0000000001337c60_0; 1 drivers -v0000000001338e10_0 .net "out_ALUSrc", 0 0, v00000000013387a0_0; 1 drivers -v000000000133ac10_0 .net "out_MemRead", 0 0, v00000000013385c0_0; 1 drivers -v00000000013393b0_0 .net "out_MemWrite", 0 0, v0000000001337f80_0; 1 drivers -v0000000001339630_0 .net "out_MemtoReg", 1 0, v00000000013382a0_0; 1 drivers -v0000000001339bd0_0 .net "out_PC", 1 0, v0000000001336d60_0; 1 drivers -v000000000133a2b0_0 .net "out_RegDst", 1 0, v0000000001337b20_0; 1 drivers -v0000000001339ef0_0 .net "out_RegWrite", 0 0, v0000000001338520_0; 1 drivers -v000000000133aa30_0 .var "out_pc_out", 31 0; -v00000000013396d0_0 .net "out_readdata1", 31 0, v0000000001337d00_0; 1 drivers -v000000000133a670_0 .net "out_readdata2", 31 0, v0000000001336fe0_0; 1 drivers -v0000000001339090_0 .net "out_shamt", 4 0, v0000000001338700_0; 1 drivers -v0000000001338f50_0 .net "register_v0", 31 0, L_000000000094dfa0; alias, 1 drivers -v0000000001338d70_0 .net "reset", 0 0, v000000000133ba20_0; 1 drivers -E_0000000000944e40/0 .event edge, v0000000001336ea0_0, v0000000001337c60_0, v0000000001337f80_0, v00000000013385c0_0; -E_0000000000944e40/1 .event edge, v0000000001336fe0_0; -E_0000000000944e40 .event/or E_0000000000944e40/0, E_0000000000944e40/1; -L_000000000133bc00 .part L_000000000133b5c0, 21, 5; -L_000000000133b200 .part L_000000000133b5c0, 16, 5; -L_000000000133bca0 .part L_000000000133b5c0, 26, 6; -S_0000000000909020 .scope module, "alu" "mips_cpu_alu" 4 121, 5 1 0, S_0000000000908e90; - .timescale 0 0; - .port_info 0 /INPUT 32 "A"; - .port_info 1 /INPUT 32 "B"; - .port_info 2 /INPUT 5 "ALUOp"; - .port_info 3 /INPUT 5 "shamt"; - .port_info 4 /OUTPUT 1 "ALUCond"; - .port_info 5 /OUTPUT 32 "ALURes"; -enum00000000012bb970 .enum4 (5) - "ADD" 5'b00000, - "SUB" 5'b00001, - "MUL" 5'b00010, - "DIV" 5'b00011, - "AND" 5'b00100, - "OR" 5'b00101, - "XOR" 5'b00110, - "SLL" 5'b00111, - "SLLV" 5'b01000, - "SRL" 5'b01001, - "SRLV" 5'b01010, - "SRA" 5'b01011, - "SRAV" 5'b01100, - "EQ" 5'b01101, - "LES" 5'b01110, - "LEQ" 5'b01111, - "GRT" 5'b10000, - "GEQ" 5'b10001, - "NEQ" 5'b10010, - "PAS" 5'b10011, - "SLT" 5'b10100, - "SLTU" 5'b10101, - "MULU" 5'b10110, - "DIVU" 5'b10111 - ; -L_000000000094df30 .functor BUFZ 5, v0000000001337120_0, C4<00000>, C4<00000>, C4<00000>; -v000000000092e0d0_0 .net "A", 31 0, v0000000001337d00_0; alias, 1 drivers -v000000000092e210_0 .var "ALUCond", 0 0; -v00000000013380c0_0 .net "ALUOp", 4 0, v0000000001337120_0; alias, 1 drivers -v0000000001337080_0 .net "ALUOps", 4 0, L_000000000094df30; 1 drivers -v0000000001337c60_0 .var/s "ALURes", 31 0; -v0000000001337da0_0 .net "B", 31 0, v0000000001337800_0; 1 drivers -v0000000001338480_0 .net "shamt", 4 0, v0000000001338700_0; alias, 1 drivers -E_000000000093f000 .event edge, v0000000001337080_0, v000000000092e0d0_0, v0000000001337da0_0, v0000000001338480_0; -S_00000000009091b0 .scope module, "control" "mips_cpu_control" 4 90, 6 1 0, S_0000000000908e90; - .timescale 0 0; - .port_info 0 /INPUT 32 "Instr"; - .port_info 1 /INPUT 1 "ALUCond"; - .port_info 2 /OUTPUT 2 "CtrlRegDst"; - .port_info 3 /OUTPUT 2 "CtrlPC"; - .port_info 4 /OUTPUT 1 "CtrlMemRead"; - .port_info 5 /OUTPUT 2 "CtrlMemtoReg"; - .port_info 6 /OUTPUT 5 "CtrlALUOp"; - .port_info 7 /OUTPUT 5 "Ctrlshamt"; - .port_info 8 /OUTPUT 1 "CtrlMemWrite"; - .port_info 9 /OUTPUT 1 "CtrlALUSrc"; - .port_info 10 /OUTPUT 1 "CtrlRegWrite"; -enum000000000091ae20 .enum4 (6) - "SLL" 6'b000000, - "SRL" 6'b000010, - "SRA" 6'b000011, - "SLLV" 6'b000100, - "SRLV" 6'b000110, - "SRAV" 6'b000111, - "JR" 6'b001000, - "JALR" 6'b001001, - "MTHI" 6'b010001, - "MTLO" 6'b010011, - "MULT" 6'b011000, - "MULTU" 6'b011001, - "DIV" 6'b011010, - "DIVU" 6'b011011, - "ADDU" 6'b100001, - "SUBU" 6'b100011, - "AND" 6'b100100, - "OR" 6'b100101, - "XOR" 6'b100110, - "SLT" 6'b101010, - "SLTU" 6'b101011 - ; -enum00000000012baf10 .enum4 (5) - "BLTZ" 5'b00000, - "BGEZ" 5'b00001, - "BLTZAL" 5'b10000, - "BGEZAL" 5'b10001 - ; -enum00000000012bafc0 .enum4 (6) - "SPECIAL" 6'b000000, - "REGIMM" 6'b000001, - "J" 6'b000010, - "JAL" 6'b000011, - "BEQ" 6'b000100, - "BNE" 6'b000101, - "BLEZ" 6'b000110, - "BGTZ" 6'b000111, - "ADDI" 6'b001000, - "ADDIU" 6'b001001, - "SLTI" 6'b001010, - "SLTIU" 6'b001011, - "ANDI" 6'b001100, - "ORI" 6'b001101, - "XORI" 6'b001110, - "LUI" 6'b001111, - "LB" 6'b100000, - "LH" 6'b100001, - "LWL" 6'b100010, - "LW" 6'b100011, - "LBU" 6'b100100, - "LHU" 6'b100101, - "LWR" 6'b100110, - "SB" 6'b101000, - "SH" 6'b101001, - "SW" 6'b101011 - ; -v0000000001337a80_0 .net "ALUCond", 0 0, v000000000092e210_0; alias, 1 drivers -v0000000001337120_0 .var "CtrlALUOp", 4 0; -v00000000013387a0_0 .var "CtrlALUSrc", 0 0; -v00000000013385c0_0 .var "CtrlMemRead", 0 0; -v0000000001337f80_0 .var "CtrlMemWrite", 0 0; -v00000000013382a0_0 .var "CtrlMemtoReg", 1 0; -v0000000001336d60_0 .var "CtrlPC", 1 0; -v0000000001337b20_0 .var "CtrlRegDst", 1 0; -v0000000001338520_0 .var "CtrlRegWrite", 0 0; -v0000000001338700_0 .var "Ctrlshamt", 4 0; -v0000000001338020_0 .net "Instr", 31 0, L_000000000133b5c0; alias, 1 drivers -v0000000001337760_0 .net "funct", 5 0, L_000000000133b660; 1 drivers -v0000000001336e00_0 .net "op", 5 0, L_000000000133bf20; 1 drivers -v0000000001338340_0 .net "rt", 4 0, L_000000000133cc40; 1 drivers -E_0000000000946580/0 .event edge, v0000000001336e00_0, v0000000001337760_0, v000000000092e210_0, v0000000001338340_0; -E_0000000000946580/1 .event edge, v0000000001338020_0; -E_0000000000946580 .event/or E_0000000000946580/0, E_0000000000946580/1; -L_000000000133bf20 .part L_000000000133b5c0, 26, 6; -L_000000000133b660 .part L_000000000133b5c0, 0, 6; -L_000000000133cc40 .part L_000000000133b5c0, 16, 5; -S_00000000008e96b0 .scope module, "pc" "pc" 4 79, 7 1 0, S_0000000000908e90; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 1 "rst"; - .port_info 2 /INPUT 2 "pc_ctrl"; - .port_info 3 /INPUT 32 "pc_in"; - .port_info 4 /INPUT 5 "rs"; - .port_info 5 /OUTPUT 32 "pc_out"; - .port_info 6 /OUTPUT 1 "active"; -v0000000001337940_0 .var "active", 0 0; -v0000000001338160_0 .net "clk", 0 0, v000000000133b340_0; alias, 1 drivers -v0000000001337440_0 .net "pc_ctrl", 1 0, v0000000001336d60_0; alias, 1 drivers -v0000000001337260_0 .var "pc_curr", 31 0; -v0000000001337bc0_0 .net "pc_in", 31 0, v000000000133aa30_0; 1 drivers -v0000000001336ea0_0 .var "pc_out", 31 0; -o00000000012e3418 .functor BUFZ 5, C4; HiZ drive -v0000000001338660_0 .net "rs", 4 0, o00000000012e3418; 0 drivers -v0000000001336f40_0 .net "rst", 0 0, v000000000133ba20_0; alias, 1 drivers -E_000000000093f380 .event posedge, v0000000001338160_0; -S_00000000008e9840 .scope module, "regfile" "mips_cpu_regfile" 4 106, 8 1 0, S_0000000000908e90; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 5 "readreg1"; - .port_info 2 /INPUT 5 "readreg2"; - .port_info 3 /INPUT 5 "writereg"; - .port_info 4 /INPUT 32 "writedata"; - .port_info 5 /INPUT 1 "regwrite"; - .port_info 6 /INPUT 6 "opcode"; - .port_info 7 /OUTPUT 32 "readdata1"; - .port_info 8 /OUTPUT 32 "readdata2"; - .port_info 9 /OUTPUT 32 "regv0"; -v00000000013374e0_2 .array/port v00000000013374e0, 2; -L_000000000094dfa0 .functor BUFZ 32, v00000000013374e0_2, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; -v00000000013378a0_0 .net "clk", 0 0, v000000000133b340_0; alias, 1 drivers -v00000000013374e0 .array "memory", 0 31, 31 0; -v0000000001338840_0 .net "opcode", 5 0, L_000000000133bca0; alias, 1 drivers -v0000000001337d00_0 .var "readdata1", 31 0; -v0000000001336fe0_0 .var "readdata2", 31 0; -v0000000001337e40_0 .net "readreg1", 4 0, L_000000000133bc00; alias, 1 drivers -v00000000013371c0_0 .net "readreg2", 4 0, L_000000000133b200; alias, 1 drivers -v00000000013388e0_0 .net "regv0", 31 0, L_000000000094dfa0; alias, 1 drivers -v0000000001337ee0_0 .net "regwrite", 0 0, v0000000001338520_0; alias, 1 drivers -v0000000001337300_0 .net "writedata", 31 0, v0000000001339810_0; 1 drivers -v00000000013383e0_0 .net "writereg", 4 0, v000000000133a990_0; 1 drivers -E_000000000093ef80 .event negedge, v0000000001338160_0; -v00000000013374e0_0 .array/port v00000000013374e0, 0; -v00000000013374e0_1 .array/port v00000000013374e0, 1; -E_000000000093f700/0 .event edge, v0000000001337e40_0, v00000000013374e0_0, v00000000013374e0_1, v00000000013374e0_2; -v00000000013374e0_3 .array/port v00000000013374e0, 3; -v00000000013374e0_4 .array/port v00000000013374e0, 4; -v00000000013374e0_5 .array/port v00000000013374e0, 5; -v00000000013374e0_6 .array/port v00000000013374e0, 6; -E_000000000093f700/1 .event edge, v00000000013374e0_3, v00000000013374e0_4, v00000000013374e0_5, v00000000013374e0_6; -v00000000013374e0_7 .array/port v00000000013374e0, 7; -v00000000013374e0_8 .array/port v00000000013374e0, 8; -v00000000013374e0_9 .array/port v00000000013374e0, 9; -v00000000013374e0_10 .array/port v00000000013374e0, 10; -E_000000000093f700/2 .event edge, v00000000013374e0_7, v00000000013374e0_8, v00000000013374e0_9, v00000000013374e0_10; -v00000000013374e0_11 .array/port v00000000013374e0, 11; -v00000000013374e0_12 .array/port v00000000013374e0, 12; -v00000000013374e0_13 .array/port v00000000013374e0, 13; -v00000000013374e0_14 .array/port v00000000013374e0, 14; -E_000000000093f700/3 .event edge, v00000000013374e0_11, v00000000013374e0_12, v00000000013374e0_13, v00000000013374e0_14; -v00000000013374e0_15 .array/port v00000000013374e0, 15; -v00000000013374e0_16 .array/port v00000000013374e0, 16; -v00000000013374e0_17 .array/port v00000000013374e0, 17; -v00000000013374e0_18 .array/port v00000000013374e0, 18; -E_000000000093f700/4 .event edge, v00000000013374e0_15, v00000000013374e0_16, v00000000013374e0_17, v00000000013374e0_18; -v00000000013374e0_19 .array/port v00000000013374e0, 19; -v00000000013374e0_20 .array/port v00000000013374e0, 20; -v00000000013374e0_21 .array/port v00000000013374e0, 21; -v00000000013374e0_22 .array/port v00000000013374e0, 22; -E_000000000093f700/5 .event edge, v00000000013374e0_19, v00000000013374e0_20, v00000000013374e0_21, v00000000013374e0_22; -v00000000013374e0_23 .array/port v00000000013374e0, 23; -v00000000013374e0_24 .array/port v00000000013374e0, 24; -v00000000013374e0_25 .array/port v00000000013374e0, 25; -v00000000013374e0_26 .array/port v00000000013374e0, 26; -E_000000000093f700/6 .event edge, v00000000013374e0_23, v00000000013374e0_24, v00000000013374e0_25, v00000000013374e0_26; -v00000000013374e0_27 .array/port v00000000013374e0, 27; -v00000000013374e0_28 .array/port v00000000013374e0, 28; -v00000000013374e0_29 .array/port v00000000013374e0, 29; -v00000000013374e0_30 .array/port v00000000013374e0, 30; -E_000000000093f700/7 .event edge, v00000000013374e0_27, v00000000013374e0_28, v00000000013374e0_29, v00000000013374e0_30; -v00000000013374e0_31 .array/port v00000000013374e0, 31; -E_000000000093f700/8 .event edge, v00000000013374e0_31, v00000000013371c0_0; -E_000000000093f700 .event/or E_000000000093f700/0, E_000000000093f700/1, E_000000000093f700/2, E_000000000093f700/3, E_000000000093f700/4, E_000000000093f700/5, E_000000000093f700/6, E_000000000093f700/7, E_000000000093f700/8; -S_00000000008e99d0 .scope begin, "$unm_blk_121" "$unm_blk_121" 8 16, 8 16 0, S_00000000008e9840; - .timescale 0 0; -v0000000001338a20_0 .var/i "i", 31 0; -S_00000000008b1c70 .scope module, "ramInst" "mips_cpu_memory" 3 9, 9 1 0, S_0000000000905bd0; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk"; - .port_info 1 /INPUT 32 "data_address"; - .port_info 2 /INPUT 1 "data_write"; - .port_info 3 /INPUT 1 "data_read"; - .port_info 4 /INPUT 32 "data_writedata"; - .port_info 5 /OUTPUT 32 "data_readdata"; - .port_info 6 /INPUT 32 "instr_address"; - .port_info 7 /OUTPUT 32 "instr_readdata"; -P_000000000093efc0 .param/str "RAM_INIT_FILE" 0 9 16, "inputs/xxor.txt"; -L_000000000094dc20 .functor AND 1, L_000000000133b160, L_000000000133c7e0, C4<1>, C4<1>; -v000000000133a170_0 .net *"_ivl_0", 31 0, L_000000000133b980; 1 drivers -L_000000000133e088 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v000000000133a350_0 .net/2u *"_ivl_12", 31 0, L_000000000133e088; 1 drivers -v000000000133a490_0 .net *"_ivl_14", 0 0, L_000000000133b160; 1 drivers -L_000000000133e0d0 .functor BUFT 1, C4<10111111110000000000000001000000>, C4<0>, C4<0>, C4<0>; -v00000000013391d0_0 .net/2u *"_ivl_16", 31 0, L_000000000133e0d0; 1 drivers -v0000000001339270_0 .net *"_ivl_18", 0 0, L_000000000133c7e0; 1 drivers -v0000000001339950_0 .net *"_ivl_2", 31 0, L_000000000133b0c0; 1 drivers -v000000000133a8f0_0 .net *"_ivl_21", 0 0, L_000000000094dc20; 1 drivers -v0000000001339c70_0 .net *"_ivl_22", 31 0, L_000000000133b8e0; 1 drivers -L_000000000133e118 .functor BUFT 1, C4<10111111110000000000000000000000>, C4<0>, C4<0>, C4<0>; -v00000000013398b0_0 .net/2u *"_ivl_24", 31 0, L_000000000133e118; 1 drivers -v00000000013399f0_0 .net *"_ivl_26", 31 0, L_000000000133be80; 1 drivers -v000000000133aad0_0 .net *"_ivl_28", 31 0, L_000000000133c380; 1 drivers -v0000000001339310_0 .net *"_ivl_30", 29 0, L_000000000133c2e0; 1 drivers -L_000000000133e160 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v000000000133a5d0_0 .net *"_ivl_32", 1 0, L_000000000133e160; 1 drivers -L_000000000133e1a8 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v0000000001339a90_0 .net *"_ivl_34", 31 0, L_000000000133e1a8; 1 drivers -v00000000013394f0_0 .net *"_ivl_4", 29 0, L_000000000133b520; 1 drivers -L_000000000133dff8 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0000000001339590_0 .net *"_ivl_6", 1 0, L_000000000133dff8; 1 drivers -L_000000000133e040 .functor BUFT 1, C4, C4<0>, C4<0>, C4<0>; -v000000000133ab70_0 .net *"_ivl_8", 31 0, L_000000000133e040; 1 drivers -v0000000001339770_0 .net "clk", 0 0, v000000000133b340_0; alias, 1 drivers -v0000000001339b30_0 .net "data_address", 31 0, v0000000001337580_0; alias, 1 drivers -v000000000133a7b0 .array "data_memory", 63 0, 31 0; -v0000000001339d10_0 .net "data_read", 0 0, v0000000001337620_0; alias, 1 drivers -v0000000001339db0_0 .net "data_readdata", 31 0, L_000000000133bb60; alias, 1 drivers -v0000000001339e50_0 .net "data_write", 0 0, v00000000013376c0_0; alias, 1 drivers -v0000000001339f90_0 .net "data_writedata", 31 0, v0000000001338ac0_0; alias, 1 drivers -v000000000133a030_0 .net "instr_address", 31 0, v000000000133a3f0_0; alias, 1 drivers -v000000000133a0d0 .array "instr_memory", 63 0, 31 0; -v000000000133c420_0 .net "instr_readdata", 31 0, L_000000000133b5c0; alias, 1 drivers -L_000000000133b980 .array/port v000000000133a7b0, L_000000000133b0c0; -L_000000000133b520 .part v0000000001337580_0, 2, 30; -L_000000000133b0c0 .concat [ 30 2 0 0], L_000000000133b520, L_000000000133dff8; -L_000000000133bb60 .functor MUXZ 32, L_000000000133e040, L_000000000133b980, v0000000001337620_0, C4<>; -L_000000000133b160 .cmp/ge 32, v000000000133a3f0_0, L_000000000133e088; -L_000000000133c7e0 .cmp/gt 32, L_000000000133e0d0, v000000000133a3f0_0; -L_000000000133b8e0 .array/port v000000000133a0d0, L_000000000133c380; -L_000000000133be80 .arith/sub 32, v000000000133a3f0_0, L_000000000133e118; -L_000000000133c2e0 .part L_000000000133be80, 2, 30; -L_000000000133c380 .concat [ 30 2 0 0], L_000000000133c2e0, L_000000000133e160; -L_000000000133b5c0 .functor MUXZ 32, L_000000000133e1a8, L_000000000133b8e0, L_000000000094dc20, C4<>; -S_000000000133ad30 .scope begin, "$unm_blk_104" "$unm_blk_104" 9 21, 9 21 0, S_00000000008b1c70; - .timescale 0 0; -v000000000133a710_0 .var/i "i", 31 0; -S_000000000089a920 .scope begin, "$ivl_for_loop0" "$ivl_for_loop0" 9 36, 9 36 0, S_000000000133ad30; - .timescale 0 0; -v0000000001339130_0 .var/i "j", 31 0; - .scope S_00000000008b1c70; -T_0 ; - %fork t_1, S_000000000133ad30; - %jmp t_0; - .scope S_000000000133ad30; -t_1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v000000000133a710_0, 0, 32; -T_0.0 ; - %load/vec4 v000000000133a710_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v000000000133a710_0; - %store/vec4a v000000000133a7b0, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v000000000133a710_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v000000000133a710_0, 0, 32; - %jmp T_0.0; -T_0.1 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v000000000133a710_0, 0, 32; -T_0.2 ; - %load/vec4 v000000000133a710_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.3, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v000000000133a710_0; - %store/vec4a v000000000133a0d0, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v000000000133a710_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v000000000133a710_0, 0, 32; - %jmp T_0.2; -T_0.3 ; - %vpi_call/w 9 32 "$display", "RAM: Loading RAM contents from %s", P_000000000093efc0 {0 0 0}; - %vpi_call/w 9 33 "$readmemh", P_000000000093efc0, v000000000133a0d0 {0 0 0}; - %fork t_3, S_000000000089a920; - %jmp t_2; - .scope S_000000000089a920; -t_3 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v0000000001339130_0, 0, 32; -T_0.4 ; - %load/vec4 v0000000001339130_0; - %cmpi/s 64, 0, 32; - %jmp/0xz T_0.5, 5; - %pushi/vec4 3217031168, 0, 32; - %load/vec4 v0000000001339130_0; - %muli 4, 0, 32; - %add; - %vpi_call/w 9 37 "$display", "byte +%h: %h", S<0,vec4,u32>, &A {1 0 0}; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0000000001339130_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v0000000001339130_0, 0, 32; - %jmp T_0.4; -T_0.5 ; - %end; - .scope S_000000000133ad30; -t_2 %join; - %end; - .scope S_00000000008b1c70; -t_0 %join; - %end; - .thread T_0; - .scope S_00000000008b1c70; -T_1 ; - %wait E_000000000093f380; - %load/vec4 v0000000001339d10_0; - %nor/r; - %load/vec4 v0000000001339e50_0; - %and; - %flag_set/vec4 8; - %jmp/0xz T_1.0, 8; - %load/vec4 v000000000133a030_0; - %load/vec4 v0000000001339b30_0; - %cmp/ne; - %jmp/0xz T_1.2, 4; - %load/vec4 v0000000001339f90_0; - %load/vec4 v0000000001339b30_0; - %ix/load 4, 2, 0; - %flag_set/imm 4, 0; - %shiftr 4; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v000000000133a7b0, 0, 4; -T_1.2 ; -T_1.0 ; - %jmp T_1; - .thread T_1; - .scope S_00000000008e96b0; -T_2 ; - %load/vec4 v0000000001337bc0_0; - %store/vec4 v0000000001336ea0_0, 0, 32; - %end; - .thread T_2; - .scope S_00000000008e96b0; -T_3 ; - %wait E_000000000093f380; - %load/vec4 v0000000001336f40_0; - %flag_set/vec4 8; - %jmp/0xz T_3.0, 8; - %pushi/vec4 1, 0, 1; - %assign/vec4 v0000000001337940_0, 0; - %pushi/vec4 3217031168, 0, 32; - %assign/vec4 v0000000001336ea0_0, 0; - %jmp T_3.1; -T_3.0 ; - %load/vec4 v0000000001336ea0_0; - %cmpi/ne 0, 0, 32; - %jmp/0xz T_3.2, 4; - %load/vec4 v0000000001337940_0; - %assign/vec4 v0000000001337940_0, 0; - %load/vec4 v0000000001337440_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_3.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_3.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_3.6, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_3.7, 6; - %jmp T_3.8; -T_3.4 ; - %load/vec4 v0000000001336ea0_0; - %assign/vec4 v0000000001337260_0, 0; - %load/vec4 v0000000001337260_0; - %addi 4, 0, 32; - %assign/vec4 v0000000001336ea0_0, 0; - %vpi_call/w 7 27 "$display", "New PC from %h to %h", v0000000001337260_0, v0000000001336ea0_0 {0 0 0}; - %jmp T_3.8; -T_3.5 ; - %load/vec4 v0000000001337bc0_0; - %assign/vec4 v0000000001336ea0_0, 0; - %jmp T_3.8; -T_3.6 ; - %load/vec4 v0000000001337bc0_0; - %assign/vec4 v0000000001336ea0_0, 0; - %jmp T_3.8; -T_3.7 ; - %vpi_call/w 7 36 "$display", "JUMP REGISTER" {0 0 0}; - %pushi/vec4 0, 0, 32; - %assign/vec4 v0000000001336ea0_0, 0; - %jmp T_3.8; -T_3.8 ; - %pop/vec4 1; - %jmp T_3.3; -T_3.2 ; - %load/vec4 v0000000001336ea0_0; - %cmpi/e 0, 0, 32; - %jmp/0xz T_3.9, 4; - %pushi/vec4 0, 0, 1; - %assign/vec4 v0000000001337940_0, 0; -T_3.9 ; -T_3.3 ; -T_3.1 ; - %jmp T_3; - .thread T_3; - .scope S_00000000009091b0; -T_4 ; - %wait E_0000000000946580; - %vpi_call/w 6 86 "$display", "Opcode: %h", v0000000001336e00_0 {0 0 0}; - %load/vec4 v0000000001336e00_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.0, 4; - %pushi/vec4 0, 0, 2; - %store/vec4 v0000000001337b20_0, 0, 2; - %vpi_call/w 6 89 "$display", "CTRLREGDST: Rt" {0 0 0}; - %jmp T_4.1; -T_4.0 ; - %load/vec4 v0000000001336e00_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001337760_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001337760_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.2, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v0000000001337b20_0, 0, 2; - %vpi_call/w 6 92 "$display", "CTRLREGDST: Rd" {0 0 0}; - %jmp T_4.3; -T_4.2 ; - %load/vec4 v0000000001336e00_0; - %cmpi/e 3, 0, 6; - %jmp/0xz T_4.4, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v0000000001337b20_0, 0, 2; - %vpi_call/w 6 95 "$display", "CTRLREGDST: Link" {0 0 0}; - %jmp T_4.5; -T_4.4 ; - %pushi/vec4 1, 1, 2; - %store/vec4 v0000000001337b20_0, 0, 2; - %vpi_call/w 6 96 "$display", "xxxxxxxxxxxxxx" {0 0 0}; -T_4.5 ; -T_4.3 ; -T_4.1 ; - %load/vec4 v0000000001337a80_0; - %load/vec4 v0000000001336e00_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001336e00_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001336e00_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001336e00_0; - %pushi/vec4 5, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001336e00_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001338340_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001338340_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001338340_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001338340_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.6, 8; - %pushi/vec4 1, 0, 2; - %store/vec4 v0000000001336d60_0, 0, 2; - %jmp T_4.7; -T_4.6 ; - %load/vec4 v0000000001336e00_0; - %cmpi/e 2, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 3, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.8, 4; - %pushi/vec4 2, 0, 2; - %store/vec4 v0000000001336d60_0, 0, 2; - %jmp T_4.9; -T_4.8 ; - %load/vec4 v0000000001337760_0; - %cmpi/e 8, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001337760_0; - %cmpi/e 9, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.10, 4; - %pushi/vec4 3, 0, 2; - %store/vec4 v0000000001336d60_0, 0, 2; - %jmp T_4.11; -T_4.10 ; - %pushi/vec4 0, 0, 2; - %store/vec4 v0000000001336d60_0, 0, 2; -T_4.11 ; -T_4.9 ; -T_4.7 ; - %load/vec4 v0000000001336e00_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.12, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000013385c0_0, 0, 1; - %pushi/vec4 1, 0, 2; - %store/vec4 v00000000013382a0_0, 0, 2; - %jmp T_4.13; -T_4.12 ; - %load/vec4 v0000000001336e00_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001337760_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001337760_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.14, 9; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000013385c0_0, 0, 1; - %pushi/vec4 0, 0, 2; - %store/vec4 v00000000013382a0_0, 0, 2; - %vpi_call/w 6 115 "$display", "XORI MEMTOREG MUX" {0 0 0}; - %jmp T_4.15; -T_4.14 ; - %load/vec4 v0000000001336e00_0; - %cmpi/e 3, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001337760_0; - %pushi/vec4 9, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.16, 9; - %pushi/vec4 2, 0, 2; - %store/vec4 v00000000013382a0_0, 0, 2; - %jmp T_4.17; -T_4.16 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v00000000013385c0_0, 0, 1; -T_4.17 ; -T_4.15 ; -T_4.13 ; - %load/vec4 v0000000001336e00_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001337760_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.18, 9; - %pushi/vec4 0, 0, 5; - %store/vec4 v0000000001337120_0, 0, 5; - %jmp T_4.19; -T_4.18 ; - %load/vec4 v0000000001336e00_0; - %cmpi/e 12, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001337760_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.20, 9; - %pushi/vec4 4, 0, 5; - %store/vec4 v0000000001337120_0, 0, 5; - %jmp T_4.21; -T_4.20 ; - %load/vec4 v0000000001336e00_0; - %cmpi/e 4, 0, 6; - %jmp/0xz T_4.22, 4; - %pushi/vec4 13, 0, 5; - %store/vec4 v0000000001337120_0, 0, 5; - %jmp T_4.23; -T_4.22 ; - %load/vec4 v0000000001336e00_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001338340_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001338340_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.24, 8; - %pushi/vec4 17, 0, 5; - %store/vec4 v0000000001337120_0, 0, 5; - %jmp T_4.25; -T_4.24 ; - %load/vec4 v0000000001336e00_0; - %cmpi/e 7, 0, 6; - %jmp/0xz T_4.26, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v0000000001337120_0, 0, 5; - %jmp T_4.27; -T_4.26 ; - %load/vec4 v0000000001336e00_0; - %cmpi/e 6, 0, 6; - %jmp/0xz T_4.28, 4; - %pushi/vec4 15, 0, 5; - %store/vec4 v0000000001337120_0, 0, 5; - %jmp T_4.29; -T_4.28 ; - %load/vec4 v0000000001336e00_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001338340_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001338340_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.30, 8; - %pushi/vec4 14, 0, 5; - %store/vec4 v0000000001337120_0, 0, 5; - %jmp T_4.31; -T_4.30 ; - %load/vec4 v0000000001336e00_0; - %cmpi/e 5, 0, 6; - %jmp/0xz T_4.32, 4; - %pushi/vec4 18, 0, 5; - %store/vec4 v0000000001337120_0, 0, 5; - %jmp T_4.33; -T_4.32 ; - %load/vec4 v0000000001336e00_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001337760_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.34, 8; - %pushi/vec4 3, 0, 5; - %store/vec4 v0000000001337120_0, 0, 5; - %jmp T_4.35; -T_4.34 ; - %load/vec4 v0000000001336e00_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001337760_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.36, 8; - %pushi/vec4 23, 0, 5; - %store/vec4 v0000000001337120_0, 0, 5; - %jmp T_4.37; -T_4.36 ; - %load/vec4 v0000000001336e00_0; - %cmpi/e 32, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.38, 4; - %pushi/vec4 0, 0, 5; - %store/vec4 v0000000001337120_0, 0, 5; - %jmp T_4.39; -T_4.38 ; - %load/vec4 v0000000001336e00_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.40, 4; - %pushi/vec4 7, 0, 5; - %store/vec4 v0000000001337120_0, 0, 5; - %jmp T_4.41; -T_4.40 ; - %load/vec4 v0000000001336e00_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001337760_0; - %pushi/vec4 17, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001337760_0; - %pushi/vec4 19, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.42, 8; - %pushi/vec4 19, 0, 5; - %store/vec4 v0000000001337120_0, 0, 5; - %jmp T_4.43; -T_4.42 ; - %load/vec4 v0000000001336e00_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001337760_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.44, 8; - %pushi/vec4 2, 0, 5; - %store/vec4 v0000000001337120_0, 0, 5; - %jmp T_4.45; -T_4.44 ; - %load/vec4 v0000000001336e00_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001337760_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.46, 8; - %pushi/vec4 22, 0, 5; - %store/vec4 v0000000001337120_0, 0, 5; - %jmp T_4.47; -T_4.46 ; - %load/vec4 v0000000001336e00_0; - %cmpi/e 13, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001337760_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.48, 9; - %pushi/vec4 5, 0, 5; - %store/vec4 v0000000001337120_0, 0, 5; - %jmp T_4.49; -T_4.48 ; - %load/vec4 v0000000001336e00_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001337760_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.50, 8; - %pushi/vec4 7, 0, 5; - %store/vec4 v0000000001337120_0, 0, 5; - %jmp T_4.51; -T_4.50 ; - %load/vec4 v0000000001336e00_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001337760_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.52, 8; - %pushi/vec4 8, 0, 5; - %store/vec4 v0000000001337120_0, 0, 5; - %jmp T_4.53; -T_4.52 ; - %load/vec4 v0000000001336e00_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001337760_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.54, 8; - %pushi/vec4 11, 0, 5; - %store/vec4 v0000000001337120_0, 0, 5; - %jmp T_4.55; -T_4.54 ; - %load/vec4 v0000000001336e00_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001337760_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.56, 8; - %pushi/vec4 12, 0, 5; - %store/vec4 v0000000001337120_0, 0, 5; - %jmp T_4.57; -T_4.56 ; - %load/vec4 v0000000001336e00_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001337760_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.58, 8; - %pushi/vec4 9, 0, 5; - %store/vec4 v0000000001337120_0, 0, 5; - %jmp T_4.59; -T_4.58 ; - %load/vec4 v0000000001336e00_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001337760_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.60, 8; - %pushi/vec4 10, 0, 5; - %store/vec4 v0000000001337120_0, 0, 5; - %jmp T_4.61; -T_4.60 ; - %load/vec4 v0000000001336e00_0; - %cmpi/e 10, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001337760_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.62, 9; - %pushi/vec4 20, 0, 5; - %store/vec4 v0000000001337120_0, 0, 5; - %jmp T_4.63; -T_4.62 ; - %load/vec4 v0000000001336e00_0; - %cmpi/e 11, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001337760_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.64, 9; - %pushi/vec4 21, 0, 5; - %store/vec4 v0000000001337120_0, 0, 5; - %jmp T_4.65; -T_4.64 ; - %load/vec4 v0000000001336e00_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001337760_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.66, 8; - %pushi/vec4 1, 0, 5; - %store/vec4 v0000000001337120_0, 0, 5; - %jmp T_4.67; -T_4.66 ; - %load/vec4 v0000000001336e00_0; - %cmpi/e 14, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001337760_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.68, 9; - %pushi/vec4 6, 0, 5; - %store/vec4 v0000000001337120_0, 0, 5; - %vpi_call/w 6 173 "$display", "XORIXORI123" {0 0 0}; - %jmp T_4.69; -T_4.68 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v0000000001337120_0, 0, 5; -T_4.69 ; -T_4.67 ; -T_4.65 ; -T_4.63 ; -T_4.61 ; -T_4.59 ; -T_4.57 ; -T_4.55 ; -T_4.53 ; -T_4.51 ; -T_4.49 ; -T_4.47 ; -T_4.45 ; -T_4.43 ; -T_4.41 ; -T_4.39 ; -T_4.37 ; -T_4.35 ; -T_4.33 ; -T_4.31 ; -T_4.29 ; -T_4.27 ; -T_4.25 ; -T_4.23 ; -T_4.21 ; -T_4.19 ; - %load/vec4 v0000000001336e00_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001337760_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001337760_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %jmp/0xz T_4.70, 8; - %load/vec4 v0000000001338020_0; - %parti/s 5, 6, 4; - %store/vec4 v0000000001338700_0, 0, 5; - %jmp T_4.71; -T_4.70 ; - %load/vec4 v0000000001336e00_0; - %cmpi/e 15, 0, 6; - %jmp/0xz T_4.72, 4; - %pushi/vec4 16, 0, 5; - %store/vec4 v0000000001338700_0, 0, 5; - %jmp T_4.73; -T_4.72 ; - %pushi/vec4 31, 31, 5; - %store/vec4 v0000000001338700_0, 0, 5; -T_4.73 ; -T_4.71 ; - %load/vec4 v0000000001336e00_0; - %cmpi/e 40, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.74, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001337f80_0, 0, 1; - %jmp T_4.75; -T_4.74 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001337f80_0, 0, 1; -T_4.75 ; - %load/vec4 v0000000001336e00_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 11, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 40, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 41, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 43, 0, 6; - %flag_or 4, 8; - %jmp/0xz T_4.76, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v00000000013387a0_0, 0, 1; - %jmp T_4.77; -T_4.76 ; - %load/vec4 v0000000001336e00_0; - %cmpi/e 4, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 7, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 6, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 5, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001337760_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001337760_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %load/vec4 v0000000001336e00_0; - %pushi/vec4 1, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001338340_0; - %pushi/vec4 1, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001338340_0; - %pushi/vec4 17, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001338340_0; - %pushi/vec4 0, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001338340_0; - %pushi/vec4 16, 0, 5; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 8; - %flag_or 8, 9; - %jmp/0xz T_4.78, 8; - %pushi/vec4 0, 0, 1; - %store/vec4 v00000000013387a0_0, 0, 1; - %jmp T_4.79; -T_4.78 ; - %pushi/vec4 1, 1, 1; - %store/vec4 v00000000013387a0_0, 0, 1; -T_4.79 ; -T_4.77 ; - %load/vec4 v0000000001336e00_0; - %cmpi/e 9, 0, 6; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 12, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 32, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 36, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 33, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 37, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 15, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 35, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 34, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 38, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 13, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 10, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %cmpi/e 14, 0, 6; - %flag_or 4, 8; - %flag_mov 8, 4; - %load/vec4 v0000000001336e00_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001337760_0; - %pushi/vec4 33, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0000000001337760_0; - %pushi/vec4 36, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 26, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 27, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 24, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 25, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 37, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 0, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 4, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 42, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 43, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 3, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 7, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 2, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 6, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 35, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %load/vec4 v0000000001337760_0; - %pushi/vec4 38, 0, 6; - %cmp/e; - %flag_get/vec4 4; - %or; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.80, 9; - %pushi/vec4 1, 0, 1; - %store/vec4 v0000000001338520_0, 0, 1; - %jmp T_4.81; -T_4.80 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v0000000001338520_0, 0, 1; -T_4.81 ; - %jmp T_4; - .thread T_4, $push; - .scope S_00000000008e9840; -T_5 ; - %fork t_5, S_00000000008e99d0; - %jmp t_4; - .scope S_00000000008e99d0; -t_5 ; - %pushi/vec4 0, 0, 32; - %store/vec4 v0000000001338a20_0, 0, 32; -T_5.0 ; - %load/vec4 v0000000001338a20_0; - %cmpi/s 32, 0, 32; - %jmp/0xz T_5.1, 5; - %pushi/vec4 0, 0, 32; - %ix/getv/s 4, v0000000001338a20_0; - %store/vec4a v00000000013374e0, 4, 0; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0000000001338a20_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v0000000001338a20_0, 0, 32; - %jmp T_5.0; -T_5.1 ; - %end; - .scope S_00000000008e9840; -t_4 %join; - %end; - .thread T_5; - .scope S_00000000008e9840; -T_6 ; -Ewait_0 .event/or E_000000000093f700, E_0x0; - %wait Ewait_0; - %load/vec4 v0000000001337e40_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v00000000013374e0, 4; - %store/vec4 v0000000001337d00_0, 0, 32; - %load/vec4 v00000000013371c0_0; - %pad/u 7; - %ix/vec4 4; - %load/vec4a v00000000013374e0, 4; - %store/vec4 v0000000001336fe0_0, 0, 32; - %jmp T_6; - .thread T_6, $push; - .scope S_00000000008e9840; -T_7 ; - %wait E_000000000093ef80; - %load/vec4 v00000000013383e0_0; - %cmpi/e 0, 0, 5; - %jmp/0xz T_7.0, 4; - %jmp T_7.1; -T_7.0 ; - %load/vec4 v0000000001337ee0_0; - %flag_set/vec4 8; - %jmp/0xz T_7.2, 8; - %load/vec4 v0000000001338840_0; - %dup/vec4; - %pushi/vec4 32, 0, 6; - %cmp/u; - %jmp/1 T_7.4, 6; - %dup/vec4; - %pushi/vec4 36, 0, 6; - %cmp/u; - %jmp/1 T_7.5, 6; - %dup/vec4; - %pushi/vec4 33, 0, 6; - %cmp/u; - %jmp/1 T_7.6, 6; - %dup/vec4; - %pushi/vec4 37, 0, 6; - %cmp/u; - %jmp/1 T_7.7, 6; - %dup/vec4; - %pushi/vec4 34, 0, 6; - %cmp/u; - %jmp/1 T_7.8, 6; - %dup/vec4; - %pushi/vec4 38, 0, 6; - %cmp/u; - %jmp/1 T_7.9, 6; - %load/vec4 v0000000001337300_0; - %load/vec4 v00000000013383e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000013374e0, 0, 4; - %jmp T_7.11; -T_7.4 ; - %load/vec4 v0000000001337d00_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.12, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.13, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.14, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.15, 6; - %jmp T_7.16; -T_7.12 ; - %load/vec4 v0000000001337300_0; - %parti/s 1, 7, 4; - %replicate 24; - %load/vec4 v0000000001337300_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000013383e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000013374e0, 0, 4; - %jmp T_7.16; -T_7.13 ; - %load/vec4 v0000000001337300_0; - %parti/s 1, 15, 5; - %replicate 24; - %load/vec4 v0000000001337300_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000013383e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000013374e0, 0, 4; - %jmp T_7.16; -T_7.14 ; - %load/vec4 v0000000001337300_0; - %parti/s 1, 23, 6; - %replicate 24; - %load/vec4 v0000000001337300_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000013383e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000013374e0, 0, 4; - %jmp T_7.16; -T_7.15 ; - %load/vec4 v0000000001337300_0; - %parti/s 1, 31, 6; - %replicate 24; - %load/vec4 v0000000001337300_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000013383e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000013374e0, 0, 4; - %jmp T_7.16; -T_7.16 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.5 ; - %load/vec4 v0000000001337d00_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.17, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.18, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.19, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.20, 6; - %jmp T_7.21; -T_7.17 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v0000000001337300_0; - %parti/s 8, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000013383e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000013374e0, 0, 4; - %jmp T_7.21; -T_7.18 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v0000000001337300_0; - %parti/s 8, 8, 5; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000013383e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000013374e0, 0, 4; - %jmp T_7.21; -T_7.19 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v0000000001337300_0; - %parti/s 8, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000013383e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000013374e0, 0, 4; - %jmp T_7.21; -T_7.20 ; - %pushi/vec4 0, 0, 24; - %load/vec4 v0000000001337300_0; - %parti/s 8, 24, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000013383e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000013374e0, 0, 4; - %jmp T_7.21; -T_7.21 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.6 ; - %load/vec4 v0000000001337d00_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.22, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.23, 6; - %jmp T_7.24; -T_7.22 ; - %load/vec4 v0000000001337300_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v0000000001337300_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000013383e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000013374e0, 0, 4; - %jmp T_7.24; -T_7.23 ; - %load/vec4 v0000000001337300_0; - %parti/s 1, 31, 6; - %replicate 16; - %load/vec4 v0000000001337300_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000013383e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000013374e0, 0, 4; - %jmp T_7.24; -T_7.24 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.7 ; - %load/vec4 v0000000001337d00_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.25, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.26, 6; - %jmp T_7.27; -T_7.25 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v0000000001337300_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000013383e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000013374e0, 0, 4; - %jmp T_7.27; -T_7.26 ; - %pushi/vec4 0, 0, 16; - %load/vec4 v0000000001337300_0; - %parti/s 16, 16, 6; - %concat/vec4; draw_concat_vec4 - %load/vec4 v00000000013383e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000013374e0, 0, 4; - %jmp T_7.27; -T_7.27 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.8 ; - %load/vec4 v0000000001337d00_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.28, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.29, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.30, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.31, 6; - %jmp T_7.32; -T_7.28 ; - %load/vec4 v0000000001337300_0; - %parti/s 8, 0, 2; - %load/vec4 v00000000013383e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 24, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v00000000013374e0, 4, 5; - %jmp T_7.32; -T_7.29 ; - %load/vec4 v0000000001337300_0; - %parti/s 16, 0, 2; - %load/vec4 v00000000013383e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 16, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v00000000013374e0, 4, 5; - %jmp T_7.32; -T_7.30 ; - %load/vec4 v0000000001337300_0; - %parti/s 24, 0, 2; - %load/vec4 v00000000013383e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 8, 0; part off - %ix/load 5, 0, 0; Constant delay - %assign/vec4/a/d v00000000013374e0, 4, 5; - %jmp T_7.32; -T_7.31 ; - %load/vec4 v0000000001337300_0; - %load/vec4 v00000000013383e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000013374e0, 0, 4; - %jmp T_7.32; -T_7.32 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.9 ; - %load/vec4 v0000000001337d00_0; - %parti/s 2, 0, 2; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_7.33, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_7.34, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_7.35, 6; - %dup/vec4; - %pushi/vec4 3, 0, 2; - %cmp/u; - %jmp/1 T_7.36, 6; - %jmp T_7.37; -T_7.33 ; - %load/vec4 v0000000001337300_0; - %load/vec4 v00000000013383e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000013374e0, 0, 4; - %jmp T_7.37; -T_7.34 ; - %load/vec4 v0000000001337300_0; - %parti/s 24, 8, 5; - %load/vec4 v00000000013383e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000013374e0, 0, 4; - %jmp T_7.37; -T_7.35 ; - %load/vec4 v0000000001337300_0; - %parti/s 16, 16, 6; - %load/vec4 v00000000013383e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000013374e0, 0, 4; - %jmp T_7.37; -T_7.36 ; - %load/vec4 v0000000001337300_0; - %parti/s 8, 24, 6; - %load/vec4 v00000000013383e0_0; - %pad/u 7; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v00000000013374e0, 0, 4; - %jmp T_7.37; -T_7.37 ; - %pop/vec4 1; - %jmp T_7.11; -T_7.11 ; - %pop/vec4 1; -T_7.2 ; -T_7.1 ; - %jmp T_7; - .thread T_7; - .scope S_0000000000909020; -T_8 ; -Ewait_1 .event/or E_000000000093f000, E_0x0; - %wait Ewait_1; - %load/vec4 v0000000001337080_0; - %dup/vec4; - %pushi/vec4 0, 0, 5; - %cmp/u; - %jmp/1 T_8.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 5; - %cmp/u; - %jmp/1 T_8.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 5; - %cmp/u; - %jmp/1 T_8.2, 6; - %dup/vec4; - %pushi/vec4 3, 0, 5; - %cmp/u; - %jmp/1 T_8.3, 6; - %dup/vec4; - %pushi/vec4 4, 0, 5; - %cmp/u; - %jmp/1 T_8.4, 6; - %dup/vec4; - %pushi/vec4 5, 0, 5; - %cmp/u; - %jmp/1 T_8.5, 6; - %dup/vec4; - %pushi/vec4 6, 0, 5; - %cmp/u; - %jmp/1 T_8.6, 6; - %dup/vec4; - %pushi/vec4 7, 0, 5; - %cmp/u; - %jmp/1 T_8.7, 6; - %dup/vec4; - %pushi/vec4 8, 0, 5; - %cmp/u; - %jmp/1 T_8.8, 6; - %dup/vec4; - %pushi/vec4 9, 0, 5; - %cmp/u; - %jmp/1 T_8.9, 6; - %dup/vec4; - %pushi/vec4 10, 0, 5; - %cmp/u; - %jmp/1 T_8.10, 6; - %dup/vec4; - %pushi/vec4 11, 0, 5; - %cmp/u; - %jmp/1 T_8.11, 6; - %dup/vec4; - %pushi/vec4 12, 0, 5; - %cmp/u; - %jmp/1 T_8.12, 6; - %dup/vec4; - %pushi/vec4 13, 0, 5; - %cmp/u; - %jmp/1 T_8.13, 6; - %dup/vec4; - %pushi/vec4 14, 0, 5; - %cmp/u; - %jmp/1 T_8.14, 6; - %dup/vec4; - %pushi/vec4 15, 0, 5; - %cmp/u; - %jmp/1 T_8.15, 6; - %dup/vec4; - %pushi/vec4 16, 0, 5; - %cmp/u; - %jmp/1 T_8.16, 6; - %dup/vec4; - %pushi/vec4 17, 0, 5; - %cmp/u; - %jmp/1 T_8.17, 6; - %dup/vec4; - %pushi/vec4 18, 0, 5; - %cmp/u; - %jmp/1 T_8.18, 6; - %dup/vec4; - %pushi/vec4 19, 0, 5; - %cmp/u; - %jmp/1 T_8.19, 6; - %dup/vec4; - %pushi/vec4 20, 0, 5; - %cmp/u; - %jmp/1 T_8.20, 6; - %dup/vec4; - %pushi/vec4 21, 0, 5; - %cmp/u; - %jmp/1 T_8.21, 6; - %dup/vec4; - %pushi/vec4 22, 0, 5; - %cmp/u; - %jmp/1 T_8.22, 6; - %dup/vec4; - %pushi/vec4 23, 0, 5; - %cmp/u; - %jmp/1 T_8.23, 6; - %jmp T_8.24; -T_8.0 ; - %load/vec4 v000000000092e0d0_0; - %load/vec4 v0000000001337da0_0; - %add; - %store/vec4 v0000000001337c60_0, 0, 32; - %jmp T_8.24; -T_8.1 ; - %load/vec4 v000000000092e0d0_0; - %load/vec4 v0000000001337da0_0; - %sub; - %store/vec4 v0000000001337c60_0, 0, 32; - %jmp T_8.24; -T_8.2 ; - %load/vec4 v000000000092e0d0_0; - %load/vec4 v0000000001337da0_0; - %mul; - %store/vec4 v0000000001337c60_0, 0, 32; - %jmp T_8.24; -T_8.3 ; - %load/vec4 v000000000092e0d0_0; - %load/vec4 v0000000001337da0_0; - %div/s; - %store/vec4 v0000000001337c60_0, 0, 32; - %jmp T_8.24; -T_8.4 ; - %load/vec4 v000000000092e0d0_0; - %load/vec4 v0000000001337da0_0; - %and; - %store/vec4 v0000000001337c60_0, 0, 32; - %jmp T_8.24; -T_8.5 ; - %load/vec4 v000000000092e0d0_0; - %load/vec4 v0000000001337da0_0; - %or; - %store/vec4 v0000000001337c60_0, 0, 32; - %jmp T_8.24; -T_8.6 ; - %load/vec4 v000000000092e0d0_0; - %load/vec4 v0000000001337da0_0; - %xor; - %store/vec4 v0000000001337c60_0, 0, 32; - %jmp T_8.24; -T_8.7 ; - %load/vec4 v0000000001337da0_0; - %ix/getv 4, v0000000001338480_0; - %shiftl 4; - %store/vec4 v0000000001337c60_0, 0, 32; - %jmp T_8.24; -T_8.8 ; - %load/vec4 v0000000001337da0_0; - %ix/getv 4, v000000000092e0d0_0; - %shiftl 4; - %store/vec4 v0000000001337c60_0, 0, 32; - %jmp T_8.24; -T_8.9 ; - %load/vec4 v0000000001337da0_0; - %ix/getv 4, v0000000001338480_0; - %shiftr 4; - %store/vec4 v0000000001337c60_0, 0, 32; - %jmp T_8.24; -T_8.10 ; - %load/vec4 v0000000001337da0_0; - %ix/getv 4, v000000000092e0d0_0; - %shiftr 4; - %store/vec4 v0000000001337c60_0, 0, 32; - %jmp T_8.24; -T_8.11 ; - %load/vec4 v0000000001337da0_0; - %ix/getv 4, v0000000001338480_0; - %shiftr 4; - %store/vec4 v0000000001337c60_0, 0, 32; - %jmp T_8.24; -T_8.12 ; - %load/vec4 v0000000001337da0_0; - %ix/getv 4, v000000000092e0d0_0; - %shiftr 4; - %store/vec4 v0000000001337c60_0, 0, 32; - %jmp T_8.24; -T_8.13 ; - %load/vec4 v000000000092e0d0_0; - %load/vec4 v0000000001337da0_0; - %cmp/e; - %jmp/0xz T_8.25, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000092e210_0, 0, 1; - %jmp T_8.26; -T_8.25 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000092e210_0, 0, 1; -T_8.26 ; - %jmp T_8.24; -T_8.14 ; - %load/vec4 v000000000092e0d0_0; - %load/vec4 v0000000001337da0_0; - %cmp/s; - %jmp/0xz T_8.27, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000092e210_0, 0, 1; - %jmp T_8.28; -T_8.27 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000092e210_0, 0, 1; -T_8.28 ; - %jmp T_8.24; -T_8.15 ; - %load/vec4 v000000000092e0d0_0; - %load/vec4 v0000000001337da0_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.29, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000092e210_0, 0, 1; - %jmp T_8.30; -T_8.29 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000092e210_0, 0, 1; -T_8.30 ; - %jmp T_8.24; -T_8.16 ; - %load/vec4 v0000000001337da0_0; - %load/vec4 v000000000092e0d0_0; - %cmp/s; - %jmp/0xz T_8.31, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000092e210_0, 0, 1; - %jmp T_8.32; -T_8.31 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000092e210_0, 0, 1; -T_8.32 ; - %jmp T_8.24; -T_8.17 ; - %load/vec4 v0000000001337da0_0; - %load/vec4 v000000000092e0d0_0; - %cmp/s; - %flag_or 5, 4; - %jmp/0xz T_8.33, 5; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000092e210_0, 0, 1; - %jmp T_8.34; -T_8.33 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000092e210_0, 0, 1; -T_8.34 ; - %jmp T_8.24; -T_8.18 ; - %load/vec4 v000000000092e0d0_0; - %load/vec4 v0000000001337da0_0; - %cmp/ne; - %jmp/0xz T_8.35, 4; - %pushi/vec4 1, 0, 1; - %store/vec4 v000000000092e210_0, 0, 1; - %jmp T_8.36; -T_8.35 ; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000092e210_0, 0, 1; -T_8.36 ; - %jmp T_8.24; -T_8.19 ; - %load/vec4 v000000000092e0d0_0; - %store/vec4 v0000000001337c60_0, 0, 32; - %jmp T_8.24; -T_8.20 ; - %load/vec4 v000000000092e0d0_0; - %load/vec4 v0000000001337da0_0; - %cmp/s; - %jmp/0xz T_8.37, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v0000000001337c60_0, 0, 32; -T_8.37 ; - %jmp T_8.24; -T_8.21 ; - %load/vec4 v000000000092e0d0_0; - %load/vec4 v0000000001337da0_0; - %cmp/u; - %jmp/0xz T_8.39, 5; - %pushi/vec4 1, 0, 32; - %store/vec4 v0000000001337c60_0, 0, 32; -T_8.39 ; - %jmp T_8.24; -T_8.22 ; - %load/vec4 v000000000092e0d0_0; - %load/vec4 v0000000001337da0_0; - %mul; - %store/vec4 v0000000001337c60_0, 0, 32; - %jmp T_8.24; -T_8.23 ; - %load/vec4 v000000000092e0d0_0; - %load/vec4 v0000000001337da0_0; - %div; - %store/vec4 v0000000001337c60_0, 0, 32; - %jmp T_8.24; -T_8.24 ; - %pop/vec4 1; - %jmp T_8; - .thread T_8, $push; - .scope S_0000000000908e90; -T_9 ; - %pushi/vec4 3217031168, 0, 32; - %store/vec4 v000000000133aa30_0, 0, 32; - %end; - .thread T_9, $init; - .scope S_0000000000908e90; -T_10 ; -Ewait_2 .event/or E_0000000000944e40, E_0x0; - %wait Ewait_2; - %load/vec4 v0000000001338c00_0; - %store/vec4 v000000000133a3f0_0, 0, 32; - %load/vec4 v0000000001338eb0_0; - %store/vec4 v0000000001337580_0, 0, 32; - %load/vec4 v00000000013393b0_0; - %store/vec4 v00000000013376c0_0, 0, 1; - %load/vec4 v000000000133ac10_0; - %store/vec4 v0000000001337620_0, 0, 1; - %load/vec4 v000000000133a670_0; - %store/vec4 v0000000001338ac0_0, 0, 32; - %jmp T_10; - .thread T_10, $push; - .scope S_0000000000908e90; -T_11 ; - %wait E_000000000093f380; - %load/vec4 v000000000133a2b0_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.2, 6; - %jmp T_11.3; -T_11.0 ; - %load/vec4 v0000000001339450_0; - %parti/s 5, 16, 6; - %assign/vec4 v000000000133a990_0, 0; - %jmp T_11.3; -T_11.1 ; - %load/vec4 v0000000001339450_0; - %parti/s 5, 11, 5; - %assign/vec4 v000000000133a990_0, 0; - %jmp T_11.3; -T_11.2 ; - %pushi/vec4 31, 0, 5; - %assign/vec4 v000000000133a990_0, 0; - %jmp T_11.3; -T_11.3 ; - %pop/vec4 1; - %load/vec4 v0000000001339630_0; - %dup/vec4; - %pushi/vec4 0, 0, 2; - %cmp/u; - %jmp/1 T_11.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 2; - %cmp/u; - %jmp/1 T_11.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 2; - %cmp/u; - %jmp/1 T_11.6, 6; - %jmp T_11.7; -T_11.4 ; - %load/vec4 v0000000001338eb0_0; - %assign/vec4 v0000000001339810_0, 0; - %jmp T_11.7; -T_11.5 ; - %load/vec4 v0000000001338200_0; - %assign/vec4 v0000000001339810_0, 0; - %jmp T_11.7; -T_11.6 ; - %load/vec4 v000000000133aa30_0; - %addi 8, 0, 32; - %assign/vec4 v0000000001339810_0, 0; - %jmp T_11.7; -T_11.7 ; - %pop/vec4 1; - %load/vec4 v0000000001338e10_0; - %dup/vec4; - %pushi/vec4 1, 0, 1; - %cmp/u; - %jmp/1 T_11.8, 6; - %dup/vec4; - %pushi/vec4 0, 0, 1; - %cmp/u; - %jmp/1 T_11.9, 6; - %jmp T_11.10; -T_11.8 ; - %load/vec4 v0000000001339450_0; - %parti/s 1, 15, 5; - %replicate 16; - %load/vec4 v0000000001339450_0; - %parti/s 16, 0, 2; - %concat/vec4; draw_concat_vec4 - %assign/vec4 v0000000001337800_0, 0; - %jmp T_11.10; -T_11.9 ; - %load/vec4 v000000000133a670_0; - %assign/vec4 v0000000001337800_0, 0; - %jmp T_11.10; -T_11.10 ; - %pop/vec4 1; - %jmp T_11; - .thread T_11; - .scope S_0000000000905bd0; -T_12 ; - %vpi_call/w 3 36 "$dumpfile", "mips_cpu_harvard.vcd" {0 0 0}; - %vpi_call/w 3 37 "$dumpvars", 32'sb00000000000000000000000000000000, S_0000000000905bd0 {0 0 0}; - %pushi/vec4 0, 0, 1; - %store/vec4 v000000000133b340_0, 0, 1; - %pushi/vec4 100, 0, 32; -T_12.0 %dup/vec4; - %pushi/vec4 0, 0, 32; - %cmp/s; - %jmp/1xz T_12.1, 5; - %jmp/1 T_12.1, 4; - %pushi/vec4 1, 0, 32; - %sub; - %delay 10, 0; - %load/vec4 v000000000133b340_0; - %nor/r; - %store/vec4 v000000000133b340_0, 0, 1; - %delay 10, 0; - %load/vec4 v000000000133b340_0; - %nor/r; - %store/vec4 v000000000133b340_0, 0, 1; - %jmp T_12.0; -T_12.1 ; - %pop/vec4 1; - %vpi_call/w 3 47 "$fatal", 32'sb00000000000000000000000000000010, "Simulation did not finish within %d cycles.", P_0000000000934188 {0 0 0}; - %end; - .thread T_12; - .scope S_0000000000905bd0; -T_13 ; - %vpi_call/w 3 51 "$display", "Initial Reset 0" {0 0 0}; - %pushi/vec4 0, 0, 1; - %assign/vec4 v000000000133ba20_0, 0; - %vpi_call/w 3 55 "$display", "Initial Reset 1" {0 0 0}; - %wait E_000000000093f380; - %pushi/vec4 1, 0, 1; - %assign/vec4 v000000000133ba20_0, 0; - %vpi_call/w 3 59 "$display", "Initial Reset 0: Start Program" {0 0 0}; - %wait E_000000000093f380; - %pushi/vec4 0, 0, 1; - %assign/vec4 v000000000133ba20_0, 0; - %wait E_000000000093f380; - %load/vec4 v000000000133ce20_0; - %pad/u 32; - %cmpi/e 1, 0, 32; - %jmp/0xz T_13.0, 4; - %jmp T_13.1; -T_13.0 ; - %vpi_call/w 3 65 "$display", "TB: CPU did not set active=1 after reset." {0 0 0}; -T_13.1 ; -T_13.2 ; - %load/vec4 v000000000133ce20_0; - %flag_set/vec4 8; - %jmp/0xz T_13.3, 8; - %wait E_000000000093f380; - %vpi_call/w 3 71 "$display", "Reg File Write data: %d", v0000000001339810_0 {0 0 0}; - %jmp T_13.2; -T_13.3 ; - %wait E_000000000093f380; - %vpi_call/w 3 74 "$display", "TB: finished; active=0" {0 0 0}; - %vpi_call/w 3 75 "$display", "Output:" {0 0 0}; - %vpi_call/w 3 76 "$display", "%d", v000000000133c240_0 {0 0 0}; - %vpi_call/w 3 77 "$finish" {0 0 0}; - %end; - .thread T_13; -# The file index is used to find the file name in the following table. -:file_names 10; - "N/A"; - ""; - "-"; - "testbench/mips_cpu_harvard_tb.v"; - "rtl/mips_cpu_harvard.v"; - "rtl/mips_cpu_alu.v"; - "rtl/mips_cpu_control.v"; - "rtl/mips_cpu_pc.v"; - "rtl/mips_cpu_regfile.v"; - "rtl/mips_cpu_memory.v"; diff --git a/inputs/add.log.txt b/inputs/add.log.txt deleted file mode 100644 index 71f600f..0000000 --- a/inputs/add.log.txt +++ /dev/null @@ -1,288 +0,0 @@ -RAM: Loading RAM contents from inputs/add.txt -ERROR: rtl/mips_cpu_memory.v:33: $readmemh: Unable to open inputs/add.txt for reading. -byte +bfc00000: 00000000 -byte +bfc00004: 00000000 -byte +bfc00008: 00000000 -byte +bfc0000c: 00000000 -byte +bfc00010: 00000000 -byte +bfc00014: 00000000 -byte +bfc00018: 00000000 -byte +bfc0001c: 00000000 -byte +bfc00020: 00000000 -byte +bfc00024: 00000000 -byte +bfc00028: 00000000 -byte +bfc0002c: 00000000 -byte +bfc00030: 00000000 -byte +bfc00034: 00000000 -byte +bfc00038: 00000000 -byte +bfc0003c: 00000000 -byte +bfc00040: 00000000 -byte +bfc00044: 00000000 -byte +bfc00048: 00000000 -byte +bfc0004c: 00000000 -byte +bfc00050: 00000000 -byte +bfc00054: 00000000 -byte +bfc00058: 00000000 -byte +bfc0005c: 00000000 -byte +bfc00060: 00000000 -byte +bfc00064: 00000000 -byte +bfc00068: 00000000 -byte +bfc0006c: 00000000 -byte +bfc00070: 00000000 -byte +bfc00074: 00000000 -byte +bfc00078: 00000000 -byte +bfc0007c: 00000000 -byte +bfc00080: 00000000 -byte +bfc00084: 00000000 -byte +bfc00088: 00000000 -byte +bfc0008c: 00000000 -byte +bfc00090: 00000000 -byte +bfc00094: 00000000 -byte +bfc00098: 00000000 -byte +bfc0009c: 00000000 -byte +bfc000a0: 00000000 -byte +bfc000a4: 00000000 -byte +bfc000a8: 00000000 -byte +bfc000ac: 00000000 -byte +bfc000b0: 00000000 -byte +bfc000b4: 00000000 -byte +bfc000b8: 00000000 -byte +bfc000bc: 00000000 -byte +bfc000c0: 00000000 -byte +bfc000c4: 00000000 -byte +bfc000c8: 00000000 -byte +bfc000cc: 00000000 -byte +bfc000d0: 00000000 -byte +bfc000d4: 00000000 -byte +bfc000d8: 00000000 -byte +bfc000dc: 00000000 -byte +bfc000e0: 00000000 -byte +bfc000e4: 00000000 -byte +bfc000e8: 00000000 -byte +bfc000ec: 00000000 -byte +bfc000f0: 00000000 -byte +bfc000f4: 00000000 -byte +bfc000f8: 00000000 -byte +bfc000fc: 00000000 -VCD info: dumpfile mips_cpu_harvard.vcd opened for output. -Initial Reset 0 -Initial Reset 1 -Opcode: xx -xxxxxxxxxxxxxx -Opcode: 00 -CTRLREGDST: Rd -Memory read disabled -Initial Reset 0: Start Program -New PC from xxxxxxxx to bfc00000 -Opcode: 00 -CTRLREGDST: Rd -Memory read disabled -Opcode: xx -xxxxxxxxxxxxxx -Opcode: xx -xxxxxxxxxxxxxx -Opcode: 00 -CTRLREGDST: Rd -Memory read disabled -New PC from bfc00000 to bfc00000 -New PC from bfc00000 to bfc00004 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00004 to bfc00004 -New PC from bfc00004 to bfc00008 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00008 to bfc00008 -New PC from bfc00008 to bfc0000c -Reg File Write data: x -Reg File Write data: x -New PC from bfc0000c to bfc0000c -New PC from bfc0000c to bfc00010 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00010 to bfc00010 -New PC from bfc00010 to bfc00014 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00014 to bfc00014 -New PC from bfc00014 to bfc00018 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00018 to bfc00018 -New PC from bfc00018 to bfc0001c -Reg File Write data: x -Reg File Write data: x -New PC from bfc0001c to bfc0001c -New PC from bfc0001c to bfc00020 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00020 to bfc00020 -New PC from bfc00020 to bfc00024 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00024 to bfc00024 -New PC from bfc00024 to bfc00028 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00028 to bfc00028 -New PC from bfc00028 to bfc0002c -Reg File Write data: x -Reg File Write data: x -New PC from bfc0002c to bfc0002c -New PC from bfc0002c to bfc00030 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00030 to bfc00030 -New PC from bfc00030 to bfc00034 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00034 to bfc00034 -New PC from bfc00034 to bfc00038 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00038 to bfc00038 -New PC from bfc00038 to bfc0003c -Reg File Write data: x -Reg File Write data: x -New PC from bfc0003c to bfc0003c -Opcode: 00 -CTRLREGDST: Rd -Memory read disabled -Opcode: xx -xxxxxxxxxxxxxx -New PC from bfc0003c to bfc00040 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00040 to bfc00040 -New PC from bfc00040 to bfc00044 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00044 to bfc00044 -New PC from bfc00044 to bfc00048 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00048 to bfc00048 -New PC from bfc00048 to bfc0004c -Reg File Write data: x -Reg File Write data: x -New PC from bfc0004c to bfc0004c -New PC from bfc0004c to bfc00050 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00050 to bfc00050 -New PC from bfc00050 to bfc00054 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00054 to bfc00054 -New PC from bfc00054 to bfc00058 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00058 to bfc00058 -New PC from bfc00058 to bfc0005c -Reg File Write data: x -Reg File Write data: x -New PC from bfc0005c to bfc0005c -New PC from bfc0005c to bfc00060 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00060 to bfc00060 -New PC from bfc00060 to bfc00064 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00064 to bfc00064 -New PC from bfc00064 to bfc00068 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00068 to bfc00068 -New PC from bfc00068 to bfc0006c -Reg File Write data: x -Reg File Write data: x -New PC from bfc0006c to bfc0006c -New PC from bfc0006c to bfc00070 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00070 to bfc00070 -New PC from bfc00070 to bfc00074 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00074 to bfc00074 -New PC from bfc00074 to bfc00078 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00078 to bfc00078 -New PC from bfc00078 to bfc0007c -Reg File Write data: x -Reg File Write data: x -New PC from bfc0007c to bfc0007c -New PC from bfc0007c to bfc00080 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00080 to bfc00080 -New PC from bfc00080 to bfc00084 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00084 to bfc00084 -New PC from bfc00084 to bfc00088 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00088 to bfc00088 -New PC from bfc00088 to bfc0008c -Reg File Write data: x -Reg File Write data: x -New PC from bfc0008c to bfc0008c -New PC from bfc0008c to bfc00090 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00090 to bfc00090 -New PC from bfc00090 to bfc00094 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00094 to bfc00094 -New PC from bfc00094 to bfc00098 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00098 to bfc00098 -New PC from bfc00098 to bfc0009c -Reg File Write data: x -Reg File Write data: x -New PC from bfc0009c to bfc0009c -New PC from bfc0009c to bfc000a0 -Reg File Write data: x -Reg File Write data: x -New PC from bfc000a0 to bfc000a0 -New PC from bfc000a0 to bfc000a4 -Reg File Write data: x -Reg File Write data: x -New PC from bfc000a4 to bfc000a4 -New PC from bfc000a4 to bfc000a8 -Reg File Write data: x -Reg File Write data: x -New PC from bfc000a8 to bfc000a8 -New PC from bfc000a8 to bfc000ac -Reg File Write data: x -Reg File Write data: x -New PC from bfc000ac to bfc000ac -New PC from bfc000ac to bfc000b0 -Reg File Write data: x -Reg File Write data: x -New PC from bfc000b0 to bfc000b0 -New PC from bfc000b0 to bfc000b4 -Reg File Write data: x -Reg File Write data: x -New PC from bfc000b4 to bfc000b4 -New PC from bfc000b4 to bfc000b8 -Reg File Write data: x -Reg File Write data: x -New PC from bfc000b8 to bfc000b8 -New PC from bfc000b8 to bfc000bc -Reg File Write data: x -Reg File Write data: x -New PC from bfc000bc to bfc000bc -New PC from bfc000bc to bfc000c0 -Reg File Write data: x -Reg File Write data: x -New PC from bfc000c0 to bfc000c0 -New PC from bfc000c0 to bfc000c4 -Reg File Write data: x -FATAL: testbench/mips_cpu_harvard_tb.v:47: Simulation did not finish within 100 cycles. - Time: 2000 Scope: mips_cpu_harvard_tb diff --git a/inputs/add.out.txt b/inputs/add.out.txt deleted file mode 100644 index 94d77b8..0000000 --- a/inputs/add.out.txt +++ /dev/null @@ -1 +0,0 @@ - Time: 2000 Scope: mips_cpu_harvard_tb diff --git a/inputs/addiu.log.txt b/inputs/addiu.log.txt deleted file mode 100644 index cca48d6..0000000 --- a/inputs/addiu.log.txt +++ /dev/null @@ -1,181 +0,0 @@ -RAM: Loading RAM contents from inputs/addiu.txt -WARNING: rtl/mips_cpu_memory.v:33: $readmemh(inputs/addiu.txt): Not enough words in the file for the requested range [0:63]. -byte +bfc00000: 3404000a -byte +bfc00004: 24820014 -byte +bfc00008: 00000008 -byte +bfc0000c: 00000000 -byte +bfc00010: 00000000 -byte +bfc00014: 00000000 -byte +bfc00018: 00000000 -byte +bfc0001c: 00000000 -byte +bfc00020: 00000000 -byte +bfc00024: 00000000 -byte +bfc00028: 00000000 -byte +bfc0002c: 00000000 -byte +bfc00030: 00000000 -byte +bfc00034: 00000000 -byte +bfc00038: 00000000 -byte +bfc0003c: 00000000 -byte +bfc00040: 00000000 -byte +bfc00044: 00000000 -byte +bfc00048: 00000000 -byte +bfc0004c: 00000000 -byte +bfc00050: 00000000 -byte +bfc00054: 00000000 -byte +bfc00058: 00000000 -byte +bfc0005c: 00000000 -byte +bfc00060: 00000000 -byte +bfc00064: 00000000 -byte +bfc00068: 00000000 -byte +bfc0006c: 00000000 -byte +bfc00070: 00000000 -byte +bfc00074: 00000000 -byte +bfc00078: 00000000 -byte +bfc0007c: 00000000 -byte +bfc00080: 00000000 -byte +bfc00084: 00000000 -byte +bfc00088: 00000000 -byte +bfc0008c: 00000000 -byte +bfc00090: 00000000 -byte +bfc00094: 00000000 -byte +bfc00098: 00000000 -byte +bfc0009c: 00000000 -byte +bfc000a0: 00000000 -byte +bfc000a4: 00000000 -byte +bfc000a8: 00000000 -byte +bfc000ac: 00000000 -byte +bfc000b0: 00000000 -byte +bfc000b4: 00000000 -byte +bfc000b8: 00000000 -byte +bfc000bc: 00000000 -byte +bfc000c0: 00000000 -byte +bfc000c4: 00000000 -byte +bfc000c8: 00000000 -byte +bfc000cc: 00000000 -byte +bfc000d0: 00000000 -byte +bfc000d4: 00000000 -byte +bfc000d8: 00000000 -byte +bfc000dc: 00000000 -byte +bfc000e0: 00000000 -byte +bfc000e4: 00000000 -byte +bfc000e8: 00000000 -byte +bfc000ec: 00000000 -byte +bfc000f0: 00000000 -byte +bfc000f4: 00000000 -byte +bfc000f8: 00000000 -byte +bfc000fc: 00000000 -MEM: Loading MEM contents from inputs/addiu.data.txt -WARNING: rtl/mips_cpu_memory.v:42: $readmemh(inputs/addiu.data.txt): Not enough words in the file for the requested range [0:63]. -byte +00001000: 12341234 -byte +00001004: 01010101 -byte +00001008: 12312312 -byte +0000100c: 88888888 -byte +00001010: 00000000 -byte +00001014: 00000000 -byte +00001018: 00000000 -byte +0000101c: 00000000 -byte +00001020: 00000000 -byte +00001024: 00000000 -byte +00001028: 00000000 -byte +0000102c: 00000000 -byte +00001030: 00000000 -byte +00001034: 00000000 -byte +00001038: 00000000 -byte +0000103c: 00000000 -byte +00001040: 00000000 -byte +00001044: 00000000 -byte +00001048: 00000000 -byte +0000104c: 00000000 -byte +00001050: 00000000 -byte +00001054: 00000000 -byte +00001058: 00000000 -byte +0000105c: 00000000 -byte +00001060: 00000000 -byte +00001064: 00000000 -byte +00001068: 00000000 -byte +0000106c: 00000000 -byte +00001070: 00000000 -byte +00001074: 00000000 -byte +00001078: 00000000 -byte +0000107c: 00000000 -byte +00001080: 00000000 -byte +00001084: 00000000 -byte +00001088: 00000000 -byte +0000108c: 00000000 -byte +00001090: 00000000 -byte +00001094: 00000000 -byte +00001098: 00000000 -byte +0000109c: 00000000 -byte +000010a0: 00000000 -byte +000010a4: 00000000 -byte +000010a8: 00000000 -byte +000010ac: 00000000 -byte +000010b0: 00000000 -byte +000010b4: 00000000 -byte +000010b8: 00000000 -byte +000010bc: 00000000 -byte +000010c0: 00000000 -byte +000010c4: 00000000 -byte +000010c8: 00000000 -byte +000010cc: 00000000 -byte +000010d0: 00000000 -byte +000010d4: 00000000 -byte +000010d8: 00000000 -byte +000010dc: 00000000 -byte +000010e0: 00000000 -byte +000010e4: 00000000 -byte +000010e8: 00000000 -byte +000010ec: 00000000 -byte +000010f0: 00000000 -byte +000010f4: 00000000 -byte +000010f8: 00000000 -byte +000010fc: 00000000 -VCD info: dumpfile mips_cpu_harvard.vcd opened for output. -Initial Reset 0 -Initial Reset 1 -Opcode: xx -xxxxxxxxxxxxxx -Opcode: 0d -CTRLREGDST: Rt -Memory read disabled -Initial Reset 0: Start Program -New PC from xxxxxxxx to bfc00000 -Opcode: 0d -CTRLREGDST: Rt -Memory read disabled -Opcode: xx -xxxxxxxxxxxxxx -Opcode: xx -xxxxxxxxxxxxxx -Opcode: 0d -CTRLREGDST: Rt -Memory read disabled -New PC from bfc00000 to bfc00000 -Opcode: 0d -CTRLREGDST: Rt -Memory read disabled -Opcode: 09 -CTRLREGDST: Rt -Memory read disabled -ALU OP = 0 (ADDU/ADDIU) -New PC from bfc00000 to bfc00004 -Reg File Write data: 30 -Reg File Write data: 30 -New PC from bfc00004 to bfc00004 -Opcode: 09 -CTRLREGDST: Rt -Memory read disabled -ALU OP = 0 (ADDU/ADDIU) -Opcode: 00 -xxxxxxxxxxxxxx -JUMP REGISTER -Reg File Write data: 18 -Opcode: 00 -xxxxxxxxxxxxxx -Opcode: xx -xxxxxxxxxxxxxx -Reg File Write data: 18 -Reg File Write data: 18 -TB: CPU Halt; active=0 -Output: - 30 diff --git a/inputs/addiu.out.txt b/inputs/addiu.out.txt deleted file mode 100644 index eaeab98..0000000 --- a/inputs/addiu.out.txt +++ /dev/null @@ -1 +0,0 @@ - 30 diff --git a/inputs/addu.log.txt b/inputs/addu.log.txt deleted file mode 100644 index 6f3b3e9..0000000 --- a/inputs/addu.log.txt +++ /dev/null @@ -1,125 +0,0 @@ -RAM: Loading RAM contents from inputs/addu.txt -WARNING: rtl/mips_cpu_memory.v:33: $readmemh(inputs/addu.txt): Not enough words in the file for the requested range [0:63]. -byte +bfc00000: 3404ffff -byte +bfc00004: 3405f000 -byte +bfc00008: 00851021 -byte +bfc0000c: 00000008 -byte +bfc00010: 00000000 -byte +bfc00014: 00000000 -byte +bfc00018: 00000000 -byte +bfc0001c: 00000000 -byte +bfc00020: 00000000 -byte +bfc00024: 00000000 -byte +bfc00028: 00000000 -byte +bfc0002c: 00000000 -byte +bfc00030: 00000000 -byte +bfc00034: 00000000 -byte +bfc00038: 00000000 -byte +bfc0003c: 00000000 -byte +bfc00040: 00000000 -byte +bfc00044: 00000000 -byte +bfc00048: 00000000 -byte +bfc0004c: 00000000 -byte +bfc00050: 00000000 -byte +bfc00054: 00000000 -byte +bfc00058: 00000000 -byte +bfc0005c: 00000000 -byte +bfc00060: 00000000 -byte +bfc00064: 00000000 -byte +bfc00068: 00000000 -byte +bfc0006c: 00000000 -byte +bfc00070: 00000000 -byte +bfc00074: 00000000 -byte +bfc00078: 00000000 -byte +bfc0007c: 00000000 -byte +bfc00080: 00000000 -byte +bfc00084: 00000000 -byte +bfc00088: 00000000 -byte +bfc0008c: 00000000 -byte +bfc00090: 00000000 -byte +bfc00094: 00000000 -byte +bfc00098: 00000000 -byte +bfc0009c: 00000000 -byte +bfc000a0: 00000000 -byte +bfc000a4: 00000000 -byte +bfc000a8: 00000000 -byte +bfc000ac: 00000000 -byte +bfc000b0: 00000000 -byte +bfc000b4: 00000000 -byte +bfc000b8: 00000000 -byte +bfc000bc: 00000000 -byte +bfc000c0: 00000000 -byte +bfc000c4: 00000000 -byte +bfc000c8: 00000000 -byte +bfc000cc: 00000000 -byte +bfc000d0: 00000000 -byte +bfc000d4: 00000000 -byte +bfc000d8: 00000000 -byte +bfc000dc: 00000000 -byte +bfc000e0: 00000000 -byte +bfc000e4: 00000000 -byte +bfc000e8: 00000000 -byte +bfc000ec: 00000000 -byte +bfc000f0: 00000000 -byte +bfc000f4: 00000000 -byte +bfc000f8: 00000000 -byte +bfc000fc: 00000000 -VCD info: dumpfile mips_cpu_harvard.vcd opened for output. -Initial Reset 0 -Initial Reset 1 -Opcode: xx -xxxxxxxxxxxxxx -Opcode: 0d -CTRLREGDST: Rt -Memory read disabled -Initial Reset 0: Start Program -New PC from xxxxxxxx to bfc00000 -Opcode: 0d -CTRLREGDST: Rt -Memory read disabled -Opcode: xx -xxxxxxxxxxxxxx -Opcode: xx -xxxxxxxxxxxxxx -Opcode: 0d -CTRLREGDST: Rt -Memory read disabled -New PC from bfc00000 to bfc00000 -Opcode: 0d -CTRLREGDST: Rt -Memory read disabled -Opcode: 0d -CTRLREGDST: Rt -Memory read disabled -New PC from bfc00000 to bfc00004 -Reg File Write data: 4294963200 -Reg File Write data: 4294963200 -New PC from bfc00004 to bfc00004 -Opcode: 0d -CTRLREGDST: Rt -Memory read disabled -Opcode: 00 -CTRLREGDST: Rd -Memory read disabled -ALU OP = 0 (ADDU/ADDIU) -New PC from bfc00004 to bfc00008 -Reg File Write data: 4294963199 -Reg File Write data: 4294963199 -New PC from bfc00008 to bfc00008 -Opcode: 00 -CTRLREGDST: Rd -Memory read disabled -ALU OP = 0 (ADDU/ADDIU) -Opcode: 00 -xxxxxxxxxxxxxx -JUMP REGISTER -Reg File Write data: 4294963199 -Opcode: 00 -xxxxxxxxxxxxxx -Opcode: xx -xxxxxxxxxxxxxx -Reg File Write data: 4294963199 -Reg File Write data: 4294963199 -TB: CPU Halt; active=0 -Output: -4294963199 diff --git a/inputs/addu.out.txt b/inputs/addu.out.txt deleted file mode 100644 index f283749..0000000 --- a/inputs/addu.out.txt +++ /dev/null @@ -1 +0,0 @@ -4294963199 diff --git a/inputs/and.log.txt b/inputs/and.log.txt deleted file mode 100644 index 500bdd7..0000000 --- a/inputs/and.log.txt +++ /dev/null @@ -1,123 +0,0 @@ -RAM: Loading RAM contents from inputs/and.txt -WARNING: rtl/mips_cpu_memory.v:33: $readmemh(inputs/and.txt): Not enough words in the file for the requested range [0:63]. -byte +bfc00000: 3404000a -byte +bfc00004: 3405000f -byte +bfc00008: 00851024 -byte +bfc0000c: 00000008 -byte +bfc00010: 00000000 -byte +bfc00014: 00000000 -byte +bfc00018: 00000000 -byte +bfc0001c: 00000000 -byte +bfc00020: 00000000 -byte +bfc00024: 00000000 -byte +bfc00028: 00000000 -byte +bfc0002c: 00000000 -byte +bfc00030: 00000000 -byte +bfc00034: 00000000 -byte +bfc00038: 00000000 -byte +bfc0003c: 00000000 -byte +bfc00040: 00000000 -byte +bfc00044: 00000000 -byte +bfc00048: 00000000 -byte +bfc0004c: 00000000 -byte +bfc00050: 00000000 -byte +bfc00054: 00000000 -byte +bfc00058: 00000000 -byte +bfc0005c: 00000000 -byte +bfc00060: 00000000 -byte +bfc00064: 00000000 -byte +bfc00068: 00000000 -byte +bfc0006c: 00000000 -byte +bfc00070: 00000000 -byte +bfc00074: 00000000 -byte +bfc00078: 00000000 -byte +bfc0007c: 00000000 -byte +bfc00080: 00000000 -byte +bfc00084: 00000000 -byte +bfc00088: 00000000 -byte +bfc0008c: 00000000 -byte +bfc00090: 00000000 -byte +bfc00094: 00000000 -byte +bfc00098: 00000000 -byte +bfc0009c: 00000000 -byte +bfc000a0: 00000000 -byte +bfc000a4: 00000000 -byte +bfc000a8: 00000000 -byte +bfc000ac: 00000000 -byte +bfc000b0: 00000000 -byte +bfc000b4: 00000000 -byte +bfc000b8: 00000000 -byte +bfc000bc: 00000000 -byte +bfc000c0: 00000000 -byte +bfc000c4: 00000000 -byte +bfc000c8: 00000000 -byte +bfc000cc: 00000000 -byte +bfc000d0: 00000000 -byte +bfc000d4: 00000000 -byte +bfc000d8: 00000000 -byte +bfc000dc: 00000000 -byte +bfc000e0: 00000000 -byte +bfc000e4: 00000000 -byte +bfc000e8: 00000000 -byte +bfc000ec: 00000000 -byte +bfc000f0: 00000000 -byte +bfc000f4: 00000000 -byte +bfc000f8: 00000000 -byte +bfc000fc: 00000000 -VCD info: dumpfile mips_cpu_harvard.vcd opened for output. -Initial Reset 0 -Initial Reset 1 -Opcode: xx -xxxxxxxxxxxxxx -Opcode: 0d -CTRLREGDST: Rt -Memory read disabled -Initial Reset 0: Start Program -New PC from xxxxxxxx to bfc00000 -Opcode: 0d -CTRLREGDST: Rt -Memory read disabled -Opcode: xx -xxxxxxxxxxxxxx -Opcode: xx -xxxxxxxxxxxxxx -Opcode: 0d -CTRLREGDST: Rt -Memory read disabled -New PC from bfc00000 to bfc00000 -Opcode: 0d -CTRLREGDST: Rt -Memory read disabled -Opcode: 0d -CTRLREGDST: Rt -Memory read disabled -New PC from bfc00000 to bfc00004 -Reg File Write data: 15 -Reg File Write data: 15 -New PC from bfc00004 to bfc00004 -Opcode: 0d -CTRLREGDST: Rt -Memory read disabled -Opcode: 00 -CTRLREGDST: Rd -Memory read disabled -New PC from bfc00004 to bfc00008 -Reg File Write data: 10 -Reg File Write data: 10 -New PC from bfc00008 to bfc00008 -Opcode: 00 -CTRLREGDST: Rd -Memory read disabled -Opcode: 00 -xxxxxxxxxxxxxx -JUMP REGISTER -Reg File Write data: 10 -Opcode: 00 -xxxxxxxxxxxxxx -Opcode: xx -xxxxxxxxxxxxxx -Reg File Write data: 10 -Reg File Write data: 10 -TB: CPU Halt; active=0 -Output: - 10 diff --git a/inputs/and.out.txt b/inputs/and.out.txt deleted file mode 100644 index 1c4ee0b..0000000 --- a/inputs/and.out.txt +++ /dev/null @@ -1 +0,0 @@ - 10 diff --git a/inputs/andi.log.txt b/inputs/andi.log.txt deleted file mode 100644 index 60b2570..0000000 --- a/inputs/andi.log.txt +++ /dev/null @@ -1,113 +0,0 @@ -RAM: Loading RAM contents from inputs/andi.txt -WARNING: rtl/mips_cpu_memory.v:33: $readmemh(inputs/andi.txt): Not enough words in the file for the requested range [0:63]. -byte +bfc00000: 34040005 -byte +bfc00004: 3082000f -byte +bfc00008: 00000008 -byte +bfc0000c: 00000000 -byte +bfc00010: 00000000 -byte +bfc00014: 00000000 -byte +bfc00018: 00000000 -byte +bfc0001c: 00000000 -byte +bfc00020: 00000000 -byte +bfc00024: 00000000 -byte +bfc00028: 00000000 -byte +bfc0002c: 00000000 -byte +bfc00030: 00000000 -byte +bfc00034: 00000000 -byte +bfc00038: 00000000 -byte +bfc0003c: 00000000 -byte +bfc00040: 00000000 -byte +bfc00044: 00000000 -byte +bfc00048: 00000000 -byte +bfc0004c: 00000000 -byte +bfc00050: 00000000 -byte +bfc00054: 00000000 -byte +bfc00058: 00000000 -byte +bfc0005c: 00000000 -byte +bfc00060: 00000000 -byte +bfc00064: 00000000 -byte +bfc00068: 00000000 -byte +bfc0006c: 00000000 -byte +bfc00070: 00000000 -byte +bfc00074: 00000000 -byte +bfc00078: 00000000 -byte +bfc0007c: 00000000 -byte +bfc00080: 00000000 -byte +bfc00084: 00000000 -byte +bfc00088: 00000000 -byte +bfc0008c: 00000000 -byte +bfc00090: 00000000 -byte +bfc00094: 00000000 -byte +bfc00098: 00000000 -byte +bfc0009c: 00000000 -byte +bfc000a0: 00000000 -byte +bfc000a4: 00000000 -byte +bfc000a8: 00000000 -byte +bfc000ac: 00000000 -byte +bfc000b0: 00000000 -byte +bfc000b4: 00000000 -byte +bfc000b8: 00000000 -byte +bfc000bc: 00000000 -byte +bfc000c0: 00000000 -byte +bfc000c4: 00000000 -byte +bfc000c8: 00000000 -byte +bfc000cc: 00000000 -byte +bfc000d0: 00000000 -byte +bfc000d4: 00000000 -byte +bfc000d8: 00000000 -byte +bfc000dc: 00000000 -byte +bfc000e0: 00000000 -byte +bfc000e4: 00000000 -byte +bfc000e8: 00000000 -byte +bfc000ec: 00000000 -byte +bfc000f0: 00000000 -byte +bfc000f4: 00000000 -byte +bfc000f8: 00000000 -byte +bfc000fc: 00000000 -VCD info: dumpfile mips_cpu_harvard.vcd opened for output. -Initial Reset 0 -Initial Reset 1 -Opcode: xx -xxxxxxxxxxxxxx -Opcode: 0d -CTRLREGDST: Rt -Memory read disabled -Initial Reset 0: Start Program -New PC from xxxxxxxx to bfc00000 -Opcode: 0d -CTRLREGDST: Rt -Memory read disabled -Opcode: xx -xxxxxxxxxxxxxx -Opcode: xx -xxxxxxxxxxxxxx -Opcode: 0d -CTRLREGDST: Rt -Memory read disabled -New PC from bfc00000 to bfc00000 -Opcode: 0d -CTRLREGDST: Rt -Memory read disabled -Opcode: 0c -CTRLREGDST: Rt -Memory read disabled -New PC from bfc00000 to bfc00004 -Reg File Write data: 5 -Reg File Write data: 5 -New PC from bfc00004 to bfc00004 -Opcode: 0c -CTRLREGDST: Rt -Memory read disabled -Opcode: 00 -xxxxxxxxxxxxxx -JUMP REGISTER -Reg File Write data: 0 -Opcode: 00 -xxxxxxxxxxxxxx -Opcode: xx -xxxxxxxxxxxxxx -Reg File Write data: 0 -Reg File Write data: 0 -TB: CPU Halt; active=0 -Output: - 5 diff --git a/inputs/andi.out.txt b/inputs/andi.out.txt deleted file mode 100644 index ffd9644..0000000 --- a/inputs/andi.out.txt +++ /dev/null @@ -1 +0,0 @@ - 5 diff --git a/inputs/andiu.log.txt b/inputs/andiu.log.txt deleted file mode 100644 index 673ec1c..0000000 --- a/inputs/andiu.log.txt +++ /dev/null @@ -1,288 +0,0 @@ -RAM: Loading RAM contents from inputs/andiu.txt -ERROR: rtl/mips_cpu_memory.v:33: $readmemh: Unable to open inputs/andiu.txt for reading. -byte +bfc00000: 00000000 -byte +bfc00004: 00000000 -byte +bfc00008: 00000000 -byte +bfc0000c: 00000000 -byte +bfc00010: 00000000 -byte +bfc00014: 00000000 -byte +bfc00018: 00000000 -byte +bfc0001c: 00000000 -byte +bfc00020: 00000000 -byte +bfc00024: 00000000 -byte +bfc00028: 00000000 -byte +bfc0002c: 00000000 -byte +bfc00030: 00000000 -byte +bfc00034: 00000000 -byte +bfc00038: 00000000 -byte +bfc0003c: 00000000 -byte +bfc00040: 00000000 -byte +bfc00044: 00000000 -byte +bfc00048: 00000000 -byte +bfc0004c: 00000000 -byte +bfc00050: 00000000 -byte +bfc00054: 00000000 -byte +bfc00058: 00000000 -byte +bfc0005c: 00000000 -byte +bfc00060: 00000000 -byte +bfc00064: 00000000 -byte +bfc00068: 00000000 -byte +bfc0006c: 00000000 -byte +bfc00070: 00000000 -byte +bfc00074: 00000000 -byte +bfc00078: 00000000 -byte +bfc0007c: 00000000 -byte +bfc00080: 00000000 -byte +bfc00084: 00000000 -byte +bfc00088: 00000000 -byte +bfc0008c: 00000000 -byte +bfc00090: 00000000 -byte +bfc00094: 00000000 -byte +bfc00098: 00000000 -byte +bfc0009c: 00000000 -byte +bfc000a0: 00000000 -byte +bfc000a4: 00000000 -byte +bfc000a8: 00000000 -byte +bfc000ac: 00000000 -byte +bfc000b0: 00000000 -byte +bfc000b4: 00000000 -byte +bfc000b8: 00000000 -byte +bfc000bc: 00000000 -byte +bfc000c0: 00000000 -byte +bfc000c4: 00000000 -byte +bfc000c8: 00000000 -byte +bfc000cc: 00000000 -byte +bfc000d0: 00000000 -byte +bfc000d4: 00000000 -byte +bfc000d8: 00000000 -byte +bfc000dc: 00000000 -byte +bfc000e0: 00000000 -byte +bfc000e4: 00000000 -byte +bfc000e8: 00000000 -byte +bfc000ec: 00000000 -byte +bfc000f0: 00000000 -byte +bfc000f4: 00000000 -byte +bfc000f8: 00000000 -byte +bfc000fc: 00000000 -VCD info: dumpfile mips_cpu_harvard.vcd opened for output. -Initial Reset 0 -Initial Reset 1 -Opcode: xx -xxxxxxxxxxxxxx -Opcode: 00 -CTRLREGDST: Rd -Memory read disabled -Initial Reset 0: Start Program -New PC from xxxxxxxx to bfc00000 -Opcode: 00 -CTRLREGDST: Rd -Memory read disabled -Opcode: xx -xxxxxxxxxxxxxx -Opcode: xx -xxxxxxxxxxxxxx -Opcode: 00 -CTRLREGDST: Rd -Memory read disabled -New PC from bfc00000 to bfc00000 -New PC from bfc00000 to bfc00004 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00004 to bfc00004 -New PC from bfc00004 to bfc00008 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00008 to bfc00008 -New PC from bfc00008 to bfc0000c -Reg File Write data: x -Reg File Write data: x -New PC from bfc0000c to bfc0000c -New PC from bfc0000c to bfc00010 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00010 to bfc00010 -New PC from bfc00010 to bfc00014 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00014 to bfc00014 -New PC from bfc00014 to bfc00018 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00018 to bfc00018 -New PC from bfc00018 to bfc0001c -Reg File Write data: x -Reg File Write data: x -New PC from bfc0001c to bfc0001c -New PC from bfc0001c to bfc00020 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00020 to bfc00020 -New PC from bfc00020 to bfc00024 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00024 to bfc00024 -New PC from bfc00024 to bfc00028 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00028 to bfc00028 -New PC from bfc00028 to bfc0002c -Reg File Write data: x -Reg File Write data: x -New PC from bfc0002c to bfc0002c -New PC from bfc0002c to bfc00030 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00030 to bfc00030 -New PC from bfc00030 to bfc00034 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00034 to bfc00034 -New PC from bfc00034 to bfc00038 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00038 to bfc00038 -New PC from bfc00038 to bfc0003c -Reg File Write data: x -Reg File Write data: x -New PC from bfc0003c to bfc0003c -Opcode: 00 -CTRLREGDST: Rd -Memory read disabled -Opcode: xx -xxxxxxxxxxxxxx -New PC from bfc0003c to bfc00040 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00040 to bfc00040 -New PC from bfc00040 to bfc00044 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00044 to bfc00044 -New PC from bfc00044 to bfc00048 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00048 to bfc00048 -New PC from bfc00048 to bfc0004c -Reg File Write data: x -Reg File Write data: x -New PC from bfc0004c to bfc0004c -New PC from bfc0004c to bfc00050 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00050 to bfc00050 -New PC from bfc00050 to bfc00054 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00054 to bfc00054 -New PC from bfc00054 to bfc00058 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00058 to bfc00058 -New PC from bfc00058 to bfc0005c -Reg File Write data: x -Reg File Write data: x -New PC from bfc0005c to bfc0005c -New PC from bfc0005c to bfc00060 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00060 to bfc00060 -New PC from bfc00060 to bfc00064 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00064 to bfc00064 -New PC from bfc00064 to bfc00068 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00068 to bfc00068 -New PC from bfc00068 to bfc0006c -Reg File Write data: x -Reg File Write data: x -New PC from bfc0006c to bfc0006c -New PC from bfc0006c to bfc00070 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00070 to bfc00070 -New PC from bfc00070 to bfc00074 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00074 to bfc00074 -New PC from bfc00074 to bfc00078 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00078 to bfc00078 -New PC from bfc00078 to bfc0007c -Reg File Write data: x -Reg File Write data: x -New PC from bfc0007c to bfc0007c -New PC from bfc0007c to bfc00080 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00080 to bfc00080 -New PC from bfc00080 to bfc00084 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00084 to bfc00084 -New PC from bfc00084 to bfc00088 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00088 to bfc00088 -New PC from bfc00088 to bfc0008c -Reg File Write data: x -Reg File Write data: x -New PC from bfc0008c to bfc0008c -New PC from bfc0008c to bfc00090 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00090 to bfc00090 -New PC from bfc00090 to bfc00094 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00094 to bfc00094 -New PC from bfc00094 to bfc00098 -Reg File Write data: x -Reg File Write data: x -New PC from bfc00098 to bfc00098 -New PC from bfc00098 to bfc0009c -Reg File Write data: x -Reg File Write data: x -New PC from bfc0009c to bfc0009c -New PC from bfc0009c to bfc000a0 -Reg File Write data: x -Reg File Write data: x -New PC from bfc000a0 to bfc000a0 -New PC from bfc000a0 to bfc000a4 -Reg File Write data: x -Reg File Write data: x -New PC from bfc000a4 to bfc000a4 -New PC from bfc000a4 to bfc000a8 -Reg File Write data: x -Reg File Write data: x -New PC from bfc000a8 to bfc000a8 -New PC from bfc000a8 to bfc000ac -Reg File Write data: x -Reg File Write data: x -New PC from bfc000ac to bfc000ac -New PC from bfc000ac to bfc000b0 -Reg File Write data: x -Reg File Write data: x -New PC from bfc000b0 to bfc000b0 -New PC from bfc000b0 to bfc000b4 -Reg File Write data: x -Reg File Write data: x -New PC from bfc000b4 to bfc000b4 -New PC from bfc000b4 to bfc000b8 -Reg File Write data: x -Reg File Write data: x -New PC from bfc000b8 to bfc000b8 -New PC from bfc000b8 to bfc000bc -Reg File Write data: x -Reg File Write data: x -New PC from bfc000bc to bfc000bc -New PC from bfc000bc to bfc000c0 -Reg File Write data: x -Reg File Write data: x -New PC from bfc000c0 to bfc000c0 -New PC from bfc000c0 to bfc000c4 -Reg File Write data: x -FATAL: testbench/mips_cpu_harvard_tb.v:47: Simulation did not finish within 100 cycles. - Time: 2000 Scope: mips_cpu_harvard_tb diff --git a/inputs/andiu.out.txt b/inputs/andiu.out.txt deleted file mode 100644 index 94d77b8..0000000 --- a/inputs/andiu.out.txt +++ /dev/null @@ -1 +0,0 @@ - Time: 2000 Scope: mips_cpu_harvard_tb diff --git a/inputs/beq.ref.txt b/inputs/beq.ref.txt new file mode 100644 index 0000000..56a6051 --- /dev/null +++ b/inputs/beq.ref.txt @@ -0,0 +1 @@ +1 \ No newline at end of file diff --git a/inputs/beq.txt b/inputs/beq.txt index f530cb6..88f0cfd 100644 --- a/inputs/beq.txt +++ b/inputs/beq.txt @@ -1,7 +1,8 @@ -50004043 -50005043 -20005801 -00006C42 -80000000 -10002043 -80000000 +34040005 +34050005 +10850003 +00000000 +00000008 +00000000 +34020001 +00000008 \ No newline at end of file diff --git a/inputs/bgez.ref.txt b/inputs/bgez.ref.txt new file mode 100644 index 0000000..56a6051 --- /dev/null +++ b/inputs/bgez.ref.txt @@ -0,0 +1 @@ +1 \ No newline at end of file diff --git a/inputs/bgez.txt b/inputs/bgez.txt index b548261..aae9c5c 100644 --- a/inputs/bgez.txt +++ b/inputs/bgez.txt @@ -1,6 +1,7 @@ -30004043 -20001840 -00006C42 -80000000 -10002043 -80000000 +34040003 +04810003 +00000000 +00000008 +00000000 +34020001 +00000008 \ No newline at end of file diff --git a/inputs/bgezal.ref.txt b/inputs/bgezal.ref.txt new file mode 100644 index 0000000..d8263ee --- /dev/null +++ b/inputs/bgezal.ref.txt @@ -0,0 +1 @@ +2 \ No newline at end of file diff --git a/inputs/bgezal.txt b/inputs/bgezal.txt index 9b38b33..ce16a2b 100644 --- a/inputs/bgezal.txt +++ b/inputs/bgezal.txt @@ -1,7 +1,8 @@ -30004043 -30001940 -00006C42 -10002442 -80000000 -10002043 -80000000 +34040003 +04910004 +00000000 +24420001 +00000008 +00000000 +34020001 +03E00008 \ No newline at end of file diff --git a/inputs/bgtz.ref.txt b/inputs/bgtz.ref.txt new file mode 100644 index 0000000..56a6051 --- /dev/null +++ b/inputs/bgtz.ref.txt @@ -0,0 +1 @@ +1 \ No newline at end of file diff --git a/inputs/bgtz.txt b/inputs/bgtz.txt index ec9fef1..46b5016 100644 --- a/inputs/bgtz.txt +++ b/inputs/bgtz.txt @@ -1,6 +1,7 @@ -30004043 -200008C1 -00006C42 -80000000 -10002043 -80000000 +34040003 +1C800003 +00000000 +00000008 +00000000 +34020001 +00000008 diff --git a/inputs/blez.ref.txt b/inputs/blez.ref.txt new file mode 100644 index 0000000..56a6051 --- /dev/null +++ b/inputs/blez.ref.txt @@ -0,0 +1 @@ +1 \ No newline at end of file diff --git a/inputs/blez.txt b/inputs/blez.txt index 5bcbe25..7ce11a9 100644 --- a/inputs/blez.txt +++ b/inputs/blez.txt @@ -1,6 +1,7 @@ -FFFF4043 -20000881 -00006C42 -80000000 -10002043 -80000000 +3C05FFFF +18800003 +00000000 +00000008 +00000000 +34020001 +00000008 \ No newline at end of file diff --git a/inputs/bltz.ref.txt b/inputs/bltz.ref.txt new file mode 100644 index 0000000..56a6051 --- /dev/null +++ b/inputs/bltz.ref.txt @@ -0,0 +1 @@ +1 \ No newline at end of file diff --git a/inputs/bltz.txt b/inputs/bltz.txt index 0270f40..93100eb 100644 --- a/inputs/bltz.txt +++ b/inputs/bltz.txt @@ -1,6 +1,7 @@ -FFFF4043 -20000840 -00006C42 -80000000 -10002043 -80000000 +3C05FFFF +04800003 +00000000 +00000008 +00000000 +34020001 +00000008 \ No newline at end of file diff --git a/inputs/bltzal.ref.txt b/inputs/bltzal.ref.txt new file mode 100644 index 0000000..d8263ee --- /dev/null +++ b/inputs/bltzal.ref.txt @@ -0,0 +1 @@ +2 \ No newline at end of file diff --git a/inputs/bltzal.txt b/inputs/bltzal.txt index 432027d..6e01f55 100644 --- a/inputs/bltzal.txt +++ b/inputs/bltzal.txt @@ -1,7 +1,8 @@ -FFFF4043 -20000940 -00006C42 -10002442 -80000000 -10002043 -80000000 +3C05FFFF +04900004 +00000000 +24420001 +00000000 +00000008 +34020001 +03E00008 \ No newline at end of file diff --git a/inputs/bne.ref.txt b/inputs/bne.ref.txt new file mode 100644 index 0000000..56a6051 --- /dev/null +++ b/inputs/bne.ref.txt @@ -0,0 +1 @@ +1 \ No newline at end of file diff --git a/inputs/bne.txt b/inputs/bne.txt index f99f9c8..4836f1a 100644 --- a/inputs/bne.txt +++ b/inputs/bne.txt @@ -1,7 +1,8 @@ -30004043 -50005043 -20005841 -00006C42 -80000000 -10002043 -80000000 +34040003 +34040005 +14850003 +00000000 +00000008 +00000000 +34020001 +00000008 \ No newline at end of file diff --git a/inputs/bqtz.ref.txt b/inputs/bqtz.ref.txt new file mode 100644 index 0000000..56a6051 --- /dev/null +++ b/inputs/bqtz.ref.txt @@ -0,0 +1 @@ +1 \ No newline at end of file diff --git a/rtl/mips_cpu_harvard.v b/rtl/mips_cpu_harvard.v index 6170fb7..c518ebb 100644 --- a/rtl/mips_cpu_harvard.v +++ b/rtl/mips_cpu_harvard.v @@ -20,13 +20,11 @@ module mips_cpu_harvard( input logic[31:0] data_readdata//port from data memory out, going to the 'Write Register' port in regfile. ); -always_comb begin - instr_address = in_pc_in; - data_address = out_ALURes; - data_write = out_MemWrite; - data_read = out_MemRead; - data_writedata = out_readdata2; -end +assign instr_address = in_pc_in; +assign data_address = out_ALURes; +assign data_write = out_MemWrite; +assign data_read = out_MemRead; +assign data_writedata = out_readdata2; logic[31:0] in_pc_in, out_pc_out = 32'hBFC00000, out_ALURes, out_readdata1, out_readdata2, in_B, in_writedata; logic[4:0] in_readreg1, in_readreg2, in_writereg, out_shamt, out_ALUOp; @@ -38,7 +36,7 @@ assign in_readreg1 = instr_readdata[25:21]; assign in_readreg2 = instr_readdata[20:16]; assign in_opcode = instr_readdata[31:26]; -always_comb begin +always @(*) begin //Picking what register should be written to. case(out_RegDst) 2'd0: begin @@ -76,10 +74,12 @@ always_comb begin endcase end -pc pc( +mips_cpu_pc pc( //PC inputs .clk(clk),//clk taken from the Standard signals .rst(reset),//clk taken from the Standard signals + .instr(instr_readdata), //needed for branches and jumps + .reg_readdata(out_readdata1), //needed for jump register .pc_ctrl(out_PC), .pc_in(out_pc_out),//what the pc will output on the next clock cycle taken from either: PC itself + 4(Normal/Default Operation); or 16-bit signed valued taken from Instr[15-0] sign extend to 32bit then shifted by 2 then added to PC + 4(Branch Operation); or 26-bit instruction address taken from J-type instr[25-0] shifted left by 2 then concatanated to form Jump Address (PC-region branch); or from the GPR rs. //PC outputs diff --git a/rtl/mips_cpu_pc.v b/rtl/mips_cpu_pc.v index d37eba9..e0ff344 100644 --- a/rtl/mips_cpu_pc.v +++ b/rtl/mips_cpu_pc.v @@ -1,45 +1,46 @@ -module pc( -input logic clk, -input logic rst, -input logic[1:0] pc_ctrl, -input logic[31:0] pc_in, -input logic[4:0] rs, -output logic[31:0] pc_out, -output logic active +module mips_cpu_pc( + input logic clk, + input logic rst, + input logic[1:0] pc_ctrl, + input logic[31:0] pc_in, + input logic[31:0] instr, + input logic[31:0] reg_readdata, + output logic[31:0] pc_out, + output logic active ); -reg [31:0] pc_curr; +reg [31:0] pc_next, pc_lit_next; initial begin pc_out = pc_in; -end // initial + pc_next = pc_out + 32'd4; +end + +assign pc_lit_next = pc_out + 32'd4; always_ff @(posedge clk) begin if (rst) begin active <= 1; pc_out <= 32'hBFC00000; - end else if (pc_out != 32'd0) begin - active <= active; + end else begin + pc_out <= pc_next; case(pc_ctrl) - 2'd0: begin - pc_curr <= pc_out; - pc_out <= pc_curr + 32'd4;//No branch or jump or load, so no delay slot. - $display("New PC from %h to %h", pc_curr, pc_out); + default: begin + pc_next <= pc_out + 32'd4; end - 2'd1: begin - pc_out <= pc_in;//Branches + 2'd1: begin // Branch + pc_next <= pc_out + 32'd4 + {{14{instr[15]}},instr[15:0],2'b00}; end - 2'd2: begin - pc_out <= pc_in;//Jumps + 2'd2: begin // Jump + pc_next <= {pc_lit_next[31:28], instr[25:0], 2'b00}; end - 2'd3: begin - $display("JUMP REGISTER"); - pc_out <= 32'd0;//Jumps using register + 2'd3: begin // Jump using Register + pc_next <= reg_readdata; end endcase - end else if (pc_out == 32'd0) begin + end + if (pc_out == 32'd0) begin active <= 0; - //$display("CPU Halt"); end end diff --git a/test/test_mips_cpu_custom.sh b/test/test_mips_cpu_custom.sh index fa01200..a039b38 100644 --- a/test/test_mips_cpu_custom.sh +++ b/test/test_mips_cpu_custom.sh @@ -1,21 +1,44 @@ #!/bin/bash +#arithmetic bash test/test_mips_cpu_harvard.sh rtl addu #Pass bash test/test_mips_cpu_harvard.sh rtl addiu #Pass bash test/test_mips_cpu_harvard.sh rtl ori #Pass -#bash test/test_mips_cpu_harvard.sh rtl sw bash test/test_mips_cpu_harvard.sh rtl and #Pass bash test/test_mips_cpu_harvard.sh rtl andi #Pass bash test/test_mips_cpu_harvard.sh rtl or #Pass bash test/test_mips_cpu_harvard.sh rtl xor #Pass bash test/test_mips_cpu_harvard.sh rtl xori #Pass -bash test/test_mips_cpu_harvard.sh rtl sll -bash test/test_mips_cpu_harvard.sh rtl slti -bash test/test_mips_cpu_harvard.sh rtl sltiu #Pass +bash test/test_mips_cpu_harvard.sh rtl subu #Pass + + +#load & store +bash test/test_mips_cpu_harvard.sh rtl beq #Pass +bash test/test_mips_cpu_harvard.sh rtl bgez #Pass +#bash test/test_mips_cpu_harvard.sh rtl bgezal +bash test/test_mips_cpu_harvard.sh rtl bgtz #Pass +bash test/test_mips_cpu_harvard.sh rtl blez #Pass +#bash test/test_mips_cpu_harvard.sh rtl bltz +bash test/test_mips_cpu_harvard.sh rtl bltzal #Pass +bash test/test_mips_cpu_harvard.sh rtl bne #Pass + + +# shift +#bash test/test_mips_cpu_harvard.sh rtl sll +#bash test/test_mips_cpu_harvard.sh rtl srl +#bash test/test_mips_cpu_harvard.sh rtl sra +#bash test/test_mips_cpu_harvard.sh rtl srav +#bash test/test_mips_cpu_harvard.sh rtl srlv + + + +# +#bash test/test_mips_cpu_harvard.sh rtl sw + + +#bash test/test_mips_cpu_harvard.sh rtl slti +#bash test/test_mips_cpu_harvard.sh rtl sltiu #bash test/test_mips_cpu_harvard.sh rtl slt # missing bash test/test_mips_cpu_harvard.sh rtl sltu #Pass -bash test/test_mips_cpu_harvard.sh rtl sra -bash test/test_mips_cpu_harvard.sh rtl srav -bash test/test_mips_cpu_harvard.sh rtl srl -bash test/test_mips_cpu_harvard.sh rtl srlv -bash test/test_mips_cpu_harvard.sh rtl subu #Pass \ No newline at end of file + + diff --git a/test/test_mips_cpu_harvard.sh b/test/test_mips_cpu_harvard.sh index cdf10d9..f189e7c 100644 --- a/test/test_mips_cpu_harvard.sh +++ b/test/test_mips_cpu_harvard.sh @@ -51,7 +51,7 @@ iverilog -Wall -g2012 \ -P mips_cpu_harvard_tb.RAM_INIT_FILE=\"inputs/${INSTR}.txt\" \ -P mips_cpu_harvard_tb.MEM_INIT_FILE=\"inputs/${INSTR}.data.txt\" \ -o exec/mips_cpu_harvard_tb_${INSTR} testbench/mips_cpu_harvard_tb.v \ - ${SRC} #2> /dev/null + ${SRC} 2> /dev/null /mnt/c/Windows/System32/cmd.exe /C vvp ./exec/mips_cpu_harvard_tb_${INSTR} &> ./inputs/${INSTR}.log.txt; # log file for debugging (contains $display) echo "$(tail -1 ./inputs/${INSTR}.log.txt)" > ./inputs/${INSTR}.out.txt; # register v0 output to compare with reference if diff -w ./inputs/${INSTR}.out.txt ./inputs/${INSTR}.ref.txt &> /dev/null # compare