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changing module name

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Ibrahim 2020-12-07 10:52:01 +00:00
parent ff912207b8
commit 11cabd3aea
1 changed files with 1 additions and 1 deletions
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testbench/mips_cpu_bus_tb.v
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@ -1,4 +1,4 @@
module CPU_MU0_delay1_tb;
module mips_cpu_bus_tb;
timeunit 1ns / 10ps;
parameter RAM_INIT_FILE = "test/01-binary/countdown.hex.txt";