mirror of
https://github.com/supleed2/ELEC50003-P1-CW.git
synced 2024-09-20 04:16:17 +00:00
10816 lines
1.7 MiB
10816 lines
1.7 MiB
<?xml version="1.0" encoding="UTF-8"?>
|
|
<deploy
|
|
date="2021.06.03.15:10:09"
|
|
outputDirectory="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/">
|
|
<perimeter>
|
|
<parameter
|
|
name="AUTO_GENERATION_ID"
|
|
type="Integer"
|
|
defaultValue="0"
|
|
onHdl="0"
|
|
affectsHdl="1" />
|
|
<parameter
|
|
name="AUTO_UNIQUE_ID"
|
|
type="String"
|
|
defaultValue=""
|
|
onHdl="0"
|
|
affectsHdl="1" />
|
|
<parameter
|
|
name="AUTO_DEVICE_FAMILY"
|
|
type="String"
|
|
defaultValue="MAX 10"
|
|
onHdl="0"
|
|
affectsHdl="1" />
|
|
<parameter
|
|
name="AUTO_DEVICE"
|
|
type="String"
|
|
defaultValue="10M50DAF484C7G"
|
|
onHdl="0"
|
|
affectsHdl="1" />
|
|
<parameter
|
|
name="AUTO_DEVICE_SPEEDGRADE"
|
|
type="String"
|
|
defaultValue="7"
|
|
onHdl="0"
|
|
affectsHdl="1" />
|
|
<parameter
|
|
name="AUTO_CLK_CLOCK_RATE"
|
|
type="Long"
|
|
defaultValue="-1"
|
|
onHdl="0"
|
|
affectsHdl="1" />
|
|
<parameter
|
|
name="AUTO_CLK_CLOCK_DOMAIN"
|
|
type="Integer"
|
|
defaultValue="-1"
|
|
onHdl="0"
|
|
affectsHdl="1" />
|
|
<parameter
|
|
name="AUTO_CLK_RESET_DOMAIN"
|
|
type="Integer"
|
|
defaultValue="-1"
|
|
onHdl="0"
|
|
affectsHdl="1" />
|
|
<interface name="alt_vip_itc_0_clocked_video" kind="conduit" start="0">
|
|
<property name="associatedClock" value="" />
|
|
<property name="associatedReset" value="" />
|
|
<port
|
|
name="alt_vip_itc_0_clocked_video_vid_clk"
|
|
direction="input"
|
|
role="vid_clk"
|
|
width="1" />
|
|
<port
|
|
name="alt_vip_itc_0_clocked_video_vid_data"
|
|
direction="output"
|
|
role="vid_data"
|
|
width="24" />
|
|
<port
|
|
name="alt_vip_itc_0_clocked_video_underflow"
|
|
direction="output"
|
|
role="underflow"
|
|
width="1" />
|
|
<port
|
|
name="alt_vip_itc_0_clocked_video_vid_datavalid"
|
|
direction="output"
|
|
role="vid_datavalid"
|
|
width="1" />
|
|
<port
|
|
name="alt_vip_itc_0_clocked_video_vid_v_sync"
|
|
direction="output"
|
|
role="vid_v_sync"
|
|
width="1" />
|
|
<port
|
|
name="alt_vip_itc_0_clocked_video_vid_h_sync"
|
|
direction="output"
|
|
role="vid_h_sync"
|
|
width="1" />
|
|
<port
|
|
name="alt_vip_itc_0_clocked_video_vid_f"
|
|
direction="output"
|
|
role="vid_f"
|
|
width="1" />
|
|
<port
|
|
name="alt_vip_itc_0_clocked_video_vid_h"
|
|
direction="output"
|
|
role="vid_h"
|
|
width="1" />
|
|
<port
|
|
name="alt_vip_itc_0_clocked_video_vid_v"
|
|
direction="output"
|
|
role="vid_v"
|
|
width="1" />
|
|
</interface>
|
|
<interface name="altpll_0_areset_conduit" kind="conduit" start="0">
|
|
<property name="associatedClock" value="" />
|
|
<property name="associatedReset" value="" />
|
|
<port
|
|
name="altpll_0_areset_conduit_export"
|
|
direction="input"
|
|
role="export"
|
|
width="1" />
|
|
</interface>
|
|
<interface name="altpll_0_locked_conduit" kind="conduit" start="0">
|
|
<property name="associatedClock" value="" />
|
|
<property name="associatedReset" value="" />
|
|
<port
|
|
name="altpll_0_locked_conduit_export"
|
|
direction="output"
|
|
role="export"
|
|
width="1" />
|
|
</interface>
|
|
<interface name="clk" kind="clock" start="0">
|
|
<property name="clockRate" value="50000000" />
|
|
<property name="externallyDriven" value="false" />
|
|
<property name="ptfSchematicName" value="" />
|
|
<port name="clk_clk" direction="input" role="clk" width="1" />
|
|
</interface>
|
|
<interface name="clk_sdram" kind="clock" start="1">
|
|
<property name="associatedDirectClock" value="" />
|
|
<property name="clockRate" value="100000000" />
|
|
<property name="clockRateKnown" value="true" />
|
|
<property name="externallyDriven" value="false" />
|
|
<property name="ptfSchematicName" value="" />
|
|
<port name="clk_sdram_clk" direction="output" role="clk" width="1" />
|
|
</interface>
|
|
<interface name="clk_vga" kind="clock" start="1">
|
|
<property name="associatedDirectClock" value="" />
|
|
<property name="clockRate" value="25000000" />
|
|
<property name="clockRateKnown" value="true" />
|
|
<property name="externallyDriven" value="false" />
|
|
<property name="ptfSchematicName" value="" />
|
|
<port name="clk_vga_clk" direction="output" role="clk" width="1" />
|
|
</interface>
|
|
<interface name="d8m_xclkin" kind="clock" start="1">
|
|
<property name="associatedDirectClock" value="" />
|
|
<property name="clockRate" value="20000000" />
|
|
<property name="clockRateKnown" value="true" />
|
|
<property name="externallyDriven" value="false" />
|
|
<property name="ptfSchematicName" value="" />
|
|
<port name="d8m_xclkin_clk" direction="output" role="clk" width="1" />
|
|
</interface>
|
|
<interface name="eee_imgproc_0_conduit_mode" kind="conduit" start="0">
|
|
<property name="associatedClock" value="" />
|
|
<property name="associatedReset" value="" />
|
|
<port
|
|
name="eee_imgproc_0_conduit_mode_new_signal"
|
|
direction="input"
|
|
role="new_signal"
|
|
width="1" />
|
|
</interface>
|
|
<interface name="i2c_opencores_camera_export" kind="conduit" start="0">
|
|
<property name="associatedClock" value="" />
|
|
<property name="associatedReset" value="" />
|
|
<port
|
|
name="i2c_opencores_camera_export_scl_pad_io"
|
|
direction="bidir"
|
|
role="scl_pad_io"
|
|
width="1" />
|
|
<port
|
|
name="i2c_opencores_camera_export_sda_pad_io"
|
|
direction="bidir"
|
|
role="sda_pad_io"
|
|
width="1" />
|
|
</interface>
|
|
<interface name="i2c_opencores_mipi_export" kind="conduit" start="0">
|
|
<property name="associatedClock" value="" />
|
|
<property name="associatedReset" value="" />
|
|
<port
|
|
name="i2c_opencores_mipi_export_scl_pad_io"
|
|
direction="bidir"
|
|
role="scl_pad_io"
|
|
width="1" />
|
|
<port
|
|
name="i2c_opencores_mipi_export_sda_pad_io"
|
|
direction="bidir"
|
|
role="sda_pad_io"
|
|
width="1" />
|
|
</interface>
|
|
<interface name="key_external_connection" kind="conduit" start="0">
|
|
<property name="associatedClock" value="" />
|
|
<property name="associatedReset" value="" />
|
|
<port
|
|
name="key_external_connection_export"
|
|
direction="input"
|
|
role="export"
|
|
width="2" />
|
|
</interface>
|
|
<interface name="led_external_connection" kind="conduit" start="0">
|
|
<property name="associatedClock" value="" />
|
|
<property name="associatedReset" value="" />
|
|
<port
|
|
name="led_external_connection_export"
|
|
direction="output"
|
|
role="export"
|
|
width="10" />
|
|
</interface>
|
|
<interface name="mipi_pwdn_n_external_connection" kind="conduit" start="0">
|
|
<property name="associatedClock" value="" />
|
|
<property name="associatedReset" value="" />
|
|
<port
|
|
name="mipi_pwdn_n_external_connection_export"
|
|
direction="output"
|
|
role="export"
|
|
width="1" />
|
|
</interface>
|
|
<interface name="mipi_reset_n_external_connection" kind="conduit" start="0">
|
|
<property name="associatedClock" value="" />
|
|
<property name="associatedReset" value="" />
|
|
<port
|
|
name="mipi_reset_n_external_connection_export"
|
|
direction="output"
|
|
role="export"
|
|
width="1" />
|
|
</interface>
|
|
<interface name="reset" kind="reset" start="0">
|
|
<property name="associatedClock" value="" />
|
|
<property name="synchronousEdges" value="NONE" />
|
|
<port name="reset_reset_n" direction="input" role="reset_n" width="1" />
|
|
</interface>
|
|
<interface name="sdram_wire" kind="conduit" start="0">
|
|
<property name="associatedClock" value="" />
|
|
<property name="associatedReset" value="" />
|
|
<port name="sdram_wire_addr" direction="output" role="addr" width="13" />
|
|
<port name="sdram_wire_ba" direction="output" role="ba" width="2" />
|
|
<port name="sdram_wire_cas_n" direction="output" role="cas_n" width="1" />
|
|
<port name="sdram_wire_cke" direction="output" role="cke" width="1" />
|
|
<port name="sdram_wire_cs_n" direction="output" role="cs_n" width="1" />
|
|
<port name="sdram_wire_dq" direction="bidir" role="dq" width="16" />
|
|
<port name="sdram_wire_dqm" direction="output" role="dqm" width="2" />
|
|
<port name="sdram_wire_ras_n" direction="output" role="ras_n" width="1" />
|
|
<port name="sdram_wire_we_n" direction="output" role="we_n" width="1" />
|
|
</interface>
|
|
<interface name="sw_external_connection" kind="conduit" start="0">
|
|
<property name="associatedClock" value="" />
|
|
<property name="associatedReset" value="" />
|
|
<port
|
|
name="sw_external_connection_export"
|
|
direction="input"
|
|
role="export"
|
|
width="10" />
|
|
</interface>
|
|
<interface name="terasic_auto_focus_0_conduit" kind="conduit" start="0">
|
|
<property name="associatedClock" value="" />
|
|
<property name="associatedReset" value="reset" />
|
|
<port
|
|
name="terasic_auto_focus_0_conduit_vcm_i2c_sda"
|
|
direction="bidir"
|
|
role="vcm_i2c_sda"
|
|
width="1" />
|
|
<port
|
|
name="terasic_auto_focus_0_conduit_clk50"
|
|
direction="input"
|
|
role="clk50"
|
|
width="1" />
|
|
<port
|
|
name="terasic_auto_focus_0_conduit_vcm_i2c_scl"
|
|
direction="bidir"
|
|
role="vcm_i2c_scl"
|
|
width="1" />
|
|
</interface>
|
|
<interface name="terasic_camera_0_conduit_end" kind="conduit" start="0">
|
|
<property name="associatedClock" value="" />
|
|
<property name="associatedReset" value="" />
|
|
<port
|
|
name="terasic_camera_0_conduit_end_D"
|
|
direction="input"
|
|
role="D"
|
|
width="12" />
|
|
<port
|
|
name="terasic_camera_0_conduit_end_FVAL"
|
|
direction="input"
|
|
role="FVAL"
|
|
width="1" />
|
|
<port
|
|
name="terasic_camera_0_conduit_end_LVAL"
|
|
direction="input"
|
|
role="LVAL"
|
|
width="1" />
|
|
<port
|
|
name="terasic_camera_0_conduit_end_PIXCLK"
|
|
direction="input"
|
|
role="PIXCLK"
|
|
width="1" />
|
|
</interface>
|
|
<interface name="uart_0_rx_tx" kind="conduit" start="0">
|
|
<property name="associatedClock" value="" />
|
|
<property name="associatedReset" value="" />
|
|
<port name="uart_0_rx_tx_rxd" direction="input" role="rxd" width="1" />
|
|
<port name="uart_0_rx_tx_txd" direction="output" role="txd" width="1" />
|
|
</interface>
|
|
</perimeter>
|
|
<entity
|
|
path=""
|
|
parameterizationKey="Qsys:1.0:AUTO_CLK_CLOCK_DOMAIN=-1,AUTO_CLK_CLOCK_RATE=-1,AUTO_CLK_RESET_DOMAIN=-1,AUTO_DEVICE=10M50DAF484C7G,AUTO_DEVICE_FAMILY=MAX 10,AUTO_DEVICE_SPEEDGRADE=7,AUTO_GENERATION_ID=1622729373,AUTO_UNIQUE_ID=(EEE_IMGPROC:1.0:)(TERASIC_AUTO_FOCUS:1.0:VIDEO_H=480,VIDEO_W=640)(TERASIC_CAMERA:1.0:VIDEO_H=480,VIDEO_W=640)(alt_vip_itc:14.0:ACCEPT_COLOURS_IN_SEQ=0,ANC_LINE=0,AP_LINE=0,BPS=8,CLOCKS_ARE_SAME=0,COLOUR_PLANES_ARE_IN_PARALLEL=1,FAMILY=MAX 10,FIELD0_ANC_LINE=0,FIELD0_V_BACK_PORCH=0,FIELD0_V_BLANK=0,FIELD0_V_FRONT_PORCH=0,FIELD0_V_RISING_EDGE=0,FIELD0_V_SYNC_LENGTH=0,FIFO_DEPTH=640,F_FALLING_EDGE=0,F_RISING_EDGE=0,GENERATE_SYNC=0,H_ACTIVE_PIXELS=640,H_BACK_PORCH=48,H_BLANK=0,H_FRONT_PORCH=16,H_SYNC_LENGTH=96,INTERLACED=0,NO_OF_MODES=1,NUMBER_OF_COLOUR_PLANES=3,STD_WIDTH=1,THRESHOLD=639,USE_CONTROL=0,USE_EMBEDDED_SYNCS=0,V_ACTIVE_LINES=480,V_BACK_PORCH=33,V_BLANK=0,V_FRONT_PORCH=10,V_SYNC_LENGTH=2)(alt_vip_vfb:13.1:AUTO_DEVICE_FAMILY=MAX 10,AUTO_READER_CONTROL_CLOCKS_SAME=0,AUTO_READ_MASTER_CLOCKS_SAME=0,AUTO_READ_MASTER_INTERRUPT_USED_MASK=0,AUTO_READ_MASTER_MAX_READ_LATENCY=2,AUTO_READ_MASTER_NEED_ADDR_WIDTH=27,AUTO_WRITER_CONTROL_CLOCKS_SAME=0,AUTO_WRITE_MASTER_CLOCKS_SAME=0,AUTO_WRITE_MASTER_INTERRUPT_USED_MASK=0,AUTO_WRITE_MASTER_MAX_READ_LATENCY=2,AUTO_WRITE_MASTER_NEED_ADDR_WIDTH=27,PARAMETERISATION=<frameBufferParams><VFB_NAME>MyFrameBuffer</VFB_NAME><VFB_MAX_WIDTH>640</VFB_MAX_WIDTH><VFB_MAX_HEIGHT>480</VFB_MAX_HEIGHT><VFB_BPS>8</VFB_BPS><VFB_CHANNELS_IN_SEQ>1</VFB_CHANNELS_IN_SEQ><VFB_CHANNELS_IN_PAR>3</VFB_CHANNELS_IN_PAR><VFB_WRITER_RUNTIME_CONTROL>false</VFB_WRITER_RUNTIME_CONTROL><VFB_DROP_FRAMES>true</VFB_DROP_FRAMES><VFB_READER_RUNTIME_CONTROL>0</VFB_READER_RUNTIME_CONTROL><VFB_REPEAT_FRAMES>true</VFB_REPEAT_FRAMES><VFB_FRAMEBUFFERS_ADDR>00000000</VFB_FRAMEBUFFERS_ADDR><VFB_MEM_PORT_WIDTH>32</VFB_MEM_PORT_WIDTH><VFB_MEM_MASTERS_USE_SEPARATE_CLOCK>false</VFB_MEM_MASTERS_USE_SEPARATE_CLOCK><VFB_RDATA_FIFO_DEPTH>1024</VFB_RDATA_FIFO_DEPTH><VFB_RDATA_BURST_TARGET>4</VFB_RDATA_BURST_TARGET><VFB_WDATA_FIFO_DEPTH>1024</VFB_WDATA_FIFO_DEPTH><VFB_WDATA_BURST_TARGET>4</VFB_WDATA_BURST_TARGET><VFB_MAX_NUMBER_PACKETS>1</VFB_MAX_NUMBER_PACKETS><VFB_MAX_SYMBOLS_IN_PACKET>10</VFB_MAX_SYMBOLS_IN_PACKET><VFB_INTERLACED_SUPPORT>0</VFB_INTERLACED_SUPPORT><VFB_CONTROLLED_DROP_REPEAT>0</VFB_CONTROLLED_DROP_REPEAT><VFB_BURST_ALIGNMENT>0</VFB_BURST_ALIGNMENT><VFB_DROP_INVALID_FIELDS>false</VFB_DROP_INVALID_FIELDS></frameBufferParams>)(altpll:16.1:AUTO_DEVICE_FAMILY=MAX 10,AUTO_INCLK_INTERFACE_CLOCK_RATE=50000000,AVALON_USE_SEPARATE_SYSCLK=NO,BANDWIDTH=,BANDWIDTH_TYPE=AUTO,CLK0_DIVIDE_BY=1,CLK0_DUTY_CYCLE=50,CLK0_MULTIPLY_BY=2,CLK0_PHASE_SHIFT=0,CLK1_DIVIDE_BY=1,CLK1_DUTY_CYCLE=50,CLK1_MULTIPLY_BY=2,CLK1_PHASE_SHIFT=7500,CLK2_DIVIDE_BY=1,CLK2_DUTY_CYCLE=50,CLK2_MULTIPLY_BY=2,CLK2_PHASE_SHIFT=0,CLK3_DIVIDE_BY=2,CLK3_DUTY_CYCLE=50,CLK3_MULTIPLY_BY=1,CLK3_PHASE_SHIFT=0,CLK4_DIVIDE_BY=5,CLK4_DUTY_CYCLE=50,CLK4_MULTIPLY_BY=2,CLK4_PHASE_SHIFT=0,CLK5_DIVIDE_BY=,CLK5_DUTY_CYCLE=,CLK5_MULTIPLY_BY=,CLK5_PHASE_SHIFT=,CLK6_DIVIDE_BY=,CLK6_DUTY_CYCLE=,CLK6_MULTIPLY_BY=,CLK6_PHASE_SHIFT=,CLK7_DIVIDE_BY=,CLK7_DUTY_CYCLE=,CLK7_MULTIPLY_BY=,CLK7_PHASE_SHIFT=,CLK8_DIVIDE_BY=,CLK8_DUTY_CYCLE=,CLK8_MULTIPLY_BY=,CLK8_PHASE_SHIFT=,CLK9_DIVIDE_BY=,CLK9_DUTY_CYCLE=,CLK9_MULTIPLY_BY=,CLK9_PHASE_SHIFT=,COMPENSATE_CLOCK=CLK0,DOWN_SPREAD=,DPA_DIVIDER=,DPA_DIVIDE_BY=,DPA_MULTIPLY_BY=,ENABLE_SWITCH_OVER_COUNTER=,EXTCLK0_DIVIDE_BY=,EXTCLK0_DUTY_CYCLE=,EXTCLK0_MULTIPLY_BY=,EXTCLK0_PHASE_SHIFT=,EXTCLK1_DIVIDE_BY=,EXTCLK1_DUTY_CYCLE=,EXTCLK1_MULTIPLY_BY=,EXTCLK1_PHASE_SHIFT=,EXTCLK2_DIVIDE_BY=,EXTCLK2_DUTY_CYCLE=,EXTCLK2_MULTIPLY_BY=,EXTCLK2_PHASE_SHIFT=,EXTCLK3_DIVIDE_BY=,EXTCLK3_DUTY_CYCLE=,EXTCLK3_MULTIPLY_BY=,EXTCLK3_PHASE_SHIFT=,FEEDBACK_SOURCE=,GATE_LOCK_COUNTER=,GATE_LOCK_SIGNAL=,HIDDEN_CONSTANTS=CT#CLK2_DIVIDE_BY 1 CT#PORT_clk5 PORT_UNUSED CT#PORT_clk4 PORT_USED CT#PORT_clk3 PORT_USED CT#PORT_clk2 PORT_USED CT#PORT_clk1 PORT_USED CT#PORT_clk0 PORT_USED CT#CLK0_MULTIPLY_BY 2 CT#PORT_SCANWRITE PORT_UNUSED CT#PORT_SCANACLR PORT_UNUSED CT#PORT_PFDENA PORT_UNUSED CT#CLK3_DUTY_CYCLE 50 CT#CLK3_DIVIDE_BY 2 CT#PORT_PLLENA PORT_UNUSED CT#PORT_SCANDATA PORT_UNUSED CT#CLK3_PHASE_SHIFT 0 CT#PORT_SCANCLKENA PORT_UNUSED CT#CLK4_DIVIDE_BY 5 CT#WIDTH_CLOCK 5 CT#PORT_SCANDATAOUT PORT_UNUSED CT#CLK4_MULTIPLY_BY 2 CT#LPM_TYPE altpll CT#PLL_TYPE AUTO CT#CLK0_PHASE_SHIFT 0 CT#CLK1_DUTY_CYCLE 50 CT#PORT_PHASEDONE PORT_UNUSED CT#OPERATION_MODE NORMAL CT#PORT_CONFIGUPDATE PORT_UNUSED CT#CLK1_MULTIPLY_BY 2 CT#COMPENSATE_CLOCK CLK0 CT#PORT_CLKSWITCH PORT_UNUSED CT#CLK4_PHASE_SHIFT 0 CT#INCLK0_INPUT_FREQUENCY 20000 CT#CLK4_DUTY_CYCLE 50 CT#PORT_SCANDONE PORT_UNUSED CT#PORT_CLKLOSS PORT_UNUSED CT#PORT_INCLK1 PORT_UNUSED CT#AVALON_USE_SEPARATE_SYSCLK NO CT#PORT_INCLK0 PORT_USED CT#PORT_clkena5 PORT_UNUSED CT#PORT_clkena4 PORT_UNUSED CT#PORT_clkena3 PORT_UNUSED CT#PORT_clkena2 PORT_UNUSED CT#PORT_clkena1 PORT_UNUSED CT#PORT_clkena0 PORT_UNUSED CT#CLK1_PHASE_SHIFT 7500 CT#PORT_ARESET PORT_USED CT#BANDWIDTH_TYPE AUTO CT#CLK2_MULTIPLY_BY 2 CT#INTENDED_DEVICE_FAMILY {MAX 10} CT#PORT_SCANREAD PORT_UNUSED CT#CLK2_DUTY_CYCLE 50 CT#PORT_PHASESTEP PORT_UNUSED CT#PORT_SCANCLK PORT_UNUSED CT#PORT_CLKBAD1 PORT_UNUSED CT#PORT_CLKBAD0 PORT_UNUSED CT#PORT_FBIN PORT_UNUSED CT#PORT_PHASEUPDOWN PORT_UNUSED CT#PORT_extclk3 PORT_UNUSED CT#PORT_extclk2 PORT_UNUSED CT#PORT_extclk1 PORT_UNUSED CT#PORT_PHASECOUNTERSELECT PORT_UNUSED CT#PORT_extclk0 PORT_UNUSED CT#PORT_ACTIVECLOCK PORT_UNUSED CT#CLK2_PHASE_SHIFT 0 CT#CLK0_DUTY_CYCLE 50 CT#CLK0_DIVIDE_BY 1 CT#CLK1_DIVIDE_BY 1 CT#CLK3_MULTIPLY_BY 1 CT#PORT_LOCKED PORT_USED,HIDDEN_CUSTOM_ELABORATION=altpll_avalon_elaboration,HIDDEN_CUSTOM_POST_EDIT=altpll_avalon_post_edit,HIDDEN_IF_PORTS=IF#phasecounterselect {input 3} IF#locked {output 0} IF#reset {input 0} IF#clk {input 0} IF#phaseupdown {input 0} IF#scandone {output 0} IF#readdata {output 32} IF#write {input 0} IF#scanclk {input 0} IF#phasedone {output 0} IF#c4 {output 0} IF#c3 {output 0} IF#address {input 2} IF#c2 {output 0} IF#c1 {output 0} IF#c0 {output 0} IF#writedata {input 32} IF#read {input 0} IF#areset {input 0} IF#scanclkena {input 0} IF#scandataout {output 0} IF#configupdate {input 0} IF#phasestep {input 0} IF#scandata {input 0},HIDDEN_IS_FIRST_EDIT=0,HIDDEN_IS_NUMERIC=IN#WIDTH_CLOCK 1 IN#CLK0_DUTY_CYCLE 1 IN#CLK2_DIVIDE_BY 1 IN#PLL_TARGET_HARCOPY_CHECK 1 IN#CLK3_DIVIDE_BY 1 IN#CLK4_MULTIPLY_BY 1 IN#CLK1_MULTIPLY_BY 1 IN#CLK3_DUTY_CYCLE 1 IN#CLK4_DIVIDE_BY 1 IN#SWITCHOVER_COUNT_EDIT 1 IN#INCLK0_INPUT_FREQUENCY 1 IN#PLL_LVDS_PLL_CHECK 1 IN#PLL_AUTOPLL_CHECK 1 IN#PLL_FASTPLL_CHECK 1 IN#CLK1_DUTY_CYCLE 1 IN#PLL_ENHPLL_CHECK 1 IN#CLK2_MULTIPLY_BY 1 IN#DIV_FACTOR4 1 IN#DIV_FACTOR3 1 IN#DIV_FACTOR2 1 IN#DIV_FACTOR1 1 IN#DIV_FACTOR0 1 IN#LVDS_MODE_DATA_RATE_DIRTY 1 IN#CLK4_DUTY_CYCLE 1 IN#GLOCK_COUNTER_EDIT 1 IN#CLK2_DUTY_CYCLE 1 IN#CLK0_DIVIDE_BY 1 IN#CLK3_MULTIPLY_BY 1 IN#MULT_FACTOR4 1 IN#MULT_FACTOR3 1 IN#MULT_FACTOR2 1 IN#MULT_FACTOR1 1 IN#MULT_FACTOR0 1 IN#CLK0_MULTIPLY_BY 1 IN#USE_MIL_SPEED_GRADE 1 IN#CLK1_DIVIDE_BY 1,HIDDEN_MF_PORTS=MF#areset 1 MF#clk 1 MF#locked 1 MF#inclk 1,HIDDEN_PRIVATES=PT#GLOCKED_FEATURE_ENABLED 0 PT#SPREAD_FEATURE_ENABLED 0 PT#BANDWIDTH_FREQ_UNIT MHz PT#CUR_DEDICATED_CLK c0 PT#INCLK0_FREQ_EDIT 50.000 PT#BANDWIDTH_PRESET Low PT#PLL_LVDS_PLL_CHECK 0 PT#BANDWIDTH_USE_PRESET 0 PT#AVALON_USE_SEPARATE_SYSCLK NO PT#OUTPUT_FREQ_UNIT4 MHz PT#OUTPUT_FREQ_UNIT3 MHz PT#PLL_ENHPLL_CHECK 0 PT#OUTPUT_FREQ_UNIT2 MHz PT#OUTPUT_FREQ_UNIT1 MHz PT#OUTPUT_FREQ_UNIT0 MHz PT#PHASE_RECONFIG_FEATURE_ENABLED 1 PT#CREATE_CLKBAD_CHECK 0 PT#CLKSWITCH_CHECK 0 PT#INCLK1_FREQ_EDIT 100.000 PT#NORMAL_MODE_RADIO 1 PT#SRC_SYNCH_COMP_RADIO 0 PT#PLL_ARESET_CHECK 1 PT#LONG_SCAN_RADIO 1 PT#SCAN_FEATURE_ENABLED 1 PT#USE_CLK4 1 PT#USE_CLK3 1 PT#USE_CLK2 1 PT#PHASE_RECONFIG_INPUTS_CHECK 0 PT#USE_CLK1 1 PT#USE_CLK0 1 PT#PRIMARY_CLK_COMBO inclk0 PT#BANDWIDTH 1.000 PT#GLOCKED_COUNTER_EDIT_CHANGED 1 PT#PLL_FASTPLL_CHECK 0 PT#SPREAD_FREQ_UNIT KHz PT#LVDS_PHASE_SHIFT_UNIT4 deg PT#LVDS_PHASE_SHIFT_UNIT3 deg PT#PLL_AUTOPLL_CHECK 1 PT#OUTPUT_FREQ_MODE4 1 PT#LVDS_PHASE_SHIFT_UNIT2 deg PT#OUTPUT_FREQ_MODE3 1 PT#LVDS_PHASE_SHIFT_UNIT1 deg PT#OUTPUT_FREQ_MODE2 1 PT#LVDS_PHASE_SHIFT_UNIT0 deg PT#OUTPUT_FREQ_MODE1 1 PT#SWITCHOVER_FEATURE_ENABLED 0 PT#MIG_DEVICE_SPEED_GRADE Any PT#OUTPUT_FREQ_MODE0 1 PT#BANDWIDTH_FEATURE_ENABLED 1 PT#INCLK0_FREQ_UNIT_COMBO MHz PT#ZERO_DELAY_RADIO 0 PT#OUTPUT_FREQ4 20.00000000 PT#OUTPUT_FREQ3 25.00000000 PT#OUTPUT_FREQ2 100.00000000 PT#OUTPUT_FREQ1 100.00000000 PT#OUTPUT_FREQ0 100.00000000 PT#SHORT_SCAN_RADIO 0 PT#LVDS_MODE_DATA_RATE_DIRTY 0 PT#CUR_FBIN_CLK c0 PT#PLL_ADVANCED_PARAM_CHECK 0 PT#CLKBAD_SWITCHOVER_CHECK 0 PT#PHASE_SHIFT_STEP_ENABLED_CHECK 0 PT#DEVICE_SPEED_GRADE 6 PT#PLL_FBMIMIC_CHECK 0 PT#LVDS_MODE_DATA_RATE {Not Available} PT#PHASE_SHIFT4 0.00000000 PT#LOCKED_OUTPUT_CHECK 1 PT#SPREAD_PERCENT 0.500 PT#PHASE_SHIFT3 0.00000000 PT#DIV_FACTOR4 1 PT#PHASE_SHIFT2 0.00000000 PT#DIV_FACTOR3 1 PT#PHASE_SHIFT1 270.00000000 PT#DIV_FACTOR2 1 PT#PHASE_SHIFT0 0.00000000 PT#DIV_FACTOR1 1 PT#DIV_FACTOR0 1 PT#CNX_NO_COMPENSATE_RADIO 0 PT#USE_CLKENA4 0 PT#USE_CLKENA3 0 PT#USE_CLKENA2 0 PT#USE_CLKENA1 0 PT#USE_CLKENA0 0 PT#CREATE_INCLK1_CHECK 0 PT#GLOCK_COUNTER_EDIT 1048575 PT#INCLK1_FREQ_UNIT_COMBO MHz PT#EFF_OUTPUT_FREQ_VALUE4 20.000000 PT#EFF_OUTPUT_FREQ_VALUE3 25.000000 PT#EFF_OUTPUT_FREQ_VALUE2 100.000000 PT#EFF_OUTPUT_FREQ_VALUE1 100.000000 PT#EFF_OUTPUT_FREQ_VALUE0 100.000000 PT#SPREAD_FREQ 50.000 PT#USE_MIL_SPEED_GRADE 0 PT#EXPLICIT_SWITCHOVER_COUNTER 0 PT#STICKY_CLK4 1 PT#STICKY_CLK3 1 PT#STICKY_CLK2 1 PT#STICKY_CLK1 1 PT#STICKY_CLK0 1 PT#MIRROR_CLK4 0 PT#EXT_FEEDBACK_RADIO 0 PT#MIRROR_CLK3 0 PT#MIRROR_CLK2 0 PT#MIRROR_CLK1 0 PT#SWITCHOVER_COUNT_EDIT 1 PT#MIRROR_CLK0 0 PT#SELF_RESET_LOCK_LOSS 0 PT#PLL_PFDENA_CHECK 0 PT#INT_FEEDBACK__MODE_RADIO 1 PT#INCLK1_FREQ_EDIT_CHANGED 1 PT#SYNTH_WRAPPER_GEN_POSTFIX 0 PT#CLKLOSS_CHECK 0 PT#PHASE_SHIFT_UNIT4 deg PT#PHASE_SHIFT_UNIT3 deg PT#PHASE_SHIFT_UNIT2 deg PT#PHASE_SHIFT_UNIT1 deg PT#PHASE_SHIFT_UNIT0 deg PT#BANDWIDTH_USE_AUTO 1 PT#HAS_MANUAL_SWITCHOVER 1 PT#MULT_FACTOR4 1 PT#MULT_FACTOR3 1 PT#MULT_FACTOR2 1 PT#MULT_FACTOR1 1 PT#MULT_FACTOR0 1 PT#SPREAD_USE 0 PT#GLOCKED_MODE_CHECK 0 PT#DUTY_CYCLE4 50.00000000 PT#DUTY_CYCLE3 50.00000000 PT#DUTY_CYCLE2 50.00000000 PT#SACN_INPUTS_CHECK 0 PT#DUTY_CYCLE1 50.00000000 PT#INTENDED_DEVICE_FAMILY {MAX 10} PT#DUTY_CYCLE0 50.00000000 PT#PLL_TARGET_HARCOPY_CHECK 0 PT#INCLK1_FREQ_UNIT_CHANGED 1 PT#RECONFIG_FILE ALTPLL1472001986172141.mif PT#ACTIVECLK_CHECK 0,HIDDEN_USED_PORTS=UP#locked used UP#c4 used UP#c3 used UP#c2 used UP#c1 used UP#c0 used UP#areset used UP#inclk0 used,INCLK0_INPUT_FREQUENCY=20000,INCLK1_INPUT_FREQUENCY=,INTENDED_DEVICE_FAMILY=MAX 10,INVALID_LOCK_MULTIPLIER=,LOCK_HIGH=,LOCK_LOW=,OPERATION_MODE=NORMAL,PLL_TYPE=AUTO,PORT_ACTIVECLOCK=PORT_UNUSED,PORT_ARESET=PORT_USED,PORT_CLKBAD0=PORT_UNUSED,PORT_CLKBAD1=PORT_UNUSED,PORT_CLKLOSS=PORT_UNUSED,PORT_CLKSWITCH=PORT_UNUSED,PORT_CONFIGUPDATE=PORT_UNUSED,PORT_ENABLE0=,PORT_ENABLE1=,PORT_FBIN=PORT_UNUSED,PORT_FBOUT=,PORT_INCLK0=PORT_USED,PORT_INCLK1=PORT_UNUSED,PORT_LOCKED=PORT_USED,PORT_PFDENA=PORT_UNUSED,PORT_PHASECOUNTERSELECT=PORT_UNUSED,PORT_PHASEDONE=PORT_UNUSED,PORT_PHASESTEP=PORT_UNUSED,PORT_PHASEUPDOWN=PORT_UNUSED,PORT_PLLENA=PORT_UNUSED,PORT_SCANACLR=PORT_UNUSED,PORT_SCANCLK=PORT_UNUSED,PORT_SCANCLKENA=PORT_UNUSED,PORT_SCANDATA=PORT_UNUSED,PORT_SCANDATAOUT=PORT_UNUSED,PORT_SCANDONE=PORT_UNUSED,PORT_SCANREAD=PORT_UNUSED,PORT_SCANWRITE=PORT_UNUSED,PORT_SCLKOUT0=,PORT_SCLKOUT1=,PORT_VCOOVERRANGE=,PORT_VCOUNDERRANGE=,PORT_clk0=PORT_USED,PORT_clk1=PORT_USED,PORT_clk2=PORT_USED,PORT_clk3=PORT_USED,PORT_clk4=PORT_USED,PORT_clk5=PORT_UNUSED,PORT_clk6=,PORT_clk7=,PORT_clk8=,PORT_clk9=,PORT_clkena0=PORT_UNUSED,PORT_clkena1=PORT_UNUSED,PORT_clkena2=PORT_UNUSED,PORT_clkena3=PORT_UNUSED,PORT_clkena4=PORT_UNUSED,PORT_clkena5=PORT_UNUSED,PORT_extclk0=PORT_UNUSED,PORT_extclk1=PORT_UNUSED,PORT_extclk2=PORT_UNUSED,PORT_extclk3=PORT_UNUSED,PORT_extclkena0=,PORT_extclkena1=,PORT_extclkena2=,PORT_extclkena3=,PRIMARY_CLOCK=,QUALIFY_CONF_DONE=,SCAN_CHAIN=,SCAN_CHAIN_MIF_FILE=,SCLKOUT0_PHASE_SHIFT=,SCLKOUT1_PHASE_SHIFT=,SELF_RESET_ON_GATED_LOSS_LOCK=,SELF_RESET_ON_LOSS_LOCK=,SKIP_VCO=,SPREAD_FREQUENCY=,SWITCH_OVER_COUNTER=,SWITCH_OVER_ON_GATED_LOCK=,SWITCH_OVER_ON_LOSSCLK=,SWITCH_OVER_TYPE=,USING_FBMIMICBIDIR_PORT=,VALID_LOCK_MULTIPLIER=,VCO_DIVIDE_BY=,VCO_FREQUENCY_CONTROL=,VCO_MULTIPLY_BY=,VCO_PHASE_SHIFT_STEP=,WIDTH_CLOCK=5,WIDTH_PHASECOUNTERSELECT=)(clock_source:16.1:clockFrequency=50000000,clockFrequencyKnown=true,inputClockFrequency=0,resetSynchronousEdges=NONE)(i2c_opencores:12.0:)(i2c_opencores:12.0:)(altera_avalon_jtag_uart:16.1:allowMultipleConnections=false,avalonSpec=2.0,clkFreq=50000000,enableInteractiveInput=false,enableInteractiveOutput=false,hubInstanceID=0,legacySignalAllow=false,readBufferDepth=64,readIRQThreshold=8,simInputCharacterStream=,simInteractiveOptions=NO_INTERACTIVE_WINDOWS,useRegistersForReadBuffer=false,useRegistersForWriteBuffer=false,useRelativePathForSimFile=false,writeBufferDepth=64,writeIRQThreshold=8)(altera_avalon_pio:16.1:bitClearingEdgeCapReg=false,bitModifyingOutReg=false,captureEdge=false,clockRate=50000000,derived_capture=false,derived_do_test_bench_wiring=false,derived_edge_type=NONE,derived_has_in=true,derived_has_irq=false,derived_has_out=false,derived_has_tri=false,derived_irq_type=NONE,direction=Input,edgeType=RISING,generateIRQ=false,irqType=LEVEL,resetValue=0,simDoTestBenchWiring=false,simDrivenValue=0,width=2)(altera_avalon_pio:16.1:bitClearingEdgeCapReg=false,bitModifyingOutReg=false,captureEdge=false,clockRate=50000000,derived_capture=false,derived_do_test_bench_wiring=false,derived_edge_type=NONE,derived_has_in=false,derived_has_irq=false,derived_has_out=true,derived_has_tri=false,derived_irq_type=NONE,direction=Output,edgeType=RISING,generateIRQ=false,irqType=LEVEL,resetValue=0,simDoTestBenchWiring=false,simDrivenValue=0,width=10)(altera_avalon_pio:16.1:bitClearingEdgeCapReg=false,bitModifyingOutReg=false,captureEdge=false,clockRate=50000000,derived_capture=false,derived_do_test_bench_wiring=false,derived_edge_type=NONE,derived_has_in=false,derived_has_irq=false,derived_has_out=true,derived_has_tri=false,derived_irq_type=NONE,direction=Output,edgeType=RISING,generateIRQ=false,irqType=LEVEL,resetValue=0,simDoTestBenchWiring=false,simDrivenValue=0,width=1)(altera_avalon_pio:16.1:bitClearingEdgeCapReg=false,bitModifyingOutReg=false,captureEdge=false,clockRate=50000000,derived_capture=false,derived_do_test_bench_wiring=false,derived_edge_type=NONE,derived_has_in=false,derived_has_irq=false,derived_has_out=true,derived_has_tri=false,derived_irq_type=NONE,direction=Output,edgeType=RISING,generateIRQ=false,irqType=LEVEL,resetValue=0,simDoTestBenchWiring=false,simDrivenValue=0,width=1)(altera_nios2_gen2:16.1:AUTO_CLK_CLOCK_DOMAIN=1,AUTO_CLK_RESET_DOMAIN=1,AUTO_DEVICE=10M50DAF484C7G,AUTO_DEVICE_SPEEDGRADE=7,bht_ramBlockType=Automatic,breakAbsoluteAddr=264224,breakOffset=32,breakSlave=None,breakSlave_derived=nios2_gen2.debug_mem_slave,cdx_enabled=false,clockFrequency=50000000,cpuArchRev=1,cpuID=0,cpuReset=false,customInstSlavesSystemInfo=<info/>,customInstSlavesSystemInfo_nios_a=<info/>,customInstSlavesSystemInfo_nios_b=<info/>,customInstSlavesSystemInfo_nios_c=<info/>,dataAddrWidth=19,dataMasterHighPerformanceAddrWidth=1,dataMasterHighPerformanceMapParam=,dataSlaveMapParam=<address-map><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' type='altera_avalon_onchip_memory2.s1' /><slave name='nios2_gen2.debug_mem_slave' start='0x40800' end='0x41000' type='altera_nios2_gen2.debug_mem_slave' /><slave name='timer.s1' start='0x41000' end='0x41020' type='altera_avalon_timer.s1' /><slave name='TERASIC_AUTO_FOCUS_0.mm_ctrl' start='0x41020' end='0x41040' type='TERASIC_AUTO_FOCUS.mm_ctrl' /><slave name='i2c_opencores_camera.avalon_slave_0' start='0x41040' end='0x41060' type='i2c_opencores.avalon_slave_0' /><slave name='i2c_opencores_mipi.avalon_slave_0' start='0x41060' end='0x41080' type='i2c_opencores.avalon_slave_0' /><slave name='mipi_pwdn_n.s1' start='0x41080' end='0x41090' type='altera_avalon_pio.s1' /><slave name='mipi_reset_n.s1' start='0x41090' end='0x410A0' type='altera_avalon_pio.s1' /><slave name='key.s1' start='0x410A0' end='0x410B0' type='altera_avalon_pio.s1' /><slave name='sw.s1' start='0x410B0' end='0x410C0' type='altera_avalon_pio.s1' /><slave name='led.s1' start='0x410C0' end='0x410D0' type='altera_avalon_pio.s1' /><slave name='altpll_0.pll_slave' start='0x410D0' end='0x410E0' type='altpll.pll_slave' /><slave name='sysid_qsys.control_slave' start='0x410E0' end='0x410E8' type='altera_avalon_sysid_qsys.control_slave' /><slave name='jtag_uart.avalon_jtag_slave' start='0x410E8' end='0x410F0' type='altera_avalon_jtag_uart.avalon_jtag_slave' /><slave name='EEE_IMGPROC_0.s1' start='0x42000' end='0x42020' type='EEE_IMGPROC.s1' /><slave name='uart_0.s1' start='0x42020' end='0x42040' type='altera_avalon_uart.s1' /></address-map>,data_master_high_performance_paddr_base=0,data_master_high_performance_paddr_size=0,data_master_paddr_base=0,data_master_paddr_size=0,dcache_bursts=false,dcache_bursts_derived=false,dcache_lineSize_derived=32,dcache_numTCDM=0,dcache_ramBlockType=Automatic,dcache_size=2048,dcache_size_derived=2048,dcache_tagramBlockType=Automatic,dcache_victim_buf_impl=ram,debug_OCIOnchipTrace=_128,debug_assignJtagInstanceID=false,debug_datatrace=false,debug_datatrigger=0,debug_debugReqSignals=false,debug_enabled=true,debug_hwbreakpoint=0,debug_insttrace=false,debug_jtagInstanceID=0,debug_offchiptrace=false,debug_onchiptrace=false,debug_traceStorage=onchip_trace,debug_traceType=none,debug_triggerArming=true,deviceFamilyName=MAX 10,deviceFeaturesSystemInfo=ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 0 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1,dividerType=no_div,exceptionAbsoluteAddr=131104,exceptionOffset=32,exceptionSlave=onchip_memory2_0.s1,faAddrWidth=1,faSlaveMapParam=,fa_cache_line=2,fa_cache_linesize=0,flash_instruction_master_paddr_base=0,flash_instruction_master_paddr_size=0,icache_burstType=None,icache_numTCIM=0,icache_ramBlockType=Automatic,icache_size=4096,icache_tagramBlockType=Automatic,impl=Fast,instAddrWidth=19,instSlaveMapParam=<address-map><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' type='altera_avalon_onchip_memory2.s1' /><slave name='nios2_gen2.debug_mem_slave' start='0x40800' end='0x41000' type='altera_nios2_gen2.debug_mem_slave' /></address-map>,instructionMasterHighPerformanceAddrWidth=1,instructionMasterHighPerformanceMapParam=,instruction_master_high_performance_paddr_base=0,instruction_master_high_performance_paddr_size=0,instruction_master_paddr_base=0,instruction_master_paddr_size=0,internalIrqMaskSystemInfo=31,io_regionbase=0,io_regionsize=0,master_addr_map=false,mmu_TLBMissExcAbsAddr=0,mmu_TLBMissExcOffset=0,mmu_TLBMissExcSlave=None,mmu_autoAssignTlbPtrSz=true,mmu_enabled=false,mmu_processIDNumBits=8,mmu_ramBlockType=Automatic,mmu_tlbNumWays=16,mmu_tlbPtrSz=7,mmu_udtlbNumEntries=6,mmu_uitlbNumEntries=4,mpu_enabled=false,mpu_minDataRegionSize=12,mpu_minInstRegionSize=12,mpu_numOfDataRegion=8,mpu_numOfInstRegion=8,mpu_useLimit=false,mpx_enabled=false,mul_32_impl=2,mul_64_impl=0,mul_shift_choice=0,multiplierType=mul_fast32,ocimem_ramBlockType=Automatic,ocimem_ramInit=false,regfile_ramBlockType=Automatic,register_file_por=false,resetAbsoluteAddr=131072,resetOffset=0,resetSlave=onchip_memory2_0.s1,resetrequest_enabled=true,setting_HBreakTest=false,setting_HDLSimCachesCleared=true,setting_activateMonitors=true,setting_activateTestEndChecker=false,setting_activateTrace=false,setting_allow_break_inst=false,setting_alwaysEncrypt=true,setting_asic_add_scan_mode_input=false,setting_asic_enabled=false,setting_asic_synopsys_translate_on_off=false,setting_asic_third_party_synthesis=false,setting_avalonDebugPortPresent=false,setting_bhtPtrSz=8,setting_bigEndian=false,setting_bit31BypassDCache=true,setting_branchpredictiontype=Dynamic,setting_breakslaveoveride=false,setting_clearXBitsLDNonBypass=true,setting_dc_ecc_present=true,setting_disable_tmr_inj=false,setting_disableocitrace=false,setting_dtcm_ecc_present=true,setting_ecc_present=false,setting_ecc_sim_test_ports=false,setting_exportHostDebugPort=false,setting_exportPCB=false,setting_export_large_RAMs=false,setting_exportdebuginfo=false,setting_exportvectors=false,setting_fast_register_read=false,setting_ic_ecc_present=true,setting_interruptControllerType=Internal,setting_ioregionBypassDCache=false,setting_itcm_ecc_present=true,setting_mmu_ecc_present=true,setting_oci_export_jtag_signals=false,setting_oci_version=1,setting_preciseIllegalMemAccessException=false,setting_removeRAMinit=false,setting_rf_ecc_present=true,setting_shadowRegisterSets=0,setting_showInternalSettings=false,setting_showUnpublishedSettings=false,setting_support31bitdcachebypass=true,setting_tmr_output_disable=false,setting_usedesignware=false,shift_rot_impl=1,shifterType=fast_le_shift,stratix_dspblock_shift_mul=false,tightlyCoupledDataMaster0AddrWidth=1,tightlyCoupledDataMaster0MapParam=,tightlyCoupledDataMaster1AddrWidth=1,tightlyCoupledDataMaster1MapParam=,tightlyCoupledDataMaster2AddrWidth=1,tightlyCoupledDataMaster2MapParam=,tightlyCoupledDataMaster3AddrWidth=1,tightlyCoupledDataMaster3MapParam=,tightlyCoupledInstructionMaster0AddrWidth=1,tightlyCoupledInstructionMaster0MapParam=,tightlyCoupledInstructionMaster1AddrWidth=1,tightlyCoupledInstructionMaster1MapParam=,tightlyCoupledInstructionMaster2AddrWidth=1,tightlyCoupledInstructionMaster2MapParam=,tightlyCoupledInstructionMaster3AddrWidth=1,tightlyCoupledInstructionMaster3MapParam=,tightly_coupled_data_master_0_paddr_base=0,tightly_coupled_data_master_0_paddr_size=0,tightly_coupled_data_master_1_paddr_base=0,tightly_coupled_data_master_1_paddr_size=0,tightly_coupled_data_master_2_paddr_base=0,tightly_coupled_data_master_2_paddr_size=0,tightly_coupled_data_master_3_paddr_base=0,tightly_coupled_data_master_3_paddr_size=0,tightly_coupled_instruction_master_0_paddr_base=0,tightly_coupled_instruction_master_0_paddr_size=0,tightly_coupled_instruction_master_1_paddr_base=0,tightly_coupled_instruction_master_1_paddr_size=0,tightly_coupled_instruction_master_2_paddr_base=0,tightly_coupled_instruction_master_2_paddr_size=0,tightly_coupled_instruction_master_3_paddr_base=0,tightly_coupled_instruction_master_3_paddr_size=0,tmr_enabled=false,tracefilename=,translate_off= "synthesis translate_off" ,translate_on= "synthesis translate_on" ,userDefinedSettings=(altera_clock_bridge:16.1:DERIVED_CLOCK_RATE=50000000,EXPLICIT_CLOCK_RATE=0,NUM_CLOCK_OUTPUTS=1)(altera_reset_bridge:16.1:ACTIVE_LOW_RESET=1,AUTO_CLK_CLOCK_RATE=50000000,NUM_RESET_OUTPUTS=1,SYNCHRONOUS_EDGES=deassert,USE_RESET_REQUEST=1)(altera_nios2_gen2_unit:16.1:bht_ramBlockType=Automatic,breakAbsoluteAddr=264224,breakOffset=32,breakSlave=None,breakSlave_derived=nios2_gen2.debug_mem_slave,cdx_enabled=false,clockFrequency=50000000,cpuArchRev=1,cpuID=0,cpuReset=false,cpu_name=cpu,customInstSlavesSystemInfo=<info/>,dataAddrWidth=19,dataMasterHighPerformanceAddrWidth=1,dataMasterHighPerformanceMapParam=,dataSlaveMapParam=<address-map><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' type='altera_avalon_onchip_memory2.s1' /><slave name='nios2_gen2.debug_mem_slave' start='0x40800' end='0x41000' type='altera_nios2_gen2.debug_mem_slave' /><slave name='timer.s1' start='0x41000' end='0x41020' type='altera_avalon_timer.s1' /><slave name='TERASIC_AUTO_FOCUS_0.mm_ctrl' start='0x41020' end='0x41040' type='TERASIC_AUTO_FOCUS.mm_ctrl' /><slave name='i2c_opencores_camera.avalon_slave_0' start='0x41040' end='0x41060' type='i2c_opencores.avalon_slave_0' /><slave name='i2c_opencores_mipi.avalon_slave_0' start='0x41060' end='0x41080' type='i2c_opencores.avalon_slave_0' /><slave name='mipi_pwdn_n.s1' start='0x41080' end='0x41090' type='altera_avalon_pio.s1' /><slave name='mipi_reset_n.s1' start='0x41090' end='0x410A0' type='altera_avalon_pio.s1' /><slave name='key.s1' start='0x410A0' end='0x410B0' type='altera_avalon_pio.s1' /><slave name='sw.s1' start='0x410B0' end='0x410C0' type='altera_avalon_pio.s1' /><slave name='led.s1' start='0x410C0' end='0x410D0' type='altera_avalon_pio.s1' /><slave name='altpll_0.pll_slave' start='0x410D0' end='0x410E0' type='altpll.pll_slave' /><slave name='sysid_qsys.control_slave' start='0x410E0' end='0x410E8' type='altera_avalon_sysid_qsys.control_slave' /><slave name='jtag_uart.avalon_jtag_slave' start='0x410E8' end='0x410F0' type='altera_avalon_jtag_uart.avalon_jtag_slave' /><slave name='EEE_IMGPROC_0.s1' start='0x42000' end='0x42020' type='EEE_IMGPROC.s1' /><slave name='uart_0.s1' start='0x42020' end='0x42040' type='altera_avalon_uart.s1' /></address-map>,data_master_high_performance_paddr_base=0,data_master_high_performance_paddr_top=0,data_master_paddr_base=0,data_master_paddr_top=0,dcache_bursts=false,dcache_bursts_derived=false,dcache_lineSize_derived=32,dcache_numTCDM=0,dcache_ramBlockType=Automatic,dcache_size=2048,dcache_size_derived=2048,dcache_tagramBlockType=Automatic,dcache_victim_buf_impl=ram,debug_OCIOnchipTrace=_128,debug_assignJtagInstanceID=false,debug_datatrace=false,debug_datatrigger=0,debug_debugReqSignals=false,debug_enabled=true,debug_hwbreakpoint=0,debug_insttrace=false,debug_jtagInstanceID=0,debug_offchiptrace=false,debug_onchiptrace=false,debug_traceStorage=onchip_trace,debug_traceType=none,debug_triggerArming=true,deviceFamilyName=MAX 10,deviceFeaturesSystemInfo=ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 0 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1,dividerType=no_div,exceptionAbsoluteAddr=131104,exceptionOffset=32,exceptionSlave=onchip_memory2_0.s1,faAddrWidth=1,faSlaveMapParam=,fa_cache_line=2,fa_cache_linesize=0,flash_instruction_master_paddr_base=0,flash_instruction_master_paddr_top=0,icache_burstType=None,icache_numTCIM=0,icache_ramBlockType=Automatic,icache_size=4096,icache_tagramBlockType=Automatic,impl=Fast,instAddrWidth=19,instSlaveMapParam=<address-map><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' type='altera_avalon_onchip_memory2.s1' /><slave name='nios2_gen2.debug_mem_slave' start='0x40800' end='0x41000' type='altera_nios2_gen2.debug_mem_slave' /></address-map>,instructionMasterHighPerformanceAddrWidth=1,instructionMasterHighPerformanceMapParam=,instruction_master_high_performance_paddr_base=0,instruction_master_high_performance_paddr_top=0,instruction_master_paddr_base=0,instruction_master_paddr_top=0,internalIrqMaskSystemInfo=31,io_regionbase=0,io_regionsize=0,master_addr_map=false,mmu_TLBMissExcAbsAddr=0,mmu_TLBMissExcOffset=0,mmu_TLBMissExcSlave=None,mmu_autoAssignTlbPtrSz=true,mmu_enabled=false,mmu_processIDNumBits=8,mmu_ramBlockType=Automatic,mmu_tlbNumWays=16,mmu_tlbPtrSz=7,mmu_udtlbNumEntries=6,mmu_uitlbNumEntries=4,mpu_enabled=false,mpu_minDataRegionSize=12,mpu_minInstRegionSize=12,mpu_numOfDataRegion=8,mpu_numOfInstRegion=8,mpu_useLimit=false,mpx_enabled=false,multiplierType=mul_fast32,ocimem_ramBlockType=Automatic,ocimem_ramInit=false,regfile_ramBlockType=Automatic,register_file_por=false,resetAbsoluteAddr=131072,resetOffset=0,resetSlave=onchip_memory2_0.s1,resetrequest_enabled=true,setting_HBreakTest=false,setting_HDLSimCachesCleared=true,setting_activateMonitors=true,setting_activateTestEndChecker=false,setting_activateTrace=false,setting_allow_break_inst=false,setting_alwaysEncrypt=true,setting_asic_add_scan_mode_input=false,setting_asic_enabled=false,setting_asic_synopsys_translate_on_off=false,setting_asic_third_party_synthesis=false,setting_avalonDebugPortPresent=false,setting_bhtPtrSz=8,setting_bigEndian=false,setting_bit31BypassDCache=true,setting_branchPredictionType=Dynamic,setting_breakslaveoveride=false,setting_clearXBitsLDNonBypass=true,setting_dc_ecc_present=true,setting_disableocitrace=false,setting_dtcm_ecc_present=true,setting_ecc_present=false,setting_ecc_sim_test_ports=false,setting_exportPCB=false,setting_export_large_RAMs=false,setting_exportdebuginfo=false,setting_exportvectors=false,setting_fast_register_read=false,setting_ic_ecc_present=true,setting_interruptControllerType=Internal,setting_ioregionBypassDCache=false,setting_itcm_ecc_present=true,setting_mmu_ecc_present=true,setting_oci_export_jtag_signals=false,setting_oci_version=1,setting_preciseIllegalMemAccessException=false,setting_removeRAMinit=false,setting_rf_ecc_present=true,setting_shadowRegisterSets=0,setting_showInternalSettings=false,setting_showUnpublishedSettings=false,setting_support31bitdcachebypass=true,setting_usedesignware=false,shifterType=fast_le_shift,stratix_dspblock_shift_mul=false,tightlyCoupledDataMaster0AddrWidth=1,tightlyCoupledDataMaster0MapParam=,tightlyCoupledDataMaster1AddrWidth=1,tightlyCoupledDataMaster1MapParam=,tightlyCoupledDataMaster2AddrWidth=1,tightlyCoupledDataMaster2MapParam=,tightlyCoupledDataMaster3AddrWidth=1,tightlyCoupledDataMaster3MapParam=,tightlyCoupledInstructionMaster0AddrWidth=1,tightlyCoupledInstructionMaster0MapParam=,tightlyCoupledInstructionMaster1AddrWidth=1,tightlyCoupledInstructionMaster1MapParam=,tightlyCoupledInstructionMaster2AddrWidth=1,tightlyCoupledInstructionMaster2MapParam=,tightlyCoupledInstructionMaster3AddrWidth=1,tightlyCoupledInstructionMaster3MapParam=,tightly_coupled_data_master_0_paddr_base=0,tightly_coupled_data_master_0_paddr_top=0,tightly_coupled_data_master_1_paddr_base=0,tightly_coupled_data_master_1_paddr_top=0,tightly_coupled_data_master_2_paddr_base=0,tightly_coupled_data_master_2_paddr_top=0,tightly_coupled_data_master_3_paddr_base=0,tightly_coupled_data_master_3_paddr_top=0,tightly_coupled_instruction_master_0_paddr_base=0,tightly_coupled_instruction_master_0_paddr_top=0,tightly_coupled_instruction_master_1_paddr_base=0,tightly_coupled_instruction_master_1_paddr_top=0,tightly_coupled_instruction_master_2_paddr_base=0,tightly_coupled_instruction_master_2_paddr_top=0,tightly_coupled_instruction_master_3_paddr_base=0,tightly_coupled_instruction_master_3_paddr_top=0,tmr_enabled=false,tracefilename=,translate_off= "synthesis translate_off" ,translate_on= "synthesis translate_on" ,userDefinedSettings=)(clock:16.1:)(clock:16.1:)(reset:16.1:))(altera_avalon_onchip_memory2:16.1:allowInSystemMemoryContentEditor=false,autoInitializationFileName=Qsys_onchip_memory2_0,blockType=AUTO,copyInitFile=false,dataWidth=32,dataWidth2=32,derived_enableDiffWidth=false,derived_gui_ram_block_type=Automatic,derived_init_file_name=Qsys_onchip_memory2_0.hex,derived_is_hardcopy=false,derived_set_addr_width=15,derived_set_addr_width2=15,derived_set_data_width=32,derived_set_data_width2=32,derived_singleClockOperation=false,deviceFamily=MAX 10,deviceFeatures=ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 0 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1,dualPort=false,ecc_enabled=false,enPRInitMode=false,enableDiffWidth=false,initMemContent=false,initializationFileName=onchip_mem.hex,instanceID=NONE,memorySize=131072,readDuringWriteMode=DONT_CARE,resetrequest_enabled=true,simAllowMRAMContentsFile=false,simMemInitOnlyFilename=0,singleClockOperation=false,slave1Latency=1,slave2Latency=1,useNonDefaultInitFile=false,useShallowMemBlocks=false,writable=true)(altera_avalon_new_sdram_controller:16.1:TAC=5.5,TMRD=3,TRCD=20.0,TRFC=70.0,TRP=20.0,TWR=14.0,addressWidth=25,bankWidth=2,casLatency=3,clockRate=100000000,columnWidth=10,componentName=Qsys_sdram,dataWidth=16,generateSimulationModel=true,initNOPDelay=0.0,initRefreshCommands=2,masteredTristateBridgeSlave=0,model=single_Micron_MT48LC4M32B2_7_chip,numberOfBanks=4,numberOfChipSelects=1,pinsSharedViaTriState=false,powerUpDelay=100.0,refreshPeriod=15.625,registerDataIn=true,rowWidth=13,size=67108864)(altera_avalon_pio:16.1:bitClearingEdgeCapReg=false,bitModifyingOutReg=false,captureEdge=false,clockRate=50000000,derived_capture=false,derived_do_test_bench_wiring=false,derived_edge_type=NONE,derived_has_in=true,derived_has_irq=false,derived_has_out=false,derived_has_tri=false,derived_irq_type=NONE,direction=Input,edgeType=RISING,generateIRQ=false,irqType=LEVEL,resetValue=0,simDoTestBenchWiring=false,simDrivenValue=0,width=10)(altera_avalon_sysid_qsys:16.1:id=0,timestamp=1622729373)(altera_avalon_timer:16.1:alwaysRun=false,counterSize=32,fixedPeriod=false,loadValue=49999,mult=0.001,period=1,periodUnits=MSEC,periodUnitsString=ms,resetOutput=false,slave_address_width=3,snapshot=true,systemFrequency=50000000,ticksPerSec=1000.0,timeoutPulseOutput=false,timerPreset=FULL_FEATURED,valueInSecond=0.001,watchdogPulse=2)(altera_avalon_uart:16.1:baud=115200,baudError=0.01,clockRate=50000000,dataBits=8,fixedBaud=true,parity=NONE,parityFisrtChar=N,simCharStream=,simInteractiveInputEnable=false,simInteractiveOutputEnable=false,simTrueBaud=false,stopBits=1,syncRegDepth=2,useCtsRts=false,useEopRegister=false,useRelativePathForSimFile=false)(avalon:16.1:arbitrationPriority=1,baseAddress=0x000410e8,defaultConnection=false)(avalon:16.1:arbitrationPriority=1,baseAddress=0x00041060,defaultConnection=false)(avalon:16.1:arbitrationPriority=1,baseAddress=0x00041040,defaultConnection=false)(avalon:16.1:arbitrationPriority=1,baseAddress=0x000410e0,defaultConnection=false)(avalon:16.1:arbitrationPriority=1,baseAddress=0x00040800,defaultConnection=false)(avalon:16.1:arbitrationPriority=1,baseAddress=0x00041020,defaultConnection=false)(avalon:16.1:arbitrationPriority=1,baseAddress=0x000410d0,defaultConnection=false)(avalon:16.1:arbitrationPriority=1,baseAddress=0x00020000,defaultConnection=false)(avalon:16.1:arbitrationPriority=1,baseAddress=0x00041000,defaultConnection=false)(avalon:16.1:arbitrationPriority=1,baseAddress=0x000410c0,defaultConnection=false)(avalon:16.1:arbitrationPriority=1,baseAddress=0x000410b0,defaultConnection=false)(avalon:16.1:arbitrationPriority=1,baseAddress=0x000410a0,defaultConnection=false)(avalon:16.1:arbitrationPriority=1,baseAddress=0x00041090,defaultConnection=false)(avalon:16.1:arbitrationPriority=1,baseAddress=0x00041080,defaultConnection=false)(avalon:16.1:arbitrationPriority=1,baseAddress=0x00042000,defaultConnection=false)(avalon:16.1:arbitrationPriority=1,baseAddress=0x00042020,defaultConnection=false)(avalon:16.1:arbitrationPriority=1,baseAddress=0x00040800,defaultConnection=false)(avalon:16.1:arbitrationPriority=1,baseAddress=0x00020000,defaultConnection=false)(avalon:16.1:arbitrationPriority=50,baseAddress=0x04000000,defaultConnection=false)(avalon:16.1:arbitrationPriority=30,baseAddress=0x04000000,defaultConnection=false)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(interrupt:16.1:irqNumber=0)(interrupt:16.1:irqNumber=1)(interrupt:16.1:irqNumber=2)(interrupt:16.1:irqNumber=3)(interrupt:16.1:irqNumber=4)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)"
|
|
instancePathKey="Qsys"
|
|
kind="Qsys"
|
|
version="1.0"
|
|
name="Qsys">
|
|
<parameter name="AUTO_CLK_CLOCK_RATE" value="-1" />
|
|
<parameter name="AUTO_GENERATION_ID" value="1622729373" />
|
|
<parameter name="AUTO_DEVICE" value="10M50DAF484C7G" />
|
|
<parameter name="AUTO_DEVICE_FAMILY" value="MAX 10" />
|
|
<parameter name="AUTO_CLK_RESET_DOMAIN" value="-1" />
|
|
<parameter name="AUTO_CLK_CLOCK_DOMAIN" value="-1" />
|
|
<parameter name="AUTO_UNIQUE_ID" value="" />
|
|
<parameter name="AUTO_DEVICE_SPEEDGRADE" value="7" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/Qsys.v"
|
|
type="VERILOG" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/EEE_IMGPROC.v"
|
|
type="VERILOG"
|
|
attributes="TOP_LEVEL_FILE" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/F_VCM.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/I2C_VCM_Config.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/I2C_VCM_Controller.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/TERASIC_AUTO_FOCUS.v"
|
|
type="VERILOG"
|
|
attributes="TOP_LEVEL_FILE" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/VCM_CTRL_P.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/TERASIC_CAMERA.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/CAMERA_RGB.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/CAMERA_Bayer.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Bayer2RGB.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Bayer_LineBuffer.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/rgb_fifo.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/add2.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/add4.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_IS2Vid.sv"
|
|
type="SYSTEM_VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_IS2Vid_sync_compare.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_IS2Vid_calculate_mode.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_IS2Vid_control.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_IS2Vid_mode_banks.sv"
|
|
type="SYSTEM_VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_IS2Vid_statemachine.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_common_fifo.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_common_generic_count.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_common_to_binary.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_common_sync.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_common_trigger_sync.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_common_sync_generation.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_common_frame_counter.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_common_sample_counter.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_cvo.sdc"
|
|
type="SDC" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_alt_vip_vfb_0.ocp"
|
|
type="OTHER" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_alt_vip_vfb_0_vfb_writer_vfb_writer.trace"
|
|
type="OTHER" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_alt_vip_vfb_0_vfb_reader_vfb_reader.trace"
|
|
type="OTHER" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_alt_vip_vfb_0.vhd"
|
|
type="VHDL_ENCRYPT" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_alt_vip_vfb_0_tb.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_muxbin2.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_au.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_addsubcarry.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_reg.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_muxhot16.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_avalon_st_input.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_avalon_st_output.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_atlantic_reporter.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_avalon_mm_bursting_master_fifo.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_fifo.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_fifo_usedw_calculator.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_general_fifo.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_gray_clock_crosser.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_logic_fifo.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_one_bit_delay.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_ram_fifo.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_std_logic_vector_delay.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_pulling_width_adapter.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_pushing_width_adapter.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_pc.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_cmp.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_clock_reset.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_altpll_0.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/i2c_opencores.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/i2c_master_top.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/i2c_master_defines.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/i2c_master_byte_ctrl.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/i2c_master_bit_ctrl.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_jtag_uart.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_key.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_led.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mipi_pwdn_n.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu.ocp"
|
|
type="OTHER"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu.sdc"
|
|
type="SDC"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu.v"
|
|
type="VERILOG_ENCRYPT"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu_bht_ram.mif"
|
|
type="MIF"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu_dc_tag_ram.mif"
|
|
type="MIF"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu_debug_slave_sysclk.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu_debug_slave_tck.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu_debug_slave_wrapper.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu_ic_tag_ram.mif"
|
|
type="MIF"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu_mult_cell.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu_ociram_default_contents.mif"
|
|
type="MIF"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu_rf_ram_a.mif"
|
|
type="MIF"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu_rf_ram_b.mif"
|
|
type="MIF"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu_test_bench.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_onchip_memory2_0.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_sdram.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_sdram_test_component.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_sw.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_sysid_qsys.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_timer.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_uart_0.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_master_translator.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_slave_translator.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_master_agent.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_slave_agent.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_burst_uncompressor.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_sc_fifo.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_router.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_router_001.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_router_002.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_router_006.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_traffic_limiter.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_reorder_memory.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_sc_fifo.v"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_pipeline_base.v"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_cmd_demux.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_cmd_demux_001.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_cmd_mux.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_cmd_mux_004.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_rsp_demux.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_rsp_demux_004.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_rsp_demux_005.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_rsp_mux.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_rsp_mux_001.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_handshake_clock_crosser.v"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_clock_crosser.v"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_pipeline_base.v"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_std_synchronizer_nocut.v"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_handshake_clock_crosser.sdc"
|
|
type="SDC"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_avalon_st_adapter.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_avalon_st_adapter_error_adapter_0.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_1.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_1_router.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_1_router_002.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_burst_adapter.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_burst_adapter_uncmpr.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_burst_adapter_13_1.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_burst_adapter_new.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_incr_burst_converter.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_wrap_burst_converter.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_default_burst_converter.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_address_alignment.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_pipeline_stage.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_pipeline_base.v"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_1_cmd_demux.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_1_cmd_mux.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_1_rsp_demux.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_1_rsp_mux.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_width_adapter.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_address_alignment.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_burst_uncompressor.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_1_avalon_st_adapter.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_1_avalon_st_adapter_error_adapter_0.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_irq_mapper.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_reset_controller.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_reset_synchronizer.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_reset_controller.sdc"
|
|
type="SDC"
|
|
attributes="" />
|
|
</childGeneratedFiles>
|
|
<sourceFiles>
|
|
<file path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys.qsys" />
|
|
</sourceFiles>
|
|
<childSourceFiles>
|
|
<file path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/EEE_IMGPROC_hw.tcl" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_AUTO_FOCUS/TERASIC_AUTO_FOCUS_hw.tcl" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/TERASIC_CAMERA_hw.tcl" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/TERASIC_CAMERA.v" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/CAMERA_RGB.v" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/CAMERA_Bayer.v" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/Bayer2RGB.v" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/Bayer_LineBuffer.v" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/rgb_fifo.v" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/add2.v" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/add4.v" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/alt_vip_itc_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid.sv" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid_sync_compare.v" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid_calculate_mode.v" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid_control.v" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid_mode_banks.sv" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid_statemachine.v" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_fifo.v" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_generic_count.v" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_to_binary.v" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_sync.v" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_trigger_sync.v" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_sync_generation.v" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_frame_counter.v" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_sample_counter.v" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/alt_vipitc131_cvo.sdc" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/frame_buffer/lib/alt_vip_vfb.cpp" />
|
|
<file path="F:/intelfpga_lite/16.1/ip/altera/frame_buffer/lib/vip_common.h" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/frame_buffer/lib/vip_constants.h" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/frame_buffer/lib/vip_elementclass_info.h" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/frame_buffer/lib/vip_vfb_hwfast.hpp" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/include/alt_cusp.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/alt_cdfg_types.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/alt_cusp_synth.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/alt_exception.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/alt_lib_types.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/alt_util.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_au.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_avalon_eb.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_avalon_mm.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_avalon_st.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_cmp.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_fifo.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_fifo_paged.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_fp_au.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_fp_cmp.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_fp_mult.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_gpio.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_immed.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_mac.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_mem.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_mult.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_multadd.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_reg.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_shift.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_tapped_delay.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_avalon_bus.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_avalon_eb_channel.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_avalon_st_channel.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_debug.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_exit.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_overlay.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_pc.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/assert.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/c++io.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/char_traits.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/ieeefp.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/limits.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/cassert" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/cctype" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/climits" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/cstddef" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/cstdio" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/cstdlib" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/cstring" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/ctype.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/exception" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/fstream" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/iosfwd" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/iostream" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/math.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/memory" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/new" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/pthread.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/sstream" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stdarg.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stddef.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stdexcept" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stdio.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stdlib.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/string" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/string.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/typeinfo" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/vector" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cassert" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cctype" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/climits" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/config/stl_confix.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/config/stl_cusp.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/config/stlcomp.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cstddef" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cstdio" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cstdlib" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cstring" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/ctype.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/exception" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/fstream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/iosfwd" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/iostream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/math.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/memory" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/new" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/pthread.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/set" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/sstream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stdarg.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stddef.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stdexcept" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stdio.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stdlib.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_algobase.c" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_algobase.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_alloc.c" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_alloc.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_auto_ptr.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_bvector.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_config.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_config_compat.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_config_compat_post.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_construct.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_ctraits_fns.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_ctype.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_cwchar.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_epilog.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_function.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_function_adaptors.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_function_base.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_hash_fun.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_iterator.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_iterator_base.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_locale.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_new.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_pair.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_prolog.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_range_errors.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_raw_storage_iter.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_relops_cont.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_set.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_site_config.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string.c" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string_fwd.c" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string_fwd.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string_hash.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string_io.c" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string_io.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_tempbuf.c" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_tempbuf.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_threads.c" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_threads.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_tree.c" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_tree.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_uninitialized.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_vector.c" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_vector.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/c_locale.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/type_traits.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl_user_config.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/string" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/string.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/typeinfo" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/cstring" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/fstream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/iosfwd" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/iostream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/istream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/ostream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/sstream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/vector" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/wrap_std/fstream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/wrap_std/iosfwd" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/wrap_std/iostream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/wrap_std/sstream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_buffer.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_clock.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_clock_ports.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_communication_ids.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_event_finder.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_event_queue.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_export.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_fifo.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_fifo_ifs.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_fifo_ports.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_interface.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_mutex.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_mutex_if.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_port.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_prim_channel.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_semaphore.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_semaphore_if.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal_ifs.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal_ports.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal_resolved.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal_resolved_ports.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal_rv.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal_rv_ports.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_bit.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_bit_ids.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_bit_proxies.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_bv.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_bv_base.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_logic.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_lv.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_lv_base.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_proxy.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/fx.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_context.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fix.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fixed.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fx_ids.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxcast_switch.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxdefs.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxnum.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxnum_observer.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxtype_params.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxval.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxval_observer.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_ufix.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_ufixed.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_ieee.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_mant.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_other_defs.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_params.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_rep.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_string.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_utils.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_bigint.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_biguint.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_int.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_int_base.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_int_ids.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_length_param.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_nbdefs.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_nbexterns.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_nbutils.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_signed.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_uint.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_uint_base.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_unsigned.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/misc/sc_concatref.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/misc/sc_value_base.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_attribute.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_cmnhdr.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_constants.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_event.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_externs.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_kernel_ids.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_lambda.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_lambda_defs.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_lambda_exps.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_lambda_friends.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_macros.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_module.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_module_name.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_object.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_process.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_process_b.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_process_host.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_sensitive.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_simcontext.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_time.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_ver.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_wait.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_wait_cthread.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/tracing/sc_trace.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/tracing/sc_vcd_trace.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/tracing/sc_wif_trace.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_hash.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_iostream.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_list.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_mempool.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_pq.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_report.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_report_handler.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_string.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_temporary.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_vector.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/systemc" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/systemc.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/ip/altera/frame_buffer/lib/ip_toolbench/frame_buffer.jar" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/ip/altera/frame_buffer/lib/ip_toolbench/forms_rt.jar" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/ip/altera/frame_buffer/lib/ip_toolbench/jdom.jar" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/ip/altera/common/ip_toolbench/v1.3.0/bin/launcher.jar" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/ip/altera/common/ip_toolbench/v1.3.0/bin/flowbase.jar" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/ip/altera/common/ip_toolbench/v1.3.0/bin/flowmanager.jar" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/ip/altera/common/ip_toolbench/v1.3.0/bin/util/jptf.jar" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/ip/altera/common/lib/com.altera.megawizard2.jar" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/frame_buffer/lib/alt_vip_vfb.cpp" />
|
|
<file path="F:/intelfpga_lite/16.1/ip/altera/frame_buffer/lib/vip_common.h" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/frame_buffer/lib/vip_constants.h" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/frame_buffer/lib/vip_elementclass_info.h" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/frame_buffer/lib/vip_vfb_hwfast.hpp" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/include/alt_cusp.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/alt_cdfg_types.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/alt_cusp_synth.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/alt_exception.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/alt_lib_types.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/alt_util.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_au.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_avalon_eb.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_avalon_mm.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_avalon_st.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_cmp.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_fifo.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_fifo_paged.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_fp_au.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_fp_cmp.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_fp_mult.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_gpio.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_immed.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_mac.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_mem.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_mult.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_multadd.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_reg.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_shift.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_tapped_delay.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_avalon_bus.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_avalon_eb_channel.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_avalon_st_channel.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_debug.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_exit.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_overlay.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_pc.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/assert.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/c++io.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/char_traits.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/ieeefp.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/limits.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/cassert" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/cctype" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/climits" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/cstddef" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/cstdio" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/cstdlib" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/cstring" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/ctype.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/exception" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/fstream" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/iosfwd" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/iostream" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/math.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/memory" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/new" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/pthread.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/sstream" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stdarg.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stddef.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stdexcept" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stdio.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stdlib.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/string" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/string.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/typeinfo" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/vector" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cassert" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cctype" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/climits" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/config/stl_confix.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/config/stl_cusp.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/config/stlcomp.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cstddef" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cstdio" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cstdlib" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cstring" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/ctype.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/exception" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/fstream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/iosfwd" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/iostream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/math.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/memory" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/new" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/pthread.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/set" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/sstream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stdarg.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stddef.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stdexcept" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stdio.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stdlib.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_algobase.c" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_algobase.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_alloc.c" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_alloc.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_auto_ptr.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_bvector.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_config.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_config_compat.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_config_compat_post.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_construct.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_ctraits_fns.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_ctype.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_cwchar.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_epilog.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_function.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_function_adaptors.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_function_base.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_hash_fun.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_iterator.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_iterator_base.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_locale.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_new.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_pair.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_prolog.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_range_errors.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_raw_storage_iter.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_relops_cont.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_set.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_site_config.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string.c" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string_fwd.c" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string_fwd.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string_hash.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string_io.c" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string_io.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_tempbuf.c" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_tempbuf.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_threads.c" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_threads.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_tree.c" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_tree.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_uninitialized.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_vector.c" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_vector.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/c_locale.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/type_traits.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl_user_config.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/string" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/string.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/typeinfo" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/cstring" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/fstream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/iosfwd" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/iostream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/istream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/ostream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/sstream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/vector" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/wrap_std/fstream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/wrap_std/iosfwd" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/wrap_std/iostream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/wrap_std/sstream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_buffer.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_clock.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_clock_ports.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_communication_ids.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_event_finder.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_event_queue.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_export.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_fifo.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_fifo_ifs.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_fifo_ports.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_interface.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_mutex.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_mutex_if.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_port.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_prim_channel.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_semaphore.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_semaphore_if.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal_ifs.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal_ports.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal_resolved.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal_resolved_ports.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal_rv.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal_rv_ports.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_bit.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_bit_ids.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_bit_proxies.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_bv.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_bv_base.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_logic.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_lv.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_lv_base.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_proxy.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/fx.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_context.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fix.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fixed.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fx_ids.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxcast_switch.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxdefs.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxnum.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxnum_observer.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxtype_params.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxval.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxval_observer.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_ufix.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_ufixed.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_ieee.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_mant.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_other_defs.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_params.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_rep.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_string.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_utils.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_bigint.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_biguint.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_int.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_int_base.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_int_ids.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_length_param.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_nbdefs.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_nbexterns.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_nbutils.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_signed.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_uint.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_uint_base.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_unsigned.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/misc/sc_concatref.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/misc/sc_value_base.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_attribute.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_cmnhdr.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_constants.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_event.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_externs.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_kernel_ids.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_lambda.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_lambda_defs.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_lambda_exps.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_lambda_friends.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_macros.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_module.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_module_name.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_object.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_process.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_process_b.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_process_host.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_sensitive.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_simcontext.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_time.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_ver.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_wait.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_wait_cthread.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/tracing/sc_trace.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/tracing/sc_vcd_trace.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/tracing/sc_wif_trace.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_hash.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_iostream.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_list.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_mempool.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_pq.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_report.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_report_handler.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_string.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_temporary.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_vector.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/systemc" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/systemc.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/ip/altera/frame_buffer/lib/ip_toolbench/frame_buffer.jar" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/ip/altera/frame_buffer/lib/ip_toolbench/forms_rt.jar" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/ip/altera/frame_buffer/lib/ip_toolbench/jdom.jar" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/ip/altera/common/ip_toolbench/v1.3.0/bin/launcher.jar" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/ip/altera/common/ip_toolbench/v1.3.0/bin/flowbase.jar" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/ip/altera/common/ip_toolbench/v1.3.0/bin/flowmanager.jar" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/ip/altera/common/ip_toolbench/v1.3.0/bin/util/jptf.jar" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/ip/altera/common/lib/com.altera.megawizard2.jar" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_altpll/altera_avalon_altpll_hw.tcl" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/i2c_opencores/i2c_opencores_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_jtag_uart/altera_avalon_jtag_uart_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_pio/altera_avalon_pio_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_pio/altera_avalon_pio_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_pio/altera_avalon_pio_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/nios2_ip/altera_nios2_gen2/altera_nios2_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/nios2_ip/altera_nios2_gen2/altera_nios2_unit_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/altera_avalon_onchip_memory2_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_new_sdram_controller/altera_avalon_new_sdram_controller_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_pio/altera_avalon_pio_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_sysid_qsys/altera_avalon_sysid_qsys_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_timer/altera_avalon_timer_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_uart/altera_avalon_uart_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_mm_interconnect/altera_mm_interconnect_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_master_translator/altera_merlin_master_translator_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_slave_translator/altera_merlin_slave_translator_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_master_agent/altera_merlin_master_agent_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_slave_agent/altera_merlin_slave_agent_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo.v" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_traffic_limiter/altera_merlin_traffic_limiter_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_handshake_clock_crosser/altera_avalon_st_handshake_clock_crosser_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_handshake_clock_crosser/altera_avalon_st_handshake_clock_crosser.v" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_adapter/altera_avalon_st_adapter_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_error_adapter/avalon-st_error_adapter_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_mm_interconnect/altera_mm_interconnect_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_master_translator/altera_merlin_master_translator_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_slave_translator/altera_merlin_slave_translator_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_master_agent/altera_merlin_master_agent_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_slave_agent/altera_merlin_slave_agent_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo.v" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_burst_adapter/altera_merlin_burst_adapter_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_width_adapter/altera_merlin_width_adapter_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_adapter/altera_avalon_st_adapter_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_error_adapter/avalon-st_error_adapter_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_irq_mapper/altera_irq_mapper_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_reset_controller/altera_reset_controller_hw.tcl" />
|
|
</childSourceFiles>
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 0 starting:Qsys "Qsys"</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Debug">Transform: CustomInstructionTransform</message>
|
|
<message level="Debug">No custom instruction connections, skipping transform </message>
|
|
<message level="Debug" culprit="merlin_custom_instruction_transform"><![CDATA[After transform: <b>21</b> modules, <b>88</b> connections]]></message>
|
|
<message level="Debug">Transform: MMTransform</message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>17</b> modules, <b>65</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Debug" culprit="merlin_translator_transform"><![CDATA[After transform: <b>35</b> modules, <b>136</b> connections]]></message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform merlin_domain_transform not run on matched interfaces nios2_gen2.data_master and nios2_gen2_data_master_translator.avalon_anti_master_0</message>
|
|
<message level="Debug">Transform merlin_domain_transform not run on matched interfaces nios2_gen2.instruction_master and nios2_gen2_instruction_master_translator.avalon_anti_master_0</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Debug">Transform merlin_domain_transform not run on matched interfaces jtag_uart_avalon_jtag_slave_translator.avalon_anti_slave_0 and jtag_uart.avalon_jtag_slave</message>
|
|
<message level="Debug">Transform merlin_domain_transform not run on matched interfaces i2c_opencores_mipi_avalon_slave_0_translator.avalon_anti_slave_0 and i2c_opencores_mipi.avalon_slave_0</message>
|
|
<message level="Debug">Transform merlin_domain_transform not run on matched interfaces i2c_opencores_camera_avalon_slave_0_translator.avalon_anti_slave_0 and i2c_opencores_camera.avalon_slave_0</message>
|
|
<message level="Debug">Transform merlin_domain_transform not run on matched interfaces sysid_qsys_control_slave_translator.avalon_anti_slave_0 and sysid_qsys.control_slave</message>
|
|
<message level="Debug">Transform merlin_domain_transform not run on matched interfaces nios2_gen2_debug_mem_slave_translator.avalon_anti_slave_0 and nios2_gen2.debug_mem_slave</message>
|
|
<message level="Debug">Transform merlin_domain_transform not run on matched interfaces TERASIC_AUTO_FOCUS_0_mm_ctrl_translator.avalon_anti_slave_0 and TERASIC_AUTO_FOCUS_0.mm_ctrl</message>
|
|
<message level="Debug">Transform merlin_domain_transform not run on matched interfaces altpll_0_pll_slave_translator.avalon_anti_slave_0 and altpll_0.pll_slave</message>
|
|
<message level="Debug">Transform merlin_domain_transform not run on matched interfaces onchip_memory2_0_s1_translator.avalon_anti_slave_0 and onchip_memory2_0.s1</message>
|
|
<message level="Debug">Transform merlin_domain_transform not run on matched interfaces timer_s1_translator.avalon_anti_slave_0 and timer.s1</message>
|
|
<message level="Debug">Transform merlin_domain_transform not run on matched interfaces led_s1_translator.avalon_anti_slave_0 and led.s1</message>
|
|
<message level="Debug">Transform merlin_domain_transform not run on matched interfaces sw_s1_translator.avalon_anti_slave_0 and sw.s1</message>
|
|
<message level="Debug">Transform merlin_domain_transform not run on matched interfaces key_s1_translator.avalon_anti_slave_0 and key.s1</message>
|
|
<message level="Debug">Transform merlin_domain_transform not run on matched interfaces mipi_reset_n_s1_translator.avalon_anti_slave_0 and mipi_reset_n.s1</message>
|
|
<message level="Debug">Transform merlin_domain_transform not run on matched interfaces mipi_pwdn_n_s1_translator.avalon_anti_slave_0 and mipi_pwdn_n.s1</message>
|
|
<message level="Debug">Transform merlin_domain_transform not run on matched interfaces EEE_IMGPROC_0_s1_translator.avalon_anti_slave_0 and EEE_IMGPROC_0.s1</message>
|
|
<message level="Debug">Transform merlin_domain_transform not run on matched interfaces uart_0_s1_translator.avalon_anti_slave_0 and uart_0.s1</message>
|
|
<message level="Debug" culprit="merlin_domain_transform"><![CDATA[After transform: <b>72</b> modules, <b>381</b> connections]]></message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Debug" culprit="merlin_router_transform"><![CDATA[After transform: <b>90</b> modules, <b>452</b> connections]]></message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Debug" culprit="merlin_traffic_limiter_transform"><![CDATA[After transform: <b>92</b> modules, <b>462</b> connections]]></message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Debug" culprit="merlin_network_to_switch_transform"><![CDATA[After transform: <b>127</b> modules, <b>551</b> connections]]></message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Info">Inserting clock-crossing logic between cmd_demux.src5 and cmd_mux_005.sink0</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info">Inserting clock-crossing logic between cmd_demux.src14 and cmd_mux_014.sink0</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info">Inserting clock-crossing logic between rsp_demux_005.src0 and rsp_mux.sink5</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info">Inserting clock-crossing logic between rsp_demux_014.src0 and rsp_mux.sink14</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message
|
|
level="Debug"
|
|
culprit="com_altera_sopcmodel_transforms_avalon_ClockCrossingTransform"><![CDATA[After transform: <b>131</b> modules, <b>579</b> connections]]></message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug" culprit="limiter_update_transform"><![CDATA[After transform: <b>131</b> modules, <b>581</b> connections]]></message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Debug" culprit="merlin_clock_and_reset_bridge_transform"><![CDATA[After transform: <b>136</b> modules, <b>720</b> connections]]></message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>22</b> modules, <b>95</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>5</b> modules, <b>8</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Debug" culprit="merlin_translator_transform"><![CDATA[After transform: <b>8</b> modules, <b>20</b> connections]]></message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform merlin_domain_transform not run on matched interfaces alt_vip_vfb_0.read_master and alt_vip_vfb_0_read_master_translator.avalon_anti_master_0</message>
|
|
<message level="Debug">Transform merlin_domain_transform not run on matched interfaces alt_vip_vfb_0.write_master and alt_vip_vfb_0_write_master_translator.avalon_anti_master_0</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Debug">Transform merlin_domain_transform not run on matched interfaces sdram_s1_translator.avalon_anti_slave_0 and sdram.s1</message>
|
|
<message level="Debug" culprit="merlin_domain_transform"><![CDATA[After transform: <b>14</b> modules, <b>55</b> connections]]></message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Debug" culprit="merlin_router_transform"><![CDATA[After transform: <b>17</b> modules, <b>67</b> connections]]></message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Debug" culprit="merlin_burst_transform"><![CDATA[After transform: <b>18</b> modules, <b>71</b> connections]]></message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Debug" culprit="merlin_network_to_switch_transform"><![CDATA[After transform: <b>23</b> modules, <b>84</b> connections]]></message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Debug" culprit="merlin_width_transform"><![CDATA[After transform: <b>25</b> modules, <b>92</b> connections]]></message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Debug" culprit="merlin_clock_and_reset_bridge_transform"><![CDATA[After transform: <b>27</b> modules, <b>116</b> connections]]></message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>23</b> modules, <b>99</b> connections]]></message>
|
|
<message level="Debug" culprit="merlin_mm_transform"><![CDATA[After transform: <b>23</b> modules, <b>99</b> connections]]></message>
|
|
<message level="Debug">Transform: InterruptMapperTransform</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Debug" culprit="merlin_interrupt_mapper_transform"><![CDATA[After transform: <b>24</b> modules, <b>103</b> connections]]></message>
|
|
<message level="Debug">Transform: InterruptSyncTransform</message>
|
|
<message level="Debug">Transform: InterruptFanoutTransform</message>
|
|
<message level="Debug">Transform: AvalonStreamingTransform</message>
|
|
<message level="Debug">Transform: ResetAdaptation</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Debug" culprit="reset_adaptation_transform"><![CDATA[After transform: <b>28</b> modules, <b>102</b> connections]]></message>
|
|
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>EEE_IMGPROC</b> "<b>submodules/EEE_IMGPROC</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>TERASIC_AUTO_FOCUS</b> "<b>submodules/TERASIC_AUTO_FOCUS</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>TERASIC_CAMERA</b> "<b>submodules/TERASIC_CAMERA</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>alt_vip_itc</b> "<b>submodules/alt_vipitc131_IS2Vid</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>alt_vip_vfb</b> "<b>submodules/Qsys_alt_vip_vfb_0</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altpll</b> "<b>submodules/Qsys_altpll_0</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>i2c_opencores</b> "<b>submodules/i2c_opencores</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>i2c_opencores</b> "<b>submodules/i2c_opencores</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altera_avalon_jtag_uart</b> "<b>submodules/Qsys_jtag_uart</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altera_avalon_pio</b> "<b>submodules/Qsys_key</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altera_avalon_pio</b> "<b>submodules/Qsys_led</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altera_avalon_pio</b> "<b>submodules/Qsys_mipi_pwdn_n</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altera_avalon_pio</b> "<b>submodules/Qsys_mipi_pwdn_n</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altera_nios2_gen2</b> "<b>submodules/Qsys_nios2_gen2</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altera_avalon_onchip_memory2</b> "<b>submodules/Qsys_onchip_memory2_0</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altera_avalon_new_sdram_controller</b> "<b>submodules/Qsys_sdram</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altera_avalon_pio</b> "<b>submodules/Qsys_sw</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altera_avalon_sysid_qsys</b> "<b>submodules/Qsys_sysid_qsys</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altera_avalon_timer</b> "<b>submodules/Qsys_timer</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altera_avalon_uart</b> "<b>submodules/Qsys_uart_0</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altera_mm_interconnect</b> "<b>submodules/Qsys_mm_interconnect_0</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altera_mm_interconnect</b> "<b>submodules/Qsys_mm_interconnect_1</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altera_irq_mapper</b> "<b>submodules/Qsys_irq_mapper</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altera_reset_controller</b> "<b>submodules/altera_reset_controller</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altera_reset_controller</b> "<b>submodules/altera_reset_controller</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altera_reset_controller</b> "<b>submodules/altera_reset_controller</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 25 starting:EEE_IMGPROC "submodules/EEE_IMGPROC"</message>
|
|
<message level="Info" culprit="EEE_IMGPROC_0"><![CDATA["<b>Qsys</b>" instantiated <b>EEE_IMGPROC</b> "<b>EEE_IMGPROC_0</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 24 starting:TERASIC_AUTO_FOCUS "submodules/TERASIC_AUTO_FOCUS"</message>
|
|
<message level="Info" culprit="TERASIC_AUTO_FOCUS_0"><![CDATA["<b>Qsys</b>" instantiated <b>TERASIC_AUTO_FOCUS</b> "<b>TERASIC_AUTO_FOCUS_0</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 23 starting:TERASIC_CAMERA "submodules/TERASIC_CAMERA"</message>
|
|
<message level="Debug">set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files</message>
|
|
<message level="Debug">Command: F:/intelfpga_lite/16.1/quartus\bin64/quartus_sh.exe -t C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0054_sopcqmap/not_a_project_setup.tcl</message>
|
|
<message level="Debug">Command: F:/intelfpga_lite/16.1/quartus\bin64/quartus_map.exe not_a_project --generate_hdl_interface=F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/TERASIC_CAMERA.v --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0054_sopcqmap/ --ini=disable_check_quartus_compatibility_qsys_only=on</message>
|
|
<message level="Debug">Command took 0.590s</message>
|
|
<message level="Debug">Command took 0.627s</message>
|
|
<message level="Debug">set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files</message>
|
|
<message level="Debug">Command: F:/intelfpga_lite/16.1/quartus\bin64/quartus_sh.exe -t C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0057_sopcqmap/not_a_project_setup.tcl</message>
|
|
<message level="Debug">Command: F:/intelfpga_lite/16.1/quartus\bin64/quartus_map.exe not_a_project --generate_hdl_interface=F:\Ed\Stuff\EEE2Rover\DE10_LITE_D8M_VIP_16\ip\TERASIC_CAMERA\TERASIC_CAMERA.v --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0057_sopcqmap/ --set=HDL_INTERFACE_INSTANCE_NAME=inst --set=HDL_INTERFACE_INSTANCE_ENTITY=TERASIC_CAMERA "--set=HDL_INTERFACE_INSTANCE_PARAMETERS=VIDEO_W=D\"640\";VIDEO_H=D\"480\";" --ini=disable_check_quartus_compatibility_qsys_only=on</message>
|
|
<message level="Debug">Command took 0.533s</message>
|
|
<message level="Debug">Command took 0.605s</message>
|
|
<message level="Info" culprit="TERASIC_CAMERA_0"><![CDATA["<b>Qsys</b>" instantiated <b>TERASIC_CAMERA</b> "<b>TERASIC_CAMERA_0</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 22 starting:alt_vip_itc "submodules/alt_vipitc131_IS2Vid"</message>
|
|
<message level="Debug">set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files</message>
|
|
<message level="Debug">Command: F:/intelfpga_lite/16.1/quartus\bin64/quartus_sh.exe -t C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0058_sopcqmap/not_a_project_setup.tcl</message>
|
|
<message level="Debug">Command: F:/intelfpga_lite/16.1/quartus\bin64/quartus_map.exe not_a_project --generate_hdl_interface=F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid.sv --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0058_sopcqmap/ --ini=disable_check_quartus_compatibility_qsys_only=on</message>
|
|
<message level="Debug">Command took 0.524s</message>
|
|
<message level="Debug">Command took 0.629s</message>
|
|
<message level="Debug">set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files</message>
|
|
<message level="Debug">Command: F:/intelfpga_lite/16.1/quartus\bin64/quartus_sh.exe -t C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0059_sopcqmap/not_a_project_setup.tcl</message>
|
|
<message level="Debug">Command: F:/intelfpga_lite/16.1/quartus\bin64/quartus_map.exe not_a_project --generate_hdl_interface=F:\intelfpga_lite\16.1\ip\altera\clocked_video_output\src_hdl\alt_vipitc131_IS2Vid.sv --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0059_sopcqmap/ --set=HDL_INTERFACE_INSTANCE_NAME=inst --set=HDL_INTERFACE_INSTANCE_ENTITY=alt_vipitc131_IS2Vid "--set=HDL_INTERFACE_INSTANCE_PARAMETERS=NUMBER_OF_COLOUR_PLANES=D\"3\";COLOUR_PLANES_ARE_IN_PARALLEL=D\"1\";BPS=D\"8\";INTERLACED=D\"0\";H_ACTIVE_PIXELS=D\"640\";V_ACTIVE_LINES=D\"480\";ACCEPT_COLOURS_IN_SEQ=D\"0\";FIFO_DEPTH=D\"640\";CLOCKS_ARE_SAME=D\"0\";USE_CONTROL=D\"0\";NO_OF_MODES=D\"1\";THRESHOLD=D\"639\";STD_WIDTH=D\"1\";GENERATE_SYNC=D\"0\";USE_EMBEDDED_SYNCS=D\"0\";AP_LINE=D\"0\";V_BLANK=D\"0\";H_BLANK=D\"0\";H_SYNC_LENGTH=D\"96\";H_FRONT_PORCH=D\"16\";H_BACK_PORCH=D\"48\";V_SYNC_LENGTH=D\"2\";V_FRONT_PORCH=D\"10\";V_BACK_PORCH=D\"33\";F_RISING_EDGE=D\"0\";F_FALLING_EDGE=D\"0\";FIELD0_V_RISING_EDGE=D\"0\";FIELD0_V_BLANK=D\"0\";FIELD0_V_SYNC_LENGTH=D\"0\";FIELD0_V_FRONT_PORCH=D\"0\";FIELD0_V_BACK_PORCH=D\"0\";ANC_LINE=D\"0\";FIELD0_ANC_LINE=D\"0\";" --ini=disable_check_quartus_compatibility_qsys_only=on</message>
|
|
<message level="Debug">Command took 0.527s</message>
|
|
<message level="Debug">Command took 0.635s</message>
|
|
<message level="Info" culprit="alt_vip_itc_0"><![CDATA["<b>Qsys</b>" instantiated <b>alt_vip_itc</b> "<b>alt_vip_itc_0</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 21 starting:alt_vip_vfb "submodules/Qsys_alt_vip_vfb_0"</message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp161_au</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp161_au</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp161_au</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp161_au</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp161_au</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp161_au</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp161_au</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp161_au</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp161_au</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp161_au</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp161_au</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_avalon_st_input</b> "<b>submodules/alt_cusp161_avalon_st_input</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_avalon_st_output</b> "<b>submodules/alt_cusp161_avalon_st_output</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_avalon_mm_bursting_master_fifo</b> "<b>submodules/alt_cusp161_avalon_mm_bursting_master_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_pulling_width_adapter</b> "<b>submodules/alt_cusp161_pulling_width_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_avalon_mm_bursting_master_fifo</b> "<b>submodules/alt_cusp161_avalon_mm_bursting_master_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_pushing_width_adapter</b> "<b>submodules/alt_cusp161_pushing_width_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_pc</b> "<b>submodules/alt_cusp161_pc</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_pc</b> "<b>submodules/alt_cusp161_pc</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp161_au</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp161_au</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp161_au</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp161_au</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp161_cmp</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp161_cmp</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp161_cmp</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp161_cmp</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp161_cmp</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp161_cmp</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp161_cmp</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp161_cmp</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp161_cmp</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp161_cmp</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp161_cmp</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp161_cmp</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp161_cmp</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp161_cmp</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp161_cmp</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp161_cmp</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp161_cmp</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp161_cmp</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="dut"><![CDATA["<b>dut</b>" reuses <b>alt_cusp_testbench_clock</b> "<b>submodules/alt_cusp161_clock_reset</b>"]]></message>
|
|
<message level="Debug" culprit="dut"><![CDATA["<b>dut</b>" reuses <b>alt_vip_vfb</b> "<b>submodules/Qsys_alt_vip_vfb_0</b>"]]></message>
|
|
<message level="Info" culprit="alt_vip_vfb_0"><![CDATA["<b>Qsys</b>" instantiated <b>alt_vip_vfb</b> "<b>alt_vip_vfb_0</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 350 starting:alt_cusp_muxbin2 "submodules/alt_cusp161_muxbin2"</message>
|
|
<message level="Info" culprit="vfb_writer_packet_write_address_au_l_muxinst"><![CDATA["<b>alt_vip_vfb_0</b>" instantiated <b>alt_cusp_muxbin2</b> "<b>vfb_writer_packet_write_address_au_l_muxinst</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 348 starting:alt_au "submodules/alt_cusp161_au"</message>
|
|
<message level="Info" culprit="vfb_writer_packet_write_address_au"><![CDATA["<b>alt_vip_vfb_0</b>" instantiated <b>alt_au</b> "<b>vfb_writer_packet_write_address_au</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 339 starting:alt_reg "submodules/alt_cusp161_reg"</message>
|
|
<message level="Info" culprit="vfb_writer_overflow_flag_reg"><![CDATA["<b>alt_vip_vfb_0</b>" instantiated <b>alt_reg</b> "<b>vfb_writer_overflow_flag_reg</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd</b>]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 338 starting:alt_cusp_muxhot16 "submodules/alt_cusp161_muxhot16"</message>
|
|
<message level="Info" culprit="vfb_writer_length_counter_au_enable_muxinst"><![CDATA["<b>alt_vip_vfb_0</b>" instantiated <b>alt_cusp_muxhot16</b> "<b>vfb_writer_length_counter_au_enable_muxinst</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 314 starting:alt_avalon_st_input "submodules/alt_cusp161_avalon_st_input"</message>
|
|
<message level="Info" culprit="din"><![CDATA["<b>alt_vip_vfb_0</b>" instantiated <b>alt_avalon_st_input</b> "<b>din</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd</b>]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 309 starting:alt_avalon_st_output "submodules/alt_cusp161_avalon_st_output"</message>
|
|
<message level="Info" culprit="dout"><![CDATA["<b>alt_vip_vfb_0</b>" instantiated <b>alt_avalon_st_output</b> "<b>dout</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd</b>]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 305 starting:alt_avalon_mm_bursting_master_fifo "submodules/alt_cusp161_avalon_mm_bursting_master_fifo"</message>
|
|
<message level="Info" culprit="read_master"><![CDATA["<b>alt_vip_vfb_0</b>" instantiated <b>alt_avalon_mm_bursting_master_fifo</b> "<b>read_master</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd</b>]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 303 starting:alt_cusp_pulling_width_adapter "submodules/alt_cusp161_pulling_width_adapter"</message>
|
|
<message level="Info" culprit="read_master_pull"><![CDATA["<b>alt_vip_vfb_0</b>" instantiated <b>alt_cusp_pulling_width_adapter</b> "<b>read_master_pull</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd</b>]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 297 starting:alt_cusp_pushing_width_adapter "submodules/alt_cusp161_pushing_width_adapter"</message>
|
|
<message level="Info" culprit="write_master_push"><![CDATA["<b>alt_vip_vfb_0</b>" instantiated <b>alt_cusp_pushing_width_adapter</b> "<b>write_master_push</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd</b>]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 263 starting:alt_pc "submodules/alt_cusp161_pc"</message>
|
|
<message level="Info" culprit="pc0"><![CDATA["<b>alt_vip_vfb_0</b>" instantiated <b>alt_pc</b> "<b>pc0</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd</b>]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 203 starting:alt_cmp "submodules/alt_cusp161_cmp"</message>
|
|
<message level="Info" culprit="fu_id_4494_line325_93"><![CDATA["<b>alt_vip_vfb_0</b>" instantiated <b>alt_cmp</b> "<b>fu_id_4494_line325_93</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd</b>]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 153 starting:alt_cusp_testbench_clock "submodules/alt_cusp161_clock_reset"</message>
|
|
<message level="Info" culprit="clocksource"><![CDATA["<b>alt_vip_vfb_0</b>" instantiated <b>alt_cusp_testbench_clock</b> "<b>clocksource</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd</b>]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 219 starting:altpll "submodules/Qsys_altpll_0"</message>
|
|
<message level="Debug">set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files</message>
|
|
<message level="Debug">Command: F:/intelfpga_lite/16.1/quartus\bin64/quartus_map.exe not_a_project --generate_hdl_interface=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0060_sopcgen/Qsys_altpll_0.v --source=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0060_sopcgen/Qsys_altpll_0.v --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0061_sopcqmap/ --ini=disable_check_quartus_compatibility_qsys_only=on</message>
|
|
<message level="Debug">Command took 0.661s</message>
|
|
<message level="Info" culprit="altpll_0"><![CDATA["<b>Qsys</b>" instantiated <b>altpll</b> "<b>altpll_0</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 218 starting:i2c_opencores "submodules/i2c_opencores"</message>
|
|
<message level="Info" culprit="i2c_opencores_camera"><![CDATA["<b>Qsys</b>" instantiated <b>i2c_opencores</b> "<b>i2c_opencores_camera</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 216 starting:altera_avalon_jtag_uart "submodules/Qsys_jtag_uart"</message>
|
|
<message level="Info" culprit="jtag_uart">Starting RTL generation for module 'Qsys_jtag_uart'</message>
|
|
<message level="Info" culprit="jtag_uart"> Generation command is [exec F:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I F:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_jtag_uart -- F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_jtag_uart/generate_rtl.pl --name=Qsys_jtag_uart --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0063_jtag_uart_gen/ --quartus_dir=F:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0063_jtag_uart_gen//Qsys_jtag_uart_component_configuration.pl --do_build_sim=0 ]</message>
|
|
<message level="Info" culprit="jtag_uart">Done RTL generation for module 'Qsys_jtag_uart'</message>
|
|
<message level="Info" culprit="jtag_uart"><![CDATA["<b>Qsys</b>" instantiated <b>altera_avalon_jtag_uart</b> "<b>jtag_uart</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 215 starting:altera_avalon_pio "submodules/Qsys_key"</message>
|
|
<message level="Info" culprit="key">Starting RTL generation for module 'Qsys_key'</message>
|
|
<message level="Info" culprit="key"> Generation command is [exec F:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I F:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio -- F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio/generate_rtl.pl --name=Qsys_key --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0064_key_gen/ --quartus_dir=F:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0064_key_gen//Qsys_key_component_configuration.pl --do_build_sim=0 ]</message>
|
|
<message level="Info" culprit="key">Done RTL generation for module 'Qsys_key'</message>
|
|
<message level="Info" culprit="key"><![CDATA["<b>Qsys</b>" instantiated <b>altera_avalon_pio</b> "<b>key</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 214 starting:altera_avalon_pio "submodules/Qsys_led"</message>
|
|
<message level="Info" culprit="led">Starting RTL generation for module 'Qsys_led'</message>
|
|
<message level="Info" culprit="led"> Generation command is [exec F:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I F:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio -- F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio/generate_rtl.pl --name=Qsys_led --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0065_led_gen/ --quartus_dir=F:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0065_led_gen//Qsys_led_component_configuration.pl --do_build_sim=0 ]</message>
|
|
<message level="Info" culprit="led">Done RTL generation for module 'Qsys_led'</message>
|
|
<message level="Info" culprit="led"><![CDATA["<b>Qsys</b>" instantiated <b>altera_avalon_pio</b> "<b>led</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 213 starting:altera_avalon_pio "submodules/Qsys_mipi_pwdn_n"</message>
|
|
<message level="Info" culprit="mipi_pwdn_n">Starting RTL generation for module 'Qsys_mipi_pwdn_n'</message>
|
|
<message level="Info" culprit="mipi_pwdn_n"> Generation command is [exec F:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I F:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio -- F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio/generate_rtl.pl --name=Qsys_mipi_pwdn_n --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0066_mipi_pwdn_n_gen/ --quartus_dir=F:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0066_mipi_pwdn_n_gen//Qsys_mipi_pwdn_n_component_configuration.pl --do_build_sim=0 ]</message>
|
|
<message level="Info" culprit="mipi_pwdn_n">Done RTL generation for module 'Qsys_mipi_pwdn_n'</message>
|
|
<message level="Info" culprit="mipi_pwdn_n"><![CDATA["<b>Qsys</b>" instantiated <b>altera_avalon_pio</b> "<b>mipi_pwdn_n</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 211 starting:altera_nios2_gen2 "submodules/Qsys_nios2_gen2"</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Debug">Transform: CustomInstructionTransform</message>
|
|
<message level="Debug">No custom instruction connections, skipping transform </message>
|
|
<message level="Debug" culprit="merlin_custom_instruction_transform"><![CDATA[After transform: <b>3</b> modules, <b>3</b> connections]]></message>
|
|
<message level="Debug">Transform: MMTransform</message>
|
|
<message level="Debug">Transform: InterruptMapperTransform</message>
|
|
<message level="Debug">Transform: InterruptSyncTransform</message>
|
|
<message level="Debug">Transform: InterruptFanoutTransform</message>
|
|
<message level="Debug">Transform: AvalonStreamingTransform</message>
|
|
<message level="Debug">Transform: ResetAdaptation</message>
|
|
<message level="Debug" culprit="nios2_gen2"><![CDATA["<b>nios2_gen2</b>" reuses <b>altera_nios2_gen2_unit</b> "<b>submodules/Qsys_nios2_gen2_cpu</b>"]]></message>
|
|
<message level="Info" culprit="nios2_gen2"><![CDATA["<b>Qsys</b>" instantiated <b>altera_nios2_gen2</b> "<b>nios2_gen2</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 151 starting:altera_nios2_gen2_unit "submodules/Qsys_nios2_gen2_cpu"</message>
|
|
<message level="Info" culprit="cpu">Starting RTL generation for module 'Qsys_nios2_gen2_cpu'</message>
|
|
<message level="Info" culprit="cpu"> Generation command is [exec F:/intelFPGA_lite/16.1/quartus/bin64//eperlcmd.exe -I F:/intelFPGA_lite/16.1/quartus/bin64//perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/cpu_lib -I F:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/nios_lib -I F:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2 -I F:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2 -- F:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/generate_rtl.epl --name=Qsys_nios2_gen2_cpu --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0075_cpu_gen/ --quartus_bindir=F:/intelFPGA_lite/16.1/quartus/bin64/ --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0075_cpu_gen//Qsys_nios2_gen2_cpu_processor_configuration.pl --do_build_sim=0 ]</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:02 (*) Starting Nios II generation</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:02 (*) Checking for plaintext license.</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Couldn't query license setup in Quartus directory F:/intelFPGA_lite/16.1/quartus/bin64/</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Defaulting to contents of LM_LICENSE_FILE environment variable</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) LM_LICENSE_FILE environment variable is empty</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Plaintext license not found.</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Checking for encrypted license (non-evaluation).</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Couldn't query license setup in Quartus directory F:/intelFPGA_lite/16.1/quartus/bin64/</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Defaulting to contents of LM_LICENSE_FILE environment variable</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) LM_LICENSE_FILE environment variable is empty</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Encrypted license not found. Defaulting to OCP evaluation license (produces a time-limited SOF)</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Elaborating CPU configuration settings</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Creating all objects for CPU</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Testbench</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Instruction decoding</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Instruction fields</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Instruction decodes</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:04 (*) Signals for RTL simulation waveforms</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:04 (*) Instruction controls</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:04 (*) Pipeline frontend</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:04 (*) Pipeline backend</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:06 (*) Generating RTL from CPU objects</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:08 (*) Creating encrypted RTL</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:08 (*) Done Nios II generation</message>
|
|
<message level="Info" culprit="cpu">Done RTL generation for module 'Qsys_nios2_gen2_cpu'</message>
|
|
<message level="Info" culprit="cpu"><![CDATA["<b>nios2_gen2</b>" instantiated <b>altera_nios2_gen2_unit</b> "<b>cpu</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 211 starting:altera_avalon_onchip_memory2 "submodules/Qsys_onchip_memory2_0"</message>
|
|
<message level="Info" culprit="onchip_memory2_0">Starting RTL generation for module 'Qsys_onchip_memory2_0'</message>
|
|
<message level="Info" culprit="onchip_memory2_0"> Generation command is [exec F:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I F:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2 -- F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/generate_rtl.pl --name=Qsys_onchip_memory2_0 --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0067_onchip_memory2_0_gen/ --quartus_dir=F:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0067_onchip_memory2_0_gen//Qsys_onchip_memory2_0_component_configuration.pl --do_build_sim=0 ]</message>
|
|
<message level="Info" culprit="onchip_memory2_0">Done RTL generation for module 'Qsys_onchip_memory2_0'</message>
|
|
<message level="Info" culprit="onchip_memory2_0"><![CDATA["<b>Qsys</b>" instantiated <b>altera_avalon_onchip_memory2</b> "<b>onchip_memory2_0</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 210 starting:altera_avalon_new_sdram_controller "submodules/Qsys_sdram"</message>
|
|
<message level="Info" culprit="sdram">Starting RTL generation for module 'Qsys_sdram'</message>
|
|
<message level="Info" culprit="sdram"> Generation command is [exec F:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I F:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_new_sdram_controller -- F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_new_sdram_controller/generate_rtl.pl --name=Qsys_sdram --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0068_sdram_gen/ --quartus_dir=F:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0068_sdram_gen//Qsys_sdram_component_configuration.pl --do_build_sim=0 ]</message>
|
|
<message level="Info" culprit="sdram">Done RTL generation for module 'Qsys_sdram'</message>
|
|
<message level="Info" culprit="sdram"><![CDATA["<b>Qsys</b>" instantiated <b>altera_avalon_new_sdram_controller</b> "<b>sdram</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 209 starting:altera_avalon_pio "submodules/Qsys_sw"</message>
|
|
<message level="Info" culprit="sw">Starting RTL generation for module 'Qsys_sw'</message>
|
|
<message level="Info" culprit="sw"> Generation command is [exec F:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I F:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio -- F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio/generate_rtl.pl --name=Qsys_sw --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0069_sw_gen/ --quartus_dir=F:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0069_sw_gen//Qsys_sw_component_configuration.pl --do_build_sim=0 ]</message>
|
|
<message level="Info" culprit="sw">Done RTL generation for module 'Qsys_sw'</message>
|
|
<message level="Info" culprit="sw"><![CDATA["<b>Qsys</b>" instantiated <b>altera_avalon_pio</b> "<b>sw</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 208 starting:altera_avalon_sysid_qsys "submodules/Qsys_sysid_qsys"</message>
|
|
<message level="Info" culprit="sysid_qsys"><![CDATA["<b>Qsys</b>" instantiated <b>altera_avalon_sysid_qsys</b> "<b>sysid_qsys</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 207 starting:altera_avalon_timer "submodules/Qsys_timer"</message>
|
|
<message level="Info" culprit="timer">Starting RTL generation for module 'Qsys_timer'</message>
|
|
<message level="Info" culprit="timer"> Generation command is [exec F:/intelFPGA_lite/16.1/quartus/bin64//perl/bin/perl.exe -I F:/intelFPGA_lite/16.1/quartus/bin64//perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_timer -- F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_timer/generate_rtl.pl --name=Qsys_timer --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0071_timer_gen/ --quartus_dir=F:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0071_timer_gen//Qsys_timer_component_configuration.pl --do_build_sim=0 ]</message>
|
|
<message level="Info" culprit="timer">Done RTL generation for module 'Qsys_timer'</message>
|
|
<message level="Info" culprit="timer"><![CDATA["<b>Qsys</b>" instantiated <b>altera_avalon_timer</b> "<b>timer</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 206 starting:altera_avalon_uart "submodules/Qsys_uart_0"</message>
|
|
<message level="Info" culprit="uart_0">Starting RTL generation for module 'Qsys_uart_0'</message>
|
|
<message level="Info" culprit="uart_0"> Generation command is [exec F:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I F:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_uart -- F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_uart/generate_rtl.pl --name=Qsys_uart_0 --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0072_uart_0_gen/ --quartus_dir=F:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0072_uart_0_gen//Qsys_uart_0_component_configuration.pl --do_build_sim=0 ]</message>
|
|
<message level="Info" culprit="uart_0">Done RTL generation for module 'Qsys_uart_0'</message>
|
|
<message level="Info" culprit="uart_0"><![CDATA["<b>Qsys</b>" instantiated <b>altera_avalon_uart</b> "<b>uart_0</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 205 starting:altera_mm_interconnect "submodules/Qsys_mm_interconnect_0"</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Debug">Transform: CustomInstructionTransform</message>
|
|
<message level="Debug">No custom instruction connections, skipping transform </message>
|
|
<message level="Debug" culprit="merlin_custom_instruction_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: MMTransform</message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: InterruptMapperTransform</message>
|
|
<message level="Debug">Transform: InterruptSyncTransform</message>
|
|
<message level="Debug">Transform: InterruptFanoutTransform</message>
|
|
<message level="Debug">Transform: AvalonStreamingTransform</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info" culprit="avalon_st_adapter">Inserting error_adapter: error_adapter_0</message>
|
|
<message level="Debug" culprit="avalon_st_adapter.clk_bridge_0">Timing: ELA:1/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter.rst_bridge_0">Timing: ELA:2/0.000s/0.001s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter.error_adapter_0">Timing: ELA:1/0.007s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter">Timing: COM:3/0.026s/0.034s</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info" culprit="avalon_st_adapter_001">Inserting error_adapter: error_adapter_0</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_001.clk_bridge_0">Timing: ELA:1/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_001.rst_bridge_0">Timing: ELA:2/0.000s/0.001s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_001.error_adapter_0">Timing: ELA:1/0.007s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_001">Timing: COM:3/0.011s/0.011s</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info" culprit="avalon_st_adapter_002">Inserting error_adapter: error_adapter_0</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_002.clk_bridge_0">Timing: ELA:1/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_002.rst_bridge_0">Timing: ELA:2/0.000s/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_002.error_adapter_0">Timing: ELA:1/0.006s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_002">Timing: COM:3/0.010s/0.011s</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info" culprit="avalon_st_adapter_003">Inserting error_adapter: error_adapter_0</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_003.clk_bridge_0">Timing: ELA:1/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_003.rst_bridge_0">Timing: ELA:2/0.000s/0.001s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_003.error_adapter_0">Timing: ELA:1/0.007s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_003">Timing: COM:3/0.011s/0.012s</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info" culprit="avalon_st_adapter_004">Inserting error_adapter: error_adapter_0</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_004.clk_bridge_0">Timing: ELA:1/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_004.rst_bridge_0">Timing: ELA:2/0.000s/0.001s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_004.error_adapter_0">Timing: ELA:1/0.006s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_004">Timing: COM:3/0.010s/0.012s</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info" culprit="avalon_st_adapter_005">Inserting error_adapter: error_adapter_0</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_005.clk_bridge_0">Timing: ELA:1/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_005.rst_bridge_0">Timing: ELA:2/0.000s/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_005.error_adapter_0">Timing: ELA:1/0.008s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_005">Timing: COM:3/0.011s/0.012s</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info" culprit="avalon_st_adapter_006">Inserting error_adapter: error_adapter_0</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_006.clk_bridge_0">Timing: ELA:1/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_006.rst_bridge_0">Timing: ELA:2/0.000s/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_006.error_adapter_0">Timing: ELA:1/0.007s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_006">Timing: COM:3/0.011s/0.011s</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info" culprit="avalon_st_adapter_007">Inserting error_adapter: error_adapter_0</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_007.clk_bridge_0">Timing: ELA:1/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_007.rst_bridge_0">Timing: ELA:2/0.000s/0.001s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_007.error_adapter_0">Timing: ELA:1/0.005s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_007">Timing: COM:3/0.011s/0.012s</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info" culprit="avalon_st_adapter_008">Inserting error_adapter: error_adapter_0</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_008.clk_bridge_0">Timing: ELA:1/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_008.rst_bridge_0">Timing: ELA:2/0.000s/0.001s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_008.error_adapter_0">Timing: ELA:1/0.006s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_008">Timing: COM:3/0.011s/0.012s</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info" culprit="avalon_st_adapter_009">Inserting error_adapter: error_adapter_0</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_009.clk_bridge_0">Timing: ELA:1/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_009.rst_bridge_0">Timing: ELA:2/0.000s/0.001s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_009.error_adapter_0">Timing: ELA:1/0.007s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_009">Timing: COM:3/0.009s/0.011s</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info" culprit="avalon_st_adapter_010">Inserting error_adapter: error_adapter_0</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_010.clk_bridge_0">Timing: ELA:1/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_010.rst_bridge_0">Timing: ELA:2/0.000s/0.001s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_010.error_adapter_0">Timing: ELA:1/0.007s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_010">Timing: COM:3/0.011s/0.013s</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info" culprit="avalon_st_adapter_011">Inserting error_adapter: error_adapter_0</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_011.clk_bridge_0">Timing: ELA:1/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_011.rst_bridge_0">Timing: ELA:2/0.000s/0.001s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_011.error_adapter_0">Timing: ELA:1/0.006s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_011">Timing: COM:3/0.017s/0.027s</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info" culprit="avalon_st_adapter_012">Inserting error_adapter: error_adapter_0</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_012.clk_bridge_0">Timing: ELA:1/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_012.rst_bridge_0">Timing: ELA:2/0.000s/0.001s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_012.error_adapter_0">Timing: ELA:1/0.008s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_012">Timing: COM:3/0.011s/0.013s</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info" culprit="avalon_st_adapter_013">Inserting error_adapter: error_adapter_0</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_013.clk_bridge_0">Timing: ELA:1/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_013.rst_bridge_0">Timing: ELA:2/0.000s/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_013.error_adapter_0">Timing: ELA:1/0.006s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_013">Timing: COM:3/0.010s/0.012s</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info" culprit="avalon_st_adapter_014">Inserting error_adapter: error_adapter_0</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_014.clk_bridge_0">Timing: ELA:1/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_014.rst_bridge_0">Timing: ELA:2/0.000s/0.001s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_014.error_adapter_0">Timing: ELA:1/0.005s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_014">Timing: COM:3/0.009s/0.011s</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info" culprit="avalon_st_adapter_015">Inserting error_adapter: error_adapter_0</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_015.clk_bridge_0">Timing: ELA:1/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_015.rst_bridge_0">Timing: ELA:2/0.000s/0.001s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_015.error_adapter_0">Timing: ELA:1/0.005s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_015">Timing: COM:3/0.009s/0.010s</message>
|
|
<message
|
|
level="Debug"
|
|
culprit="com_altera_sopcmodel_transforms_avalonst_AvalonStreamingTransform"><![CDATA[After transform: <b>135</b> modules, <b>455</b> connections]]></message>
|
|
<message level="Debug">Transform: ResetAdaptation</message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_master_translator</b> "<b>submodules/altera_merlin_master_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_master_translator</b> "<b>submodules/altera_merlin_master_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_translator</b> "<b>submodules/altera_merlin_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_translator</b> "<b>submodules/altera_merlin_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_translator</b> "<b>submodules/altera_merlin_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_translator</b> "<b>submodules/altera_merlin_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_translator</b> "<b>submodules/altera_merlin_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_translator</b> "<b>submodules/altera_merlin_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_translator</b> "<b>submodules/altera_merlin_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_translator</b> "<b>submodules/altera_merlin_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_translator</b> "<b>submodules/altera_merlin_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_translator</b> "<b>submodules/altera_merlin_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_translator</b> "<b>submodules/altera_merlin_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_translator</b> "<b>submodules/altera_merlin_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_translator</b> "<b>submodules/altera_merlin_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_translator</b> "<b>submodules/altera_merlin_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_translator</b> "<b>submodules/altera_merlin_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_translator</b> "<b>submodules/altera_merlin_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_master_agent</b> "<b>submodules/altera_merlin_master_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_master_agent</b> "<b>submodules/altera_merlin_master_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_agent</b> "<b>submodules/altera_merlin_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_agent</b> "<b>submodules/altera_merlin_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_agent</b> "<b>submodules/altera_merlin_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_agent</b> "<b>submodules/altera_merlin_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_agent</b> "<b>submodules/altera_merlin_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_agent</b> "<b>submodules/altera_merlin_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_agent</b> "<b>submodules/altera_merlin_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_agent</b> "<b>submodules/altera_merlin_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_agent</b> "<b>submodules/altera_merlin_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_agent</b> "<b>submodules/altera_merlin_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_agent</b> "<b>submodules/altera_merlin_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_agent</b> "<b>submodules/altera_merlin_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_agent</b> "<b>submodules/altera_merlin_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_agent</b> "<b>submodules/altera_merlin_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_agent</b> "<b>submodules/altera_merlin_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_agent</b> "<b>submodules/altera_merlin_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_0_router</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_0_router_001</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_0_router_002</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_0_router_002</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_0_router_002</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_0_router_002</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_0_router_006</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_0_router_002</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_0_router_002</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_0_router_006</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_0_router_002</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_0_router_002</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_0_router_002</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_0_router_002</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_0_router_002</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_0_router_002</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_0_router_002</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_0_router_002</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_traffic_limiter</b> "<b>submodules/altera_merlin_traffic_limiter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_traffic_limiter</b> "<b>submodules/altera_merlin_traffic_limiter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_cmd_demux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_cmd_demux_001</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_cmd_mux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_cmd_mux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_cmd_mux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_cmd_mux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_cmd_mux_004</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_cmd_mux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_cmd_mux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_cmd_mux_004</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_cmd_mux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_cmd_mux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_cmd_mux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_cmd_mux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_cmd_mux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_cmd_mux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_cmd_mux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_cmd_mux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_rsp_demux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_rsp_demux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_rsp_demux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_rsp_demux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_rsp_demux_004</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_rsp_demux_005</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_rsp_demux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_rsp_demux_004</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_rsp_demux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_rsp_demux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_rsp_demux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_rsp_demux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_rsp_demux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_rsp_demux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_rsp_demux_005</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_rsp_demux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_rsp_mux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_rsp_mux_001</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_handshake_clock_crosser</b> "<b>submodules/altera_avalon_st_handshake_clock_crosser</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_handshake_clock_crosser</b> "<b>submodules/altera_avalon_st_handshake_clock_crosser</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_handshake_clock_crosser</b> "<b>submodules/altera_avalon_st_handshake_clock_crosser</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_handshake_clock_crosser</b> "<b>submodules/altera_avalon_st_handshake_clock_crosser</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_adapter</b> "<b>submodules/Qsys_mm_interconnect_0_avalon_st_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_adapter</b> "<b>submodules/Qsys_mm_interconnect_0_avalon_st_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_adapter</b> "<b>submodules/Qsys_mm_interconnect_0_avalon_st_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_adapter</b> "<b>submodules/Qsys_mm_interconnect_0_avalon_st_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_adapter</b> "<b>submodules/Qsys_mm_interconnect_0_avalon_st_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_adapter</b> "<b>submodules/Qsys_mm_interconnect_0_avalon_st_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_adapter</b> "<b>submodules/Qsys_mm_interconnect_0_avalon_st_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_adapter</b> "<b>submodules/Qsys_mm_interconnect_0_avalon_st_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_adapter</b> "<b>submodules/Qsys_mm_interconnect_0_avalon_st_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_adapter</b> "<b>submodules/Qsys_mm_interconnect_0_avalon_st_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_adapter</b> "<b>submodules/Qsys_mm_interconnect_0_avalon_st_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_adapter</b> "<b>submodules/Qsys_mm_interconnect_0_avalon_st_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_adapter</b> "<b>submodules/Qsys_mm_interconnect_0_avalon_st_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_adapter</b> "<b>submodules/Qsys_mm_interconnect_0_avalon_st_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_adapter</b> "<b>submodules/Qsys_mm_interconnect_0_avalon_st_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_adapter</b> "<b>submodules/Qsys_mm_interconnect_0_avalon_st_adapter</b>"]]></message>
|
|
<message level="Info" culprit="mm_interconnect_0"><![CDATA["<b>Qsys</b>" instantiated <b>altera_mm_interconnect</b> "<b>mm_interconnect_0</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 150 starting:altera_merlin_master_translator "submodules/altera_merlin_master_translator"</message>
|
|
<message level="Info" culprit="nios2_gen2_data_master_translator"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_master_translator</b> "<b>nios2_gen2_data_master_translator</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 148 starting:altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"</message>
|
|
<message level="Info" culprit="jtag_uart_avalon_jtag_slave_translator"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_slave_translator</b> "<b>jtag_uart_avalon_jtag_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 132 starting:altera_merlin_master_agent "submodules/altera_merlin_master_agent"</message>
|
|
<message level="Info" culprit="nios2_gen2_data_master_agent"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_master_agent</b> "<b>nios2_gen2_data_master_agent</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 130 starting:altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"</message>
|
|
<message level="Info" culprit="jtag_uart_avalon_jtag_slave_agent"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_slave_agent</b> "<b>jtag_uart_avalon_jtag_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 129 starting:altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"</message>
|
|
<message level="Info" culprit="jtag_uart_avalon_jtag_slave_agent_rsp_fifo"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_avalon_sc_fifo</b> "<b>jtag_uart_avalon_jtag_slave_agent_rsp_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 96 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_0_router"</message>
|
|
<message level="Info" culprit="router"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_router</b> "<b>router</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 95 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_001"</message>
|
|
<message level="Info" culprit="router_001"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_router</b> "<b>router_001</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 94 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_002"</message>
|
|
<message level="Info" culprit="router_002"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_router</b> "<b>router_002</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 90 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_006"</message>
|
|
<message level="Info" culprit="router_006"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_router</b> "<b>router_006</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 78 starting:altera_merlin_traffic_limiter "submodules/altera_merlin_traffic_limiter"</message>
|
|
<message level="Info" culprit="nios2_gen2_data_master_limiter"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_traffic_limiter</b> "<b>nios2_gen2_data_master_limiter</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_sc_fifo.v</b>]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 76 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_cmd_demux"</message>
|
|
<message level="Info" culprit="cmd_demux"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_demultiplexer</b> "<b>cmd_demux</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 75 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_cmd_demux_001"</message>
|
|
<message level="Info" culprit="cmd_demux_001"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_demultiplexer</b> "<b>cmd_demux_001</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 74 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_cmd_mux"</message>
|
|
<message level="Info" culprit="cmd_mux"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_multiplexer</b> "<b>cmd_mux</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 70 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_cmd_mux_004"</message>
|
|
<message level="Info" culprit="cmd_mux_004"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_multiplexer</b> "<b>cmd_mux_004</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv</b>]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 58 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux"</message>
|
|
<message level="Info" culprit="rsp_demux"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_demultiplexer</b> "<b>rsp_demux</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 54 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux_004"</message>
|
|
<message level="Info" culprit="rsp_demux_004"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_demultiplexer</b> "<b>rsp_demux_004</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 53 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux_005"</message>
|
|
<message level="Info" culprit="rsp_demux_005"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_demultiplexer</b> "<b>rsp_demux_005</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 42 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_rsp_mux"</message>
|
|
<message level="Info" culprit="rsp_mux"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_multiplexer</b> "<b>rsp_mux</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv</b>]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 41 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_rsp_mux_001"</message>
|
|
<message level="Info" culprit="rsp_mux_001"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_multiplexer</b> "<b>rsp_mux_001</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv</b>]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 40 starting:altera_avalon_st_handshake_clock_crosser "submodules/altera_avalon_st_handshake_clock_crosser"</message>
|
|
<message level="Info" culprit="crosser"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_avalon_st_handshake_clock_crosser</b> "<b>crosser</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_pipeline_base.v</b>]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 36 starting:altera_avalon_st_adapter "submodules/Qsys_mm_interconnect_0_avalon_st_adapter"</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Debug">Transform: CustomInstructionTransform</message>
|
|
<message level="Debug">No custom instruction connections, skipping transform </message>
|
|
<message level="Debug" culprit="merlin_custom_instruction_transform"><![CDATA[After transform: <b>3</b> modules, <b>3</b> connections]]></message>
|
|
<message level="Debug">Transform: MMTransform</message>
|
|
<message level="Debug">Transform: InterruptMapperTransform</message>
|
|
<message level="Debug">Transform: InterruptSyncTransform</message>
|
|
<message level="Debug">Transform: InterruptFanoutTransform</message>
|
|
<message level="Debug">Transform: AvalonStreamingTransform</message>
|
|
<message level="Debug">Transform: ResetAdaptation</message>
|
|
<message level="Debug" culprit="avalon_st_adapter"><![CDATA["<b>avalon_st_adapter</b>" reuses <b>error_adapter</b> "<b>submodules/Qsys_mm_interconnect_0_avalon_st_adapter_error_adapter_0</b>"]]></message>
|
|
<message level="Info" culprit="avalon_st_adapter"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_avalon_st_adapter</b> "<b>avalon_st_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 1 starting:error_adapter "submodules/Qsys_mm_interconnect_0_avalon_st_adapter_error_adapter_0"</message>
|
|
<message level="Info" culprit="error_adapter_0"><![CDATA["<b>avalon_st_adapter</b>" instantiated <b>error_adapter</b> "<b>error_adapter_0</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 334 starting:altera_mm_interconnect "submodules/Qsys_mm_interconnect_1"</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Debug">Transform: CustomInstructionTransform</message>
|
|
<message level="Debug">No custom instruction connections, skipping transform </message>
|
|
<message level="Debug" culprit="merlin_custom_instruction_transform"><![CDATA[After transform: <b>22</b> modules, <b>64</b> connections]]></message>
|
|
<message level="Debug">Transform: MMTransform</message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>22</b> modules, <b>64</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>22</b> modules, <b>64</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>22</b> modules, <b>64</b> connections]]></message>
|
|
<message level="Debug">Transform: InterruptMapperTransform</message>
|
|
<message level="Debug">Transform: InterruptSyncTransform</message>
|
|
<message level="Debug">Transform: InterruptFanoutTransform</message>
|
|
<message level="Debug">Transform: AvalonStreamingTransform</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info" culprit="avalon_st_adapter">Inserting error_adapter: error_adapter_0</message>
|
|
<message level="Debug" culprit="avalon_st_adapter.clk_bridge_0">Timing: ELA:1/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter.rst_bridge_0">Timing: ELA:2/0.000s/0.001s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter.error_adapter_0">Timing: ELA:1/0.007s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter">Timing: COM:3/0.013s/0.015s</message>
|
|
<message
|
|
level="Debug"
|
|
culprit="com_altera_sopcmodel_transforms_avalonst_AvalonStreamingTransform"><![CDATA[After transform: <b>23</b> modules, <b>67</b> connections]]></message>
|
|
<message level="Debug">Transform: ResetAdaptation</message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_merlin_master_translator</b> "<b>submodules/altera_merlin_master_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_merlin_master_translator</b> "<b>submodules/altera_merlin_master_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_merlin_slave_translator</b> "<b>submodules/altera_merlin_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_merlin_master_agent</b> "<b>submodules/altera_merlin_master_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_merlin_master_agent</b> "<b>submodules/altera_merlin_master_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_merlin_slave_agent</b> "<b>submodules/altera_merlin_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_1_router</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_1_router</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_1_router_002</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_merlin_burst_adapter</b> "<b>submodules/altera_merlin_burst_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_1_cmd_demux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_1_cmd_demux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_1_cmd_mux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_1_rsp_demux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_1_rsp_mux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_1_rsp_mux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_merlin_width_adapter</b> "<b>submodules/altera_merlin_width_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_merlin_width_adapter</b> "<b>submodules/altera_merlin_width_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_avalon_st_adapter</b> "<b>submodules/Qsys_mm_interconnect_1_avalon_st_adapter</b>"]]></message>
|
|
<message level="Info" culprit="mm_interconnect_1"><![CDATA["<b>Qsys</b>" instantiated <b>altera_mm_interconnect</b> "<b>mm_interconnect_1</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 150 starting:altera_merlin_master_translator "submodules/altera_merlin_master_translator"</message>
|
|
<message level="Info" culprit="nios2_gen2_data_master_translator"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_master_translator</b> "<b>nios2_gen2_data_master_translator</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 148 starting:altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"</message>
|
|
<message level="Info" culprit="jtag_uart_avalon_jtag_slave_translator"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_slave_translator</b> "<b>jtag_uart_avalon_jtag_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 132 starting:altera_merlin_master_agent "submodules/altera_merlin_master_agent"</message>
|
|
<message level="Info" culprit="nios2_gen2_data_master_agent"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_master_agent</b> "<b>nios2_gen2_data_master_agent</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 130 starting:altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"</message>
|
|
<message level="Info" culprit="jtag_uart_avalon_jtag_slave_agent"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_slave_agent</b> "<b>jtag_uart_avalon_jtag_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 129 starting:altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"</message>
|
|
<message level="Info" culprit="jtag_uart_avalon_jtag_slave_agent_rsp_fifo"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_avalon_sc_fifo</b> "<b>jtag_uart_avalon_jtag_slave_agent_rsp_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 13 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_1_router"</message>
|
|
<message level="Info" culprit="router"><![CDATA["<b>mm_interconnect_1</b>" instantiated <b>altera_merlin_router</b> "<b>router</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 11 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_1_router_002"</message>
|
|
<message level="Info" culprit="router_002"><![CDATA["<b>mm_interconnect_1</b>" instantiated <b>altera_merlin_router</b> "<b>router_002</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 10 starting:altera_merlin_burst_adapter "submodules/altera_merlin_burst_adapter"</message>
|
|
<message level="Info" culprit="sdram_s1_burst_adapter"><![CDATA["<b>mm_interconnect_1</b>" instantiated <b>altera_merlin_burst_adapter</b> "<b>sdram_s1_burst_adapter</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_pipeline_base.v</b>]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 9 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_1_cmd_demux"</message>
|
|
<message level="Info" culprit="cmd_demux"><![CDATA["<b>mm_interconnect_1</b>" instantiated <b>altera_merlin_demultiplexer</b> "<b>cmd_demux</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 7 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_1_cmd_mux"</message>
|
|
<message level="Info" culprit="cmd_mux"><![CDATA["<b>mm_interconnect_1</b>" instantiated <b>altera_merlin_multiplexer</b> "<b>cmd_mux</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv</b>]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 6 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_1_rsp_demux"</message>
|
|
<message level="Info" culprit="rsp_demux"><![CDATA["<b>mm_interconnect_1</b>" instantiated <b>altera_merlin_demultiplexer</b> "<b>rsp_demux</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 5 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_1_rsp_mux"</message>
|
|
<message level="Info" culprit="rsp_mux"><![CDATA["<b>mm_interconnect_1</b>" instantiated <b>altera_merlin_multiplexer</b> "<b>rsp_mux</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv</b>]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 3 starting:altera_merlin_width_adapter "submodules/altera_merlin_width_adapter"</message>
|
|
<message level="Info" culprit="sdram_s1_rsp_width_adapter"><![CDATA["<b>mm_interconnect_1</b>" instantiated <b>altera_merlin_width_adapter</b> "<b>sdram_s1_rsp_width_adapter</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_address_alignment.sv</b>]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_burst_uncompressor.sv</b>]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 1 starting:altera_avalon_st_adapter "submodules/Qsys_mm_interconnect_1_avalon_st_adapter"</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Debug">Transform: CustomInstructionTransform</message>
|
|
<message level="Debug">No custom instruction connections, skipping transform </message>
|
|
<message level="Debug" culprit="merlin_custom_instruction_transform"><![CDATA[After transform: <b>3</b> modules, <b>3</b> connections]]></message>
|
|
<message level="Debug">Transform: MMTransform</message>
|
|
<message level="Debug">Transform: InterruptMapperTransform</message>
|
|
<message level="Debug">Transform: InterruptSyncTransform</message>
|
|
<message level="Debug">Transform: InterruptFanoutTransform</message>
|
|
<message level="Debug">Transform: AvalonStreamingTransform</message>
|
|
<message level="Debug">Transform: ResetAdaptation</message>
|
|
<message level="Debug" culprit="avalon_st_adapter"><![CDATA["<b>avalon_st_adapter</b>" reuses <b>error_adapter</b> "<b>submodules/Qsys_mm_interconnect_1_avalon_st_adapter_error_adapter_0</b>"]]></message>
|
|
<message level="Info" culprit="avalon_st_adapter"><![CDATA["<b>mm_interconnect_1</b>" instantiated <b>altera_avalon_st_adapter</b> "<b>avalon_st_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 0 starting:error_adapter "submodules/Qsys_mm_interconnect_1_avalon_st_adapter_error_adapter_0"</message>
|
|
<message level="Info" culprit="error_adapter_0"><![CDATA["<b>avalon_st_adapter</b>" instantiated <b>error_adapter</b> "<b>error_adapter_0</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 354 starting:altera_irq_mapper "submodules/Qsys_irq_mapper"</message>
|
|
<message level="Info" culprit="irq_mapper"><![CDATA["<b>Qsys</b>" instantiated <b>altera_irq_mapper</b> "<b>irq_mapper</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 353 starting:altera_reset_controller "submodules/altera_reset_controller"</message>
|
|
<message level="Info" culprit="rst_controller"><![CDATA["<b>Qsys</b>" instantiated <b>altera_reset_controller</b> "<b>rst_controller</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="EEE_IMGPROC:1.0:"
|
|
instancePathKey="Qsys:.:EEE_IMGPROC_0"
|
|
kind="EEE_IMGPROC"
|
|
version="1.0"
|
|
name="EEE_IMGPROC">
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/EEE_IMGPROC.v"
|
|
type="VERILOG"
|
|
attributes="TOP_LEVEL_FILE" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/EEE_IMGPROC_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys" as="EEE_IMGPROC_0" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 25 starting:EEE_IMGPROC "submodules/EEE_IMGPROC"</message>
|
|
<message level="Info" culprit="EEE_IMGPROC_0"><![CDATA["<b>Qsys</b>" instantiated <b>EEE_IMGPROC</b> "<b>EEE_IMGPROC_0</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="TERASIC_AUTO_FOCUS:1.0:VIDEO_H=480,VIDEO_W=640"
|
|
instancePathKey="Qsys:.:TERASIC_AUTO_FOCUS_0"
|
|
kind="TERASIC_AUTO_FOCUS"
|
|
version="1.0"
|
|
name="TERASIC_AUTO_FOCUS">
|
|
<parameter name="VIDEO_W" value="640" />
|
|
<parameter name="VIDEO_H" value="480" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/F_VCM.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/I2C_VCM_Config.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/I2C_VCM_Controller.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/TERASIC_AUTO_FOCUS.v"
|
|
type="VERILOG"
|
|
attributes="TOP_LEVEL_FILE" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/VCM_CTRL_P.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_AUTO_FOCUS/TERASIC_AUTO_FOCUS_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys" as="TERASIC_AUTO_FOCUS_0" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 24 starting:TERASIC_AUTO_FOCUS "submodules/TERASIC_AUTO_FOCUS"</message>
|
|
<message level="Info" culprit="TERASIC_AUTO_FOCUS_0"><![CDATA["<b>Qsys</b>" instantiated <b>TERASIC_AUTO_FOCUS</b> "<b>TERASIC_AUTO_FOCUS_0</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="TERASIC_CAMERA:1.0:VIDEO_H=480,VIDEO_W=640"
|
|
instancePathKey="Qsys:.:TERASIC_CAMERA_0"
|
|
kind="TERASIC_CAMERA"
|
|
version="1.0"
|
|
name="TERASIC_CAMERA">
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/TERASIC_CAMERA.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/CAMERA_RGB.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/CAMERA_Bayer.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Bayer2RGB.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Bayer_LineBuffer.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/rgb_fifo.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/add2.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/add4.v"
|
|
type="VERILOG" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/TERASIC_CAMERA_hw.tcl" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/TERASIC_CAMERA.v" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/CAMERA_RGB.v" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/CAMERA_Bayer.v" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/Bayer2RGB.v" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/Bayer_LineBuffer.v" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/rgb_fifo.v" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/add2.v" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/add4.v" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys" as="TERASIC_CAMERA_0" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 23 starting:TERASIC_CAMERA "submodules/TERASIC_CAMERA"</message>
|
|
<message level="Debug">set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files</message>
|
|
<message level="Debug">Command: F:/intelfpga_lite/16.1/quartus\bin64/quartus_sh.exe -t C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0054_sopcqmap/not_a_project_setup.tcl</message>
|
|
<message level="Debug">Command: F:/intelfpga_lite/16.1/quartus\bin64/quartus_map.exe not_a_project --generate_hdl_interface=F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/TERASIC_CAMERA.v --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0054_sopcqmap/ --ini=disable_check_quartus_compatibility_qsys_only=on</message>
|
|
<message level="Debug">Command took 0.590s</message>
|
|
<message level="Debug">Command took 0.627s</message>
|
|
<message level="Debug">set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files</message>
|
|
<message level="Debug">Command: F:/intelfpga_lite/16.1/quartus\bin64/quartus_sh.exe -t C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0057_sopcqmap/not_a_project_setup.tcl</message>
|
|
<message level="Debug">Command: F:/intelfpga_lite/16.1/quartus\bin64/quartus_map.exe not_a_project --generate_hdl_interface=F:\Ed\Stuff\EEE2Rover\DE10_LITE_D8M_VIP_16\ip\TERASIC_CAMERA\TERASIC_CAMERA.v --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0057_sopcqmap/ --set=HDL_INTERFACE_INSTANCE_NAME=inst --set=HDL_INTERFACE_INSTANCE_ENTITY=TERASIC_CAMERA "--set=HDL_INTERFACE_INSTANCE_PARAMETERS=VIDEO_W=D\"640\";VIDEO_H=D\"480\";" --ini=disable_check_quartus_compatibility_qsys_only=on</message>
|
|
<message level="Debug">Command took 0.533s</message>
|
|
<message level="Debug">Command took 0.605s</message>
|
|
<message level="Info" culprit="TERASIC_CAMERA_0"><![CDATA["<b>Qsys</b>" instantiated <b>TERASIC_CAMERA</b> "<b>TERASIC_CAMERA_0</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="alt_vip_itc:14.0:ACCEPT_COLOURS_IN_SEQ=0,ANC_LINE=0,AP_LINE=0,BPS=8,CLOCKS_ARE_SAME=0,COLOUR_PLANES_ARE_IN_PARALLEL=1,FAMILY=MAX 10,FIELD0_ANC_LINE=0,FIELD0_V_BACK_PORCH=0,FIELD0_V_BLANK=0,FIELD0_V_FRONT_PORCH=0,FIELD0_V_RISING_EDGE=0,FIELD0_V_SYNC_LENGTH=0,FIFO_DEPTH=640,F_FALLING_EDGE=0,F_RISING_EDGE=0,GENERATE_SYNC=0,H_ACTIVE_PIXELS=640,H_BACK_PORCH=48,H_BLANK=0,H_FRONT_PORCH=16,H_SYNC_LENGTH=96,INTERLACED=0,NO_OF_MODES=1,NUMBER_OF_COLOUR_PLANES=3,STD_WIDTH=1,THRESHOLD=639,USE_CONTROL=0,USE_EMBEDDED_SYNCS=0,V_ACTIVE_LINES=480,V_BACK_PORCH=33,V_BLANK=0,V_FRONT_PORCH=10,V_SYNC_LENGTH=2"
|
|
instancePathKey="Qsys:.:alt_vip_itc_0"
|
|
kind="alt_vip_itc"
|
|
version="14.0"
|
|
name="alt_vipitc131_IS2Vid">
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_IS2Vid.sv"
|
|
type="SYSTEM_VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_IS2Vid_sync_compare.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_IS2Vid_calculate_mode.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_IS2Vid_control.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_IS2Vid_mode_banks.sv"
|
|
type="SYSTEM_VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_IS2Vid_statemachine.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_common_fifo.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_common_generic_count.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_common_to_binary.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_common_sync.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_common_trigger_sync.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_common_sync_generation.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_common_frame_counter.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_common_sample_counter.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_cvo.sdc"
|
|
type="SDC" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/alt_vip_itc_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid.sv" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid_sync_compare.v" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid_calculate_mode.v" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid_control.v" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid_mode_banks.sv" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid_statemachine.v" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_fifo.v" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_generic_count.v" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_to_binary.v" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_sync.v" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_trigger_sync.v" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_sync_generation.v" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_frame_counter.v" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_sample_counter.v" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/alt_vipitc131_cvo.sdc" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys" as="alt_vip_itc_0" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 22 starting:alt_vip_itc "submodules/alt_vipitc131_IS2Vid"</message>
|
|
<message level="Debug">set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files</message>
|
|
<message level="Debug">Command: F:/intelfpga_lite/16.1/quartus\bin64/quartus_sh.exe -t C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0058_sopcqmap/not_a_project_setup.tcl</message>
|
|
<message level="Debug">Command: F:/intelfpga_lite/16.1/quartus\bin64/quartus_map.exe not_a_project --generate_hdl_interface=F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid.sv --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0058_sopcqmap/ --ini=disable_check_quartus_compatibility_qsys_only=on</message>
|
|
<message level="Debug">Command took 0.524s</message>
|
|
<message level="Debug">Command took 0.629s</message>
|
|
<message level="Debug">set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files</message>
|
|
<message level="Debug">Command: F:/intelfpga_lite/16.1/quartus\bin64/quartus_sh.exe -t C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0059_sopcqmap/not_a_project_setup.tcl</message>
|
|
<message level="Debug">Command: F:/intelfpga_lite/16.1/quartus\bin64/quartus_map.exe not_a_project --generate_hdl_interface=F:\intelfpga_lite\16.1\ip\altera\clocked_video_output\src_hdl\alt_vipitc131_IS2Vid.sv --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0059_sopcqmap/ --set=HDL_INTERFACE_INSTANCE_NAME=inst --set=HDL_INTERFACE_INSTANCE_ENTITY=alt_vipitc131_IS2Vid "--set=HDL_INTERFACE_INSTANCE_PARAMETERS=NUMBER_OF_COLOUR_PLANES=D\"3\";COLOUR_PLANES_ARE_IN_PARALLEL=D\"1\";BPS=D\"8\";INTERLACED=D\"0\";H_ACTIVE_PIXELS=D\"640\";V_ACTIVE_LINES=D\"480\";ACCEPT_COLOURS_IN_SEQ=D\"0\";FIFO_DEPTH=D\"640\";CLOCKS_ARE_SAME=D\"0\";USE_CONTROL=D\"0\";NO_OF_MODES=D\"1\";THRESHOLD=D\"639\";STD_WIDTH=D\"1\";GENERATE_SYNC=D\"0\";USE_EMBEDDED_SYNCS=D\"0\";AP_LINE=D\"0\";V_BLANK=D\"0\";H_BLANK=D\"0\";H_SYNC_LENGTH=D\"96\";H_FRONT_PORCH=D\"16\";H_BACK_PORCH=D\"48\";V_SYNC_LENGTH=D\"2\";V_FRONT_PORCH=D\"10\";V_BACK_PORCH=D\"33\";F_RISING_EDGE=D\"0\";F_FALLING_EDGE=D\"0\";FIELD0_V_RISING_EDGE=D\"0\";FIELD0_V_BLANK=D\"0\";FIELD0_V_SYNC_LENGTH=D\"0\";FIELD0_V_FRONT_PORCH=D\"0\";FIELD0_V_BACK_PORCH=D\"0\";ANC_LINE=D\"0\";FIELD0_ANC_LINE=D\"0\";" --ini=disable_check_quartus_compatibility_qsys_only=on</message>
|
|
<message level="Debug">Command took 0.527s</message>
|
|
<message level="Debug">Command took 0.635s</message>
|
|
<message level="Info" culprit="alt_vip_itc_0"><![CDATA["<b>Qsys</b>" instantiated <b>alt_vip_itc</b> "<b>alt_vip_itc_0</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="alt_vip_vfb:13.1:AUTO_DEVICE_FAMILY=MAX 10,AUTO_READER_CONTROL_CLOCKS_SAME=0,AUTO_READ_MASTER_CLOCKS_SAME=0,AUTO_READ_MASTER_INTERRUPT_USED_MASK=0,AUTO_READ_MASTER_MAX_READ_LATENCY=2,AUTO_READ_MASTER_NEED_ADDR_WIDTH=27,AUTO_WRITER_CONTROL_CLOCKS_SAME=0,AUTO_WRITE_MASTER_CLOCKS_SAME=0,AUTO_WRITE_MASTER_INTERRUPT_USED_MASK=0,AUTO_WRITE_MASTER_MAX_READ_LATENCY=2,AUTO_WRITE_MASTER_NEED_ADDR_WIDTH=27,PARAMETERISATION=<frameBufferParams><VFB_NAME>MyFrameBuffer</VFB_NAME><VFB_MAX_WIDTH>640</VFB_MAX_WIDTH><VFB_MAX_HEIGHT>480</VFB_MAX_HEIGHT><VFB_BPS>8</VFB_BPS><VFB_CHANNELS_IN_SEQ>1</VFB_CHANNELS_IN_SEQ><VFB_CHANNELS_IN_PAR>3</VFB_CHANNELS_IN_PAR><VFB_WRITER_RUNTIME_CONTROL>false</VFB_WRITER_RUNTIME_CONTROL><VFB_DROP_FRAMES>true</VFB_DROP_FRAMES><VFB_READER_RUNTIME_CONTROL>0</VFB_READER_RUNTIME_CONTROL><VFB_REPEAT_FRAMES>true</VFB_REPEAT_FRAMES><VFB_FRAMEBUFFERS_ADDR>00000000</VFB_FRAMEBUFFERS_ADDR><VFB_MEM_PORT_WIDTH>32</VFB_MEM_PORT_WIDTH><VFB_MEM_MASTERS_USE_SEPARATE_CLOCK>false</VFB_MEM_MASTERS_USE_SEPARATE_CLOCK><VFB_RDATA_FIFO_DEPTH>1024</VFB_RDATA_FIFO_DEPTH><VFB_RDATA_BURST_TARGET>4</VFB_RDATA_BURST_TARGET><VFB_WDATA_FIFO_DEPTH>1024</VFB_WDATA_FIFO_DEPTH><VFB_WDATA_BURST_TARGET>4</VFB_WDATA_BURST_TARGET><VFB_MAX_NUMBER_PACKETS>1</VFB_MAX_NUMBER_PACKETS><VFB_MAX_SYMBOLS_IN_PACKET>10</VFB_MAX_SYMBOLS_IN_PACKET><VFB_INTERLACED_SUPPORT>0</VFB_INTERLACED_SUPPORT><VFB_CONTROLLED_DROP_REPEAT>0</VFB_CONTROLLED_DROP_REPEAT><VFB_BURST_ALIGNMENT>0</VFB_BURST_ALIGNMENT><VFB_DROP_INVALID_FIELDS>false</VFB_DROP_INVALID_FIELDS></frameBufferParams>"
|
|
instancePathKey="Qsys:.:alt_vip_vfb_0"
|
|
kind="alt_vip_vfb"
|
|
version="13.1"
|
|
name="Qsys_alt_vip_vfb_0">
|
|
<parameter name="AUTO_WRITE_MASTER_CLOCKS_SAME" value="0" />
|
|
<parameter name="AUTO_WRITE_MASTER_INTERRUPT_USED_MASK" value="0" />
|
|
<parameter name="AUTO_READ_MASTER_MAX_READ_LATENCY" value="2" />
|
|
<parameter name="AUTO_READ_MASTER_CLOCKS_SAME" value="0" />
|
|
<parameter name="AUTO_WRITE_MASTER_MAX_READ_LATENCY" value="2" />
|
|
<parameter name="AUTO_DEVICE_FAMILY" value="MAX 10" />
|
|
<parameter name="AUTO_WRITER_CONTROL_CLOCKS_SAME" value="0" />
|
|
<parameter name="AUTO_READ_MASTER_INTERRUPT_USED_MASK" value="0" />
|
|
<parameter name="AUTO_READER_CONTROL_CLOCKS_SAME" value="0" />
|
|
<parameter name="AUTO_READ_MASTER_NEED_ADDR_WIDTH" value="27" />
|
|
<parameter name="AUTO_WRITE_MASTER_NEED_ADDR_WIDTH" value="27" />
|
|
<parameter
|
|
name="PARAMETERISATION"
|
|
value="<frameBufferParams><VFB_NAME>MyFrameBuffer</VFB_NAME><VFB_MAX_WIDTH>640</VFB_MAX_WIDTH><VFB_MAX_HEIGHT>480</VFB_MAX_HEIGHT><VFB_BPS>8</VFB_BPS><VFB_CHANNELS_IN_SEQ>1</VFB_CHANNELS_IN_SEQ><VFB_CHANNELS_IN_PAR>3</VFB_CHANNELS_IN_PAR><VFB_WRITER_RUNTIME_CONTROL>false</VFB_WRITER_RUNTIME_CONTROL><VFB_DROP_FRAMES>true</VFB_DROP_FRAMES><VFB_READER_RUNTIME_CONTROL>0</VFB_READER_RUNTIME_CONTROL><VFB_REPEAT_FRAMES>true</VFB_REPEAT_FRAMES><VFB_FRAMEBUFFERS_ADDR>00000000</VFB_FRAMEBUFFERS_ADDR><VFB_MEM_PORT_WIDTH>32</VFB_MEM_PORT_WIDTH><VFB_MEM_MASTERS_USE_SEPARATE_CLOCK>false</VFB_MEM_MASTERS_USE_SEPARATE_CLOCK><VFB_RDATA_FIFO_DEPTH>1024</VFB_RDATA_FIFO_DEPTH><VFB_RDATA_BURST_TARGET>4</VFB_RDATA_BURST_TARGET><VFB_WDATA_FIFO_DEPTH>1024</VFB_WDATA_FIFO_DEPTH><VFB_WDATA_BURST_TARGET>4</VFB_WDATA_BURST_TARGET><VFB_MAX_NUMBER_PACKETS>1</VFB_MAX_NUMBER_PACKETS><VFB_MAX_SYMBOLS_IN_PACKET>10</VFB_MAX_SYMBOLS_IN_PACKET><VFB_INTERLACED_SUPPORT>0</VFB_INTERLACED_SUPPORT><VFB_CONTROLLED_DROP_REPEAT>0</VFB_CONTROLLED_DROP_REPEAT><VFB_BURST_ALIGNMENT>0</VFB_BURST_ALIGNMENT><VFB_DROP_INVALID_FIELDS>false</VFB_DROP_INVALID_FIELDS></frameBufferParams>" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_alt_vip_vfb_0.ocp"
|
|
type="OTHER" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_alt_vip_vfb_0_vfb_writer_vfb_writer.trace"
|
|
type="OTHER" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_alt_vip_vfb_0_vfb_reader_vfb_reader.trace"
|
|
type="OTHER" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_alt_vip_vfb_0.vhd"
|
|
type="VHDL_ENCRYPT" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_alt_vip_vfb_0_tb.vhd"
|
|
type="VHDL" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_muxbin2.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_au.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_addsubcarry.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_reg.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_muxhot16.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_avalon_st_input.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_avalon_st_output.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_atlantic_reporter.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_avalon_mm_bursting_master_fifo.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_fifo.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_fifo_usedw_calculator.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_general_fifo.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_gray_clock_crosser.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_logic_fifo.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_one_bit_delay.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_ram_fifo.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_std_logic_vector_delay.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_pulling_width_adapter.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_pushing_width_adapter.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_pc.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_cmp.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_clock_reset.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_alt_vip_vfb_0.ocp"
|
|
type="OTHER" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_alt_vip_vfb_0_vfb_writer_vfb_writer.trace"
|
|
type="OTHER" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_alt_vip_vfb_0_vfb_reader_vfb_reader.trace"
|
|
type="OTHER" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_alt_vip_vfb_0.vhd"
|
|
type="VHDL_ENCRYPT" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_alt_vip_vfb_0_tb.vhd"
|
|
type="VHDL" />
|
|
</childGeneratedFiles>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/frame_buffer/lib/alt_vip_vfb.cpp" />
|
|
<file path="F:/intelfpga_lite/16.1/ip/altera/frame_buffer/lib/vip_common.h" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/frame_buffer/lib/vip_constants.h" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/frame_buffer/lib/vip_elementclass_info.h" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/frame_buffer/lib/vip_vfb_hwfast.hpp" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/include/alt_cusp.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/alt_cdfg_types.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/alt_cusp_synth.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/alt_exception.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/alt_lib_types.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/alt_util.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_au.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_avalon_eb.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_avalon_mm.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_avalon_st.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_cmp.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_fifo.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_fifo_paged.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_fp_au.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_fp_cmp.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_fp_mult.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_gpio.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_immed.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_mac.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_mem.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_mult.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_multadd.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_reg.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_shift.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_tapped_delay.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_avalon_bus.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_avalon_eb_channel.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_avalon_st_channel.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_debug.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_exit.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_overlay.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_pc.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/assert.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/c++io.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/char_traits.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/ieeefp.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/limits.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/cassert" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/cctype" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/climits" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/cstddef" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/cstdio" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/cstdlib" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/cstring" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/ctype.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/exception" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/fstream" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/iosfwd" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/iostream" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/math.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/memory" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/new" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/pthread.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/sstream" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stdarg.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stddef.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stdexcept" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stdio.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stdlib.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/string" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/string.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/typeinfo" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/vector" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cassert" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cctype" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/climits" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/config/stl_confix.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/config/stl_cusp.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/config/stlcomp.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cstddef" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cstdio" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cstdlib" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cstring" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/ctype.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/exception" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/fstream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/iosfwd" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/iostream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/math.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/memory" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/new" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/pthread.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/set" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/sstream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stdarg.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stddef.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stdexcept" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stdio.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stdlib.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_algobase.c" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_algobase.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_alloc.c" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_alloc.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_auto_ptr.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_bvector.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_config.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_config_compat.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_config_compat_post.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_construct.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_ctraits_fns.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_ctype.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_cwchar.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_epilog.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_function.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_function_adaptors.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_function_base.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_hash_fun.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_iterator.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_iterator_base.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_locale.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_new.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_pair.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_prolog.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_range_errors.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_raw_storage_iter.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_relops_cont.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_set.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_site_config.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string.c" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string_fwd.c" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string_fwd.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string_hash.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string_io.c" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string_io.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_tempbuf.c" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_tempbuf.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_threads.c" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_threads.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_tree.c" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_tree.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_uninitialized.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_vector.c" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_vector.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/c_locale.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/type_traits.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl_user_config.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/string" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/string.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/typeinfo" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/cstring" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/fstream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/iosfwd" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/iostream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/istream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/ostream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/sstream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/vector" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/wrap_std/fstream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/wrap_std/iosfwd" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/wrap_std/iostream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/wrap_std/sstream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_buffer.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_clock.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_clock_ports.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_communication_ids.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_event_finder.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_event_queue.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_export.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_fifo.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_fifo_ifs.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_fifo_ports.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_interface.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_mutex.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_mutex_if.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_port.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_prim_channel.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_semaphore.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_semaphore_if.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal_ifs.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal_ports.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal_resolved.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal_resolved_ports.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal_rv.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal_rv_ports.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_bit.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_bit_ids.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_bit_proxies.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_bv.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_bv_base.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_logic.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_lv.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_lv_base.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_proxy.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/fx.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_context.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fix.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fixed.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fx_ids.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxcast_switch.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxdefs.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxnum.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxnum_observer.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxtype_params.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxval.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxval_observer.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_ufix.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_ufixed.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_ieee.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_mant.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_other_defs.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_params.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_rep.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_string.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_utils.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_bigint.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_biguint.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_int.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_int_base.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_int_ids.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_length_param.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_nbdefs.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_nbexterns.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_nbutils.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_signed.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_uint.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_uint_base.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_unsigned.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/misc/sc_concatref.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/misc/sc_value_base.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_attribute.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_cmnhdr.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_constants.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_event.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_externs.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_kernel_ids.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_lambda.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_lambda_defs.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_lambda_exps.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_lambda_friends.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_macros.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_module.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_module_name.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_object.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_process.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_process_b.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_process_host.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_sensitive.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_simcontext.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_time.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_ver.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_wait.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_wait_cthread.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/tracing/sc_trace.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/tracing/sc_vcd_trace.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/tracing/sc_wif_trace.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_hash.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_iostream.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_list.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_mempool.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_pq.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_report.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_report_handler.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_string.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_temporary.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_vector.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/systemc" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/systemc.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/ip/altera/frame_buffer/lib/ip_toolbench/frame_buffer.jar" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/ip/altera/frame_buffer/lib/ip_toolbench/forms_rt.jar" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/ip/altera/frame_buffer/lib/ip_toolbench/jdom.jar" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/ip/altera/common/ip_toolbench/v1.3.0/bin/launcher.jar" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/ip/altera/common/ip_toolbench/v1.3.0/bin/flowbase.jar" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/ip/altera/common/ip_toolbench/v1.3.0/bin/flowmanager.jar" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/ip/altera/common/ip_toolbench/v1.3.0/bin/util/jptf.jar" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/ip/altera/common/lib/com.altera.megawizard2.jar" />
|
|
</sourceFiles>
|
|
<childSourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/frame_buffer/lib/alt_vip_vfb.cpp" />
|
|
<file path="F:/intelfpga_lite/16.1/ip/altera/frame_buffer/lib/vip_common.h" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/frame_buffer/lib/vip_constants.h" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/frame_buffer/lib/vip_elementclass_info.h" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/frame_buffer/lib/vip_vfb_hwfast.hpp" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/include/alt_cusp.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/alt_cdfg_types.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/alt_cusp_synth.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/alt_exception.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/alt_lib_types.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/alt_util.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_au.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_avalon_eb.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_avalon_mm.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_avalon_st.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_cmp.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_fifo.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_fifo_paged.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_fp_au.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_fp_cmp.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_fp_mult.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_gpio.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_immed.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_mac.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_mem.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_mult.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_multadd.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_reg.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_shift.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_tapped_delay.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_avalon_bus.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_avalon_eb_channel.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_avalon_st_channel.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_debug.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_exit.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_overlay.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_pc.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/assert.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/c++io.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/char_traits.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/ieeefp.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/limits.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/cassert" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/cctype" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/climits" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/cstddef" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/cstdio" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/cstdlib" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/cstring" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/ctype.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/exception" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/fstream" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/iosfwd" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/iostream" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/math.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/memory" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/new" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/pthread.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/sstream" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stdarg.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stddef.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stdexcept" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stdio.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stdlib.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/string" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/string.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/typeinfo" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/vector" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cassert" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cctype" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/climits" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/config/stl_confix.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/config/stl_cusp.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/config/stlcomp.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cstddef" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cstdio" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cstdlib" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cstring" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/ctype.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/exception" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/fstream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/iosfwd" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/iostream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/math.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/memory" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/new" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/pthread.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/set" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/sstream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stdarg.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stddef.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stdexcept" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stdio.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stdlib.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_algobase.c" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_algobase.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_alloc.c" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_alloc.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_auto_ptr.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_bvector.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_config.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_config_compat.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_config_compat_post.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_construct.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_ctraits_fns.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_ctype.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_cwchar.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_epilog.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_function.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_function_adaptors.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_function_base.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_hash_fun.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_iterator.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_iterator_base.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_locale.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_new.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_pair.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_prolog.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_range_errors.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_raw_storage_iter.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_relops_cont.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_set.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_site_config.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string.c" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string_fwd.c" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string_fwd.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string_hash.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string_io.c" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string_io.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_tempbuf.c" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_tempbuf.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_threads.c" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_threads.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_tree.c" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_tree.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_uninitialized.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_vector.c" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_vector.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/c_locale.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/type_traits.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl_user_config.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/string" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/string.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/typeinfo" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/cstring" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/fstream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/iosfwd" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/iostream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/istream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/ostream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/sstream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/vector" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/wrap_std/fstream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/wrap_std/iosfwd" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/wrap_std/iostream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/wrap_std/sstream" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_buffer.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_clock.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_clock_ports.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_communication_ids.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_event_finder.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_event_queue.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_export.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_fifo.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_fifo_ifs.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_fifo_ports.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_interface.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_mutex.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_mutex_if.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_port.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_prim_channel.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_semaphore.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_semaphore_if.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal_ifs.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal_ports.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal_resolved.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal_resolved_ports.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal_rv.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal_rv_ports.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_bit.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_bit_ids.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_bit_proxies.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_bv.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_bv_base.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_logic.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_lv.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_lv_base.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_proxy.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/fx.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_context.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fix.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fixed.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fx_ids.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxcast_switch.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxdefs.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxnum.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxnum_observer.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxtype_params.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxval.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxval_observer.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_ufix.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_ufixed.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_ieee.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_mant.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_other_defs.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_params.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_rep.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_string.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_utils.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_bigint.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_biguint.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_int.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_int_base.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_int_ids.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_length_param.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_nbdefs.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_nbexterns.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_nbutils.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_signed.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_uint.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_uint_base.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_unsigned.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/misc/sc_concatref.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/misc/sc_value_base.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_attribute.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_cmnhdr.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_constants.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_event.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_externs.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_kernel_ids.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_lambda.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_lambda_defs.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_lambda_exps.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_lambda_friends.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_macros.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_module.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_module_name.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_object.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_process.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_process_b.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_process_host.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_sensitive.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_simcontext.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_time.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_ver.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_wait.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_wait_cthread.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/tracing/sc_trace.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/tracing/sc_vcd_trace.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/tracing/sc_wif_trace.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_hash.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_iostream.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_list.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_mempool.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_pq.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_report.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_report_handler.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_string.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_temporary.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_vector.h" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/systemc" />
|
|
<file path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/systemc.h" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/ip/altera/frame_buffer/lib/ip_toolbench/frame_buffer.jar" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/ip/altera/frame_buffer/lib/ip_toolbench/forms_rt.jar" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/ip/altera/frame_buffer/lib/ip_toolbench/jdom.jar" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/ip/altera/common/ip_toolbench/v1.3.0/bin/launcher.jar" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/ip/altera/common/ip_toolbench/v1.3.0/bin/flowbase.jar" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/ip/altera/common/ip_toolbench/v1.3.0/bin/flowmanager.jar" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/ip/altera/common/ip_toolbench/v1.3.0/bin/util/jptf.jar" />
|
|
<file
|
|
path="F:/intelFPGA_lite/16.1/ip/altera/common/lib/com.altera.megawizard2.jar" />
|
|
</childSourceFiles>
|
|
<instantiator instantiator="Qsys" as="alt_vip_vfb_0" />
|
|
<instantiator instantiator="Qsys_alt_vip_vfb_0" as="dut" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 21 starting:alt_vip_vfb "submodules/Qsys_alt_vip_vfb_0"</message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp161_au</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp161_au</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp161_au</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp161_au</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp161_au</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp161_au</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp161_au</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp161_au</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp161_au</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp161_au</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp161_au</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_avalon_st_input</b> "<b>submodules/alt_cusp161_avalon_st_input</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_avalon_st_output</b> "<b>submodules/alt_cusp161_avalon_st_output</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_avalon_mm_bursting_master_fifo</b> "<b>submodules/alt_cusp161_avalon_mm_bursting_master_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_pulling_width_adapter</b> "<b>submodules/alt_cusp161_pulling_width_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_avalon_mm_bursting_master_fifo</b> "<b>submodules/alt_cusp161_avalon_mm_bursting_master_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_pushing_width_adapter</b> "<b>submodules/alt_cusp161_pushing_width_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_pc</b> "<b>submodules/alt_cusp161_pc</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp161_muxhot16</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_pc</b> "<b>submodules/alt_cusp161_pc</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp161_au</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp161_au</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp161_au</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp161_muxbin2</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp161_au</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp161_cmp</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp161_cmp</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp161_cmp</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp161_cmp</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp161_cmp</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp161_cmp</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp161_cmp</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp161_cmp</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp161_cmp</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp161_cmp</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp161_cmp</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp161_cmp</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp161_cmp</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp161_cmp</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp161_cmp</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp161_cmp</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp161_cmp</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp161_cmp</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp161_reg</b>"]]></message>
|
|
<message level="Debug" culprit="dut"><![CDATA["<b>dut</b>" reuses <b>alt_cusp_testbench_clock</b> "<b>submodules/alt_cusp161_clock_reset</b>"]]></message>
|
|
<message level="Debug" culprit="dut"><![CDATA["<b>dut</b>" reuses <b>alt_vip_vfb</b> "<b>submodules/Qsys_alt_vip_vfb_0</b>"]]></message>
|
|
<message level="Info" culprit="alt_vip_vfb_0"><![CDATA["<b>Qsys</b>" instantiated <b>alt_vip_vfb</b> "<b>alt_vip_vfb_0</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 350 starting:alt_cusp_muxbin2 "submodules/alt_cusp161_muxbin2"</message>
|
|
<message level="Info" culprit="vfb_writer_packet_write_address_au_l_muxinst"><![CDATA["<b>alt_vip_vfb_0</b>" instantiated <b>alt_cusp_muxbin2</b> "<b>vfb_writer_packet_write_address_au_l_muxinst</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 348 starting:alt_au "submodules/alt_cusp161_au"</message>
|
|
<message level="Info" culprit="vfb_writer_packet_write_address_au"><![CDATA["<b>alt_vip_vfb_0</b>" instantiated <b>alt_au</b> "<b>vfb_writer_packet_write_address_au</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 339 starting:alt_reg "submodules/alt_cusp161_reg"</message>
|
|
<message level="Info" culprit="vfb_writer_overflow_flag_reg"><![CDATA["<b>alt_vip_vfb_0</b>" instantiated <b>alt_reg</b> "<b>vfb_writer_overflow_flag_reg</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd</b>]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 338 starting:alt_cusp_muxhot16 "submodules/alt_cusp161_muxhot16"</message>
|
|
<message level="Info" culprit="vfb_writer_length_counter_au_enable_muxinst"><![CDATA["<b>alt_vip_vfb_0</b>" instantiated <b>alt_cusp_muxhot16</b> "<b>vfb_writer_length_counter_au_enable_muxinst</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 314 starting:alt_avalon_st_input "submodules/alt_cusp161_avalon_st_input"</message>
|
|
<message level="Info" culprit="din"><![CDATA["<b>alt_vip_vfb_0</b>" instantiated <b>alt_avalon_st_input</b> "<b>din</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd</b>]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 309 starting:alt_avalon_st_output "submodules/alt_cusp161_avalon_st_output"</message>
|
|
<message level="Info" culprit="dout"><![CDATA["<b>alt_vip_vfb_0</b>" instantiated <b>alt_avalon_st_output</b> "<b>dout</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd</b>]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 305 starting:alt_avalon_mm_bursting_master_fifo "submodules/alt_cusp161_avalon_mm_bursting_master_fifo"</message>
|
|
<message level="Info" culprit="read_master"><![CDATA["<b>alt_vip_vfb_0</b>" instantiated <b>alt_avalon_mm_bursting_master_fifo</b> "<b>read_master</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd</b>]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 303 starting:alt_cusp_pulling_width_adapter "submodules/alt_cusp161_pulling_width_adapter"</message>
|
|
<message level="Info" culprit="read_master_pull"><![CDATA["<b>alt_vip_vfb_0</b>" instantiated <b>alt_cusp_pulling_width_adapter</b> "<b>read_master_pull</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd</b>]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 297 starting:alt_cusp_pushing_width_adapter "submodules/alt_cusp161_pushing_width_adapter"</message>
|
|
<message level="Info" culprit="write_master_push"><![CDATA["<b>alt_vip_vfb_0</b>" instantiated <b>alt_cusp_pushing_width_adapter</b> "<b>write_master_push</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd</b>]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 263 starting:alt_pc "submodules/alt_cusp161_pc"</message>
|
|
<message level="Info" culprit="pc0"><![CDATA["<b>alt_vip_vfb_0</b>" instantiated <b>alt_pc</b> "<b>pc0</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd</b>]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 203 starting:alt_cmp "submodules/alt_cusp161_cmp"</message>
|
|
<message level="Info" culprit="fu_id_4494_line325_93"><![CDATA["<b>alt_vip_vfb_0</b>" instantiated <b>alt_cmp</b> "<b>fu_id_4494_line325_93</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd</b>]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 153 starting:alt_cusp_testbench_clock "submodules/alt_cusp161_clock_reset"</message>
|
|
<message level="Info" culprit="clocksource"><![CDATA["<b>alt_vip_vfb_0</b>" instantiated <b>alt_cusp_testbench_clock</b> "<b>clocksource</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd</b>]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altpll:16.1:AUTO_DEVICE_FAMILY=MAX 10,AUTO_INCLK_INTERFACE_CLOCK_RATE=50000000,AVALON_USE_SEPARATE_SYSCLK=NO,BANDWIDTH=,BANDWIDTH_TYPE=AUTO,CLK0_DIVIDE_BY=1,CLK0_DUTY_CYCLE=50,CLK0_MULTIPLY_BY=2,CLK0_PHASE_SHIFT=0,CLK1_DIVIDE_BY=1,CLK1_DUTY_CYCLE=50,CLK1_MULTIPLY_BY=2,CLK1_PHASE_SHIFT=7500,CLK2_DIVIDE_BY=1,CLK2_DUTY_CYCLE=50,CLK2_MULTIPLY_BY=2,CLK2_PHASE_SHIFT=0,CLK3_DIVIDE_BY=2,CLK3_DUTY_CYCLE=50,CLK3_MULTIPLY_BY=1,CLK3_PHASE_SHIFT=0,CLK4_DIVIDE_BY=5,CLK4_DUTY_CYCLE=50,CLK4_MULTIPLY_BY=2,CLK4_PHASE_SHIFT=0,CLK5_DIVIDE_BY=,CLK5_DUTY_CYCLE=,CLK5_MULTIPLY_BY=,CLK5_PHASE_SHIFT=,CLK6_DIVIDE_BY=,CLK6_DUTY_CYCLE=,CLK6_MULTIPLY_BY=,CLK6_PHASE_SHIFT=,CLK7_DIVIDE_BY=,CLK7_DUTY_CYCLE=,CLK7_MULTIPLY_BY=,CLK7_PHASE_SHIFT=,CLK8_DIVIDE_BY=,CLK8_DUTY_CYCLE=,CLK8_MULTIPLY_BY=,CLK8_PHASE_SHIFT=,CLK9_DIVIDE_BY=,CLK9_DUTY_CYCLE=,CLK9_MULTIPLY_BY=,CLK9_PHASE_SHIFT=,COMPENSATE_CLOCK=CLK0,DOWN_SPREAD=,DPA_DIVIDER=,DPA_DIVIDE_BY=,DPA_MULTIPLY_BY=,ENABLE_SWITCH_OVER_COUNTER=,EXTCLK0_DIVIDE_BY=,EXTCLK0_DUTY_CYCLE=,EXTCLK0_MULTIPLY_BY=,EXTCLK0_PHASE_SHIFT=,EXTCLK1_DIVIDE_BY=,EXTCLK1_DUTY_CYCLE=,EXTCLK1_MULTIPLY_BY=,EXTCLK1_PHASE_SHIFT=,EXTCLK2_DIVIDE_BY=,EXTCLK2_DUTY_CYCLE=,EXTCLK2_MULTIPLY_BY=,EXTCLK2_PHASE_SHIFT=,EXTCLK3_DIVIDE_BY=,EXTCLK3_DUTY_CYCLE=,EXTCLK3_MULTIPLY_BY=,EXTCLK3_PHASE_SHIFT=,FEEDBACK_SOURCE=,GATE_LOCK_COUNTER=,GATE_LOCK_SIGNAL=,HIDDEN_CONSTANTS=CT#CLK2_DIVIDE_BY 1 CT#PORT_clk5 PORT_UNUSED CT#PORT_clk4 PORT_USED CT#PORT_clk3 PORT_USED CT#PORT_clk2 PORT_USED CT#PORT_clk1 PORT_USED CT#PORT_clk0 PORT_USED CT#CLK0_MULTIPLY_BY 2 CT#PORT_SCANWRITE PORT_UNUSED CT#PORT_SCANACLR PORT_UNUSED CT#PORT_PFDENA PORT_UNUSED CT#CLK3_DUTY_CYCLE 50 CT#CLK3_DIVIDE_BY 2 CT#PORT_PLLENA PORT_UNUSED CT#PORT_SCANDATA PORT_UNUSED CT#CLK3_PHASE_SHIFT 0 CT#PORT_SCANCLKENA PORT_UNUSED CT#CLK4_DIVIDE_BY 5 CT#WIDTH_CLOCK 5 CT#PORT_SCANDATAOUT PORT_UNUSED CT#CLK4_MULTIPLY_BY 2 CT#LPM_TYPE altpll CT#PLL_TYPE AUTO CT#CLK0_PHASE_SHIFT 0 CT#CLK1_DUTY_CYCLE 50 CT#PORT_PHASEDONE PORT_UNUSED CT#OPERATION_MODE NORMAL CT#PORT_CONFIGUPDATE PORT_UNUSED CT#CLK1_MULTIPLY_BY 2 CT#COMPENSATE_CLOCK CLK0 CT#PORT_CLKSWITCH PORT_UNUSED CT#CLK4_PHASE_SHIFT 0 CT#INCLK0_INPUT_FREQUENCY 20000 CT#CLK4_DUTY_CYCLE 50 CT#PORT_SCANDONE PORT_UNUSED CT#PORT_CLKLOSS PORT_UNUSED CT#PORT_INCLK1 PORT_UNUSED CT#AVALON_USE_SEPARATE_SYSCLK NO CT#PORT_INCLK0 PORT_USED CT#PORT_clkena5 PORT_UNUSED CT#PORT_clkena4 PORT_UNUSED CT#PORT_clkena3 PORT_UNUSED CT#PORT_clkena2 PORT_UNUSED CT#PORT_clkena1 PORT_UNUSED CT#PORT_clkena0 PORT_UNUSED CT#CLK1_PHASE_SHIFT 7500 CT#PORT_ARESET PORT_USED CT#BANDWIDTH_TYPE AUTO CT#CLK2_MULTIPLY_BY 2 CT#INTENDED_DEVICE_FAMILY {MAX 10} CT#PORT_SCANREAD PORT_UNUSED CT#CLK2_DUTY_CYCLE 50 CT#PORT_PHASESTEP PORT_UNUSED CT#PORT_SCANCLK PORT_UNUSED CT#PORT_CLKBAD1 PORT_UNUSED CT#PORT_CLKBAD0 PORT_UNUSED CT#PORT_FBIN PORT_UNUSED CT#PORT_PHASEUPDOWN PORT_UNUSED CT#PORT_extclk3 PORT_UNUSED CT#PORT_extclk2 PORT_UNUSED CT#PORT_extclk1 PORT_UNUSED CT#PORT_PHASECOUNTERSELECT PORT_UNUSED CT#PORT_extclk0 PORT_UNUSED CT#PORT_ACTIVECLOCK PORT_UNUSED CT#CLK2_PHASE_SHIFT 0 CT#CLK0_DUTY_CYCLE 50 CT#CLK0_DIVIDE_BY 1 CT#CLK1_DIVIDE_BY 1 CT#CLK3_MULTIPLY_BY 1 CT#PORT_LOCKED PORT_USED,HIDDEN_CUSTOM_ELABORATION=altpll_avalon_elaboration,HIDDEN_CUSTOM_POST_EDIT=altpll_avalon_post_edit,HIDDEN_IF_PORTS=IF#phasecounterselect {input 3} IF#locked {output 0} IF#reset {input 0} IF#clk {input 0} IF#phaseupdown {input 0} IF#scandone {output 0} IF#readdata {output 32} IF#write {input 0} IF#scanclk {input 0} IF#phasedone {output 0} IF#c4 {output 0} IF#c3 {output 0} IF#address {input 2} IF#c2 {output 0} IF#c1 {output 0} IF#c0 {output 0} IF#writedata {input 32} IF#read {input 0} IF#areset {input 0} IF#scanclkena {input 0} IF#scandataout {output 0} IF#configupdate {input 0} IF#phasestep {input 0} IF#scandata {input 0},HIDDEN_IS_FIRST_EDIT=0,HIDDEN_IS_NUMERIC=IN#WIDTH_CLOCK 1 IN#CLK0_DUTY_CYCLE 1 IN#CLK2_DIVIDE_BY 1 IN#PLL_TARGET_HARCOPY_CHECK 1 IN#CLK3_DIVIDE_BY 1 IN#CLK4_MULTIPLY_BY 1 IN#CLK1_MULTIPLY_BY 1 IN#CLK3_DUTY_CYCLE 1 IN#CLK4_DIVIDE_BY 1 IN#SWITCHOVER_COUNT_EDIT 1 IN#INCLK0_INPUT_FREQUENCY 1 IN#PLL_LVDS_PLL_CHECK 1 IN#PLL_AUTOPLL_CHECK 1 IN#PLL_FASTPLL_CHECK 1 IN#CLK1_DUTY_CYCLE 1 IN#PLL_ENHPLL_CHECK 1 IN#CLK2_MULTIPLY_BY 1 IN#DIV_FACTOR4 1 IN#DIV_FACTOR3 1 IN#DIV_FACTOR2 1 IN#DIV_FACTOR1 1 IN#DIV_FACTOR0 1 IN#LVDS_MODE_DATA_RATE_DIRTY 1 IN#CLK4_DUTY_CYCLE 1 IN#GLOCK_COUNTER_EDIT 1 IN#CLK2_DUTY_CYCLE 1 IN#CLK0_DIVIDE_BY 1 IN#CLK3_MULTIPLY_BY 1 IN#MULT_FACTOR4 1 IN#MULT_FACTOR3 1 IN#MULT_FACTOR2 1 IN#MULT_FACTOR1 1 IN#MULT_FACTOR0 1 IN#CLK0_MULTIPLY_BY 1 IN#USE_MIL_SPEED_GRADE 1 IN#CLK1_DIVIDE_BY 1,HIDDEN_MF_PORTS=MF#areset 1 MF#clk 1 MF#locked 1 MF#inclk 1,HIDDEN_PRIVATES=PT#GLOCKED_FEATURE_ENABLED 0 PT#SPREAD_FEATURE_ENABLED 0 PT#BANDWIDTH_FREQ_UNIT MHz PT#CUR_DEDICATED_CLK c0 PT#INCLK0_FREQ_EDIT 50.000 PT#BANDWIDTH_PRESET Low PT#PLL_LVDS_PLL_CHECK 0 PT#BANDWIDTH_USE_PRESET 0 PT#AVALON_USE_SEPARATE_SYSCLK NO PT#OUTPUT_FREQ_UNIT4 MHz PT#OUTPUT_FREQ_UNIT3 MHz PT#PLL_ENHPLL_CHECK 0 PT#OUTPUT_FREQ_UNIT2 MHz PT#OUTPUT_FREQ_UNIT1 MHz PT#OUTPUT_FREQ_UNIT0 MHz PT#PHASE_RECONFIG_FEATURE_ENABLED 1 PT#CREATE_CLKBAD_CHECK 0 PT#CLKSWITCH_CHECK 0 PT#INCLK1_FREQ_EDIT 100.000 PT#NORMAL_MODE_RADIO 1 PT#SRC_SYNCH_COMP_RADIO 0 PT#PLL_ARESET_CHECK 1 PT#LONG_SCAN_RADIO 1 PT#SCAN_FEATURE_ENABLED 1 PT#USE_CLK4 1 PT#USE_CLK3 1 PT#USE_CLK2 1 PT#PHASE_RECONFIG_INPUTS_CHECK 0 PT#USE_CLK1 1 PT#USE_CLK0 1 PT#PRIMARY_CLK_COMBO inclk0 PT#BANDWIDTH 1.000 PT#GLOCKED_COUNTER_EDIT_CHANGED 1 PT#PLL_FASTPLL_CHECK 0 PT#SPREAD_FREQ_UNIT KHz PT#LVDS_PHASE_SHIFT_UNIT4 deg PT#LVDS_PHASE_SHIFT_UNIT3 deg PT#PLL_AUTOPLL_CHECK 1 PT#OUTPUT_FREQ_MODE4 1 PT#LVDS_PHASE_SHIFT_UNIT2 deg PT#OUTPUT_FREQ_MODE3 1 PT#LVDS_PHASE_SHIFT_UNIT1 deg PT#OUTPUT_FREQ_MODE2 1 PT#LVDS_PHASE_SHIFT_UNIT0 deg PT#OUTPUT_FREQ_MODE1 1 PT#SWITCHOVER_FEATURE_ENABLED 0 PT#MIG_DEVICE_SPEED_GRADE Any PT#OUTPUT_FREQ_MODE0 1 PT#BANDWIDTH_FEATURE_ENABLED 1 PT#INCLK0_FREQ_UNIT_COMBO MHz PT#ZERO_DELAY_RADIO 0 PT#OUTPUT_FREQ4 20.00000000 PT#OUTPUT_FREQ3 25.00000000 PT#OUTPUT_FREQ2 100.00000000 PT#OUTPUT_FREQ1 100.00000000 PT#OUTPUT_FREQ0 100.00000000 PT#SHORT_SCAN_RADIO 0 PT#LVDS_MODE_DATA_RATE_DIRTY 0 PT#CUR_FBIN_CLK c0 PT#PLL_ADVANCED_PARAM_CHECK 0 PT#CLKBAD_SWITCHOVER_CHECK 0 PT#PHASE_SHIFT_STEP_ENABLED_CHECK 0 PT#DEVICE_SPEED_GRADE 6 PT#PLL_FBMIMIC_CHECK 0 PT#LVDS_MODE_DATA_RATE {Not Available} PT#PHASE_SHIFT4 0.00000000 PT#LOCKED_OUTPUT_CHECK 1 PT#SPREAD_PERCENT 0.500 PT#PHASE_SHIFT3 0.00000000 PT#DIV_FACTOR4 1 PT#PHASE_SHIFT2 0.00000000 PT#DIV_FACTOR3 1 PT#PHASE_SHIFT1 270.00000000 PT#DIV_FACTOR2 1 PT#PHASE_SHIFT0 0.00000000 PT#DIV_FACTOR1 1 PT#DIV_FACTOR0 1 PT#CNX_NO_COMPENSATE_RADIO 0 PT#USE_CLKENA4 0 PT#USE_CLKENA3 0 PT#USE_CLKENA2 0 PT#USE_CLKENA1 0 PT#USE_CLKENA0 0 PT#CREATE_INCLK1_CHECK 0 PT#GLOCK_COUNTER_EDIT 1048575 PT#INCLK1_FREQ_UNIT_COMBO MHz PT#EFF_OUTPUT_FREQ_VALUE4 20.000000 PT#EFF_OUTPUT_FREQ_VALUE3 25.000000 PT#EFF_OUTPUT_FREQ_VALUE2 100.000000 PT#EFF_OUTPUT_FREQ_VALUE1 100.000000 PT#EFF_OUTPUT_FREQ_VALUE0 100.000000 PT#SPREAD_FREQ 50.000 PT#USE_MIL_SPEED_GRADE 0 PT#EXPLICIT_SWITCHOVER_COUNTER 0 PT#STICKY_CLK4 1 PT#STICKY_CLK3 1 PT#STICKY_CLK2 1 PT#STICKY_CLK1 1 PT#STICKY_CLK0 1 PT#MIRROR_CLK4 0 PT#EXT_FEEDBACK_RADIO 0 PT#MIRROR_CLK3 0 PT#MIRROR_CLK2 0 PT#MIRROR_CLK1 0 PT#SWITCHOVER_COUNT_EDIT 1 PT#MIRROR_CLK0 0 PT#SELF_RESET_LOCK_LOSS 0 PT#PLL_PFDENA_CHECK 0 PT#INT_FEEDBACK__MODE_RADIO 1 PT#INCLK1_FREQ_EDIT_CHANGED 1 PT#SYNTH_WRAPPER_GEN_POSTFIX 0 PT#CLKLOSS_CHECK 0 PT#PHASE_SHIFT_UNIT4 deg PT#PHASE_SHIFT_UNIT3 deg PT#PHASE_SHIFT_UNIT2 deg PT#PHASE_SHIFT_UNIT1 deg PT#PHASE_SHIFT_UNIT0 deg PT#BANDWIDTH_USE_AUTO 1 PT#HAS_MANUAL_SWITCHOVER 1 PT#MULT_FACTOR4 1 PT#MULT_FACTOR3 1 PT#MULT_FACTOR2 1 PT#MULT_FACTOR1 1 PT#MULT_FACTOR0 1 PT#SPREAD_USE 0 PT#GLOCKED_MODE_CHECK 0 PT#DUTY_CYCLE4 50.00000000 PT#DUTY_CYCLE3 50.00000000 PT#DUTY_CYCLE2 50.00000000 PT#SACN_INPUTS_CHECK 0 PT#DUTY_CYCLE1 50.00000000 PT#INTENDED_DEVICE_FAMILY {MAX 10} PT#DUTY_CYCLE0 50.00000000 PT#PLL_TARGET_HARCOPY_CHECK 0 PT#INCLK1_FREQ_UNIT_CHANGED 1 PT#RECONFIG_FILE ALTPLL1472001986172141.mif PT#ACTIVECLK_CHECK 0,HIDDEN_USED_PORTS=UP#locked used UP#c4 used UP#c3 used UP#c2 used UP#c1 used UP#c0 used UP#areset used UP#inclk0 used,INCLK0_INPUT_FREQUENCY=20000,INCLK1_INPUT_FREQUENCY=,INTENDED_DEVICE_FAMILY=MAX 10,INVALID_LOCK_MULTIPLIER=,LOCK_HIGH=,LOCK_LOW=,OPERATION_MODE=NORMAL,PLL_TYPE=AUTO,PORT_ACTIVECLOCK=PORT_UNUSED,PORT_ARESET=PORT_USED,PORT_CLKBAD0=PORT_UNUSED,PORT_CLKBAD1=PORT_UNUSED,PORT_CLKLOSS=PORT_UNUSED,PORT_CLKSWITCH=PORT_UNUSED,PORT_CONFIGUPDATE=PORT_UNUSED,PORT_ENABLE0=,PORT_ENABLE1=,PORT_FBIN=PORT_UNUSED,PORT_FBOUT=,PORT_INCLK0=PORT_USED,PORT_INCLK1=PORT_UNUSED,PORT_LOCKED=PORT_USED,PORT_PFDENA=PORT_UNUSED,PORT_PHASECOUNTERSELECT=PORT_UNUSED,PORT_PHASEDONE=PORT_UNUSED,PORT_PHASESTEP=PORT_UNUSED,PORT_PHASEUPDOWN=PORT_UNUSED,PORT_PLLENA=PORT_UNUSED,PORT_SCANACLR=PORT_UNUSED,PORT_SCANCLK=PORT_UNUSED,PORT_SCANCLKENA=PORT_UNUSED,PORT_SCANDATA=PORT_UNUSED,PORT_SCANDATAOUT=PORT_UNUSED,PORT_SCANDONE=PORT_UNUSED,PORT_SCANREAD=PORT_UNUSED,PORT_SCANWRITE=PORT_UNUSED,PORT_SCLKOUT0=,PORT_SCLKOUT1=,PORT_VCOOVERRANGE=,PORT_VCOUNDERRANGE=,PORT_clk0=PORT_USED,PORT_clk1=PORT_USED,PORT_clk2=PORT_USED,PORT_clk3=PORT_USED,PORT_clk4=PORT_USED,PORT_clk5=PORT_UNUSED,PORT_clk6=,PORT_clk7=,PORT_clk8=,PORT_clk9=,PORT_clkena0=PORT_UNUSED,PORT_clkena1=PORT_UNUSED,PORT_clkena2=PORT_UNUSED,PORT_clkena3=PORT_UNUSED,PORT_clkena4=PORT_UNUSED,PORT_clkena5=PORT_UNUSED,PORT_extclk0=PORT_UNUSED,PORT_extclk1=PORT_UNUSED,PORT_extclk2=PORT_UNUSED,PORT_extclk3=PORT_UNUSED,PORT_extclkena0=,PORT_extclkena1=,PORT_extclkena2=,PORT_extclkena3=,PRIMARY_CLOCK=,QUALIFY_CONF_DONE=,SCAN_CHAIN=,SCAN_CHAIN_MIF_FILE=,SCLKOUT0_PHASE_SHIFT=,SCLKOUT1_PHASE_SHIFT=,SELF_RESET_ON_GATED_LOSS_LOCK=,SELF_RESET_ON_LOSS_LOCK=,SKIP_VCO=,SPREAD_FREQUENCY=,SWITCH_OVER_COUNTER=,SWITCH_OVER_ON_GATED_LOCK=,SWITCH_OVER_ON_LOSSCLK=,SWITCH_OVER_TYPE=,USING_FBMIMICBIDIR_PORT=,VALID_LOCK_MULTIPLIER=,VCO_DIVIDE_BY=,VCO_FREQUENCY_CONTROL=,VCO_MULTIPLY_BY=,VCO_PHASE_SHIFT_STEP=,WIDTH_CLOCK=5,WIDTH_PHASECOUNTERSELECT="
|
|
instancePathKey="Qsys:.:altpll_0"
|
|
kind="altpll"
|
|
version="16.1"
|
|
name="Qsys_altpll_0">
|
|
<parameter name="CLK3_PHASE_SHIFT" value="0" />
|
|
<parameter name="PORT_LOCKED" value="PORT_USED" />
|
|
<parameter name="CLK2_PHASE_SHIFT" value="0" />
|
|
<parameter name="CLK4_PHASE_SHIFT" value="0" />
|
|
<parameter name="CLK5_DUTY_CYCLE" value="" />
|
|
<parameter name="PORT_SCANDATAOUT" value="PORT_UNUSED" />
|
|
<parameter name="CLK1_PHASE_SHIFT" value="7500" />
|
|
<parameter name="CLK5_PHASE_SHIFT" value="" />
|
|
<parameter name="HIDDEN_CUSTOM_ELABORATION" value="altpll_avalon_elaboration" />
|
|
<parameter name="CLK8_DUTY_CYCLE" value="" />
|
|
<parameter name="CLK0_DIVIDE_BY" value="1" />
|
|
<parameter name="CLK7_PHASE_SHIFT" value="" />
|
|
<parameter name="CLK0_PHASE_SHIFT" value="0" />
|
|
<parameter name="CLK6_PHASE_SHIFT" value="" />
|
|
<parameter name="CLK8_PHASE_SHIFT" value="" />
|
|
<parameter name="PORT_clk8" value="" />
|
|
<parameter name="INVALID_LOCK_MULTIPLIER" value="" />
|
|
<parameter name="PORT_clk9" value="" />
|
|
<parameter name="PORT_clk6" value="" />
|
|
<parameter name="PORT_clk7" value="" />
|
|
<parameter name="EXTCLK2_DIVIDE_BY" value="" />
|
|
<parameter name="PORT_clk4" value="PORT_USED" />
|
|
<parameter name="PORT_clk5" value="PORT_UNUSED" />
|
|
<parameter name="PORT_clk2" value="PORT_USED" />
|
|
<parameter name="EXTCLK3_DUTY_CYCLE" value="" />
|
|
<parameter name="PORT_clk3" value="PORT_USED" />
|
|
<parameter name="PORT_clk0" value="PORT_USED" />
|
|
<parameter name="PORT_clk1" value="PORT_USED" />
|
|
<parameter name="INCLK0_INPUT_FREQUENCY" value="20000" />
|
|
<parameter name="PORT_extclkena0" value="" />
|
|
<parameter name="SKIP_VCO" value="" />
|
|
<parameter name="PORT_extclkena1" value="" />
|
|
<parameter name="PORT_extclkena2" value="" />
|
|
<parameter name="CLK2_DUTY_CYCLE" value="50" />
|
|
<parameter name="PORT_extclkena3" value="" />
|
|
<parameter name="PORT_CONFIGUPDATE" value="PORT_UNUSED" />
|
|
<parameter name="GATE_LOCK_SIGNAL" value="" />
|
|
<parameter name="CLK7_DIVIDE_BY" value="" />
|
|
<parameter name="CLK8_DIVIDE_BY" value="" />
|
|
<parameter name="AUTO_DEVICE_FAMILY" value="MAX 10" />
|
|
<parameter name="AUTO_INCLK_INTERFACE_CLOCK_RATE" value="50000000" />
|
|
<parameter name="PORT_ENABLE1" value="" />
|
|
<parameter name="PORT_VCOUNDERRANGE" value="" />
|
|
<parameter name="GATE_LOCK_COUNTER" value="" />
|
|
<parameter name="ENABLE_SWITCH_OVER_COUNTER" value="" />
|
|
<parameter name="SWITCH_OVER_TYPE" value="" />
|
|
<parameter name="PORT_ENABLE0" value="" />
|
|
<parameter name="EXTCLK3_DIVIDE_BY" value="" />
|
|
<parameter name="PORT_SCANACLR" value="PORT_UNUSED" />
|
|
<parameter name="CLK1_DIVIDE_BY" value="1" />
|
|
<parameter name="CLK9_DIVIDE_BY" value="" />
|
|
<parameter name="FEEDBACK_SOURCE" value="" />
|
|
<parameter name="CLK1_DUTY_CYCLE" value="50" />
|
|
<parameter name="BANDWIDTH_TYPE" value="AUTO" />
|
|
<parameter name="SPREAD_FREQUENCY" value="" />
|
|
<parameter name="PORT_PLLENA" value="PORT_UNUSED" />
|
|
<parameter name="LOCK_HIGH" value="" />
|
|
<parameter
|
|
name="HIDDEN_USED_PORTS"
|
|
value="UP#locked used UP#c4 used UP#c3 used UP#c2 used UP#c1 used UP#c0 used UP#areset used UP#inclk0 used" />
|
|
<parameter name="EXTCLK1_DIVIDE_BY" value="" />
|
|
<parameter name="DOWN_SPREAD" value="" />
|
|
<parameter name="PORT_SCANDONE" value="PORT_UNUSED" />
|
|
<parameter name="SWITCH_OVER_ON_LOSSCLK" value="" />
|
|
<parameter name="PORT_SCANCLKENA" value="PORT_UNUSED" />
|
|
<parameter name="PORT_FBOUT" value="" />
|
|
<parameter name="VCO_FREQUENCY_CONTROL" value="" />
|
|
<parameter
|
|
name="HIDDEN_IF_PORTS"
|
|
value="IF#phasecounterselect {input 3} IF#locked {output 0} IF#reset {input 0} IF#clk {input 0} IF#phaseupdown {input 0} IF#scandone {output 0} IF#readdata {output 32} IF#write {input 0} IF#scanclk {input 0} IF#phasedone {output 0} IF#c4 {output 0} IF#c3 {output 0} IF#address {input 2} IF#c2 {output 0} IF#c1 {output 0} IF#c0 {output 0} IF#writedata {input 32} IF#read {input 0} IF#areset {input 0} IF#scanclkena {input 0} IF#scandataout {output 0} IF#configupdate {input 0} IF#phasestep {input 0} IF#scandata {input 0}" />
|
|
<parameter
|
|
name="HIDDEN_MF_PORTS"
|
|
value="MF#areset 1 MF#clk 1 MF#locked 1 MF#inclk 1" />
|
|
<parameter name="CLK9_PHASE_SHIFT" value="" />
|
|
<parameter name="CLK6_DIVIDE_BY" value="" />
|
|
<parameter name="CLK3_DIVIDE_BY" value="2" />
|
|
<parameter name="EXTCLK0_MULTIPLY_BY" value="" />
|
|
<parameter name="PORT_PHASEUPDOWN" value="PORT_UNUSED" />
|
|
<parameter name="BANDWIDTH" value="" />
|
|
<parameter name="CLK0_DUTY_CYCLE" value="50" />
|
|
<parameter name="WIDTH_CLOCK" value="5" />
|
|
<parameter name="EXTCLK1_MULTIPLY_BY" value="" />
|
|
<parameter name="VCO_PHASE_SHIFT_STEP" value="" />
|
|
<parameter name="PLL_TYPE" value="AUTO" />
|
|
<parameter name="EXTCLK2_MULTIPLY_BY" value="" />
|
|
<parameter name="EXTCLK3_MULTIPLY_BY" value="" />
|
|
<parameter name="CLK4_DIVIDE_BY" value="5" />
|
|
<parameter name="PORT_FBIN" value="PORT_UNUSED" />
|
|
<parameter name="SWITCH_OVER_ON_GATED_LOCK" value="" />
|
|
<parameter name="PORT_PHASECOUNTERSELECT" value="PORT_UNUSED" />
|
|
<parameter name="PORT_VCOOVERRANGE" value="" />
|
|
<parameter name="DPA_DIVIDE_BY" value="" />
|
|
<parameter
|
|
name="HIDDEN_PRIVATES"
|
|
value="PT#GLOCKED_FEATURE_ENABLED 0 PT#SPREAD_FEATURE_ENABLED 0 PT#BANDWIDTH_FREQ_UNIT MHz PT#CUR_DEDICATED_CLK c0 PT#INCLK0_FREQ_EDIT 50.000 PT#BANDWIDTH_PRESET Low PT#PLL_LVDS_PLL_CHECK 0 PT#BANDWIDTH_USE_PRESET 0 PT#AVALON_USE_SEPARATE_SYSCLK NO PT#OUTPUT_FREQ_UNIT4 MHz PT#OUTPUT_FREQ_UNIT3 MHz PT#PLL_ENHPLL_CHECK 0 PT#OUTPUT_FREQ_UNIT2 MHz PT#OUTPUT_FREQ_UNIT1 MHz PT#OUTPUT_FREQ_UNIT0 MHz PT#PHASE_RECONFIG_FEATURE_ENABLED 1 PT#CREATE_CLKBAD_CHECK 0 PT#CLKSWITCH_CHECK 0 PT#INCLK1_FREQ_EDIT 100.000 PT#NORMAL_MODE_RADIO 1 PT#SRC_SYNCH_COMP_RADIO 0 PT#PLL_ARESET_CHECK 1 PT#LONG_SCAN_RADIO 1 PT#SCAN_FEATURE_ENABLED 1 PT#USE_CLK4 1 PT#USE_CLK3 1 PT#USE_CLK2 1 PT#PHASE_RECONFIG_INPUTS_CHECK 0 PT#USE_CLK1 1 PT#USE_CLK0 1 PT#PRIMARY_CLK_COMBO inclk0 PT#BANDWIDTH 1.000 PT#GLOCKED_COUNTER_EDIT_CHANGED 1 PT#PLL_FASTPLL_CHECK 0 PT#SPREAD_FREQ_UNIT KHz PT#LVDS_PHASE_SHIFT_UNIT4 deg PT#LVDS_PHASE_SHIFT_UNIT3 deg PT#PLL_AUTOPLL_CHECK 1 PT#OUTPUT_FREQ_MODE4 1 PT#LVDS_PHASE_SHIFT_UNIT2 deg PT#OUTPUT_FREQ_MODE3 1 PT#LVDS_PHASE_SHIFT_UNIT1 deg PT#OUTPUT_FREQ_MODE2 1 PT#LVDS_PHASE_SHIFT_UNIT0 deg PT#OUTPUT_FREQ_MODE1 1 PT#SWITCHOVER_FEATURE_ENABLED 0 PT#MIG_DEVICE_SPEED_GRADE Any PT#OUTPUT_FREQ_MODE0 1 PT#BANDWIDTH_FEATURE_ENABLED 1 PT#INCLK0_FREQ_UNIT_COMBO MHz PT#ZERO_DELAY_RADIO 0 PT#OUTPUT_FREQ4 20.00000000 PT#OUTPUT_FREQ3 25.00000000 PT#OUTPUT_FREQ2 100.00000000 PT#OUTPUT_FREQ1 100.00000000 PT#OUTPUT_FREQ0 100.00000000 PT#SHORT_SCAN_RADIO 0 PT#LVDS_MODE_DATA_RATE_DIRTY 0 PT#CUR_FBIN_CLK c0 PT#PLL_ADVANCED_PARAM_CHECK 0 PT#CLKBAD_SWITCHOVER_CHECK 0 PT#PHASE_SHIFT_STEP_ENABLED_CHECK 0 PT#DEVICE_SPEED_GRADE 6 PT#PLL_FBMIMIC_CHECK 0 PT#LVDS_MODE_DATA_RATE {Not Available} PT#PHASE_SHIFT4 0.00000000 PT#LOCKED_OUTPUT_CHECK 1 PT#SPREAD_PERCENT 0.500 PT#PHASE_SHIFT3 0.00000000 PT#DIV_FACTOR4 1 PT#PHASE_SHIFT2 0.00000000 PT#DIV_FACTOR3 1 PT#PHASE_SHIFT1 270.00000000 PT#DIV_FACTOR2 1 PT#PHASE_SHIFT0 0.00000000 PT#DIV_FACTOR1 1 PT#DIV_FACTOR0 1 PT#CNX_NO_COMPENSATE_RADIO 0 PT#USE_CLKENA4 0 PT#USE_CLKENA3 0 PT#USE_CLKENA2 0 PT#USE_CLKENA1 0 PT#USE_CLKENA0 0 PT#CREATE_INCLK1_CHECK 0 PT#GLOCK_COUNTER_EDIT 1048575 PT#INCLK1_FREQ_UNIT_COMBO MHz PT#EFF_OUTPUT_FREQ_VALUE4 20.000000 PT#EFF_OUTPUT_FREQ_VALUE3 25.000000 PT#EFF_OUTPUT_FREQ_VALUE2 100.000000 PT#EFF_OUTPUT_FREQ_VALUE1 100.000000 PT#EFF_OUTPUT_FREQ_VALUE0 100.000000 PT#SPREAD_FREQ 50.000 PT#USE_MIL_SPEED_GRADE 0 PT#EXPLICIT_SWITCHOVER_COUNTER 0 PT#STICKY_CLK4 1 PT#STICKY_CLK3 1 PT#STICKY_CLK2 1 PT#STICKY_CLK1 1 PT#STICKY_CLK0 1 PT#MIRROR_CLK4 0 PT#EXT_FEEDBACK_RADIO 0 PT#MIRROR_CLK3 0 PT#MIRROR_CLK2 0 PT#MIRROR_CLK1 0 PT#SWITCHOVER_COUNT_EDIT 1 PT#MIRROR_CLK0 0 PT#SELF_RESET_LOCK_LOSS 0 PT#PLL_PFDENA_CHECK 0 PT#INT_FEEDBACK__MODE_RADIO 1 PT#INCLK1_FREQ_EDIT_CHANGED 1 PT#SYNTH_WRAPPER_GEN_POSTFIX 0 PT#CLKLOSS_CHECK 0 PT#PHASE_SHIFT_UNIT4 deg PT#PHASE_SHIFT_UNIT3 deg PT#PHASE_SHIFT_UNIT2 deg PT#PHASE_SHIFT_UNIT1 deg PT#PHASE_SHIFT_UNIT0 deg PT#BANDWIDTH_USE_AUTO 1 PT#HAS_MANUAL_SWITCHOVER 1 PT#MULT_FACTOR4 1 PT#MULT_FACTOR3 1 PT#MULT_FACTOR2 1 PT#MULT_FACTOR1 1 PT#MULT_FACTOR0 1 PT#SPREAD_USE 0 PT#GLOCKED_MODE_CHECK 0 PT#DUTY_CYCLE4 50.00000000 PT#DUTY_CYCLE3 50.00000000 PT#DUTY_CYCLE2 50.00000000 PT#SACN_INPUTS_CHECK 0 PT#DUTY_CYCLE1 50.00000000 PT#INTENDED_DEVICE_FAMILY {MAX 10} PT#DUTY_CYCLE0 50.00000000 PT#PLL_TARGET_HARCOPY_CHECK 0 PT#INCLK1_FREQ_UNIT_CHANGED 1 PT#RECONFIG_FILE ALTPLL1472001986172141.mif PT#ACTIVECLK_CHECK 0" />
|
|
<parameter name="VCO_DIVIDE_BY" value="" />
|
|
<parameter name="CLK3_DUTY_CYCLE" value="50" />
|
|
<parameter name="SCAN_CHAIN" value="" />
|
|
<parameter name="LOCK_LOW" value="" />
|
|
<parameter name="CLK0_MULTIPLY_BY" value="2" />
|
|
<parameter name="PORT_SCANWRITE" value="PORT_UNUSED" />
|
|
<parameter name="CLK1_MULTIPLY_BY" value="2" />
|
|
<parameter name="PORT_SCLKOUT1" value="" />
|
|
<parameter
|
|
name="HIDDEN_IS_NUMERIC"
|
|
value="IN#WIDTH_CLOCK 1 IN#CLK0_DUTY_CYCLE 1 IN#CLK2_DIVIDE_BY 1 IN#PLL_TARGET_HARCOPY_CHECK 1 IN#CLK3_DIVIDE_BY 1 IN#CLK4_MULTIPLY_BY 1 IN#CLK1_MULTIPLY_BY 1 IN#CLK3_DUTY_CYCLE 1 IN#CLK4_DIVIDE_BY 1 IN#SWITCHOVER_COUNT_EDIT 1 IN#INCLK0_INPUT_FREQUENCY 1 IN#PLL_LVDS_PLL_CHECK 1 IN#PLL_AUTOPLL_CHECK 1 IN#PLL_FASTPLL_CHECK 1 IN#CLK1_DUTY_CYCLE 1 IN#PLL_ENHPLL_CHECK 1 IN#CLK2_MULTIPLY_BY 1 IN#DIV_FACTOR4 1 IN#DIV_FACTOR3 1 IN#DIV_FACTOR2 1 IN#DIV_FACTOR1 1 IN#DIV_FACTOR0 1 IN#LVDS_MODE_DATA_RATE_DIRTY 1 IN#CLK4_DUTY_CYCLE 1 IN#GLOCK_COUNTER_EDIT 1 IN#CLK2_DUTY_CYCLE 1 IN#CLK0_DIVIDE_BY 1 IN#CLK3_MULTIPLY_BY 1 IN#MULT_FACTOR4 1 IN#MULT_FACTOR3 1 IN#MULT_FACTOR2 1 IN#MULT_FACTOR1 1 IN#MULT_FACTOR0 1 IN#CLK0_MULTIPLY_BY 1 IN#USE_MIL_SPEED_GRADE 1 IN#CLK1_DIVIDE_BY 1" />
|
|
<parameter name="CLK3_MULTIPLY_BY" value="1" />
|
|
<parameter name="PORT_CLKLOSS" value="PORT_UNUSED" />
|
|
<parameter name="CLK2_MULTIPLY_BY" value="2" />
|
|
<parameter name="CLK4_MULTIPLY_BY" value="2" />
|
|
<parameter name="PORT_SCLKOUT0" value="" />
|
|
<parameter name="PORT_SCANREAD" value="PORT_UNUSED" />
|
|
<parameter name="CLK4_DUTY_CYCLE" value="50" />
|
|
<parameter name="PORT_clkena0" value="PORT_UNUSED" />
|
|
<parameter name="PORT_PHASEDONE" value="PORT_UNUSED" />
|
|
<parameter name="PORT_clkena1" value="PORT_UNUSED" />
|
|
<parameter name="PORT_clkena2" value="PORT_UNUSED" />
|
|
<parameter name="PORT_PFDENA" value="PORT_UNUSED" />
|
|
<parameter name="PORT_clkena3" value="PORT_UNUSED" />
|
|
<parameter name="PORT_SCANDATA" value="PORT_UNUSED" />
|
|
<parameter name="CLK6_MULTIPLY_BY" value="" />
|
|
<parameter name="EXTCLK0_DIVIDE_BY" value="" />
|
|
<parameter name="CLK5_MULTIPLY_BY" value="" />
|
|
<parameter name="INTENDED_DEVICE_FAMILY" value="MAX 10" />
|
|
<parameter name="OPERATION_MODE" value="NORMAL" />
|
|
<parameter name="EXTCLK2_DUTY_CYCLE" value="" />
|
|
<parameter name="WIDTH_PHASECOUNTERSELECT" value="" />
|
|
<parameter name="SWITCH_OVER_COUNTER" value="" />
|
|
<parameter name="CLK7_MULTIPLY_BY" value="" />
|
|
<parameter name="PORT_clkena4" value="PORT_UNUSED" />
|
|
<parameter name="PORT_clkena5" value="PORT_UNUSED" />
|
|
<parameter name="SCAN_CHAIN_MIF_FILE" value="" />
|
|
<parameter name="CLK8_MULTIPLY_BY" value="" />
|
|
<parameter name="CLK9_MULTIPLY_BY" value="" />
|
|
<parameter name="EXTCLK2_PHASE_SHIFT" value="" />
|
|
<parameter name="COMPENSATE_CLOCK" value="CLK0" />
|
|
<parameter name="PORT_INCLK0" value="PORT_USED" />
|
|
<parameter name="PORT_CLKSWITCH" value="PORT_UNUSED" />
|
|
<parameter name="EXTCLK3_PHASE_SHIFT" value="" />
|
|
<parameter name="PORT_INCLK1" value="PORT_UNUSED" />
|
|
<parameter name="CLK5_DIVIDE_BY" value="" />
|
|
<parameter name="CLK9_DUTY_CYCLE" value="" />
|
|
<parameter name="CLK6_DUTY_CYCLE" value="" />
|
|
<parameter name="DPA_DIVIDER" value="" />
|
|
<parameter name="VCO_MULTIPLY_BY" value="" />
|
|
<parameter name="EXTCLK1_PHASE_SHIFT" value="" />
|
|
<parameter
|
|
name="HIDDEN_CONSTANTS"
|
|
value="CT#CLK2_DIVIDE_BY 1 CT#PORT_clk5 PORT_UNUSED CT#PORT_clk4 PORT_USED CT#PORT_clk3 PORT_USED CT#PORT_clk2 PORT_USED CT#PORT_clk1 PORT_USED CT#PORT_clk0 PORT_USED CT#CLK0_MULTIPLY_BY 2 CT#PORT_SCANWRITE PORT_UNUSED CT#PORT_SCANACLR PORT_UNUSED CT#PORT_PFDENA PORT_UNUSED CT#CLK3_DUTY_CYCLE 50 CT#CLK3_DIVIDE_BY 2 CT#PORT_PLLENA PORT_UNUSED CT#PORT_SCANDATA PORT_UNUSED CT#CLK3_PHASE_SHIFT 0 CT#PORT_SCANCLKENA PORT_UNUSED CT#CLK4_DIVIDE_BY 5 CT#WIDTH_CLOCK 5 CT#PORT_SCANDATAOUT PORT_UNUSED CT#CLK4_MULTIPLY_BY 2 CT#LPM_TYPE altpll CT#PLL_TYPE AUTO CT#CLK0_PHASE_SHIFT 0 CT#CLK1_DUTY_CYCLE 50 CT#PORT_PHASEDONE PORT_UNUSED CT#OPERATION_MODE NORMAL CT#PORT_CONFIGUPDATE PORT_UNUSED CT#CLK1_MULTIPLY_BY 2 CT#COMPENSATE_CLOCK CLK0 CT#PORT_CLKSWITCH PORT_UNUSED CT#CLK4_PHASE_SHIFT 0 CT#INCLK0_INPUT_FREQUENCY 20000 CT#CLK4_DUTY_CYCLE 50 CT#PORT_SCANDONE PORT_UNUSED CT#PORT_CLKLOSS PORT_UNUSED CT#PORT_INCLK1 PORT_UNUSED CT#AVALON_USE_SEPARATE_SYSCLK NO CT#PORT_INCLK0 PORT_USED CT#PORT_clkena5 PORT_UNUSED CT#PORT_clkena4 PORT_UNUSED CT#PORT_clkena3 PORT_UNUSED CT#PORT_clkena2 PORT_UNUSED CT#PORT_clkena1 PORT_UNUSED CT#PORT_clkena0 PORT_UNUSED CT#CLK1_PHASE_SHIFT 7500 CT#PORT_ARESET PORT_USED CT#BANDWIDTH_TYPE AUTO CT#CLK2_MULTIPLY_BY 2 CT#INTENDED_DEVICE_FAMILY {MAX 10} CT#PORT_SCANREAD PORT_UNUSED CT#CLK2_DUTY_CYCLE 50 CT#PORT_PHASESTEP PORT_UNUSED CT#PORT_SCANCLK PORT_UNUSED CT#PORT_CLKBAD1 PORT_UNUSED CT#PORT_CLKBAD0 PORT_UNUSED CT#PORT_FBIN PORT_UNUSED CT#PORT_PHASEUPDOWN PORT_UNUSED CT#PORT_extclk3 PORT_UNUSED CT#PORT_extclk2 PORT_UNUSED CT#PORT_extclk1 PORT_UNUSED CT#PORT_PHASECOUNTERSELECT PORT_UNUSED CT#PORT_extclk0 PORT_UNUSED CT#PORT_ACTIVECLOCK PORT_UNUSED CT#CLK2_PHASE_SHIFT 0 CT#CLK0_DUTY_CYCLE 50 CT#CLK0_DIVIDE_BY 1 CT#CLK1_DIVIDE_BY 1 CT#CLK3_MULTIPLY_BY 1 CT#PORT_LOCKED PORT_USED" />
|
|
<parameter name="EXTCLK0_PHASE_SHIFT" value="" />
|
|
<parameter name="AVALON_USE_SEPARATE_SYSCLK" value="NO" />
|
|
<parameter name="SELF_RESET_ON_LOSS_LOCK" value="" />
|
|
<parameter name="CLK2_DIVIDE_BY" value="1" />
|
|
<parameter name="PORT_PHASESTEP" value="PORT_UNUSED" />
|
|
<parameter name="USING_FBMIMICBIDIR_PORT" value="" />
|
|
<parameter name="PORT_CLKBAD1" value="PORT_UNUSED" />
|
|
<parameter name="QUALIFY_CONF_DONE" value="" />
|
|
<parameter name="PORT_ARESET" value="PORT_USED" />
|
|
<parameter name="DPA_MULTIPLY_BY" value="" />
|
|
<parameter name="INCLK1_INPUT_FREQUENCY" value="" />
|
|
<parameter name="CLK7_DUTY_CYCLE" value="" />
|
|
<parameter name="EXTCLK0_DUTY_CYCLE" value="" />
|
|
<parameter name="HIDDEN_CUSTOM_POST_EDIT" value="altpll_avalon_post_edit" />
|
|
<parameter name="HIDDEN_IS_FIRST_EDIT" value="0" />
|
|
<parameter name="VALID_LOCK_MULTIPLIER" value="" />
|
|
<parameter name="PRIMARY_CLOCK" value="" />
|
|
<parameter name="SELF_RESET_ON_GATED_LOSS_LOCK" value="" />
|
|
<parameter name="SCLKOUT0_PHASE_SHIFT" value="" />
|
|
<parameter name="PORT_ACTIVECLOCK" value="PORT_UNUSED" />
|
|
<parameter name="PORT_SCANCLK" value="PORT_UNUSED" />
|
|
<parameter name="SCLKOUT1_PHASE_SHIFT" value="" />
|
|
<parameter name="PORT_extclk3" value="PORT_UNUSED" />
|
|
<parameter name="EXTCLK1_DUTY_CYCLE" value="" />
|
|
<parameter name="PORT_extclk0" value="PORT_UNUSED" />
|
|
<parameter name="PORT_CLKBAD0" value="PORT_UNUSED" />
|
|
<parameter name="PORT_extclk2" value="PORT_UNUSED" />
|
|
<parameter name="PORT_extclk1" value="PORT_UNUSED" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_altpll_0.v"
|
|
type="VERILOG" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_altpll/altera_avalon_altpll_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys" as="altpll_0" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 219 starting:altpll "submodules/Qsys_altpll_0"</message>
|
|
<message level="Debug">set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files</message>
|
|
<message level="Debug">Command: F:/intelfpga_lite/16.1/quartus\bin64/quartus_map.exe not_a_project --generate_hdl_interface=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0060_sopcgen/Qsys_altpll_0.v --source=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0060_sopcgen/Qsys_altpll_0.v --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0061_sopcqmap/ --ini=disable_check_quartus_compatibility_qsys_only=on</message>
|
|
<message level="Debug">Command took 0.661s</message>
|
|
<message level="Info" culprit="altpll_0"><![CDATA["<b>Qsys</b>" instantiated <b>altpll</b> "<b>altpll_0</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="i2c_opencores:12.0:"
|
|
instancePathKey="Qsys:.:i2c_opencores_camera"
|
|
kind="i2c_opencores"
|
|
version="12.0"
|
|
name="i2c_opencores">
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/i2c_opencores.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/i2c_master_top.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/i2c_master_defines.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/i2c_master_byte_ctrl.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/i2c_master_bit_ctrl.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/i2c_opencores/i2c_opencores_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys" as="i2c_opencores_camera,i2c_opencores_mipi" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 218 starting:i2c_opencores "submodules/i2c_opencores"</message>
|
|
<message level="Info" culprit="i2c_opencores_camera"><![CDATA["<b>Qsys</b>" instantiated <b>i2c_opencores</b> "<b>i2c_opencores_camera</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_avalon_jtag_uart:16.1:allowMultipleConnections=false,avalonSpec=2.0,clkFreq=50000000,enableInteractiveInput=false,enableInteractiveOutput=false,hubInstanceID=0,legacySignalAllow=false,readBufferDepth=64,readIRQThreshold=8,simInputCharacterStream=,simInteractiveOptions=NO_INTERACTIVE_WINDOWS,useRegistersForReadBuffer=false,useRegistersForWriteBuffer=false,useRelativePathForSimFile=false,writeBufferDepth=64,writeIRQThreshold=8"
|
|
instancePathKey="Qsys:.:jtag_uart"
|
|
kind="altera_avalon_jtag_uart"
|
|
version="16.1"
|
|
name="Qsys_jtag_uart">
|
|
<parameter name="readBufferDepth" value="64" />
|
|
<parameter name="clkFreq" value="50000000" />
|
|
<parameter name="useRelativePathForSimFile" value="false" />
|
|
<parameter name="hubInstanceID" value="0" />
|
|
<parameter name="enableInteractiveInput" value="false" />
|
|
<parameter name="avalonSpec" value="2.0" />
|
|
<parameter name="simInputCharacterStream" value="" />
|
|
<parameter name="readIRQThreshold" value="8" />
|
|
<parameter name="useRegistersForWriteBuffer" value="false" />
|
|
<parameter name="useRegistersForReadBuffer" value="false" />
|
|
<parameter name="simInteractiveOptions" value="NO_INTERACTIVE_WINDOWS" />
|
|
<parameter name="enableInteractiveOutput" value="false" />
|
|
<parameter name="writeIRQThreshold" value="8" />
|
|
<parameter name="writeBufferDepth" value="64" />
|
|
<parameter name="allowMultipleConnections" value="false" />
|
|
<parameter name="legacySignalAllow" value="false" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_jtag_uart.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_jtag_uart/altera_avalon_jtag_uart_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys" as="jtag_uart" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 216 starting:altera_avalon_jtag_uart "submodules/Qsys_jtag_uart"</message>
|
|
<message level="Info" culprit="jtag_uart">Starting RTL generation for module 'Qsys_jtag_uart'</message>
|
|
<message level="Info" culprit="jtag_uart"> Generation command is [exec F:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I F:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_jtag_uart -- F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_jtag_uart/generate_rtl.pl --name=Qsys_jtag_uart --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0063_jtag_uart_gen/ --quartus_dir=F:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0063_jtag_uart_gen//Qsys_jtag_uart_component_configuration.pl --do_build_sim=0 ]</message>
|
|
<message level="Info" culprit="jtag_uart">Done RTL generation for module 'Qsys_jtag_uart'</message>
|
|
<message level="Info" culprit="jtag_uart"><![CDATA["<b>Qsys</b>" instantiated <b>altera_avalon_jtag_uart</b> "<b>jtag_uart</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_avalon_pio:16.1:bitClearingEdgeCapReg=false,bitModifyingOutReg=false,captureEdge=false,clockRate=50000000,derived_capture=false,derived_do_test_bench_wiring=false,derived_edge_type=NONE,derived_has_in=true,derived_has_irq=false,derived_has_out=false,derived_has_tri=false,derived_irq_type=NONE,direction=Input,edgeType=RISING,generateIRQ=false,irqType=LEVEL,resetValue=0,simDoTestBenchWiring=false,simDrivenValue=0,width=2"
|
|
instancePathKey="Qsys:.:key"
|
|
kind="altera_avalon_pio"
|
|
version="16.1"
|
|
name="Qsys_key">
|
|
<parameter name="derived_do_test_bench_wiring" value="false" />
|
|
<parameter name="generateIRQ" value="false" />
|
|
<parameter name="derived_has_irq" value="false" />
|
|
<parameter name="captureEdge" value="false" />
|
|
<parameter name="clockRate" value="50000000" />
|
|
<parameter name="derived_has_out" value="false" />
|
|
<parameter name="derived_has_in" value="true" />
|
|
<parameter name="resetValue" value="0" />
|
|
<parameter name="derived_has_tri" value="false" />
|
|
<parameter name="derived_capture" value="false" />
|
|
<parameter name="simDoTestBenchWiring" value="false" />
|
|
<parameter name="bitModifyingOutReg" value="false" />
|
|
<parameter name="simDrivenValue" value="0" />
|
|
<parameter name="derived_edge_type" value="NONE" />
|
|
<parameter name="irqType" value="LEVEL" />
|
|
<parameter name="derived_irq_type" value="NONE" />
|
|
<parameter name="edgeType" value="RISING" />
|
|
<parameter name="width" value="2" />
|
|
<parameter name="bitClearingEdgeCapReg" value="false" />
|
|
<parameter name="direction" value="Input" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_key.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_pio/altera_avalon_pio_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys" as="key" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 215 starting:altera_avalon_pio "submodules/Qsys_key"</message>
|
|
<message level="Info" culprit="key">Starting RTL generation for module 'Qsys_key'</message>
|
|
<message level="Info" culprit="key"> Generation command is [exec F:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I F:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio -- F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio/generate_rtl.pl --name=Qsys_key --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0064_key_gen/ --quartus_dir=F:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0064_key_gen//Qsys_key_component_configuration.pl --do_build_sim=0 ]</message>
|
|
<message level="Info" culprit="key">Done RTL generation for module 'Qsys_key'</message>
|
|
<message level="Info" culprit="key"><![CDATA["<b>Qsys</b>" instantiated <b>altera_avalon_pio</b> "<b>key</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_avalon_pio:16.1:bitClearingEdgeCapReg=false,bitModifyingOutReg=false,captureEdge=false,clockRate=50000000,derived_capture=false,derived_do_test_bench_wiring=false,derived_edge_type=NONE,derived_has_in=false,derived_has_irq=false,derived_has_out=true,derived_has_tri=false,derived_irq_type=NONE,direction=Output,edgeType=RISING,generateIRQ=false,irqType=LEVEL,resetValue=0,simDoTestBenchWiring=false,simDrivenValue=0,width=10"
|
|
instancePathKey="Qsys:.:led"
|
|
kind="altera_avalon_pio"
|
|
version="16.1"
|
|
name="Qsys_led">
|
|
<parameter name="derived_do_test_bench_wiring" value="false" />
|
|
<parameter name="generateIRQ" value="false" />
|
|
<parameter name="derived_has_irq" value="false" />
|
|
<parameter name="captureEdge" value="false" />
|
|
<parameter name="clockRate" value="50000000" />
|
|
<parameter name="derived_has_out" value="true" />
|
|
<parameter name="derived_has_in" value="false" />
|
|
<parameter name="resetValue" value="0" />
|
|
<parameter name="derived_has_tri" value="false" />
|
|
<parameter name="derived_capture" value="false" />
|
|
<parameter name="simDoTestBenchWiring" value="false" />
|
|
<parameter name="bitModifyingOutReg" value="false" />
|
|
<parameter name="simDrivenValue" value="0" />
|
|
<parameter name="derived_edge_type" value="NONE" />
|
|
<parameter name="irqType" value="LEVEL" />
|
|
<parameter name="derived_irq_type" value="NONE" />
|
|
<parameter name="edgeType" value="RISING" />
|
|
<parameter name="width" value="10" />
|
|
<parameter name="bitClearingEdgeCapReg" value="false" />
|
|
<parameter name="direction" value="Output" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_led.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_pio/altera_avalon_pio_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys" as="led" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 214 starting:altera_avalon_pio "submodules/Qsys_led"</message>
|
|
<message level="Info" culprit="led">Starting RTL generation for module 'Qsys_led'</message>
|
|
<message level="Info" culprit="led"> Generation command is [exec F:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I F:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio -- F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio/generate_rtl.pl --name=Qsys_led --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0065_led_gen/ --quartus_dir=F:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0065_led_gen//Qsys_led_component_configuration.pl --do_build_sim=0 ]</message>
|
|
<message level="Info" culprit="led">Done RTL generation for module 'Qsys_led'</message>
|
|
<message level="Info" culprit="led"><![CDATA["<b>Qsys</b>" instantiated <b>altera_avalon_pio</b> "<b>led</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_avalon_pio:16.1:bitClearingEdgeCapReg=false,bitModifyingOutReg=false,captureEdge=false,clockRate=50000000,derived_capture=false,derived_do_test_bench_wiring=false,derived_edge_type=NONE,derived_has_in=false,derived_has_irq=false,derived_has_out=true,derived_has_tri=false,derived_irq_type=NONE,direction=Output,edgeType=RISING,generateIRQ=false,irqType=LEVEL,resetValue=0,simDoTestBenchWiring=false,simDrivenValue=0,width=1"
|
|
instancePathKey="Qsys:.:mipi_pwdn_n"
|
|
kind="altera_avalon_pio"
|
|
version="16.1"
|
|
name="Qsys_mipi_pwdn_n">
|
|
<parameter name="derived_do_test_bench_wiring" value="false" />
|
|
<parameter name="generateIRQ" value="false" />
|
|
<parameter name="derived_has_irq" value="false" />
|
|
<parameter name="captureEdge" value="false" />
|
|
<parameter name="clockRate" value="50000000" />
|
|
<parameter name="derived_has_out" value="true" />
|
|
<parameter name="derived_has_in" value="false" />
|
|
<parameter name="resetValue" value="0" />
|
|
<parameter name="derived_has_tri" value="false" />
|
|
<parameter name="derived_capture" value="false" />
|
|
<parameter name="simDoTestBenchWiring" value="false" />
|
|
<parameter name="bitModifyingOutReg" value="false" />
|
|
<parameter name="simDrivenValue" value="0" />
|
|
<parameter name="derived_edge_type" value="NONE" />
|
|
<parameter name="irqType" value="LEVEL" />
|
|
<parameter name="derived_irq_type" value="NONE" />
|
|
<parameter name="edgeType" value="RISING" />
|
|
<parameter name="width" value="1" />
|
|
<parameter name="bitClearingEdgeCapReg" value="false" />
|
|
<parameter name="direction" value="Output" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mipi_pwdn_n.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_pio/altera_avalon_pio_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys" as="mipi_pwdn_n,mipi_reset_n" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 213 starting:altera_avalon_pio "submodules/Qsys_mipi_pwdn_n"</message>
|
|
<message level="Info" culprit="mipi_pwdn_n">Starting RTL generation for module 'Qsys_mipi_pwdn_n'</message>
|
|
<message level="Info" culprit="mipi_pwdn_n"> Generation command is [exec F:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I F:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio -- F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio/generate_rtl.pl --name=Qsys_mipi_pwdn_n --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0066_mipi_pwdn_n_gen/ --quartus_dir=F:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0066_mipi_pwdn_n_gen//Qsys_mipi_pwdn_n_component_configuration.pl --do_build_sim=0 ]</message>
|
|
<message level="Info" culprit="mipi_pwdn_n">Done RTL generation for module 'Qsys_mipi_pwdn_n'</message>
|
|
<message level="Info" culprit="mipi_pwdn_n"><![CDATA["<b>Qsys</b>" instantiated <b>altera_avalon_pio</b> "<b>mipi_pwdn_n</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_nios2_gen2:16.1:AUTO_CLK_CLOCK_DOMAIN=1,AUTO_CLK_RESET_DOMAIN=1,AUTO_DEVICE=10M50DAF484C7G,AUTO_DEVICE_SPEEDGRADE=7,bht_ramBlockType=Automatic,breakAbsoluteAddr=264224,breakOffset=32,breakSlave=None,breakSlave_derived=nios2_gen2.debug_mem_slave,cdx_enabled=false,clockFrequency=50000000,cpuArchRev=1,cpuID=0,cpuReset=false,customInstSlavesSystemInfo=<info/>,customInstSlavesSystemInfo_nios_a=<info/>,customInstSlavesSystemInfo_nios_b=<info/>,customInstSlavesSystemInfo_nios_c=<info/>,dataAddrWidth=19,dataMasterHighPerformanceAddrWidth=1,dataMasterHighPerformanceMapParam=,dataSlaveMapParam=<address-map><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' type='altera_avalon_onchip_memory2.s1' /><slave name='nios2_gen2.debug_mem_slave' start='0x40800' end='0x41000' type='altera_nios2_gen2.debug_mem_slave' /><slave name='timer.s1' start='0x41000' end='0x41020' type='altera_avalon_timer.s1' /><slave name='TERASIC_AUTO_FOCUS_0.mm_ctrl' start='0x41020' end='0x41040' type='TERASIC_AUTO_FOCUS.mm_ctrl' /><slave name='i2c_opencores_camera.avalon_slave_0' start='0x41040' end='0x41060' type='i2c_opencores.avalon_slave_0' /><slave name='i2c_opencores_mipi.avalon_slave_0' start='0x41060' end='0x41080' type='i2c_opencores.avalon_slave_0' /><slave name='mipi_pwdn_n.s1' start='0x41080' end='0x41090' type='altera_avalon_pio.s1' /><slave name='mipi_reset_n.s1' start='0x41090' end='0x410A0' type='altera_avalon_pio.s1' /><slave name='key.s1' start='0x410A0' end='0x410B0' type='altera_avalon_pio.s1' /><slave name='sw.s1' start='0x410B0' end='0x410C0' type='altera_avalon_pio.s1' /><slave name='led.s1' start='0x410C0' end='0x410D0' type='altera_avalon_pio.s1' /><slave name='altpll_0.pll_slave' start='0x410D0' end='0x410E0' type='altpll.pll_slave' /><slave name='sysid_qsys.control_slave' start='0x410E0' end='0x410E8' type='altera_avalon_sysid_qsys.control_slave' /><slave name='jtag_uart.avalon_jtag_slave' start='0x410E8' end='0x410F0' type='altera_avalon_jtag_uart.avalon_jtag_slave' /><slave name='EEE_IMGPROC_0.s1' start='0x42000' end='0x42020' type='EEE_IMGPROC.s1' /><slave name='uart_0.s1' start='0x42020' end='0x42040' type='altera_avalon_uart.s1' /></address-map>,data_master_high_performance_paddr_base=0,data_master_high_performance_paddr_size=0,data_master_paddr_base=0,data_master_paddr_size=0,dcache_bursts=false,dcache_bursts_derived=false,dcache_lineSize_derived=32,dcache_numTCDM=0,dcache_ramBlockType=Automatic,dcache_size=2048,dcache_size_derived=2048,dcache_tagramBlockType=Automatic,dcache_victim_buf_impl=ram,debug_OCIOnchipTrace=_128,debug_assignJtagInstanceID=false,debug_datatrace=false,debug_datatrigger=0,debug_debugReqSignals=false,debug_enabled=true,debug_hwbreakpoint=0,debug_insttrace=false,debug_jtagInstanceID=0,debug_offchiptrace=false,debug_onchiptrace=false,debug_traceStorage=onchip_trace,debug_traceType=none,debug_triggerArming=true,deviceFamilyName=MAX 10,deviceFeaturesSystemInfo=ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 0 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1,dividerType=no_div,exceptionAbsoluteAddr=131104,exceptionOffset=32,exceptionSlave=onchip_memory2_0.s1,faAddrWidth=1,faSlaveMapParam=,fa_cache_line=2,fa_cache_linesize=0,flash_instruction_master_paddr_base=0,flash_instruction_master_paddr_size=0,icache_burstType=None,icache_numTCIM=0,icache_ramBlockType=Automatic,icache_size=4096,icache_tagramBlockType=Automatic,impl=Fast,instAddrWidth=19,instSlaveMapParam=<address-map><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' type='altera_avalon_onchip_memory2.s1' /><slave name='nios2_gen2.debug_mem_slave' start='0x40800' end='0x41000' type='altera_nios2_gen2.debug_mem_slave' /></address-map>,instructionMasterHighPerformanceAddrWidth=1,instructionMasterHighPerformanceMapParam=,instruction_master_high_performance_paddr_base=0,instruction_master_high_performance_paddr_size=0,instruction_master_paddr_base=0,instruction_master_paddr_size=0,internalIrqMaskSystemInfo=31,io_regionbase=0,io_regionsize=0,master_addr_map=false,mmu_TLBMissExcAbsAddr=0,mmu_TLBMissExcOffset=0,mmu_TLBMissExcSlave=None,mmu_autoAssignTlbPtrSz=true,mmu_enabled=false,mmu_processIDNumBits=8,mmu_ramBlockType=Automatic,mmu_tlbNumWays=16,mmu_tlbPtrSz=7,mmu_udtlbNumEntries=6,mmu_uitlbNumEntries=4,mpu_enabled=false,mpu_minDataRegionSize=12,mpu_minInstRegionSize=12,mpu_numOfDataRegion=8,mpu_numOfInstRegion=8,mpu_useLimit=false,mpx_enabled=false,mul_32_impl=2,mul_64_impl=0,mul_shift_choice=0,multiplierType=mul_fast32,ocimem_ramBlockType=Automatic,ocimem_ramInit=false,regfile_ramBlockType=Automatic,register_file_por=false,resetAbsoluteAddr=131072,resetOffset=0,resetSlave=onchip_memory2_0.s1,resetrequest_enabled=true,setting_HBreakTest=false,setting_HDLSimCachesCleared=true,setting_activateMonitors=true,setting_activateTestEndChecker=false,setting_activateTrace=false,setting_allow_break_inst=false,setting_alwaysEncrypt=true,setting_asic_add_scan_mode_input=false,setting_asic_enabled=false,setting_asic_synopsys_translate_on_off=false,setting_asic_third_party_synthesis=false,setting_avalonDebugPortPresent=false,setting_bhtPtrSz=8,setting_bigEndian=false,setting_bit31BypassDCache=true,setting_branchpredictiontype=Dynamic,setting_breakslaveoveride=false,setting_clearXBitsLDNonBypass=true,setting_dc_ecc_present=true,setting_disable_tmr_inj=false,setting_disableocitrace=false,setting_dtcm_ecc_present=true,setting_ecc_present=false,setting_ecc_sim_test_ports=false,setting_exportHostDebugPort=false,setting_exportPCB=false,setting_export_large_RAMs=false,setting_exportdebuginfo=false,setting_exportvectors=false,setting_fast_register_read=false,setting_ic_ecc_present=true,setting_interruptControllerType=Internal,setting_ioregionBypassDCache=false,setting_itcm_ecc_present=true,setting_mmu_ecc_present=true,setting_oci_export_jtag_signals=false,setting_oci_version=1,setting_preciseIllegalMemAccessException=false,setting_removeRAMinit=false,setting_rf_ecc_present=true,setting_shadowRegisterSets=0,setting_showInternalSettings=false,setting_showUnpublishedSettings=false,setting_support31bitdcachebypass=true,setting_tmr_output_disable=false,setting_usedesignware=false,shift_rot_impl=1,shifterType=fast_le_shift,stratix_dspblock_shift_mul=false,tightlyCoupledDataMaster0AddrWidth=1,tightlyCoupledDataMaster0MapParam=,tightlyCoupledDataMaster1AddrWidth=1,tightlyCoupledDataMaster1MapParam=,tightlyCoupledDataMaster2AddrWidth=1,tightlyCoupledDataMaster2MapParam=,tightlyCoupledDataMaster3AddrWidth=1,tightlyCoupledDataMaster3MapParam=,tightlyCoupledInstructionMaster0AddrWidth=1,tightlyCoupledInstructionMaster0MapParam=,tightlyCoupledInstructionMaster1AddrWidth=1,tightlyCoupledInstructionMaster1MapParam=,tightlyCoupledInstructionMaster2AddrWidth=1,tightlyCoupledInstructionMaster2MapParam=,tightlyCoupledInstructionMaster3AddrWidth=1,tightlyCoupledInstructionMaster3MapParam=,tightly_coupled_data_master_0_paddr_base=0,tightly_coupled_data_master_0_paddr_size=0,tightly_coupled_data_master_1_paddr_base=0,tightly_coupled_data_master_1_paddr_size=0,tightly_coupled_data_master_2_paddr_base=0,tightly_coupled_data_master_2_paddr_size=0,tightly_coupled_data_master_3_paddr_base=0,tightly_coupled_data_master_3_paddr_size=0,tightly_coupled_instruction_master_0_paddr_base=0,tightly_coupled_instruction_master_0_paddr_size=0,tightly_coupled_instruction_master_1_paddr_base=0,tightly_coupled_instruction_master_1_paddr_size=0,tightly_coupled_instruction_master_2_paddr_base=0,tightly_coupled_instruction_master_2_paddr_size=0,tightly_coupled_instruction_master_3_paddr_base=0,tightly_coupled_instruction_master_3_paddr_size=0,tmr_enabled=false,tracefilename=,translate_off= "synthesis translate_off" ,translate_on= "synthesis translate_on" ,userDefinedSettings=(altera_clock_bridge:16.1:DERIVED_CLOCK_RATE=50000000,EXPLICIT_CLOCK_RATE=0,NUM_CLOCK_OUTPUTS=1)(altera_reset_bridge:16.1:ACTIVE_LOW_RESET=1,AUTO_CLK_CLOCK_RATE=50000000,NUM_RESET_OUTPUTS=1,SYNCHRONOUS_EDGES=deassert,USE_RESET_REQUEST=1)(altera_nios2_gen2_unit:16.1:bht_ramBlockType=Automatic,breakAbsoluteAddr=264224,breakOffset=32,breakSlave=None,breakSlave_derived=nios2_gen2.debug_mem_slave,cdx_enabled=false,clockFrequency=50000000,cpuArchRev=1,cpuID=0,cpuReset=false,cpu_name=cpu,customInstSlavesSystemInfo=<info/>,dataAddrWidth=19,dataMasterHighPerformanceAddrWidth=1,dataMasterHighPerformanceMapParam=,dataSlaveMapParam=<address-map><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' type='altera_avalon_onchip_memory2.s1' /><slave name='nios2_gen2.debug_mem_slave' start='0x40800' end='0x41000' type='altera_nios2_gen2.debug_mem_slave' /><slave name='timer.s1' start='0x41000' end='0x41020' type='altera_avalon_timer.s1' /><slave name='TERASIC_AUTO_FOCUS_0.mm_ctrl' start='0x41020' end='0x41040' type='TERASIC_AUTO_FOCUS.mm_ctrl' /><slave name='i2c_opencores_camera.avalon_slave_0' start='0x41040' end='0x41060' type='i2c_opencores.avalon_slave_0' /><slave name='i2c_opencores_mipi.avalon_slave_0' start='0x41060' end='0x41080' type='i2c_opencores.avalon_slave_0' /><slave name='mipi_pwdn_n.s1' start='0x41080' end='0x41090' type='altera_avalon_pio.s1' /><slave name='mipi_reset_n.s1' start='0x41090' end='0x410A0' type='altera_avalon_pio.s1' /><slave name='key.s1' start='0x410A0' end='0x410B0' type='altera_avalon_pio.s1' /><slave name='sw.s1' start='0x410B0' end='0x410C0' type='altera_avalon_pio.s1' /><slave name='led.s1' start='0x410C0' end='0x410D0' type='altera_avalon_pio.s1' /><slave name='altpll_0.pll_slave' start='0x410D0' end='0x410E0' type='altpll.pll_slave' /><slave name='sysid_qsys.control_slave' start='0x410E0' end='0x410E8' type='altera_avalon_sysid_qsys.control_slave' /><slave name='jtag_uart.avalon_jtag_slave' start='0x410E8' end='0x410F0' type='altera_avalon_jtag_uart.avalon_jtag_slave' /><slave name='EEE_IMGPROC_0.s1' start='0x42000' end='0x42020' type='EEE_IMGPROC.s1' /><slave name='uart_0.s1' start='0x42020' end='0x42040' type='altera_avalon_uart.s1' /></address-map>,data_master_high_performance_paddr_base=0,data_master_high_performance_paddr_top=0,data_master_paddr_base=0,data_master_paddr_top=0,dcache_bursts=false,dcache_bursts_derived=false,dcache_lineSize_derived=32,dcache_numTCDM=0,dcache_ramBlockType=Automatic,dcache_size=2048,dcache_size_derived=2048,dcache_tagramBlockType=Automatic,dcache_victim_buf_impl=ram,debug_OCIOnchipTrace=_128,debug_assignJtagInstanceID=false,debug_datatrace=false,debug_datatrigger=0,debug_debugReqSignals=false,debug_enabled=true,debug_hwbreakpoint=0,debug_insttrace=false,debug_jtagInstanceID=0,debug_offchiptrace=false,debug_onchiptrace=false,debug_traceStorage=onchip_trace,debug_traceType=none,debug_triggerArming=true,deviceFamilyName=MAX 10,deviceFeaturesSystemInfo=ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 0 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1,dividerType=no_div,exceptionAbsoluteAddr=131104,exceptionOffset=32,exceptionSlave=onchip_memory2_0.s1,faAddrWidth=1,faSlaveMapParam=,fa_cache_line=2,fa_cache_linesize=0,flash_instruction_master_paddr_base=0,flash_instruction_master_paddr_top=0,icache_burstType=None,icache_numTCIM=0,icache_ramBlockType=Automatic,icache_size=4096,icache_tagramBlockType=Automatic,impl=Fast,instAddrWidth=19,instSlaveMapParam=<address-map><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' type='altera_avalon_onchip_memory2.s1' /><slave name='nios2_gen2.debug_mem_slave' start='0x40800' end='0x41000' type='altera_nios2_gen2.debug_mem_slave' /></address-map>,instructionMasterHighPerformanceAddrWidth=1,instructionMasterHighPerformanceMapParam=,instruction_master_high_performance_paddr_base=0,instruction_master_high_performance_paddr_top=0,instruction_master_paddr_base=0,instruction_master_paddr_top=0,internalIrqMaskSystemInfo=31,io_regionbase=0,io_regionsize=0,master_addr_map=false,mmu_TLBMissExcAbsAddr=0,mmu_TLBMissExcOffset=0,mmu_TLBMissExcSlave=None,mmu_autoAssignTlbPtrSz=true,mmu_enabled=false,mmu_processIDNumBits=8,mmu_ramBlockType=Automatic,mmu_tlbNumWays=16,mmu_tlbPtrSz=7,mmu_udtlbNumEntries=6,mmu_uitlbNumEntries=4,mpu_enabled=false,mpu_minDataRegionSize=12,mpu_minInstRegionSize=12,mpu_numOfDataRegion=8,mpu_numOfInstRegion=8,mpu_useLimit=false,mpx_enabled=false,multiplierType=mul_fast32,ocimem_ramBlockType=Automatic,ocimem_ramInit=false,regfile_ramBlockType=Automatic,register_file_por=false,resetAbsoluteAddr=131072,resetOffset=0,resetSlave=onchip_memory2_0.s1,resetrequest_enabled=true,setting_HBreakTest=false,setting_HDLSimCachesCleared=true,setting_activateMonitors=true,setting_activateTestEndChecker=false,setting_activateTrace=false,setting_allow_break_inst=false,setting_alwaysEncrypt=true,setting_asic_add_scan_mode_input=false,setting_asic_enabled=false,setting_asic_synopsys_translate_on_off=false,setting_asic_third_party_synthesis=false,setting_avalonDebugPortPresent=false,setting_bhtPtrSz=8,setting_bigEndian=false,setting_bit31BypassDCache=true,setting_branchPredictionType=Dynamic,setting_breakslaveoveride=false,setting_clearXBitsLDNonBypass=true,setting_dc_ecc_present=true,setting_disableocitrace=false,setting_dtcm_ecc_present=true,setting_ecc_present=false,setting_ecc_sim_test_ports=false,setting_exportPCB=false,setting_export_large_RAMs=false,setting_exportdebuginfo=false,setting_exportvectors=false,setting_fast_register_read=false,setting_ic_ecc_present=true,setting_interruptControllerType=Internal,setting_ioregionBypassDCache=false,setting_itcm_ecc_present=true,setting_mmu_ecc_present=true,setting_oci_export_jtag_signals=false,setting_oci_version=1,setting_preciseIllegalMemAccessException=false,setting_removeRAMinit=false,setting_rf_ecc_present=true,setting_shadowRegisterSets=0,setting_showInternalSettings=false,setting_showUnpublishedSettings=false,setting_support31bitdcachebypass=true,setting_usedesignware=false,shifterType=fast_le_shift,stratix_dspblock_shift_mul=false,tightlyCoupledDataMaster0AddrWidth=1,tightlyCoupledDataMaster0MapParam=,tightlyCoupledDataMaster1AddrWidth=1,tightlyCoupledDataMaster1MapParam=,tightlyCoupledDataMaster2AddrWidth=1,tightlyCoupledDataMaster2MapParam=,tightlyCoupledDataMaster3AddrWidth=1,tightlyCoupledDataMaster3MapParam=,tightlyCoupledInstructionMaster0AddrWidth=1,tightlyCoupledInstructionMaster0MapParam=,tightlyCoupledInstructionMaster1AddrWidth=1,tightlyCoupledInstructionMaster1MapParam=,tightlyCoupledInstructionMaster2AddrWidth=1,tightlyCoupledInstructionMaster2MapParam=,tightlyCoupledInstructionMaster3AddrWidth=1,tightlyCoupledInstructionMaster3MapParam=,tightly_coupled_data_master_0_paddr_base=0,tightly_coupled_data_master_0_paddr_top=0,tightly_coupled_data_master_1_paddr_base=0,tightly_coupled_data_master_1_paddr_top=0,tightly_coupled_data_master_2_paddr_base=0,tightly_coupled_data_master_2_paddr_top=0,tightly_coupled_data_master_3_paddr_base=0,tightly_coupled_data_master_3_paddr_top=0,tightly_coupled_instruction_master_0_paddr_base=0,tightly_coupled_instruction_master_0_paddr_top=0,tightly_coupled_instruction_master_1_paddr_base=0,tightly_coupled_instruction_master_1_paddr_top=0,tightly_coupled_instruction_master_2_paddr_base=0,tightly_coupled_instruction_master_2_paddr_top=0,tightly_coupled_instruction_master_3_paddr_base=0,tightly_coupled_instruction_master_3_paddr_top=0,tmr_enabled=false,tracefilename=,translate_off= "synthesis translate_off" ,translate_on= "synthesis translate_on" ,userDefinedSettings=)(clock:16.1:)(clock:16.1:)(reset:16.1:)"
|
|
instancePathKey="Qsys:.:nios2_gen2"
|
|
kind="altera_nios2_gen2"
|
|
version="16.1"
|
|
name="Qsys_nios2_gen2">
|
|
<parameter name="mpx_enabled" value="false" />
|
|
<parameter name="ocimem_ramBlockType" value="Automatic" />
|
|
<parameter name="dcache_victim_buf_impl" value="ram" />
|
|
<parameter name="setting_exportPCB" value="false" />
|
|
<parameter name="setting_ic_ecc_present" value="true" />
|
|
<parameter name="dcache_size_derived" value="2048" />
|
|
<parameter name="mmu_udtlbNumEntries" value="6" />
|
|
<parameter
|
|
name="deviceFeaturesSystemInfo"
|
|
value="ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 0 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1" />
|
|
<parameter name="bht_ramBlockType" value="Automatic" />
|
|
<parameter name="mmu_TLBMissExcSlave" value="None" />
|
|
<parameter name="impl" value="Fast" />
|
|
<parameter name="setting_branchpredictiontype" value="Dynamic" />
|
|
<parameter name="tightly_coupled_instruction_master_0_paddr_size" value="0" />
|
|
<parameter name="breakOffset" value="32" />
|
|
<parameter name="setting_activateTrace" value="false" />
|
|
<parameter name="debug_offchiptrace" value="false" />
|
|
<parameter name="setting_avalonDebugPortPresent" value="false" />
|
|
<parameter name="dcache_numTCDM" value="0" />
|
|
<parameter name="setting_tmr_output_disable" value="false" />
|
|
<parameter name="tightlyCoupledInstructionMaster0AddrWidth" value="1" />
|
|
<parameter name="tightly_coupled_data_master_2_paddr_base" value="0" />
|
|
<parameter name="debug_debugReqSignals" value="false" />
|
|
<parameter name="AUTO_DEVICE" value="10M50DAF484C7G" />
|
|
<parameter name="instruction_master_high_performance_paddr_size" value="0" />
|
|
<parameter name="tightly_coupled_instruction_master_2_paddr_base" value="0" />
|
|
<parameter name="mmu_processIDNumBits" value="8" />
|
|
<parameter name="debug_onchiptrace" value="false" />
|
|
<parameter name="setting_rf_ecc_present" value="true" />
|
|
<parameter name="ocimem_ramInit" value="false" />
|
|
<parameter name="internalIrqMaskSystemInfo" value="31" />
|
|
<parameter name="tightly_coupled_data_master_0_paddr_size" value="0" />
|
|
<parameter name="exceptionAbsoluteAddr" value="131104" />
|
|
<parameter name="icache_size" value="4096" />
|
|
<parameter
|
|
name="dataSlaveMapParam"
|
|
value="<address-map><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' type='altera_avalon_onchip_memory2.s1' /><slave name='nios2_gen2.debug_mem_slave' start='0x40800' end='0x41000' type='altera_nios2_gen2.debug_mem_slave' /><slave name='timer.s1' start='0x41000' end='0x41020' type='altera_avalon_timer.s1' /><slave name='TERASIC_AUTO_FOCUS_0.mm_ctrl' start='0x41020' end='0x41040' type='TERASIC_AUTO_FOCUS.mm_ctrl' /><slave name='i2c_opencores_camera.avalon_slave_0' start='0x41040' end='0x41060' type='i2c_opencores.avalon_slave_0' /><slave name='i2c_opencores_mipi.avalon_slave_0' start='0x41060' end='0x41080' type='i2c_opencores.avalon_slave_0' /><slave name='mipi_pwdn_n.s1' start='0x41080' end='0x41090' type='altera_avalon_pio.s1' /><slave name='mipi_reset_n.s1' start='0x41090' end='0x410A0' type='altera_avalon_pio.s1' /><slave name='key.s1' start='0x410A0' end='0x410B0' type='altera_avalon_pio.s1' /><slave name='sw.s1' start='0x410B0' end='0x410C0' type='altera_avalon_pio.s1' /><slave name='led.s1' start='0x410C0' end='0x410D0' type='altera_avalon_pio.s1' /><slave name='altpll_0.pll_slave' start='0x410D0' end='0x410E0' type='altpll.pll_slave' /><slave name='sysid_qsys.control_slave' start='0x410E0' end='0x410E8' type='altera_avalon_sysid_qsys.control_slave' /><slave name='jtag_uart.avalon_jtag_slave' start='0x410E8' end='0x410F0' type='altera_avalon_jtag_uart.avalon_jtag_slave' /><slave name='EEE_IMGPROC_0.s1' start='0x42000' end='0x42020' type='EEE_IMGPROC.s1' /><slave name='uart_0.s1' start='0x42020' end='0x42040' type='altera_avalon_uart.s1' /></address-map>" />
|
|
<parameter name="mpu_enabled" value="false" />
|
|
<parameter name="flash_instruction_master_paddr_size" value="0" />
|
|
<parameter name="setting_ecc_present" value="false" />
|
|
<parameter name="stratix_dspblock_shift_mul" value="false" />
|
|
<parameter name="shift_rot_impl" value="1" />
|
|
<parameter name="setting_ioregionBypassDCache" value="false" />
|
|
<parameter name="register_file_por" value="false" />
|
|
<parameter name="faAddrWidth" value="1" />
|
|
<parameter name="tightlyCoupledInstructionMaster2MapParam" value="" />
|
|
<parameter name="resetrequest_enabled" value="true" />
|
|
<parameter name="exceptionSlave" value="onchip_memory2_0.s1" />
|
|
<parameter name="debug_triggerArming" value="true" />
|
|
<parameter name="debug_OCIOnchipTrace" value="_128" />
|
|
<parameter name="dataAddrWidth" value="19" />
|
|
<parameter name="setting_bit31BypassDCache" value="true" />
|
|
<parameter name="instAddrWidth" value="19" />
|
|
<parameter name="io_regionbase" value="0" />
|
|
<parameter name="mul_32_impl" value="2" />
|
|
<parameter name="translate_on" value=" "synthesis translate_on" " />
|
|
<parameter name="tightly_coupled_instruction_master_1_paddr_base" value="0" />
|
|
<parameter name="mmu_autoAssignTlbPtrSz" value="true" />
|
|
<parameter name="instruction_master_paddr_base" value="0" />
|
|
<parameter name="userDefinedSettings" value="" />
|
|
<parameter name="mul_64_impl" value="0" />
|
|
<parameter name="clockFrequency" value="50000000" />
|
|
<parameter name="resetOffset" value="0" />
|
|
<parameter name="dcache_ramBlockType" value="Automatic" />
|
|
<parameter name="dataMasterHighPerformanceAddrWidth" value="1" />
|
|
<parameter name="mul_shift_choice" value="0" />
|
|
<parameter name="tightlyCoupledDataMaster2MapParam" value="" />
|
|
<parameter name="tightlyCoupledInstructionMaster2AddrWidth" value="1" />
|
|
<parameter name="tightly_coupled_data_master_1_paddr_size" value="0" />
|
|
<parameter name="setting_asic_third_party_synthesis" value="false" />
|
|
<parameter name="mpu_minInstRegionSize" value="12" />
|
|
<parameter name="setting_exportdebuginfo" value="false" />
|
|
<parameter name="mmu_tlbPtrSz" value="7" />
|
|
<parameter name="resetSlave" value="onchip_memory2_0.s1" />
|
|
<parameter name="dcache_bursts_derived" value="false" />
|
|
<parameter name="multiplierType" value="mul_fast32" />
|
|
<parameter name="debug_traceStorage" value="onchip_trace" />
|
|
<parameter name="setting_preciseIllegalMemAccessException" value="false" />
|
|
<parameter name="fa_cache_linesize" value="0" />
|
|
<parameter name="data_master_paddr_size" value="0" />
|
|
<parameter name="setting_HBreakTest" value="false" />
|
|
<parameter name="setting_disableocitrace" value="false" />
|
|
<parameter name="tightlyCoupledInstructionMaster1AddrWidth" value="1" />
|
|
<parameter name="setting_showInternalSettings" value="false" />
|
|
<parameter name="instructionMasterHighPerformanceMapParam" value="" />
|
|
<parameter name="tightly_coupled_instruction_master_3_paddr_base" value="0" />
|
|
<parameter name="debug_datatrigger" value="0" />
|
|
<parameter name="tightlyCoupledDataMaster2AddrWidth" value="1" />
|
|
<parameter name="debug_enabled" value="true" />
|
|
<parameter name="setting_export_large_RAMs" value="false" />
|
|
<parameter name="setting_dc_ecc_present" value="true" />
|
|
<parameter name="dividerType" value="no_div" />
|
|
<parameter name="setting_exportvectors" value="false" />
|
|
<parameter name="breakSlave_derived" value="nios2_gen2.debug_mem_slave" />
|
|
<parameter name="tightly_coupled_data_master_0_paddr_base" value="0" />
|
|
<parameter name="mmu_ramBlockType" value="Automatic" />
|
|
<parameter name="cdx_enabled" value="false" />
|
|
<parameter name="AUTO_DEVICE_SPEEDGRADE" value="7" />
|
|
<parameter name="customInstSlavesSystemInfo" value="<info/>" />
|
|
<parameter name="tracefilename" value="" />
|
|
<parameter name="instructionMasterHighPerformanceAddrWidth" value="1" />
|
|
<parameter name="tightly_coupled_instruction_master_2_paddr_size" value="0" />
|
|
<parameter name="setting_oci_version" value="1" />
|
|
<parameter name="icache_burstType" value="None" />
|
|
<parameter name="data_master_high_performance_paddr_size" value="0" />
|
|
<parameter name="setting_disable_tmr_inj" value="false" />
|
|
<parameter name="instruction_master_high_performance_paddr_base" value="0" />
|
|
<parameter name="tightly_coupled_instruction_master_3_paddr_size" value="0" />
|
|
<parameter name="regfile_ramBlockType" value="Automatic" />
|
|
<parameter name="dcache_size" value="2048" />
|
|
<parameter name="breakSlave" value="None" />
|
|
<parameter name="exceptionOffset" value="32" />
|
|
<parameter name="tightlyCoupledDataMaster0MapParam" value="" />
|
|
<parameter name="tightlyCoupledInstructionMaster1MapParam" value="" />
|
|
<parameter name="breakAbsoluteAddr" value="264224" />
|
|
<parameter name="setting_ecc_sim_test_ports" value="false" />
|
|
<parameter name="setting_showUnpublishedSettings" value="false" />
|
|
<parameter name="master_addr_map" value="false" />
|
|
<parameter name="tightlyCoupledDataMaster3AddrWidth" value="1" />
|
|
<parameter name="resetAbsoluteAddr" value="131072" />
|
|
<parameter name="cpuArchRev" value="1" />
|
|
<parameter name="setting_dtcm_ecc_present" value="true" />
|
|
<parameter name="customInstSlavesSystemInfo_nios_c" value="<info/>" />
|
|
<parameter name="customInstSlavesSystemInfo_nios_b" value="<info/>" />
|
|
<parameter name="customInstSlavesSystemInfo_nios_a" value="<info/>" />
|
|
<parameter name="setting_interruptControllerType" value="Internal" />
|
|
<parameter name="dcache_tagramBlockType" value="Automatic" />
|
|
<parameter name="debug_insttrace" value="false" />
|
|
<parameter name="setting_itcm_ecc_present" value="true" />
|
|
<parameter name="tightly_coupled_instruction_master_0_paddr_base" value="0" />
|
|
<parameter name="mmu_TLBMissExcAbsAddr" value="0" />
|
|
<parameter name="mpu_useLimit" value="false" />
|
|
<parameter name="icache_numTCIM" value="0" />
|
|
<parameter name="setting_usedesignware" value="false" />
|
|
<parameter name="tightlyCoupledDataMaster3MapParam" value="" />
|
|
<parameter name="instruction_master_paddr_size" value="0" />
|
|
<parameter name="mmu_TLBMissExcOffset" value="0" />
|
|
<parameter name="mmu_enabled" value="false" />
|
|
<parameter name="mmu_uitlbNumEntries" value="4" />
|
|
<parameter name="tightlyCoupledDataMaster1AddrWidth" value="1" />
|
|
<parameter name="setting_activateTestEndChecker" value="false" />
|
|
<parameter name="cpuID" value="0" />
|
|
<parameter name="tightly_coupled_data_master_2_paddr_size" value="0" />
|
|
<parameter name="setting_asic_enabled" value="false" />
|
|
<parameter name="setting_HDLSimCachesCleared" value="true" />
|
|
<parameter name="setting_asic_add_scan_mode_input" value="false" />
|
|
<parameter name="setting_shadowRegisterSets" value="0" />
|
|
<parameter name="tightly_coupled_data_master_3_paddr_size" value="0" />
|
|
<parameter name="icache_ramBlockType" value="Automatic" />
|
|
<parameter name="faSlaveMapParam" value="" />
|
|
<parameter name="setting_clearXBitsLDNonBypass" value="true" />
|
|
<parameter name="tightlyCoupledDataMaster0AddrWidth" value="1" />
|
|
<parameter name="fa_cache_line" value="2" />
|
|
<parameter name="debug_assignJtagInstanceID" value="false" />
|
|
<parameter name="setting_activateMonitors" value="true" />
|
|
<parameter name="AUTO_CLK_RESET_DOMAIN" value="1" />
|
|
<parameter name="setting_allow_break_inst" value="false" />
|
|
<parameter name="io_regionsize" value="0" />
|
|
<parameter name="tightly_coupled_data_master_3_paddr_base" value="0" />
|
|
<parameter name="translate_off" value=" "synthesis translate_off" " />
|
|
<parameter name="mpu_numOfInstRegion" value="8" />
|
|
<parameter name="flash_instruction_master_paddr_base" value="0" />
|
|
<parameter name="cpuReset" value="false" />
|
|
<parameter name="setting_removeRAMinit" value="false" />
|
|
<parameter name="icache_tagramBlockType" value="Automatic" />
|
|
<parameter name="setting_mmu_ecc_present" value="true" />
|
|
<parameter name="AUTO_CLK_CLOCK_DOMAIN" value="1" />
|
|
<parameter name="debug_datatrace" value="false" />
|
|
<parameter name="debug_hwbreakpoint" value="0" />
|
|
<parameter name="tightlyCoupledInstructionMaster3MapParam" value="" />
|
|
<parameter name="dataMasterHighPerformanceMapParam" value="" />
|
|
<parameter name="setting_bigEndian" value="false" />
|
|
<parameter name="mpu_minDataRegionSize" value="12" />
|
|
<parameter name="tightly_coupled_data_master_1_paddr_base" value="0" />
|
|
<parameter name="debug_jtagInstanceID" value="0" />
|
|
<parameter name="setting_breakslaveoveride" value="false" />
|
|
<parameter name="debug_traceType" value="none" />
|
|
<parameter name="setting_alwaysEncrypt" value="true" />
|
|
<parameter name="setting_oci_export_jtag_signals" value="false" />
|
|
<parameter name="dcache_lineSize_derived" value="32" />
|
|
<parameter name="deviceFamilyName" value="MAX 10" />
|
|
<parameter name="tightlyCoupledDataMaster1MapParam" value="" />
|
|
<parameter name="setting_support31bitdcachebypass" value="true" />
|
|
<parameter
|
|
name="instSlaveMapParam"
|
|
value="<address-map><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' type='altera_avalon_onchip_memory2.s1' /><slave name='nios2_gen2.debug_mem_slave' start='0x40800' end='0x41000' type='altera_nios2_gen2.debug_mem_slave' /></address-map>" />
|
|
<parameter name="setting_bhtPtrSz" value="8" />
|
|
<parameter name="setting_exportHostDebugPort" value="false" />
|
|
<parameter name="tmr_enabled" value="false" />
|
|
<parameter name="data_master_paddr_base" value="0" />
|
|
<parameter name="tightlyCoupledInstructionMaster3AddrWidth" value="1" />
|
|
<parameter name="mpu_numOfDataRegion" value="8" />
|
|
<parameter name="data_master_high_performance_paddr_base" value="0" />
|
|
<parameter name="tightly_coupled_instruction_master_1_paddr_size" value="0" />
|
|
<parameter name="tightlyCoupledInstructionMaster0MapParam" value="" />
|
|
<parameter name="dcache_bursts" value="false" />
|
|
<parameter name="setting_asic_synopsys_translate_on_off" value="false" />
|
|
<parameter name="setting_fast_register_read" value="false" />
|
|
<parameter name="mmu_tlbNumWays" value="16" />
|
|
<parameter name="shifterType" value="fast_le_shift" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2.v"
|
|
type="VERILOG" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu.ocp"
|
|
type="OTHER"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu.sdc"
|
|
type="SDC"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu.v"
|
|
type="VERILOG_ENCRYPT"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu_bht_ram.mif"
|
|
type="MIF"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu_dc_tag_ram.mif"
|
|
type="MIF"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu_debug_slave_sysclk.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu_debug_slave_tck.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu_debug_slave_wrapper.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu_ic_tag_ram.mif"
|
|
type="MIF"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu_mult_cell.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu_ociram_default_contents.mif"
|
|
type="MIF"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu_rf_ram_a.mif"
|
|
type="MIF"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu_rf_ram_b.mif"
|
|
type="MIF"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu_test_bench.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
</childGeneratedFiles>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/nios2_ip/altera_nios2_gen2/altera_nios2_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/nios2_ip/altera_nios2_gen2/altera_nios2_unit_hw.tcl" />
|
|
</childSourceFiles>
|
|
<instantiator instantiator="Qsys" as="nios2_gen2" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 211 starting:altera_nios2_gen2 "submodules/Qsys_nios2_gen2"</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Debug">Transform: CustomInstructionTransform</message>
|
|
<message level="Debug">No custom instruction connections, skipping transform </message>
|
|
<message level="Debug" culprit="merlin_custom_instruction_transform"><![CDATA[After transform: <b>3</b> modules, <b>3</b> connections]]></message>
|
|
<message level="Debug">Transform: MMTransform</message>
|
|
<message level="Debug">Transform: InterruptMapperTransform</message>
|
|
<message level="Debug">Transform: InterruptSyncTransform</message>
|
|
<message level="Debug">Transform: InterruptFanoutTransform</message>
|
|
<message level="Debug">Transform: AvalonStreamingTransform</message>
|
|
<message level="Debug">Transform: ResetAdaptation</message>
|
|
<message level="Debug" culprit="nios2_gen2"><![CDATA["<b>nios2_gen2</b>" reuses <b>altera_nios2_gen2_unit</b> "<b>submodules/Qsys_nios2_gen2_cpu</b>"]]></message>
|
|
<message level="Info" culprit="nios2_gen2"><![CDATA["<b>Qsys</b>" instantiated <b>altera_nios2_gen2</b> "<b>nios2_gen2</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 151 starting:altera_nios2_gen2_unit "submodules/Qsys_nios2_gen2_cpu"</message>
|
|
<message level="Info" culprit="cpu">Starting RTL generation for module 'Qsys_nios2_gen2_cpu'</message>
|
|
<message level="Info" culprit="cpu"> Generation command is [exec F:/intelFPGA_lite/16.1/quartus/bin64//eperlcmd.exe -I F:/intelFPGA_lite/16.1/quartus/bin64//perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/cpu_lib -I F:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/nios_lib -I F:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2 -I F:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2 -- F:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/generate_rtl.epl --name=Qsys_nios2_gen2_cpu --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0075_cpu_gen/ --quartus_bindir=F:/intelFPGA_lite/16.1/quartus/bin64/ --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0075_cpu_gen//Qsys_nios2_gen2_cpu_processor_configuration.pl --do_build_sim=0 ]</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:02 (*) Starting Nios II generation</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:02 (*) Checking for plaintext license.</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Couldn't query license setup in Quartus directory F:/intelFPGA_lite/16.1/quartus/bin64/</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Defaulting to contents of LM_LICENSE_FILE environment variable</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) LM_LICENSE_FILE environment variable is empty</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Plaintext license not found.</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Checking for encrypted license (non-evaluation).</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Couldn't query license setup in Quartus directory F:/intelFPGA_lite/16.1/quartus/bin64/</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Defaulting to contents of LM_LICENSE_FILE environment variable</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) LM_LICENSE_FILE environment variable is empty</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Encrypted license not found. Defaulting to OCP evaluation license (produces a time-limited SOF)</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Elaborating CPU configuration settings</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Creating all objects for CPU</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Testbench</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Instruction decoding</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Instruction fields</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Instruction decodes</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:04 (*) Signals for RTL simulation waveforms</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:04 (*) Instruction controls</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:04 (*) Pipeline frontend</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:04 (*) Pipeline backend</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:06 (*) Generating RTL from CPU objects</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:08 (*) Creating encrypted RTL</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:08 (*) Done Nios II generation</message>
|
|
<message level="Info" culprit="cpu">Done RTL generation for module 'Qsys_nios2_gen2_cpu'</message>
|
|
<message level="Info" culprit="cpu"><![CDATA["<b>nios2_gen2</b>" instantiated <b>altera_nios2_gen2_unit</b> "<b>cpu</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_avalon_onchip_memory2:16.1:allowInSystemMemoryContentEditor=false,autoInitializationFileName=Qsys_onchip_memory2_0,blockType=AUTO,copyInitFile=false,dataWidth=32,dataWidth2=32,derived_enableDiffWidth=false,derived_gui_ram_block_type=Automatic,derived_init_file_name=Qsys_onchip_memory2_0.hex,derived_is_hardcopy=false,derived_set_addr_width=15,derived_set_addr_width2=15,derived_set_data_width=32,derived_set_data_width2=32,derived_singleClockOperation=false,deviceFamily=MAX 10,deviceFeatures=ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 0 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1,dualPort=false,ecc_enabled=false,enPRInitMode=false,enableDiffWidth=false,initMemContent=false,initializationFileName=onchip_mem.hex,instanceID=NONE,memorySize=131072,readDuringWriteMode=DONT_CARE,resetrequest_enabled=true,simAllowMRAMContentsFile=false,simMemInitOnlyFilename=0,singleClockOperation=false,slave1Latency=1,slave2Latency=1,useNonDefaultInitFile=false,useShallowMemBlocks=false,writable=true"
|
|
instancePathKey="Qsys:.:onchip_memory2_0"
|
|
kind="altera_avalon_onchip_memory2"
|
|
version="16.1"
|
|
name="Qsys_onchip_memory2_0">
|
|
<parameter name="derived_singleClockOperation" value="false" />
|
|
<parameter name="derived_is_hardcopy" value="false" />
|
|
<parameter
|
|
name="deviceFeatures"
|
|
value="ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 0 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1" />
|
|
<parameter name="autoInitializationFileName" value="Qsys_onchip_memory2_0" />
|
|
<parameter name="derived_gui_ram_block_type" value="Automatic" />
|
|
<parameter name="enPRInitMode" value="false" />
|
|
<parameter name="useShallowMemBlocks" value="false" />
|
|
<parameter name="writable" value="true" />
|
|
<parameter name="dualPort" value="false" />
|
|
<parameter name="derived_set_addr_width2" value="15" />
|
|
<parameter name="dataWidth" value="32" />
|
|
<parameter name="allowInSystemMemoryContentEditor" value="false" />
|
|
<parameter name="derived_set_addr_width" value="15" />
|
|
<parameter name="derived_init_file_name" value="Qsys_onchip_memory2_0.hex" />
|
|
<parameter name="initializationFileName" value="onchip_mem.hex" />
|
|
<parameter name="singleClockOperation" value="false" />
|
|
<parameter name="derived_set_data_width2" value="32" />
|
|
<parameter name="readDuringWriteMode" value="DONT_CARE" />
|
|
<parameter name="blockType" value="AUTO" />
|
|
<parameter name="derived_enableDiffWidth" value="false" />
|
|
<parameter name="useNonDefaultInitFile" value="false" />
|
|
<parameter name="resetrequest_enabled" value="true" />
|
|
<parameter name="simMemInitOnlyFilename" value="0" />
|
|
<parameter name="copyInitFile" value="false" />
|
|
<parameter name="deviceFamily" value="MAX 10" />
|
|
<parameter name="simAllowMRAMContentsFile" value="false" />
|
|
<parameter name="ecc_enabled" value="false" />
|
|
<parameter name="derived_set_data_width" value="32" />
|
|
<parameter name="instanceID" value="NONE" />
|
|
<parameter name="memorySize" value="131072" />
|
|
<parameter name="dataWidth2" value="32" />
|
|
<parameter name="enableDiffWidth" value="false" />
|
|
<parameter name="initMemContent" value="false" />
|
|
<parameter name="slave1Latency" value="1" />
|
|
<parameter name="slave2Latency" value="1" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_onchip_memory2_0.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/altera_avalon_onchip_memory2_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys" as="onchip_memory2_0" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 211 starting:altera_avalon_onchip_memory2 "submodules/Qsys_onchip_memory2_0"</message>
|
|
<message level="Info" culprit="onchip_memory2_0">Starting RTL generation for module 'Qsys_onchip_memory2_0'</message>
|
|
<message level="Info" culprit="onchip_memory2_0"> Generation command is [exec F:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I F:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2 -- F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/generate_rtl.pl --name=Qsys_onchip_memory2_0 --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0067_onchip_memory2_0_gen/ --quartus_dir=F:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0067_onchip_memory2_0_gen//Qsys_onchip_memory2_0_component_configuration.pl --do_build_sim=0 ]</message>
|
|
<message level="Info" culprit="onchip_memory2_0">Done RTL generation for module 'Qsys_onchip_memory2_0'</message>
|
|
<message level="Info" culprit="onchip_memory2_0"><![CDATA["<b>Qsys</b>" instantiated <b>altera_avalon_onchip_memory2</b> "<b>onchip_memory2_0</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_avalon_new_sdram_controller:16.1:TAC=5.5,TMRD=3,TRCD=20.0,TRFC=70.0,TRP=20.0,TWR=14.0,addressWidth=25,bankWidth=2,casLatency=3,clockRate=100000000,columnWidth=10,componentName=Qsys_sdram,dataWidth=16,generateSimulationModel=true,initNOPDelay=0.0,initRefreshCommands=2,masteredTristateBridgeSlave=0,model=single_Micron_MT48LC4M32B2_7_chip,numberOfBanks=4,numberOfChipSelects=1,pinsSharedViaTriState=false,powerUpDelay=100.0,refreshPeriod=15.625,registerDataIn=true,rowWidth=13,size=67108864"
|
|
instancePathKey="Qsys:.:sdram"
|
|
kind="altera_avalon_new_sdram_controller"
|
|
version="16.1"
|
|
name="Qsys_sdram">
|
|
<parameter name="registerDataIn" value="true" />
|
|
<parameter name="casLatency" value="3" />
|
|
<parameter name="refreshPeriod" value="15.625" />
|
|
<parameter name="masteredTristateBridgeSlave" value="0" />
|
|
<parameter name="TMRD" value="3" />
|
|
<parameter name="pinsSharedViaTriState" value="false" />
|
|
<parameter name="clockRate" value="100000000" />
|
|
<parameter name="TRP" value="20.0" />
|
|
<parameter name="numberOfChipSelects" value="1" />
|
|
<parameter name="columnWidth" value="10" />
|
|
<parameter name="componentName" value="Qsys_sdram" />
|
|
<parameter name="TRFC" value="70.0" />
|
|
<parameter name="generateSimulationModel" value="true" />
|
|
<parameter name="dataWidth" value="16" />
|
|
<parameter name="rowWidth" value="13" />
|
|
<parameter name="bankWidth" value="2" />
|
|
<parameter name="powerUpDelay" value="100.0" />
|
|
<parameter name="TWR" value="14.0" />
|
|
<parameter name="size" value="67108864" />
|
|
<parameter name="TAC" value="5.5" />
|
|
<parameter name="initRefreshCommands" value="2" />
|
|
<parameter name="TRCD" value="20.0" />
|
|
<parameter name="initNOPDelay" value="0.0" />
|
|
<parameter name="addressWidth" value="25" />
|
|
<parameter name="numberOfBanks" value="4" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_sdram.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_sdram_test_component.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_new_sdram_controller/altera_avalon_new_sdram_controller_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys" as="sdram" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 210 starting:altera_avalon_new_sdram_controller "submodules/Qsys_sdram"</message>
|
|
<message level="Info" culprit="sdram">Starting RTL generation for module 'Qsys_sdram'</message>
|
|
<message level="Info" culprit="sdram"> Generation command is [exec F:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I F:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_new_sdram_controller -- F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_new_sdram_controller/generate_rtl.pl --name=Qsys_sdram --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0068_sdram_gen/ --quartus_dir=F:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0068_sdram_gen//Qsys_sdram_component_configuration.pl --do_build_sim=0 ]</message>
|
|
<message level="Info" culprit="sdram">Done RTL generation for module 'Qsys_sdram'</message>
|
|
<message level="Info" culprit="sdram"><![CDATA["<b>Qsys</b>" instantiated <b>altera_avalon_new_sdram_controller</b> "<b>sdram</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_avalon_pio:16.1:bitClearingEdgeCapReg=false,bitModifyingOutReg=false,captureEdge=false,clockRate=50000000,derived_capture=false,derived_do_test_bench_wiring=false,derived_edge_type=NONE,derived_has_in=true,derived_has_irq=false,derived_has_out=false,derived_has_tri=false,derived_irq_type=NONE,direction=Input,edgeType=RISING,generateIRQ=false,irqType=LEVEL,resetValue=0,simDoTestBenchWiring=false,simDrivenValue=0,width=10"
|
|
instancePathKey="Qsys:.:sw"
|
|
kind="altera_avalon_pio"
|
|
version="16.1"
|
|
name="Qsys_sw">
|
|
<parameter name="derived_do_test_bench_wiring" value="false" />
|
|
<parameter name="generateIRQ" value="false" />
|
|
<parameter name="derived_has_irq" value="false" />
|
|
<parameter name="captureEdge" value="false" />
|
|
<parameter name="clockRate" value="50000000" />
|
|
<parameter name="derived_has_out" value="false" />
|
|
<parameter name="derived_has_in" value="true" />
|
|
<parameter name="resetValue" value="0" />
|
|
<parameter name="derived_has_tri" value="false" />
|
|
<parameter name="derived_capture" value="false" />
|
|
<parameter name="simDoTestBenchWiring" value="false" />
|
|
<parameter name="bitModifyingOutReg" value="false" />
|
|
<parameter name="simDrivenValue" value="0" />
|
|
<parameter name="derived_edge_type" value="NONE" />
|
|
<parameter name="irqType" value="LEVEL" />
|
|
<parameter name="derived_irq_type" value="NONE" />
|
|
<parameter name="edgeType" value="RISING" />
|
|
<parameter name="width" value="10" />
|
|
<parameter name="bitClearingEdgeCapReg" value="false" />
|
|
<parameter name="direction" value="Input" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_sw.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_pio/altera_avalon_pio_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys" as="sw" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 209 starting:altera_avalon_pio "submodules/Qsys_sw"</message>
|
|
<message level="Info" culprit="sw">Starting RTL generation for module 'Qsys_sw'</message>
|
|
<message level="Info" culprit="sw"> Generation command is [exec F:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I F:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio -- F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio/generate_rtl.pl --name=Qsys_sw --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0069_sw_gen/ --quartus_dir=F:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0069_sw_gen//Qsys_sw_component_configuration.pl --do_build_sim=0 ]</message>
|
|
<message level="Info" culprit="sw">Done RTL generation for module 'Qsys_sw'</message>
|
|
<message level="Info" culprit="sw"><![CDATA["<b>Qsys</b>" instantiated <b>altera_avalon_pio</b> "<b>sw</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_avalon_sysid_qsys:16.1:id=0,timestamp=1622729373"
|
|
instancePathKey="Qsys:.:sysid_qsys"
|
|
kind="altera_avalon_sysid_qsys"
|
|
version="16.1"
|
|
name="Qsys_sysid_qsys">
|
|
<parameter name="id" value="0" />
|
|
<parameter name="timestamp" value="1622729373" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_sysid_qsys.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_sysid_qsys/altera_avalon_sysid_qsys_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys" as="sysid_qsys" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 208 starting:altera_avalon_sysid_qsys "submodules/Qsys_sysid_qsys"</message>
|
|
<message level="Info" culprit="sysid_qsys"><![CDATA["<b>Qsys</b>" instantiated <b>altera_avalon_sysid_qsys</b> "<b>sysid_qsys</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_avalon_timer:16.1:alwaysRun=false,counterSize=32,fixedPeriod=false,loadValue=49999,mult=0.001,period=1,periodUnits=MSEC,periodUnitsString=ms,resetOutput=false,slave_address_width=3,snapshot=true,systemFrequency=50000000,ticksPerSec=1000.0,timeoutPulseOutput=false,timerPreset=FULL_FEATURED,valueInSecond=0.001,watchdogPulse=2"
|
|
instancePathKey="Qsys:.:timer"
|
|
kind="altera_avalon_timer"
|
|
version="16.1"
|
|
name="Qsys_timer">
|
|
<parameter name="loadValue" value="49999" />
|
|
<parameter name="timeoutPulseOutput" value="false" />
|
|
<parameter name="period" value="1" />
|
|
<parameter name="periodUnitsString" value="ms" />
|
|
<parameter name="mult" value="0.001" />
|
|
<parameter name="ticksPerSec" value="1000.0" />
|
|
<parameter name="systemFrequency" value="50000000" />
|
|
<parameter name="alwaysRun" value="false" />
|
|
<parameter name="valueInSecond" value="0.001" />
|
|
<parameter name="fixedPeriod" value="false" />
|
|
<parameter name="counterSize" value="32" />
|
|
<parameter name="periodUnits" value="MSEC" />
|
|
<parameter name="watchdogPulse" value="2" />
|
|
<parameter name="slave_address_width" value="3" />
|
|
<parameter name="resetOutput" value="false" />
|
|
<parameter name="snapshot" value="true" />
|
|
<parameter name="timerPreset" value="FULL_FEATURED" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_timer.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_timer/altera_avalon_timer_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys" as="timer" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 207 starting:altera_avalon_timer "submodules/Qsys_timer"</message>
|
|
<message level="Info" culprit="timer">Starting RTL generation for module 'Qsys_timer'</message>
|
|
<message level="Info" culprit="timer"> Generation command is [exec F:/intelFPGA_lite/16.1/quartus/bin64//perl/bin/perl.exe -I F:/intelFPGA_lite/16.1/quartus/bin64//perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_timer -- F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_timer/generate_rtl.pl --name=Qsys_timer --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0071_timer_gen/ --quartus_dir=F:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0071_timer_gen//Qsys_timer_component_configuration.pl --do_build_sim=0 ]</message>
|
|
<message level="Info" culprit="timer">Done RTL generation for module 'Qsys_timer'</message>
|
|
<message level="Info" culprit="timer"><![CDATA["<b>Qsys</b>" instantiated <b>altera_avalon_timer</b> "<b>timer</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_avalon_uart:16.1:baud=115200,baudError=0.01,clockRate=50000000,dataBits=8,fixedBaud=true,parity=NONE,parityFisrtChar=N,simCharStream=,simInteractiveInputEnable=false,simInteractiveOutputEnable=false,simTrueBaud=false,stopBits=1,syncRegDepth=2,useCtsRts=false,useEopRegister=false,useRelativePathForSimFile=false"
|
|
instancePathKey="Qsys:.:uart_0"
|
|
kind="altera_avalon_uart"
|
|
version="16.1"
|
|
name="Qsys_uart_0">
|
|
<parameter name="baud" value="115200" />
|
|
<parameter name="simInteractiveInputEnable" value="false" />
|
|
<parameter name="useRelativePathForSimFile" value="false" />
|
|
<parameter name="stopBits" value="1" />
|
|
<parameter name="parityFisrtChar" value="N" />
|
|
<parameter name="parity" value="NONE" />
|
|
<parameter name="useCtsRts" value="false" />
|
|
<parameter name="fixedBaud" value="true" />
|
|
<parameter name="dataBits" value="8" />
|
|
<parameter name="clockRate" value="50000000" />
|
|
<parameter name="simTrueBaud" value="false" />
|
|
<parameter name="useEopRegister" value="false" />
|
|
<parameter name="simInteractiveOutputEnable" value="false" />
|
|
<parameter name="syncRegDepth" value="2" />
|
|
<parameter name="simCharStream" value="" />
|
|
<parameter name="baudError" value="0.01" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_uart_0.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_uart/altera_avalon_uart_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys" as="uart_0" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 206 starting:altera_avalon_uart "submodules/Qsys_uart_0"</message>
|
|
<message level="Info" culprit="uart_0">Starting RTL generation for module 'Qsys_uart_0'</message>
|
|
<message level="Info" culprit="uart_0"> Generation command is [exec F:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I F:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_uart -- F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_uart/generate_rtl.pl --name=Qsys_uart_0 --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0072_uart_0_gen/ --quartus_dir=F:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0072_uart_0_gen//Qsys_uart_0_component_configuration.pl --do_build_sim=0 ]</message>
|
|
<message level="Info" culprit="uart_0">Done RTL generation for module 'Qsys_uart_0'</message>
|
|
<message level="Info" culprit="uart_0"><![CDATA["<b>Qsys</b>" instantiated <b>altera_avalon_uart</b> "<b>uart_0</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_mm_interconnect:16.1:AUTO_DEVICE=10M50DAF484C7G,AUTO_DEVICE_FAMILY=MAX 10,AUTO_DEVICE_SPEEDGRADE=,COMPOSE_CONTENTS=add_instance {nios2_gen2_data_master_translator} {altera_merlin_master_translator};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_ADDRESS_W} {19};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_DATA_W} {32};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {nios2_gen2_data_master_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {nios2_gen2_data_master_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_READLATENCY} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_READDATA} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_READ} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_WRITE} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_ADDRESS} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_DEBUGACCESS} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_CLKEN} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_READDATAVALID} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_LOCK} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_ADDRESS_SYMBOLS} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {64};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_BURSTBOUNDARIES} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {SYNC_RESET} {0};add_instance {nios2_gen2_instruction_master_translator} {altera_merlin_master_translator};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_ADDRESS_W} {19};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_DATA_W} {32};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_READLATENCY} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {USE_READDATA} {1};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {USE_WRITEDATA} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {USE_READ} {1};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {USE_WRITE} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {USE_ADDRESS} {1};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {USE_CLKEN} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {USE_READDATAVALID} {1};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {USE_LOCK} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_ADDRESS_SYMBOLS} {1};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_LINEWRAPBURSTS} {1};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {64};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {SYNC_RESET} {0};add_instance {jtag_uart_avalon_jtag_slave_translator} {altera_merlin_slave_translator};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_ADDRESS_W} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_DATA_W} {32};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {UAV_DATA_W} {32};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_BYTEENABLE_W} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_READLATENCY} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_READDATA} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_READ} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_WRITE} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_CHIPSELECT} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_ADDRESS} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_LOCK} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {i2c_opencores_mipi_avalon_slave_0_translator} {altera_merlin_slave_translator};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_ADDRESS_W} {3};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_DATA_W} {8};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {UAV_DATA_W} {32};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_BYTEENABLE_W} {1};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_READLATENCY} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_READDATA} {1};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_READ} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_WRITE} {1};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_CHIPSELECT} {1};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_ADDRESS} {1};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_LOCK} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {i2c_opencores_camera_avalon_slave_0_translator} {altera_merlin_slave_translator};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_ADDRESS_W} {3};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_DATA_W} {8};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {UAV_DATA_W} {32};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_BYTEENABLE_W} {1};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_READLATENCY} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_READDATA} {1};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_READ} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_WRITE} {1};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_CHIPSELECT} {1};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_ADDRESS} {1};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_LOCK} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {sysid_qsys_control_slave_translator} {altera_merlin_slave_translator};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_ADDRESS_W} {1};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_DATA_W} {32};set_instance_parameter_value {sysid_qsys_control_slave_translator} {UAV_DATA_W} {32};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {sysid_qsys_control_slave_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {sysid_qsys_control_slave_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {sysid_qsys_control_slave_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_READLATENCY} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_READDATA} {1};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_WRITEDATA} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_READ} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_WRITE} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_ADDRESS} {1};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_WAITREQUEST} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_LOCK} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {nios2_gen2_debug_mem_slave_translator} {altera_merlin_slave_translator};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_ADDRESS_W} {9};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_DATA_W} {32};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {UAV_DATA_W} {32};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_READLATENCY} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_READDATA} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_READ} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_WRITE} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_ADDRESS} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_LOCK} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_DEBUGACCESS} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_REGISTERINCOMINGSIGNALS} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {altera_merlin_slave_translator};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_ADDRESS_W} {3};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_DATA_W} {32};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {UAV_DATA_W} {32};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_READLATENCY} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_READDATA} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_READ} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_WRITE} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_CHIPSELECT} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_ADDRESS} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_WAITREQUEST} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_LOCK} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {altpll_0_pll_slave_translator} {altera_merlin_slave_translator};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_ADDRESS_W} {2};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_DATA_W} {32};set_instance_parameter_value {altpll_0_pll_slave_translator} {UAV_DATA_W} {32};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {altpll_0_pll_slave_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {altpll_0_pll_slave_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {altpll_0_pll_slave_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_READLATENCY} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_READ_WAIT} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_READDATA} {1};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_READ} {1};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_WRITE} {1};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_ADDRESS} {1};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_WAITREQUEST} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_LOCK} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {onchip_memory2_0_s1_translator} {altera_merlin_slave_translator};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_ADDRESS_W} {15};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_DATA_W} {32};set_instance_parameter_value {onchip_memory2_0_s1_translator} {UAV_DATA_W} {32};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {onchip_memory2_0_s1_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {onchip_memory2_0_s1_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {onchip_memory2_0_s1_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_READLATENCY} {1};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_READ_WAIT} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_READDATA} {1};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_READ} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_WRITE} {1};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_CHIPSELECT} {1};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_ADDRESS} {1};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_WAITREQUEST} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_LOCK} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_AV_CLKEN} {1};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {timer_s1_translator} {altera_merlin_slave_translator};set_instance_parameter_value {timer_s1_translator} {AV_ADDRESS_W} {3};set_instance_parameter_value {timer_s1_translator} {AV_DATA_W} {16};set_instance_parameter_value {timer_s1_translator} {UAV_DATA_W} {32};set_instance_parameter_value {timer_s1_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {timer_s1_translator} {AV_BYTEENABLE_W} {1};set_instance_parameter_value {timer_s1_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {timer_s1_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {timer_s1_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {timer_s1_translator} {AV_READLATENCY} {0};set_instance_parameter_value {timer_s1_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {timer_s1_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {timer_s1_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {timer_s1_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {timer_s1_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {timer_s1_translator} {USE_READDATA} {1};set_instance_parameter_value {timer_s1_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {timer_s1_translator} {USE_READ} {0};set_instance_parameter_value {timer_s1_translator} {USE_WRITE} {1};set_instance_parameter_value {timer_s1_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {timer_s1_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {timer_s1_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {timer_s1_translator} {USE_CHIPSELECT} {1};set_instance_parameter_value {timer_s1_translator} {USE_ADDRESS} {1};set_instance_parameter_value {timer_s1_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {timer_s1_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {timer_s1_translator} {USE_WAITREQUEST} {0};set_instance_parameter_value {timer_s1_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {timer_s1_translator} {USE_LOCK} {0};set_instance_parameter_value {timer_s1_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {timer_s1_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {timer_s1_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {timer_s1_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {timer_s1_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {timer_s1_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {timer_s1_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {timer_s1_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {timer_s1_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {timer_s1_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {timer_s1_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {timer_s1_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {timer_s1_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {timer_s1_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {timer_s1_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {timer_s1_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {timer_s1_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {timer_s1_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {timer_s1_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {timer_s1_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {timer_s1_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {timer_s1_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {timer_s1_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {timer_s1_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {timer_s1_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {led_s1_translator} {altera_merlin_slave_translator};set_instance_parameter_value {led_s1_translator} {AV_ADDRESS_W} {2};set_instance_parameter_value {led_s1_translator} {AV_DATA_W} {32};set_instance_parameter_value {led_s1_translator} {UAV_DATA_W} {32};set_instance_parameter_value {led_s1_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {led_s1_translator} {AV_BYTEENABLE_W} {1};set_instance_parameter_value {led_s1_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {led_s1_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {led_s1_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {led_s1_translator} {AV_READLATENCY} {0};set_instance_parameter_value {led_s1_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {led_s1_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {led_s1_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {led_s1_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {led_s1_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {led_s1_translator} {USE_READDATA} {1};set_instance_parameter_value {led_s1_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {led_s1_translator} {USE_READ} {0};set_instance_parameter_value {led_s1_translator} {USE_WRITE} {1};set_instance_parameter_value {led_s1_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {led_s1_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {led_s1_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {led_s1_translator} {USE_CHIPSELECT} {1};set_instance_parameter_value {led_s1_translator} {USE_ADDRESS} {1};set_instance_parameter_value {led_s1_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {led_s1_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {led_s1_translator} {USE_WAITREQUEST} {0};set_instance_parameter_value {led_s1_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {led_s1_translator} {USE_LOCK} {0};set_instance_parameter_value {led_s1_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {led_s1_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {led_s1_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {led_s1_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {led_s1_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {led_s1_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {led_s1_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {led_s1_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {led_s1_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {led_s1_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {led_s1_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {led_s1_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {led_s1_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {led_s1_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {led_s1_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {led_s1_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {led_s1_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {led_s1_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {led_s1_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {led_s1_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {led_s1_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {led_s1_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {led_s1_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {led_s1_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {led_s1_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {sw_s1_translator} {altera_merlin_slave_translator};set_instance_parameter_value {sw_s1_translator} {AV_ADDRESS_W} {2};set_instance_parameter_value {sw_s1_translator} {AV_DATA_W} {32};set_instance_parameter_value {sw_s1_translator} {UAV_DATA_W} {32};set_instance_parameter_value {sw_s1_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {sw_s1_translator} {AV_BYTEENABLE_W} {1};set_instance_parameter_value {sw_s1_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {sw_s1_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {sw_s1_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {sw_s1_translator} {AV_READLATENCY} {0};set_instance_parameter_value {sw_s1_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {sw_s1_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {sw_s1_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {sw_s1_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {sw_s1_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {sw_s1_translator} {USE_READDATA} {1};set_instance_parameter_value {sw_s1_translator} {USE_WRITEDATA} {0};set_instance_parameter_value {sw_s1_translator} {USE_READ} {0};set_instance_parameter_value {sw_s1_translator} {USE_WRITE} {0};set_instance_parameter_value {sw_s1_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {sw_s1_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {sw_s1_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {sw_s1_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {sw_s1_translator} {USE_ADDRESS} {1};set_instance_parameter_value {sw_s1_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {sw_s1_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {sw_s1_translator} {USE_WAITREQUEST} {0};set_instance_parameter_value {sw_s1_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {sw_s1_translator} {USE_LOCK} {0};set_instance_parameter_value {sw_s1_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {sw_s1_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {sw_s1_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {sw_s1_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {sw_s1_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {sw_s1_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {sw_s1_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {sw_s1_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {sw_s1_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {sw_s1_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {sw_s1_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {sw_s1_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {sw_s1_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {sw_s1_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {sw_s1_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {sw_s1_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {sw_s1_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {sw_s1_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {sw_s1_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {sw_s1_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {sw_s1_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {sw_s1_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {sw_s1_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {sw_s1_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {sw_s1_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {key_s1_translator} {altera_merlin_slave_translator};set_instance_parameter_value {key_s1_translator} {AV_ADDRESS_W} {2};set_instance_parameter_value {key_s1_translator} {AV_DATA_W} {32};set_instance_parameter_value {key_s1_translator} {UAV_DATA_W} {32};set_instance_parameter_value {key_s1_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {key_s1_translator} {AV_BYTEENABLE_W} {1};set_instance_parameter_value {key_s1_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {key_s1_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {key_s1_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {key_s1_translator} {AV_READLATENCY} {0};set_instance_parameter_value {key_s1_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {key_s1_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {key_s1_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {key_s1_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {key_s1_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {key_s1_translator} {USE_READDATA} {1};set_instance_parameter_value {key_s1_translator} {USE_WRITEDATA} {0};set_instance_parameter_value {key_s1_translator} {USE_READ} {0};set_instance_parameter_value {key_s1_translator} {USE_WRITE} {0};set_instance_parameter_value {key_s1_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {key_s1_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {key_s1_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {key_s1_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {key_s1_translator} {USE_ADDRESS} {1};set_instance_parameter_value {key_s1_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {key_s1_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {key_s1_translator} {USE_WAITREQUEST} {0};set_instance_parameter_value {key_s1_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {key_s1_translator} {USE_LOCK} {0};set_instance_parameter_value {key_s1_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {key_s1_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {key_s1_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {key_s1_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {key_s1_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {key_s1_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {key_s1_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {key_s1_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {key_s1_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {key_s1_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {key_s1_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {key_s1_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {key_s1_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {key_s1_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {key_s1_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {key_s1_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {key_s1_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {key_s1_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {key_s1_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {key_s1_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {key_s1_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {key_s1_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {key_s1_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {key_s1_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {key_s1_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {mipi_reset_n_s1_translator} {altera_merlin_slave_translator};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_ADDRESS_W} {2};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_DATA_W} {32};set_instance_parameter_value {mipi_reset_n_s1_translator} {UAV_DATA_W} {32};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_BYTEENABLE_W} {1};set_instance_parameter_value {mipi_reset_n_s1_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {mipi_reset_n_s1_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {mipi_reset_n_s1_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_READLATENCY} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_READDATA} {1};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_READ} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_WRITE} {1};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_CHIPSELECT} {1};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_ADDRESS} {1};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_WAITREQUEST} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_LOCK} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {mipi_pwdn_n_s1_translator} {altera_merlin_slave_translator};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_ADDRESS_W} {2};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_DATA_W} {32};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {UAV_DATA_W} {32};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_BYTEENABLE_W} {1};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_READLATENCY} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_READDATA} {1};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_READ} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_WRITE} {1};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_CHIPSELECT} {1};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_ADDRESS} {1};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_WAITREQUEST} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_LOCK} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {EEE_IMGPROC_0_s1_translator} {altera_merlin_slave_translator};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_ADDRESS_W} {3};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_DATA_W} {32};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {UAV_DATA_W} {32};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_READLATENCY} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_READDATA} {1};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_READ} {1};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_WRITE} {1};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_CHIPSELECT} {1};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_ADDRESS} {1};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_WAITREQUEST} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_LOCK} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {uart_0_s1_translator} {altera_merlin_slave_translator};set_instance_parameter_value {uart_0_s1_translator} {AV_ADDRESS_W} {3};set_instance_parameter_value {uart_0_s1_translator} {AV_DATA_W} {16};set_instance_parameter_value {uart_0_s1_translator} {UAV_DATA_W} {32};set_instance_parameter_value {uart_0_s1_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {uart_0_s1_translator} {AV_BYTEENABLE_W} {1};set_instance_parameter_value {uart_0_s1_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {uart_0_s1_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {uart_0_s1_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {uart_0_s1_translator} {AV_READLATENCY} {0};set_instance_parameter_value {uart_0_s1_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {uart_0_s1_translator} {AV_WRITE_WAIT} {1};set_instance_parameter_value {uart_0_s1_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {uart_0_s1_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {uart_0_s1_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {uart_0_s1_translator} {USE_READDATA} {1};set_instance_parameter_value {uart_0_s1_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {uart_0_s1_translator} {USE_READ} {1};set_instance_parameter_value {uart_0_s1_translator} {USE_WRITE} {1};set_instance_parameter_value {uart_0_s1_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {uart_0_s1_translator} {USE_BEGINTRANSFER} {1};set_instance_parameter_value {uart_0_s1_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {uart_0_s1_translator} {USE_CHIPSELECT} {1};set_instance_parameter_value {uart_0_s1_translator} {USE_ADDRESS} {1};set_instance_parameter_value {uart_0_s1_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {uart_0_s1_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {uart_0_s1_translator} {USE_WAITREQUEST} {0};set_instance_parameter_value {uart_0_s1_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {uart_0_s1_translator} {USE_LOCK} {0};set_instance_parameter_value {uart_0_s1_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {uart_0_s1_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {uart_0_s1_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {uart_0_s1_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {uart_0_s1_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {uart_0_s1_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {uart_0_s1_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {uart_0_s1_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {uart_0_s1_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {uart_0_s1_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {uart_0_s1_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {uart_0_s1_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {uart_0_s1_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {uart_0_s1_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {uart_0_s1_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {uart_0_s1_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {uart_0_s1_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {uart_0_s1_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {uart_0_s1_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {uart_0_s1_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {uart_0_s1_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {uart_0_s1_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {uart_0_s1_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {uart_0_s1_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {uart_0_s1_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {nios2_gen2_data_master_agent} {altera_merlin_master_agent};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_QOS_H} {75};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_QOS_L} {75};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_DATA_SIDEBAND_H} {73};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_DATA_SIDEBAND_L} {73};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_ADDR_SIDEBAND_H} {72};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_ADDR_SIDEBAND_L} {72};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_BURST_TYPE_H} {71};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_BURST_TYPE_L} {70};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_CACHE_H} {91};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_CACHE_L} {88};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_THREAD_ID_H} {84};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_THREAD_ID_L} {84};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_TRANS_EXCLUSIVE} {60};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_DATA_H} {31};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_DATA_L} {0};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {nios2_gen2_data_master_agent} {ST_DATA_W} {97};set_instance_parameter_value {nios2_gen2_data_master_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {nios2_gen2_data_master_agent} {AV_BURSTCOUNT_W} {3};set_instance_parameter_value {nios2_gen2_data_master_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {nios2_gen2_data_master_agent} {AV_BURSTBOUNDARIES} {1};set_instance_parameter_value {nios2_gen2_data_master_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {nios2_gen2_data_master_agent} {ADDR_MAP} {<?xml version="1.0" encoding="UTF-8"?>
|
|
<address_map>
|
|
<slave
|
|
id="5"
|
|
name="jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0"
|
|
start="0x00000000000410e8"
|
|
end="0x000000000000410f0"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="4"
|
|
name="i2c_opencores_mipi_avalon_slave_0_translator.avalon_universal_slave_0"
|
|
start="0x0000000000041060"
|
|
end="0x00000000000041080"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="3"
|
|
name="i2c_opencores_camera_avalon_slave_0_translator.avalon_universal_slave_0"
|
|
start="0x0000000000041040"
|
|
end="0x00000000000041060"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="13"
|
|
name="sysid_qsys_control_slave_translator.avalon_universal_slave_0"
|
|
start="0x00000000000410e0"
|
|
end="0x000000000000410e8"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="10"
|
|
name="nios2_gen2_debug_mem_slave_translator.avalon_universal_slave_0"
|
|
start="0x0000000000040800"
|
|
end="0x00000000000041000"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="1"
|
|
name="TERASIC_AUTO_FOCUS_0_mm_ctrl_translator.avalon_universal_slave_0"
|
|
start="0x0000000000041020"
|
|
end="0x00000000000041040"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="2"
|
|
name="altpll_0_pll_slave_translator.avalon_universal_slave_0"
|
|
start="0x00000000000410d0"
|
|
end="0x000000000000410e0"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="11"
|
|
name="onchip_memory2_0_s1_translator.avalon_universal_slave_0"
|
|
start="0x0000000000020000"
|
|
end="0x00000000000040000"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="14"
|
|
name="timer_s1_translator.avalon_universal_slave_0"
|
|
start="0x0000000000041000"
|
|
end="0x00000000000041020"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="7"
|
|
name="led_s1_translator.avalon_universal_slave_0"
|
|
start="0x00000000000410c0"
|
|
end="0x000000000000410d0"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="12"
|
|
name="sw_s1_translator.avalon_universal_slave_0"
|
|
start="0x00000000000410b0"
|
|
end="0x000000000000410c0"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="6"
|
|
name="key_s1_translator.avalon_universal_slave_0"
|
|
start="0x00000000000410a0"
|
|
end="0x000000000000410b0"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="9"
|
|
name="mipi_reset_n_s1_translator.avalon_universal_slave_0"
|
|
start="0x0000000000041090"
|
|
end="0x000000000000410a0"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="8"
|
|
name="mipi_pwdn_n_s1_translator.avalon_universal_slave_0"
|
|
start="0x0000000000041080"
|
|
end="0x00000000000041090"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="0"
|
|
name="EEE_IMGPROC_0_s1_translator.avalon_universal_slave_0"
|
|
start="0x0000000000042000"
|
|
end="0x00000000000042020"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="15"
|
|
name="uart_0_s1_translator.avalon_universal_slave_0"
|
|
start="0x0000000000042020"
|
|
end="0x00000000000042040"
|
|
responds="1"
|
|
user_default="0" />
|
|
</address_map>
|
|
};set_instance_parameter_value {nios2_gen2_data_master_agent} {SUPPRESS_0_BYTEEN_RSP} {0};set_instance_parameter_value {nios2_gen2_data_master_agent} {ID} {0};set_instance_parameter_value {nios2_gen2_data_master_agent} {BURSTWRAP_VALUE} {7};set_instance_parameter_value {nios2_gen2_data_master_agent} {CACHE_VALUE} {0};set_instance_parameter_value {nios2_gen2_data_master_agent} {SECURE_ACCESS_BIT} {1};set_instance_parameter_value {nios2_gen2_data_master_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {nios2_gen2_data_master_agent} {USE_WRITERESPONSE} {0};add_instance {nios2_gen2_instruction_master_agent} {altera_merlin_master_agent};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_QOS_H} {75};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_QOS_L} {75};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_DATA_SIDEBAND_H} {73};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_DATA_SIDEBAND_L} {73};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_ADDR_SIDEBAND_H} {72};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_ADDR_SIDEBAND_L} {72};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BURST_TYPE_H} {71};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BURST_TYPE_L} {70};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_CACHE_H} {91};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_CACHE_L} {88};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_THREAD_ID_H} {84};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_THREAD_ID_L} {84};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_TRANS_EXCLUSIVE} {60};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_DATA_H} {31};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_DATA_L} {0};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {ST_DATA_W} {97};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {AV_BURSTCOUNT_W} {3};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {AV_LINEWRAPBURSTS} {1};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {ADDR_MAP} {<?xml version="1.0" encoding="UTF-8"?>
|
|
<address_map>
|
|
<slave
|
|
id="11"
|
|
name="onchip_memory2_0_s1_translator.avalon_universal_slave_0"
|
|
start="0x0000000000020000"
|
|
end="0x00000000000040000"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="10"
|
|
name="nios2_gen2_debug_mem_slave_translator.avalon_universal_slave_0"
|
|
start="0x0000000000040800"
|
|
end="0x00000000000041000"
|
|
responds="1"
|
|
user_default="0" />
|
|
</address_map>
|
|
};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {SUPPRESS_0_BYTEEN_RSP} {0};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {ID} {1};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {BURSTWRAP_VALUE} {3};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {CACHE_VALUE} {0};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {SECURE_ACCESS_BIT} {1};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {USE_WRITERESPONSE} {0};add_instance {jtag_uart_avalon_jtag_slave_agent} {altera_merlin_slave_agent};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_DATA_H} {31};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_DATA_L} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {ST_DATA_W} {97};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {ID} {5};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {ECC_ENABLE} {0};add_instance {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {i2c_opencores_mipi_avalon_slave_0_agent} {altera_merlin_slave_agent};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_DATA_H} {31};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_DATA_L} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {ST_DATA_W} {97};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {ID} {4};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {ECC_ENABLE} {0};add_instance {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {i2c_opencores_camera_avalon_slave_0_agent} {altera_merlin_slave_agent};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_DATA_H} {31};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_DATA_L} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {ST_DATA_W} {97};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {ID} {3};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {ECC_ENABLE} {0};add_instance {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {sysid_qsys_control_slave_agent} {altera_merlin_slave_agent};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_DATA_H} {31};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_DATA_L} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {sysid_qsys_control_slave_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {sysid_qsys_control_slave_agent} {ST_DATA_W} {97};set_instance_parameter_value {sysid_qsys_control_slave_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {sysid_qsys_control_slave_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {sysid_qsys_control_slave_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {sysid_qsys_control_slave_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {sysid_qsys_control_slave_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {sysid_qsys_control_slave_agent} {ID} {13};set_instance_parameter_value {sysid_qsys_control_slave_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent} {ECC_ENABLE} {0};add_instance {sysid_qsys_control_slave_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {nios2_gen2_debug_mem_slave_agent} {altera_merlin_slave_agent};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_DATA_H} {31};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_DATA_L} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {ST_DATA_W} {97};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {ID} {10};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {ECC_ENABLE} {0};add_instance {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {altera_merlin_slave_agent};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_DATA_H} {31};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_DATA_L} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {ST_DATA_W} {97};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {ID} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {ECC_ENABLE} {0};add_instance {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {BITS_PER_SYMBOL} {34};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {USE_PACKETS} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {EMPTY_LATENCY} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {altpll_0_pll_slave_agent} {altera_merlin_slave_agent};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_DATA_H} {31};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_DATA_L} {0};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {altpll_0_pll_slave_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {altpll_0_pll_slave_agent} {ST_DATA_W} {97};set_instance_parameter_value {altpll_0_pll_slave_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {altpll_0_pll_slave_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {altpll_0_pll_slave_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {altpll_0_pll_slave_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {altpll_0_pll_slave_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {altpll_0_pll_slave_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {altpll_0_pll_slave_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {altpll_0_pll_slave_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {altpll_0_pll_slave_agent} {ID} {2};set_instance_parameter_value {altpll_0_pll_slave_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {altpll_0_pll_slave_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {altpll_0_pll_slave_agent} {ECC_ENABLE} {0};add_instance {altpll_0_pll_slave_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {onchip_memory2_0_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_DATA_H} {31};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {onchip_memory2_0_s1_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {onchip_memory2_0_s1_agent} {ST_DATA_W} {97};set_instance_parameter_value {onchip_memory2_0_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {onchip_memory2_0_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {onchip_memory2_0_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {onchip_memory2_0_s1_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {onchip_memory2_0_s1_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {onchip_memory2_0_s1_agent} {ID} {11};set_instance_parameter_value {onchip_memory2_0_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent} {ECC_ENABLE} {0};add_instance {onchip_memory2_0_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {timer_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {timer_s1_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {timer_s1_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {timer_s1_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {timer_s1_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {timer_s1_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {timer_s1_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {timer_s1_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {timer_s1_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {timer_s1_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {timer_s1_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {timer_s1_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {timer_s1_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {timer_s1_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {timer_s1_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {timer_s1_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {timer_s1_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {timer_s1_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {timer_s1_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {timer_s1_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {timer_s1_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {timer_s1_agent} {PKT_DATA_H} {31};set_instance_parameter_value {timer_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {timer_s1_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {timer_s1_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {timer_s1_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {timer_s1_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {timer_s1_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {timer_s1_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {timer_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {timer_s1_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {timer_s1_agent} {ST_DATA_W} {97};set_instance_parameter_value {timer_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {timer_s1_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {timer_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {timer_s1_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {timer_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {timer_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {timer_s1_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {timer_s1_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {timer_s1_agent} {ID} {14};set_instance_parameter_value {timer_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {timer_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {timer_s1_agent} {ECC_ENABLE} {0};add_instance {timer_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {led_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {led_s1_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {led_s1_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {led_s1_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {led_s1_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {led_s1_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {led_s1_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {led_s1_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {led_s1_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {led_s1_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {led_s1_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {led_s1_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {led_s1_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {led_s1_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {led_s1_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {led_s1_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {led_s1_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {led_s1_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {led_s1_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {led_s1_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {led_s1_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {led_s1_agent} {PKT_DATA_H} {31};set_instance_parameter_value {led_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {led_s1_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {led_s1_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {led_s1_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {led_s1_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {led_s1_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {led_s1_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {led_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {led_s1_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {led_s1_agent} {ST_DATA_W} {97};set_instance_parameter_value {led_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {led_s1_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {led_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {led_s1_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {led_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {led_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {led_s1_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {led_s1_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {led_s1_agent} {ID} {7};set_instance_parameter_value {led_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {led_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {led_s1_agent} {ECC_ENABLE} {0};add_instance {led_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {led_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {led_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {led_s1_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {led_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {led_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {led_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {led_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {led_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {led_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {led_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {led_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {led_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {led_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {led_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {sw_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {sw_s1_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {sw_s1_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {sw_s1_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {sw_s1_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {sw_s1_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {sw_s1_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {sw_s1_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {sw_s1_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {sw_s1_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {sw_s1_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {sw_s1_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {sw_s1_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {sw_s1_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {sw_s1_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {sw_s1_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {sw_s1_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {sw_s1_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {sw_s1_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {sw_s1_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {sw_s1_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {sw_s1_agent} {PKT_DATA_H} {31};set_instance_parameter_value {sw_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {sw_s1_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {sw_s1_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {sw_s1_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {sw_s1_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {sw_s1_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {sw_s1_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {sw_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {sw_s1_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {sw_s1_agent} {ST_DATA_W} {97};set_instance_parameter_value {sw_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {sw_s1_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {sw_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {sw_s1_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {sw_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {sw_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {sw_s1_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {sw_s1_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {sw_s1_agent} {ID} {12};set_instance_parameter_value {sw_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {sw_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {sw_s1_agent} {ECC_ENABLE} {0};add_instance {sw_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {key_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {key_s1_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {key_s1_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {key_s1_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {key_s1_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {key_s1_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {key_s1_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {key_s1_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {key_s1_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {key_s1_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {key_s1_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {key_s1_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {key_s1_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {key_s1_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {key_s1_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {key_s1_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {key_s1_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {key_s1_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {key_s1_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {key_s1_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {key_s1_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {key_s1_agent} {PKT_DATA_H} {31};set_instance_parameter_value {key_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {key_s1_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {key_s1_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {key_s1_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {key_s1_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {key_s1_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {key_s1_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {key_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {key_s1_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {key_s1_agent} {ST_DATA_W} {97};set_instance_parameter_value {key_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {key_s1_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {key_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {key_s1_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {key_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {key_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {key_s1_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {key_s1_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {key_s1_agent} {ID} {6};set_instance_parameter_value {key_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {key_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {key_s1_agent} {ECC_ENABLE} {0};add_instance {key_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {key_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {key_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {key_s1_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {key_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {key_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {key_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {key_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {key_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {key_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {key_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {key_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {key_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {key_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {key_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {mipi_reset_n_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_DATA_H} {31};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {mipi_reset_n_s1_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {mipi_reset_n_s1_agent} {ST_DATA_W} {97};set_instance_parameter_value {mipi_reset_n_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {mipi_reset_n_s1_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {mipi_reset_n_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {mipi_reset_n_s1_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {mipi_reset_n_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {mipi_reset_n_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {mipi_reset_n_s1_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {mipi_reset_n_s1_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {mipi_reset_n_s1_agent} {ID} {9};set_instance_parameter_value {mipi_reset_n_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {mipi_reset_n_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {mipi_reset_n_s1_agent} {ECC_ENABLE} {0};add_instance {mipi_reset_n_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {mipi_pwdn_n_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_DATA_H} {31};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {ST_DATA_W} {97};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {ID} {8};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {ECC_ENABLE} {0};add_instance {mipi_pwdn_n_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {EEE_IMGPROC_0_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_DATA_H} {31};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {ST_DATA_W} {97};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {ID} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {ECC_ENABLE} {0};add_instance {EEE_IMGPROC_0_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {EEE_IMGPROC_0_s1_agent_rdata_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {BITS_PER_SYMBOL} {34};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {USE_PACKETS} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {EMPTY_LATENCY} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {uart_0_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {uart_0_s1_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {uart_0_s1_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {uart_0_s1_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {uart_0_s1_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {uart_0_s1_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {uart_0_s1_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {uart_0_s1_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {uart_0_s1_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {uart_0_s1_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {uart_0_s1_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {uart_0_s1_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {uart_0_s1_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {uart_0_s1_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {uart_0_s1_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {uart_0_s1_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {uart_0_s1_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {uart_0_s1_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {uart_0_s1_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {uart_0_s1_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {uart_0_s1_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {uart_0_s1_agent} {PKT_DATA_H} {31};set_instance_parameter_value {uart_0_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {uart_0_s1_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {uart_0_s1_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {uart_0_s1_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {uart_0_s1_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {uart_0_s1_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {uart_0_s1_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {uart_0_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {uart_0_s1_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {uart_0_s1_agent} {ST_DATA_W} {97};set_instance_parameter_value {uart_0_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {uart_0_s1_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {uart_0_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {uart_0_s1_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {uart_0_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {uart_0_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {uart_0_s1_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {uart_0_s1_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {uart_0_s1_agent} {ID} {15};set_instance_parameter_value {uart_0_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {uart_0_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {uart_0_s1_agent} {ECC_ENABLE} {0};add_instance {uart_0_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {router} {altera_merlin_router};set_instance_parameter_value {router} {DESTINATION_ID} {11 10 14 1 3 4 8 9 6 12 7 2 13 5 0 15 };set_instance_parameter_value {router} {CHANNEL_ID} {0000000010000000 0000000000010000 0000000100000000 0000000000100000 0000000000000100 0000000000000010 0010000000000000 0001000000000000 0000100000000000 0000010000000000 0000001000000000 0000000001000000 0000000000001000 0000000000000001 0100000000000000 1000000000000000 };set_instance_parameter_value {router} {TYPE_OF_TRANSACTION} {both both both both both both both both read read both both read both both both };set_instance_parameter_value {router} {START_ADDRESS} {0x20000 0x40800 0x41000 0x41020 0x41040 0x41060 0x41080 0x41090 0x410a0 0x410b0 0x410c0 0x410d0 0x410e0 0x410e8 0x42000 0x42020 };set_instance_parameter_value {router} {END_ADDRESS} {0x40000 0x41000 0x41020 0x41040 0x41060 0x41080 0x41090 0x410a0 0x410b0 0x410c0 0x410d0 0x410e0 0x410e8 0x410f0 0x42020 0x42040 };set_instance_parameter_value {router} {NON_SECURED_TAG} {1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 };set_instance_parameter_value {router} {SECURED_RANGE_PAIRS} {0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 };set_instance_parameter_value {router} {SECURED_RANGE_LIST} {0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 };set_instance_parameter_value {router} {SPAN_OFFSET} {};set_instance_parameter_value {router} {PKT_ADDR_H} {54};set_instance_parameter_value {router} {PKT_ADDR_L} {36};set_instance_parameter_value {router} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router} {PKT_TRANS_READ} {58};set_instance_parameter_value {router} {ST_DATA_W} {97};set_instance_parameter_value {router} {ST_CHANNEL_W} {16};set_instance_parameter_value {router} {DECODER_TYPE} {0};set_instance_parameter_value {router} {DEFAULT_CHANNEL} {7};set_instance_parameter_value {router} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router} {DEFAULT_DESTID} {11};set_instance_parameter_value {router} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router} {MEMORY_ALIASING_DECODE} {0};add_instance {router_001} {altera_merlin_router};set_instance_parameter_value {router_001} {DESTINATION_ID} {11 10 };set_instance_parameter_value {router_001} {CHANNEL_ID} {10 01 };set_instance_parameter_value {router_001} {TYPE_OF_TRANSACTION} {both both };set_instance_parameter_value {router_001} {START_ADDRESS} {0x20000 0x40800 };set_instance_parameter_value {router_001} {END_ADDRESS} {0x40000 0x41000 };set_instance_parameter_value {router_001} {NON_SECURED_TAG} {1 1 };set_instance_parameter_value {router_001} {SECURED_RANGE_PAIRS} {0 0 };set_instance_parameter_value {router_001} {SECURED_RANGE_LIST} {0 0 };set_instance_parameter_value {router_001} {SPAN_OFFSET} {};set_instance_parameter_value {router_001} {PKT_ADDR_H} {54};set_instance_parameter_value {router_001} {PKT_ADDR_L} {36};set_instance_parameter_value {router_001} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_001} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_001} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_001} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_001} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_001} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_001} {ST_DATA_W} {97};set_instance_parameter_value {router_001} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_001} {DECODER_TYPE} {0};set_instance_parameter_value {router_001} {DEFAULT_CHANNEL} {1};set_instance_parameter_value {router_001} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_001} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_001} {DEFAULT_DESTID} {11};set_instance_parameter_value {router_001} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_001} {MEMORY_ALIASING_DECODE} {0};add_instance {router_002} {altera_merlin_router};set_instance_parameter_value {router_002} {DESTINATION_ID} {0 };set_instance_parameter_value {router_002} {CHANNEL_ID} {1 };set_instance_parameter_value {router_002} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_002} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_002} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_002} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_002} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_002} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_002} {SPAN_OFFSET} {};set_instance_parameter_value {router_002} {PKT_ADDR_H} {54};set_instance_parameter_value {router_002} {PKT_ADDR_L} {36};set_instance_parameter_value {router_002} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_002} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_002} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_002} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_002} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_002} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_002} {ST_DATA_W} {97};set_instance_parameter_value {router_002} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_002} {DECODER_TYPE} {1};set_instance_parameter_value {router_002} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_002} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_002} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_002} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_002} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_002} {MEMORY_ALIASING_DECODE} {0};add_instance {router_003} {altera_merlin_router};set_instance_parameter_value {router_003} {DESTINATION_ID} {0 };set_instance_parameter_value {router_003} {CHANNEL_ID} {1 };set_instance_parameter_value {router_003} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_003} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_003} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_003} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_003} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_003} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_003} {SPAN_OFFSET} {};set_instance_parameter_value {router_003} {PKT_ADDR_H} {54};set_instance_parameter_value {router_003} {PKT_ADDR_L} {36};set_instance_parameter_value {router_003} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_003} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_003} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_003} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_003} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_003} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_003} {ST_DATA_W} {97};set_instance_parameter_value {router_003} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_003} {DECODER_TYPE} {1};set_instance_parameter_value {router_003} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_003} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_003} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_003} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_003} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_003} {MEMORY_ALIASING_DECODE} {0};add_instance {router_004} {altera_merlin_router};set_instance_parameter_value {router_004} {DESTINATION_ID} {0 };set_instance_parameter_value {router_004} {CHANNEL_ID} {1 };set_instance_parameter_value {router_004} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_004} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_004} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_004} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_004} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_004} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_004} {SPAN_OFFSET} {};set_instance_parameter_value {router_004} {PKT_ADDR_H} {54};set_instance_parameter_value {router_004} {PKT_ADDR_L} {36};set_instance_parameter_value {router_004} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_004} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_004} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_004} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_004} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_004} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_004} {ST_DATA_W} {97};set_instance_parameter_value {router_004} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_004} {DECODER_TYPE} {1};set_instance_parameter_value {router_004} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_004} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_004} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_004} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_004} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_004} {MEMORY_ALIASING_DECODE} {0};add_instance {router_005} {altera_merlin_router};set_instance_parameter_value {router_005} {DESTINATION_ID} {0 };set_instance_parameter_value {router_005} {CHANNEL_ID} {1 };set_instance_parameter_value {router_005} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_005} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_005} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_005} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_005} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_005} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_005} {SPAN_OFFSET} {};set_instance_parameter_value {router_005} {PKT_ADDR_H} {54};set_instance_parameter_value {router_005} {PKT_ADDR_L} {36};set_instance_parameter_value {router_005} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_005} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_005} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_005} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_005} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_005} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_005} {ST_DATA_W} {97};set_instance_parameter_value {router_005} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_005} {DECODER_TYPE} {1};set_instance_parameter_value {router_005} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_005} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_005} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_005} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_005} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_005} {MEMORY_ALIASING_DECODE} {0};add_instance {router_006} {altera_merlin_router};set_instance_parameter_value {router_006} {DESTINATION_ID} {0 1 };set_instance_parameter_value {router_006} {CHANNEL_ID} {01 10 };set_instance_parameter_value {router_006} {TYPE_OF_TRANSACTION} {both read };set_instance_parameter_value {router_006} {START_ADDRESS} {0x0 0x0 };set_instance_parameter_value {router_006} {END_ADDRESS} {0x0 0x0 };set_instance_parameter_value {router_006} {NON_SECURED_TAG} {1 1 };set_instance_parameter_value {router_006} {SECURED_RANGE_PAIRS} {0 0 };set_instance_parameter_value {router_006} {SECURED_RANGE_LIST} {0 0 };set_instance_parameter_value {router_006} {SPAN_OFFSET} {};set_instance_parameter_value {router_006} {PKT_ADDR_H} {54};set_instance_parameter_value {router_006} {PKT_ADDR_L} {36};set_instance_parameter_value {router_006} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_006} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_006} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_006} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_006} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_006} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_006} {ST_DATA_W} {97};set_instance_parameter_value {router_006} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_006} {DECODER_TYPE} {1};set_instance_parameter_value {router_006} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_006} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_006} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_006} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_006} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_006} {MEMORY_ALIASING_DECODE} {0};add_instance {router_007} {altera_merlin_router};set_instance_parameter_value {router_007} {DESTINATION_ID} {0 };set_instance_parameter_value {router_007} {CHANNEL_ID} {1 };set_instance_parameter_value {router_007} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_007} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_007} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_007} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_007} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_007} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_007} {SPAN_OFFSET} {};set_instance_parameter_value {router_007} {PKT_ADDR_H} {54};set_instance_parameter_value {router_007} {PKT_ADDR_L} {36};set_instance_parameter_value {router_007} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_007} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_007} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_007} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_007} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_007} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_007} {ST_DATA_W} {97};set_instance_parameter_value {router_007} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_007} {DECODER_TYPE} {1};set_instance_parameter_value {router_007} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_007} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_007} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_007} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_007} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_007} {MEMORY_ALIASING_DECODE} {0};add_instance {router_008} {altera_merlin_router};set_instance_parameter_value {router_008} {DESTINATION_ID} {0 };set_instance_parameter_value {router_008} {CHANNEL_ID} {1 };set_instance_parameter_value {router_008} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_008} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_008} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_008} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_008} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_008} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_008} {SPAN_OFFSET} {};set_instance_parameter_value {router_008} {PKT_ADDR_H} {54};set_instance_parameter_value {router_008} {PKT_ADDR_L} {36};set_instance_parameter_value {router_008} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_008} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_008} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_008} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_008} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_008} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_008} {ST_DATA_W} {97};set_instance_parameter_value {router_008} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_008} {DECODER_TYPE} {1};set_instance_parameter_value {router_008} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_008} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_008} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_008} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_008} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_008} {MEMORY_ALIASING_DECODE} {0};add_instance {router_009} {altera_merlin_router};set_instance_parameter_value {router_009} {DESTINATION_ID} {0 1 };set_instance_parameter_value {router_009} {CHANNEL_ID} {01 10 };set_instance_parameter_value {router_009} {TYPE_OF_TRANSACTION} {both read };set_instance_parameter_value {router_009} {START_ADDRESS} {0x0 0x0 };set_instance_parameter_value {router_009} {END_ADDRESS} {0x0 0x0 };set_instance_parameter_value {router_009} {NON_SECURED_TAG} {1 1 };set_instance_parameter_value {router_009} {SECURED_RANGE_PAIRS} {0 0 };set_instance_parameter_value {router_009} {SECURED_RANGE_LIST} {0 0 };set_instance_parameter_value {router_009} {SPAN_OFFSET} {};set_instance_parameter_value {router_009} {PKT_ADDR_H} {54};set_instance_parameter_value {router_009} {PKT_ADDR_L} {36};set_instance_parameter_value {router_009} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_009} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_009} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_009} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_009} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_009} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_009} {ST_DATA_W} {97};set_instance_parameter_value {router_009} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_009} {DECODER_TYPE} {1};set_instance_parameter_value {router_009} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_009} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_009} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_009} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_009} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_009} {MEMORY_ALIASING_DECODE} {0};add_instance {router_010} {altera_merlin_router};set_instance_parameter_value {router_010} {DESTINATION_ID} {0 };set_instance_parameter_value {router_010} {CHANNEL_ID} {1 };set_instance_parameter_value {router_010} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_010} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_010} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_010} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_010} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_010} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_010} {SPAN_OFFSET} {};set_instance_parameter_value {router_010} {PKT_ADDR_H} {54};set_instance_parameter_value {router_010} {PKT_ADDR_L} {36};set_instance_parameter_value {router_010} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_010} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_010} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_010} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_010} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_010} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_010} {ST_DATA_W} {97};set_instance_parameter_value {router_010} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_010} {DECODER_TYPE} {1};set_instance_parameter_value {router_010} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_010} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_010} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_010} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_010} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_010} {MEMORY_ALIASING_DECODE} {0};add_instance {router_011} {altera_merlin_router};set_instance_parameter_value {router_011} {DESTINATION_ID} {0 };set_instance_parameter_value {router_011} {CHANNEL_ID} {1 };set_instance_parameter_value {router_011} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_011} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_011} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_011} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_011} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_011} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_011} {SPAN_OFFSET} {};set_instance_parameter_value {router_011} {PKT_ADDR_H} {54};set_instance_parameter_value {router_011} {PKT_ADDR_L} {36};set_instance_parameter_value {router_011} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_011} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_011} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_011} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_011} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_011} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_011} {ST_DATA_W} {97};set_instance_parameter_value {router_011} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_011} {DECODER_TYPE} {1};set_instance_parameter_value {router_011} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_011} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_011} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_011} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_011} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_011} {MEMORY_ALIASING_DECODE} {0};add_instance {router_012} {altera_merlin_router};set_instance_parameter_value {router_012} {DESTINATION_ID} {0 };set_instance_parameter_value {router_012} {CHANNEL_ID} {1 };set_instance_parameter_value {router_012} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_012} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_012} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_012} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_012} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_012} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_012} {SPAN_OFFSET} {};set_instance_parameter_value {router_012} {PKT_ADDR_H} {54};set_instance_parameter_value {router_012} {PKT_ADDR_L} {36};set_instance_parameter_value {router_012} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_012} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_012} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_012} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_012} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_012} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_012} {ST_DATA_W} {97};set_instance_parameter_value {router_012} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_012} {DECODER_TYPE} {1};set_instance_parameter_value {router_012} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_012} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_012} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_012} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_012} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_012} {MEMORY_ALIASING_DECODE} {0};add_instance {router_013} {altera_merlin_router};set_instance_parameter_value {router_013} {DESTINATION_ID} {0 };set_instance_parameter_value {router_013} {CHANNEL_ID} {1 };set_instance_parameter_value {router_013} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_013} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_013} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_013} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_013} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_013} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_013} {SPAN_OFFSET} {};set_instance_parameter_value {router_013} {PKT_ADDR_H} {54};set_instance_parameter_value {router_013} {PKT_ADDR_L} {36};set_instance_parameter_value {router_013} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_013} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_013} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_013} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_013} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_013} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_013} {ST_DATA_W} {97};set_instance_parameter_value {router_013} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_013} {DECODER_TYPE} {1};set_instance_parameter_value {router_013} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_013} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_013} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_013} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_013} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_013} {MEMORY_ALIASING_DECODE} {0};add_instance {router_014} {altera_merlin_router};set_instance_parameter_value {router_014} {DESTINATION_ID} {0 };set_instance_parameter_value {router_014} {CHANNEL_ID} {1 };set_instance_parameter_value {router_014} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_014} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_014} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_014} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_014} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_014} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_014} {SPAN_OFFSET} {};set_instance_parameter_value {router_014} {PKT_ADDR_H} {54};set_instance_parameter_value {router_014} {PKT_ADDR_L} {36};set_instance_parameter_value {router_014} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_014} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_014} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_014} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_014} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_014} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_014} {ST_DATA_W} {97};set_instance_parameter_value {router_014} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_014} {DECODER_TYPE} {1};set_instance_parameter_value {router_014} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_014} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_014} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_014} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_014} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_014} {MEMORY_ALIASING_DECODE} {0};add_instance {router_015} {altera_merlin_router};set_instance_parameter_value {router_015} {DESTINATION_ID} {0 };set_instance_parameter_value {router_015} {CHANNEL_ID} {1 };set_instance_parameter_value {router_015} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_015} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_015} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_015} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_015} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_015} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_015} {SPAN_OFFSET} {};set_instance_parameter_value {router_015} {PKT_ADDR_H} {54};set_instance_parameter_value {router_015} {PKT_ADDR_L} {36};set_instance_parameter_value {router_015} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_015} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_015} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_015} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_015} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_015} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_015} {ST_DATA_W} {97};set_instance_parameter_value {router_015} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_015} {DECODER_TYPE} {1};set_instance_parameter_value {router_015} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_015} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_015} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_015} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_015} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_015} {MEMORY_ALIASING_DECODE} {0};add_instance {router_016} {altera_merlin_router};set_instance_parameter_value {router_016} {DESTINATION_ID} {0 };set_instance_parameter_value {router_016} {CHANNEL_ID} {1 };set_instance_parameter_value {router_016} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_016} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_016} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_016} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_016} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_016} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_016} {SPAN_OFFSET} {};set_instance_parameter_value {router_016} {PKT_ADDR_H} {54};set_instance_parameter_value {router_016} {PKT_ADDR_L} {36};set_instance_parameter_value {router_016} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_016} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_016} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_016} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_016} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_016} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_016} {ST_DATA_W} {97};set_instance_parameter_value {router_016} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_016} {DECODER_TYPE} {1};set_instance_parameter_value {router_016} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_016} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_016} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_016} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_016} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_016} {MEMORY_ALIASING_DECODE} {0};add_instance {router_017} {altera_merlin_router};set_instance_parameter_value {router_017} {DESTINATION_ID} {0 };set_instance_parameter_value {router_017} {CHANNEL_ID} {1 };set_instance_parameter_value {router_017} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_017} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_017} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_017} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_017} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_017} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_017} {SPAN_OFFSET} {};set_instance_parameter_value {router_017} {PKT_ADDR_H} {54};set_instance_parameter_value {router_017} {PKT_ADDR_L} {36};set_instance_parameter_value {router_017} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_017} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_017} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_017} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_017} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_017} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_017} {ST_DATA_W} {97};set_instance_parameter_value {router_017} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_017} {DECODER_TYPE} {1};set_instance_parameter_value {router_017} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_017} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_017} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_017} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_017} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_017} {MEMORY_ALIASING_DECODE} {0};add_instance {nios2_gen2_data_master_limiter} {altera_merlin_traffic_limiter};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PKT_DEST_ID_H} {83};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PKT_DEST_ID_L} {80};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PKT_SRC_ID_H} {79};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PKT_SRC_ID_L} {76};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PKT_BYTEEN_H} {35};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PKT_BYTEEN_L} {32};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PKT_THREAD_ID_H} {84};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PKT_THREAD_ID_L} {84};set_instance_parameter_value {nios2_gen2_data_master_limiter} {MAX_BURST_LENGTH} {1};set_instance_parameter_value {nios2_gen2_data_master_limiter} {MAX_OUTSTANDING_RESPONSES} {5};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PIPELINED} {0};set_instance_parameter_value {nios2_gen2_data_master_limiter} {ST_DATA_W} {97};set_instance_parameter_value {nios2_gen2_data_master_limiter} {ST_CHANNEL_W} {16};set_instance_parameter_value {nios2_gen2_data_master_limiter} {VALID_WIDTH} {16};set_instance_parameter_value {nios2_gen2_data_master_limiter} {ENFORCE_ORDER} {1};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PREVENT_HAZARDS} {0};set_instance_parameter_value {nios2_gen2_data_master_limiter} {SUPPORTS_POSTED_WRITES} {1};set_instance_parameter_value {nios2_gen2_data_master_limiter} {SUPPORTS_NONPOSTED_WRITES} {0};set_instance_parameter_value {nios2_gen2_data_master_limiter} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {nios2_gen2_data_master_limiter} {REORDER} {0};add_instance {nios2_gen2_instruction_master_limiter} {altera_merlin_traffic_limiter};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PKT_DEST_ID_H} {83};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PKT_DEST_ID_L} {80};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PKT_SRC_ID_H} {79};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PKT_SRC_ID_L} {76};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PKT_BYTEEN_H} {35};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PKT_BYTEEN_L} {32};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PKT_THREAD_ID_H} {84};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PKT_THREAD_ID_L} {84};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {MAX_BURST_LENGTH} {1};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {MAX_OUTSTANDING_RESPONSES} {1};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PIPELINED} {0};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {ST_DATA_W} {97};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {ST_CHANNEL_W} {16};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {VALID_WIDTH} {16};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {ENFORCE_ORDER} {1};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PREVENT_HAZARDS} {0};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {SUPPORTS_POSTED_WRITES} {1};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {SUPPORTS_NONPOSTED_WRITES} {0};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {REORDER} {0};add_instance {cmd_demux} {altera_merlin_demultiplexer};set_instance_parameter_value {cmd_demux} {ST_DATA_W} {97};set_instance_parameter_value {cmd_demux} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_demux} {NUM_OUTPUTS} {16};set_instance_parameter_value {cmd_demux} {VALID_WIDTH} {16};set_instance_parameter_value {cmd_demux} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_demux_001} {altera_merlin_demultiplexer};set_instance_parameter_value {cmd_demux_001} {ST_DATA_W} {97};set_instance_parameter_value {cmd_demux_001} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_demux_001} {NUM_OUTPUTS} {2};set_instance_parameter_value {cmd_demux_001} {VALID_WIDTH} {16};set_instance_parameter_value {cmd_demux_001} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_001} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_001} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_001} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_001} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_001} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_001} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_001} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_001} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_001} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_001} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_002} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_002} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_002} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_002} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_002} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_002} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_002} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_002} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_002} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_002} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_003} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_003} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_003} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_003} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_003} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_003} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_003} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_003} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_003} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_003} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_004} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_004} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_004} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_004} {NUM_INPUTS} {2};set_instance_parameter_value {cmd_mux_004} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_004} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_004} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_004} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_004} {ARBITRATION_SHARES} {1 1 };set_instance_parameter_value {cmd_mux_004} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_005} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_005} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_005} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_005} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_005} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_005} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_005} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_005} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_005} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_005} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_006} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_006} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_006} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_006} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_006} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_006} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_006} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_006} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_006} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_006} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_007} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_007} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_007} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_007} {NUM_INPUTS} {2};set_instance_parameter_value {cmd_mux_007} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_007} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_007} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_007} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_007} {ARBITRATION_SHARES} {1 1 };set_instance_parameter_value {cmd_mux_007} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_008} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_008} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_008} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_008} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_008} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_008} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_008} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_008} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_008} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_008} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_009} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_009} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_009} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_009} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_009} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_009} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_009} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_009} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_009} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_009} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_010} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_010} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_010} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_010} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_010} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_010} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_010} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_010} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_010} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_010} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_011} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_011} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_011} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_011} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_011} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_011} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_011} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_011} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_011} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_011} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_012} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_012} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_012} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_012} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_012} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_012} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_012} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_012} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_012} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_012} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_013} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_013} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_013} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_013} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_013} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_013} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_013} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_013} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_013} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_013} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_014} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_014} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_014} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_014} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_014} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_014} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_014} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_014} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_014} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_014} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_015} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_015} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_015} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_015} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_015} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_015} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_015} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_015} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_015} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_015} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_001} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_001} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_001} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_001} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_001} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_001} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_002} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_002} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_002} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_002} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_002} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_002} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_003} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_003} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_003} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_003} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_003} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_003} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_004} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_004} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_004} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_004} {NUM_OUTPUTS} {2};set_instance_parameter_value {rsp_demux_004} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_004} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_005} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_005} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_005} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_005} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_005} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_005} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_006} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_006} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_006} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_006} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_006} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_006} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_007} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_007} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_007} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_007} {NUM_OUTPUTS} {2};set_instance_parameter_value {rsp_demux_007} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_007} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_008} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_008} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_008} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_008} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_008} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_008} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_009} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_009} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_009} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_009} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_009} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_009} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_010} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_010} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_010} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_010} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_010} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_010} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_011} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_011} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_011} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_011} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_011} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_011} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_012} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_012} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_012} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_012} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_012} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_012} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_013} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_013} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_013} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_013} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_013} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_013} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_014} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_014} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_014} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_014} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_014} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_014} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_015} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_015} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_015} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_015} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_015} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_015} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_mux} {altera_merlin_multiplexer};set_instance_parameter_value {rsp_mux} {ST_DATA_W} {97};set_instance_parameter_value {rsp_mux} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_mux} {NUM_INPUTS} {16};set_instance_parameter_value {rsp_mux} {PIPELINE_ARB} {0};set_instance_parameter_value {rsp_mux} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {rsp_mux} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {rsp_mux} {ARBITRATION_SCHEME} {no-arb};set_instance_parameter_value {rsp_mux} {ARBITRATION_SHARES} {1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 };set_instance_parameter_value {rsp_mux} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_mux_001} {altera_merlin_multiplexer};set_instance_parameter_value {rsp_mux_001} {ST_DATA_W} {97};set_instance_parameter_value {rsp_mux_001} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_mux_001} {NUM_INPUTS} {2};set_instance_parameter_value {rsp_mux_001} {PIPELINE_ARB} {0};set_instance_parameter_value {rsp_mux_001} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {rsp_mux_001} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {rsp_mux_001} {ARBITRATION_SCHEME} {no-arb};set_instance_parameter_value {rsp_mux_001} {ARBITRATION_SHARES} {1 1 };set_instance_parameter_value {rsp_mux_001} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {crosser} {altera_avalon_st_handshake_clock_crosser};set_instance_parameter_value {crosser} {DATA_WIDTH} {97};set_instance_parameter_value {crosser} {BITS_PER_SYMBOL} {97};set_instance_parameter_value {crosser} {USE_PACKETS} {1};set_instance_parameter_value {crosser} {USE_CHANNEL} {1};set_instance_parameter_value {crosser} {CHANNEL_WIDTH} {16};set_instance_parameter_value {crosser} {MAX_CHANNEL} {0};set_instance_parameter_value {crosser} {USE_ERROR} {0};set_instance_parameter_value {crosser} {ERROR_WIDTH} {1};set_instance_parameter_value {crosser} {VALID_SYNC_DEPTH} {2};set_instance_parameter_value {crosser} {READY_SYNC_DEPTH} {2};set_instance_parameter_value {crosser} {USE_OUTPUT_PIPELINE} {0};add_instance {crosser_001} {altera_avalon_st_handshake_clock_crosser};set_instance_parameter_value {crosser_001} {DATA_WIDTH} {97};set_instance_parameter_value {crosser_001} {BITS_PER_SYMBOL} {97};set_instance_parameter_value {crosser_001} {USE_PACKETS} {1};set_instance_parameter_value {crosser_001} {USE_CHANNEL} {1};set_instance_parameter_value {crosser_001} {CHANNEL_WIDTH} {16};set_instance_parameter_value {crosser_001} {MAX_CHANNEL} {0};set_instance_parameter_value {crosser_001} {USE_ERROR} {0};set_instance_parameter_value {crosser_001} {ERROR_WIDTH} {1};set_instance_parameter_value {crosser_001} {VALID_SYNC_DEPTH} {2};set_instance_parameter_value {crosser_001} {READY_SYNC_DEPTH} {2};set_instance_parameter_value {crosser_001} {USE_OUTPUT_PIPELINE} {0};add_instance {crosser_002} {altera_avalon_st_handshake_clock_crosser};set_instance_parameter_value {crosser_002} {DATA_WIDTH} {97};set_instance_parameter_value {crosser_002} {BITS_PER_SYMBOL} {97};set_instance_parameter_value {crosser_002} {USE_PACKETS} {1};set_instance_parameter_value {crosser_002} {USE_CHANNEL} {1};set_instance_parameter_value {crosser_002} {CHANNEL_WIDTH} {16};set_instance_parameter_value {crosser_002} {MAX_CHANNEL} {0};set_instance_parameter_value {crosser_002} {USE_ERROR} {0};set_instance_parameter_value {crosser_002} {ERROR_WIDTH} {1};set_instance_parameter_value {crosser_002} {VALID_SYNC_DEPTH} {2};set_instance_parameter_value {crosser_002} {READY_SYNC_DEPTH} {2};set_instance_parameter_value {crosser_002} {USE_OUTPUT_PIPELINE} {0};add_instance {crosser_003} {altera_avalon_st_handshake_clock_crosser};set_instance_parameter_value {crosser_003} {DATA_WIDTH} {97};set_instance_parameter_value {crosser_003} {BITS_PER_SYMBOL} {97};set_instance_parameter_value {crosser_003} {USE_PACKETS} {1};set_instance_parameter_value {crosser_003} {USE_CHANNEL} {1};set_instance_parameter_value {crosser_003} {CHANNEL_WIDTH} {16};set_instance_parameter_value {crosser_003} {MAX_CHANNEL} {0};set_instance_parameter_value {crosser_003} {USE_ERROR} {0};set_instance_parameter_value {crosser_003} {ERROR_WIDTH} {1};set_instance_parameter_value {crosser_003} {VALID_SYNC_DEPTH} {2};set_instance_parameter_value {crosser_003} {READY_SYNC_DEPTH} {2};set_instance_parameter_value {crosser_003} {USE_OUTPUT_PIPELINE} {0};add_instance {nios2_gen2_reset_reset_bridge} {altera_reset_bridge};set_instance_parameter_value {nios2_gen2_reset_reset_bridge} {ACTIVE_LOW_RESET} {0};set_instance_parameter_value {nios2_gen2_reset_reset_bridge} {SYNCHRONOUS_EDGES} {deassert};set_instance_parameter_value {nios2_gen2_reset_reset_bridge} {NUM_RESET_OUTPUTS} {1};set_instance_parameter_value {nios2_gen2_reset_reset_bridge} {USE_RESET_REQUEST} {0};add_instance {TERASIC_AUTO_FOCUS_0_reset_reset_bridge} {altera_reset_bridge};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_reset_reset_bridge} {ACTIVE_LOW_RESET} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_reset_reset_bridge} {SYNCHRONOUS_EDGES} {deassert};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_reset_reset_bridge} {NUM_RESET_OUTPUTS} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_reset_reset_bridge} {USE_RESET_REQUEST} {0};add_instance {altpll_0_inclk_interface_reset_reset_bridge} {altera_reset_bridge};set_instance_parameter_value {altpll_0_inclk_interface_reset_reset_bridge} {ACTIVE_LOW_RESET} {0};set_instance_parameter_value {altpll_0_inclk_interface_reset_reset_bridge} {SYNCHRONOUS_EDGES} {deassert};set_instance_parameter_value {altpll_0_inclk_interface_reset_reset_bridge} {NUM_RESET_OUTPUTS} {1};set_instance_parameter_value {altpll_0_inclk_interface_reset_reset_bridge} {USE_RESET_REQUEST} {0};add_instance {clk_50_clk_clock_bridge} {altera_clock_bridge};set_instance_parameter_value {clk_50_clk_clock_bridge} {EXPLICIT_CLOCK_RATE} {50000000};set_instance_parameter_value {clk_50_clk_clock_bridge} {NUM_CLOCK_OUTPUTS} {1};add_instance {altpll_0_c2_clock_bridge} {altera_clock_bridge};set_instance_parameter_value {altpll_0_c2_clock_bridge} {EXPLICIT_CLOCK_RATE} {100000000};set_instance_parameter_value {altpll_0_c2_clock_bridge} {NUM_CLOCK_OUTPUTS} {1};add_connection {nios2_gen2_data_master_translator.avalon_universal_master_0} {nios2_gen2_data_master_agent.av} {avalon};set_connection_parameter_value {nios2_gen2_data_master_translator.avalon_universal_master_0/nios2_gen2_data_master_agent.av} {arbitrationPriority} {1};set_connection_parameter_value {nios2_gen2_data_master_translator.avalon_universal_master_0/nios2_gen2_data_master_agent.av} {baseAddress} {0x0000};set_connection_parameter_value {nios2_gen2_data_master_translator.avalon_universal_master_0/nios2_gen2_data_master_agent.av} {defaultConnection} {false};add_connection {nios2_gen2_instruction_master_translator.avalon_universal_master_0} {nios2_gen2_instruction_master_agent.av} {avalon};set_connection_parameter_value {nios2_gen2_instruction_master_translator.avalon_universal_master_0/nios2_gen2_instruction_master_agent.av} {arbitrationPriority} {1};set_connection_parameter_value {nios2_gen2_instruction_master_translator.avalon_universal_master_0/nios2_gen2_instruction_master_agent.av} {baseAddress} {0x0000};set_connection_parameter_value {nios2_gen2_instruction_master_translator.avalon_universal_master_0/nios2_gen2_instruction_master_agent.av} {defaultConnection} {false};add_connection {jtag_uart_avalon_jtag_slave_agent.m0} {jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {jtag_uart_avalon_jtag_slave_agent.m0/jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {jtag_uart_avalon_jtag_slave_agent.m0/jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {jtag_uart_avalon_jtag_slave_agent.m0/jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {jtag_uart_avalon_jtag_slave_agent.rf_source} {jtag_uart_avalon_jtag_slave_agent_rsp_fifo.in} {avalon_streaming};add_connection {jtag_uart_avalon_jtag_slave_agent_rsp_fifo.out} {jtag_uart_avalon_jtag_slave_agent.rf_sink} {avalon_streaming};add_connection {jtag_uart_avalon_jtag_slave_agent.rdata_fifo_src} {jtag_uart_avalon_jtag_slave_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux.src} {jtag_uart_avalon_jtag_slave_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux.src/jtag_uart_avalon_jtag_slave_agent.cp} {qsys_mm.command};add_connection {i2c_opencores_mipi_avalon_slave_0_agent.m0} {i2c_opencores_mipi_avalon_slave_0_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent.m0/i2c_opencores_mipi_avalon_slave_0_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent.m0/i2c_opencores_mipi_avalon_slave_0_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent.m0/i2c_opencores_mipi_avalon_slave_0_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {i2c_opencores_mipi_avalon_slave_0_agent.rf_source} {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo.in} {avalon_streaming};add_connection {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo.out} {i2c_opencores_mipi_avalon_slave_0_agent.rf_sink} {avalon_streaming};add_connection {i2c_opencores_mipi_avalon_slave_0_agent.rdata_fifo_src} {i2c_opencores_mipi_avalon_slave_0_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_001.src} {i2c_opencores_mipi_avalon_slave_0_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_001.src/i2c_opencores_mipi_avalon_slave_0_agent.cp} {qsys_mm.command};add_connection {i2c_opencores_camera_avalon_slave_0_agent.m0} {i2c_opencores_camera_avalon_slave_0_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {i2c_opencores_camera_avalon_slave_0_agent.m0/i2c_opencores_camera_avalon_slave_0_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {i2c_opencores_camera_avalon_slave_0_agent.m0/i2c_opencores_camera_avalon_slave_0_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {i2c_opencores_camera_avalon_slave_0_agent.m0/i2c_opencores_camera_avalon_slave_0_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {i2c_opencores_camera_avalon_slave_0_agent.rf_source} {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo.in} {avalon_streaming};add_connection {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo.out} {i2c_opencores_camera_avalon_slave_0_agent.rf_sink} {avalon_streaming};add_connection {i2c_opencores_camera_avalon_slave_0_agent.rdata_fifo_src} {i2c_opencores_camera_avalon_slave_0_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_002.src} {i2c_opencores_camera_avalon_slave_0_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_002.src/i2c_opencores_camera_avalon_slave_0_agent.cp} {qsys_mm.command};add_connection {sysid_qsys_control_slave_agent.m0} {sysid_qsys_control_slave_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {sysid_qsys_control_slave_agent.m0/sysid_qsys_control_slave_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {sysid_qsys_control_slave_agent.m0/sysid_qsys_control_slave_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {sysid_qsys_control_slave_agent.m0/sysid_qsys_control_slave_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {sysid_qsys_control_slave_agent.rf_source} {sysid_qsys_control_slave_agent_rsp_fifo.in} {avalon_streaming};add_connection {sysid_qsys_control_slave_agent_rsp_fifo.out} {sysid_qsys_control_slave_agent.rf_sink} {avalon_streaming};add_connection {sysid_qsys_control_slave_agent.rdata_fifo_src} {sysid_qsys_control_slave_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_003.src} {sysid_qsys_control_slave_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_003.src/sysid_qsys_control_slave_agent.cp} {qsys_mm.command};add_connection {nios2_gen2_debug_mem_slave_agent.m0} {nios2_gen2_debug_mem_slave_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {nios2_gen2_debug_mem_slave_agent.m0/nios2_gen2_debug_mem_slave_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {nios2_gen2_debug_mem_slave_agent.m0/nios2_gen2_debug_mem_slave_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {nios2_gen2_debug_mem_slave_agent.m0/nios2_gen2_debug_mem_slave_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {nios2_gen2_debug_mem_slave_agent.rf_source} {nios2_gen2_debug_mem_slave_agent_rsp_fifo.in} {avalon_streaming};add_connection {nios2_gen2_debug_mem_slave_agent_rsp_fifo.out} {nios2_gen2_debug_mem_slave_agent.rf_sink} {avalon_streaming};add_connection {nios2_gen2_debug_mem_slave_agent.rdata_fifo_src} {nios2_gen2_debug_mem_slave_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_004.src} {nios2_gen2_debug_mem_slave_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_004.src/nios2_gen2_debug_mem_slave_agent.cp} {qsys_mm.command};add_connection {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.m0} {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.m0/TERASIC_AUTO_FOCUS_0_mm_ctrl_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.m0/TERASIC_AUTO_FOCUS_0_mm_ctrl_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.m0/TERASIC_AUTO_FOCUS_0_mm_ctrl_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.rf_source} {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo.in} {avalon_streaming};add_connection {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo.out} {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.rf_sink} {avalon_streaming};add_connection {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.rdata_fifo_src} {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo.in} {avalon_streaming};add_connection {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo.out} {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_005.src} {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_005.src/TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.cp} {qsys_mm.command};add_connection {altpll_0_pll_slave_agent.m0} {altpll_0_pll_slave_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {altpll_0_pll_slave_agent.m0/altpll_0_pll_slave_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {altpll_0_pll_slave_agent.m0/altpll_0_pll_slave_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {altpll_0_pll_slave_agent.m0/altpll_0_pll_slave_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {altpll_0_pll_slave_agent.rf_source} {altpll_0_pll_slave_agent_rsp_fifo.in} {avalon_streaming};add_connection {altpll_0_pll_slave_agent_rsp_fifo.out} {altpll_0_pll_slave_agent.rf_sink} {avalon_streaming};add_connection {altpll_0_pll_slave_agent.rdata_fifo_src} {altpll_0_pll_slave_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_006.src} {altpll_0_pll_slave_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_006.src/altpll_0_pll_slave_agent.cp} {qsys_mm.command};add_connection {onchip_memory2_0_s1_agent.m0} {onchip_memory2_0_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {onchip_memory2_0_s1_agent.m0/onchip_memory2_0_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {onchip_memory2_0_s1_agent.m0/onchip_memory2_0_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {onchip_memory2_0_s1_agent.m0/onchip_memory2_0_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {onchip_memory2_0_s1_agent.rf_source} {onchip_memory2_0_s1_agent_rsp_fifo.in} {avalon_streaming};add_connection {onchip_memory2_0_s1_agent_rsp_fifo.out} {onchip_memory2_0_s1_agent.rf_sink} {avalon_streaming};add_connection {onchip_memory2_0_s1_agent.rdata_fifo_src} {onchip_memory2_0_s1_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_007.src} {onchip_memory2_0_s1_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_007.src/onchip_memory2_0_s1_agent.cp} {qsys_mm.command};add_connection {timer_s1_agent.m0} {timer_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {timer_s1_agent.m0/timer_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {timer_s1_agent.m0/timer_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {timer_s1_agent.m0/timer_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {timer_s1_agent.rf_source} {timer_s1_agent_rsp_fifo.in} {avalon_streaming};add_connection {timer_s1_agent_rsp_fifo.out} {timer_s1_agent.rf_sink} {avalon_streaming};add_connection {timer_s1_agent.rdata_fifo_src} {timer_s1_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_008.src} {timer_s1_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_008.src/timer_s1_agent.cp} {qsys_mm.command};add_connection {led_s1_agent.m0} {led_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {led_s1_agent.m0/led_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {led_s1_agent.m0/led_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {led_s1_agent.m0/led_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {led_s1_agent.rf_source} {led_s1_agent_rsp_fifo.in} {avalon_streaming};add_connection {led_s1_agent_rsp_fifo.out} {led_s1_agent.rf_sink} {avalon_streaming};add_connection {led_s1_agent.rdata_fifo_src} {led_s1_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_009.src} {led_s1_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_009.src/led_s1_agent.cp} {qsys_mm.command};add_connection {sw_s1_agent.m0} {sw_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {sw_s1_agent.m0/sw_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {sw_s1_agent.m0/sw_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {sw_s1_agent.m0/sw_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {sw_s1_agent.rf_source} {sw_s1_agent_rsp_fifo.in} {avalon_streaming};add_connection {sw_s1_agent_rsp_fifo.out} {sw_s1_agent.rf_sink} {avalon_streaming};add_connection {sw_s1_agent.rdata_fifo_src} {sw_s1_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_010.src} {sw_s1_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_010.src/sw_s1_agent.cp} {qsys_mm.command};add_connection {key_s1_agent.m0} {key_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {key_s1_agent.m0/key_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {key_s1_agent.m0/key_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {key_s1_agent.m0/key_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {key_s1_agent.rf_source} {key_s1_agent_rsp_fifo.in} {avalon_streaming};add_connection {key_s1_agent_rsp_fifo.out} {key_s1_agent.rf_sink} {avalon_streaming};add_connection {key_s1_agent.rdata_fifo_src} {key_s1_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_011.src} {key_s1_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_011.src/key_s1_agent.cp} {qsys_mm.command};add_connection {mipi_reset_n_s1_agent.m0} {mipi_reset_n_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {mipi_reset_n_s1_agent.m0/mipi_reset_n_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {mipi_reset_n_s1_agent.m0/mipi_reset_n_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {mipi_reset_n_s1_agent.m0/mipi_reset_n_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {mipi_reset_n_s1_agent.rf_source} {mipi_reset_n_s1_agent_rsp_fifo.in} {avalon_streaming};add_connection {mipi_reset_n_s1_agent_rsp_fifo.out} {mipi_reset_n_s1_agent.rf_sink} {avalon_streaming};add_connection {mipi_reset_n_s1_agent.rdata_fifo_src} {mipi_reset_n_s1_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_012.src} {mipi_reset_n_s1_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_012.src/mipi_reset_n_s1_agent.cp} {qsys_mm.command};add_connection {mipi_pwdn_n_s1_agent.m0} {mipi_pwdn_n_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {mipi_pwdn_n_s1_agent.m0/mipi_pwdn_n_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {mipi_pwdn_n_s1_agent.m0/mipi_pwdn_n_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {mipi_pwdn_n_s1_agent.m0/mipi_pwdn_n_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {mipi_pwdn_n_s1_agent.rf_source} {mipi_pwdn_n_s1_agent_rsp_fifo.in} {avalon_streaming};add_connection {mipi_pwdn_n_s1_agent_rsp_fifo.out} {mipi_pwdn_n_s1_agent.rf_sink} {avalon_streaming};add_connection {mipi_pwdn_n_s1_agent.rdata_fifo_src} {mipi_pwdn_n_s1_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_013.src} {mipi_pwdn_n_s1_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_013.src/mipi_pwdn_n_s1_agent.cp} {qsys_mm.command};add_connection {EEE_IMGPROC_0_s1_agent.m0} {EEE_IMGPROC_0_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {EEE_IMGPROC_0_s1_agent.m0/EEE_IMGPROC_0_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {EEE_IMGPROC_0_s1_agent.m0/EEE_IMGPROC_0_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {EEE_IMGPROC_0_s1_agent.m0/EEE_IMGPROC_0_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {EEE_IMGPROC_0_s1_agent.rf_source} {EEE_IMGPROC_0_s1_agent_rsp_fifo.in} {avalon_streaming};add_connection {EEE_IMGPROC_0_s1_agent_rsp_fifo.out} {EEE_IMGPROC_0_s1_agent.rf_sink} {avalon_streaming};add_connection {EEE_IMGPROC_0_s1_agent.rdata_fifo_src} {EEE_IMGPROC_0_s1_agent_rdata_fifo.in} {avalon_streaming};add_connection {EEE_IMGPROC_0_s1_agent_rdata_fifo.out} {EEE_IMGPROC_0_s1_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_014.src} {EEE_IMGPROC_0_s1_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_014.src/EEE_IMGPROC_0_s1_agent.cp} {qsys_mm.command};add_connection {uart_0_s1_agent.m0} {uart_0_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {uart_0_s1_agent.m0/uart_0_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {uart_0_s1_agent.m0/uart_0_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {uart_0_s1_agent.m0/uart_0_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {uart_0_s1_agent.rf_source} {uart_0_s1_agent_rsp_fifo.in} {avalon_streaming};add_connection {uart_0_s1_agent_rsp_fifo.out} {uart_0_s1_agent.rf_sink} {avalon_streaming};add_connection {uart_0_s1_agent.rdata_fifo_src} {uart_0_s1_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_015.src} {uart_0_s1_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_015.src/uart_0_s1_agent.cp} {qsys_mm.command};add_connection {nios2_gen2_data_master_agent.cp} {router.sink} {avalon_streaming};preview_set_connection_tag {nios2_gen2_data_master_agent.cp/router.sink} {qsys_mm.command};add_connection {nios2_gen2_instruction_master_agent.cp} {router_001.sink} {avalon_streaming};preview_set_connection_tag {nios2_gen2_instruction_master_agent.cp/router_001.sink} {qsys_mm.command};add_connection {jtag_uart_avalon_jtag_slave_agent.rp} {router_002.sink} {avalon_streaming};preview_set_connection_tag {jtag_uart_avalon_jtag_slave_agent.rp/router_002.sink} {qsys_mm.response};add_connection {router_002.src} {rsp_demux.sink} {avalon_streaming};preview_set_connection_tag {router_002.src/rsp_demux.sink} {qsys_mm.response};add_connection {i2c_opencores_mipi_avalon_slave_0_agent.rp} {router_003.sink} {avalon_streaming};preview_set_connection_tag {i2c_opencores_mipi_avalon_slave_0_agent.rp/router_003.sink} {qsys_mm.response};add_connection {router_003.src} {rsp_demux_001.sink} {avalon_streaming};preview_set_connection_tag {router_003.src/rsp_demux_001.sink} {qsys_mm.response};add_connection {i2c_opencores_camera_avalon_slave_0_agent.rp} {router_004.sink} {avalon_streaming};preview_set_connection_tag {i2c_opencores_camera_avalon_slave_0_agent.rp/router_004.sink} {qsys_mm.response};add_connection {router_004.src} {rsp_demux_002.sink} {avalon_streaming};preview_set_connection_tag {router_004.src/rsp_demux_002.sink} {qsys_mm.response};add_connection {sysid_qsys_control_slave_agent.rp} {router_005.sink} {avalon_streaming};preview_set_connection_tag {sysid_qsys_control_slave_agent.rp/router_005.sink} {qsys_mm.response};add_connection {router_005.src} {rsp_demux_003.sink} {avalon_streaming};preview_set_connection_tag {router_005.src/rsp_demux_003.sink} {qsys_mm.response};add_connection {nios2_gen2_debug_mem_slave_agent.rp} {router_006.sink} {avalon_streaming};preview_set_connection_tag {nios2_gen2_debug_mem_slave_agent.rp/router_006.sink} {qsys_mm.response};add_connection {router_006.src} {rsp_demux_004.sink} {avalon_streaming};preview_set_connection_tag {router_006.src/rsp_demux_004.sink} {qsys_mm.response};add_connection {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.rp} {router_007.sink} {avalon_streaming};preview_set_connection_tag {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.rp/router_007.sink} {qsys_mm.response};add_connection {router_007.src} {rsp_demux_005.sink} {avalon_streaming};preview_set_connection_tag {router_007.src/rsp_demux_005.sink} {qsys_mm.response};add_connection {altpll_0_pll_slave_agent.rp} {router_008.sink} {avalon_streaming};preview_set_connection_tag {altpll_0_pll_slave_agent.rp/router_008.sink} {qsys_mm.response};add_connection {router_008.src} {rsp_demux_006.sink} {avalon_streaming};preview_set_connection_tag {router_008.src/rsp_demux_006.sink} {qsys_mm.response};add_connection {onchip_memory2_0_s1_agent.rp} {router_009.sink} {avalon_streaming};preview_set_connection_tag {onchip_memory2_0_s1_agent.rp/router_009.sink} {qsys_mm.response};add_connection {router_009.src} {rsp_demux_007.sink} {avalon_streaming};preview_set_connection_tag {router_009.src/rsp_demux_007.sink} {qsys_mm.response};add_connection {timer_s1_agent.rp} {router_010.sink} {avalon_streaming};preview_set_connection_tag {timer_s1_agent.rp/router_010.sink} {qsys_mm.response};add_connection {router_010.src} {rsp_demux_008.sink} {avalon_streaming};preview_set_connection_tag {router_010.src/rsp_demux_008.sink} {qsys_mm.response};add_connection {led_s1_agent.rp} {router_011.sink} {avalon_streaming};preview_set_connection_tag {led_s1_agent.rp/router_011.sink} {qsys_mm.response};add_connection {router_011.src} {rsp_demux_009.sink} {avalon_streaming};preview_set_connection_tag {router_011.src/rsp_demux_009.sink} {qsys_mm.response};add_connection {sw_s1_agent.rp} {router_012.sink} {avalon_streaming};preview_set_connection_tag {sw_s1_agent.rp/router_012.sink} {qsys_mm.response};add_connection {router_012.src} {rsp_demux_010.sink} {avalon_streaming};preview_set_connection_tag {router_012.src/rsp_demux_010.sink} {qsys_mm.response};add_connection {key_s1_agent.rp} {router_013.sink} {avalon_streaming};preview_set_connection_tag {key_s1_agent.rp/router_013.sink} {qsys_mm.response};add_connection {router_013.src} {rsp_demux_011.sink} {avalon_streaming};preview_set_connection_tag {router_013.src/rsp_demux_011.sink} {qsys_mm.response};add_connection {mipi_reset_n_s1_agent.rp} {router_014.sink} {avalon_streaming};preview_set_connection_tag {mipi_reset_n_s1_agent.rp/router_014.sink} {qsys_mm.response};add_connection {router_014.src} {rsp_demux_012.sink} {avalon_streaming};preview_set_connection_tag {router_014.src/rsp_demux_012.sink} {qsys_mm.response};add_connection {mipi_pwdn_n_s1_agent.rp} {router_015.sink} {avalon_streaming};preview_set_connection_tag {mipi_pwdn_n_s1_agent.rp/router_015.sink} {qsys_mm.response};add_connection {router_015.src} {rsp_demux_013.sink} {avalon_streaming};preview_set_connection_tag {router_015.src/rsp_demux_013.sink} {qsys_mm.response};add_connection {EEE_IMGPROC_0_s1_agent.rp} {router_016.sink} {avalon_streaming};preview_set_connection_tag {EEE_IMGPROC_0_s1_agent.rp/router_016.sink} {qsys_mm.response};add_connection {router_016.src} {rsp_demux_014.sink} {avalon_streaming};preview_set_connection_tag {router_016.src/rsp_demux_014.sink} {qsys_mm.response};add_connection {uart_0_s1_agent.rp} {router_017.sink} {avalon_streaming};preview_set_connection_tag {uart_0_s1_agent.rp/router_017.sink} {qsys_mm.response};add_connection {router_017.src} {rsp_demux_015.sink} {avalon_streaming};preview_set_connection_tag {router_017.src/rsp_demux_015.sink} {qsys_mm.response};add_connection {router.src} {nios2_gen2_data_master_limiter.cmd_sink} {avalon_streaming};preview_set_connection_tag {router.src/nios2_gen2_data_master_limiter.cmd_sink} {qsys_mm.command};add_connection {nios2_gen2_data_master_limiter.cmd_src} {cmd_demux.sink} {avalon_streaming};preview_set_connection_tag {nios2_gen2_data_master_limiter.cmd_src/cmd_demux.sink} {qsys_mm.command};add_connection {rsp_mux.src} {nios2_gen2_data_master_limiter.rsp_sink} {avalon_streaming};preview_set_connection_tag {rsp_mux.src/nios2_gen2_data_master_limiter.rsp_sink} {qsys_mm.response};add_connection {nios2_gen2_data_master_limiter.rsp_src} {nios2_gen2_data_master_agent.rp} {avalon_streaming};preview_set_connection_tag {nios2_gen2_data_master_limiter.rsp_src/nios2_gen2_data_master_agent.rp} {qsys_mm.response};add_connection {router_001.src} {nios2_gen2_instruction_master_limiter.cmd_sink} {avalon_streaming};preview_set_connection_tag {router_001.src/nios2_gen2_instruction_master_limiter.cmd_sink} {qsys_mm.command};add_connection {nios2_gen2_instruction_master_limiter.cmd_src} {cmd_demux_001.sink} {avalon_streaming};preview_set_connection_tag {nios2_gen2_instruction_master_limiter.cmd_src/cmd_demux_001.sink} {qsys_mm.command};add_connection {rsp_mux_001.src} {nios2_gen2_instruction_master_limiter.rsp_sink} {avalon_streaming};preview_set_connection_tag {rsp_mux_001.src/nios2_gen2_instruction_master_limiter.rsp_sink} {qsys_mm.response};add_connection {nios2_gen2_instruction_master_limiter.rsp_src} {nios2_gen2_instruction_master_agent.rp} {avalon_streaming};preview_set_connection_tag {nios2_gen2_instruction_master_limiter.rsp_src/nios2_gen2_instruction_master_agent.rp} {qsys_mm.response};add_connection {cmd_demux.src0} {cmd_mux.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src0/cmd_mux.sink0} {qsys_mm.command};add_connection {cmd_demux.src1} {cmd_mux_001.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src1/cmd_mux_001.sink0} {qsys_mm.command};add_connection {cmd_demux.src2} {cmd_mux_002.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src2/cmd_mux_002.sink0} {qsys_mm.command};add_connection {cmd_demux.src3} {cmd_mux_003.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src3/cmd_mux_003.sink0} {qsys_mm.command};add_connection {cmd_demux.src4} {cmd_mux_004.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src4/cmd_mux_004.sink0} {qsys_mm.command};add_connection {cmd_demux.src6} {cmd_mux_006.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src6/cmd_mux_006.sink0} {qsys_mm.command};add_connection {cmd_demux.src7} {cmd_mux_007.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src7/cmd_mux_007.sink0} {qsys_mm.command};add_connection {cmd_demux.src8} {cmd_mux_008.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src8/cmd_mux_008.sink0} {qsys_mm.command};add_connection {cmd_demux.src9} {cmd_mux_009.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src9/cmd_mux_009.sink0} {qsys_mm.command};add_connection {cmd_demux.src10} {cmd_mux_010.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src10/cmd_mux_010.sink0} {qsys_mm.command};add_connection {cmd_demux.src11} {cmd_mux_011.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src11/cmd_mux_011.sink0} {qsys_mm.command};add_connection {cmd_demux.src12} {cmd_mux_012.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src12/cmd_mux_012.sink0} {qsys_mm.command};add_connection {cmd_demux.src13} {cmd_mux_013.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src13/cmd_mux_013.sink0} {qsys_mm.command};add_connection {cmd_demux.src15} {cmd_mux_015.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src15/cmd_mux_015.sink0} {qsys_mm.command};add_connection {cmd_demux_001.src0} {cmd_mux_004.sink1} {avalon_streaming};preview_set_connection_tag {cmd_demux_001.src0/cmd_mux_004.sink1} {qsys_mm.command};add_connection {cmd_demux_001.src1} {cmd_mux_007.sink1} {avalon_streaming};preview_set_connection_tag {cmd_demux_001.src1/cmd_mux_007.sink1} {qsys_mm.command};add_connection {rsp_demux.src0} {rsp_mux.sink0} {avalon_streaming};preview_set_connection_tag {rsp_demux.src0/rsp_mux.sink0} {qsys_mm.response};add_connection {rsp_demux_001.src0} {rsp_mux.sink1} {avalon_streaming};preview_set_connection_tag {rsp_demux_001.src0/rsp_mux.sink1} {qsys_mm.response};add_connection {rsp_demux_002.src0} {rsp_mux.sink2} {avalon_streaming};preview_set_connection_tag {rsp_demux_002.src0/rsp_mux.sink2} {qsys_mm.response};add_connection {rsp_demux_003.src0} {rsp_mux.sink3} {avalon_streaming};preview_set_connection_tag {rsp_demux_003.src0/rsp_mux.sink3} {qsys_mm.response};add_connection {rsp_demux_004.src0} {rsp_mux.sink4} {avalon_streaming};preview_set_connection_tag {rsp_demux_004.src0/rsp_mux.sink4} {qsys_mm.response};add_connection {rsp_demux_004.src1} {rsp_mux_001.sink0} {avalon_streaming};preview_set_connection_tag {rsp_demux_004.src1/rsp_mux_001.sink0} {qsys_mm.response};add_connection {rsp_demux_006.src0} {rsp_mux.sink6} {avalon_streaming};preview_set_connection_tag {rsp_demux_006.src0/rsp_mux.sink6} {qsys_mm.response};add_connection {rsp_demux_007.src0} {rsp_mux.sink7} {avalon_streaming};preview_set_connection_tag {rsp_demux_007.src0/rsp_mux.sink7} {qsys_mm.response};add_connection {rsp_demux_007.src1} {rsp_mux_001.sink1} {avalon_streaming};preview_set_connection_tag {rsp_demux_007.src1/rsp_mux_001.sink1} {qsys_mm.response};add_connection {rsp_demux_008.src0} {rsp_mux.sink8} {avalon_streaming};preview_set_connection_tag {rsp_demux_008.src0/rsp_mux.sink8} {qsys_mm.response};add_connection {rsp_demux_009.src0} {rsp_mux.sink9} {avalon_streaming};preview_set_connection_tag {rsp_demux_009.src0/rsp_mux.sink9} {qsys_mm.response};add_connection {rsp_demux_010.src0} {rsp_mux.sink10} {avalon_streaming};preview_set_connection_tag {rsp_demux_010.src0/rsp_mux.sink10} {qsys_mm.response};add_connection {rsp_demux_011.src0} {rsp_mux.sink11} {avalon_streaming};preview_set_connection_tag {rsp_demux_011.src0/rsp_mux.sink11} {qsys_mm.response};add_connection {rsp_demux_012.src0} {rsp_mux.sink12} {avalon_streaming};preview_set_connection_tag {rsp_demux_012.src0/rsp_mux.sink12} {qsys_mm.response};add_connection {rsp_demux_013.src0} {rsp_mux.sink13} {avalon_streaming};preview_set_connection_tag {rsp_demux_013.src0/rsp_mux.sink13} {qsys_mm.response};add_connection {rsp_demux_015.src0} {rsp_mux.sink15} {avalon_streaming};preview_set_connection_tag {rsp_demux_015.src0/rsp_mux.sink15} {qsys_mm.response};add_connection {cmd_demux.src5} {crosser.in} {avalon_streaming};preview_set_connection_tag {cmd_demux.src5/crosser.in} {qsys_mm.command};add_connection {crosser.out} {cmd_mux_005.sink0} {avalon_streaming};preview_set_connection_tag {crosser.out/cmd_mux_005.sink0} {qsys_mm.command};add_connection {cmd_demux.src14} {crosser_001.in} {avalon_streaming};preview_set_connection_tag {cmd_demux.src14/crosser_001.in} {qsys_mm.command};add_connection {crosser_001.out} {cmd_mux_014.sink0} {avalon_streaming};preview_set_connection_tag {crosser_001.out/cmd_mux_014.sink0} {qsys_mm.command};add_connection {rsp_demux_005.src0} {crosser_002.in} {avalon_streaming};preview_set_connection_tag {rsp_demux_005.src0/crosser_002.in} {qsys_mm.response};add_connection {crosser_002.out} {rsp_mux.sink5} {avalon_streaming};preview_set_connection_tag {crosser_002.out/rsp_mux.sink5} {qsys_mm.response};add_connection {rsp_demux_014.src0} {crosser_003.in} {avalon_streaming};preview_set_connection_tag {rsp_demux_014.src0/crosser_003.in} {qsys_mm.response};add_connection {crosser_003.out} {rsp_mux.sink14} {avalon_streaming};preview_set_connection_tag {crosser_003.out/rsp_mux.sink14} {qsys_mm.response};add_connection {nios2_gen2_data_master_limiter.cmd_valid} {cmd_demux.sink_valid} {avalon_streaming};add_connection {nios2_gen2_instruction_master_limiter.cmd_valid} {cmd_demux_001.sink_valid} {avalon_streaming};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {nios2_gen2_data_master_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {nios2_gen2_instruction_master_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {jtag_uart_avalon_jtag_slave_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {i2c_opencores_mipi_avalon_slave_0_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {i2c_opencores_camera_avalon_slave_0_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {sysid_qsys_control_slave_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {nios2_gen2_debug_mem_slave_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {onchip_memory2_0_s1_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {timer_s1_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {led_s1_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {sw_s1_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {key_s1_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {mipi_reset_n_s1_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {mipi_pwdn_n_s1_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {uart_0_s1_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {nios2_gen2_data_master_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {nios2_gen2_instruction_master_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {jtag_uart_avalon_jtag_slave_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {jtag_uart_avalon_jtag_slave_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {i2c_opencores_mipi_avalon_slave_0_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {i2c_opencores_camera_avalon_slave_0_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {sysid_qsys_control_slave_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {sysid_qsys_control_slave_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {nios2_gen2_debug_mem_slave_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {nios2_gen2_debug_mem_slave_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {onchip_memory2_0_s1_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {onchip_memory2_0_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {timer_s1_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {timer_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {led_s1_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {led_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {sw_s1_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {sw_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {key_s1_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {key_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {mipi_reset_n_s1_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {mipi_reset_n_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {mipi_pwdn_n_s1_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {mipi_pwdn_n_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {uart_0_s1_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {uart_0_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_001.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_002.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_003.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_004.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_005.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_006.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_009.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_010.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_011.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_012.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_013.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_014.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_015.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_017.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {nios2_gen2_data_master_limiter.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {nios2_gen2_instruction_master_limiter.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_demux.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_demux_001.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux_001.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux_002.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux_003.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux_004.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux_007.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux_008.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux_009.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux_010.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux_011.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux_012.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux_013.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux_015.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux_001.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux_002.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux_003.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux_004.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux_007.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux_008.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux_009.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux_010.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux_011.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux_012.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux_013.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux_015.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_mux.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_mux_001.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {crosser.in_clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {crosser_001.in_clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {crosser_002.out_clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {crosser_003.out_clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator.reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {EEE_IMGPROC_0_s1_translator.reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo.clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo.clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {EEE_IMGPROC_0_s1_agent.clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {EEE_IMGPROC_0_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {EEE_IMGPROC_0_s1_agent_rdata_fifo.clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {router_007.clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {router_016.clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {cmd_mux_005.clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {cmd_mux_014.clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {rsp_demux_005.clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {rsp_demux_014.clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {crosser.out_clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {crosser_001.out_clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {crosser_002.in_clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {crosser_003.in_clk_reset} {reset};add_connection {altpll_0_inclk_interface_reset_reset_bridge.out_reset} {altpll_0_pll_slave_translator.reset} {reset};add_connection {altpll_0_inclk_interface_reset_reset_bridge.out_reset} {altpll_0_pll_slave_agent.clk_reset} {reset};add_connection {altpll_0_inclk_interface_reset_reset_bridge.out_reset} {altpll_0_pll_slave_agent_rsp_fifo.clk_reset} {reset};add_connection {altpll_0_inclk_interface_reset_reset_bridge.out_reset} {router_008.clk_reset} {reset};add_connection {altpll_0_inclk_interface_reset_reset_bridge.out_reset} {cmd_mux_006.clk_reset} {reset};add_connection {altpll_0_inclk_interface_reset_reset_bridge.out_reset} {rsp_demux_006.clk_reset} {reset};add_connection {clk_50_clk_clock_bridge.out_clk} {nios2_gen2_data_master_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {nios2_gen2_instruction_master_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {jtag_uart_avalon_jtag_slave_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {i2c_opencores_mipi_avalon_slave_0_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {i2c_opencores_camera_avalon_slave_0_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {sysid_qsys_control_slave_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {nios2_gen2_debug_mem_slave_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {altpll_0_pll_slave_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {onchip_memory2_0_s1_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {timer_s1_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {led_s1_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {sw_s1_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {key_s1_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {mipi_reset_n_s1_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {mipi_pwdn_n_s1_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {uart_0_s1_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {nios2_gen2_data_master_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {nios2_gen2_instruction_master_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {jtag_uart_avalon_jtag_slave_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {jtag_uart_avalon_jtag_slave_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {i2c_opencores_mipi_avalon_slave_0_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {i2c_opencores_camera_avalon_slave_0_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {sysid_qsys_control_slave_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {sysid_qsys_control_slave_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {nios2_gen2_debug_mem_slave_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {nios2_gen2_debug_mem_slave_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {altpll_0_pll_slave_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {altpll_0_pll_slave_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {onchip_memory2_0_s1_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {onchip_memory2_0_s1_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {timer_s1_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {timer_s1_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {led_s1_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {led_s1_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {sw_s1_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {sw_s1_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {key_s1_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {key_s1_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {mipi_reset_n_s1_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {mipi_reset_n_s1_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {mipi_pwdn_n_s1_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {mipi_pwdn_n_s1_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {uart_0_s1_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {uart_0_s1_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_001.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_002.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_003.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_004.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_005.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_006.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_008.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_009.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_010.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_011.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_012.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_013.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_014.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_015.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_017.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {nios2_gen2_data_master_limiter.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {nios2_gen2_instruction_master_limiter.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_demux.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_mux.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_demux_001.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_mux_001.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_001.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_001.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_002.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_002.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_003.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_003.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_004.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_004.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_006.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_006.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_007.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_007.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_008.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_008.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_009.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_009.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_010.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_010.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_011.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_011.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_012.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_012.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_013.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_013.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_015.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_015.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {crosser.in_clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {crosser_001.in_clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {crosser_002.out_clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {crosser_003.out_clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {nios2_gen2_reset_reset_bridge.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {altpll_0_inclk_interface_reset_reset_bridge.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {EEE_IMGPROC_0_s1_translator.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {EEE_IMGPROC_0_s1_agent.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {EEE_IMGPROC_0_s1_agent_rsp_fifo.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {EEE_IMGPROC_0_s1_agent_rdata_fifo.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {router_007.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {router_016.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {cmd_mux_005.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {rsp_demux_005.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {cmd_mux_014.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {rsp_demux_014.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {crosser.out_clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {crosser_001.out_clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {crosser_002.in_clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {crosser_003.in_clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.clk} {clock};add_interface {altpll_0_c2} {clock} {slave};set_interface_property {altpll_0_c2} {EXPORT_OF} {altpll_0_c2_clock_bridge.in_clk};add_interface {clk_50_clk} {clock} {slave};set_interface_property {clk_50_clk} {EXPORT_OF} {clk_50_clk_clock_bridge.in_clk};add_interface {altpll_0_inclk_interface_reset_reset_bridge_in_reset} {reset} {slave};set_interface_property {altpll_0_inclk_interface_reset_reset_bridge_in_reset} {EXPORT_OF} {altpll_0_inclk_interface_reset_reset_bridge.in_reset};add_interface {nios2_gen2_reset_reset_bridge_in_reset} {reset} {slave};set_interface_property {nios2_gen2_reset_reset_bridge_in_reset} {EXPORT_OF} {nios2_gen2_reset_reset_bridge.in_reset};add_interface {TERASIC_AUTO_FOCUS_0_reset_reset_bridge_in_reset} {reset} {slave};set_interface_property {TERASIC_AUTO_FOCUS_0_reset_reset_bridge_in_reset} {EXPORT_OF} {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.in_reset};add_interface {nios2_gen2_data_master} {avalon} {slave};set_interface_property {nios2_gen2_data_master} {EXPORT_OF} {nios2_gen2_data_master_translator.avalon_anti_master_0};add_interface {nios2_gen2_instruction_master} {avalon} {slave};set_interface_property {nios2_gen2_instruction_master} {EXPORT_OF} {nios2_gen2_instruction_master_translator.avalon_anti_master_0};add_interface {altpll_0_pll_slave} {avalon} {master};set_interface_property {altpll_0_pll_slave} {EXPORT_OF} {altpll_0_pll_slave_translator.avalon_anti_slave_0};add_interface {EEE_IMGPROC_0_s1} {avalon} {master};set_interface_property {EEE_IMGPROC_0_s1} {EXPORT_OF} {EEE_IMGPROC_0_s1_translator.avalon_anti_slave_0};add_interface {i2c_opencores_camera_avalon_slave_0} {avalon} {master};set_interface_property {i2c_opencores_camera_avalon_slave_0} {EXPORT_OF} {i2c_opencores_camera_avalon_slave_0_translator.avalon_anti_slave_0};add_interface {i2c_opencores_mipi_avalon_slave_0} {avalon} {master};set_interface_property {i2c_opencores_mipi_avalon_slave_0} {EXPORT_OF} {i2c_opencores_mipi_avalon_slave_0_translator.avalon_anti_slave_0};add_interface {jtag_uart_avalon_jtag_slave} {avalon} {master};set_interface_property {jtag_uart_avalon_jtag_slave} {EXPORT_OF} {jtag_uart_avalon_jtag_slave_translator.avalon_anti_slave_0};add_interface {key_s1} {avalon} {master};set_interface_property {key_s1} {EXPORT_OF} {key_s1_translator.avalon_anti_slave_0};add_interface {led_s1} {avalon} {master};set_interface_property {led_s1} {EXPORT_OF} {led_s1_translator.avalon_anti_slave_0};add_interface {mipi_pwdn_n_s1} {avalon} {master};set_interface_property {mipi_pwdn_n_s1} {EXPORT_OF} {mipi_pwdn_n_s1_translator.avalon_anti_slave_0};add_interface {mipi_reset_n_s1} {avalon} {master};set_interface_property {mipi_reset_n_s1} {EXPORT_OF} {mipi_reset_n_s1_translator.avalon_anti_slave_0};add_interface {nios2_gen2_debug_mem_slave} {avalon} {master};set_interface_property {nios2_gen2_debug_mem_slave} {EXPORT_OF} {nios2_gen2_debug_mem_slave_translator.avalon_anti_slave_0};add_interface {onchip_memory2_0_s1} {avalon} {master};set_interface_property {onchip_memory2_0_s1} {EXPORT_OF} {onchip_memory2_0_s1_translator.avalon_anti_slave_0};add_interface {sw_s1} {avalon} {master};set_interface_property {sw_s1} {EXPORT_OF} {sw_s1_translator.avalon_anti_slave_0};add_interface {sysid_qsys_control_slave} {avalon} {master};set_interface_property {sysid_qsys_control_slave} {EXPORT_OF} {sysid_qsys_control_slave_translator.avalon_anti_slave_0};add_interface {TERASIC_AUTO_FOCUS_0_mm_ctrl} {avalon} {master};set_interface_property {TERASIC_AUTO_FOCUS_0_mm_ctrl} {EXPORT_OF} {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator.avalon_anti_slave_0};add_interface {timer_s1} {avalon} {master};set_interface_property {timer_s1} {EXPORT_OF} {timer_s1_translator.avalon_anti_slave_0};add_interface {uart_0_s1} {avalon} {master};set_interface_property {uart_0_s1} {EXPORT_OF} {uart_0_s1_translator.avalon_anti_slave_0};set_module_assignment {interconnect_id.EEE_IMGPROC_0.s1} {0};set_module_assignment {interconnect_id.TERASIC_AUTO_FOCUS_0.mm_ctrl} {1};set_module_assignment {interconnect_id.altpll_0.pll_slave} {2};set_module_assignment {interconnect_id.i2c_opencores_camera.avalon_slave_0} {3};set_module_assignment {interconnect_id.i2c_opencores_mipi.avalon_slave_0} {4};set_module_assignment {interconnect_id.jtag_uart.avalon_jtag_slave} {5};set_module_assignment {interconnect_id.key.s1} {6};set_module_assignment {interconnect_id.led.s1} {7};set_module_assignment {interconnect_id.mipi_pwdn_n.s1} {8};set_module_assignment {interconnect_id.mipi_reset_n.s1} {9};set_module_assignment {interconnect_id.nios2_gen2.data_master} {0};set_module_assignment {interconnect_id.nios2_gen2.debug_mem_slave} {10};set_module_assignment {interconnect_id.nios2_gen2.instruction_master} {1};set_module_assignment {interconnect_id.onchip_memory2_0.s1} {11};set_module_assignment {interconnect_id.sw.s1} {12};set_module_assignment {interconnect_id.sysid_qsys.control_slave} {13};set_module_assignment {interconnect_id.timer.s1} {14};set_module_assignment {interconnect_id.uart_0.s1} {15};(altera_merlin_master_translator:16.1:AV_ADDRESSGROUP=0,AV_ADDRESS_SYMBOLS=1,AV_ADDRESS_W=19,AV_ALWAYSBURSTMAXBURST=0,AV_BITS_PER_SYMBOL=8,AV_BURSTBOUNDARIES=1,AV_BURSTCOUNT_SYMBOLS=0,AV_BURSTCOUNT_W=1,AV_BYTEENABLE_W=4,AV_CONSTANT_BURST_BEHAVIOR=0,AV_DATA_HOLD=0,AV_DATA_W=32,AV_INTERLEAVEBURSTS=0,AV_ISBIGENDIAN=0,AV_LINEWRAPBURSTS=0,AV_MAX_PENDING_READ_TRANSACTIONS=64,AV_READLATENCY=0,AV_READ_WAIT=1,AV_REGISTERINCOMINGSIGNALS=0,AV_REGISTEROUTGOINGSIGNALS=0,AV_SETUP_WAIT=0,AV_SYMBOLS_PER_WORD=4,AV_WRITE_WAIT=0,SYNC_RESET=0,UAV_ADDRESSGROUP=0,UAV_ADDRESS_W=19,UAV_BURSTCOUNT_W=3,UAV_CONSTANT_BURST_BEHAVIOR=0,USE_ADDRESS=1,USE_BEGINBURSTTRANSFER=0,USE_BEGINTRANSFER=0,USE_BURSTCOUNT=0,USE_BYTEENABLE=1,USE_CHIPSELECT=0,USE_CLKEN=0,USE_DEBUGACCESS=1,USE_LOCK=0,USE_READ=1,USE_READDATA=1,USE_READDATAVALID=1,USE_READRESPONSE=0,USE_WAITREQUEST=1,USE_WRITE=1,USE_WRITEDATA=1,USE_WRITERESPONSE=0)(altera_merlin_master_translator:16.1:AV_ADDRESSGROUP=0,AV_ADDRESS_SYMBOLS=1,AV_ADDRESS_W=19,AV_ALWAYSBURSTMAXBURST=0,AV_BITS_PER_SYMBOL=8,AV_BURSTBOUNDARIES=0,AV_BURSTCOUNT_SYMBOLS=0,AV_BURSTCOUNT_W=1,AV_BYTEENABLE_W=4,AV_CONSTANT_BURST_BEHAVIOR=0,AV_DATA_HOLD=0,AV_DATA_W=32,AV_INTERLEAVEBURSTS=0,AV_ISBIGENDIAN=0,AV_LINEWRAPBURSTS=1,AV_MAX_PENDING_READ_TRANSACTIONS=64,AV_READLATENCY=0,AV_READ_WAIT=1,AV_REGISTERINCOMINGSIGNALS=0,AV_REGISTEROUTGOINGSIGNALS=0,AV_SETUP_WAIT=0,AV_SYMBOLS_PER_WORD=4,AV_WRITE_WAIT=0,SYNC_RESET=0,UAV_ADDRESSGROUP=0,UAV_ADDRESS_W=19,UAV_BURSTCOUNT_W=3,UAV_CONSTANT_BURST_BEHAVIOR=0,USE_ADDRESS=1,USE_BEGINBURSTTRANSFER=0,USE_BEGINTRANSFER=0,USE_BURSTCOUNT=0,USE_BYTEENABLE=0,USE_CHIPSELECT=0,USE_CLKEN=0,USE_DEBUGACCESS=0,USE_LOCK=0,USE_READ=1,USE_READDATA=1,USE_READDATAVALID=1,USE_READRESPONSE=0,USE_WAITREQUEST=1,USE_WRITE=0,USE_WRITEDATA=0,USE_WRITERESPONSE=0)(altera_merlin_slave_translator:16.1:AV_ADDRESSGROUP=0,AV_ADDRESS_SYMBOLS=0,AV_ADDRESS_W=1,AV_ALWAYSBURSTMAXBURST=0,AV_BITS_PER_SYMBOL=8,AV_BURSTBOUNDARIES=0,AV_BURSTCOUNT_SYMBOLS=0,AV_BURSTCOUNT_W=1,AV_BYTEENABLE_W=1,AV_CONSTANT_BURST_BEHAVIOR=0,AV_DATA_HOLD=0,AV_DATA_HOLD_CYCLES=0,AV_DATA_W=32,AV_INTERLEAVEBURSTS=0,AV_ISBIGENDIAN=0,AV_LINEWRAPBURSTS=0,AV_MAX_PENDING_READ_TRANSACTIONS=1,AV_MAX_PENDING_WRITE_TRANSACTIONS=0,AV_READLATENCY=0,AV_READ_WAIT=1,AV_READ_WAIT_CYCLES=1,AV_REGISTERINCOMINGSIGNALS=0,AV_REGISTEROUTGOINGSIGNALS=0,AV_REQUIRE_UNALIGNED_ADDRESSES=0,AV_SETUP_WAIT=0,AV_SETUP_WAIT_CYCLES=0,AV_SYMBOLS_PER_WORD=4,AV_TIMING_UNITS=1,AV_WRITE_WAIT=0,AV_WRITE_WAIT_CYCLES=0,CHIPSELECT_THROUGH_READLATENCY=0,CLOCK_RATE=50000000,UAV_ADDRESSGROUP=0,UAV_ADDRESS_W=19,UAV_BURSTCOUNT_W=3,UAV_BYTEENABLE_W=4,UAV_CONSTANT_BURST_BEHAVIOR=0,UAV_DATA_W=32,USE_ADDRESS=1,USE_AV_CLKEN=0,USE_BEGINBURSTTRANSFER=0,USE_BEGINTRANSFER=0,USE_BURSTCOUNT=0,USE_BYTEENABLE=0,USE_CHIPSELECT=1,USE_DEBUGACCESS=0,USE_LOCK=0,USE_OUTPUTENABLE=0,USE_READ=1,USE_READDATA=1,USE_READDATAVALID=0,USE_READRESPONSE=0,USE_UAV_CLKEN=0,USE_WAITREQUEST=1,USE_WRITE=1,USE_WRITEBYTEENABLE=0,USE_WRITEDATA=1,USE_WRITERESPONSE=0)(altera_merlin_slave_translator:16.1:AV_ADDRESSGROUP=0,AV_ADDRESS_SYMBOLS=0,AV_ADDRESS_W=3,AV_ALWAYSBURSTMAXBURST=0,AV_BITS_PER_SYMBOL=8,AV_BURSTBOUNDARIES=0,AV_BURSTCOUNT_SYMBOLS=0,AV_BURSTCOUNT_W=1,AV_BYTEENABLE_W=1,AV_CONSTANT_BURST_BEHAVIOR=0,AV_DATA_HOLD=0,AV_DATA_HOLD_CYCLES=0,AV_DATA_W=8,AV_INTERLEAVEBURSTS=0,AV_ISBIGENDIAN=0,AV_LINEWRAPBURSTS=0,AV_MAX_PENDING_READ_TRANSACTIONS=1,AV_MAX_PENDING_WRITE_TRANSACTIONS=0,AV_READLATENCY=0,AV_READ_WAIT=1,AV_READ_WAIT_CYCLES=1,AV_REGISTERINCOMINGSIGNALS=0,AV_REGISTEROUTGOINGSIGNALS=0,AV_REQUIRE_UNALIGNED_ADDRESSES=0,AV_SETUP_WAIT=0,AV_SETUP_WAIT_CYCLES=0,AV_SYMBOLS_PER_WORD=4,AV_TIMING_UNITS=1,AV_WRITE_WAIT=0,AV_WRITE_WAIT_CYCLES=0,CHIPSELECT_THROUGH_READLATENCY=0,CLOCK_RATE=50000000,UAV_ADDRESSGROUP=0,UAV_ADDRESS_W=19,UAV_BURSTCOUNT_W=3,UAV_BYTEENABLE_W=4,UAV_CONSTANT_BURST_BEHAVIOR=0,UAV_DATA_W=32,USE_ADDRESS=1,USE_AV_CLKEN=0,USE_BEGINBURSTTRANSFER=0,USE_BEGINTRANSFER=0,USE_BURSTCOUNT=0,USE_BYTEENABLE=0,USE_CHIPSELECT=1,USE_DEBUGACCESS=0,USE_LOCK=0,USE_OUTPUTENABLE=0,USE_READ=0,USE_READDATA=1,USE_READDATAVALID=0,USE_READRESPONSE=0,USE_UAV_CLKEN=0,USE_WAITREQUEST=1,USE_WRITE=1,USE_WRITEBYTEENABLE=0,USE_WRITEDATA=1,USE_WRITERESPONSE=0)(altera_merlin_slave_translator:16.1:AV_ADDRESSGROUP=0,AV_ADDRESS_SYMBOLS=0,AV_ADDRESS_W=3,AV_ALWAYSBURSTMAXBURST=0,AV_BITS_PER_SYMBOL=8,AV_BURSTBOUNDARIES=0,AV_BURSTCOUNT_SYMBOLS=0,AV_BURSTCOUNT_W=1,AV_BYTEENABLE_W=1,AV_CONSTANT_BURST_BEHAVIOR=0,AV_DATA_HOLD=0,AV_DATA_HOLD_CYCLES=0,AV_DATA_W=8,AV_INTERLEAVEBURSTS=0,AV_ISBIGENDIAN=0,AV_LINEWRAPBURSTS=0,AV_MAX_PENDING_READ_TRANSACTIONS=1,AV_MAX_PENDING_WRITE_TRANSACTIONS=0,AV_READLATENCY=0,AV_READ_WAIT=1,AV_READ_WAIT_CYCLES=1,AV_REGISTERINCOMINGSIGNALS=0,AV_REGISTEROUTGOINGSIGNALS=0,AV_REQUIRE_UNALIGNED_ADDRESSES=0,AV_SETUP_WAIT=0,AV_SETUP_WAIT_CYCLES=0,AV_SYMBOLS_PER_WORD=4,AV_TIMING_UNITS=1,AV_WRITE_WAIT=0,AV_WRITE_WAIT_CYCLES=0,CHIPSELECT_THROUGH_READLATENCY=0,CLOCK_RATE=50000000,UAV_ADDRESSGROUP=0,UAV_ADDRESS_W=19,UAV_BURSTCOUNT_W=3,UAV_BYTEENABLE_W=4,UAV_CONSTANT_BURST_BEHAVIOR=0,UAV_DATA_W=32,USE_ADDRESS=1,USE_AV_CLKEN=0,USE_BEGINBURSTTRANSFER=0,USE_BEGINTRANSFER=0,USE_BURSTCOUNT=0,USE_BYTEENABLE=0,USE_CHIPSELECT=1,USE_DEBUGACCESS=0,USE_LOCK=0,USE_OUTPUTENABLE=0,USE_READ=0,USE_READDATA=1,USE_READDATAVALID=0,USE_READRESPONSE=0,USE_UAV_CLKEN=0,USE_WAITREQUEST=1,USE_WRITE=1,USE_WRITEBYTEENABLE=0,USE_WRITEDATA=1,USE_WRITERESPONSE=0)(altera_merlin_slave_translator:16.1:AV_ADDRESSGROUP=0,AV_ADDRESS_SYMBOLS=0,AV_ADDRESS_W=1,AV_ALWAYSBURSTMAXBURST=0,AV_BITS_PER_SYMBOL=8,AV_BURSTBOUNDARIES=0,AV_BURSTCOUNT_SYMBOLS=0,AV_BURSTCOUNT_W=1,AV_BYTEENABLE_W=4,AV_CONSTANT_BURST_BEHAVIOR=0,AV_DATA_HOLD=0,AV_DATA_HOLD_CYCLES=0,AV_DATA_W=32,AV_INTERLEAVEBURSTS=0,AV_ISBIGENDIAN=0,AV_LINEWRAPBURSTS=0,AV_MAX_PENDING_READ_TRANSACTIONS=1,AV_MAX_PENDING_WRITE_TRANSACTIONS=0,AV_READLATENCY=0,AV_READ_WAIT=1,AV_READ_WAIT_CYCLES=1,AV_REGISTERINCOMINGSIGNALS=0,AV_REGISTEROUTGOINGSIGNALS=0,AV_REQUIRE_UNALIGNED_ADDRESSES=0,AV_SETUP_WAIT=0,AV_SETUP_WAIT_CYCLES=0,AV_SYMBOLS_PER_WORD=4,AV_TIMING_UNITS=1,AV_WRITE_WAIT=0,AV_WRITE_WAIT_CYCLES=0,CHIPSELECT_THROUGH_READLATENCY=0,CLOCK_RATE=50000000,UAV_ADDRESSGROUP=0,UAV_ADDRESS_W=19,UAV_BURSTCOUNT_W=3,UAV_BYTEENABLE_W=4,UAV_CONSTANT_BURST_BEHAVIOR=0,UAV_DATA_W=32,USE_ADDRESS=1,USE_AV_CLKEN=0,USE_BEGINBURSTTRANSFER=0,USE_BEGINTRANSFER=0,USE_BURSTCOUNT=0,USE_BYTEENABLE=0,USE_CHIPSELECT=0,USE_DEBUGACCESS=0,USE_LOCK=0,USE_OUTPUTENABLE=0,USE_READ=0,USE_READDATA=1,USE_READDATAVALID=0,USE_READRESPONSE=0,USE_UAV_CLKEN=0,USE_WAITREQUEST=0,USE_WRITE=0,USE_WRITEBYTEENABLE=0,USE_WRITEDATA=0,USE_WRITERESPONSE=0)(altera_merlin_slave_translator:16.1:AV_ADDRESSGROUP=0,AV_ADDRESS_SYMBOLS=0,AV_ADDRESS_W=9,AV_ALWAYSBURSTMAXBURST=0,AV_BITS_PER_SYMBOL=8,AV_BURSTBOUNDARIES=0,AV_BURSTCOUNT_SYMBOLS=0,AV_BURSTCOUNT_W=1,AV_BYTEENABLE_W=4,AV_CONSTANT_BURST_BEHAVIOR=0,AV_DATA_HOLD=0,AV_DATA_HOLD_CYCLES=0,AV_DATA_W=32,AV_INTERLEAVEBURSTS=0,AV_ISBIGENDIAN=0,AV_LINEWRAPBURSTS=0,AV_MAX_PENDING_READ_TRANSACTIONS=1,AV_MAX_PENDING_WRITE_TRANSACTIONS=0,AV_READLATENCY=0,AV_READ_WAIT=1,AV_READ_WAIT_CYCLES=1,AV_REGISTERINCOMINGSIGNALS=1,AV_REGISTEROUTGOINGSIGNALS=0,AV_REQUIRE_UNALIGNED_ADDRESSES=0,AV_SETUP_WAIT=0,AV_SETUP_WAIT_CYCLES=0,AV_SYMBOLS_PER_WORD=4,AV_TIMING_UNITS=1,AV_WRITE_WAIT=0,AV_WRITE_WAIT_CYCLES=0,CHIPSELECT_THROUGH_READLATENCY=0,CLOCK_RATE=50000000,UAV_ADDRESSGROUP=0,UAV_ADDRESS_W=19,UAV_BURSTCOUNT_W=3,UAV_BYTEENABLE_W=4,UAV_CONSTANT_BURST_BEHAVIOR=0,UAV_DATA_W=32,USE_ADDRESS=1,USE_AV_CLKEN=0,USE_BEGINBURSTTRANSFER=0,USE_BEGINTRANSFER=0,USE_BURSTCOUNT=0,USE_BYTEENABLE=1,USE_CHIPSELECT=0,USE_DEBUGACCESS=1,USE_LOCK=0,USE_OUTPUTENABLE=0,USE_READ=1,USE_READDATA=1,USE_READDATAVALID=0,USE_READRESPONSE=0,USE_UAV_CLKEN=0,USE_WAITREQUEST=1,USE_WRITE=1,USE_WRITEBYTEENABLE=0,USE_WRITEDATA=1,USE_WRITERESPONSE=0)(altera_merlin_slave_translator:16.1:AV_ADDRESSGROUP=0,AV_ADDRESS_SYMBOLS=0,AV_ADDRESS_W=3,AV_ALWAYSBURSTMAXBURST=0,AV_BITS_PER_SYMBOL=8,AV_BURSTBOUNDARIES=0,AV_BURSTCOUNT_SYMBOLS=0,AV_BURSTCOUNT_W=1,AV_BYTEENABLE_W=4,AV_CONSTANT_BURST_BEHAVIOR=0,AV_DATA_HOLD=0,AV_DATA_HOLD_CYCLES=0,AV_DATA_W=32,AV_INTERLEAVEBURSTS=0,AV_ISBIGENDIAN=0,AV_LINEWRAPBURSTS=0,AV_MAX_PENDING_READ_TRANSACTIONS=1,AV_MAX_PENDING_WRITE_TRANSACTIONS=0,AV_READLATENCY=0,AV_READ_WAIT=1,AV_READ_WAIT_CYCLES=1,AV_REGISTERINCOMINGSIGNALS=0,AV_REGISTEROUTGOINGSIGNALS=0,AV_REQUIRE_UNALIGNED_ADDRESSES=0,AV_SETUP_WAIT=0,AV_SETUP_WAIT_CYCLES=0,AV_SYMBOLS_PER_WORD=4,AV_TIMING_UNITS=1,AV_WRITE_WAIT=0,AV_WRITE_WAIT_CYCLES=0,CHIPSELECT_THROUGH_READLATENCY=0,CLOCK_RATE=100000000,UAV_ADDRESSGROUP=0,UAV_ADDRESS_W=19,UAV_BURSTCOUNT_W=3,UAV_BYTEENABLE_W=4,UAV_CONSTANT_BURST_BEHAVIOR=0,UAV_DATA_W=32,USE_ADDRESS=1,USE_AV_CLKEN=0,USE_BEGINBURSTTRANSFER=0,USE_BEGINTRANSFER=0,USE_BURSTCOUNT=0,USE_BYTEENABLE=0,USE_CHIPSELECT=1,USE_DEBUGACCESS=0,USE_LOCK=0,USE_OUTPUTENABLE=0,USE_READ=1,USE_READDATA=1,USE_READDATAVALID=0,USE_READRESPONSE=0,USE_UAV_CLKEN=0,USE_WAITREQUEST=0,USE_WRITE=1,USE_WRITEBYTEENABLE=0,USE_WRITEDATA=1,USE_WRITERESPONSE=0)(altera_merlin_slave_translator:16.1:AV_ADDRESSGROUP=0,AV_ADDRESS_SYMBOLS=0,AV_ADDRESS_W=2,AV_ALWAYSBURSTMAXBURST=0,AV_BITS_PER_SYMBOL=8,AV_BURSTBOUNDARIES=0,AV_BURSTCOUNT_SYMBOLS=0,AV_BURSTCOUNT_W=1,AV_BYTEENABLE_W=4,AV_CONSTANT_BURST_BEHAVIOR=0,AV_DATA_HOLD=0,AV_DATA_HOLD_CYCLES=0,AV_DATA_W=32,AV_INTERLEAVEBURSTS=0,AV_ISBIGENDIAN=0,AV_LINEWRAPBURSTS=0,AV_MAX_PENDING_READ_TRANSACTIONS=1,AV_MAX_PENDING_WRITE_TRANSACTIONS=0,AV_READLATENCY=0,AV_READ_WAIT=0,AV_READ_WAIT_CYCLES=0,AV_REGISTERINCOMINGSIGNALS=0,AV_REGISTEROUTGOINGSIGNALS=0,AV_REQUIRE_UNALIGNED_ADDRESSES=0,AV_SETUP_WAIT=0,AV_SETUP_WAIT_CYCLES=0,AV_SYMBOLS_PER_WORD=4,AV_TIMING_UNITS=1,AV_WRITE_WAIT=0,AV_WRITE_WAIT_CYCLES=0,CHIPSELECT_THROUGH_READLATENCY=0,CLOCK_RATE=50000000,UAV_ADDRESSGROUP=0,UAV_ADDRESS_W=19,UAV_BURSTCOUNT_W=3,UAV_BYTEENABLE_W=4,UAV_CONSTANT_BURST_BEHAVIOR=0,UAV_DATA_W=32,USE_ADDRESS=1,USE_AV_CLKEN=0,USE_BEGINBURSTTRANSFER=0,USE_BEGINTRANSFER=0,USE_BURSTCOUNT=0,USE_BYTEENABLE=0,USE_CHIPSELECT=0,USE_DEBUGACCESS=0,USE_LOCK=0,USE_OUTPUTENABLE=0,USE_READ=1,USE_READDATA=1,USE_READDATAVALID=0,USE_READRESPONSE=0,USE_UAV_CLKEN=0,USE_WAITREQUEST=0,USE_WRITE=1,USE_WRITEBYTEENABLE=0,USE_WRITEDATA=1,USE_WRITERESPONSE=0)(altera_merlin_slave_translator:16.1:AV_ADDRESSGROUP=0,AV_ADDRESS_SYMBOLS=0,AV_ADDRESS_W=15,AV_ALWAYSBURSTMAXBURST=0,AV_BITS_PER_SYMBOL=8,AV_BURSTBOUNDARIES=0,AV_BURSTCOUNT_SYMBOLS=0,AV_BURSTCOUNT_W=1,AV_BYTEENABLE_W=4,AV_CONSTANT_BURST_BEHAVIOR=0,AV_DATA_HOLD=0,AV_DATA_HOLD_CYCLES=0,AV_DATA_W=32,AV_INTERLEAVEBURSTS=0,AV_ISBIGENDIAN=0,AV_LINEWRAPBURSTS=0,AV_MAX_PENDING_READ_TRANSACTIONS=1,AV_MAX_PENDING_WRITE_TRANSACTIONS=0,AV_READLATENCY=1,AV_READ_WAIT=0,AV_READ_WAIT_CYCLES=0,AV_REGISTERINCOMINGSIGNALS=0,AV_REGISTEROUTGOINGSIGNALS=0,AV_REQUIRE_UNALIGNED_ADDRESSES=0,AV_SETUP_WAIT=0,AV_SETUP_WAIT_CYCLES=0,AV_SYMBOLS_PER_WORD=4,AV_TIMING_UNITS=1,AV_WRITE_WAIT=0,AV_WRITE_WAIT_CYCLES=0,CHIPSELECT_THROUGH_READLATENCY=0,CLOCK_RATE=50000000,UAV_ADDRESSGROUP=0,UAV_ADDRESS_W=19,UAV_BURSTCOUNT_W=3,UAV_BYTEENABLE_W=4,UAV_CONSTANT_BURST_BEHAVIOR=0,UAV_DATA_W=32,USE_ADDRESS=1,USE_AV_CLKEN=1,USE_BEGINBURSTTRANSFER=0,USE_BEGINTRANSFER=0,USE_BURSTCOUNT=0,USE_BYTEENABLE=1,USE_CHIPSELECT=1,USE_DEBUGACCESS=0,USE_LOCK=0,USE_OUTPUTENABLE=0,USE_READ=0,USE_READDATA=1,USE_READDATAVALID=0,USE_READRESPONSE=0,USE_UAV_CLKEN=0,USE_WAITREQUEST=0,USE_WRITE=1,USE_WRITEBYTEENABLE=0,USE_WRITEDATA=1,USE_WRITERESPONSE=0)(altera_merlin_slave_translator:16.1:AV_ADDRESSGROUP=0,AV_ADDRESS_SYMBOLS=0,AV_ADDRESS_W=3,AV_ALWAYSBURSTMAXBURST=0,AV_BITS_PER_SYMBOL=8,AV_BURSTBOUNDARIES=0,AV_BURSTCOUNT_SYMBOLS=0,AV_BURSTCOUNT_W=1,AV_BYTEENABLE_W=1,AV_CONSTANT_BURST_BEHAVIOR=0,AV_DATA_HOLD=0,AV_DATA_HOLD_CYCLES=0,AV_DATA_W=16,AV_INTERLEAVEBURSTS=0,AV_ISBIGENDIAN=0,AV_LINEWRAPBURSTS=0,AV_MAX_PENDING_READ_TRANSACTIONS=1,AV_MAX_PENDING_WRITE_TRANSACTIONS=0,AV_READLATENCY=0,AV_READ_WAIT=1,AV_READ_WAIT_CYCLES=1,AV_REGISTERINCOMINGSIGNALS=0,AV_REGISTEROUTGOINGSIGNALS=0,AV_REQUIRE_UNALIGNED_ADDRESSES=0,AV_SETUP_WAIT=0,AV_SETUP_WAIT_CYCLES=0,AV_SYMBOLS_PER_WORD=4,AV_TIMING_UNITS=1,AV_WRITE_WAIT=0,AV_WRITE_WAIT_CYCLES=0,CHIPSELECT_THROUGH_READLATENCY=0,CLOCK_RATE=50000000,UAV_ADDRESSGROUP=0,UAV_ADDRESS_W=19,UAV_BURSTCOUNT_W=3,UAV_BYTEENABLE_W=4,UAV_CONSTANT_BURST_BEHAVIOR=0,UAV_DATA_W=32,USE_ADDRESS=1,USE_AV_CLKEN=0,USE_BEGINBURSTTRANSFER=0,USE_BEGINTRANSFER=0,USE_BURSTCOUNT=0,USE_BYTEENABLE=0,USE_CHIPSELECT=1,USE_DEBUGACCESS=0,USE_LOCK=0,USE_OUTPUTENABLE=0,USE_READ=0,USE_READDATA=1,USE_READDATAVALID=0,USE_READRESPONSE=0,USE_UAV_CLKEN=0,USE_WAITREQUEST=0,USE_WRITE=1,USE_WRITEBYTEENABLE=0,USE_WRITEDATA=1,USE_WRITERESPONSE=0)(altera_merlin_slave_translator:16.1:AV_ADDRESSGROUP=0,AV_ADDRESS_SYMBOLS=0,AV_ADDRESS_W=2,AV_ALWAYSBURSTMAXBURST=0,AV_BITS_PER_SYMBOL=8,AV_BURSTBOUNDARIES=0,AV_BURSTCOUNT_SYMBOLS=0,AV_BURSTCOUNT_W=1,AV_BYTEENABLE_W=1,AV_CONSTANT_BURST_BEHAVIOR=0,AV_DATA_HOLD=0,AV_DATA_HOLD_CYCLES=0,AV_DATA_W=32,AV_INTERLEAVEBURSTS=0,AV_ISBIGENDIAN=0,AV_LINEWRAPBURSTS=0,AV_MAX_PENDING_READ_TRANSACTIONS=1,AV_MAX_PENDING_WRITE_TRANSACTIONS=0,AV_READLATENCY=0,AV_READ_WAIT=1,AV_READ_WAIT_CYCLES=1,AV_REGISTERINCOMINGSIGNALS=0,AV_REGISTEROUTGOINGSIGNALS=0,AV_REQUIRE_UNALIGNED_ADDRESSES=0,AV_SETUP_WAIT=0,AV_SETUP_WAIT_CYCLES=0,AV_SYMBOLS_PER_WORD=4,AV_TIMING_UNITS=1,AV_WRITE_WAIT=0,AV_WRITE_WAIT_CYCLES=0,CHIPSELECT_THROUGH_READLATENCY=0,CLOCK_RATE=50000000,UAV_ADDRESSGROUP=0,UAV_ADDRESS_W=19,UAV_BURSTCOUNT_W=3,UAV_BYTEENABLE_W=4,UAV_CONSTANT_BURST_BEHAVIOR=0,UAV_DATA_W=32,USE_ADDRESS=1,USE_AV_CLKEN=0,USE_BEGINBURSTTRANSFER=0,USE_BEGINTRANSFER=0,USE_BURSTCOUNT=0,USE_BYTEENABLE=0,USE_CHIPSELECT=1,USE_DEBUGACCESS=0,USE_LOCK=0,USE_OUTPUTENABLE=0,USE_READ=0,USE_READDATA=1,USE_READDATAVALID=0,USE_READRESPONSE=0,USE_UAV_CLKEN=0,USE_WAITREQUEST=0,USE_WRITE=1,USE_WRITEBYTEENABLE=0,USE_WRITEDATA=1,USE_WRITERESPONSE=0)(altera_merlin_slave_translator:16.1:AV_ADDRESSGROUP=0,AV_ADDRESS_SYMBOLS=0,AV_ADDRESS_W=2,AV_ALWAYSBURSTMAXBURST=0,AV_BITS_PER_SYMBOL=8,AV_BURSTBOUNDARIES=0,AV_BURSTCOUNT_SYMBOLS=0,AV_BURSTCOUNT_W=1,AV_BYTEENABLE_W=1,AV_CONSTANT_BURST_BEHAVIOR=0,AV_DATA_HOLD=0,AV_DATA_HOLD_CYCLES=0,AV_DATA_W=32,AV_INTERLEAVEBURSTS=0,AV_ISBIGENDIAN=0,AV_LINEWRAPBURSTS=0,AV_MAX_PENDING_READ_TRANSACTIONS=1,AV_MAX_PENDING_WRITE_TRANSACTIONS=0,AV_READLATENCY=0,AV_READ_WAIT=1,AV_READ_WAIT_CYCLES=1,AV_REGISTERINCOMINGSIGNALS=0,AV_REGISTEROUTGOINGSIGNALS=0,AV_REQUIRE_UNALIGNED_ADDRESSES=0,AV_SETUP_WAIT=0,AV_SETUP_WAIT_CYCLES=0,AV_SYMBOLS_PER_WORD=4,AV_TIMING_UNITS=1,AV_WRITE_WAIT=0,AV_WRITE_WAIT_CYCLES=0,CHIPSELECT_THROUGH_READLATENCY=0,CLOCK_RATE=50000000,UAV_ADDRESSGROUP=0,UAV_ADDRESS_W=19,UAV_BURSTCOUNT_W=3,UAV_BYTEENABLE_W=4,UAV_CONSTANT_BURST_BEHAVIOR=0,UAV_DATA_W=32,USE_ADDRESS=1,USE_AV_CLKEN=0,USE_BEGINBURSTTRANSFER=0,USE_BEGINTRANSFER=0,USE_BURSTCOUNT=0,USE_BYTEENABLE=0,USE_CHIPSELECT=0,USE_DEBUGACCESS=0,USE_LOCK=0,USE_OUTPUTENABLE=0,USE_READ=0,USE_READDATA=1,USE_READDATAVALID=0,USE_READRESPONSE=0,USE_UAV_CLKEN=0,USE_WAITREQUEST=0,USE_WRITE=0,USE_WRITEBYTEENABLE=0,USE_WRITEDATA=0,USE_WRITERESPONSE=0)(altera_merlin_slave_translator:16.1:AV_ADDRESSGROUP=0,AV_ADDRESS_SYMBOLS=0,AV_ADDRESS_W=2,AV_ALWAYSBURSTMAXBURST=0,AV_BITS_PER_SYMBOL=8,AV_BURSTBOUNDARIES=0,AV_BURSTCOUNT_SYMBOLS=0,AV_BURSTCOUNT_W=1,AV_BYTEENABLE_W=1,AV_CONSTANT_BURST_BEHAVIOR=0,AV_DATA_HOLD=0,AV_DATA_HOLD_CYCLES=0,AV_DATA_W=32,AV_INTERLEAVEBURSTS=0,AV_ISBIGENDIAN=0,AV_LINEWRAPBURSTS=0,AV_MAX_PENDING_READ_TRANSACTIONS=1,AV_MAX_PENDING_WRITE_TRANSACTIONS=0,AV_READLATENCY=0,AV_READ_WAIT=1,AV_READ_WAIT_CYCLES=1,AV_REGISTERINCOMINGSIGNALS=0,AV_REGISTEROUTGOINGSIGNALS=0,AV_REQUIRE_UNALIGNED_ADDRESSES=0,AV_SETUP_WAIT=0,AV_SETUP_WAIT_CYCLES=0,AV_SYMBOLS_PER_WORD=4,AV_TIMING_UNITS=1,AV_WRITE_WAIT=0,AV_WRITE_WAIT_CYCLES=0,CHIPSELECT_THROUGH_READLATENCY=0,CLOCK_RATE=50000000,UAV_ADDRESSGROUP=0,UAV_ADDRESS_W=19,UAV_BURSTCOUNT_W=3,UAV_BYTEENABLE_W=4,UAV_CONSTANT_BURST_BEHAVIOR=0,UAV_DATA_W=32,USE_ADDRESS=1,USE_AV_CLKEN=0,USE_BEGINBURSTTRANSFER=0,USE_BEGINTRANSFER=0,USE_BURSTCOUNT=0,USE_BYTEENABLE=0,USE_CHIPSELECT=0,USE_DEBUGACCESS=0,USE_LOCK=0,USE_OUTPUTENABLE=0,USE_READ=0,USE_READDATA=1,USE_READDATAVALID=0,USE_READRESPONSE=0,USE_UAV_CLKEN=0,USE_WAITREQUEST=0,USE_WRITE=0,USE_WRITEBYTEENABLE=0,USE_WRITEDATA=0,USE_WRITERESPONSE=0)(altera_merlin_slave_translator:16.1:AV_ADDRESSGROUP=0,AV_ADDRESS_SYMBOLS=0,AV_ADDRESS_W=2,AV_ALWAYSBURSTMAXBURST=0,AV_BITS_PER_SYMBOL=8,AV_BURSTBOUNDARIES=0,AV_BURSTCOUNT_SYMBOLS=0,AV_BURSTCOUNT_W=1,AV_BYTEENABLE_W=1,AV_CONSTANT_BURST_BEHAVIOR=0,AV_DATA_HOLD=0,AV_DATA_HOLD_CYCLES=0,AV_DATA_W=32,AV_INTERLEAVEBURSTS=0,AV_ISBIGENDIAN=0,AV_LINEWRAPBURSTS=0,AV_MAX_PENDING_READ_TRANSACTIONS=1,AV_MAX_PENDING_WRITE_TRANSACTIONS=0,AV_READLATENCY=0,AV_READ_WAIT=1,AV_READ_WAIT_CYCLES=1,AV_REGISTERINCOMINGSIGNALS=0,AV_REGISTEROUTGOINGSIGNALS=0,AV_REQUIRE_UNALIGNED_ADDRESSES=0,AV_SETUP_WAIT=0,AV_SETUP_WAIT_CYCLES=0,AV_SYMBOLS_PER_WORD=4,AV_TIMING_UNITS=1,AV_WRITE_WAIT=0,AV_WRITE_WAIT_CYCLES=0,CHIPSELECT_THROUGH_READLATENCY=0,CLOCK_RATE=50000000,UAV_ADDRESSGROUP=0,UAV_ADDRESS_W=19,UAV_BURSTCOUNT_W=3,UAV_BYTEENABLE_W=4,UAV_CONSTANT_BURST_BEHAVIOR=0,UAV_DATA_W=32,USE_ADDRESS=1,USE_AV_CLKEN=0,USE_BEGINBURSTTRANSFER=0,USE_BEGINTRANSFER=0,USE_BURSTCOUNT=0,USE_BYTEENABLE=0,USE_CHIPSELECT=1,USE_DEBUGACCESS=0,USE_LOCK=0,USE_OUTPUTENABLE=0,USE_READ=0,USE_READDATA=1,USE_READDATAVALID=0,USE_READRESPONSE=0,USE_UAV_CLKEN=0,USE_WAITREQUEST=0,USE_WRITE=1,USE_WRITEBYTEENABLE=0,USE_WRITEDATA=1,USE_WRITERESPONSE=0)(altera_merlin_slave_translator:16.1:AV_ADDRESSGROUP=0,AV_ADDRESS_SYMBOLS=0,AV_ADDRESS_W=2,AV_ALWAYSBURSTMAXBURST=0,AV_BITS_PER_SYMBOL=8,AV_BURSTBOUNDARIES=0,AV_BURSTCOUNT_SYMBOLS=0,AV_BURSTCOUNT_W=1,AV_BYTEENABLE_W=1,AV_CONSTANT_BURST_BEHAVIOR=0,AV_DATA_HOLD=0,AV_DATA_HOLD_CYCLES=0,AV_DATA_W=32,AV_INTERLEAVEBURSTS=0,AV_ISBIGENDIAN=0,AV_LINEWRAPBURSTS=0,AV_MAX_PENDING_READ_TRANSACTIONS=1,AV_MAX_PENDING_WRITE_TRANSACTIONS=0,AV_READLATENCY=0,AV_READ_WAIT=1,AV_READ_WAIT_CYCLES=1,AV_REGISTERINCOMINGSIGNALS=0,AV_REGISTEROUTGOINGSIGNALS=0,AV_REQUIRE_UNALIGNED_ADDRESSES=0,AV_SETUP_WAIT=0,AV_SETUP_WAIT_CYCLES=0,AV_SYMBOLS_PER_WORD=4,AV_TIMING_UNITS=1,AV_WRITE_WAIT=0,AV_WRITE_WAIT_CYCLES=0,CHIPSELECT_THROUGH_READLATENCY=0,CLOCK_RATE=50000000,UAV_ADDRESSGROUP=0,UAV_ADDRESS_W=19,UAV_BURSTCOUNT_W=3,UAV_BYTEENABLE_W=4,UAV_CONSTANT_BURST_BEHAVIOR=0,UAV_DATA_W=32,USE_ADDRESS=1,USE_AV_CLKEN=0,USE_BEGINBURSTTRANSFER=0,USE_BEGINTRANSFER=0,USE_BURSTCOUNT=0,USE_BYTEENABLE=0,USE_CHIPSELECT=1,USE_DEBUGACCESS=0,USE_LOCK=0,USE_OUTPUTENABLE=0,USE_READ=0,USE_READDATA=1,USE_READDATAVALID=0,USE_READRESPONSE=0,USE_UAV_CLKEN=0,USE_WAITREQUEST=0,USE_WRITE=1,USE_WRITEBYTEENABLE=0,USE_WRITEDATA=1,USE_WRITERESPONSE=0)(altera_merlin_slave_translator:16.1:AV_ADDRESSGROUP=0,AV_ADDRESS_SYMBOLS=0,AV_ADDRESS_W=3,AV_ALWAYSBURSTMAXBURST=0,AV_BITS_PER_SYMBOL=8,AV_BURSTBOUNDARIES=0,AV_BURSTCOUNT_SYMBOLS=0,AV_BURSTCOUNT_W=1,AV_BYTEENABLE_W=4,AV_CONSTANT_BURST_BEHAVIOR=0,AV_DATA_HOLD=0,AV_DATA_HOLD_CYCLES=0,AV_DATA_W=32,AV_INTERLEAVEBURSTS=0,AV_ISBIGENDIAN=0,AV_LINEWRAPBURSTS=0,AV_MAX_PENDING_READ_TRANSACTIONS=1,AV_MAX_PENDING_WRITE_TRANSACTIONS=0,AV_READLATENCY=0,AV_READ_WAIT=1,AV_READ_WAIT_CYCLES=1,AV_REGISTERINCOMINGSIGNALS=0,AV_REGISTEROUTGOINGSIGNALS=0,AV_REQUIRE_UNALIGNED_ADDRESSES=0,AV_SETUP_WAIT=0,AV_SETUP_WAIT_CYCLES=0,AV_SYMBOLS_PER_WORD=4,AV_TIMING_UNITS=1,AV_WRITE_WAIT=0,AV_WRITE_WAIT_CYCLES=0,CHIPSELECT_THROUGH_READLATENCY=0,CLOCK_RATE=100000000,UAV_ADDRESSGROUP=0,UAV_ADDRESS_W=19,UAV_BURSTCOUNT_W=3,UAV_BYTEENABLE_W=4,UAV_CONSTANT_BURST_BEHAVIOR=0,UAV_DATA_W=32,USE_ADDRESS=1,USE_AV_CLKEN=0,USE_BEGINBURSTTRANSFER=0,USE_BEGINTRANSFER=0,USE_BURSTCOUNT=0,USE_BYTEENABLE=0,USE_CHIPSELECT=1,USE_DEBUGACCESS=0,USE_LOCK=0,USE_OUTPUTENABLE=0,USE_READ=1,USE_READDATA=1,USE_READDATAVALID=0,USE_READRESPONSE=0,USE_UAV_CLKEN=0,USE_WAITREQUEST=0,USE_WRITE=1,USE_WRITEBYTEENABLE=0,USE_WRITEDATA=1,USE_WRITERESPONSE=0)(altera_merlin_slave_translator:16.1:AV_ADDRESSGROUP=0,AV_ADDRESS_SYMBOLS=0,AV_ADDRESS_W=3,AV_ALWAYSBURSTMAXBURST=0,AV_BITS_PER_SYMBOL=8,AV_BURSTBOUNDARIES=0,AV_BURSTCOUNT_SYMBOLS=0,AV_BURSTCOUNT_W=1,AV_BYTEENABLE_W=1,AV_CONSTANT_BURST_BEHAVIOR=0,AV_DATA_HOLD=0,AV_DATA_HOLD_CYCLES=0,AV_DATA_W=16,AV_INTERLEAVEBURSTS=0,AV_ISBIGENDIAN=0,AV_LINEWRAPBURSTS=0,AV_MAX_PENDING_READ_TRANSACTIONS=1,AV_MAX_PENDING_WRITE_TRANSACTIONS=0,AV_READLATENCY=0,AV_READ_WAIT=1,AV_READ_WAIT_CYCLES=1,AV_REGISTERINCOMINGSIGNALS=0,AV_REGISTEROUTGOINGSIGNALS=0,AV_REQUIRE_UNALIGNED_ADDRESSES=0,AV_SETUP_WAIT=0,AV_SETUP_WAIT_CYCLES=0,AV_SYMBOLS_PER_WORD=4,AV_TIMING_UNITS=1,AV_WRITE_WAIT=1,AV_WRITE_WAIT_CYCLES=1,CHIPSELECT_THROUGH_READLATENCY=0,CLOCK_RATE=50000000,UAV_ADDRESSGROUP=0,UAV_ADDRESS_W=19,UAV_BURSTCOUNT_W=3,UAV_BYTEENABLE_W=4,UAV_CONSTANT_BURST_BEHAVIOR=0,UAV_DATA_W=32,USE_ADDRESS=1,USE_AV_CLKEN=0,USE_BEGINBURSTTRANSFER=0,USE_BEGINTRANSFER=1,USE_BURSTCOUNT=0,USE_BYTEENABLE=0,USE_CHIPSELECT=1,USE_DEBUGACCESS=0,USE_LOCK=0,USE_OUTPUTENABLE=0,USE_READ=1,USE_READDATA=1,USE_READDATAVALID=0,USE_READRESPONSE=0,USE_UAV_CLKEN=0,USE_WAITREQUEST=0,USE_WRITE=1,USE_WRITEBYTEENABLE=0,USE_WRITEDATA=1,USE_WRITERESPONSE=0)(altera_merlin_master_agent:16.1:ADDR_MAP=<?xml version="1.0" encoding="UTF-8"?>
|
|
<address_map>
|
|
<slave
|
|
id="5"
|
|
name="jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0"
|
|
start="0x00000000000410e8"
|
|
end="0x000000000000410f0"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="4"
|
|
name="i2c_opencores_mipi_avalon_slave_0_translator.avalon_universal_slave_0"
|
|
start="0x0000000000041060"
|
|
end="0x00000000000041080"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="3"
|
|
name="i2c_opencores_camera_avalon_slave_0_translator.avalon_universal_slave_0"
|
|
start="0x0000000000041040"
|
|
end="0x00000000000041060"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="13"
|
|
name="sysid_qsys_control_slave_translator.avalon_universal_slave_0"
|
|
start="0x00000000000410e0"
|
|
end="0x000000000000410e8"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="10"
|
|
name="nios2_gen2_debug_mem_slave_translator.avalon_universal_slave_0"
|
|
start="0x0000000000040800"
|
|
end="0x00000000000041000"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="1"
|
|
name="TERASIC_AUTO_FOCUS_0_mm_ctrl_translator.avalon_universal_slave_0"
|
|
start="0x0000000000041020"
|
|
end="0x00000000000041040"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="2"
|
|
name="altpll_0_pll_slave_translator.avalon_universal_slave_0"
|
|
start="0x00000000000410d0"
|
|
end="0x000000000000410e0"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="11"
|
|
name="onchip_memory2_0_s1_translator.avalon_universal_slave_0"
|
|
start="0x0000000000020000"
|
|
end="0x00000000000040000"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="14"
|
|
name="timer_s1_translator.avalon_universal_slave_0"
|
|
start="0x0000000000041000"
|
|
end="0x00000000000041020"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="7"
|
|
name="led_s1_translator.avalon_universal_slave_0"
|
|
start="0x00000000000410c0"
|
|
end="0x000000000000410d0"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="12"
|
|
name="sw_s1_translator.avalon_universal_slave_0"
|
|
start="0x00000000000410b0"
|
|
end="0x000000000000410c0"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="6"
|
|
name="key_s1_translator.avalon_universal_slave_0"
|
|
start="0x00000000000410a0"
|
|
end="0x000000000000410b0"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="9"
|
|
name="mipi_reset_n_s1_translator.avalon_universal_slave_0"
|
|
start="0x0000000000041090"
|
|
end="0x000000000000410a0"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="8"
|
|
name="mipi_pwdn_n_s1_translator.avalon_universal_slave_0"
|
|
start="0x0000000000041080"
|
|
end="0x00000000000041090"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="0"
|
|
name="EEE_IMGPROC_0_s1_translator.avalon_universal_slave_0"
|
|
start="0x0000000000042000"
|
|
end="0x00000000000042020"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="15"
|
|
name="uart_0_s1_translator.avalon_universal_slave_0"
|
|
start="0x0000000000042020"
|
|
end="0x00000000000042040"
|
|
responds="1"
|
|
user_default="0" />
|
|
</address_map>
|
|
,AV_BURSTBOUNDARIES=1,AV_BURSTCOUNT_W=3,AV_LINEWRAPBURSTS=0,BURSTWRAP_VALUE=7,CACHE_VALUE=0,ID=0,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_ADDR_SIDEBAND_H=72,PKT_ADDR_SIDEBAND_L=72,PKT_BEGIN_BURST=74,PKT_BURSTWRAP_H=66,PKT_BURSTWRAP_L=64,PKT_BURST_SIZE_H=69,PKT_BURST_SIZE_L=67,PKT_BURST_TYPE_H=71,PKT_BURST_TYPE_L=70,PKT_BYTEEN_H=35,PKT_BYTEEN_L=32,PKT_BYTE_CNT_H=63,PKT_BYTE_CNT_L=61,PKT_CACHE_H=91,PKT_CACHE_L=88,PKT_DATA_H=31,PKT_DATA_L=0,PKT_DATA_SIDEBAND_H=73,PKT_DATA_SIDEBAND_L=73,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_ORI_BURST_SIZE_H=96,PKT_ORI_BURST_SIZE_L=94,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_QOS_H=75,PKT_QOS_L=75,PKT_RESPONSE_STATUS_H=93,PKT_RESPONSE_STATUS_L=92,PKT_SRC_ID_H=79,PKT_SRC_ID_L=76,PKT_THREAD_ID_H=84,PKT_THREAD_ID_L=84,PKT_TRANS_COMPRESSED_READ=55,PKT_TRANS_EXCLUSIVE=60,PKT_TRANS_LOCK=59,PKT_TRANS_POSTED=56,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,SECURE_ACCESS_BIT=1,ST_CHANNEL_W=16,ST_DATA_W=97,SUPPRESS_0_BYTEEN_RSP=0,USE_READRESPONSE=0,USE_WRITERESPONSE=0)(altera_merlin_master_agent:16.1:ADDR_MAP=<?xml version="1.0" encoding="UTF-8"?>
|
|
<address_map>
|
|
<slave
|
|
id="11"
|
|
name="onchip_memory2_0_s1_translator.avalon_universal_slave_0"
|
|
start="0x0000000000020000"
|
|
end="0x00000000000040000"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="10"
|
|
name="nios2_gen2_debug_mem_slave_translator.avalon_universal_slave_0"
|
|
start="0x0000000000040800"
|
|
end="0x00000000000041000"
|
|
responds="1"
|
|
user_default="0" />
|
|
</address_map>
|
|
,AV_BURSTBOUNDARIES=0,AV_BURSTCOUNT_W=3,AV_LINEWRAPBURSTS=1,BURSTWRAP_VALUE=3,CACHE_VALUE=0,ID=1,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_ADDR_SIDEBAND_H=72,PKT_ADDR_SIDEBAND_L=72,PKT_BEGIN_BURST=74,PKT_BURSTWRAP_H=66,PKT_BURSTWRAP_L=64,PKT_BURST_SIZE_H=69,PKT_BURST_SIZE_L=67,PKT_BURST_TYPE_H=71,PKT_BURST_TYPE_L=70,PKT_BYTEEN_H=35,PKT_BYTEEN_L=32,PKT_BYTE_CNT_H=63,PKT_BYTE_CNT_L=61,PKT_CACHE_H=91,PKT_CACHE_L=88,PKT_DATA_H=31,PKT_DATA_L=0,PKT_DATA_SIDEBAND_H=73,PKT_DATA_SIDEBAND_L=73,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_ORI_BURST_SIZE_H=96,PKT_ORI_BURST_SIZE_L=94,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_QOS_H=75,PKT_QOS_L=75,PKT_RESPONSE_STATUS_H=93,PKT_RESPONSE_STATUS_L=92,PKT_SRC_ID_H=79,PKT_SRC_ID_L=76,PKT_THREAD_ID_H=84,PKT_THREAD_ID_L=84,PKT_TRANS_COMPRESSED_READ=55,PKT_TRANS_EXCLUSIVE=60,PKT_TRANS_LOCK=59,PKT_TRANS_POSTED=56,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,SECURE_ACCESS_BIT=1,ST_CHANNEL_W=16,ST_DATA_W=97,SUPPRESS_0_BYTEEN_RSP=0,USE_READRESPONSE=0,USE_WRITERESPONSE=0)(altera_merlin_slave_agent:16.1:AVS_BURSTCOUNT_SYMBOLS=0,AVS_BURSTCOUNT_W=3,AV_LINEWRAPBURSTS=0,ECC_ENABLE=0,ID=5,MAX_BURSTWRAP=7,MAX_BYTE_CNT=4,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_BEGIN_BURST=74,PKT_BURSTWRAP_H=66,PKT_BURSTWRAP_L=64,PKT_BURST_SIZE_H=69,PKT_BURST_SIZE_L=67,PKT_BYTEEN_H=35,PKT_BYTEEN_L=32,PKT_BYTE_CNT_H=63,PKT_BYTE_CNT_L=61,PKT_DATA_H=31,PKT_DATA_L=0,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_ORI_BURST_SIZE_H=96,PKT_ORI_BURST_SIZE_L=94,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_RESPONSE_STATUS_H=93,PKT_RESPONSE_STATUS_L=92,PKT_SRC_ID_H=79,PKT_SRC_ID_L=76,PKT_SYMBOL_W=8,PKT_TRANS_COMPRESSED_READ=55,PKT_TRANS_LOCK=59,PKT_TRANS_POSTED=56,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,PREVENT_FIFO_OVERFLOW=1,ST_CHANNEL_W=16,ST_DATA_W=97,SUPPRESS_0_BYTEEN_CMD=0,USE_READRESPONSE=0,USE_WRITERESPONSE=0)(altera_avalon_sc_fifo:16.1:BITS_PER_SYMBOL=98,CHANNEL_WIDTH=0,EMPTY_LATENCY=1,ENABLE_EXPLICIT_MAXCHANNEL=false,ERROR_WIDTH=0,EXPLICIT_MAXCHANNEL=0,FIFO_DEPTH=2,SYMBOLS_PER_BEAT=1,USE_ALMOST_EMPTY_IF=0,USE_ALMOST_FULL_IF=0,USE_FILL_LEVEL=0,USE_MEMORY_BLOCKS=0,USE_PACKETS=1,USE_STORE_FORWARD=0)(altera_merlin_slave_agent:16.1:AVS_BURSTCOUNT_SYMBOLS=0,AVS_BURSTCOUNT_W=3,AV_LINEWRAPBURSTS=0,ECC_ENABLE=0,ID=4,MAX_BURSTWRAP=7,MAX_BYTE_CNT=4,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_BEGIN_BURST=74,PKT_BURSTWRAP_H=66,PKT_BURSTWRAP_L=64,PKT_BURST_SIZE_H=69,PKT_BURST_SIZE_L=67,PKT_BYTEEN_H=35,PKT_BYTEEN_L=32,PKT_BYTE_CNT_H=63,PKT_BYTE_CNT_L=61,PKT_DATA_H=31,PKT_DATA_L=0,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_ORI_BURST_SIZE_H=96,PKT_ORI_BURST_SIZE_L=94,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_RESPONSE_STATUS_H=93,PKT_RESPONSE_STATUS_L=92,PKT_SRC_ID_H=79,PKT_SRC_ID_L=76,PKT_SYMBOL_W=8,PKT_TRANS_COMPRESSED_READ=55,PKT_TRANS_LOCK=59,PKT_TRANS_POSTED=56,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,PREVENT_FIFO_OVERFLOW=1,ST_CHANNEL_W=16,ST_DATA_W=97,SUPPRESS_0_BYTEEN_CMD=0,USE_READRESPONSE=0,USE_WRITERESPONSE=0)(altera_avalon_sc_fifo:16.1:BITS_PER_SYMBOL=98,CHANNEL_WIDTH=0,EMPTY_LATENCY=1,ENABLE_EXPLICIT_MAXCHANNEL=false,ERROR_WIDTH=0,EXPLICIT_MAXCHANNEL=0,FIFO_DEPTH=2,SYMBOLS_PER_BEAT=1,USE_ALMOST_EMPTY_IF=0,USE_ALMOST_FULL_IF=0,USE_FILL_LEVEL=0,USE_MEMORY_BLOCKS=0,USE_PACKETS=1,USE_STORE_FORWARD=0)(altera_merlin_slave_agent:16.1:AVS_BURSTCOUNT_SYMBOLS=0,AVS_BURSTCOUNT_W=3,AV_LINEWRAPBURSTS=0,ECC_ENABLE=0,ID=3,MAX_BURSTWRAP=7,MAX_BYTE_CNT=4,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_BEGIN_BURST=74,PKT_BURSTWRAP_H=66,PKT_BURSTWRAP_L=64,PKT_BURST_SIZE_H=69,PKT_BURST_SIZE_L=67,PKT_BYTEEN_H=35,PKT_BYTEEN_L=32,PKT_BYTE_CNT_H=63,PKT_BYTE_CNT_L=61,PKT_DATA_H=31,PKT_DATA_L=0,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_ORI_BURST_SIZE_H=96,PKT_ORI_BURST_SIZE_L=94,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_RESPONSE_STATUS_H=93,PKT_RESPONSE_STATUS_L=92,PKT_SRC_ID_H=79,PKT_SRC_ID_L=76,PKT_SYMBOL_W=8,PKT_TRANS_COMPRESSED_READ=55,PKT_TRANS_LOCK=59,PKT_TRANS_POSTED=56,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,PREVENT_FIFO_OVERFLOW=1,ST_CHANNEL_W=16,ST_DATA_W=97,SUPPRESS_0_BYTEEN_CMD=0,USE_READRESPONSE=0,USE_WRITERESPONSE=0)(altera_avalon_sc_fifo:16.1:BITS_PER_SYMBOL=98,CHANNEL_WIDTH=0,EMPTY_LATENCY=1,ENABLE_EXPLICIT_MAXCHANNEL=false,ERROR_WIDTH=0,EXPLICIT_MAXCHANNEL=0,FIFO_DEPTH=2,SYMBOLS_PER_BEAT=1,USE_ALMOST_EMPTY_IF=0,USE_ALMOST_FULL_IF=0,USE_FILL_LEVEL=0,USE_MEMORY_BLOCKS=0,USE_PACKETS=1,USE_STORE_FORWARD=0)(altera_merlin_slave_agent:16.1:AVS_BURSTCOUNT_SYMBOLS=0,AVS_BURSTCOUNT_W=3,AV_LINEWRAPBURSTS=0,ECC_ENABLE=0,ID=13,MAX_BURSTWRAP=7,MAX_BYTE_CNT=4,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_BEGIN_BURST=74,PKT_BURSTWRAP_H=66,PKT_BURSTWRAP_L=64,PKT_BURST_SIZE_H=69,PKT_BURST_SIZE_L=67,PKT_BYTEEN_H=35,PKT_BYTEEN_L=32,PKT_BYTE_CNT_H=63,PKT_BYTE_CNT_L=61,PKT_DATA_H=31,PKT_DATA_L=0,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_ORI_BURST_SIZE_H=96,PKT_ORI_BURST_SIZE_L=94,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_RESPONSE_STATUS_H=93,PKT_RESPONSE_STATUS_L=92,PKT_SRC_ID_H=79,PKT_SRC_ID_L=76,PKT_SYMBOL_W=8,PKT_TRANS_COMPRESSED_READ=55,PKT_TRANS_LOCK=59,PKT_TRANS_POSTED=56,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,PREVENT_FIFO_OVERFLOW=1,ST_CHANNEL_W=16,ST_DATA_W=97,SUPPRESS_0_BYTEEN_CMD=0,USE_READRESPONSE=0,USE_WRITERESPONSE=0)(altera_avalon_sc_fifo:16.1:BITS_PER_SYMBOL=98,CHANNEL_WIDTH=0,EMPTY_LATENCY=1,ENABLE_EXPLICIT_MAXCHANNEL=false,ERROR_WIDTH=0,EXPLICIT_MAXCHANNEL=0,FIFO_DEPTH=2,SYMBOLS_PER_BEAT=1,USE_ALMOST_EMPTY_IF=0,USE_ALMOST_FULL_IF=0,USE_FILL_LEVEL=0,USE_MEMORY_BLOCKS=0,USE_PACKETS=1,USE_STORE_FORWARD=0)(altera_merlin_slave_agent:16.1:AVS_BURSTCOUNT_SYMBOLS=0,AVS_BURSTCOUNT_W=3,AV_LINEWRAPBURSTS=0,ECC_ENABLE=0,ID=10,MAX_BURSTWRAP=7,MAX_BYTE_CNT=4,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_BEGIN_BURST=74,PKT_BURSTWRAP_H=66,PKT_BURSTWRAP_L=64,PKT_BURST_SIZE_H=69,PKT_BURST_SIZE_L=67,PKT_BYTEEN_H=35,PKT_BYTEEN_L=32,PKT_BYTE_CNT_H=63,PKT_BYTE_CNT_L=61,PKT_DATA_H=31,PKT_DATA_L=0,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_ORI_BURST_SIZE_H=96,PKT_ORI_BURST_SIZE_L=94,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_RESPONSE_STATUS_H=93,PKT_RESPONSE_STATUS_L=92,PKT_SRC_ID_H=79,PKT_SRC_ID_L=76,PKT_SYMBOL_W=8,PKT_TRANS_COMPRESSED_READ=55,PKT_TRANS_LOCK=59,PKT_TRANS_POSTED=56,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,PREVENT_FIFO_OVERFLOW=1,ST_CHANNEL_W=16,ST_DATA_W=97,SUPPRESS_0_BYTEEN_CMD=0,USE_READRESPONSE=0,USE_WRITERESPONSE=0)(altera_avalon_sc_fifo:16.1:BITS_PER_SYMBOL=98,CHANNEL_WIDTH=0,EMPTY_LATENCY=1,ENABLE_EXPLICIT_MAXCHANNEL=false,ERROR_WIDTH=0,EXPLICIT_MAXCHANNEL=0,FIFO_DEPTH=2,SYMBOLS_PER_BEAT=1,USE_ALMOST_EMPTY_IF=0,USE_ALMOST_FULL_IF=0,USE_FILL_LEVEL=0,USE_MEMORY_BLOCKS=0,USE_PACKETS=1,USE_STORE_FORWARD=0)(altera_merlin_slave_agent:16.1:AVS_BURSTCOUNT_SYMBOLS=0,AVS_BURSTCOUNT_W=3,AV_LINEWRAPBURSTS=0,ECC_ENABLE=0,ID=1,MAX_BURSTWRAP=7,MAX_BYTE_CNT=4,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_BEGIN_BURST=74,PKT_BURSTWRAP_H=66,PKT_BURSTWRAP_L=64,PKT_BURST_SIZE_H=69,PKT_BURST_SIZE_L=67,PKT_BYTEEN_H=35,PKT_BYTEEN_L=32,PKT_BYTE_CNT_H=63,PKT_BYTE_CNT_L=61,PKT_DATA_H=31,PKT_DATA_L=0,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_ORI_BURST_SIZE_H=96,PKT_ORI_BURST_SIZE_L=94,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_RESPONSE_STATUS_H=93,PKT_RESPONSE_STATUS_L=92,PKT_SRC_ID_H=79,PKT_SRC_ID_L=76,PKT_SYMBOL_W=8,PKT_TRANS_COMPRESSED_READ=55,PKT_TRANS_LOCK=59,PKT_TRANS_POSTED=56,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,PREVENT_FIFO_OVERFLOW=1,ST_CHANNEL_W=16,ST_DATA_W=97,SUPPRESS_0_BYTEEN_CMD=0,USE_READRESPONSE=0,USE_WRITERESPONSE=0)(altera_avalon_sc_fifo:16.1:BITS_PER_SYMBOL=98,CHANNEL_WIDTH=0,EMPTY_LATENCY=1,ENABLE_EXPLICIT_MAXCHANNEL=false,ERROR_WIDTH=0,EXPLICIT_MAXCHANNEL=0,FIFO_DEPTH=2,SYMBOLS_PER_BEAT=1,USE_ALMOST_EMPTY_IF=0,USE_ALMOST_FULL_IF=0,USE_FILL_LEVEL=0,USE_MEMORY_BLOCKS=0,USE_PACKETS=1,USE_STORE_FORWARD=0)(altera_avalon_sc_fifo:16.1:BITS_PER_SYMBOL=34,CHANNEL_WIDTH=0,EMPTY_LATENCY=0,ENABLE_EXPLICIT_MAXCHANNEL=false,ERROR_WIDTH=0,EXPLICIT_MAXCHANNEL=0,FIFO_DEPTH=2,SYMBOLS_PER_BEAT=1,USE_ALMOST_EMPTY_IF=0,USE_ALMOST_FULL_IF=0,USE_FILL_LEVEL=0,USE_MEMORY_BLOCKS=0,USE_PACKETS=0,USE_STORE_FORWARD=0)(altera_merlin_slave_agent:16.1:AVS_BURSTCOUNT_SYMBOLS=0,AVS_BURSTCOUNT_W=3,AV_LINEWRAPBURSTS=0,ECC_ENABLE=0,ID=2,MAX_BURSTWRAP=7,MAX_BYTE_CNT=4,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_BEGIN_BURST=74,PKT_BURSTWRAP_H=66,PKT_BURSTWRAP_L=64,PKT_BURST_SIZE_H=69,PKT_BURST_SIZE_L=67,PKT_BYTEEN_H=35,PKT_BYTEEN_L=32,PKT_BYTE_CNT_H=63,PKT_BYTE_CNT_L=61,PKT_DATA_H=31,PKT_DATA_L=0,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_ORI_BURST_SIZE_H=96,PKT_ORI_BURST_SIZE_L=94,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_RESPONSE_STATUS_H=93,PKT_RESPONSE_STATUS_L=92,PKT_SRC_ID_H=79,PKT_SRC_ID_L=76,PKT_SYMBOL_W=8,PKT_TRANS_COMPRESSED_READ=55,PKT_TRANS_LOCK=59,PKT_TRANS_POSTED=56,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,PREVENT_FIFO_OVERFLOW=1,ST_CHANNEL_W=16,ST_DATA_W=97,SUPPRESS_0_BYTEEN_CMD=0,USE_READRESPONSE=0,USE_WRITERESPONSE=0)(altera_avalon_sc_fifo:16.1:BITS_PER_SYMBOL=98,CHANNEL_WIDTH=0,EMPTY_LATENCY=1,ENABLE_EXPLICIT_MAXCHANNEL=false,ERROR_WIDTH=0,EXPLICIT_MAXCHANNEL=0,FIFO_DEPTH=2,SYMBOLS_PER_BEAT=1,USE_ALMOST_EMPTY_IF=0,USE_ALMOST_FULL_IF=0,USE_FILL_LEVEL=0,USE_MEMORY_BLOCKS=0,USE_PACKETS=1,USE_STORE_FORWARD=0)(altera_merlin_slave_agent:16.1:AVS_BURSTCOUNT_SYMBOLS=0,AVS_BURSTCOUNT_W=3,AV_LINEWRAPBURSTS=0,ECC_ENABLE=0,ID=11,MAX_BURSTWRAP=7,MAX_BYTE_CNT=4,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_BEGIN_BURST=74,PKT_BURSTWRAP_H=66,PKT_BURSTWRAP_L=64,PKT_BURST_SIZE_H=69,PKT_BURST_SIZE_L=67,PKT_BYTEEN_H=35,PKT_BYTEEN_L=32,PKT_BYTE_CNT_H=63,PKT_BYTE_CNT_L=61,PKT_DATA_H=31,PKT_DATA_L=0,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_ORI_BURST_SIZE_H=96,PKT_ORI_BURST_SIZE_L=94,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_RESPONSE_STATUS_H=93,PKT_RESPONSE_STATUS_L=92,PKT_SRC_ID_H=79,PKT_SRC_ID_L=76,PKT_SYMBOL_W=8,PKT_TRANS_COMPRESSED_READ=55,PKT_TRANS_LOCK=59,PKT_TRANS_POSTED=56,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,PREVENT_FIFO_OVERFLOW=1,ST_CHANNEL_W=16,ST_DATA_W=97,SUPPRESS_0_BYTEEN_CMD=0,USE_READRESPONSE=0,USE_WRITERESPONSE=0)(altera_avalon_sc_fifo:16.1:BITS_PER_SYMBOL=98,CHANNEL_WIDTH=0,EMPTY_LATENCY=1,ENABLE_EXPLICIT_MAXCHANNEL=false,ERROR_WIDTH=0,EXPLICIT_MAXCHANNEL=0,FIFO_DEPTH=2,SYMBOLS_PER_BEAT=1,USE_ALMOST_EMPTY_IF=0,USE_ALMOST_FULL_IF=0,USE_FILL_LEVEL=0,USE_MEMORY_BLOCKS=0,USE_PACKETS=1,USE_STORE_FORWARD=0)(altera_merlin_slave_agent:16.1:AVS_BURSTCOUNT_SYMBOLS=0,AVS_BURSTCOUNT_W=3,AV_LINEWRAPBURSTS=0,ECC_ENABLE=0,ID=14,MAX_BURSTWRAP=7,MAX_BYTE_CNT=4,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_BEGIN_BURST=74,PKT_BURSTWRAP_H=66,PKT_BURSTWRAP_L=64,PKT_BURST_SIZE_H=69,PKT_BURST_SIZE_L=67,PKT_BYTEEN_H=35,PKT_BYTEEN_L=32,PKT_BYTE_CNT_H=63,PKT_BYTE_CNT_L=61,PKT_DATA_H=31,PKT_DATA_L=0,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_ORI_BURST_SIZE_H=96,PKT_ORI_BURST_SIZE_L=94,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_RESPONSE_STATUS_H=93,PKT_RESPONSE_STATUS_L=92,PKT_SRC_ID_H=79,PKT_SRC_ID_L=76,PKT_SYMBOL_W=8,PKT_TRANS_COMPRESSED_READ=55,PKT_TRANS_LOCK=59,PKT_TRANS_POSTED=56,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,PREVENT_FIFO_OVERFLOW=1,ST_CHANNEL_W=16,ST_DATA_W=97,SUPPRESS_0_BYTEEN_CMD=0,USE_READRESPONSE=0,USE_WRITERESPONSE=0)(altera_avalon_sc_fifo:16.1:BITS_PER_SYMBOL=98,CHANNEL_WIDTH=0,EMPTY_LATENCY=1,ENABLE_EXPLICIT_MAXCHANNEL=false,ERROR_WIDTH=0,EXPLICIT_MAXCHANNEL=0,FIFO_DEPTH=2,SYMBOLS_PER_BEAT=1,USE_ALMOST_EMPTY_IF=0,USE_ALMOST_FULL_IF=0,USE_FILL_LEVEL=0,USE_MEMORY_BLOCKS=0,USE_PACKETS=1,USE_STORE_FORWARD=0)(altera_merlin_slave_agent:16.1:AVS_BURSTCOUNT_SYMBOLS=0,AVS_BURSTCOUNT_W=3,AV_LINEWRAPBURSTS=0,ECC_ENABLE=0,ID=7,MAX_BURSTWRAP=7,MAX_BYTE_CNT=4,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_BEGIN_BURST=74,PKT_BURSTWRAP_H=66,PKT_BURSTWRAP_L=64,PKT_BURST_SIZE_H=69,PKT_BURST_SIZE_L=67,PKT_BYTEEN_H=35,PKT_BYTEEN_L=32,PKT_BYTE_CNT_H=63,PKT_BYTE_CNT_L=61,PKT_DATA_H=31,PKT_DATA_L=0,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_ORI_BURST_SIZE_H=96,PKT_ORI_BURST_SIZE_L=94,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_RESPONSE_STATUS_H=93,PKT_RESPONSE_STATUS_L=92,PKT_SRC_ID_H=79,PKT_SRC_ID_L=76,PKT_SYMBOL_W=8,PKT_TRANS_COMPRESSED_READ=55,PKT_TRANS_LOCK=59,PKT_TRANS_POSTED=56,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,PREVENT_FIFO_OVERFLOW=1,ST_CHANNEL_W=16,ST_DATA_W=97,SUPPRESS_0_BYTEEN_CMD=0,USE_READRESPONSE=0,USE_WRITERESPONSE=0)(altera_avalon_sc_fifo:16.1:BITS_PER_SYMBOL=98,CHANNEL_WIDTH=0,EMPTY_LATENCY=1,ENABLE_EXPLICIT_MAXCHANNEL=false,ERROR_WIDTH=0,EXPLICIT_MAXCHANNEL=0,FIFO_DEPTH=2,SYMBOLS_PER_BEAT=1,USE_ALMOST_EMPTY_IF=0,USE_ALMOST_FULL_IF=0,USE_FILL_LEVEL=0,USE_MEMORY_BLOCKS=0,USE_PACKETS=1,USE_STORE_FORWARD=0)(altera_merlin_slave_agent:16.1:AVS_BURSTCOUNT_SYMBOLS=0,AVS_BURSTCOUNT_W=3,AV_LINEWRAPBURSTS=0,ECC_ENABLE=0,ID=12,MAX_BURSTWRAP=7,MAX_BYTE_CNT=4,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_BEGIN_BURST=74,PKT_BURSTWRAP_H=66,PKT_BURSTWRAP_L=64,PKT_BURST_SIZE_H=69,PKT_BURST_SIZE_L=67,PKT_BYTEEN_H=35,PKT_BYTEEN_L=32,PKT_BYTE_CNT_H=63,PKT_BYTE_CNT_L=61,PKT_DATA_H=31,PKT_DATA_L=0,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_ORI_BURST_SIZE_H=96,PKT_ORI_BURST_SIZE_L=94,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_RESPONSE_STATUS_H=93,PKT_RESPONSE_STATUS_L=92,PKT_SRC_ID_H=79,PKT_SRC_ID_L=76,PKT_SYMBOL_W=8,PKT_TRANS_COMPRESSED_READ=55,PKT_TRANS_LOCK=59,PKT_TRANS_POSTED=56,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,PREVENT_FIFO_OVERFLOW=1,ST_CHANNEL_W=16,ST_DATA_W=97,SUPPRESS_0_BYTEEN_CMD=0,USE_READRESPONSE=0,USE_WRITERESPONSE=0)(altera_avalon_sc_fifo:16.1:BITS_PER_SYMBOL=98,CHANNEL_WIDTH=0,EMPTY_LATENCY=1,ENABLE_EXPLICIT_MAXCHANNEL=false,ERROR_WIDTH=0,EXPLICIT_MAXCHANNEL=0,FIFO_DEPTH=2,SYMBOLS_PER_BEAT=1,USE_ALMOST_EMPTY_IF=0,USE_ALMOST_FULL_IF=0,USE_FILL_LEVEL=0,USE_MEMORY_BLOCKS=0,USE_PACKETS=1,USE_STORE_FORWARD=0)(altera_merlin_slave_agent:16.1:AVS_BURSTCOUNT_SYMBOLS=0,AVS_BURSTCOUNT_W=3,AV_LINEWRAPBURSTS=0,ECC_ENABLE=0,ID=6,MAX_BURSTWRAP=7,MAX_BYTE_CNT=4,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_BEGIN_BURST=74,PKT_BURSTWRAP_H=66,PKT_BURSTWRAP_L=64,PKT_BURST_SIZE_H=69,PKT_BURST_SIZE_L=67,PKT_BYTEEN_H=35,PKT_BYTEEN_L=32,PKT_BYTE_CNT_H=63,PKT_BYTE_CNT_L=61,PKT_DATA_H=31,PKT_DATA_L=0,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_ORI_BURST_SIZE_H=96,PKT_ORI_BURST_SIZE_L=94,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_RESPONSE_STATUS_H=93,PKT_RESPONSE_STATUS_L=92,PKT_SRC_ID_H=79,PKT_SRC_ID_L=76,PKT_SYMBOL_W=8,PKT_TRANS_COMPRESSED_READ=55,PKT_TRANS_LOCK=59,PKT_TRANS_POSTED=56,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,PREVENT_FIFO_OVERFLOW=1,ST_CHANNEL_W=16,ST_DATA_W=97,SUPPRESS_0_BYTEEN_CMD=0,USE_READRESPONSE=0,USE_WRITERESPONSE=0)(altera_avalon_sc_fifo:16.1:BITS_PER_SYMBOL=98,CHANNEL_WIDTH=0,EMPTY_LATENCY=1,ENABLE_EXPLICIT_MAXCHANNEL=false,ERROR_WIDTH=0,EXPLICIT_MAXCHANNEL=0,FIFO_DEPTH=2,SYMBOLS_PER_BEAT=1,USE_ALMOST_EMPTY_IF=0,USE_ALMOST_FULL_IF=0,USE_FILL_LEVEL=0,USE_MEMORY_BLOCKS=0,USE_PACKETS=1,USE_STORE_FORWARD=0)(altera_merlin_slave_agent:16.1:AVS_BURSTCOUNT_SYMBOLS=0,AVS_BURSTCOUNT_W=3,AV_LINEWRAPBURSTS=0,ECC_ENABLE=0,ID=9,MAX_BURSTWRAP=7,MAX_BYTE_CNT=4,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_BEGIN_BURST=74,PKT_BURSTWRAP_H=66,PKT_BURSTWRAP_L=64,PKT_BURST_SIZE_H=69,PKT_BURST_SIZE_L=67,PKT_BYTEEN_H=35,PKT_BYTEEN_L=32,PKT_BYTE_CNT_H=63,PKT_BYTE_CNT_L=61,PKT_DATA_H=31,PKT_DATA_L=0,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_ORI_BURST_SIZE_H=96,PKT_ORI_BURST_SIZE_L=94,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_RESPONSE_STATUS_H=93,PKT_RESPONSE_STATUS_L=92,PKT_SRC_ID_H=79,PKT_SRC_ID_L=76,PKT_SYMBOL_W=8,PKT_TRANS_COMPRESSED_READ=55,PKT_TRANS_LOCK=59,PKT_TRANS_POSTED=56,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,PREVENT_FIFO_OVERFLOW=1,ST_CHANNEL_W=16,ST_DATA_W=97,SUPPRESS_0_BYTEEN_CMD=0,USE_READRESPONSE=0,USE_WRITERESPONSE=0)(altera_avalon_sc_fifo:16.1:BITS_PER_SYMBOL=98,CHANNEL_WIDTH=0,EMPTY_LATENCY=1,ENABLE_EXPLICIT_MAXCHANNEL=false,ERROR_WIDTH=0,EXPLICIT_MAXCHANNEL=0,FIFO_DEPTH=2,SYMBOLS_PER_BEAT=1,USE_ALMOST_EMPTY_IF=0,USE_ALMOST_FULL_IF=0,USE_FILL_LEVEL=0,USE_MEMORY_BLOCKS=0,USE_PACKETS=1,USE_STORE_FORWARD=0)(altera_merlin_slave_agent:16.1:AVS_BURSTCOUNT_SYMBOLS=0,AVS_BURSTCOUNT_W=3,AV_LINEWRAPBURSTS=0,ECC_ENABLE=0,ID=8,MAX_BURSTWRAP=7,MAX_BYTE_CNT=4,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_BEGIN_BURST=74,PKT_BURSTWRAP_H=66,PKT_BURSTWRAP_L=64,PKT_BURST_SIZE_H=69,PKT_BURST_SIZE_L=67,PKT_BYTEEN_H=35,PKT_BYTEEN_L=32,PKT_BYTE_CNT_H=63,PKT_BYTE_CNT_L=61,PKT_DATA_H=31,PKT_DATA_L=0,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_ORI_BURST_SIZE_H=96,PKT_ORI_BURST_SIZE_L=94,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_RESPONSE_STATUS_H=93,PKT_RESPONSE_STATUS_L=92,PKT_SRC_ID_H=79,PKT_SRC_ID_L=76,PKT_SYMBOL_W=8,PKT_TRANS_COMPRESSED_READ=55,PKT_TRANS_LOCK=59,PKT_TRANS_POSTED=56,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,PREVENT_FIFO_OVERFLOW=1,ST_CHANNEL_W=16,ST_DATA_W=97,SUPPRESS_0_BYTEEN_CMD=0,USE_READRESPONSE=0,USE_WRITERESPONSE=0)(altera_avalon_sc_fifo:16.1:BITS_PER_SYMBOL=98,CHANNEL_WIDTH=0,EMPTY_LATENCY=1,ENABLE_EXPLICIT_MAXCHANNEL=false,ERROR_WIDTH=0,EXPLICIT_MAXCHANNEL=0,FIFO_DEPTH=2,SYMBOLS_PER_BEAT=1,USE_ALMOST_EMPTY_IF=0,USE_ALMOST_FULL_IF=0,USE_FILL_LEVEL=0,USE_MEMORY_BLOCKS=0,USE_PACKETS=1,USE_STORE_FORWARD=0)(altera_merlin_slave_agent:16.1:AVS_BURSTCOUNT_SYMBOLS=0,AVS_BURSTCOUNT_W=3,AV_LINEWRAPBURSTS=0,ECC_ENABLE=0,ID=0,MAX_BURSTWRAP=7,MAX_BYTE_CNT=4,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_BEGIN_BURST=74,PKT_BURSTWRAP_H=66,PKT_BURSTWRAP_L=64,PKT_BURST_SIZE_H=69,PKT_BURST_SIZE_L=67,PKT_BYTEEN_H=35,PKT_BYTEEN_L=32,PKT_BYTE_CNT_H=63,PKT_BYTE_CNT_L=61,PKT_DATA_H=31,PKT_DATA_L=0,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_ORI_BURST_SIZE_H=96,PKT_ORI_BURST_SIZE_L=94,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_RESPONSE_STATUS_H=93,PKT_RESPONSE_STATUS_L=92,PKT_SRC_ID_H=79,PKT_SRC_ID_L=76,PKT_SYMBOL_W=8,PKT_TRANS_COMPRESSED_READ=55,PKT_TRANS_LOCK=59,PKT_TRANS_POSTED=56,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,PREVENT_FIFO_OVERFLOW=1,ST_CHANNEL_W=16,ST_DATA_W=97,SUPPRESS_0_BYTEEN_CMD=0,USE_READRESPONSE=0,USE_WRITERESPONSE=0)(altera_avalon_sc_fifo:16.1:BITS_PER_SYMBOL=98,CHANNEL_WIDTH=0,EMPTY_LATENCY=1,ENABLE_EXPLICIT_MAXCHANNEL=false,ERROR_WIDTH=0,EXPLICIT_MAXCHANNEL=0,FIFO_DEPTH=2,SYMBOLS_PER_BEAT=1,USE_ALMOST_EMPTY_IF=0,USE_ALMOST_FULL_IF=0,USE_FILL_LEVEL=0,USE_MEMORY_BLOCKS=0,USE_PACKETS=1,USE_STORE_FORWARD=0)(altera_avalon_sc_fifo:16.1:BITS_PER_SYMBOL=34,CHANNEL_WIDTH=0,EMPTY_LATENCY=0,ENABLE_EXPLICIT_MAXCHANNEL=false,ERROR_WIDTH=0,EXPLICIT_MAXCHANNEL=0,FIFO_DEPTH=2,SYMBOLS_PER_BEAT=1,USE_ALMOST_EMPTY_IF=0,USE_ALMOST_FULL_IF=0,USE_FILL_LEVEL=0,USE_MEMORY_BLOCKS=0,USE_PACKETS=0,USE_STORE_FORWARD=0)(altera_merlin_slave_agent:16.1:AVS_BURSTCOUNT_SYMBOLS=0,AVS_BURSTCOUNT_W=3,AV_LINEWRAPBURSTS=0,ECC_ENABLE=0,ID=15,MAX_BURSTWRAP=7,MAX_BYTE_CNT=4,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_BEGIN_BURST=74,PKT_BURSTWRAP_H=66,PKT_BURSTWRAP_L=64,PKT_BURST_SIZE_H=69,PKT_BURST_SIZE_L=67,PKT_BYTEEN_H=35,PKT_BYTEEN_L=32,PKT_BYTE_CNT_H=63,PKT_BYTE_CNT_L=61,PKT_DATA_H=31,PKT_DATA_L=0,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_ORI_BURST_SIZE_H=96,PKT_ORI_BURST_SIZE_L=94,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_RESPONSE_STATUS_H=93,PKT_RESPONSE_STATUS_L=92,PKT_SRC_ID_H=79,PKT_SRC_ID_L=76,PKT_SYMBOL_W=8,PKT_TRANS_COMPRESSED_READ=55,PKT_TRANS_LOCK=59,PKT_TRANS_POSTED=56,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,PREVENT_FIFO_OVERFLOW=1,ST_CHANNEL_W=16,ST_DATA_W=97,SUPPRESS_0_BYTEEN_CMD=0,USE_READRESPONSE=0,USE_WRITERESPONSE=0)(altera_avalon_sc_fifo:16.1:BITS_PER_SYMBOL=98,CHANNEL_WIDTH=0,EMPTY_LATENCY=1,ENABLE_EXPLICIT_MAXCHANNEL=false,ERROR_WIDTH=0,EXPLICIT_MAXCHANNEL=0,FIFO_DEPTH=2,SYMBOLS_PER_BEAT=1,USE_ALMOST_EMPTY_IF=0,USE_ALMOST_FULL_IF=0,USE_FILL_LEVEL=0,USE_MEMORY_BLOCKS=0,USE_PACKETS=1,USE_STORE_FORWARD=0)(altera_merlin_router:16.1:CHANNEL_ID=0000000010000000,0000000000010000,0000000100000000,0000000000100000,0000000000000100,0000000000000010,0010000000000000,0001000000000000,0000100000000000,0000010000000000,0000001000000000,0000000001000000,0000000000001000,0000000000000001,0100000000000000,1000000000000000,DECODER_TYPE=0,DEFAULT_CHANNEL=7,DEFAULT_DESTID=11,DEFAULT_RD_CHANNEL=-1,DEFAULT_WR_CHANNEL=-1,DESTINATION_ID=11,10,14,1,3,4,8,9,6,12,7,2,13,5,0,15,END_ADDRESS=0x40000,0x41000,0x41020,0x41040,0x41060,0x41080,0x41090,0x410a0,0x410b0,0x410c0,0x410d0,0x410e0,0x410e8,0x410f0,0x42020,0x42040,MEMORY_ALIASING_DECODE=0,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NON_SECURED_TAG=1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,SECURED_RANGE_LIST=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,SECURED_RANGE_PAIRS=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,SLAVES_INFO=11:0000000010000000:0x20000:0x40000:both:1:0:0:1,10:0000000000010000:0x40800:0x41000:both:1:0:0:1,14:0000000100000000:0x41000:0x41020:both:1:0:0:1,1:0000000000100000:0x41020:0x41040:both:1:0:0:1,3:0000000000000100:0x41040:0x41060:both:1:0:0:1,4:0000000000000010:0x41060:0x41080:both:1:0:0:1,8:0010000000000000:0x41080:0x41090:both:1:0:0:1,9:0001000000000000:0x41090:0x410a0:both:1:0:0:1,6:0000100000000000:0x410a0:0x410b0:read:1:0:0:1,12:0000010000000000:0x410b0:0x410c0:read:1:0:0:1,7:0000001000000000:0x410c0:0x410d0:both:1:0:0:1,2:0000000001000000:0x410d0:0x410e0:both:1:0:0:1,13:0000000000001000:0x410e0:0x410e8:read:1:0:0:1,5:0000000000000001:0x410e8:0x410f0:both:1:0:0:1,0:0100000000000000:0x42000:0x42020:both:1:0:0:1,15:1000000000000000:0x42020:0x42040:both:1:0:0:1,SPAN_OFFSET=,START_ADDRESS=0x20000,0x40800,0x41000,0x41020,0x41040,0x41060,0x41080,0x41090,0x410a0,0x410b0,0x410c0,0x410d0,0x410e0,0x410e8,0x42000,0x42020,ST_CHANNEL_W=16,ST_DATA_W=97,TYPE_OF_TRANSACTION=both,both,both,both,both,both,both,both,read,read,both,both,read,both,both,both)(altera_merlin_router:16.1:CHANNEL_ID=10,01,DECODER_TYPE=0,DEFAULT_CHANNEL=1,DEFAULT_DESTID=11,DEFAULT_RD_CHANNEL=-1,DEFAULT_WR_CHANNEL=-1,DESTINATION_ID=11,10,END_ADDRESS=0x40000,0x41000,MEMORY_ALIASING_DECODE=0,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NON_SECURED_TAG=1,1,PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,SECURED_RANGE_LIST=0,0,SECURED_RANGE_PAIRS=0,0,SLAVES_INFO=11:10:0x20000:0x40000:both:1:0:0:1,10:01:0x40800:0x41000:both:1:0:0:1,SPAN_OFFSET=,START_ADDRESS=0x20000,0x40800,ST_CHANNEL_W=16,ST_DATA_W=97,TYPE_OF_TRANSACTION=both,both)(altera_merlin_router:16.1:CHANNEL_ID=1,DECODER_TYPE=1,DEFAULT_CHANNEL=0,DEFAULT_DESTID=0,DEFAULT_RD_CHANNEL=-1,DEFAULT_WR_CHANNEL=-1,DESTINATION_ID=0,END_ADDRESS=0x0,MEMORY_ALIASING_DECODE=0,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NON_SECURED_TAG=1,PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,SECURED_RANGE_LIST=0,SECURED_RANGE_PAIRS=0,SLAVES_INFO=0:1:0x0:0x0:both:1:0:0:1,SPAN_OFFSET=,START_ADDRESS=0x0,ST_CHANNEL_W=16,ST_DATA_W=97,TYPE_OF_TRANSACTION=both)(altera_merlin_router:16.1:CHANNEL_ID=1,DECODER_TYPE=1,DEFAULT_CHANNEL=0,DEFAULT_DESTID=0,DEFAULT_RD_CHANNEL=-1,DEFAULT_WR_CHANNEL=-1,DESTINATION_ID=0,END_ADDRESS=0x0,MEMORY_ALIASING_DECODE=0,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NON_SECURED_TAG=1,PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,SECURED_RANGE_LIST=0,SECURED_RANGE_PAIRS=0,SLAVES_INFO=0:1:0x0:0x0:both:1:0:0:1,SPAN_OFFSET=,START_ADDRESS=0x0,ST_CHANNEL_W=16,ST_DATA_W=97,TYPE_OF_TRANSACTION=both)(altera_merlin_router:16.1:CHANNEL_ID=1,DECODER_TYPE=1,DEFAULT_CHANNEL=0,DEFAULT_DESTID=0,DEFAULT_RD_CHANNEL=-1,DEFAULT_WR_CHANNEL=-1,DESTINATION_ID=0,END_ADDRESS=0x0,MEMORY_ALIASING_DECODE=0,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NON_SECURED_TAG=1,PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,SECURED_RANGE_LIST=0,SECURED_RANGE_PAIRS=0,SLAVES_INFO=0:1:0x0:0x0:both:1:0:0:1,SPAN_OFFSET=,START_ADDRESS=0x0,ST_CHANNEL_W=16,ST_DATA_W=97,TYPE_OF_TRANSACTION=both)(altera_merlin_router:16.1:CHANNEL_ID=1,DECODER_TYPE=1,DEFAULT_CHANNEL=0,DEFAULT_DESTID=0,DEFAULT_RD_CHANNEL=-1,DEFAULT_WR_CHANNEL=-1,DESTINATION_ID=0,END_ADDRESS=0x0,MEMORY_ALIASING_DECODE=0,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NON_SECURED_TAG=1,PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,SECURED_RANGE_LIST=0,SECURED_RANGE_PAIRS=0,SLAVES_INFO=0:1:0x0:0x0:both:1:0:0:1,SPAN_OFFSET=,START_ADDRESS=0x0,ST_CHANNEL_W=16,ST_DATA_W=97,TYPE_OF_TRANSACTION=both)(altera_merlin_router:16.1:CHANNEL_ID=01,10,DECODER_TYPE=1,DEFAULT_CHANNEL=0,DEFAULT_DESTID=0,DEFAULT_RD_CHANNEL=-1,DEFAULT_WR_CHANNEL=-1,DESTINATION_ID=0,1,END_ADDRESS=0x0,0x0,MEMORY_ALIASING_DECODE=0,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NON_SECURED_TAG=1,1,PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,SECURED_RANGE_LIST=0,0,SECURED_RANGE_PAIRS=0,0,SLAVES_INFO=0:01:0x0:0x0:both:1:0:0:1,1:10:0x0:0x0:read:1:0:0:1,SPAN_OFFSET=,START_ADDRESS=0x0,0x0,ST_CHANNEL_W=16,ST_DATA_W=97,TYPE_OF_TRANSACTION=both,read)(altera_merlin_router:16.1:CHANNEL_ID=1,DECODER_TYPE=1,DEFAULT_CHANNEL=0,DEFAULT_DESTID=0,DEFAULT_RD_CHANNEL=-1,DEFAULT_WR_CHANNEL=-1,DESTINATION_ID=0,END_ADDRESS=0x0,MEMORY_ALIASING_DECODE=0,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NON_SECURED_TAG=1,PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,SECURED_RANGE_LIST=0,SECURED_RANGE_PAIRS=0,SLAVES_INFO=0:1:0x0:0x0:both:1:0:0:1,SPAN_OFFSET=,START_ADDRESS=0x0,ST_CHANNEL_W=16,ST_DATA_W=97,TYPE_OF_TRANSACTION=both)(altera_merlin_router:16.1:CHANNEL_ID=1,DECODER_TYPE=1,DEFAULT_CHANNEL=0,DEFAULT_DESTID=0,DEFAULT_RD_CHANNEL=-1,DEFAULT_WR_CHANNEL=-1,DESTINATION_ID=0,END_ADDRESS=0x0,MEMORY_ALIASING_DECODE=0,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NON_SECURED_TAG=1,PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,SECURED_RANGE_LIST=0,SECURED_RANGE_PAIRS=0,SLAVES_INFO=0:1:0x0:0x0:both:1:0:0:1,SPAN_OFFSET=,START_ADDRESS=0x0,ST_CHANNEL_W=16,ST_DATA_W=97,TYPE_OF_TRANSACTION=both)(altera_merlin_router:16.1:CHANNEL_ID=01,10,DECODER_TYPE=1,DEFAULT_CHANNEL=0,DEFAULT_DESTID=0,DEFAULT_RD_CHANNEL=-1,DEFAULT_WR_CHANNEL=-1,DESTINATION_ID=0,1,END_ADDRESS=0x0,0x0,MEMORY_ALIASING_DECODE=0,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NON_SECURED_TAG=1,1,PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,SECURED_RANGE_LIST=0,0,SECURED_RANGE_PAIRS=0,0,SLAVES_INFO=0:01:0x0:0x0:both:1:0:0:1,1:10:0x0:0x0:read:1:0:0:1,SPAN_OFFSET=,START_ADDRESS=0x0,0x0,ST_CHANNEL_W=16,ST_DATA_W=97,TYPE_OF_TRANSACTION=both,read)(altera_merlin_router:16.1:CHANNEL_ID=1,DECODER_TYPE=1,DEFAULT_CHANNEL=0,DEFAULT_DESTID=0,DEFAULT_RD_CHANNEL=-1,DEFAULT_WR_CHANNEL=-1,DESTINATION_ID=0,END_ADDRESS=0x0,MEMORY_ALIASING_DECODE=0,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NON_SECURED_TAG=1,PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,SECURED_RANGE_LIST=0,SECURED_RANGE_PAIRS=0,SLAVES_INFO=0:1:0x0:0x0:both:1:0:0:1,SPAN_OFFSET=,START_ADDRESS=0x0,ST_CHANNEL_W=16,ST_DATA_W=97,TYPE_OF_TRANSACTION=both)(altera_merlin_router:16.1:CHANNEL_ID=1,DECODER_TYPE=1,DEFAULT_CHANNEL=0,DEFAULT_DESTID=0,DEFAULT_RD_CHANNEL=-1,DEFAULT_WR_CHANNEL=-1,DESTINATION_ID=0,END_ADDRESS=0x0,MEMORY_ALIASING_DECODE=0,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NON_SECURED_TAG=1,PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,SECURED_RANGE_LIST=0,SECURED_RANGE_PAIRS=0,SLAVES_INFO=0:1:0x0:0x0:both:1:0:0:1,SPAN_OFFSET=,START_ADDRESS=0x0,ST_CHANNEL_W=16,ST_DATA_W=97,TYPE_OF_TRANSACTION=both)(altera_merlin_router:16.1:CHANNEL_ID=1,DECODER_TYPE=1,DEFAULT_CHANNEL=0,DEFAULT_DESTID=0,DEFAULT_RD_CHANNEL=-1,DEFAULT_WR_CHANNEL=-1,DESTINATION_ID=0,END_ADDRESS=0x0,MEMORY_ALIASING_DECODE=0,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NON_SECURED_TAG=1,PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,SECURED_RANGE_LIST=0,SECURED_RANGE_PAIRS=0,SLAVES_INFO=0:1:0x0:0x0:both:1:0:0:1,SPAN_OFFSET=,START_ADDRESS=0x0,ST_CHANNEL_W=16,ST_DATA_W=97,TYPE_OF_TRANSACTION=both)(altera_merlin_router:16.1:CHANNEL_ID=1,DECODER_TYPE=1,DEFAULT_CHANNEL=0,DEFAULT_DESTID=0,DEFAULT_RD_CHANNEL=-1,DEFAULT_WR_CHANNEL=-1,DESTINATION_ID=0,END_ADDRESS=0x0,MEMORY_ALIASING_DECODE=0,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NON_SECURED_TAG=1,PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,SECURED_RANGE_LIST=0,SECURED_RANGE_PAIRS=0,SLAVES_INFO=0:1:0x0:0x0:both:1:0:0:1,SPAN_OFFSET=,START_ADDRESS=0x0,ST_CHANNEL_W=16,ST_DATA_W=97,TYPE_OF_TRANSACTION=both)(altera_merlin_router:16.1:CHANNEL_ID=1,DECODER_TYPE=1,DEFAULT_CHANNEL=0,DEFAULT_DESTID=0,DEFAULT_RD_CHANNEL=-1,DEFAULT_WR_CHANNEL=-1,DESTINATION_ID=0,END_ADDRESS=0x0,MEMORY_ALIASING_DECODE=0,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NON_SECURED_TAG=1,PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,SECURED_RANGE_LIST=0,SECURED_RANGE_PAIRS=0,SLAVES_INFO=0:1:0x0:0x0:both:1:0:0:1,SPAN_OFFSET=,START_ADDRESS=0x0,ST_CHANNEL_W=16,ST_DATA_W=97,TYPE_OF_TRANSACTION=both)(altera_merlin_router:16.1:CHANNEL_ID=1,DECODER_TYPE=1,DEFAULT_CHANNEL=0,DEFAULT_DESTID=0,DEFAULT_RD_CHANNEL=-1,DEFAULT_WR_CHANNEL=-1,DESTINATION_ID=0,END_ADDRESS=0x0,MEMORY_ALIASING_DECODE=0,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NON_SECURED_TAG=1,PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,SECURED_RANGE_LIST=0,SECURED_RANGE_PAIRS=0,SLAVES_INFO=0:1:0x0:0x0:both:1:0:0:1,SPAN_OFFSET=,START_ADDRESS=0x0,ST_CHANNEL_W=16,ST_DATA_W=97,TYPE_OF_TRANSACTION=both)(altera_merlin_router:16.1:CHANNEL_ID=1,DECODER_TYPE=1,DEFAULT_CHANNEL=0,DEFAULT_DESTID=0,DEFAULT_RD_CHANNEL=-1,DEFAULT_WR_CHANNEL=-1,DESTINATION_ID=0,END_ADDRESS=0x0,MEMORY_ALIASING_DECODE=0,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NON_SECURED_TAG=1,PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,SECURED_RANGE_LIST=0,SECURED_RANGE_PAIRS=0,SLAVES_INFO=0:1:0x0:0x0:both:1:0:0:1,SPAN_OFFSET=,START_ADDRESS=0x0,ST_CHANNEL_W=16,ST_DATA_W=97,TYPE_OF_TRANSACTION=both)(altera_merlin_router:16.1:CHANNEL_ID=1,DECODER_TYPE=1,DEFAULT_CHANNEL=0,DEFAULT_DESTID=0,DEFAULT_RD_CHANNEL=-1,DEFAULT_WR_CHANNEL=-1,DESTINATION_ID=0,END_ADDRESS=0x0,MEMORY_ALIASING_DECODE=0,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NON_SECURED_TAG=1,PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,SECURED_RANGE_LIST=0,SECURED_RANGE_PAIRS=0,SLAVES_INFO=0:1:0x0:0x0:both:1:0:0:1,SPAN_OFFSET=,START_ADDRESS=0x0,ST_CHANNEL_W=16,ST_DATA_W=97,TYPE_OF_TRANSACTION=both)(altera_merlin_traffic_limiter:16.1:ENFORCE_ORDER=1,MAX_BURST_LENGTH=1,MAX_OUTSTANDING_RESPONSES=5,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),PIPELINED=0,PKT_BYTEEN_H=35,PKT_BYTEEN_L=32,PKT_BYTE_CNT_H=63,PKT_BYTE_CNT_L=61,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_SRC_ID_H=79,PKT_SRC_ID_L=76,PKT_THREAD_ID_H=84,PKT_THREAD_ID_L=84,PKT_TRANS_POSTED=56,PKT_TRANS_WRITE=57,PREVENT_HAZARDS=0,REORDER=0,ST_CHANNEL_W=16,ST_DATA_W=97,SUPPORTS_NONPOSTED_WRITES=0,SUPPORTS_POSTED_WRITES=1,VALID_WIDTH=16)(altera_merlin_traffic_limiter:16.1:ENFORCE_ORDER=1,MAX_BURST_LENGTH=1,MAX_OUTSTANDING_RESPONSES=1,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),PIPELINED=0,PKT_BYTEEN_H=35,PKT_BYTEEN_L=32,PKT_BYTE_CNT_H=63,PKT_BYTE_CNT_L=61,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_SRC_ID_H=79,PKT_SRC_ID_L=76,PKT_THREAD_ID_H=84,PKT_THREAD_ID_L=84,PKT_TRANS_POSTED=56,PKT_TRANS_WRITE=57,PREVENT_HAZARDS=0,REORDER=0,ST_CHANNEL_W=16,ST_DATA_W=97,SUPPORTS_NONPOSTED_WRITES=0,SUPPORTS_POSTED_WRITES=1,VALID_WIDTH=16)(altera_merlin_demultiplexer:16.1:AUTO_CLK_CLOCK_RATE=50000000,AUTO_DEVICE_FAMILY=MAX 10,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_OUTPUTS=16,ST_CHANNEL_W=16,ST_DATA_W=97,VALID_WIDTH=16)(altera_merlin_demultiplexer:16.1:AUTO_CLK_CLOCK_RATE=50000000,AUTO_DEVICE_FAMILY=MAX 10,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_OUTPUTS=2,ST_CHANNEL_W=16,ST_DATA_W=97,VALID_WIDTH=16)(altera_merlin_multiplexer:16.1:ARBITRATION_SCHEME=round-robin,ARBITRATION_SHARES=1,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_INPUTS=1,PIPELINE_ARB=1,PKT_TRANS_LOCK=59,ST_CHANNEL_W=16,ST_DATA_W=97,USE_EXTERNAL_ARB=0)(altera_merlin_multiplexer:16.1:ARBITRATION_SCHEME=round-robin,ARBITRATION_SHARES=1,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_INPUTS=1,PIPELINE_ARB=1,PKT_TRANS_LOCK=59,ST_CHANNEL_W=16,ST_DATA_W=97,USE_EXTERNAL_ARB=0)(altera_merlin_multiplexer:16.1:ARBITRATION_SCHEME=round-robin,ARBITRATION_SHARES=1,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_INPUTS=1,PIPELINE_ARB=1,PKT_TRANS_LOCK=59,ST_CHANNEL_W=16,ST_DATA_W=97,USE_EXTERNAL_ARB=0)(altera_merlin_multiplexer:16.1:ARBITRATION_SCHEME=round-robin,ARBITRATION_SHARES=1,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_INPUTS=1,PIPELINE_ARB=1,PKT_TRANS_LOCK=59,ST_CHANNEL_W=16,ST_DATA_W=97,USE_EXTERNAL_ARB=0)(altera_merlin_multiplexer:16.1:ARBITRATION_SCHEME=round-robin,ARBITRATION_SHARES=1,1,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_INPUTS=2,PIPELINE_ARB=1,PKT_TRANS_LOCK=59,ST_CHANNEL_W=16,ST_DATA_W=97,USE_EXTERNAL_ARB=0)(altera_merlin_multiplexer:16.1:ARBITRATION_SCHEME=round-robin,ARBITRATION_SHARES=1,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_INPUTS=1,PIPELINE_ARB=1,PKT_TRANS_LOCK=59,ST_CHANNEL_W=16,ST_DATA_W=97,USE_EXTERNAL_ARB=0)(altera_merlin_multiplexer:16.1:ARBITRATION_SCHEME=round-robin,ARBITRATION_SHARES=1,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_INPUTS=1,PIPELINE_ARB=1,PKT_TRANS_LOCK=59,ST_CHANNEL_W=16,ST_DATA_W=97,USE_EXTERNAL_ARB=0)(altera_merlin_multiplexer:16.1:ARBITRATION_SCHEME=round-robin,ARBITRATION_SHARES=1,1,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_INPUTS=2,PIPELINE_ARB=1,PKT_TRANS_LOCK=59,ST_CHANNEL_W=16,ST_DATA_W=97,USE_EXTERNAL_ARB=0)(altera_merlin_multiplexer:16.1:ARBITRATION_SCHEME=round-robin,ARBITRATION_SHARES=1,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_INPUTS=1,PIPELINE_ARB=1,PKT_TRANS_LOCK=59,ST_CHANNEL_W=16,ST_DATA_W=97,USE_EXTERNAL_ARB=0)(altera_merlin_multiplexer:16.1:ARBITRATION_SCHEME=round-robin,ARBITRATION_SHARES=1,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_INPUTS=1,PIPELINE_ARB=1,PKT_TRANS_LOCK=59,ST_CHANNEL_W=16,ST_DATA_W=97,USE_EXTERNAL_ARB=0)(altera_merlin_multiplexer:16.1:ARBITRATION_SCHEME=round-robin,ARBITRATION_SHARES=1,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_INPUTS=1,PIPELINE_ARB=1,PKT_TRANS_LOCK=59,ST_CHANNEL_W=16,ST_DATA_W=97,USE_EXTERNAL_ARB=0)(altera_merlin_multiplexer:16.1:ARBITRATION_SCHEME=round-robin,ARBITRATION_SHARES=1,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_INPUTS=1,PIPELINE_ARB=1,PKT_TRANS_LOCK=59,ST_CHANNEL_W=16,ST_DATA_W=97,USE_EXTERNAL_ARB=0)(altera_merlin_multiplexer:16.1:ARBITRATION_SCHEME=round-robin,ARBITRATION_SHARES=1,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_INPUTS=1,PIPELINE_ARB=1,PKT_TRANS_LOCK=59,ST_CHANNEL_W=16,ST_DATA_W=97,USE_EXTERNAL_ARB=0)(altera_merlin_multiplexer:16.1:ARBITRATION_SCHEME=round-robin,ARBITRATION_SHARES=1,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_INPUTS=1,PIPELINE_ARB=1,PKT_TRANS_LOCK=59,ST_CHANNEL_W=16,ST_DATA_W=97,USE_EXTERNAL_ARB=0)(altera_merlin_multiplexer:16.1:ARBITRATION_SCHEME=round-robin,ARBITRATION_SHARES=1,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_INPUTS=1,PIPELINE_ARB=1,PKT_TRANS_LOCK=59,ST_CHANNEL_W=16,ST_DATA_W=97,USE_EXTERNAL_ARB=0)(altera_merlin_multiplexer:16.1:ARBITRATION_SCHEME=round-robin,ARBITRATION_SHARES=1,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_INPUTS=1,PIPELINE_ARB=1,PKT_TRANS_LOCK=59,ST_CHANNEL_W=16,ST_DATA_W=97,USE_EXTERNAL_ARB=0)(altera_merlin_demultiplexer:16.1:AUTO_CLK_CLOCK_RATE=50000000,AUTO_DEVICE_FAMILY=MAX 10,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_OUTPUTS=1,ST_CHANNEL_W=16,ST_DATA_W=97,VALID_WIDTH=1)(altera_merlin_demultiplexer:16.1:AUTO_CLK_CLOCK_RATE=50000000,AUTO_DEVICE_FAMILY=MAX 10,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_OUTPUTS=1,ST_CHANNEL_W=16,ST_DATA_W=97,VALID_WIDTH=1)(altera_merlin_demultiplexer:16.1:AUTO_CLK_CLOCK_RATE=50000000,AUTO_DEVICE_FAMILY=MAX 10,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_OUTPUTS=1,ST_CHANNEL_W=16,ST_DATA_W=97,VALID_WIDTH=1)(altera_merlin_demultiplexer:16.1:AUTO_CLK_CLOCK_RATE=50000000,AUTO_DEVICE_FAMILY=MAX 10,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_OUTPUTS=1,ST_CHANNEL_W=16,ST_DATA_W=97,VALID_WIDTH=1)(altera_merlin_demultiplexer:16.1:AUTO_CLK_CLOCK_RATE=50000000,AUTO_DEVICE_FAMILY=MAX 10,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_OUTPUTS=2,ST_CHANNEL_W=16,ST_DATA_W=97,VALID_WIDTH=1)(altera_merlin_demultiplexer:16.1:AUTO_CLK_CLOCK_RATE=100000000,AUTO_DEVICE_FAMILY=MAX 10,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_OUTPUTS=1,ST_CHANNEL_W=16,ST_DATA_W=97,VALID_WIDTH=1)(altera_merlin_demultiplexer:16.1:AUTO_CLK_CLOCK_RATE=50000000,AUTO_DEVICE_FAMILY=MAX 10,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_OUTPUTS=1,ST_CHANNEL_W=16,ST_DATA_W=97,VALID_WIDTH=1)(altera_merlin_demultiplexer:16.1:AUTO_CLK_CLOCK_RATE=50000000,AUTO_DEVICE_FAMILY=MAX 10,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_OUTPUTS=2,ST_CHANNEL_W=16,ST_DATA_W=97,VALID_WIDTH=1)(altera_merlin_demultiplexer:16.1:AUTO_CLK_CLOCK_RATE=50000000,AUTO_DEVICE_FAMILY=MAX 10,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_OUTPUTS=1,ST_CHANNEL_W=16,ST_DATA_W=97,VALID_WIDTH=1)(altera_merlin_demultiplexer:16.1:AUTO_CLK_CLOCK_RATE=50000000,AUTO_DEVICE_FAMILY=MAX 10,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_OUTPUTS=1,ST_CHANNEL_W=16,ST_DATA_W=97,VALID_WIDTH=1)(altera_merlin_demultiplexer:16.1:AUTO_CLK_CLOCK_RATE=50000000,AUTO_DEVICE_FAMILY=MAX 10,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_OUTPUTS=1,ST_CHANNEL_W=16,ST_DATA_W=97,VALID_WIDTH=1)(altera_merlin_demultiplexer:16.1:AUTO_CLK_CLOCK_RATE=50000000,AUTO_DEVICE_FAMILY=MAX 10,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_OUTPUTS=1,ST_CHANNEL_W=16,ST_DATA_W=97,VALID_WIDTH=1)(altera_merlin_demultiplexer:16.1:AUTO_CLK_CLOCK_RATE=50000000,AUTO_DEVICE_FAMILY=MAX 10,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_OUTPUTS=1,ST_CHANNEL_W=16,ST_DATA_W=97,VALID_WIDTH=1)(altera_merlin_demultiplexer:16.1:AUTO_CLK_CLOCK_RATE=50000000,AUTO_DEVICE_FAMILY=MAX 10,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_OUTPUTS=1,ST_CHANNEL_W=16,ST_DATA_W=97,VALID_WIDTH=1)(altera_merlin_demultiplexer:16.1:AUTO_CLK_CLOCK_RATE=100000000,AUTO_DEVICE_FAMILY=MAX 10,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_OUTPUTS=1,ST_CHANNEL_W=16,ST_DATA_W=97,VALID_WIDTH=1)(altera_merlin_demultiplexer:16.1:AUTO_CLK_CLOCK_RATE=50000000,AUTO_DEVICE_FAMILY=MAX 10,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_OUTPUTS=1,ST_CHANNEL_W=16,ST_DATA_W=97,VALID_WIDTH=1)(altera_merlin_multiplexer:16.1:ARBITRATION_SCHEME=no-arb,ARBITRATION_SHARES=1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_INPUTS=16,PIPELINE_ARB=0,PKT_TRANS_LOCK=59,ST_CHANNEL_W=16,ST_DATA_W=97,USE_EXTERNAL_ARB=0)(altera_merlin_multiplexer:16.1:ARBITRATION_SCHEME=no-arb,ARBITRATION_SHARES=1,1,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_INPUTS=2,PIPELINE_ARB=0,PKT_TRANS_LOCK=59,ST_CHANNEL_W=16,ST_DATA_W=97,USE_EXTERNAL_ARB=0)(altera_avalon_st_handshake_clock_crosser:16.1:AUTO_IN_CLK_CLOCK_RATE=50000000,AUTO_OUT_CLK_CLOCK_RATE=100000000,BITS_PER_SYMBOL=97,CHANNEL_WIDTH=16,DATA_WIDTH=97,ERROR_WIDTH=1,MAX_CHANNEL=0,READY_SYNC_DEPTH=2,USE_CHANNEL=1,USE_ERROR=0,USE_OUTPUT_PIPELINE=0,USE_PACKETS=1,VALID_SYNC_DEPTH=2)(altera_avalon_st_handshake_clock_crosser:16.1:AUTO_IN_CLK_CLOCK_RATE=50000000,AUTO_OUT_CLK_CLOCK_RATE=100000000,BITS_PER_SYMBOL=97,CHANNEL_WIDTH=16,DATA_WIDTH=97,ERROR_WIDTH=1,MAX_CHANNEL=0,READY_SYNC_DEPTH=2,USE_CHANNEL=1,USE_ERROR=0,USE_OUTPUT_PIPELINE=0,USE_PACKETS=1,VALID_SYNC_DEPTH=2)(altera_avalon_st_handshake_clock_crosser:16.1:AUTO_IN_CLK_CLOCK_RATE=100000000,AUTO_OUT_CLK_CLOCK_RATE=50000000,BITS_PER_SYMBOL=97,CHANNEL_WIDTH=16,DATA_WIDTH=97,ERROR_WIDTH=1,MAX_CHANNEL=0,READY_SYNC_DEPTH=2,USE_CHANNEL=1,USE_ERROR=0,USE_OUTPUT_PIPELINE=0,USE_PACKETS=1,VALID_SYNC_DEPTH=2)(altera_avalon_st_handshake_clock_crosser:16.1:AUTO_IN_CLK_CLOCK_RATE=100000000,AUTO_OUT_CLK_CLOCK_RATE=50000000,BITS_PER_SYMBOL=97,CHANNEL_WIDTH=16,DATA_WIDTH=97,ERROR_WIDTH=1,MAX_CHANNEL=0,READY_SYNC_DEPTH=2,USE_CHANNEL=1,USE_ERROR=0,USE_OUTPUT_PIPELINE=0,USE_PACKETS=1,VALID_SYNC_DEPTH=2)(altera_reset_bridge:16.1:ACTIVE_LOW_RESET=0,AUTO_CLK_CLOCK_RATE=50000000,NUM_RESET_OUTPUTS=1,SYNCHRONOUS_EDGES=deassert,USE_RESET_REQUEST=0)(altera_reset_bridge:16.1:ACTIVE_LOW_RESET=0,AUTO_CLK_CLOCK_RATE=100000000,NUM_RESET_OUTPUTS=1,SYNCHRONOUS_EDGES=deassert,USE_RESET_REQUEST=0)(altera_reset_bridge:16.1:ACTIVE_LOW_RESET=0,AUTO_CLK_CLOCK_RATE=50000000,NUM_RESET_OUTPUTS=1,SYNCHRONOUS_EDGES=deassert,USE_RESET_REQUEST=0)(altera_clock_bridge:16.1:DERIVED_CLOCK_RATE=0,EXPLICIT_CLOCK_RATE=50000000,NUM_CLOCK_OUTPUTS=1)(altera_clock_bridge:16.1:DERIVED_CLOCK_RATE=0,EXPLICIT_CLOCK_RATE=100000000,NUM_CLOCK_OUTPUTS=1)(avalon:16.1:arbitrationPriority=1,baseAddress=0x0000,defaultConnection=false)(avalon:16.1:arbitrationPriority=1,baseAddress=0x0000,defaultConnection=false)(avalon:16.1:arbitrationPriority=1,baseAddress=0x0000,defaultConnection=false)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon:16.1:arbitrationPriority=1,baseAddress=0x0000,defaultConnection=false)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon:16.1:arbitrationPriority=1,baseAddress=0x0000,defaultConnection=false)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon:16.1:arbitrationPriority=1,baseAddress=0x0000,defaultConnection=false)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon:16.1:arbitrationPriority=1,baseAddress=0x0000,defaultConnection=false)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon:16.1:arbitrationPriority=1,baseAddress=0x0000,defaultConnection=false)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon:16.1:arbitrationPriority=1,baseAddress=0x0000,defaultConnection=false)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon:16.1:arbitrationPriority=1,baseAddress=0x0000,defaultConnection=false)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon:16.1:arbitrationPriority=1,baseAddress=0x0000,defaultConnection=false)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon:16.1:arbitrationPriority=1,baseAddress=0x0000,defaultConnection=false)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon:16.1:arbitrationPriority=1,baseAddress=0x0000,defaultConnection=false)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon:16.1:arbitrationPriority=1,baseAddress=0x0000,defaultConnection=false)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon:16.1:arbitrationPriority=1,baseAddress=0x0000,defaultConnection=false)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon:16.1:arbitrationPriority=1,baseAddress=0x0000,defaultConnection=false)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon:16.1:arbitrationPriority=1,baseAddress=0x0000,defaultConnection=false)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon:16.1:arbitrationPriority=1,baseAddress=0x0000,defaultConnection=false)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)"
|
|
instancePathKey="Qsys:.:mm_interconnect_0"
|
|
kind="altera_mm_interconnect"
|
|
version="16.1"
|
|
name="Qsys_mm_interconnect_0">
|
|
<parameter name="AUTO_DEVICE" value="10M50DAF484C7G" />
|
|
<parameter name="AUTO_DEVICE_FAMILY" value="MAX 10" />
|
|
<parameter name="AUTO_DEVICE_SPEEDGRADE" value="" />
|
|
<parameter
|
|
name="COMPOSE_CONTENTS"
|
|
value="add_instance {nios2_gen2_data_master_translator} {altera_merlin_master_translator};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_ADDRESS_W} {19};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_DATA_W} {32};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {nios2_gen2_data_master_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {nios2_gen2_data_master_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_READLATENCY} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_READDATA} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_READ} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_WRITE} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_ADDRESS} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_DEBUGACCESS} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_CLKEN} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_READDATAVALID} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_LOCK} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_ADDRESS_SYMBOLS} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {64};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_BURSTBOUNDARIES} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {SYNC_RESET} {0};add_instance {nios2_gen2_instruction_master_translator} {altera_merlin_master_translator};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_ADDRESS_W} {19};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_DATA_W} {32};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_READLATENCY} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {USE_READDATA} {1};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {USE_WRITEDATA} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {USE_READ} {1};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {USE_WRITE} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {USE_ADDRESS} {1};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {USE_CLKEN} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {USE_READDATAVALID} {1};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {USE_LOCK} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_ADDRESS_SYMBOLS} {1};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_LINEWRAPBURSTS} {1};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {64};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {nios2_gen2_instruction_master_translator} {SYNC_RESET} {0};add_instance {jtag_uart_avalon_jtag_slave_translator} {altera_merlin_slave_translator};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_ADDRESS_W} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_DATA_W} {32};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {UAV_DATA_W} {32};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_BYTEENABLE_W} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_READLATENCY} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_READDATA} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_READ} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_WRITE} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_CHIPSELECT} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_ADDRESS} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_LOCK} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {i2c_opencores_mipi_avalon_slave_0_translator} {altera_merlin_slave_translator};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_ADDRESS_W} {3};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_DATA_W} {8};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {UAV_DATA_W} {32};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_BYTEENABLE_W} {1};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_READLATENCY} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_READDATA} {1};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_READ} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_WRITE} {1};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_CHIPSELECT} {1};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_ADDRESS} {1};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_LOCK} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {i2c_opencores_camera_avalon_slave_0_translator} {altera_merlin_slave_translator};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_ADDRESS_W} {3};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_DATA_W} {8};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {UAV_DATA_W} {32};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_BYTEENABLE_W} {1};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_READLATENCY} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_READDATA} {1};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_READ} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_WRITE} {1};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_CHIPSELECT} {1};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_ADDRESS} {1};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_LOCK} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {sysid_qsys_control_slave_translator} {altera_merlin_slave_translator};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_ADDRESS_W} {1};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_DATA_W} {32};set_instance_parameter_value {sysid_qsys_control_slave_translator} {UAV_DATA_W} {32};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {sysid_qsys_control_slave_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {sysid_qsys_control_slave_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {sysid_qsys_control_slave_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_READLATENCY} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_READDATA} {1};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_WRITEDATA} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_READ} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_WRITE} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_ADDRESS} {1};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_WAITREQUEST} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_LOCK} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {sysid_qsys_control_slave_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {nios2_gen2_debug_mem_slave_translator} {altera_merlin_slave_translator};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_ADDRESS_W} {9};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_DATA_W} {32};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {UAV_DATA_W} {32};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_READLATENCY} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_READDATA} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_READ} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_WRITE} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_ADDRESS} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_LOCK} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_DEBUGACCESS} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_REGISTERINCOMINGSIGNALS} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {altera_merlin_slave_translator};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_ADDRESS_W} {3};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_DATA_W} {32};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {UAV_DATA_W} {32};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_READLATENCY} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_READDATA} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_READ} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_WRITE} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_CHIPSELECT} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_ADDRESS} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_WAITREQUEST} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_LOCK} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {altpll_0_pll_slave_translator} {altera_merlin_slave_translator};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_ADDRESS_W} {2};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_DATA_W} {32};set_instance_parameter_value {altpll_0_pll_slave_translator} {UAV_DATA_W} {32};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {altpll_0_pll_slave_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {altpll_0_pll_slave_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {altpll_0_pll_slave_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_READLATENCY} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_READ_WAIT} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_READDATA} {1};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_READ} {1};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_WRITE} {1};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_ADDRESS} {1};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_WAITREQUEST} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_LOCK} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {altpll_0_pll_slave_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {onchip_memory2_0_s1_translator} {altera_merlin_slave_translator};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_ADDRESS_W} {15};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_DATA_W} {32};set_instance_parameter_value {onchip_memory2_0_s1_translator} {UAV_DATA_W} {32};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {onchip_memory2_0_s1_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {onchip_memory2_0_s1_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {onchip_memory2_0_s1_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_READLATENCY} {1};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_READ_WAIT} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_READDATA} {1};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_READ} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_WRITE} {1};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_CHIPSELECT} {1};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_ADDRESS} {1};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_WAITREQUEST} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_LOCK} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_AV_CLKEN} {1};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {onchip_memory2_0_s1_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {timer_s1_translator} {altera_merlin_slave_translator};set_instance_parameter_value {timer_s1_translator} {AV_ADDRESS_W} {3};set_instance_parameter_value {timer_s1_translator} {AV_DATA_W} {16};set_instance_parameter_value {timer_s1_translator} {UAV_DATA_W} {32};set_instance_parameter_value {timer_s1_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {timer_s1_translator} {AV_BYTEENABLE_W} {1};set_instance_parameter_value {timer_s1_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {timer_s1_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {timer_s1_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {timer_s1_translator} {AV_READLATENCY} {0};set_instance_parameter_value {timer_s1_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {timer_s1_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {timer_s1_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {timer_s1_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {timer_s1_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {timer_s1_translator} {USE_READDATA} {1};set_instance_parameter_value {timer_s1_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {timer_s1_translator} {USE_READ} {0};set_instance_parameter_value {timer_s1_translator} {USE_WRITE} {1};set_instance_parameter_value {timer_s1_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {timer_s1_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {timer_s1_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {timer_s1_translator} {USE_CHIPSELECT} {1};set_instance_parameter_value {timer_s1_translator} {USE_ADDRESS} {1};set_instance_parameter_value {timer_s1_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {timer_s1_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {timer_s1_translator} {USE_WAITREQUEST} {0};set_instance_parameter_value {timer_s1_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {timer_s1_translator} {USE_LOCK} {0};set_instance_parameter_value {timer_s1_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {timer_s1_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {timer_s1_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {timer_s1_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {timer_s1_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {timer_s1_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {timer_s1_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {timer_s1_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {timer_s1_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {timer_s1_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {timer_s1_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {timer_s1_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {timer_s1_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {timer_s1_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {timer_s1_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {timer_s1_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {timer_s1_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {timer_s1_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {timer_s1_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {timer_s1_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {timer_s1_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {timer_s1_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {timer_s1_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {timer_s1_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {timer_s1_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {led_s1_translator} {altera_merlin_slave_translator};set_instance_parameter_value {led_s1_translator} {AV_ADDRESS_W} {2};set_instance_parameter_value {led_s1_translator} {AV_DATA_W} {32};set_instance_parameter_value {led_s1_translator} {UAV_DATA_W} {32};set_instance_parameter_value {led_s1_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {led_s1_translator} {AV_BYTEENABLE_W} {1};set_instance_parameter_value {led_s1_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {led_s1_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {led_s1_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {led_s1_translator} {AV_READLATENCY} {0};set_instance_parameter_value {led_s1_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {led_s1_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {led_s1_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {led_s1_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {led_s1_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {led_s1_translator} {USE_READDATA} {1};set_instance_parameter_value {led_s1_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {led_s1_translator} {USE_READ} {0};set_instance_parameter_value {led_s1_translator} {USE_WRITE} {1};set_instance_parameter_value {led_s1_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {led_s1_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {led_s1_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {led_s1_translator} {USE_CHIPSELECT} {1};set_instance_parameter_value {led_s1_translator} {USE_ADDRESS} {1};set_instance_parameter_value {led_s1_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {led_s1_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {led_s1_translator} {USE_WAITREQUEST} {0};set_instance_parameter_value {led_s1_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {led_s1_translator} {USE_LOCK} {0};set_instance_parameter_value {led_s1_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {led_s1_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {led_s1_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {led_s1_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {led_s1_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {led_s1_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {led_s1_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {led_s1_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {led_s1_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {led_s1_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {led_s1_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {led_s1_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {led_s1_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {led_s1_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {led_s1_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {led_s1_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {led_s1_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {led_s1_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {led_s1_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {led_s1_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {led_s1_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {led_s1_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {led_s1_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {led_s1_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {led_s1_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {sw_s1_translator} {altera_merlin_slave_translator};set_instance_parameter_value {sw_s1_translator} {AV_ADDRESS_W} {2};set_instance_parameter_value {sw_s1_translator} {AV_DATA_W} {32};set_instance_parameter_value {sw_s1_translator} {UAV_DATA_W} {32};set_instance_parameter_value {sw_s1_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {sw_s1_translator} {AV_BYTEENABLE_W} {1};set_instance_parameter_value {sw_s1_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {sw_s1_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {sw_s1_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {sw_s1_translator} {AV_READLATENCY} {0};set_instance_parameter_value {sw_s1_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {sw_s1_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {sw_s1_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {sw_s1_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {sw_s1_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {sw_s1_translator} {USE_READDATA} {1};set_instance_parameter_value {sw_s1_translator} {USE_WRITEDATA} {0};set_instance_parameter_value {sw_s1_translator} {USE_READ} {0};set_instance_parameter_value {sw_s1_translator} {USE_WRITE} {0};set_instance_parameter_value {sw_s1_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {sw_s1_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {sw_s1_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {sw_s1_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {sw_s1_translator} {USE_ADDRESS} {1};set_instance_parameter_value {sw_s1_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {sw_s1_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {sw_s1_translator} {USE_WAITREQUEST} {0};set_instance_parameter_value {sw_s1_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {sw_s1_translator} {USE_LOCK} {0};set_instance_parameter_value {sw_s1_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {sw_s1_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {sw_s1_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {sw_s1_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {sw_s1_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {sw_s1_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {sw_s1_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {sw_s1_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {sw_s1_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {sw_s1_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {sw_s1_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {sw_s1_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {sw_s1_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {sw_s1_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {sw_s1_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {sw_s1_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {sw_s1_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {sw_s1_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {sw_s1_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {sw_s1_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {sw_s1_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {sw_s1_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {sw_s1_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {sw_s1_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {sw_s1_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {key_s1_translator} {altera_merlin_slave_translator};set_instance_parameter_value {key_s1_translator} {AV_ADDRESS_W} {2};set_instance_parameter_value {key_s1_translator} {AV_DATA_W} {32};set_instance_parameter_value {key_s1_translator} {UAV_DATA_W} {32};set_instance_parameter_value {key_s1_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {key_s1_translator} {AV_BYTEENABLE_W} {1};set_instance_parameter_value {key_s1_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {key_s1_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {key_s1_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {key_s1_translator} {AV_READLATENCY} {0};set_instance_parameter_value {key_s1_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {key_s1_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {key_s1_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {key_s1_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {key_s1_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {key_s1_translator} {USE_READDATA} {1};set_instance_parameter_value {key_s1_translator} {USE_WRITEDATA} {0};set_instance_parameter_value {key_s1_translator} {USE_READ} {0};set_instance_parameter_value {key_s1_translator} {USE_WRITE} {0};set_instance_parameter_value {key_s1_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {key_s1_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {key_s1_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {key_s1_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {key_s1_translator} {USE_ADDRESS} {1};set_instance_parameter_value {key_s1_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {key_s1_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {key_s1_translator} {USE_WAITREQUEST} {0};set_instance_parameter_value {key_s1_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {key_s1_translator} {USE_LOCK} {0};set_instance_parameter_value {key_s1_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {key_s1_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {key_s1_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {key_s1_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {key_s1_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {key_s1_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {key_s1_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {key_s1_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {key_s1_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {key_s1_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {key_s1_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {key_s1_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {key_s1_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {key_s1_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {key_s1_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {key_s1_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {key_s1_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {key_s1_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {key_s1_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {key_s1_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {key_s1_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {key_s1_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {key_s1_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {key_s1_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {key_s1_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {mipi_reset_n_s1_translator} {altera_merlin_slave_translator};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_ADDRESS_W} {2};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_DATA_W} {32};set_instance_parameter_value {mipi_reset_n_s1_translator} {UAV_DATA_W} {32};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_BYTEENABLE_W} {1};set_instance_parameter_value {mipi_reset_n_s1_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {mipi_reset_n_s1_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {mipi_reset_n_s1_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_READLATENCY} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_READDATA} {1};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_READ} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_WRITE} {1};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_CHIPSELECT} {1};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_ADDRESS} {1};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_WAITREQUEST} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_LOCK} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {mipi_reset_n_s1_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {mipi_pwdn_n_s1_translator} {altera_merlin_slave_translator};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_ADDRESS_W} {2};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_DATA_W} {32};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {UAV_DATA_W} {32};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_BYTEENABLE_W} {1};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_READLATENCY} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_READDATA} {1};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_READ} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_WRITE} {1};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_CHIPSELECT} {1};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_ADDRESS} {1};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_WAITREQUEST} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_LOCK} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {mipi_pwdn_n_s1_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {EEE_IMGPROC_0_s1_translator} {altera_merlin_slave_translator};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_ADDRESS_W} {3};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_DATA_W} {32};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {UAV_DATA_W} {32};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_READLATENCY} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_READDATA} {1};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_READ} {1};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_WRITE} {1};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_CHIPSELECT} {1};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_ADDRESS} {1};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_WAITREQUEST} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_LOCK} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {uart_0_s1_translator} {altera_merlin_slave_translator};set_instance_parameter_value {uart_0_s1_translator} {AV_ADDRESS_W} {3};set_instance_parameter_value {uart_0_s1_translator} {AV_DATA_W} {16};set_instance_parameter_value {uart_0_s1_translator} {UAV_DATA_W} {32};set_instance_parameter_value {uart_0_s1_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {uart_0_s1_translator} {AV_BYTEENABLE_W} {1};set_instance_parameter_value {uart_0_s1_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {uart_0_s1_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {uart_0_s1_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {uart_0_s1_translator} {AV_READLATENCY} {0};set_instance_parameter_value {uart_0_s1_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {uart_0_s1_translator} {AV_WRITE_WAIT} {1};set_instance_parameter_value {uart_0_s1_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {uart_0_s1_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {uart_0_s1_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {uart_0_s1_translator} {USE_READDATA} {1};set_instance_parameter_value {uart_0_s1_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {uart_0_s1_translator} {USE_READ} {1};set_instance_parameter_value {uart_0_s1_translator} {USE_WRITE} {1};set_instance_parameter_value {uart_0_s1_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {uart_0_s1_translator} {USE_BEGINTRANSFER} {1};set_instance_parameter_value {uart_0_s1_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {uart_0_s1_translator} {USE_CHIPSELECT} {1};set_instance_parameter_value {uart_0_s1_translator} {USE_ADDRESS} {1};set_instance_parameter_value {uart_0_s1_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {uart_0_s1_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {uart_0_s1_translator} {USE_WAITREQUEST} {0};set_instance_parameter_value {uart_0_s1_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {uart_0_s1_translator} {USE_LOCK} {0};set_instance_parameter_value {uart_0_s1_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {uart_0_s1_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {uart_0_s1_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {uart_0_s1_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {uart_0_s1_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {uart_0_s1_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {uart_0_s1_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {uart_0_s1_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {uart_0_s1_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {uart_0_s1_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {uart_0_s1_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {uart_0_s1_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {uart_0_s1_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {uart_0_s1_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {uart_0_s1_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {uart_0_s1_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {uart_0_s1_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {uart_0_s1_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {uart_0_s1_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {uart_0_s1_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {uart_0_s1_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {uart_0_s1_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {uart_0_s1_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {uart_0_s1_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {uart_0_s1_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {nios2_gen2_data_master_agent} {altera_merlin_master_agent};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_QOS_H} {75};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_QOS_L} {75};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_DATA_SIDEBAND_H} {73};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_DATA_SIDEBAND_L} {73};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_ADDR_SIDEBAND_H} {72};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_ADDR_SIDEBAND_L} {72};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_BURST_TYPE_H} {71};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_BURST_TYPE_L} {70};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_CACHE_H} {91};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_CACHE_L} {88};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_THREAD_ID_H} {84};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_THREAD_ID_L} {84};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_TRANS_EXCLUSIVE} {60};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_DATA_H} {31};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_DATA_L} {0};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {nios2_gen2_data_master_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {nios2_gen2_data_master_agent} {ST_DATA_W} {97};set_instance_parameter_value {nios2_gen2_data_master_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {nios2_gen2_data_master_agent} {AV_BURSTCOUNT_W} {3};set_instance_parameter_value {nios2_gen2_data_master_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {nios2_gen2_data_master_agent} {AV_BURSTBOUNDARIES} {1};set_instance_parameter_value {nios2_gen2_data_master_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {nios2_gen2_data_master_agent} {ADDR_MAP} {<?xml version="1.0" encoding="UTF-8"?>
|
|
<address_map>
|
|
<slave
|
|
id="5"
|
|
name="jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0"
|
|
start="0x00000000000410e8"
|
|
end="0x000000000000410f0"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="4"
|
|
name="i2c_opencores_mipi_avalon_slave_0_translator.avalon_universal_slave_0"
|
|
start="0x0000000000041060"
|
|
end="0x00000000000041080"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="3"
|
|
name="i2c_opencores_camera_avalon_slave_0_translator.avalon_universal_slave_0"
|
|
start="0x0000000000041040"
|
|
end="0x00000000000041060"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="13"
|
|
name="sysid_qsys_control_slave_translator.avalon_universal_slave_0"
|
|
start="0x00000000000410e0"
|
|
end="0x000000000000410e8"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="10"
|
|
name="nios2_gen2_debug_mem_slave_translator.avalon_universal_slave_0"
|
|
start="0x0000000000040800"
|
|
end="0x00000000000041000"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="1"
|
|
name="TERASIC_AUTO_FOCUS_0_mm_ctrl_translator.avalon_universal_slave_0"
|
|
start="0x0000000000041020"
|
|
end="0x00000000000041040"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="2"
|
|
name="altpll_0_pll_slave_translator.avalon_universal_slave_0"
|
|
start="0x00000000000410d0"
|
|
end="0x000000000000410e0"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="11"
|
|
name="onchip_memory2_0_s1_translator.avalon_universal_slave_0"
|
|
start="0x0000000000020000"
|
|
end="0x00000000000040000"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="14"
|
|
name="timer_s1_translator.avalon_universal_slave_0"
|
|
start="0x0000000000041000"
|
|
end="0x00000000000041020"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="7"
|
|
name="led_s1_translator.avalon_universal_slave_0"
|
|
start="0x00000000000410c0"
|
|
end="0x000000000000410d0"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="12"
|
|
name="sw_s1_translator.avalon_universal_slave_0"
|
|
start="0x00000000000410b0"
|
|
end="0x000000000000410c0"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="6"
|
|
name="key_s1_translator.avalon_universal_slave_0"
|
|
start="0x00000000000410a0"
|
|
end="0x000000000000410b0"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="9"
|
|
name="mipi_reset_n_s1_translator.avalon_universal_slave_0"
|
|
start="0x0000000000041090"
|
|
end="0x000000000000410a0"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="8"
|
|
name="mipi_pwdn_n_s1_translator.avalon_universal_slave_0"
|
|
start="0x0000000000041080"
|
|
end="0x00000000000041090"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="0"
|
|
name="EEE_IMGPROC_0_s1_translator.avalon_universal_slave_0"
|
|
start="0x0000000000042000"
|
|
end="0x00000000000042020"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="15"
|
|
name="uart_0_s1_translator.avalon_universal_slave_0"
|
|
start="0x0000000000042020"
|
|
end="0x00000000000042040"
|
|
responds="1"
|
|
user_default="0" />
|
|
</address_map>
|
|
};set_instance_parameter_value {nios2_gen2_data_master_agent} {SUPPRESS_0_BYTEEN_RSP} {0};set_instance_parameter_value {nios2_gen2_data_master_agent} {ID} {0};set_instance_parameter_value {nios2_gen2_data_master_agent} {BURSTWRAP_VALUE} {7};set_instance_parameter_value {nios2_gen2_data_master_agent} {CACHE_VALUE} {0};set_instance_parameter_value {nios2_gen2_data_master_agent} {SECURE_ACCESS_BIT} {1};set_instance_parameter_value {nios2_gen2_data_master_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {nios2_gen2_data_master_agent} {USE_WRITERESPONSE} {0};add_instance {nios2_gen2_instruction_master_agent} {altera_merlin_master_agent};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_QOS_H} {75};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_QOS_L} {75};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_DATA_SIDEBAND_H} {73};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_DATA_SIDEBAND_L} {73};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_ADDR_SIDEBAND_H} {72};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_ADDR_SIDEBAND_L} {72};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BURST_TYPE_H} {71};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BURST_TYPE_L} {70};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_CACHE_H} {91};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_CACHE_L} {88};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_THREAD_ID_H} {84};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_THREAD_ID_L} {84};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_TRANS_EXCLUSIVE} {60};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_DATA_H} {31};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_DATA_L} {0};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {ST_DATA_W} {97};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {AV_BURSTCOUNT_W} {3};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {AV_LINEWRAPBURSTS} {1};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {ADDR_MAP} {<?xml version="1.0" encoding="UTF-8"?>
|
|
<address_map>
|
|
<slave
|
|
id="11"
|
|
name="onchip_memory2_0_s1_translator.avalon_universal_slave_0"
|
|
start="0x0000000000020000"
|
|
end="0x00000000000040000"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="10"
|
|
name="nios2_gen2_debug_mem_slave_translator.avalon_universal_slave_0"
|
|
start="0x0000000000040800"
|
|
end="0x00000000000041000"
|
|
responds="1"
|
|
user_default="0" />
|
|
</address_map>
|
|
};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {SUPPRESS_0_BYTEEN_RSP} {0};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {ID} {1};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {BURSTWRAP_VALUE} {3};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {CACHE_VALUE} {0};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {SECURE_ACCESS_BIT} {1};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {USE_WRITERESPONSE} {0};add_instance {jtag_uart_avalon_jtag_slave_agent} {altera_merlin_slave_agent};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_DATA_H} {31};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_DATA_L} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {ST_DATA_W} {97};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {ID} {5};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {ECC_ENABLE} {0};add_instance {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {i2c_opencores_mipi_avalon_slave_0_agent} {altera_merlin_slave_agent};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_DATA_H} {31};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_DATA_L} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {ST_DATA_W} {97};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {ID} {4};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {ECC_ENABLE} {0};add_instance {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {i2c_opencores_camera_avalon_slave_0_agent} {altera_merlin_slave_agent};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_DATA_H} {31};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_DATA_L} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {ST_DATA_W} {97};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {ID} {3};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {ECC_ENABLE} {0};add_instance {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {sysid_qsys_control_slave_agent} {altera_merlin_slave_agent};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_DATA_H} {31};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_DATA_L} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {sysid_qsys_control_slave_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {sysid_qsys_control_slave_agent} {ST_DATA_W} {97};set_instance_parameter_value {sysid_qsys_control_slave_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {sysid_qsys_control_slave_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {sysid_qsys_control_slave_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {sysid_qsys_control_slave_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {sysid_qsys_control_slave_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {sysid_qsys_control_slave_agent} {ID} {13};set_instance_parameter_value {sysid_qsys_control_slave_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent} {ECC_ENABLE} {0};add_instance {sysid_qsys_control_slave_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {nios2_gen2_debug_mem_slave_agent} {altera_merlin_slave_agent};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_DATA_H} {31};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_DATA_L} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {ST_DATA_W} {97};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {ID} {10};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {ECC_ENABLE} {0};add_instance {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {altera_merlin_slave_agent};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_DATA_H} {31};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_DATA_L} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {ST_DATA_W} {97};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {ID} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {ECC_ENABLE} {0};add_instance {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {BITS_PER_SYMBOL} {34};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {USE_PACKETS} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {EMPTY_LATENCY} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {altpll_0_pll_slave_agent} {altera_merlin_slave_agent};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_DATA_H} {31};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_DATA_L} {0};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {altpll_0_pll_slave_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {altpll_0_pll_slave_agent} {ST_DATA_W} {97};set_instance_parameter_value {altpll_0_pll_slave_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {altpll_0_pll_slave_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {altpll_0_pll_slave_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {altpll_0_pll_slave_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {altpll_0_pll_slave_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {altpll_0_pll_slave_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {altpll_0_pll_slave_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {altpll_0_pll_slave_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {altpll_0_pll_slave_agent} {ID} {2};set_instance_parameter_value {altpll_0_pll_slave_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {altpll_0_pll_slave_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {altpll_0_pll_slave_agent} {ECC_ENABLE} {0};add_instance {altpll_0_pll_slave_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {onchip_memory2_0_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_DATA_H} {31};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {onchip_memory2_0_s1_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {onchip_memory2_0_s1_agent} {ST_DATA_W} {97};set_instance_parameter_value {onchip_memory2_0_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {onchip_memory2_0_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {onchip_memory2_0_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {onchip_memory2_0_s1_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {onchip_memory2_0_s1_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {onchip_memory2_0_s1_agent} {ID} {11};set_instance_parameter_value {onchip_memory2_0_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent} {ECC_ENABLE} {0};add_instance {onchip_memory2_0_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {timer_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {timer_s1_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {timer_s1_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {timer_s1_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {timer_s1_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {timer_s1_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {timer_s1_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {timer_s1_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {timer_s1_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {timer_s1_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {timer_s1_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {timer_s1_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {timer_s1_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {timer_s1_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {timer_s1_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {timer_s1_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {timer_s1_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {timer_s1_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {timer_s1_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {timer_s1_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {timer_s1_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {timer_s1_agent} {PKT_DATA_H} {31};set_instance_parameter_value {timer_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {timer_s1_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {timer_s1_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {timer_s1_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {timer_s1_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {timer_s1_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {timer_s1_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {timer_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {timer_s1_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {timer_s1_agent} {ST_DATA_W} {97};set_instance_parameter_value {timer_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {timer_s1_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {timer_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {timer_s1_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {timer_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {timer_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {timer_s1_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {timer_s1_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {timer_s1_agent} {ID} {14};set_instance_parameter_value {timer_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {timer_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {timer_s1_agent} {ECC_ENABLE} {0};add_instance {timer_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {led_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {led_s1_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {led_s1_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {led_s1_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {led_s1_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {led_s1_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {led_s1_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {led_s1_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {led_s1_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {led_s1_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {led_s1_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {led_s1_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {led_s1_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {led_s1_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {led_s1_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {led_s1_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {led_s1_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {led_s1_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {led_s1_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {led_s1_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {led_s1_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {led_s1_agent} {PKT_DATA_H} {31};set_instance_parameter_value {led_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {led_s1_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {led_s1_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {led_s1_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {led_s1_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {led_s1_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {led_s1_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {led_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {led_s1_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {led_s1_agent} {ST_DATA_W} {97};set_instance_parameter_value {led_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {led_s1_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {led_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {led_s1_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {led_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {led_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {led_s1_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {led_s1_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {led_s1_agent} {ID} {7};set_instance_parameter_value {led_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {led_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {led_s1_agent} {ECC_ENABLE} {0};add_instance {led_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {led_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {led_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {led_s1_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {led_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {led_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {led_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {led_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {led_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {led_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {led_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {led_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {led_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {led_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {led_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {sw_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {sw_s1_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {sw_s1_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {sw_s1_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {sw_s1_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {sw_s1_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {sw_s1_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {sw_s1_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {sw_s1_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {sw_s1_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {sw_s1_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {sw_s1_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {sw_s1_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {sw_s1_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {sw_s1_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {sw_s1_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {sw_s1_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {sw_s1_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {sw_s1_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {sw_s1_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {sw_s1_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {sw_s1_agent} {PKT_DATA_H} {31};set_instance_parameter_value {sw_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {sw_s1_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {sw_s1_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {sw_s1_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {sw_s1_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {sw_s1_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {sw_s1_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {sw_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {sw_s1_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {sw_s1_agent} {ST_DATA_W} {97};set_instance_parameter_value {sw_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {sw_s1_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {sw_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {sw_s1_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {sw_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {sw_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {sw_s1_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {sw_s1_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {sw_s1_agent} {ID} {12};set_instance_parameter_value {sw_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {sw_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {sw_s1_agent} {ECC_ENABLE} {0};add_instance {sw_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {key_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {key_s1_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {key_s1_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {key_s1_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {key_s1_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {key_s1_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {key_s1_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {key_s1_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {key_s1_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {key_s1_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {key_s1_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {key_s1_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {key_s1_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {key_s1_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {key_s1_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {key_s1_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {key_s1_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {key_s1_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {key_s1_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {key_s1_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {key_s1_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {key_s1_agent} {PKT_DATA_H} {31};set_instance_parameter_value {key_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {key_s1_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {key_s1_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {key_s1_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {key_s1_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {key_s1_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {key_s1_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {key_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {key_s1_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {key_s1_agent} {ST_DATA_W} {97};set_instance_parameter_value {key_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {key_s1_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {key_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {key_s1_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {key_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {key_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {key_s1_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {key_s1_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {key_s1_agent} {ID} {6};set_instance_parameter_value {key_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {key_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {key_s1_agent} {ECC_ENABLE} {0};add_instance {key_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {key_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {key_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {key_s1_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {key_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {key_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {key_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {key_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {key_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {key_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {key_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {key_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {key_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {key_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {key_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {mipi_reset_n_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_DATA_H} {31};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {mipi_reset_n_s1_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {mipi_reset_n_s1_agent} {ST_DATA_W} {97};set_instance_parameter_value {mipi_reset_n_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {mipi_reset_n_s1_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {mipi_reset_n_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {mipi_reset_n_s1_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {mipi_reset_n_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {mipi_reset_n_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {mipi_reset_n_s1_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {mipi_reset_n_s1_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {mipi_reset_n_s1_agent} {ID} {9};set_instance_parameter_value {mipi_reset_n_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {mipi_reset_n_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {mipi_reset_n_s1_agent} {ECC_ENABLE} {0};add_instance {mipi_reset_n_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {mipi_pwdn_n_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_DATA_H} {31};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {ST_DATA_W} {97};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {ID} {8};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {ECC_ENABLE} {0};add_instance {mipi_pwdn_n_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {EEE_IMGPROC_0_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_DATA_H} {31};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {ST_DATA_W} {97};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {ID} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {ECC_ENABLE} {0};add_instance {EEE_IMGPROC_0_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {EEE_IMGPROC_0_s1_agent_rdata_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {BITS_PER_SYMBOL} {34};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {USE_PACKETS} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {EMPTY_LATENCY} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {uart_0_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {uart_0_s1_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {uart_0_s1_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {uart_0_s1_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {uart_0_s1_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {uart_0_s1_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {uart_0_s1_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {uart_0_s1_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {uart_0_s1_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {uart_0_s1_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {uart_0_s1_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {uart_0_s1_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {uart_0_s1_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {uart_0_s1_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {uart_0_s1_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {uart_0_s1_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {uart_0_s1_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {uart_0_s1_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {uart_0_s1_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {uart_0_s1_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {uart_0_s1_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {uart_0_s1_agent} {PKT_DATA_H} {31};set_instance_parameter_value {uart_0_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {uart_0_s1_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {uart_0_s1_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {uart_0_s1_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {uart_0_s1_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {uart_0_s1_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {uart_0_s1_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {uart_0_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {uart_0_s1_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {uart_0_s1_agent} {ST_DATA_W} {97};set_instance_parameter_value {uart_0_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {uart_0_s1_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {uart_0_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {uart_0_s1_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {uart_0_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {uart_0_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {uart_0_s1_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {uart_0_s1_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {uart_0_s1_agent} {ID} {15};set_instance_parameter_value {uart_0_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {uart_0_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {uart_0_s1_agent} {ECC_ENABLE} {0};add_instance {uart_0_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {router} {altera_merlin_router};set_instance_parameter_value {router} {DESTINATION_ID} {11 10 14 1 3 4 8 9 6 12 7 2 13 5 0 15 };set_instance_parameter_value {router} {CHANNEL_ID} {0000000010000000 0000000000010000 0000000100000000 0000000000100000 0000000000000100 0000000000000010 0010000000000000 0001000000000000 0000100000000000 0000010000000000 0000001000000000 0000000001000000 0000000000001000 0000000000000001 0100000000000000 1000000000000000 };set_instance_parameter_value {router} {TYPE_OF_TRANSACTION} {both both both both both both both both read read both both read both both both };set_instance_parameter_value {router} {START_ADDRESS} {0x20000 0x40800 0x41000 0x41020 0x41040 0x41060 0x41080 0x41090 0x410a0 0x410b0 0x410c0 0x410d0 0x410e0 0x410e8 0x42000 0x42020 };set_instance_parameter_value {router} {END_ADDRESS} {0x40000 0x41000 0x41020 0x41040 0x41060 0x41080 0x41090 0x410a0 0x410b0 0x410c0 0x410d0 0x410e0 0x410e8 0x410f0 0x42020 0x42040 };set_instance_parameter_value {router} {NON_SECURED_TAG} {1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 };set_instance_parameter_value {router} {SECURED_RANGE_PAIRS} {0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 };set_instance_parameter_value {router} {SECURED_RANGE_LIST} {0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 };set_instance_parameter_value {router} {SPAN_OFFSET} {};set_instance_parameter_value {router} {PKT_ADDR_H} {54};set_instance_parameter_value {router} {PKT_ADDR_L} {36};set_instance_parameter_value {router} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router} {PKT_TRANS_READ} {58};set_instance_parameter_value {router} {ST_DATA_W} {97};set_instance_parameter_value {router} {ST_CHANNEL_W} {16};set_instance_parameter_value {router} {DECODER_TYPE} {0};set_instance_parameter_value {router} {DEFAULT_CHANNEL} {7};set_instance_parameter_value {router} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router} {DEFAULT_DESTID} {11};set_instance_parameter_value {router} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router} {MEMORY_ALIASING_DECODE} {0};add_instance {router_001} {altera_merlin_router};set_instance_parameter_value {router_001} {DESTINATION_ID} {11 10 };set_instance_parameter_value {router_001} {CHANNEL_ID} {10 01 };set_instance_parameter_value {router_001} {TYPE_OF_TRANSACTION} {both both };set_instance_parameter_value {router_001} {START_ADDRESS} {0x20000 0x40800 };set_instance_parameter_value {router_001} {END_ADDRESS} {0x40000 0x41000 };set_instance_parameter_value {router_001} {NON_SECURED_TAG} {1 1 };set_instance_parameter_value {router_001} {SECURED_RANGE_PAIRS} {0 0 };set_instance_parameter_value {router_001} {SECURED_RANGE_LIST} {0 0 };set_instance_parameter_value {router_001} {SPAN_OFFSET} {};set_instance_parameter_value {router_001} {PKT_ADDR_H} {54};set_instance_parameter_value {router_001} {PKT_ADDR_L} {36};set_instance_parameter_value {router_001} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_001} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_001} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_001} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_001} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_001} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_001} {ST_DATA_W} {97};set_instance_parameter_value {router_001} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_001} {DECODER_TYPE} {0};set_instance_parameter_value {router_001} {DEFAULT_CHANNEL} {1};set_instance_parameter_value {router_001} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_001} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_001} {DEFAULT_DESTID} {11};set_instance_parameter_value {router_001} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_001} {MEMORY_ALIASING_DECODE} {0};add_instance {router_002} {altera_merlin_router};set_instance_parameter_value {router_002} {DESTINATION_ID} {0 };set_instance_parameter_value {router_002} {CHANNEL_ID} {1 };set_instance_parameter_value {router_002} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_002} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_002} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_002} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_002} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_002} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_002} {SPAN_OFFSET} {};set_instance_parameter_value {router_002} {PKT_ADDR_H} {54};set_instance_parameter_value {router_002} {PKT_ADDR_L} {36};set_instance_parameter_value {router_002} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_002} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_002} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_002} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_002} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_002} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_002} {ST_DATA_W} {97};set_instance_parameter_value {router_002} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_002} {DECODER_TYPE} {1};set_instance_parameter_value {router_002} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_002} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_002} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_002} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_002} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_002} {MEMORY_ALIASING_DECODE} {0};add_instance {router_003} {altera_merlin_router};set_instance_parameter_value {router_003} {DESTINATION_ID} {0 };set_instance_parameter_value {router_003} {CHANNEL_ID} {1 };set_instance_parameter_value {router_003} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_003} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_003} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_003} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_003} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_003} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_003} {SPAN_OFFSET} {};set_instance_parameter_value {router_003} {PKT_ADDR_H} {54};set_instance_parameter_value {router_003} {PKT_ADDR_L} {36};set_instance_parameter_value {router_003} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_003} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_003} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_003} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_003} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_003} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_003} {ST_DATA_W} {97};set_instance_parameter_value {router_003} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_003} {DECODER_TYPE} {1};set_instance_parameter_value {router_003} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_003} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_003} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_003} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_003} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_003} {MEMORY_ALIASING_DECODE} {0};add_instance {router_004} {altera_merlin_router};set_instance_parameter_value {router_004} {DESTINATION_ID} {0 };set_instance_parameter_value {router_004} {CHANNEL_ID} {1 };set_instance_parameter_value {router_004} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_004} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_004} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_004} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_004} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_004} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_004} {SPAN_OFFSET} {};set_instance_parameter_value {router_004} {PKT_ADDR_H} {54};set_instance_parameter_value {router_004} {PKT_ADDR_L} {36};set_instance_parameter_value {router_004} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_004} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_004} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_004} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_004} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_004} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_004} {ST_DATA_W} {97};set_instance_parameter_value {router_004} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_004} {DECODER_TYPE} {1};set_instance_parameter_value {router_004} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_004} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_004} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_004} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_004} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_004} {MEMORY_ALIASING_DECODE} {0};add_instance {router_005} {altera_merlin_router};set_instance_parameter_value {router_005} {DESTINATION_ID} {0 };set_instance_parameter_value {router_005} {CHANNEL_ID} {1 };set_instance_parameter_value {router_005} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_005} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_005} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_005} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_005} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_005} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_005} {SPAN_OFFSET} {};set_instance_parameter_value {router_005} {PKT_ADDR_H} {54};set_instance_parameter_value {router_005} {PKT_ADDR_L} {36};set_instance_parameter_value {router_005} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_005} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_005} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_005} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_005} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_005} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_005} {ST_DATA_W} {97};set_instance_parameter_value {router_005} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_005} {DECODER_TYPE} {1};set_instance_parameter_value {router_005} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_005} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_005} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_005} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_005} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_005} {MEMORY_ALIASING_DECODE} {0};add_instance {router_006} {altera_merlin_router};set_instance_parameter_value {router_006} {DESTINATION_ID} {0 1 };set_instance_parameter_value {router_006} {CHANNEL_ID} {01 10 };set_instance_parameter_value {router_006} {TYPE_OF_TRANSACTION} {both read };set_instance_parameter_value {router_006} {START_ADDRESS} {0x0 0x0 };set_instance_parameter_value {router_006} {END_ADDRESS} {0x0 0x0 };set_instance_parameter_value {router_006} {NON_SECURED_TAG} {1 1 };set_instance_parameter_value {router_006} {SECURED_RANGE_PAIRS} {0 0 };set_instance_parameter_value {router_006} {SECURED_RANGE_LIST} {0 0 };set_instance_parameter_value {router_006} {SPAN_OFFSET} {};set_instance_parameter_value {router_006} {PKT_ADDR_H} {54};set_instance_parameter_value {router_006} {PKT_ADDR_L} {36};set_instance_parameter_value {router_006} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_006} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_006} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_006} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_006} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_006} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_006} {ST_DATA_W} {97};set_instance_parameter_value {router_006} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_006} {DECODER_TYPE} {1};set_instance_parameter_value {router_006} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_006} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_006} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_006} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_006} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_006} {MEMORY_ALIASING_DECODE} {0};add_instance {router_007} {altera_merlin_router};set_instance_parameter_value {router_007} {DESTINATION_ID} {0 };set_instance_parameter_value {router_007} {CHANNEL_ID} {1 };set_instance_parameter_value {router_007} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_007} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_007} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_007} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_007} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_007} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_007} {SPAN_OFFSET} {};set_instance_parameter_value {router_007} {PKT_ADDR_H} {54};set_instance_parameter_value {router_007} {PKT_ADDR_L} {36};set_instance_parameter_value {router_007} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_007} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_007} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_007} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_007} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_007} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_007} {ST_DATA_W} {97};set_instance_parameter_value {router_007} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_007} {DECODER_TYPE} {1};set_instance_parameter_value {router_007} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_007} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_007} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_007} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_007} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_007} {MEMORY_ALIASING_DECODE} {0};add_instance {router_008} {altera_merlin_router};set_instance_parameter_value {router_008} {DESTINATION_ID} {0 };set_instance_parameter_value {router_008} {CHANNEL_ID} {1 };set_instance_parameter_value {router_008} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_008} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_008} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_008} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_008} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_008} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_008} {SPAN_OFFSET} {};set_instance_parameter_value {router_008} {PKT_ADDR_H} {54};set_instance_parameter_value {router_008} {PKT_ADDR_L} {36};set_instance_parameter_value {router_008} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_008} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_008} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_008} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_008} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_008} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_008} {ST_DATA_W} {97};set_instance_parameter_value {router_008} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_008} {DECODER_TYPE} {1};set_instance_parameter_value {router_008} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_008} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_008} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_008} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_008} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_008} {MEMORY_ALIASING_DECODE} {0};add_instance {router_009} {altera_merlin_router};set_instance_parameter_value {router_009} {DESTINATION_ID} {0 1 };set_instance_parameter_value {router_009} {CHANNEL_ID} {01 10 };set_instance_parameter_value {router_009} {TYPE_OF_TRANSACTION} {both read };set_instance_parameter_value {router_009} {START_ADDRESS} {0x0 0x0 };set_instance_parameter_value {router_009} {END_ADDRESS} {0x0 0x0 };set_instance_parameter_value {router_009} {NON_SECURED_TAG} {1 1 };set_instance_parameter_value {router_009} {SECURED_RANGE_PAIRS} {0 0 };set_instance_parameter_value {router_009} {SECURED_RANGE_LIST} {0 0 };set_instance_parameter_value {router_009} {SPAN_OFFSET} {};set_instance_parameter_value {router_009} {PKT_ADDR_H} {54};set_instance_parameter_value {router_009} {PKT_ADDR_L} {36};set_instance_parameter_value {router_009} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_009} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_009} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_009} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_009} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_009} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_009} {ST_DATA_W} {97};set_instance_parameter_value {router_009} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_009} {DECODER_TYPE} {1};set_instance_parameter_value {router_009} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_009} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_009} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_009} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_009} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_009} {MEMORY_ALIASING_DECODE} {0};add_instance {router_010} {altera_merlin_router};set_instance_parameter_value {router_010} {DESTINATION_ID} {0 };set_instance_parameter_value {router_010} {CHANNEL_ID} {1 };set_instance_parameter_value {router_010} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_010} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_010} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_010} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_010} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_010} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_010} {SPAN_OFFSET} {};set_instance_parameter_value {router_010} {PKT_ADDR_H} {54};set_instance_parameter_value {router_010} {PKT_ADDR_L} {36};set_instance_parameter_value {router_010} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_010} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_010} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_010} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_010} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_010} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_010} {ST_DATA_W} {97};set_instance_parameter_value {router_010} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_010} {DECODER_TYPE} {1};set_instance_parameter_value {router_010} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_010} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_010} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_010} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_010} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_010} {MEMORY_ALIASING_DECODE} {0};add_instance {router_011} {altera_merlin_router};set_instance_parameter_value {router_011} {DESTINATION_ID} {0 };set_instance_parameter_value {router_011} {CHANNEL_ID} {1 };set_instance_parameter_value {router_011} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_011} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_011} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_011} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_011} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_011} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_011} {SPAN_OFFSET} {};set_instance_parameter_value {router_011} {PKT_ADDR_H} {54};set_instance_parameter_value {router_011} {PKT_ADDR_L} {36};set_instance_parameter_value {router_011} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_011} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_011} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_011} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_011} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_011} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_011} {ST_DATA_W} {97};set_instance_parameter_value {router_011} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_011} {DECODER_TYPE} {1};set_instance_parameter_value {router_011} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_011} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_011} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_011} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_011} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_011} {MEMORY_ALIASING_DECODE} {0};add_instance {router_012} {altera_merlin_router};set_instance_parameter_value {router_012} {DESTINATION_ID} {0 };set_instance_parameter_value {router_012} {CHANNEL_ID} {1 };set_instance_parameter_value {router_012} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_012} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_012} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_012} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_012} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_012} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_012} {SPAN_OFFSET} {};set_instance_parameter_value {router_012} {PKT_ADDR_H} {54};set_instance_parameter_value {router_012} {PKT_ADDR_L} {36};set_instance_parameter_value {router_012} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_012} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_012} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_012} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_012} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_012} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_012} {ST_DATA_W} {97};set_instance_parameter_value {router_012} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_012} {DECODER_TYPE} {1};set_instance_parameter_value {router_012} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_012} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_012} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_012} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_012} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_012} {MEMORY_ALIASING_DECODE} {0};add_instance {router_013} {altera_merlin_router};set_instance_parameter_value {router_013} {DESTINATION_ID} {0 };set_instance_parameter_value {router_013} {CHANNEL_ID} {1 };set_instance_parameter_value {router_013} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_013} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_013} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_013} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_013} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_013} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_013} {SPAN_OFFSET} {};set_instance_parameter_value {router_013} {PKT_ADDR_H} {54};set_instance_parameter_value {router_013} {PKT_ADDR_L} {36};set_instance_parameter_value {router_013} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_013} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_013} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_013} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_013} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_013} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_013} {ST_DATA_W} {97};set_instance_parameter_value {router_013} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_013} {DECODER_TYPE} {1};set_instance_parameter_value {router_013} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_013} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_013} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_013} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_013} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_013} {MEMORY_ALIASING_DECODE} {0};add_instance {router_014} {altera_merlin_router};set_instance_parameter_value {router_014} {DESTINATION_ID} {0 };set_instance_parameter_value {router_014} {CHANNEL_ID} {1 };set_instance_parameter_value {router_014} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_014} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_014} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_014} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_014} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_014} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_014} {SPAN_OFFSET} {};set_instance_parameter_value {router_014} {PKT_ADDR_H} {54};set_instance_parameter_value {router_014} {PKT_ADDR_L} {36};set_instance_parameter_value {router_014} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_014} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_014} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_014} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_014} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_014} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_014} {ST_DATA_W} {97};set_instance_parameter_value {router_014} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_014} {DECODER_TYPE} {1};set_instance_parameter_value {router_014} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_014} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_014} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_014} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_014} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_014} {MEMORY_ALIASING_DECODE} {0};add_instance {router_015} {altera_merlin_router};set_instance_parameter_value {router_015} {DESTINATION_ID} {0 };set_instance_parameter_value {router_015} {CHANNEL_ID} {1 };set_instance_parameter_value {router_015} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_015} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_015} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_015} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_015} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_015} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_015} {SPAN_OFFSET} {};set_instance_parameter_value {router_015} {PKT_ADDR_H} {54};set_instance_parameter_value {router_015} {PKT_ADDR_L} {36};set_instance_parameter_value {router_015} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_015} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_015} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_015} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_015} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_015} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_015} {ST_DATA_W} {97};set_instance_parameter_value {router_015} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_015} {DECODER_TYPE} {1};set_instance_parameter_value {router_015} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_015} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_015} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_015} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_015} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_015} {MEMORY_ALIASING_DECODE} {0};add_instance {router_016} {altera_merlin_router};set_instance_parameter_value {router_016} {DESTINATION_ID} {0 };set_instance_parameter_value {router_016} {CHANNEL_ID} {1 };set_instance_parameter_value {router_016} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_016} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_016} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_016} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_016} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_016} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_016} {SPAN_OFFSET} {};set_instance_parameter_value {router_016} {PKT_ADDR_H} {54};set_instance_parameter_value {router_016} {PKT_ADDR_L} {36};set_instance_parameter_value {router_016} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_016} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_016} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_016} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_016} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_016} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_016} {ST_DATA_W} {97};set_instance_parameter_value {router_016} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_016} {DECODER_TYPE} {1};set_instance_parameter_value {router_016} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_016} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_016} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_016} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_016} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_016} {MEMORY_ALIASING_DECODE} {0};add_instance {router_017} {altera_merlin_router};set_instance_parameter_value {router_017} {DESTINATION_ID} {0 };set_instance_parameter_value {router_017} {CHANNEL_ID} {1 };set_instance_parameter_value {router_017} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_017} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_017} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_017} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_017} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_017} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_017} {SPAN_OFFSET} {};set_instance_parameter_value {router_017} {PKT_ADDR_H} {54};set_instance_parameter_value {router_017} {PKT_ADDR_L} {36};set_instance_parameter_value {router_017} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_017} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_017} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_017} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_017} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_017} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_017} {ST_DATA_W} {97};set_instance_parameter_value {router_017} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_017} {DECODER_TYPE} {1};set_instance_parameter_value {router_017} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_017} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_017} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_017} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_017} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_017} {MEMORY_ALIASING_DECODE} {0};add_instance {nios2_gen2_data_master_limiter} {altera_merlin_traffic_limiter};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PKT_DEST_ID_H} {83};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PKT_DEST_ID_L} {80};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PKT_SRC_ID_H} {79};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PKT_SRC_ID_L} {76};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PKT_BYTEEN_H} {35};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PKT_BYTEEN_L} {32};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PKT_THREAD_ID_H} {84};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PKT_THREAD_ID_L} {84};set_instance_parameter_value {nios2_gen2_data_master_limiter} {MAX_BURST_LENGTH} {1};set_instance_parameter_value {nios2_gen2_data_master_limiter} {MAX_OUTSTANDING_RESPONSES} {5};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PIPELINED} {0};set_instance_parameter_value {nios2_gen2_data_master_limiter} {ST_DATA_W} {97};set_instance_parameter_value {nios2_gen2_data_master_limiter} {ST_CHANNEL_W} {16};set_instance_parameter_value {nios2_gen2_data_master_limiter} {VALID_WIDTH} {16};set_instance_parameter_value {nios2_gen2_data_master_limiter} {ENFORCE_ORDER} {1};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PREVENT_HAZARDS} {0};set_instance_parameter_value {nios2_gen2_data_master_limiter} {SUPPORTS_POSTED_WRITES} {1};set_instance_parameter_value {nios2_gen2_data_master_limiter} {SUPPORTS_NONPOSTED_WRITES} {0};set_instance_parameter_value {nios2_gen2_data_master_limiter} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {nios2_gen2_data_master_limiter} {REORDER} {0};add_instance {nios2_gen2_instruction_master_limiter} {altera_merlin_traffic_limiter};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PKT_DEST_ID_H} {83};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PKT_DEST_ID_L} {80};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PKT_SRC_ID_H} {79};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PKT_SRC_ID_L} {76};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PKT_BYTEEN_H} {35};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PKT_BYTEEN_L} {32};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PKT_THREAD_ID_H} {84};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PKT_THREAD_ID_L} {84};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {MAX_BURST_LENGTH} {1};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {MAX_OUTSTANDING_RESPONSES} {1};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PIPELINED} {0};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {ST_DATA_W} {97};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {ST_CHANNEL_W} {16};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {VALID_WIDTH} {16};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {ENFORCE_ORDER} {1};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PREVENT_HAZARDS} {0};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {SUPPORTS_POSTED_WRITES} {1};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {SUPPORTS_NONPOSTED_WRITES} {0};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {REORDER} {0};add_instance {cmd_demux} {altera_merlin_demultiplexer};set_instance_parameter_value {cmd_demux} {ST_DATA_W} {97};set_instance_parameter_value {cmd_demux} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_demux} {NUM_OUTPUTS} {16};set_instance_parameter_value {cmd_demux} {VALID_WIDTH} {16};set_instance_parameter_value {cmd_demux} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_demux_001} {altera_merlin_demultiplexer};set_instance_parameter_value {cmd_demux_001} {ST_DATA_W} {97};set_instance_parameter_value {cmd_demux_001} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_demux_001} {NUM_OUTPUTS} {2};set_instance_parameter_value {cmd_demux_001} {VALID_WIDTH} {16};set_instance_parameter_value {cmd_demux_001} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_001} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_001} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_001} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_001} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_001} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_001} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_001} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_001} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_001} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_001} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_002} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_002} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_002} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_002} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_002} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_002} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_002} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_002} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_002} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_002} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_003} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_003} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_003} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_003} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_003} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_003} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_003} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_003} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_003} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_003} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_004} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_004} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_004} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_004} {NUM_INPUTS} {2};set_instance_parameter_value {cmd_mux_004} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_004} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_004} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_004} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_004} {ARBITRATION_SHARES} {1 1 };set_instance_parameter_value {cmd_mux_004} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_005} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_005} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_005} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_005} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_005} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_005} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_005} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_005} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_005} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_005} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_006} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_006} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_006} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_006} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_006} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_006} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_006} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_006} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_006} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_006} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_007} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_007} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_007} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_007} {NUM_INPUTS} {2};set_instance_parameter_value {cmd_mux_007} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_007} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_007} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_007} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_007} {ARBITRATION_SHARES} {1 1 };set_instance_parameter_value {cmd_mux_007} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_008} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_008} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_008} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_008} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_008} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_008} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_008} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_008} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_008} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_008} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_009} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_009} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_009} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_009} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_009} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_009} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_009} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_009} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_009} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_009} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_010} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_010} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_010} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_010} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_010} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_010} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_010} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_010} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_010} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_010} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_011} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_011} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_011} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_011} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_011} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_011} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_011} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_011} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_011} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_011} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_012} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_012} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_012} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_012} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_012} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_012} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_012} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_012} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_012} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_012} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_013} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_013} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_013} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_013} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_013} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_013} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_013} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_013} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_013} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_013} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_014} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_014} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_014} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_014} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_014} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_014} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_014} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_014} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_014} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_014} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_015} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_015} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_015} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_015} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_015} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_015} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_015} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_015} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_015} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_015} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_001} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_001} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_001} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_001} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_001} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_001} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_002} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_002} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_002} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_002} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_002} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_002} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_003} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_003} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_003} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_003} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_003} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_003} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_004} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_004} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_004} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_004} {NUM_OUTPUTS} {2};set_instance_parameter_value {rsp_demux_004} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_004} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_005} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_005} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_005} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_005} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_005} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_005} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_006} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_006} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_006} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_006} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_006} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_006} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_007} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_007} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_007} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_007} {NUM_OUTPUTS} {2};set_instance_parameter_value {rsp_demux_007} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_007} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_008} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_008} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_008} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_008} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_008} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_008} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_009} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_009} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_009} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_009} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_009} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_009} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_010} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_010} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_010} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_010} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_010} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_010} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_011} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_011} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_011} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_011} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_011} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_011} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_012} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_012} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_012} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_012} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_012} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_012} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_013} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_013} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_013} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_013} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_013} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_013} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_014} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_014} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_014} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_014} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_014} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_014} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_015} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_015} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_015} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_015} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_015} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_015} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_mux} {altera_merlin_multiplexer};set_instance_parameter_value {rsp_mux} {ST_DATA_W} {97};set_instance_parameter_value {rsp_mux} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_mux} {NUM_INPUTS} {16};set_instance_parameter_value {rsp_mux} {PIPELINE_ARB} {0};set_instance_parameter_value {rsp_mux} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {rsp_mux} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {rsp_mux} {ARBITRATION_SCHEME} {no-arb};set_instance_parameter_value {rsp_mux} {ARBITRATION_SHARES} {1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 };set_instance_parameter_value {rsp_mux} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_mux_001} {altera_merlin_multiplexer};set_instance_parameter_value {rsp_mux_001} {ST_DATA_W} {97};set_instance_parameter_value {rsp_mux_001} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_mux_001} {NUM_INPUTS} {2};set_instance_parameter_value {rsp_mux_001} {PIPELINE_ARB} {0};set_instance_parameter_value {rsp_mux_001} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {rsp_mux_001} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {rsp_mux_001} {ARBITRATION_SCHEME} {no-arb};set_instance_parameter_value {rsp_mux_001} {ARBITRATION_SHARES} {1 1 };set_instance_parameter_value {rsp_mux_001} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {crosser} {altera_avalon_st_handshake_clock_crosser};set_instance_parameter_value {crosser} {DATA_WIDTH} {97};set_instance_parameter_value {crosser} {BITS_PER_SYMBOL} {97};set_instance_parameter_value {crosser} {USE_PACKETS} {1};set_instance_parameter_value {crosser} {USE_CHANNEL} {1};set_instance_parameter_value {crosser} {CHANNEL_WIDTH} {16};set_instance_parameter_value {crosser} {MAX_CHANNEL} {0};set_instance_parameter_value {crosser} {USE_ERROR} {0};set_instance_parameter_value {crosser} {ERROR_WIDTH} {1};set_instance_parameter_value {crosser} {VALID_SYNC_DEPTH} {2};set_instance_parameter_value {crosser} {READY_SYNC_DEPTH} {2};set_instance_parameter_value {crosser} {USE_OUTPUT_PIPELINE} {0};add_instance {crosser_001} {altera_avalon_st_handshake_clock_crosser};set_instance_parameter_value {crosser_001} {DATA_WIDTH} {97};set_instance_parameter_value {crosser_001} {BITS_PER_SYMBOL} {97};set_instance_parameter_value {crosser_001} {USE_PACKETS} {1};set_instance_parameter_value {crosser_001} {USE_CHANNEL} {1};set_instance_parameter_value {crosser_001} {CHANNEL_WIDTH} {16};set_instance_parameter_value {crosser_001} {MAX_CHANNEL} {0};set_instance_parameter_value {crosser_001} {USE_ERROR} {0};set_instance_parameter_value {crosser_001} {ERROR_WIDTH} {1};set_instance_parameter_value {crosser_001} {VALID_SYNC_DEPTH} {2};set_instance_parameter_value {crosser_001} {READY_SYNC_DEPTH} {2};set_instance_parameter_value {crosser_001} {USE_OUTPUT_PIPELINE} {0};add_instance {crosser_002} {altera_avalon_st_handshake_clock_crosser};set_instance_parameter_value {crosser_002} {DATA_WIDTH} {97};set_instance_parameter_value {crosser_002} {BITS_PER_SYMBOL} {97};set_instance_parameter_value {crosser_002} {USE_PACKETS} {1};set_instance_parameter_value {crosser_002} {USE_CHANNEL} {1};set_instance_parameter_value {crosser_002} {CHANNEL_WIDTH} {16};set_instance_parameter_value {crosser_002} {MAX_CHANNEL} {0};set_instance_parameter_value {crosser_002} {USE_ERROR} {0};set_instance_parameter_value {crosser_002} {ERROR_WIDTH} {1};set_instance_parameter_value {crosser_002} {VALID_SYNC_DEPTH} {2};set_instance_parameter_value {crosser_002} {READY_SYNC_DEPTH} {2};set_instance_parameter_value {crosser_002} {USE_OUTPUT_PIPELINE} {0};add_instance {crosser_003} {altera_avalon_st_handshake_clock_crosser};set_instance_parameter_value {crosser_003} {DATA_WIDTH} {97};set_instance_parameter_value {crosser_003} {BITS_PER_SYMBOL} {97};set_instance_parameter_value {crosser_003} {USE_PACKETS} {1};set_instance_parameter_value {crosser_003} {USE_CHANNEL} {1};set_instance_parameter_value {crosser_003} {CHANNEL_WIDTH} {16};set_instance_parameter_value {crosser_003} {MAX_CHANNEL} {0};set_instance_parameter_value {crosser_003} {USE_ERROR} {0};set_instance_parameter_value {crosser_003} {ERROR_WIDTH} {1};set_instance_parameter_value {crosser_003} {VALID_SYNC_DEPTH} {2};set_instance_parameter_value {crosser_003} {READY_SYNC_DEPTH} {2};set_instance_parameter_value {crosser_003} {USE_OUTPUT_PIPELINE} {0};add_instance {nios2_gen2_reset_reset_bridge} {altera_reset_bridge};set_instance_parameter_value {nios2_gen2_reset_reset_bridge} {ACTIVE_LOW_RESET} {0};set_instance_parameter_value {nios2_gen2_reset_reset_bridge} {SYNCHRONOUS_EDGES} {deassert};set_instance_parameter_value {nios2_gen2_reset_reset_bridge} {NUM_RESET_OUTPUTS} {1};set_instance_parameter_value {nios2_gen2_reset_reset_bridge} {USE_RESET_REQUEST} {0};add_instance {TERASIC_AUTO_FOCUS_0_reset_reset_bridge} {altera_reset_bridge};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_reset_reset_bridge} {ACTIVE_LOW_RESET} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_reset_reset_bridge} {SYNCHRONOUS_EDGES} {deassert};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_reset_reset_bridge} {NUM_RESET_OUTPUTS} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_reset_reset_bridge} {USE_RESET_REQUEST} {0};add_instance {altpll_0_inclk_interface_reset_reset_bridge} {altera_reset_bridge};set_instance_parameter_value {altpll_0_inclk_interface_reset_reset_bridge} {ACTIVE_LOW_RESET} {0};set_instance_parameter_value {altpll_0_inclk_interface_reset_reset_bridge} {SYNCHRONOUS_EDGES} {deassert};set_instance_parameter_value {altpll_0_inclk_interface_reset_reset_bridge} {NUM_RESET_OUTPUTS} {1};set_instance_parameter_value {altpll_0_inclk_interface_reset_reset_bridge} {USE_RESET_REQUEST} {0};add_instance {clk_50_clk_clock_bridge} {altera_clock_bridge};set_instance_parameter_value {clk_50_clk_clock_bridge} {EXPLICIT_CLOCK_RATE} {50000000};set_instance_parameter_value {clk_50_clk_clock_bridge} {NUM_CLOCK_OUTPUTS} {1};add_instance {altpll_0_c2_clock_bridge} {altera_clock_bridge};set_instance_parameter_value {altpll_0_c2_clock_bridge} {EXPLICIT_CLOCK_RATE} {100000000};set_instance_parameter_value {altpll_0_c2_clock_bridge} {NUM_CLOCK_OUTPUTS} {1};add_connection {nios2_gen2_data_master_translator.avalon_universal_master_0} {nios2_gen2_data_master_agent.av} {avalon};set_connection_parameter_value {nios2_gen2_data_master_translator.avalon_universal_master_0/nios2_gen2_data_master_agent.av} {arbitrationPriority} {1};set_connection_parameter_value {nios2_gen2_data_master_translator.avalon_universal_master_0/nios2_gen2_data_master_agent.av} {baseAddress} {0x0000};set_connection_parameter_value {nios2_gen2_data_master_translator.avalon_universal_master_0/nios2_gen2_data_master_agent.av} {defaultConnection} {false};add_connection {nios2_gen2_instruction_master_translator.avalon_universal_master_0} {nios2_gen2_instruction_master_agent.av} {avalon};set_connection_parameter_value {nios2_gen2_instruction_master_translator.avalon_universal_master_0/nios2_gen2_instruction_master_agent.av} {arbitrationPriority} {1};set_connection_parameter_value {nios2_gen2_instruction_master_translator.avalon_universal_master_0/nios2_gen2_instruction_master_agent.av} {baseAddress} {0x0000};set_connection_parameter_value {nios2_gen2_instruction_master_translator.avalon_universal_master_0/nios2_gen2_instruction_master_agent.av} {defaultConnection} {false};add_connection {jtag_uart_avalon_jtag_slave_agent.m0} {jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {jtag_uart_avalon_jtag_slave_agent.m0/jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {jtag_uart_avalon_jtag_slave_agent.m0/jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {jtag_uart_avalon_jtag_slave_agent.m0/jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {jtag_uart_avalon_jtag_slave_agent.rf_source} {jtag_uart_avalon_jtag_slave_agent_rsp_fifo.in} {avalon_streaming};add_connection {jtag_uart_avalon_jtag_slave_agent_rsp_fifo.out} {jtag_uart_avalon_jtag_slave_agent.rf_sink} {avalon_streaming};add_connection {jtag_uart_avalon_jtag_slave_agent.rdata_fifo_src} {jtag_uart_avalon_jtag_slave_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux.src} {jtag_uart_avalon_jtag_slave_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux.src/jtag_uart_avalon_jtag_slave_agent.cp} {qsys_mm.command};add_connection {i2c_opencores_mipi_avalon_slave_0_agent.m0} {i2c_opencores_mipi_avalon_slave_0_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent.m0/i2c_opencores_mipi_avalon_slave_0_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent.m0/i2c_opencores_mipi_avalon_slave_0_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent.m0/i2c_opencores_mipi_avalon_slave_0_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {i2c_opencores_mipi_avalon_slave_0_agent.rf_source} {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo.in} {avalon_streaming};add_connection {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo.out} {i2c_opencores_mipi_avalon_slave_0_agent.rf_sink} {avalon_streaming};add_connection {i2c_opencores_mipi_avalon_slave_0_agent.rdata_fifo_src} {i2c_opencores_mipi_avalon_slave_0_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_001.src} {i2c_opencores_mipi_avalon_slave_0_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_001.src/i2c_opencores_mipi_avalon_slave_0_agent.cp} {qsys_mm.command};add_connection {i2c_opencores_camera_avalon_slave_0_agent.m0} {i2c_opencores_camera_avalon_slave_0_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {i2c_opencores_camera_avalon_slave_0_agent.m0/i2c_opencores_camera_avalon_slave_0_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {i2c_opencores_camera_avalon_slave_0_agent.m0/i2c_opencores_camera_avalon_slave_0_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {i2c_opencores_camera_avalon_slave_0_agent.m0/i2c_opencores_camera_avalon_slave_0_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {i2c_opencores_camera_avalon_slave_0_agent.rf_source} {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo.in} {avalon_streaming};add_connection {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo.out} {i2c_opencores_camera_avalon_slave_0_agent.rf_sink} {avalon_streaming};add_connection {i2c_opencores_camera_avalon_slave_0_agent.rdata_fifo_src} {i2c_opencores_camera_avalon_slave_0_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_002.src} {i2c_opencores_camera_avalon_slave_0_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_002.src/i2c_opencores_camera_avalon_slave_0_agent.cp} {qsys_mm.command};add_connection {sysid_qsys_control_slave_agent.m0} {sysid_qsys_control_slave_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {sysid_qsys_control_slave_agent.m0/sysid_qsys_control_slave_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {sysid_qsys_control_slave_agent.m0/sysid_qsys_control_slave_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {sysid_qsys_control_slave_agent.m0/sysid_qsys_control_slave_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {sysid_qsys_control_slave_agent.rf_source} {sysid_qsys_control_slave_agent_rsp_fifo.in} {avalon_streaming};add_connection {sysid_qsys_control_slave_agent_rsp_fifo.out} {sysid_qsys_control_slave_agent.rf_sink} {avalon_streaming};add_connection {sysid_qsys_control_slave_agent.rdata_fifo_src} {sysid_qsys_control_slave_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_003.src} {sysid_qsys_control_slave_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_003.src/sysid_qsys_control_slave_agent.cp} {qsys_mm.command};add_connection {nios2_gen2_debug_mem_slave_agent.m0} {nios2_gen2_debug_mem_slave_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {nios2_gen2_debug_mem_slave_agent.m0/nios2_gen2_debug_mem_slave_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {nios2_gen2_debug_mem_slave_agent.m0/nios2_gen2_debug_mem_slave_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {nios2_gen2_debug_mem_slave_agent.m0/nios2_gen2_debug_mem_slave_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {nios2_gen2_debug_mem_slave_agent.rf_source} {nios2_gen2_debug_mem_slave_agent_rsp_fifo.in} {avalon_streaming};add_connection {nios2_gen2_debug_mem_slave_agent_rsp_fifo.out} {nios2_gen2_debug_mem_slave_agent.rf_sink} {avalon_streaming};add_connection {nios2_gen2_debug_mem_slave_agent.rdata_fifo_src} {nios2_gen2_debug_mem_slave_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_004.src} {nios2_gen2_debug_mem_slave_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_004.src/nios2_gen2_debug_mem_slave_agent.cp} {qsys_mm.command};add_connection {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.m0} {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.m0/TERASIC_AUTO_FOCUS_0_mm_ctrl_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.m0/TERASIC_AUTO_FOCUS_0_mm_ctrl_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.m0/TERASIC_AUTO_FOCUS_0_mm_ctrl_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.rf_source} {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo.in} {avalon_streaming};add_connection {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo.out} {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.rf_sink} {avalon_streaming};add_connection {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.rdata_fifo_src} {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo.in} {avalon_streaming};add_connection {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo.out} {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_005.src} {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_005.src/TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.cp} {qsys_mm.command};add_connection {altpll_0_pll_slave_agent.m0} {altpll_0_pll_slave_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {altpll_0_pll_slave_agent.m0/altpll_0_pll_slave_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {altpll_0_pll_slave_agent.m0/altpll_0_pll_slave_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {altpll_0_pll_slave_agent.m0/altpll_0_pll_slave_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {altpll_0_pll_slave_agent.rf_source} {altpll_0_pll_slave_agent_rsp_fifo.in} {avalon_streaming};add_connection {altpll_0_pll_slave_agent_rsp_fifo.out} {altpll_0_pll_slave_agent.rf_sink} {avalon_streaming};add_connection {altpll_0_pll_slave_agent.rdata_fifo_src} {altpll_0_pll_slave_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_006.src} {altpll_0_pll_slave_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_006.src/altpll_0_pll_slave_agent.cp} {qsys_mm.command};add_connection {onchip_memory2_0_s1_agent.m0} {onchip_memory2_0_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {onchip_memory2_0_s1_agent.m0/onchip_memory2_0_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {onchip_memory2_0_s1_agent.m0/onchip_memory2_0_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {onchip_memory2_0_s1_agent.m0/onchip_memory2_0_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {onchip_memory2_0_s1_agent.rf_source} {onchip_memory2_0_s1_agent_rsp_fifo.in} {avalon_streaming};add_connection {onchip_memory2_0_s1_agent_rsp_fifo.out} {onchip_memory2_0_s1_agent.rf_sink} {avalon_streaming};add_connection {onchip_memory2_0_s1_agent.rdata_fifo_src} {onchip_memory2_0_s1_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_007.src} {onchip_memory2_0_s1_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_007.src/onchip_memory2_0_s1_agent.cp} {qsys_mm.command};add_connection {timer_s1_agent.m0} {timer_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {timer_s1_agent.m0/timer_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {timer_s1_agent.m0/timer_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {timer_s1_agent.m0/timer_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {timer_s1_agent.rf_source} {timer_s1_agent_rsp_fifo.in} {avalon_streaming};add_connection {timer_s1_agent_rsp_fifo.out} {timer_s1_agent.rf_sink} {avalon_streaming};add_connection {timer_s1_agent.rdata_fifo_src} {timer_s1_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_008.src} {timer_s1_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_008.src/timer_s1_agent.cp} {qsys_mm.command};add_connection {led_s1_agent.m0} {led_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {led_s1_agent.m0/led_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {led_s1_agent.m0/led_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {led_s1_agent.m0/led_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {led_s1_agent.rf_source} {led_s1_agent_rsp_fifo.in} {avalon_streaming};add_connection {led_s1_agent_rsp_fifo.out} {led_s1_agent.rf_sink} {avalon_streaming};add_connection {led_s1_agent.rdata_fifo_src} {led_s1_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_009.src} {led_s1_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_009.src/led_s1_agent.cp} {qsys_mm.command};add_connection {sw_s1_agent.m0} {sw_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {sw_s1_agent.m0/sw_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {sw_s1_agent.m0/sw_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {sw_s1_agent.m0/sw_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {sw_s1_agent.rf_source} {sw_s1_agent_rsp_fifo.in} {avalon_streaming};add_connection {sw_s1_agent_rsp_fifo.out} {sw_s1_agent.rf_sink} {avalon_streaming};add_connection {sw_s1_agent.rdata_fifo_src} {sw_s1_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_010.src} {sw_s1_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_010.src/sw_s1_agent.cp} {qsys_mm.command};add_connection {key_s1_agent.m0} {key_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {key_s1_agent.m0/key_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {key_s1_agent.m0/key_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {key_s1_agent.m0/key_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {key_s1_agent.rf_source} {key_s1_agent_rsp_fifo.in} {avalon_streaming};add_connection {key_s1_agent_rsp_fifo.out} {key_s1_agent.rf_sink} {avalon_streaming};add_connection {key_s1_agent.rdata_fifo_src} {key_s1_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_011.src} {key_s1_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_011.src/key_s1_agent.cp} {qsys_mm.command};add_connection {mipi_reset_n_s1_agent.m0} {mipi_reset_n_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {mipi_reset_n_s1_agent.m0/mipi_reset_n_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {mipi_reset_n_s1_agent.m0/mipi_reset_n_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {mipi_reset_n_s1_agent.m0/mipi_reset_n_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {mipi_reset_n_s1_agent.rf_source} {mipi_reset_n_s1_agent_rsp_fifo.in} {avalon_streaming};add_connection {mipi_reset_n_s1_agent_rsp_fifo.out} {mipi_reset_n_s1_agent.rf_sink} {avalon_streaming};add_connection {mipi_reset_n_s1_agent.rdata_fifo_src} {mipi_reset_n_s1_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_012.src} {mipi_reset_n_s1_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_012.src/mipi_reset_n_s1_agent.cp} {qsys_mm.command};add_connection {mipi_pwdn_n_s1_agent.m0} {mipi_pwdn_n_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {mipi_pwdn_n_s1_agent.m0/mipi_pwdn_n_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {mipi_pwdn_n_s1_agent.m0/mipi_pwdn_n_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {mipi_pwdn_n_s1_agent.m0/mipi_pwdn_n_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {mipi_pwdn_n_s1_agent.rf_source} {mipi_pwdn_n_s1_agent_rsp_fifo.in} {avalon_streaming};add_connection {mipi_pwdn_n_s1_agent_rsp_fifo.out} {mipi_pwdn_n_s1_agent.rf_sink} {avalon_streaming};add_connection {mipi_pwdn_n_s1_agent.rdata_fifo_src} {mipi_pwdn_n_s1_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_013.src} {mipi_pwdn_n_s1_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_013.src/mipi_pwdn_n_s1_agent.cp} {qsys_mm.command};add_connection {EEE_IMGPROC_0_s1_agent.m0} {EEE_IMGPROC_0_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {EEE_IMGPROC_0_s1_agent.m0/EEE_IMGPROC_0_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {EEE_IMGPROC_0_s1_agent.m0/EEE_IMGPROC_0_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {EEE_IMGPROC_0_s1_agent.m0/EEE_IMGPROC_0_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {EEE_IMGPROC_0_s1_agent.rf_source} {EEE_IMGPROC_0_s1_agent_rsp_fifo.in} {avalon_streaming};add_connection {EEE_IMGPROC_0_s1_agent_rsp_fifo.out} {EEE_IMGPROC_0_s1_agent.rf_sink} {avalon_streaming};add_connection {EEE_IMGPROC_0_s1_agent.rdata_fifo_src} {EEE_IMGPROC_0_s1_agent_rdata_fifo.in} {avalon_streaming};add_connection {EEE_IMGPROC_0_s1_agent_rdata_fifo.out} {EEE_IMGPROC_0_s1_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_014.src} {EEE_IMGPROC_0_s1_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_014.src/EEE_IMGPROC_0_s1_agent.cp} {qsys_mm.command};add_connection {uart_0_s1_agent.m0} {uart_0_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {uart_0_s1_agent.m0/uart_0_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {uart_0_s1_agent.m0/uart_0_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {uart_0_s1_agent.m0/uart_0_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {uart_0_s1_agent.rf_source} {uart_0_s1_agent_rsp_fifo.in} {avalon_streaming};add_connection {uart_0_s1_agent_rsp_fifo.out} {uart_0_s1_agent.rf_sink} {avalon_streaming};add_connection {uart_0_s1_agent.rdata_fifo_src} {uart_0_s1_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_015.src} {uart_0_s1_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_015.src/uart_0_s1_agent.cp} {qsys_mm.command};add_connection {nios2_gen2_data_master_agent.cp} {router.sink} {avalon_streaming};preview_set_connection_tag {nios2_gen2_data_master_agent.cp/router.sink} {qsys_mm.command};add_connection {nios2_gen2_instruction_master_agent.cp} {router_001.sink} {avalon_streaming};preview_set_connection_tag {nios2_gen2_instruction_master_agent.cp/router_001.sink} {qsys_mm.command};add_connection {jtag_uart_avalon_jtag_slave_agent.rp} {router_002.sink} {avalon_streaming};preview_set_connection_tag {jtag_uart_avalon_jtag_slave_agent.rp/router_002.sink} {qsys_mm.response};add_connection {router_002.src} {rsp_demux.sink} {avalon_streaming};preview_set_connection_tag {router_002.src/rsp_demux.sink} {qsys_mm.response};add_connection {i2c_opencores_mipi_avalon_slave_0_agent.rp} {router_003.sink} {avalon_streaming};preview_set_connection_tag {i2c_opencores_mipi_avalon_slave_0_agent.rp/router_003.sink} {qsys_mm.response};add_connection {router_003.src} {rsp_demux_001.sink} {avalon_streaming};preview_set_connection_tag {router_003.src/rsp_demux_001.sink} {qsys_mm.response};add_connection {i2c_opencores_camera_avalon_slave_0_agent.rp} {router_004.sink} {avalon_streaming};preview_set_connection_tag {i2c_opencores_camera_avalon_slave_0_agent.rp/router_004.sink} {qsys_mm.response};add_connection {router_004.src} {rsp_demux_002.sink} {avalon_streaming};preview_set_connection_tag {router_004.src/rsp_demux_002.sink} {qsys_mm.response};add_connection {sysid_qsys_control_slave_agent.rp} {router_005.sink} {avalon_streaming};preview_set_connection_tag {sysid_qsys_control_slave_agent.rp/router_005.sink} {qsys_mm.response};add_connection {router_005.src} {rsp_demux_003.sink} {avalon_streaming};preview_set_connection_tag {router_005.src/rsp_demux_003.sink} {qsys_mm.response};add_connection {nios2_gen2_debug_mem_slave_agent.rp} {router_006.sink} {avalon_streaming};preview_set_connection_tag {nios2_gen2_debug_mem_slave_agent.rp/router_006.sink} {qsys_mm.response};add_connection {router_006.src} {rsp_demux_004.sink} {avalon_streaming};preview_set_connection_tag {router_006.src/rsp_demux_004.sink} {qsys_mm.response};add_connection {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.rp} {router_007.sink} {avalon_streaming};preview_set_connection_tag {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.rp/router_007.sink} {qsys_mm.response};add_connection {router_007.src} {rsp_demux_005.sink} {avalon_streaming};preview_set_connection_tag {router_007.src/rsp_demux_005.sink} {qsys_mm.response};add_connection {altpll_0_pll_slave_agent.rp} {router_008.sink} {avalon_streaming};preview_set_connection_tag {altpll_0_pll_slave_agent.rp/router_008.sink} {qsys_mm.response};add_connection {router_008.src} {rsp_demux_006.sink} {avalon_streaming};preview_set_connection_tag {router_008.src/rsp_demux_006.sink} {qsys_mm.response};add_connection {onchip_memory2_0_s1_agent.rp} {router_009.sink} {avalon_streaming};preview_set_connection_tag {onchip_memory2_0_s1_agent.rp/router_009.sink} {qsys_mm.response};add_connection {router_009.src} {rsp_demux_007.sink} {avalon_streaming};preview_set_connection_tag {router_009.src/rsp_demux_007.sink} {qsys_mm.response};add_connection {timer_s1_agent.rp} {router_010.sink} {avalon_streaming};preview_set_connection_tag {timer_s1_agent.rp/router_010.sink} {qsys_mm.response};add_connection {router_010.src} {rsp_demux_008.sink} {avalon_streaming};preview_set_connection_tag {router_010.src/rsp_demux_008.sink} {qsys_mm.response};add_connection {led_s1_agent.rp} {router_011.sink} {avalon_streaming};preview_set_connection_tag {led_s1_agent.rp/router_011.sink} {qsys_mm.response};add_connection {router_011.src} {rsp_demux_009.sink} {avalon_streaming};preview_set_connection_tag {router_011.src/rsp_demux_009.sink} {qsys_mm.response};add_connection {sw_s1_agent.rp} {router_012.sink} {avalon_streaming};preview_set_connection_tag {sw_s1_agent.rp/router_012.sink} {qsys_mm.response};add_connection {router_012.src} {rsp_demux_010.sink} {avalon_streaming};preview_set_connection_tag {router_012.src/rsp_demux_010.sink} {qsys_mm.response};add_connection {key_s1_agent.rp} {router_013.sink} {avalon_streaming};preview_set_connection_tag {key_s1_agent.rp/router_013.sink} {qsys_mm.response};add_connection {router_013.src} {rsp_demux_011.sink} {avalon_streaming};preview_set_connection_tag {router_013.src/rsp_demux_011.sink} {qsys_mm.response};add_connection {mipi_reset_n_s1_agent.rp} {router_014.sink} {avalon_streaming};preview_set_connection_tag {mipi_reset_n_s1_agent.rp/router_014.sink} {qsys_mm.response};add_connection {router_014.src} {rsp_demux_012.sink} {avalon_streaming};preview_set_connection_tag {router_014.src/rsp_demux_012.sink} {qsys_mm.response};add_connection {mipi_pwdn_n_s1_agent.rp} {router_015.sink} {avalon_streaming};preview_set_connection_tag {mipi_pwdn_n_s1_agent.rp/router_015.sink} {qsys_mm.response};add_connection {router_015.src} {rsp_demux_013.sink} {avalon_streaming};preview_set_connection_tag {router_015.src/rsp_demux_013.sink} {qsys_mm.response};add_connection {EEE_IMGPROC_0_s1_agent.rp} {router_016.sink} {avalon_streaming};preview_set_connection_tag {EEE_IMGPROC_0_s1_agent.rp/router_016.sink} {qsys_mm.response};add_connection {router_016.src} {rsp_demux_014.sink} {avalon_streaming};preview_set_connection_tag {router_016.src/rsp_demux_014.sink} {qsys_mm.response};add_connection {uart_0_s1_agent.rp} {router_017.sink} {avalon_streaming};preview_set_connection_tag {uart_0_s1_agent.rp/router_017.sink} {qsys_mm.response};add_connection {router_017.src} {rsp_demux_015.sink} {avalon_streaming};preview_set_connection_tag {router_017.src/rsp_demux_015.sink} {qsys_mm.response};add_connection {router.src} {nios2_gen2_data_master_limiter.cmd_sink} {avalon_streaming};preview_set_connection_tag {router.src/nios2_gen2_data_master_limiter.cmd_sink} {qsys_mm.command};add_connection {nios2_gen2_data_master_limiter.cmd_src} {cmd_demux.sink} {avalon_streaming};preview_set_connection_tag {nios2_gen2_data_master_limiter.cmd_src/cmd_demux.sink} {qsys_mm.command};add_connection {rsp_mux.src} {nios2_gen2_data_master_limiter.rsp_sink} {avalon_streaming};preview_set_connection_tag {rsp_mux.src/nios2_gen2_data_master_limiter.rsp_sink} {qsys_mm.response};add_connection {nios2_gen2_data_master_limiter.rsp_src} {nios2_gen2_data_master_agent.rp} {avalon_streaming};preview_set_connection_tag {nios2_gen2_data_master_limiter.rsp_src/nios2_gen2_data_master_agent.rp} {qsys_mm.response};add_connection {router_001.src} {nios2_gen2_instruction_master_limiter.cmd_sink} {avalon_streaming};preview_set_connection_tag {router_001.src/nios2_gen2_instruction_master_limiter.cmd_sink} {qsys_mm.command};add_connection {nios2_gen2_instruction_master_limiter.cmd_src} {cmd_demux_001.sink} {avalon_streaming};preview_set_connection_tag {nios2_gen2_instruction_master_limiter.cmd_src/cmd_demux_001.sink} {qsys_mm.command};add_connection {rsp_mux_001.src} {nios2_gen2_instruction_master_limiter.rsp_sink} {avalon_streaming};preview_set_connection_tag {rsp_mux_001.src/nios2_gen2_instruction_master_limiter.rsp_sink} {qsys_mm.response};add_connection {nios2_gen2_instruction_master_limiter.rsp_src} {nios2_gen2_instruction_master_agent.rp} {avalon_streaming};preview_set_connection_tag {nios2_gen2_instruction_master_limiter.rsp_src/nios2_gen2_instruction_master_agent.rp} {qsys_mm.response};add_connection {cmd_demux.src0} {cmd_mux.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src0/cmd_mux.sink0} {qsys_mm.command};add_connection {cmd_demux.src1} {cmd_mux_001.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src1/cmd_mux_001.sink0} {qsys_mm.command};add_connection {cmd_demux.src2} {cmd_mux_002.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src2/cmd_mux_002.sink0} {qsys_mm.command};add_connection {cmd_demux.src3} {cmd_mux_003.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src3/cmd_mux_003.sink0} {qsys_mm.command};add_connection {cmd_demux.src4} {cmd_mux_004.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src4/cmd_mux_004.sink0} {qsys_mm.command};add_connection {cmd_demux.src6} {cmd_mux_006.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src6/cmd_mux_006.sink0} {qsys_mm.command};add_connection {cmd_demux.src7} {cmd_mux_007.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src7/cmd_mux_007.sink0} {qsys_mm.command};add_connection {cmd_demux.src8} {cmd_mux_008.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src8/cmd_mux_008.sink0} {qsys_mm.command};add_connection {cmd_demux.src9} {cmd_mux_009.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src9/cmd_mux_009.sink0} {qsys_mm.command};add_connection {cmd_demux.src10} {cmd_mux_010.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src10/cmd_mux_010.sink0} {qsys_mm.command};add_connection {cmd_demux.src11} {cmd_mux_011.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src11/cmd_mux_011.sink0} {qsys_mm.command};add_connection {cmd_demux.src12} {cmd_mux_012.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src12/cmd_mux_012.sink0} {qsys_mm.command};add_connection {cmd_demux.src13} {cmd_mux_013.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src13/cmd_mux_013.sink0} {qsys_mm.command};add_connection {cmd_demux.src15} {cmd_mux_015.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src15/cmd_mux_015.sink0} {qsys_mm.command};add_connection {cmd_demux_001.src0} {cmd_mux_004.sink1} {avalon_streaming};preview_set_connection_tag {cmd_demux_001.src0/cmd_mux_004.sink1} {qsys_mm.command};add_connection {cmd_demux_001.src1} {cmd_mux_007.sink1} {avalon_streaming};preview_set_connection_tag {cmd_demux_001.src1/cmd_mux_007.sink1} {qsys_mm.command};add_connection {rsp_demux.src0} {rsp_mux.sink0} {avalon_streaming};preview_set_connection_tag {rsp_demux.src0/rsp_mux.sink0} {qsys_mm.response};add_connection {rsp_demux_001.src0} {rsp_mux.sink1} {avalon_streaming};preview_set_connection_tag {rsp_demux_001.src0/rsp_mux.sink1} {qsys_mm.response};add_connection {rsp_demux_002.src0} {rsp_mux.sink2} {avalon_streaming};preview_set_connection_tag {rsp_demux_002.src0/rsp_mux.sink2} {qsys_mm.response};add_connection {rsp_demux_003.src0} {rsp_mux.sink3} {avalon_streaming};preview_set_connection_tag {rsp_demux_003.src0/rsp_mux.sink3} {qsys_mm.response};add_connection {rsp_demux_004.src0} {rsp_mux.sink4} {avalon_streaming};preview_set_connection_tag {rsp_demux_004.src0/rsp_mux.sink4} {qsys_mm.response};add_connection {rsp_demux_004.src1} {rsp_mux_001.sink0} {avalon_streaming};preview_set_connection_tag {rsp_demux_004.src1/rsp_mux_001.sink0} {qsys_mm.response};add_connection {rsp_demux_006.src0} {rsp_mux.sink6} {avalon_streaming};preview_set_connection_tag {rsp_demux_006.src0/rsp_mux.sink6} {qsys_mm.response};add_connection {rsp_demux_007.src0} {rsp_mux.sink7} {avalon_streaming};preview_set_connection_tag {rsp_demux_007.src0/rsp_mux.sink7} {qsys_mm.response};add_connection {rsp_demux_007.src1} {rsp_mux_001.sink1} {avalon_streaming};preview_set_connection_tag {rsp_demux_007.src1/rsp_mux_001.sink1} {qsys_mm.response};add_connection {rsp_demux_008.src0} {rsp_mux.sink8} {avalon_streaming};preview_set_connection_tag {rsp_demux_008.src0/rsp_mux.sink8} {qsys_mm.response};add_connection {rsp_demux_009.src0} {rsp_mux.sink9} {avalon_streaming};preview_set_connection_tag {rsp_demux_009.src0/rsp_mux.sink9} {qsys_mm.response};add_connection {rsp_demux_010.src0} {rsp_mux.sink10} {avalon_streaming};preview_set_connection_tag {rsp_demux_010.src0/rsp_mux.sink10} {qsys_mm.response};add_connection {rsp_demux_011.src0} {rsp_mux.sink11} {avalon_streaming};preview_set_connection_tag {rsp_demux_011.src0/rsp_mux.sink11} {qsys_mm.response};add_connection {rsp_demux_012.src0} {rsp_mux.sink12} {avalon_streaming};preview_set_connection_tag {rsp_demux_012.src0/rsp_mux.sink12} {qsys_mm.response};add_connection {rsp_demux_013.src0} {rsp_mux.sink13} {avalon_streaming};preview_set_connection_tag {rsp_demux_013.src0/rsp_mux.sink13} {qsys_mm.response};add_connection {rsp_demux_015.src0} {rsp_mux.sink15} {avalon_streaming};preview_set_connection_tag {rsp_demux_015.src0/rsp_mux.sink15} {qsys_mm.response};add_connection {cmd_demux.src5} {crosser.in} {avalon_streaming};preview_set_connection_tag {cmd_demux.src5/crosser.in} {qsys_mm.command};add_connection {crosser.out} {cmd_mux_005.sink0} {avalon_streaming};preview_set_connection_tag {crosser.out/cmd_mux_005.sink0} {qsys_mm.command};add_connection {cmd_demux.src14} {crosser_001.in} {avalon_streaming};preview_set_connection_tag {cmd_demux.src14/crosser_001.in} {qsys_mm.command};add_connection {crosser_001.out} {cmd_mux_014.sink0} {avalon_streaming};preview_set_connection_tag {crosser_001.out/cmd_mux_014.sink0} {qsys_mm.command};add_connection {rsp_demux_005.src0} {crosser_002.in} {avalon_streaming};preview_set_connection_tag {rsp_demux_005.src0/crosser_002.in} {qsys_mm.response};add_connection {crosser_002.out} {rsp_mux.sink5} {avalon_streaming};preview_set_connection_tag {crosser_002.out/rsp_mux.sink5} {qsys_mm.response};add_connection {rsp_demux_014.src0} {crosser_003.in} {avalon_streaming};preview_set_connection_tag {rsp_demux_014.src0/crosser_003.in} {qsys_mm.response};add_connection {crosser_003.out} {rsp_mux.sink14} {avalon_streaming};preview_set_connection_tag {crosser_003.out/rsp_mux.sink14} {qsys_mm.response};add_connection {nios2_gen2_data_master_limiter.cmd_valid} {cmd_demux.sink_valid} {avalon_streaming};add_connection {nios2_gen2_instruction_master_limiter.cmd_valid} {cmd_demux_001.sink_valid} {avalon_streaming};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {nios2_gen2_data_master_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {nios2_gen2_instruction_master_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {jtag_uart_avalon_jtag_slave_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {i2c_opencores_mipi_avalon_slave_0_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {i2c_opencores_camera_avalon_slave_0_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {sysid_qsys_control_slave_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {nios2_gen2_debug_mem_slave_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {onchip_memory2_0_s1_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {timer_s1_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {led_s1_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {sw_s1_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {key_s1_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {mipi_reset_n_s1_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {mipi_pwdn_n_s1_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {uart_0_s1_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {nios2_gen2_data_master_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {nios2_gen2_instruction_master_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {jtag_uart_avalon_jtag_slave_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {jtag_uart_avalon_jtag_slave_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {i2c_opencores_mipi_avalon_slave_0_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {i2c_opencores_camera_avalon_slave_0_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {sysid_qsys_control_slave_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {sysid_qsys_control_slave_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {nios2_gen2_debug_mem_slave_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {nios2_gen2_debug_mem_slave_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {onchip_memory2_0_s1_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {onchip_memory2_0_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {timer_s1_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {timer_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {led_s1_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {led_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {sw_s1_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {sw_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {key_s1_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {key_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {mipi_reset_n_s1_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {mipi_reset_n_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {mipi_pwdn_n_s1_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {mipi_pwdn_n_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {uart_0_s1_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {uart_0_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_001.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_002.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_003.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_004.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_005.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_006.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_009.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_010.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_011.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_012.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_013.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_014.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_015.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_017.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {nios2_gen2_data_master_limiter.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {nios2_gen2_instruction_master_limiter.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_demux.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_demux_001.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux_001.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux_002.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux_003.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux_004.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux_007.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux_008.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux_009.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux_010.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux_011.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux_012.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux_013.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux_015.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux_001.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux_002.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux_003.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux_004.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux_007.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux_008.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux_009.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux_010.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux_011.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux_012.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux_013.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux_015.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_mux.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_mux_001.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {crosser.in_clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {crosser_001.in_clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {crosser_002.out_clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {crosser_003.out_clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator.reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {EEE_IMGPROC_0_s1_translator.reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo.clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo.clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {EEE_IMGPROC_0_s1_agent.clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {EEE_IMGPROC_0_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {EEE_IMGPROC_0_s1_agent_rdata_fifo.clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {router_007.clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {router_016.clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {cmd_mux_005.clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {cmd_mux_014.clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {rsp_demux_005.clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {rsp_demux_014.clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {crosser.out_clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {crosser_001.out_clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {crosser_002.in_clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {crosser_003.in_clk_reset} {reset};add_connection {altpll_0_inclk_interface_reset_reset_bridge.out_reset} {altpll_0_pll_slave_translator.reset} {reset};add_connection {altpll_0_inclk_interface_reset_reset_bridge.out_reset} {altpll_0_pll_slave_agent.clk_reset} {reset};add_connection {altpll_0_inclk_interface_reset_reset_bridge.out_reset} {altpll_0_pll_slave_agent_rsp_fifo.clk_reset} {reset};add_connection {altpll_0_inclk_interface_reset_reset_bridge.out_reset} {router_008.clk_reset} {reset};add_connection {altpll_0_inclk_interface_reset_reset_bridge.out_reset} {cmd_mux_006.clk_reset} {reset};add_connection {altpll_0_inclk_interface_reset_reset_bridge.out_reset} {rsp_demux_006.clk_reset} {reset};add_connection {clk_50_clk_clock_bridge.out_clk} {nios2_gen2_data_master_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {nios2_gen2_instruction_master_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {jtag_uart_avalon_jtag_slave_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {i2c_opencores_mipi_avalon_slave_0_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {i2c_opencores_camera_avalon_slave_0_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {sysid_qsys_control_slave_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {nios2_gen2_debug_mem_slave_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {altpll_0_pll_slave_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {onchip_memory2_0_s1_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {timer_s1_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {led_s1_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {sw_s1_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {key_s1_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {mipi_reset_n_s1_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {mipi_pwdn_n_s1_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {uart_0_s1_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {nios2_gen2_data_master_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {nios2_gen2_instruction_master_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {jtag_uart_avalon_jtag_slave_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {jtag_uart_avalon_jtag_slave_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {i2c_opencores_mipi_avalon_slave_0_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {i2c_opencores_camera_avalon_slave_0_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {sysid_qsys_control_slave_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {sysid_qsys_control_slave_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {nios2_gen2_debug_mem_slave_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {nios2_gen2_debug_mem_slave_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {altpll_0_pll_slave_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {altpll_0_pll_slave_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {onchip_memory2_0_s1_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {onchip_memory2_0_s1_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {timer_s1_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {timer_s1_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {led_s1_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {led_s1_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {sw_s1_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {sw_s1_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {key_s1_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {key_s1_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {mipi_reset_n_s1_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {mipi_reset_n_s1_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {mipi_pwdn_n_s1_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {mipi_pwdn_n_s1_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {uart_0_s1_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {uart_0_s1_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_001.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_002.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_003.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_004.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_005.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_006.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_008.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_009.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_010.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_011.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_012.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_013.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_014.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_015.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_017.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {nios2_gen2_data_master_limiter.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {nios2_gen2_instruction_master_limiter.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_demux.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_mux.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_demux_001.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_mux_001.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_001.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_001.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_002.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_002.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_003.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_003.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_004.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_004.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_006.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_006.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_007.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_007.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_008.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_008.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_009.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_009.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_010.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_010.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_011.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_011.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_012.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_012.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_013.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_013.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_015.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_015.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {crosser.in_clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {crosser_001.in_clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {crosser_002.out_clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {crosser_003.out_clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {nios2_gen2_reset_reset_bridge.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {altpll_0_inclk_interface_reset_reset_bridge.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {EEE_IMGPROC_0_s1_translator.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {EEE_IMGPROC_0_s1_agent.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {EEE_IMGPROC_0_s1_agent_rsp_fifo.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {EEE_IMGPROC_0_s1_agent_rdata_fifo.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {router_007.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {router_016.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {cmd_mux_005.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {rsp_demux_005.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {cmd_mux_014.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {rsp_demux_014.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {crosser.out_clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {crosser_001.out_clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {crosser_002.in_clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {crosser_003.in_clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.clk} {clock};add_interface {altpll_0_c2} {clock} {slave};set_interface_property {altpll_0_c2} {EXPORT_OF} {altpll_0_c2_clock_bridge.in_clk};add_interface {clk_50_clk} {clock} {slave};set_interface_property {clk_50_clk} {EXPORT_OF} {clk_50_clk_clock_bridge.in_clk};add_interface {altpll_0_inclk_interface_reset_reset_bridge_in_reset} {reset} {slave};set_interface_property {altpll_0_inclk_interface_reset_reset_bridge_in_reset} {EXPORT_OF} {altpll_0_inclk_interface_reset_reset_bridge.in_reset};add_interface {nios2_gen2_reset_reset_bridge_in_reset} {reset} {slave};set_interface_property {nios2_gen2_reset_reset_bridge_in_reset} {EXPORT_OF} {nios2_gen2_reset_reset_bridge.in_reset};add_interface {TERASIC_AUTO_FOCUS_0_reset_reset_bridge_in_reset} {reset} {slave};set_interface_property {TERASIC_AUTO_FOCUS_0_reset_reset_bridge_in_reset} {EXPORT_OF} {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.in_reset};add_interface {nios2_gen2_data_master} {avalon} {slave};set_interface_property {nios2_gen2_data_master} {EXPORT_OF} {nios2_gen2_data_master_translator.avalon_anti_master_0};add_interface {nios2_gen2_instruction_master} {avalon} {slave};set_interface_property {nios2_gen2_instruction_master} {EXPORT_OF} {nios2_gen2_instruction_master_translator.avalon_anti_master_0};add_interface {altpll_0_pll_slave} {avalon} {master};set_interface_property {altpll_0_pll_slave} {EXPORT_OF} {altpll_0_pll_slave_translator.avalon_anti_slave_0};add_interface {EEE_IMGPROC_0_s1} {avalon} {master};set_interface_property {EEE_IMGPROC_0_s1} {EXPORT_OF} {EEE_IMGPROC_0_s1_translator.avalon_anti_slave_0};add_interface {i2c_opencores_camera_avalon_slave_0} {avalon} {master};set_interface_property {i2c_opencores_camera_avalon_slave_0} {EXPORT_OF} {i2c_opencores_camera_avalon_slave_0_translator.avalon_anti_slave_0};add_interface {i2c_opencores_mipi_avalon_slave_0} {avalon} {master};set_interface_property {i2c_opencores_mipi_avalon_slave_0} {EXPORT_OF} {i2c_opencores_mipi_avalon_slave_0_translator.avalon_anti_slave_0};add_interface {jtag_uart_avalon_jtag_slave} {avalon} {master};set_interface_property {jtag_uart_avalon_jtag_slave} {EXPORT_OF} {jtag_uart_avalon_jtag_slave_translator.avalon_anti_slave_0};add_interface {key_s1} {avalon} {master};set_interface_property {key_s1} {EXPORT_OF} {key_s1_translator.avalon_anti_slave_0};add_interface {led_s1} {avalon} {master};set_interface_property {led_s1} {EXPORT_OF} {led_s1_translator.avalon_anti_slave_0};add_interface {mipi_pwdn_n_s1} {avalon} {master};set_interface_property {mipi_pwdn_n_s1} {EXPORT_OF} {mipi_pwdn_n_s1_translator.avalon_anti_slave_0};add_interface {mipi_reset_n_s1} {avalon} {master};set_interface_property {mipi_reset_n_s1} {EXPORT_OF} {mipi_reset_n_s1_translator.avalon_anti_slave_0};add_interface {nios2_gen2_debug_mem_slave} {avalon} {master};set_interface_property {nios2_gen2_debug_mem_slave} {EXPORT_OF} {nios2_gen2_debug_mem_slave_translator.avalon_anti_slave_0};add_interface {onchip_memory2_0_s1} {avalon} {master};set_interface_property {onchip_memory2_0_s1} {EXPORT_OF} {onchip_memory2_0_s1_translator.avalon_anti_slave_0};add_interface {sw_s1} {avalon} {master};set_interface_property {sw_s1} {EXPORT_OF} {sw_s1_translator.avalon_anti_slave_0};add_interface {sysid_qsys_control_slave} {avalon} {master};set_interface_property {sysid_qsys_control_slave} {EXPORT_OF} {sysid_qsys_control_slave_translator.avalon_anti_slave_0};add_interface {TERASIC_AUTO_FOCUS_0_mm_ctrl} {avalon} {master};set_interface_property {TERASIC_AUTO_FOCUS_0_mm_ctrl} {EXPORT_OF} {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator.avalon_anti_slave_0};add_interface {timer_s1} {avalon} {master};set_interface_property {timer_s1} {EXPORT_OF} {timer_s1_translator.avalon_anti_slave_0};add_interface {uart_0_s1} {avalon} {master};set_interface_property {uart_0_s1} {EXPORT_OF} {uart_0_s1_translator.avalon_anti_slave_0};set_module_assignment {interconnect_id.EEE_IMGPROC_0.s1} {0};set_module_assignment {interconnect_id.TERASIC_AUTO_FOCUS_0.mm_ctrl} {1};set_module_assignment {interconnect_id.altpll_0.pll_slave} {2};set_module_assignment {interconnect_id.i2c_opencores_camera.avalon_slave_0} {3};set_module_assignment {interconnect_id.i2c_opencores_mipi.avalon_slave_0} {4};set_module_assignment {interconnect_id.jtag_uart.avalon_jtag_slave} {5};set_module_assignment {interconnect_id.key.s1} {6};set_module_assignment {interconnect_id.led.s1} {7};set_module_assignment {interconnect_id.mipi_pwdn_n.s1} {8};set_module_assignment {interconnect_id.mipi_reset_n.s1} {9};set_module_assignment {interconnect_id.nios2_gen2.data_master} {0};set_module_assignment {interconnect_id.nios2_gen2.debug_mem_slave} {10};set_module_assignment {interconnect_id.nios2_gen2.instruction_master} {1};set_module_assignment {interconnect_id.onchip_memory2_0.s1} {11};set_module_assignment {interconnect_id.sw.s1} {12};set_module_assignment {interconnect_id.sysid_qsys.control_slave} {13};set_module_assignment {interconnect_id.timer.s1} {14};set_module_assignment {interconnect_id.uart_0.s1} {15};" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0.v"
|
|
type="VERILOG" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_master_translator.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_slave_translator.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_master_agent.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_slave_agent.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_burst_uncompressor.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_sc_fifo.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_router.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_router_001.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_router_002.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_router_006.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_traffic_limiter.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_reorder_memory.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_sc_fifo.v"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_pipeline_base.v"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_cmd_demux.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_cmd_demux_001.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_cmd_mux.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_cmd_mux_004.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_rsp_demux.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_rsp_demux_004.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_rsp_demux_005.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_rsp_mux.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_rsp_mux_001.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_handshake_clock_crosser.v"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_clock_crosser.v"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_pipeline_base.v"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_std_synchronizer_nocut.v"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_handshake_clock_crosser.sdc"
|
|
type="SDC"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_avalon_st_adapter.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_avalon_st_adapter_error_adapter_0.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
</childGeneratedFiles>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_mm_interconnect/altera_mm_interconnect_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_master_translator/altera_merlin_master_translator_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_slave_translator/altera_merlin_slave_translator_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_master_agent/altera_merlin_master_agent_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_slave_agent/altera_merlin_slave_agent_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo.v" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_traffic_limiter/altera_merlin_traffic_limiter_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_handshake_clock_crosser/altera_avalon_st_handshake_clock_crosser_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_handshake_clock_crosser/altera_avalon_st_handshake_clock_crosser.v" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_adapter/altera_avalon_st_adapter_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_error_adapter/avalon-st_error_adapter_hw.tcl" />
|
|
</childSourceFiles>
|
|
<instantiator instantiator="Qsys" as="mm_interconnect_0" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 205 starting:altera_mm_interconnect "submodules/Qsys_mm_interconnect_0"</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Debug">Transform: CustomInstructionTransform</message>
|
|
<message level="Debug">No custom instruction connections, skipping transform </message>
|
|
<message level="Debug" culprit="merlin_custom_instruction_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: MMTransform</message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>119</b> modules, <b>407</b> connections]]></message>
|
|
<message level="Debug">Transform: InterruptMapperTransform</message>
|
|
<message level="Debug">Transform: InterruptSyncTransform</message>
|
|
<message level="Debug">Transform: InterruptFanoutTransform</message>
|
|
<message level="Debug">Transform: AvalonStreamingTransform</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info" culprit="avalon_st_adapter">Inserting error_adapter: error_adapter_0</message>
|
|
<message level="Debug" culprit="avalon_st_adapter.clk_bridge_0">Timing: ELA:1/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter.rst_bridge_0">Timing: ELA:2/0.000s/0.001s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter.error_adapter_0">Timing: ELA:1/0.007s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter">Timing: COM:3/0.026s/0.034s</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info" culprit="avalon_st_adapter_001">Inserting error_adapter: error_adapter_0</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_001.clk_bridge_0">Timing: ELA:1/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_001.rst_bridge_0">Timing: ELA:2/0.000s/0.001s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_001.error_adapter_0">Timing: ELA:1/0.007s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_001">Timing: COM:3/0.011s/0.011s</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info" culprit="avalon_st_adapter_002">Inserting error_adapter: error_adapter_0</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_002.clk_bridge_0">Timing: ELA:1/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_002.rst_bridge_0">Timing: ELA:2/0.000s/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_002.error_adapter_0">Timing: ELA:1/0.006s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_002">Timing: COM:3/0.010s/0.011s</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info" culprit="avalon_st_adapter_003">Inserting error_adapter: error_adapter_0</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_003.clk_bridge_0">Timing: ELA:1/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_003.rst_bridge_0">Timing: ELA:2/0.000s/0.001s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_003.error_adapter_0">Timing: ELA:1/0.007s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_003">Timing: COM:3/0.011s/0.012s</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info" culprit="avalon_st_adapter_004">Inserting error_adapter: error_adapter_0</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_004.clk_bridge_0">Timing: ELA:1/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_004.rst_bridge_0">Timing: ELA:2/0.000s/0.001s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_004.error_adapter_0">Timing: ELA:1/0.006s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_004">Timing: COM:3/0.010s/0.012s</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info" culprit="avalon_st_adapter_005">Inserting error_adapter: error_adapter_0</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_005.clk_bridge_0">Timing: ELA:1/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_005.rst_bridge_0">Timing: ELA:2/0.000s/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_005.error_adapter_0">Timing: ELA:1/0.008s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_005">Timing: COM:3/0.011s/0.012s</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info" culprit="avalon_st_adapter_006">Inserting error_adapter: error_adapter_0</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_006.clk_bridge_0">Timing: ELA:1/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_006.rst_bridge_0">Timing: ELA:2/0.000s/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_006.error_adapter_0">Timing: ELA:1/0.007s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_006">Timing: COM:3/0.011s/0.011s</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info" culprit="avalon_st_adapter_007">Inserting error_adapter: error_adapter_0</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_007.clk_bridge_0">Timing: ELA:1/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_007.rst_bridge_0">Timing: ELA:2/0.000s/0.001s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_007.error_adapter_0">Timing: ELA:1/0.005s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_007">Timing: COM:3/0.011s/0.012s</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info" culprit="avalon_st_adapter_008">Inserting error_adapter: error_adapter_0</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_008.clk_bridge_0">Timing: ELA:1/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_008.rst_bridge_0">Timing: ELA:2/0.000s/0.001s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_008.error_adapter_0">Timing: ELA:1/0.006s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_008">Timing: COM:3/0.011s/0.012s</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info" culprit="avalon_st_adapter_009">Inserting error_adapter: error_adapter_0</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_009.clk_bridge_0">Timing: ELA:1/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_009.rst_bridge_0">Timing: ELA:2/0.000s/0.001s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_009.error_adapter_0">Timing: ELA:1/0.007s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_009">Timing: COM:3/0.009s/0.011s</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info" culprit="avalon_st_adapter_010">Inserting error_adapter: error_adapter_0</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_010.clk_bridge_0">Timing: ELA:1/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_010.rst_bridge_0">Timing: ELA:2/0.000s/0.001s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_010.error_adapter_0">Timing: ELA:1/0.007s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_010">Timing: COM:3/0.011s/0.013s</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info" culprit="avalon_st_adapter_011">Inserting error_adapter: error_adapter_0</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_011.clk_bridge_0">Timing: ELA:1/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_011.rst_bridge_0">Timing: ELA:2/0.000s/0.001s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_011.error_adapter_0">Timing: ELA:1/0.006s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_011">Timing: COM:3/0.017s/0.027s</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info" culprit="avalon_st_adapter_012">Inserting error_adapter: error_adapter_0</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_012.clk_bridge_0">Timing: ELA:1/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_012.rst_bridge_0">Timing: ELA:2/0.000s/0.001s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_012.error_adapter_0">Timing: ELA:1/0.008s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_012">Timing: COM:3/0.011s/0.013s</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info" culprit="avalon_st_adapter_013">Inserting error_adapter: error_adapter_0</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_013.clk_bridge_0">Timing: ELA:1/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_013.rst_bridge_0">Timing: ELA:2/0.000s/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_013.error_adapter_0">Timing: ELA:1/0.006s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_013">Timing: COM:3/0.010s/0.012s</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info" culprit="avalon_st_adapter_014">Inserting error_adapter: error_adapter_0</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_014.clk_bridge_0">Timing: ELA:1/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_014.rst_bridge_0">Timing: ELA:2/0.000s/0.001s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_014.error_adapter_0">Timing: ELA:1/0.005s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_014">Timing: COM:3/0.009s/0.011s</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info" culprit="avalon_st_adapter_015">Inserting error_adapter: error_adapter_0</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_015.clk_bridge_0">Timing: ELA:1/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_015.rst_bridge_0">Timing: ELA:2/0.000s/0.001s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_015.error_adapter_0">Timing: ELA:1/0.005s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter_015">Timing: COM:3/0.009s/0.010s</message>
|
|
<message
|
|
level="Debug"
|
|
culprit="com_altera_sopcmodel_transforms_avalonst_AvalonStreamingTransform"><![CDATA[After transform: <b>135</b> modules, <b>455</b> connections]]></message>
|
|
<message level="Debug">Transform: ResetAdaptation</message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_master_translator</b> "<b>submodules/altera_merlin_master_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_master_translator</b> "<b>submodules/altera_merlin_master_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_translator</b> "<b>submodules/altera_merlin_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_translator</b> "<b>submodules/altera_merlin_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_translator</b> "<b>submodules/altera_merlin_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_translator</b> "<b>submodules/altera_merlin_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_translator</b> "<b>submodules/altera_merlin_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_translator</b> "<b>submodules/altera_merlin_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_translator</b> "<b>submodules/altera_merlin_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_translator</b> "<b>submodules/altera_merlin_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_translator</b> "<b>submodules/altera_merlin_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_translator</b> "<b>submodules/altera_merlin_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_translator</b> "<b>submodules/altera_merlin_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_translator</b> "<b>submodules/altera_merlin_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_translator</b> "<b>submodules/altera_merlin_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_translator</b> "<b>submodules/altera_merlin_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_translator</b> "<b>submodules/altera_merlin_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_translator</b> "<b>submodules/altera_merlin_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_master_agent</b> "<b>submodules/altera_merlin_master_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_master_agent</b> "<b>submodules/altera_merlin_master_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_agent</b> "<b>submodules/altera_merlin_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_agent</b> "<b>submodules/altera_merlin_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_agent</b> "<b>submodules/altera_merlin_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_agent</b> "<b>submodules/altera_merlin_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_agent</b> "<b>submodules/altera_merlin_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_agent</b> "<b>submodules/altera_merlin_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_agent</b> "<b>submodules/altera_merlin_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_agent</b> "<b>submodules/altera_merlin_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_agent</b> "<b>submodules/altera_merlin_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_agent</b> "<b>submodules/altera_merlin_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_agent</b> "<b>submodules/altera_merlin_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_agent</b> "<b>submodules/altera_merlin_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_agent</b> "<b>submodules/altera_merlin_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_agent</b> "<b>submodules/altera_merlin_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_agent</b> "<b>submodules/altera_merlin_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_slave_agent</b> "<b>submodules/altera_merlin_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_0_router</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_0_router_001</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_0_router_002</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_0_router_002</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_0_router_002</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_0_router_002</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_0_router_006</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_0_router_002</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_0_router_002</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_0_router_006</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_0_router_002</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_0_router_002</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_0_router_002</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_0_router_002</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_0_router_002</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_0_router_002</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_0_router_002</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_0_router_002</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_traffic_limiter</b> "<b>submodules/altera_merlin_traffic_limiter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_traffic_limiter</b> "<b>submodules/altera_merlin_traffic_limiter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_cmd_demux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_cmd_demux_001</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_cmd_mux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_cmd_mux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_cmd_mux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_cmd_mux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_cmd_mux_004</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_cmd_mux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_cmd_mux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_cmd_mux_004</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_cmd_mux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_cmd_mux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_cmd_mux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_cmd_mux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_cmd_mux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_cmd_mux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_cmd_mux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_cmd_mux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_rsp_demux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_rsp_demux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_rsp_demux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_rsp_demux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_rsp_demux_004</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_rsp_demux_005</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_rsp_demux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_rsp_demux_004</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_rsp_demux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_rsp_demux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_rsp_demux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_rsp_demux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_rsp_demux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_rsp_demux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_rsp_demux_005</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_rsp_demux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_rsp_mux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_0_rsp_mux_001</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_handshake_clock_crosser</b> "<b>submodules/altera_avalon_st_handshake_clock_crosser</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_handshake_clock_crosser</b> "<b>submodules/altera_avalon_st_handshake_clock_crosser</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_handshake_clock_crosser</b> "<b>submodules/altera_avalon_st_handshake_clock_crosser</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_handshake_clock_crosser</b> "<b>submodules/altera_avalon_st_handshake_clock_crosser</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_adapter</b> "<b>submodules/Qsys_mm_interconnect_0_avalon_st_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_adapter</b> "<b>submodules/Qsys_mm_interconnect_0_avalon_st_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_adapter</b> "<b>submodules/Qsys_mm_interconnect_0_avalon_st_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_adapter</b> "<b>submodules/Qsys_mm_interconnect_0_avalon_st_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_adapter</b> "<b>submodules/Qsys_mm_interconnect_0_avalon_st_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_adapter</b> "<b>submodules/Qsys_mm_interconnect_0_avalon_st_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_adapter</b> "<b>submodules/Qsys_mm_interconnect_0_avalon_st_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_adapter</b> "<b>submodules/Qsys_mm_interconnect_0_avalon_st_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_adapter</b> "<b>submodules/Qsys_mm_interconnect_0_avalon_st_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_adapter</b> "<b>submodules/Qsys_mm_interconnect_0_avalon_st_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_adapter</b> "<b>submodules/Qsys_mm_interconnect_0_avalon_st_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_adapter</b> "<b>submodules/Qsys_mm_interconnect_0_avalon_st_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_adapter</b> "<b>submodules/Qsys_mm_interconnect_0_avalon_st_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_adapter</b> "<b>submodules/Qsys_mm_interconnect_0_avalon_st_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_adapter</b> "<b>submodules/Qsys_mm_interconnect_0_avalon_st_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_0"><![CDATA["<b>mm_interconnect_0</b>" reuses <b>altera_avalon_st_adapter</b> "<b>submodules/Qsys_mm_interconnect_0_avalon_st_adapter</b>"]]></message>
|
|
<message level="Info" culprit="mm_interconnect_0"><![CDATA["<b>Qsys</b>" instantiated <b>altera_mm_interconnect</b> "<b>mm_interconnect_0</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 150 starting:altera_merlin_master_translator "submodules/altera_merlin_master_translator"</message>
|
|
<message level="Info" culprit="nios2_gen2_data_master_translator"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_master_translator</b> "<b>nios2_gen2_data_master_translator</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 148 starting:altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"</message>
|
|
<message level="Info" culprit="jtag_uart_avalon_jtag_slave_translator"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_slave_translator</b> "<b>jtag_uart_avalon_jtag_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 132 starting:altera_merlin_master_agent "submodules/altera_merlin_master_agent"</message>
|
|
<message level="Info" culprit="nios2_gen2_data_master_agent"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_master_agent</b> "<b>nios2_gen2_data_master_agent</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 130 starting:altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"</message>
|
|
<message level="Info" culprit="jtag_uart_avalon_jtag_slave_agent"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_slave_agent</b> "<b>jtag_uart_avalon_jtag_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 129 starting:altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"</message>
|
|
<message level="Info" culprit="jtag_uart_avalon_jtag_slave_agent_rsp_fifo"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_avalon_sc_fifo</b> "<b>jtag_uart_avalon_jtag_slave_agent_rsp_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 96 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_0_router"</message>
|
|
<message level="Info" culprit="router"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_router</b> "<b>router</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 95 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_001"</message>
|
|
<message level="Info" culprit="router_001"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_router</b> "<b>router_001</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 94 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_002"</message>
|
|
<message level="Info" culprit="router_002"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_router</b> "<b>router_002</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 90 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_006"</message>
|
|
<message level="Info" culprit="router_006"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_router</b> "<b>router_006</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 78 starting:altera_merlin_traffic_limiter "submodules/altera_merlin_traffic_limiter"</message>
|
|
<message level="Info" culprit="nios2_gen2_data_master_limiter"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_traffic_limiter</b> "<b>nios2_gen2_data_master_limiter</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_sc_fifo.v</b>]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 76 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_cmd_demux"</message>
|
|
<message level="Info" culprit="cmd_demux"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_demultiplexer</b> "<b>cmd_demux</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 75 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_cmd_demux_001"</message>
|
|
<message level="Info" culprit="cmd_demux_001"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_demultiplexer</b> "<b>cmd_demux_001</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 74 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_cmd_mux"</message>
|
|
<message level="Info" culprit="cmd_mux"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_multiplexer</b> "<b>cmd_mux</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 70 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_cmd_mux_004"</message>
|
|
<message level="Info" culprit="cmd_mux_004"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_multiplexer</b> "<b>cmd_mux_004</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv</b>]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 58 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux"</message>
|
|
<message level="Info" culprit="rsp_demux"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_demultiplexer</b> "<b>rsp_demux</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 54 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux_004"</message>
|
|
<message level="Info" culprit="rsp_demux_004"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_demultiplexer</b> "<b>rsp_demux_004</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 53 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux_005"</message>
|
|
<message level="Info" culprit="rsp_demux_005"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_demultiplexer</b> "<b>rsp_demux_005</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 42 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_rsp_mux"</message>
|
|
<message level="Info" culprit="rsp_mux"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_multiplexer</b> "<b>rsp_mux</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv</b>]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 41 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_rsp_mux_001"</message>
|
|
<message level="Info" culprit="rsp_mux_001"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_multiplexer</b> "<b>rsp_mux_001</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv</b>]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 40 starting:altera_avalon_st_handshake_clock_crosser "submodules/altera_avalon_st_handshake_clock_crosser"</message>
|
|
<message level="Info" culprit="crosser"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_avalon_st_handshake_clock_crosser</b> "<b>crosser</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_pipeline_base.v</b>]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 36 starting:altera_avalon_st_adapter "submodules/Qsys_mm_interconnect_0_avalon_st_adapter"</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Debug">Transform: CustomInstructionTransform</message>
|
|
<message level="Debug">No custom instruction connections, skipping transform </message>
|
|
<message level="Debug" culprit="merlin_custom_instruction_transform"><![CDATA[After transform: <b>3</b> modules, <b>3</b> connections]]></message>
|
|
<message level="Debug">Transform: MMTransform</message>
|
|
<message level="Debug">Transform: InterruptMapperTransform</message>
|
|
<message level="Debug">Transform: InterruptSyncTransform</message>
|
|
<message level="Debug">Transform: InterruptFanoutTransform</message>
|
|
<message level="Debug">Transform: AvalonStreamingTransform</message>
|
|
<message level="Debug">Transform: ResetAdaptation</message>
|
|
<message level="Debug" culprit="avalon_st_adapter"><![CDATA["<b>avalon_st_adapter</b>" reuses <b>error_adapter</b> "<b>submodules/Qsys_mm_interconnect_0_avalon_st_adapter_error_adapter_0</b>"]]></message>
|
|
<message level="Info" culprit="avalon_st_adapter"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_avalon_st_adapter</b> "<b>avalon_st_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 1 starting:error_adapter "submodules/Qsys_mm_interconnect_0_avalon_st_adapter_error_adapter_0"</message>
|
|
<message level="Info" culprit="error_adapter_0"><![CDATA["<b>avalon_st_adapter</b>" instantiated <b>error_adapter</b> "<b>error_adapter_0</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_mm_interconnect:16.1:AUTO_DEVICE=10M50DAF484C7G,AUTO_DEVICE_FAMILY=MAX 10,AUTO_DEVICE_SPEEDGRADE=,COMPOSE_CONTENTS=add_instance {alt_vip_vfb_0_read_master_translator} {altera_merlin_master_translator};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_ADDRESS_W} {32};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_DATA_W} {32};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_BURSTCOUNT_W} {3};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {UAV_ADDRESS_W} {32};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {UAV_BURSTCOUNT_W} {5};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_READLATENCY} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_READDATA} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_WRITEDATA} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_READ} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_WRITE} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_ADDRESS} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_BURSTCOUNT} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_CLKEN} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_READDATAVALID} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_LOCK} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_ADDRESS_SYMBOLS} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_CONSTANT_BURST_BEHAVIOR} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {64};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {SYNC_RESET} {0};add_instance {alt_vip_vfb_0_write_master_translator} {altera_merlin_master_translator};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_ADDRESS_W} {32};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_DATA_W} {32};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_BURSTCOUNT_W} {3};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {UAV_ADDRESS_W} {32};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {UAV_BURSTCOUNT_W} {5};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_READLATENCY} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {USE_READDATA} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {USE_READ} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {USE_WRITE} {1};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {USE_ADDRESS} {1};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {USE_BURSTCOUNT} {1};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {USE_CLKEN} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {USE_LOCK} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_ADDRESS_SYMBOLS} {1};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_CONSTANT_BURST_BEHAVIOR} {1};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {64};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {SYNC_RESET} {0};add_instance {sdram_s1_translator} {altera_merlin_slave_translator};set_instance_parameter_value {sdram_s1_translator} {AV_ADDRESS_W} {25};set_instance_parameter_value {sdram_s1_translator} {AV_DATA_W} {16};set_instance_parameter_value {sdram_s1_translator} {UAV_DATA_W} {16};set_instance_parameter_value {sdram_s1_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {sdram_s1_translator} {AV_BYTEENABLE_W} {2};set_instance_parameter_value {sdram_s1_translator} {UAV_BYTEENABLE_W} {2};set_instance_parameter_value {sdram_s1_translator} {UAV_ADDRESS_W} {32};set_instance_parameter_value {sdram_s1_translator} {UAV_BURSTCOUNT_W} {2};set_instance_parameter_value {sdram_s1_translator} {AV_READLATENCY} {0};set_instance_parameter_value {sdram_s1_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {sdram_s1_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {sdram_s1_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {sdram_s1_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {sdram_s1_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {sdram_s1_translator} {USE_READDATA} {1};set_instance_parameter_value {sdram_s1_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {sdram_s1_translator} {USE_READ} {1};set_instance_parameter_value {sdram_s1_translator} {USE_WRITE} {1};set_instance_parameter_value {sdram_s1_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {sdram_s1_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {sdram_s1_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {sdram_s1_translator} {USE_CHIPSELECT} {1};set_instance_parameter_value {sdram_s1_translator} {USE_ADDRESS} {1};set_instance_parameter_value {sdram_s1_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {sdram_s1_translator} {USE_READDATAVALID} {1};set_instance_parameter_value {sdram_s1_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {sdram_s1_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {sdram_s1_translator} {USE_LOCK} {0};set_instance_parameter_value {sdram_s1_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {sdram_s1_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {sdram_s1_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {sdram_s1_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {sdram_s1_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {sdram_s1_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {sdram_s1_translator} {AV_SYMBOLS_PER_WORD} {2};set_instance_parameter_value {sdram_s1_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {sdram_s1_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {sdram_s1_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {sdram_s1_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {sdram_s1_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {sdram_s1_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {sdram_s1_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {7};set_instance_parameter_value {sdram_s1_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {sdram_s1_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {sdram_s1_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {sdram_s1_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {sdram_s1_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {sdram_s1_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {sdram_s1_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {sdram_s1_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {sdram_s1_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {sdram_s1_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {sdram_s1_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {alt_vip_vfb_0_read_master_agent} {altera_merlin_master_agent};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_ORI_BURST_SIZE_H} {103};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_ORI_BURST_SIZE_L} {101};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_RESPONSE_STATUS_H} {100};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_RESPONSE_STATUS_L} {99};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_QOS_H} {88};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_QOS_L} {88};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_DATA_SIDEBAND_H} {86};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_DATA_SIDEBAND_L} {86};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_ADDR_SIDEBAND_H} {85};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_ADDR_SIDEBAND_L} {85};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_BURST_TYPE_H} {84};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_BURST_TYPE_L} {83};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_CACHE_H} {98};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_CACHE_L} {95};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_THREAD_ID_H} {91};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_THREAD_ID_L} {91};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_BURST_SIZE_H} {82};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_BURST_SIZE_L} {80};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_TRANS_EXCLUSIVE} {73};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_TRANS_LOCK} {72};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_BEGIN_BURST} {87};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_PROTECTION_H} {94};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_PROTECTION_L} {92};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_BURSTWRAP_H} {79};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_BURSTWRAP_L} {79};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_BYTE_CNT_H} {78};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_BYTE_CNT_L} {74};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_ADDR_H} {67};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_TRANS_COMPRESSED_READ} {68};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_TRANS_POSTED} {69};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_TRANS_WRITE} {70};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_TRANS_READ} {71};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_DATA_H} {31};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_DATA_L} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_SRC_ID_H} {89};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_SRC_ID_L} {89};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_DEST_ID_H} {90};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_DEST_ID_L} {90};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {ST_DATA_W} {104};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {ST_CHANNEL_W} {2};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {AV_BURSTCOUNT_W} {5};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {ADDR_MAP} {<?xml version="1.0" encoding="UTF-8"?>
|
|
<address_map>
|
|
<slave
|
|
id="0"
|
|
name="sdram_s1_translator.avalon_universal_slave_0"
|
|
start="0x0000000004000000"
|
|
end="0x00000000008000000"
|
|
responds="1"
|
|
user_default="0" />
|
|
</address_map>
|
|
};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {SUPPRESS_0_BYTEEN_RSP} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {ID} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {BURSTWRAP_VALUE} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {CACHE_VALUE} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {SECURE_ACCESS_BIT} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {USE_WRITERESPONSE} {0};add_instance {alt_vip_vfb_0_write_master_agent} {altera_merlin_master_agent};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_ORI_BURST_SIZE_H} {103};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_ORI_BURST_SIZE_L} {101};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_RESPONSE_STATUS_H} {100};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_RESPONSE_STATUS_L} {99};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_QOS_H} {88};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_QOS_L} {88};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_DATA_SIDEBAND_H} {86};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_DATA_SIDEBAND_L} {86};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_ADDR_SIDEBAND_H} {85};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_ADDR_SIDEBAND_L} {85};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BURST_TYPE_H} {84};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BURST_TYPE_L} {83};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_CACHE_H} {98};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_CACHE_L} {95};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_THREAD_ID_H} {91};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_THREAD_ID_L} {91};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BURST_SIZE_H} {82};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BURST_SIZE_L} {80};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_TRANS_EXCLUSIVE} {73};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_TRANS_LOCK} {72};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BEGIN_BURST} {87};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_PROTECTION_H} {94};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_PROTECTION_L} {92};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BURSTWRAP_H} {79};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BURSTWRAP_L} {79};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BYTE_CNT_H} {78};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BYTE_CNT_L} {74};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_ADDR_H} {67};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_TRANS_COMPRESSED_READ} {68};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_TRANS_POSTED} {69};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_TRANS_WRITE} {70};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_TRANS_READ} {71};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_DATA_H} {31};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_DATA_L} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_SRC_ID_H} {89};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_SRC_ID_L} {89};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_DEST_ID_H} {90};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_DEST_ID_L} {90};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {ST_DATA_W} {104};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {ST_CHANNEL_W} {2};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {AV_BURSTCOUNT_W} {5};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {ADDR_MAP} {<?xml version="1.0" encoding="UTF-8"?>
|
|
<address_map>
|
|
<slave
|
|
id="0"
|
|
name="sdram_s1_translator.avalon_universal_slave_0"
|
|
start="0x0000000004000000"
|
|
end="0x00000000008000000"
|
|
responds="1"
|
|
user_default="0" />
|
|
</address_map>
|
|
};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {SUPPRESS_0_BYTEEN_RSP} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {ID} {1};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {BURSTWRAP_VALUE} {1};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {CACHE_VALUE} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {SECURE_ACCESS_BIT} {1};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {USE_WRITERESPONSE} {0};add_instance {sdram_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {sdram_s1_agent} {PKT_ORI_BURST_SIZE_H} {85};set_instance_parameter_value {sdram_s1_agent} {PKT_ORI_BURST_SIZE_L} {83};set_instance_parameter_value {sdram_s1_agent} {PKT_RESPONSE_STATUS_H} {82};set_instance_parameter_value {sdram_s1_agent} {PKT_RESPONSE_STATUS_L} {81};set_instance_parameter_value {sdram_s1_agent} {PKT_BURST_SIZE_H} {64};set_instance_parameter_value {sdram_s1_agent} {PKT_BURST_SIZE_L} {62};set_instance_parameter_value {sdram_s1_agent} {PKT_TRANS_LOCK} {54};set_instance_parameter_value {sdram_s1_agent} {PKT_BEGIN_BURST} {69};set_instance_parameter_value {sdram_s1_agent} {PKT_PROTECTION_H} {76};set_instance_parameter_value {sdram_s1_agent} {PKT_PROTECTION_L} {74};set_instance_parameter_value {sdram_s1_agent} {PKT_BURSTWRAP_H} {61};set_instance_parameter_value {sdram_s1_agent} {PKT_BURSTWRAP_L} {61};set_instance_parameter_value {sdram_s1_agent} {PKT_BYTE_CNT_H} {60};set_instance_parameter_value {sdram_s1_agent} {PKT_BYTE_CNT_L} {56};set_instance_parameter_value {sdram_s1_agent} {PKT_ADDR_H} {49};set_instance_parameter_value {sdram_s1_agent} {PKT_ADDR_L} {18};set_instance_parameter_value {sdram_s1_agent} {PKT_TRANS_COMPRESSED_READ} {50};set_instance_parameter_value {sdram_s1_agent} {PKT_TRANS_POSTED} {51};set_instance_parameter_value {sdram_s1_agent} {PKT_TRANS_WRITE} {52};set_instance_parameter_value {sdram_s1_agent} {PKT_TRANS_READ} {53};set_instance_parameter_value {sdram_s1_agent} {PKT_DATA_H} {15};set_instance_parameter_value {sdram_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {sdram_s1_agent} {PKT_BYTEEN_H} {17};set_instance_parameter_value {sdram_s1_agent} {PKT_BYTEEN_L} {16};set_instance_parameter_value {sdram_s1_agent} {PKT_SRC_ID_H} {71};set_instance_parameter_value {sdram_s1_agent} {PKT_SRC_ID_L} {71};set_instance_parameter_value {sdram_s1_agent} {PKT_DEST_ID_H} {72};set_instance_parameter_value {sdram_s1_agent} {PKT_DEST_ID_L} {72};set_instance_parameter_value {sdram_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {sdram_s1_agent} {ST_CHANNEL_W} {2};set_instance_parameter_value {sdram_s1_agent} {ST_DATA_W} {86};set_instance_parameter_value {sdram_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {sdram_s1_agent} {AVS_BURSTCOUNT_W} {2};set_instance_parameter_value {sdram_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {sdram_s1_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(85:83) response_status(82:81) cache(80:77) protection(76:74) thread_id(73) dest_id(72) src_id(71) qos(70) begin_burst(69) data_sideband(68) addr_sideband(67) burst_type(66:65) burst_size(64:62) burstwrap(61) byte_cnt(60:56) trans_exclusive(55) trans_lock(54) trans_read(53) trans_write(52) trans_posted(51) trans_compressed_read(50) addr(49:18) byteen(17:16) data(15:0)};set_instance_parameter_value {sdram_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {1};set_instance_parameter_value {sdram_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {sdram_s1_agent} {MAX_BYTE_CNT} {2};set_instance_parameter_value {sdram_s1_agent} {MAX_BURSTWRAP} {1};set_instance_parameter_value {sdram_s1_agent} {ID} {0};set_instance_parameter_value {sdram_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {sdram_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {sdram_s1_agent} {ECC_ENABLE} {0};add_instance {sdram_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {87};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {FIFO_DEPTH} {8};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {sdram_s1_agent_rdata_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {BITS_PER_SYMBOL} {18};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {FIFO_DEPTH} {8};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {USE_PACKETS} {0};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {EMPTY_LATENCY} {3};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {USE_MEMORY_BLOCKS} {1};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {router} {altera_merlin_router};set_instance_parameter_value {router} {DESTINATION_ID} {0 };set_instance_parameter_value {router} {CHANNEL_ID} {1 };set_instance_parameter_value {router} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router} {START_ADDRESS} {0x4000000 };set_instance_parameter_value {router} {END_ADDRESS} {0x8000000 };set_instance_parameter_value {router} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router} {SPAN_OFFSET} {};set_instance_parameter_value {router} {PKT_ADDR_H} {67};set_instance_parameter_value {router} {PKT_ADDR_L} {36};set_instance_parameter_value {router} {PKT_PROTECTION_H} {94};set_instance_parameter_value {router} {PKT_PROTECTION_L} {92};set_instance_parameter_value {router} {PKT_DEST_ID_H} {90};set_instance_parameter_value {router} {PKT_DEST_ID_L} {90};set_instance_parameter_value {router} {PKT_TRANS_WRITE} {70};set_instance_parameter_value {router} {PKT_TRANS_READ} {71};set_instance_parameter_value {router} {ST_DATA_W} {104};set_instance_parameter_value {router} {ST_CHANNEL_W} {2};set_instance_parameter_value {router} {DECODER_TYPE} {0};set_instance_parameter_value {router} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router} {DEFAULT_DESTID} {0};set_instance_parameter_value {router} {MERLIN_PACKET_FORMAT} {ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router} {MEMORY_ALIASING_DECODE} {0};add_instance {router_001} {altera_merlin_router};set_instance_parameter_value {router_001} {DESTINATION_ID} {0 };set_instance_parameter_value {router_001} {CHANNEL_ID} {1 };set_instance_parameter_value {router_001} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_001} {START_ADDRESS} {0x4000000 };set_instance_parameter_value {router_001} {END_ADDRESS} {0x8000000 };set_instance_parameter_value {router_001} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_001} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_001} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_001} {SPAN_OFFSET} {};set_instance_parameter_value {router_001} {PKT_ADDR_H} {67};set_instance_parameter_value {router_001} {PKT_ADDR_L} {36};set_instance_parameter_value {router_001} {PKT_PROTECTION_H} {94};set_instance_parameter_value {router_001} {PKT_PROTECTION_L} {92};set_instance_parameter_value {router_001} {PKT_DEST_ID_H} {90};set_instance_parameter_value {router_001} {PKT_DEST_ID_L} {90};set_instance_parameter_value {router_001} {PKT_TRANS_WRITE} {70};set_instance_parameter_value {router_001} {PKT_TRANS_READ} {71};set_instance_parameter_value {router_001} {ST_DATA_W} {104};set_instance_parameter_value {router_001} {ST_CHANNEL_W} {2};set_instance_parameter_value {router_001} {DECODER_TYPE} {0};set_instance_parameter_value {router_001} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_001} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_001} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_001} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_001} {MERLIN_PACKET_FORMAT} {ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_001} {MEMORY_ALIASING_DECODE} {0};add_instance {router_002} {altera_merlin_router};set_instance_parameter_value {router_002} {DESTINATION_ID} {0 1 };set_instance_parameter_value {router_002} {CHANNEL_ID} {01 10 };set_instance_parameter_value {router_002} {TYPE_OF_TRANSACTION} {read write };set_instance_parameter_value {router_002} {START_ADDRESS} {0x0 0x0 };set_instance_parameter_value {router_002} {END_ADDRESS} {0x0 0x0 };set_instance_parameter_value {router_002} {NON_SECURED_TAG} {1 1 };set_instance_parameter_value {router_002} {SECURED_RANGE_PAIRS} {0 0 };set_instance_parameter_value {router_002} {SECURED_RANGE_LIST} {0 0 };set_instance_parameter_value {router_002} {SPAN_OFFSET} {};set_instance_parameter_value {router_002} {PKT_ADDR_H} {49};set_instance_parameter_value {router_002} {PKT_ADDR_L} {18};set_instance_parameter_value {router_002} {PKT_PROTECTION_H} {76};set_instance_parameter_value {router_002} {PKT_PROTECTION_L} {74};set_instance_parameter_value {router_002} {PKT_DEST_ID_H} {72};set_instance_parameter_value {router_002} {PKT_DEST_ID_L} {72};set_instance_parameter_value {router_002} {PKT_TRANS_WRITE} {52};set_instance_parameter_value {router_002} {PKT_TRANS_READ} {53};set_instance_parameter_value {router_002} {ST_DATA_W} {86};set_instance_parameter_value {router_002} {ST_CHANNEL_W} {2};set_instance_parameter_value {router_002} {DECODER_TYPE} {1};set_instance_parameter_value {router_002} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_002} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_002} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_002} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_002} {MERLIN_PACKET_FORMAT} {ori_burst_size(85:83) response_status(82:81) cache(80:77) protection(76:74) thread_id(73) dest_id(72) src_id(71) qos(70) begin_burst(69) data_sideband(68) addr_sideband(67) burst_type(66:65) burst_size(64:62) burstwrap(61) byte_cnt(60:56) trans_exclusive(55) trans_lock(54) trans_read(53) trans_write(52) trans_posted(51) trans_compressed_read(50) addr(49:18) byteen(17:16) data(15:0)};set_instance_parameter_value {router_002} {MEMORY_ALIASING_DECODE} {0};add_instance {sdram_s1_burst_adapter} {altera_merlin_burst_adapter};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_ADDR_H} {49};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_ADDR_L} {18};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_BEGIN_BURST} {69};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_BYTE_CNT_H} {60};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_BYTE_CNT_L} {56};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_BYTEEN_H} {17};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_BYTEEN_L} {16};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_BURST_SIZE_H} {64};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_BURST_SIZE_L} {62};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_BURST_TYPE_H} {66};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_BURST_TYPE_L} {65};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_BURSTWRAP_H} {61};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_BURSTWRAP_L} {61};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_TRANS_COMPRESSED_READ} {50};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_TRANS_WRITE} {52};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_TRANS_READ} {53};set_instance_parameter_value {sdram_s1_burst_adapter} {OUT_NARROW_SIZE} {0};set_instance_parameter_value {sdram_s1_burst_adapter} {IN_NARROW_SIZE} {0};set_instance_parameter_value {sdram_s1_burst_adapter} {OUT_FIXED} {0};set_instance_parameter_value {sdram_s1_burst_adapter} {OUT_COMPLETE_WRAP} {0};set_instance_parameter_value {sdram_s1_burst_adapter} {ST_DATA_W} {86};set_instance_parameter_value {sdram_s1_burst_adapter} {ST_CHANNEL_W} {2};set_instance_parameter_value {sdram_s1_burst_adapter} {OUT_BYTE_CNT_H} {57};set_instance_parameter_value {sdram_s1_burst_adapter} {OUT_BURSTWRAP_H} {61};set_instance_parameter_value {sdram_s1_burst_adapter} {MERLIN_PACKET_FORMAT} {ori_burst_size(85:83) response_status(82:81) cache(80:77) protection(76:74) thread_id(73) dest_id(72) src_id(71) qos(70) begin_burst(69) data_sideband(68) addr_sideband(67) burst_type(66:65) burst_size(64:62) burstwrap(61) byte_cnt(60:56) trans_exclusive(55) trans_lock(54) trans_read(53) trans_write(52) trans_posted(51) trans_compressed_read(50) addr(49:18) byteen(17:16) data(15:0)};set_instance_parameter_value {sdram_s1_burst_adapter} {COMPRESSED_READ_SUPPORT} {1};set_instance_parameter_value {sdram_s1_burst_adapter} {BYTEENABLE_SYNTHESIS} {1};set_instance_parameter_value {sdram_s1_burst_adapter} {PIPE_INPUTS} {0};set_instance_parameter_value {sdram_s1_burst_adapter} {NO_WRAP_SUPPORT} {0};set_instance_parameter_value {sdram_s1_burst_adapter} {INCOMPLETE_WRAP_SUPPORT} {0};set_instance_parameter_value {sdram_s1_burst_adapter} {BURSTWRAP_CONST_MASK} {1};set_instance_parameter_value {sdram_s1_burst_adapter} {BURSTWRAP_CONST_VALUE} {1};set_instance_parameter_value {sdram_s1_burst_adapter} {ADAPTER_VERSION} {13.1};add_instance {cmd_demux} {altera_merlin_demultiplexer};set_instance_parameter_value {cmd_demux} {ST_DATA_W} {104};set_instance_parameter_value {cmd_demux} {ST_CHANNEL_W} {2};set_instance_parameter_value {cmd_demux} {NUM_OUTPUTS} {1};set_instance_parameter_value {cmd_demux} {VALID_WIDTH} {1};set_instance_parameter_value {cmd_demux} {MERLIN_PACKET_FORMAT} {ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};add_instance {cmd_demux_001} {altera_merlin_demultiplexer};set_instance_parameter_value {cmd_demux_001} {ST_DATA_W} {104};set_instance_parameter_value {cmd_demux_001} {ST_CHANNEL_W} {2};set_instance_parameter_value {cmd_demux_001} {NUM_OUTPUTS} {1};set_instance_parameter_value {cmd_demux_001} {VALID_WIDTH} {1};set_instance_parameter_value {cmd_demux_001} {MERLIN_PACKET_FORMAT} {ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};add_instance {cmd_mux} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux} {ST_DATA_W} {104};set_instance_parameter_value {cmd_mux} {ST_CHANNEL_W} {2};set_instance_parameter_value {cmd_mux} {NUM_INPUTS} {2};set_instance_parameter_value {cmd_mux} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux} {PKT_TRANS_LOCK} {72};set_instance_parameter_value {cmd_mux} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux} {ARBITRATION_SHARES} {50 30 };set_instance_parameter_value {cmd_mux} {MERLIN_PACKET_FORMAT} {ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};add_instance {rsp_demux} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux} {ST_DATA_W} {104};set_instance_parameter_value {rsp_demux} {ST_CHANNEL_W} {2};set_instance_parameter_value {rsp_demux} {NUM_OUTPUTS} {2};set_instance_parameter_value {rsp_demux} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux} {MERLIN_PACKET_FORMAT} {ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};add_instance {rsp_mux} {altera_merlin_multiplexer};set_instance_parameter_value {rsp_mux} {ST_DATA_W} {104};set_instance_parameter_value {rsp_mux} {ST_CHANNEL_W} {2};set_instance_parameter_value {rsp_mux} {NUM_INPUTS} {1};set_instance_parameter_value {rsp_mux} {PIPELINE_ARB} {0};set_instance_parameter_value {rsp_mux} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {rsp_mux} {PKT_TRANS_LOCK} {72};set_instance_parameter_value {rsp_mux} {ARBITRATION_SCHEME} {no-arb};set_instance_parameter_value {rsp_mux} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {rsp_mux} {MERLIN_PACKET_FORMAT} {ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};add_instance {rsp_mux_001} {altera_merlin_multiplexer};set_instance_parameter_value {rsp_mux_001} {ST_DATA_W} {104};set_instance_parameter_value {rsp_mux_001} {ST_CHANNEL_W} {2};set_instance_parameter_value {rsp_mux_001} {NUM_INPUTS} {1};set_instance_parameter_value {rsp_mux_001} {PIPELINE_ARB} {0};set_instance_parameter_value {rsp_mux_001} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {rsp_mux_001} {PKT_TRANS_LOCK} {72};set_instance_parameter_value {rsp_mux_001} {ARBITRATION_SCHEME} {no-arb};set_instance_parameter_value {rsp_mux_001} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {rsp_mux_001} {MERLIN_PACKET_FORMAT} {ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};add_instance {sdram_s1_rsp_width_adapter} {altera_merlin_width_adapter};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_ADDR_H} {49};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_ADDR_L} {18};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_DATA_H} {15};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_DATA_L} {0};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_BYTEEN_H} {17};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_BYTEEN_L} {16};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_BYTE_CNT_H} {60};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_BYTE_CNT_L} {56};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_TRANS_COMPRESSED_READ} {50};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_TRANS_WRITE} {52};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_BURSTWRAP_H} {61};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_BURSTWRAP_L} {61};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_BURST_SIZE_H} {64};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_BURST_SIZE_L} {62};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_RESPONSE_STATUS_H} {82};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_RESPONSE_STATUS_L} {81};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_TRANS_EXCLUSIVE} {55};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_BURST_TYPE_H} {66};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_BURST_TYPE_L} {65};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_ORI_BURST_SIZE_L} {83};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_ORI_BURST_SIZE_H} {85};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_ST_DATA_W} {86};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_ADDR_H} {67};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_ADDR_L} {36};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_DATA_H} {31};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_DATA_L} {0};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_BYTEEN_H} {35};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_BYTEEN_L} {32};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_BYTE_CNT_H} {78};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_BYTE_CNT_L} {74};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_TRANS_COMPRESSED_READ} {68};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_BURST_SIZE_H} {82};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_BURST_SIZE_L} {80};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_RESPONSE_STATUS_H} {100};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_RESPONSE_STATUS_L} {99};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_TRANS_EXCLUSIVE} {73};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_BURST_TYPE_H} {84};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_BURST_TYPE_L} {83};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_ORI_BURST_SIZE_L} {101};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_ORI_BURST_SIZE_H} {103};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_ST_DATA_W} {104};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {ST_CHANNEL_W} {2};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OPTIMIZE_FOR_RSP} {0};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {RESPONSE_PATH} {1};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {CONSTANT_BURST_SIZE} {1};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {PACKING} {1};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_MERLIN_PACKET_FORMAT} {ori_burst_size(85:83) response_status(82:81) cache(80:77) protection(76:74) thread_id(73) dest_id(72) src_id(71) qos(70) begin_burst(69) data_sideband(68) addr_sideband(67) burst_type(66:65) burst_size(64:62) burstwrap(61) byte_cnt(60:56) trans_exclusive(55) trans_lock(54) trans_read(53) trans_write(52) trans_posted(51) trans_compressed_read(50) addr(49:18) byteen(17:16) data(15:0)};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_MERLIN_PACKET_FORMAT} {ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {COMMAND_SIZE_W} {3};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {ENABLE_ADDRESS_ALIGNMENT} {0};add_instance {sdram_s1_cmd_width_adapter} {altera_merlin_width_adapter};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_ADDR_H} {67};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_ADDR_L} {36};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_DATA_H} {31};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_DATA_L} {0};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_BYTEEN_H} {35};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_BYTEEN_L} {32};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_BYTE_CNT_H} {78};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_BYTE_CNT_L} {74};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_TRANS_COMPRESSED_READ} {68};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_TRANS_WRITE} {70};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_BURSTWRAP_H} {79};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_BURSTWRAP_L} {79};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_BURST_SIZE_H} {82};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_BURST_SIZE_L} {80};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_RESPONSE_STATUS_H} {100};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_RESPONSE_STATUS_L} {99};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_TRANS_EXCLUSIVE} {73};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_BURST_TYPE_H} {84};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_BURST_TYPE_L} {83};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_ORI_BURST_SIZE_L} {101};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_ORI_BURST_SIZE_H} {103};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_ST_DATA_W} {104};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_ADDR_H} {49};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_ADDR_L} {18};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_DATA_H} {15};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_DATA_L} {0};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_BYTEEN_H} {17};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_BYTEEN_L} {16};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_BYTE_CNT_H} {60};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_BYTE_CNT_L} {56};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_TRANS_COMPRESSED_READ} {50};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_BURST_SIZE_H} {64};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_BURST_SIZE_L} {62};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_RESPONSE_STATUS_H} {82};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_RESPONSE_STATUS_L} {81};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_TRANS_EXCLUSIVE} {55};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_BURST_TYPE_H} {66};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_BURST_TYPE_L} {65};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_ORI_BURST_SIZE_L} {83};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_ORI_BURST_SIZE_H} {85};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_ST_DATA_W} {86};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {ST_CHANNEL_W} {2};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OPTIMIZE_FOR_RSP} {0};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {RESPONSE_PATH} {0};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {CONSTANT_BURST_SIZE} {1};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {PACKING} {1};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_MERLIN_PACKET_FORMAT} {ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_MERLIN_PACKET_FORMAT} {ori_burst_size(85:83) response_status(82:81) cache(80:77) protection(76:74) thread_id(73) dest_id(72) src_id(71) qos(70) begin_burst(69) data_sideband(68) addr_sideband(67) burst_type(66:65) burst_size(64:62) burstwrap(61) byte_cnt(60:56) trans_exclusive(55) trans_lock(54) trans_read(53) trans_write(52) trans_posted(51) trans_compressed_read(50) addr(49:18) byteen(17:16) data(15:0)};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {COMMAND_SIZE_W} {3};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {ENABLE_ADDRESS_ALIGNMENT} {0};add_instance {alt_vip_vfb_0_reset_reset_bridge} {altera_reset_bridge};set_instance_parameter_value {alt_vip_vfb_0_reset_reset_bridge} {ACTIVE_LOW_RESET} {0};set_instance_parameter_value {alt_vip_vfb_0_reset_reset_bridge} {SYNCHRONOUS_EDGES} {deassert};set_instance_parameter_value {alt_vip_vfb_0_reset_reset_bridge} {NUM_RESET_OUTPUTS} {1};set_instance_parameter_value {alt_vip_vfb_0_reset_reset_bridge} {USE_RESET_REQUEST} {0};add_instance {altpll_0_c2_clock_bridge} {altera_clock_bridge};set_instance_parameter_value {altpll_0_c2_clock_bridge} {EXPLICIT_CLOCK_RATE} {100000000};set_instance_parameter_value {altpll_0_c2_clock_bridge} {NUM_CLOCK_OUTPUTS} {1};add_connection {alt_vip_vfb_0_read_master_translator.avalon_universal_master_0} {alt_vip_vfb_0_read_master_agent.av} {avalon};set_connection_parameter_value {alt_vip_vfb_0_read_master_translator.avalon_universal_master_0/alt_vip_vfb_0_read_master_agent.av} {arbitrationPriority} {1};set_connection_parameter_value {alt_vip_vfb_0_read_master_translator.avalon_universal_master_0/alt_vip_vfb_0_read_master_agent.av} {baseAddress} {0x0000};set_connection_parameter_value {alt_vip_vfb_0_read_master_translator.avalon_universal_master_0/alt_vip_vfb_0_read_master_agent.av} {defaultConnection} {false};add_connection {rsp_mux.src} {alt_vip_vfb_0_read_master_agent.rp} {avalon_streaming};preview_set_connection_tag {rsp_mux.src/alt_vip_vfb_0_read_master_agent.rp} {qsys_mm.response};add_connection {alt_vip_vfb_0_write_master_translator.avalon_universal_master_0} {alt_vip_vfb_0_write_master_agent.av} {avalon};set_connection_parameter_value {alt_vip_vfb_0_write_master_translator.avalon_universal_master_0/alt_vip_vfb_0_write_master_agent.av} {arbitrationPriority} {1};set_connection_parameter_value {alt_vip_vfb_0_write_master_translator.avalon_universal_master_0/alt_vip_vfb_0_write_master_agent.av} {baseAddress} {0x0000};set_connection_parameter_value {alt_vip_vfb_0_write_master_translator.avalon_universal_master_0/alt_vip_vfb_0_write_master_agent.av} {defaultConnection} {false};add_connection {rsp_mux_001.src} {alt_vip_vfb_0_write_master_agent.rp} {avalon_streaming};preview_set_connection_tag {rsp_mux_001.src/alt_vip_vfb_0_write_master_agent.rp} {qsys_mm.response};add_connection {sdram_s1_agent.m0} {sdram_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {sdram_s1_agent.m0/sdram_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {sdram_s1_agent.m0/sdram_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {sdram_s1_agent.m0/sdram_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {sdram_s1_agent.rf_source} {sdram_s1_agent_rsp_fifo.in} {avalon_streaming};add_connection {sdram_s1_agent_rsp_fifo.out} {sdram_s1_agent.rf_sink} {avalon_streaming};add_connection {sdram_s1_agent.rdata_fifo_src} {sdram_s1_agent_rdata_fifo.in} {avalon_streaming};add_connection {sdram_s1_agent_rdata_fifo.out} {sdram_s1_agent.rdata_fifo_sink} {avalon_streaming};add_connection {alt_vip_vfb_0_read_master_agent.cp} {router.sink} {avalon_streaming};preview_set_connection_tag {alt_vip_vfb_0_read_master_agent.cp/router.sink} {qsys_mm.command};add_connection {router.src} {cmd_demux.sink} {avalon_streaming};preview_set_connection_tag {router.src/cmd_demux.sink} {qsys_mm.command};add_connection {alt_vip_vfb_0_write_master_agent.cp} {router_001.sink} {avalon_streaming};preview_set_connection_tag {alt_vip_vfb_0_write_master_agent.cp/router_001.sink} {qsys_mm.command};add_connection {router_001.src} {cmd_demux_001.sink} {avalon_streaming};preview_set_connection_tag {router_001.src/cmd_demux_001.sink} {qsys_mm.command};add_connection {sdram_s1_agent.rp} {router_002.sink} {avalon_streaming};preview_set_connection_tag {sdram_s1_agent.rp/router_002.sink} {qsys_mm.response};add_connection {sdram_s1_burst_adapter.source0} {sdram_s1_agent.cp} {avalon_streaming};preview_set_connection_tag {sdram_s1_burst_adapter.source0/sdram_s1_agent.cp} {qsys_mm.command};add_connection {cmd_demux.src0} {cmd_mux.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src0/cmd_mux.sink0} {qsys_mm.command};add_connection {cmd_demux_001.src0} {cmd_mux.sink1} {avalon_streaming};preview_set_connection_tag {cmd_demux_001.src0/cmd_mux.sink1} {qsys_mm.command};add_connection {rsp_demux.src0} {rsp_mux.sink0} {avalon_streaming};preview_set_connection_tag {rsp_demux.src0/rsp_mux.sink0} {qsys_mm.response};add_connection {rsp_demux.src1} {rsp_mux_001.sink0} {avalon_streaming};preview_set_connection_tag {rsp_demux.src1/rsp_mux_001.sink0} {qsys_mm.response};add_connection {router_002.src} {sdram_s1_rsp_width_adapter.sink} {avalon_streaming};preview_set_connection_tag {router_002.src/sdram_s1_rsp_width_adapter.sink} {qsys_mm.response};add_connection {sdram_s1_rsp_width_adapter.src} {rsp_demux.sink} {avalon_streaming};preview_set_connection_tag {sdram_s1_rsp_width_adapter.src/rsp_demux.sink} {qsys_mm.response};add_connection {cmd_mux.src} {sdram_s1_cmd_width_adapter.sink} {avalon_streaming};preview_set_connection_tag {cmd_mux.src/sdram_s1_cmd_width_adapter.sink} {qsys_mm.command};add_connection {sdram_s1_cmd_width_adapter.src} {sdram_s1_burst_adapter.sink0} {avalon_streaming};preview_set_connection_tag {sdram_s1_cmd_width_adapter.src/sdram_s1_burst_adapter.sink0} {qsys_mm.command};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {alt_vip_vfb_0_read_master_translator.reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {alt_vip_vfb_0_write_master_translator.reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {sdram_s1_translator.reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {alt_vip_vfb_0_read_master_agent.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {alt_vip_vfb_0_write_master_agent.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {sdram_s1_agent.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {sdram_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {sdram_s1_agent_rdata_fifo.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {router.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {router_001.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {router_002.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {sdram_s1_burst_adapter.cr0_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {cmd_demux.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {cmd_demux_001.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {cmd_mux.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {rsp_demux.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {rsp_mux.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {rsp_mux_001.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {sdram_s1_rsp_width_adapter.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {sdram_s1_cmd_width_adapter.clk_reset} {reset};add_connection {altpll_0_c2_clock_bridge.out_clk} {alt_vip_vfb_0_read_master_translator.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {alt_vip_vfb_0_write_master_translator.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {sdram_s1_translator.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {alt_vip_vfb_0_read_master_agent.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {alt_vip_vfb_0_write_master_agent.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {sdram_s1_agent.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {sdram_s1_agent_rsp_fifo.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {sdram_s1_agent_rdata_fifo.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {router.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {router_001.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {router_002.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {sdram_s1_burst_adapter.cr0} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {cmd_demux.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {rsp_mux.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {cmd_demux_001.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {rsp_mux_001.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {cmd_mux.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {rsp_demux.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {sdram_s1_rsp_width_adapter.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {sdram_s1_cmd_width_adapter.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {alt_vip_vfb_0_reset_reset_bridge.clk} {clock};add_interface {altpll_0_c2} {clock} {slave};set_interface_property {altpll_0_c2} {EXPORT_OF} {altpll_0_c2_clock_bridge.in_clk};add_interface {alt_vip_vfb_0_reset_reset_bridge_in_reset} {reset} {slave};set_interface_property {alt_vip_vfb_0_reset_reset_bridge_in_reset} {EXPORT_OF} {alt_vip_vfb_0_reset_reset_bridge.in_reset};add_interface {alt_vip_vfb_0_read_master} {avalon} {slave};set_interface_property {alt_vip_vfb_0_read_master} {EXPORT_OF} {alt_vip_vfb_0_read_master_translator.avalon_anti_master_0};add_interface {alt_vip_vfb_0_write_master} {avalon} {slave};set_interface_property {alt_vip_vfb_0_write_master} {EXPORT_OF} {alt_vip_vfb_0_write_master_translator.avalon_anti_master_0};add_interface {sdram_s1} {avalon} {master};set_interface_property {sdram_s1} {EXPORT_OF} {sdram_s1_translator.avalon_anti_slave_0};set_module_assignment {interconnect_id.alt_vip_vfb_0.read_master} {0};set_module_assignment {interconnect_id.alt_vip_vfb_0.write_master} {1};set_module_assignment {interconnect_id.sdram.s1} {0};(altera_merlin_master_translator:16.1:AV_ADDRESSGROUP=0,AV_ADDRESS_SYMBOLS=1,AV_ADDRESS_W=32,AV_ALWAYSBURSTMAXBURST=0,AV_BITS_PER_SYMBOL=8,AV_BURSTBOUNDARIES=0,AV_BURSTCOUNT_SYMBOLS=0,AV_BURSTCOUNT_W=3,AV_BYTEENABLE_W=4,AV_CONSTANT_BURST_BEHAVIOR=1,AV_DATA_HOLD=0,AV_DATA_W=32,AV_INTERLEAVEBURSTS=0,AV_ISBIGENDIAN=0,AV_LINEWRAPBURSTS=0,AV_MAX_PENDING_READ_TRANSACTIONS=64,AV_READLATENCY=0,AV_READ_WAIT=1,AV_REGISTERINCOMINGSIGNALS=0,AV_REGISTEROUTGOINGSIGNALS=0,AV_SETUP_WAIT=0,AV_SYMBOLS_PER_WORD=4,AV_WRITE_WAIT=0,SYNC_RESET=0,UAV_ADDRESSGROUP=0,UAV_ADDRESS_W=32,UAV_BURSTCOUNT_W=5,UAV_CONSTANT_BURST_BEHAVIOR=0,USE_ADDRESS=1,USE_BEGINBURSTTRANSFER=0,USE_BEGINTRANSFER=0,USE_BURSTCOUNT=1,USE_BYTEENABLE=0,USE_CHIPSELECT=0,USE_CLKEN=0,USE_DEBUGACCESS=0,USE_LOCK=0,USE_READ=1,USE_READDATA=1,USE_READDATAVALID=1,USE_READRESPONSE=0,USE_WAITREQUEST=1,USE_WRITE=0,USE_WRITEDATA=0,USE_WRITERESPONSE=0)(altera_merlin_master_translator:16.1:AV_ADDRESSGROUP=0,AV_ADDRESS_SYMBOLS=1,AV_ADDRESS_W=32,AV_ALWAYSBURSTMAXBURST=0,AV_BITS_PER_SYMBOL=8,AV_BURSTBOUNDARIES=0,AV_BURSTCOUNT_SYMBOLS=0,AV_BURSTCOUNT_W=3,AV_BYTEENABLE_W=4,AV_CONSTANT_BURST_BEHAVIOR=1,AV_DATA_HOLD=0,AV_DATA_W=32,AV_INTERLEAVEBURSTS=0,AV_ISBIGENDIAN=0,AV_LINEWRAPBURSTS=0,AV_MAX_PENDING_READ_TRANSACTIONS=64,AV_READLATENCY=0,AV_READ_WAIT=1,AV_REGISTERINCOMINGSIGNALS=0,AV_REGISTEROUTGOINGSIGNALS=0,AV_SETUP_WAIT=0,AV_SYMBOLS_PER_WORD=4,AV_WRITE_WAIT=0,SYNC_RESET=0,UAV_ADDRESSGROUP=0,UAV_ADDRESS_W=32,UAV_BURSTCOUNT_W=5,UAV_CONSTANT_BURST_BEHAVIOR=0,USE_ADDRESS=1,USE_BEGINBURSTTRANSFER=0,USE_BEGINTRANSFER=0,USE_BURSTCOUNT=1,USE_BYTEENABLE=0,USE_CHIPSELECT=0,USE_CLKEN=0,USE_DEBUGACCESS=0,USE_LOCK=0,USE_READ=0,USE_READDATA=0,USE_READDATAVALID=0,USE_READRESPONSE=0,USE_WAITREQUEST=1,USE_WRITE=1,USE_WRITEDATA=1,USE_WRITERESPONSE=0)(altera_merlin_slave_translator:16.1:AV_ADDRESSGROUP=0,AV_ADDRESS_SYMBOLS=0,AV_ADDRESS_W=25,AV_ALWAYSBURSTMAXBURST=0,AV_BITS_PER_SYMBOL=8,AV_BURSTBOUNDARIES=0,AV_BURSTCOUNT_SYMBOLS=0,AV_BURSTCOUNT_W=1,AV_BYTEENABLE_W=2,AV_CONSTANT_BURST_BEHAVIOR=0,AV_DATA_HOLD=0,AV_DATA_HOLD_CYCLES=0,AV_DATA_W=16,AV_INTERLEAVEBURSTS=0,AV_ISBIGENDIAN=0,AV_LINEWRAPBURSTS=0,AV_MAX_PENDING_READ_TRANSACTIONS=7,AV_MAX_PENDING_WRITE_TRANSACTIONS=0,AV_READLATENCY=0,AV_READ_WAIT=1,AV_READ_WAIT_CYCLES=1,AV_REGISTERINCOMINGSIGNALS=0,AV_REGISTEROUTGOINGSIGNALS=0,AV_REQUIRE_UNALIGNED_ADDRESSES=0,AV_SETUP_WAIT=0,AV_SETUP_WAIT_CYCLES=0,AV_SYMBOLS_PER_WORD=2,AV_TIMING_UNITS=1,AV_WRITE_WAIT=0,AV_WRITE_WAIT_CYCLES=0,CHIPSELECT_THROUGH_READLATENCY=0,CLOCK_RATE=100000000,UAV_ADDRESSGROUP=0,UAV_ADDRESS_W=32,UAV_BURSTCOUNT_W=2,UAV_BYTEENABLE_W=2,UAV_CONSTANT_BURST_BEHAVIOR=0,UAV_DATA_W=16,USE_ADDRESS=1,USE_AV_CLKEN=0,USE_BEGINBURSTTRANSFER=0,USE_BEGINTRANSFER=0,USE_BURSTCOUNT=0,USE_BYTEENABLE=1,USE_CHIPSELECT=1,USE_DEBUGACCESS=0,USE_LOCK=0,USE_OUTPUTENABLE=0,USE_READ=1,USE_READDATA=1,USE_READDATAVALID=1,USE_READRESPONSE=0,USE_UAV_CLKEN=0,USE_WAITREQUEST=1,USE_WRITE=1,USE_WRITEBYTEENABLE=0,USE_WRITEDATA=1,USE_WRITERESPONSE=0)(altera_merlin_master_agent:16.1:ADDR_MAP=<?xml version="1.0" encoding="UTF-8"?>
|
|
<address_map>
|
|
<slave
|
|
id="0"
|
|
name="sdram_s1_translator.avalon_universal_slave_0"
|
|
start="0x0000000004000000"
|
|
end="0x00000000008000000"
|
|
responds="1"
|
|
user_default="0" />
|
|
</address_map>
|
|
,AV_BURSTBOUNDARIES=0,AV_BURSTCOUNT_W=5,AV_LINEWRAPBURSTS=0,BURSTWRAP_VALUE=1,CACHE_VALUE=0,ID=0,MERLIN_PACKET_FORMAT=ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0),PKT_ADDR_H=67,PKT_ADDR_L=36,PKT_ADDR_SIDEBAND_H=85,PKT_ADDR_SIDEBAND_L=85,PKT_BEGIN_BURST=87,PKT_BURSTWRAP_H=79,PKT_BURSTWRAP_L=79,PKT_BURST_SIZE_H=82,PKT_BURST_SIZE_L=80,PKT_BURST_TYPE_H=84,PKT_BURST_TYPE_L=83,PKT_BYTEEN_H=35,PKT_BYTEEN_L=32,PKT_BYTE_CNT_H=78,PKT_BYTE_CNT_L=74,PKT_CACHE_H=98,PKT_CACHE_L=95,PKT_DATA_H=31,PKT_DATA_L=0,PKT_DATA_SIDEBAND_H=86,PKT_DATA_SIDEBAND_L=86,PKT_DEST_ID_H=90,PKT_DEST_ID_L=90,PKT_ORI_BURST_SIZE_H=103,PKT_ORI_BURST_SIZE_L=101,PKT_PROTECTION_H=94,PKT_PROTECTION_L=92,PKT_QOS_H=88,PKT_QOS_L=88,PKT_RESPONSE_STATUS_H=100,PKT_RESPONSE_STATUS_L=99,PKT_SRC_ID_H=89,PKT_SRC_ID_L=89,PKT_THREAD_ID_H=91,PKT_THREAD_ID_L=91,PKT_TRANS_COMPRESSED_READ=68,PKT_TRANS_EXCLUSIVE=73,PKT_TRANS_LOCK=72,PKT_TRANS_POSTED=69,PKT_TRANS_READ=71,PKT_TRANS_WRITE=70,SECURE_ACCESS_BIT=1,ST_CHANNEL_W=2,ST_DATA_W=104,SUPPRESS_0_BYTEEN_RSP=0,USE_READRESPONSE=0,USE_WRITERESPONSE=0)(altera_merlin_master_agent:16.1:ADDR_MAP=<?xml version="1.0" encoding="UTF-8"?>
|
|
<address_map>
|
|
<slave
|
|
id="0"
|
|
name="sdram_s1_translator.avalon_universal_slave_0"
|
|
start="0x0000000004000000"
|
|
end="0x00000000008000000"
|
|
responds="1"
|
|
user_default="0" />
|
|
</address_map>
|
|
,AV_BURSTBOUNDARIES=0,AV_BURSTCOUNT_W=5,AV_LINEWRAPBURSTS=0,BURSTWRAP_VALUE=1,CACHE_VALUE=0,ID=1,MERLIN_PACKET_FORMAT=ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0),PKT_ADDR_H=67,PKT_ADDR_L=36,PKT_ADDR_SIDEBAND_H=85,PKT_ADDR_SIDEBAND_L=85,PKT_BEGIN_BURST=87,PKT_BURSTWRAP_H=79,PKT_BURSTWRAP_L=79,PKT_BURST_SIZE_H=82,PKT_BURST_SIZE_L=80,PKT_BURST_TYPE_H=84,PKT_BURST_TYPE_L=83,PKT_BYTEEN_H=35,PKT_BYTEEN_L=32,PKT_BYTE_CNT_H=78,PKT_BYTE_CNT_L=74,PKT_CACHE_H=98,PKT_CACHE_L=95,PKT_DATA_H=31,PKT_DATA_L=0,PKT_DATA_SIDEBAND_H=86,PKT_DATA_SIDEBAND_L=86,PKT_DEST_ID_H=90,PKT_DEST_ID_L=90,PKT_ORI_BURST_SIZE_H=103,PKT_ORI_BURST_SIZE_L=101,PKT_PROTECTION_H=94,PKT_PROTECTION_L=92,PKT_QOS_H=88,PKT_QOS_L=88,PKT_RESPONSE_STATUS_H=100,PKT_RESPONSE_STATUS_L=99,PKT_SRC_ID_H=89,PKT_SRC_ID_L=89,PKT_THREAD_ID_H=91,PKT_THREAD_ID_L=91,PKT_TRANS_COMPRESSED_READ=68,PKT_TRANS_EXCLUSIVE=73,PKT_TRANS_LOCK=72,PKT_TRANS_POSTED=69,PKT_TRANS_READ=71,PKT_TRANS_WRITE=70,SECURE_ACCESS_BIT=1,ST_CHANNEL_W=2,ST_DATA_W=104,SUPPRESS_0_BYTEEN_RSP=0,USE_READRESPONSE=0,USE_WRITERESPONSE=0)(altera_merlin_slave_agent:16.1:AVS_BURSTCOUNT_SYMBOLS=0,AVS_BURSTCOUNT_W=2,AV_LINEWRAPBURSTS=0,ECC_ENABLE=0,ID=0,MAX_BURSTWRAP=1,MAX_BYTE_CNT=2,MERLIN_PACKET_FORMAT=ori_burst_size(85:83) response_status(82:81) cache(80:77) protection(76:74) thread_id(73) dest_id(72) src_id(71) qos(70) begin_burst(69) data_sideband(68) addr_sideband(67) burst_type(66:65) burst_size(64:62) burstwrap(61) byte_cnt(60:56) trans_exclusive(55) trans_lock(54) trans_read(53) trans_write(52) trans_posted(51) trans_compressed_read(50) addr(49:18) byteen(17:16) data(15:0),PKT_ADDR_H=49,PKT_ADDR_L=18,PKT_BEGIN_BURST=69,PKT_BURSTWRAP_H=61,PKT_BURSTWRAP_L=61,PKT_BURST_SIZE_H=64,PKT_BURST_SIZE_L=62,PKT_BYTEEN_H=17,PKT_BYTEEN_L=16,PKT_BYTE_CNT_H=60,PKT_BYTE_CNT_L=56,PKT_DATA_H=15,PKT_DATA_L=0,PKT_DEST_ID_H=72,PKT_DEST_ID_L=72,PKT_ORI_BURST_SIZE_H=85,PKT_ORI_BURST_SIZE_L=83,PKT_PROTECTION_H=76,PKT_PROTECTION_L=74,PKT_RESPONSE_STATUS_H=82,PKT_RESPONSE_STATUS_L=81,PKT_SRC_ID_H=71,PKT_SRC_ID_L=71,PKT_SYMBOL_W=8,PKT_TRANS_COMPRESSED_READ=50,PKT_TRANS_LOCK=54,PKT_TRANS_POSTED=51,PKT_TRANS_READ=53,PKT_TRANS_WRITE=52,PREVENT_FIFO_OVERFLOW=1,ST_CHANNEL_W=2,ST_DATA_W=86,SUPPRESS_0_BYTEEN_CMD=1,USE_READRESPONSE=0,USE_WRITERESPONSE=0)(altera_avalon_sc_fifo:16.1:BITS_PER_SYMBOL=87,CHANNEL_WIDTH=0,EMPTY_LATENCY=1,ENABLE_EXPLICIT_MAXCHANNEL=false,ERROR_WIDTH=0,EXPLICIT_MAXCHANNEL=0,FIFO_DEPTH=8,SYMBOLS_PER_BEAT=1,USE_ALMOST_EMPTY_IF=0,USE_ALMOST_FULL_IF=0,USE_FILL_LEVEL=0,USE_MEMORY_BLOCKS=0,USE_PACKETS=1,USE_STORE_FORWARD=0)(altera_avalon_sc_fifo:16.1:BITS_PER_SYMBOL=18,CHANNEL_WIDTH=0,EMPTY_LATENCY=3,ENABLE_EXPLICIT_MAXCHANNEL=false,ERROR_WIDTH=0,EXPLICIT_MAXCHANNEL=0,FIFO_DEPTH=8,SYMBOLS_PER_BEAT=1,USE_ALMOST_EMPTY_IF=0,USE_ALMOST_FULL_IF=0,USE_FILL_LEVEL=0,USE_MEMORY_BLOCKS=1,USE_PACKETS=0,USE_STORE_FORWARD=0)(altera_merlin_router:16.1:CHANNEL_ID=1,DECODER_TYPE=0,DEFAULT_CHANNEL=0,DEFAULT_DESTID=0,DEFAULT_RD_CHANNEL=-1,DEFAULT_WR_CHANNEL=-1,DESTINATION_ID=0,END_ADDRESS=0x8000000,MEMORY_ALIASING_DECODE=0,MERLIN_PACKET_FORMAT=ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0),NON_SECURED_TAG=1,PKT_ADDR_H=67,PKT_ADDR_L=36,PKT_DEST_ID_H=90,PKT_DEST_ID_L=90,PKT_PROTECTION_H=94,PKT_PROTECTION_L=92,PKT_TRANS_READ=71,PKT_TRANS_WRITE=70,SECURED_RANGE_LIST=0,SECURED_RANGE_PAIRS=0,SLAVES_INFO=0:1:0x4000000:0x8000000:both:1:0:0:1,SPAN_OFFSET=,START_ADDRESS=0x4000000,ST_CHANNEL_W=2,ST_DATA_W=104,TYPE_OF_TRANSACTION=both)(altera_merlin_router:16.1:CHANNEL_ID=1,DECODER_TYPE=0,DEFAULT_CHANNEL=0,DEFAULT_DESTID=0,DEFAULT_RD_CHANNEL=-1,DEFAULT_WR_CHANNEL=-1,DESTINATION_ID=0,END_ADDRESS=0x8000000,MEMORY_ALIASING_DECODE=0,MERLIN_PACKET_FORMAT=ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0),NON_SECURED_TAG=1,PKT_ADDR_H=67,PKT_ADDR_L=36,PKT_DEST_ID_H=90,PKT_DEST_ID_L=90,PKT_PROTECTION_H=94,PKT_PROTECTION_L=92,PKT_TRANS_READ=71,PKT_TRANS_WRITE=70,SECURED_RANGE_LIST=0,SECURED_RANGE_PAIRS=0,SLAVES_INFO=0:1:0x4000000:0x8000000:both:1:0:0:1,SPAN_OFFSET=,START_ADDRESS=0x4000000,ST_CHANNEL_W=2,ST_DATA_W=104,TYPE_OF_TRANSACTION=both)(altera_merlin_router:16.1:CHANNEL_ID=01,10,DECODER_TYPE=1,DEFAULT_CHANNEL=0,DEFAULT_DESTID=0,DEFAULT_RD_CHANNEL=-1,DEFAULT_WR_CHANNEL=-1,DESTINATION_ID=0,1,END_ADDRESS=0x0,0x0,MEMORY_ALIASING_DECODE=0,MERLIN_PACKET_FORMAT=ori_burst_size(85:83) response_status(82:81) cache(80:77) protection(76:74) thread_id(73) dest_id(72) src_id(71) qos(70) begin_burst(69) data_sideband(68) addr_sideband(67) burst_type(66:65) burst_size(64:62) burstwrap(61) byte_cnt(60:56) trans_exclusive(55) trans_lock(54) trans_read(53) trans_write(52) trans_posted(51) trans_compressed_read(50) addr(49:18) byteen(17:16) data(15:0),NON_SECURED_TAG=1,1,PKT_ADDR_H=49,PKT_ADDR_L=18,PKT_DEST_ID_H=72,PKT_DEST_ID_L=72,PKT_PROTECTION_H=76,PKT_PROTECTION_L=74,PKT_TRANS_READ=53,PKT_TRANS_WRITE=52,SECURED_RANGE_LIST=0,0,SECURED_RANGE_PAIRS=0,0,SLAVES_INFO=0:01:0x0:0x0:read:1:0:0:1,1:10:0x0:0x0:write:1:0:0:1,SPAN_OFFSET=,START_ADDRESS=0x0,0x0,ST_CHANNEL_W=2,ST_DATA_W=86,TYPE_OF_TRANSACTION=read,write)(altera_merlin_burst_adapter:16.1:ADAPTER_VERSION=13.1,BURSTWRAP_CONST_MASK=1,BURSTWRAP_CONST_VALUE=1,BYTEENABLE_SYNTHESIS=1,COMPRESSED_READ_SUPPORT=1,INCOMPLETE_WRAP_SUPPORT=0,IN_NARROW_SIZE=0,MERLIN_PACKET_FORMAT=ori_burst_size(85:83) response_status(82:81) cache(80:77) protection(76:74) thread_id(73) dest_id(72) src_id(71) qos(70) begin_burst(69) data_sideband(68) addr_sideband(67) burst_type(66:65) burst_size(64:62) burstwrap(61) byte_cnt(60:56) trans_exclusive(55) trans_lock(54) trans_read(53) trans_write(52) trans_posted(51) trans_compressed_read(50) addr(49:18) byteen(17:16) data(15:0),NO_WRAP_SUPPORT=0,OUT_BURSTWRAP_H=61,OUT_BYTE_CNT_H=57,OUT_COMPLETE_WRAP=0,OUT_FIXED=0,OUT_NARROW_SIZE=0,PIPE_INPUTS=0,PKT_ADDR_H=49,PKT_ADDR_L=18,PKT_BEGIN_BURST=69,PKT_BURSTWRAP_H=61,PKT_BURSTWRAP_L=61,PKT_BURST_SIZE_H=64,PKT_BURST_SIZE_L=62,PKT_BURST_TYPE_H=66,PKT_BURST_TYPE_L=65,PKT_BYTEEN_H=17,PKT_BYTEEN_L=16,PKT_BYTE_CNT_H=60,PKT_BYTE_CNT_L=56,PKT_TRANS_COMPRESSED_READ=50,PKT_TRANS_READ=53,PKT_TRANS_WRITE=52,ST_CHANNEL_W=2,ST_DATA_W=86)(altera_merlin_demultiplexer:16.1:AUTO_CLK_CLOCK_RATE=100000000,AUTO_DEVICE_FAMILY=MAX 10,MERLIN_PACKET_FORMAT=ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0),NUM_OUTPUTS=1,ST_CHANNEL_W=2,ST_DATA_W=104,VALID_WIDTH=1)(altera_merlin_demultiplexer:16.1:AUTO_CLK_CLOCK_RATE=100000000,AUTO_DEVICE_FAMILY=MAX 10,MERLIN_PACKET_FORMAT=ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0),NUM_OUTPUTS=1,ST_CHANNEL_W=2,ST_DATA_W=104,VALID_WIDTH=1)(altera_merlin_multiplexer:16.1:ARBITRATION_SCHEME=round-robin,ARBITRATION_SHARES=50,30,MERLIN_PACKET_FORMAT=ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0),NUM_INPUTS=2,PIPELINE_ARB=1,PKT_TRANS_LOCK=72,ST_CHANNEL_W=2,ST_DATA_W=104,USE_EXTERNAL_ARB=0)(altera_merlin_demultiplexer:16.1:AUTO_CLK_CLOCK_RATE=100000000,AUTO_DEVICE_FAMILY=MAX 10,MERLIN_PACKET_FORMAT=ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0),NUM_OUTPUTS=2,ST_CHANNEL_W=2,ST_DATA_W=104,VALID_WIDTH=1)(altera_merlin_multiplexer:16.1:ARBITRATION_SCHEME=no-arb,ARBITRATION_SHARES=1,MERLIN_PACKET_FORMAT=ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0),NUM_INPUTS=1,PIPELINE_ARB=0,PKT_TRANS_LOCK=72,ST_CHANNEL_W=2,ST_DATA_W=104,USE_EXTERNAL_ARB=0)(altera_merlin_multiplexer:16.1:ARBITRATION_SCHEME=no-arb,ARBITRATION_SHARES=1,MERLIN_PACKET_FORMAT=ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0),NUM_INPUTS=1,PIPELINE_ARB=0,PKT_TRANS_LOCK=72,ST_CHANNEL_W=2,ST_DATA_W=104,USE_EXTERNAL_ARB=0)(altera_merlin_width_adapter:16.1:COMMAND_SIZE_W=3,CONSTANT_BURST_SIZE=1,ENABLE_ADDRESS_ALIGNMENT=0,IN_MERLIN_PACKET_FORMAT=ori_burst_size(85:83) response_status(82:81) cache(80:77) protection(76:74) thread_id(73) dest_id(72) src_id(71) qos(70) begin_burst(69) data_sideband(68) addr_sideband(67) burst_type(66:65) burst_size(64:62) burstwrap(61) byte_cnt(60:56) trans_exclusive(55) trans_lock(54) trans_read(53) trans_write(52) trans_posted(51) trans_compressed_read(50) addr(49:18) byteen(17:16) data(15:0),IN_PKT_ADDR_H=49,IN_PKT_ADDR_L=18,IN_PKT_BURSTWRAP_H=61,IN_PKT_BURSTWRAP_L=61,IN_PKT_BURST_SIZE_H=64,IN_PKT_BURST_SIZE_L=62,IN_PKT_BURST_TYPE_H=66,IN_PKT_BURST_TYPE_L=65,IN_PKT_BYTEEN_H=17,IN_PKT_BYTEEN_L=16,IN_PKT_BYTE_CNT_H=60,IN_PKT_BYTE_CNT_L=56,IN_PKT_DATA_H=15,IN_PKT_DATA_L=0,IN_PKT_ORI_BURST_SIZE_H=85,IN_PKT_ORI_BURST_SIZE_L=83,IN_PKT_RESPONSE_STATUS_H=82,IN_PKT_RESPONSE_STATUS_L=81,IN_PKT_TRANS_COMPRESSED_READ=50,IN_PKT_TRANS_EXCLUSIVE=55,IN_PKT_TRANS_WRITE=52,IN_ST_DATA_W=86,OPTIMIZE_FOR_RSP=0,OUT_MERLIN_PACKET_FORMAT=ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0),OUT_PKT_ADDR_H=67,OUT_PKT_ADDR_L=36,OUT_PKT_BURST_SIZE_H=82,OUT_PKT_BURST_SIZE_L=80,OUT_PKT_BURST_TYPE_H=84,OUT_PKT_BURST_TYPE_L=83,OUT_PKT_BYTEEN_H=35,OUT_PKT_BYTEEN_L=32,OUT_PKT_BYTE_CNT_H=78,OUT_PKT_BYTE_CNT_L=74,OUT_PKT_DATA_H=31,OUT_PKT_DATA_L=0,OUT_PKT_ORI_BURST_SIZE_H=103,OUT_PKT_ORI_BURST_SIZE_L=101,OUT_PKT_RESPONSE_STATUS_H=100,OUT_PKT_RESPONSE_STATUS_L=99,OUT_PKT_TRANS_COMPRESSED_READ=68,OUT_PKT_TRANS_EXCLUSIVE=73,OUT_ST_DATA_W=104,PACKING=1,RESPONSE_PATH=1,ST_CHANNEL_W=2)(altera_merlin_width_adapter:16.1:COMMAND_SIZE_W=3,CONSTANT_BURST_SIZE=1,ENABLE_ADDRESS_ALIGNMENT=0,IN_MERLIN_PACKET_FORMAT=ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0),IN_PKT_ADDR_H=67,IN_PKT_ADDR_L=36,IN_PKT_BURSTWRAP_H=79,IN_PKT_BURSTWRAP_L=79,IN_PKT_BURST_SIZE_H=82,IN_PKT_BURST_SIZE_L=80,IN_PKT_BURST_TYPE_H=84,IN_PKT_BURST_TYPE_L=83,IN_PKT_BYTEEN_H=35,IN_PKT_BYTEEN_L=32,IN_PKT_BYTE_CNT_H=78,IN_PKT_BYTE_CNT_L=74,IN_PKT_DATA_H=31,IN_PKT_DATA_L=0,IN_PKT_ORI_BURST_SIZE_H=103,IN_PKT_ORI_BURST_SIZE_L=101,IN_PKT_RESPONSE_STATUS_H=100,IN_PKT_RESPONSE_STATUS_L=99,IN_PKT_TRANS_COMPRESSED_READ=68,IN_PKT_TRANS_EXCLUSIVE=73,IN_PKT_TRANS_WRITE=70,IN_ST_DATA_W=104,OPTIMIZE_FOR_RSP=0,OUT_MERLIN_PACKET_FORMAT=ori_burst_size(85:83) response_status(82:81) cache(80:77) protection(76:74) thread_id(73) dest_id(72) src_id(71) qos(70) begin_burst(69) data_sideband(68) addr_sideband(67) burst_type(66:65) burst_size(64:62) burstwrap(61) byte_cnt(60:56) trans_exclusive(55) trans_lock(54) trans_read(53) trans_write(52) trans_posted(51) trans_compressed_read(50) addr(49:18) byteen(17:16) data(15:0),OUT_PKT_ADDR_H=49,OUT_PKT_ADDR_L=18,OUT_PKT_BURST_SIZE_H=64,OUT_PKT_BURST_SIZE_L=62,OUT_PKT_BURST_TYPE_H=66,OUT_PKT_BURST_TYPE_L=65,OUT_PKT_BYTEEN_H=17,OUT_PKT_BYTEEN_L=16,OUT_PKT_BYTE_CNT_H=60,OUT_PKT_BYTE_CNT_L=56,OUT_PKT_DATA_H=15,OUT_PKT_DATA_L=0,OUT_PKT_ORI_BURST_SIZE_H=85,OUT_PKT_ORI_BURST_SIZE_L=83,OUT_PKT_RESPONSE_STATUS_H=82,OUT_PKT_RESPONSE_STATUS_L=81,OUT_PKT_TRANS_COMPRESSED_READ=50,OUT_PKT_TRANS_EXCLUSIVE=55,OUT_ST_DATA_W=86,PACKING=1,RESPONSE_PATH=0,ST_CHANNEL_W=2)(altera_reset_bridge:16.1:ACTIVE_LOW_RESET=0,AUTO_CLK_CLOCK_RATE=100000000,NUM_RESET_OUTPUTS=1,SYNCHRONOUS_EDGES=deassert,USE_RESET_REQUEST=0)(altera_clock_bridge:16.1:DERIVED_CLOCK_RATE=0,EXPLICIT_CLOCK_RATE=100000000,NUM_CLOCK_OUTPUTS=1)(avalon:16.1:arbitrationPriority=1,baseAddress=0x0000,defaultConnection=false)(avalon_streaming:16.1:)(avalon:16.1:arbitrationPriority=1,baseAddress=0x0000,defaultConnection=false)(avalon_streaming:16.1:)(avalon:16.1:arbitrationPriority=1,baseAddress=0x0000,defaultConnection=false)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(avalon_streaming:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(reset:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)(clock:16.1:)"
|
|
instancePathKey="Qsys:.:mm_interconnect_1"
|
|
kind="altera_mm_interconnect"
|
|
version="16.1"
|
|
name="Qsys_mm_interconnect_1">
|
|
<parameter name="AUTO_DEVICE" value="10M50DAF484C7G" />
|
|
<parameter name="AUTO_DEVICE_FAMILY" value="MAX 10" />
|
|
<parameter name="AUTO_DEVICE_SPEEDGRADE" value="" />
|
|
<parameter
|
|
name="COMPOSE_CONTENTS"
|
|
value="add_instance {alt_vip_vfb_0_read_master_translator} {altera_merlin_master_translator};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_ADDRESS_W} {32};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_DATA_W} {32};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_BURSTCOUNT_W} {3};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {UAV_ADDRESS_W} {32};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {UAV_BURSTCOUNT_W} {5};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_READLATENCY} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_READDATA} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_WRITEDATA} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_READ} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_WRITE} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_ADDRESS} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_BURSTCOUNT} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_CLKEN} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_READDATAVALID} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_LOCK} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_ADDRESS_SYMBOLS} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_CONSTANT_BURST_BEHAVIOR} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {64};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {SYNC_RESET} {0};add_instance {alt_vip_vfb_0_write_master_translator} {altera_merlin_master_translator};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_ADDRESS_W} {32};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_DATA_W} {32};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_BURSTCOUNT_W} {3};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {UAV_ADDRESS_W} {32};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {UAV_BURSTCOUNT_W} {5};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_READLATENCY} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {USE_READDATA} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {USE_READ} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {USE_WRITE} {1};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {USE_ADDRESS} {1};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {USE_BURSTCOUNT} {1};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {USE_CLKEN} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {USE_LOCK} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_ADDRESS_SYMBOLS} {1};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_CONSTANT_BURST_BEHAVIOR} {1};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {64};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_translator} {SYNC_RESET} {0};add_instance {sdram_s1_translator} {altera_merlin_slave_translator};set_instance_parameter_value {sdram_s1_translator} {AV_ADDRESS_W} {25};set_instance_parameter_value {sdram_s1_translator} {AV_DATA_W} {16};set_instance_parameter_value {sdram_s1_translator} {UAV_DATA_W} {16};set_instance_parameter_value {sdram_s1_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {sdram_s1_translator} {AV_BYTEENABLE_W} {2};set_instance_parameter_value {sdram_s1_translator} {UAV_BYTEENABLE_W} {2};set_instance_parameter_value {sdram_s1_translator} {UAV_ADDRESS_W} {32};set_instance_parameter_value {sdram_s1_translator} {UAV_BURSTCOUNT_W} {2};set_instance_parameter_value {sdram_s1_translator} {AV_READLATENCY} {0};set_instance_parameter_value {sdram_s1_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {sdram_s1_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {sdram_s1_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {sdram_s1_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {sdram_s1_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {sdram_s1_translator} {USE_READDATA} {1};set_instance_parameter_value {sdram_s1_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {sdram_s1_translator} {USE_READ} {1};set_instance_parameter_value {sdram_s1_translator} {USE_WRITE} {1};set_instance_parameter_value {sdram_s1_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {sdram_s1_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {sdram_s1_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {sdram_s1_translator} {USE_CHIPSELECT} {1};set_instance_parameter_value {sdram_s1_translator} {USE_ADDRESS} {1};set_instance_parameter_value {sdram_s1_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {sdram_s1_translator} {USE_READDATAVALID} {1};set_instance_parameter_value {sdram_s1_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {sdram_s1_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {sdram_s1_translator} {USE_LOCK} {0};set_instance_parameter_value {sdram_s1_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {sdram_s1_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {sdram_s1_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {sdram_s1_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {sdram_s1_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {sdram_s1_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {sdram_s1_translator} {AV_SYMBOLS_PER_WORD} {2};set_instance_parameter_value {sdram_s1_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {sdram_s1_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {sdram_s1_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {sdram_s1_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {sdram_s1_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {sdram_s1_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {sdram_s1_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {7};set_instance_parameter_value {sdram_s1_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {sdram_s1_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {sdram_s1_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {sdram_s1_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {sdram_s1_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {sdram_s1_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {sdram_s1_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {sdram_s1_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {sdram_s1_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {sdram_s1_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {sdram_s1_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};add_instance {alt_vip_vfb_0_read_master_agent} {altera_merlin_master_agent};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_ORI_BURST_SIZE_H} {103};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_ORI_BURST_SIZE_L} {101};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_RESPONSE_STATUS_H} {100};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_RESPONSE_STATUS_L} {99};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_QOS_H} {88};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_QOS_L} {88};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_DATA_SIDEBAND_H} {86};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_DATA_SIDEBAND_L} {86};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_ADDR_SIDEBAND_H} {85};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_ADDR_SIDEBAND_L} {85};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_BURST_TYPE_H} {84};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_BURST_TYPE_L} {83};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_CACHE_H} {98};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_CACHE_L} {95};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_THREAD_ID_H} {91};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_THREAD_ID_L} {91};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_BURST_SIZE_H} {82};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_BURST_SIZE_L} {80};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_TRANS_EXCLUSIVE} {73};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_TRANS_LOCK} {72};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_BEGIN_BURST} {87};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_PROTECTION_H} {94};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_PROTECTION_L} {92};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_BURSTWRAP_H} {79};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_BURSTWRAP_L} {79};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_BYTE_CNT_H} {78};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_BYTE_CNT_L} {74};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_ADDR_H} {67};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_TRANS_COMPRESSED_READ} {68};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_TRANS_POSTED} {69};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_TRANS_WRITE} {70};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_TRANS_READ} {71};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_DATA_H} {31};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_DATA_L} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_SRC_ID_H} {89};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_SRC_ID_L} {89};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_DEST_ID_H} {90};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {PKT_DEST_ID_L} {90};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {ST_DATA_W} {104};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {ST_CHANNEL_W} {2};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {AV_BURSTCOUNT_W} {5};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {ADDR_MAP} {<?xml version="1.0" encoding="UTF-8"?>
|
|
<address_map>
|
|
<slave
|
|
id="0"
|
|
name="sdram_s1_translator.avalon_universal_slave_0"
|
|
start="0x0000000004000000"
|
|
end="0x00000000008000000"
|
|
responds="1"
|
|
user_default="0" />
|
|
</address_map>
|
|
};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {SUPPRESS_0_BYTEEN_RSP} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {ID} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {BURSTWRAP_VALUE} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {CACHE_VALUE} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {SECURE_ACCESS_BIT} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {USE_WRITERESPONSE} {0};add_instance {alt_vip_vfb_0_write_master_agent} {altera_merlin_master_agent};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_ORI_BURST_SIZE_H} {103};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_ORI_BURST_SIZE_L} {101};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_RESPONSE_STATUS_H} {100};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_RESPONSE_STATUS_L} {99};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_QOS_H} {88};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_QOS_L} {88};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_DATA_SIDEBAND_H} {86};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_DATA_SIDEBAND_L} {86};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_ADDR_SIDEBAND_H} {85};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_ADDR_SIDEBAND_L} {85};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BURST_TYPE_H} {84};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BURST_TYPE_L} {83};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_CACHE_H} {98};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_CACHE_L} {95};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_THREAD_ID_H} {91};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_THREAD_ID_L} {91};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BURST_SIZE_H} {82};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BURST_SIZE_L} {80};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_TRANS_EXCLUSIVE} {73};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_TRANS_LOCK} {72};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BEGIN_BURST} {87};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_PROTECTION_H} {94};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_PROTECTION_L} {92};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BURSTWRAP_H} {79};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BURSTWRAP_L} {79};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BYTE_CNT_H} {78};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BYTE_CNT_L} {74};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_ADDR_H} {67};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_TRANS_COMPRESSED_READ} {68};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_TRANS_POSTED} {69};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_TRANS_WRITE} {70};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_TRANS_READ} {71};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_DATA_H} {31};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_DATA_L} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_SRC_ID_H} {89};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_SRC_ID_L} {89};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_DEST_ID_H} {90};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_DEST_ID_L} {90};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {ST_DATA_W} {104};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {ST_CHANNEL_W} {2};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {AV_BURSTCOUNT_W} {5};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {ADDR_MAP} {<?xml version="1.0" encoding="UTF-8"?>
|
|
<address_map>
|
|
<slave
|
|
id="0"
|
|
name="sdram_s1_translator.avalon_universal_slave_0"
|
|
start="0x0000000004000000"
|
|
end="0x00000000008000000"
|
|
responds="1"
|
|
user_default="0" />
|
|
</address_map>
|
|
};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {SUPPRESS_0_BYTEEN_RSP} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {ID} {1};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {BURSTWRAP_VALUE} {1};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {CACHE_VALUE} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {SECURE_ACCESS_BIT} {1};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {USE_WRITERESPONSE} {0};add_instance {sdram_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {sdram_s1_agent} {PKT_ORI_BURST_SIZE_H} {85};set_instance_parameter_value {sdram_s1_agent} {PKT_ORI_BURST_SIZE_L} {83};set_instance_parameter_value {sdram_s1_agent} {PKT_RESPONSE_STATUS_H} {82};set_instance_parameter_value {sdram_s1_agent} {PKT_RESPONSE_STATUS_L} {81};set_instance_parameter_value {sdram_s1_agent} {PKT_BURST_SIZE_H} {64};set_instance_parameter_value {sdram_s1_agent} {PKT_BURST_SIZE_L} {62};set_instance_parameter_value {sdram_s1_agent} {PKT_TRANS_LOCK} {54};set_instance_parameter_value {sdram_s1_agent} {PKT_BEGIN_BURST} {69};set_instance_parameter_value {sdram_s1_agent} {PKT_PROTECTION_H} {76};set_instance_parameter_value {sdram_s1_agent} {PKT_PROTECTION_L} {74};set_instance_parameter_value {sdram_s1_agent} {PKT_BURSTWRAP_H} {61};set_instance_parameter_value {sdram_s1_agent} {PKT_BURSTWRAP_L} {61};set_instance_parameter_value {sdram_s1_agent} {PKT_BYTE_CNT_H} {60};set_instance_parameter_value {sdram_s1_agent} {PKT_BYTE_CNT_L} {56};set_instance_parameter_value {sdram_s1_agent} {PKT_ADDR_H} {49};set_instance_parameter_value {sdram_s1_agent} {PKT_ADDR_L} {18};set_instance_parameter_value {sdram_s1_agent} {PKT_TRANS_COMPRESSED_READ} {50};set_instance_parameter_value {sdram_s1_agent} {PKT_TRANS_POSTED} {51};set_instance_parameter_value {sdram_s1_agent} {PKT_TRANS_WRITE} {52};set_instance_parameter_value {sdram_s1_agent} {PKT_TRANS_READ} {53};set_instance_parameter_value {sdram_s1_agent} {PKT_DATA_H} {15};set_instance_parameter_value {sdram_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {sdram_s1_agent} {PKT_BYTEEN_H} {17};set_instance_parameter_value {sdram_s1_agent} {PKT_BYTEEN_L} {16};set_instance_parameter_value {sdram_s1_agent} {PKT_SRC_ID_H} {71};set_instance_parameter_value {sdram_s1_agent} {PKT_SRC_ID_L} {71};set_instance_parameter_value {sdram_s1_agent} {PKT_DEST_ID_H} {72};set_instance_parameter_value {sdram_s1_agent} {PKT_DEST_ID_L} {72};set_instance_parameter_value {sdram_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {sdram_s1_agent} {ST_CHANNEL_W} {2};set_instance_parameter_value {sdram_s1_agent} {ST_DATA_W} {86};set_instance_parameter_value {sdram_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {sdram_s1_agent} {AVS_BURSTCOUNT_W} {2};set_instance_parameter_value {sdram_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {sdram_s1_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(85:83) response_status(82:81) cache(80:77) protection(76:74) thread_id(73) dest_id(72) src_id(71) qos(70) begin_burst(69) data_sideband(68) addr_sideband(67) burst_type(66:65) burst_size(64:62) burstwrap(61) byte_cnt(60:56) trans_exclusive(55) trans_lock(54) trans_read(53) trans_write(52) trans_posted(51) trans_compressed_read(50) addr(49:18) byteen(17:16) data(15:0)};set_instance_parameter_value {sdram_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {1};set_instance_parameter_value {sdram_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {sdram_s1_agent} {MAX_BYTE_CNT} {2};set_instance_parameter_value {sdram_s1_agent} {MAX_BURSTWRAP} {1};set_instance_parameter_value {sdram_s1_agent} {ID} {0};set_instance_parameter_value {sdram_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {sdram_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {sdram_s1_agent} {ECC_ENABLE} {0};add_instance {sdram_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {87};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {FIFO_DEPTH} {8};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {sdram_s1_agent_rdata_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {BITS_PER_SYMBOL} {18};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {FIFO_DEPTH} {8};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {USE_PACKETS} {0};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {EMPTY_LATENCY} {3};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {USE_MEMORY_BLOCKS} {1};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {router} {altera_merlin_router};set_instance_parameter_value {router} {DESTINATION_ID} {0 };set_instance_parameter_value {router} {CHANNEL_ID} {1 };set_instance_parameter_value {router} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router} {START_ADDRESS} {0x4000000 };set_instance_parameter_value {router} {END_ADDRESS} {0x8000000 };set_instance_parameter_value {router} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router} {SPAN_OFFSET} {};set_instance_parameter_value {router} {PKT_ADDR_H} {67};set_instance_parameter_value {router} {PKT_ADDR_L} {36};set_instance_parameter_value {router} {PKT_PROTECTION_H} {94};set_instance_parameter_value {router} {PKT_PROTECTION_L} {92};set_instance_parameter_value {router} {PKT_DEST_ID_H} {90};set_instance_parameter_value {router} {PKT_DEST_ID_L} {90};set_instance_parameter_value {router} {PKT_TRANS_WRITE} {70};set_instance_parameter_value {router} {PKT_TRANS_READ} {71};set_instance_parameter_value {router} {ST_DATA_W} {104};set_instance_parameter_value {router} {ST_CHANNEL_W} {2};set_instance_parameter_value {router} {DECODER_TYPE} {0};set_instance_parameter_value {router} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router} {DEFAULT_DESTID} {0};set_instance_parameter_value {router} {MERLIN_PACKET_FORMAT} {ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router} {MEMORY_ALIASING_DECODE} {0};add_instance {router_001} {altera_merlin_router};set_instance_parameter_value {router_001} {DESTINATION_ID} {0 };set_instance_parameter_value {router_001} {CHANNEL_ID} {1 };set_instance_parameter_value {router_001} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_001} {START_ADDRESS} {0x4000000 };set_instance_parameter_value {router_001} {END_ADDRESS} {0x8000000 };set_instance_parameter_value {router_001} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_001} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_001} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_001} {SPAN_OFFSET} {};set_instance_parameter_value {router_001} {PKT_ADDR_H} {67};set_instance_parameter_value {router_001} {PKT_ADDR_L} {36};set_instance_parameter_value {router_001} {PKT_PROTECTION_H} {94};set_instance_parameter_value {router_001} {PKT_PROTECTION_L} {92};set_instance_parameter_value {router_001} {PKT_DEST_ID_H} {90};set_instance_parameter_value {router_001} {PKT_DEST_ID_L} {90};set_instance_parameter_value {router_001} {PKT_TRANS_WRITE} {70};set_instance_parameter_value {router_001} {PKT_TRANS_READ} {71};set_instance_parameter_value {router_001} {ST_DATA_W} {104};set_instance_parameter_value {router_001} {ST_CHANNEL_W} {2};set_instance_parameter_value {router_001} {DECODER_TYPE} {0};set_instance_parameter_value {router_001} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_001} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_001} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_001} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_001} {MERLIN_PACKET_FORMAT} {ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_001} {MEMORY_ALIASING_DECODE} {0};add_instance {router_002} {altera_merlin_router};set_instance_parameter_value {router_002} {DESTINATION_ID} {0 1 };set_instance_parameter_value {router_002} {CHANNEL_ID} {01 10 };set_instance_parameter_value {router_002} {TYPE_OF_TRANSACTION} {read write };set_instance_parameter_value {router_002} {START_ADDRESS} {0x0 0x0 };set_instance_parameter_value {router_002} {END_ADDRESS} {0x0 0x0 };set_instance_parameter_value {router_002} {NON_SECURED_TAG} {1 1 };set_instance_parameter_value {router_002} {SECURED_RANGE_PAIRS} {0 0 };set_instance_parameter_value {router_002} {SECURED_RANGE_LIST} {0 0 };set_instance_parameter_value {router_002} {SPAN_OFFSET} {};set_instance_parameter_value {router_002} {PKT_ADDR_H} {49};set_instance_parameter_value {router_002} {PKT_ADDR_L} {18};set_instance_parameter_value {router_002} {PKT_PROTECTION_H} {76};set_instance_parameter_value {router_002} {PKT_PROTECTION_L} {74};set_instance_parameter_value {router_002} {PKT_DEST_ID_H} {72};set_instance_parameter_value {router_002} {PKT_DEST_ID_L} {72};set_instance_parameter_value {router_002} {PKT_TRANS_WRITE} {52};set_instance_parameter_value {router_002} {PKT_TRANS_READ} {53};set_instance_parameter_value {router_002} {ST_DATA_W} {86};set_instance_parameter_value {router_002} {ST_CHANNEL_W} {2};set_instance_parameter_value {router_002} {DECODER_TYPE} {1};set_instance_parameter_value {router_002} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_002} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_002} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_002} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_002} {MERLIN_PACKET_FORMAT} {ori_burst_size(85:83) response_status(82:81) cache(80:77) protection(76:74) thread_id(73) dest_id(72) src_id(71) qos(70) begin_burst(69) data_sideband(68) addr_sideband(67) burst_type(66:65) burst_size(64:62) burstwrap(61) byte_cnt(60:56) trans_exclusive(55) trans_lock(54) trans_read(53) trans_write(52) trans_posted(51) trans_compressed_read(50) addr(49:18) byteen(17:16) data(15:0)};set_instance_parameter_value {router_002} {MEMORY_ALIASING_DECODE} {0};add_instance {sdram_s1_burst_adapter} {altera_merlin_burst_adapter};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_ADDR_H} {49};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_ADDR_L} {18};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_BEGIN_BURST} {69};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_BYTE_CNT_H} {60};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_BYTE_CNT_L} {56};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_BYTEEN_H} {17};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_BYTEEN_L} {16};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_BURST_SIZE_H} {64};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_BURST_SIZE_L} {62};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_BURST_TYPE_H} {66};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_BURST_TYPE_L} {65};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_BURSTWRAP_H} {61};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_BURSTWRAP_L} {61};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_TRANS_COMPRESSED_READ} {50};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_TRANS_WRITE} {52};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_TRANS_READ} {53};set_instance_parameter_value {sdram_s1_burst_adapter} {OUT_NARROW_SIZE} {0};set_instance_parameter_value {sdram_s1_burst_adapter} {IN_NARROW_SIZE} {0};set_instance_parameter_value {sdram_s1_burst_adapter} {OUT_FIXED} {0};set_instance_parameter_value {sdram_s1_burst_adapter} {OUT_COMPLETE_WRAP} {0};set_instance_parameter_value {sdram_s1_burst_adapter} {ST_DATA_W} {86};set_instance_parameter_value {sdram_s1_burst_adapter} {ST_CHANNEL_W} {2};set_instance_parameter_value {sdram_s1_burst_adapter} {OUT_BYTE_CNT_H} {57};set_instance_parameter_value {sdram_s1_burst_adapter} {OUT_BURSTWRAP_H} {61};set_instance_parameter_value {sdram_s1_burst_adapter} {MERLIN_PACKET_FORMAT} {ori_burst_size(85:83) response_status(82:81) cache(80:77) protection(76:74) thread_id(73) dest_id(72) src_id(71) qos(70) begin_burst(69) data_sideband(68) addr_sideband(67) burst_type(66:65) burst_size(64:62) burstwrap(61) byte_cnt(60:56) trans_exclusive(55) trans_lock(54) trans_read(53) trans_write(52) trans_posted(51) trans_compressed_read(50) addr(49:18) byteen(17:16) data(15:0)};set_instance_parameter_value {sdram_s1_burst_adapter} {COMPRESSED_READ_SUPPORT} {1};set_instance_parameter_value {sdram_s1_burst_adapter} {BYTEENABLE_SYNTHESIS} {1};set_instance_parameter_value {sdram_s1_burst_adapter} {PIPE_INPUTS} {0};set_instance_parameter_value {sdram_s1_burst_adapter} {NO_WRAP_SUPPORT} {0};set_instance_parameter_value {sdram_s1_burst_adapter} {INCOMPLETE_WRAP_SUPPORT} {0};set_instance_parameter_value {sdram_s1_burst_adapter} {BURSTWRAP_CONST_MASK} {1};set_instance_parameter_value {sdram_s1_burst_adapter} {BURSTWRAP_CONST_VALUE} {1};set_instance_parameter_value {sdram_s1_burst_adapter} {ADAPTER_VERSION} {13.1};add_instance {cmd_demux} {altera_merlin_demultiplexer};set_instance_parameter_value {cmd_demux} {ST_DATA_W} {104};set_instance_parameter_value {cmd_demux} {ST_CHANNEL_W} {2};set_instance_parameter_value {cmd_demux} {NUM_OUTPUTS} {1};set_instance_parameter_value {cmd_demux} {VALID_WIDTH} {1};set_instance_parameter_value {cmd_demux} {MERLIN_PACKET_FORMAT} {ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};add_instance {cmd_demux_001} {altera_merlin_demultiplexer};set_instance_parameter_value {cmd_demux_001} {ST_DATA_W} {104};set_instance_parameter_value {cmd_demux_001} {ST_CHANNEL_W} {2};set_instance_parameter_value {cmd_demux_001} {NUM_OUTPUTS} {1};set_instance_parameter_value {cmd_demux_001} {VALID_WIDTH} {1};set_instance_parameter_value {cmd_demux_001} {MERLIN_PACKET_FORMAT} {ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};add_instance {cmd_mux} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux} {ST_DATA_W} {104};set_instance_parameter_value {cmd_mux} {ST_CHANNEL_W} {2};set_instance_parameter_value {cmd_mux} {NUM_INPUTS} {2};set_instance_parameter_value {cmd_mux} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux} {PKT_TRANS_LOCK} {72};set_instance_parameter_value {cmd_mux} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux} {ARBITRATION_SHARES} {50 30 };set_instance_parameter_value {cmd_mux} {MERLIN_PACKET_FORMAT} {ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};add_instance {rsp_demux} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux} {ST_DATA_W} {104};set_instance_parameter_value {rsp_demux} {ST_CHANNEL_W} {2};set_instance_parameter_value {rsp_demux} {NUM_OUTPUTS} {2};set_instance_parameter_value {rsp_demux} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux} {MERLIN_PACKET_FORMAT} {ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};add_instance {rsp_mux} {altera_merlin_multiplexer};set_instance_parameter_value {rsp_mux} {ST_DATA_W} {104};set_instance_parameter_value {rsp_mux} {ST_CHANNEL_W} {2};set_instance_parameter_value {rsp_mux} {NUM_INPUTS} {1};set_instance_parameter_value {rsp_mux} {PIPELINE_ARB} {0};set_instance_parameter_value {rsp_mux} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {rsp_mux} {PKT_TRANS_LOCK} {72};set_instance_parameter_value {rsp_mux} {ARBITRATION_SCHEME} {no-arb};set_instance_parameter_value {rsp_mux} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {rsp_mux} {MERLIN_PACKET_FORMAT} {ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};add_instance {rsp_mux_001} {altera_merlin_multiplexer};set_instance_parameter_value {rsp_mux_001} {ST_DATA_W} {104};set_instance_parameter_value {rsp_mux_001} {ST_CHANNEL_W} {2};set_instance_parameter_value {rsp_mux_001} {NUM_INPUTS} {1};set_instance_parameter_value {rsp_mux_001} {PIPELINE_ARB} {0};set_instance_parameter_value {rsp_mux_001} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {rsp_mux_001} {PKT_TRANS_LOCK} {72};set_instance_parameter_value {rsp_mux_001} {ARBITRATION_SCHEME} {no-arb};set_instance_parameter_value {rsp_mux_001} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {rsp_mux_001} {MERLIN_PACKET_FORMAT} {ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};add_instance {sdram_s1_rsp_width_adapter} {altera_merlin_width_adapter};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_ADDR_H} {49};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_ADDR_L} {18};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_DATA_H} {15};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_DATA_L} {0};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_BYTEEN_H} {17};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_BYTEEN_L} {16};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_BYTE_CNT_H} {60};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_BYTE_CNT_L} {56};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_TRANS_COMPRESSED_READ} {50};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_TRANS_WRITE} {52};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_BURSTWRAP_H} {61};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_BURSTWRAP_L} {61};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_BURST_SIZE_H} {64};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_BURST_SIZE_L} {62};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_RESPONSE_STATUS_H} {82};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_RESPONSE_STATUS_L} {81};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_TRANS_EXCLUSIVE} {55};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_BURST_TYPE_H} {66};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_BURST_TYPE_L} {65};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_ORI_BURST_SIZE_L} {83};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_ORI_BURST_SIZE_H} {85};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_ST_DATA_W} {86};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_ADDR_H} {67};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_ADDR_L} {36};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_DATA_H} {31};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_DATA_L} {0};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_BYTEEN_H} {35};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_BYTEEN_L} {32};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_BYTE_CNT_H} {78};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_BYTE_CNT_L} {74};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_TRANS_COMPRESSED_READ} {68};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_BURST_SIZE_H} {82};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_BURST_SIZE_L} {80};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_RESPONSE_STATUS_H} {100};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_RESPONSE_STATUS_L} {99};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_TRANS_EXCLUSIVE} {73};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_BURST_TYPE_H} {84};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_BURST_TYPE_L} {83};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_ORI_BURST_SIZE_L} {101};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_ORI_BURST_SIZE_H} {103};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_ST_DATA_W} {104};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {ST_CHANNEL_W} {2};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OPTIMIZE_FOR_RSP} {0};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {RESPONSE_PATH} {1};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {CONSTANT_BURST_SIZE} {1};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {PACKING} {1};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_MERLIN_PACKET_FORMAT} {ori_burst_size(85:83) response_status(82:81) cache(80:77) protection(76:74) thread_id(73) dest_id(72) src_id(71) qos(70) begin_burst(69) data_sideband(68) addr_sideband(67) burst_type(66:65) burst_size(64:62) burstwrap(61) byte_cnt(60:56) trans_exclusive(55) trans_lock(54) trans_read(53) trans_write(52) trans_posted(51) trans_compressed_read(50) addr(49:18) byteen(17:16) data(15:0)};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_MERLIN_PACKET_FORMAT} {ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {COMMAND_SIZE_W} {3};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {ENABLE_ADDRESS_ALIGNMENT} {0};add_instance {sdram_s1_cmd_width_adapter} {altera_merlin_width_adapter};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_ADDR_H} {67};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_ADDR_L} {36};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_DATA_H} {31};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_DATA_L} {0};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_BYTEEN_H} {35};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_BYTEEN_L} {32};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_BYTE_CNT_H} {78};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_BYTE_CNT_L} {74};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_TRANS_COMPRESSED_READ} {68};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_TRANS_WRITE} {70};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_BURSTWRAP_H} {79};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_BURSTWRAP_L} {79};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_BURST_SIZE_H} {82};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_BURST_SIZE_L} {80};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_RESPONSE_STATUS_H} {100};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_RESPONSE_STATUS_L} {99};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_TRANS_EXCLUSIVE} {73};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_BURST_TYPE_H} {84};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_BURST_TYPE_L} {83};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_ORI_BURST_SIZE_L} {101};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_ORI_BURST_SIZE_H} {103};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_ST_DATA_W} {104};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_ADDR_H} {49};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_ADDR_L} {18};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_DATA_H} {15};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_DATA_L} {0};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_BYTEEN_H} {17};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_BYTEEN_L} {16};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_BYTE_CNT_H} {60};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_BYTE_CNT_L} {56};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_TRANS_COMPRESSED_READ} {50};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_BURST_SIZE_H} {64};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_BURST_SIZE_L} {62};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_RESPONSE_STATUS_H} {82};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_RESPONSE_STATUS_L} {81};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_TRANS_EXCLUSIVE} {55};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_BURST_TYPE_H} {66};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_BURST_TYPE_L} {65};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_ORI_BURST_SIZE_L} {83};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_ORI_BURST_SIZE_H} {85};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_ST_DATA_W} {86};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {ST_CHANNEL_W} {2};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OPTIMIZE_FOR_RSP} {0};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {RESPONSE_PATH} {0};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {CONSTANT_BURST_SIZE} {1};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {PACKING} {1};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_MERLIN_PACKET_FORMAT} {ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_MERLIN_PACKET_FORMAT} {ori_burst_size(85:83) response_status(82:81) cache(80:77) protection(76:74) thread_id(73) dest_id(72) src_id(71) qos(70) begin_burst(69) data_sideband(68) addr_sideband(67) burst_type(66:65) burst_size(64:62) burstwrap(61) byte_cnt(60:56) trans_exclusive(55) trans_lock(54) trans_read(53) trans_write(52) trans_posted(51) trans_compressed_read(50) addr(49:18) byteen(17:16) data(15:0)};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {COMMAND_SIZE_W} {3};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {ENABLE_ADDRESS_ALIGNMENT} {0};add_instance {alt_vip_vfb_0_reset_reset_bridge} {altera_reset_bridge};set_instance_parameter_value {alt_vip_vfb_0_reset_reset_bridge} {ACTIVE_LOW_RESET} {0};set_instance_parameter_value {alt_vip_vfb_0_reset_reset_bridge} {SYNCHRONOUS_EDGES} {deassert};set_instance_parameter_value {alt_vip_vfb_0_reset_reset_bridge} {NUM_RESET_OUTPUTS} {1};set_instance_parameter_value {alt_vip_vfb_0_reset_reset_bridge} {USE_RESET_REQUEST} {0};add_instance {altpll_0_c2_clock_bridge} {altera_clock_bridge};set_instance_parameter_value {altpll_0_c2_clock_bridge} {EXPLICIT_CLOCK_RATE} {100000000};set_instance_parameter_value {altpll_0_c2_clock_bridge} {NUM_CLOCK_OUTPUTS} {1};add_connection {alt_vip_vfb_0_read_master_translator.avalon_universal_master_0} {alt_vip_vfb_0_read_master_agent.av} {avalon};set_connection_parameter_value {alt_vip_vfb_0_read_master_translator.avalon_universal_master_0/alt_vip_vfb_0_read_master_agent.av} {arbitrationPriority} {1};set_connection_parameter_value {alt_vip_vfb_0_read_master_translator.avalon_universal_master_0/alt_vip_vfb_0_read_master_agent.av} {baseAddress} {0x0000};set_connection_parameter_value {alt_vip_vfb_0_read_master_translator.avalon_universal_master_0/alt_vip_vfb_0_read_master_agent.av} {defaultConnection} {false};add_connection {rsp_mux.src} {alt_vip_vfb_0_read_master_agent.rp} {avalon_streaming};preview_set_connection_tag {rsp_mux.src/alt_vip_vfb_0_read_master_agent.rp} {qsys_mm.response};add_connection {alt_vip_vfb_0_write_master_translator.avalon_universal_master_0} {alt_vip_vfb_0_write_master_agent.av} {avalon};set_connection_parameter_value {alt_vip_vfb_0_write_master_translator.avalon_universal_master_0/alt_vip_vfb_0_write_master_agent.av} {arbitrationPriority} {1};set_connection_parameter_value {alt_vip_vfb_0_write_master_translator.avalon_universal_master_0/alt_vip_vfb_0_write_master_agent.av} {baseAddress} {0x0000};set_connection_parameter_value {alt_vip_vfb_0_write_master_translator.avalon_universal_master_0/alt_vip_vfb_0_write_master_agent.av} {defaultConnection} {false};add_connection {rsp_mux_001.src} {alt_vip_vfb_0_write_master_agent.rp} {avalon_streaming};preview_set_connection_tag {rsp_mux_001.src/alt_vip_vfb_0_write_master_agent.rp} {qsys_mm.response};add_connection {sdram_s1_agent.m0} {sdram_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {sdram_s1_agent.m0/sdram_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {sdram_s1_agent.m0/sdram_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {sdram_s1_agent.m0/sdram_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {sdram_s1_agent.rf_source} {sdram_s1_agent_rsp_fifo.in} {avalon_streaming};add_connection {sdram_s1_agent_rsp_fifo.out} {sdram_s1_agent.rf_sink} {avalon_streaming};add_connection {sdram_s1_agent.rdata_fifo_src} {sdram_s1_agent_rdata_fifo.in} {avalon_streaming};add_connection {sdram_s1_agent_rdata_fifo.out} {sdram_s1_agent.rdata_fifo_sink} {avalon_streaming};add_connection {alt_vip_vfb_0_read_master_agent.cp} {router.sink} {avalon_streaming};preview_set_connection_tag {alt_vip_vfb_0_read_master_agent.cp/router.sink} {qsys_mm.command};add_connection {router.src} {cmd_demux.sink} {avalon_streaming};preview_set_connection_tag {router.src/cmd_demux.sink} {qsys_mm.command};add_connection {alt_vip_vfb_0_write_master_agent.cp} {router_001.sink} {avalon_streaming};preview_set_connection_tag {alt_vip_vfb_0_write_master_agent.cp/router_001.sink} {qsys_mm.command};add_connection {router_001.src} {cmd_demux_001.sink} {avalon_streaming};preview_set_connection_tag {router_001.src/cmd_demux_001.sink} {qsys_mm.command};add_connection {sdram_s1_agent.rp} {router_002.sink} {avalon_streaming};preview_set_connection_tag {sdram_s1_agent.rp/router_002.sink} {qsys_mm.response};add_connection {sdram_s1_burst_adapter.source0} {sdram_s1_agent.cp} {avalon_streaming};preview_set_connection_tag {sdram_s1_burst_adapter.source0/sdram_s1_agent.cp} {qsys_mm.command};add_connection {cmd_demux.src0} {cmd_mux.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src0/cmd_mux.sink0} {qsys_mm.command};add_connection {cmd_demux_001.src0} {cmd_mux.sink1} {avalon_streaming};preview_set_connection_tag {cmd_demux_001.src0/cmd_mux.sink1} {qsys_mm.command};add_connection {rsp_demux.src0} {rsp_mux.sink0} {avalon_streaming};preview_set_connection_tag {rsp_demux.src0/rsp_mux.sink0} {qsys_mm.response};add_connection {rsp_demux.src1} {rsp_mux_001.sink0} {avalon_streaming};preview_set_connection_tag {rsp_demux.src1/rsp_mux_001.sink0} {qsys_mm.response};add_connection {router_002.src} {sdram_s1_rsp_width_adapter.sink} {avalon_streaming};preview_set_connection_tag {router_002.src/sdram_s1_rsp_width_adapter.sink} {qsys_mm.response};add_connection {sdram_s1_rsp_width_adapter.src} {rsp_demux.sink} {avalon_streaming};preview_set_connection_tag {sdram_s1_rsp_width_adapter.src/rsp_demux.sink} {qsys_mm.response};add_connection {cmd_mux.src} {sdram_s1_cmd_width_adapter.sink} {avalon_streaming};preview_set_connection_tag {cmd_mux.src/sdram_s1_cmd_width_adapter.sink} {qsys_mm.command};add_connection {sdram_s1_cmd_width_adapter.src} {sdram_s1_burst_adapter.sink0} {avalon_streaming};preview_set_connection_tag {sdram_s1_cmd_width_adapter.src/sdram_s1_burst_adapter.sink0} {qsys_mm.command};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {alt_vip_vfb_0_read_master_translator.reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {alt_vip_vfb_0_write_master_translator.reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {sdram_s1_translator.reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {alt_vip_vfb_0_read_master_agent.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {alt_vip_vfb_0_write_master_agent.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {sdram_s1_agent.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {sdram_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {sdram_s1_agent_rdata_fifo.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {router.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {router_001.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {router_002.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {sdram_s1_burst_adapter.cr0_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {cmd_demux.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {cmd_demux_001.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {cmd_mux.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {rsp_demux.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {rsp_mux.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {rsp_mux_001.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {sdram_s1_rsp_width_adapter.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {sdram_s1_cmd_width_adapter.clk_reset} {reset};add_connection {altpll_0_c2_clock_bridge.out_clk} {alt_vip_vfb_0_read_master_translator.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {alt_vip_vfb_0_write_master_translator.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {sdram_s1_translator.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {alt_vip_vfb_0_read_master_agent.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {alt_vip_vfb_0_write_master_agent.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {sdram_s1_agent.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {sdram_s1_agent_rsp_fifo.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {sdram_s1_agent_rdata_fifo.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {router.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {router_001.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {router_002.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {sdram_s1_burst_adapter.cr0} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {cmd_demux.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {rsp_mux.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {cmd_demux_001.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {rsp_mux_001.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {cmd_mux.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {rsp_demux.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {sdram_s1_rsp_width_adapter.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {sdram_s1_cmd_width_adapter.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {alt_vip_vfb_0_reset_reset_bridge.clk} {clock};add_interface {altpll_0_c2} {clock} {slave};set_interface_property {altpll_0_c2} {EXPORT_OF} {altpll_0_c2_clock_bridge.in_clk};add_interface {alt_vip_vfb_0_reset_reset_bridge_in_reset} {reset} {slave};set_interface_property {alt_vip_vfb_0_reset_reset_bridge_in_reset} {EXPORT_OF} {alt_vip_vfb_0_reset_reset_bridge.in_reset};add_interface {alt_vip_vfb_0_read_master} {avalon} {slave};set_interface_property {alt_vip_vfb_0_read_master} {EXPORT_OF} {alt_vip_vfb_0_read_master_translator.avalon_anti_master_0};add_interface {alt_vip_vfb_0_write_master} {avalon} {slave};set_interface_property {alt_vip_vfb_0_write_master} {EXPORT_OF} {alt_vip_vfb_0_write_master_translator.avalon_anti_master_0};add_interface {sdram_s1} {avalon} {master};set_interface_property {sdram_s1} {EXPORT_OF} {sdram_s1_translator.avalon_anti_slave_0};set_module_assignment {interconnect_id.alt_vip_vfb_0.read_master} {0};set_module_assignment {interconnect_id.alt_vip_vfb_0.write_master} {1};set_module_assignment {interconnect_id.sdram.s1} {0};" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_1.v"
|
|
type="VERILOG" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_master_translator.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_slave_translator.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_master_agent.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_slave_agent.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_burst_uncompressor.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_sc_fifo.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_1_router.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_1_router_002.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_burst_adapter.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_burst_adapter_uncmpr.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_burst_adapter_13_1.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_burst_adapter_new.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_incr_burst_converter.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_wrap_burst_converter.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_default_burst_converter.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_address_alignment.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_pipeline_stage.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_pipeline_base.v"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_1_cmd_demux.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_1_cmd_mux.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_1_rsp_demux.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_1_rsp_mux.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_width_adapter.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_address_alignment.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_burst_uncompressor.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_1_avalon_st_adapter.v"
|
|
type="VERILOG" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_1_avalon_st_adapter_error_adapter_0.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
</childGeneratedFiles>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_mm_interconnect/altera_mm_interconnect_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_master_translator/altera_merlin_master_translator_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_slave_translator/altera_merlin_slave_translator_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_master_agent/altera_merlin_master_agent_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_slave_agent/altera_merlin_slave_agent_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo.v" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_burst_adapter/altera_merlin_burst_adapter_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_width_adapter/altera_merlin_width_adapter_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_adapter/altera_avalon_st_adapter_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_error_adapter/avalon-st_error_adapter_hw.tcl" />
|
|
</childSourceFiles>
|
|
<instantiator instantiator="Qsys" as="mm_interconnect_1" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 334 starting:altera_mm_interconnect "submodules/Qsys_mm_interconnect_1"</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Debug">Transform: CustomInstructionTransform</message>
|
|
<message level="Debug">No custom instruction connections, skipping transform </message>
|
|
<message level="Debug" culprit="merlin_custom_instruction_transform"><![CDATA[After transform: <b>22</b> modules, <b>64</b> connections]]></message>
|
|
<message level="Debug">Transform: MMTransform</message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>22</b> modules, <b>64</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>22</b> modules, <b>64</b> connections]]></message>
|
|
<message level="Debug">Transform: InitialInterconnectTransform</message>
|
|
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>0</b> modules, <b>0</b> connections]]></message>
|
|
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
|
|
<message level="Debug">Transform: DefaultSlaveTransform</message>
|
|
<message level="Debug">Transform: TranslatorTransform</message>
|
|
<message level="Debug">No Avalon connections, skipping transform </message>
|
|
<message level="Debug">Transform: IDPadTransform</message>
|
|
<message level="Debug">Transform: DomainTransform</message>
|
|
<message level="Debug">Transform: RouterTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterTransform</message>
|
|
<message level="Debug">Transform: BurstTransform</message>
|
|
<message level="Debug">Transform: TreeTransform</message>
|
|
<message level="Debug">Transform: NetworkToSwitchTransform</message>
|
|
<message level="Debug">Transform: WidthTransform</message>
|
|
<message level="Debug">Transform: RouterTableTransform</message>
|
|
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
|
|
<message level="Debug">Transform: ClockCrossingTransform</message>
|
|
<message level="Debug">Transform: PipelineTransform</message>
|
|
<message level="Debug">Transform: SpotPipelineTransform</message>
|
|
<message level="Debug">Transform: PerformanceMonitorTransform</message>
|
|
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
|
|
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
|
|
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
|
|
<message level="Debug">Transform: HierarchyTransform</message>
|
|
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>22</b> modules, <b>64</b> connections]]></message>
|
|
<message level="Debug">Transform: InterruptMapperTransform</message>
|
|
<message level="Debug">Transform: InterruptSyncTransform</message>
|
|
<message level="Debug">Transform: InterruptFanoutTransform</message>
|
|
<message level="Debug">Transform: AvalonStreamingTransform</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Info" culprit="avalon_st_adapter">Inserting error_adapter: error_adapter_0</message>
|
|
<message level="Debug" culprit="avalon_st_adapter.clk_bridge_0">Timing: ELA:1/0.000s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter.rst_bridge_0">Timing: ELA:2/0.000s/0.001s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter.error_adapter_0">Timing: ELA:1/0.007s</message>
|
|
<message level="Debug" culprit="avalon_st_adapter">Timing: COM:3/0.013s/0.015s</message>
|
|
<message
|
|
level="Debug"
|
|
culprit="com_altera_sopcmodel_transforms_avalonst_AvalonStreamingTransform"><![CDATA[After transform: <b>23</b> modules, <b>67</b> connections]]></message>
|
|
<message level="Debug">Transform: ResetAdaptation</message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_merlin_master_translator</b> "<b>submodules/altera_merlin_master_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_merlin_master_translator</b> "<b>submodules/altera_merlin_master_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_merlin_slave_translator</b> "<b>submodules/altera_merlin_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_merlin_master_agent</b> "<b>submodules/altera_merlin_master_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_merlin_master_agent</b> "<b>submodules/altera_merlin_master_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_merlin_slave_agent</b> "<b>submodules/altera_merlin_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_avalon_sc_fifo</b> "<b>submodules/altera_avalon_sc_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_1_router</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_1_router</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_merlin_router</b> "<b>submodules/Qsys_mm_interconnect_1_router_002</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_merlin_burst_adapter</b> "<b>submodules/altera_merlin_burst_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_1_cmd_demux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_1_cmd_demux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_1_cmd_mux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_merlin_demultiplexer</b> "<b>submodules/Qsys_mm_interconnect_1_rsp_demux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_1_rsp_mux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_merlin_multiplexer</b> "<b>submodules/Qsys_mm_interconnect_1_rsp_mux</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_merlin_width_adapter</b> "<b>submodules/altera_merlin_width_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_merlin_width_adapter</b> "<b>submodules/altera_merlin_width_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="mm_interconnect_1"><![CDATA["<b>mm_interconnect_1</b>" reuses <b>altera_avalon_st_adapter</b> "<b>submodules/Qsys_mm_interconnect_1_avalon_st_adapter</b>"]]></message>
|
|
<message level="Info" culprit="mm_interconnect_1"><![CDATA["<b>Qsys</b>" instantiated <b>altera_mm_interconnect</b> "<b>mm_interconnect_1</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 150 starting:altera_merlin_master_translator "submodules/altera_merlin_master_translator"</message>
|
|
<message level="Info" culprit="nios2_gen2_data_master_translator"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_master_translator</b> "<b>nios2_gen2_data_master_translator</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 148 starting:altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"</message>
|
|
<message level="Info" culprit="jtag_uart_avalon_jtag_slave_translator"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_slave_translator</b> "<b>jtag_uart_avalon_jtag_slave_translator</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 132 starting:altera_merlin_master_agent "submodules/altera_merlin_master_agent"</message>
|
|
<message level="Info" culprit="nios2_gen2_data_master_agent"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_master_agent</b> "<b>nios2_gen2_data_master_agent</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 130 starting:altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"</message>
|
|
<message level="Info" culprit="jtag_uart_avalon_jtag_slave_agent"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_slave_agent</b> "<b>jtag_uart_avalon_jtag_slave_agent</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 129 starting:altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"</message>
|
|
<message level="Info" culprit="jtag_uart_avalon_jtag_slave_agent_rsp_fifo"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_avalon_sc_fifo</b> "<b>jtag_uart_avalon_jtag_slave_agent_rsp_fifo</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 13 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_1_router"</message>
|
|
<message level="Info" culprit="router"><![CDATA["<b>mm_interconnect_1</b>" instantiated <b>altera_merlin_router</b> "<b>router</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 11 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_1_router_002"</message>
|
|
<message level="Info" culprit="router_002"><![CDATA["<b>mm_interconnect_1</b>" instantiated <b>altera_merlin_router</b> "<b>router_002</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 10 starting:altera_merlin_burst_adapter "submodules/altera_merlin_burst_adapter"</message>
|
|
<message level="Info" culprit="sdram_s1_burst_adapter"><![CDATA["<b>mm_interconnect_1</b>" instantiated <b>altera_merlin_burst_adapter</b> "<b>sdram_s1_burst_adapter</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_pipeline_base.v</b>]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 9 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_1_cmd_demux"</message>
|
|
<message level="Info" culprit="cmd_demux"><![CDATA["<b>mm_interconnect_1</b>" instantiated <b>altera_merlin_demultiplexer</b> "<b>cmd_demux</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 7 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_1_cmd_mux"</message>
|
|
<message level="Info" culprit="cmd_mux"><![CDATA["<b>mm_interconnect_1</b>" instantiated <b>altera_merlin_multiplexer</b> "<b>cmd_mux</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv</b>]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 6 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_1_rsp_demux"</message>
|
|
<message level="Info" culprit="rsp_demux"><![CDATA["<b>mm_interconnect_1</b>" instantiated <b>altera_merlin_demultiplexer</b> "<b>rsp_demux</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 5 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_1_rsp_mux"</message>
|
|
<message level="Info" culprit="rsp_mux"><![CDATA["<b>mm_interconnect_1</b>" instantiated <b>altera_merlin_multiplexer</b> "<b>rsp_mux</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv</b>]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 3 starting:altera_merlin_width_adapter "submodules/altera_merlin_width_adapter"</message>
|
|
<message level="Info" culprit="sdram_s1_rsp_width_adapter"><![CDATA["<b>mm_interconnect_1</b>" instantiated <b>altera_merlin_width_adapter</b> "<b>sdram_s1_rsp_width_adapter</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_address_alignment.sv</b>]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_burst_uncompressor.sv</b>]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 1 starting:altera_avalon_st_adapter "submodules/Qsys_mm_interconnect_1_avalon_st_adapter"</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Debug">Transform: CustomInstructionTransform</message>
|
|
<message level="Debug">No custom instruction connections, skipping transform </message>
|
|
<message level="Debug" culprit="merlin_custom_instruction_transform"><![CDATA[After transform: <b>3</b> modules, <b>3</b> connections]]></message>
|
|
<message level="Debug">Transform: MMTransform</message>
|
|
<message level="Debug">Transform: InterruptMapperTransform</message>
|
|
<message level="Debug">Transform: InterruptSyncTransform</message>
|
|
<message level="Debug">Transform: InterruptFanoutTransform</message>
|
|
<message level="Debug">Transform: AvalonStreamingTransform</message>
|
|
<message level="Debug">Transform: ResetAdaptation</message>
|
|
<message level="Debug" culprit="avalon_st_adapter"><![CDATA["<b>avalon_st_adapter</b>" reuses <b>error_adapter</b> "<b>submodules/Qsys_mm_interconnect_1_avalon_st_adapter_error_adapter_0</b>"]]></message>
|
|
<message level="Info" culprit="avalon_st_adapter"><![CDATA["<b>mm_interconnect_1</b>" instantiated <b>altera_avalon_st_adapter</b> "<b>avalon_st_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 0 starting:error_adapter "submodules/Qsys_mm_interconnect_1_avalon_st_adapter_error_adapter_0"</message>
|
|
<message level="Info" culprit="error_adapter_0"><![CDATA["<b>avalon_st_adapter</b>" instantiated <b>error_adapter</b> "<b>error_adapter_0</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_irq_mapper:16.1:AUTO_DEVICE_FAMILY=MAX 10,IRQ_MAP=0:0,1:1,2:2,3:3,4:4,NUM_RCVRS=5,SENDER_IRQ_WIDTH=32"
|
|
instancePathKey="Qsys:.:irq_mapper"
|
|
kind="altera_irq_mapper"
|
|
version="16.1"
|
|
name="Qsys_irq_mapper">
|
|
<parameter name="NUM_RCVRS" value="5" />
|
|
<parameter name="IRQ_MAP" value="0:0,1:1,2:2,3:3,4:4" />
|
|
<parameter name="AUTO_DEVICE_FAMILY" value="MAX 10" />
|
|
<parameter name="SENDER_IRQ_WIDTH" value="32" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_irq_mapper.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_irq_mapper/altera_irq_mapper_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys" as="irq_mapper" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 354 starting:altera_irq_mapper "submodules/Qsys_irq_mapper"</message>
|
|
<message level="Info" culprit="irq_mapper"><![CDATA["<b>Qsys</b>" instantiated <b>altera_irq_mapper</b> "<b>irq_mapper</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_reset_controller:16.1:ADAPT_RESET_REQUEST=0,MIN_RST_ASSERTION_TIME=3,NUM_RESET_INPUTS=2,OUTPUT_RESET_SYNC_EDGES=deassert,RESET_REQUEST_PRESENT=0,RESET_REQ_EARLY_DSRT_TIME=1,RESET_REQ_WAIT_TIME=1,SYNC_DEPTH=2,USE_RESET_REQUEST_IN0=0,USE_RESET_REQUEST_IN1=0,USE_RESET_REQUEST_IN10=0,USE_RESET_REQUEST_IN11=0,USE_RESET_REQUEST_IN12=0,USE_RESET_REQUEST_IN13=0,USE_RESET_REQUEST_IN14=0,USE_RESET_REQUEST_IN15=0,USE_RESET_REQUEST_IN2=0,USE_RESET_REQUEST_IN3=0,USE_RESET_REQUEST_IN4=0,USE_RESET_REQUEST_IN5=0,USE_RESET_REQUEST_IN6=0,USE_RESET_REQUEST_IN7=0,USE_RESET_REQUEST_IN8=0,USE_RESET_REQUEST_IN9=0,USE_RESET_REQUEST_INPUT=0"
|
|
instancePathKey="Qsys:.:rst_controller"
|
|
kind="altera_reset_controller"
|
|
version="16.1"
|
|
name="altera_reset_controller">
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_reset_controller.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_reset_synchronizer.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_reset_controller.sdc"
|
|
type="SDC"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_reset_controller/altera_reset_controller_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator
|
|
instantiator="Qsys"
|
|
as="rst_controller,rst_controller_001,rst_controller_002" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 353 starting:altera_reset_controller "submodules/altera_reset_controller"</message>
|
|
<message level="Info" culprit="rst_controller"><![CDATA["<b>Qsys</b>" instantiated <b>altera_reset_controller</b> "<b>rst_controller</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="alt_cusp_muxbin2:13.1:PORTS=2,WIDTH=32"
|
|
instancePathKey="Qsys:.:alt_vip_vfb_0:.:vfb_writer_packet_write_address_au_l_muxinst"
|
|
kind="alt_cusp_muxbin2"
|
|
version="13.1"
|
|
name="alt_cusp161_muxbin2">
|
|
<parameter name="WIDTH" value="32" />
|
|
<parameter name="PORTS" value="2" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_muxbin2.vhd"
|
|
type="VHDL" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles/>
|
|
<childSourceFiles/>
|
|
<instantiator
|
|
instantiator="Qsys_alt_vip_vfb_0"
|
|
as="vfb_writer_packet_write_address_au_l_muxinst,vfb_writer_packet_write_address_au_sload_muxinst,vfb_writer_first_packet_id_au_enable_muxinst,vfb_writer_first_packet_id_au_sload_muxinst,vfb_writer_next_to_last_packet_id_au_enable_muxinst,vfb_writer_overflow_trigger_au_sload_muxinst,vfb_writer_overflow_flag_reg_enable_muxinst,vfb_writer_word_counter_trigger_au_sload_muxinst,vfb_writer_field_interlace_reg_d_muxinst,vfb_writer_field_interlace_reg_enable_muxinst,vfb_writer_write_address_au_l_muxinst,vfb_reader_current_packet_id_au_l_muxinst,read_master_renable_trigger_muxinst,read_master_addr_muxinst,read_master_len_be_muxinst,write_master_len_be_muxinst,write_master_push_input_muxinst,vfb_writer_packets_sample_length_reg_d_muxinst,vfb_writer_packets_sample_length_reg_enable_muxinst,vfb_writer_packets_word_length_reg_d_muxinst,vfb_writer_packets_word_length_reg_enable_muxinst,packetdimensions_reg_d_muxinst,packetdimensions_reg_131_d_muxinst,packetdimensions_reg_1312_d_muxinst,packetdimensions_reg_1313_d_muxinst,output_reg_d_muxinst,output_reg_153_d_muxinst,output_reg_1532_d_muxinst,output_reg_1533_d_muxinst,output_reg_1534_d_muxinst,output_reg_1535_d_muxinst,msg_buffer_reply_id_3148_line162_d_muxinst,msg_buffer_id_3153_line170_d_muxinst,msg_field_width_id_3157_line172_d_muxinst,msg_field_height_id_3161_line174_d_muxinst,msg_field_interlace_id_3165_line176_d_muxinst,msg_samples_in_field_id_3169_line178_d_muxinst,msg_words_in_field_id_3173_line180_d_muxinst,msg_first_packet_id_3177_line222_d_muxinst,msg_next_to_last_packet_id_3181_line223_d_muxinst,vfb_reader_length_cnt_id_3256_line897_a_muxinst,vfb_reader_length_cnt_id_3265_line897_a_muxinst" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 350 starting:alt_cusp_muxbin2 "submodules/alt_cusp161_muxbin2"</message>
|
|
<message level="Info" culprit="vfb_writer_packet_write_address_au_l_muxinst"><![CDATA["<b>alt_vip_vfb_0</b>" instantiated <b>alt_cusp_muxbin2</b> "<b>vfb_writer_packet_write_address_au_l_muxinst</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="alt_au:13.1:FAMILY=11,LATENCY=1,NAME=vfb_writer_packet_write_address_au,OPTIMIZED=1,SIMULATION=0,WIDTH=32"
|
|
instancePathKey="Qsys:.:alt_vip_vfb_0:.:vfb_writer_packet_write_address_au"
|
|
kind="alt_au"
|
|
version="13.1"
|
|
name="alt_cusp161_au">
|
|
<parameter name="WIDTH" value="32" />
|
|
<parameter name="LATENCY" value="1" />
|
|
<parameter name="SIMULATION" value="0" />
|
|
<parameter name="OPTIMIZED" value="1" />
|
|
<parameter name="FAMILY" value="11" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_au.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_addsubcarry.vhd"
|
|
type="VHDL" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles/>
|
|
<childSourceFiles/>
|
|
<instantiator
|
|
instantiator="Qsys_alt_vip_vfb_0"
|
|
as="vfb_writer_packet_write_address_au,vfb_writer_first_packet_id_au,vfb_writer_next_to_last_packet_id_au,vfb_writer_overflow_trigger_au,vfb_writer_length_counter_au,vfb_writer_word_counter_au,vfb_writer_word_counter_trigger_au,vfb_writer_write_address_au,vfb_reader_read_address_au,vfb_reader_packet_read_address_au,vfb_reader_current_packet_id_au,wrap_packet_id_id_3247_line1077,vfb_reader_length_cnt_4_id_3254_line897,vfb_reader_length_cnt_id_3256_line897,vfb_reader_length_cnt_id_3265_line897" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 348 starting:alt_au "submodules/alt_cusp161_au"</message>
|
|
<message level="Info" culprit="vfb_writer_packet_write_address_au"><![CDATA["<b>alt_vip_vfb_0</b>" instantiated <b>alt_au</b> "<b>vfb_writer_packet_write_address_au</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="alt_reg:13.1:FAMILY=11,NAME=vfb_writer_overflow_flag_reg,OPTIMIZED=1,RESET_VALUE=0,WIDTH=1"
|
|
instancePathKey="Qsys:.:alt_vip_vfb_0:.:vfb_writer_overflow_flag_reg"
|
|
kind="alt_reg"
|
|
version="13.1"
|
|
name="alt_cusp161_reg">
|
|
<parameter name="RESET_VALUE" value="0" />
|
|
<parameter name="WIDTH" value="1" />
|
|
<parameter name="OPTIMIZED" value="1" />
|
|
<parameter name="FAMILY" value="11" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_reg.vhd"
|
|
type="VHDL" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles/>
|
|
<childSourceFiles/>
|
|
<instantiator
|
|
instantiator="Qsys_alt_vip_vfb_0"
|
|
as="vfb_writer_overflow_flag_reg,vfb_writer_field_width_reg,vfb_writer_field_height_reg,vfb_writer_field_interlace_reg,vfb_writer_just_read_reg,vfb_writer_packets_sample_length_reg,vfb_writer_packets_word_length_reg,msg_packets_sample_length_reg,msg_packets_word_length_reg,packetdimensions_reg,packetdimensions_reg_131,packetdimensions_reg_1312,packetdimensions_reg_1313,output_reg,output_reg_153,output_reg_1532,output_reg_1533,output_reg_1534,output_reg_1535,output_reg_1536,output_reg_1537,output_reg_1538,msg_buffer_reply_id_3148_line162,msg_buffer_id_3153_line170,msg_field_width_id_3157_line172,msg_field_height_id_3161_line174,msg_field_interlace_id_3165_line176,msg_samples_in_field_id_3169_line178,msg_words_in_field_id_3173_line180,msg_first_packet_id_3177_line222,msg_next_to_last_packet_id_3181_line223,vfb_writer_buffer_id_3185_line228,write_to_read_buf_id_3188_line153,write_to_read_ack_id_3191_line164,vfb_writer_packet_base_address_0_id_3194_line204,isnotimagedata_0_id_3196_line144,iscontrolpacket_0_id_3198_line202,no_last_burst_0_id_3200_line301,no_last_burst_0_id_3204_line585,cond588_0_id_3206,drop_0_id_3208_line345,loop_repeat_0_id_3210_line367,burst_trigger_0_id_3212_line563,cond568_0_id_3214,cond290_0_id_3218,vfb_reader_buffer_id_3220_line865,read_to_write_ack_id_3223_line156,read_to_write_buf_id_3226_line160,vfb_reader_field_width_0_id_3229_line773,vfb_reader_samples_in_field_0_id_3231_line889,vfb_reader_field_height_0_id_3233_line775,vfb_reader_words_in_field_0_id_3235_line891,vfb_reader_field_interlace_0_id_3237_line777,vfb_reader_next_to_last_packet_id_0_id_3239_line876,reader_packets_sample_length_0_id_3241_line878,reader_packets_word_length_0_id_3243_line880,vfb_reader_packet_base_address_0_id_3245_line873,vfb_reader_length_cnt_3_id_3250_line897,vfb_reader_word_cnt_0_id_3252_line898,repeat_0_id_3259_line1140,loop_repeat_0_id_3261_line1148,cond1203_0_id_3263,cond1113_0_id_3268,ispreviousendpacket_0_comb_id_7828,justreadqueue_1_1_comb_id_7831,justreadqueue_2_1_comb_id_7834,justreadqueue_1_2_comb_id_7837,ispreviousendpacket_1_comb_id_7840,justreadaccesswire_3_comb_id_7843,justreadaccesswire_4_comb_id_7846,justreadqueue_1_4_comb_id_7849,justreadqueue_2_2_comb_id_7852,justreadqueue_1_5_comb_id_7855,ispreviousendpacket_2_comb_id_7858,justreadaccesswire_6_comb_id_7861,justreadaccesswire_7_comb_id_7864,justreadqueue_1_7_comb_id_7867,justreadqueue_2_3_comb_id_7870,justreadqueue_1_8_comb_id_7873,word_counter_trigger_flag_0_comb_id_7876,op_2226_comb_id_7879,op_2226_comb_0_id_7882,op_4405_comb_id_7885,op_4407_comb_id_7888,op_3252_comb_id_7894,op_3252_comb_0_id_7897,op_4420_comb_id_7900,op_4421_comb_id_7903,cond1113_0_stage_1_id_7906,cond1113_0_stage_2_id_7909,cond1113_0_stage_3_id_7912,empty_image_0_comb_id_7915,cond1203_0_stage_1_id_7918,cond1203_0_stage_2_id_7921,cond1203_0_stage_3_id_7924" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 339 starting:alt_reg "submodules/alt_cusp161_reg"</message>
|
|
<message level="Info" culprit="vfb_writer_overflow_flag_reg"><![CDATA["<b>alt_vip_vfb_0</b>" instantiated <b>alt_reg</b> "<b>vfb_writer_overflow_flag_reg</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd</b>]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="alt_cusp_muxhot16:13.1:PORTS=3,WIDTH=1"
|
|
instancePathKey="Qsys:.:alt_vip_vfb_0:.:vfb_writer_length_counter_au_enable_muxinst"
|
|
kind="alt_cusp_muxhot16"
|
|
version="13.1"
|
|
name="alt_cusp161_muxhot16">
|
|
<parameter name="WIDTH" value="1" />
|
|
<parameter name="PORTS" value="3" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_muxhot16.vhd"
|
|
type="VHDL" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles/>
|
|
<childSourceFiles/>
|
|
<instantiator
|
|
instantiator="Qsys_alt_vip_vfb_0"
|
|
as="vfb_writer_length_counter_au_enable_muxinst,vfb_writer_word_counter_au_enable_muxinst,vfb_writer_word_counter_au_enable_trigger_muxinst,vfb_writer_word_counter_trigger_au_enable_muxinst,vfb_writer_write_address_au_enable_trigger_muxinst,vfb_writer_just_read_reg_enable_muxinst,vfb_reader_packet_read_address_au_sload_muxinst,din_takeb_trigger_muxinst,dout_takeb_trigger_muxinst,dout_wdata_muxinst,dout_seteop_trigger_muxinst,dout_eop_muxinst,read_master_pull_pull_trigger_muxinst,write_master_cenable_trigger_muxinst,write_master_push_push_trigger_muxinst,pc0_usenextpc_trigger_muxinst,pc0_hold_trigger_muxinst,pc1_usenextpc_trigger_muxinst,pc1_hold_trigger_muxinst" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 338 starting:alt_cusp_muxhot16 "submodules/alt_cusp161_muxhot16"</message>
|
|
<message level="Info" culprit="vfb_writer_length_counter_au_enable_muxinst"><![CDATA["<b>alt_vip_vfb_0</b>" instantiated <b>alt_cusp_muxhot16</b> "<b>vfb_writer_length_counter_au_enable_muxinst</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="alt_avalon_st_input:13.1:DATATYPE=class sc_dt::sc_uint<24> ,END_PACKET_USED=1,FAMILY=11,NAME=din,OPTIMIZED=1,READY_LATENCY=1,SYM_PER_BEAT=3,WIDTH=24"
|
|
instancePathKey="Qsys:.:alt_vip_vfb_0:.:din"
|
|
kind="alt_avalon_st_input"
|
|
version="13.1"
|
|
name="alt_cusp161_avalon_st_input">
|
|
<parameter name="END_PACKET_USED" value="1" />
|
|
<parameter name="WIDTH" value="24" />
|
|
<parameter name="SYM_PER_BEAT" value="3" />
|
|
<parameter name="OPTIMIZED" value="1" />
|
|
<parameter name="READY_LATENCY" value="1" />
|
|
<parameter name="FAMILY" value="11" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_avalon_st_input.vhd"
|
|
type="VHDL" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles/>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys_alt_vip_vfb_0" as="din" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 314 starting:alt_avalon_st_input "submodules/alt_cusp161_avalon_st_input"</message>
|
|
<message level="Info" culprit="din"><![CDATA["<b>alt_vip_vfb_0</b>" instantiated <b>alt_avalon_st_input</b> "<b>din</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd</b>]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="alt_avalon_st_output:13.1:DATATYPE=class sc_dt::sc_uint<24> ,END_PACKET_USED=1,ISSIGNED=1,NAME=dout,READY_LATENCY=1,READY_USED=1,SYM_PER_BEAT=3,WIDTH=24"
|
|
instancePathKey="Qsys:.:alt_vip_vfb_0:.:dout"
|
|
kind="alt_avalon_st_output"
|
|
version="13.1"
|
|
name="alt_cusp161_avalon_st_output">
|
|
<parameter name="READY_USED" value="1" />
|
|
<parameter name="END_PACKET_USED" value="1" />
|
|
<parameter name="WIDTH" value="24" />
|
|
<parameter name="SYM_PER_BEAT" value="3" />
|
|
<parameter name="READY_LATENCY" value="1" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_avalon_st_output.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_atlantic_reporter.vhd"
|
|
type="VHDL" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles/>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys_alt_vip_vfb_0" as="dout" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 309 starting:alt_avalon_st_output "submodules/alt_cusp161_avalon_st_output"</message>
|
|
<message level="Info" culprit="dout"><![CDATA["<b>alt_vip_vfb_0</b>" instantiated <b>alt_avalon_st_output</b> "<b>dout</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd</b>]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="alt_avalon_mm_bursting_master_fifo:13.1:ADDRESS_GROUP=1,ADDR_WIDTH=32,BURST_WIDTH=3,BYTEENABLE_USED=0,CLOCKS_ARE_SYNC=1,CMD_FIFO_DEPTH=1,DATA_WIDTH=32,FAMILY=11,INTERRUPT_USED=0,INTERRUPT_WIDTH=8,LEN_BE_WIDTH=19,NAME=read_master,OPTIMIZED=1,RDATA_FIFO_DEPTH=1024,RDATA_TARGET_BURST_SIZE=4,READ_USED=1,WDATA_FIFO_DEPTH=8,WDATA_TARGET_BURST_SIZE=0,WRITE_USED=0"
|
|
instancePathKey="Qsys:.:alt_vip_vfb_0:.:read_master"
|
|
kind="alt_avalon_mm_bursting_master_fifo"
|
|
version="13.1"
|
|
name="alt_cusp161_avalon_mm_bursting_master_fifo">
|
|
<parameter name="CMD_FIFO_DEPTH" value="1" />
|
|
<parameter name="INTERRUPT_USED" value="0" />
|
|
<parameter name="RDATA_TARGET_BURST_SIZE" value="4" />
|
|
<parameter name="RDATA_FIFO_DEPTH" value="1024" />
|
|
<parameter name="BYTEENABLE_USED" value="0" />
|
|
<parameter name="ADDRESS_GROUP" value="1" />
|
|
<parameter name="FAMILY" value="11" />
|
|
<parameter name="ADDR_WIDTH" value="32" />
|
|
<parameter name="CLOCKS_ARE_SYNC" value="1" />
|
|
<parameter name="DATA_WIDTH" value="32" />
|
|
<parameter name="WDATA_TARGET_BURST_SIZE" value="0" />
|
|
<parameter name="WDATA_FIFO_DEPTH" value="8" />
|
|
<parameter name="READ_USED" value="1" />
|
|
<parameter name="INTERRUPT_WIDTH" value="8" />
|
|
<parameter name="OPTIMIZED" value="1" />
|
|
<parameter name="WRITE_USED" value="0" />
|
|
<parameter name="BURST_WIDTH" value="3" />
|
|
<parameter name="LEN_BE_WIDTH" value="19" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_avalon_mm_bursting_master_fifo.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_fifo.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_fifo_usedw_calculator.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_general_fifo.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_gray_clock_crosser.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_logic_fifo.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_one_bit_delay.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_ram_fifo.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_std_logic_vector_delay.vhd"
|
|
type="VHDL" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles/>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys_alt_vip_vfb_0" as="read_master,write_master" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 305 starting:alt_avalon_mm_bursting_master_fifo "submodules/alt_cusp161_avalon_mm_bursting_master_fifo"</message>
|
|
<message level="Info" culprit="read_master"><![CDATA["<b>alt_vip_vfb_0</b>" instantiated <b>alt_avalon_mm_bursting_master_fifo</b> "<b>read_master</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd</b>]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="alt_cusp_pulling_width_adapter:13.1:FAMILY=11,IN_WIDTH=32,NAME=read_master_pull,OPTIMIZED=1,OUT_WIDTH=24"
|
|
instancePathKey="Qsys:.:alt_vip_vfb_0:.:read_master_pull"
|
|
kind="alt_cusp_pulling_width_adapter"
|
|
version="13.1"
|
|
name="alt_cusp161_pulling_width_adapter">
|
|
<parameter name="OUT_WIDTH" value="24" />
|
|
<parameter name="IN_WIDTH" value="32" />
|
|
<parameter name="OPTIMIZED" value="1" />
|
|
<parameter name="FAMILY" value="11" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_pulling_width_adapter.vhd"
|
|
type="VHDL" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles/>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys_alt_vip_vfb_0" as="read_master_pull" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 303 starting:alt_cusp_pulling_width_adapter "submodules/alt_cusp161_pulling_width_adapter"</message>
|
|
<message level="Info" culprit="read_master_pull"><![CDATA["<b>alt_vip_vfb_0</b>" instantiated <b>alt_cusp_pulling_width_adapter</b> "<b>read_master_pull</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd</b>]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="alt_cusp_pushing_width_adapter:13.1:FAMILY=11,IN_WIDTH=24,NAME=write_master_push,OPTIMIZED=1,OUT_WIDTH=32"
|
|
instancePathKey="Qsys:.:alt_vip_vfb_0:.:write_master_push"
|
|
kind="alt_cusp_pushing_width_adapter"
|
|
version="13.1"
|
|
name="alt_cusp161_pushing_width_adapter">
|
|
<parameter name="OUT_WIDTH" value="32" />
|
|
<parameter name="IN_WIDTH" value="24" />
|
|
<parameter name="OPTIMIZED" value="1" />
|
|
<parameter name="FAMILY" value="11" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_pushing_width_adapter.vhd"
|
|
type="VHDL" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles/>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys_alt_vip_vfb_0" as="write_master_push" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 297 starting:alt_cusp_pushing_width_adapter "submodules/alt_cusp161_pushing_width_adapter"</message>
|
|
<message level="Info" culprit="write_master_push"><![CDATA["<b>alt_vip_vfb_0</b>" instantiated <b>alt_cusp_pushing_width_adapter</b> "<b>write_master_push</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd</b>]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="alt_pc:13.1:DECODE_LATENCY=2,FAMILY=11,INFER_MEMORY=1,LATENCY=3,NAME=pc0,OPTIMIZED=1,PCW_WIDTH=51,PC_NUM_WORDS=68,PC_WIDTH=7,PROGRAM_FILE=,PROGRAM_TRACE=Qsys_alt_vip_vfb_0_vfb_writer_vfb_writer.trace"
|
|
instancePathKey="Qsys:.:alt_vip_vfb_0:.:pc0"
|
|
kind="alt_pc"
|
|
version="13.1"
|
|
name="alt_cusp161_pc">
|
|
<parameter name="INFER_MEMORY" value="1" />
|
|
<parameter name="PC_WIDTH" value="7" />
|
|
<parameter name="PCW_WIDTH" value="51" />
|
|
<parameter name="PROGRAM_FILE" value="" />
|
|
<parameter name="DECODE_LATENCY" value="2" />
|
|
<parameter name="LATENCY" value="3" />
|
|
<parameter name="PC_NUM_WORDS" value="68" />
|
|
<parameter name="OPTIMIZED" value="1" />
|
|
<parameter
|
|
name="PROGRAM_TRACE"
|
|
value="Qsys_alt_vip_vfb_0_vfb_writer_vfb_writer.trace" />
|
|
<parameter name="FAMILY" value="11" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_pc.vhd"
|
|
type="VHDL" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles/>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys_alt_vip_vfb_0" as="pc0,pc1" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 263 starting:alt_pc "submodules/alt_cusp161_pc"</message>
|
|
<message level="Info" culprit="pc0"><![CDATA["<b>alt_vip_vfb_0</b>" instantiated <b>alt_pc</b> "<b>pc0</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd</b>]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="alt_cmp:13.1:FAMILY=11,NAME=fu_id_4494_line325_93,OPTIMIZED=1,WIDTH=2"
|
|
instancePathKey="Qsys:.:alt_vip_vfb_0:.:fu_id_4494_line325_93"
|
|
kind="alt_cmp"
|
|
version="13.1"
|
|
name="alt_cusp161_cmp">
|
|
<parameter name="WIDTH" value="2" />
|
|
<parameter name="OPTIMIZED" value="1" />
|
|
<parameter name="FAMILY" value="11" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_cmp.vhd"
|
|
type="VHDL" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles/>
|
|
<childSourceFiles/>
|
|
<instantiator
|
|
instantiator="Qsys_alt_vip_vfb_0"
|
|
as="fu_id_4494_line325_93,fu_id_4510_line325_52,fu_id_4526_line201_52,fu_id_4696_line202_58,fu_id_4890_line330_94,fu_id_4899_line331_96,fu_id_4982_line639_55,fu_id_5210_line696_38,fu_id_5669_line510_66,fu_id_5804_line563_105,fu_id_5987_line933_38,fu_id_6225_line1062_114,fu_id_6241_line1063_112,fu_id_6257_line1078_53,fu_id_6266_line1094_53,fu_id_6323_line1188_29,fu_id_6458_line1248_53,fu_id_6704_line1126_52" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 203 starting:alt_cmp "submodules/alt_cusp161_cmp"</message>
|
|
<message level="Info" culprit="fu_id_4494_line325_93"><![CDATA["<b>alt_vip_vfb_0</b>" instantiated <b>alt_cmp</b> "<b>fu_id_4494_line325_93</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd</b>]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="alt_cusp_testbench_clock:13.1:"
|
|
instancePathKey="Qsys:.:dut:.:clocksource"
|
|
kind="alt_cusp_testbench_clock"
|
|
version="13.1"
|
|
name="alt_cusp161_clock_reset">
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd"
|
|
type="VHDL" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_clock_reset.vhd"
|
|
type="VHDL" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles/>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys_alt_vip_vfb_0" as="clocksource" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 153 starting:alt_cusp_testbench_clock "submodules/alt_cusp161_clock_reset"</message>
|
|
<message level="Info" culprit="clocksource"><![CDATA["<b>alt_vip_vfb_0</b>" instantiated <b>alt_cusp_testbench_clock</b> "<b>clocksource</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd</b>]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_nios2_gen2_unit:16.1:bht_ramBlockType=Automatic,breakAbsoluteAddr=264224,breakOffset=32,breakSlave=None,breakSlave_derived=nios2_gen2.debug_mem_slave,cdx_enabled=false,clockFrequency=50000000,cpuArchRev=1,cpuID=0,cpuReset=false,cpu_name=cpu,customInstSlavesSystemInfo=<info/>,dataAddrWidth=19,dataMasterHighPerformanceAddrWidth=1,dataMasterHighPerformanceMapParam=,dataSlaveMapParam=<address-map><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' type='altera_avalon_onchip_memory2.s1' /><slave name='nios2_gen2.debug_mem_slave' start='0x40800' end='0x41000' type='altera_nios2_gen2.debug_mem_slave' /><slave name='timer.s1' start='0x41000' end='0x41020' type='altera_avalon_timer.s1' /><slave name='TERASIC_AUTO_FOCUS_0.mm_ctrl' start='0x41020' end='0x41040' type='TERASIC_AUTO_FOCUS.mm_ctrl' /><slave name='i2c_opencores_camera.avalon_slave_0' start='0x41040' end='0x41060' type='i2c_opencores.avalon_slave_0' /><slave name='i2c_opencores_mipi.avalon_slave_0' start='0x41060' end='0x41080' type='i2c_opencores.avalon_slave_0' /><slave name='mipi_pwdn_n.s1' start='0x41080' end='0x41090' type='altera_avalon_pio.s1' /><slave name='mipi_reset_n.s1' start='0x41090' end='0x410A0' type='altera_avalon_pio.s1' /><slave name='key.s1' start='0x410A0' end='0x410B0' type='altera_avalon_pio.s1' /><slave name='sw.s1' start='0x410B0' end='0x410C0' type='altera_avalon_pio.s1' /><slave name='led.s1' start='0x410C0' end='0x410D0' type='altera_avalon_pio.s1' /><slave name='altpll_0.pll_slave' start='0x410D0' end='0x410E0' type='altpll.pll_slave' /><slave name='sysid_qsys.control_slave' start='0x410E0' end='0x410E8' type='altera_avalon_sysid_qsys.control_slave' /><slave name='jtag_uart.avalon_jtag_slave' start='0x410E8' end='0x410F0' type='altera_avalon_jtag_uart.avalon_jtag_slave' /><slave name='EEE_IMGPROC_0.s1' start='0x42000' end='0x42020' type='EEE_IMGPROC.s1' /><slave name='uart_0.s1' start='0x42020' end='0x42040' type='altera_avalon_uart.s1' /></address-map>,data_master_high_performance_paddr_base=0,data_master_high_performance_paddr_top=0,data_master_paddr_base=0,data_master_paddr_top=0,dcache_bursts=false,dcache_bursts_derived=false,dcache_lineSize_derived=32,dcache_numTCDM=0,dcache_ramBlockType=Automatic,dcache_size=2048,dcache_size_derived=2048,dcache_tagramBlockType=Automatic,dcache_victim_buf_impl=ram,debug_OCIOnchipTrace=_128,debug_assignJtagInstanceID=false,debug_datatrace=false,debug_datatrigger=0,debug_debugReqSignals=false,debug_enabled=true,debug_hwbreakpoint=0,debug_insttrace=false,debug_jtagInstanceID=0,debug_offchiptrace=false,debug_onchiptrace=false,debug_traceStorage=onchip_trace,debug_traceType=none,debug_triggerArming=true,deviceFamilyName=MAX 10,deviceFeaturesSystemInfo=ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 0 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1,dividerType=no_div,exceptionAbsoluteAddr=131104,exceptionOffset=32,exceptionSlave=onchip_memory2_0.s1,faAddrWidth=1,faSlaveMapParam=,fa_cache_line=2,fa_cache_linesize=0,flash_instruction_master_paddr_base=0,flash_instruction_master_paddr_top=0,icache_burstType=None,icache_numTCIM=0,icache_ramBlockType=Automatic,icache_size=4096,icache_tagramBlockType=Automatic,impl=Fast,instAddrWidth=19,instSlaveMapParam=<address-map><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' type='altera_avalon_onchip_memory2.s1' /><slave name='nios2_gen2.debug_mem_slave' start='0x40800' end='0x41000' type='altera_nios2_gen2.debug_mem_slave' /></address-map>,instructionMasterHighPerformanceAddrWidth=1,instructionMasterHighPerformanceMapParam=,instruction_master_high_performance_paddr_base=0,instruction_master_high_performance_paddr_top=0,instruction_master_paddr_base=0,instruction_master_paddr_top=0,internalIrqMaskSystemInfo=31,io_regionbase=0,io_regionsize=0,master_addr_map=false,mmu_TLBMissExcAbsAddr=0,mmu_TLBMissExcOffset=0,mmu_TLBMissExcSlave=None,mmu_autoAssignTlbPtrSz=true,mmu_enabled=false,mmu_processIDNumBits=8,mmu_ramBlockType=Automatic,mmu_tlbNumWays=16,mmu_tlbPtrSz=7,mmu_udtlbNumEntries=6,mmu_uitlbNumEntries=4,mpu_enabled=false,mpu_minDataRegionSize=12,mpu_minInstRegionSize=12,mpu_numOfDataRegion=8,mpu_numOfInstRegion=8,mpu_useLimit=false,mpx_enabled=false,multiplierType=mul_fast32,ocimem_ramBlockType=Automatic,ocimem_ramInit=false,regfile_ramBlockType=Automatic,register_file_por=false,resetAbsoluteAddr=131072,resetOffset=0,resetSlave=onchip_memory2_0.s1,resetrequest_enabled=true,setting_HBreakTest=false,setting_HDLSimCachesCleared=true,setting_activateMonitors=true,setting_activateTestEndChecker=false,setting_activateTrace=false,setting_allow_break_inst=false,setting_alwaysEncrypt=true,setting_asic_add_scan_mode_input=false,setting_asic_enabled=false,setting_asic_synopsys_translate_on_off=false,setting_asic_third_party_synthesis=false,setting_avalonDebugPortPresent=false,setting_bhtPtrSz=8,setting_bigEndian=false,setting_bit31BypassDCache=true,setting_branchPredictionType=Dynamic,setting_breakslaveoveride=false,setting_clearXBitsLDNonBypass=true,setting_dc_ecc_present=true,setting_disableocitrace=false,setting_dtcm_ecc_present=true,setting_ecc_present=false,setting_ecc_sim_test_ports=false,setting_exportPCB=false,setting_export_large_RAMs=false,setting_exportdebuginfo=false,setting_exportvectors=false,setting_fast_register_read=false,setting_ic_ecc_present=true,setting_interruptControllerType=Internal,setting_ioregionBypassDCache=false,setting_itcm_ecc_present=true,setting_mmu_ecc_present=true,setting_oci_export_jtag_signals=false,setting_oci_version=1,setting_preciseIllegalMemAccessException=false,setting_removeRAMinit=false,setting_rf_ecc_present=true,setting_shadowRegisterSets=0,setting_showInternalSettings=false,setting_showUnpublishedSettings=false,setting_support31bitdcachebypass=true,setting_usedesignware=false,shifterType=fast_le_shift,stratix_dspblock_shift_mul=false,tightlyCoupledDataMaster0AddrWidth=1,tightlyCoupledDataMaster0MapParam=,tightlyCoupledDataMaster1AddrWidth=1,tightlyCoupledDataMaster1MapParam=,tightlyCoupledDataMaster2AddrWidth=1,tightlyCoupledDataMaster2MapParam=,tightlyCoupledDataMaster3AddrWidth=1,tightlyCoupledDataMaster3MapParam=,tightlyCoupledInstructionMaster0AddrWidth=1,tightlyCoupledInstructionMaster0MapParam=,tightlyCoupledInstructionMaster1AddrWidth=1,tightlyCoupledInstructionMaster1MapParam=,tightlyCoupledInstructionMaster2AddrWidth=1,tightlyCoupledInstructionMaster2MapParam=,tightlyCoupledInstructionMaster3AddrWidth=1,tightlyCoupledInstructionMaster3MapParam=,tightly_coupled_data_master_0_paddr_base=0,tightly_coupled_data_master_0_paddr_top=0,tightly_coupled_data_master_1_paddr_base=0,tightly_coupled_data_master_1_paddr_top=0,tightly_coupled_data_master_2_paddr_base=0,tightly_coupled_data_master_2_paddr_top=0,tightly_coupled_data_master_3_paddr_base=0,tightly_coupled_data_master_3_paddr_top=0,tightly_coupled_instruction_master_0_paddr_base=0,tightly_coupled_instruction_master_0_paddr_top=0,tightly_coupled_instruction_master_1_paddr_base=0,tightly_coupled_instruction_master_1_paddr_top=0,tightly_coupled_instruction_master_2_paddr_base=0,tightly_coupled_instruction_master_2_paddr_top=0,tightly_coupled_instruction_master_3_paddr_base=0,tightly_coupled_instruction_master_3_paddr_top=0,tmr_enabled=false,tracefilename=,translate_off= "synthesis translate_off" ,translate_on= "synthesis translate_on" ,userDefinedSettings="
|
|
instancePathKey="Qsys:.:nios2_gen2:.:cpu"
|
|
kind="altera_nios2_gen2_unit"
|
|
version="16.1"
|
|
name="Qsys_nios2_gen2_cpu">
|
|
<parameter name="icache_burstType" value="None" />
|
|
<parameter name="setting_oci_version" value="1" />
|
|
<parameter name="mpx_enabled" value="false" />
|
|
<parameter name="ocimem_ramBlockType" value="Automatic" />
|
|
<parameter name="dcache_victim_buf_impl" value="ram" />
|
|
<parameter name="setting_exportPCB" value="false" />
|
|
<parameter name="setting_ic_ecc_present" value="true" />
|
|
<parameter name="dcache_size_derived" value="2048" />
|
|
<parameter name="mmu_udtlbNumEntries" value="6" />
|
|
<parameter name="tightly_coupled_instruction_master_3_paddr_top" value="0" />
|
|
<parameter
|
|
name="deviceFeaturesSystemInfo"
|
|
value="ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 0 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1" />
|
|
<parameter name="bht_ramBlockType" value="Automatic" />
|
|
<parameter name="instruction_master_high_performance_paddr_base" value="0" />
|
|
<parameter name="mmu_TLBMissExcSlave" value="None" />
|
|
<parameter name="impl" value="Fast" />
|
|
<parameter name="regfile_ramBlockType" value="Automatic" />
|
|
<parameter name="dcache_size" value="2048" />
|
|
<parameter name="tightly_coupled_data_master_0_paddr_top" value="0" />
|
|
<parameter name="breakOffset" value="32" />
|
|
<parameter name="breakSlave" value="None" />
|
|
<parameter name="setting_branchPredictionType" value="Dynamic" />
|
|
<parameter name="exceptionOffset" value="32" />
|
|
<parameter name="flash_instruction_master_paddr_top" value="0" />
|
|
<parameter name="tightlyCoupledDataMaster0MapParam" value="" />
|
|
<parameter name="cpu_name" value="cpu" />
|
|
<parameter name="tightlyCoupledInstructionMaster1MapParam" value="" />
|
|
<parameter name="breakAbsoluteAddr" value="264224" />
|
|
<parameter name="setting_activateTrace" value="false" />
|
|
<parameter name="debug_offchiptrace" value="false" />
|
|
<parameter name="setting_avalonDebugPortPresent" value="false" />
|
|
<parameter name="dcache_numTCDM" value="0" />
|
|
<parameter name="setting_ecc_sim_test_ports" value="false" />
|
|
<parameter name="tightlyCoupledInstructionMaster0AddrWidth" value="1" />
|
|
<parameter name="setting_showUnpublishedSettings" value="false" />
|
|
<parameter name="tightly_coupled_data_master_2_paddr_base" value="0" />
|
|
<parameter name="debug_debugReqSignals" value="false" />
|
|
<parameter name="master_addr_map" value="false" />
|
|
<parameter name="tightly_coupled_instruction_master_2_paddr_base" value="0" />
|
|
<parameter name="mmu_processIDNumBits" value="8" />
|
|
<parameter name="tightlyCoupledDataMaster3AddrWidth" value="1" />
|
|
<parameter name="debug_onchiptrace" value="false" />
|
|
<parameter name="setting_rf_ecc_present" value="true" />
|
|
<parameter name="resetAbsoluteAddr" value="131072" />
|
|
<parameter name="tightly_coupled_data_master_1_paddr_top" value="0" />
|
|
<parameter name="ocimem_ramInit" value="false" />
|
|
<parameter name="internalIrqMaskSystemInfo" value="31" />
|
|
<parameter name="instruction_master_paddr_top" value="0" />
|
|
<parameter name="cpuArchRev" value="1" />
|
|
<parameter name="setting_dtcm_ecc_present" value="true" />
|
|
<parameter name="exceptionAbsoluteAddr" value="131104" />
|
|
<parameter name="setting_interruptControllerType" value="Internal" />
|
|
<parameter name="dcache_tagramBlockType" value="Automatic" />
|
|
<parameter name="debug_insttrace" value="false" />
|
|
<parameter name="icache_size" value="4096" />
|
|
<parameter name="setting_itcm_ecc_present" value="true" />
|
|
<parameter name="tightly_coupled_instruction_master_0_paddr_base" value="0" />
|
|
<parameter
|
|
name="dataSlaveMapParam"
|
|
value="<address-map><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' type='altera_avalon_onchip_memory2.s1' /><slave name='nios2_gen2.debug_mem_slave' start='0x40800' end='0x41000' type='altera_nios2_gen2.debug_mem_slave' /><slave name='timer.s1' start='0x41000' end='0x41020' type='altera_avalon_timer.s1' /><slave name='TERASIC_AUTO_FOCUS_0.mm_ctrl' start='0x41020' end='0x41040' type='TERASIC_AUTO_FOCUS.mm_ctrl' /><slave name='i2c_opencores_camera.avalon_slave_0' start='0x41040' end='0x41060' type='i2c_opencores.avalon_slave_0' /><slave name='i2c_opencores_mipi.avalon_slave_0' start='0x41060' end='0x41080' type='i2c_opencores.avalon_slave_0' /><slave name='mipi_pwdn_n.s1' start='0x41080' end='0x41090' type='altera_avalon_pio.s1' /><slave name='mipi_reset_n.s1' start='0x41090' end='0x410A0' type='altera_avalon_pio.s1' /><slave name='key.s1' start='0x410A0' end='0x410B0' type='altera_avalon_pio.s1' /><slave name='sw.s1' start='0x410B0' end='0x410C0' type='altera_avalon_pio.s1' /><slave name='led.s1' start='0x410C0' end='0x410D0' type='altera_avalon_pio.s1' /><slave name='altpll_0.pll_slave' start='0x410D0' end='0x410E0' type='altpll.pll_slave' /><slave name='sysid_qsys.control_slave' start='0x410E0' end='0x410E8' type='altera_avalon_sysid_qsys.control_slave' /><slave name='jtag_uart.avalon_jtag_slave' start='0x410E8' end='0x410F0' type='altera_avalon_jtag_uart.avalon_jtag_slave' /><slave name='EEE_IMGPROC_0.s1' start='0x42000' end='0x42020' type='EEE_IMGPROC.s1' /><slave name='uart_0.s1' start='0x42020' end='0x42040' type='altera_avalon_uart.s1' /></address-map>" />
|
|
<parameter name="mpu_enabled" value="false" />
|
|
<parameter name="setting_ecc_present" value="false" />
|
|
<parameter name="mmu_TLBMissExcAbsAddr" value="0" />
|
|
<parameter name="mpu_useLimit" value="false" />
|
|
<parameter name="stratix_dspblock_shift_mul" value="false" />
|
|
<parameter name="icache_numTCIM" value="0" />
|
|
<parameter name="setting_usedesignware" value="false" />
|
|
<parameter name="tightlyCoupledDataMaster3MapParam" value="" />
|
|
<parameter name="instruction_master_high_performance_paddr_top" value="0" />
|
|
<parameter name="setting_ioregionBypassDCache" value="false" />
|
|
<parameter name="mmu_TLBMissExcOffset" value="0" />
|
|
<parameter name="mmu_enabled" value="false" />
|
|
<parameter name="mmu_uitlbNumEntries" value="4" />
|
|
<parameter name="register_file_por" value="false" />
|
|
<parameter name="faAddrWidth" value="1" />
|
|
<parameter name="tightlyCoupledInstructionMaster2MapParam" value="" />
|
|
<parameter name="tightly_coupled_data_master_3_paddr_top" value="0" />
|
|
<parameter name="tightlyCoupledDataMaster1AddrWidth" value="1" />
|
|
<parameter name="setting_activateTestEndChecker" value="false" />
|
|
<parameter name="cpuID" value="0" />
|
|
<parameter name="resetrequest_enabled" value="true" />
|
|
<parameter name="setting_asic_enabled" value="false" />
|
|
<parameter name="exceptionSlave" value="onchip_memory2_0.s1" />
|
|
<parameter name="setting_HDLSimCachesCleared" value="true" />
|
|
<parameter name="debug_triggerArming" value="true" />
|
|
<parameter name="debug_OCIOnchipTrace" value="_128" />
|
|
<parameter name="dataAddrWidth" value="19" />
|
|
<parameter name="setting_bit31BypassDCache" value="true" />
|
|
<parameter name="instAddrWidth" value="19" />
|
|
<parameter name="setting_asic_add_scan_mode_input" value="false" />
|
|
<parameter name="tightly_coupled_instruction_master_1_paddr_top" value="0" />
|
|
<parameter name="io_regionbase" value="0" />
|
|
<parameter name="setting_shadowRegisterSets" value="0" />
|
|
<parameter name="icache_ramBlockType" value="Automatic" />
|
|
<parameter name="data_master_paddr_top" value="0" />
|
|
<parameter name="translate_on" value=" "synthesis translate_on" " />
|
|
<parameter name="faSlaveMapParam" value="" />
|
|
<parameter name="setting_clearXBitsLDNonBypass" value="true" />
|
|
<parameter name="tightly_coupled_instruction_master_1_paddr_base" value="0" />
|
|
<parameter name="tightlyCoupledDataMaster0AddrWidth" value="1" />
|
|
<parameter name="mmu_autoAssignTlbPtrSz" value="true" />
|
|
<parameter name="fa_cache_line" value="2" />
|
|
<parameter name="debug_assignJtagInstanceID" value="false" />
|
|
<parameter name="instruction_master_paddr_base" value="0" />
|
|
<parameter name="userDefinedSettings" value="" />
|
|
<parameter name="clockFrequency" value="50000000" />
|
|
<parameter name="setting_activateMonitors" value="true" />
|
|
<parameter name="resetOffset" value="0" />
|
|
<parameter name="dcache_ramBlockType" value="Automatic" />
|
|
<parameter name="dataMasterHighPerformanceAddrWidth" value="1" />
|
|
<parameter name="tightlyCoupledDataMaster2MapParam" value="" />
|
|
<parameter name="tightlyCoupledInstructionMaster2AddrWidth" value="1" />
|
|
<parameter name="tightly_coupled_instruction_master_0_paddr_top" value="0" />
|
|
<parameter name="setting_allow_break_inst" value="false" />
|
|
<parameter name="setting_asic_third_party_synthesis" value="false" />
|
|
<parameter name="io_regionsize" value="0" />
|
|
<parameter name="mpu_minInstRegionSize" value="12" />
|
|
<parameter name="tightly_coupled_data_master_3_paddr_base" value="0" />
|
|
<parameter name="translate_off" value=" "synthesis translate_off" " />
|
|
<parameter name="mpu_numOfInstRegion" value="8" />
|
|
<parameter name="flash_instruction_master_paddr_base" value="0" />
|
|
<parameter name="setting_exportdebuginfo" value="false" />
|
|
<parameter name="mmu_tlbPtrSz" value="7" />
|
|
<parameter name="cpuReset" value="false" />
|
|
<parameter name="resetSlave" value="onchip_memory2_0.s1" />
|
|
<parameter name="dcache_bursts_derived" value="false" />
|
|
<parameter name="multiplierType" value="mul_fast32" />
|
|
<parameter name="setting_removeRAMinit" value="false" />
|
|
<parameter name="icache_tagramBlockType" value="Automatic" />
|
|
<parameter name="debug_traceStorage" value="onchip_trace" />
|
|
<parameter name="setting_preciseIllegalMemAccessException" value="false" />
|
|
<parameter name="fa_cache_linesize" value="0" />
|
|
<parameter name="setting_mmu_ecc_present" value="true" />
|
|
<parameter name="debug_datatrace" value="false" />
|
|
<parameter name="setting_HBreakTest" value="false" />
|
|
<parameter name="debug_hwbreakpoint" value="0" />
|
|
<parameter name="tightlyCoupledInstructionMaster3MapParam" value="" />
|
|
<parameter name="dataMasterHighPerformanceMapParam" value="" />
|
|
<parameter name="tightly_coupled_data_master_2_paddr_top" value="0" />
|
|
<parameter name="setting_disableocitrace" value="false" />
|
|
<parameter name="setting_bigEndian" value="false" />
|
|
<parameter name="mpu_minDataRegionSize" value="12" />
|
|
<parameter name="tightly_coupled_data_master_1_paddr_base" value="0" />
|
|
<parameter name="tightlyCoupledInstructionMaster1AddrWidth" value="1" />
|
|
<parameter name="debug_jtagInstanceID" value="0" />
|
|
<parameter name="setting_showInternalSettings" value="false" />
|
|
<parameter name="setting_breakslaveoveride" value="false" />
|
|
<parameter name="debug_traceType" value="none" />
|
|
<parameter name="instructionMasterHighPerformanceMapParam" value="" />
|
|
<parameter name="tightly_coupled_instruction_master_2_paddr_top" value="0" />
|
|
<parameter name="setting_alwaysEncrypt" value="true" />
|
|
<parameter name="setting_oci_export_jtag_signals" value="false" />
|
|
<parameter name="tightly_coupled_instruction_master_3_paddr_base" value="0" />
|
|
<parameter name="data_master_high_performance_paddr_top" value="0" />
|
|
<parameter name="dcache_lineSize_derived" value="32" />
|
|
<parameter name="deviceFamilyName" value="MAX 10" />
|
|
<parameter name="debug_datatrigger" value="0" />
|
|
<parameter name="tightlyCoupledDataMaster2AddrWidth" value="1" />
|
|
<parameter name="debug_enabled" value="true" />
|
|
<parameter name="setting_export_large_RAMs" value="false" />
|
|
<parameter name="tightlyCoupledDataMaster1MapParam" value="" />
|
|
<parameter name="setting_dc_ecc_present" value="true" />
|
|
<parameter name="setting_support31bitdcachebypass" value="true" />
|
|
<parameter
|
|
name="instSlaveMapParam"
|
|
value="<address-map><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' type='altera_avalon_onchip_memory2.s1' /><slave name='nios2_gen2.debug_mem_slave' start='0x40800' end='0x41000' type='altera_nios2_gen2.debug_mem_slave' /></address-map>" />
|
|
<parameter name="dividerType" value="no_div" />
|
|
<parameter name="setting_bhtPtrSz" value="8" />
|
|
<parameter name="setting_exportvectors" value="false" />
|
|
<parameter name="tmr_enabled" value="false" />
|
|
<parameter name="data_master_paddr_base" value="0" />
|
|
<parameter name="breakSlave_derived" value="nios2_gen2.debug_mem_slave" />
|
|
<parameter name="tightlyCoupledInstructionMaster3AddrWidth" value="1" />
|
|
<parameter name="mpu_numOfDataRegion" value="8" />
|
|
<parameter name="tightly_coupled_data_master_0_paddr_base" value="0" />
|
|
<parameter name="mmu_ramBlockType" value="Automatic" />
|
|
<parameter name="data_master_high_performance_paddr_base" value="0" />
|
|
<parameter name="cdx_enabled" value="false" />
|
|
<parameter name="customInstSlavesSystemInfo" value="<info/>" />
|
|
<parameter name="tightlyCoupledInstructionMaster0MapParam" value="" />
|
|
<parameter name="dcache_bursts" value="false" />
|
|
<parameter name="tracefilename" value="" />
|
|
<parameter name="instructionMasterHighPerformanceAddrWidth" value="1" />
|
|
<parameter name="setting_asic_synopsys_translate_on_off" value="false" />
|
|
<parameter name="setting_fast_register_read" value="false" />
|
|
<parameter name="mmu_tlbNumWays" value="16" />
|
|
<parameter name="shifterType" value="fast_le_shift" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu.ocp"
|
|
type="OTHER"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu.sdc"
|
|
type="SDC"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu.v"
|
|
type="VERILOG_ENCRYPT"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu_bht_ram.mif"
|
|
type="MIF"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu_dc_tag_ram.mif"
|
|
type="MIF"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu_debug_slave_sysclk.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu_debug_slave_tck.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu_debug_slave_wrapper.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu_ic_tag_ram.mif"
|
|
type="MIF"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu_mult_cell.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu_ociram_default_contents.mif"
|
|
type="MIF"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu_rf_ram_a.mif"
|
|
type="MIF"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu_rf_ram_b.mif"
|
|
type="MIF"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_nios2_gen2_cpu_test_bench.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/nios2_ip/altera_nios2_gen2/altera_nios2_unit_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys_nios2_gen2" as="cpu" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 151 starting:altera_nios2_gen2_unit "submodules/Qsys_nios2_gen2_cpu"</message>
|
|
<message level="Info" culprit="cpu">Starting RTL generation for module 'Qsys_nios2_gen2_cpu'</message>
|
|
<message level="Info" culprit="cpu"> Generation command is [exec F:/intelFPGA_lite/16.1/quartus/bin64//eperlcmd.exe -I F:/intelFPGA_lite/16.1/quartus/bin64//perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/cpu_lib -I F:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/nios_lib -I F:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2 -I F:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2 -- F:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/generate_rtl.epl --name=Qsys_nios2_gen2_cpu --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0075_cpu_gen/ --quartus_bindir=F:/intelFPGA_lite/16.1/quartus/bin64/ --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0075_cpu_gen//Qsys_nios2_gen2_cpu_processor_configuration.pl --do_build_sim=0 ]</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:02 (*) Starting Nios II generation</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:02 (*) Checking for plaintext license.</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Couldn't query license setup in Quartus directory F:/intelFPGA_lite/16.1/quartus/bin64/</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Defaulting to contents of LM_LICENSE_FILE environment variable</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) LM_LICENSE_FILE environment variable is empty</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Plaintext license not found.</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Checking for encrypted license (non-evaluation).</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Couldn't query license setup in Quartus directory F:/intelFPGA_lite/16.1/quartus/bin64/</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Defaulting to contents of LM_LICENSE_FILE environment variable</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) LM_LICENSE_FILE environment variable is empty</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Encrypted license not found. Defaulting to OCP evaluation license (produces a time-limited SOF)</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Elaborating CPU configuration settings</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Creating all objects for CPU</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Testbench</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Instruction decoding</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Instruction fields</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:03 (*) Instruction decodes</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:04 (*) Signals for RTL simulation waveforms</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:04 (*) Instruction controls</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:04 (*) Pipeline frontend</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:04 (*) Pipeline backend</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:06 (*) Generating RTL from CPU objects</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:08 (*) Creating encrypted RTL</message>
|
|
<message level="Info" culprit="cpu"># 2021.06.03 15:10:08 (*) Done Nios II generation</message>
|
|
<message level="Info" culprit="cpu">Done RTL generation for module 'Qsys_nios2_gen2_cpu'</message>
|
|
<message level="Info" culprit="cpu"><![CDATA["<b>nios2_gen2</b>" instantiated <b>altera_nios2_gen2_unit</b> "<b>cpu</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_merlin_master_translator:16.1:AV_ADDRESSGROUP=0,AV_ADDRESS_SYMBOLS=1,AV_ADDRESS_W=19,AV_ALWAYSBURSTMAXBURST=0,AV_BITS_PER_SYMBOL=8,AV_BURSTBOUNDARIES=1,AV_BURSTCOUNT_SYMBOLS=0,AV_BURSTCOUNT_W=1,AV_BYTEENABLE_W=4,AV_CONSTANT_BURST_BEHAVIOR=0,AV_DATA_HOLD=0,AV_DATA_W=32,AV_INTERLEAVEBURSTS=0,AV_ISBIGENDIAN=0,AV_LINEWRAPBURSTS=0,AV_MAX_PENDING_READ_TRANSACTIONS=64,AV_READLATENCY=0,AV_READ_WAIT=1,AV_REGISTERINCOMINGSIGNALS=0,AV_REGISTEROUTGOINGSIGNALS=0,AV_SETUP_WAIT=0,AV_SYMBOLS_PER_WORD=4,AV_WRITE_WAIT=0,SYNC_RESET=0,UAV_ADDRESSGROUP=0,UAV_ADDRESS_W=19,UAV_BURSTCOUNT_W=3,UAV_CONSTANT_BURST_BEHAVIOR=0,USE_ADDRESS=1,USE_BEGINBURSTTRANSFER=0,USE_BEGINTRANSFER=0,USE_BURSTCOUNT=0,USE_BYTEENABLE=1,USE_CHIPSELECT=0,USE_CLKEN=0,USE_DEBUGACCESS=1,USE_LOCK=0,USE_READ=1,USE_READDATA=1,USE_READDATAVALID=1,USE_READRESPONSE=0,USE_WAITREQUEST=1,USE_WRITE=1,USE_WRITEDATA=1,USE_WRITERESPONSE=0"
|
|
instancePathKey="Qsys:.:mm_interconnect_0:.:nios2_gen2_data_master_translator"
|
|
kind="altera_merlin_master_translator"
|
|
version="16.1"
|
|
name="altera_merlin_master_translator">
|
|
<parameter name="SYNC_RESET" value="0" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_master_translator.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_master_translator/altera_merlin_master_translator_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator
|
|
instantiator="Qsys_mm_interconnect_0"
|
|
as="nios2_gen2_data_master_translator,nios2_gen2_instruction_master_translator" />
|
|
<instantiator
|
|
instantiator="Qsys_mm_interconnect_1"
|
|
as="alt_vip_vfb_0_read_master_translator,alt_vip_vfb_0_write_master_translator" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 150 starting:altera_merlin_master_translator "submodules/altera_merlin_master_translator"</message>
|
|
<message level="Info" culprit="nios2_gen2_data_master_translator"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_master_translator</b> "<b>nios2_gen2_data_master_translator</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_merlin_slave_translator:16.1:AV_ADDRESSGROUP=0,AV_ADDRESS_SYMBOLS=0,AV_ADDRESS_W=1,AV_ALWAYSBURSTMAXBURST=0,AV_BITS_PER_SYMBOL=8,AV_BURSTBOUNDARIES=0,AV_BURSTCOUNT_SYMBOLS=0,AV_BURSTCOUNT_W=1,AV_BYTEENABLE_W=1,AV_CONSTANT_BURST_BEHAVIOR=0,AV_DATA_HOLD=0,AV_DATA_HOLD_CYCLES=0,AV_DATA_W=32,AV_INTERLEAVEBURSTS=0,AV_ISBIGENDIAN=0,AV_LINEWRAPBURSTS=0,AV_MAX_PENDING_READ_TRANSACTIONS=1,AV_MAX_PENDING_WRITE_TRANSACTIONS=0,AV_READLATENCY=0,AV_READ_WAIT=1,AV_READ_WAIT_CYCLES=1,AV_REGISTERINCOMINGSIGNALS=0,AV_REGISTEROUTGOINGSIGNALS=0,AV_REQUIRE_UNALIGNED_ADDRESSES=0,AV_SETUP_WAIT=0,AV_SETUP_WAIT_CYCLES=0,AV_SYMBOLS_PER_WORD=4,AV_TIMING_UNITS=1,AV_WRITE_WAIT=0,AV_WRITE_WAIT_CYCLES=0,CHIPSELECT_THROUGH_READLATENCY=0,CLOCK_RATE=50000000,UAV_ADDRESSGROUP=0,UAV_ADDRESS_W=19,UAV_BURSTCOUNT_W=3,UAV_BYTEENABLE_W=4,UAV_CONSTANT_BURST_BEHAVIOR=0,UAV_DATA_W=32,USE_ADDRESS=1,USE_AV_CLKEN=0,USE_BEGINBURSTTRANSFER=0,USE_BEGINTRANSFER=0,USE_BURSTCOUNT=0,USE_BYTEENABLE=0,USE_CHIPSELECT=1,USE_DEBUGACCESS=0,USE_LOCK=0,USE_OUTPUTENABLE=0,USE_READ=1,USE_READDATA=1,USE_READDATAVALID=0,USE_READRESPONSE=0,USE_UAV_CLKEN=0,USE_WAITREQUEST=1,USE_WRITE=1,USE_WRITEBYTEENABLE=0,USE_WRITEDATA=1,USE_WRITERESPONSE=0"
|
|
instancePathKey="Qsys:.:mm_interconnect_0:.:jtag_uart_avalon_jtag_slave_translator"
|
|
kind="altera_merlin_slave_translator"
|
|
version="16.1"
|
|
name="altera_merlin_slave_translator">
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_slave_translator.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_slave_translator/altera_merlin_slave_translator_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator
|
|
instantiator="Qsys_mm_interconnect_0"
|
|
as="jtag_uart_avalon_jtag_slave_translator,i2c_opencores_mipi_avalon_slave_0_translator,i2c_opencores_camera_avalon_slave_0_translator,sysid_qsys_control_slave_translator,nios2_gen2_debug_mem_slave_translator,TERASIC_AUTO_FOCUS_0_mm_ctrl_translator,altpll_0_pll_slave_translator,onchip_memory2_0_s1_translator,timer_s1_translator,led_s1_translator,sw_s1_translator,key_s1_translator,mipi_reset_n_s1_translator,mipi_pwdn_n_s1_translator,EEE_IMGPROC_0_s1_translator,uart_0_s1_translator" />
|
|
<instantiator instantiator="Qsys_mm_interconnect_1" as="sdram_s1_translator" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 148 starting:altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"</message>
|
|
<message level="Info" culprit="jtag_uart_avalon_jtag_slave_translator"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_slave_translator</b> "<b>jtag_uart_avalon_jtag_slave_translator</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_merlin_master_agent:16.1:ADDR_MAP=<?xml version="1.0" encoding="UTF-8"?>
|
|
<address_map>
|
|
<slave
|
|
id="5"
|
|
name="jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0"
|
|
start="0x00000000000410e8"
|
|
end="0x000000000000410f0"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="4"
|
|
name="i2c_opencores_mipi_avalon_slave_0_translator.avalon_universal_slave_0"
|
|
start="0x0000000000041060"
|
|
end="0x00000000000041080"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="3"
|
|
name="i2c_opencores_camera_avalon_slave_0_translator.avalon_universal_slave_0"
|
|
start="0x0000000000041040"
|
|
end="0x00000000000041060"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="13"
|
|
name="sysid_qsys_control_slave_translator.avalon_universal_slave_0"
|
|
start="0x00000000000410e0"
|
|
end="0x000000000000410e8"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="10"
|
|
name="nios2_gen2_debug_mem_slave_translator.avalon_universal_slave_0"
|
|
start="0x0000000000040800"
|
|
end="0x00000000000041000"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="1"
|
|
name="TERASIC_AUTO_FOCUS_0_mm_ctrl_translator.avalon_universal_slave_0"
|
|
start="0x0000000000041020"
|
|
end="0x00000000000041040"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="2"
|
|
name="altpll_0_pll_slave_translator.avalon_universal_slave_0"
|
|
start="0x00000000000410d0"
|
|
end="0x000000000000410e0"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="11"
|
|
name="onchip_memory2_0_s1_translator.avalon_universal_slave_0"
|
|
start="0x0000000000020000"
|
|
end="0x00000000000040000"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="14"
|
|
name="timer_s1_translator.avalon_universal_slave_0"
|
|
start="0x0000000000041000"
|
|
end="0x00000000000041020"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="7"
|
|
name="led_s1_translator.avalon_universal_slave_0"
|
|
start="0x00000000000410c0"
|
|
end="0x000000000000410d0"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="12"
|
|
name="sw_s1_translator.avalon_universal_slave_0"
|
|
start="0x00000000000410b0"
|
|
end="0x000000000000410c0"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="6"
|
|
name="key_s1_translator.avalon_universal_slave_0"
|
|
start="0x00000000000410a0"
|
|
end="0x000000000000410b0"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="9"
|
|
name="mipi_reset_n_s1_translator.avalon_universal_slave_0"
|
|
start="0x0000000000041090"
|
|
end="0x000000000000410a0"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="8"
|
|
name="mipi_pwdn_n_s1_translator.avalon_universal_slave_0"
|
|
start="0x0000000000041080"
|
|
end="0x00000000000041090"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="0"
|
|
name="EEE_IMGPROC_0_s1_translator.avalon_universal_slave_0"
|
|
start="0x0000000000042000"
|
|
end="0x00000000000042020"
|
|
responds="1"
|
|
user_default="0" />
|
|
<slave
|
|
id="15"
|
|
name="uart_0_s1_translator.avalon_universal_slave_0"
|
|
start="0x0000000000042020"
|
|
end="0x00000000000042040"
|
|
responds="1"
|
|
user_default="0" />
|
|
</address_map>
|
|
,AV_BURSTBOUNDARIES=1,AV_BURSTCOUNT_W=3,AV_LINEWRAPBURSTS=0,BURSTWRAP_VALUE=7,CACHE_VALUE=0,ID=0,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_ADDR_SIDEBAND_H=72,PKT_ADDR_SIDEBAND_L=72,PKT_BEGIN_BURST=74,PKT_BURSTWRAP_H=66,PKT_BURSTWRAP_L=64,PKT_BURST_SIZE_H=69,PKT_BURST_SIZE_L=67,PKT_BURST_TYPE_H=71,PKT_BURST_TYPE_L=70,PKT_BYTEEN_H=35,PKT_BYTEEN_L=32,PKT_BYTE_CNT_H=63,PKT_BYTE_CNT_L=61,PKT_CACHE_H=91,PKT_CACHE_L=88,PKT_DATA_H=31,PKT_DATA_L=0,PKT_DATA_SIDEBAND_H=73,PKT_DATA_SIDEBAND_L=73,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_ORI_BURST_SIZE_H=96,PKT_ORI_BURST_SIZE_L=94,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_QOS_H=75,PKT_QOS_L=75,PKT_RESPONSE_STATUS_H=93,PKT_RESPONSE_STATUS_L=92,PKT_SRC_ID_H=79,PKT_SRC_ID_L=76,PKT_THREAD_ID_H=84,PKT_THREAD_ID_L=84,PKT_TRANS_COMPRESSED_READ=55,PKT_TRANS_EXCLUSIVE=60,PKT_TRANS_LOCK=59,PKT_TRANS_POSTED=56,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,SECURE_ACCESS_BIT=1,ST_CHANNEL_W=16,ST_DATA_W=97,SUPPRESS_0_BYTEEN_RSP=0,USE_READRESPONSE=0,USE_WRITERESPONSE=0"
|
|
instancePathKey="Qsys:.:mm_interconnect_0:.:nios2_gen2_data_master_agent"
|
|
kind="altera_merlin_master_agent"
|
|
version="16.1"
|
|
name="altera_merlin_master_agent">
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_master_agent.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_master_agent/altera_merlin_master_agent_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator
|
|
instantiator="Qsys_mm_interconnect_0"
|
|
as="nios2_gen2_data_master_agent,nios2_gen2_instruction_master_agent" />
|
|
<instantiator
|
|
instantiator="Qsys_mm_interconnect_1"
|
|
as="alt_vip_vfb_0_read_master_agent,alt_vip_vfb_0_write_master_agent" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 132 starting:altera_merlin_master_agent "submodules/altera_merlin_master_agent"</message>
|
|
<message level="Info" culprit="nios2_gen2_data_master_agent"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_master_agent</b> "<b>nios2_gen2_data_master_agent</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_merlin_slave_agent:16.1:AVS_BURSTCOUNT_SYMBOLS=0,AVS_BURSTCOUNT_W=3,AV_LINEWRAPBURSTS=0,ECC_ENABLE=0,ID=5,MAX_BURSTWRAP=7,MAX_BYTE_CNT=4,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_BEGIN_BURST=74,PKT_BURSTWRAP_H=66,PKT_BURSTWRAP_L=64,PKT_BURST_SIZE_H=69,PKT_BURST_SIZE_L=67,PKT_BYTEEN_H=35,PKT_BYTEEN_L=32,PKT_BYTE_CNT_H=63,PKT_BYTE_CNT_L=61,PKT_DATA_H=31,PKT_DATA_L=0,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_ORI_BURST_SIZE_H=96,PKT_ORI_BURST_SIZE_L=94,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_RESPONSE_STATUS_H=93,PKT_RESPONSE_STATUS_L=92,PKT_SRC_ID_H=79,PKT_SRC_ID_L=76,PKT_SYMBOL_W=8,PKT_TRANS_COMPRESSED_READ=55,PKT_TRANS_LOCK=59,PKT_TRANS_POSTED=56,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,PREVENT_FIFO_OVERFLOW=1,ST_CHANNEL_W=16,ST_DATA_W=97,SUPPRESS_0_BYTEEN_CMD=0,USE_READRESPONSE=0,USE_WRITERESPONSE=0"
|
|
instancePathKey="Qsys:.:mm_interconnect_0:.:jtag_uart_avalon_jtag_slave_agent"
|
|
kind="altera_merlin_slave_agent"
|
|
version="16.1"
|
|
name="altera_merlin_slave_agent">
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_slave_agent.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_burst_uncompressor.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_slave_agent/altera_merlin_slave_agent_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator
|
|
instantiator="Qsys_mm_interconnect_0"
|
|
as="jtag_uart_avalon_jtag_slave_agent,i2c_opencores_mipi_avalon_slave_0_agent,i2c_opencores_camera_avalon_slave_0_agent,sysid_qsys_control_slave_agent,nios2_gen2_debug_mem_slave_agent,TERASIC_AUTO_FOCUS_0_mm_ctrl_agent,altpll_0_pll_slave_agent,onchip_memory2_0_s1_agent,timer_s1_agent,led_s1_agent,sw_s1_agent,key_s1_agent,mipi_reset_n_s1_agent,mipi_pwdn_n_s1_agent,EEE_IMGPROC_0_s1_agent,uart_0_s1_agent" />
|
|
<instantiator instantiator="Qsys_mm_interconnect_1" as="sdram_s1_agent" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 130 starting:altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"</message>
|
|
<message level="Info" culprit="jtag_uart_avalon_jtag_slave_agent"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_slave_agent</b> "<b>jtag_uart_avalon_jtag_slave_agent</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_avalon_sc_fifo:16.1:BITS_PER_SYMBOL=98,CHANNEL_WIDTH=0,EMPTY_LATENCY=1,ENABLE_EXPLICIT_MAXCHANNEL=false,ERROR_WIDTH=0,EXPLICIT_MAXCHANNEL=0,FIFO_DEPTH=2,SYMBOLS_PER_BEAT=1,USE_ALMOST_EMPTY_IF=0,USE_ALMOST_FULL_IF=0,USE_FILL_LEVEL=0,USE_MEMORY_BLOCKS=0,USE_PACKETS=1,USE_STORE_FORWARD=0"
|
|
instancePathKey="Qsys:.:mm_interconnect_0:.:jtag_uart_avalon_jtag_slave_agent_rsp_fifo"
|
|
kind="altera_avalon_sc_fifo"
|
|
version="16.1"
|
|
name="altera_avalon_sc_fifo">
|
|
<parameter name="EXPLICIT_MAXCHANNEL" value="0" />
|
|
<parameter name="ENABLE_EXPLICIT_MAXCHANNEL" value="false" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_sc_fifo.v"
|
|
type="VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo.v" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator
|
|
instantiator="Qsys_mm_interconnect_0"
|
|
as="jtag_uart_avalon_jtag_slave_agent_rsp_fifo,i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo,i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo,sysid_qsys_control_slave_agent_rsp_fifo,nios2_gen2_debug_mem_slave_agent_rsp_fifo,TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo,TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo,altpll_0_pll_slave_agent_rsp_fifo,onchip_memory2_0_s1_agent_rsp_fifo,timer_s1_agent_rsp_fifo,led_s1_agent_rsp_fifo,sw_s1_agent_rsp_fifo,key_s1_agent_rsp_fifo,mipi_reset_n_s1_agent_rsp_fifo,mipi_pwdn_n_s1_agent_rsp_fifo,EEE_IMGPROC_0_s1_agent_rsp_fifo,EEE_IMGPROC_0_s1_agent_rdata_fifo,uart_0_s1_agent_rsp_fifo" />
|
|
<instantiator
|
|
instantiator="Qsys_mm_interconnect_1"
|
|
as="sdram_s1_agent_rsp_fifo,sdram_s1_agent_rdata_fifo" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 129 starting:altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"</message>
|
|
<message level="Info" culprit="jtag_uart_avalon_jtag_slave_agent_rsp_fifo"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_avalon_sc_fifo</b> "<b>jtag_uart_avalon_jtag_slave_agent_rsp_fifo</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_merlin_router:16.1:CHANNEL_ID=0000000010000000,0000000000010000,0000000100000000,0000000000100000,0000000000000100,0000000000000010,0010000000000000,0001000000000000,0000100000000000,0000010000000000,0000001000000000,0000000001000000,0000000000001000,0000000000000001,0100000000000000,1000000000000000,DECODER_TYPE=0,DEFAULT_CHANNEL=7,DEFAULT_DESTID=11,DEFAULT_RD_CHANNEL=-1,DEFAULT_WR_CHANNEL=-1,DESTINATION_ID=11,10,14,1,3,4,8,9,6,12,7,2,13,5,0,15,END_ADDRESS=0x40000,0x41000,0x41020,0x41040,0x41060,0x41080,0x41090,0x410a0,0x410b0,0x410c0,0x410d0,0x410e0,0x410e8,0x410f0,0x42020,0x42040,MEMORY_ALIASING_DECODE=0,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NON_SECURED_TAG=1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,SECURED_RANGE_LIST=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,SECURED_RANGE_PAIRS=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,SLAVES_INFO=11:0000000010000000:0x20000:0x40000:both:1:0:0:1,10:0000000000010000:0x40800:0x41000:both:1:0:0:1,14:0000000100000000:0x41000:0x41020:both:1:0:0:1,1:0000000000100000:0x41020:0x41040:both:1:0:0:1,3:0000000000000100:0x41040:0x41060:both:1:0:0:1,4:0000000000000010:0x41060:0x41080:both:1:0:0:1,8:0010000000000000:0x41080:0x41090:both:1:0:0:1,9:0001000000000000:0x41090:0x410a0:both:1:0:0:1,6:0000100000000000:0x410a0:0x410b0:read:1:0:0:1,12:0000010000000000:0x410b0:0x410c0:read:1:0:0:1,7:0000001000000000:0x410c0:0x410d0:both:1:0:0:1,2:0000000001000000:0x410d0:0x410e0:both:1:0:0:1,13:0000000000001000:0x410e0:0x410e8:read:1:0:0:1,5:0000000000000001:0x410e8:0x410f0:both:1:0:0:1,0:0100000000000000:0x42000:0x42020:both:1:0:0:1,15:1000000000000000:0x42020:0x42040:both:1:0:0:1,SPAN_OFFSET=,START_ADDRESS=0x20000,0x40800,0x41000,0x41020,0x41040,0x41060,0x41080,0x41090,0x410a0,0x410b0,0x410c0,0x410d0,0x410e0,0x410e8,0x42000,0x42020,ST_CHANNEL_W=16,ST_DATA_W=97,TYPE_OF_TRANSACTION=both,both,both,both,both,both,both,both,read,read,both,both,read,both,both,both"
|
|
instancePathKey="Qsys:.:mm_interconnect_0:.:router"
|
|
kind="altera_merlin_router"
|
|
version="16.1"
|
|
name="Qsys_mm_interconnect_0_router">
|
|
<parameter name="ST_CHANNEL_W" value="16" />
|
|
<parameter name="DEFAULT_WR_CHANNEL" value="-1" />
|
|
<parameter name="PKT_TRANS_READ" value="58" />
|
|
<parameter
|
|
name="START_ADDRESS"
|
|
value="0x20000,0x40800,0x41000,0x41020,0x41040,0x41060,0x41080,0x41090,0x410a0,0x410b0,0x410c0,0x410d0,0x410e0,0x410e8,0x42000,0x42020" />
|
|
<parameter name="DEFAULT_CHANNEL" value="7" />
|
|
<parameter name="MEMORY_ALIASING_DECODE" value="0" />
|
|
<parameter
|
|
name="SLAVES_INFO"
|
|
value="11:0000000010000000:0x20000:0x40000:both:1:0:0:1,10:0000000000010000:0x40800:0x41000:both:1:0:0:1,14:0000000100000000:0x41000:0x41020:both:1:0:0:1,1:0000000000100000:0x41020:0x41040:both:1:0:0:1,3:0000000000000100:0x41040:0x41060:both:1:0:0:1,4:0000000000000010:0x41060:0x41080:both:1:0:0:1,8:0010000000000000:0x41080:0x41090:both:1:0:0:1,9:0001000000000000:0x41090:0x410a0:both:1:0:0:1,6:0000100000000000:0x410a0:0x410b0:read:1:0:0:1,12:0000010000000000:0x410b0:0x410c0:read:1:0:0:1,7:0000001000000000:0x410c0:0x410d0:both:1:0:0:1,2:0000000001000000:0x410d0:0x410e0:both:1:0:0:1,13:0000000000001000:0x410e0:0x410e8:read:1:0:0:1,5:0000000000000001:0x410e8:0x410f0:both:1:0:0:1,0:0100000000000000:0x42000:0x42020:both:1:0:0:1,15:1000000000000000:0x42020:0x42040:both:1:0:0:1" />
|
|
<parameter name="DEFAULT_RD_CHANNEL" value="-1" />
|
|
<parameter name="PKT_ADDR_H" value="54" />
|
|
<parameter name="PKT_DEST_ID_H" value="83" />
|
|
<parameter name="PKT_ADDR_L" value="36" />
|
|
<parameter name="PKT_DEST_ID_L" value="80" />
|
|
<parameter
|
|
name="MERLIN_PACKET_FORMAT"
|
|
value="ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)" />
|
|
<parameter
|
|
name="CHANNEL_ID"
|
|
value="0000000010000000,0000000000010000,0000000100000000,0000000000100000,0000000000000100,0000000000000010,0010000000000000,0001000000000000,0000100000000000,0000010000000000,0000001000000000,0000000001000000,0000000000001000,0000000000000001,0100000000000000,1000000000000000" />
|
|
<parameter
|
|
name="TYPE_OF_TRANSACTION"
|
|
value="both,both,both,both,both,both,both,both,read,read,both,both,read,both,both,both" />
|
|
<parameter name="SECURED_RANGE_PAIRS" value="0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0" />
|
|
<parameter name="SPAN_OFFSET" value="" />
|
|
<parameter name="ST_DATA_W" value="97" />
|
|
<parameter name="SECURED_RANGE_LIST" value="0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0" />
|
|
<parameter name="DECODER_TYPE" value="0" />
|
|
<parameter name="PKT_PROTECTION_H" value="87" />
|
|
<parameter
|
|
name="END_ADDRESS"
|
|
value="0x40000,0x41000,0x41020,0x41040,0x41060,0x41080,0x41090,0x410a0,0x410b0,0x410c0,0x410d0,0x410e0,0x410e8,0x410f0,0x42020,0x42040" />
|
|
<parameter name="PKT_PROTECTION_L" value="85" />
|
|
<parameter name="PKT_TRANS_WRITE" value="57" />
|
|
<parameter name="DEFAULT_DESTID" value="11" />
|
|
<parameter name="DESTINATION_ID" value="11,10,14,1,3,4,8,9,6,12,7,2,13,5,0,15" />
|
|
<parameter name="NON_SECURED_TAG" value="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_router.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys_mm_interconnect_0" as="router" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 96 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_0_router"</message>
|
|
<message level="Info" culprit="router"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_router</b> "<b>router</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_merlin_router:16.1:CHANNEL_ID=10,01,DECODER_TYPE=0,DEFAULT_CHANNEL=1,DEFAULT_DESTID=11,DEFAULT_RD_CHANNEL=-1,DEFAULT_WR_CHANNEL=-1,DESTINATION_ID=11,10,END_ADDRESS=0x40000,0x41000,MEMORY_ALIASING_DECODE=0,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NON_SECURED_TAG=1,1,PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,SECURED_RANGE_LIST=0,0,SECURED_RANGE_PAIRS=0,0,SLAVES_INFO=11:10:0x20000:0x40000:both:1:0:0:1,10:01:0x40800:0x41000:both:1:0:0:1,SPAN_OFFSET=,START_ADDRESS=0x20000,0x40800,ST_CHANNEL_W=16,ST_DATA_W=97,TYPE_OF_TRANSACTION=both,both"
|
|
instancePathKey="Qsys:.:mm_interconnect_0:.:router_001"
|
|
kind="altera_merlin_router"
|
|
version="16.1"
|
|
name="Qsys_mm_interconnect_0_router_001">
|
|
<parameter name="ST_CHANNEL_W" value="16" />
|
|
<parameter name="DEFAULT_WR_CHANNEL" value="-1" />
|
|
<parameter name="PKT_TRANS_READ" value="58" />
|
|
<parameter name="START_ADDRESS" value="0x20000,0x40800" />
|
|
<parameter name="DEFAULT_CHANNEL" value="1" />
|
|
<parameter name="MEMORY_ALIASING_DECODE" value="0" />
|
|
<parameter
|
|
name="SLAVES_INFO"
|
|
value="11:10:0x20000:0x40000:both:1:0:0:1,10:01:0x40800:0x41000:both:1:0:0:1" />
|
|
<parameter name="DEFAULT_RD_CHANNEL" value="-1" />
|
|
<parameter name="PKT_ADDR_H" value="54" />
|
|
<parameter name="PKT_DEST_ID_H" value="83" />
|
|
<parameter name="PKT_ADDR_L" value="36" />
|
|
<parameter name="PKT_DEST_ID_L" value="80" />
|
|
<parameter
|
|
name="MERLIN_PACKET_FORMAT"
|
|
value="ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)" />
|
|
<parameter name="CHANNEL_ID" value="10,01" />
|
|
<parameter name="TYPE_OF_TRANSACTION" value="both,both" />
|
|
<parameter name="SECURED_RANGE_PAIRS" value="0,0" />
|
|
<parameter name="SPAN_OFFSET" value="" />
|
|
<parameter name="ST_DATA_W" value="97" />
|
|
<parameter name="SECURED_RANGE_LIST" value="0,0" />
|
|
<parameter name="DECODER_TYPE" value="0" />
|
|
<parameter name="PKT_PROTECTION_H" value="87" />
|
|
<parameter name="END_ADDRESS" value="0x40000,0x41000" />
|
|
<parameter name="PKT_PROTECTION_L" value="85" />
|
|
<parameter name="PKT_TRANS_WRITE" value="57" />
|
|
<parameter name="DEFAULT_DESTID" value="11" />
|
|
<parameter name="DESTINATION_ID" value="11,10" />
|
|
<parameter name="NON_SECURED_TAG" value="1,1" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_router_001.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys_mm_interconnect_0" as="router_001" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 95 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_001"</message>
|
|
<message level="Info" culprit="router_001"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_router</b> "<b>router_001</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_merlin_router:16.1:CHANNEL_ID=1,DECODER_TYPE=1,DEFAULT_CHANNEL=0,DEFAULT_DESTID=0,DEFAULT_RD_CHANNEL=-1,DEFAULT_WR_CHANNEL=-1,DESTINATION_ID=0,END_ADDRESS=0x0,MEMORY_ALIASING_DECODE=0,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NON_SECURED_TAG=1,PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,SECURED_RANGE_LIST=0,SECURED_RANGE_PAIRS=0,SLAVES_INFO=0:1:0x0:0x0:both:1:0:0:1,SPAN_OFFSET=,START_ADDRESS=0x0,ST_CHANNEL_W=16,ST_DATA_W=97,TYPE_OF_TRANSACTION=both"
|
|
instancePathKey="Qsys:.:mm_interconnect_0:.:router_002"
|
|
kind="altera_merlin_router"
|
|
version="16.1"
|
|
name="Qsys_mm_interconnect_0_router_002">
|
|
<parameter name="ST_CHANNEL_W" value="16" />
|
|
<parameter name="DEFAULT_WR_CHANNEL" value="-1" />
|
|
<parameter name="PKT_TRANS_READ" value="58" />
|
|
<parameter name="START_ADDRESS" value="0x0" />
|
|
<parameter name="DEFAULT_CHANNEL" value="0" />
|
|
<parameter name="MEMORY_ALIASING_DECODE" value="0" />
|
|
<parameter name="SLAVES_INFO" value="0:1:0x0:0x0:both:1:0:0:1" />
|
|
<parameter name="DEFAULT_RD_CHANNEL" value="-1" />
|
|
<parameter name="PKT_ADDR_H" value="54" />
|
|
<parameter name="PKT_DEST_ID_H" value="83" />
|
|
<parameter name="PKT_ADDR_L" value="36" />
|
|
<parameter name="PKT_DEST_ID_L" value="80" />
|
|
<parameter
|
|
name="MERLIN_PACKET_FORMAT"
|
|
value="ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)" />
|
|
<parameter name="CHANNEL_ID" value="1" />
|
|
<parameter name="TYPE_OF_TRANSACTION" value="both" />
|
|
<parameter name="SECURED_RANGE_PAIRS" value="0" />
|
|
<parameter name="SPAN_OFFSET" value="" />
|
|
<parameter name="ST_DATA_W" value="97" />
|
|
<parameter name="SECURED_RANGE_LIST" value="0" />
|
|
<parameter name="DECODER_TYPE" value="1" />
|
|
<parameter name="PKT_PROTECTION_H" value="87" />
|
|
<parameter name="END_ADDRESS" value="0x0" />
|
|
<parameter name="PKT_PROTECTION_L" value="85" />
|
|
<parameter name="PKT_TRANS_WRITE" value="57" />
|
|
<parameter name="DEFAULT_DESTID" value="0" />
|
|
<parameter name="DESTINATION_ID" value="0" />
|
|
<parameter name="NON_SECURED_TAG" value="1" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_router_002.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator
|
|
instantiator="Qsys_mm_interconnect_0"
|
|
as="router_002,router_003,router_004,router_005,router_007,router_008,router_010,router_011,router_012,router_013,router_014,router_015,router_016,router_017" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 94 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_002"</message>
|
|
<message level="Info" culprit="router_002"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_router</b> "<b>router_002</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_merlin_router:16.1:CHANNEL_ID=01,10,DECODER_TYPE=1,DEFAULT_CHANNEL=0,DEFAULT_DESTID=0,DEFAULT_RD_CHANNEL=-1,DEFAULT_WR_CHANNEL=-1,DESTINATION_ID=0,1,END_ADDRESS=0x0,0x0,MEMORY_ALIASING_DECODE=0,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NON_SECURED_TAG=1,1,PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,SECURED_RANGE_LIST=0,0,SECURED_RANGE_PAIRS=0,0,SLAVES_INFO=0:01:0x0:0x0:both:1:0:0:1,1:10:0x0:0x0:read:1:0:0:1,SPAN_OFFSET=,START_ADDRESS=0x0,0x0,ST_CHANNEL_W=16,ST_DATA_W=97,TYPE_OF_TRANSACTION=both,read"
|
|
instancePathKey="Qsys:.:mm_interconnect_0:.:router_006"
|
|
kind="altera_merlin_router"
|
|
version="16.1"
|
|
name="Qsys_mm_interconnect_0_router_006">
|
|
<parameter name="ST_CHANNEL_W" value="16" />
|
|
<parameter name="DEFAULT_WR_CHANNEL" value="-1" />
|
|
<parameter name="PKT_TRANS_READ" value="58" />
|
|
<parameter name="START_ADDRESS" value="0x0,0x0" />
|
|
<parameter name="DEFAULT_CHANNEL" value="0" />
|
|
<parameter name="MEMORY_ALIASING_DECODE" value="0" />
|
|
<parameter
|
|
name="SLAVES_INFO"
|
|
value="0:01:0x0:0x0:both:1:0:0:1,1:10:0x0:0x0:read:1:0:0:1" />
|
|
<parameter name="DEFAULT_RD_CHANNEL" value="-1" />
|
|
<parameter name="PKT_ADDR_H" value="54" />
|
|
<parameter name="PKT_DEST_ID_H" value="83" />
|
|
<parameter name="PKT_ADDR_L" value="36" />
|
|
<parameter name="PKT_DEST_ID_L" value="80" />
|
|
<parameter
|
|
name="MERLIN_PACKET_FORMAT"
|
|
value="ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)" />
|
|
<parameter name="CHANNEL_ID" value="01,10" />
|
|
<parameter name="TYPE_OF_TRANSACTION" value="both,read" />
|
|
<parameter name="SECURED_RANGE_PAIRS" value="0,0" />
|
|
<parameter name="SPAN_OFFSET" value="" />
|
|
<parameter name="ST_DATA_W" value="97" />
|
|
<parameter name="SECURED_RANGE_LIST" value="0,0" />
|
|
<parameter name="DECODER_TYPE" value="1" />
|
|
<parameter name="PKT_PROTECTION_H" value="87" />
|
|
<parameter name="END_ADDRESS" value="0x0,0x0" />
|
|
<parameter name="PKT_PROTECTION_L" value="85" />
|
|
<parameter name="PKT_TRANS_WRITE" value="57" />
|
|
<parameter name="DEFAULT_DESTID" value="0" />
|
|
<parameter name="DESTINATION_ID" value="0,1" />
|
|
<parameter name="NON_SECURED_TAG" value="1,1" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_router_006.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys_mm_interconnect_0" as="router_006,router_009" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 90 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_006"</message>
|
|
<message level="Info" culprit="router_006"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_router</b> "<b>router_006</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_merlin_traffic_limiter:16.1:ENFORCE_ORDER=1,MAX_BURST_LENGTH=1,MAX_OUTSTANDING_RESPONSES=5,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),PIPELINED=0,PKT_BYTEEN_H=35,PKT_BYTEEN_L=32,PKT_BYTE_CNT_H=63,PKT_BYTE_CNT_L=61,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_SRC_ID_H=79,PKT_SRC_ID_L=76,PKT_THREAD_ID_H=84,PKT_THREAD_ID_L=84,PKT_TRANS_POSTED=56,PKT_TRANS_WRITE=57,PREVENT_HAZARDS=0,REORDER=0,ST_CHANNEL_W=16,ST_DATA_W=97,SUPPORTS_NONPOSTED_WRITES=0,SUPPORTS_POSTED_WRITES=1,VALID_WIDTH=16"
|
|
instancePathKey="Qsys:.:mm_interconnect_0:.:nios2_gen2_data_master_limiter"
|
|
kind="altera_merlin_traffic_limiter"
|
|
version="16.1"
|
|
name="altera_merlin_traffic_limiter">
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_traffic_limiter.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_reorder_memory.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_sc_fifo.v"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_pipeline_base.v"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_traffic_limiter/altera_merlin_traffic_limiter_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator
|
|
instantiator="Qsys_mm_interconnect_0"
|
|
as="nios2_gen2_data_master_limiter,nios2_gen2_instruction_master_limiter" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 78 starting:altera_merlin_traffic_limiter "submodules/altera_merlin_traffic_limiter"</message>
|
|
<message level="Info" culprit="nios2_gen2_data_master_limiter"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_traffic_limiter</b> "<b>nios2_gen2_data_master_limiter</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_sc_fifo.v</b>]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_merlin_demultiplexer:16.1:AUTO_CLK_CLOCK_RATE=50000000,AUTO_DEVICE_FAMILY=MAX 10,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_OUTPUTS=16,ST_CHANNEL_W=16,ST_DATA_W=97,VALID_WIDTH=16"
|
|
instancePathKey="Qsys:.:mm_interconnect_0:.:cmd_demux"
|
|
kind="altera_merlin_demultiplexer"
|
|
version="16.1"
|
|
name="Qsys_mm_interconnect_0_cmd_demux">
|
|
<parameter
|
|
name="MERLIN_PACKET_FORMAT"
|
|
value="ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)" />
|
|
<parameter name="ST_CHANNEL_W" value="16" />
|
|
<parameter name="AUTO_CLK_CLOCK_RATE" value="50000000" />
|
|
<parameter name="VALID_WIDTH" value="16" />
|
|
<parameter name="AUTO_DEVICE_FAMILY" value="MAX 10" />
|
|
<parameter name="ST_DATA_W" value="97" />
|
|
<parameter name="NUM_OUTPUTS" value="16" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_cmd_demux.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys_mm_interconnect_0" as="cmd_demux" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 76 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_cmd_demux"</message>
|
|
<message level="Info" culprit="cmd_demux"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_demultiplexer</b> "<b>cmd_demux</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_merlin_demultiplexer:16.1:AUTO_CLK_CLOCK_RATE=50000000,AUTO_DEVICE_FAMILY=MAX 10,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_OUTPUTS=2,ST_CHANNEL_W=16,ST_DATA_W=97,VALID_WIDTH=16"
|
|
instancePathKey="Qsys:.:mm_interconnect_0:.:cmd_demux_001"
|
|
kind="altera_merlin_demultiplexer"
|
|
version="16.1"
|
|
name="Qsys_mm_interconnect_0_cmd_demux_001">
|
|
<parameter
|
|
name="MERLIN_PACKET_FORMAT"
|
|
value="ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)" />
|
|
<parameter name="ST_CHANNEL_W" value="16" />
|
|
<parameter name="AUTO_CLK_CLOCK_RATE" value="50000000" />
|
|
<parameter name="VALID_WIDTH" value="16" />
|
|
<parameter name="AUTO_DEVICE_FAMILY" value="MAX 10" />
|
|
<parameter name="ST_DATA_W" value="97" />
|
|
<parameter name="NUM_OUTPUTS" value="2" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_cmd_demux_001.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys_mm_interconnect_0" as="cmd_demux_001" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 75 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_cmd_demux_001"</message>
|
|
<message level="Info" culprit="cmd_demux_001"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_demultiplexer</b> "<b>cmd_demux_001</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_merlin_multiplexer:16.1:ARBITRATION_SCHEME=round-robin,ARBITRATION_SHARES=1,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_INPUTS=1,PIPELINE_ARB=1,PKT_TRANS_LOCK=59,ST_CHANNEL_W=16,ST_DATA_W=97,USE_EXTERNAL_ARB=0"
|
|
instancePathKey="Qsys:.:mm_interconnect_0:.:cmd_mux"
|
|
kind="altera_merlin_multiplexer"
|
|
version="16.1"
|
|
name="Qsys_mm_interconnect_0_cmd_mux">
|
|
<parameter
|
|
name="MERLIN_PACKET_FORMAT"
|
|
value="ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)" />
|
|
<parameter name="ST_CHANNEL_W" value="16" />
|
|
<parameter name="ARBITRATION_SHARES" value="1" />
|
|
<parameter name="NUM_INPUTS" value="1" />
|
|
<parameter name="PIPELINE_ARB" value="1" />
|
|
<parameter name="ARBITRATION_SCHEME" value="round-robin" />
|
|
<parameter name="ST_DATA_W" value="97" />
|
|
<parameter name="USE_EXTERNAL_ARB" value="0" />
|
|
<parameter name="PKT_TRANS_LOCK" value="59" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_cmd_mux.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator
|
|
instantiator="Qsys_mm_interconnect_0"
|
|
as="cmd_mux,cmd_mux_001,cmd_mux_002,cmd_mux_003,cmd_mux_005,cmd_mux_006,cmd_mux_008,cmd_mux_009,cmd_mux_010,cmd_mux_011,cmd_mux_012,cmd_mux_013,cmd_mux_014,cmd_mux_015" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 74 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_cmd_mux"</message>
|
|
<message level="Info" culprit="cmd_mux"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_multiplexer</b> "<b>cmd_mux</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_merlin_multiplexer:16.1:ARBITRATION_SCHEME=round-robin,ARBITRATION_SHARES=1,1,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_INPUTS=2,PIPELINE_ARB=1,PKT_TRANS_LOCK=59,ST_CHANNEL_W=16,ST_DATA_W=97,USE_EXTERNAL_ARB=0"
|
|
instancePathKey="Qsys:.:mm_interconnect_0:.:cmd_mux_004"
|
|
kind="altera_merlin_multiplexer"
|
|
version="16.1"
|
|
name="Qsys_mm_interconnect_0_cmd_mux_004">
|
|
<parameter
|
|
name="MERLIN_PACKET_FORMAT"
|
|
value="ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)" />
|
|
<parameter name="ST_CHANNEL_W" value="16" />
|
|
<parameter name="ARBITRATION_SHARES" value="1,1" />
|
|
<parameter name="NUM_INPUTS" value="2" />
|
|
<parameter name="PIPELINE_ARB" value="1" />
|
|
<parameter name="ARBITRATION_SCHEME" value="round-robin" />
|
|
<parameter name="ST_DATA_W" value="97" />
|
|
<parameter name="USE_EXTERNAL_ARB" value="0" />
|
|
<parameter name="PKT_TRANS_LOCK" value="59" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_cmd_mux_004.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys_mm_interconnect_0" as="cmd_mux_004,cmd_mux_007" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 70 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_cmd_mux_004"</message>
|
|
<message level="Info" culprit="cmd_mux_004"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_multiplexer</b> "<b>cmd_mux_004</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv</b>]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_merlin_demultiplexer:16.1:AUTO_CLK_CLOCK_RATE=50000000,AUTO_DEVICE_FAMILY=MAX 10,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_OUTPUTS=1,ST_CHANNEL_W=16,ST_DATA_W=97,VALID_WIDTH=1"
|
|
instancePathKey="Qsys:.:mm_interconnect_0:.:rsp_demux"
|
|
kind="altera_merlin_demultiplexer"
|
|
version="16.1"
|
|
name="Qsys_mm_interconnect_0_rsp_demux">
|
|
<parameter
|
|
name="MERLIN_PACKET_FORMAT"
|
|
value="ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)" />
|
|
<parameter name="ST_CHANNEL_W" value="16" />
|
|
<parameter name="AUTO_CLK_CLOCK_RATE" value="50000000" />
|
|
<parameter name="VALID_WIDTH" value="1" />
|
|
<parameter name="AUTO_DEVICE_FAMILY" value="MAX 10" />
|
|
<parameter name="ST_DATA_W" value="97" />
|
|
<parameter name="NUM_OUTPUTS" value="1" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_rsp_demux.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator
|
|
instantiator="Qsys_mm_interconnect_0"
|
|
as="rsp_demux,rsp_demux_001,rsp_demux_002,rsp_demux_003,rsp_demux_006,rsp_demux_008,rsp_demux_009,rsp_demux_010,rsp_demux_011,rsp_demux_012,rsp_demux_013,rsp_demux_015" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 58 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux"</message>
|
|
<message level="Info" culprit="rsp_demux"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_demultiplexer</b> "<b>rsp_demux</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_merlin_demultiplexer:16.1:AUTO_CLK_CLOCK_RATE=50000000,AUTO_DEVICE_FAMILY=MAX 10,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_OUTPUTS=2,ST_CHANNEL_W=16,ST_DATA_W=97,VALID_WIDTH=1"
|
|
instancePathKey="Qsys:.:mm_interconnect_0:.:rsp_demux_004"
|
|
kind="altera_merlin_demultiplexer"
|
|
version="16.1"
|
|
name="Qsys_mm_interconnect_0_rsp_demux_004">
|
|
<parameter
|
|
name="MERLIN_PACKET_FORMAT"
|
|
value="ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)" />
|
|
<parameter name="ST_CHANNEL_W" value="16" />
|
|
<parameter name="AUTO_CLK_CLOCK_RATE" value="50000000" />
|
|
<parameter name="VALID_WIDTH" value="1" />
|
|
<parameter name="AUTO_DEVICE_FAMILY" value="MAX 10" />
|
|
<parameter name="ST_DATA_W" value="97" />
|
|
<parameter name="NUM_OUTPUTS" value="2" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_rsp_demux_004.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator
|
|
instantiator="Qsys_mm_interconnect_0"
|
|
as="rsp_demux_004,rsp_demux_007" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 54 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux_004"</message>
|
|
<message level="Info" culprit="rsp_demux_004"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_demultiplexer</b> "<b>rsp_demux_004</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_merlin_demultiplexer:16.1:AUTO_CLK_CLOCK_RATE=100000000,AUTO_DEVICE_FAMILY=MAX 10,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_OUTPUTS=1,ST_CHANNEL_W=16,ST_DATA_W=97,VALID_WIDTH=1"
|
|
instancePathKey="Qsys:.:mm_interconnect_0:.:rsp_demux_005"
|
|
kind="altera_merlin_demultiplexer"
|
|
version="16.1"
|
|
name="Qsys_mm_interconnect_0_rsp_demux_005">
|
|
<parameter
|
|
name="MERLIN_PACKET_FORMAT"
|
|
value="ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)" />
|
|
<parameter name="ST_CHANNEL_W" value="16" />
|
|
<parameter name="AUTO_CLK_CLOCK_RATE" value="100000000" />
|
|
<parameter name="VALID_WIDTH" value="1" />
|
|
<parameter name="AUTO_DEVICE_FAMILY" value="MAX 10" />
|
|
<parameter name="ST_DATA_W" value="97" />
|
|
<parameter name="NUM_OUTPUTS" value="1" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_rsp_demux_005.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator
|
|
instantiator="Qsys_mm_interconnect_0"
|
|
as="rsp_demux_005,rsp_demux_014" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 53 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux_005"</message>
|
|
<message level="Info" culprit="rsp_demux_005"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_demultiplexer</b> "<b>rsp_demux_005</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_merlin_multiplexer:16.1:ARBITRATION_SCHEME=no-arb,ARBITRATION_SHARES=1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_INPUTS=16,PIPELINE_ARB=0,PKT_TRANS_LOCK=59,ST_CHANNEL_W=16,ST_DATA_W=97,USE_EXTERNAL_ARB=0"
|
|
instancePathKey="Qsys:.:mm_interconnect_0:.:rsp_mux"
|
|
kind="altera_merlin_multiplexer"
|
|
version="16.1"
|
|
name="Qsys_mm_interconnect_0_rsp_mux">
|
|
<parameter
|
|
name="MERLIN_PACKET_FORMAT"
|
|
value="ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)" />
|
|
<parameter name="ST_CHANNEL_W" value="16" />
|
|
<parameter name="ARBITRATION_SHARES" value="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" />
|
|
<parameter name="NUM_INPUTS" value="16" />
|
|
<parameter name="PIPELINE_ARB" value="0" />
|
|
<parameter name="ARBITRATION_SCHEME" value="no-arb" />
|
|
<parameter name="ST_DATA_W" value="97" />
|
|
<parameter name="USE_EXTERNAL_ARB" value="0" />
|
|
<parameter name="PKT_TRANS_LOCK" value="59" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_rsp_mux.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys_mm_interconnect_0" as="rsp_mux" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 42 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_rsp_mux"</message>
|
|
<message level="Info" culprit="rsp_mux"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_multiplexer</b> "<b>rsp_mux</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv</b>]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_merlin_multiplexer:16.1:ARBITRATION_SCHEME=no-arb,ARBITRATION_SHARES=1,1,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),NUM_INPUTS=2,PIPELINE_ARB=0,PKT_TRANS_LOCK=59,ST_CHANNEL_W=16,ST_DATA_W=97,USE_EXTERNAL_ARB=0"
|
|
instancePathKey="Qsys:.:mm_interconnect_0:.:rsp_mux_001"
|
|
kind="altera_merlin_multiplexer"
|
|
version="16.1"
|
|
name="Qsys_mm_interconnect_0_rsp_mux_001">
|
|
<parameter
|
|
name="MERLIN_PACKET_FORMAT"
|
|
value="ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)" />
|
|
<parameter name="ST_CHANNEL_W" value="16" />
|
|
<parameter name="ARBITRATION_SHARES" value="1,1" />
|
|
<parameter name="NUM_INPUTS" value="2" />
|
|
<parameter name="PIPELINE_ARB" value="0" />
|
|
<parameter name="ARBITRATION_SCHEME" value="no-arb" />
|
|
<parameter name="ST_DATA_W" value="97" />
|
|
<parameter name="USE_EXTERNAL_ARB" value="0" />
|
|
<parameter name="PKT_TRANS_LOCK" value="59" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_rsp_mux_001.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys_mm_interconnect_0" as="rsp_mux_001" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 41 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_rsp_mux_001"</message>
|
|
<message level="Info" culprit="rsp_mux_001"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_merlin_multiplexer</b> "<b>rsp_mux_001</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv</b>]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_avalon_st_handshake_clock_crosser:16.1:AUTO_IN_CLK_CLOCK_RATE=50000000,AUTO_OUT_CLK_CLOCK_RATE=100000000,BITS_PER_SYMBOL=97,CHANNEL_WIDTH=16,DATA_WIDTH=97,ERROR_WIDTH=1,MAX_CHANNEL=0,READY_SYNC_DEPTH=2,USE_CHANNEL=1,USE_ERROR=0,USE_OUTPUT_PIPELINE=0,USE_PACKETS=1,VALID_SYNC_DEPTH=2"
|
|
instancePathKey="Qsys:.:mm_interconnect_0:.:crosser"
|
|
kind="altera_avalon_st_handshake_clock_crosser"
|
|
version="16.1"
|
|
name="altera_avalon_st_handshake_clock_crosser">
|
|
<parameter name="AUTO_OUT_CLK_CLOCK_RATE" value="100000000" />
|
|
<parameter name="USE_PACKETS" value="1" />
|
|
<parameter name="BITS_PER_SYMBOL" value="97" />
|
|
<parameter name="MAX_CHANNEL" value="0" />
|
|
<parameter name="ERROR_WIDTH" value="1" />
|
|
<parameter name="AUTO_IN_CLK_CLOCK_RATE" value="50000000" />
|
|
<parameter name="USE_ERROR" value="0" />
|
|
<parameter name="CHANNEL_WIDTH" value="16" />
|
|
<parameter name="USE_CHANNEL" value="1" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_handshake_clock_crosser.v"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_clock_crosser.v"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_pipeline_base.v"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_std_synchronizer_nocut.v"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_handshake_clock_crosser.sdc"
|
|
type="SDC"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_handshake_clock_crosser/altera_avalon_st_handshake_clock_crosser_hw.tcl" />
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_handshake_clock_crosser/altera_avalon_st_handshake_clock_crosser.v" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator
|
|
instantiator="Qsys_mm_interconnect_0"
|
|
as="crosser,crosser_001,crosser_002,crosser_003" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 40 starting:altera_avalon_st_handshake_clock_crosser "submodules/altera_avalon_st_handshake_clock_crosser"</message>
|
|
<message level="Info" culprit="crosser"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_avalon_st_handshake_clock_crosser</b> "<b>crosser</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_pipeline_base.v</b>]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_avalon_st_adapter:16.1:AUTO_DEVICE=10M50DAF484C7G,AUTO_DEVICE_FAMILY=MAX 10,AUTO_DEVICE_SPEEDGRADE=,inBitsPerSymbol=34,inChannelWidth=0,inDataWidth=34,inEmptyWidth=1,inErrorDescriptor=,inErrorWidth=0,inMaxChannel=0,inReadyLatency=0,inUseEmptyPort=0,inUsePackets=0,inUseReady=1,inUseValid=1,outChannelWidth=0,outDataWidth=34,outEmptyWidth=1,outErrorDescriptor=,outErrorWidth=1,outMaxChannel=0,outReadyLatency=0,outUseEmptyPort=0,outUseReady=1,outUseValid=1(altera_clock_bridge:16.1:DERIVED_CLOCK_RATE=0,EXPLICIT_CLOCK_RATE=0,NUM_CLOCK_OUTPUTS=1)(altera_reset_bridge:16.1:ACTIVE_LOW_RESET=0,AUTO_CLK_CLOCK_RATE=0,NUM_RESET_OUTPUTS=1,SYNCHRONOUS_EDGES=deassert,USE_RESET_REQUEST=0)(error_adapter:16.1:inBitsPerSymbol=34,inChannelWidth=0,inErrorDescriptor=,inErrorWidth=0,inMaxChannel=0,inReadyLatency=0,inSymbolsPerBeat=1,inUseEmpty=false,inUseEmptyPort=NO,inUsePackets=false,inUseReady=true,outErrorDescriptor=,outErrorWidth=1)(clock:16.1:)(clock:16.1:)(reset:16.1:)"
|
|
instancePathKey="Qsys:.:mm_interconnect_0:.:avalon_st_adapter"
|
|
kind="altera_avalon_st_adapter"
|
|
version="16.1"
|
|
name="Qsys_mm_interconnect_0_avalon_st_adapter">
|
|
<parameter name="inUseValid" value="1" />
|
|
<parameter name="inBitsPerSymbol" value="34" />
|
|
<parameter name="outUseEmptyPort" value="0" />
|
|
<parameter name="inChannelWidth" value="0" />
|
|
<parameter name="outErrorWidth" value="1" />
|
|
<parameter name="outUseValid" value="1" />
|
|
<parameter name="outMaxChannel" value="0" />
|
|
<parameter name="inErrorDescriptor" value="" />
|
|
<parameter name="inUsePackets" value="0" />
|
|
<parameter name="inErrorWidth" value="0" />
|
|
<parameter name="inEmptyWidth" value="1" />
|
|
<parameter name="inUseReady" value="1" />
|
|
<parameter name="outReadyLatency" value="0" />
|
|
<parameter name="AUTO_DEVICE_FAMILY" value="MAX 10" />
|
|
<parameter name="outDataWidth" value="34" />
|
|
<parameter name="AUTO_DEVICE_SPEEDGRADE" value="" />
|
|
<parameter name="inUseEmptyPort" value="0" />
|
|
<parameter name="outChannelWidth" value="0" />
|
|
<parameter name="inMaxChannel" value="0" />
|
|
<parameter name="outUseReady" value="1" />
|
|
<parameter name="inReadyLatency" value="0" />
|
|
<parameter name="AUTO_DEVICE" value="10M50DAF484C7G" />
|
|
<parameter name="inDataWidth" value="34" />
|
|
<parameter name="outErrorDescriptor" value="" />
|
|
<parameter name="outEmptyWidth" value="1" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_avalon_st_adapter.v"
|
|
type="VERILOG" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_avalon_st_adapter_error_adapter_0.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
</childGeneratedFiles>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_adapter/altera_avalon_st_adapter_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_error_adapter/avalon-st_error_adapter_hw.tcl" />
|
|
</childSourceFiles>
|
|
<instantiator
|
|
instantiator="Qsys_mm_interconnect_0"
|
|
as="avalon_st_adapter,avalon_st_adapter_001,avalon_st_adapter_002,avalon_st_adapter_003,avalon_st_adapter_004,avalon_st_adapter_005,avalon_st_adapter_006,avalon_st_adapter_007,avalon_st_adapter_008,avalon_st_adapter_009,avalon_st_adapter_010,avalon_st_adapter_011,avalon_st_adapter_012,avalon_st_adapter_013,avalon_st_adapter_014,avalon_st_adapter_015" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 36 starting:altera_avalon_st_adapter "submodules/Qsys_mm_interconnect_0_avalon_st_adapter"</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Debug">Transform: CustomInstructionTransform</message>
|
|
<message level="Debug">No custom instruction connections, skipping transform </message>
|
|
<message level="Debug" culprit="merlin_custom_instruction_transform"><![CDATA[After transform: <b>3</b> modules, <b>3</b> connections]]></message>
|
|
<message level="Debug">Transform: MMTransform</message>
|
|
<message level="Debug">Transform: InterruptMapperTransform</message>
|
|
<message level="Debug">Transform: InterruptSyncTransform</message>
|
|
<message level="Debug">Transform: InterruptFanoutTransform</message>
|
|
<message level="Debug">Transform: AvalonStreamingTransform</message>
|
|
<message level="Debug">Transform: ResetAdaptation</message>
|
|
<message level="Debug" culprit="avalon_st_adapter"><![CDATA["<b>avalon_st_adapter</b>" reuses <b>error_adapter</b> "<b>submodules/Qsys_mm_interconnect_0_avalon_st_adapter_error_adapter_0</b>"]]></message>
|
|
<message level="Info" culprit="avalon_st_adapter"><![CDATA["<b>mm_interconnect_0</b>" instantiated <b>altera_avalon_st_adapter</b> "<b>avalon_st_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 1 starting:error_adapter "submodules/Qsys_mm_interconnect_0_avalon_st_adapter_error_adapter_0"</message>
|
|
<message level="Info" culprit="error_adapter_0"><![CDATA["<b>avalon_st_adapter</b>" instantiated <b>error_adapter</b> "<b>error_adapter_0</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_merlin_router:16.1:CHANNEL_ID=1,DECODER_TYPE=0,DEFAULT_CHANNEL=0,DEFAULT_DESTID=0,DEFAULT_RD_CHANNEL=-1,DEFAULT_WR_CHANNEL=-1,DESTINATION_ID=0,END_ADDRESS=0x8000000,MEMORY_ALIASING_DECODE=0,MERLIN_PACKET_FORMAT=ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0),NON_SECURED_TAG=1,PKT_ADDR_H=67,PKT_ADDR_L=36,PKT_DEST_ID_H=90,PKT_DEST_ID_L=90,PKT_PROTECTION_H=94,PKT_PROTECTION_L=92,PKT_TRANS_READ=71,PKT_TRANS_WRITE=70,SECURED_RANGE_LIST=0,SECURED_RANGE_PAIRS=0,SLAVES_INFO=0:1:0x4000000:0x8000000:both:1:0:0:1,SPAN_OFFSET=,START_ADDRESS=0x4000000,ST_CHANNEL_W=2,ST_DATA_W=104,TYPE_OF_TRANSACTION=both"
|
|
instancePathKey="Qsys:.:mm_interconnect_1:.:router"
|
|
kind="altera_merlin_router"
|
|
version="16.1"
|
|
name="Qsys_mm_interconnect_1_router">
|
|
<parameter name="ST_CHANNEL_W" value="2" />
|
|
<parameter name="DEFAULT_WR_CHANNEL" value="-1" />
|
|
<parameter name="PKT_TRANS_READ" value="71" />
|
|
<parameter name="START_ADDRESS" value="0x4000000" />
|
|
<parameter name="DEFAULT_CHANNEL" value="0" />
|
|
<parameter name="MEMORY_ALIASING_DECODE" value="0" />
|
|
<parameter name="SLAVES_INFO" value="0:1:0x4000000:0x8000000:both:1:0:0:1" />
|
|
<parameter name="DEFAULT_RD_CHANNEL" value="-1" />
|
|
<parameter name="PKT_ADDR_H" value="67" />
|
|
<parameter name="PKT_DEST_ID_H" value="90" />
|
|
<parameter name="PKT_ADDR_L" value="36" />
|
|
<parameter name="PKT_DEST_ID_L" value="90" />
|
|
<parameter
|
|
name="MERLIN_PACKET_FORMAT"
|
|
value="ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)" />
|
|
<parameter name="CHANNEL_ID" value="1" />
|
|
<parameter name="TYPE_OF_TRANSACTION" value="both" />
|
|
<parameter name="SECURED_RANGE_PAIRS" value="0" />
|
|
<parameter name="SPAN_OFFSET" value="" />
|
|
<parameter name="ST_DATA_W" value="104" />
|
|
<parameter name="SECURED_RANGE_LIST" value="0" />
|
|
<parameter name="DECODER_TYPE" value="0" />
|
|
<parameter name="PKT_PROTECTION_H" value="94" />
|
|
<parameter name="END_ADDRESS" value="0x8000000" />
|
|
<parameter name="PKT_PROTECTION_L" value="92" />
|
|
<parameter name="PKT_TRANS_WRITE" value="70" />
|
|
<parameter name="DEFAULT_DESTID" value="0" />
|
|
<parameter name="DESTINATION_ID" value="0" />
|
|
<parameter name="NON_SECURED_TAG" value="1" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_1_router.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys_mm_interconnect_1" as="router,router_001" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 13 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_1_router"</message>
|
|
<message level="Info" culprit="router"><![CDATA["<b>mm_interconnect_1</b>" instantiated <b>altera_merlin_router</b> "<b>router</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_merlin_router:16.1:CHANNEL_ID=01,10,DECODER_TYPE=1,DEFAULT_CHANNEL=0,DEFAULT_DESTID=0,DEFAULT_RD_CHANNEL=-1,DEFAULT_WR_CHANNEL=-1,DESTINATION_ID=0,1,END_ADDRESS=0x0,0x0,MEMORY_ALIASING_DECODE=0,MERLIN_PACKET_FORMAT=ori_burst_size(85:83) response_status(82:81) cache(80:77) protection(76:74) thread_id(73) dest_id(72) src_id(71) qos(70) begin_burst(69) data_sideband(68) addr_sideband(67) burst_type(66:65) burst_size(64:62) burstwrap(61) byte_cnt(60:56) trans_exclusive(55) trans_lock(54) trans_read(53) trans_write(52) trans_posted(51) trans_compressed_read(50) addr(49:18) byteen(17:16) data(15:0),NON_SECURED_TAG=1,1,PKT_ADDR_H=49,PKT_ADDR_L=18,PKT_DEST_ID_H=72,PKT_DEST_ID_L=72,PKT_PROTECTION_H=76,PKT_PROTECTION_L=74,PKT_TRANS_READ=53,PKT_TRANS_WRITE=52,SECURED_RANGE_LIST=0,0,SECURED_RANGE_PAIRS=0,0,SLAVES_INFO=0:01:0x0:0x0:read:1:0:0:1,1:10:0x0:0x0:write:1:0:0:1,SPAN_OFFSET=,START_ADDRESS=0x0,0x0,ST_CHANNEL_W=2,ST_DATA_W=86,TYPE_OF_TRANSACTION=read,write"
|
|
instancePathKey="Qsys:.:mm_interconnect_1:.:router_002"
|
|
kind="altera_merlin_router"
|
|
version="16.1"
|
|
name="Qsys_mm_interconnect_1_router_002">
|
|
<parameter name="ST_CHANNEL_W" value="2" />
|
|
<parameter name="DEFAULT_WR_CHANNEL" value="-1" />
|
|
<parameter name="PKT_TRANS_READ" value="53" />
|
|
<parameter name="START_ADDRESS" value="0x0,0x0" />
|
|
<parameter name="DEFAULT_CHANNEL" value="0" />
|
|
<parameter name="MEMORY_ALIASING_DECODE" value="0" />
|
|
<parameter
|
|
name="SLAVES_INFO"
|
|
value="0:01:0x0:0x0:read:1:0:0:1,1:10:0x0:0x0:write:1:0:0:1" />
|
|
<parameter name="DEFAULT_RD_CHANNEL" value="-1" />
|
|
<parameter name="PKT_ADDR_H" value="49" />
|
|
<parameter name="PKT_DEST_ID_H" value="72" />
|
|
<parameter name="PKT_ADDR_L" value="18" />
|
|
<parameter name="PKT_DEST_ID_L" value="72" />
|
|
<parameter
|
|
name="MERLIN_PACKET_FORMAT"
|
|
value="ori_burst_size(85:83) response_status(82:81) cache(80:77) protection(76:74) thread_id(73) dest_id(72) src_id(71) qos(70) begin_burst(69) data_sideband(68) addr_sideband(67) burst_type(66:65) burst_size(64:62) burstwrap(61) byte_cnt(60:56) trans_exclusive(55) trans_lock(54) trans_read(53) trans_write(52) trans_posted(51) trans_compressed_read(50) addr(49:18) byteen(17:16) data(15:0)" />
|
|
<parameter name="CHANNEL_ID" value="01,10" />
|
|
<parameter name="TYPE_OF_TRANSACTION" value="read,write" />
|
|
<parameter name="SECURED_RANGE_PAIRS" value="0,0" />
|
|
<parameter name="SPAN_OFFSET" value="" />
|
|
<parameter name="ST_DATA_W" value="86" />
|
|
<parameter name="SECURED_RANGE_LIST" value="0,0" />
|
|
<parameter name="DECODER_TYPE" value="1" />
|
|
<parameter name="PKT_PROTECTION_H" value="76" />
|
|
<parameter name="END_ADDRESS" value="0x0,0x0" />
|
|
<parameter name="PKT_PROTECTION_L" value="74" />
|
|
<parameter name="PKT_TRANS_WRITE" value="52" />
|
|
<parameter name="DEFAULT_DESTID" value="0" />
|
|
<parameter name="DESTINATION_ID" value="0,1" />
|
|
<parameter name="NON_SECURED_TAG" value="1,1" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_1_router_002.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys_mm_interconnect_1" as="router_002" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 11 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_1_router_002"</message>
|
|
<message level="Info" culprit="router_002"><![CDATA["<b>mm_interconnect_1</b>" instantiated <b>altera_merlin_router</b> "<b>router_002</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_merlin_burst_adapter:16.1:ADAPTER_VERSION=13.1,BURSTWRAP_CONST_MASK=1,BURSTWRAP_CONST_VALUE=1,BYTEENABLE_SYNTHESIS=1,COMPRESSED_READ_SUPPORT=1,INCOMPLETE_WRAP_SUPPORT=0,IN_NARROW_SIZE=0,MERLIN_PACKET_FORMAT=ori_burst_size(85:83) response_status(82:81) cache(80:77) protection(76:74) thread_id(73) dest_id(72) src_id(71) qos(70) begin_burst(69) data_sideband(68) addr_sideband(67) burst_type(66:65) burst_size(64:62) burstwrap(61) byte_cnt(60:56) trans_exclusive(55) trans_lock(54) trans_read(53) trans_write(52) trans_posted(51) trans_compressed_read(50) addr(49:18) byteen(17:16) data(15:0),NO_WRAP_SUPPORT=0,OUT_BURSTWRAP_H=61,OUT_BYTE_CNT_H=57,OUT_COMPLETE_WRAP=0,OUT_FIXED=0,OUT_NARROW_SIZE=0,PIPE_INPUTS=0,PKT_ADDR_H=49,PKT_ADDR_L=18,PKT_BEGIN_BURST=69,PKT_BURSTWRAP_H=61,PKT_BURSTWRAP_L=61,PKT_BURST_SIZE_H=64,PKT_BURST_SIZE_L=62,PKT_BURST_TYPE_H=66,PKT_BURST_TYPE_L=65,PKT_BYTEEN_H=17,PKT_BYTEEN_L=16,PKT_BYTE_CNT_H=60,PKT_BYTE_CNT_L=56,PKT_TRANS_COMPRESSED_READ=50,PKT_TRANS_READ=53,PKT_TRANS_WRITE=52,ST_CHANNEL_W=2,ST_DATA_W=86"
|
|
instancePathKey="Qsys:.:mm_interconnect_1:.:sdram_s1_burst_adapter"
|
|
kind="altera_merlin_burst_adapter"
|
|
version="16.1"
|
|
name="altera_merlin_burst_adapter">
|
|
<parameter
|
|
name="MERLIN_PACKET_FORMAT"
|
|
value="ori_burst_size(85:83) response_status(82:81) cache(80:77) protection(76:74) thread_id(73) dest_id(72) src_id(71) qos(70) begin_burst(69) data_sideband(68) addr_sideband(67) burst_type(66:65) burst_size(64:62) burstwrap(61) byte_cnt(60:56) trans_exclusive(55) trans_lock(54) trans_read(53) trans_write(52) trans_posted(51) trans_compressed_read(50) addr(49:18) byteen(17:16) data(15:0)" />
|
|
<parameter name="PKT_TRANS_COMPRESSED_READ" value="50" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_burst_adapter.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_burst_adapter_uncmpr.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_burst_adapter_13_1.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_burst_adapter_new.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_incr_burst_converter.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_wrap_burst_converter.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_default_burst_converter.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_address_alignment.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_pipeline_stage.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_pipeline_base.v"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_burst_adapter/altera_merlin_burst_adapter_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys_mm_interconnect_1" as="sdram_s1_burst_adapter" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 10 starting:altera_merlin_burst_adapter "submodules/altera_merlin_burst_adapter"</message>
|
|
<message level="Info" culprit="sdram_s1_burst_adapter"><![CDATA["<b>mm_interconnect_1</b>" instantiated <b>altera_merlin_burst_adapter</b> "<b>sdram_s1_burst_adapter</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_pipeline_base.v</b>]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_merlin_demultiplexer:16.1:AUTO_CLK_CLOCK_RATE=100000000,AUTO_DEVICE_FAMILY=MAX 10,MERLIN_PACKET_FORMAT=ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0),NUM_OUTPUTS=1,ST_CHANNEL_W=2,ST_DATA_W=104,VALID_WIDTH=1"
|
|
instancePathKey="Qsys:.:mm_interconnect_1:.:cmd_demux"
|
|
kind="altera_merlin_demultiplexer"
|
|
version="16.1"
|
|
name="Qsys_mm_interconnect_1_cmd_demux">
|
|
<parameter
|
|
name="MERLIN_PACKET_FORMAT"
|
|
value="ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)" />
|
|
<parameter name="ST_CHANNEL_W" value="2" />
|
|
<parameter name="AUTO_CLK_CLOCK_RATE" value="100000000" />
|
|
<parameter name="VALID_WIDTH" value="1" />
|
|
<parameter name="AUTO_DEVICE_FAMILY" value="MAX 10" />
|
|
<parameter name="ST_DATA_W" value="104" />
|
|
<parameter name="NUM_OUTPUTS" value="1" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_1_cmd_demux.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys_mm_interconnect_1" as="cmd_demux,cmd_demux_001" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 9 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_1_cmd_demux"</message>
|
|
<message level="Info" culprit="cmd_demux"><![CDATA["<b>mm_interconnect_1</b>" instantiated <b>altera_merlin_demultiplexer</b> "<b>cmd_demux</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_merlin_multiplexer:16.1:ARBITRATION_SCHEME=round-robin,ARBITRATION_SHARES=50,30,MERLIN_PACKET_FORMAT=ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0),NUM_INPUTS=2,PIPELINE_ARB=1,PKT_TRANS_LOCK=72,ST_CHANNEL_W=2,ST_DATA_W=104,USE_EXTERNAL_ARB=0"
|
|
instancePathKey="Qsys:.:mm_interconnect_1:.:cmd_mux"
|
|
kind="altera_merlin_multiplexer"
|
|
version="16.1"
|
|
name="Qsys_mm_interconnect_1_cmd_mux">
|
|
<parameter
|
|
name="MERLIN_PACKET_FORMAT"
|
|
value="ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)" />
|
|
<parameter name="ST_CHANNEL_W" value="2" />
|
|
<parameter name="ARBITRATION_SHARES" value="50,30" />
|
|
<parameter name="NUM_INPUTS" value="2" />
|
|
<parameter name="PIPELINE_ARB" value="1" />
|
|
<parameter name="ARBITRATION_SCHEME" value="round-robin" />
|
|
<parameter name="ST_DATA_W" value="104" />
|
|
<parameter name="USE_EXTERNAL_ARB" value="0" />
|
|
<parameter name="PKT_TRANS_LOCK" value="72" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_1_cmd_mux.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys_mm_interconnect_1" as="cmd_mux" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 7 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_1_cmd_mux"</message>
|
|
<message level="Info" culprit="cmd_mux"><![CDATA["<b>mm_interconnect_1</b>" instantiated <b>altera_merlin_multiplexer</b> "<b>cmd_mux</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv</b>]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_merlin_demultiplexer:16.1:AUTO_CLK_CLOCK_RATE=100000000,AUTO_DEVICE_FAMILY=MAX 10,MERLIN_PACKET_FORMAT=ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0),NUM_OUTPUTS=2,ST_CHANNEL_W=2,ST_DATA_W=104,VALID_WIDTH=1"
|
|
instancePathKey="Qsys:.:mm_interconnect_1:.:rsp_demux"
|
|
kind="altera_merlin_demultiplexer"
|
|
version="16.1"
|
|
name="Qsys_mm_interconnect_1_rsp_demux">
|
|
<parameter
|
|
name="MERLIN_PACKET_FORMAT"
|
|
value="ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)" />
|
|
<parameter name="ST_CHANNEL_W" value="2" />
|
|
<parameter name="AUTO_CLK_CLOCK_RATE" value="100000000" />
|
|
<parameter name="VALID_WIDTH" value="1" />
|
|
<parameter name="AUTO_DEVICE_FAMILY" value="MAX 10" />
|
|
<parameter name="ST_DATA_W" value="104" />
|
|
<parameter name="NUM_OUTPUTS" value="2" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_1_rsp_demux.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys_mm_interconnect_1" as="rsp_demux" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 6 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_1_rsp_demux"</message>
|
|
<message level="Info" culprit="rsp_demux"><![CDATA["<b>mm_interconnect_1</b>" instantiated <b>altera_merlin_demultiplexer</b> "<b>rsp_demux</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_merlin_multiplexer:16.1:ARBITRATION_SCHEME=no-arb,ARBITRATION_SHARES=1,MERLIN_PACKET_FORMAT=ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0),NUM_INPUTS=1,PIPELINE_ARB=0,PKT_TRANS_LOCK=72,ST_CHANNEL_W=2,ST_DATA_W=104,USE_EXTERNAL_ARB=0"
|
|
instancePathKey="Qsys:.:mm_interconnect_1:.:rsp_mux"
|
|
kind="altera_merlin_multiplexer"
|
|
version="16.1"
|
|
name="Qsys_mm_interconnect_1_rsp_mux">
|
|
<parameter
|
|
name="MERLIN_PACKET_FORMAT"
|
|
value="ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)" />
|
|
<parameter name="ST_CHANNEL_W" value="2" />
|
|
<parameter name="ARBITRATION_SHARES" value="1" />
|
|
<parameter name="NUM_INPUTS" value="1" />
|
|
<parameter name="PIPELINE_ARB" value="0" />
|
|
<parameter name="ARBITRATION_SCHEME" value="no-arb" />
|
|
<parameter name="ST_DATA_W" value="104" />
|
|
<parameter name="USE_EXTERNAL_ARB" value="0" />
|
|
<parameter name="PKT_TRANS_LOCK" value="72" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_1_rsp_mux.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator instantiator="Qsys_mm_interconnect_1" as="rsp_mux,rsp_mux_001" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 5 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_1_rsp_mux"</message>
|
|
<message level="Info" culprit="rsp_mux"><![CDATA["<b>mm_interconnect_1</b>" instantiated <b>altera_merlin_multiplexer</b> "<b>rsp_mux</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv</b>]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_merlin_width_adapter:16.1:COMMAND_SIZE_W=3,CONSTANT_BURST_SIZE=1,ENABLE_ADDRESS_ALIGNMENT=0,IN_MERLIN_PACKET_FORMAT=ori_burst_size(85:83) response_status(82:81) cache(80:77) protection(76:74) thread_id(73) dest_id(72) src_id(71) qos(70) begin_burst(69) data_sideband(68) addr_sideband(67) burst_type(66:65) burst_size(64:62) burstwrap(61) byte_cnt(60:56) trans_exclusive(55) trans_lock(54) trans_read(53) trans_write(52) trans_posted(51) trans_compressed_read(50) addr(49:18) byteen(17:16) data(15:0),IN_PKT_ADDR_H=49,IN_PKT_ADDR_L=18,IN_PKT_BURSTWRAP_H=61,IN_PKT_BURSTWRAP_L=61,IN_PKT_BURST_SIZE_H=64,IN_PKT_BURST_SIZE_L=62,IN_PKT_BURST_TYPE_H=66,IN_PKT_BURST_TYPE_L=65,IN_PKT_BYTEEN_H=17,IN_PKT_BYTEEN_L=16,IN_PKT_BYTE_CNT_H=60,IN_PKT_BYTE_CNT_L=56,IN_PKT_DATA_H=15,IN_PKT_DATA_L=0,IN_PKT_ORI_BURST_SIZE_H=85,IN_PKT_ORI_BURST_SIZE_L=83,IN_PKT_RESPONSE_STATUS_H=82,IN_PKT_RESPONSE_STATUS_L=81,IN_PKT_TRANS_COMPRESSED_READ=50,IN_PKT_TRANS_EXCLUSIVE=55,IN_PKT_TRANS_WRITE=52,IN_ST_DATA_W=86,OPTIMIZE_FOR_RSP=0,OUT_MERLIN_PACKET_FORMAT=ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0),OUT_PKT_ADDR_H=67,OUT_PKT_ADDR_L=36,OUT_PKT_BURST_SIZE_H=82,OUT_PKT_BURST_SIZE_L=80,OUT_PKT_BURST_TYPE_H=84,OUT_PKT_BURST_TYPE_L=83,OUT_PKT_BYTEEN_H=35,OUT_PKT_BYTEEN_L=32,OUT_PKT_BYTE_CNT_H=78,OUT_PKT_BYTE_CNT_L=74,OUT_PKT_DATA_H=31,OUT_PKT_DATA_L=0,OUT_PKT_ORI_BURST_SIZE_H=103,OUT_PKT_ORI_BURST_SIZE_L=101,OUT_PKT_RESPONSE_STATUS_H=100,OUT_PKT_RESPONSE_STATUS_L=99,OUT_PKT_TRANS_COMPRESSED_READ=68,OUT_PKT_TRANS_EXCLUSIVE=73,OUT_ST_DATA_W=104,PACKING=1,RESPONSE_PATH=1,ST_CHANNEL_W=2"
|
|
instancePathKey="Qsys:.:mm_interconnect_1:.:sdram_s1_rsp_width_adapter"
|
|
kind="altera_merlin_width_adapter"
|
|
version="16.1"
|
|
name="altera_merlin_width_adapter">
|
|
<parameter name="OUT_PKT_ORI_BURST_SIZE_H" value="103" />
|
|
<parameter name="OUT_PKT_ORI_BURST_SIZE_L" value="101" />
|
|
<parameter name="IN_PKT_ORI_BURST_SIZE_H" value="85" />
|
|
<parameter
|
|
name="OUT_MERLIN_PACKET_FORMAT"
|
|
value="ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)" />
|
|
<parameter
|
|
name="IN_MERLIN_PACKET_FORMAT"
|
|
value="ori_burst_size(85:83) response_status(82:81) cache(80:77) protection(76:74) thread_id(73) dest_id(72) src_id(71) qos(70) begin_burst(69) data_sideband(68) addr_sideband(67) burst_type(66:65) burst_size(64:62) burstwrap(61) byte_cnt(60:56) trans_exclusive(55) trans_lock(54) trans_read(53) trans_write(52) trans_posted(51) trans_compressed_read(50) addr(49:18) byteen(17:16) data(15:0)" />
|
|
<parameter name="IN_PKT_ORI_BURST_SIZE_L" value="83" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_width_adapter.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_address_alignment.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_burst_uncompressor.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_width_adapter/altera_merlin_width_adapter_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator
|
|
instantiator="Qsys_mm_interconnect_1"
|
|
as="sdram_s1_rsp_width_adapter,sdram_s1_cmd_width_adapter" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 3 starting:altera_merlin_width_adapter "submodules/altera_merlin_width_adapter"</message>
|
|
<message level="Info" culprit="sdram_s1_rsp_width_adapter"><![CDATA["<b>mm_interconnect_1</b>" instantiated <b>altera_merlin_width_adapter</b> "<b>sdram_s1_rsp_width_adapter</b>"]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_address_alignment.sv</b>]]></message>
|
|
<message level="Info"><![CDATA[Reusing file <b>F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_burst_uncompressor.sv</b>]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="altera_avalon_st_adapter:16.1:AUTO_DEVICE=10M50DAF484C7G,AUTO_DEVICE_FAMILY=MAX 10,AUTO_DEVICE_SPEEDGRADE=,inBitsPerSymbol=18,inChannelWidth=0,inDataWidth=18,inEmptyWidth=1,inErrorDescriptor=,inErrorWidth=0,inMaxChannel=0,inReadyLatency=0,inUseEmptyPort=0,inUsePackets=0,inUseReady=1,inUseValid=1,outChannelWidth=0,outDataWidth=18,outEmptyWidth=1,outErrorDescriptor=,outErrorWidth=1,outMaxChannel=0,outReadyLatency=0,outUseEmptyPort=0,outUseReady=1,outUseValid=1(altera_clock_bridge:16.1:DERIVED_CLOCK_RATE=0,EXPLICIT_CLOCK_RATE=0,NUM_CLOCK_OUTPUTS=1)(altera_reset_bridge:16.1:ACTIVE_LOW_RESET=0,AUTO_CLK_CLOCK_RATE=0,NUM_RESET_OUTPUTS=1,SYNCHRONOUS_EDGES=deassert,USE_RESET_REQUEST=0)(error_adapter:16.1:inBitsPerSymbol=18,inChannelWidth=0,inErrorDescriptor=,inErrorWidth=0,inMaxChannel=0,inReadyLatency=0,inSymbolsPerBeat=1,inUseEmpty=false,inUseEmptyPort=NO,inUsePackets=false,inUseReady=true,outErrorDescriptor=,outErrorWidth=1)(clock:16.1:)(clock:16.1:)(reset:16.1:)"
|
|
instancePathKey="Qsys:.:mm_interconnect_1:.:avalon_st_adapter"
|
|
kind="altera_avalon_st_adapter"
|
|
version="16.1"
|
|
name="Qsys_mm_interconnect_1_avalon_st_adapter">
|
|
<parameter name="inUseValid" value="1" />
|
|
<parameter name="inBitsPerSymbol" value="18" />
|
|
<parameter name="outUseEmptyPort" value="0" />
|
|
<parameter name="inChannelWidth" value="0" />
|
|
<parameter name="outErrorWidth" value="1" />
|
|
<parameter name="outUseValid" value="1" />
|
|
<parameter name="outMaxChannel" value="0" />
|
|
<parameter name="inErrorDescriptor" value="" />
|
|
<parameter name="inUsePackets" value="0" />
|
|
<parameter name="inErrorWidth" value="0" />
|
|
<parameter name="inEmptyWidth" value="1" />
|
|
<parameter name="inUseReady" value="1" />
|
|
<parameter name="outReadyLatency" value="0" />
|
|
<parameter name="AUTO_DEVICE_FAMILY" value="MAX 10" />
|
|
<parameter name="outDataWidth" value="18" />
|
|
<parameter name="AUTO_DEVICE_SPEEDGRADE" value="" />
|
|
<parameter name="inUseEmptyPort" value="0" />
|
|
<parameter name="outChannelWidth" value="0" />
|
|
<parameter name="inMaxChannel" value="0" />
|
|
<parameter name="outUseReady" value="1" />
|
|
<parameter name="inReadyLatency" value="0" />
|
|
<parameter name="AUTO_DEVICE" value="10M50DAF484C7G" />
|
|
<parameter name="inDataWidth" value="18" />
|
|
<parameter name="outErrorDescriptor" value="" />
|
|
<parameter name="outEmptyWidth" value="1" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_1_avalon_st_adapter.v"
|
|
type="VERILOG" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_1_avalon_st_adapter_error_adapter_0.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
</childGeneratedFiles>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_adapter/altera_avalon_st_adapter_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_error_adapter/avalon-st_error_adapter_hw.tcl" />
|
|
</childSourceFiles>
|
|
<instantiator instantiator="Qsys_mm_interconnect_1" as="avalon_st_adapter" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 1 starting:altera_avalon_st_adapter "submodules/Qsys_mm_interconnect_1_avalon_st_adapter"</message>
|
|
<message level="Progress" culprit="min"></message>
|
|
<message level="Progress" culprit="max"></message>
|
|
<message level="Progress" culprit="current"></message>
|
|
<message level="Debug">Transform: CustomInstructionTransform</message>
|
|
<message level="Debug">No custom instruction connections, skipping transform </message>
|
|
<message level="Debug" culprit="merlin_custom_instruction_transform"><![CDATA[After transform: <b>3</b> modules, <b>3</b> connections]]></message>
|
|
<message level="Debug">Transform: MMTransform</message>
|
|
<message level="Debug">Transform: InterruptMapperTransform</message>
|
|
<message level="Debug">Transform: InterruptSyncTransform</message>
|
|
<message level="Debug">Transform: InterruptFanoutTransform</message>
|
|
<message level="Debug">Transform: AvalonStreamingTransform</message>
|
|
<message level="Debug">Transform: ResetAdaptation</message>
|
|
<message level="Debug" culprit="avalon_st_adapter"><![CDATA["<b>avalon_st_adapter</b>" reuses <b>error_adapter</b> "<b>submodules/Qsys_mm_interconnect_1_avalon_st_adapter_error_adapter_0</b>"]]></message>
|
|
<message level="Info" culprit="avalon_st_adapter"><![CDATA["<b>mm_interconnect_1</b>" instantiated <b>altera_avalon_st_adapter</b> "<b>avalon_st_adapter</b>"]]></message>
|
|
<message level="Debug" culprit="Qsys">queue size: 0 starting:error_adapter "submodules/Qsys_mm_interconnect_1_avalon_st_adapter_error_adapter_0"</message>
|
|
<message level="Info" culprit="error_adapter_0"><![CDATA["<b>avalon_st_adapter</b>" instantiated <b>error_adapter</b> "<b>error_adapter_0</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="error_adapter:16.1:inBitsPerSymbol=34,inChannelWidth=0,inErrorDescriptor=,inErrorWidth=0,inMaxChannel=0,inReadyLatency=0,inSymbolsPerBeat=1,inUseEmpty=false,inUseEmptyPort=NO,inUsePackets=false,inUseReady=true,outErrorDescriptor=,outErrorWidth=1"
|
|
instancePathKey="Qsys:.:mm_interconnect_0:.:avalon_st_adapter:.:error_adapter_0"
|
|
kind="error_adapter"
|
|
version="16.1"
|
|
name="Qsys_mm_interconnect_0_avalon_st_adapter_error_adapter_0">
|
|
<parameter name="inErrorWidth" value="0" />
|
|
<parameter name="inUseReady" value="true" />
|
|
<parameter name="inBitsPerSymbol" value="34" />
|
|
<parameter name="inChannelWidth" value="0" />
|
|
<parameter name="inSymbolsPerBeat" value="1" />
|
|
<parameter name="inUseEmptyPort" value="NO" />
|
|
<parameter name="outErrorWidth" value="1" />
|
|
<parameter name="inMaxChannel" value="0" />
|
|
<parameter name="inReadyLatency" value="0" />
|
|
<parameter name="outErrorDescriptor" value="" />
|
|
<parameter name="inUseEmpty" value="false" />
|
|
<parameter name="inErrorDescriptor" value="" />
|
|
<parameter name="inUsePackets" value="false" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_0_avalon_st_adapter_error_adapter_0.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_error_adapter/avalon-st_error_adapter_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator
|
|
instantiator="Qsys_mm_interconnect_0_avalon_st_adapter"
|
|
as="error_adapter_0" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 1 starting:error_adapter "submodules/Qsys_mm_interconnect_0_avalon_st_adapter_error_adapter_0"</message>
|
|
<message level="Info" culprit="error_adapter_0"><![CDATA["<b>avalon_st_adapter</b>" instantiated <b>error_adapter</b> "<b>error_adapter_0</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
<entity
|
|
path="submodules/"
|
|
parameterizationKey="error_adapter:16.1:inBitsPerSymbol=18,inChannelWidth=0,inErrorDescriptor=,inErrorWidth=0,inMaxChannel=0,inReadyLatency=0,inSymbolsPerBeat=1,inUseEmpty=false,inUseEmptyPort=NO,inUsePackets=false,inUseReady=true,outErrorDescriptor=,outErrorWidth=1"
|
|
instancePathKey="Qsys:.:mm_interconnect_1:.:avalon_st_adapter:.:error_adapter_0"
|
|
kind="error_adapter"
|
|
version="16.1"
|
|
name="Qsys_mm_interconnect_1_avalon_st_adapter_error_adapter_0">
|
|
<parameter name="inErrorWidth" value="0" />
|
|
<parameter name="inUseReady" value="true" />
|
|
<parameter name="inBitsPerSymbol" value="18" />
|
|
<parameter name="inChannelWidth" value="0" />
|
|
<parameter name="inSymbolsPerBeat" value="1" />
|
|
<parameter name="inUseEmptyPort" value="NO" />
|
|
<parameter name="outErrorWidth" value="1" />
|
|
<parameter name="inMaxChannel" value="0" />
|
|
<parameter name="inReadyLatency" value="0" />
|
|
<parameter name="outErrorDescriptor" value="" />
|
|
<parameter name="inUseEmpty" value="false" />
|
|
<parameter name="inErrorDescriptor" value="" />
|
|
<parameter name="inUsePackets" value="false" />
|
|
<generatedFiles>
|
|
<file
|
|
path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_mm_interconnect_1_avalon_st_adapter_error_adapter_0.sv"
|
|
type="SYSTEM_VERILOG"
|
|
attributes="" />
|
|
</generatedFiles>
|
|
<childGeneratedFiles/>
|
|
<sourceFiles>
|
|
<file
|
|
path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_error_adapter/avalon-st_error_adapter_hw.tcl" />
|
|
</sourceFiles>
|
|
<childSourceFiles/>
|
|
<instantiator
|
|
instantiator="Qsys_mm_interconnect_1_avalon_st_adapter"
|
|
as="error_adapter_0" />
|
|
<messages>
|
|
<message level="Debug" culprit="Qsys">queue size: 0 starting:error_adapter "submodules/Qsys_mm_interconnect_1_avalon_st_adapter_error_adapter_0"</message>
|
|
<message level="Info" culprit="error_adapter_0"><![CDATA["<b>avalon_st_adapter</b>" instantiated <b>error_adapter</b> "<b>error_adapter_0</b>"]]></message>
|
|
</messages>
|
|
</entity>
|
|
</deploy>
|