From 20cdb8f06e352b13a1d7853ffd9a5d4ca850f2d7 Mon Sep 17 00:00:00 2001 From: Aadi Desai Date: Tue, 1 Jun 2021 16:04:15 +0100 Subject: [PATCH 01/32] Test branch copy to move to local --- .../.qsys_edit/filters.xml | 2 +- .../.qsys_edit/preferences.xml | 2 +- .../DE10_LITE_D8M_VIP.qsf | 2 +- .../DE10_LITE_D8M_VIP.qws | Bin 2514 -> 407 bytes Vision/DE10_LITE_D8M_VIP_16/Qsys.sopcinfo | 494 ++- .../sbtWorkspace/.metadata/.lock | 0 .../sbtWorkspace/.metadata/.log | 480 +++ .../.metadata/.mylyn/repositories.xml.zip | Bin 0 -> 438 bytes .../.plugins/org.eclipse.cdt.core/.log | 2 + .../D8M_Camera_Test.1622552776633.pdom | Bin 0 -> 540672 bytes .../D8M_Camera_Test.language.settings.xml | 1469 +++++++ .../D8M_Camera_Test_bsp.1622552868714.pdom | Bin 0 -> 1159168 bytes .../D8M_Camera_Test_bsp.language.settings.xml | 2547 ++++++++++++ .../org.eclipse.cdt.make.core/specs.c | 1 + .../org.eclipse.cdt.make.core/specs.cpp | 1 + .../spec.C | 0 .../spec.c | 0 .../D8M_Camera_Test.build.log | 9 + .../D8M_Camera_Test_bsp.build.log | 129 + .../org.eclipse.cdt.ui/dialog_settings.xml | 7 + .../org.eclipse.cdt.ui/global-build.log | 61 + .../41/700f9430dec2001b1f77c40a2d51fad4 | 302 ++ .../70/707fa8e6dfc2001b1f77c40a2d51fad4 | 283 ++ .../a8/f0a55278dfc2001b1f77c40a2d51fad4 | 302 ++ .../be/d008f016dec2001b1f77c40a2d51fad4 | 301 ++ .../D8M_Camera_Test/.indexes/properties.index | Bin 0 -> 1060 bytes .../.projects/D8M_Camera_Test/.location | Bin 0 -> 140 bytes .../.projects/D8M_Camera_Test/.markers | Bin 0 -> 212 bytes .../GitProjectData.properties | 3 + .../.indexes/properties.index | Bin 0 -> 583 bytes .../.projects/D8M_Camera_Test_bsp/.location | Bin 0 -> 144 bytes .../GitProjectData.properties | 3 + .../.indexes/properties.index | Bin 0 -> 80 bytes .../GitProjectData.properties | 3 + .../.root/.indexes/history.version | 1 + .../.root/.indexes/properties.index | Bin 0 -> 104 bytes .../.root/.indexes/properties.version | 1 + .../org.eclipse.core.resources/.root/2.tree | Bin 0 -> 22679 bytes .../.safetable/org.eclipse.core.resources | Bin 0 -> 944 bytes ...eclipse.cdt.core.prj-D8M_Camera_Test.prefs | 2 + ...pse.cdt.core.prj-D8M_Camera_Test_bsp.prefs | 2 + .../org.eclipse.cdt.debug.core.prefs | 2 + .../org.eclipse.cdt.managedbuilder.core.prefs | 3 + .../.settings/org.eclipse.cdt.mylyn.ui.prefs | 2 + .../.settings/org.eclipse.cdt.ui.prefs | 5 + .../org.eclipse.core.resources.prefs | 2 + .../.settings/org.eclipse.debug.core.prefs | 5 + .../.settings/org.eclipse.debug.ui.prefs | 3 + .../.settings/org.eclipse.egit.core.prefs | 2 + .../org.eclipse.mylyn.context.core.prefs | 2 + .../org.eclipse.mylyn.monitor.ui.prefs | 2 + .../org.eclipse.mylyn.tasks.ui.prefs | 3 + .../.settings/org.eclipse.rse.core.prefs | 3 + .../.settings/org.eclipse.rse.ui.prefs | 2 + .../.settings/org.eclipse.team.cvs.ui.prefs | 2 + .../.settings/org.eclipse.team.ui.prefs | 2 + .../.settings/org.eclipse.ui.editors.prefs | 2 + .../.settings/org.eclipse.ui.ide.prefs | 6 + .../.settings/org.eclipse.ui.workbench.prefs | 2 + ...Test Nios II Hardware configuration.launch | 25 + .../launchConfigurationHistory.xml | 27 + .../org.eclipse.e4.workbench/workbench.xmi | 2114 ++++++++++ .../C/devhelp.libhover | Bin 0 -> 15858 bytes .../C/glibc_library.libhover | Bin 0 -> 1042692 bytes .../.plugins/org.eclipse.rse.core/.log | 0 ...al.core.RSELocalConnectionInitializer.mark | 0 .../FP.local.files_0/node.properties | 57 + .../PRF.ee-mill2_0/H.local_16/node.properties | 25 + .../profiles/PRF.ee-mill2_0/node.properties | 7 + .../.plugins/org.eclipse.rse.ui/.log | 0 .../dialog_settings.xml | 15 + .../org.eclipse.ui.workbench/workingsets.xml | 4 + .../sbtWorkspace/.metadata/version.ini | 1 + .../RemoteSystemsTempFiles/.project | 12 + .../software/D8M_Camera_Test/.cproject | 47 +- .../software/D8M_Camera_Test/.project | 2 +- .../.settings/language.settings.xml | 4 +- .../D8M_Camera_Test/D8M_Camera_Test.elf | Bin 503720 -> 1147529 bytes .../D8M_Camera_Test/D8M_Camera_Test.map | 3496 ++++++++--------- .../D8M_Camera_Test/D8M_Camera_Test.objdump | 3419 ++++++++-------- .../software/D8M_Camera_Test/main.c | 88 +- .../software/D8M_Camera_Test_bsp/.cproject | 47 +- .../.settings/language.settings.xml | 4 +- .../HAL/inc/sys/alt_log_printf.h | 7 +- .../D8M_Camera_Test_bsp/HAL/src/alt_load.c | 29 +- .../HAL/src/alt_log_printf.c | 4 +- .../software/D8M_Camera_Test_bsp/Makefile | 18 +- .../software/D8M_Camera_Test_bsp/mem_init.mk | 6 +- .../software/D8M_Camera_Test_bsp/public.mk | 24 +- .../software/D8M_Camera_Test_bsp/settings.bsp | 32 +- .../software/D8M_Camera_Test_bsp/summary.html | 12 +- .../software/D8M_Camera_Test_bsp/system.h | 4 +- 92 files changed, 12074 insertions(+), 3915 deletions(-) create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.lock create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.log create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.mylyn/repositories.xml.zip create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.core/.log create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.core/D8M_Camera_Test.1622552776633.pdom create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.core/D8M_Camera_Test.language.settings.xml create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.core/D8M_Camera_Test_bsp.1622552868714.pdom create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.core/D8M_Camera_Test_bsp.language.settings.xml create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.make.core/specs.c create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.make.core/specs.cpp create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.managedbuilder.core/spec.C create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.managedbuilder.core/spec.c create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.ui/D8M_Camera_Test.build.log create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.ui/D8M_Camera_Test_bsp.build.log create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.ui/dialog_settings.xml create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.ui/global-build.log create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.history/41/700f9430dec2001b1f77c40a2d51fad4 create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.history/70/707fa8e6dfc2001b1f77c40a2d51fad4 create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.history/a8/f0a55278dfc2001b1f77c40a2d51fad4 create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.history/be/d008f016dec2001b1f77c40a2d51fad4 create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.projects/D8M_Camera_Test/.indexes/properties.index create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.projects/D8M_Camera_Test/.location create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.projects/D8M_Camera_Test/.markers create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.projects/D8M_Camera_Test/org.eclipse.egit.core/GitProjectData.properties create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.projects/D8M_Camera_Test_bsp/.indexes/properties.index create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.projects/D8M_Camera_Test_bsp/.location create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.projects/D8M_Camera_Test_bsp/org.eclipse.egit.core/GitProjectData.properties create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.projects/RemoteSystemsTempFiles/.indexes/properties.index create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.projects/RemoteSystemsTempFiles/org.eclipse.egit.core/GitProjectData.properties create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.root/.indexes/history.version create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.root/.indexes/properties.index create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.root/.indexes/properties.version create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.root/2.tree create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.safetable/org.eclipse.core.resources create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.core.prj-D8M_Camera_Test.prefs create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.core.prj-D8M_Camera_Test_bsp.prefs create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.debug.core.prefs create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.managedbuilder.core.prefs create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.mylyn.ui.prefs create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.ui.prefs create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.core.resources.prefs create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.core.prefs create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.ui.prefs create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.egit.core.prefs create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.mylyn.context.core.prefs create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.mylyn.monitor.ui.prefs create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.mylyn.tasks.ui.prefs create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.rse.core.prefs create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.rse.ui.prefs create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.team.cvs.ui.prefs create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.team.ui.prefs create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.editors.prefs create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.ide.prefs create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.workbench.prefs create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.debug.core/.launches/D8M_Camera_Test Nios II Hardware configuration.launch create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.debug.ui/launchConfigurationHistory.xml create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.e4.workbench/workbench.xmi create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.linuxtools.cdt.libhover/C/devhelp.libhover create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.linuxtools.cdt.libhover/C/glibc_library.libhover create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.rse.core/.log create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.rse.core/initializerMarks/org.eclipse.rse.internal.core.RSELocalConnectionInitializer.mark create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.rse.core/profiles/PRF.ee-mill2_0/FP.local.files_0/node.properties create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.rse.core/profiles/PRF.ee-mill2_0/H.local_16/node.properties create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.rse.core/profiles/PRF.ee-mill2_0/node.properties create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.rse.ui/.log create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.ui.workbench/dialog_settings.xml create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.ui.workbench/workingsets.xml create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/version.ini create mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/RemoteSystemsTempFiles/.project diff --git a/Vision/DE10_LITE_D8M_VIP_16/.qsys_edit/filters.xml b/Vision/DE10_LITE_D8M_VIP_16/.qsys_edit/filters.xml index 5ca182d..2c6ab93 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/.qsys_edit/filters.xml +++ b/Vision/DE10_LITE_D8M_VIP_16/.qsys_edit/filters.xml @@ -1,2 +1,2 @@ - + diff --git a/Vision/DE10_LITE_D8M_VIP_16/.qsys_edit/preferences.xml b/Vision/DE10_LITE_D8M_VIP_16/.qsys_edit/preferences.xml index f64d299..ef41bac 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/.qsys_edit/preferences.xml +++ b/Vision/DE10_LITE_D8M_VIP_16/.qsys_edit/preferences.xml @@ -10,5 +10,5 @@ - + diff --git a/Vision/DE10_LITE_D8M_VIP_16/DE10_LITE_D8M_VIP.qsf b/Vision/DE10_LITE_D8M_VIP_16/DE10_LITE_D8M_VIP.qsf index f5e15d6..d52ca1a 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/DE10_LITE_D8M_VIP.qsf +++ b/Vision/DE10_LITE_D8M_VIP_16/DE10_LITE_D8M_VIP.qsf @@ -6,7 +6,7 @@ set_global_assignment -name FAMILY "MAX 10" set_global_assignment -name DEVICE 10M50DAF484C7G set_global_assignment -name TOP_LEVEL_ENTITY DE10_LITE_D8M_VIP set_global_assignment -name ORIGINAL_QUARTUS_VERSION 15.1.0 -set_global_assignment -name LAST_QUARTUS_VERSION "16.1.0 Lite Edition" +set_global_assignment -name LAST_QUARTUS_VERSION 16.0.2 set_global_assignment -name PROJECT_CREATION_TIME_DATE "15:21:37 AUGUST 23,2016" set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA set_global_assignment -name DEVICE_FILTER_PIN_COUNT 484 diff --git a/Vision/DE10_LITE_D8M_VIP_16/DE10_LITE_D8M_VIP.qws b/Vision/DE10_LITE_D8M_VIP_16/DE10_LITE_D8M_VIP.qws index 870428930ae16021944c4181aae9fa2f41c64a34..82ecf992739581253eb66876118b7d80cedfc976 100644 GIT binary patch delta 184 zcmca4Je_%hHY)=VFi!Sljj(694P^cY@&AIvKnw`Q-0_DA#Qgmq2%zH39YB#}2A}`~ z1Dgl~19QjZiHx$6AQd3BAPKNhF!p3V7D*P6;N&|T60D41mLt0eCo@n1j3=)GQVjy^ Vl0XyNA#AW&|9~3)0r`wf3;=ZjH~jzr literal 2514 zcmds&L2DCH5Xb*7M(`Mrdh#G5B?yVxHQMziY89bHk>bU}nq;>cVw*IsR*>S|v*5=N zyxW^6FM`ozBe;(=Kp3dS2Y?Z^++u}R;F0%>T9ST z(g0mYDT|Ik*Lda?sKJ^A-P96Nj4sk5{4Sc?@JwB;uqVc%&AMn(C8}d7(K2>s_hF~5 zr>uIB>jGXa74G8WZ zp|WmIsD?E&aF&hz;*2Z*Z>H|PeEi@IsqzkU-=&$aAh{z|-s6ER&wNI{SGddJ5~-<+ zngeS29*$MQI=)i7d*6550`xc-OlP>@)`$3xlPGeQ63IJ z7$_zN#0ij;>X`@QJoT`aLW{Dz?S}dEv13kblv@Wq10Zn_& zH{U*Jjqz^0$84Q!C0ylH*=YYJo9ZaHsG s{x3Dnwlncx)6%!65tW80U)d=NI@o`v1Kx-}(S%+=Zz+b2ahdY{0^ie+$N&HU diff --git a/Vision/DE10_LITE_D8M_VIP_16/Qsys.sopcinfo b/Vision/DE10_LITE_D8M_VIP_16/Qsys.sopcinfo index 865b02c..226d954 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/Qsys.sopcinfo +++ b/Vision/DE10_LITE_D8M_VIP_16/Qsys.sopcinfo @@ -1,11 +1,11 @@ - - + + java.lang.Integer - 1622141601 + 1622558600 false true false @@ -118,7 +118,7 @@ the requested settings for a module instance. --> true true - + @@ -163,7 +163,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -211,7 +211,7 @@ parameters are a RESULT of the module parameters. --> + version="16.0"> @@ -363,7 +363,7 @@ parameters are a RESULT of the module parameters. --> + version="16.0"> @@ -512,7 +512,7 @@ parameters are a RESULT of the module parameters. --> valid - + @@ -883,7 +883,7 @@ parameters are a RESULT of the module parameters. --> address - + @@ -968,7 +968,7 @@ the requested settings for a module instance. --> true true - + @@ -1013,7 +1013,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -1058,7 +1058,7 @@ parameters are a RESULT of the module parameters. --> reset_n - + @@ -1429,7 +1429,7 @@ parameters are a RESULT of the module parameters. --> address - + @@ -1578,7 +1578,7 @@ parameters are a RESULT of the module parameters. --> endofpacket - + @@ -1727,7 +1727,7 @@ parameters are a RESULT of the module parameters. --> endofpacket - + @@ -1824,7 +1824,7 @@ the requested settings for a module instance. --> true true - + @@ -1869,7 +1869,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -1914,7 +1914,7 @@ parameters are a RESULT of the module parameters. --> reset_n - + @@ -1980,7 +1980,7 @@ parameters are a RESULT of the module parameters. --> + version="16.0"> @@ -2426,7 +2426,7 @@ the requested settings for a module instance. --> true true - + @@ -2471,7 +2471,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -2516,7 +2516,7 @@ parameters are a RESULT of the module parameters. --> reset - + @@ -2665,7 +2665,7 @@ parameters are a RESULT of the module parameters. --> endofpacket - + @@ -2880,7 +2880,7 @@ the requested settings for a module instance. --> true true - + @@ -2925,7 +2925,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -2970,7 +2970,7 @@ parameters are a RESULT of the module parameters. --> reset - + @@ -3119,7 +3119,7 @@ parameters are a RESULT of the module parameters. --> endofpacket - + @@ -3268,7 +3268,7 @@ parameters are a RESULT of the module parameters. --> endofpacket - + @@ -3575,7 +3575,7 @@ parameters are a RESULT of the module parameters. --> 67108864 - + @@ -3877,7 +3877,7 @@ parameters are a RESULT of the module parameters. --> - + @@ -5220,7 +5220,7 @@ the requested settings for a module instance. --> true true - + @@ -5281,7 +5281,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -5326,7 +5326,7 @@ parameters are a RESULT of the module parameters. --> reset - + @@ -5687,7 +5687,7 @@ parameters are a RESULT of the module parameters. --> writedata - + @@ -5756,7 +5756,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -5825,7 +5825,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -5930,7 +5930,7 @@ parameters are a RESULT of the module parameters. --> alt_vip_itc_0.is_clk_rst - + @@ -5999,7 +5999,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -6068,7 +6068,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -6113,7 +6113,7 @@ parameters are a RESULT of the module parameters. --> export - + @@ -6159,7 +6159,7 @@ parameters are a RESULT of the module parameters. --> - + @@ -6212,7 +6212,7 @@ the requested settings for a module instance. --> true true - + @@ -6277,7 +6277,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -6326,7 +6326,7 @@ parameters are a RESULT of the module parameters. --> reset_n - + @@ -6473,7 +6473,7 @@ parameters are a RESULT of the module parameters. --> altpll_0.inclk_interface - + @@ -6558,7 +6558,7 @@ the requested settings for a module instance. --> true true - + @@ -6603,7 +6603,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -6648,7 +6648,7 @@ parameters are a RESULT of the module parameters. --> reset - + @@ -6699,7 +6699,7 @@ parameters are a RESULT of the module parameters. --> export - + @@ -7066,7 +7066,7 @@ parameters are a RESULT of the module parameters. --> waitrequest_n - + @@ -7167,7 +7167,7 @@ the requested settings for a module instance. --> true true - + @@ -7212,7 +7212,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -7257,7 +7257,7 @@ parameters are a RESULT of the module parameters. --> reset - + @@ -7308,7 +7308,7 @@ parameters are a RESULT of the module parameters. --> export - + @@ -7675,7 +7675,7 @@ parameters are a RESULT of the module parameters. --> waitrequest_n - + @@ -7756,7 +7756,7 @@ parameters are a RESULT of the module parameters. --> @@ -7939,7 +7939,7 @@ the requested settings for a module instance. --> true true - + @@ -8000,7 +8000,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -8045,7 +8045,7 @@ parameters are a RESULT of the module parameters. --> reset_n - + @@ -8422,7 +8422,7 @@ parameters are a RESULT of the module parameters. --> waitrequest - + @@ -8500,7 +8500,7 @@ parameters are a RESULT of the module parameters. --> - + @@ -8757,7 +8757,7 @@ the requested settings for a module instance. --> true true - + @@ -8818,7 +8818,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -8863,7 +8863,7 @@ parameters are a RESULT of the module parameters. --> reset_n - + @@ -9210,7 +9210,7 @@ parameters are a RESULT of the module parameters. --> readdata - + @@ -9256,7 +9256,7 @@ parameters are a RESULT of the module parameters. --> - + @@ -9513,7 +9513,7 @@ the requested settings for a module instance. --> true true - + @@ -9574,7 +9574,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -9619,7 +9619,7 @@ parameters are a RESULT of the module parameters. --> reset_n - + @@ -9984,7 +9984,7 @@ parameters are a RESULT of the module parameters. --> readdata - + @@ -10033,7 +10033,7 @@ parameters are a RESULT of the module parameters. --> @@ -10291,7 +10291,7 @@ the requested settings for a module instance. --> true true - + @@ -10352,7 +10352,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -10397,7 +10397,7 @@ parameters are a RESULT of the module parameters. --> reset_n - + @@ -10762,7 +10762,7 @@ parameters are a RESULT of the module parameters. --> readdata - + @@ -10811,7 +10811,7 @@ parameters are a RESULT of the module parameters. --> @@ -11069,7 +11069,7 @@ the requested settings for a module instance. --> true true - + @@ -11130,7 +11130,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -11175,7 +11175,7 @@ parameters are a RESULT of the module parameters. --> reset_n - + @@ -11540,7 +11540,7 @@ parameters are a RESULT of the module parameters. --> readdata - + @@ -11589,7 +11589,7 @@ parameters are a RESULT of the module parameters. --> @@ -11905,14 +11905,6 @@ the requested settings for a module instance. --> false true - - boolean - false - false - true - false - true - boolean false @@ -13404,7 +13396,7 @@ the requested settings for a module instance. --> java.lang.String - ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 0 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1 + ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PHYSICAL_DESIGN_PLANNER 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 0 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1 false true false @@ -13465,7 +13457,7 @@ the requested settings for a module instance. --> true true - + @@ -13526,7 +13518,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -13577,7 +13569,7 @@ parameters are a RESULT of the module parameters. --> reset_req - + @@ -14018,7 +14010,7 @@ parameters are a RESULT of the module parameters. --> 32 - + @@ -14327,7 +14319,7 @@ parameters are a RESULT of the module parameters. --> 100000 - + @@ -14424,7 +14416,7 @@ parameters are a RESULT of the module parameters. --> 3 - + @@ -14485,7 +14477,7 @@ parameters are a RESULT of the module parameters. --> reset - + @@ -14863,7 +14855,7 @@ parameters are a RESULT of the module parameters. --> + version="16.0"> @@ -14952,7 +14944,7 @@ parameters are a RESULT of the module parameters. --> @@ -15100,14 +15092,6 @@ the requested settings for a module instance. --> true true - - boolean - false - true - true - false - true - boolean false @@ -15124,14 +15108,6 @@ the requested settings for a module instance. --> true true - - boolean - false - false - false - true - true - java.lang.String NONE @@ -15180,14 +15156,6 @@ the requested settings for a module instance. --> true true - - boolean - false - true - true - false - true - int 1 @@ -15272,7 +15240,7 @@ the requested settings for a module instance. --> java.lang.String - ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 0 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1 + ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PHYSICAL_DESIGN_PLANNER 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 0 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1 false true false @@ -15343,7 +15311,7 @@ the requested settings for a module instance. --> true true - + @@ -15388,7 +15356,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -15765,7 +15733,7 @@ parameters are a RESULT of the module parameters. --> byteenable - + @@ -15820,7 +15788,7 @@ parameters are a RESULT of the module parameters. --> @@ -16215,7 +16183,7 @@ the requested settings for a module instance. --> true true - + @@ -16276,7 +16244,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -16321,7 +16289,7 @@ parameters are a RESULT of the module parameters. --> reset_n - + @@ -16710,7 +16678,7 @@ parameters are a RESULT of the module parameters. --> waitrequest - + @@ -16804,7 +16772,7 @@ parameters are a RESULT of the module parameters. --> - + @@ -17061,7 +17029,7 @@ the requested settings for a module instance. --> true true - + @@ -17122,7 +17090,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -17167,7 +17135,7 @@ parameters are a RESULT of the module parameters. --> reset_n - + @@ -17514,7 +17482,7 @@ parameters are a RESULT of the module parameters. --> readdata - + @@ -17563,7 +17531,7 @@ parameters are a RESULT of the module parameters. --> @@ -17573,7 +17541,7 @@ the requested settings for a module instance. --> embeddedsw.CMacro.TIMESTAMP - 1622141601 + 1622558600 embeddedsw.dts.compatible @@ -17593,7 +17561,7 @@ the requested settings for a module instance. --> embeddedsw.dts.params.timestamp - 1622141601 + 1622558600 embeddedsw.dts.vendor @@ -17609,7 +17577,7 @@ the requested settings for a module instance. --> int - 1622141601 + 1622558600 true false false @@ -17632,7 +17600,7 @@ the requested settings for a module instance. --> true true - + @@ -17677,7 +17645,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -17722,7 +17690,7 @@ parameters are a RESULT of the module parameters. --> reset_n - + @@ -18066,7 +18034,7 @@ parameters are a RESULT of the module parameters. --> - + @@ -18291,7 +18259,7 @@ the requested settings for a module instance. --> true true - + @@ -18352,7 +18320,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -18397,7 +18365,7 @@ parameters are a RESULT of the module parameters. --> reset_n - + @@ -18766,7 +18734,7 @@ parameters are a RESULT of the module parameters. --> write_n - + @@ -18847,7 +18815,7 @@ parameters are a RESULT of the module parameters. --> @@ -18898,7 +18866,7 @@ parameters are a RESULT of the module parameters. --> @@ -18949,7 +18917,7 @@ parameters are a RESULT of the module parameters. --> @@ -19000,7 +18968,7 @@ parameters are a RESULT of the module parameters. --> @@ -19051,7 +19019,7 @@ parameters are a RESULT of the module parameters. --> @@ -19102,7 +19070,7 @@ parameters are a RESULT of the module parameters. --> @@ -19153,7 +19121,7 @@ parameters are a RESULT of the module parameters. --> @@ -19204,7 +19172,7 @@ parameters are a RESULT of the module parameters. --> @@ -19255,7 +19223,7 @@ parameters are a RESULT of the module parameters. --> @@ -19306,7 +19274,7 @@ parameters are a RESULT of the module parameters. --> @@ -19357,7 +19325,7 @@ parameters are a RESULT of the module parameters. --> @@ -19408,7 +19376,7 @@ parameters are a RESULT of the module parameters. --> @@ -19459,7 +19427,7 @@ parameters are a RESULT of the module parameters. --> @@ -19510,7 +19478,7 @@ parameters are a RESULT of the module parameters. --> @@ -19561,7 +19529,7 @@ parameters are a RESULT of the module parameters. --> @@ -19612,7 +19580,7 @@ parameters are a RESULT of the module parameters. --> @@ -19663,7 +19631,7 @@ parameters are a RESULT of the module parameters. --> @@ -19714,7 +19682,7 @@ parameters are a RESULT of the module parameters. --> @@ -19765,7 +19733,7 @@ parameters are a RESULT of the module parameters. --> @@ -19816,7 +19784,7 @@ parameters are a RESULT of the module parameters. --> @@ -19843,7 +19811,7 @@ parameters are a RESULT of the module parameters. --> @@ -19870,7 +19838,7 @@ parameters are a RESULT of the module parameters. --> @@ -19897,7 +19865,7 @@ parameters are a RESULT of the module parameters. --> @@ -19924,7 +19892,7 @@ parameters are a RESULT of the module parameters. --> @@ -19951,7 +19919,7 @@ parameters are a RESULT of the module parameters. --> @@ -19978,7 +19946,7 @@ parameters are a RESULT of the module parameters. --> @@ -20005,7 +19973,7 @@ parameters are a RESULT of the module parameters. --> @@ -20032,7 +20000,7 @@ parameters are a RESULT of the module parameters. --> @@ -20059,7 +20027,7 @@ parameters are a RESULT of the module parameters. --> @@ -20086,7 +20054,7 @@ parameters are a RESULT of the module parameters. --> @@ -20113,7 +20081,7 @@ parameters are a RESULT of the module parameters. --> @@ -20140,7 +20108,7 @@ parameters are a RESULT of the module parameters. --> @@ -20167,7 +20135,7 @@ parameters are a RESULT of the module parameters. --> @@ -20194,7 +20162,7 @@ parameters are a RESULT of the module parameters. --> @@ -20221,7 +20189,7 @@ parameters are a RESULT of the module parameters. --> @@ -20248,7 +20216,7 @@ parameters are a RESULT of the module parameters. --> @@ -20275,7 +20243,7 @@ parameters are a RESULT of the module parameters. --> @@ -20302,7 +20270,7 @@ parameters are a RESULT of the module parameters. --> @@ -20329,7 +20297,7 @@ parameters are a RESULT of the module parameters. --> @@ -20356,7 +20324,7 @@ parameters are a RESULT of the module parameters. --> @@ -20383,7 +20351,7 @@ parameters are a RESULT of the module parameters. --> @@ -20410,7 +20378,7 @@ parameters are a RESULT of the module parameters. --> @@ -20437,7 +20405,7 @@ parameters are a RESULT of the module parameters. --> @@ -20472,7 +20440,7 @@ parameters are a RESULT of the module parameters. --> @@ -20507,7 +20475,7 @@ parameters are a RESULT of the module parameters. --> @@ -20542,7 +20510,7 @@ parameters are a RESULT of the module parameters. --> @@ -20577,7 +20545,7 @@ parameters are a RESULT of the module parameters. --> @@ -20604,7 +20572,7 @@ parameters are a RESULT of the module parameters. --> @@ -20631,7 +20599,7 @@ parameters are a RESULT of the module parameters. --> @@ -20658,7 +20626,7 @@ parameters are a RESULT of the module parameters. --> @@ -20685,7 +20653,7 @@ parameters are a RESULT of the module parameters. --> @@ -20712,7 +20680,7 @@ parameters are a RESULT of the module parameters. --> @@ -20739,7 +20707,7 @@ parameters are a RESULT of the module parameters. --> @@ -20766,7 +20734,7 @@ parameters are a RESULT of the module parameters. --> @@ -20793,7 +20761,7 @@ parameters are a RESULT of the module parameters. --> @@ -20820,7 +20788,7 @@ parameters are a RESULT of the module parameters. --> @@ -20847,7 +20815,7 @@ parameters are a RESULT of the module parameters. --> @@ -20874,7 +20842,7 @@ parameters are a RESULT of the module parameters. --> @@ -20901,7 +20869,7 @@ parameters are a RESULT of the module parameters. --> @@ -20928,7 +20896,7 @@ parameters are a RESULT of the module parameters. --> @@ -20955,7 +20923,7 @@ parameters are a RESULT of the module parameters. --> @@ -20982,7 +20950,7 @@ parameters are a RESULT of the module parameters. --> @@ -21009,7 +20977,7 @@ parameters are a RESULT of the module parameters. --> @@ -21036,7 +21004,7 @@ parameters are a RESULT of the module parameters. --> @@ -21063,7 +21031,7 @@ parameters are a RESULT of the module parameters. --> @@ -21090,7 +21058,7 @@ parameters are a RESULT of the module parameters. --> @@ -21117,7 +21085,7 @@ parameters are a RESULT of the module parameters. --> @@ -21144,7 +21112,7 @@ parameters are a RESULT of the module parameters. --> @@ -21171,7 +21139,7 @@ parameters are a RESULT of the module parameters. --> @@ -21198,7 +21166,7 @@ parameters are a RESULT of the module parameters. --> @@ -21225,7 +21193,7 @@ parameters are a RESULT of the module parameters. --> @@ -21252,7 +21220,7 @@ parameters are a RESULT of the module parameters. --> @@ -21279,7 +21247,7 @@ parameters are a RESULT of the module parameters. --> @@ -21306,7 +21274,7 @@ parameters are a RESULT of the module parameters. --> @@ -21333,7 +21301,7 @@ parameters are a RESULT of the module parameters. --> @@ -21360,7 +21328,7 @@ parameters are a RESULT of the module parameters. --> @@ -21387,7 +21355,7 @@ parameters are a RESULT of the module parameters. --> @@ -21414,7 +21382,7 @@ parameters are a RESULT of the module parameters. --> @@ -21441,7 +21409,7 @@ parameters are a RESULT of the module parameters. --> @@ -21468,7 +21436,7 @@ parameters are a RESULT of the module parameters. --> @@ -21495,7 +21463,7 @@ parameters are a RESULT of the module parameters. --> @@ -21522,7 +21490,7 @@ parameters are a RESULT of the module parameters. --> @@ -21549,7 +21517,7 @@ parameters are a RESULT of the module parameters. --> @@ -21587,7 +21555,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint Clock Input - 16.1 + 16.0 19 @@ -21595,7 +21563,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint Reset Input - 16.1 + 16.0 4 @@ -21603,7 +21571,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint Avalon Streaming Sink - 16.1 + 16.0 4 @@ -21611,7 +21579,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint Avalon Streaming Source - 16.1 + 16.0 16 @@ -21619,7 +21587,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint Avalon Memory Mapped Slave - 16.1 + 16.0 14 @@ -21627,7 +21595,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint Conduit - 16.1 + 16.0 1 @@ -21667,7 +21635,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint Avalon Memory Mapped Master - 16.1 + 16.0 1 @@ -21675,7 +21643,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IModule Avalon ALTPLL - 16.1 + 16.0 5 @@ -21683,7 +21651,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint Clock Output - 16.1 + 16.0 1 @@ -21691,7 +21659,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IModule Clock Source - 16.1 + 16.0 1 @@ -21699,7 +21667,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint Clock Input - 16.1 + 16.0 1 @@ -21707,7 +21675,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint Reset Input - 16.1 + 16.0 1 @@ -21715,7 +21683,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint Clock Output - 16.1 + 16.0 1 @@ -21723,7 +21691,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint Reset Output - 16.1 + 16.0 2 @@ -21739,7 +21707,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint Interrupt Sender - 16.1 + 16.0 1 @@ -21747,7 +21715,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IModule JTAG UART - 16.1 + 16.0 5 @@ -21755,7 +21723,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IModule PIO (Parallel I/O) - 16.1 + 16.0 1 @@ -21763,7 +21731,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IModule Nios II Processor - 16.1 + 16.0 1 @@ -21771,7 +21739,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint Interrupt Receiver - 16.1 + 16.0 1 @@ -21779,7 +21747,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint Reset Output - 16.1 + 16.0 1 @@ -21787,7 +21755,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint Custom Instruction Master - 16.1 + 16.0 1 @@ -21795,7 +21763,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IModule On-Chip Memory (RAM or ROM) - 16.1 + 16.0 1 @@ -21803,7 +21771,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IModule SDRAM Controller - 16.1 + 16.0 1 @@ -21811,7 +21779,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IModule System ID Peripheral - 16.1 + 16.0 1 @@ -21819,7 +21787,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IModule Interval Timer - 16.1 + 16.0 19 @@ -21827,7 +21795,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IConnection Avalon Memory Mapped Connection - 16.1 + 16.0 4 @@ -21835,7 +21803,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IConnection Avalon Streaming Connection - 16.1 + 16.0 19 @@ -21843,7 +21811,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IConnection Clock Connection - 16.1 + 16.0 4 @@ -21851,7 +21819,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IConnection Interrupt Connection - 16.1 + 16.0 37 @@ -21859,8 +21827,8 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IConnection Reset Connection - 16.1 + 16.0 - 16.1 196 + 16.0 222 diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.lock b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.lock new file mode 100644 index 0000000..e69de29 diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.log b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.log new file mode 100644 index 0000000..201f5be --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.log @@ -0,0 +1,480 @@ +!SESSION 2021-06-01 14:03:06.351 ----------------------------------------------- +eclipse.buildId=4.3.2.M20140221-1700 +java.version=1.8.0_05 +java.vendor=Oracle Corporation +BootLoader constants: OS=linux, ARCH=x86_64, WS=gtk, NL=en_US +Framework arguments: -product org.eclipse.epp.package.cpp.product -pluginCustomization /usr/local/altera/16.0/nios2eds/bin/eclipse_nios2/plugin_customization.ini +Command-line arguments: -os linux -ws gtk -arch x86_64 -product org.eclipse.epp.package.cpp.product -pluginCustomization /usr/local/altera/16.0/nios2eds/bin/eclipse_nios2/plugin_customization.ini + +!ENTRY org.eclipse.ui 2 0 2021-06-01 14:04:23.380 +!MESSAGE Warnings while parsing the commands from the 'org.eclipse.ui.commands' and 'org.eclipse.ui.actionDefinitions' extension points. +!SUBENTRY 1 org.eclipse.ui 2 0 2021-06-01 14:04:23.380 +!MESSAGE Commands should really have a category: plug-in='org.eclipse.linuxtools.systemtap.ui.graphing', id='org.eclipse.linuxtools.systemtap.ui.graphing.commands.SaveGraphImage', categoryId='org.eclipse.linuxtools.systemtap.ui.graphing.category.file' + +!ENTRY org.eclipse.ui 2 0 2021-06-01 14:04:24.498 +!MESSAGE Warnings while parsing the commands from the 'org.eclipse.ui.commands' and 'org.eclipse.ui.actionDefinitions' extension points. +!SUBENTRY 1 org.eclipse.ui 2 0 2021-06-01 14:04:24.498 +!MESSAGE Commands should really have a category: plug-in='org.eclipse.linuxtools.systemtap.ui.graphing', id='org.eclipse.linuxtools.systemtap.ui.graphing.commands.SaveGraphImage', categoryId='org.eclipse.linuxtools.systemtap.ui.graphing.category.file' + +!ENTRY org.eclipse.cdt.core 1 0 2021-06-01 14:06:17.329 +!MESSAGE Indexed 'D8M_Camera_Test' (6 sources, 6 headers) in 0.60 sec: 306 declarations; 1,011 references; 24 unresolved inclusions; 0 syntax errors; 201 unresolved names (13.24%) + +!ENTRY org.eclipse.cdt.core 1 0 2021-06-01 14:07:50.514 +!MESSAGE Indexed 'D8M_Camera_Test_bsp' (83 sources, 154 headers) in 1.78 sec: 5,266 declarations; 8,569 references; 16 unresolved inclusions; 2 syntax errors; 51 unresolved names (0.37%) + +!ENTRY org.eclipse.jface 2 0 2021-06-01 14:09:49.546 +!MESSAGE Keybinding conflicts occurred. They may interfere with normal accelerator operation. +!SUBENTRY 1 org.eclipse.jface 2 0 2021-06-01 14:09:49.546 +!MESSAGE A conflict occurred for ALT+CTRL+I: +Binding(ALT+CTRL+I, + ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.open.include.browser,Open Include Browser, + Open an include browser on the selected element, + Category(org.eclipse.ui.category.navigate,Navigate,null,true), + org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@24090832, + ,,true),null), + org.eclipse.ui.defaultAcceleratorConfiguration, + org.eclipse.cdt.ui.cEditorScope,,,system) +Binding(ALT+CTRL+I, + ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.open.include.browser,Open Include Browser, + Open an include browser on the selected element, + Category(org.eclipse.ui.category.navigate,Navigate,null,true), + org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@24090832, + ,,true),null), + org.eclipse.ui.defaultAcceleratorConfiguration, + org.eclipse.cdt.ui.cViewScope,,,system) +!SUBENTRY 1 org.eclipse.jface 2 0 2021-06-01 14:09:49.546 +!MESSAGE A conflict occurred for CTRL+SHIFT+T: +Binding(CTRL+SHIFT+T, + ParameterizedCommand(Command(org.eclipse.cdt.ui.navigate.opentype,Open Element, + Open an element in an Editor, + Category(org.eclipse.cdt.ui.category.source,Source,Source commands,true), + org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@7e38d2a2, + ,,true),null), + org.eclipse.ui.defaultAcceleratorConfiguration, + org.eclipse.cdt.ui.cEditorScope,,,system) +Binding(CTRL+SHIFT+T, + ParameterizedCommand(Command(org.eclipse.cdt.ui.navigate.opentype,Open Element, + Open an element in an Editor, + Category(org.eclipse.cdt.ui.category.source,Source,Source commands,true), + org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@7e38d2a2, + ,,true),null), + org.eclipse.ui.defaultAcceleratorConfiguration, + org.eclipse.cdt.ui.cViewScope,,,system) +!SUBENTRY 1 org.eclipse.jface 2 0 2021-06-01 14:09:49.546 +!MESSAGE A conflict occurred for F4: +Binding(F4, + ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.open.type.hierarchy,Open Type Hierarchy, + Open a type hierarchy on the selected element, + Category(org.eclipse.ui.category.navigate,Navigate,null,true), + org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@79408109, + ,,true),null), + org.eclipse.ui.defaultAcceleratorConfiguration, + org.eclipse.cdt.ui.cEditorScope,,,system) +Binding(F4, + ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.open.type.hierarchy,Open Type Hierarchy, + Open a type hierarchy on the selected element, + Category(org.eclipse.ui.category.navigate,Navigate,null,true), + org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@79408109, + ,,true),null), + org.eclipse.ui.defaultAcceleratorConfiguration, + org.eclipse.cdt.ui.cViewScope,,,system) +!SUBENTRY 1 org.eclipse.jface 2 0 2021-06-01 14:09:49.546 +!MESSAGE A conflict occurred for ALT+SHIFT+R: +Binding(ALT+SHIFT+R, + ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.text.rename.element,Rename - Refactoring , + Rename the selected element, + Category(org.eclipse.cdt.ui.category.refactoring,Refactor - C++,C/C++ Refactorings,true), + org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@33671907, + ,,true),null), + org.eclipse.ui.defaultAcceleratorConfiguration, + org.eclipse.cdt.ui.cEditorScope,,,system) +Binding(ALT+SHIFT+R, + ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.text.rename.element,Rename - Refactoring , + Rename the selected element, + Category(org.eclipse.cdt.ui.category.refactoring,Refactor - C++,C/C++ Refactorings,true), + org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@33671907, + ,,true),null), + org.eclipse.ui.defaultAcceleratorConfiguration, + org.eclipse.cdt.ui.cViewScope,,,system) +!SUBENTRY 1 org.eclipse.jface 2 0 2021-06-01 14:09:49.546 +!MESSAGE A conflict occurred for F3: +Binding(F3, + ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.opendecl,Open Declaration, + Open an editor on the selected element's declaration(s), + Category(org.eclipse.cdt.ui.category.source,Source,Source commands,true), + org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@5fc3dfc1, + ,,true),null), + org.eclipse.ui.defaultAcceleratorConfiguration, + org.eclipse.cdt.ui.cEditorScope,,,system) +Binding(F3, + ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.opendecl,Open Declaration, + Open an editor on the selected element's declaration(s), + Category(org.eclipse.cdt.ui.category.source,Source,Source commands,true), + org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@5fc3dfc1, + ,,true),null), + org.eclipse.ui.defaultAcceleratorConfiguration, + org.eclipse.cdt.ui.cViewScope,,,system) +!SUBENTRY 1 org.eclipse.jface 2 0 2021-06-01 14:09:49.546 +!MESSAGE A conflict occurred for CTRL+SHIFT+G: +Binding(CTRL+SHIFT+G, + ParameterizedCommand(Command(org.eclipse.cdt.ui.search.findrefs,References, + Search for references to the selected element in the workspace, + Category(org.eclipse.cdt.ui.category.source,Source,Source commands,true), + org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@67d6bb59, + ,,true),null), + org.eclipse.ui.defaultAcceleratorConfiguration, + org.eclipse.cdt.ui.cEditorScope,,,system) +Binding(CTRL+SHIFT+G, + ParameterizedCommand(Command(org.eclipse.cdt.ui.search.findrefs,References, + Search for references to the selected element in the workspace, + Category(org.eclipse.cdt.ui.category.source,Source,Source commands,true), + org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@67d6bb59, + ,,true),null), + org.eclipse.ui.defaultAcceleratorConfiguration, + org.eclipse.cdt.ui.cViewScope,,,system) +!SUBENTRY 1 org.eclipse.jface 2 0 2021-06-01 14:09:49.546 +!MESSAGE A conflict occurred for CTRL+G: +Binding(CTRL+G, + ParameterizedCommand(Command(org.eclipse.cdt.ui.search.finddecl,Declaration, + Search for declarations of the selected element in the workspace, + Category(org.eclipse.cdt.ui.category.source,Source,Source commands,true), + org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@1a632663, + ,,true),null), + org.eclipse.ui.defaultAcceleratorConfiguration, + org.eclipse.cdt.ui.cEditorScope,,,system) +Binding(CTRL+G, + ParameterizedCommand(Command(org.eclipse.cdt.ui.search.finddecl,Declaration, + Search for declarations of the selected element in the workspace, + Category(org.eclipse.cdt.ui.category.source,Source,Source commands,true), + org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@1a632663, + ,,true),null), + org.eclipse.ui.defaultAcceleratorConfiguration, + org.eclipse.cdt.ui.cViewScope,,,system) +!SUBENTRY 1 org.eclipse.jface 2 0 2021-06-01 14:09:49.546 +!MESSAGE A conflict occurred for ALT+CTRL+H: +Binding(ALT+CTRL+H, + ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.open.call.hierarchy,Open Call Hierarchy, + Open the call hierarchy for the selected element, + Category(org.eclipse.ui.category.navigate,Navigate,null,true), + org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@1147ab09, + ,,true),null), + org.eclipse.ui.defaultAcceleratorConfiguration, + org.eclipse.cdt.ui.cEditorScope,,,system) +Binding(ALT+CTRL+H, + ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.open.call.hierarchy,Open Call Hierarchy, + Open the call hierarchy for the selected element, + Category(org.eclipse.ui.category.navigate,Navigate,null,true), + org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@1147ab09, + ,,true),null), + org.eclipse.ui.defaultAcceleratorConfiguration, + org.eclipse.cdt.ui.cViewScope,,,system) +!SUBENTRY 1 org.eclipse.jface 2 0 2021-06-01 14:09:49.546 +!MESSAGE A conflict occurred for CTRL+SHIFT+H: +Binding(CTRL+SHIFT+H, + ParameterizedCommand(Command(org.eclipse.cdt.ui.navigate.open.type.in.hierarchy,Open Type in Hierarchy, + Open a type in the type hierarchy view, + Category(org.eclipse.ui.category.navigate,Navigate,null,true), + org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@503b5337, + ,,true),null), + org.eclipse.ui.defaultAcceleratorConfiguration, + org.eclipse.cdt.ui.cEditorScope,,,system) +Binding(CTRL+SHIFT+H, + ParameterizedCommand(Command(org.eclipse.cdt.ui.navigate.open.type.in.hierarchy,Open Type in Hierarchy, + Open a type in the type hierarchy view, + Category(org.eclipse.ui.category.navigate,Navigate,null,true), + org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@503b5337, + ,,true),null), + org.eclipse.ui.defaultAcceleratorConfiguration, + org.eclipse.cdt.ui.cViewScope,,,system) + +!ENTRY com.altera.sbtgui.launch 1 0 2021-06-01 14:11:37.605 +!MESSAGE Executing: [/bin/bash, -c, nios2-download '--cable=USB-Blaster on 129.31.224.137 [USB-0]' --device=1 --instance=0 --stop --sidp=0x410e0 --id=0x0] + +!ENTRY com.altera.sbtgui.launch 1 0 2021-06-01 14:11:39.859 +!MESSAGE Executing: [/bin/bash, -c, nios2-download '--cable=USB-Blaster on 129.31.224.137 [USB-0]' --device=1 --instance=0 --go --sidp=0x410e0 --id=0x0 /home/ad3919/nfshome/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/D8M_Camera_Test.elf] + +!ENTRY com.altera.sbtgui.launch 1 0 2021-06-01 14:35:55.217 +!MESSAGE Executing: [/bin/bash, -c, nios2-download '--cable=USB-Blaster on 129.31.224.137 [USB-0]' --device=1 --instance=0 --stop --sidp=0x410e0 --id=0x0] + +!ENTRY com.altera.sbtgui.launch 1 0 2021-06-01 14:35:58.889 +!MESSAGE Executing: [/bin/bash, -c, nios2-download '--cable=USB-Blaster on 129.31.224.137 [USB-0]' --device=1 --instance=0 --go --sidp=0x410e0 --id=0x0 /home/ad3919/nfshome/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/D8M_Camera_Test.elf] +!SESSION 2021-06-01 15:25:18.150 ----------------------------------------------- +eclipse.buildId=4.3.2.M20140221-1700 +java.version=1.8.0_05 +java.vendor=Oracle Corporation +BootLoader constants: OS=linux, ARCH=x86_64, WS=gtk, NL=en_US +Framework arguments: -product org.eclipse.epp.package.cpp.product -pluginCustomization /usr/local/altera/16.0/nios2eds/bin/eclipse_nios2/plugin_customization.ini +Command-line arguments: -os linux -ws gtk -arch x86_64 -product org.eclipse.epp.package.cpp.product -pluginCustomization /usr/local/altera/16.0/nios2eds/bin/eclipse_nios2/plugin_customization.ini + +!ENTRY org.eclipse.core.resources 2 10035 2021-06-01 15:25:34.463 +!MESSAGE The workspace exited with unsaved changes in the previous session; refreshing workspace to recover changes. + +!ENTRY org.eclipse.ui 2 0 2021-06-01 15:25:35.756 +!MESSAGE Warnings while parsing the commands from the 'org.eclipse.ui.commands' and 'org.eclipse.ui.actionDefinitions' extension points. +!SUBENTRY 1 org.eclipse.ui 2 0 2021-06-01 15:25:35.756 +!MESSAGE Commands should really have a category: plug-in='org.eclipse.linuxtools.systemtap.ui.graphing', id='org.eclipse.linuxtools.systemtap.ui.graphing.commands.SaveGraphImage', categoryId='org.eclipse.linuxtools.systemtap.ui.graphing.category.file' + +!ENTRY org.eclipse.ui 2 0 2021-06-01 15:25:36.679 +!MESSAGE Warnings while parsing the commands from the 'org.eclipse.ui.commands' and 'org.eclipse.ui.actionDefinitions' extension points. +!SUBENTRY 1 org.eclipse.ui 2 0 2021-06-01 15:25:36.679 +!MESSAGE Commands should really have a category: plug-in='org.eclipse.linuxtools.systemtap.ui.graphing', id='org.eclipse.linuxtools.systemtap.ui.graphing.commands.SaveGraphImage', categoryId='org.eclipse.linuxtools.systemtap.ui.graphing.category.file' + +!ENTRY com.altera.sbtgui.launch 1 0 2021-06-01 15:30:01.828 +!MESSAGE Executing: [/bin/bash, -c, nios2-download '--cable=USB-Blaster on 129.31.224.137 [USB-0]' --device=1 --instance=0 --stop --sidp=0x410e0 --id=0x0] + +!ENTRY com.altera.sbtgui.launch 4 0 2021-06-01 15:30:03.222 +!MESSAGE Failed Executing: [nios2-download, '--cable=USB-Blaster on 129.31.224.137 [USB-0]', --device=1, --instance=0, --stop, --sidp=0x410e0, --id=0x0] return code: 8 + +!ENTRY com.altera.sbtgui.launch 1 0 2021-06-01 15:30:04.718 +!MESSAGE Executing: [/bin/bash, -c, nios2-download '--cable=USB-Blaster on 129.31.224.137 [USB-0]' --device=1 --instance=0 --go --sidp=0x410e0 --id=0x0 /home/ad3919/nfshome/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/D8M_Camera_Test.elf] + +!ENTRY com.altera.sbtgui.launch 4 0 2021-06-01 15:30:06.290 +!MESSAGE Failed Executing: [nios2-download, '--cable=USB-Blaster on 129.31.224.137 [USB-0]', --device=1, --instance=0, --go, --sidp=0x410e0, --id=0x0, /home/ad3919/nfshome/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/D8M_Camera_Test.elf] return code: 8 + +!ENTRY com.altera.sbtgui.launch 4 0 2021-06-01 15:30:06.295 +!MESSAGE Downloading ELF Process failed + +!ENTRY com.altera.sbtgui.launch 1 0 2021-06-01 15:30:48.922 +!MESSAGE Executing: [/bin/bash, -c, nios2-download '--cable=USB-Blaster on 129.31.224.137 [USB-0]' --device=1 --instance=0 --stop --sidp=0x410e0 --id=0x0] + +!ENTRY com.altera.sbtgui.launch 4 0 2021-06-01 15:30:50.294 +!MESSAGE Failed Executing: [nios2-download, '--cable=USB-Blaster on 129.31.224.137 [USB-0]', --device=1, --instance=0, --stop, --sidp=0x410e0, --id=0x0] return code: 8 + +!ENTRY com.altera.sbtgui.launch 1 0 2021-06-01 15:30:51.067 +!MESSAGE Executing: [/bin/bash, -c, nios2-download '--cable=USB-Blaster on 129.31.224.137 [USB-0]' --device=1 --instance=0 --go --sidp=0x410e0 --id=0x0 /home/ad3919/nfshome/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/D8M_Camera_Test.elf] + +!ENTRY com.altera.sbtgui.launch 4 0 2021-06-01 15:30:52.474 +!MESSAGE Failed Executing: [nios2-download, '--cable=USB-Blaster on 129.31.224.137 [USB-0]', --device=1, --instance=0, --go, --sidp=0x410e0, --id=0x0, /home/ad3919/nfshome/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/D8M_Camera_Test.elf] return code: 8 + +!ENTRY com.altera.sbtgui.launch 4 0 2021-06-01 15:30:52.478 +!MESSAGE Downloading ELF Process failed + +!ENTRY com.altera.sbtgui.launch 1 0 2021-06-01 15:31:19.409 +!MESSAGE Executing: [/bin/bash, -c, nios2-download '--cable=USB-Blaster on 129.31.224.137 [USB-0]' --device=1 --instance=0 --stop --sidp=0x410e0 --id=0x0] + +!ENTRY com.altera.sbtgui.launch 4 0 2021-06-01 15:31:20.799 +!MESSAGE Failed Executing: [nios2-download, '--cable=USB-Blaster on 129.31.224.137 [USB-0]', --device=1, --instance=0, --stop, --sidp=0x410e0, --id=0x0] return code: 8 + +!ENTRY com.altera.sbtgui.launch 1 0 2021-06-01 15:31:21.477 +!MESSAGE Executing: [/bin/bash, -c, nios2-download '--cable=USB-Blaster on 129.31.224.137 [USB-0]' --device=1 --instance=0 --go --sidp=0x410e0 --id=0x0 /home/ad3919/nfshome/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/D8M_Camera_Test.elf] + +!ENTRY com.altera.sbtgui.launch 4 0 2021-06-01 15:31:22.936 +!MESSAGE Failed Executing: [nios2-download, '--cable=USB-Blaster on 129.31.224.137 [USB-0]', --device=1, --instance=0, --go, --sidp=0x410e0, --id=0x0, /home/ad3919/nfshome/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/D8M_Camera_Test.elf] return code: 8 + +!ENTRY com.altera.sbtgui.launch 4 0 2021-06-01 15:31:22.940 +!MESSAGE Downloading ELF Process failed + +!ENTRY org.eclipse.cdt.core 1 0 2021-06-01 15:39:40.412 +!MESSAGE Indexed 'D8M_Camera_Test' (6 sources, 68 headers) in 0.40 sec: 2,546 declarations; 4,517 references; 0 unresolved inclusions; 0 syntax errors; 0 unresolved names (0.00%) + +!ENTRY com.altera.sbtgui.launch 1 0 2021-06-01 15:41:17.879 +!MESSAGE Executing: [/bin/bash, -c, nios2-download '--cable=USB-Blaster on 129.31.224.137 [USB-0]' --device=1 --instance=0 --stop --sidp=0x410e0 --id=0x0] + +!ENTRY com.altera.sbtgui.launch 4 0 2021-06-01 15:41:19.297 +!MESSAGE Failed Executing: [nios2-download, '--cable=USB-Blaster on 129.31.224.137 [USB-0]', --device=1, --instance=0, --stop, --sidp=0x410e0, --id=0x0] return code: 8 + +!ENTRY com.altera.sbtgui.launch 1 0 2021-06-01 15:41:19.587 +!MESSAGE Executing: [/bin/bash, -c, nios2-download '--cable=USB-Blaster on 129.31.224.137 [USB-0]' --device=1 --instance=0 --go --sidp=0x410e0 --id=0x0 /home/ad3919/nfshome/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/D8M_Camera_Test.elf] + +!ENTRY com.altera.sbtgui.launch 4 0 2021-06-01 15:41:21.001 +!MESSAGE Failed Executing: [nios2-download, '--cable=USB-Blaster on 129.31.224.137 [USB-0]', --device=1, --instance=0, --go, --sidp=0x410e0, --id=0x0, /home/ad3919/nfshome/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/D8M_Camera_Test.elf] return code: 8 + +!ENTRY com.altera.sbtgui.launch 4 0 2021-06-01 15:41:21.005 +!MESSAGE Downloading ELF Process failed +!SESSION 2021-06-01 15:51:10.061 ----------------------------------------------- +eclipse.buildId=4.3.2.M20140221-1700 +java.version=1.8.0_05 +java.vendor=Oracle Corporation +BootLoader constants: OS=linux, ARCH=x86_64, WS=gtk, NL=en_US +Framework arguments: -product org.eclipse.epp.package.cpp.product -pluginCustomization /usr/local/altera/16.0/nios2eds/bin/eclipse_nios2/plugin_customization.ini +Command-line arguments: -os linux -ws gtk -arch x86_64 -product org.eclipse.epp.package.cpp.product -pluginCustomization /usr/local/altera/16.0/nios2eds/bin/eclipse_nios2/plugin_customization.ini + +!ENTRY org.eclipse.ui 2 0 2021-06-01 15:51:21.549 +!MESSAGE Warnings while parsing the commands from the 'org.eclipse.ui.commands' and 'org.eclipse.ui.actionDefinitions' extension points. +!SUBENTRY 1 org.eclipse.ui 2 0 2021-06-01 15:51:21.549 +!MESSAGE Commands should really have a category: plug-in='org.eclipse.linuxtools.systemtap.ui.graphing', id='org.eclipse.linuxtools.systemtap.ui.graphing.commands.SaveGraphImage', categoryId='org.eclipse.linuxtools.systemtap.ui.graphing.category.file' + +!ENTRY org.eclipse.ui 2 0 2021-06-01 15:51:22.916 +!MESSAGE Warnings while parsing the commands from the 'org.eclipse.ui.commands' and 'org.eclipse.ui.actionDefinitions' extension points. +!SUBENTRY 1 org.eclipse.ui 2 0 2021-06-01 15:51:22.916 +!MESSAGE Commands should really have a category: plug-in='org.eclipse.linuxtools.systemtap.ui.graphing', id='org.eclipse.linuxtools.systemtap.ui.graphing.commands.SaveGraphImage', categoryId='org.eclipse.linuxtools.systemtap.ui.graphing.category.file' + +!ENTRY org.eclipse.jface 2 0 2021-06-01 15:51:50.182 +!MESSAGE Keybinding conflicts occurred. They may interfere with normal accelerator operation. +!SUBENTRY 1 org.eclipse.jface 2 0 2021-06-01 15:51:50.182 +!MESSAGE A conflict occurred for F3: +Binding(F3, + ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.opendecl,Open Declaration, + Open an editor on the selected element's declaration(s), + Category(org.eclipse.cdt.ui.category.source,Source,Source commands,true), + org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@612bb755, + ,,true),null), + org.eclipse.ui.defaultAcceleratorConfiguration, + org.eclipse.cdt.ui.cEditorScope,,,system) +Binding(F3, + ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.opendecl,Open Declaration, + Open an editor on the selected element's declaration(s), + Category(org.eclipse.cdt.ui.category.source,Source,Source commands,true), + org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@612bb755, + ,,true),null), + org.eclipse.ui.defaultAcceleratorConfiguration, + org.eclipse.cdt.ui.cViewScope,,,system) +!SUBENTRY 1 org.eclipse.jface 2 0 2021-06-01 15:51:50.182 +!MESSAGE A conflict occurred for ALT+CTRL+I: +Binding(ALT+CTRL+I, + ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.open.include.browser,Open Include Browser, + Open an include browser on the selected element, + Category(org.eclipse.ui.category.navigate,Navigate,null,true), + org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@6ba226cd, + ,,true),null), + org.eclipse.ui.defaultAcceleratorConfiguration, + org.eclipse.cdt.ui.cEditorScope,,,system) +Binding(ALT+CTRL+I, + ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.open.include.browser,Open Include Browser, + Open an include browser on the selected element, + Category(org.eclipse.ui.category.navigate,Navigate,null,true), + org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@6ba226cd, + ,,true),null), + org.eclipse.ui.defaultAcceleratorConfiguration, + org.eclipse.cdt.ui.cViewScope,,,system) +!SUBENTRY 1 org.eclipse.jface 2 0 2021-06-01 15:51:50.182 +!MESSAGE A conflict occurred for F4: +Binding(F4, + ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.open.type.hierarchy,Open Type Hierarchy, + Open a type hierarchy on the selected element, + Category(org.eclipse.ui.category.navigate,Navigate,null,true), + org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@62e99458, + ,,true),null), + org.eclipse.ui.defaultAcceleratorConfiguration, + org.eclipse.cdt.ui.cEditorScope,,,system) +Binding(F4, + ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.open.type.hierarchy,Open Type Hierarchy, + Open a type hierarchy on the selected element, + Category(org.eclipse.ui.category.navigate,Navigate,null,true), + org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@62e99458, + ,,true),null), + org.eclipse.ui.defaultAcceleratorConfiguration, + org.eclipse.cdt.ui.cViewScope,,,system) +!SUBENTRY 1 org.eclipse.jface 2 0 2021-06-01 15:51:50.182 +!MESSAGE A conflict occurred for ALT+SHIFT+R: +Binding(ALT+SHIFT+R, + ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.text.rename.element,Rename - Refactoring , + Rename the selected element, + Category(org.eclipse.cdt.ui.category.refactoring,Refactor - C++,C/C++ Refactorings,true), + org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@1eddca25, + ,,true),null), + org.eclipse.ui.defaultAcceleratorConfiguration, + org.eclipse.cdt.ui.cEditorScope,,,system) +Binding(ALT+SHIFT+R, + ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.text.rename.element,Rename - Refactoring , + Rename the selected element, + Category(org.eclipse.cdt.ui.category.refactoring,Refactor - C++,C/C++ Refactorings,true), + org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@1eddca25, + ,,true),null), + org.eclipse.ui.defaultAcceleratorConfiguration, + org.eclipse.cdt.ui.cViewScope,,,system) +!SUBENTRY 1 org.eclipse.jface 2 0 2021-06-01 15:51:50.182 +!MESSAGE A conflict occurred for CTRL+SHIFT+G: +Binding(CTRL+SHIFT+G, + ParameterizedCommand(Command(org.eclipse.cdt.ui.search.findrefs,References, + Search for references to the selected element in the workspace, + Category(org.eclipse.cdt.ui.category.source,Source,Source commands,true), + org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@22f057b4, + ,,true),null), + org.eclipse.ui.defaultAcceleratorConfiguration, + org.eclipse.cdt.ui.cEditorScope,,,system) +Binding(CTRL+SHIFT+G, + ParameterizedCommand(Command(org.eclipse.cdt.ui.search.findrefs,References, + Search for references to the selected element in the workspace, + Category(org.eclipse.cdt.ui.category.source,Source,Source commands,true), + org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@22f057b4, + ,,true),null), + org.eclipse.ui.defaultAcceleratorConfiguration, + org.eclipse.cdt.ui.cViewScope,,,system) +!SUBENTRY 1 org.eclipse.jface 2 0 2021-06-01 15:51:50.182 +!MESSAGE A conflict occurred for CTRL+G: +Binding(CTRL+G, + ParameterizedCommand(Command(org.eclipse.cdt.ui.search.finddecl,Declaration, + Search for declarations of the selected element in the workspace, + Category(org.eclipse.cdt.ui.category.source,Source,Source commands,true), + org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@581e8969, + ,,true),null), + org.eclipse.ui.defaultAcceleratorConfiguration, + org.eclipse.cdt.ui.cEditorScope,,,system) +Binding(CTRL+G, + ParameterizedCommand(Command(org.eclipse.cdt.ui.search.finddecl,Declaration, + Search for declarations of the selected element in the workspace, + Category(org.eclipse.cdt.ui.category.source,Source,Source commands,true), + org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@581e8969, + ,,true),null), + org.eclipse.ui.defaultAcceleratorConfiguration, + org.eclipse.cdt.ui.cViewScope,,,system) +!SUBENTRY 1 org.eclipse.jface 2 0 2021-06-01 15:51:50.182 +!MESSAGE A conflict occurred for ALT+CTRL+H: +Binding(ALT+CTRL+H, + ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.open.call.hierarchy,Open Call Hierarchy, + Open the call hierarchy for the selected element, + Category(org.eclipse.ui.category.navigate,Navigate,null,true), + org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@767b9d66, + ,,true),null), + org.eclipse.ui.defaultAcceleratorConfiguration, + org.eclipse.cdt.ui.cEditorScope,,,system) +Binding(ALT+CTRL+H, + ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.open.call.hierarchy,Open Call Hierarchy, + Open the call hierarchy for the selected element, + Category(org.eclipse.ui.category.navigate,Navigate,null,true), + org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@767b9d66, + ,,true),null), + org.eclipse.ui.defaultAcceleratorConfiguration, + org.eclipse.cdt.ui.cViewScope,,,system) +!SUBENTRY 1 org.eclipse.jface 2 0 2021-06-01 15:51:50.182 +!MESSAGE A conflict occurred for CTRL+SHIFT+H: +Binding(CTRL+SHIFT+H, + ParameterizedCommand(Command(org.eclipse.cdt.ui.navigate.open.type.in.hierarchy,Open Type in Hierarchy, + Open a type in the type hierarchy view, + Category(org.eclipse.ui.category.navigate,Navigate,null,true), + org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@687fd6e, + ,,true),null), + org.eclipse.ui.defaultAcceleratorConfiguration, + org.eclipse.cdt.ui.cEditorScope,,,system) +Binding(CTRL+SHIFT+H, + ParameterizedCommand(Command(org.eclipse.cdt.ui.navigate.open.type.in.hierarchy,Open Type in Hierarchy, + Open a type in the type hierarchy view, + Category(org.eclipse.ui.category.navigate,Navigate,null,true), + org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@687fd6e, + ,,true),null), + org.eclipse.ui.defaultAcceleratorConfiguration, + org.eclipse.cdt.ui.cViewScope,,,system) +!SUBENTRY 1 org.eclipse.jface 2 0 2021-06-01 15:51:50.182 +!MESSAGE A conflict occurred for CTRL+SHIFT+T: +Binding(CTRL+SHIFT+T, + ParameterizedCommand(Command(org.eclipse.cdt.ui.navigate.opentype,Open Element, + Open an element in an Editor, + Category(org.eclipse.cdt.ui.category.source,Source,Source commands,true), + org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@266a47fd, + ,,true),null), + org.eclipse.ui.defaultAcceleratorConfiguration, + org.eclipse.cdt.ui.cEditorScope,,,system) +Binding(CTRL+SHIFT+T, + ParameterizedCommand(Command(org.eclipse.cdt.ui.navigate.opentype,Open Element, + Open an element in an Editor, + Category(org.eclipse.cdt.ui.category.source,Source,Source commands,true), + org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@266a47fd, + ,,true),null), + org.eclipse.ui.defaultAcceleratorConfiguration, + org.eclipse.cdt.ui.cViewScope,,,system) + +!ENTRY com.altera.sbtgui.launch 1 0 2021-06-01 15:53:32.747 +!MESSAGE Executing: [/bin/bash, -c, nios2-download '--cable=USB-Blaster on 129.31.224.137 [USB-0]' --device=1 --instance=0 --stop --sidp=0x410e0 --id=0x0] + +!ENTRY com.altera.sbtgui.launch 4 0 2021-06-01 15:53:34.132 +!MESSAGE Failed Executing: [nios2-download, '--cable=USB-Blaster on 129.31.224.137 [USB-0]', --device=1, --instance=0, --stop, --sidp=0x410e0, --id=0x0] return code: 8 + +!ENTRY com.altera.sbtgui.launch 1 0 2021-06-01 15:53:34.450 +!MESSAGE Executing: [/bin/bash, -c, nios2-download '--cable=USB-Blaster on 129.31.224.137 [USB-0]' --device=1 --instance=0 --go --sidp=0x410e0 --id=0x0 /home/ad3919/nfshome/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/D8M_Camera_Test.elf] + +!ENTRY com.altera.sbtgui.launch 4 0 2021-06-01 15:53:36.047 +!MESSAGE Failed Executing: [nios2-download, '--cable=USB-Blaster on 129.31.224.137 [USB-0]', --device=1, --instance=0, --go, --sidp=0x410e0, --id=0x0, /home/ad3919/nfshome/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/D8M_Camera_Test.elf] return code: 8 + +!ENTRY com.altera.sbtgui.launch 4 0 2021-06-01 15:53:36.052 +!MESSAGE Downloading ELF Process failed diff --git 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a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.make.core/specs.cpp b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.make.core/specs.cpp new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.make.core/specs.cpp @@ -0,0 +1 @@ + diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.managedbuilder.core/spec.C b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.managedbuilder.core/spec.C new file mode 100644 index 0000000..e69de29 diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.managedbuilder.core/spec.c b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.managedbuilder.core/spec.c new file mode 100644 index 0000000..e69de29 diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.ui/D8M_Camera_Test.build.log b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.ui/D8M_Camera_Test.build.log new file mode 100644 index 0000000..2f46da9 --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.ui/D8M_Camera_Test.build.log @@ -0,0 +1,9 @@ +15:53:28 **** Incremental Build of configuration Nios II for project D8M_Camera_Test **** +make all +Info: Building ../D8M_Camera_Test_bsp/ +make --no-print-directory -C ../D8M_Camera_Test_bsp/ +[BSP build complete] +[D8M_Camera_Test build complete] + +15:53:28 Build Finished (took 237ms) + diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.ui/D8M_Camera_Test_bsp.build.log b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.ui/D8M_Camera_Test_bsp.build.log new file mode 100644 index 0000000..1f0e53a --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.ui/D8M_Camera_Test_bsp.build.log @@ -0,0 +1,129 @@ +15:52:33 **** Build of configuration Nios II for project D8M_Camera_Test_bsp **** +make all +Compiling alt_alarm_start.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_alarm_start.o HAL/src/alt_alarm_start.c +Compiling alt_busy_sleep.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_busy_sleep.o HAL/src/alt_busy_sleep.c +Compiling alt_close.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_close.o HAL/src/alt_close.c +Compiling alt_dcache_flush.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_dcache_flush.o HAL/src/alt_dcache_flush.c +Compiling alt_dcache_flush_all.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_dcache_flush_all.o HAL/src/alt_dcache_flush_all.c +Compiling alt_dcache_flush_no_writeback.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_dcache_flush_no_writeback.o HAL/src/alt_dcache_flush_no_writeback.c +Compiling alt_dev.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_dev.o HAL/src/alt_dev.c +Compiling alt_dma_rxchan_open.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_dma_rxchan_open.o HAL/src/alt_dma_rxchan_open.c +Compiling alt_dma_txchan_open.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_dma_txchan_open.o HAL/src/alt_dma_txchan_open.c +Compiling alt_ecc_fatal_exception.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_ecc_fatal_exception.o HAL/src/alt_ecc_fatal_exception.c +Compiling alt_exception_entry.S... +nios2-elf-gcc -MP -MMD -c -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -Wa,-gdwarf2 -o obj/HAL/src/alt_exception_entry.o HAL/src/alt_exception_entry.S +Compiling alt_exit.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_exit.o HAL/src/alt_exit.c +Compiling alt_fcntl.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_fcntl.o HAL/src/alt_fcntl.c +Compiling alt_fd_lock.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_fd_lock.o HAL/src/alt_fd_lock.c +Compiling alt_fd_unlock.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_fd_unlock.o HAL/src/alt_fd_unlock.c +Compiling alt_find_dev.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_find_dev.o HAL/src/alt_find_dev.c +Compiling alt_find_file.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_find_file.o HAL/src/alt_find_file.c +Compiling alt_flash_dev.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_flash_dev.o HAL/src/alt_flash_dev.c +Compiling alt_fs_reg.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_fs_reg.o HAL/src/alt_fs_reg.c +Compiling alt_fstat.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_fstat.o HAL/src/alt_fstat.c +Compiling alt_get_fd.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_get_fd.o HAL/src/alt_get_fd.c +Compiling alt_gmon.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_gmon.o HAL/src/alt_gmon.c +Compiling alt_icache_flush.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_icache_flush.o HAL/src/alt_icache_flush.c +Compiling alt_icache_flush_all.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_icache_flush_all.o HAL/src/alt_icache_flush_all.c +Compiling alt_iic.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_iic.o HAL/src/alt_iic.c +Compiling alt_iic_isr_register.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_iic_isr_register.o HAL/src/alt_iic_isr_register.c +Compiling alt_instruction_exception_entry.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_instruction_exception_entry.o HAL/src/alt_instruction_exception_entry.c +Compiling alt_instruction_exception_register.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_instruction_exception_register.o HAL/src/alt_instruction_exception_register.c +Compiling alt_io_redirect.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_io_redirect.o HAL/src/alt_io_redirect.c +Compiling alt_ioctl.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_ioctl.o HAL/src/alt_ioctl.c +Compiling alt_irq_entry.S... +nios2-elf-gcc -MP -MMD -c -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -Wa,-gdwarf2 -o obj/HAL/src/alt_irq_entry.o HAL/src/alt_irq_entry.S +Compiling alt_irq_handler.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_irq_handler.o HAL/src/alt_irq_handler.c +Compiling alt_irq_register.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_irq_register.o HAL/src/alt_irq_register.c +Compiling alt_irq_vars.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_irq_vars.o HAL/src/alt_irq_vars.c +Compiling alt_isatty.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_isatty.o HAL/src/alt_isatty.c +Compiling alt_lseek.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_lseek.o HAL/src/alt_lseek.c +Compiling alt_main.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_main.o HAL/src/alt_main.c +Compiling alt_open.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_open.o HAL/src/alt_open.c +Compiling alt_read.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_read.o HAL/src/alt_read.c +Compiling alt_release_fd.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_release_fd.o HAL/src/alt_release_fd.c +Compiling alt_remap_cached.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_remap_cached.o HAL/src/alt_remap_cached.c +Compiling alt_remap_uncached.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_remap_uncached.o HAL/src/alt_remap_uncached.c +Compiling alt_sbrk.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_sbrk.o HAL/src/alt_sbrk.c +Compiling alt_software_exception.S... +nios2-elf-gcc -MP -MMD -c -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -Wa,-gdwarf2 -o obj/HAL/src/alt_software_exception.o HAL/src/alt_software_exception.S +Compiling alt_tick.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_tick.o HAL/src/alt_tick.c +Compiling alt_uncached_free.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_uncached_free.o HAL/src/alt_uncached_free.c +Compiling alt_uncached_malloc.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_uncached_malloc.o HAL/src/alt_uncached_malloc.c +Compiling alt_write.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_write.o HAL/src/alt_write.c +Compiling altera_nios2_gen2_irq.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/altera_nios2_gen2_irq.o HAL/src/altera_nios2_gen2_irq.c +Compiling crt0.S... +nios2-elf-gcc -MP -MMD -c -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -Wa,-gdwarf2 -o obj/HAL/src/crt0.o HAL/src/crt0.S +Compiling alt_sys_init.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/alt_sys_init.o alt_sys_init.c +Compiling altera_avalon_jtag_uart_fd.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/drivers/src/altera_avalon_jtag_uart_fd.o drivers/src/altera_avalon_jtag_uart_fd.c +Compiling altera_avalon_jtag_uart_init.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/drivers/src/altera_avalon_jtag_uart_init.o drivers/src/altera_avalon_jtag_uart_init.c +Compiling altera_avalon_jtag_uart_ioctl.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/drivers/src/altera_avalon_jtag_uart_ioctl.o drivers/src/altera_avalon_jtag_uart_ioctl.c +Compiling altera_avalon_jtag_uart_read.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/drivers/src/altera_avalon_jtag_uart_read.o drivers/src/altera_avalon_jtag_uart_read.c +Compiling altera_avalon_jtag_uart_write.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/drivers/src/altera_avalon_jtag_uart_write.o drivers/src/altera_avalon_jtag_uart_write.c +Compiling altera_avalon_sysid_qsys.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/drivers/src/altera_avalon_sysid_qsys.o drivers/src/altera_avalon_sysid_qsys.c +Compiling altera_avalon_timer_sc.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/drivers/src/altera_avalon_timer_sc.o drivers/src/altera_avalon_timer_sc.c +Compiling altera_avalon_timer_ts.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/drivers/src/altera_avalon_timer_ts.o drivers/src/altera_avalon_timer_ts.c +Compiling altera_avalon_timer_vars.c... +nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/drivers/src/altera_avalon_timer_vars.o drivers/src/altera_avalon_timer_vars.c +Creating libhal_bsp.a... +rm -f -f libhal_bsp.a +nios2-elf-ar -src libhal_bsp.a obj/HAL/src/alt_alarm_start.o obj/HAL/src/alt_busy_sleep.o obj/HAL/src/alt_close.o obj/HAL/src/alt_dcache_flush.o obj/HAL/src/alt_dcache_flush_all.o obj/HAL/src/alt_dcache_flush_no_writeback.o obj/HAL/src/alt_dev.o obj/HAL/src/alt_dev_llist_insert.o obj/HAL/src/alt_dma_rxchan_open.o obj/HAL/src/alt_dma_txchan_open.o obj/HAL/src/alt_do_ctors.o obj/HAL/src/alt_do_dtors.o obj/HAL/src/alt_ecc_fatal_entry.o obj/HAL/src/alt_ecc_fatal_exception.o obj/HAL/src/alt_env_lock.o obj/HAL/src/alt_environ.o obj/HAL/src/alt_errno.o obj/HAL/src/alt_exception_entry.o obj/HAL/src/alt_exception_muldiv.o obj/HAL/src/alt_exception_trap.o obj/HAL/src/alt_execve.o obj/HAL/src/alt_exit.o obj/HAL/src/alt_fcntl.o obj/HAL/src/alt_fd_lock.o obj/HAL/src/alt_fd_unlock.o obj/HAL/src/alt_find_dev.o obj/HAL/src/alt_find_file.o obj/HAL/src/alt_flash_dev.o obj/HAL/src/alt_fork.o obj/HAL/src/alt_fs_reg.o obj/HAL/src/alt_fstat.o obj/HAL/src/alt_get_fd.o obj/HAL/src/alt_getchar.o obj/HAL/src/alt_getpid.o obj/HAL/src/alt_gettod.o obj/HAL/src/alt_gmon.o obj/HAL/src/alt_icache_flush.o obj/HAL/src/alt_icache_flush_all.o obj/HAL/src/alt_iic.o obj/HAL/src/alt_iic_isr_register.o obj/HAL/src/alt_instruction_exception_entry.o obj/HAL/src/alt_instruction_exception_register.o obj/HAL/src/alt_io_redirect.o obj/HAL/src/alt_ioctl.o obj/HAL/src/alt_irq_entry.o obj/HAL/src/alt_irq_handler.o obj/HAL/src/alt_irq_register.o obj/HAL/src/alt_irq_vars.o obj/HAL/src/alt_isatty.o obj/HAL/src/alt_kill.o obj/HAL/src/alt_link.o obj/HAL/src/alt_load.o obj/HAL/src/alt_log_macro.o obj/HAL/src/alt_log_printf.o obj/HAL/src/alt_lseek.o obj/HAL/src/alt_main.o obj/HAL/src/alt_malloc_lock.o obj/HAL/src/alt_mcount.o obj/HAL/src/alt_open.o obj/HAL/src/alt_printf.o obj/HAL/src/alt_putchar.o obj/HAL/src/alt_putcharbuf.o obj/HAL/src/alt_putstr.o obj/HAL/src/alt_read.o obj/HAL/src/alt_release_fd.o obj/HAL/src/alt_remap_cached.o obj/HAL/src/alt_remap_uncached.o obj/HAL/src/alt_rename.o obj/HAL/src/alt_sbrk.o obj/HAL/src/alt_settod.o obj/HAL/src/alt_software_exception.o obj/HAL/src/alt_stat.o obj/HAL/src/alt_tick.o obj/HAL/src/alt_times.o obj/HAL/src/alt_uncached_free.o obj/HAL/src/alt_uncached_malloc.o obj/HAL/src/alt_unlink.o obj/HAL/src/alt_usleep.o obj/HAL/src/alt_wait.o obj/HAL/src/alt_write.o obj/HAL/src/altera_nios2_gen2_irq.o obj/HAL/src/crt0.o obj/alt_sys_init.o obj/drivers/src/altera_avalon_jtag_uart_fd.o obj/drivers/src/altera_avalon_jtag_uart_init.o obj/drivers/src/altera_avalon_jtag_uart_ioctl.o obj/drivers/src/altera_avalon_jtag_uart_read.o obj/drivers/src/altera_avalon_jtag_uart_write.o obj/drivers/src/altera_avalon_sysid_qsys.o obj/drivers/src/altera_avalon_timer_sc.o obj/drivers/src/altera_avalon_timer_ts.o obj/drivers/src/altera_avalon_timer_vars.o +[BSP build complete] + +15:52:36 Build Finished (took 2s.792ms) + diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.ui/dialog_settings.xml b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.ui/dialog_settings.xml new file mode 100644 index 0000000..c552249 --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.ui/dialog_settings.xml @@ -0,0 +1,7 @@ + +
+
+
+
+
+
diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.ui/global-build.log b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.ui/global-build.log new file mode 100644 index 0000000..e446209 --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.ui/global-build.log @@ -0,0 +1,61 @@ +15:53:05 **** Build of configuration Nios II for project D8M_Camera_Test **** +make all +Info: Building ../D8M_Camera_Test_bsp/ +make --no-print-directory -C ../D8M_Camera_Test_bsp/ +[BSP build complete] +Info: Compiling I2C_core.c to obj/default/I2C_core.o +nios2-elf-gcc -xc -MP -MMD -c -I../D8M_Camera_Test_bsp//HAL/inc -I../D8M_Camera_Test_bsp/ -I../D8M_Camera_Test_bsp//drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/default/I2C_core.o I2C_core.c +I2C_core.c: In function 'oc_i2c_uninit': +I2C_core.c:146:15: warning: unknown escape sequence: '\I' + printf("\I2C core is failed to disable! \r\n"); + ^ +I2C_core.c: In function 'OC_I2CL_Read': +I2C_core.c:612:22: warning: unused variable 'DataLow' [-Wunused-variable] + alt_u8 DataHigh, DataLow; + ^ +I2C_core.c:612:12: warning: unused variable 'DataHigh' [-Wunused-variable] + alt_u8 DataHigh, DataLow; + ^ +Info: Compiling auto_focus.c to obj/default/auto_focus.o +nios2-elf-gcc -xc -MP -MMD -c -I../D8M_Camera_Test_bsp//HAL/inc -I../D8M_Camera_Test_bsp/ -I../D8M_Camera_Test_bsp//drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/default/auto_focus.o auto_focus.c +auto_focus.c: In function 'Focus_Window': +auto_focus.c:80:11: warning: 'end_focus' may be used uninitialized in this function [-Wmaybe-uninitialized] + return end_focus; + ^ +Info: Compiling main.c to obj/default/main.o +nios2-elf-gcc -xc -MP -MMD -c -I../D8M_Camera_Test_bsp//HAL/inc -I../D8M_Camera_Test_bsp/ -I../D8M_Camera_Test_bsp//drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/default/main.o main.c +main.c: In function 'main': +main.c:233:20: warning: format '%x' expects argument of type 'unsigned int', but argument 2 has type 'alt_u32 {aka long unsigned int}' [-Wformat=] + printf("\nExposure = %x ", exposureTime); + ^ +main.c:233:20: warning: format '%x' expects argument of type 'unsigned int', but argument 2 has type 'alt_u32 {aka long unsigned int}' [-Wformat=] +main.c:238:20: warning: format '%x' expects argument of type 'unsigned int', but argument 2 has type 'alt_u32 {aka long unsigned int}' [-Wformat=] + printf("\nExposure = %x ", exposureTime); + ^ +main.c:238:20: warning: format '%x' expects argument of type 'unsigned int', but argument 2 has type 'alt_u32 {aka long unsigned int}' [-Wformat=] +Info: Compiling mipi_bridge_config.c to obj/default/mipi_bridge_config.o +nios2-elf-gcc -xc -MP -MMD -c -I../D8M_Camera_Test_bsp//HAL/inc -I../D8M_Camera_Test_bsp/ -I../D8M_Camera_Test_bsp//drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/default/mipi_bridge_config.o mipi_bridge_config.c +Info: Compiling mipi_camera_config.c to obj/default/mipi_camera_config.o +nios2-elf-gcc -xc -MP -MMD -c -I../D8M_Camera_Test_bsp//HAL/inc -I../D8M_Camera_Test_bsp/ -I../D8M_Camera_Test_bsp//drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/default/mipi_camera_config.o mipi_camera_config.c +Info: Compiling queue.c to obj/default/queue.o +nios2-elf-gcc -xc -MP -MMD -c -I../D8M_Camera_Test_bsp//HAL/inc -I../D8M_Camera_Test_bsp/ -I../D8M_Camera_Test_bsp//drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/default/queue.o queue.c +Info: Linking D8M_Camera_Test.elf +nios2-elf-g++ -T'../D8M_Camera_Test_bsp//linker.x' -msys-crt0='../D8M_Camera_Test_bsp//obj/HAL/src/crt0.o' -msys-lib=hal_bsp -L../D8M_Camera_Test_bsp/ -Wl,-Map=D8M_Camera_Test.map -O0 -g -Wall -mno-hw-div -mhw-mul -mno-hw-mulx -o D8M_Camera_Test.elf obj/default/I2C_core.o obj/default/auto_focus.o obj/default/main.o obj/default/mipi_bridge_config.o obj/default/mipi_camera_config.o obj/default/queue.o -lm -msys-lib=m +nios2-elf-insert D8M_Camera_Test.elf --thread_model hal --cpu_name nios2_gen2 --qsys true --simulation_enabled false --id 0 --sidp 0x410e0 --timestamp 1622558600 --stderr_dev jtag_uart --stdin_dev jtag_uart --stdout_dev jtag_uart --sopc_system_name Qsys --quartus_project_dir "/home/ad3919/nfshome/EE2Rover/Vision/DE10_LITE_D8M_VIP_16" --jdi ../..//output_files/DE10_LITE_D8M_VIP.jdi --sopcinfo /home/ad3919/nfshome/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/../../Qsys.sopcinfo +Info: (D8M_Camera_Test.elf) 84 KBytes program size (code + initialized data). +Info: 5096 Bytes free for stack + heap. +Info: Creating D8M_Camera_Test.objdump +nios2-elf-objdump --disassemble --syms --all-header --source D8M_Camera_Test.elf >D8M_Camera_Test.objdump +[D8M_Camera_Test build complete] +15:53:25 **** Build of configuration Nios II for project D8M_Camera_Test **** +make all +Info: Building ../D8M_Camera_Test_bsp/ +make --no-print-directory -C ../D8M_Camera_Test_bsp/ +[BSP build complete] +[D8M_Camera_Test build complete] +15:53:28 **** Incremental Build of configuration Nios II for project D8M_Camera_Test **** +make all +Info: Building ../D8M_Camera_Test_bsp/ +make --no-print-directory -C ../D8M_Camera_Test_bsp/ +[BSP build complete] +[D8M_Camera_Test build complete] diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.history/41/700f9430dec2001b1f77c40a2d51fad4 b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.history/41/700f9430dec2001b1f77c40a2d51fad4 new file mode 100644 index 0000000..6ad8dec --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.history/41/700f9430dec2001b1f77c40a2d51fad4 @@ -0,0 +1,302 @@ + + +#include +#include "I2C_core.h" +#include "terasic_includes.h" +#include "mipi_camera_config.h" +#include "mipi_bridge_config.h" +#include "system.h" + +#include "auto_focus.h" + +#include +#include + +//EEE_IMGPROC defines +#define EEE_IMGPROC_MSG_START ('R'<<16 | 'B'<<8 | 'B') + +//offsets +#define EEE_IMGPROC_STATUS 0 +#define EEE_IMGPROC_MSG 1 +#define EEE_IMGPROC_ID 2 +#define EEE_IMGPROC_BBCOL 3 + +#define EXPOSURE_INIT 0x002000 +#define EXPOSURE_STEP 0x100 +#define GAIN_INIT 0xFFF +#define GAIN_STEP 0xFFF +#define DEFAULT_LEVEL 3 + +#define MIPI_REG_PHYClkCtl 0x0056 +#define MIPI_REG_PHYData0Ctl 0x0058 +#define MIPI_REG_PHYData1Ctl 0x005A +#define MIPI_REG_PHYData2Ctl 0x005C +#define MIPI_REG_PHYData3Ctl 0x005E +#define MIPI_REG_PHYTimDly 0x0060 +#define MIPI_REG_PHYSta 0x0062 +#define MIPI_REG_CSIStatus 0x0064 +#define MIPI_REG_CSIErrEn 0x0066 +#define MIPI_REG_MDLSynErr 0x0068 +#define MIPI_REG_FrmErrCnt 0x0080 +#define MIPI_REG_MDLErrCnt 0x0090 + +void mipi_clear_error(void){ + MipiBridgeRegWrite(MIPI_REG_CSIStatus,0x01FF); // clear error + MipiBridgeRegWrite(MIPI_REG_MDLSynErr,0x0000); // clear error + MipiBridgeRegWrite(MIPI_REG_FrmErrCnt,0x0000); // clear error + MipiBridgeRegWrite(MIPI_REG_MDLErrCnt, 0x0000); // clear error + + MipiBridgeRegWrite(0x0082,0x00); + MipiBridgeRegWrite(0x0084,0x00); + MipiBridgeRegWrite(0x0086,0x00); + MipiBridgeRegWrite(0x0088,0x00); + MipiBridgeRegWrite(0x008A,0x00); + MipiBridgeRegWrite(0x008C,0x00); + MipiBridgeRegWrite(0x008E,0x00); + MipiBridgeRegWrite(0x0090,0x00); +} + +void mipi_show_error_info(void){ + + alt_u16 PHY_status, SCI_status, MDLSynErr, FrmErrCnt, MDLErrCnt; + + PHY_status = MipiBridgeRegRead(MIPI_REG_PHYSta); + SCI_status = MipiBridgeRegRead(MIPI_REG_CSIStatus); + MDLSynErr = MipiBridgeRegRead(MIPI_REG_MDLSynErr); + FrmErrCnt = MipiBridgeRegRead(MIPI_REG_FrmErrCnt); + MDLErrCnt = MipiBridgeRegRead(MIPI_REG_MDLErrCnt); + printf("PHY_status=%xh, CSI_status=%xh, MDLSynErr=%xh, FrmErrCnt=%xh, MDLErrCnt=%xh\r\n", PHY_status, SCI_status, MDLSynErr,FrmErrCnt, MDLErrCnt); +} + +void mipi_show_error_info_more(void){ + printf("FrmErrCnt = %d\n",MipiBridgeRegRead(0x0080)); + printf("CRCErrCnt = %d\n",MipiBridgeRegRead(0x0082)); + printf("CorErrCnt = %d\n",MipiBridgeRegRead(0x0084)); + printf("HdrErrCnt = %d\n",MipiBridgeRegRead(0x0086)); + printf("EIDErrCnt = %d\n",MipiBridgeRegRead(0x0088)); + printf("CtlErrCnt = %d\n",MipiBridgeRegRead(0x008A)); + printf("SoTErrCnt = %d\n",MipiBridgeRegRead(0x008C)); + printf("SynErrCnt = %d\n",MipiBridgeRegRead(0x008E)); + printf("MDLErrCnt = %d\n",MipiBridgeRegRead(0x0090)); + printf("FIFOSTATUS = %d\n",MipiBridgeRegRead(0x00F8)); + printf("DataType = 0x%04x\n",MipiBridgeRegRead(0x006A)); + printf("CSIPktLen = %d\n",MipiBridgeRegRead(0x006E)); +} + + + +bool MIPI_Init(void){ + bool bSuccess; + + + bSuccess = oc_i2c_init_ex(I2C_OPENCORES_MIPI_BASE, 50*1000*1000,400*1000); //I2C: 400K + if (!bSuccess) + printf("failed to init MIPI- Bridge i2c\r\n"); + + usleep(50*1000); + MipiBridgeInit(); + + usleep(500*1000); + +// bSuccess = oc_i2c_init_ex(I2C_OPENCORES_CAMERA_BASE, 50*1000*1000,400*1000); //I2C: 400K +// if (!bSuccess) +// printf("failed to init MIPI- Camera i2c\r\n"); + + MipiCameraInit(); + MIPI_BIN_LEVEL(DEFAULT_LEVEL); +// OV8865_FOCUS_Move_to(340); + +// oc_i2c_uninit(I2C_OPENCORES_CAMERA_BASE); // Release I2C bus , due to two I2C master shared! + + + usleep(1000); + + +// oc_i2c_uninit(I2C_OPENCORES_MIPI_BASE); + + return bSuccess; +} + + + + +int main() +{ + + fcntl(STDIN_FILENO, F_SETFL, O_NONBLOCK); + + printf("DE10-LITE D8M VGA Demo\n"); + printf("Imperial College EEE2 Project version\n"); + IOWR(MIPI_PWDN_N_BASE, 0x00, 0x00); + IOWR(MIPI_RESET_N_BASE, 0x00, 0x00); + + usleep(2000); + IOWR(MIPI_PWDN_N_BASE, 0x00, 0xFF); + usleep(2000); + IOWR(MIPI_RESET_N_BASE, 0x00, 0xFF); + + printf("Image Processor ID: %x\n",IORD(0x42000,EEE_IMGPROC_ID)); + //printf("Image Processor ID: %x\n",IORD(EEE_IMGPROC_0_BASE,EEE_IMGPROC_ID)); //Don't know why this doesn't work - definition is in system.h in BSP + + + usleep(2000); + + + // MIPI Init + if (!MIPI_Init()){ + printf("MIPI_Init Init failed!\r\n"); + }else{ + printf("MIPI_Init Init successfully!\r\n"); + } + +// while(1){ + mipi_clear_error(); + usleep(50*1000); + mipi_clear_error(); + usleep(1000*1000); + mipi_show_error_info(); +// mipi_show_error_info_more(); + printf("\n"); +// } + + +#if 0 // focus sweep + printf("\nFocus sweep\n"); + alt_u16 ii= 350; + alt_u8 dir = 0; + while(1){ + if(ii< 50) dir = 1; + else if (ii> 1000) dir =0; + + if(dir) ii += 20; + else ii -= 20; + + printf("%d\n",ii); + OV8865_FOCUS_Move_to(ii); + usleep(50*1000); + } +#endif + + + + + + + ////////////////////////////////////////////////////////// + alt_u16 bin_level = DEFAULT_LEVEL; + alt_u8 manual_focus_step = 10; + alt_u16 current_focus = 300; + int boundingBoxColour = 0; + alt_u32 exposureTime = EXPOSURE_INIT; + alt_u16 gain = GAIN_INIT; + + OV8865SetExposure(exposureTime); + OV8865SetGain(gain); + Focus_Init(); + while(1){ + + // touch KEY0 to trigger Auto focus + if((IORD(KEY_BASE,0)&0x03) == 0x02){ + + current_focus = Focus_Window(320,240); + } + // touch KEY1 to ZOOM + if((IORD(KEY_BASE,0)&0x03) == 0x01){ + if(bin_level == 3 )bin_level = 1; + else bin_level ++; + printf("set bin level to %d\n",bin_level); + MIPI_BIN_LEVEL(bin_level); + usleep(500000); + + } + + + #if 0 + if((IORD(KEY_BASE,0)&0x0F) == 0x0E){ + + current_focus = Focus_Window(320,240); + } + + // touch KEY1 to trigger Manual focus - step + if((IORD(KEY_BASE,0)&0x0F) == 0x0D){ + + if(current_focus > manual_focus_step) current_focus -= manual_focus_step; + else current_focus = 0; + OV8865_FOCUS_Move_to(current_focus); + + } + + // touch KEY2 to trigger Manual focus + step + if((IORD(KEY_BASE,0)&0x0F) == 0x0B){ + current_focus += manual_focus_step; + if(current_focus >1023) current_focus = 1023; + OV8865_FOCUS_Move_to(current_focus); + } + + // touch KEY3 to ZOOM + if((IORD(KEY_BASE,0)&0x0F) == 0x07){ + if(bin_level == 3 )bin_level = 1; + else bin_level ++; + printf("set bin level to %d\n",bin_level); + MIPI_BIN_LEVEL(bin_level); + usleep(500000); + + } + #endif + + //Read messages from the image processor and print them on the terminal + while ((IORD(0x42000,EEE_IMGPROC_STATUS)>>8) & 0xff) { //Find out if there are words to read + int word = IORD(0x42000,EEE_IMGPROC_MSG); //Get next word from message buffer + if (word == EEE_IMGPROC_MSG_START){ //Newline on message identifier + printf("\n"); + } + printf("%08x ",word); + } + + //Update the bounding box colour + boundingBoxColour = ((boundingBoxColour + 1) & 0xff); + IOWR(0x42000, EEE_IMGPROC_BBCOL, (boundingBoxColour << 8) | (0xff - boundingBoxColour)); + + //Process input commands + int in = getchar(); + switch (in) { + case 'e': { + exposureTime += EXPOSURE_STEP; + OV8865SetExposure(exposureTime); + printf("\nExposure = %x ", exposureTime); + break;} + case 'd': { + exposureTime -= EXPOSURE_STEP; + OV8865SetExposure(exposureTime); + printf("\nExposure = %x ", exposureTime); + break;} + case 't': { + gain += GAIN_STEP; + OV8865SetGain(gain); + printf("\nGain = %x ", gain); + break;} + case 'g': { + gain -= GAIN_STEP; + OV8865SetGain(gain); + printf("\nGain = %x ", gain); + break;} + case 'r': { + current_focus += manual_focus_step; + if(current_focus >1023) current_focus = 1023; + OV8865_FOCUS_Move_to(current_focus); + printf("\nFocus = %x ",current_focus); + break;} + case 'f': { + if(current_focus > manual_focus_step) current_focus -= manual_focus_step; + OV8865_FOCUS_Move_to(current_focus); + printf("\nFocus = %x ",current_focus); + break;} + } + + + //Main loop delay + usleep(10000); + + }; + return 0; +} diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.history/70/707fa8e6dfc2001b1f77c40a2d51fad4 b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.history/70/707fa8e6dfc2001b1f77c40a2d51fad4 new file mode 100644 index 0000000..20385e7 --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.history/70/707fa8e6dfc2001b1f77c40a2d51fad4 @@ -0,0 +1,283 @@ +#include +#include "I2C_core.h" +#include "terasic_includes.h" +#include "mipi_camera_config.h" +#include "mipi_bridge_config.h" +#include "system.h" + +#include "auto_focus.h" + +#include +#include + +//EEE_IMGPROC defines +#define EEE_IMGPROC_MSG_START ('R'<<16 | 'B'<<8 | 'B') + +//offsets +#define EEE_IMGPROC_STATUS 0 +#define EEE_IMGPROC_MSG 1 +#define EEE_IMGPROC_ID 2 +#define EEE_IMGPROC_BBCOL 3 + +#define EXPOSURE_INIT 0x002000 +#define EXPOSURE_STEP 0x100 +#define GAIN_INIT 0xFFF +#define GAIN_STEP 0xFFF +#define DEFAULT_LEVEL 3 + +#define MIPI_REG_PHYClkCtl 0x0056 +#define MIPI_REG_PHYData0Ctl 0x0058 +#define MIPI_REG_PHYData1Ctl 0x005A +#define MIPI_REG_PHYData2Ctl 0x005C +#define MIPI_REG_PHYData3Ctl 0x005E +#define MIPI_REG_PHYTimDly 0x0060 +#define MIPI_REG_PHYSta 0x0062 +#define MIPI_REG_CSIStatus 0x0064 +#define MIPI_REG_CSIErrEn 0x0066 +#define MIPI_REG_MDLSynErr 0x0068 +#define MIPI_REG_FrmErrCnt 0x0080 +#define MIPI_REG_MDLErrCnt 0x0090 + +void mipi_clear_error(void){ + MipiBridgeRegWrite(MIPI_REG_CSIStatus,0x01FF); // clear error + MipiBridgeRegWrite(MIPI_REG_MDLSynErr,0x0000); // clear error + MipiBridgeRegWrite(MIPI_REG_FrmErrCnt,0x0000); // clear error + MipiBridgeRegWrite(MIPI_REG_MDLErrCnt, 0x0000); // clear error + + MipiBridgeRegWrite(0x0082,0x00); + MipiBridgeRegWrite(0x0084,0x00); + MipiBridgeRegWrite(0x0086,0x00); + MipiBridgeRegWrite(0x0088,0x00); + MipiBridgeRegWrite(0x008A,0x00); + MipiBridgeRegWrite(0x008C,0x00); + MipiBridgeRegWrite(0x008E,0x00); + MipiBridgeRegWrite(0x0090,0x00); +} + +void mipi_show_error_info(void){ + + alt_u16 PHY_status, SCI_status, MDLSynErr, FrmErrCnt, MDLErrCnt; + + PHY_status = MipiBridgeRegRead(MIPI_REG_PHYSta); + SCI_status = MipiBridgeRegRead(MIPI_REG_CSIStatus); + MDLSynErr = MipiBridgeRegRead(MIPI_REG_MDLSynErr); + FrmErrCnt = MipiBridgeRegRead(MIPI_REG_FrmErrCnt); + MDLErrCnt = MipiBridgeRegRead(MIPI_REG_MDLErrCnt); + printf("PHY_status=%xh, CSI_status=%xh, MDLSynErr=%xh, FrmErrCnt=%xh, MDLErrCnt=%xh\r\n", PHY_status, SCI_status, MDLSynErr,FrmErrCnt, MDLErrCnt); +} + +void mipi_show_error_info_more(void){ + printf("FrmErrCnt = %d\n",MipiBridgeRegRead(0x0080)); + printf("CRCErrCnt = %d\n",MipiBridgeRegRead(0x0082)); + printf("CorErrCnt = %d\n",MipiBridgeRegRead(0x0084)); + printf("HdrErrCnt = %d\n",MipiBridgeRegRead(0x0086)); + printf("EIDErrCnt = %d\n",MipiBridgeRegRead(0x0088)); + printf("CtlErrCnt = %d\n",MipiBridgeRegRead(0x008A)); + printf("SoTErrCnt = %d\n",MipiBridgeRegRead(0x008C)); + printf("SynErrCnt = %d\n",MipiBridgeRegRead(0x008E)); + printf("MDLErrCnt = %d\n",MipiBridgeRegRead(0x0090)); + printf("FIFOSTATUS = %d\n",MipiBridgeRegRead(0x00F8)); + printf("DataType = 0x%04x\n",MipiBridgeRegRead(0x006A)); + printf("CSIPktLen = %d\n",MipiBridgeRegRead(0x006E)); +} + +bool MIPI_Init(void){ + bool bSuccess; + bSuccess = oc_i2c_init_ex(I2C_OPENCORES_MIPI_BASE, 50*1000*1000,400*1000); //I2C: 400K + if (!bSuccess) + printf("failed to init MIPI- Bridge i2c\r\n"); + usleep(50*1000); + MipiBridgeInit(); + usleep(500*1000); +// bSuccess = oc_i2c_init_ex(I2C_OPENCORES_CAMERA_BASE, 50*1000*1000,400*1000); //I2C: 400K +// if (!bSuccess) +// printf("failed to init MIPI- Camera i2c\r\n"); + MipiCameraInit(); + MIPI_BIN_LEVEL(DEFAULT_LEVEL); +// OV8865_FOCUS_Move_to(340); +// oc_i2c_uninit(I2C_OPENCORES_CAMERA_BASE); // Release I2C bus , due to two I2C master shared! + usleep(1000); +// oc_i2c_uninit(I2C_OPENCORES_MIPI_BASE); + return bSuccess; +} + +int main() +{ + + fcntl(STDIN_FILENO, F_SETFL, O_NONBLOCK); + + printf("DE10-LITE D8M VGA Demo\n"); + printf("Imperial College EEE2 Project version\n"); + IOWR(MIPI_PWDN_N_BASE, 0x00, 0x00); + IOWR(MIPI_RESET_N_BASE, 0x00, 0x00); + + usleep(2000); + IOWR(MIPI_PWDN_N_BASE, 0x00, 0xFF); + usleep(2000); + IOWR(MIPI_RESET_N_BASE, 0x00, 0xFF); + + printf("Image Processor ID: %x\n",IORD(EEE_IMGPROC_0_BASE,EEE_IMGPROC_ID)); + //printf("Image Processor ID: %x\n",IORD(EEE_IMGPROC_0_BASE,EEE_IMGPROC_ID)); //Don't know why this doesn't work - definition is in system.h in BSP + + + usleep(2000); + + + // MIPI Init + if (!MIPI_Init()){ + printf("MIPI_Init Init failed!\r\n"); + }else{ + printf("MIPI_Init Init successfully!\r\n"); + } + +// while(1){ + mipi_clear_error(); + usleep(50*1000); + mipi_clear_error(); + usleep(1000*1000); + mipi_show_error_info(); +// mipi_show_error_info_more(); + printf("\n"); +// } + + +#if 0 // focus sweep + printf("\nFocus sweep\n"); + alt_u16 ii= 350; + alt_u8 dir = 0; + while(1){ + if(ii< 50) dir = 1; + else if (ii> 1000) dir =0; + + if(dir) ii += 20; + else ii -= 20; + + printf("%d\n",ii); + OV8865_FOCUS_Move_to(ii); + usleep(50*1000); + } +#endif + + + + + + + ////////////////////////////////////////////////////////// + alt_u16 bin_level = DEFAULT_LEVEL; + alt_u8 manual_focus_step = 10; + alt_u16 current_focus = 300; + int boundingBoxColour = 0; + alt_u32 exposureTime = EXPOSURE_INIT; + alt_u16 gain = GAIN_INIT; + + OV8865SetExposure(exposureTime); + OV8865SetGain(gain); + Focus_Init(); + while(1){ + + // touch KEY0 to trigger Auto focus + if((IORD(KEY_BASE,0)&0x03) == 0x02){ + + current_focus = Focus_Window(320,240); + } + // touch KEY1 to ZOOM + if((IORD(KEY_BASE,0)&0x03) == 0x01){ + if(bin_level == 3 )bin_level = 1; + else bin_level ++; + printf("set bin level to %d\n",bin_level); + MIPI_BIN_LEVEL(bin_level); + usleep(500000); + + } + + + #if 0 + if((IORD(KEY_BASE,0)&0x0F) == 0x0E){ + + current_focus = Focus_Window(320,240); + } + + // touch KEY1 to trigger Manual focus - step + if((IORD(KEY_BASE,0)&0x0F) == 0x0D){ + + if(current_focus > manual_focus_step) current_focus -= manual_focus_step; + else current_focus = 0; + OV8865_FOCUS_Move_to(current_focus); + + } + + // touch KEY2 to trigger Manual focus + step + if((IORD(KEY_BASE,0)&0x0F) == 0x0B){ + current_focus += manual_focus_step; + if(current_focus >1023) current_focus = 1023; + OV8865_FOCUS_Move_to(current_focus); + } + + // touch KEY3 to ZOOM + if((IORD(KEY_BASE,0)&0x0F) == 0x07){ + if(bin_level == 3 )bin_level = 1; + else bin_level ++; + printf("set bin level to %d\n",bin_level); + MIPI_BIN_LEVEL(bin_level); + usleep(500000); + + } + #endif + + //Read messages from the image processor and print them on the terminal + while ((IORD(0x42000,EEE_IMGPROC_STATUS)>>8) & 0xff) { //Find out if there are words to read + int word = IORD(0x42000,EEE_IMGPROC_MSG); //Get next word from message buffer + if (word == EEE_IMGPROC_MSG_START){ //Newline on message identifier + printf("\n"); + } + printf("%08x ",word); + } + + //Update the bounding box colour + boundingBoxColour = ((boundingBoxColour + 1) & 0xff); + IOWR(0x42000, EEE_IMGPROC_BBCOL, (boundingBoxColour << 8) | (0xff - boundingBoxColour)); + + //Process input commands + int in = getchar(); + switch (in) { + case 'e': { + exposureTime += EXPOSURE_STEP; + OV8865SetExposure(exposureTime); + printf("\nExposure = %x ", exposureTime); + break;} + case 'd': { + exposureTime -= EXPOSURE_STEP; + OV8865SetExposure(exposureTime); + printf("\nExposure = %x ", exposureTime); + break;} + case 't': { + gain += GAIN_STEP; + OV8865SetGain(gain); + printf("\nGain = %x ", gain); + break;} + case 'g': { + gain -= GAIN_STEP; + OV8865SetGain(gain); + printf("\nGain = %x ", gain); + break;} + case 'r': { + current_focus += manual_focus_step; + if(current_focus >1023) current_focus = 1023; + OV8865_FOCUS_Move_to(current_focus); + printf("\nFocus = %x ",current_focus); + break;} + case 'f': { + if(current_focus > manual_focus_step) current_focus -= manual_focus_step; + OV8865_FOCUS_Move_to(current_focus); + printf("\nFocus = %x ",current_focus); + break;} + } + + + //Main loop delay + usleep(10000); + + }; + return 0; +} diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.history/a8/f0a55278dfc2001b1f77c40a2d51fad4 b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.history/a8/f0a55278dfc2001b1f77c40a2d51fad4 new file mode 100644 index 0000000..fcfe7dc --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.history/a8/f0a55278dfc2001b1f77c40a2d51fad4 @@ -0,0 +1,302 @@ + + +#include +#include "I2C_core.h" +#include "terasic_includes.h" +#include "mipi_camera_config.h" +#include "mipi_bridge_config.h" +#include "system.h" + +#include "auto_focus.h" + +#include +#include + +//EEE_IMGPROC defines +#define EEE_IMGPROC_MSG_START ('R'<<16 | 'B'<<8 | 'B') + +//offsets +#define EEE_IMGPROC_STATUS 0 +#define EEE_IMGPROC_MSG 1 +#define EEE_IMGPROC_ID 2 +#define EEE_IMGPROC_BBCOL 3 + +#define EXPOSURE_INIT 0x002000 +#define EXPOSURE_STEP 0x100 +#define GAIN_INIT 0xFFF +#define GAIN_STEP 0xFFF +#define DEFAULT_LEVEL 3 + +#define MIPI_REG_PHYClkCtl 0x0056 +#define MIPI_REG_PHYData0Ctl 0x0058 +#define MIPI_REG_PHYData1Ctl 0x005A +#define MIPI_REG_PHYData2Ctl 0x005C +#define MIPI_REG_PHYData3Ctl 0x005E +#define MIPI_REG_PHYTimDly 0x0060 +#define MIPI_REG_PHYSta 0x0062 +#define MIPI_REG_CSIStatus 0x0064 +#define MIPI_REG_CSIErrEn 0x0066 +#define MIPI_REG_MDLSynErr 0x0068 +#define MIPI_REG_FrmErrCnt 0x0080 +#define MIPI_REG_MDLErrCnt 0x0090 + +void mipi_clear_error(void){ + MipiBridgeRegWrite(MIPI_REG_CSIStatus,0x01FF); // clear error + MipiBridgeRegWrite(MIPI_REG_MDLSynErr,0x0000); // clear error + MipiBridgeRegWrite(MIPI_REG_FrmErrCnt,0x0000); // clear error + MipiBridgeRegWrite(MIPI_REG_MDLErrCnt, 0x0000); // clear error + + MipiBridgeRegWrite(0x0082,0x00); + MipiBridgeRegWrite(0x0084,0x00); + MipiBridgeRegWrite(0x0086,0x00); + MipiBridgeRegWrite(0x0088,0x00); + MipiBridgeRegWrite(0x008A,0x00); + MipiBridgeRegWrite(0x008C,0x00); + MipiBridgeRegWrite(0x008E,0x00); + MipiBridgeRegWrite(0x0090,0x00); +} + +void mipi_show_error_info(void){ + + alt_u16 PHY_status, SCI_status, MDLSynErr, FrmErrCnt, MDLErrCnt; + + PHY_status = MipiBridgeRegRead(MIPI_REG_PHYSta); + SCI_status = MipiBridgeRegRead(MIPI_REG_CSIStatus); + MDLSynErr = MipiBridgeRegRead(MIPI_REG_MDLSynErr); + FrmErrCnt = MipiBridgeRegRead(MIPI_REG_FrmErrCnt); + MDLErrCnt = MipiBridgeRegRead(MIPI_REG_MDLErrCnt); + printf("PHY_status=%xh, CSI_status=%xh, MDLSynErr=%xh, FrmErrCnt=%xh, MDLErrCnt=%xh\r\n", PHY_status, SCI_status, MDLSynErr,FrmErrCnt, MDLErrCnt); +} + +void mipi_show_error_info_more(void){ + printf("FrmErrCnt = %d\n",MipiBridgeRegRead(0x0080)); + printf("CRCErrCnt = %d\n",MipiBridgeRegRead(0x0082)); + printf("CorErrCnt = %d\n",MipiBridgeRegRead(0x0084)); + printf("HdrErrCnt = %d\n",MipiBridgeRegRead(0x0086)); + printf("EIDErrCnt = %d\n",MipiBridgeRegRead(0x0088)); + printf("CtlErrCnt = %d\n",MipiBridgeRegRead(0x008A)); + printf("SoTErrCnt = %d\n",MipiBridgeRegRead(0x008C)); + printf("SynErrCnt = %d\n",MipiBridgeRegRead(0x008E)); + printf("MDLErrCnt = %d\n",MipiBridgeRegRead(0x0090)); + printf("FIFOSTATUS = %d\n",MipiBridgeRegRead(0x00F8)); + printf("DataType = 0x%04x\n",MipiBridgeRegRead(0x006A)); + printf("CSIPktLen = %d\n",MipiBridgeRegRead(0x006E)); +} + + + +bool MIPI_Init(void){ + bool bSuccess; + + + bSuccess = oc_i2c_init_ex(I2C_OPENCORES_MIPI_BASE, 50*1000*1000,400*1000); //I2C: 400K + if (!bSuccess) + printf("failed to init MIPI- Bridge i2c\r\n"); + + usleep(50*1000); + MipiBridgeInit(); + + usleep(500*1000); + +// bSuccess = oc_i2c_init_ex(I2C_OPENCORES_CAMERA_BASE, 50*1000*1000,400*1000); //I2C: 400K +// if (!bSuccess) +// printf("failed to init MIPI- Camera i2c\r\n"); + + MipiCameraInit(); + MIPI_BIN_LEVEL(DEFAULT_LEVEL); +// OV8865_FOCUS_Move_to(340); + +// oc_i2c_uninit(I2C_OPENCORES_CAMERA_BASE); // Release I2C bus , due to two I2C master shared! + + + usleep(1000); + + +// oc_i2c_uninit(I2C_OPENCORES_MIPI_BASE); + + return bSuccess; +} + + + + +int main() +{ + + fcntl(STDIN_FILENO, F_SETFL, O_NONBLOCK); + + printf("DE10-LITE D8M VGA Demo\n"); + printf("Imperial College EEE2 Project version\n"); + IOWR(MIPI_PWDN_N_BASE, 0x00, 0x00); + IOWR(MIPI_RESET_N_BASE, 0x00, 0x00); + + usleep(2000); + IOWR(MIPI_PWDN_N_BASE, 0x00, 0xFF); + usleep(2000); + IOWR(MIPI_RESET_N_BASE, 0x00, 0xFF); + + printf("Image Processor ID: %x\n",IORD(EEE_IMGPROC_0_BASE,EEE_IMGPROC_ID)); + //printf("Image Processor ID: %x\n",IORD(EEE_IMGPROC_0_BASE,EEE_IMGPROC_ID)); //Don't know why this doesn't work - definition is in system.h in BSP + + + usleep(2000); + + + // MIPI Init + if (!MIPI_Init()){ + printf("MIPI_Init Init failed!\r\n"); + }else{ + printf("MIPI_Init Init successfully!\r\n"); + } + +// while(1){ + mipi_clear_error(); + usleep(50*1000); + mipi_clear_error(); + usleep(1000*1000); + mipi_show_error_info(); +// mipi_show_error_info_more(); + printf("\n"); +// } + + +#if 0 // focus sweep + printf("\nFocus sweep\n"); + alt_u16 ii= 350; + alt_u8 dir = 0; + while(1){ + if(ii< 50) dir = 1; + else if (ii> 1000) dir =0; + + if(dir) ii += 20; + else ii -= 20; + + printf("%d\n",ii); + OV8865_FOCUS_Move_to(ii); + usleep(50*1000); + } +#endif + + + + + + + ////////////////////////////////////////////////////////// + alt_u16 bin_level = DEFAULT_LEVEL; + alt_u8 manual_focus_step = 10; + alt_u16 current_focus = 300; + int boundingBoxColour = 0; + alt_u32 exposureTime = EXPOSURE_INIT; + alt_u16 gain = GAIN_INIT; + + OV8865SetExposure(exposureTime); + OV8865SetGain(gain); + Focus_Init(); + while(1){ + + // touch KEY0 to trigger Auto focus + if((IORD(KEY_BASE,0)&0x03) == 0x02){ + + current_focus = Focus_Window(320,240); + } + // touch KEY1 to ZOOM + if((IORD(KEY_BASE,0)&0x03) == 0x01){ + if(bin_level == 3 )bin_level = 1; + else bin_level ++; + printf("set bin level to %d\n",bin_level); + MIPI_BIN_LEVEL(bin_level); + usleep(500000); + + } + + + #if 0 + if((IORD(KEY_BASE,0)&0x0F) == 0x0E){ + + current_focus = Focus_Window(320,240); + } + + // touch KEY1 to trigger Manual focus - step + if((IORD(KEY_BASE,0)&0x0F) == 0x0D){ + + if(current_focus > manual_focus_step) current_focus -= manual_focus_step; + else current_focus = 0; + OV8865_FOCUS_Move_to(current_focus); + + } + + // touch KEY2 to trigger Manual focus + step + if((IORD(KEY_BASE,0)&0x0F) == 0x0B){ + current_focus += manual_focus_step; + if(current_focus >1023) current_focus = 1023; + OV8865_FOCUS_Move_to(current_focus); + } + + // touch KEY3 to ZOOM + if((IORD(KEY_BASE,0)&0x0F) == 0x07){ + if(bin_level == 3 )bin_level = 1; + else bin_level ++; + printf("set bin level to %d\n",bin_level); + MIPI_BIN_LEVEL(bin_level); + usleep(500000); + + } + #endif + + //Read messages from the image processor and print them on the terminal + while ((IORD(0x42000,EEE_IMGPROC_STATUS)>>8) & 0xff) { //Find out if there are words to read + int word = IORD(0x42000,EEE_IMGPROC_MSG); //Get next word from message buffer + if (word == EEE_IMGPROC_MSG_START){ //Newline on message identifier + printf("\n"); + } + printf("%08x ",word); + } + + //Update the bounding box colour + boundingBoxColour = ((boundingBoxColour + 1) & 0xff); + IOWR(0x42000, EEE_IMGPROC_BBCOL, (boundingBoxColour << 8) | (0xff - boundingBoxColour)); + + //Process input commands + int in = getchar(); + switch (in) { + case 'e': { + exposureTime += EXPOSURE_STEP; + OV8865SetExposure(exposureTime); + printf("\nExposure = %x ", exposureTime); + break;} + case 'd': { + exposureTime -= EXPOSURE_STEP; + OV8865SetExposure(exposureTime); + printf("\nExposure = %x ", exposureTime); + break;} + case 't': { + gain += GAIN_STEP; + OV8865SetGain(gain); + printf("\nGain = %x ", gain); + break;} + case 'g': { + gain -= GAIN_STEP; + OV8865SetGain(gain); + printf("\nGain = %x ", gain); + break;} + case 'r': { + current_focus += manual_focus_step; + if(current_focus >1023) current_focus = 1023; + OV8865_FOCUS_Move_to(current_focus); + printf("\nFocus = %x ",current_focus); + break;} + case 'f': { + if(current_focus > manual_focus_step) current_focus -= manual_focus_step; + OV8865_FOCUS_Move_to(current_focus); + printf("\nFocus = %x ",current_focus); + break;} + } + + + //Main loop delay + usleep(10000); + + }; + return 0; +} diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.history/be/d008f016dec2001b1f77c40a2d51fad4 b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.history/be/d008f016dec2001b1f77c40a2d51fad4 new file mode 100644 index 0000000..bfe2481 --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.history/be/d008f016dec2001b1f77c40a2d51fad4 @@ -0,0 +1,301 @@ + + +#include +#include "I2C_core.h" +#include "terasic_includes.h" +#include "mipi_camera_config.h" +#include "mipi_bridge_config.h" + +#include "auto_focus.h" + +#include +#include + +//EEE_IMGPROC defines +#define EEE_IMGPROC_MSG_START ('R'<<16 | 'B'<<8 | 'B') + +//offsets +#define EEE_IMGPROC_STATUS 0 +#define EEE_IMGPROC_MSG 1 +#define EEE_IMGPROC_ID 2 +#define EEE_IMGPROC_BBCOL 3 + +#define EXPOSURE_INIT 0x002000 +#define EXPOSURE_STEP 0x100 +#define GAIN_INIT 0xFFF +#define GAIN_STEP 0xFFF +#define DEFAULT_LEVEL 3 + +#define MIPI_REG_PHYClkCtl 0x0056 +#define MIPI_REG_PHYData0Ctl 0x0058 +#define MIPI_REG_PHYData1Ctl 0x005A +#define MIPI_REG_PHYData2Ctl 0x005C +#define MIPI_REG_PHYData3Ctl 0x005E +#define MIPI_REG_PHYTimDly 0x0060 +#define MIPI_REG_PHYSta 0x0062 +#define MIPI_REG_CSIStatus 0x0064 +#define MIPI_REG_CSIErrEn 0x0066 +#define MIPI_REG_MDLSynErr 0x0068 +#define MIPI_REG_FrmErrCnt 0x0080 +#define MIPI_REG_MDLErrCnt 0x0090 + +void mipi_clear_error(void){ + MipiBridgeRegWrite(MIPI_REG_CSIStatus,0x01FF); // clear error + MipiBridgeRegWrite(MIPI_REG_MDLSynErr,0x0000); // clear error + MipiBridgeRegWrite(MIPI_REG_FrmErrCnt,0x0000); // clear error + MipiBridgeRegWrite(MIPI_REG_MDLErrCnt, 0x0000); // clear error + + MipiBridgeRegWrite(0x0082,0x00); + MipiBridgeRegWrite(0x0084,0x00); + MipiBridgeRegWrite(0x0086,0x00); + MipiBridgeRegWrite(0x0088,0x00); + MipiBridgeRegWrite(0x008A,0x00); + MipiBridgeRegWrite(0x008C,0x00); + MipiBridgeRegWrite(0x008E,0x00); + MipiBridgeRegWrite(0x0090,0x00); +} + +void mipi_show_error_info(void){ + + alt_u16 PHY_status, SCI_status, MDLSynErr, FrmErrCnt, MDLErrCnt; + + PHY_status = MipiBridgeRegRead(MIPI_REG_PHYSta); + SCI_status = MipiBridgeRegRead(MIPI_REG_CSIStatus); + MDLSynErr = MipiBridgeRegRead(MIPI_REG_MDLSynErr); + FrmErrCnt = MipiBridgeRegRead(MIPI_REG_FrmErrCnt); + MDLErrCnt = MipiBridgeRegRead(MIPI_REG_MDLErrCnt); + printf("PHY_status=%xh, CSI_status=%xh, MDLSynErr=%xh, FrmErrCnt=%xh, MDLErrCnt=%xh\r\n", PHY_status, SCI_status, MDLSynErr,FrmErrCnt, MDLErrCnt); +} + +void mipi_show_error_info_more(void){ + printf("FrmErrCnt = %d\n",MipiBridgeRegRead(0x0080)); + printf("CRCErrCnt = %d\n",MipiBridgeRegRead(0x0082)); + printf("CorErrCnt = %d\n",MipiBridgeRegRead(0x0084)); + printf("HdrErrCnt = %d\n",MipiBridgeRegRead(0x0086)); + printf("EIDErrCnt = %d\n",MipiBridgeRegRead(0x0088)); + printf("CtlErrCnt = %d\n",MipiBridgeRegRead(0x008A)); + printf("SoTErrCnt = %d\n",MipiBridgeRegRead(0x008C)); + printf("SynErrCnt = %d\n",MipiBridgeRegRead(0x008E)); + printf("MDLErrCnt = %d\n",MipiBridgeRegRead(0x0090)); + printf("FIFOSTATUS = %d\n",MipiBridgeRegRead(0x00F8)); + printf("DataType = 0x%04x\n",MipiBridgeRegRead(0x006A)); + printf("CSIPktLen = %d\n",MipiBridgeRegRead(0x006E)); +} + + + +bool MIPI_Init(void){ + bool bSuccess; + + + bSuccess = oc_i2c_init_ex(I2C_OPENCORES_MIPI_BASE, 50*1000*1000,400*1000); //I2C: 400K + if (!bSuccess) + printf("failed to init MIPI- Bridge i2c\r\n"); + + usleep(50*1000); + MipiBridgeInit(); + + usleep(500*1000); + +// bSuccess = oc_i2c_init_ex(I2C_OPENCORES_CAMERA_BASE, 50*1000*1000,400*1000); //I2C: 400K +// if (!bSuccess) +// printf("failed to init MIPI- Camera i2c\r\n"); + + MipiCameraInit(); + MIPI_BIN_LEVEL(DEFAULT_LEVEL); +// OV8865_FOCUS_Move_to(340); + +// oc_i2c_uninit(I2C_OPENCORES_CAMERA_BASE); // Release I2C bus , due to two I2C master shared! + + + usleep(1000); + + +// oc_i2c_uninit(I2C_OPENCORES_MIPI_BASE); + + return bSuccess; +} + + + + +int main() +{ + + fcntl(STDIN_FILENO, F_SETFL, O_NONBLOCK); + + printf("DE10-LITE D8M VGA Demo\n"); + printf("Imperial College EEE2 Project version\n"); + IOWR(MIPI_PWDN_N_BASE, 0x00, 0x00); + IOWR(MIPI_RESET_N_BASE, 0x00, 0x00); + + usleep(2000); + IOWR(MIPI_PWDN_N_BASE, 0x00, 0xFF); + usleep(2000); + IOWR(MIPI_RESET_N_BASE, 0x00, 0xFF); + + printf("Image Processor ID: %x\n",IORD(0x42000,EEE_IMGPROC_ID)); + //printf("Image Processor ID: %x\n",IORD(EEE_IMGPROC_0_BASE,EEE_IMGPROC_ID)); //Don't know why this doesn't work - definition is in system.h in BSP + + + usleep(2000); + + + // MIPI Init + if (!MIPI_Init()){ + printf("MIPI_Init Init failed!\r\n"); + }else{ + printf("MIPI_Init Init successfully!\r\n"); + } + +// while(1){ + mipi_clear_error(); + usleep(50*1000); + mipi_clear_error(); + usleep(1000*1000); + mipi_show_error_info(); +// mipi_show_error_info_more(); + printf("\n"); +// } + + +#if 0 // focus sweep + printf("\nFocus sweep\n"); + alt_u16 ii= 350; + alt_u8 dir = 0; + while(1){ + if(ii< 50) dir = 1; + else if (ii> 1000) dir =0; + + if(dir) ii += 20; + else ii -= 20; + + printf("%d\n",ii); + OV8865_FOCUS_Move_to(ii); + usleep(50*1000); + } +#endif + + + + + + + ////////////////////////////////////////////////////////// + alt_u16 bin_level = DEFAULT_LEVEL; + alt_u8 manual_focus_step = 10; + alt_u16 current_focus = 300; + int boundingBoxColour = 0; + alt_u32 exposureTime = EXPOSURE_INIT; + alt_u16 gain = GAIN_INIT; + + OV8865SetExposure(exposureTime); + OV8865SetGain(gain); + Focus_Init(); + while(1){ + + // touch KEY0 to trigger Auto focus + if((IORD(KEY_BASE,0)&0x03) == 0x02){ + + current_focus = Focus_Window(320,240); + } + // touch KEY1 to ZOOM + if((IORD(KEY_BASE,0)&0x03) == 0x01){ + if(bin_level == 3 )bin_level = 1; + else bin_level ++; + printf("set bin level to %d\n",bin_level); + MIPI_BIN_LEVEL(bin_level); + usleep(500000); + + } + + + #if 0 + if((IORD(KEY_BASE,0)&0x0F) == 0x0E){ + + current_focus = Focus_Window(320,240); + } + + // touch KEY1 to trigger Manual focus - step + if((IORD(KEY_BASE,0)&0x0F) == 0x0D){ + + if(current_focus > manual_focus_step) current_focus -= manual_focus_step; + else current_focus = 0; + OV8865_FOCUS_Move_to(current_focus); + + } + + // touch KEY2 to trigger Manual focus + step + if((IORD(KEY_BASE,0)&0x0F) == 0x0B){ + current_focus += manual_focus_step; + if(current_focus >1023) current_focus = 1023; + OV8865_FOCUS_Move_to(current_focus); + } + + // touch KEY3 to ZOOM + if((IORD(KEY_BASE,0)&0x0F) == 0x07){ + if(bin_level == 3 )bin_level = 1; + else bin_level ++; + printf("set bin level to %d\n",bin_level); + MIPI_BIN_LEVEL(bin_level); + usleep(500000); + + } + #endif + + //Read messages from the image processor and print them on the terminal + while ((IORD(0x42000,EEE_IMGPROC_STATUS)>>8) & 0xff) { //Find out if there are words to read + int word = IORD(0x42000,EEE_IMGPROC_MSG); //Get next word from message buffer + if (word == EEE_IMGPROC_MSG_START){ //Newline on message identifier + printf("\n"); + } + printf("%08x ",word); + } + + //Update the bounding box colour + boundingBoxColour = ((boundingBoxColour + 1) & 0xff); + IOWR(0x42000, EEE_IMGPROC_BBCOL, (boundingBoxColour << 8) | (0xff - boundingBoxColour)); + + //Process input commands + int in = getchar(); + switch (in) { + case 'e': { + exposureTime += EXPOSURE_STEP; + OV8865SetExposure(exposureTime); + printf("\nExposure = %x ", exposureTime); + break;} + case 'd': { + exposureTime -= EXPOSURE_STEP; + OV8865SetExposure(exposureTime); + printf("\nExposure = %x ", exposureTime); + break;} + case 't': { + gain += GAIN_STEP; + OV8865SetGain(gain); + printf("\nGain = %x ", gain); + break;} + case 'g': { + gain -= GAIN_STEP; + OV8865SetGain(gain); + printf("\nGain = %x ", gain); + break;} + case 'r': { + current_focus += manual_focus_step; + if(current_focus >1023) current_focus = 1023; + OV8865_FOCUS_Move_to(current_focus); + printf("\nFocus = %x ",current_focus); + break;} + case 'f': { + if(current_focus > manual_focus_step) current_focus -= manual_focus_step; + OV8865_FOCUS_Move_to(current_focus); + printf("\nFocus = %x ",current_focus); + break;} + } + + + //Main loop delay + usleep(10000); + + }; + return 0; +} diff --git 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diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.mylyn.ui.prefs b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.mylyn.ui.prefs new file mode 100644 index 0000000..0451f54 --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.mylyn.ui.prefs @@ -0,0 +1,2 @@ +eclipse.preferences.version=1 +org.eclipse.mylyn.cdt.ui.run.count.3_3_0=1 diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.ui.prefs b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.ui.prefs new file mode 100644 index 0000000..71ac973 --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.ui.prefs @@ -0,0 +1,5 @@ +content_assist_disabled_computers=org.eclipse.cdt.ui.textProposalCategory\u0000org.eclipse.cdt.ui.parserProposalCategory\u0000 +eclipse.preferences.version=1 +spelling_locale_initialized=true +useAnnotationsPrefPage=true +useQuickDiffPrefPage=true diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.core.resources.prefs b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.core.resources.prefs new file mode 100644 index 0000000..dffc6b5 --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.core.resources.prefs @@ -0,0 +1,2 @@ +eclipse.preferences.version=1 +version=1 diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.core.prefs b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.core.prefs new file mode 100644 index 0000000..57e3b77 --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.core.prefs @@ -0,0 +1,5 @@ +//org.eclipse.debug.core.PREFERRED_DELEGATES/org.eclipse.cdt.launch.applicationLaunchType=org.eclipse.cdt.dsf.gdb.launch.localCLaunch,debug;org.eclipse.cdt.cdi.launch.localCLaunch,run +//org.eclipse.debug.core.PREFERRED_DELEGATES/org.eclipse.cdt.launch.attachLaunchType=org.eclipse.cdt.dsf.gdb.launch.attachCLaunch,debug +//org.eclipse.debug.core.PREFERRED_DELEGATES/org.eclipse.cdt.launch.postmortemLaunchType=org.eclipse.cdt.dsf.gdb.launch.coreCLaunch,debug +//org.eclipse.debug.core.PREFERRED_DELEGATES/org.eclipse.cdt.launch.remoteApplicationLaunchType=org.eclipse.rse.remotecdt.dsf.debug,debug +eclipse.preferences.version=1 diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.ui.prefs b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.ui.prefs new file mode 100644 index 0000000..a2917e5 --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.ui.prefs @@ -0,0 +1,3 @@ +eclipse.preferences.version=1 +org.eclipse.debug.ui.PREF_LAUNCH_PERSPECTIVES=\n\n +preferredTargets=org.eclipse.cdt.debug.ui.toggleCBreakpointTarget\:org.eclipse.cdt.debug.ui.toggleCBreakpointTarget| diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.egit.core.prefs b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.egit.core.prefs new file mode 100644 index 0000000..101feea --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.egit.core.prefs @@ -0,0 +1,2 @@ +GitRepositoriesView.GitDirectories=/home/ad3919/nfshome/EE2Rover/.git\: +eclipse.preferences.version=1 diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.mylyn.context.core.prefs b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.mylyn.context.core.prefs new file mode 100644 index 0000000..43e97e4 --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.mylyn.context.core.prefs @@ -0,0 +1,2 @@ +eclipse.preferences.version=1 +mylyn.attention.migrated=true diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.mylyn.monitor.ui.prefs b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.mylyn.monitor.ui.prefs new file mode 100644 index 0000000..8d462a6 --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.mylyn.monitor.ui.prefs @@ -0,0 +1,2 @@ +eclipse.preferences.version=1 +org.eclipse.mylyn.monitor.activity.tracking.enabled.checked=true diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.mylyn.tasks.ui.prefs b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.mylyn.tasks.ui.prefs new file mode 100644 index 0000000..453b994 --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.mylyn.tasks.ui.prefs @@ -0,0 +1,3 @@ +eclipse.preferences.version=1 +org.eclipse.mylyn.tasks.ui.filters.nonmatching=true +org.eclipse.mylyn.tasks.ui.filters.nonmatching.encouraged=true diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.rse.core.prefs b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.rse.core.prefs new file mode 100644 index 0000000..614b7cc --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.rse.core.prefs @@ -0,0 +1,3 @@ +eclipse.preferences.version=1 +org.eclipse.rse.systemtype.local.systemType.defaultUserId=ad3919 +useridperkey=ee-mill2.Local\=ad3919; diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.rse.ui.prefs b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.rse.ui.prefs new file mode 100644 index 0000000..9104419 --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.rse.ui.prefs @@ -0,0 +1,2 @@ +eclipse.preferences.version=1 +org.eclipse.rse.preferences.order.connections=ee-mill2.Local diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.team.cvs.ui.prefs b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.team.cvs.ui.prefs new file mode 100644 index 0000000..f9e585b --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.team.cvs.ui.prefs @@ -0,0 +1,2 @@ +eclipse.preferences.version=1 +pref_first_startup=false diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.team.ui.prefs b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.team.ui.prefs new file mode 100644 index 0000000..56cd496 --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.team.ui.prefs @@ -0,0 +1,2 @@ +eclipse.preferences.version=1 +org.eclipse.team.ui.first_time=false diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.editors.prefs b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.editors.prefs new file mode 100644 index 0000000..61f3bb8 --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.editors.prefs @@ -0,0 +1,2 @@ +eclipse.preferences.version=1 +overviewRuler_migration=migrated_3.1 diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.ide.prefs b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.ide.prefs new file mode 100644 index 0000000..7518eb5 --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.ide.prefs @@ -0,0 +1,6 @@ +PROBLEMS_FILTERS_MIGRATE=true +TASKS_FILTERS_MIGRATE=true +eclipse.preferences.version=1 +platformState=1622552591073 +quickStart=false +tipsAndTricks=true diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.workbench.prefs b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.workbench.prefs new file mode 100644 index 0000000..b842874 --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.workbench.prefs @@ -0,0 +1,2 @@ +ENABLED_DECORATORS=com.altera.sbtgui.project.decorator.bsp\:true,com.altera.sbtgui.project.nios2builddecorator\:true,org.eclipse.cdt.ui.indexedFiles\:false,org.eclipse.cdt.managedbuilder.ui.excludedFile\:true,org.eclipse.cdt.managedbuilder.ui.includeFolder\:true,org.eclipse.cdt.internal.ui.CustomBuildSettingsDecorator\:true,org.eclipse.egit.ui.internal.decorators.GitLightweightDecorator\:true,org.eclipse.linuxtools.tmf.ui.trace_folder.decorator\:true,org.eclipse.linuxtools.tmf.ui.experiment_folder.decorator\:true,org.eclipse.linuxtools.tmf.ui.linked_trace.decorator\:true,org.eclipse.mylyn.context.ui.decorator.interest\:true,org.eclipse.mylyn.tasks.ui.decorators.task\:true,org.eclipse.mylyn.team.ui.changeset.decorator\:true,org.eclipse.rse.core.virtualobject.decorator\:true,org.eclipse.rse.core.binary.executable.decorator\:true,org.eclipse.rse.core.script.executable.decorator\:true,org.eclipse.rse.core.java.executable.decorator\:true,org.eclipse.rse.core.library.decorator\:true,org.eclipse.rse.core.link.decorator\:true,org.eclipse.rse.subsystems.error.decorator\:true,org.eclipse.team.cvs.ui.decorator\:true,org.eclipse.ui.LinkedResourceDecorator\:true,org.eclipse.ui.SymlinkDecorator\:true,org.eclipse.ui.VirtualResourceDecorator\:true,org.eclipse.ui.ContentTypeDecorator\:true,org.eclipse.ui.ResourceFilterDecorator\:false, +eclipse.preferences.version=1 diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.debug.core/.launches/D8M_Camera_Test Nios II Hardware configuration.launch b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.debug.core/.launches/D8M_Camera_Test Nios II Hardware configuration.launch new file mode 100644 index 0000000..07034d1 --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.debug.core/.launches/D8M_Camera_Test Nios II Hardware configuration.launch @@ -0,0 +1,25 @@ + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.debug.ui/launchConfigurationHistory.xml b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.debug.ui/launchConfigurationHistory.xml new file mode 100644 index 0000000..654c898 --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.debug.ui/launchConfigurationHistory.xml @@ -0,0 +1,27 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.e4.workbench/workbench.xmi b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.e4.workbench/workbench.xmi new file mode 100644 index 0000000..28cd811 --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.e4.workbench/workbench.xmi @@ -0,0 +1,2114 @@ + + + + activeSchemeId:org.eclipse.ui.defaultAcceleratorConfiguration + ModelMigrationProcessor.001 + + + + + + topLevel + shellMaximized + + + + + persp.actionSet:org.eclipse.mylyn.context.ui.actionSet + persp.actionSet:org.eclipse.mylyn.doc.actionSet + persp.actionSet:org.eclipse.mylyn.tasks.ui.navigation + persp.actionSet:org.eclipse.ui.cheatsheets.actionSet + persp.actionSet:org.eclipse.rse.core.search.searchActionSet + persp.actionSet:org.eclipse.search.searchActionSet + persp.actionSet:org.eclipse.ui.edit.text.actionSet.annotationNavigation + persp.actionSet:org.eclipse.ui.edit.text.actionSet.navigation + persp.actionSet:org.eclipse.ui.edit.text.actionSet.convertLineDelimitersTo + persp.actionSet:org.eclipse.ui.externaltools.ExternalToolsSet + persp.actionSet:org.eclipse.ui.actionSet.keyBindings + persp.actionSet:org.eclipse.ui.actionSet.openFiles + persp.actionSet:org.eclipse.cdt.ui.SearchActionSet + persp.actionSet:org.eclipse.cdt.ui.CElementCreationActionSet + persp.actionSet:org.eclipse.ui.NavigateActionSet + persp.viewSC:org.eclipse.ui.console.ConsoleView + persp.viewSC:org.eclipse.search.ui.views.SearchView + persp.viewSC:org.eclipse.ui.views.ContentOutline + persp.viewSC:org.eclipse.ui.views.ProblemView + persp.viewSC:org.eclipse.cdt.ui.CView + persp.viewSC:org.eclipse.ui.views.ResourceNavigator + persp.viewSC:org.eclipse.ui.views.PropertySheet + persp.viewSC:org.eclipse.ui.views.TaskList + persp.actionSet:org.eclipse.debug.ui.launchActionSet + persp.newWizSC:com.altera.sbtgui.ui.newSoftwareExample + persp.newWizSC:com.altera.sbtgui.ui.newApplication + persp.newWizSC:com.altera.sbtgui.ui.newBsp + persp.newWizSC:com.altera.sbtgui.ui.newLibrary + persp.perspSC:com.altera.sbtgui.ui.debugPerspective + persp.viewSC:com.altera.sbtgui.launch.hardware.ByteStreamConsoleView + + + newtablook + + + + + + + + + + newtablook + + + + + newtablook + active + + + + + + + + + + + + + + + + + + + View + categoryTag:Help + + + View + categoryTag:General + + + View + categoryTag:Help + + + + newtablook + org.eclipse.e4.primaryDataStack + EditorStack + + + Editor + org.eclipse.cdt.ui.editor.CEditor + removeOnHide + + menuContribution:popup + popup:#CEditorContext + popup:org.eclipse.cdt.ui.editor.CEditor.EditorContext + popup:#AbstractTextEditorContext + + + menuContribution:popup + popup:#CEditorRulerContext + popup:org.eclipse.cdt.ui.editor.CEditor.RulerContext + popup:#AbstractTextEditorRulerContext + + + menuContribution:popup + popup:#OverviewRulerContext + + + + + Editor + org.eclipse.cdt.ui.editor.CEditor + removeOnHide + + + + + + View + categoryTag:General + + ViewMenu + menuContribution:menu + + + menuContribution:popup + popup:org.eclipse.ui.navigator.ProjectExplorer#PopupMenu + + + + + View + categoryTag:&C/C++ + + + View + categoryTag:General + + + View + categoryTag:General + + + + View + categoryTag:General + + ViewMenu + menuContribution:menu + + + menuContribution:popup + popup:org.eclipse.ui.views.ProblemView + popup:org.eclipse.ui.ide.MarkersView + + + + + + View + categoryTag:General + + ViewMenu + menuContribution:menu + + + + + + View + categoryTag:General + active + activeOnClose + + ViewMenu + menuContribution:menu + + + menuContribution:popup + popup:org.eclipse.ui.MessageConsole.#ContextMenu + + + menuContribution:popup + popup:org.eclipse.cdt.ui.CDTGlobalBuildConsole + + + menuContribution:popup + popup:org.eclipse.cdt.ui.CDTBuildConsole + + + menuContribution:popup + popup:org.eclipse.debug.ui.ProcessConsoleType.#ContextMenu + + + menuContribution:popup + popup:org.eclipse.debug.ui.ProcessConsoleType.#ContextMenu + + + menuContribution:popup + popup:org.eclipse.debug.ui.ProcessConsoleType.#ContextMenu + + + + + View + categoryTag:Nios II + + + + View + categoryTag:General + + ViewMenu + menuContribution:menu + + + + + + View + categoryTag:General + + ViewMenu + menuContribution:menu + + + menuContribution:popup + popup:#TranslationUnitOutlinerContext + + + menuContribution:popup + popup:#TranslationUnitOutlinerContext + + + + + View + categoryTag:Nios II + + + + toolbarSeparator + + + + Draggable + + + + + + + + + + + + + + + + toolbarSeparator + + + + Draggable + + + + + + + + Draggable + + + + + + + Draggable + + + + + + + Draggable + + + + + + toolbarSeparator + + + + Draggable + + + + + + + + + + + + toolbarSeparator + + + + toolbarSeparator + + + + Draggable + + + + + stretch + + + glue + + + + glue + + + Draggable + + + + + stretch + + + + Draggable + + + + + + + + + + + + + + + + + + + + platform:gtk + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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categoryTag:Git + + + View + categoryTag:Git + + + View + categoryTag:Git + + + View + categoryTag:Git + + + View + categoryTag:Git + + + View + categoryTag:Help + + + View + categoryTag:&C/C++ + + + View + categoryTag:&C/C++ + + + View + categoryTag:Charts + + + View + categoryTag:Profiling + + + View + categoryTag:Profiling + + + View + categoryTag:LTTng + + + View + categoryTag:LTTng + + + View + categoryTag:LTTng + + + View + categoryTag:Man pages + + + View + categoryTag:C/C++ Profiling + + + View + categoryTag:Profiling + + + View + categoryTag:Profiling + + + View + categoryTag:Profiling + + + View + categoryTag:Profiling + + + View + categoryTag:Profiling + + + View + categoryTag:SystemTap + + + View + categoryTag:SystemTap + + + View + categoryTag:SystemTap + + + View + categoryTag:SystemTap + + + View + categoryTag:Tracing + + + View + categoryTag:Tracing + + + View + categoryTag:Tracing + + + View + categoryTag:Tracing + + + View + categoryTag:Tracing + + + View + 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a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.rse.core/initializerMarks/org.eclipse.rse.internal.core.RSELocalConnectionInitializer.mark b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.rse.core/initializerMarks/org.eclipse.rse.internal.core.RSELocalConnectionInitializer.mark new file mode 100644 index 0000000..e69de29 diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.rse.core/profiles/PRF.ee-mill2_0/FP.local.files_0/node.properties b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.rse.core/profiles/PRF.ee-mill2_0/FP.local.files_0/node.properties new file mode 100644 index 0000000..4f8cbbb --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.rse.core/profiles/PRF.ee-mill2_0/FP.local.files_0/node.properties @@ -0,0 +1,57 @@ +# RSE DOM Node +00-name=ee-mill2\:local.files +01-type=FilterPool +03-attr.default=true +03-attr.deletable=true +03-attr.id=local.files +03-attr.nonRenamable=false +03-attr.owningParentName=null +03-attr.release=200 +03-attr.singleFilterStringOnly=false +03-attr.singleFilterStringOnlyESet=false +03-attr.stringsCaseSensitive=true +03-attr.supportsDuplicateFilterStrings=false +03-attr.supportsNestedFilters=true +03-attr.type=default +06-child.00000.00-name=My Home +06-child.00000.01-type=Filter +06-child.00000.03-attr.default=false +06-child.00000.03-attr.filterType=default +06-child.00000.03-attr.id=My Home +06-child.00000.03-attr.nonChangable=false +06-child.00000.03-attr.nonDeletable=false +06-child.00000.03-attr.nonRenamable=false +06-child.00000.03-attr.promptable=false +06-child.00000.03-attr.relativeOrder=0 +06-child.00000.03-attr.release=200 +06-child.00000.03-attr.singleFilterStringOnly=false +06-child.00000.03-attr.stringsCaseSensitive=true +06-child.00000.03-attr.stringsNonChangable=false +06-child.00000.03-attr.supportsDuplicateFilterStrings=false +06-child.00000.03-attr.supportsNestedFilters=true +06-child.00000.06-child.00000.00-name=/home/ad3919/* +06-child.00000.06-child.00000.01-type=FilterString +06-child.00000.06-child.00000.03-attr.default=false +06-child.00000.06-child.00000.03-attr.string=/home/ad3919/* +06-child.00000.06-child.00000.03-attr.type=default +06-child.00001.00-name=Root +06-child.00001.01-type=Filter +06-child.00001.03-attr.default=false +06-child.00001.03-attr.filterType=default +06-child.00001.03-attr.id=Root +06-child.00001.03-attr.nonChangable=false +06-child.00001.03-attr.nonDeletable=false +06-child.00001.03-attr.nonRenamable=false +06-child.00001.03-attr.promptable=false +06-child.00001.03-attr.relativeOrder=0 +06-child.00001.03-attr.release=200 +06-child.00001.03-attr.singleFilterStringOnly=false +06-child.00001.03-attr.stringsCaseSensitive=true +06-child.00001.03-attr.stringsNonChangable=false +06-child.00001.03-attr.supportsDuplicateFilterStrings=false +06-child.00001.03-attr.supportsNestedFilters=true +06-child.00001.06-child.00000.00-name=/* +06-child.00001.06-child.00000.01-type=FilterString +06-child.00001.06-child.00000.03-attr.default=false +06-child.00001.06-child.00000.03-attr.string=/* +06-child.00001.06-child.00000.03-attr.type=default diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.rse.core/profiles/PRF.ee-mill2_0/H.local_16/node.properties b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.rse.core/profiles/PRF.ee-mill2_0/H.local_16/node.properties new file mode 100644 index 0000000..2366177 --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.rse.core/profiles/PRF.ee-mill2_0/H.local_16/node.properties @@ -0,0 +1,25 @@ +# RSE DOM Node +00-name=Local +01-type=Host +03-attr.description= +03-attr.hostname=LOCALHOST +03-attr.offline=false +03-attr.promptable=false +03-attr.systemType=org.eclipse.rse.systemtype.local +03-attr.type=Local +06-child.00000.00-name=Local Connector Service +06-child.00000.01-type=ConnectorService +06-child.00000.03-attr.group=Local Connector Service +06-child.00000.03-attr.port=0 +06-child.00000.03-attr.useSSL=false +06-child.00000.06-child.00000.00-name=Local Files +06-child.00000.06-child.00000.01-type=SubSystem +06-child.00000.06-child.00000.03-attr.hidden=false +06-child.00000.06-child.00000.03-attr.type=local.files +06-child.00000.06-child.00000.06-child.00000.00-name=ee-mill2___ee-mill2\:local.files +06-child.00000.06-child.00000.06-child.00000.01-type=FilterPoolReference +06-child.00000.06-child.00000.06-child.00000.03-attr.refID=local.files +06-child.00000.06-child.00001.00-name=Local Shells +06-child.00000.06-child.00001.01-type=SubSystem +06-child.00000.06-child.00001.03-attr.hidden=false +06-child.00000.06-child.00001.03-attr.type=local.shells diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.rse.core/profiles/PRF.ee-mill2_0/node.properties b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.rse.core/profiles/PRF.ee-mill2_0/node.properties new file mode 100644 index 0000000..c6d3c97 --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.rse.core/profiles/PRF.ee-mill2_0/node.properties @@ -0,0 +1,7 @@ +# RSE DOM Node +00-name=ee-mill2 +01-type=Profile +03-attr.defaultPrivate=true +03-attr.isActive=true +05-ref.00000=FP.local.files_0 +05-ref.00001=H.local_16 diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.rse.ui/.log b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.rse.ui/.log new file mode 100644 index 0000000..e69de29 diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.ui.workbench/dialog_settings.xml b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.ui.workbench/dialog_settings.xml new file mode 100644 index 0000000..57b71cf --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.ui.workbench/dialog_settings.xml @@ -0,0 +1,15 @@ + +

+
+ + + + + + + + + + +
+
diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.ui.workbench/workingsets.xml b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.ui.workbench/workingsets.xml new file mode 100644 index 0000000..e455102 --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.ui.workbench/workingsets.xml @@ -0,0 +1,4 @@ + + + + \ No newline at end of file diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/version.ini b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/version.ini new file mode 100644 index 0000000..c51ff74 --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/version.ini @@ -0,0 +1 @@ +org.eclipse.core.runtime=1 \ No newline at end of file diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/RemoteSystemsTempFiles/.project b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/RemoteSystemsTempFiles/.project new file mode 100644 index 0000000..5447a64 --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/RemoteSystemsTempFiles/.project @@ -0,0 +1,12 @@ + + + RemoteSystemsTempFiles + + + + + + + org.eclipse.rse.ui.remoteSystemsTempNature + + diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/.cproject b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/.cproject index 60ab6f5..9d3e177 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/.cproject +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/.cproject @@ -1,37 +1,44 @@ - - + + - + - - - - - - - + + + + + + + - - + + - - - - + + + + + + + + + + - + + @@ -40,15 +47,15 @@ - + - + - + diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/.project b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/.project index bd850d3..c1b033e 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/.project +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/.project @@ -1,6 +1,6 @@ - camera_test + D8M_Camera_Test diff --git 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/usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-dtoa.o) (__fixdfsi) +/usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a(floatsidf.o) + /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-dtoa.o) (__floatsidf) +/usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a(floatunsidf.o) + /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-dtoa.o) (__floatunsidf) +/usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a(_clz.o) + /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a(_udivdi3.o) (__clz_tab) +/usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a(_clzsi2.o) + /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a(adddf3.o) (__clzsi2) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_close.o) + /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(closer.o) (close) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_dev.o) + ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_close.o) (alt_fd_list) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_errno.o) + ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_close.o) (alt_errno) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_fcntl.o) obj/default/main.o (fcntl) -../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_fstat.o) - c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-fstatr.o) (fstat) -../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_isatty.o) - c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-isattyr.o) (isatty) -../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_load.o) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_fstat.o) + /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-fstatr.o) (fstat) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_isatty.o) + /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-isattyr.o) (isatty) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_load.o) ../D8M_Camera_Test_bsp//obj/HAL/src/crt0.o (alt_load) -../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_lseek.o) - c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-lseekr.o) (lseek) -../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_main.o) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_lseek.o) + /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-lseekr.o) (lseek) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_main.o) ../D8M_Camera_Test_bsp//obj/HAL/src/crt0.o (alt_main) -../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_malloc_lock.o) - c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-mallocr.o) (__malloc_lock) -../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_read.o) - c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-readr.o) (read) -../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_release_fd.o) - ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_close.o) (alt_release_fd) -../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_sbrk.o) - c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-sbrkr.o) (sbrk) -../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_tick.o) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_malloc_lock.o) + /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-mallocr.o) (__malloc_lock) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_read.o) + /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-readr.o) (read) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_release_fd.o) + ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_close.o) (alt_release_fd) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_sbrk.o) + /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-sbrkr.o) (sbrk) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_tick.o) obj/default/auto_focus.o (_alt_tick_rate) -../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_usleep.o) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_usleep.o) obj/default/I2C_core.o (usleep) -../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_write.o) - c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-writer.o) (write) -../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_sys_init.o) - ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_main.o) (alt_irq_init) -../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_fd.o) - ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_sys_init.o) (altera_avalon_jtag_uart_read_fd) -../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_init.o) - ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_sys_init.o) (altera_avalon_jtag_uart_init) -../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_ioctl.o) - ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_fd.o) (altera_avalon_jtag_uart_ioctl) -../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_read.o) - ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_fd.o) (altera_avalon_jtag_uart_read) -../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_write.o) - ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_fd.o) (altera_avalon_jtag_uart_write) -../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_timer_sc.o) - ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_sys_init.o) (alt_avalon_timer_sc_init) -../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_alarm_start.o) - ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_init.o) (alt_alarm_start) -../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_busy_sleep.o) - ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_usleep.o) (alt_busy_sleep) -../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_dcache_flush_all.o) - ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_load.o) (alt_dcache_flush_all) -../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_dev_llist_insert.o) - ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_sys_init.o) (alt_dev_llist_insert) -../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_do_ctors.o) - ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_main.o) (_do_ctors) -../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_do_dtors.o) - ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_main.o) (_do_dtors) -../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_icache_flush_all.o) - ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_load.o) (alt_icache_flush_all) -../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_iic.o) - ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_init.o) (alt_ic_isr_register) -../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_iic_isr_register.o) - ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_iic.o) (alt_iic_isr_register) -../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_io_redirect.o) - ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_main.o) (alt_io_redirect) -../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_irq_entry.o) - ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_iic_isr_register.o) (alt_irq_entry) -../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_irq_handler.o) - ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_iic_isr_register.o) (alt_irq) -../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_irq_vars.o) - ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_iic.o) (alt_irq_active) -../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_open.o) - ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_io_redirect.o) (open) -../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_nios2_gen2_irq.o) - ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_sys_init.o) (altera_nios2_gen2_irq_init) -../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_exception_entry.o) - ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_irq_entry.o) (alt_exception) -../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_find_dev.o) - ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_open.o) (alt_find_dev) -../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_find_file.o) - ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_open.o) (alt_find_file) -../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_get_fd.o) - ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_open.o) (alt_get_fd) -../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_icache_flush.o) - ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_icache_flush_all.o) (alt_icache_flush) -../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_instruction_exception_entry.o) - ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_exception_entry.o) (alt_instruction_exception_entry) -c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-atexit.o) - ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_main.o) (atexit) -c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-exit.o) - ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_main.o) (exit) -c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-memcmp.o) - ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_find_dev.o) (memcmp) -c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-__atexit.o) - c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-atexit.o) (__register_exitproc) -c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-__call_atexit.o) - c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-exit.o) (__call_exitprocs) -../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_exit.o) - c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-exit.o) (_exit) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_write.o) + /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-writer.o) (write) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_sys_init.o) + ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_main.o) (alt_irq_init) +../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_fd.o) + ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_sys_init.o) (altera_avalon_jtag_uart_read_fd) +../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_init.o) + ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_sys_init.o) (altera_avalon_jtag_uart_init) +../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_ioctl.o) + ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_fd.o) (altera_avalon_jtag_uart_ioctl) +../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_read.o) + ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_fd.o) (altera_avalon_jtag_uart_read) +../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_write.o) + ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_fd.o) (altera_avalon_jtag_uart_write) +../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_timer_sc.o) + ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_sys_init.o) (alt_avalon_timer_sc_init) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_alarm_start.o) + ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_init.o) (alt_alarm_start) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_busy_sleep.o) + ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_usleep.o) (alt_busy_sleep) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_dcache_flush_all.o) + ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_load.o) (alt_dcache_flush_all) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_dev_llist_insert.o) + ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_sys_init.o) (alt_dev_llist_insert) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_do_ctors.o) + ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_main.o) (_do_ctors) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_do_dtors.o) + ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_main.o) (_do_dtors) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_icache_flush_all.o) + ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_load.o) (alt_icache_flush_all) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_iic.o) + ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_init.o) (alt_ic_isr_register) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_iic_isr_register.o) + ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_iic.o) (alt_iic_isr_register) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_io_redirect.o) + ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_main.o) (alt_io_redirect) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_entry.o) + ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_iic_isr_register.o) (alt_irq_entry) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_handler.o) + ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_iic_isr_register.o) (alt_irq) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_vars.o) + ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_iic.o) (alt_irq_active) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_open.o) + ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_io_redirect.o) (open) +../D8M_Camera_Test_bsp//libhal_bsp.a(altera_nios2_gen2_irq.o) + ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_sys_init.o) (altera_nios2_gen2_irq_init) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_exception_entry.o) + ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_entry.o) (alt_exception) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_find_dev.o) + ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_open.o) (alt_find_dev) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_find_file.o) + ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_open.o) (alt_find_file) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_get_fd.o) + ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_open.o) (alt_get_fd) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_icache_flush.o) + ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_icache_flush_all.o) (alt_icache_flush) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_instruction_exception_entry.o) + ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_exception_entry.o) (alt_instruction_exception_entry) +/usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-atexit.o) + ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_main.o) (atexit) +/usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-exit.o) + ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_main.o) (exit) +/usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-memcmp.o) + ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_find_dev.o) (memcmp) +/usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-__atexit.o) + /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-atexit.o) (__register_exitproc) +/usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-__call_atexit.o) + /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-exit.o) (__call_exitprocs) +../D8M_Camera_Test_bsp//libhal_bsp.a(alt_exit.o) + /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-exit.o) (_exit) Allocating common symbols Common symbol size file -alt_irq 0x100 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_irq_handler.o) -errno 0x4 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-int_errno.o) +alt_irq 0x100 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_handler.o) +errno 0x4 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-int_errno.o) Memory Configuration @@ -243,16 +243,16 @@ LOAD obj/default/main.o LOAD obj/default/mipi_bridge_config.o LOAD obj/default/mipi_camera_config.o LOAD obj/default/queue.o -LOAD c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libstdc++.a -LOAD c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libm.a -LOAD c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a +LOAD /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libstdc++.a +LOAD /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libm.a +LOAD /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a START GROUP -LOAD c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a -LOAD c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a -LOAD ../D8M_Camera_Test_bsp/\libhal_bsp.a -LOAD c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libm.a +LOAD /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a +LOAD /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a +LOAD ../D8M_Camera_Test_bsp//libhal_bsp.a +LOAD /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libm.a END GROUP -LOAD c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a +LOAD /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a 0x0000000000020000 __alt_mem_onchip_memory2_0 = 0x20000 .entry 0x0000000000020000 0x20 @@ -266,54 +266,54 @@ LOAD c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nio *(.irq) *(.exceptions.entry.label) .exceptions.entry.label - 0x0000000000020020 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_irq_entry.o) + 0x0000000000020020 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_entry.o) 0x0000000000020020 alt_irq_entry .exceptions.entry.label - 0x0000000000020020 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_exception_entry.o) + 0x0000000000020020 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_exception_entry.o) 0x0000000000020020 alt_exception *(.exceptions.entry.user) *(.exceptions.entry.ecc_fatal) *(.exceptions.entry) .exceptions.entry - 0x0000000000020020 0x54 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_exception_entry.o) + 0x0000000000020020 0x54 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_exception_entry.o) *(.exceptions.irqtest.user) *(.exceptions.irqtest) .exceptions.irqtest - 0x0000000000020074 0x10 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_irq_entry.o) + 0x0000000000020074 0x10 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_entry.o) *(.exceptions.irqhandler.user) *(.exceptions.irqhandler) .exceptions.irqhandler - 0x0000000000020084 0x4 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_irq_entry.o) + 0x0000000000020084 0x4 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_entry.o) *(.exceptions.irqreturn.user) *(.exceptions.irqreturn) .exceptions.irqreturn - 0x0000000000020088 0x4 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_irq_entry.o) + 0x0000000000020088 0x4 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_entry.o) *(.exceptions.notirq.label) .exceptions.notirq.label - 0x000000000002008c 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_irq_entry.o) + 0x000000000002008c 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_entry.o) *(.exceptions.notirq.user) *(.exceptions.notirq) .exceptions.notirq - 0x000000000002008c 0x8 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_exception_entry.o) + 0x000000000002008c 0x8 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_exception_entry.o) *(.exceptions.soft.user) *(.exceptions.soft) *(.exceptions.unknown.user) *(.exceptions.unknown) .exceptions.unknown - 0x0000000000020094 0x14 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_exception_entry.o) + 0x0000000000020094 0x14 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_exception_entry.o) *(.exceptions.exit.label) .exceptions.exit.label - 0x00000000000200a8 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_irq_entry.o) + 0x00000000000200a8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_entry.o) .exceptions.exit.label - 0x00000000000200a8 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_exception_entry.o) + 0x00000000000200a8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_exception_entry.o) *(.exceptions.exit.user) *(.exceptions.exit) .exceptions.exit - 0x00000000000200a8 0x54 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_exception_entry.o) + 0x00000000000200a8 0x54 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_exception_entry.o) *(.exceptions) - .exceptions 0x00000000000200fc 0xd4 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_irq_handler.o) + .exceptions 0x00000000000200fc 0xd4 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_handler.o) 0x00000000000200fc alt_irq_handler - .exceptions 0x00000000000201d0 0x74 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_instruction_exception_entry.o) + .exceptions 0x00000000000201d0 0x74 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_instruction_exception_entry.o) 0x00000000000201d0 alt_instruction_exception_entry 0x0000000000020244 PROVIDE (__ram_exceptions_end, ABSOLUTE (.)) 0x0000000000020020 PROVIDE (__flash_exceptions_start, LOADADDR (.exceptions)) @@ -413,475 +413,475 @@ LOAD c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nio 0x00000000000227d0 QUEUE_Push 0x0000000000022864 QUEUE_Pop 0x00000000000228f4 QUEUE_Empty - .text 0x0000000000022928 0x1b4 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(lib2-divmod.o) + .text 0x0000000000022928 0x1b4 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a(lib2-divmod.o) 0x0000000000022928 __divsi3 0x00000000000229ac __modsi3 0x0000000000022a20 __udivsi3 0x0000000000022a84 __umodsi3 - .text 0x0000000000022adc 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-getc.o) - .text._getc_r 0x0000000000022adc 0x70 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-getc.o) + .text 0x0000000000022adc 0x0 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-getc.o) + .text._getc_r 0x0000000000022adc 0x70 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-getc.o) 0x0000000000022adc _getc_r - .text.getc 0x0000000000022b4c 0x88 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-getc.o) + .text.getc 0x0000000000022b4c 0x88 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-getc.o) 0x0000000000022b4c getc - .text 0x0000000000022bd4 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-impure.o) - .text 0x0000000000022bd4 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-malloc.o) - .text.malloc 0x0000000000022bd4 0x14 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-malloc.o) + .text 0x0000000000022bd4 0x0 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-impure.o) + .text 0x0000000000022bd4 0x0 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-malloc.o) + .text.malloc 0x0000000000022bd4 0x14 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-malloc.o) 0x0000000000022bd4 malloc - .text.free 0x0000000000022be8 0x14 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-malloc.o) + .text.free 0x0000000000022be8 0x14 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-malloc.o) 0x0000000000022be8 free - .text 0x0000000000022bfc 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-mallocr.o) + .text 0x0000000000022bfc 0x0 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-mallocr.o) .text._malloc_r - 0x0000000000022bfc 0x80c c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-mallocr.o) + 0x0000000000022bfc 0x80c /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-mallocr.o) 0x0000000000022bfc _malloc_r - .text 0x0000000000023408 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-memset.o) - .text.memset 0x0000000000023408 0x128 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-memset.o) + .text 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0x000000000003009c 0xb0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_sbrk.o) 0x000000000003009c sbrk - .text 0x000000000003014c 0x1a4 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_tick.o) + .text 0x000000000003014c 0x1a4 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_tick.o) 0x000000000003014c alt_alarm_stop 0x00000000000301e8 alt_tick - .text 0x00000000000302f0 0x30 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_usleep.o) + .text 0x00000000000302f0 0x30 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_usleep.o) 0x00000000000302f0 usleep - .text 0x0000000000030320 0x148 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_write.o) + .text 0x0000000000030320 0x148 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_write.o) 0x0000000000030370 write - .text 0x0000000000030468 0xd4 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_sys_init.o) + .text 0x0000000000030468 0xd4 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_sys_init.o) 0x00000000000304a0 alt_irq_init 0x00000000000304d8 alt_sys_init - .text 0x000000000003053c 0x164 ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_fd.o) + .text 0x000000000003053c 0x164 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_fd.o) 0x000000000003053c altera_avalon_jtag_uart_read_fd 0x000000000003059c altera_avalon_jtag_uart_write_fd 0x00000000000305fc altera_avalon_jtag_uart_close_fd 0x000000000003064c altera_avalon_jtag_uart_ioctl_fd - .text 0x00000000000306a0 0x3e4 ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_init.o) + .text 0x00000000000306a0 0x3e4 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_init.o) 0x00000000000306a0 altera_avalon_jtag_uart_init 0x0000000000030a1c altera_avalon_jtag_uart_close - .text 0x0000000000030a84 0xf0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_ioctl.o) + .text 0x0000000000030a84 0xf0 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_ioctl.o) 0x0000000000030a84 altera_avalon_jtag_uart_ioctl - .text 0x0000000000030b74 0x21c ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_read.o) + .text 0x0000000000030b74 0x21c ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_read.o) 0x0000000000030b74 altera_avalon_jtag_uart_read - .text 0x0000000000030d90 0x224 ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_write.o) + .text 0x0000000000030d90 0x224 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_write.o) 0x0000000000030d90 altera_avalon_jtag_uart_write - .text 0x0000000000030fb4 0x104 ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_timer_sc.o) + .text 0x0000000000030fb4 0x104 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_timer_sc.o) 0x000000000003102c alt_avalon_timer_sc_init - .text 0x00000000000310b8 0x140 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_alarm_start.o) + .text 0x00000000000310b8 0x140 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_alarm_start.o) 0x00000000000310b8 alt_alarm_start - .text 0x00000000000311f8 0x158 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_busy_sleep.o) + .text 0x00000000000311f8 0x158 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_busy_sleep.o) 0x00000000000311f8 alt_busy_sleep - .text 0x0000000000031350 0x48 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_dcache_flush_all.o) + .text 0x0000000000031350 0x48 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_dcache_flush_all.o) 0x0000000000031350 alt_dcache_flush_all - .text 0x0000000000031398 0xf4 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_dev_llist_insert.o) + .text 0x0000000000031398 0xf4 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_dev_llist_insert.o) 0x00000000000313e8 alt_dev_llist_insert - .text 0x000000000003148c 0x60 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_do_ctors.o) + .text 0x000000000003148c 0x60 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_do_ctors.o) 0x000000000003148c _do_ctors - .text 0x00000000000314ec 0x60 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_do_dtors.o) + .text 0x00000000000314ec 0x60 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_do_dtors.o) 0x00000000000314ec _do_dtors - .text 0x000000000003154c 0x34 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_icache_flush_all.o) + .text 0x000000000003154c 0x34 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_icache_flush_all.o) 0x000000000003154c alt_icache_flush_all - .text 0x0000000000031580 0x1e0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_iic.o) + .text 0x0000000000031580 0x1e0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_iic.o) 0x0000000000031580 alt_ic_isr_register 0x00000000000315d0 alt_ic_irq_enable 0x0000000000031670 alt_ic_irq_disable 0x0000000000031714 alt_ic_irq_enabled - .text 0x0000000000031760 0xf0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_iic_isr_register.o) + .text 0x0000000000031760 0xf0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_iic_isr_register.o) 0x0000000000031760 alt_iic_isr_register - .text 0x0000000000031850 0x140 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_io_redirect.o) + .text 0x0000000000031850 0x140 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_io_redirect.o) 0x0000000000031914 alt_io_redirect - .text 0x0000000000031990 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_irq_entry.o) - .text 0x0000000000031990 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_irq_handler.o) - .text 0x0000000000031990 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_irq_vars.o) - .text 0x0000000000031990 0x274 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_open.o) + .text 0x0000000000031990 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_entry.o) + .text 0x0000000000031990 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_handler.o) + .text 0x0000000000031990 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_vars.o) + .text 0x0000000000031990 0x274 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_open.o) 0x0000000000031aac open - .text 0x0000000000031c04 0x24 ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_nios2_gen2_irq.o) + .text 0x0000000000031c04 0x24 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_nios2_gen2_irq.o) 0x0000000000031c04 altera_nios2_gen2_irq_init - .text 0x0000000000031c28 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_exception_entry.o) - .text 0x0000000000031c28 0x90 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_find_dev.o) + .text 0x0000000000031c28 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_exception_entry.o) + .text 0x0000000000031c28 0x90 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_find_dev.o) 0x0000000000031c28 alt_find_dev - .text 0x0000000000031cb8 0x114 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_find_file.o) + .text 0x0000000000031cb8 0x114 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_find_file.o) 0x0000000000031cb8 alt_find_file - .text 0x0000000000031dcc 0xb4 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_get_fd.o) + .text 0x0000000000031dcc 0xb4 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_get_fd.o) 0x0000000000031dcc alt_get_fd - .text 0x0000000000031e80 0x90 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_icache_flush.o) + .text 0x0000000000031e80 0x90 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_icache_flush.o) 0x0000000000031e80 alt_icache_flush - .text 0x0000000000031f10 0x9c ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_instruction_exception_entry.o) + .text 0x0000000000031f10 0x9c ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_instruction_exception_entry.o) 0x0000000000031f10 alt_exception_cause_generated_bad_addr - .text 0x0000000000031fac 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-atexit.o) - .text.atexit 0x0000000000031fac 0x14 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-atexit.o) + .text 0x0000000000031fac 0x0 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-atexit.o) + .text.atexit 0x0000000000031fac 0x14 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-atexit.o) 0x0000000000031fac atexit - .text 0x0000000000031fc0 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-exit.o) - .text.exit 0x0000000000031fc0 0x38 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-exit.o) + .text 0x0000000000031fc0 0x0 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-exit.o) + .text.exit 0x0000000000031fc0 0x38 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-exit.o) 0x0000000000031fc0 exit - .text 0x0000000000031ff8 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-memcmp.o) - .text.memcmp 0x0000000000031ff8 0x7c c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-memcmp.o) + .text 0x0000000000031ff8 0x0 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-memcmp.o) + .text.memcmp 0x0000000000031ff8 0x7c /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-memcmp.o) 0x0000000000031ff8 memcmp - .text 0x0000000000032074 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-__atexit.o) + .text 0x0000000000032074 0x0 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-__atexit.o) .text.__register_exitproc - 0x0000000000032074 0x118 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-__atexit.o) + 0x0000000000032074 0x118 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-__atexit.o) 0x0000000000032074 __register_exitproc - .text 0x000000000003218c 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-__call_atexit.o) + .text 0x000000000003218c 0x0 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-__call_atexit.o) .text.__call_exitprocs - 0x000000000003218c 0x180 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-__call_atexit.o) + 0x000000000003218c 0x180 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-__call_atexit.o) 0x000000000003218c __call_exitprocs - .text 0x000000000003230c 0x34 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_exit.o) + .text 0x000000000003230c 0x34 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_exit.o) 0x000000000003230c _exit *(.gnu.warning.*) *(.fini) @@ -927,48 +927,48 @@ LOAD c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nio *fill* 0x0000000000032881 0x3 .rodata 0x0000000000032884 0x9c obj/default/mipi_camera_config.o .rodata.str1.4 - 0x0000000000032920 0x2 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-impure.o) + 0x0000000000032920 0x2 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-impure.o) *fill* 0x0000000000032922 0x2 .rodata.str1.4 - 0x0000000000032924 0x2 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-puts.o) + 0x0000000000032924 0x2 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-puts.o) *fill* 0x0000000000032926 0x2 .rodata.str1.4 - 0x0000000000032928 0x42 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-vfprintf.o) + 0x0000000000032928 0x42 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-vfprintf.o) .rodata.zeroes.4404 - 0x000000000003296a 0x10 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-vfprintf.o) + 0x000000000003296a 0x10 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-vfprintf.o) .rodata.blanks.4403 - 0x000000000003297a 0x10 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-vfprintf.o) + 0x000000000003297a 0x10 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-vfprintf.o) *fill* 0x000000000003298a 0x2 .rodata.str1.4 - 0x000000000003298c 0x10 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-dtoa.o) + 0x000000000003298c 0x10 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-dtoa.o) 0x12 (size before relaxing) .rodata.str1.4 - 0x000000000003299c 0xc c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-locale.o) + 0x000000000003299c 0xc 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c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-vfiprintf.o) + 0x0000000000032acc 0x2f /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-vfiprintf.o) .rodata.zeroes.4349 - 0x0000000000032acc 0x10 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-vfiprintf.o) + 0x0000000000032acc 0x10 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-vfiprintf.o) .rodata.blanks.4348 - 0x0000000000032adc 0x10 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-vfiprintf.o) - .rodata 0x0000000000032aec 0x100 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(_clz.o) + 0x0000000000032adc 0x10 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-vfiprintf.o) + .rodata 0x0000000000032aec 0x100 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a(_clz.o) 0x0000000000032aec __clz_tab - .rodata 0x0000000000032bec 0xa ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_dev.o) + .rodata 0x0000000000032bec 0xa ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_dev.o) *fill* 0x0000000000032bf6 0x2 - .rodata 0x0000000000032bf8 0xf ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_main.o) + .rodata 0x0000000000032bf8 0xf ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_main.o) *fill* 0x0000000000032c07 0x1 - .rodata 0x0000000000032c08 0xf ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_sys_init.o) + .rodata 0x0000000000032c08 0xf ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_sys_init.o) *(.rodata1) 0x0000000000032c18 . = ALIGN (0x4) *fill* 0x0000000000032c17 0x1 @@ -989,128 +989,128 @@ LOAD c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nio .data 0x0000000000032c18 0x34 obj/default/mipi_bridge_config.o .data 0x0000000000032c4c 0x774 obj/default/mipi_camera_config.o .data 0x00000000000333c0 0x0 obj/default/queue.o - .data 0x00000000000333c0 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(lib2-divmod.o) - .data 0x00000000000333c0 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-getc.o) - .data 0x00000000000333c0 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-impure.o) + .data 0x00000000000333c0 0x0 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c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nio 0x0000000000034e76 focus_th *fill* 0x0000000000034e77 0x1 .sdata._global_impure_ptr - 0x0000000000034e78 0x4 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-impure.o) + 0x0000000000034e78 0x4 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-impure.o) 0x0000000000034e78 _global_impure_ptr .sdata._impure_ptr - 0x0000000000034e7c 0x4 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-impure.o) + 0x0000000000034e7c 0x4 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-impure.o) 0x0000000000034e7c _impure_ptr .sdata.__malloc_sbrk_base - 0x0000000000034e80 0x4 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-mallocr.o) + 0x0000000000034e80 0x4 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-mallocr.o) 0x0000000000034e80 __malloc_sbrk_base .sdata.__malloc_trim_threshold - 0x0000000000034e84 0x4 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-mallocr.o) + 0x0000000000034e84 0x4 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-mallocr.o) 0x0000000000034e84 __malloc_trim_threshold .sdata.__mb_cur_max - 0x0000000000034e88 0x4 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-locale.o) + 0x0000000000034e88 0x4 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-locale.o) 0x0000000000034e88 __mb_cur_max .sdata.__wctomb - 0x0000000000034e8c 0x4 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-wctomb_r.o) + 0x0000000000034e8c 0x4 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-wctomb_r.o) 0x0000000000034e8c __wctomb - .sdata 0x0000000000034e90 0x14 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_dev.o) + .sdata 0x0000000000034e90 0x14 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_dev.o) 0x0000000000034e90 alt_fs_list 0x0000000000034e98 alt_dev_list 0x0000000000034ea0 alt_max_fd - .sdata 0x0000000000034ea4 0x4 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_errno.o) + .sdata 0x0000000000034ea4 0x4 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_errno.o) 0x0000000000034ea4 alt_errno - .sdata 0x0000000000034ea8 0x4 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_sbrk.o) - .sdata 0x0000000000034eac 0x8 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_tick.o) + .sdata 0x0000000000034ea8 0x4 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_sbrk.o) + .sdata 0x0000000000034eac 0x8 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_tick.o) 0x0000000000034eac alt_alarm_list - .sdata 0x0000000000034eb4 0x4 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_irq_vars.o) + .sdata 0x0000000000034eb4 0x4 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_vars.o) 0x0000000000034eb4 alt_priority_mask *(.sdata2 .sdata2.* .gnu.linkonce.s2.*) 0x0000000000034eb8 . = ALIGN (0x4) @@ -1167,35 +1167,35 @@ LOAD c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nio *(.dynsbss) *(.sbss .sbss.* .gnu.linkonce.sb.*) .sbss.__malloc_max_total_mem - 0x0000000000037158 0x4 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-mallocr.o) + 0x0000000000037158 0x4 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-mallocr.o) 0x0000000000037158 __malloc_max_total_mem .sbss.__malloc_max_sbrked_mem - 0x000000000003715c 0x4 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-mallocr.o) + 0x000000000003715c 0x4 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-mallocr.o) 0x000000000003715c __malloc_max_sbrked_mem .sbss.__malloc_top_pad - 0x0000000000037160 0x4 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-mallocr.o) + 0x0000000000037160 0x4 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-mallocr.o) 0x0000000000037160 __malloc_top_pad - .sbss 0x0000000000037164 0x4 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-int_errno.o) + .sbss 0x0000000000037164 0x4 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-int_errno.o) 0x0000000000037164 errno .sbss._PathLocale - 0x0000000000037168 0x4 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-locale.o) + 0x0000000000037168 0x4 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-locale.o) 0x0000000000037168 _PathLocale .sbss.__mlocale_changed - 0x000000000003716c 0x4 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-locale.o) + 0x000000000003716c 0x4 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-locale.o) 0x000000000003716c __mlocale_changed .sbss.__nlocale_changed - 0x0000000000037170 0x4 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-locale.o) + 0x0000000000037170 0x4 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-locale.o) 0x0000000000037170 __nlocale_changed - .sbss 0x0000000000037174 0xc ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_main.o) + .sbss 0x0000000000037174 0xc ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_main.o) 0x0000000000037174 alt_argc 0x0000000000037178 alt_argv 0x000000000003717c alt_envp - .sbss 0x0000000000037180 0x8 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_tick.o) + .sbss 0x0000000000037180 0x8 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_tick.o) 0x0000000000037180 _alt_tick_rate 0x0000000000037184 _alt_nticks - .sbss 0x0000000000037188 0x4 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_irq_vars.o) + .sbss 0x0000000000037188 0x4 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_vars.o) 0x0000000000037188 alt_irq_active - .sbss 0x000000000003718c 0x4 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_instruction_exception_entry.o) + .sbss 0x000000000003718c 0x4 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_instruction_exception_entry.o) 0x000000000003718c alt_instruction_exception_handler *(.sbss2 .sbss2.* .gnu.linkonce.sb2.*) *(.scommon) @@ -1210,121 +1210,121 @@ LOAD c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nio .bss 0x0000000000037190 0x0 obj/default/mipi_bridge_config.o .bss 0x0000000000037190 0x0 obj/default/mipi_camera_config.o .bss 0x0000000000037190 0x0 obj/default/queue.o - .bss 0x0000000000037190 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(lib2-divmod.o) - .bss 0x0000000000037190 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-getc.o) - .bss 0x0000000000037190 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-impure.o) - .bss 0x0000000000037190 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-malloc.o) - .bss 0x0000000000037190 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-mallocr.o) + .bss 0x0000000000037190 0x0 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a(lib2-divmod.o) + .bss 0x0000000000037190 0x0 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-getc.o) + .bss 0x0000000000037190 0x0 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-impure.o) + .bss 0x0000000000037190 0x0 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-malloc.o) + .bss 0x0000000000037190 0x0 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-mallocr.o) .bss.__malloc_current_mallinfo - 0x0000000000037190 0x28 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-mallocr.o) + 0x0000000000037190 0x28 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-mallocr.o) 0x0000000000037190 __malloc_current_mallinfo - .bss 0x00000000000371b8 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-memset.o) - .bss 0x00000000000371b8 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-printf.o) - .bss 0x00000000000371b8 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-putchar.o) - .bss 0x00000000000371b8 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-puts.o) - .bss 0x00000000000371b8 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-rget.o) - .bss 0x00000000000371b8 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-sbrkr.o) - .bss 0x00000000000371b8 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-strlen.o) - .bss 0x00000000000371b8 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-vfprintf.o) - .bss 0x00000000000371b8 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-wsetup.o) - .bss 0x00000000000371b8 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-dtoa.o) - .bss 0x00000000000371b8 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-fflush.o) - .bss 0x00000000000371b8 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-findfp.o) - .bss 0x00000000000371b8 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-freer.o) - .bss 0x00000000000371b8 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-fvwrite.o) - .bss 0x00000000000371b8 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-fwalk.o) - .bss 0x00000000000371b8 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-int_errno.o) - .bss 0x00000000000371b8 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-locale.o) - .bss 0x00000000000371b8 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-makebuf.o) - .bss 0x00000000000371b8 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-memchr.o) - .bss 0x00000000000371b8 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-memcpy.o) - .bss 0x00000000000371b8 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-memmove.o) - .bss 0x00000000000371b8 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-mprec.o) - .bss 0x00000000000371b8 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-putc.o) - .bss 0x00000000000371b8 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-reallocr.o) - .bss 0x00000000000371b8 0x0 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-refill.o) - .bss 0x00000000000371b8 0x0 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/usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a(_clz.o) + .bss 0x00000000000371b8 0x0 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a(_clzsi2.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_close.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_dev.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_errno.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_fcntl.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_fstat.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_isatty.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_load.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_lseek.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_main.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_malloc_lock.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_read.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_release_fd.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_sbrk.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_tick.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_usleep.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_write.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_sys_init.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_fd.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_init.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_ioctl.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_read.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_write.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_timer_sc.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_alarm_start.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_busy_sleep.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_dcache_flush_all.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_dev_llist_insert.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_do_ctors.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_do_dtors.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_icache_flush_all.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_iic.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_iic_isr_register.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_io_redirect.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_entry.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_handler.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_vars.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_open.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_nios2_gen2_irq.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_exception_entry.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_find_dev.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_find_file.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_get_fd.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_icache_flush.o) + .bss 0x00000000000371b8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_instruction_exception_entry.o) + .bss 0x00000000000371b8 0x0 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-atexit.o) + .bss 0x00000000000371b8 0x0 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-exit.o) + .bss 0x00000000000371b8 0x0 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-memcmp.o) + .bss 0x00000000000371b8 0x0 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-__atexit.o) + .bss 0x00000000000371b8 0x0 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0x0000000000000023 0x24 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_handler.o) + .comment 0x0000000000000023 0x24 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_vars.o) + .comment 0x0000000000000023 0x24 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_open.o) + .comment 0x0000000000000023 0x24 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_nios2_gen2_irq.o) + .comment 0x0000000000000023 0x24 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_find_dev.o) + .comment 0x0000000000000023 0x24 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_find_file.o) + .comment 0x0000000000000023 0x24 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_get_fd.o) + .comment 0x0000000000000023 0x24 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_icache_flush.o) + .comment 0x0000000000000023 0x24 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_instruction_exception_entry.o) + .comment 0x0000000000000023 0x24 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../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_ioctl.o) + .debug_info 0x00000000000243ab 0x345 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_read.o) + .debug_info 0x00000000000246f0 0x340 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_write.o) + .debug_info 0x0000000000024a30 0x226 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_timer_sc.o) + .debug_info 0x0000000000024c56 0x2cc ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_alarm_start.o) + .debug_info 0x0000000000024f22 0xd7 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_busy_sleep.o) + .debug_info 0x0000000000024ff9 0xa5 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_dcache_flush_all.o) + .debug_info 0x000000000002509e 0x1a9 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_dev_llist_insert.o) + .debug_info 0x0000000000025247 0x83 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_do_ctors.o) + .debug_info 0x00000000000252ca 0x83 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_do_dtors.o) + .debug_info 0x000000000002534d 0x92 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/usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a(_clz.o) + .debug_line 0x0000000000009c75 0xb7 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a(_clzsi2.o) + .debug_line 0x0000000000009d2c 0x16b ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_close.o) + .debug_line 0x0000000000009e97 0xfd ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_dev.o) + .debug_line 0x0000000000009f94 0x51 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_errno.o) + .debug_line 0x0000000000009fe5 0x1f0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_fcntl.o) + .debug_line 0x000000000000a1d5 0x164 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_fstat.o) + .debug_line 0x000000000000a339 0x168 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_isatty.o) + .debug_line 0x000000000000a4a1 0x8e ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_load.o) + .debug_line 0x000000000000a52f 0x169 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_lseek.o) + .debug_line 0x000000000000a698 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.debug_line 0x000000000000b398 0x131 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_ioctl.o) + .debug_line 0x000000000000b4c9 0x171 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_read.o) + .debug_line 0x000000000000b63a 0x170 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_write.o) + .debug_line 0x000000000000b7aa 0xfd ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_timer_sc.o) + .debug_line 0x000000000000b8a7 0xfa ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_alarm_start.o) + .debug_line 0x000000000000b9a1 0xa0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_busy_sleep.o) + .debug_line 0x000000000000ba41 0x61 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_dcache_flush_all.o) + .debug_line 0x000000000000baa2 0xd0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_dev_llist_insert.o) + .debug_line 0x000000000000bb72 0x59 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_do_ctors.o) + .debug_line 0x000000000000bbcb 0x59 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_do_dtors.o) + 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/usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-exit.o) + .debug_loc 0x0000000000017d85 0x126 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-memcmp.o) + .debug_loc 0x0000000000017eab 0x185 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-__atexit.o) + .debug_loc 0x0000000000018030 0x1ce /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-__call_atexit.o) .debug_macinfo *(.debug_macinfo) @@ -2516,7 +2516,7 @@ LOAD c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nio .debug_alt_sim_info 0x0000000000000000 0x30 ../D8M_Camera_Test_bsp//obj/HAL/src/crt0.o .debug_alt_sim_info - 0x0000000000000030 0x30 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_busy_sleep.o) + 0x0000000000000030 0x30 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_busy_sleep.o) 0x00000000000386a0 __alt_data_end = 0x386a0 0x00000000000386a0 PROVIDE (__alt_stack_pointer, __alt_data_end) [!provide] PROVIDE (__alt_stack_limit, __alt_stack_base) @@ -2526,71 +2526,71 @@ OUTPUT(D8M_Camera_Test.elf elf32-littlenios2) .debug_ranges 0x0000000000000000 0x19e0 .debug_ranges 0x0000000000000000 0x20 ../D8M_Camera_Test_bsp//obj/HAL/src/crt0.o - .debug_ranges 0x0000000000000020 0x60 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(lib2-divmod.o) - .debug_ranges 0x0000000000000080 0x48 c:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-getc.o) - .debug_ranges 0x00000000000000c8 0x18 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/usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a(adddf3.o) + .debug_ranges 0x0000000000001120 0x138 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a(divdf3.o) + .debug_ranges 0x0000000000001258 0x48 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a(eqdf2.o) + .debug_ranges 0x00000000000012a0 0x88 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a(gedf2.o) + .debug_ranges 0x0000000000001328 0xa8 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a(ledf2.o) + .debug_ranges 0x00000000000013d0 0x1f0 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a(muldf3.o) + .debug_ranges 0x00000000000015c0 0x268 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a(subdf3.o) + .debug_ranges 0x0000000000001828 0x30 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a(fixdfsi.o) + .debug_ranges 0x0000000000001858 0x20 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a(floatsidf.o) + .debug_ranges 0x0000000000001878 0x18 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a(floatunsidf.o) + .debug_ranges 0x0000000000001890 0x18 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a(_clzsi2.o) + .debug_ranges 0x00000000000018a8 0x30 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_init.o) + .debug_ranges 0x00000000000018d8 0x18 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_read.o) + .debug_ranges 0x00000000000018f0 0x28 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_entry.o) + .debug_ranges 0x0000000000001918 0x10 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_handler.o) + .debug_ranges 0x0000000000001928 0x30 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_exception_entry.o) + .debug_ranges 0x0000000000001958 0x18 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_instruction_exception_entry.o) + .debug_ranges 0x0000000000001970 0x10 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-atexit.o) + .debug_ranges 0x0000000000001980 0x10 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-exit.o) + .debug_ranges 0x0000000000001990 0x10 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-memcmp.o) + .debug_ranges 0x00000000000019a0 0x10 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-__atexit.o) + .debug_ranges 0x00000000000019b0 0x30 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-__call_atexit.o) diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/D8M_Camera_Test.objdump b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/D8M_Camera_Test.objdump index eefcbd9..918dfb4 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/D8M_Camera_Test.objdump +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/D8M_Camera_Test.objdump @@ -35,45 +35,49 @@ Idx Name Size VMA LMA File off Algn CONTENTS, READONLY 8 .debug_aranges 000010a8 00000000 00000000 00015ee0 2**3 CONTENTS, READONLY, DEBUGGING - 9 .debug_info 00028ed6 00000000 00000000 00016f88 2**0 + 9 .debug_info 00028f70 00000000 00000000 00016f88 2**0 CONTENTS, READONLY, DEBUGGING - 10 .debug_abbrev 0000a658 00000000 00000000 0003fe5e 2**0 + 10 .debug_abbrev 0000a67c 00000000 00000000 0003fef8 2**0 CONTENTS, READONLY, DEBUGGING - 11 .debug_line 0000cf5a 00000000 00000000 0004a4b6 2**0 + 11 .debug_line 0000cfb3 00000000 00000000 0004a574 2**0 CONTENTS, READONLY, DEBUGGING - 12 .debug_frame 000029b0 00000000 00000000 00057410 2**2 + 12 .debug_frame 000029b0 00000000 00000000 00057528 2**2 CONTENTS, READONLY, DEBUGGING - 13 .debug_str 00003edf 00000000 00000000 00059dc0 2**0 + 13 .debug_str 00003f8b 00000000 00000000 00059ed8 2**0 CONTENTS, READONLY, DEBUGGING - 14 .debug_loc 00017f20 00000000 00000000 0005dc9f 2**0 + 14 .debug_loc 000181fe 00000000 00000000 0005de63 2**0 CONTENTS, READONLY, DEBUGGING - 15 .debug_alt_sim_info 00000060 00000000 00000000 00075bc0 2**2 + 15 .debug_alt_sim_info 00000060 00000000 00000000 00076064 2**2 CONTENTS, READONLY, DEBUGGING - 16 .debug_ranges 000019e0 00000000 00000000 00075c20 2**3 + 16 .debug_ranges 000019e0 00000000 00000000 000760c8 2**3 CONTENTS, READONLY, DEBUGGING - 17 .thread_model 00000003 00000000 00000000 0007af6b 2**0 + 17 .thread_model 00000003 00000000 00000000 0007b472 2**0 CONTENTS, READONLY - 18 .cpu 0000000a 00000000 00000000 0007af6e 2**0 + 18 .cpu 0000000a 00000000 00000000 0007b475 2**0 CONTENTS, READONLY - 19 .qsys 00000001 00000000 00000000 0007af78 2**0 + 19 .qsys 00000001 00000000 00000000 0007b47f 2**0 CONTENTS, READONLY - 20 .simulation_enabled 00000001 00000000 00000000 0007af79 2**0 + 20 .simulation_enabled 00000001 00000000 00000000 0007b480 2**0 CONTENTS, READONLY - 21 .sysid_hash 00000004 00000000 00000000 0007af7a 2**0 + 21 .sysid_hash 00000004 00000000 00000000 0007b481 2**0 CONTENTS, READONLY - 22 .sysid_base 00000004 00000000 00000000 0007af7e 2**0 + 22 .sysid_base 00000004 00000000 00000000 0007b485 2**0 CONTENTS, READONLY - 23 .sysid_time 00000004 00000000 00000000 0007af82 2**0 + 23 .sysid_time 00000004 00000000 00000000 0007b489 2**0 CONTENTS, READONLY - 24 .stderr_dev 00000009 00000000 00000000 0007af86 2**0 + 24 .stderr_dev 00000009 00000000 00000000 0007b48d 2**0 CONTENTS, READONLY - 25 .stdin_dev 00000009 00000000 00000000 0007af8f 2**0 + 25 .stdin_dev 00000009 00000000 00000000 0007b496 2**0 CONTENTS, READONLY - 26 .stdout_dev 00000009 00000000 00000000 0007af98 2**0 + 26 .stdout_dev 00000009 00000000 00000000 0007b49f 2**0 CONTENTS, READONLY - 27 .sopc_system_name 00000004 00000000 00000000 0007afa1 2**0 + 27 .sopc_system_name 00000004 00000000 00000000 0007b4a8 2**0 CONTENTS, READONLY - 28 .quartus_project_dir 00000003 00000000 00000000 0007afa5 2**0 + 28 .quartus_project_dir 00000039 00000000 00000000 0007b4ac 2**0 + CONTENTS, READONLY + 29 .jdi 00003b41 00000000 00000000 0007b4e5 2**0 + CONTENTS, READONLY + 30 .sopcinfo 00099263 00000000 00000000 0007f026 2**0 CONTENTS, READONLY SYMBOL TABLE: 00020000 l d .entry 00000000 .entry @@ -559,7 +563,7 @@ Disassembly of section .entry: addi r2, r2, -NIOS2_ICACHE_LINE_SIZE 20008: 10bff804 addi r2,r2,-32 bgt r2, zero, 0b - 2000c: 00bffd16 blt zero,r2,20004 <_gp+0xfffe3198> + 2000c: 00bffd16 blt zero,r2,20004 <__reset+0x4> * Jump to the _start entry point in the .text section if reset code * is allowed or if optimizing for RTL simulation. */ @@ -864,14 +868,14 @@ static ALT_INLINE alt_u32 ALT_ALWAYS_INLINE alt_irq_pending (void) 201a0: e0bffd15 stw r2,-12(fp) } while (1); - 201a4: 003fe106 br 2012c <_gp+0xfffe32c0> + 201a4: 003fe106 br 2012c active = alt_irq_pending (); 201a8: e0bffb15 stw r2,-20(fp) } while (active); 201ac: e0bffb17 ldw r2,-20(fp) - 201b0: 103fdb1e bne r2,zero,20120 <_gp+0xfffe32b4> + 201b0: 103fdb1e bne r2,zero,20120 /* * Notify the operating system that interrupt processing is complete. @@ -981,7 +985,7 @@ Disassembly of section .text: 2024c: 10bff804 addi r2,r2,-32 #endif bgt r2, zero, 0b - 20250: 00bffd16 blt zero,r2,20248 <_gp+0xfffe33dc> + 20250: 00bffd16 blt zero,r2,20248 <_start+0x4> /* * Now that the caches are initialized, set up the stack pointer and global pointer. @@ -1019,7 +1023,7 @@ Disassembly of section .text: addi r2, r2, 4 2027c: 10800104 addi r2,r2,4 bltu r2, r3, 0b - 20280: 10fffd36 bltu r2,r3,20278 <_gp+0xfffe340c> + 20280: 10fffd36 bltu r2,r3,20278 <_start+0x34> * section aren't defined until alt_load() has been called). */ mov et, zero @@ -1040,7 +1044,7 @@ Disassembly of section .text: /* Wait in infinite loop in case alt_main does return. */ alt_after_alt_main: br alt_after_alt_main - 2028c: 003fff06 br 2028c <_gp+0xfffe3420> + 2028c: 003fff06 br 2028c 00020290 : #define SLEEP_TIME 250 //us @@ -1429,7 +1433,7 @@ bool ACK_check(alt_32 i2c_base){ 2061c: 10c00044 addi r3,r2,1 20620: e0fffe15 stw r3,-8(fp) 20624: 10800290 cmplti r2,r2,10 - 20628: 103ff61e bne r2,zero,20604 <_gp+0xfffe3798> + 20628: 103ff61e bne r2,zero,20604 bSuccess = ACK_single_check(i2c_base); } @@ -1619,7 +1623,7 @@ bool OC_I2C_Write(alt_32 i2c_base,alt_u8 device_address,alt_u8 sub_address, alt 207ec: 10bfffc4 addi r2,r2,-1 207f0: e0bffb15 stw r2,-20(fp) 207f4: e0bffb17 ldw r2,-20(fp) - 207f8: 103fda0e bge r2,zero,20764 <_gp+0xfffe38f8> + 207f8: 103fda0e bge r2,zero,20764 //wait TIP bit go to 0 to end Tx if(!ACK_check( i2c_base)) return false; @@ -1867,7 +1871,7 @@ bool OC_I2C_Read(alt_32 i2c_base,alt_u8 device_address,alt_u8 sub_address, alt_ 20a30: e0bffa15 stw r2,-24(fp) 20a34: e0fffa17 ldw r3,-24(fp) 20a38: e0800217 ldw r2,8(fp) - 20a3c: 18bfde16 blt r3,r2,209b8 <_gp+0xfffe3b4c> + 20a3c: 18bfde16 blt r3,r2,209b8 Data32=IORD( i2c_base, 3); *(pData8+i) = Data32 & 0xff; @@ -1999,7 +2003,7 @@ bool OC_I2C_Read_Continue(alt_32 i2c_base,alt_u8 device_address, alt_u8 *pData8 20b68: e0bffa15 stw r2,-24(fp) 20b6c: e0fffa17 ldw r3,-24(fp) 20b70: e0bfff17 ldw r2,-4(fp) - 20b74: 18bfde16 blt r3,r2,20af0 <_gp+0xfffe3c84> + 20b74: 18bfde16 blt r3,r2,20af0 Data32=IORD( i2c_base, 3); *(pData8+i) = Data32 & 0xff; @@ -2225,7 +2229,7 @@ bool OC_I2CL_Write(alt_32 i2c_base,alt_u8 device_address,alt_u16 sub_address,al 20d70: 10bfffc4 addi r2,r2,-1 20d74: e0bffa15 stw r2,-24(fp) 20d78: e0bffa17 ldw r2,-24(fp) - 20d7c: 103fe00e bge r2,zero,20d00 <_gp+0xfffe3e94> + 20d7c: 103fe00e bge r2,zero,20d00 //wait TIP bit go to 0 to end Tx if(!ACK_check( i2c_base)) return FALSE; @@ -2498,7 +2502,7 @@ bool OC_I2CL_Read(alt_32 i2c_base,alt_u8 device_address, alt_u16 sub_address, a 20ff0: e0bff915 stw r2,-28(fp) 20ff4: e0fff917 ldw r3,-28(fp) 20ff8: e0800217 ldw r2,8(fp) - 20ffc: 18bfde16 blt r3,r2,20f78 <_gp+0xfffe410c> + 20ffc: 18bfde16 blt r3,r2,20f78 DataLow = Data32 & 0xff; pData16 = (DataHigh << 8) | DataLow; @@ -2838,7 +2842,7 @@ static ALT_INLINE alt_u32 ALT_ALWAYS_INLINE alt_nticks (void) 21398: 109c6104 addi r2,r2,29060 2139c: 10c00017 ldw r3,0(r2) 213a0: e0bfff17 ldw r2,-4(fp) - 213a4: 18bff636 bltu r3,r2,21380 <_gp+0xfffe4514> + 213a4: 18bff636 bltu r3,r2,21380 213a8: 008000f4 movhi r2,3 213ac: 109c6104 addi r2,r2,29060 213b0: 10c00017 ldw r3,0(r2) @@ -3100,16 +3104,12 @@ void mipi_show_error_info_more(void){ 000216bc : - - bool MIPI_Init(void){ 216bc: defffd04 addi sp,sp,-12 216c0: dfc00215 stw ra,8(sp) 216c4: df000115 stw fp,4(sp) 216c8: df000104 addi fp,sp,4 bool bSuccess; - - bSuccess = oc_i2c_init_ex(I2C_OPENCORES_MIPI_BASE, 50*1000*1000,400*1000); //I2C: 400K 216cc: 018001b4 movhi r6,6 216d0: 3186a004 addi r6,r6,6784 @@ -3126,39 +3126,29 @@ bool MIPI_Init(void){ 216f4: 010000f4 movhi r4,3 216f8: 2109c804 addi r4,r4,10016 216fc: 002367c0 call 2367c - usleep(50*1000); 21700: 0130d414 movui r4,50000 21704: 00302f00 call 302f0 MipiBridgeInit(); 21708: 0021c9c0 call 21c9c - usleep(500*1000); 2170c: 01000234 movhi r4,8 21710: 21284804 addi r4,r4,-24288 21714: 00302f00 call 302f0 - // bSuccess = oc_i2c_init_ex(I2C_OPENCORES_CAMERA_BASE, 50*1000*1000,400*1000); //I2C: 400K // if (!bSuccess) // printf("failed to init MIPI- Camera i2c\r\n"); - MipiCameraInit(); 21718: 00224800 call 22480 MIPI_BIN_LEVEL(DEFAULT_LEVEL); 2171c: 010000c4 movi r4,3 21720: 00222c00 call 222c0 // OV8865_FOCUS_Move_to(340); - // oc_i2c_uninit(I2C_OPENCORES_CAMERA_BASE); // Release I2C bus , due to two I2C master shared! - - usleep(1000); 21724: 0100fa04 movi r4,1000 21728: 00302f00 call 302f0 - - // oc_i2c_uninit(I2C_OPENCORES_MIPI_BASE); - return bSuccess; 2172c: e0bfff17 ldw r2,-4(fp) } @@ -3170,59 +3160,52 @@ bool MIPI_Init(void){ 00021744

    : - - - int main() { 21744: defff804 addi sp,sp,-32 21748: dfc00715 stw ra,28(sp) 2174c: df000615 stw fp,24(sp) 21750: df000604 addi fp,sp,24 - fcntl(STDIN_FILENO, F_SETFL, O_NONBLOCK); 21754: 01900004 movi r6,16384 21758: 01400104 movi r5,4 2175c: 0009883a mov r4,zero 21760: 002f9040 call 2f904 - - printf("DE10-LITE D8M VGA Demo\n"); + printf("DE10-LITE D8M VGA Demo\n"); 21764: 010000f4 movhi r4,3 21768: 2109d104 addi r4,r4,10052 2176c: 002367c0 call 2367c - printf("Imperial College EEE2 Project version\n"); + printf("Imperial College EEE2 Project version\n"); 21770: 010000f4 movhi r4,3 21774: 2109d704 addi r4,r4,10076 21778: 002367c0 call 2367c - IOWR(MIPI_PWDN_N_BASE, 0x00, 0x00); + IOWR(MIPI_PWDN_N_BASE, 0x00, 0x00); 2177c: 0007883a mov r3,zero 21780: 00800134 movhi r2,4 21784: 10842004 addi r2,r2,4224 21788: 10c00035 stwio r3,0(r2) - IOWR(MIPI_RESET_N_BASE, 0x00, 0x00); + IOWR(MIPI_RESET_N_BASE, 0x00, 0x00); 2178c: 0007883a mov r3,zero 21790: 00800134 movhi r2,4 21794: 10842404 addi r2,r2,4240 21798: 10c00035 stwio r3,0(r2) - - usleep(2000); + usleep(2000); 2179c: 0101f404 movi r4,2000 217a0: 00302f00 call 302f0 - IOWR(MIPI_PWDN_N_BASE, 0x00, 0xFF); + IOWR(MIPI_PWDN_N_BASE, 0x00, 0xFF); 217a4: 00c03fc4 movi r3,255 217a8: 00800134 movhi r2,4 217ac: 10842004 addi r2,r2,4224 217b0: 10c00035 stwio r3,0(r2) - usleep(2000); + usleep(2000); 217b4: 0101f404 movi r4,2000 217b8: 00302f00 call 302f0 - IOWR(MIPI_RESET_N_BASE, 0x00, 0xFF); + IOWR(MIPI_RESET_N_BASE, 0x00, 0xFF); 217bc: 00c03fc4 movi r3,255 217c0: 00800134 movhi r2,4 217c4: 10842404 addi r2,r2,4240 217c8: 10c00035 stwio r3,0(r2) - - printf("Image Processor ID: %x\n",IORD(0x42000,EEE_IMGPROC_ID)); + printf("Image Processor ID: %x\n",IORD(EEE_IMGPROC_0_BASE,EEE_IMGPROC_ID)); 217cc: 00800134 movhi r2,4 217d0: 10880204 addi r2,r2,8200 217d4: 10800037 ldwio r2,0(r2) @@ -3230,51 +3213,47 @@ int main() 217dc: 010000f4 movhi r4,3 217e0: 2109e104 addi r4,r4,10116 217e4: 00235600 call 23560 - //printf("Image Processor ID: %x\n",IORD(EEE_IMGPROC_0_BASE,EEE_IMGPROC_ID)); //Don't know why this doesn't work - definition is in system.h in BSP - - - usleep(2000); + usleep(2000); 217e8: 0101f404 movi r4,2000 217ec: 00302f00 call 302f0 - - // MIPI Init - if (!MIPI_Init()){ + // MIPI Init + if (!MIPI_Init()){ 217f0: 00216bc0 call 216bc 217f4: 1000041e bne r2,zero,21808 - printf("MIPI_Init Init failed!\r\n"); + printf("MIPI_Init Init failed!\r\n"); 217f8: 010000f4 movhi r4,3 217fc: 2109e704 addi r4,r4,10140 21800: 002367c0 call 2367c 21804: 00000306 br 21814 - }else{ - printf("MIPI_Init Init successfully!\r\n"); + }else{ + printf("MIPI_Init Init successfully!\r\n"); 21808: 010000f4 movhi r4,3 2180c: 2109ed04 addi r4,r4,10164 21810: 002367c0 call 2367c - } + } -// while(1){ - mipi_clear_error(); + // while(1){ + mipi_clear_error(); 21814: 00213f40 call 213f4 - usleep(50*1000); + usleep(50*1000); 21818: 0130d414 movui r4,50000 2181c: 00302f00 call 302f0 - mipi_clear_error(); + mipi_clear_error(); 21820: 00213f40 call 213f4 - usleep(1000*1000); + usleep(1000*1000); 21824: 010003f4 movhi r4,15 21828: 21109004 addi r4,r4,16960 2182c: 00302f00 call 302f0 - mipi_show_error_info(); + mipi_show_error_info(); 21830: 00214ac0 call 214ac -// mipi_show_error_info_more(); - printf("\n"); + // mipi_show_error_info_more(); + printf("\n"); 21834: 01000284 movi r4,10 21838: 00235a40 call 235a4 - - - + usleep(50*1000); + } +#endif ////////////////////////////////////////////////////////// alt_u16 bin_level = DEFAULT_LEVEL; @@ -3392,7 +3371,7 @@ int main() 21958: 10800037 ldwio r2,0(r2) 2195c: 1005d23a srai r2,r2,8 21960: 10803fcc andi r2,r2,255 - 21964: 103fec1e bne r2,zero,21918 <_gp+0xfffe4aac> + 21964: 103fec1e bne r2,zero,21918 } printf("%08x ",word); } @@ -3570,7 +3549,7 @@ int main() 21b64: 00302f00 call 302f0 }; - 21b68: 003f4506 br 21880 <_gp+0xfffe4a14> + 21b68: 003f4506 br 21880 00021b6c : {0x0004,0x8047} // Configuration Control Register @@ -3779,7 +3758,7 @@ void MipiBridgeInit(void){ 21d98: e0bffd15 stw r2,-12(fp) 21d9c: e0fffd17 ldw r3,-12(fp) 21da0: e0bfff17 ldw r2,-4(fp) - 21da4: 18bfd016 blt r3,r2,21ce8 <_gp+0xfffe4e7c> + 21da4: 18bfd016 blt r3,r2,21ce8 // MipiBridgeRegWrite(0x005A,((cap<<6) + (HsRxRs<<4) + ClkDly_data)); // MipiBridgeRegWrite(0x005C,((cap<<6) + (HsRxRs<<4) + ClkDly_data)); // MipiBridgeRegWrite(0x005E,((cap<<6) + (HsRxRs<<4) + ClkDly_data)); @@ -4506,7 +4485,7 @@ void MipiCameraInit(void) 22534: e0bffd15 stw r2,-12(fp) 22538: e0bffd17 ldw r2,-12(fp) 2253c: 10800290 cmplti r2,r2,10 - 22540: 103fe91e bne r2,zero,224e8 <_gp+0xfffe567c> + 22540: 103fe91e bne r2,zero,224e8 OV8865_write_cmos_sensor_8(0x3809,i); usleep(100); printf("%d (%d)\n",OV8865_read_cmos_sensor_8(0x3809),i); @@ -4590,7 +4569,7 @@ void MipiCameraInit(void) 22640: e0bffd15 stw r2,-12(fp) 22644: e0fffd17 ldw r3,-12(fp) 22648: e0bfff17 ldw r2,-4(fp) - 2264c: 18bfc116 blt r3,r2,22554 <_gp+0xfffe56e8> + 2264c: 18bfc116 blt r3,r2,22554 22650: 00000106 br 22658 if (MipiCameraReg[i].Type == TIME_DELAY) usleep(MipiCameraReg[i].Data*100); @@ -4867,7 +4846,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2294c: 294b883a add r5,r5,r5 22950: 10bfffc4 addi r2,r2,-1 22954: 18c7883a add r3,r3,r3 - 22958: 293ffb36 bltu r5,r4,22948 <_gp+0xfffe5adc> + 22958: 293ffb36 bltu r5,r4,22948 <__divsi3+0x20> 2295c: 0005883a mov r2,zero 22960: 18000726 beq r3,zero,22980 <__divsi3+0x58> 22964: 0005883a mov r2,zero @@ -4876,18 +4855,18 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 22970: 10c4b03a or r2,r2,r3 22974: 1806d07a srli r3,r3,1 22978: 280ad07a srli r5,r5,1 - 2297c: 183ffa1e bne r3,zero,22968 <_gp+0xfffe5afc> + 2297c: 183ffa1e bne r3,zero,22968 <__divsi3+0x40> 22980: 38000126 beq r7,zero,22988 <__divsi3+0x60> 22984: 0085c83a sub r2,zero,r2 22988: f800283a ret 2298c: 014bc83a sub r5,zero,r5 22990: 39c0005c xori r7,r7,1 - 22994: 003fe706 br 22934 <_gp+0xfffe5ac8> + 22994: 003fe706 br 22934 <__divsi3+0xc> 22998: 0109c83a sub r4,zero,r4 2299c: 01c00044 movi r7,1 - 229a0: 003fe306 br 22930 <_gp+0xfffe5ac4> + 229a0: 003fe306 br 22930 <__divsi3+0x8> 229a4: 00c00044 movi r3,1 - 229a8: 003fee06 br 22964 <_gp+0xfffe5af8> + 229a8: 003fee06 br 22964 <__divsi3+0x3c> 000229ac <__modsi3>: 229ac: 20001716 blt r4,zero,22a0c <__modsi3+0x60> @@ -4902,23 +4881,23 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 229d0: 294b883a add r5,r5,r5 229d4: 31bfffc4 addi r6,r6,-1 229d8: 18c7883a add r3,r3,r3 - 229dc: 293ffb36 bltu r5,r4,229cc <_gp+0xfffe5b60> + 229dc: 293ffb36 bltu r5,r4,229cc <__modsi3+0x20> 229e0: 18000526 beq r3,zero,229f8 <__modsi3+0x4c> 229e4: 1806d07a srli r3,r3,1 229e8: 11400136 bltu r2,r5,229f0 <__modsi3+0x44> 229ec: 1145c83a sub r2,r2,r5 229f0: 280ad07a srli r5,r5,1 - 229f4: 183ffb1e bne r3,zero,229e4 <_gp+0xfffe5b78> + 229f4: 183ffb1e bne r3,zero,229e4 <__modsi3+0x38> 229f8: 38000126 beq r7,zero,22a00 <__modsi3+0x54> 229fc: 0085c83a sub r2,zero,r2 22a00: f800283a ret 22a04: 014bc83a sub r5,zero,r5 - 22a08: 003fec06 br 229bc <_gp+0xfffe5b50> + 22a08: 003fec06 br 229bc <__modsi3+0x10> 22a0c: 0109c83a sub r4,zero,r4 22a10: 01c00044 movi r7,1 - 22a14: 003fe706 br 229b4 <_gp+0xfffe5b48> + 22a14: 003fe706 br 229b4 <__modsi3+0x8> 22a18: 00c00044 movi r3,1 - 22a1c: 003ff106 br 229e4 <_gp+0xfffe5b78> + 22a1c: 003ff106 br 229e4 <__modsi3+0x38> 00022a20 <__udivsi3>: 22a20: 200d883a mov r6,r4 @@ -4932,7 +4911,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 22a40: 294b883a add r5,r5,r5 22a44: 10bfffc4 addi r2,r2,-1 22a48: 18c7883a add r3,r3,r3 - 22a4c: 293ffa36 bltu r5,r4,22a38 <_gp+0xfffe5bcc> + 22a4c: 293ffa36 bltu r5,r4,22a38 <__udivsi3+0x18> 22a50: 18000826 beq r3,zero,22a74 <__udivsi3+0x54> 22a54: 0005883a mov r2,zero 22a58: 31400236 bltu r6,r5,22a64 <__udivsi3+0x44> @@ -4940,12 +4919,12 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 22a60: 10c4b03a or r2,r2,r3 22a64: 1806d07a srli r3,r3,1 22a68: 280ad07a srli r5,r5,1 - 22a6c: 183ffa1e bne r3,zero,22a58 <_gp+0xfffe5bec> + 22a6c: 183ffa1e bne r3,zero,22a58 <__udivsi3+0x38> 22a70: f800283a ret 22a74: 0005883a mov r2,zero 22a78: f800283a ret 22a7c: 00c00044 movi r3,1 - 22a80: 003ff406 br 22a54 <_gp+0xfffe5be8> + 22a80: 003ff406 br 22a54 <__udivsi3+0x34> 00022a84 <__umodsi3>: 22a84: 2005883a mov r2,r4 @@ -4959,17 +4938,17 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 22aa4: 294b883a add r5,r5,r5 22aa8: 31bfffc4 addi r6,r6,-1 22aac: 18c7883a add r3,r3,r3 - 22ab0: 293ffa36 bltu r5,r4,22a9c <_gp+0xfffe5c30> + 22ab0: 293ffa36 bltu r5,r4,22a9c <__umodsi3+0x18> 22ab4: 18000626 beq r3,zero,22ad0 <__umodsi3+0x4c> 22ab8: 1806d07a srli r3,r3,1 22abc: 11400136 bltu r2,r5,22ac4 <__umodsi3+0x40> 22ac0: 1145c83a sub r2,r2,r5 22ac4: 280ad07a srli r5,r5,1 - 22ac8: 183ffb1e bne r3,zero,22ab8 <_gp+0xfffe5c4c> + 22ac8: 183ffb1e bne r3,zero,22ab8 <__umodsi3+0x34> 22acc: f800283a ret 22ad0: f800283a ret 22ad4: 00c00044 movi r3,1 - 22ad8: 003ff706 br 22ab8 <_gp+0xfffe5c4c> + 22ad8: 003ff706 br 22ab8 <__umodsi3+0x34> 00022adc <_getc_r>: 22adc: defffd04 addi sp,sp,-12 @@ -4994,7 +4973,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 22b28: d9400015 stw r5,0(sp) 22b2c: 0027aa80 call 27aa8 <__sinit> 22b30: d9400017 ldw r5,0(sp) - 22b34: 003ff006 br 22af8 <_gp+0xfffe5c8c> + 22b34: 003ff006 br 22af8 <_getc_r+0x1c> 22b38: 8009883a mov r4,r16 22b3c: dfc00217 ldw ra,8(sp) 22b40: dc000117 ldw r16,4(sp) @@ -5028,7 +5007,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 22ba8: f800283a ret 22bac: 8809883a mov r4,r17 22bb0: 0027aa80 call 27aa8 <__sinit> - 22bb4: 003ff006 br 22b78 <_gp+0xfffe5d0c> + 22bb4: 003ff006 br 22b78 22bb8: 800b883a mov r5,r16 22bbc: 8809883a mov r4,r17 22bc0: dfc00217 ldw ra,8(sp) @@ -5102,7 +5081,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 22cb8: 80800117 ldw r2,4(r16) 22cbc: 1184703a and r2,r2,r6 22cc0: 1447c83a sub r3,r2,r17 - 22cc4: 28fff90e bge r5,r3,22cac <_gp+0xfffe5e40> + 22cc4: 28fff90e bge r5,r3,22cac <_malloc_r+0xb0> 22cc8: 3809883a mov r4,r7 22ccc: 018000f4 movhi r6,3 22cd0: 9c000417 ldw r16,16(r19) @@ -5153,7 +5132,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 22d84: 294b883a add r5,r5,r5 22d88: 28c4703a and r2,r5,r3 22d8c: 21000104 addi r4,r4,4 - 22d90: 103ffc26 beq r2,zero,22d84 <_gp+0xfffe5f18> + 22d90: 103ffc26 beq r2,zero,22d84 <_malloc_r+0x188> 22d94: 02bfff04 movi r10,-4 22d98: 024003c4 movi r9,15 22d9c: 21800044 addi r6,r4,1 @@ -5174,7 +5153,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 22dd8: 80800117 ldw r2,4(r16) 22ddc: 1284703a and r2,r2,r10 22de0: 1447c83a sub r3,r2,r17 - 22de4: 48fff90e bge r9,r3,22dcc <_gp+0xfffe5f60> + 22de4: 48fff90e bge r9,r3,22dcc <_malloc_r+0x1d0> 22de8: 80800317 ldw r2,12(r16) 22dec: 81000217 ldw r4,8(r16) 22df0: 89400054 ori r5,r17,1 @@ -5236,15 +5215,15 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 22ed0: 00800304 movi r2,12 22ed4: 90800015 stw r2,0(r18) 22ed8: 0005883a mov r2,zero - 22edc: 003ff006 br 22ea0 <_gp+0xfffe6034> + 22edc: 003ff006 br 22ea0 <_malloc_r+0x2a4> 22ee0: 01002004 movi r4,128 22ee4: 02001004 movi r8,64 22ee8: 01c00fc4 movi r7,63 - 22eec: 003f6106 br 22c74 <_gp+0xfffe5e08> + 22eec: 003f6106 br 22c74 <_malloc_r+0x78> 22ef0: 4009883a mov r4,r8 - 22ef4: 003f7506 br 22ccc <_gp+0xfffe5e60> + 22ef4: 003f7506 br 22ccc <_malloc_r+0xd0> 22ef8: 81000317 ldw r4,12(r16) - 22efc: 003fde06 br 22e78 <_gp+0xfffe600c> + 22efc: 003fde06 br 22e78 <_malloc_r+0x27c> 22f00: 81c5883a add r2,r16,r7 22f04: 11400117 ldw r5,4(r2) 22f08: 9009883a mov r4,r18 @@ -5252,7 +5231,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 22f10: 11400115 stw r5,4(r2) 22f14: 002fec80 call 2fec8 <__malloc_unlock> 22f18: 80800204 addi r2,r16,8 - 22f1c: 003fe006 br 22ea0 <_gp+0xfffe6034> + 22f1c: 003fe006 br 22ea0 <_malloc_r+0x2a4> 22f20: 9c000217 ldw r16,8(r19) 22f24: 00bfff04 movi r2,-4 22f28: 85800117 ldw r22,4(r16) @@ -5353,7 +5332,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 230a4: 9009883a mov r4,r18 230a8: 002fec80 call 2fec8 <__malloc_unlock> 230ac: 0005883a mov r2,zero - 230b0: 003f7b06 br 22ea0 <_gp+0xfffe6034> + 230b0: 003f7b06 br 22ea0 <_malloc_r+0x2a4> 230b4: 88c00054 ori r3,r17,1 230b8: 80c00115 stw r3,4(r16) 230bc: 8463883a add r17,r16,r17 @@ -5363,7 +5342,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 230cc: 9009883a mov r4,r18 230d0: 002fec80 call 2fec8 <__malloc_unlock> 230d4: 80800204 addi r2,r16,8 - 230d8: 003f7106 br 22ea0 <_gp+0xfffe6034> + 230d8: 003f7106 br 22ea0 <_malloc_r+0x2a4> 230dc: 00c00504 movi r3,20 230e0: 18804a2e bgeu r3,r2,2320c <_malloc_r+0x610> 230e4: 00c01504 movi r3,84 @@ -5372,7 +5351,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 230f0: 12001bc4 addi r8,r2,111 230f4: 11c01b84 addi r7,r2,110 230f8: 4209883a add r4,r8,r8 - 230fc: 003edd06 br 22c74 <_gp+0xfffe5e08> + 230fc: 003edd06 br 22c74 <_malloc_r+0x78> 23100: 3804d27a srli r2,r7,9 23104: 00c00104 movi r3,4 23108: 1880442e bgeu r3,r2,2321c <_malloc_r+0x620> @@ -5394,14 +5373,14 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 23148: 1986703a and r3,r3,r6 2314c: 38c0022e bgeu r7,r3,23158 <_malloc_r+0x55c> 23150: 10800217 ldw r2,8(r2) - 23154: 28bffb1e bne r5,r2,23144 <_gp+0xfffe62d8> + 23154: 28bffb1e bne r5,r2,23144 <_malloc_r+0x548> 23158: 11400317 ldw r5,12(r2) 2315c: 98c00117 ldw r3,4(r19) 23160: 81400315 stw r5,12(r16) 23164: 80800215 stw r2,8(r16) 23168: 2c000215 stw r16,8(r5) 2316c: 14000315 stw r16,12(r2) - 23170: 003ef806 br 22d54 <_gp+0xfffe5ee8> + 23170: 003ef806 br 22d54 <_malloc_r+0x158> 23174: 88c00054 ori r3,r17,1 23178: 80c00115 stw r3,4(r16) 2317c: 8463883a add r17,r16,r17 @@ -5416,18 +5395,18 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 231a0: 9009883a mov r4,r18 231a4: 002fec80 call 2fec8 <__malloc_unlock> 231a8: 80800204 addi r2,r16,8 - 231ac: 003f3c06 br 22ea0 <_gp+0xfffe6034> + 231ac: 003f3c06 br 22ea0 <_malloc_r+0x2a4> 231b0: 30c00117 ldw r3,4(r6) - 231b4: 003ee706 br 22d54 <_gp+0xfffe5ee8> + 231b4: 003ee706 br 22d54 <_malloc_r+0x158> 231b8: 5ac00044 addi r11,r11,1 231bc: 588000cc andi r2,r11,3 231c0: 31800204 addi r6,r6,8 - 231c4: 103efd1e bne r2,zero,22dbc <_gp+0xfffe5f50> + 231c4: 103efd1e bne r2,zero,22dbc <_malloc_r+0x1c0> 231c8: 00002406 br 2325c <_malloc_r+0x660> 231cc: 14000317 ldw r16,12(r2) - 231d0: 143f251e bne r2,r16,22e68 <_gp+0xfffe5ffc> + 231d0: 143f251e bne r2,r16,22e68 <_malloc_r+0x26c> 231d4: 21000084 addi r4,r4,2 - 231d8: 003ebc06 br 22ccc <_gp+0xfffe5e60> + 231d8: 003ebc06 br 22ccc <_malloc_r+0xd0> 231dc: 8085883a add r2,r16,r2 231e0: 10c00117 ldw r3,4(r2) 231e4: 81000317 ldw r4,12(r16) @@ -5439,57 +5418,57 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 231fc: 9009883a mov r4,r18 23200: 002fec80 call 2fec8 <__malloc_unlock> 23204: 80800204 addi r2,r16,8 - 23208: 003f2506 br 22ea0 <_gp+0xfffe6034> + 23208: 003f2506 br 22ea0 <_malloc_r+0x2a4> 2320c: 12001704 addi r8,r2,92 23210: 11c016c4 addi r7,r2,91 23214: 4209883a add r4,r8,r8 - 23218: 003e9606 br 22c74 <_gp+0xfffe5e08> + 23218: 003e9606 br 22c74 <_malloc_r+0x78> 2321c: 3804d1ba srli r2,r7,6 23220: 11400e44 addi r5,r2,57 23224: 10c00e04 addi r3,r2,56 23228: 294b883a add r5,r5,r5 - 2322c: 003fbc06 br 23120 <_gp+0xfffe62b4> - 23230: 84ff5926 beq r16,r19,22f98 <_gp+0xfffe612c> + 2322c: 003fbc06 br 23120 <_malloc_r+0x524> + 23230: 84ff5926 beq r16,r19,22f98 <_malloc_r+0x39c> 23234: 008000f4 movhi r2,3 23238: 108df904 addi r2,r2,14308 2323c: 14000217 ldw r16,8(r2) 23240: 00bfff04 movi r2,-4 23244: 80c00117 ldw r3,4(r16) 23248: 1886703a and r3,r3,r2 - 2324c: 003f9106 br 23094 <_gp+0xfffe6228> + 2324c: 003f9106 br 23094 <_malloc_r+0x498> 23250: 60800217 ldw r2,8(r12) 23254: 213fffc4 addi r4,r4,-1 23258: 1300651e bne r2,r12,233f0 <_malloc_r+0x7f4> 2325c: 208000cc andi r2,r4,3 23260: 633ffe04 addi r12,r12,-8 - 23264: 103ffa1e bne r2,zero,23250 <_gp+0xfffe63e4> + 23264: 103ffa1e bne r2,zero,23250 <_malloc_r+0x654> 23268: 98800117 ldw r2,4(r19) 2326c: 0146303a nor r3,zero,r5 23270: 1884703a and r2,r3,r2 23274: 98800115 stw r2,4(r19) 23278: 294b883a add r5,r5,r5 - 2327c: 117f2836 bltu r2,r5,22f20 <_gp+0xfffe60b4> - 23280: 283f2726 beq r5,zero,22f20 <_gp+0xfffe60b4> + 2327c: 117f2836 bltu r2,r5,22f20 <_malloc_r+0x324> + 23280: 283f2726 beq r5,zero,22f20 <_malloc_r+0x324> 23284: 2886703a and r3,r5,r2 23288: 5809883a mov r4,r11 - 2328c: 183ec31e bne r3,zero,22d9c <_gp+0xfffe5f30> + 2328c: 183ec31e bne r3,zero,22d9c <_malloc_r+0x1a0> 23290: 294b883a add r5,r5,r5 23294: 2886703a and r3,r5,r2 23298: 21000104 addi r4,r4,4 - 2329c: 183ffc26 beq r3,zero,23290 <_gp+0xfffe6424> - 232a0: 003ebe06 br 22d9c <_gp+0xfffe5f30> + 2329c: 183ffc26 beq r3,zero,23290 <_malloc_r+0x694> + 232a0: 003ebe06 br 22d9c <_malloc_r+0x1a0> 232a4: 00c05504 movi r3,340 232a8: 18801236 bltu r3,r2,232f4 <_malloc_r+0x6f8> 232ac: 8804d3fa srli r2,r17,15 232b0: 12001e04 addi r8,r2,120 232b4: 11c01dc4 addi r7,r2,119 232b8: 4209883a add r4,r8,r8 - 232bc: 003e6d06 br 22c74 <_gp+0xfffe5e08> + 232bc: 003e6d06 br 22c74 <_malloc_r+0x78> 232c0: 00c40004 movi r3,4096 - 232c4: 003f4606 br 22fe0 <_gp+0xfffe6174> + 232c4: 003f4606 br 22fe0 <_malloc_r+0x3e4> 232c8: 00800044 movi r2,1 232cc: a0800115 stw r2,4(r20) - 232d0: 003f7406 br 230a4 <_gp+0xfffe6238> + 232d0: 003f7406 br 230a4 <_malloc_r+0x4a8> 232d4: 1805d0ba srai r2,r3,2 232d8: 01c00044 movi r7,1 232dc: 30c00117 ldw r3,4(r6) @@ -5497,76 +5476,76 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 232e4: 2805883a mov r2,r5 232e8: 38c6b03a or r3,r7,r3 232ec: 30c00115 stw r3,4(r6) - 232f0: 003f9b06 br 23160 <_gp+0xfffe62f4> + 232f0: 003f9b06 br 23160 <_malloc_r+0x564> 232f4: 00c15504 movi r3,1364 232f8: 18801a36 bltu r3,r2,23364 <_malloc_r+0x768> 232fc: 8804d4ba srli r2,r17,18 23300: 12001f44 addi r8,r2,125 23304: 11c01f04 addi r7,r2,124 23308: 4209883a add r4,r8,r8 - 2330c: 003e5906 br 22c74 <_gp+0xfffe5e08> + 2330c: 003e5906 br 22c74 <_malloc_r+0x78> 23310: ad400404 addi r21,r21,16 - 23314: 003f1706 br 22f74 <_gp+0xfffe6108> + 23314: 003f1706 br 22f74 <_malloc_r+0x378> 23318: 00c01504 movi r3,84 2331c: 18802336 bltu r3,r2,233ac <_malloc_r+0x7b0> 23320: 3804d33a srli r2,r7,12 23324: 11401bc4 addi r5,r2,111 23328: 10c01b84 addi r3,r2,110 2332c: 294b883a add r5,r5,r5 - 23330: 003f7b06 br 23120 <_gp+0xfffe62b4> + 23330: 003f7b06 br 23120 <_malloc_r+0x524> 23334: 9c000217 ldw r16,8(r19) 23338: 00bfff04 movi r2,-4 2333c: 80c00117 ldw r3,4(r16) 23340: 1886703a and r3,r3,r2 - 23344: 003f5306 br 23094 <_gp+0xfffe6228> + 23344: 003f5306 br 23094 <_malloc_r+0x498> 23348: 3083ffcc andi r2,r6,4095 - 2334c: 103f181e bne r2,zero,22fb0 <_gp+0xfffe6144> + 2334c: 103f181e bne r2,zero,22fb0 <_malloc_r+0x3b4> 23350: 99000217 ldw r4,8(r19) 23354: b545883a add r2,r22,r21 23358: 10800054 ori r2,r2,1 2335c: 20800115 stw r2,4(r4) - 23360: 003f3e06 br 2305c <_gp+0xfffe61f0> + 23360: 003f3e06 br 2305c <_malloc_r+0x460> 23364: 01003f84 movi r4,254 23368: 02001fc4 movi r8,127 2336c: 01c01f84 movi r7,126 - 23370: 003e4006 br 22c74 <_gp+0xfffe5e08> + 23370: 003e4006 br 22c74 <_malloc_r+0x78> 23374: 008000f4 movhi r2,3 23378: 1093a004 addi r2,r2,20096 2337c: 15000015 stw r20,0(r2) - 23380: 003f1106 br 22fc8 <_gp+0xfffe615c> + 23380: 003f1106 br 22fc8 <_malloc_r+0x3cc> 23384: 00800044 movi r2,1 23388: 002b883a mov r21,zero - 2338c: 003f1f06 br 2300c <_gp+0xfffe61a0> + 2338c: 003f1f06 br 2300c <_malloc_r+0x410> 23390: 81400204 addi r5,r16,8 23394: 9009883a mov r4,r18 23398: 0027c1c0 call 27c1c <_free_r> 2339c: 008000f4 movhi r2,3 233a0: 109c6404 addi r2,r2,29072 233a4: 10c00017 ldw r3,0(r2) - 233a8: 003f2c06 br 2305c <_gp+0xfffe61f0> + 233a8: 003f2c06 br 2305c <_malloc_r+0x460> 233ac: 00c05504 movi r3,340 233b0: 18800536 bltu r3,r2,233c8 <_malloc_r+0x7cc> 233b4: 3804d3fa srli r2,r7,15 233b8: 11401e04 addi r5,r2,120 233bc: 10c01dc4 addi r3,r2,119 233c0: 294b883a add r5,r5,r5 - 233c4: 003f5606 br 23120 <_gp+0xfffe62b4> + 233c4: 003f5606 br 23120 <_malloc_r+0x524> 233c8: 00c15504 movi r3,1364 233cc: 18800536 bltu r3,r2,233e4 <_malloc_r+0x7e8> 233d0: 3804d4ba srli r2,r7,18 233d4: 11401f44 addi r5,r2,125 233d8: 10c01f04 addi r3,r2,124 233dc: 294b883a add r5,r5,r5 - 233e0: 003f4f06 br 23120 <_gp+0xfffe62b4> + 233e0: 003f4f06 br 23120 <_malloc_r+0x524> 233e4: 01403f84 movi r5,254 233e8: 00c01f84 movi r3,126 - 233ec: 003f4c06 br 23120 <_gp+0xfffe62b4> + 233ec: 003f4c06 br 23120 <_malloc_r+0x524> 233f0: 98800117 ldw r2,4(r19) - 233f4: 003fa006 br 23278 <_gp+0xfffe640c> + 233f4: 003fa006 br 23278 <_malloc_r+0x67c> 233f8: 8808d0fa srli r4,r17,3 233fc: 20800044 addi r2,r4,1 23400: 1085883a add r2,r2,r2 - 23404: 003e9006 br 22e48 <_gp+0xfffe5fdc> + 23404: 003e9006 br 22e48 <_malloc_r+0x24c> 00023408 : 23408: 20c000cc andi r3,r4,3 @@ -5585,7 +5564,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2343c: 18c00044 addi r3,r3,1 23440: 32400005 stb r9,0(r6) 23444: 1a0000cc andi r8,r3,3 - 23448: 403ff81e bne r8,zero,2342c <_gp+0xfffe65c0> + 23448: 403ff81e bne r8,zero,2342c 2344c: 010000c4 movi r4,3 23450: 21c02d2e bgeu r4,r7,23508 23454: 29003fcc andi r4,r5,255 @@ -5612,7 +5591,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 234a8: 4a400404 addi r9,r9,16 234ac: 5ac00404 addi r11,r11,16 234b0: 52800404 addi r10,r10,16 - 234b4: 413ff71e bne r8,r4,23494 <_gp+0xfffe6628> + 234b4: 413ff71e bne r8,r4,23494 234b8: 63000044 addi r12,r12,1 234bc: 6018913a slli r12,r12,4 234c0: 39c003cc andi r7,r7,15 @@ -5625,7 +5604,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 234dc: 49800015 stw r6,0(r9) 234e0: 423fff04 addi r8,r8,-4 234e4: 4a400104 addi r9,r9,4 - 234e8: 223ffc36 bltu r4,r8,234dc <_gp+0xfffe6670> + 234e8: 223ffc36 bltu r4,r8,234dc 234ec: 393fff04 addi r4,r7,-4 234f0: 2008d0ba srli r4,r4,2 234f4: 39c000cc andi r7,r7,3 @@ -5637,12 +5616,12 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2350c: 19cf883a add r7,r3,r7 23510: 19400005 stb r5,0(r3) 23514: 18c00044 addi r3,r3,1 - 23518: 38fffd1e bne r7,r3,23510 <_gp+0xfffe66a4> + 23518: 38fffd1e bne r7,r3,23510 2351c: f800283a ret 23520: f800283a ret 23524: 2007883a mov r3,r4 23528: 300f883a mov r7,r6 - 2352c: 003fc706 br 2344c <_gp+0xfffe65e0> + 2352c: 003fc706 br 2344c 00023530 <_printf_r>: 23530: defffd04 addi sp,sp,-12 @@ -5733,9 +5712,9 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 23664: f800283a ret 23668: 8009883a mov r4,r16 2366c: 0027aa80 call 27aa8 <__sinit> - 23670: 003fe906 br 23618 <_gp+0xfffe67ac> + 23670: 003fe906 br 23618 <_puts_r+0x5c> 23674: 00bfffc4 movi r2,-1 - 23678: 003ff606 br 23654 <_gp+0xfffe67e8> + 23678: 003ff606 br 23654 <_puts_r+0x98> 0002367c : 2367c: 008000f4 movhi r2,3 @@ -5771,9 +5750,9 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 236ec: dec00304 addi sp,sp,12 236f0: f800283a ret 236f4: 0027aa80 call 27aa8 <__sinit> - 236f8: 003fee06 br 236b4 <_gp+0xfffe6848> + 236f8: 003fee06 br 236b4 <__srget_r+0x24> 236fc: 00bfffc4 movi r2,-1 - 23700: 003ff706 br 236e0 <_gp+0xfffe6874> + 23700: 003ff706 br 236e0 <__srget_r+0x50> 00023704 <__srget>: 23704: 008000f4 movhi r2,3 @@ -5801,9 +5780,9 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 23754: dec00304 addi sp,sp,12 23758: f800283a ret 2375c: 80c00017 ldw r3,0(r16) - 23760: 183ff926 beq r3,zero,23748 <_gp+0xfffe68dc> + 23760: 183ff926 beq r3,zero,23748 <_sbrk_r+0x30> 23764: 88c00015 stw r3,0(r17) - 23768: 003ff706 br 23748 <_gp+0xfffe68dc> + 23768: 003ff706 br 23748 <_sbrk_r+0x30> 0002376c : 2376c: 208000cc andi r2,r4,3 @@ -5816,7 +5795,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 23788: 18001826 beq r3,zero,237ec 2378c: 10800044 addi r2,r2,1 23790: 10c000cc andi r3,r2,3 - 23794: 183ffb1e bne r3,zero,23784 <_gp+0xfffe6918> + 23794: 183ffb1e bne r3,zero,23784 23798: 10c00017 ldw r3,0(r2) 2379c: 01ffbff4 movhi r7,65279 237a0: 39ffbfc4 addi r7,r7,-257 @@ -5833,15 +5812,15 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 237cc: 00c6303a nor r3,zero,r3 237d0: 28c6703a and r3,r5,r3 237d4: 1986703a and r3,r3,r6 - 237d8: 183ff926 beq r3,zero,237c0 <_gp+0xfffe6954> + 237d8: 183ff926 beq r3,zero,237c0 237dc: 00000106 br 237e4 237e0: 10800044 addi r2,r2,1 237e4: 10c00007 ldb r3,0(r2) - 237e8: 183ffd1e bne r3,zero,237e0 <_gp+0xfffe6974> + 237e8: 183ffd1e bne r3,zero,237e0 237ec: 1105c83a sub r2,r2,r4 237f0: f800283a ret 237f4: 2005883a mov r2,r4 - 237f8: 003fe706 br 23798 <_gp+0xfffe692c> + 237f8: 003fe706 br 23798 237fc: 0005883a mov r2,zero 23800: f800283a ret @@ -5911,7 +5890,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 238fc: 10c00326 beq r2,r3,2390c <___vfprintf_internal_r+0x108> 23900: 84000044 addi r16,r16,1 23904: 80800007 ldb r2,0(r16) - 23908: 103ffc1e bne r2,zero,238fc <_gp+0xfffe6a90> + 23908: 103ffc1e bne r2,zero,238fc <___vfprintf_internal_r+0xf8> 2390c: 8563c83a sub r17,r16,r21 23910: 88000e26 beq r17,zero,2394c <___vfprintf_internal_r+0x148> 23914: d8c02017 ldw r3,128(sp) @@ -6047,7 +6026,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 23b1c: d9003115 stw r4,196(sp) 23b20: 94800114 ori r18,r18,4 23b24: ac400007 ldb r17,0(r21) - 23b28: 003f9706 br 23988 <_gp+0xfffe6b1c> + 23b28: 003f9706 br 23988 <___vfprintf_internal_r+0x184> 23b2c: 00800c04 movi r2,48 23b30: d9002d17 ldw r4,180(sp) 23b34: d9402917 ldw r5,164(sp) @@ -6082,9 +6061,9 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 23ba8: b880030b ldhu r2,12(r23) 23bac: 00c00284 movi r3,10 23bb0: 1080068c andi r2,r2,26 - 23bb4: 10ff3c1e bne r2,r3,238a8 <_gp+0xfffe6a3c> + 23bb4: 10ff3c1e bne r2,r3,238a8 <___vfprintf_internal_r+0xa4> 23bb8: b880038f ldh r2,14(r23) - 23bbc: 103f3a16 blt r2,zero,238a8 <_gp+0xfffe6a3c> + 23bbc: 103f3a16 blt r2,zero,238a8 <___vfprintf_internal_r+0xa4> 23bc0: d9c02d17 ldw r7,180(sp) 23bc4: d9002c17 ldw r4,176(sp) 23bc8: a80d883a mov r6,r21 @@ -6097,7 +6076,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 23be4: 002a7d00 call 2a7d0 <__sprint_r> 23be8: 1000081e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> 23bec: da000404 addi r8,sp,16 - 23bf0: 003f5306 br 23940 <_gp+0xfffe6ad4> + 23bf0: 003f5306 br 23940 <___vfprintf_internal_r+0x13c> 23bf4: d8802017 ldw r2,128(sp) 23bf8: 10000426 beq r2,zero,23c0c <___vfprintf_internal_r+0x408> 23bfc: d9002c17 ldw r4,176(sp) @@ -6122,17 +6101,17 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 23c48: f800283a ret 23c4c: d9002c17 ldw r4,176(sp) 23c50: 0027aa80 call 27aa8 <__sinit> - 23c54: 003f0406 br 23868 <_gp+0xfffe69fc> + 23c54: 003f0406 br 23868 <___vfprintf_internal_r+0x64> 23c58: d8802d17 ldw r2,180(sp) 23c5c: d9002d17 ldw r4,180(sp) 23c60: 10800017 ldw r2,0(r2) 23c64: d8803115 stw r2,196(sp) 23c68: 20800104 addi r2,r4,4 23c6c: d9003117 ldw r4,196(sp) - 23c70: 203fa716 blt r4,zero,23b10 <_gp+0xfffe6ca4> + 23c70: 203fa716 blt r4,zero,23b10 <___vfprintf_internal_r+0x30c> 23c74: d8802d15 stw r2,180(sp) 23c78: ac400007 ldb r17,0(r21) - 23c7c: 003f4206 br 23988 <_gp+0xfffe6b1c> + 23c7c: 003f4206 br 23988 <___vfprintf_internal_r+0x184> 23c80: ac400007 ldb r17,0(r21) 23c84: aac00044 addi r11,r21,1 23c88: 8a872826 beq r17,r10,2592c <___vfprintf_internal_r+0x2128> @@ -6145,13 +6124,13 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 23ca4: a817883a mov r11,r21 23ca8: 2089883a add r4,r4,r2 23cac: 88bff404 addi r2,r17,-48 - 23cb0: 30bff92e bgeu r6,r2,23c98 <_gp+0xfffe6e2c> + 23cb0: 30bff92e bgeu r6,r2,23c98 <___vfprintf_internal_r+0x494> 23cb4: 2005c916 blt r4,zero,253dc <___vfprintf_internal_r+0x1bd8> 23cb8: d9002915 stw r4,164(sp) - 23cbc: 003f3306 br 2398c <_gp+0xfffe6b20> + 23cbc: 003f3306 br 2398c <___vfprintf_internal_r+0x188> 23cc0: 94802014 ori r18,r18,128 23cc4: ac400007 ldb r17,0(r21) - 23cc8: 003f2f06 br 23988 <_gp+0xfffe6b1c> + 23cc8: 003f2f06 br 23988 <___vfprintf_internal_r+0x184> 23ccc: a809883a mov r4,r21 23cd0: d8003115 stw zero,196(sp) 23cd4: 88bff404 addi r2,r17,-48 @@ -6162,9 +6141,9 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 23ce8: a809883a mov r4,r21 23cec: 12d7883a add r11,r2,r11 23cf0: 88bff404 addi r2,r17,-48 - 23cf4: 30bff92e bgeu r6,r2,23cdc <_gp+0xfffe6e70> + 23cf4: 30bff92e bgeu r6,r2,23cdc <___vfprintf_internal_r+0x4d8> 23cf8: dac03115 stw r11,196(sp) - 23cfc: 003f2306 br 2398c <_gp+0xfffe6b20> + 23cfc: 003f2306 br 2398c <___vfprintf_internal_r+0x188> 23d00: 18c03fcc andi r3,r3,255 23d04: 18072b1e bne r3,zero,259b4 <___vfprintf_internal_r+0x21b0> 23d08: 94800414 ori r18,r18,16 @@ -6205,7 +6184,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 23d94: 1027883a mov r19,r2 23d98: 10c4b03a or r2,r2,r3 23d9c: 1823883a mov r17,r3 - 23da0: 103fef1e bne r2,zero,23d60 <_gp+0xfffe6ef4> + 23da0: 103fef1e bne r2,zero,23d60 <___vfprintf_internal_r+0x55c> 23da4: d8c02817 ldw r3,160(sp) 23da8: dc402a17 ldw r17,168(sp) 23dac: b011883a mov r8,r22 @@ -6254,7 +6233,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 23e58: 00003706 br 23f38 <___vfprintf_internal_r+0x734> 23e5c: 94800214 ori r18,r18,8 23e60: ac400007 ldb r17,0(r21) - 23e64: 003ec806 br 23988 <_gp+0xfffe6b1c> + 23e64: 003ec806 br 23988 <___vfprintf_internal_r+0x184> 23e68: 18c03fcc andi r3,r3,255 23e6c: 1806db1e bne r3,zero,259dc <___vfprintf_internal_r+0x21d8> 23e70: 94800414 ori r18,r18,16 @@ -6287,7 +6266,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 23edc: 20e6b03a or r19,r4,r3 23ee0: 80800005 stb r2,0(r16) 23ee4: 9d86b03a or r3,r19,r22 - 23ee8: 183ff61e bne r3,zero,23ec4 <_gp+0xfffe7058> + 23ee8: 183ff61e bne r3,zero,23ec4 <___vfprintf_internal_r+0x6c0> 23eec: 90c0004c andi r3,r18,1 23ef0: 18013b26 beq r3,zero,243e0 <___vfprintf_internal_r+0xbdc> 23ef4: 10803fcc andi r2,r2,255 @@ -6353,17 +6332,17 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 23fe4: 45800115 stw r22,4(r8) 23fe8: d8c02015 stw r3,128(sp) 23fec: d8801f15 stw r2,124(sp) - 23ff0: e0bff40e bge fp,r2,23fc4 <_gp+0xfffe7158> + 23ff0: e0bff40e bge fp,r2,23fc4 <___vfprintf_internal_r+0x7c0> 23ff4: d9801e04 addi r6,sp,120 23ff8: b80b883a mov r5,r23 23ffc: 8009883a mov r4,r16 24000: 002a7d00 call 2a7d0 <__sprint_r> - 24004: 103f011e bne r2,zero,23c0c <_gp+0xfffe6da0> + 24004: 103f011e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> 24008: 8c7ffc04 addi r17,r17,-16 2400c: d8c02017 ldw r3,128(sp) 24010: d8801f17 ldw r2,124(sp) 24014: da000404 addi r8,sp,16 - 24018: b47fed16 blt r22,r17,23fd0 <_gp+0xfffe7164> + 24018: b47fed16 blt r22,r17,23fd0 <___vfprintf_internal_r+0x7cc> 2401c: 9021883a mov r16,r18 24020: 9825883a mov r18,r19 24024: 8827883a mov r19,r17 @@ -6436,17 +6415,17 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 24130: 47000115 stw fp,4(r8) 24134: d8c02015 stw r3,128(sp) 24138: d8801f15 stw r2,124(sp) - 2413c: 98bff60e bge r19,r2,24118 <_gp+0xfffe72ac> + 2413c: 98bff60e bge r19,r2,24118 <___vfprintf_internal_r+0x914> 24140: d9801e04 addi r6,sp,120 24144: b80b883a mov r5,r23 24148: 8009883a mov r4,r16 2414c: 002a7d00 call 2a7d0 <__sprint_r> - 24150: 103eae1e bne r2,zero,23c0c <_gp+0xfffe6da0> + 24150: 103eae1e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> 24154: 8c7ffc04 addi r17,r17,-16 24158: d8c02017 ldw r3,128(sp) 2415c: d8801f17 ldw r2,124(sp) 24160: da000404 addi r8,sp,16 - 24164: e47fef16 blt fp,r17,24124 <_gp+0xfffe72b8> + 24164: e47fef16 blt fp,r17,24124 <___vfprintf_internal_r+0x920> 24168: 9021883a mov r16,r18 2416c: a825883a mov r18,r21 24170: b02b883a mov r21,r22 @@ -6501,17 +6480,17 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 24234: 44400115 stw r17,4(r8) 24238: d8c02015 stw r3,128(sp) 2423c: d8801f15 stw r2,124(sp) - 24240: 90bff40e bge r18,r2,24214 <_gp+0xfffe73a8> + 24240: 90bff40e bge r18,r2,24214 <___vfprintf_internal_r+0xa10> 24244: d9801e04 addi r6,sp,120 24248: b80b883a mov r5,r23 2424c: 9809883a mov r4,r19 24250: 002a7d00 call 2a7d0 <__sprint_r> - 24254: 103e6d1e bne r2,zero,23c0c <_gp+0xfffe6da0> + 24254: 103e6d1e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> 24258: 843ffc04 addi r16,r16,-16 2425c: d8c02017 ldw r3,128(sp) 24260: d8801f17 ldw r2,124(sp) 24264: da000404 addi r8,sp,16 - 24268: 8c3fed16 blt r17,r16,24220 <_gp+0xfffe73b4> + 24268: 8c3fed16 blt r17,r16,24220 <___vfprintf_internal_r+0xa1c> 2426c: d9403517 ldw r5,212(sp) 24270: 1c07883a add r3,r3,r16 24274: 10800044 addi r2,r2,1 @@ -6525,7 +6504,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 24294: d9801e04 addi r6,sp,120 24298: b80b883a mov r5,r23 2429c: 002a7d00 call 2a7d0 <__sprint_r> - 242a0: 103e5a1e bne r2,zero,23c0c <_gp+0xfffe6da0> + 242a0: 103e5a1e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> 242a4: d8c02017 ldw r3,128(sp) 242a8: d8803117 ldw r2,196(sp) 242ac: d9002a17 ldw r4,168(sp) @@ -6538,9 +6517,9 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 242c8: a8800007 ldb r2,0(r21) 242cc: d8001f15 stw zero,124(sp) 242d0: da000404 addi r8,sp,16 - 242d4: 103d851e bne r2,zero,238ec <_gp+0xfffe6a80> + 242d4: 103d851e bne r2,zero,238ec <___vfprintf_internal_r+0xe8> 242d8: a821883a mov r16,r21 - 242dc: 003d9b06 br 2394c <_gp+0xfffe6ae0> + 242dc: 003d9b06 br 2394c <___vfprintf_internal_r+0x148> 242e0: 18c03fcc andi r3,r3,255 242e4: 1805c11e bne r3,zero,259ec <___vfprintf_internal_r+0x21e8> 242e8: 94800414 ori r18,r18,16 @@ -6558,13 +6537,13 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 24318: d8c02d15 stw r3,180(sp) 2431c: 9124703a and r18,r18,r4 24320: 0039883a mov fp,zero - 24324: 103e891e bne r2,zero,23d4c <_gp+0xfffe6ee0> + 24324: 103e891e bne r2,zero,23d4c <___vfprintf_internal_r+0x548> 24328: d9002917 ldw r4,164(sp) 2432c: 2002c11e bne r4,zero,24e34 <___vfprintf_internal_r+0x1630> 24330: d8002915 stw zero,164(sp) 24334: d8002e15 stw zero,184(sp) 24338: dc001e04 addi r16,sp,120 - 2433c: 003ef806 br 23f20 <_gp+0xfffe70b4> + 2433c: 003ef806 br 23f20 <___vfprintf_internal_r+0x71c> 24340: 18c03fcc andi r3,r3,255 24344: 18059d1e bne r3,zero,259bc <___vfprintf_internal_r+0x21b8> 24348: 014000f4 movhi r5,3 @@ -6604,22 +6583,22 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 243d0: 1ce6b03a or r19,r3,r19 243d4: 80800005 stb r2,0(r16) 243d8: 9d84b03a or r2,r19,r22 - 243dc: 103ff51e bne r2,zero,243b4 <_gp+0xfffe7548> + 243dc: 103ff51e bne r2,zero,243b4 <___vfprintf_internal_r+0xbb0> 243e0: d8c02817 ldw r3,160(sp) 243e4: 1c07c83a sub r3,r3,r16 243e8: d8c02e15 stw r3,184(sp) - 243ec: 003ecc06 br 23f20 <_gp+0xfffe70b4> + 243ec: 003ecc06 br 23f20 <___vfprintf_internal_r+0x71c> 243f0: 18c03fcc andi r3,r3,255 - 243f4: 183e9f26 beq r3,zero,23e74 <_gp+0xfffe7008> + 243f4: 183e9f26 beq r3,zero,23e74 <___vfprintf_internal_r+0x670> 243f8: d9c02785 stb r7,158(sp) - 243fc: 003e9d06 br 23e74 <_gp+0xfffe7008> + 243fc: 003e9d06 br 23e74 <___vfprintf_internal_r+0x670> 24400: 00c00044 movi r3,1 24404: 01c00ac4 movi r7,43 24408: ac400007 ldb r17,0(r21) - 2440c: 003d5e06 br 23988 <_gp+0xfffe6b1c> + 2440c: 003d5e06 br 23988 <___vfprintf_internal_r+0x184> 24410: 94800814 ori r18,r18,32 24414: ac400007 ldb r17,0(r21) - 24418: 003d5b06 br 23988 <_gp+0xfffe6b1c> + 24418: 003d5b06 br 23988 <___vfprintf_internal_r+0x184> 2441c: d8c02d17 ldw r3,180(sp) 24420: d8002785 stb zero,158(sp) 24424: 1c000017 ldw r16,0(r3) @@ -6642,18 +6621,18 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 24468: dcc02d15 stw r19,180(sp) 2446c: d8002915 stw zero,164(sp) 24470: d8003215 stw zero,200(sp) - 24474: 003eb006 br 23f38 <_gp+0xfffe70cc> + 24474: 003eb006 br 23f38 <___vfprintf_internal_r+0x734> 24478: 18c03fcc andi r3,r3,255 - 2447c: 183f9b26 beq r3,zero,242ec <_gp+0xfffe7480> + 2447c: 183f9b26 beq r3,zero,242ec <___vfprintf_internal_r+0xae8> 24480: d9c02785 stb r7,158(sp) - 24484: 003f9906 br 242ec <_gp+0xfffe7480> + 24484: 003f9906 br 242ec <___vfprintf_internal_r+0xae8> 24488: 18c03fcc andi r3,r3,255 2448c: 1805551e bne r3,zero,259e4 <___vfprintf_internal_r+0x21e0> 24490: 014000f4 movhi r5,3 24494: 294a5304 addi r5,r5,10572 24498: d9403915 stw r5,228(sp) 2449c: 9080080c andi r2,r18,32 - 244a0: 103fae1e bne r2,zero,2435c <_gp+0xfffe74f0> + 244a0: 103fae1e bne r2,zero,2435c <___vfprintf_internal_r+0xb58> 244a4: 9080040c andi r2,r18,16 244a8: 1002de26 beq r2,zero,25024 <___vfprintf_internal_r+0x1820> 244ac: d8c02d17 ldw r3,180(sp) @@ -6661,7 +6640,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 244b4: 1cc00017 ldw r19,0(r3) 244b8: 18c00104 addi r3,r3,4 244bc: d8c02d15 stw r3,180(sp) - 244c0: 003fab06 br 24370 <_gp+0xfffe7504> + 244c0: 003fab06 br 24370 <___vfprintf_internal_r+0xb6c> 244c4: 38803fcc andi r2,r7,255 244c8: 1080201c xori r2,r2,128 244cc: 10bfe004 addi r2,r2,-128 @@ -6669,21 +6648,21 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 244d4: 00c00044 movi r3,1 244d8: 01c00804 movi r7,32 244dc: ac400007 ldb r17,0(r21) - 244e0: 003d2906 br 23988 <_gp+0xfffe6b1c> + 244e0: 003d2906 br 23988 <___vfprintf_internal_r+0x184> 244e4: 94800054 ori r18,r18,1 244e8: ac400007 ldb r17,0(r21) - 244ec: 003d2606 br 23988 <_gp+0xfffe6b1c> + 244ec: 003d2606 br 23988 <___vfprintf_internal_r+0x184> 244f0: 18c03fcc andi r3,r3,255 - 244f4: 183e0526 beq r3,zero,23d0c <_gp+0xfffe6ea0> + 244f4: 183e0526 beq r3,zero,23d0c <___vfprintf_internal_r+0x508> 244f8: d9c02785 stb r7,158(sp) - 244fc: 003e0306 br 23d0c <_gp+0xfffe6ea0> + 244fc: 003e0306 br 23d0c <___vfprintf_internal_r+0x508> 24500: 94801014 ori r18,r18,64 24504: ac400007 ldb r17,0(r21) - 24508: 003d1f06 br 23988 <_gp+0xfffe6b1c> + 24508: 003d1f06 br 23988 <___vfprintf_internal_r+0x184> 2450c: ac400007 ldb r17,0(r21) 24510: 8a438726 beq r17,r9,25330 <___vfprintf_internal_r+0x1b2c> 24514: 94800414 ori r18,r18,16 - 24518: 003d1b06 br 23988 <_gp+0xfffe6b1c> + 24518: 003d1b06 br 23988 <___vfprintf_internal_r+0x184> 2451c: 18c03fcc andi r3,r3,255 24520: 1805341e bne r3,zero,259f4 <___vfprintf_internal_r+0x21f0> 24524: 9080080c andi r2,r18,32 @@ -6696,7 +6675,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 24540: d9402d15 stw r5,180(sp) 24544: 11000015 stw r4,0(r2) 24548: 10c00115 stw r3,4(r2) - 2454c: 003ce506 br 238e4 <_gp+0xfffe6a78> + 2454c: 003ce506 br 238e4 <___vfprintf_internal_r+0xe0> 24550: d8c02d17 ldw r3,180(sp) 24554: d9002d17 ldw r4,180(sp) 24558: d8002785 stb zero,158(sp) @@ -6711,21 +6690,21 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2457c: d8003215 stw zero,200(sp) 24580: dc001404 addi r16,sp,80 24584: 0039883a mov fp,zero - 24588: 003e7206 br 23f54 <_gp+0xfffe70e8> + 24588: 003e7206 br 23f54 <___vfprintf_internal_r+0x750> 2458c: 010000f4 movhi r4,3 24590: 210a5304 addi r4,r4,10572 24594: 0039883a mov fp,zero 24598: d9003915 stw r4,228(sp) 2459c: 04401e04 movi r17,120 - 245a0: 003f8206 br 243ac <_gp+0xfffe7540> + 245a0: 003f8206 br 243ac <___vfprintf_internal_r+0xba8> 245a4: 18c03fcc andi r3,r3,255 245a8: 1805061e bne r3,zero,259c4 <___vfprintf_internal_r+0x21c0> - 245ac: 883d9126 beq r17,zero,23bf4 <_gp+0xfffe6d88> + 245ac: 883d9126 beq r17,zero,23bf4 <___vfprintf_internal_r+0x3f0> 245b0: 00c00044 movi r3,1 245b4: d8c02a15 stw r3,168(sp) 245b8: dc401405 stb r17,80(sp) 245bc: d8002785 stb zero,158(sp) - 245c0: 003fec06 br 24574 <_gp+0xfffe7708> + 245c0: 003fec06 br 24574 <___vfprintf_internal_r+0xd70> 245c4: 014000f4 movhi r5,3 245c8: 294a5304 addi r5,r5,10572 245cc: d9403915 stw r5,228(sp) @@ -6740,10 +6719,10 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 245f0: 00c00044 movi r3,1 245f4: 10c20f26 beq r2,r3,24e34 <___vfprintf_internal_r+0x1630> 245f8: 00c00084 movi r3,2 - 245fc: 10fd6326 beq r2,r3,23b8c <_gp+0xfffe6d20> - 24600: 003e2d06 br 23eb8 <_gp+0xfffe704c> + 245fc: 10fd6326 beq r2,r3,23b8c <___vfprintf_internal_r+0x388> + 24600: 003e2d06 br 23eb8 <___vfprintf_internal_r+0x6b4> 24604: d8c02017 ldw r3,128(sp) - 24608: 003e9306 br 24058 <_gp+0xfffe71ec> + 24608: 003e9306 br 24058 <___vfprintf_internal_r+0x854> 2460c: 00801944 movi r2,101 24610: 14407e0e bge r2,r17,2480c <___vfprintf_internal_r+0x1008> 24614: d9003617 ldw r4,216(sp) @@ -6773,7 +6752,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 24674: d9403317 ldw r5,204(sp) 24678: 11400216 blt r2,r5,24684 <___vfprintf_internal_r+0xe80> 2467c: 9080004c andi r2,r18,1 - 24680: 103ed526 beq r2,zero,241d8 <_gp+0xfffe736c> + 24680: 103ed526 beq r2,zero,241d8 <___vfprintf_internal_r+0x9d4> 24684: d8803717 ldw r2,220(sp) 24688: d9003417 ldw r4,208(sp) 2468c: d9403717 ldw r5,220(sp) @@ -6789,7 +6768,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 246b4: 42000204 addi r8,r8,8 246b8: d8803317 ldw r2,204(sp) 246bc: 143fffc4 addi r16,r2,-1 - 246c0: 043ec50e bge zero,r16,241d8 <_gp+0xfffe736c> + 246c0: 043ec50e bge zero,r16,241d8 <___vfprintf_internal_r+0x9d4> 246c4: 04400404 movi r17,16 246c8: d8801f17 ldw r2,124(sp) 246cc: 8c00880e bge r17,r16,248f0 <___vfprintf_internal_r+0x10ec> @@ -6808,20 +6787,20 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 24700: 44400115 stw r17,4(r8) 24704: d8c02015 stw r3,128(sp) 24708: d8801f15 stw r2,124(sp) - 2470c: b0bff60e bge r22,r2,246e8 <_gp+0xfffe787c> + 2470c: b0bff60e bge r22,r2,246e8 <___vfprintf_internal_r+0xee4> 24710: d9801e04 addi r6,sp,120 24714: b80b883a mov r5,r23 24718: 9809883a mov r4,r19 2471c: 002a7d00 call 2a7d0 <__sprint_r> - 24720: 103d3a1e bne r2,zero,23c0c <_gp+0xfffe6da0> + 24720: 103d3a1e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> 24724: d8c02017 ldw r3,128(sp) 24728: d8801f17 ldw r2,124(sp) 2472c: da000404 addi r8,sp,16 - 24730: 003fee06 br 246ec <_gp+0xfffe7880> + 24730: 003fee06 br 246ec <___vfprintf_internal_r+0xee8> 24734: d9403117 ldw r5,196(sp) 24738: d8802a17 ldw r2,168(sp) 2473c: 28adc83a sub r22,r5,r2 - 24740: 05be630e bge zero,r22,240d0 <_gp+0xfffe7264> + 24740: 05be630e bge zero,r22,240d0 <___vfprintf_internal_r+0x8cc> 24744: 07000404 movi fp,16 24748: d8801f17 ldw r2,124(sp) 2474c: e5838f0e bge fp,r22,2558c <___vfprintf_internal_r+0x1d88> @@ -6845,17 +6824,17 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 24794: 47000115 stw fp,4(r8) 24798: d8c02015 stw r3,128(sp) 2479c: d8801f15 stw r2,124(sp) - 247a0: 98bff60e bge r19,r2,2477c <_gp+0xfffe7910> + 247a0: 98bff60e bge r19,r2,2477c <___vfprintf_internal_r+0xf78> 247a4: d9801e04 addi r6,sp,120 247a8: b80b883a mov r5,r23 247ac: 8009883a mov r4,r16 247b0: 002a7d00 call 2a7d0 <__sprint_r> - 247b4: 103d151e bne r2,zero,23c0c <_gp+0xfffe6da0> + 247b4: 103d151e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> 247b8: 8c7ffc04 addi r17,r17,-16 247bc: d8c02017 ldw r3,128(sp) 247c0: d8801f17 ldw r2,124(sp) 247c4: da000404 addi r8,sp,16 - 247c8: e47fef16 blt fp,r17,24788 <_gp+0xfffe791c> + 247c8: e47fef16 blt fp,r17,24788 <___vfprintf_internal_r+0xf84> 247cc: 9021883a mov r16,r18 247d0: a825883a mov r18,r21 247d4: b02b883a mov r21,r22 @@ -6871,7 +6850,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 247fc: 010001c4 movi r4,7 24800: 20818e16 blt r4,r2,24e3c <___vfprintf_internal_r+0x1638> 24804: 42000204 addi r8,r8,8 - 24808: 003e3106 br 240d0 <_gp+0xfffe7264> + 24808: 003e3106 br 240d0 <___vfprintf_internal_r+0x8cc> 2480c: d9403317 ldw r5,204(sp) 24810: 00800044 movi r2,1 24814: 18c00044 addi r3,r3,1 @@ -6928,7 +6907,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 248e0: 008001c4 movi r2,7 248e4: 14400e16 blt r2,r17,24920 <___vfprintf_internal_r+0x111c> 248e8: b2000204 addi r8,r22,8 - 248ec: 003e3a06 br 241d8 <_gp+0xfffe736c> + 248ec: 003e3a06 br 241d8 <___vfprintf_internal_r+0x9d4> 248f0: 010000f4 movhi r4,3 248f4: 210a5a84 addi r4,r4,10602 248f8: d9002b15 stw r4,172(sp) @@ -6940,54 +6919,54 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 24910: d8c02015 stw r3,128(sp) 24914: d8801f15 stw r2,124(sp) 24918: 010001c4 movi r4,7 - 2491c: 20be2d0e bge r4,r2,241d4 <_gp+0xfffe7368> + 2491c: 20be2d0e bge r4,r2,241d4 <___vfprintf_internal_r+0x9d0> 24920: d9002c17 ldw r4,176(sp) 24924: d9801e04 addi r6,sp,120 24928: b80b883a mov r5,r23 2492c: 002a7d00 call 2a7d0 <__sprint_r> - 24930: 103cb61e bne r2,zero,23c0c <_gp+0xfffe6da0> + 24930: 103cb61e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> 24934: d8c02017 ldw r3,128(sp) 24938: da000404 addi r8,sp,16 - 2493c: 003e2606 br 241d8 <_gp+0xfffe736c> + 2493c: 003e2606 br 241d8 <___vfprintf_internal_r+0x9d4> 24940: d9002c17 ldw r4,176(sp) 24944: d9801e04 addi r6,sp,120 24948: b80b883a mov r5,r23 2494c: 002a7d00 call 2a7d0 <__sprint_r> - 24950: 103e5d26 beq r2,zero,242c8 <_gp+0xfffe745c> - 24954: 003cad06 br 23c0c <_gp+0xfffe6da0> + 24950: 103e5d26 beq r2,zero,242c8 <___vfprintf_internal_r+0xac4> + 24954: 003cad06 br 23c0c <___vfprintf_internal_r+0x408> 24958: d9002c17 ldw r4,176(sp) 2495c: d9801e04 addi r6,sp,120 24960: b80b883a mov r5,r23 24964: 002a7d00 call 2a7d0 <__sprint_r> - 24968: 103ca81e bne r2,zero,23c0c <_gp+0xfffe6da0> + 24968: 103ca81e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> 2496c: d8c02017 ldw r3,128(sp) 24970: da000404 addi r8,sp,16 - 24974: 003e0b06 br 241a4 <_gp+0xfffe7338> + 24974: 003e0b06 br 241a4 <___vfprintf_internal_r+0x9a0> 24978: d9002c17 ldw r4,176(sp) 2497c: d9801e04 addi r6,sp,120 24980: b80b883a mov r5,r23 24984: 002a7d00 call 2a7d0 <__sprint_r> - 24988: 103ca01e bne r2,zero,23c0c <_gp+0xfffe6da0> + 24988: 103ca01e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> 2498c: d8c02017 ldw r3,128(sp) 24990: da000404 addi r8,sp,16 - 24994: 003dbd06 br 2408c <_gp+0xfffe7220> + 24994: 003dbd06 br 2408c <___vfprintf_internal_r+0x888> 24998: d9002c17 ldw r4,176(sp) 2499c: d9801e04 addi r6,sp,120 249a0: b80b883a mov r5,r23 249a4: 002a7d00 call 2a7d0 <__sprint_r> - 249a8: 103c981e bne r2,zero,23c0c <_gp+0xfffe6da0> + 249a8: 103c981e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> 249ac: d8c02017 ldw r3,128(sp) 249b0: da000404 addi r8,sp,16 - 249b4: 003dc306 br 240c4 <_gp+0xfffe7258> + 249b4: 003dc306 br 240c4 <___vfprintf_internal_r+0x8c0> 249b8: d8802917 ldw r2,164(sp) 249bc: d8002785 stb zero,158(sp) - 249c0: 103f0616 blt r2,zero,245dc <_gp+0xfffe7770> + 249c0: 103f0616 blt r2,zero,245dc <___vfprintf_internal_r+0xdd8> 249c4: 00ffdfc4 movi r3,-129 249c8: 9d84b03a or r2,r19,r22 249cc: 90e4703a and r18,r18,r3 - 249d0: 103c6b26 beq r2,zero,23b80 <_gp+0xfffe6d14> + 249d0: 103c6b26 beq r2,zero,23b80 <___vfprintf_internal_r+0x37c> 249d4: 0039883a mov fp,zero - 249d8: 003e7406 br 243ac <_gp+0xfffe7540> + 249d8: 003e7406 br 243ac <___vfprintf_internal_r+0xba8> 249dc: 9080040c andi r2,r18,16 249e0: 1001b326 beq r2,zero,250b0 <___vfprintf_internal_r+0x18ac> 249e4: d9002d17 ldw r4,180(sp) @@ -7000,9 +6979,9 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 24a00: 00ffdfc4 movi r3,-129 24a04: d8802d15 stw r2,180(sp) 24a08: 90e4703a and r18,r18,r3 - 24a0c: 983d2726 beq r19,zero,23eac <_gp+0xfffe7040> + 24a0c: 983d2726 beq r19,zero,23eac <___vfprintf_internal_r+0x6a8> 24a10: 0039883a mov fp,zero - 24a14: 003d2a06 br 23ec0 <_gp+0xfffe7054> + 24a14: 003d2a06 br 23ec0 <___vfprintf_internal_r+0x6bc> 24a18: dc402617 ldw r17,152(sp) 24a1c: 0441d30e bge zero,r17,2516c <___vfprintf_internal_r+0x1968> 24a20: dc403217 ldw r17,200(sp) @@ -7042,25 +7021,25 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 24aa8: 45800115 stw r22,4(r8) 24aac: d8c02015 stw r3,128(sp) 24ab0: d8801f15 stw r2,124(sp) - 24ab4: e0bff60e bge fp,r2,24a90 <_gp+0xfffe7c24> + 24ab4: e0bff60e bge fp,r2,24a90 <___vfprintf_internal_r+0x128c> 24ab8: d9801e04 addi r6,sp,120 24abc: b80b883a mov r5,r23 24ac0: 9809883a mov r4,r19 24ac4: 002a7d00 call 2a7d0 <__sprint_r> - 24ac8: 103c501e bne r2,zero,23c0c <_gp+0xfffe6da0> + 24ac8: 103c501e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> 24acc: d8c02017 ldw r3,128(sp) 24ad0: d8801f17 ldw r2,124(sp) 24ad4: da000404 addi r8,sp,16 - 24ad8: 003fee06 br 24a94 <_gp+0xfffe7c28> + 24ad8: 003fee06 br 24a94 <___vfprintf_internal_r+0x1290> 24adc: d9002c17 ldw r4,176(sp) 24ae0: d9801e04 addi r6,sp,120 24ae4: b80b883a mov r5,r23 24ae8: 002a7d00 call 2a7d0 <__sprint_r> - 24aec: 103c471e bne r2,zero,23c0c <_gp+0xfffe6da0> + 24aec: 103c471e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> 24af0: d8c02017 ldw r3,128(sp) 24af4: df002787 ldb fp,158(sp) 24af8: da000404 addi r8,sp,16 - 24afc: 003d5606 br 24058 <_gp+0xfffe71ec> + 24afc: 003d5606 br 24058 <___vfprintf_internal_r+0x854> 24b00: 9080040c andi r2,r18,16 24b04: 10016126 beq r2,zero,2508c <___vfprintf_internal_r+0x1888> 24b08: d8802d17 ldw r2,180(sp) @@ -7069,7 +7048,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 24b14: d8802d15 stw r2,180(sp) 24b18: 982dd7fa srai r22,r19,31 24b1c: b005883a mov r2,r22 - 24b20: 003c8206 br 23d2c <_gp+0xfffe6ec0> + 24b20: 003c8206 br 23d2c <___vfprintf_internal_r+0x528> 24b24: 9080040c andi r2,r18,16 24b28: 10003526 beq r2,zero,24c00 <___vfprintf_internal_r+0x13fc> 24b2c: d9402d17 ldw r5,180(sp) @@ -7083,19 +7062,19 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 24b4c: d8802d15 stw r2,180(sp) 24b50: 90e4703a and r18,r18,r3 24b54: 0039883a mov fp,zero - 24b58: 983df326 beq r19,zero,24328 <_gp+0xfffe74bc> + 24b58: 983df326 beq r19,zero,24328 <___vfprintf_internal_r+0xb24> 24b5c: 00800244 movi r2,9 - 24b60: 14fc7b36 bltu r2,r19,23d50 <_gp+0xfffe6ee4> + 24b60: 14fc7b36 bltu r2,r19,23d50 <___vfprintf_internal_r+0x54c> 24b64: d8c02817 ldw r3,160(sp) 24b68: dc001dc4 addi r16,sp,119 24b6c: 9cc00c04 addi r19,r19,48 24b70: 1c07c83a sub r3,r3,r16 24b74: dcc01dc5 stb r19,119(sp) 24b78: d8c02e15 stw r3,184(sp) - 24b7c: 003ce806 br 23f20 <_gp+0xfffe70b4> + 24b7c: 003ce806 br 23f20 <___vfprintf_internal_r+0x71c> 24b80: d8803317 ldw r2,204(sp) 24b84: 143fffc4 addi r16,r2,-1 - 24b88: 043f4d0e bge zero,r16,248c0 <_gp+0xfffe7a54> + 24b88: 043f4d0e bge zero,r16,248c0 <___vfprintf_internal_r+0x10bc> 24b8c: 07000404 movi fp,16 24b90: e400810e bge fp,r16,24d98 <___vfprintf_internal_r+0x1594> 24b94: 014000f4 movhi r5,3 @@ -7113,18 +7092,18 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 24bc4: b7000115 stw fp,4(r22) 24bc8: d8c02015 stw r3,128(sp) 24bcc: dc401f15 stw r17,124(sp) - 24bd0: 3c7ff60e bge r7,r17,24bac <_gp+0xfffe7d40> + 24bd0: 3c7ff60e bge r7,r17,24bac <___vfprintf_internal_r+0x13a8> 24bd4: d9801e04 addi r6,sp,120 24bd8: b80b883a mov r5,r23 24bdc: 9809883a mov r4,r19 24be0: d9c03c15 stw r7,240(sp) 24be4: 002a7d00 call 2a7d0 <__sprint_r> 24be8: d9c03c17 ldw r7,240(sp) - 24bec: 103c071e bne r2,zero,23c0c <_gp+0xfffe6da0> + 24bec: 103c071e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> 24bf0: d8c02017 ldw r3,128(sp) 24bf4: dc401f17 ldw r17,124(sp) 24bf8: dd800404 addi r22,sp,16 - 24bfc: 003fec06 br 24bb0 <_gp+0xfffe7d44> + 24bfc: 003fec06 br 24bb0 <___vfprintf_internal_r+0x13ac> 24c00: 9080100c andi r2,r18,64 24c04: d8002785 stb zero,158(sp) 24c08: 10010e26 beq r2,zero,25044 <___vfprintf_internal_r+0x1840> @@ -7133,18 +7112,18 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 24c14: 002d883a mov r22,zero 24c18: 20800104 addi r2,r4,4 24c1c: 24c0000b ldhu r19,0(r4) - 24c20: 283fc90e bge r5,zero,24b48 <_gp+0xfffe7cdc> + 24c20: 283fc90e bge r5,zero,24b48 <___vfprintf_internal_r+0x1344> 24c24: d8802d15 stw r2,180(sp) 24c28: 0039883a mov fp,zero 24c2c: 9d84b03a or r2,r19,r22 - 24c30: 103c461e bne r2,zero,23d4c <_gp+0xfffe6ee0> + 24c30: 103c461e bne r2,zero,23d4c <___vfprintf_internal_r+0x548> 24c34: 00800044 movi r2,1 - 24c38: 003e6c06 br 245ec <_gp+0xfffe7780> + 24c38: 003e6c06 br 245ec <___vfprintf_internal_r+0xde8> 24c3c: d9002c17 ldw r4,176(sp) 24c40: d9801e04 addi r6,sp,120 24c44: b80b883a mov r5,r23 24c48: 002a7d00 call 2a7d0 <__sprint_r> - 24c4c: 103bef1e bne r2,zero,23c0c <_gp+0xfffe6da0> + 24c4c: 103bef1e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> 24c50: d8c02017 ldw r3,128(sp) 24c54: da000404 addi r8,sp,16 24c58: d9003217 ldw r4,200(sp) @@ -7186,10 +7165,10 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 24ce8: 42000204 addi r8,r8,8 24cec: 8001f716 blt r16,zero,254cc <___vfprintf_internal_r+0x1cc8> 24cf0: 1421c83a sub r16,r2,r16 - 24cf4: 043d380e bge zero,r16,241d8 <_gp+0xfffe736c> + 24cf4: 043d380e bge zero,r16,241d8 <___vfprintf_internal_r+0x9d4> 24cf8: 04400404 movi r17,16 24cfc: d8801f17 ldw r2,124(sp) - 24d00: 8c3efb0e bge r17,r16,248f0 <_gp+0xfffe7a84> + 24d00: 8c3efb0e bge r17,r16,248f0 <___vfprintf_internal_r+0x10ec> 24d04: 014000f4 movhi r5,3 24d08: 294a5a84 addi r5,r5,10602 24d0c: d9402b15 stw r5,172(sp) @@ -7198,25 +7177,25 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 24d18: 00000306 br 24d28 <___vfprintf_internal_r+0x1524> 24d1c: 42000204 addi r8,r8,8 24d20: 843ffc04 addi r16,r16,-16 - 24d24: 8c3ef50e bge r17,r16,248fc <_gp+0xfffe7a90> + 24d24: 8c3ef50e bge r17,r16,248fc <___vfprintf_internal_r+0x10f8> 24d28: 18c00404 addi r3,r3,16 24d2c: 10800044 addi r2,r2,1 24d30: 45000015 stw r20,0(r8) 24d34: 44400115 stw r17,4(r8) 24d38: d8c02015 stw r3,128(sp) 24d3c: d8801f15 stw r2,124(sp) - 24d40: b0bff60e bge r22,r2,24d1c <_gp+0xfffe7eb0> + 24d40: b0bff60e bge r22,r2,24d1c <___vfprintf_internal_r+0x1518> 24d44: d9801e04 addi r6,sp,120 24d48: b80b883a mov r5,r23 24d4c: 9809883a mov r4,r19 24d50: 002a7d00 call 2a7d0 <__sprint_r> - 24d54: 103bad1e bne r2,zero,23c0c <_gp+0xfffe6da0> + 24d54: 103bad1e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> 24d58: d8c02017 ldw r3,128(sp) 24d5c: d8801f17 ldw r2,124(sp) 24d60: da000404 addi r8,sp,16 - 24d64: 003fee06 br 24d20 <_gp+0xfffe7eb4> + 24d64: 003fee06 br 24d20 <___vfprintf_internal_r+0x151c> 24d68: 9088703a and r4,r18,r2 - 24d6c: 203eab1e bne r4,zero,2481c <_gp+0xfffe79b0> + 24d6c: 203eab1e bne r4,zero,2481c <___vfprintf_internal_r+0x1018> 24d70: dc401f17 ldw r17,124(sp) 24d74: 40800115 stw r2,4(r8) 24d78: 44000015 stw r16,0(r8) @@ -7226,7 +7205,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 24d88: 008001c4 movi r2,7 24d8c: 14400e16 blt r2,r17,24dc8 <___vfprintf_internal_r+0x15c4> 24d90: 45800204 addi r22,r8,8 - 24d94: 003eca06 br 248c0 <_gp+0xfffe7a54> + 24d94: 003eca06 br 248c0 <___vfprintf_internal_r+0x10bc> 24d98: 010000f4 movhi r4,3 24d9c: 210a5a84 addi r4,r4,10602 24da0: d9002b15 stw r4,172(sp) @@ -7238,44 +7217,44 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 24db8: d8c02015 stw r3,128(sp) 24dbc: dc401f15 stw r17,124(sp) 24dc0: 008001c4 movi r2,7 - 24dc4: 147ebd0e bge r2,r17,248bc <_gp+0xfffe7a50> + 24dc4: 147ebd0e bge r2,r17,248bc <___vfprintf_internal_r+0x10b8> 24dc8: d9002c17 ldw r4,176(sp) 24dcc: d9801e04 addi r6,sp,120 24dd0: b80b883a mov r5,r23 24dd4: 002a7d00 call 2a7d0 <__sprint_r> - 24dd8: 103b8c1e bne r2,zero,23c0c <_gp+0xfffe6da0> + 24dd8: 103b8c1e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> 24ddc: d8c02017 ldw r3,128(sp) 24de0: dc401f17 ldw r17,124(sp) 24de4: dd800404 addi r22,sp,16 - 24de8: 003eb506 br 248c0 <_gp+0xfffe7a54> + 24de8: 003eb506 br 248c0 <___vfprintf_internal_r+0x10bc> 24dec: d9002c17 ldw r4,176(sp) 24df0: d9801e04 addi r6,sp,120 24df4: b80b883a mov r5,r23 24df8: 002a7d00 call 2a7d0 <__sprint_r> - 24dfc: 103b831e bne r2,zero,23c0c <_gp+0xfffe6da0> + 24dfc: 103b831e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> 24e00: d8c02017 ldw r3,128(sp) 24e04: dc401f17 ldw r17,124(sp) 24e08: da000404 addi r8,sp,16 - 24e0c: 003e8d06 br 24844 <_gp+0xfffe79d8> + 24e0c: 003e8d06 br 24844 <___vfprintf_internal_r+0x1040> 24e10: d9002c17 ldw r4,176(sp) 24e14: d9801e04 addi r6,sp,120 24e18: b80b883a mov r5,r23 24e1c: 002a7d00 call 2a7d0 <__sprint_r> - 24e20: 103b7a1e bne r2,zero,23c0c <_gp+0xfffe6da0> + 24e20: 103b7a1e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> 24e24: d8c02017 ldw r3,128(sp) 24e28: dc401f17 ldw r17,124(sp) 24e2c: dd800404 addi r22,sp,16 - 24e30: 003e8f06 br 24870 <_gp+0xfffe7a04> + 24e30: 003e8f06 br 24870 <___vfprintf_internal_r+0x106c> 24e34: 0027883a mov r19,zero - 24e38: 003f4a06 br 24b64 <_gp+0xfffe7cf8> + 24e38: 003f4a06 br 24b64 <___vfprintf_internal_r+0x1360> 24e3c: d9002c17 ldw r4,176(sp) 24e40: d9801e04 addi r6,sp,120 24e44: b80b883a mov r5,r23 24e48: 002a7d00 call 2a7d0 <__sprint_r> - 24e4c: 103b6f1e bne r2,zero,23c0c <_gp+0xfffe6da0> + 24e4c: 103b6f1e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> 24e50: d8c02017 ldw r3,128(sp) 24e54: da000404 addi r8,sp,16 - 24e58: 003c9d06 br 240d0 <_gp+0xfffe7264> + 24e58: 003c9d06 br 240d0 <___vfprintf_internal_r+0x8cc> 24e5c: 04e7c83a sub r19,zero,r19 24e60: 9804c03a cmpne r2,r19,zero 24e64: 05adc83a sub r22,zero,r22 @@ -7286,7 +7265,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 24e78: 10017b16 blt r2,zero,25468 <___vfprintf_internal_r+0x1c64> 24e7c: 00bfdfc4 movi r2,-129 24e80: 90a4703a and r18,r18,r2 - 24e84: 003bb106 br 23d4c <_gp+0xfffe6ee0> + 24e84: 003bb106 br 23d4c <___vfprintf_internal_r+0x548> 24e88: d9003617 ldw r4,216(sp) 24e8c: d9403817 ldw r5,224(sp) 24e90: da003d15 stw r8,244(sp) @@ -7350,7 +7329,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 24f78: d8c02115 stw r3,132(sp) 24f7c: 11000005 stb r4,0(r2) 24f80: d8802117 ldw r2,132(sp) - 24f84: 173ffb36 bltu r2,fp,24f74 <_gp+0xfffe8108> + 24f84: 173ffb36 bltu r2,fp,24f74 <___vfprintf_internal_r+0x1770> 24f88: 1405c83a sub r2,r2,r16 24f8c: d8803315 stw r2,204(sp) 24f90: 008011c4 movi r2,71 @@ -7377,7 +7356,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 24fe4: d8802a15 stw r2,168(sp) 24fe8: dc802b17 ldw r18,172(sp) 24fec: d8002915 stw zero,164(sp) - 24ff0: 003bd106 br 23f38 <_gp+0xfffe70cc> + 24ff0: 003bd106 br 23f38 <___vfprintf_internal_r+0x734> 24ff4: d8802d17 ldw r2,180(sp) 24ff8: d8c02d17 ldw r3,180(sp) 24ffc: d9002d17 ldw r4,180(sp) @@ -7387,9 +7366,9 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2500c: d8803615 stw r2,216(sp) 25010: d8c03815 stw r3,224(sp) 25014: d9002d15 stw r4,180(sp) - 25018: 003b7506 br 23df0 <_gp+0xfffe6f84> + 25018: 003b7506 br 23df0 <___vfprintf_internal_r+0x5ec> 2501c: ac400007 ldb r17,0(r21) - 25020: 003a5906 br 23988 <_gp+0xfffe6b1c> + 25020: 003a5906 br 23988 <___vfprintf_internal_r+0x184> 25024: 9080100c andi r2,r18,64 25028: 1000a826 beq r2,zero,252cc <___vfprintf_internal_r+0x1ac8> 2502c: d9002d17 ldw r4,180(sp) @@ -7397,14 +7376,14 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 25034: 24c0000b ldhu r19,0(r4) 25038: 21000104 addi r4,r4,4 2503c: d9002d15 stw r4,180(sp) - 25040: 003ccb06 br 24370 <_gp+0xfffe7504> + 25040: 003ccb06 br 24370 <___vfprintf_internal_r+0xb6c> 25044: d8c02d17 ldw r3,180(sp) 25048: d9002917 ldw r4,164(sp) 2504c: 002d883a mov r22,zero 25050: 18800104 addi r2,r3,4 25054: 1cc00017 ldw r19,0(r3) - 25058: 203ebb0e bge r4,zero,24b48 <_gp+0xfffe7cdc> - 2505c: 003ef106 br 24c24 <_gp+0xfffe7db8> + 25058: 203ebb0e bge r4,zero,24b48 <___vfprintf_internal_r+0x1344> + 2505c: 003ef106 br 24c24 <___vfprintf_internal_r+0x1420> 25060: 9080040c andi r2,r18,16 25064: 1000921e bne r2,zero,252b0 <___vfprintf_internal_r+0x1aac> 25068: 9480100c andi r18,r18,64 @@ -7415,7 +7394,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2507c: 21000104 addi r4,r4,4 25080: d9002d15 stw r4,180(sp) 25084: 1140000d sth r5,0(r2) - 25088: 003a1606 br 238e4 <_gp+0xfffe6a78> + 25088: 003a1606 br 238e4 <___vfprintf_internal_r+0xe0> 2508c: 9080100c andi r2,r18,64 25090: 10008026 beq r2,zero,25294 <___vfprintf_internal_r+0x1a90> 25094: d8c02d17 ldw r3,180(sp) @@ -7424,7 +7403,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 250a0: d8c02d15 stw r3,180(sp) 250a4: 982dd7fa srai r22,r19,31 250a8: b005883a mov r2,r22 - 250ac: 003b1f06 br 23d2c <_gp+0xfffe6ec0> + 250ac: 003b1f06 br 23d2c <___vfprintf_internal_r+0x528> 250b0: 9080100c andi r2,r18,64 250b4: d8002785 stb zero,158(sp) 250b8: 10008a1e bne r2,zero,252e4 <___vfprintf_internal_r+0x1ae0> @@ -7433,13 +7412,13 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 250c4: 002d883a mov r22,zero 250c8: 28800104 addi r2,r5,4 250cc: 2cc00017 ldw r19,0(r5) - 250d0: 183e4b0e bge r3,zero,24a00 <_gp+0xfffe7b94> + 250d0: 183e4b0e bge r3,zero,24a00 <___vfprintf_internal_r+0x11fc> 250d4: 9d86b03a or r3,r19,r22 250d8: d8802d15 stw r2,180(sp) - 250dc: 183e4c1e bne r3,zero,24a10 <_gp+0xfffe7ba4> + 250dc: 183e4c1e bne r3,zero,24a10 <___vfprintf_internal_r+0x120c> 250e0: 0039883a mov fp,zero 250e4: 0005883a mov r2,zero - 250e8: 003d4006 br 245ec <_gp+0xfffe7780> + 250e8: 003d4006 br 245ec <___vfprintf_internal_r+0xde8> 250ec: 014000f4 movhi r5,3 250f0: 294a5a84 addi r5,r5,10602 250f4: d9402b15 stw r5,172(sp) @@ -7451,27 +7430,27 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2510c: d8c02015 stw r3,128(sp) 25110: d8801f15 stw r2,124(sp) 25114: 010001c4 movi r4,7 - 25118: 20bec816 blt r4,r2,24c3c <_gp+0xfffe7dd0> + 25118: 20bec816 blt r4,r2,24c3c <___vfprintf_internal_r+0x1438> 2511c: 42000204 addi r8,r8,8 - 25120: 003ecd06 br 24c58 <_gp+0xfffe7dec> + 25120: 003ecd06 br 24c58 <___vfprintf_internal_r+0x1454> 25124: d9002917 ldw r4,164(sp) 25128: d8002785 stb zero,158(sp) - 2512c: 203d2d16 blt r4,zero,245e4 <_gp+0xfffe7778> + 2512c: 203d2d16 blt r4,zero,245e4 <___vfprintf_internal_r+0xde0> 25130: 00bfdfc4 movi r2,-129 25134: 90a4703a and r18,r18,r2 - 25138: 003a9106 br 23b80 <_gp+0xfffe6d14> + 25138: 003a9106 br 23b80 <___vfprintf_internal_r+0x37c> 2513c: 010000f4 movhi r4,3 25140: 210a5a84 addi r4,r4,10602 25144: d9002b15 stw r4,172(sp) - 25148: 003c0c06 br 2417c <_gp+0xfffe7310> + 25148: 003c0c06 br 2417c <___vfprintf_internal_r+0x978> 2514c: d9002c17 ldw r4,176(sp) 25150: d9801e04 addi r6,sp,120 25154: b80b883a mov r5,r23 25158: 002a7d00 call 2a7d0 <__sprint_r> - 2515c: 103aab1e bne r2,zero,23c0c <_gp+0xfffe6da0> + 2515c: 103aab1e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> 25160: d8c02017 ldw r3,128(sp) 25164: da000404 addi r8,sp,16 - 25168: 003d4106 br 24670 <_gp+0xfffe7804> + 25168: 003d4106 br 24670 <___vfprintf_internal_r+0xe6c> 2516c: d8801f17 ldw r2,124(sp) 25170: 014000f4 movhi r5,3 25174: 01000044 movi r4,1 @@ -7489,7 +7468,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 251a4: d8803317 ldw r2,204(sp) 251a8: 1000021e bne r2,zero,251b4 <___vfprintf_internal_r+0x19b0> 251ac: 9080004c andi r2,r18,1 - 251b0: 103c0926 beq r2,zero,241d8 <_gp+0xfffe736c> + 251b0: 103c0926 beq r2,zero,241d8 <___vfprintf_internal_r+0x9d4> 251b4: d9003717 ldw r4,220(sp) 251b8: d8801f17 ldw r2,124(sp) 251bc: d9403417 ldw r5,208(sp) @@ -7521,18 +7500,18 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 25224: 45800115 stw r22,4(r8) 25228: d8c02015 stw r3,128(sp) 2522c: d8801f15 stw r2,124(sp) - 25230: e0bff60e bge fp,r2,2520c <_gp+0xfffe83a0> + 25230: e0bff60e bge fp,r2,2520c <___vfprintf_internal_r+0x1a08> 25234: d9801e04 addi r6,sp,120 25238: b80b883a mov r5,r23 2523c: 9809883a mov r4,r19 25240: 002a7d00 call 2a7d0 <__sprint_r> - 25244: 103a711e bne r2,zero,23c0c <_gp+0xfffe6da0> + 25244: 103a711e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> 25248: d8c02017 ldw r3,128(sp) 2524c: d8801f17 ldw r2,124(sp) 25250: da000404 addi r8,sp,16 - 25254: 003fee06 br 25210 <_gp+0xfffe83a4> + 25254: 003fee06 br 25210 <___vfprintf_internal_r+0x1a0c> 25258: 00bfffc4 movi r2,-1 - 2525c: 003a6f06 br 23c1c <_gp+0xfffe6db0> + 2525c: 003a6f06 br 23c1c <___vfprintf_internal_r+0x418> 25260: 008011c4 movi r2,71 25264: 1440b816 blt r2,r17,25548 <___vfprintf_internal_r+0x1d44> 25268: 040000f4 movhi r16,3 @@ -7545,77 +7524,77 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 25284: d8c02e15 stw r3,184(sp) 25288: d8002915 stw zero,164(sp) 2528c: d8003215 stw zero,200(sp) - 25290: 003b2906 br 23f38 <_gp+0xfffe70cc> + 25290: 003b2906 br 23f38 <___vfprintf_internal_r+0x734> 25294: d9002d17 ldw r4,180(sp) 25298: 24c00017 ldw r19,0(r4) 2529c: 21000104 addi r4,r4,4 252a0: d9002d15 stw r4,180(sp) 252a4: 982dd7fa srai r22,r19,31 252a8: b005883a mov r2,r22 - 252ac: 003a9f06 br 23d2c <_gp+0xfffe6ec0> + 252ac: 003a9f06 br 23d2c <___vfprintf_internal_r+0x528> 252b0: d9402d17 ldw r5,180(sp) 252b4: d8c02f17 ldw r3,188(sp) 252b8: 28800017 ldw r2,0(r5) 252bc: 29400104 addi r5,r5,4 252c0: d9402d15 stw r5,180(sp) 252c4: 10c00015 stw r3,0(r2) - 252c8: 00398606 br 238e4 <_gp+0xfffe6a78> + 252c8: 00398606 br 238e4 <___vfprintf_internal_r+0xe0> 252cc: d9402d17 ldw r5,180(sp) 252d0: 002d883a mov r22,zero 252d4: 2cc00017 ldw r19,0(r5) 252d8: 29400104 addi r5,r5,4 252dc: d9402d15 stw r5,180(sp) - 252e0: 003c2306 br 24370 <_gp+0xfffe7504> + 252e0: 003c2306 br 24370 <___vfprintf_internal_r+0xb6c> 252e4: d8c02d17 ldw r3,180(sp) 252e8: d9002917 ldw r4,164(sp) 252ec: 002d883a mov r22,zero 252f0: 18800104 addi r2,r3,4 252f4: 1cc0000b ldhu r19,0(r3) - 252f8: 203dc10e bge r4,zero,24a00 <_gp+0xfffe7b94> - 252fc: 003f7506 br 250d4 <_gp+0xfffe8268> + 252f8: 203dc10e bge r4,zero,24a00 <___vfprintf_internal_r+0x11fc> + 252fc: 003f7506 br 250d4 <___vfprintf_internal_r+0x18d0> 25300: 040000f4 movhi r16,3 25304: 840a4a04 addi r16,r16,10536 - 25308: 003acc06 br 23e3c <_gp+0xfffe6fd0> + 25308: 003acc06 br 23e3c <___vfprintf_internal_r+0x638> 2530c: d9002c17 ldw r4,176(sp) 25310: d9801e04 addi r6,sp,120 25314: b80b883a mov r5,r23 25318: 002a7d00 call 2a7d0 <__sprint_r> - 2531c: 103a3b1e bne r2,zero,23c0c <_gp+0xfffe6da0> + 2531c: 103a3b1e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> 25320: dc402617 ldw r17,152(sp) 25324: d8c02017 ldw r3,128(sp) 25328: da000404 addi r8,sp,16 - 2532c: 003f9c06 br 251a0 <_gp+0xfffe8334> + 2532c: 003f9c06 br 251a0 <___vfprintf_internal_r+0x199c> 25330: ac400043 ldbu r17,1(r21) 25334: 94800814 ori r18,r18,32 25338: ad400044 addi r21,r21,1 2533c: 8c403fcc andi r17,r17,255 25340: 8c40201c xori r17,r17,128 25344: 8c7fe004 addi r17,r17,-128 - 25348: 00398f06 br 23988 <_gp+0xfffe6b1c> + 25348: 00398f06 br 23988 <___vfprintf_internal_r+0x184> 2534c: d8c02d15 stw r3,180(sp) 25350: 0039883a mov fp,zero - 25354: 003e3506 br 24c2c <_gp+0xfffe7dc0> + 25354: 003e3506 br 24c2c <___vfprintf_internal_r+0x1428> 25358: d9002c17 ldw r4,176(sp) 2535c: d9801e04 addi r6,sp,120 25360: b80b883a mov r5,r23 25364: 002a7d00 call 2a7d0 <__sprint_r> - 25368: 103a281e bne r2,zero,23c0c <_gp+0xfffe6da0> + 25368: 103a281e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> 2536c: d8c02017 ldw r3,128(sp) 25370: da000404 addi r8,sp,16 - 25374: 003cd006 br 246b8 <_gp+0xfffe784c> + 25374: 003cd006 br 246b8 <___vfprintf_internal_r+0xeb4> 25378: 8009883a mov r4,r16 2537c: da003d15 stw r8,244(sp) 25380: 002376c0 call 2376c 25384: d8802e15 stw r2,184(sp) 25388: da003d17 ldw r8,244(sp) - 2538c: 103c340e bge r2,zero,24460 <_gp+0xfffe75f4> + 2538c: 103c340e bge r2,zero,24460 <___vfprintf_internal_r+0xc5c> 25390: 0005883a mov r2,zero - 25394: 003c3206 br 24460 <_gp+0xfffe75f4> + 25394: 003c3206 br 24460 <___vfprintf_internal_r+0xc5c> 25398: d9002c17 ldw r4,176(sp) 2539c: d9801e04 addi r6,sp,120 253a0: b80b883a mov r5,r23 253a4: 002a7d00 call 2a7d0 <__sprint_r> - 253a8: 103a181e bne r2,zero,23c0c <_gp+0xfffe6da0> + 253a8: 103a181e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> 253ac: d8c02017 ldw r3,128(sp) 253b0: d8801f17 ldw r2,124(sp) 253b4: da000404 addi r8,sp,16 @@ -7623,23 +7602,23 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 253bc: 10800044 addi r2,r2,1 253c0: 44000015 stw r16,0(r8) 253c4: 28c7883a add r3,r5,r3 - 253c8: 003b7d06 br 241c0 <_gp+0xfffe7354> + 253c8: 003b7d06 br 241c0 <___vfprintf_internal_r+0x9bc> 253cc: 010000f4 movhi r4,3 253d0: 210a5e84 addi r4,r4,10618 253d4: d9003515 stw r4,212(sp) - 253d8: 003b1406 br 2402c <_gp+0xfffe71c0> + 253d8: 003b1406 br 2402c <___vfprintf_internal_r+0x828> 253dc: 013fffc4 movi r4,-1 - 253e0: 003a3506 br 23cb8 <_gp+0xfffe6e4c> + 253e0: 003a3506 br 23cb8 <___vfprintf_internal_r+0x4b4> 253e4: 0023883a mov r17,zero - 253e8: 003d9d06 br 24a60 <_gp+0xfffe7bf4> + 253e8: 003d9d06 br 24a60 <___vfprintf_internal_r+0x125c> 253ec: d9002c17 ldw r4,176(sp) 253f0: d9801e04 addi r6,sp,120 253f4: b80b883a mov r5,r23 253f8: 002a7d00 call 2a7d0 <__sprint_r> - 253fc: 103a031e bne r2,zero,23c0c <_gp+0xfffe6da0> + 253fc: 103a031e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> 25400: d8c02017 ldw r3,128(sp) 25404: da000404 addi r8,sp,16 - 25408: 003d9406 br 24a5c <_gp+0xfffe7bf0> + 25408: 003d9406 br 24a5c <___vfprintf_internal_r+0x1258> 2540c: 010000f4 movhi r4,3 25410: 210a5a84 addi r4,r4,10602 25414: d9002b15 stw r4,172(sp) @@ -7651,29 +7630,29 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2542c: d8c02015 stw r3,128(sp) 25430: d8801f15 stw r2,124(sp) 25434: 010001c4 movi r4,7 - 25438: 20bfd716 blt r4,r2,25398 <_gp+0xfffe852c> + 25438: 20bfd716 blt r4,r2,25398 <___vfprintf_internal_r+0x1b94> 2543c: 42000204 addi r8,r8,8 - 25440: 003fdd06 br 253b8 <_gp+0xfffe854c> + 25440: 003fdd06 br 253b8 <___vfprintf_internal_r+0x1bb4> 25444: d9002c17 ldw r4,176(sp) 25448: d9801e04 addi r6,sp,120 2544c: b80b883a mov r5,r23 25450: 002a7d00 call 2a7d0 <__sprint_r> - 25454: 1039ed1e bne r2,zero,23c0c <_gp+0xfffe6da0> + 25454: 1039ed1e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> 25458: d8802617 ldw r2,152(sp) 2545c: d8c02017 ldw r3,128(sp) 25460: da000404 addi r8,sp,16 - 25464: 003e1006 br 24ca8 <_gp+0xfffe7e3c> + 25464: 003e1006 br 24ca8 <___vfprintf_internal_r+0x14a4> 25468: 00800044 movi r2,1 2546c: 10803fcc andi r2,r2,255 25470: 00c00044 movi r3,1 - 25474: 10fa3526 beq r2,r3,23d4c <_gp+0xfffe6ee0> + 25474: 10fa3526 beq r2,r3,23d4c <___vfprintf_internal_r+0x548> 25478: 00c00084 movi r3,2 - 2547c: 10fbcb26 beq r2,r3,243ac <_gp+0xfffe7540> - 25480: 003a8f06 br 23ec0 <_gp+0xfffe7054> + 2547c: 10fbcb26 beq r2,r3,243ac <___vfprintf_internal_r+0xba8> + 25480: 003a8f06 br 23ec0 <___vfprintf_internal_r+0x6bc> 25484: 010000f4 movhi r4,3 25488: 210a5e84 addi r4,r4,10618 2548c: d9003515 stw r4,212(sp) - 25490: 003b7606 br 2426c <_gp+0xfffe7400> + 25490: 003b7606 br 2426c <___vfprintf_internal_r+0xa68> 25494: d8802917 ldw r2,164(sp) 25498: 00c00184 movi r3,6 2549c: 1880012e bgeu r3,r2,254a4 <___vfprintf_internal_r+0x1ca0> @@ -7687,61 +7666,61 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 254bc: d8003215 stw zero,200(sp) 254c0: 840a5804 addi r16,r16,10592 254c4: 0039883a mov fp,zero - 254c8: 003aa206 br 23f54 <_gp+0xfffe70e8> + 254c8: 003aa206 br 23f54 <___vfprintf_internal_r+0x750> 254cc: 0021883a mov r16,zero - 254d0: 003e0706 br 24cf0 <_gp+0xfffe7e84> + 254d0: 003e0706 br 24cf0 <___vfprintf_internal_r+0x14ec> 254d4: d9002c17 ldw r4,176(sp) 254d8: d9801e04 addi r6,sp,120 254dc: b80b883a mov r5,r23 254e0: 002a7d00 call 2a7d0 <__sprint_r> - 254e4: 1039c91e bne r2,zero,23c0c <_gp+0xfffe6da0> + 254e4: 1039c91e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> 254e8: d8802617 ldw r2,152(sp) 254ec: d9403317 ldw r5,204(sp) 254f0: d8c02017 ldw r3,128(sp) 254f4: da000404 addi r8,sp,16 254f8: 2885c83a sub r2,r5,r2 - 254fc: 003dfb06 br 24cec <_gp+0xfffe7e80> + 254fc: 003dfb06 br 24cec <___vfprintf_internal_r+0x14e8> 25500: 9080004c andi r2,r18,1 - 25504: 103e8f1e bne r2,zero,24f44 <_gp+0xfffe80d8> + 25504: 103e8f1e bne r2,zero,24f44 <___vfprintf_internal_r+0x1740> 25508: d8802117 ldw r2,132(sp) - 2550c: 003e9e06 br 24f88 <_gp+0xfffe811c> + 2550c: 003e9e06 br 24f88 <___vfprintf_internal_r+0x1784> 25510: 1025883a mov r18,r2 25514: 0039883a mov fp,zero 25518: 00800084 movi r2,2 - 2551c: 003fd306 br 2546c <_gp+0xfffe8600> + 2551c: 003fd306 br 2546c <___vfprintf_internal_r+0x1c68> 25520: 07000b44 movi fp,45 25524: df002785 stb fp,158(sp) - 25528: 003a4006 br 23e2c <_gp+0xfffe6fc0> + 25528: 003a4006 br 23e2c <___vfprintf_internal_r+0x628> 2552c: 00c00b44 movi r3,45 25530: d8c02785 stb r3,158(sp) 25534: d8802a15 stw r2,168(sp) 25538: dc802b17 ldw r18,172(sp) 2553c: d8002915 stw zero,164(sp) 25540: 07000b44 movi fp,45 - 25544: 003a8006 br 23f48 <_gp+0xfffe70dc> + 25544: 003a8006 br 23f48 <___vfprintf_internal_r+0x744> 25548: 040000f4 movhi r16,3 2554c: 840a4d04 addi r16,r16,10548 - 25550: 003f4706 br 25270 <_gp+0xfffe8404> + 25550: 003f4706 br 25270 <___vfprintf_internal_r+0x1a6c> 25554: d8c02d17 ldw r3,180(sp) 25558: d9002f17 ldw r4,188(sp) 2555c: 18800017 ldw r2,0(r3) 25560: 18c00104 addi r3,r3,4 25564: d8c02d15 stw r3,180(sp) 25568: 11000015 stw r4,0(r2) - 2556c: 0038dd06 br 238e4 <_gp+0xfffe6a78> + 2556c: 0038dd06 br 238e4 <___vfprintf_internal_r+0xe0> 25570: dd802617 ldw r22,152(sp) 25574: 00bfff44 movi r2,-3 25578: b0801c16 blt r22,r2,255ec <___vfprintf_internal_r+0x1de8> 2557c: d9402917 ldw r5,164(sp) 25580: 2d801a16 blt r5,r22,255ec <___vfprintf_internal_r+0x1de8> 25584: dd803215 stw r22,200(sp) - 25588: 003e8906 br 24fb0 <_gp+0xfffe8144> + 25588: 003e8906 br 24fb0 <___vfprintf_internal_r+0x17ac> 2558c: 010000f4 movhi r4,3 25590: 210a5a84 addi r4,r4,10602 25594: d9002b15 stw r4,172(sp) - 25598: 003c9106 br 247e0 <_gp+0xfffe7974> + 25598: 003c9106 br 247e0 <___vfprintf_internal_r+0xfdc> 2559c: e005883a mov r2,fp - 255a0: 003e7906 br 24f88 <_gp+0xfffe811c> + 255a0: 003e7906 br 24f88 <___vfprintf_internal_r+0x1784> 255a4: d9402917 ldw r5,164(sp) 255a8: df002783 ldbu fp,158(sp) 255ac: dcc02d15 stw r19,180(sp) @@ -7749,17 +7728,17 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 255b4: d9402e15 stw r5,184(sp) 255b8: d8002915 stw zero,164(sp) 255bc: d8003215 stw zero,200(sp) - 255c0: 003a5d06 br 23f38 <_gp+0xfffe70cc> + 255c0: 003a5d06 br 23f38 <___vfprintf_internal_r+0x734> 255c4: 9080004c andi r2,r18,1 255c8: 0039883a mov fp,zero 255cc: 10000426 beq r2,zero,255e0 <___vfprintf_internal_r+0x1ddc> 255d0: 00800c04 movi r2,48 255d4: dc001dc4 addi r16,sp,119 255d8: d8801dc5 stb r2,119(sp) - 255dc: 003b8006 br 243e0 <_gp+0xfffe7574> + 255dc: 003b8006 br 243e0 <___vfprintf_internal_r+0xbdc> 255e0: d8002e15 stw zero,184(sp) 255e4: dc001e04 addi r16,sp,120 - 255e8: 003a4d06 br 23f20 <_gp+0xfffe70b4> + 255e8: 003a4d06 br 23f20 <___vfprintf_internal_r+0x71c> 255ec: 8c7fff84 addi r17,r17,-2 255f0: b5bfffc4 addi r22,r22,-1 255f4: dd802615 stw r22,152(sp) @@ -7789,30 +7768,30 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 25654: 1805883a mov r2,r3 25658: 1800ac16 blt r3,zero,2590c <___vfprintf_internal_r+0x2108> 2565c: d8003215 stw zero,200(sp) - 25660: 003e5d06 br 24fd8 <_gp+0xfffe816c> + 25660: 003e5d06 br 24fd8 <___vfprintf_internal_r+0x17d4> 25664: d9002c17 ldw r4,176(sp) 25668: d9801e04 addi r6,sp,120 2566c: b80b883a mov r5,r23 25670: 002a7d00 call 2a7d0 <__sprint_r> - 25674: 1039651e bne r2,zero,23c0c <_gp+0xfffe6da0> + 25674: 1039651e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> 25678: dc402617 ldw r17,152(sp) 2567c: d8c02017 ldw r3,128(sp) 25680: d8801f17 ldw r2,124(sp) 25684: da000404 addi r8,sp,16 - 25688: 003ed606 br 251e4 <_gp+0xfffe8378> + 25688: 003ed606 br 251e4 <___vfprintf_internal_r+0x19e0> 2568c: 582b883a mov r21,r11 25690: d8002915 stw zero,164(sp) - 25694: 0038bd06 br 2398c <_gp+0xfffe6b20> + 25694: 0038bd06 br 2398c <___vfprintf_internal_r+0x188> 25698: d8802917 ldw r2,164(sp) - 2569c: 103e071e bne r2,zero,24ebc <_gp+0xfffe8050> + 2569c: 103e071e bne r2,zero,24ebc <___vfprintf_internal_r+0x16b8> 256a0: dc002915 stw r16,164(sp) - 256a4: 003e0506 br 24ebc <_gp+0xfffe8050> + 256a4: 003e0506 br 24ebc <___vfprintf_internal_r+0x16b8> 256a8: d9002917 ldw r4,164(sp) 256ac: 20c00044 addi r3,r4,1 - 256b0: 003e0f06 br 24ef0 <_gp+0xfffe8084> + 256b0: 003e0f06 br 24ef0 <___vfprintf_internal_r+0x16ec> 256b4: 01400184 movi r5,6 256b8: d9402915 stw r5,164(sp) - 256bc: 003dff06 br 24ebc <_gp+0xfffe8050> + 256bc: 003dff06 br 24ebc <___vfprintf_internal_r+0x16b8> 256c0: d8802104 addi r2,sp,132 256c4: d8800315 stw r2,12(sp) 256c8: d8802504 addi r2,sp,148 @@ -7836,11 +7815,11 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 25710: 20805e26 beq r4,r2,2588c <___vfprintf_internal_r+0x2088> 25714: d8c02617 ldw r3,152(sp) 25718: e0f9883a add fp,fp,r3 - 2571c: 003e0a06 br 24f48 <_gp+0xfffe80dc> + 2571c: 003e0a06 br 24f48 <___vfprintf_internal_r+0x1744> 25720: 00c00b44 movi r3,45 25724: 24e0003c xorhi r19,r4,32768 25728: d8c02a05 stb r3,168(sp) - 2572c: 003de906 br 24ed4 <_gp+0xfffe8068> + 2572c: 003de906 br 24ed4 <___vfprintf_internal_r+0x16d0> 25730: d8c03217 ldw r3,200(sp) 25734: 00c07a0e bge zero,r3,25920 <___vfprintf_internal_r+0x211c> 25738: 00800044 movi r2,1 @@ -7849,7 +7828,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 25744: d8802e15 stw r2,184(sp) 25748: 10004e16 blt r2,zero,25884 <___vfprintf_internal_r+0x2080> 2574c: 044019c4 movi r17,103 - 25750: 003e2106 br 24fd8 <_gp+0xfffe816c> + 25750: 003e2106 br 24fd8 <___vfprintf_internal_r+0x17d4> 25754: d9002917 ldw r4,164(sp) 25758: d8802104 addi r2,sp,132 2575c: d8800315 stw r2,12(sp) @@ -7869,8 +7848,8 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 25794: 1021883a mov r16,r2 25798: 00801184 movi r2,70 2579c: 80f9883a add fp,r16,r3 - 257a0: 88bfd926 beq r17,r2,25708 <_gp+0xfffe889c> - 257a4: 003de806 br 24f48 <_gp+0xfffe80dc> + 257a0: 88bfd926 beq r17,r2,25708 <___vfprintf_internal_r+0x1f04> + 257a4: 003de806 br 24f48 <___vfprintf_internal_r+0x1744> 257a8: d9002917 ldw r4,164(sp) 257ac: 00c04d0e bge zero,r3,258e4 <___vfprintf_internal_r+0x20e0> 257b0: 2000441e bne r4,zero,258c4 <___vfprintf_internal_r+0x20c0> @@ -7880,7 +7859,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 257c0: 18007016 blt r3,zero,25984 <___vfprintf_internal_r+0x2180> 257c4: d8c03217 ldw r3,200(sp) 257c8: d8c02e15 stw r3,184(sp) - 257cc: 003e0206 br 24fd8 <_gp+0xfffe816c> + 257cc: 003e0206 br 24fd8 <___vfprintf_internal_r+0x17d4> 257d0: df0022c4 addi fp,sp,139 257d4: dc002915 stw r16,164(sp) 257d8: 4027883a mov r19,r8 @@ -7896,7 +7875,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 25800: 00229280 call 22928 <__divsi3> 25804: 102d883a mov r22,r2 25808: 00800244 movi r2,9 - 2580c: 15bff416 blt r2,r22,257e0 <_gp+0xfffe8974> + 2580c: 15bff416 blt r2,r22,257e0 <___vfprintf_internal_r+0x1fdc> 25810: 9811883a mov r8,r19 25814: b0800c04 addi r2,r22,48 25818: 8027883a mov r19,r16 @@ -7913,21 +7892,21 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 25844: 20800005 stb r2,0(r4) 25848: 21000044 addi r4,r4,1 2584c: 29400044 addi r5,r5,1 - 25850: 393ffb1e bne r7,r4,25840 <_gp+0xfffe89d4> + 25850: 393ffb1e bne r7,r4,25840 <___vfprintf_internal_r+0x203c> 25854: d8802304 addi r2,sp,140 25858: 14c5c83a sub r2,r2,r19 2585c: d8c02344 addi r3,sp,141 25860: 1885883a add r2,r3,r2 - 25864: 003f7006 br 25628 <_gp+0xfffe87bc> + 25864: 003f7006 br 25628 <___vfprintf_internal_r+0x1e24> 25868: 0005883a mov r2,zero - 2586c: 003f0f06 br 254ac <_gp+0xfffe8640> + 2586c: 003f0f06 br 254ac <___vfprintf_internal_r+0x1ca8> 25870: d8c03217 ldw r3,200(sp) 25874: 18c00044 addi r3,r3,1 25878: d8c02e15 stw r3,184(sp) 2587c: 1805883a mov r2,r3 - 25880: 183fb20e bge r3,zero,2574c <_gp+0xfffe88e0> + 25880: 183fb20e bge r3,zero,2574c <___vfprintf_internal_r+0x1f48> 25884: 0005883a mov r2,zero - 25888: 003fb006 br 2574c <_gp+0xfffe88e0> + 25888: 003fb006 br 2574c <___vfprintf_internal_r+0x1f48> 2588c: d9003617 ldw r4,216(sp) 25890: 000d883a mov r6,zero 25894: 000f883a mov r7,zero @@ -7937,37 +7916,37 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 258a4: 002e2940 call 2e294 <__eqdf2> 258a8: d8c03c17 ldw r3,240(sp) 258ac: da003d17 ldw r8,244(sp) - 258b0: 103f9826 beq r2,zero,25714 <_gp+0xfffe88a8> + 258b0: 103f9826 beq r2,zero,25714 <___vfprintf_internal_r+0x1f10> 258b4: 00800044 movi r2,1 258b8: 10c7c83a sub r3,r2,r3 258bc: d8c02615 stw r3,152(sp) - 258c0: 003f9506 br 25718 <_gp+0xfffe88ac> + 258c0: 003f9506 br 25718 <___vfprintf_internal_r+0x1f14> 258c4: d9002917 ldw r4,164(sp) 258c8: d8c03217 ldw r3,200(sp) 258cc: 20800044 addi r2,r4,1 258d0: 1885883a add r2,r3,r2 258d4: d8802e15 stw r2,184(sp) - 258d8: 103dbf0e bge r2,zero,24fd8 <_gp+0xfffe816c> + 258d8: 103dbf0e bge r2,zero,24fd8 <___vfprintf_internal_r+0x17d4> 258dc: 0005883a mov r2,zero - 258e0: 003dbd06 br 24fd8 <_gp+0xfffe816c> + 258e0: 003dbd06 br 24fd8 <___vfprintf_internal_r+0x17d4> 258e4: 2000211e bne r4,zero,2596c <___vfprintf_internal_r+0x2168> 258e8: 9480004c andi r18,r18,1 258ec: 90001f1e bne r18,zero,2596c <___vfprintf_internal_r+0x2168> 258f0: 00800044 movi r2,1 258f4: d8802e15 stw r2,184(sp) - 258f8: 003db706 br 24fd8 <_gp+0xfffe816c> + 258f8: 003db706 br 24fd8 <___vfprintf_internal_r+0x17d4> 258fc: 00800b44 movi r2,45 25900: 05adc83a sub r22,zero,r22 25904: d8802305 stb r2,140(sp) - 25908: 003f3f06 br 25608 <_gp+0xfffe879c> + 25908: 003f3f06 br 25608 <___vfprintf_internal_r+0x1e04> 2590c: 0005883a mov r2,zero - 25910: 003f5206 br 2565c <_gp+0xfffe87f0> + 25910: 003f5206 br 2565c <___vfprintf_internal_r+0x1e58> 25914: 90a4703a and r18,r18,r2 - 25918: 903f4e26 beq r18,zero,25654 <_gp+0xfffe87e8> - 2591c: 003f4a06 br 25648 <_gp+0xfffe87dc> + 25918: 903f4e26 beq r18,zero,25654 <___vfprintf_internal_r+0x1e50> + 2591c: 003f4a06 br 25648 <___vfprintf_internal_r+0x1e44> 25920: 00800084 movi r2,2 25924: 10c5c83a sub r2,r2,r3 - 25928: 003f8406 br 2573c <_gp+0xfffe88d0> + 25928: 003f8406 br 2573c <___vfprintf_internal_r+0x1f38> 2592c: d8802d17 ldw r2,180(sp) 25930: d9002d17 ldw r4,180(sp) 25934: ac400043 ldbu r17,1(r21) @@ -7977,49 +7956,49 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 25944: 20800104 addi r2,r4,4 25948: d9002917 ldw r4,164(sp) 2594c: d8802d15 stw r2,180(sp) - 25950: 203e7a0e bge r4,zero,2533c <_gp+0xfffe84d0> + 25950: 203e7a0e bge r4,zero,2533c <___vfprintf_internal_r+0x1b38> 25954: 8c403fcc andi r17,r17,255 25958: 00bfffc4 movi r2,-1 2595c: 8c40201c xori r17,r17,128 25960: d8802915 stw r2,164(sp) 25964: 8c7fe004 addi r17,r17,-128 - 25968: 00380706 br 23988 <_gp+0xfffe6b1c> + 25968: 00380706 br 23988 <___vfprintf_internal_r+0x184> 2596c: d8c02917 ldw r3,164(sp) 25970: 18c00084 addi r3,r3,2 25974: d8c02e15 stw r3,184(sp) 25978: 1805883a mov r2,r3 - 2597c: 183d960e bge r3,zero,24fd8 <_gp+0xfffe816c> - 25980: 003fd606 br 258dc <_gp+0xfffe8a70> + 2597c: 183d960e bge r3,zero,24fd8 <___vfprintf_internal_r+0x17d4> + 25980: 003fd606 br 258dc <___vfprintf_internal_r+0x20d8> 25984: 0005883a mov r2,zero - 25988: 003f8e06 br 257c4 <_gp+0xfffe8958> + 25988: 003f8e06 br 257c4 <___vfprintf_internal_r+0x1fc0> 2598c: 9080004c andi r2,r18,1 - 25990: 103f811e bne r2,zero,25798 <_gp+0xfffe892c> + 25990: 103f811e bne r2,zero,25798 <___vfprintf_internal_r+0x1f94> 25994: d8802117 ldw r2,132(sp) 25998: 1405c83a sub r2,r2,r16 2599c: d8803315 stw r2,204(sp) - 259a0: b47ef326 beq r22,r17,25570 <_gp+0xfffe8704> + 259a0: b47ef326 beq r22,r17,25570 <___vfprintf_internal_r+0x1d6c> 259a4: dd802617 ldw r22,152(sp) - 259a8: 003f1106 br 255f0 <_gp+0xfffe8784> + 259a8: 003f1106 br 255f0 <___vfprintf_internal_r+0x1dec> 259ac: d9c02785 stb r7,158(sp) - 259b0: 00390406 br 23dc4 <_gp+0xfffe6f58> + 259b0: 00390406 br 23dc4 <___vfprintf_internal_r+0x5c0> 259b4: d9c02785 stb r7,158(sp) - 259b8: 0038d306 br 23d08 <_gp+0xfffe6e9c> + 259b8: 0038d306 br 23d08 <___vfprintf_internal_r+0x504> 259bc: d9c02785 stb r7,158(sp) - 259c0: 003a6106 br 24348 <_gp+0xfffe74dc> + 259c0: 003a6106 br 24348 <___vfprintf_internal_r+0xb44> 259c4: d9c02785 stb r7,158(sp) - 259c8: 003af806 br 245ac <_gp+0xfffe7740> + 259c8: 003af806 br 245ac <___vfprintf_internal_r+0xda8> 259cc: 0005883a mov r2,zero - 259d0: 003d7e06 br 24fcc <_gp+0xfffe8160> + 259d0: 003d7e06 br 24fcc <___vfprintf_internal_r+0x17c8> 259d4: d8802344 addi r2,sp,141 - 259d8: 003f1306 br 25628 <_gp+0xfffe87bc> + 259d8: 003f1306 br 25628 <___vfprintf_internal_r+0x1e24> 259dc: d9c02785 stb r7,158(sp) - 259e0: 00392306 br 23e70 <_gp+0xfffe7004> + 259e0: 00392306 br 23e70 <___vfprintf_internal_r+0x66c> 259e4: d9c02785 stb r7,158(sp) - 259e8: 003aa906 br 24490 <_gp+0xfffe7624> + 259e8: 003aa906 br 24490 <___vfprintf_internal_r+0xc8c> 259ec: d9c02785 stb r7,158(sp) - 259f0: 003a3d06 br 242e8 <_gp+0xfffe747c> + 259f0: 003a3d06 br 242e8 <___vfprintf_internal_r+0xae4> 259f4: d9c02785 stb r7,158(sp) - 259f8: 003aca06 br 24524 <_gp+0xfffe76b8> + 259f8: 003aca06 br 24524 <___vfprintf_internal_r+0xd20> 000259fc <__vfprintf_internal>: 259fc: 008000f4 movhi r2,3 @@ -8077,7 +8056,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 25ac4: dec11e04 addi sp,sp,1144 25ac8: f800283a ret 25acc: 047fffc4 movi r17,-1 - 25ad0: 003ff106 br 25a98 <_gp+0xfffe8c2c> + 25ad0: 003ff106 br 25a98 <__sbprintf+0x80> 00025ad4 <__swsetup_r>: 25ad4: 008000f4 movhi r2,3 @@ -8118,33 +8097,33 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 25b60: 80c00417 ldw r3,16(r16) 25b64: 20800214 ori r2,r4,8 25b68: 8080030d sth r2,12(r16) - 25b6c: 183feb1e bne r3,zero,25b1c <_gp+0xfffe8cb0> + 25b6c: 183feb1e bne r3,zero,25b1c <__swsetup_r+0x48> 25b70: 1100a00c andi r4,r2,640 25b74: 01408004 movi r5,512 - 25b78: 217fe826 beq r4,r5,25b1c <_gp+0xfffe8cb0> + 25b78: 217fe826 beq r4,r5,25b1c <__swsetup_r+0x48> 25b7c: 800b883a mov r5,r16 25b80: 8809883a mov r4,r17 25b84: 002864c0 call 2864c <__smakebuf_r> 25b88: 8080030b ldhu r2,12(r16) 25b8c: 80c00417 ldw r3,16(r16) - 25b90: 003fe206 br 25b1c <_gp+0xfffe8cb0> + 25b90: 003fe206 br 25b1c <__swsetup_r+0x48> 25b94: 80800517 ldw r2,20(r16) 25b98: 80000215 stw zero,8(r16) 25b9c: 0085c83a sub r2,zero,r2 25ba0: 80800615 stw r2,24(r16) - 25ba4: 183fe41e bne r3,zero,25b38 <_gp+0xfffe8ccc> + 25ba4: 183fe41e bne r3,zero,25b38 <__swsetup_r+0x64> 25ba8: 80c0030b ldhu r3,12(r16) 25bac: 0005883a mov r2,zero 25bb0: 1900200c andi r4,r3,128 - 25bb4: 203fe126 beq r4,zero,25b3c <_gp+0xfffe8cd0> + 25bb4: 203fe126 beq r4,zero,25b3c <__swsetup_r+0x68> 25bb8: 18c01014 ori r3,r3,64 25bbc: 80c0030d sth r3,12(r16) 25bc0: 00bfffc4 movi r2,-1 - 25bc4: 003fdd06 br 25b3c <_gp+0xfffe8cd0> + 25bc4: 003fdd06 br 25b3c <__swsetup_r+0x68> 25bc8: 0027aa80 call 27aa8 <__sinit> - 25bcc: 003fcd06 br 25b04 <_gp+0xfffe8c98> + 25bcc: 003fcd06 br 25b04 <__swsetup_r+0x30> 25bd0: 0005883a mov r2,zero - 25bd4: 003fd606 br 25b30 <_gp+0xfffe8cc4> + 25bd4: 003fd606 br 25b30 <__swsetup_r+0x5c> 25bd8: 81400c17 ldw r5,48(r16) 25bdc: 28000626 beq r5,zero,25bf8 <__swsetup_r+0x124> 25be0: 80801004 addi r2,r16,64 @@ -8158,13 +8137,13 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 25c00: 1108703a and r4,r2,r4 25c04: 80000115 stw zero,4(r16) 25c08: 80c00015 stw r3,0(r16) - 25c0c: 003fd506 br 25b64 <_gp+0xfffe8cf8> + 25c0c: 003fd506 br 25b64 <__swsetup_r+0x90> 25c10: 00800244 movi r2,9 25c14: 88800015 stw r2,0(r17) 25c18: 20801014 ori r2,r4,64 25c1c: 8080030d sth r2,12(r16) 25c20: 00bfffc4 movi r2,-1 - 25c24: 003fc506 br 25b3c <_gp+0xfffe8cd0> + 25c24: 003fc506 br 25b3c <__swsetup_r+0x68> 00025c28 : 25c28: defff704 addi sp,sp,-36 @@ -8225,7 +8204,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 25d04: 49c00015 stw r7,0(r9) 25d08: 300dd43a srai r6,r6,16 25d0c: 4a400104 addi r9,r9,4 - 25d10: a17fe52e bgeu r20,r5,25ca8 <_gp+0xfffe8e3c> + 25d10: a17fe52e bgeu r20,r5,25ca8 25d14: b0800017 ldw r2,0(r22) 25d18: 10000b1e bne r2,zero,25d48 25d1c: b0bfff04 addi r2,r22,-4 @@ -8237,7 +8216,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 25d34: 1800031e bne r3,zero,25d44 25d38: 10bfff04 addi r2,r2,-4 25d3c: 94bfffc4 addi r18,r18,-1 - 25d40: a8bffb36 bltu r21,r2,25d30 <_gp+0xfffe8ec4> + 25d40: a8bffb36 bltu r21,r2,25d30 25d44: 84800415 stw r18,16(r16) 25d48: b80b883a mov r5,r23 25d4c: 8009883a mov r4,r16 @@ -8264,7 +8243,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 25da0: 200bd43a srai r5,r4,16 25da4: 30c6b03a or r3,r6,r3 25da8: 10ffff15 stw r3,-4(r2) - 25dac: a47fed2e bgeu r20,r17,25d64 <_gp+0xfffe8ef8> + 25dac: a47fed2e bgeu r20,r17,25d64 25db0: 9485883a add r2,r18,r18 25db4: 1085883a add r2,r2,r2 25db8: a887883a add r3,r21,r2 @@ -8279,7 +8258,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 25ddc: 1800031e bne r3,zero,25dec 25de0: 10bfff04 addi r2,r2,-4 25de4: 94bfffc4 addi r18,r18,-1 - 25de8: a8bffb36 bltu r21,r2,25dd8 <_gp+0xfffe8f6c> + 25de8: a8bffb36 bltu r21,r2,25dd8 25dec: 84800415 stw r18,16(r16) 25df0: 9805883a mov r2,r19 25df4: dfc00817 ldw ra,32(sp) @@ -8294,7 +8273,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 25e18: dec00904 addi sp,sp,36 25e1c: f800283a ret 25e20: 0005883a mov r2,zero - 25e24: 003ff306 br 25df4 <_gp+0xfffe8f88> + 25e24: 003ff306 br 25df4 00025e28 <_dtoa_r>: 25e28: 20801017 ldw r2,64(r4) @@ -8364,20 +8343,20 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 25f28: 008000f4 movhi r2,3 25f2c: 108a6604 addi r2,r2,10648 25f30: d9002517 ldw r4,148(sp) - 25f34: 203fec26 beq r4,zero,25ee8 <_gp+0xfffe907c> + 25f34: 203fec26 beq r4,zero,25ee8 <_dtoa_r+0xc0> 25f38: 10c000c7 ldb r3,3(r2) 25f3c: 1801781e bne r3,zero,26520 <_dtoa_r+0x6f8> 25f40: 10c000c4 addi r3,r2,3 25f44: d9802517 ldw r6,148(sp) 25f48: 30c00015 stw r3,0(r6) - 25f4c: 003fe606 br 25ee8 <_gp+0xfffe907c> + 25f4c: 003fe606 br 25ee8 <_dtoa_r+0xc0> 25f50: 04e00034 movhi r19,32768 25f54: 9cffffc4 addi r19,r19,-1 25f58: 00800044 movi r2,1 25f5c: 8ce6703a and r19,r17,r19 25f60: 80800015 stw r2,0(r16) 25f64: 9823883a mov r17,r19 - 25f68: 003fcc06 br 25e9c <_gp+0xfffe9030> + 25f68: 003fcc06 br 25e9c <_dtoa_r+0x74> 25f6c: d8800204 addi r2,sp,8 25f70: d8800015 stw r2,0(sp) 25f74: d9c00104 addi r7,sp,4 @@ -8515,7 +8494,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 26184: 11000504 addi r4,r2,20 26188: 180b883a mov r5,r3 2618c: 18c00044 addi r3,r3,1 - 26190: 313ffb2e bgeu r6,r4,26180 <_gp+0xfffe9314> + 26190: 313ffb2e bgeu r6,r4,26180 <_dtoa_r+0x358> 26194: e1401115 stw r5,68(fp) 26198: e009883a mov r4,fp 2619c: 0028b900 call 28b90 <_Balloc> @@ -8566,7 +8545,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 26250: 84000044 addi r16,r16,1 26254: 002e4ec0 call 2e4ec <__muldf3> 26258: bdc00204 addi r23,r23,8 - 2625c: a83ff51e bne r21,zero,26234 <_gp+0xfffe93c8> + 2625c: a83ff51e bne r21,zero,26234 <_dtoa_r+0x40c> 26260: 1013883a mov r9,r2 26264: 1811883a mov r8,r3 26268: 480d883a mov r6,r9 @@ -8720,7 +8699,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 264b8: 880f883a mov r7,r17 264bc: 0009883a mov r4,zero 264c0: 014ffc34 movhi r5,16368 - 264c4: 103fcf0e bge r2,zero,26404 <_gp+0xfffe9598> + 264c4: 103fcf0e bge r2,zero,26404 <_dtoa_r+0x5dc> 264c8: d8c01317 ldw r3,76(sp) 264cc: d8c00515 stw r3,20(sp) 264d0: d9400917 ldw r5,36(sp) @@ -8735,16 +8714,16 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 264f4: 3802aa26 beq r7,zero,26fa0 <_dtoa_r+0x1178> 264f8: 3dc00015 stw r23,0(r7) 264fc: d8800717 ldw r2,28(sp) - 26500: 003e7906 br 25ee8 <_gp+0xfffe907c> + 26500: 003e7906 br 25ee8 <_dtoa_r+0xc0> 26504: 00800434 movhi r2,16 26508: 10bfffc4 addi r2,r2,-1 2650c: 88a2703a and r17,r17,r2 - 26510: 883e851e bne r17,zero,25f28 <_gp+0xfffe90bc> + 26510: 883e851e bne r17,zero,25f28 <_dtoa_r+0x100> 26514: 008000f4 movhi r2,3 26518: 108a6304 addi r2,r2,10636 - 2651c: 003e8406 br 25f30 <_gp+0xfffe90c4> + 2651c: 003e8406 br 25f30 <_dtoa_r+0x108> 26520: 10c00204 addi r3,r2,8 - 26524: 003e8706 br 25f44 <_gp+0xfffe90d8> + 26524: 003e8706 br 25f44 <_dtoa_r+0x11c> 26528: 01400434 movhi r5,16 2652c: 297fffc4 addi r5,r5,-1 26530: 994a703a and r5,r19,r5 @@ -8753,10 +8732,10 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2653c: 294ffc34 orhi r5,r5,16368 26540: dd800217 ldw r22,8(sp) 26544: d8001115 stw zero,68(sp) - 26548: 003ea506 br 25fe0 <_gp+0xfffe9174> + 26548: 003ea506 br 25fe0 <_dtoa_r+0x1b8> 2654c: 008000f4 movhi r2,3 26550: 108a5a04 addi r2,r2,10600 - 26554: 003e6406 br 25ee8 <_gp+0xfffe907c> + 26554: 003e6406 br 25ee8 <_dtoa_r+0xc0> 26558: e0001115 stw zero,68(fp) 2655c: 000b883a mov r5,zero 26560: e009883a mov r4,fp @@ -8824,7 +8803,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 26658: 1025883a mov r18,r2 2665c: 1827883a mov r19,r3 26660: 002e2940 call 2e294 <__eqdf2> - 26664: 103f9a26 beq r2,zero,264d0 <_gp+0xfffe9664> + 26664: 103f9a26 beq r2,zero,264d0 <_dtoa_r+0x6a8> 26668: d9c00617 ldw r7,24(sp) 2666c: d8c00717 ldw r3,28(sp) 26670: b829883a mov r20,r23 @@ -8840,7 +8819,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 26698: 1827883a mov r19,r3 2669c: b829883a mov r20,r23 266a0: 002e2940 call 2e294 <__eqdf2> - 266a4: 103f8a26 beq r2,zero,264d0 <_gp+0xfffe9664> + 266a4: 103f8a26 beq r2,zero,264d0 <_dtoa_r+0x6a8> 266a8: 800d883a mov r6,r16 266ac: 880f883a mov r7,r17 266b0: 9009883a mov r4,r18 @@ -8869,7 +8848,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2670c: 1009883a mov r4,r2 26710: 180b883a mov r5,r3 26714: a5c00044 addi r23,r20,1 - 26718: b53fd91e bne r22,r20,26680 <_gp+0xfffe9814> + 26718: b53fd91e bne r22,r20,26680 <_dtoa_r+0x858> 2671c: 100d883a mov r6,r2 26720: 180f883a mov r7,r3 26724: 1009883a mov r4,r2 @@ -8888,9 +8867,9 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 26758: 8009883a mov r4,r16 2675c: 880b883a mov r5,r17 26760: 002e2940 call 2e294 <__eqdf2> - 26764: 103f5a1e bne r2,zero,264d0 <_gp+0xfffe9664> + 26764: 103f5a1e bne r2,zero,264d0 <_dtoa_r+0x6a8> 26768: ad40004c andi r21,r21,1 - 2676c: a83f5826 beq r21,zero,264d0 <_gp+0xfffe9664> + 2676c: a83f5826 beq r21,zero,264d0 <_dtoa_r+0x6a8> 26770: bd3fffc3 ldbu r20,-1(r23) 26774: b8bfffc4 addi r2,r23,-1 26778: 1007883a mov r3,r2 @@ -8905,10 +8884,10 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2679c: a1003fcc andi r4,r20,255 267a0: 2100201c xori r4,r4,128 267a4: 213fe004 addi r4,r4,-128 - 267a8: 217ff726 beq r4,r5,26788 <_gp+0xfffe991c> + 267a8: 217ff726 beq r4,r5,26788 <_dtoa_r+0x960> 267ac: a2000044 addi r8,r20,1 267b0: 12000005 stb r8,0(r2) - 267b4: 003f4606 br 264d0 <_gp+0xfffe9664> + 267b4: 003f4606 br 264d0 <_dtoa_r+0x6a8> 267b8: d9000b17 ldw r4,44(sp) 267bc: 2000c826 beq r4,zero,26ae0 <_dtoa_r+0xcb8> 267c0: d9800317 ldw r6,12(sp) @@ -9036,7 +9015,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 269a8: 01800284 movi r6,10 269ac: 800b883a mov r5,r16 269b0: e009883a mov r4,fp - 269b4: 1cfff216 blt r3,r19,26980 <_gp+0xfffe9b14> + 269b4: 1cfff216 blt r3,r19,26980 <_dtoa_r+0xb58> 269b8: 1011883a mov r8,r2 269bc: d8800617 ldw r2,24(sp) 269c0: 0082370e bge zero,r2,272a0 <_dtoa_r+0x1478> @@ -9068,13 +9047,13 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 26a28: 21403fcc andi r5,r4,255 26a2c: 2940201c xori r5,r5,128 26a30: 297fe004 addi r5,r5,-128 - 26a34: 29bff726 beq r5,r6,26a14 <_gp+0xfffe9ba8> + 26a34: 29bff726 beq r5,r6,26a14 <_dtoa_r+0xbec> 26a38: 21000044 addi r4,r4,1 26a3c: 11000005 stb r4,0(r2) 26a40: a80b883a mov r5,r21 26a44: e009883a mov r4,fp 26a48: 0028c380 call 28c38 <_Bfree> - 26a4c: 883ea026 beq r17,zero,264d0 <_gp+0xfffe9664> + 26a4c: 883ea026 beq r17,zero,264d0 <_dtoa_r+0x6a8> 26a50: 90000426 beq r18,zero,26a64 <_dtoa_r+0xc3c> 26a54: 94400326 beq r18,r17,26a64 <_dtoa_r+0xc3c> 26a58: 900b883a mov r5,r18 @@ -9083,10 +9062,10 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 26a64: 880b883a mov r5,r17 26a68: e009883a mov r4,fp 26a6c: 0028c380 call 28c38 <_Bfree> - 26a70: 003e9706 br 264d0 <_gp+0xfffe9664> + 26a70: 003e9706 br 264d0 <_dtoa_r+0x6a8> 26a74: 01800044 movi r6,1 26a78: d9800e15 stw r6,56(sp) - 26a7c: 003d9606 br 260d8 <_gp+0xfffe926c> + 26a7c: 003d9606 br 260d8 <_dtoa_r+0x2b0> 26a80: d8800817 ldw r2,32(sp) 26a84: d8c00517 ldw r3,20(sp) 26a88: d8000d15 stw zero,52(sp) @@ -9094,11 +9073,11 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 26a90: 00c9c83a sub r4,zero,r3 26a94: d8800815 stw r2,32(sp) 26a98: d9000a15 stw r4,40(sp) - 26a9c: 003d9706 br 260fc <_gp+0xfffe9290> + 26a9c: 003d9706 br 260fc <_dtoa_r+0x2d4> 26aa0: 05adc83a sub r22,zero,r22 26aa4: dd800815 stw r22,32(sp) 26aa8: 002d883a mov r22,zero - 26aac: 003d8e06 br 260e8 <_gp+0xfffe927c> + 26aac: 003d8e06 br 260e8 <_dtoa_r+0x2c0> 26ab0: d9000517 ldw r4,20(sp) 26ab4: 002f5800 call 2f580 <__floatsidf> 26ab8: 100d883a mov r6,r2 @@ -9106,29 +9085,29 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 26ac0: a009883a mov r4,r20 26ac4: 880b883a mov r5,r17 26ac8: 002e2940 call 2e294 <__eqdf2> - 26acc: 103d7126 beq r2,zero,26094 <_gp+0xfffe9228> + 26acc: 103d7126 beq r2,zero,26094 <_dtoa_r+0x26c> 26ad0: d9c00517 ldw r7,20(sp) 26ad4: 39ffffc4 addi r7,r7,-1 26ad8: d9c00515 stw r7,20(sp) - 26adc: 003d6d06 br 26094 <_gp+0xfffe9228> + 26adc: 003d6d06 br 26094 <_dtoa_r+0x26c> 26ae0: dd400a17 ldw r21,40(sp) 26ae4: dd000817 ldw r20,32(sp) 26ae8: 0023883a mov r17,zero - 26aec: 003f4806 br 26810 <_gp+0xfffe99a4> + 26aec: 003f4806 br 26810 <_dtoa_r+0x9e8> 26af0: 10e3c83a sub r17,r2,r3 26af4: 9448983a sll r4,r18,r17 - 26af8: 003d3206 br 25fc4 <_gp+0xfffe9158> + 26af8: 003d3206 br 25fc4 <_dtoa_r+0x19c> 26afc: d8000e15 stw zero,56(sp) - 26b00: 003d7506 br 260d8 <_gp+0xfffe926c> + 26b00: 003d7506 br 260d8 <_dtoa_r+0x2b0> 26b04: b005883a mov r2,r22 - 26b08: 003f4506 br 26820 <_gp+0xfffe99b4> + 26b08: 003f4506 br 26820 <_dtoa_r+0x9f8> 26b0c: dc000915 stw r16,36(sp) 26b10: d9800a17 ldw r6,40(sp) 26b14: d9400917 ldw r5,36(sp) 26b18: e009883a mov r4,fp 26b1c: 00291d00 call 291d0 <__pow5mult> 26b20: 1021883a mov r16,r2 - 26b24: 003f5a06 br 26890 <_gp+0xfffe9a24> + 26b24: 003f5a06 br 26890 <_dtoa_r+0xa68> 26b28: 01c00044 movi r7,1 26b2c: d9c00b15 stw r7,44(sp) 26b30: d8802217 ldw r2,136(sp) @@ -9137,9 +9116,9 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 26b3c: 1021883a mov r16,r2 26b40: d8800c15 stw r2,48(sp) 26b44: d8800615 stw r2,24(sp) - 26b48: 003d8806 br 2616c <_gp+0xfffe9300> + 26b48: 003d8806 br 2616c <_dtoa_r+0x344> 26b4c: d8800617 ldw r2,24(sp) - 26b50: 00be9b16 blt zero,r2,265c0 <_gp+0xfffe9754> + 26b50: 00be9b16 blt zero,r2,265c0 <_dtoa_r+0x798> 26b54: 10010f1e bne r2,zero,26f94 <_dtoa_r+0x116c> 26b58: 880b883a mov r5,r17 26b5c: 000d883a mov r6,zero @@ -9161,26 +9140,26 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 26b9c: a80b883a mov r5,r21 26ba0: e009883a mov r4,fp 26ba4: 0028c380 call 28c38 <_Bfree> - 26ba8: 883e4926 beq r17,zero,264d0 <_gp+0xfffe9664> - 26bac: 003fad06 br 26a64 <_gp+0xfffe9bf8> + 26ba8: 883e4926 beq r17,zero,264d0 <_dtoa_r+0x6a8> + 26bac: 003fad06 br 26a64 <_dtoa_r+0xc3c> 26bb0: d9c01117 ldw r7,68(sp) 26bb4: 3801bc26 beq r7,zero,272a8 <_dtoa_r+0x1480> 26bb8: 10810cc4 addi r2,r2,1075 26bbc: dd400a17 ldw r21,40(sp) 26bc0: dd000817 ldw r20,32(sp) - 26bc4: 003f0a06 br 267f0 <_gp+0xfffe9984> + 26bc4: 003f0a06 br 267f0 <_dtoa_r+0x9c8> 26bc8: 00800704 movi r2,28 26bcc: d9000817 ldw r4,32(sp) 26bd0: a0a9883a add r20,r20,r2 26bd4: b0ad883a add r22,r22,r2 26bd8: 2089883a add r4,r4,r2 26bdc: d9000815 stw r4,32(sp) - 26be0: 003f5106 br 26928 <_gp+0xfffe9abc> + 26be0: 003f5106 br 26928 <_dtoa_r+0xb00> 26be4: d8c00317 ldw r3,12(sp) 26be8: b8c1fc0e bge r23,r3,273dc <_dtoa_r+0x15b4> 26bec: 0027883a mov r19,zero 26bf0: b805883a mov r2,r23 - 26bf4: 003f3e06 br 268f0 <_gp+0xfffe9a84> + 26bf4: 003f3e06 br 268f0 <_dtoa_r+0xac8> 26bf8: 880b883a mov r5,r17 26bfc: e009883a mov r4,fp 26c00: 000f883a mov r7,zero @@ -9268,7 +9247,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 26d48: 0028c600 call 28c60 <__multadd> 26d4c: 1029883a mov r20,r2 26d50: b027883a mov r19,r22 - 26d54: 003fc006 br 26c58 <_gp+0xfffe9dec> + 26d54: 003fc006 br 26c58 <_dtoa_r+0xe30> 26d58: 9011883a mov r8,r18 26d5c: 00800e0e bge zero,r2,26d98 <_dtoa_r+0xf70> 26d60: 800b883a mov r5,r16 @@ -9290,24 +9269,24 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 26da0: 9a000005 stb r8,0(r19) 26da4: a023883a mov r17,r20 26da8: dc000915 stw r16,36(sp) - 26dac: 003f2406 br 26a40 <_gp+0xfffe9bd4> + 26dac: 003f2406 br 26a40 <_dtoa_r+0xc18> 26db0: 00800e44 movi r2,57 26db4: 9011883a mov r8,r18 26db8: 90816626 beq r18,r2,27354 <_dtoa_r+0x152c> - 26dbc: 05bff516 blt zero,r22,26d94 <_gp+0xfffe9f28> - 26dc0: 003ff506 br 26d98 <_gp+0xfffe9f2c> + 26dbc: 05bff516 blt zero,r22,26d94 <_dtoa_r+0xf6c> + 26dc0: 003ff506 br 26d98 <_dtoa_r+0xf70> 26dc4: 0028c600 call 28c60 <__multadd> 26dc8: 1023883a mov r17,r2 26dcc: 1029883a mov r20,r2 - 26dd0: 003fdf06 br 26d50 <_gp+0xfffe9ee4> + 26dd0: 003fdf06 br 26d50 <_dtoa_r+0xf28> 26dd4: e009883a mov r4,fp 26dd8: 0028c380 call 28c38 <_Bfree> 26ddc: 00800044 movi r2,1 - 26de0: 003fbc06 br 26cd4 <_gp+0xfffe9e68> + 26de0: 003fbc06 br 26cd4 <_dtoa_r+0xeac> 26de4: a80b883a mov r5,r21 26de8: 8009883a mov r4,r16 26dec: 00294580 call 29458 <__mcmp> - 26df0: 103edb0e bge r2,zero,26960 <_gp+0xfffe9af4> + 26df0: 103edb0e bge r2,zero,26960 <_dtoa_r+0xb38> 26df4: 800b883a mov r5,r16 26df8: 000f883a mov r7,zero 26dfc: 01800284 movi r6,10 @@ -9318,20 +9297,20 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 26e10: d8c00b17 ldw r3,44(sp) 26e14: 10bfffc4 addi r2,r2,-1 26e18: d8800515 stw r2,20(sp) - 26e1c: 183f761e bne r3,zero,26bf8 <_gp+0xfffe9d8c> + 26e1c: 183f761e bne r3,zero,26bf8 <_dtoa_r+0xdd0> 26e20: d9000c17 ldw r4,48(sp) 26e24: 0101730e bge zero,r4,273f4 <_dtoa_r+0x15cc> 26e28: d9000615 stw r4,24(sp) - 26e2c: 003ed006 br 26970 <_gp+0xfffe9b04> + 26e2c: 003ed006 br 26970 <_dtoa_r+0xb48> 26e30: 00800084 movi r2,2 26e34: 3081861e bne r6,r2,27450 <_dtoa_r+0x1628> 26e38: d8000b15 stw zero,44(sp) - 26e3c: 003f3c06 br 26b30 <_gp+0xfffe9cc4> + 26e3c: 003f3c06 br 26b30 <_dtoa_r+0xd08> 26e40: dc000917 ldw r16,36(sp) - 26e44: 003e9206 br 26890 <_gp+0xfffe9a24> + 26e44: 003e9206 br 26890 <_dtoa_r+0xa68> 26e48: d9c00317 ldw r7,12(sp) 26e4c: 00800084 movi r2,2 - 26e50: 11fec50e bge r2,r7,26968 <_gp+0xfffe9afc> + 26e50: 11fec50e bge r2,r7,26968 <_dtoa_r+0xb40> 26e54: d9000617 ldw r4,24(sp) 26e58: 20013c1e bne r4,zero,2734c <_dtoa_r+0x1524> 26e5c: a80b883a mov r5,r21 @@ -9344,7 +9323,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 26e78: 102b883a mov r21,r2 26e7c: 00294580 call 29458 <__mcmp> 26e80: dc000915 stw r16,36(sp) - 26e84: 00bf410e bge zero,r2,26b8c <_gp+0xfffe9d20> + 26e84: 00bf410e bge zero,r2,26b8c <_dtoa_r+0xd64> 26e88: d9c00717 ldw r7,28(sp) 26e8c: 00800c44 movi r2,49 26e90: 38800005 stb r2,0(r7) @@ -9352,17 +9331,17 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 26e98: 3dc00044 addi r23,r7,1 26e9c: 10800044 addi r2,r2,1 26ea0: d8800515 stw r2,20(sp) - 26ea4: 003f3d06 br 26b9c <_gp+0xfffe9d30> + 26ea4: 003f3d06 br 26b9c <_dtoa_r+0xd74> 26ea8: d9800517 ldw r6,20(sp) 26eac: d9c00717 ldw r7,28(sp) 26eb0: 00800c44 movi r2,49 26eb4: 31800044 addi r6,r6,1 26eb8: d9800515 stw r6,20(sp) 26ebc: 38800005 stb r2,0(r7) - 26ec0: 003edf06 br 26a40 <_gp+0xfffe9bd4> + 26ec0: 003edf06 br 26a40 <_dtoa_r+0xc18> 26ec4: d8000b15 stw zero,44(sp) - 26ec8: 003c9f06 br 26148 <_gp+0xfffe92dc> - 26ecc: 903e7e1e bne r18,zero,268c8 <_gp+0xfffe9a5c> + 26ec8: 003c9f06 br 26148 <_dtoa_r+0x320> + 26ecc: 903e7e1e bne r18,zero,268c8 <_dtoa_r+0xaa0> 26ed0: 00800434 movhi r2,16 26ed4: 10bfffc4 addi r2,r2,-1 26ed8: 9884703a and r2,r19,r2 @@ -9375,9 +9354,9 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 26ef4: 39c00044 addi r7,r7,1 26ef8: d9c00815 stw r7,32(sp) 26efc: d8800d17 ldw r2,52(sp) - 26f00: 103e721e bne r2,zero,268cc <_gp+0xfffe9a60> + 26f00: 103e721e bne r2,zero,268cc <_dtoa_r+0xaa4> 26f04: 00800044 movi r2,1 - 26f08: 003e7906 br 268f0 <_gp+0xfffe9a84> + 26f08: 003e7906 br 268f0 <_dtoa_r+0xac8> 26f0c: 8009883a mov r4,r16 26f10: 002f5800 call 2f580 <__floatsidf> 26f14: d9800f17 ldw r6,60(sp) @@ -9411,12 +9390,12 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 26f84: a809883a mov r4,r21 26f88: a00b883a mov r5,r20 26f8c: 002e3f80 call 2e3f8 <__ledf2> - 26f90: 103d7e0e bge r2,zero,2658c <_gp+0xfffe9720> + 26f90: 103d7e0e bge r2,zero,2658c <_dtoa_r+0x764> 26f94: 002b883a mov r21,zero 26f98: 0023883a mov r17,zero - 26f9c: 003efb06 br 26b8c <_gp+0xfffe9d20> + 26f9c: 003efb06 br 26b8c <_dtoa_r+0xd64> 26fa0: d8800717 ldw r2,28(sp) - 26fa4: 003bd006 br 25ee8 <_gp+0xfffe907c> + 26fa4: 003bd006 br 25ee8 <_dtoa_r+0xc0> 26fa8: d9000a17 ldw r4,40(sp) 26fac: d9800d17 ldw r6,52(sp) 26fb0: dd400a15 stw r21,40(sp) @@ -9424,30 +9403,30 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 26fb8: 308d883a add r6,r6,r2 26fbc: d9800d15 stw r6,52(sp) 26fc0: 002b883a mov r21,zero - 26fc4: 003e0606 br 267e0 <_gp+0xfffe9974> + 26fc4: 003e0606 br 267e0 <_dtoa_r+0x9b8> 26fc8: 9023883a mov r17,r18 26fcc: 9829883a mov r20,r19 26fd0: 04000084 movi r16,2 - 26fd4: 003c9206 br 26220 <_gp+0xfffe93b4> + 26fd4: 003c9206 br 26220 <_dtoa_r+0x3f8> 26fd8: 04000044 movi r16,1 26fdc: dc000c15 stw r16,48(sp) 26fe0: dc000615 stw r16,24(sp) 26fe4: dc002215 stw r16,136(sp) 26fe8: e0001115 stw zero,68(fp) 26fec: 000b883a mov r5,zero - 26ff0: 003c6906 br 26198 <_gp+0xfffe932c> + 26ff0: 003c6906 br 26198 <_dtoa_r+0x370> 26ff4: 3021883a mov r16,r6 - 26ff8: 003ffb06 br 26fe8 <_gp+0xfffea17c> + 26ff8: 003ffb06 br 26fe8 <_dtoa_r+0x11c0> 26ffc: 1000021e bne r2,zero,27008 <_dtoa_r+0x11e0> 27000: 4200004c andi r8,r8,1 - 27004: 403e7d1e bne r8,zero,269fc <_gp+0xfffe9b90> + 27004: 403e7d1e bne r8,zero,269fc <_dtoa_r+0xbd4> 27008: 01000c04 movi r4,48 2700c: 00000106 br 27014 <_dtoa_r+0x11ec> 27010: 102f883a mov r23,r2 27014: b8bfffc4 addi r2,r23,-1 27018: 10c00007 ldb r3,0(r2) - 2701c: 193ffc26 beq r3,r4,27010 <_gp+0xfffea1a4> - 27020: 003e8706 br 26a40 <_gp+0xfffe9bd4> + 2701c: 193ffc26 beq r3,r4,27010 <_dtoa_r+0x11e8> + 27020: 003e8706 br 26a40 <_dtoa_r+0xc18> 27024: d8800517 ldw r2,20(sp) 27028: 00a3c83a sub r17,zero,r2 2702c: 8800a426 beq r17,zero,272c0 <_dtoa_r+0x1498> @@ -9478,17 +9457,17 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 27090: 84000044 addi r16,r16,1 27094: 002e4ec0 call 2e4ec <__muldf3> 27098: a5000204 addi r20,r20,8 - 2709c: 883ff51e bne r17,zero,27074 <_gp+0xfffea208> + 2709c: 883ff51e bne r17,zero,27074 <_dtoa_r+0x124c> 270a0: d8800f15 stw r2,60(sp) 270a4: d8c01015 stw r3,64(sp) - 270a8: 003c7606 br 26284 <_gp+0xfffe9418> + 270a8: 003c7606 br 26284 <_dtoa_r+0x45c> 270ac: 00c00c04 movi r3,48 270b0: 10c00005 stb r3,0(r2) 270b4: d8c00517 ldw r3,20(sp) 270b8: bd3fffc3 ldbu r20,-1(r23) 270bc: 18c00044 addi r3,r3,1 270c0: d8c00515 stw r3,20(sp) - 270c4: 003db906 br 267ac <_gp+0xfffe9940> + 270c4: 003db906 br 267ac <_dtoa_r+0x984> 270c8: 89400117 ldw r5,4(r17) 270cc: e009883a mov r4,fp 270d0: 0028b900 call 28b90 <_Balloc> @@ -9505,18 +9484,18 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 270fc: e009883a mov r4,fp 27100: 00293100 call 29310 <__lshift> 27104: 1029883a mov r20,r2 - 27108: 003ecc06 br 26c3c <_gp+0xfffe9dd0> + 27108: 003ecc06 br 26c3c <_dtoa_r+0xe14> 2710c: 00800e44 movi r2,57 27110: 90809026 beq r18,r2,27354 <_dtoa_r+0x152c> 27114: 92000044 addi r8,r18,1 - 27118: 003f1f06 br 26d98 <_gp+0xfffe9f2c> + 27118: 003f1f06 br 26d98 <_dtoa_r+0xf70> 2711c: 9011883a mov r8,r18 27120: 8825883a mov r18,r17 27124: a023883a mov r17,r20 - 27128: 003e2906 br 269d0 <_gp+0xfffe9b64> + 27128: 003e2906 br 269d0 <_dtoa_r+0xba8> 2712c: 002b883a mov r21,zero 27130: 0023883a mov r17,zero - 27134: 003f5406 br 26e88 <_gp+0xfffea01c> + 27134: 003f5406 br 26e88 <_dtoa_r+0x1060> 27138: 61bfffc4 addi r6,r12,-1 2713c: 300490fa slli r2,r6,3 27140: 00c000f4 movhi r3,3 @@ -9580,7 +9559,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 27228: 002ec040 call 2ec04 <__subdf3> 2722c: ad400044 addi r21,r21,1 27230: ac3fffc5 stb r16,-1(r21) - 27234: ac7fea1e bne r21,r17,271e0 <_gp+0xfffea374> + 27234: ac7fea1e bne r21,r17,271e0 <_dtoa_r+0x13b8> 27238: 1023883a mov r17,r2 2723c: d8801217 ldw r2,72(sp) 27240: dc800f17 ldw r18,60(sp) @@ -9600,29 +9579,29 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 27278: d9001317 ldw r4,76(sp) 2727c: bd3fffc3 ldbu r20,-1(r23) 27280: d9000515 stw r4,20(sp) - 27284: 003d3b06 br 26774 <_gp+0xfffe9908> + 27284: 003d3b06 br 26774 <_dtoa_r+0x94c> 27288: 0027883a mov r19,zero - 2728c: 003f1b06 br 26efc <_gp+0xfffea090> + 2728c: 003f1b06 br 26efc <_dtoa_r+0x10d4> 27290: d8800817 ldw r2,32(sp) 27294: 11e9c83a sub r20,r2,r7 27298: 0005883a mov r2,zero - 2729c: 003d5406 br 267f0 <_gp+0xfffe9984> + 2729c: 003d5406 br 267f0 <_dtoa_r+0x9c8> 272a0: 00800044 movi r2,1 - 272a4: 003dc706 br 269c4 <_gp+0xfffe9b58> + 272a4: 003dc706 br 269c4 <_dtoa_r+0xb9c> 272a8: d8c00217 ldw r3,8(sp) 272ac: 00800d84 movi r2,54 272b0: dd400a17 ldw r21,40(sp) 272b4: 10c5c83a sub r2,r2,r3 272b8: dd000817 ldw r20,32(sp) - 272bc: 003d4c06 br 267f0 <_gp+0xfffe9984> + 272bc: 003d4c06 br 267f0 <_dtoa_r+0x9c8> 272c0: dc800f15 stw r18,60(sp) 272c4: dcc01015 stw r19,64(sp) 272c8: 04000084 movi r16,2 - 272cc: 003bed06 br 26284 <_gp+0xfffe9418> + 272cc: 003bed06 br 26284 <_dtoa_r+0x45c> 272d0: d9000617 ldw r4,24(sp) - 272d4: 203f0d26 beq r4,zero,26f0c <_gp+0xfffea0a0> + 272d4: 203f0d26 beq r4,zero,26f0c <_dtoa_r+0x10e4> 272d8: d9800c17 ldw r6,48(sp) - 272dc: 01bcab0e bge zero,r6,2658c <_gp+0xfffe9720> + 272dc: 01bcab0e bge zero,r6,2658c <_dtoa_r+0x764> 272e0: d9401017 ldw r5,64(sp) 272e4: d9000f17 ldw r4,60(sp) 272e8: 000d883a mov r6,zero @@ -9649,16 +9628,16 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2733c: d9c01315 stw r7,76(sp) 27340: 1c63883a add r17,r3,r17 27344: db000c17 ldw r12,48(sp) - 27348: 003bea06 br 262f4 <_gp+0xfffe9488> + 27348: 003bea06 br 262f4 <_dtoa_r+0x4cc> 2734c: dc000915 stw r16,36(sp) - 27350: 003e0e06 br 26b8c <_gp+0xfffe9d20> + 27350: 003e0e06 br 26b8c <_dtoa_r+0xd64> 27354: 01000e44 movi r4,57 27358: 8825883a mov r18,r17 2735c: 9dc00044 addi r23,r19,1 27360: 99000005 stb r4,0(r19) 27364: a023883a mov r17,r20 27368: dc000915 stw r16,36(sp) - 2736c: 003da406 br 26a00 <_gp+0xfffe9b94> + 2736c: 003da406 br 26a00 <_dtoa_r+0xbd8> 27370: d9801417 ldw r6,80(sp) 27374: d9c01517 ldw r7,84(sp) 27378: 0009883a mov r4,zero @@ -9669,52 +9648,52 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2738c: 1009883a mov r4,r2 27390: 180b883a mov r5,r3 27394: 002e31c0 call 2e31c <__gedf2> - 27398: 00bc7c0e bge zero,r2,2658c <_gp+0xfffe9720> + 27398: 00bc7c0e bge zero,r2,2658c <_dtoa_r+0x764> 2739c: 01000c04 movi r4,48 273a0: 00000106 br 273a8 <_dtoa_r+0x1580> 273a4: 102f883a mov r23,r2 273a8: b8bfffc4 addi r2,r23,-1 273ac: 10c00007 ldb r3,0(r2) - 273b0: 193ffc26 beq r3,r4,273a4 <_gp+0xfffea538> + 273b0: 193ffc26 beq r3,r4,273a4 <_dtoa_r+0x157c> 273b4: d9801317 ldw r6,76(sp) 273b8: d9800515 stw r6,20(sp) - 273bc: 003c4406 br 264d0 <_gp+0xfffe9664> + 273bc: 003c4406 br 264d0 <_dtoa_r+0x6a8> 273c0: d9801317 ldw r6,76(sp) 273c4: d9800515 stw r6,20(sp) - 273c8: 003cea06 br 26774 <_gp+0xfffe9908> + 273c8: 003cea06 br 26774 <_dtoa_r+0x94c> 273cc: dd800f17 ldw r22,60(sp) 273d0: dcc01017 ldw r19,64(sp) 273d4: dc801217 ldw r18,72(sp) - 273d8: 003c6c06 br 2658c <_gp+0xfffe9720> - 273dc: 903e031e bne r18,zero,26bec <_gp+0xfffe9d80> - 273e0: 003ebb06 br 26ed0 <_gp+0xfffea064> - 273e4: 103e6c1e bne r2,zero,26d98 <_gp+0xfffe9f2c> + 273d8: 003c6c06 br 2658c <_dtoa_r+0x764> + 273dc: 903e031e bne r18,zero,26bec <_dtoa_r+0xdc4> + 273e0: 003ebb06 br 26ed0 <_dtoa_r+0x10a8> + 273e4: 103e6c1e bne r2,zero,26d98 <_dtoa_r+0xf70> 273e8: 4080004c andi r2,r8,1 - 273ec: 103e6a26 beq r2,zero,26d98 <_gp+0xfffe9f2c> - 273f0: 003e6606 br 26d8c <_gp+0xfffe9f20> + 273ec: 103e6a26 beq r2,zero,26d98 <_dtoa_r+0xf70> + 273f0: 003e6606 br 26d8c <_dtoa_r+0xf64> 273f4: d8c00317 ldw r3,12(sp) 273f8: 00800084 movi r2,2 273fc: 10c02916 blt r2,r3,274a4 <_dtoa_r+0x167c> 27400: d9000c17 ldw r4,48(sp) - 27404: 003e8806 br 26e28 <_gp+0xfffe9fbc> + 27404: 003e8806 br 26e28 <_dtoa_r+0x1000> 27408: 04000084 movi r16,2 - 2740c: 003b9d06 br 26284 <_gp+0xfffe9418> + 2740c: 003b9d06 br 26284 <_dtoa_r+0x45c> 27410: d9001317 ldw r4,76(sp) 27414: d9000515 stw r4,20(sp) - 27418: 003cd606 br 26774 <_gp+0xfffe9908> + 27418: 003cd606 br 26774 <_dtoa_r+0x94c> 2741c: d8801317 ldw r2,76(sp) 27420: d8800515 stw r2,20(sp) - 27424: 003c2a06 br 264d0 <_gp+0xfffe9664> + 27424: 003c2a06 br 264d0 <_dtoa_r+0x6a8> 27428: d9800317 ldw r6,12(sp) 2742c: 00800084 movi r2,2 27430: 11801516 blt r2,r6,27488 <_dtoa_r+0x1660> 27434: d9c00c17 ldw r7,48(sp) 27438: d9c00615 stw r7,24(sp) - 2743c: 003df706 br 26c1c <_gp+0xfffe9db0> - 27440: 193d3926 beq r3,r4,26928 <_gp+0xfffe9abc> + 2743c: 003df706 br 26c1c <_dtoa_r+0xdf4> + 27440: 193d3926 beq r3,r4,26928 <_dtoa_r+0xb00> 27444: 00c00f04 movi r3,60 27448: 1885c83a sub r2,r3,r2 - 2744c: 003ddf06 br 26bcc <_gp+0xfffe9d60> + 2744c: 003ddf06 br 26bcc <_dtoa_r+0xda4> 27450: e009883a mov r4,fp 27454: e0001115 stw zero,68(fp) 27458: 000b883a mov r5,zero @@ -9728,17 +9707,17 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 27478: d9000b15 stw r4,44(sp) 2747c: d8800615 stw r2,24(sp) 27480: d8002215 stw zero,136(sp) - 27484: 003c4106 br 2658c <_gp+0xfffe9720> + 27484: 003c4106 br 2658c <_dtoa_r+0x764> 27488: d8c00c17 ldw r3,48(sp) 2748c: d8c00615 stw r3,24(sp) - 27490: 003e7006 br 26e54 <_gp+0xfffe9fe8> + 27490: 003e7006 br 26e54 <_dtoa_r+0x102c> 27494: 04400044 movi r17,1 - 27498: 003b2006 br 2611c <_gp+0xfffe92b0> + 27498: 003b2006 br 2611c <_dtoa_r+0x2f4> 2749c: 000b883a mov r5,zero - 274a0: 003b3d06 br 26198 <_gp+0xfffe932c> + 274a0: 003b3d06 br 26198 <_dtoa_r+0x370> 274a4: d8800c17 ldw r2,48(sp) 274a8: d8800615 stw r2,24(sp) - 274ac: 003e6906 br 26e54 <_gp+0xfffe9fe8> + 274ac: 003e6906 br 26e54 <_dtoa_r+0x102c> 000274b0 <__sflush_r>: 274b0: 2880030b ldhu r2,12(r5) @@ -9802,7 +9781,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 27598: dec00504 addi sp,sp,20 2759c: f800283a ret 275a0: 2c800417 ldw r18,16(r5) - 275a4: 903ff626 beq r18,zero,27580 <_gp+0xfffea714> + 275a4: 903ff626 beq r18,zero,27580 <__sflush_r+0xd0> 275a8: 2c000017 ldw r16,0(r5) 275ac: 108000cc andi r2,r2,3 275b0: 2c800015 stw r18,0(r5) @@ -9811,9 +9790,9 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 275bc: 28800517 ldw r2,20(r5) 275c0: 88800215 stw r2,8(r17) 275c4: 04000316 blt zero,r16,275d4 <__sflush_r+0x124> - 275c8: 003fed06 br 27580 <_gp+0xfffea714> + 275c8: 003fed06 br 27580 <__sflush_r+0xd0> 275cc: 90a5883a add r18,r18,r2 - 275d0: 043feb0e bge zero,r16,27580 <_gp+0xfffea714> + 275d0: 043feb0e bge zero,r16,27580 <__sflush_r+0xd0> 275d4: 88800917 ldw r2,36(r17) 275d8: 89400717 ldw r5,28(r17) 275dc: 800f883a mov r7,r16 @@ -9821,19 +9800,19 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 275e4: 9809883a mov r4,r19 275e8: 103ee83a callr r2 275ec: 80a1c83a sub r16,r16,r2 - 275f0: 00bff616 blt zero,r2,275cc <_gp+0xfffea760> + 275f0: 00bff616 blt zero,r2,275cc <__sflush_r+0x11c> 275f4: 88c0030b ldhu r3,12(r17) 275f8: 00bfffc4 movi r2,-1 275fc: 18c01014 ori r3,r3,64 27600: 88c0030d sth r3,12(r17) - 27604: 003fdf06 br 27584 <_gp+0xfffea718> + 27604: 003fdf06 br 27584 <__sflush_r+0xd4> 27608: 0005883a mov r2,zero - 2760c: 003fec06 br 275c0 <_gp+0xfffea754> + 2760c: 003fec06 br 275c0 <__sflush_r+0x110> 27610: 88801415 stw r2,80(r17) - 27614: 003fd206 br 27560 <_gp+0xfffea6f4> + 27614: 003fd206 br 27560 <__sflush_r+0xb0> 27618: 28c00f17 ldw r3,60(r5) - 2761c: 00ffb316 blt zero,r3,274ec <_gp+0xfffea680> - 27620: 003fd706 br 27580 <_gp+0xfffea714> + 2761c: 00ffb316 blt zero,r3,274ec <__sflush_r+0x3c> + 27620: 003fd706 br 27580 <__sflush_r+0xd0> 27624: 89400717 ldw r5,28(r17) 27628: 000d883a mov r6,zero 2762c: 01c00044 movi r7,1 @@ -9844,9 +9823,9 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 27640: 30801426 beq r6,r2,27694 <__sflush_r+0x1e4> 27644: 8880030b ldhu r2,12(r17) 27648: 8a000a17 ldw r8,40(r17) - 2764c: 003fae06 br 27508 <_gp+0xfffea69c> + 2764c: 003fae06 br 27508 <__sflush_r+0x58> 27650: 98c00017 ldw r3,0(r19) - 27654: 183fba26 beq r3,zero,27540 <_gp+0xfffea6d4> + 27654: 183fba26 beq r3,zero,27540 <__sflush_r+0x90> 27658: 01000744 movi r4,29 2765c: 19000626 beq r3,r4,27678 <__sflush_r+0x1c8> 27660: 01000584 movi r4,22 @@ -9854,28 +9833,28 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 27668: 88c0030b ldhu r3,12(r17) 2766c: 18c01014 ori r3,r3,64 27670: 88c0030d sth r3,12(r17) - 27674: 003fc306 br 27584 <_gp+0xfffea718> + 27674: 003fc306 br 27584 <__sflush_r+0xd4> 27678: 8880030b ldhu r2,12(r17) 2767c: 88c00417 ldw r3,16(r17) 27680: 88000115 stw zero,4(r17) 27684: 10bdffcc andi r2,r2,63487 27688: 8880030d sth r2,12(r17) 2768c: 88c00015 stw r3,0(r17) - 27690: 003fb306 br 27560 <_gp+0xfffea6f4> + 27690: 003fb306 br 27560 <__sflush_r+0xb0> 27694: 98800017 ldw r2,0(r19) - 27698: 103fea26 beq r2,zero,27644 <_gp+0xfffea7d8> + 27698: 103fea26 beq r2,zero,27644 <__sflush_r+0x194> 2769c: 00c00744 movi r3,29 276a0: 10c00226 beq r2,r3,276ac <__sflush_r+0x1fc> 276a4: 00c00584 movi r3,22 276a8: 10c0031e bne r2,r3,276b8 <__sflush_r+0x208> 276ac: 9c000015 stw r16,0(r19) 276b0: 0005883a mov r2,zero - 276b4: 003fb306 br 27584 <_gp+0xfffea718> + 276b4: 003fb306 br 27584 <__sflush_r+0xd4> 276b8: 88c0030b ldhu r3,12(r17) 276bc: 3005883a mov r2,r6 276c0: 18c01014 ori r3,r3,64 276c4: 88c0030d sth r3,12(r17) - 276c8: 003fae06 br 27584 <_gp+0xfffea718> + 276c8: 003fae06 br 27584 <__sflush_r+0xd4> 000276cc <_fflush_r>: 276cc: defffd04 addi sp,sp,-12 @@ -9900,7 +9879,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 27718: d9400015 stw r5,0(sp) 2771c: 0027aa80 call 27aa8 <__sinit> 27720: d9400017 ldw r5,0(sp) - 27724: 003ff006 br 276e8 <_gp+0xfffea87c> + 27724: 003ff006 br 276e8 <_fflush_r+0x1c> 00027728 : 27728: 20000526 beq r4,zero,27740 @@ -10092,11 +10071,11 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 279e0: 213fffc4 addi r4,r4,-1 279e4: 1c3ffd04 addi r16,r3,-12 279e8: 18c01a04 addi r3,r3,104 - 279ec: 247ffa1e bne r4,r17,279d8 <_gp+0xfffeab6c> + 279ec: 247ffa1e bne r4,r17,279d8 <__sfp+0x60> 279f0: 90800017 ldw r2,0(r18) 279f4: 10001d26 beq r2,zero,27a6c <__sfp+0xf4> 279f8: 1025883a mov r18,r2 - 279fc: 003fee06 br 279b8 <_gp+0xfffeab4c> + 279fc: 003fee06 br 279b8 <__sfp+0x40> 27a00: 00bfffc4 movi r2,-1 27a04: 8080038d sth r2,14(r16) 27a08: 00800044 movi r2,1 @@ -10128,11 +10107,11 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 27a70: 9809883a mov r4,r19 27a74: 00279100 call 27910 <__sfmoreglue> 27a78: 90800015 stw r2,0(r18) - 27a7c: 103fde1e bne r2,zero,279f8 <_gp+0xfffeab8c> + 27a7c: 103fde1e bne r2,zero,279f8 <__sfp+0x80> 27a80: 00800304 movi r2,12 27a84: 98800015 stw r2,0(r19) 27a88: 0005883a mov r2,zero - 27a8c: 003ff006 br 27a50 <_gp+0xfffeabe4> + 27a8c: 003ff006 br 27a50 <__sfp+0xd8> 00027a90 <_cleanup>: 27a90: 008000f4 movhi r2,3 @@ -10232,14 +10211,14 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 27bc8: 1c000015 stw r16,0(r3) 27bcc: 002fec80 call 2fec8 <__malloc_unlock> 27bd0: 00800044 movi r2,1 - 27bd4: 003fe706 br 27b74 <_gp+0xfffead08> + 27bd4: 003fe706 br 27b74 <_malloc_trim_r+0x7c> 27bd8: 000b883a mov r5,zero 27bdc: 9009883a mov r4,r18 27be0: 00237180 call 23718 <_sbrk_r> 27be4: 99000217 ldw r4,8(r19) 27be8: 014003c4 movi r5,15 27bec: 1107c83a sub r3,r2,r4 - 27bf0: 28ffdd0e bge r5,r3,27b68 <_gp+0xfffeacfc> + 27bf0: 28ffdd0e bge r5,r3,27b68 <_malloc_trim_r+0x70> 27bf4: 014000f4 movhi r5,3 27bf8: 2953a004 addi r5,r5,20096 27bfc: 29400017 ldw r5,0(r5) @@ -10249,7 +10228,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 27c0c: 1145c83a sub r2,r2,r5 27c10: 18dc6404 addi r3,r3,29072 27c14: 18800015 stw r2,0(r3) - 27c18: 003fd306 br 27b68 <_gp+0xfffeacfc> + 27c18: 003fd306 br 27b68 <_malloc_trim_r+0x70> 00027c1c <_free_r>: 27c1c: 28004126 beq r5,zero,27d24 <_free_r+0x108> @@ -10339,13 +10318,13 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 27d6c: 29ca703a and r5,r5,r7 27d70: 1140022e bgeu r2,r5,27d7c <_free_r+0x160> 27d74: 18c00217 ldw r3,8(r3) - 27d78: 20fffb1e bne r4,r3,27d68 <_gp+0xfffeaefc> + 27d78: 20fffb1e bne r4,r3,27d68 <_free_r+0x14c> 27d7c: 19000317 ldw r4,12(r3) 27d80: 31000315 stw r4,12(r6) 27d84: 30c00215 stw r3,8(r6) 27d88: 21800215 stw r6,8(r4) 27d8c: 19800315 stw r6,12(r3) - 27d90: 003fde06 br 27d0c <_gp+0xfffeaea0> + 27d90: 003fde06 br 27d0c <_free_r+0xf0> 27d94: 29c00217 ldw r7,8(r5) 27d98: 10c5883a add r2,r2,r3 27d9c: 00c000f4 movhi r3,3 @@ -10358,7 +10337,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 27db8: 41c00215 stw r7,8(r8) 27dbc: 31400115 stw r5,4(r6) 27dc0: 18800015 stw r2,0(r3) - 27dc4: 003fbd06 br 27cbc <_gp+0xfffeae50> + 27dc4: 003fbd06 br 27cbc <_free_r+0xa0> 27dc8: 39c0004c andi r7,r7,1 27dcc: 10c5883a add r2,r2,r3 27dd0: 3800071e bne r7,zero,27df0 <_free_r+0x1d4> @@ -10375,13 +10354,13 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 27dfc: 18d3a104 addi r3,r3,20100 27e00: 18c00017 ldw r3,0(r3) 27e04: 21800215 stw r6,8(r4) - 27e08: 10ffc036 bltu r2,r3,27d0c <_gp+0xfffeaea0> + 27e08: 10ffc036 bltu r2,r3,27d0c <_free_r+0xf0> 27e0c: 008000f4 movhi r2,3 27e10: 109c5804 addi r2,r2,29024 27e14: 11400017 ldw r5,0(r2) 27e18: 8809883a mov r4,r17 27e1c: 0027af80 call 27af8 <_malloc_trim_r> - 27e20: 003fba06 br 27d0c <_gp+0xfffeaea0> + 27e20: 003fba06 br 27d0c <_free_r+0xf0> 27e24: 28c9883a add r4,r5,r3 27e28: 21000117 ldw r4,4(r4) 27e2c: 2100004c andi r4,r4,1 @@ -10395,13 +10374,13 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 27e4c: 30c00115 stw r3,4(r6) 27e50: 308d883a add r6,r6,r2 27e54: 30800015 stw r2,0(r6) - 27e58: 003fac06 br 27d0c <_gp+0xfffeaea0> + 27e58: 003fac06 br 27d0c <_free_r+0xf0> 27e5c: 00c00504 movi r3,20 27e60: 19401536 bltu r3,r5,27eb8 <_free_r+0x29c> 27e64: 28c01704 addi r3,r5,92 27e68: 18c7883a add r3,r3,r3 27e6c: 294016c4 addi r5,r5,91 - 27e70: 003fb406 br 27d44 <_gp+0xfffeaed8> + 27e70: 003fb406 br 27d44 <_free_r+0x128> 27e74: 280bd0ba srai r5,r5,2 27e78: 00c00044 movi r3,1 27e7c: 38800117 ldw r2,4(r7) @@ -10409,7 +10388,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 27e84: 2007883a mov r3,r4 27e88: 2884b03a or r2,r5,r2 27e8c: 38800115 stw r2,4(r7) - 27e90: 003fbb06 br 27d80 <_gp+0xfffeaf14> + 27e90: 003fbb06 br 27d80 <_free_r+0x164> 27e94: 21800515 stw r6,20(r4) 27e98: 21800415 stw r6,16(r4) 27e9c: 10c00054 ori r3,r2,1 @@ -10418,36 +10397,36 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 27ea8: 30c00115 stw r3,4(r6) 27eac: 308d883a add r6,r6,r2 27eb0: 30800015 stw r2,0(r6) - 27eb4: 003f9506 br 27d0c <_gp+0xfffeaea0> + 27eb4: 003f9506 br 27d0c <_free_r+0xf0> 27eb8: 00c01504 movi r3,84 27ebc: 19400536 bltu r3,r5,27ed4 <_free_r+0x2b8> 27ec0: 100ad33a srli r5,r2,12 27ec4: 28c01bc4 addi r3,r5,111 27ec8: 18c7883a add r3,r3,r3 27ecc: 29401b84 addi r5,r5,110 - 27ed0: 003f9c06 br 27d44 <_gp+0xfffeaed8> + 27ed0: 003f9c06 br 27d44 <_free_r+0x128> 27ed4: 00c05504 movi r3,340 27ed8: 19400536 bltu r3,r5,27ef0 <_free_r+0x2d4> 27edc: 100ad3fa srli r5,r2,15 27ee0: 28c01e04 addi r3,r5,120 27ee4: 18c7883a add r3,r3,r3 27ee8: 29401dc4 addi r5,r5,119 - 27eec: 003f9506 br 27d44 <_gp+0xfffeaed8> + 27eec: 003f9506 br 27d44 <_free_r+0x128> 27ef0: 00c15504 movi r3,1364 27ef4: 19400536 bltu r3,r5,27f0c <_free_r+0x2f0> 27ef8: 100ad4ba srli r5,r2,18 27efc: 28c01f44 addi r3,r5,125 27f00: 18c7883a add r3,r3,r3 27f04: 29401f04 addi r5,r5,124 - 27f08: 003f8e06 br 27d44 <_gp+0xfffeaed8> + 27f08: 003f8e06 br 27d44 <_free_r+0x128> 27f0c: 00c03f84 movi r3,254 27f10: 01401f84 movi r5,126 - 27f14: 003f8b06 br 27d44 <_gp+0xfffeaed8> + 27f14: 003f8b06 br 27d44 <_free_r+0x128> 27f18: 10c00054 ori r3,r2,1 27f1c: 30c00115 stw r3,4(r6) 27f20: 308d883a add r6,r6,r2 27f24: 30800015 stw r2,0(r6) - 27f28: 003f7806 br 27d0c <_gp+0xfffeaea0> + 27f28: 003f7806 br 27d0c <_free_r+0xf0> 00027f2c <__sfvwrite_r>: 27f2c: 30800217 ldw r2,8(r6) @@ -10494,7 +10473,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 27fd0: 90a5c83a sub r18,r18,r2 27fd4: 1885c83a sub r2,r3,r2 27fd8: a0800215 stw r2,8(r20) - 27fdc: 103fef1e bne r2,zero,27f9c <_gp+0xfffeb130> + 27fdc: 103fef1e bne r2,zero,27f9c <__sfvwrite_r+0x70> 27fe0: 0005883a mov r2,zero 27fe4: dfc00b17 ldw ra,44(sp) 27fe8: df000a17 ldw fp,40(sp) @@ -10515,7 +10494,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 28024: 80c0030b ldhu r3,12(r16) 28028: a4400017 ldw r17,0(r20) 2802c: 1880008c andi r2,r3,2 - 28030: 103fd61e bne r2,zero,27f8c <_gp+0xfffeb120> + 28030: 103fd61e bne r2,zero,27f8c <__sfvwrite_r+0x60> 28034: 1880004c andi r2,r3,1 28038: 10003f1e bne r2,zero,28138 <__sfvwrite_r+0x20c> 2803c: 0039883a mov fp,zero @@ -10544,17 +10523,17 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 28098: 90a5c83a sub r18,r18,r2 2809c: 18a7c83a sub r19,r3,r2 280a0: a4c00215 stw r19,8(r20) - 280a4: 983fce26 beq r19,zero,27fe0 <_gp+0xfffeb174> + 280a4: 983fce26 beq r19,zero,27fe0 <__sfvwrite_r+0xb4> 280a8: 80c0030b ldhu r3,12(r16) - 280ac: 903fe61e bne r18,zero,28048 <_gp+0xfffeb1dc> + 280ac: 903fe61e bne r18,zero,28048 <__sfvwrite_r+0x11c> 280b0: 8f000017 ldw fp,0(r17) 280b4: 8c800117 ldw r18,4(r17) 280b8: 8c400204 addi r17,r17,8 - 280bc: 003fe106 br 28044 <_gp+0xfffeb1d8> + 280bc: 003fe106 br 28044 <__sfvwrite_r+0x118> 280c0: 8cc00017 ldw r19,0(r17) 280c4: 8c800117 ldw r18,4(r17) 280c8: 8c400204 addi r17,r17,8 - 280cc: 003fb306 br 27f9c <_gp+0xfffeb130> + 280cc: 003fb306 br 27f9c <__sfvwrite_r+0x70> 280d0: 0005883a mov r2,zero 280d4: f800283a ret 280d8: 81000017 ldw r4,0(r16) @@ -10575,12 +10554,12 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 28114: e00d883a mov r6,fp 28118: a809883a mov r4,r21 2811c: 103ee83a callr r2 - 28120: 00bfdb16 blt zero,r2,28090 <_gp+0xfffeb224> + 28120: 00bfdb16 blt zero,r2,28090 <__sfvwrite_r+0x164> 28124: 8080030b ldhu r2,12(r16) 28128: 10801014 ori r2,r2,64 2812c: 8080030d sth r2,12(r16) 28130: 00bfffc4 movi r2,-1 - 28134: 003fab06 br 27fe4 <_gp+0xfffeb178> + 28134: 003fab06 br 27fe4 <__sfvwrite_r+0xb8> 28138: 0027883a mov r19,zero 2813c: 0011883a mov r8,zero 28140: 0039883a mov fp,zero @@ -10607,7 +10586,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 28194: 103ee83a callr r2 28198: 102f883a mov r23,r2 2819c: da000117 ldw r8,4(sp) - 281a0: 00bfe00e bge zero,r2,28124 <_gp+0xfffeb2b8> + 281a0: 00bfe00e bge zero,r2,28124 <__sfvwrite_r+0x1f8> 281a4: 9de7c83a sub r19,r19,r23 281a8: 98001f26 beq r19,zero,28228 <__sfvwrite_r+0x2fc> 281ac: a0800217 ldw r2,8(r20) @@ -10615,13 +10594,13 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 281b4: 95e5c83a sub r18,r18,r23 281b8: 15efc83a sub r23,r2,r23 281bc: a5c00215 stw r23,8(r20) - 281c0: b83f8726 beq r23,zero,27fe0 <_gp+0xfffeb174> - 281c4: 903fe11e bne r18,zero,2814c <_gp+0xfffeb2e0> + 281c0: b83f8726 beq r23,zero,27fe0 <__sfvwrite_r+0xb4> + 281c4: 903fe11e bne r18,zero,2814c <__sfvwrite_r+0x220> 281c8: 8f000017 ldw fp,0(r17) 281cc: 8c800117 ldw r18,4(r17) 281d0: 0011883a mov r8,zero 281d4: 8c400204 addi r17,r17,8 - 281d8: 003fdb06 br 28148 <_gp+0xfffeb2dc> + 281d8: 003fdb06 br 28148 <__sfvwrite_r+0x21c> 281dc: 180d883a mov r6,r3 281e0: e00b883a mov r5,fp 281e4: da000115 stw r8,4(sp) @@ -10637,16 +10616,16 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2820c: 00276cc0 call 276cc <_fflush_r> 28210: d8c00017 ldw r3,0(sp) 28214: da000117 ldw r8,4(sp) - 28218: 103fc21e bne r2,zero,28124 <_gp+0xfffeb2b8> + 28218: 103fc21e bne r2,zero,28124 <__sfvwrite_r+0x1f8> 2821c: 182f883a mov r23,r3 28220: 9de7c83a sub r19,r19,r23 - 28224: 983fe11e bne r19,zero,281ac <_gp+0xfffeb340> + 28224: 983fe11e bne r19,zero,281ac <__sfvwrite_r+0x280> 28228: 800b883a mov r5,r16 2822c: a809883a mov r4,r21 28230: 00276cc0 call 276cc <_fflush_r> - 28234: 103fbb1e bne r2,zero,28124 <_gp+0xfffeb2b8> + 28234: 103fbb1e bne r2,zero,28124 <__sfvwrite_r+0x1f8> 28238: 0011883a mov r8,zero - 2823c: 003fdb06 br 281ac <_gp+0xfffeb340> + 2823c: 003fdb06 br 281ac <__sfvwrite_r+0x280> 28240: 94c0012e bgeu r18,r19,28248 <__sfvwrite_r+0x31c> 28244: 9027883a mov r19,r18 28248: 980d883a mov r6,r19 @@ -10660,7 +10639,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 28268: 80c00015 stw r3,0(r16) 2826c: 10004326 beq r2,zero,2837c <__sfvwrite_r+0x450> 28270: 9805883a mov r2,r19 - 28274: 003f8606 br 28090 <_gp+0xfffeb224> + 28274: 003f8606 br 28090 <__sfvwrite_r+0x164> 28278: b00d883a mov r6,r22 2827c: e00b883a mov r5,fp 28280: da000115 stw r8,4(sp) @@ -10672,11 +10651,11 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 28298: 1dad883a add r22,r3,r22 2829c: 80800215 stw r2,8(r16) 282a0: 85800015 stw r22,0(r16) - 282a4: 003fbf06 br 281a4 <_gp+0xfffeb338> + 282a4: 003fbf06 br 281a4 <__sfvwrite_r+0x278> 282a8: 81000017 ldw r4,0(r16) 282ac: 9027883a mov r19,r18 282b0: 902f883a mov r23,r18 - 282b4: 003f6c06 br 28068 <_gp+0xfffeb1fc> + 282b4: 003f6c06 br 28068 <__sfvwrite_r+0x13c> 282b8: 900d883a mov r6,r18 282bc: 01400284 movi r5,10 282c0: e009883a mov r4,fp @@ -10685,7 +10664,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 282cc: 10800044 addi r2,r2,1 282d0: 1727c83a sub r19,r2,fp 282d4: 02000044 movi r8,1 - 282d8: 003f9d06 br 28150 <_gp+0xfffeb2e4> + 282d8: 003f9d06 br 28150 <__sfvwrite_r+0x224> 282dc: 80800517 ldw r2,20(r16) 282e0: 81400417 ldw r5,16(r16) 282e4: 81c00017 ldw r7,0(r16) @@ -10725,16 +10704,16 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2836c: 9027883a mov r19,r18 28370: 81c00215 stw r7,8(r16) 28374: 902f883a mov r23,r18 - 28378: 003f3b06 br 28068 <_gp+0xfffeb1fc> + 28378: 003f3b06 br 28068 <__sfvwrite_r+0x13c> 2837c: 800b883a mov r5,r16 28380: a809883a mov r4,r21 28384: 00276cc0 call 276cc <_fflush_r> - 28388: 103fb926 beq r2,zero,28270 <_gp+0xfffeb404> - 2838c: 003f6506 br 28124 <_gp+0xfffeb2b8> + 28388: 103fb926 beq r2,zero,28270 <__sfvwrite_r+0x344> + 2838c: 003f6506 br 28124 <__sfvwrite_r+0x1f8> 28390: a809883a mov r4,r21 28394: 0029cf40 call 29cf4 <_realloc_r> 28398: 102f883a mov r23,r2 - 2839c: 103fee1e bne r2,zero,28358 <_gp+0xfffeb4ec> + 2839c: 103fee1e bne r2,zero,28358 <__sfvwrite_r+0x42c> 283a0: 81400417 ldw r5,16(r16) 283a4: a809883a mov r4,r21 283a8: 0027c1c0 call 27c1c <_free_r> @@ -10743,16 +10722,16 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 283b4: 1884703a and r2,r3,r2 283b8: 00c00304 movi r3,12 283bc: a8c00015 stw r3,0(r21) - 283c0: 003f5906 br 28128 <_gp+0xfffeb2bc> + 283c0: 003f5906 br 28128 <__sfvwrite_r+0x1fc> 283c4: 94c00044 addi r19,r18,1 283c8: 02000044 movi r8,1 - 283cc: 003f6006 br 28150 <_gp+0xfffeb2e4> + 283cc: 003f6006 br 28150 <__sfvwrite_r+0x224> 283d0: 00bfffc4 movi r2,-1 - 283d4: 003f0306 br 27fe4 <_gp+0xfffeb178> + 283d4: 003f0306 br 27fe4 <__sfvwrite_r+0xb8> 283d8: 00800304 movi r2,12 283dc: a8800015 stw r2,0(r21) 283e0: 8080030b ldhu r2,12(r16) - 283e4: 003f5006 br 28128 <_gp+0xfffeb2bc> + 283e4: 003f5006 br 28128 <__sfvwrite_r+0x1fc> 000283e8 <_fwalk>: 283e8: defff704 addi sp,sp,-36 @@ -10787,9 +10766,9 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2845c: b8aeb03a or r23,r23,r2 28460: 84001a04 addi r16,r16,104 28464: 94801a04 addi r18,r18,104 - 28468: 8cfff51e bne r17,r19,28440 <_gp+0xfffeb5d4> + 28468: 8cfff51e bne r17,r19,28440 <_fwalk+0x58> 2846c: a5000017 ldw r20,0(r20) - 28470: a03fed1e bne r20,zero,28428 <_gp+0xfffeb5bc> + 28470: a03fed1e bne r20,zero,28428 <_fwalk+0x40> 28474: b805883a mov r2,r23 28478: dfc00817 ldw ra,32(sp) 2847c: ddc00717 ldw r23,28(sp) @@ -10803,7 +10782,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2849c: dec00904 addi sp,sp,36 284a0: f800283a ret 284a4: 002f883a mov r23,zero - 284a8: 003ff206 br 28474 <_gp+0xfffeb608> + 284a8: 003ff206 br 28474 <_fwalk+0x8c> 000284ac <_fwalk_reent>: 284ac: defff704 addi sp,sp,-36 @@ -10838,9 +10817,9 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 28520: a83ee83a callr r21 28524: b8aeb03a or r23,r23,r2 28528: 84001a04 addi r16,r16,104 - 2852c: 8cbff51e bne r17,r18,28504 <_gp+0xfffeb698> + 2852c: 8cbff51e bne r17,r18,28504 <_fwalk_reent+0x58> 28530: a5000017 ldw r20,0(r20) - 28534: a03fee1e bne r20,zero,284f0 <_gp+0xfffeb684> + 28534: a03fee1e bne r20,zero,284f0 <_fwalk_reent+0x44> 28538: b805883a mov r2,r23 2853c: dfc00817 ldw ra,32(sp) 28540: ddc00717 ldw r23,28(sp) @@ -10854,7 +10833,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 28560: dec00904 addi sp,sp,36 28564: f800283a ret 28568: 002f883a mov r23,zero - 2856c: 003ff206 br 28538 <_gp+0xfffeb6cc> + 2856c: 003ff206 br 28538 <_fwalk_reent+0x8c> 00028570 <_setlocale_r>: 28570: 30001b26 beq r6,zero,285e0 <_setlocale_r+0x70> @@ -10877,14 +10856,14 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 285b4: 294a4804 addi r5,r5,10528 285b8: 8009883a mov r4,r16 285bc: 002a5f80 call 2a5f8 - 285c0: 103ff526 beq r2,zero,28598 <_gp+0xfffeb72c> + 285c0: 103ff526 beq r2,zero,28598 <_setlocale_r+0x28> 285c4: 014000f4 movhi r5,3 285c8: 294a5204 addi r5,r5,10568 285cc: 8009883a mov r4,r16 285d0: 002a5f80 call 2a5f8 - 285d4: 103ff026 beq r2,zero,28598 <_gp+0xfffeb72c> + 285d4: 103ff026 beq r2,zero,28598 <_setlocale_r+0x28> 285d8: 0005883a mov r2,zero - 285dc: 003ff006 br 285a0 <_gp+0xfffeb734> + 285dc: 003ff006 br 285a0 <_setlocale_r+0x30> 285e0: 008000f4 movhi r2,3 285e4: 108a4804 addi r2,r2,10528 285e8: f800283a ret @@ -11003,29 +10982,29 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2876c: 28800515 stw r2,20(r5) 28770: f800283a ret 28774: 04801004 movi r18,64 - 28778: 003fe006 br 286fc <_gp+0xfffeb890> + 28778: 003fe006 br 286fc <__smakebuf_r+0xb0> 2877c: 81000a17 ldw r4,40(r16) 28780: 00c000f4 movhi r3,3 28784: 18e96504 addi r3,r3,-23148 - 28788: 20ffc51e bne r4,r3,286a0 <_gp+0xfffeb834> + 28788: 20ffc51e bne r4,r3,286a0 <__smakebuf_r+0x54> 2878c: 8080030b ldhu r2,12(r16) 28790: 04810004 movi r18,1024 28794: 84801315 stw r18,76(r16) 28798: 1484b03a or r2,r2,r18 2879c: 8080030d sth r2,12(r16) 287a0: 0027883a mov r19,zero - 287a4: 003fd806 br 28708 <_gp+0xfffeb89c> + 287a4: 003fd806 br 28708 <__smakebuf_r+0xbc> 287a8: 8140038f ldh r5,14(r16) 287ac: 8809883a mov r4,r17 287b0: 002c3540 call 2c354 <_isatty_r> - 287b4: 103fe226 beq r2,zero,28740 <_gp+0xfffeb8d4> + 287b4: 103fe226 beq r2,zero,28740 <__smakebuf_r+0xf4> 287b8: 8080030b ldhu r2,12(r16) 287bc: 10800054 ori r2,r2,1 287c0: 8080030d sth r2,12(r16) - 287c4: 003fde06 br 28740 <_gp+0xfffeb8d4> + 287c4: 003fde06 br 28740 <__smakebuf_r+0xf4> 287c8: 8080030b ldhu r2,12(r16) 287cc: 10c0800c andi r3,r2,512 - 287d0: 183fdb1e bne r3,zero,28740 <_gp+0xfffeb8d4> + 287d0: 183fdb1e bne r3,zero,28740 <__smakebuf_r+0xf4> 287d4: 10800094 ori r2,r2,2 287d8: 80c010c4 addi r3,r16,67 287dc: 8080030d sth r2,12(r16) @@ -11033,12 +11012,12 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 287e4: 80c00015 stw r3,0(r16) 287e8: 80c00415 stw r3,16(r16) 287ec: 80800515 stw r2,20(r16) - 287f0: 003fd306 br 28740 <_gp+0xfffeb8d4> + 287f0: 003fd306 br 28740 <__smakebuf_r+0xf4> 287f4: 04810004 movi r18,1024 - 287f8: 003fc306 br 28708 <_gp+0xfffeb89c> + 287f8: 003fc306 br 28708 <__smakebuf_r+0xbc> 287fc: 0027883a mov r19,zero 28800: 04810004 movi r18,1024 - 28804: 003fc006 br 28708 <_gp+0xfffeb89c> + 28804: 003fc006 br 28708 <__smakebuf_r+0xbc> 00028808 : 28808: 208000cc andi r2,r4,3 @@ -11056,7 +11035,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 28838: 30c01426 beq r6,r3,2888c 2883c: 21000044 addi r4,r4,1 28840: 20c000cc andi r3,r4,3 - 28844: 183ff91e bne r3,zero,2882c <_gp+0xfffeb9c0> + 28844: 183ff91e bne r3,zero,2882c 28848: 020000c4 movi r8,3 2884c: 40801136 bltu r8,r2,28894 28850: 10000c26 beq r2,zero,28884 @@ -11071,7 +11050,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 28874: 197fffc3 ldbu r5,-1(r3) 28878: 31400526 beq r6,r5,28890 2887c: 1805883a mov r2,r3 - 28880: 20fffb1e bne r4,r3,28870 <_gp+0xfffeba04> + 28880: 20fffb1e bne r4,r3,28870 28884: 0005883a mov r2,zero 28888: f800283a ret 2888c: 2005883a mov r2,r4 @@ -11091,13 +11070,13 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 288c4: 00c6303a nor r3,zero,r3 288c8: 30c6703a and r3,r6,r3 288cc: 1a86703a and r3,r3,r10 - 288d0: 183fe01e bne r3,zero,28854 <_gp+0xfffeb9e8> + 288d0: 183fe01e bne r3,zero,28854 288d4: 10bfff04 addi r2,r2,-4 288d8: 21000104 addi r4,r4,4 - 288dc: 40bff636 bltu r8,r2,288b8 <_gp+0xfffeba4c> - 288e0: 003fdb06 br 28850 <_gp+0xfffeb9e4> + 288dc: 40bff636 bltu r8,r2,288b8 + 288e0: 003fdb06 br 28850 288e4: 3005883a mov r2,r6 - 288e8: 003fd706 br 28848 <_gp+0xfffeb9dc> + 288e8: 003fd706 br 28848 000288ec : 288ec: defffd04 addi sp,sp,-12 @@ -11139,7 +11118,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2897c: 5ac00404 addi r11,r11,16 28980: 52800404 addi r10,r10,16 28984: 4a400404 addi r9,r9,16 - 28988: 1c3fef1e bne r3,r16,28948 <_gp+0xfffebadc> + 28988: 1c3fef1e bne r3,r16,28948 2898c: 89c00044 addi r7,r17,1 28990: 380e913a slli r7,r7,4 28994: 310003cc andi r4,r6,15 @@ -11155,7 +11134,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 289bc: 39ffff04 addi r7,r7,-4 289c0: 4abfff15 stw r10,-4(r9) 289c4: 42000104 addi r8,r8,4 - 289c8: 59fffa36 bltu r11,r7,289b4 <_gp+0xfffebb48> + 289c8: 59fffa36 bltu r11,r7,289b4 289cc: 213fff04 addi r4,r4,-4 289d0: 2008d0ba srli r4,r4,2 289d4: 318000cc andi r6,r6,3 @@ -11170,18 +11149,18 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 289f8: 18c00044 addi r3,r3,1 289fc: 29400044 addi r5,r5,1 28a00: 19ffffc5 stb r7,-1(r3) - 28a04: 19bffb1e bne r3,r6,289f4 <_gp+0xfffebb88> + 28a04: 19bffb1e bne r3,r6,289f4 28a08: dfc00217 ldw ra,8(sp) 28a0c: dc400117 ldw r17,4(sp) 28a10: dc000017 ldw r16,0(sp) 28a14: dec00304 addi sp,sp,12 28a18: f800283a ret 28a1c: 2007883a mov r3,r4 - 28a20: 003ff206 br 289ec <_gp+0xfffebb80> + 28a20: 003ff206 br 289ec 28a24: 2007883a mov r3,r4 - 28a28: 003ff106 br 289f0 <_gp+0xfffebb84> + 28a28: 003ff106 br 289f0 28a2c: 200d883a mov r6,r4 - 28a30: 003fee06 br 289ec <_gp+0xfffebb80> + 28a30: 003fee06 br 289ec 00028a34 : 28a34: 2005883a mov r2,r4 @@ -11195,7 +11174,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 28a54: 39000003 ldbu r4,0(r7) 28a58: 18ffffc4 addi r3,r3,-1 28a5c: 19000005 stb r4,0(r3) - 28a60: 28fffb1e bne r5,r3,28a50 <_gp+0xfffebbe4> + 28a60: 28fffb1e bne r5,r3,28a50 28a64: f800283a ret 28a68: 00c003c4 movi r3,15 28a6c: 1980412e bgeu r3,r6,28b74 @@ -11231,7 +11210,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 28ae4: 63000404 addi r12,r12,16 28ae8: 52800404 addi r10,r10,16 28aec: 493ffc15 stw r4,-16(r9) - 28af0: 1bbfef1e bne r3,r14,28ab0 <_gp+0xfffebc44> + 28af0: 1bbfef1e bne r3,r14,28ab0 28af4: 79000044 addi r4,r15,1 28af8: 2008913a slli r4,r4,4 28afc: 328003cc andi r10,r6,15 @@ -11247,7 +11226,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 28b24: 39ffff04 addi r7,r7,-4 28b28: 493fff15 stw r4,-4(r9) 28b2c: 42000104 addi r8,r8,4 - 28b30: 59fffa36 bltu r11,r7,28b1c <_gp+0xfffebcb0> + 28b30: 59fffa36 bltu r11,r7,28b1c 28b34: 513fff04 addi r4,r10,-4 28b38: 2008d0ba srli r4,r4,2 28b3c: 318000cc andi r6,r6,3 @@ -11262,15 +11241,15 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 28b60: 18c00044 addi r3,r3,1 28b64: 29400044 addi r5,r5,1 28b68: 19ffffc5 stb r7,-1(r3) - 28b6c: 19bffb1e bne r3,r6,28b5c <_gp+0xfffebcf0> + 28b6c: 19bffb1e bne r3,r6,28b5c 28b70: f800283a ret 28b74: 1007883a mov r3,r2 - 28b78: 003ff606 br 28b54 <_gp+0xfffebce8> + 28b78: 003ff606 br 28b54 28b7c: 1007883a mov r3,r2 - 28b80: 003ff506 br 28b58 <_gp+0xfffebcec> + 28b80: 003ff506 br 28b58 28b84: f800283a ret 28b88: 500d883a mov r6,r10 - 28b8c: 003ff106 br 28b54 <_gp+0xfffebce8> + 28b8c: 003ff106 br 28b54 00028b90 <_Balloc>: 28b90: 20801317 ldw r2,76(r4) @@ -11301,9 +11280,9 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 28bf4: 01400104 movi r5,4 28bf8: 002bf280 call 2bf28 <_calloc_r> 28bfc: 88801315 stw r2,76(r17) - 28c00: 103fec1e bne r2,zero,28bb4 <_gp+0xfffebd48> + 28c00: 103fec1e bne r2,zero,28bb4 <_Balloc+0x24> 28c04: 0005883a mov r2,zero - 28c08: 003ff306 br 28bd8 <_gp+0xfffebd6c> + 28c08: 003ff306 br 28bd8 <_Balloc+0x48> 28c0c: 01400044 movi r5,1 28c10: 2c24983a sll r18,r5,r16 28c14: 8809883a mov r4,r17 @@ -11311,10 +11290,10 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 28c1c: 318d883a add r6,r6,r6 28c20: 318d883a add r6,r6,r6 28c24: 002bf280 call 2bf28 <_calloc_r> - 28c28: 103ff626 beq r2,zero,28c04 <_gp+0xfffebd98> + 28c28: 103ff626 beq r2,zero,28c04 <_Balloc+0x74> 28c2c: 14000115 stw r16,4(r2) 28c30: 14800215 stw r18,8(r2) - 28c34: 003fe606 br 28bd0 <_gp+0xfffebd64> + 28c34: 003fe606 br 28bd0 <_Balloc+0x40> 00028c38 <_Bfree>: 28c38: 28000826 beq r5,zero,28c5c <_Bfree+0x24> @@ -11355,7 +11334,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 28cbc: 180ed43a srli r7,r3,16 28cc0: 2085883a add r2,r4,r2 28cc4: 28bfff15 stw r2,-4(r5) - 28cc8: 443ff016 blt r8,r16,28c8c <_gp+0xfffebe20> + 28cc8: 443ff016 blt r8,r16,28c8c <__multadd+0x2c> 28ccc: 38000926 beq r7,zero,28cf4 <__multadd+0x94> 28cd0: 88800217 ldw r2,8(r17) 28cd4: 80800f0e bge r16,r2,28d14 <__multadd+0xb4> @@ -11398,9 +11377,9 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 28d68: 88c00015 stw r3,0(r17) 28d6c: 14400015 stw r17,0(r2) 28d70: 9823883a mov r17,r19 - 28d74: 003fd806 br 28cd8 <_gp+0xfffebe6c> + 28d74: 003fd806 br 28cd8 <__multadd+0x78> 28d78: 9823883a mov r17,r19 - 28d7c: 003fd606 br 28cd8 <_gp+0xfffebe6c> + 28d7c: 003fd606 br 28cd8 <__multadd+0x78> 00028d80 <__s2b>: 28d80: defff904 addi sp,sp,-28 @@ -11423,7 +11402,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 28dc4: 1880030e bge r3,r2,28dd4 <__s2b+0x54> 28dc8: 18c7883a add r3,r3,r3 28dcc: 29400044 addi r5,r5,1 - 28dd0: 18bffd16 blt r3,r2,28dc8 <_gp+0xfffebf5c> + 28dd0: 18bffd16 blt r3,r2,28dc8 <__s2b+0x48> 28dd4: 8809883a mov r4,r17 28dd8: 0028b900 call 28b90 <_Balloc> 28ddc: d8c00717 ldw r3,28(sp) @@ -11442,7 +11421,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 28e10: 39fff404 addi r7,r7,-48 28e14: 8809883a mov r4,r17 28e18: 0028c600 call 28c60 <__multadd> - 28e1c: a43ff81e bne r20,r16,28e00 <_gp+0xfffebf94> + 28e1c: a43ff81e bne r20,r16,28e00 <__s2b+0x80> 28e20: ace1883a add r16,r21,r19 28e24: 843ffe04 addi r16,r16,-8 28e28: 9c800a0e bge r19,r18,28e54 <__s2b+0xd4> @@ -11455,7 +11434,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 28e44: 39fff404 addi r7,r7,-48 28e48: 8809883a mov r4,r17 28e4c: 0028c600 call 28c60 <__multadd> - 28e50: 84bff81e bne r16,r18,28e34 <_gp+0xfffebfc8> + 28e50: 84bff81e bne r16,r18,28e34 <__s2b+0xb4> 28e54: dfc00617 ldw ra,24(sp) 28e58: dd400517 ldw r21,20(sp) 28e5c: dd000417 ldw r20,16(sp) @@ -11467,7 +11446,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 28e74: f800283a ret 28e78: 84000284 addi r16,r16,10 28e7c: 1827883a mov r19,r3 - 28e80: 003fe906 br 28e28 <_gp+0xfffebfbc> + 28e80: 003fe906 br 28e28 <__s2b+0xa8> 00028e84 <__hi0bits>: 28e84: 20bfffec andhi r2,r4,65535 @@ -11493,7 +11472,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 28ed4: 00800804 movi r2,32 28ed8: f800283a ret 28edc: 0005883a mov r2,zero - 28ee0: 003fec06 br 28e94 <_gp+0xfffec028> + 28ee0: 003fec06 br 28e94 <__hi0bits+0x10> 28ee4: 10800044 addi r2,r2,1 28ee8: f800283a ret @@ -11532,7 +11511,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 28f68: f800283a ret 28f6c: 1806d43a srli r3,r3,16 28f70: 00800404 movi r2,16 - 28f74: 003feb06 br 28f24 <_gp+0xfffec0b8> + 28f74: 003feb06 br 28f24 <__lo0bits+0x38> 28f78: 10800044 addi r2,r2,1 28f7c: 20c00015 stw r3,0(r4) 28f80: f800283a ret @@ -11592,7 +11571,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 29048: 5a80032e bgeu r11,r10,29058 <__multiply+0x80> 2904c: 18000015 stw zero,0(r3) 29050: 18c00104 addi r3,r3,4 - 29054: 1abffd36 bltu r3,r10,2904c <_gp+0xfffec1e0> + 29054: 1abffd36 bltu r3,r10,2904c <__multiply+0x74> 29058: 9ce7883a add r19,r19,r19 2905c: 94a5883a add r18,r18,r18 29060: 89800504 addi r6,r17,20 @@ -11629,7 +11608,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 290dc: 214ab03a or r5,r4,r5 290e0: 41400015 stw r5,0(r8) 290e4: 42000104 addi r8,r8,4 - 290e8: 727fea36 bltu r14,r9,29094 <_gp+0xfffec228> + 290e8: 727fea36 bltu r14,r9,29094 <__multiply+0xbc> 290ec: 89c00115 stw r7,4(r17) 290f0: 37c00017 ldw ra,0(r6) 290f4: f83ed43a srli ra,ra,16 @@ -11663,11 +11642,11 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 29164: 1907883a add r3,r3,r4 29168: 1947883a add r3,r3,r5 2916c: 180ed43a srli r7,r3,16 - 29170: 727fe936 bltu r14,r9,29118 <_gp+0xfffec2ac> + 29170: 727fe936 bltu r14,r9,29118 <__multiply+0x140> 29174: 90c00115 stw r3,4(r18) 29178: 31800104 addi r6,r6,4 2917c: 5ac00104 addi r11,r11,4 - 29180: 333fbe36 bltu r6,r12,2907c <_gp+0xfffec210> + 29180: 333fbe36 bltu r6,r12,2907c <__multiply+0xa4> 29184: 0400090e bge zero,r16,291ac <__multiply+0x1d4> 29188: 50ffff17 ldw r3,-4(r10) 2918c: 52bfff04 addi r10,r10,-4 @@ -11677,7 +11656,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2919c: 1800031e bne r3,zero,291ac <__multiply+0x1d4> 291a0: 843fffc4 addi r16,r16,-1 291a4: 52bfff04 addi r10,r10,-4 - 291a8: 803ffb1e bne r16,zero,29198 <_gp+0xfffec32c> + 291a8: 803ffb1e bne r16,zero,29198 <__multiply+0x1c0> 291ac: 14000415 stw r16,16(r2) 291b0: dfc00517 ldw ra,20(sp) 291b4: dd000417 ldw r20,16(sp) @@ -11712,7 +11691,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 29220: 10001c26 beq r2,zero,29294 <__pow5mult+0xc4> 29224: 1023883a mov r17,r2 29228: 8080004c andi r2,r16,1 - 2922c: 103ff926 beq r2,zero,29214 <_gp+0xfffec3a8> + 2922c: 103ff926 beq r2,zero,29214 <__pow5mult+0x44> 29230: 880d883a mov r6,r17 29234: 900b883a mov r5,r18 29238: 9809883a mov r4,r19 @@ -11728,7 +11707,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 29260: 91000015 stw r4,0(r18) 29264: 1c800015 stw r18,0(r3) 29268: 1025883a mov r18,r2 - 2926c: 803feb1e bne r16,zero,2921c <_gp+0xfffec3b0> + 2926c: 803feb1e bne r16,zero,2921c <__pow5mult+0x4c> 29270: 9005883a mov r2,r18 29274: dfc00517 ldw ra,20(sp) 29278: dd000417 ldw r20,16(sp) @@ -11744,9 +11723,9 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 292a0: 0028fd80 call 28fd8 <__multiply> 292a4: 88800015 stw r2,0(r17) 292a8: 10000015 stw zero,0(r2) - 292ac: 003fdd06 br 29224 <_gp+0xfffec3b8> + 292ac: 003fdd06 br 29224 <__pow5mult+0x54> 292b0: 1025883a mov r18,r2 - 292b4: 003fd706 br 29214 <_gp+0xfffec3a8> + 292b4: 003fd706 br 29214 <__pow5mult+0x44> 292b8: 10bfffc4 addi r2,r2,-1 292bc: 1085883a add r2,r2,r2 292c0: 00c000f4 movhi r3,3 @@ -11757,7 +11736,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 292d4: 000f883a mov r7,zero 292d8: 0028c600 call 28c60 <__multadd> 292dc: 1025883a mov r18,r2 - 292e0: 003fc706 br 29200 <_gp+0xfffec394> + 292e0: 003fc706 br 29200 <__pow5mult+0x30> 292e4: 05000044 movi r20,1 292e8: a00b883a mov r5,r20 292ec: 9809883a mov r4,r19 @@ -11768,7 +11747,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 29300: 8d000415 stw r20,16(r17) 29304: 9c401215 stw r17,72(r19) 29308: 88000015 stw zero,0(r17) - 2930c: 003fc606 br 29228 <_gp+0xfffec3bc> + 2930c: 003fc606 br 29228 <__pow5mult+0x58> 00029310 <__lshift>: 29310: defff904 addi sp,sp,-28 @@ -11791,7 +11770,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 29354: 1400030e bge r2,r16,29364 <__lshift+0x54> 29358: 1085883a add r2,r2,r2 2935c: 29400044 addi r5,r5,1 - 29360: 143ffd16 blt r2,r16,29358 <_gp+0xfffec4ec> + 29360: 143ffd16 blt r2,r16,29358 <__lshift+0x48> 29364: 9009883a mov r4,r18 29368: 0028b900 call 28b90 <_Balloc> 2936c: 10c00504 addi r3,r2,20 @@ -11802,7 +11781,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 29380: 1d47883a add r3,r3,r21 29384: 20000015 stw zero,0(r4) 29388: 21000104 addi r4,r4,4 - 2938c: 193ffd1e bne r3,r4,29384 <_gp+0xfffec518> + 2938c: 193ffd1e bne r3,r4,29384 <__lshift+0x74> 29390: 8a000417 ldw r8,16(r17) 29394: 89000504 addi r4,r17,20 29398: a18007cc andi r6,r20,31 @@ -11822,7 +11801,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 293d0: 197fff15 stw r5,-4(r3) 293d4: 217fff17 ldw r5,-4(r4) 293d8: 2a4ad83a srl r5,r5,r9 - 293dc: 223ff636 bltu r4,r8,293b8 <_gp+0xfffec54c> + 293dc: 223ff636 bltu r4,r8,293b8 <__lshift+0xa8> 293e0: 51400115 stw r5,4(r10) 293e4: 28001a1e bne r5,zero,29450 <__lshift+0x140> 293e8: 843fffc4 addi r16,r16,-1 @@ -11849,10 +11828,10 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2943c: 18c00104 addi r3,r3,4 29440: 21000104 addi r4,r4,4 29444: 197fff15 stw r5,-4(r3) - 29448: 223ffb36 bltu r4,r8,29438 <_gp+0xfffec5cc> - 2944c: 003fe606 br 293e8 <_gp+0xfffec57c> + 29448: 223ffb36 bltu r4,r8,29438 <__lshift+0x128> + 2944c: 003fe606 br 293e8 <__lshift+0xd8> 29450: 9c000084 addi r16,r19,2 - 29454: 003fe406 br 293e8 <_gp+0xfffec57c> + 29454: 003fe406 br 293e8 <__lshift+0xd8> 00029458 <__mcmp>: 29458: 20800417 ldw r2,16(r4) @@ -11871,7 +11850,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2948c: 297fff04 addi r5,r5,-4 29490: 11800017 ldw r6,0(r2) 29494: 28c00017 ldw r3,0(r5) - 29498: 30fffa26 beq r6,r3,29484 <_gp+0xfffec618> + 29498: 30fffa26 beq r6,r3,29484 <__mcmp+0x2c> 2949c: 30c00236 bltu r6,r3,294a8 <__mcmp+0x50> 294a0: 00800044 movi r2,1 294a4: f800283a ret @@ -11906,7 +11885,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 29510: 10bfff04 addi r2,r2,-4 29514: 19c00017 ldw r7,0(r3) 29518: 11400017 ldw r5,0(r2) - 2951c: 397ffa26 beq r7,r5,29508 <_gp+0xfffec69c> + 2951c: 397ffa26 beq r7,r5,29508 <__mdiff+0x50> 29520: 3940592e bgeu r7,r5,29688 <__mdiff+0x1d0> 29524: 9005883a mov r2,r18 29528: 4023883a mov r17,r8 @@ -11952,7 +11931,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 295c8: 1807d43a srai r3,r3,16 295cc: 3015883a mov r10,r6 295d0: 3017883a mov r11,r6 - 295d4: 8b3fea36 bltu r17,r12,29580 <_gp+0xfffec714> + 295d4: 8b3fea36 bltu r17,r12,29580 <__mdiff+0xc8> 295d8: 8200162e bgeu r16,r8,29634 <__mdiff+0x17c> 295dc: 8017883a mov r11,r16 295e0: 59400017 ldw r5,0(r11) @@ -11968,7 +11947,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 29608: 1807d43a srai r3,r3,16 2960c: 2908b03a or r4,r5,r4 29610: 313fff15 stw r4,-4(r6) - 29614: 5a3ff236 bltu r11,r8,295e0 <_gp+0xfffec774> + 29614: 5a3ff236 bltu r11,r8,295e0 <__mdiff+0x128> 29618: 0406303a nor r3,zero,r16 2961c: 1a07883a add r3,r3,r8 29620: 1806d0ba srli r3,r3,2 @@ -11981,7 +11960,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2963c: 18ffff04 addi r3,r3,-4 29640: 19000017 ldw r4,0(r3) 29644: 4a7fffc4 addi r9,r9,-1 - 29648: 203ffc26 beq r4,zero,2963c <_gp+0xfffec7d0> + 29648: 203ffc26 beq r4,zero,2963c <__mdiff+0x184> 2964c: 12400415 stw r9,16(r2) 29650: dfc00517 ldw ra,20(sp) 29654: dd000417 ldw r20,16(sp) @@ -11996,18 +11975,18 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 29678: 00c00044 movi r3,1 2967c: 10c00415 stw r3,16(r2) 29680: 10000515 stw zero,20(r2) - 29684: 003ff206 br 29650 <_gp+0xfffec7e4> + 29684: 003ff206 br 29650 <__mdiff+0x198> 29688: 8023883a mov r17,r16 2968c: 0029883a mov r20,zero 29690: 4021883a mov r16,r8 - 29694: 003fad06 br 2954c <_gp+0xfffec6e0> + 29694: 003fad06 br 2954c <__mdiff+0x94> 29698: 9005883a mov r2,r18 2969c: 94400504 addi r17,r18,20 296a0: 9c000504 addi r16,r19,20 296a4: 9825883a mov r18,r19 296a8: 05000044 movi r20,1 296ac: 1027883a mov r19,r2 - 296b0: 003fa606 br 2954c <_gp+0xfffec6e0> + 296b0: 003fa606 br 2954c <__mdiff+0x94> 000296b4 <__ulp>: 296b4: 295ffc2c andhi r5,r5,32752 @@ -12092,18 +12071,18 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 297e8: 1144983a sll r2,r2,r5 297ec: 310ad83a srl r5,r6,r4 297f0: 2884b03a or r2,r5,r2 - 297f4: 003fe806 br 29798 <_gp+0xfffec92c> + 297f4: 003fe806 br 29798 <__b2d+0x80> 297f8: 10bffd44 addi r2,r2,-11 297fc: 1000041e bne r2,zero,29810 <__b2d+0xf8> 29800: 90cffc34 orhi r3,r18,16368 - 29804: 003fe406 br 29798 <_gp+0xfffec92c> + 29804: 003fe406 br 29798 <__b2d+0x80> 29808: 000d883a mov r6,zero - 2980c: 003fdf06 br 2978c <_gp+0xfffec920> + 2980c: 003fdf06 br 2978c <__b2d+0x74> 29810: 90a4983a sll r18,r18,r2 29814: 0005883a mov r2,zero - 29818: 003ff906 br 29800 <_gp+0xfffec994> + 29818: 003ff906 br 29800 <__b2d+0xe8> 2981c: 1144983a sll r2,r2,r5 - 29820: 003fdd06 br 29798 <_gp+0xfffec92c> + 29820: 003fdd06 br 29798 <__b2d+0x80> 00029824 <__d2b>: 29824: defff804 addi sp,sp,-32 @@ -12171,7 +12150,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2991c: 9c000415 stw r16,16(r19) 29920: 98c00515 stw r3,20(r19) 29924: 10800804 addi r2,r2,32 - 29928: 883fe126 beq r17,zero,298b0 <_gp+0xfffeca44> + 29928: 883fe126 beq r17,zero,298b0 <__d2b+0x8c> 2992c: 00c00d44 movi r3,53 29930: 8c7ef344 addi r17,r17,-1075 29934: 88a3883a add r17,r17,r2 @@ -12179,7 +12158,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2993c: d8c00817 ldw r3,32(sp) 29940: 94400015 stw r17,0(r18) 29944: 18800015 stw r2,0(r3) - 29948: 003fe706 br 298e8 <_gp+0xfffeca7c> + 29948: 003fe706 br 298e8 <__d2b+0xc4> 2994c: 01000804 movi r4,32 29950: 2089c83a sub r4,r4,r2 29954: 1908983a sll r4,r3,r4 @@ -12188,7 +12167,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 29960: 2148b03a or r4,r4,r5 29964: 99000515 stw r4,20(r19) 29968: d8c00015 stw r3,0(sp) - 2996c: 003fca06 br 29898 <_gp+0xfffeca2c> + 2996c: 003fca06 br 29898 <__d2b+0x74> 00029970 <__ratio>: 29970: defff904 addi sp,sp,-28 @@ -12231,7 +12210,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 29a04: f800283a ret 29a08: 2008953a slli r4,r4,20 29a0c: 1907c83a sub r3,r3,r4 - 29a10: 003ff106 br 299d8 <_gp+0xfffecb6c> + 29a10: 003ff106 br 299d8 <__ratio+0x68> 00029a14 <_mprec_log10>: 29a14: defffe04 addi sp,sp,-8 @@ -12248,7 +12227,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 29a40: 1009883a mov r4,r2 29a44: 180b883a mov r5,r3 29a48: 002e4ec0 call 2e4ec <__muldf3> - 29a4c: 803ff91e bne r16,zero,29a34 <_gp+0xfffecbc8> + 29a4c: 803ff91e bne r16,zero,29a34 <_mprec_log10+0x20> 29a50: dfc00117 ldw ra,4(sp) 29a54: dc000017 ldw r16,0(sp) 29a58: dec00204 addi sp,sp,8 @@ -12282,7 +12261,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 29ac0: 29400104 addi r5,r5,4 29ac4: 10800104 addi r2,r2,4 29ac8: 2a3fff15 stw r8,-4(r5) - 29acc: 10fffb36 bltu r2,r3,29abc <_gp+0xfffecc50> + 29acc: 10fffb36 bltu r2,r3,29abc <__copybits+0x34> 29ad0: 1985c83a sub r2,r3,r6 29ad4: 10bffac4 addi r2,r2,-21 29ad8: 1004d0ba srli r2,r2,2 @@ -12293,7 +12272,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 29aec: 21c0032e bgeu r4,r7,29afc <__copybits+0x74> 29af0: 20000015 stw zero,0(r4) 29af4: 21000104 addi r4,r4,4 - 29af8: 21fffd36 bltu r4,r7,29af0 <_gp+0xfffecc84> + 29af8: 21fffd36 bltu r4,r7,29af0 <__copybits+0x68> 29afc: f800283a ret 00029b00 <__any_on>: @@ -12311,7 +12290,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 29b2c: 20c0142e bgeu r4,r3,29b80 <__any_on+0x80> 29b30: 18ffff04 addi r3,r3,-4 29b34: 19400017 ldw r5,0(r3) - 29b38: 283ffc26 beq r5,zero,29b2c <_gp+0xfffeccc0> + 29b38: 283ffc26 beq r5,zero,29b2c <__any_on+0x2c> 29b3c: 00800044 movi r2,1 29b40: f800283a ret 29b44: 10c00a0e bge r2,r3,29b70 <__any_on+0x70> @@ -12319,16 +12298,16 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 29b4c: 1085883a add r2,r2,r2 29b50: 294007cc andi r5,r5,31 29b54: 2087883a add r3,r4,r2 - 29b58: 283ff026 beq r5,zero,29b1c <_gp+0xfffeccb0> + 29b58: 283ff026 beq r5,zero,29b1c <__any_on+0x1c> 29b5c: 19800017 ldw r6,0(r3) 29b60: 3144d83a srl r2,r6,r5 29b64: 114a983a sll r5,r2,r5 - 29b68: 317ff41e bne r6,r5,29b3c <_gp+0xfffeccd0> - 29b6c: 003feb06 br 29b1c <_gp+0xfffeccb0> + 29b68: 317ff41e bne r6,r5,29b3c <__any_on+0x3c> + 29b6c: 003feb06 br 29b1c <__any_on+0x1c> 29b70: 1085883a add r2,r2,r2 29b74: 1085883a add r2,r2,r2 29b78: 2087883a add r3,r4,r2 - 29b7c: 003fe706 br 29b1c <_gp+0xfffeccb0> + 29b7c: 003fe706 br 29b1c <__any_on+0x1c> 29b80: f800283a ret 29b84: 0005883a mov r2,zero 29b88: f800283a ret @@ -12362,7 +12341,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 29bf0: 11400005 stb r5,0(r2) 29bf4: 30800017 ldw r2,0(r6) 29bf8: 11400003 ldbu r5,0(r2) - 29bfc: 28fff11e bne r5,r3,29bc4 <_gp+0xfffecd58> + 29bfc: 28fff11e bne r5,r3,29bc4 <_putc_r+0x38> 29c00: 8009883a mov r4,r16 29c04: dfc00317 ldw ra,12(sp) 29c08: dc000217 ldw r16,8(sp) @@ -12373,7 +12352,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 29c1c: 0027aa80 call 27aa8 <__sinit> 29c20: d9800117 ldw r6,4(sp) 29c24: d9400017 ldw r5,0(sp) - 29c28: 003fdf06 br 29ba8 <_gp+0xfffecd3c> + 29c28: 003fdf06 br 29ba8 <_putc_r+0x1c> 00029c2c : 29c2c: 008000f4 movhi r2,3 @@ -12409,7 +12388,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 29ca4: 14400005 stb r17,0(r2) 29ca8: 28800017 ldw r2,0(r5) 29cac: 10c00003 ldbu r3,0(r2) - 29cb0: 193ff01e bne r3,r4,29c74 <_gp+0xfffece08> + 29cb0: 193ff01e bne r3,r4,29c74 29cb4: 280d883a mov r6,r5 29cb8: 180b883a mov r5,r3 29cbc: 00000706 br 29cdc @@ -12417,7 +12396,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 29cc4: d9400015 stw r5,0(sp) 29cc8: 0027aa80 call 27aa8 <__sinit> 29ccc: d9400017 ldw r5,0(sp) - 29cd0: 003fe106 br 29c58 <_gp+0xfffecdec> + 29cd0: 003fe106 br 29c58 29cd4: 280d883a mov r6,r5 29cd8: 880b883a mov r5,r17 29cdc: 8009883a mov r4,r16 @@ -12429,7 +12408,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 00029cf4 <_realloc_r>: 29cf4: defff604 addi sp,sp,-40 - 29cf8: dc800215 stw r18,8(sp) + 29cf8: dc400115 stw r17,4(sp) 29cfc: dfc00915 stw ra,36(sp) 29d00: df000815 stw fp,32(sp) 29d04: ddc00715 stw r23,28(sp) @@ -12437,342 +12416,342 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 29d0c: dd400515 stw r21,20(sp) 29d10: dd000415 stw r20,16(sp) 29d14: dcc00315 stw r19,12(sp) - 29d18: dc400115 stw r17,4(sp) + 29d18: dc800215 stw r18,8(sp) 29d1c: dc000015 stw r16,0(sp) - 29d20: 3025883a mov r18,r6 - 29d24: 2800b726 beq r5,zero,2a004 <_realloc_r+0x310> - 29d28: 282b883a mov r21,r5 - 29d2c: 2029883a mov r20,r4 + 29d20: 3023883a mov r17,r6 + 29d24: 2800b626 beq r5,zero,2a000 <_realloc_r+0x30c> + 29d28: 2829883a mov r20,r5 + 29d2c: 2025883a mov r18,r4 29d30: 002fea40 call 2fea4 <__malloc_lock> - 29d34: a8bfff17 ldw r2,-4(r21) + 29d34: a0ffff17 ldw r3,-4(r20) 29d38: 043fff04 movi r16,-4 - 29d3c: 90c002c4 addi r3,r18,11 + 29d3c: 888002c4 addi r2,r17,11 29d40: 01000584 movi r4,22 - 29d44: acfffe04 addi r19,r21,-8 - 29d48: 1420703a and r16,r2,r16 - 29d4c: 20c0332e bgeu r4,r3,29e1c <_realloc_r+0x128> - 29d50: 047ffe04 movi r17,-8 - 29d54: 1c62703a and r17,r3,r17 - 29d58: 8807883a mov r3,r17 - 29d5c: 88005816 blt r17,zero,29ec0 <_realloc_r+0x1cc> - 29d60: 8c805736 bltu r17,r18,29ec0 <_realloc_r+0x1cc> - 29d64: 80c0300e bge r16,r3,29e28 <_realloc_r+0x134> + 29d44: a57ffe04 addi r21,r20,-8 + 29d48: 1c20703a and r16,r3,r16 + 29d4c: 2080332e bgeu r4,r2,29e1c <_realloc_r+0x128> + 29d50: 05bffe04 movi r22,-8 + 29d54: 15ac703a and r22,r2,r22 + 29d58: b005883a mov r2,r22 + 29d5c: b0005716 blt r22,zero,29ebc <_realloc_r+0x1c8> + 29d60: b4405636 bltu r22,r17,29ebc <_realloc_r+0x1c8> + 29d64: 8080300e bge r16,r2,29e28 <_realloc_r+0x134> 29d68: 070000f4 movhi fp,3 29d6c: e70df904 addi fp,fp,14308 - 29d70: e1c00217 ldw r7,8(fp) - 29d74: 9c09883a add r4,r19,r16 - 29d78: 22000117 ldw r8,4(r4) - 29d7c: 21c06326 beq r4,r7,29f0c <_realloc_r+0x218> - 29d80: 017fff84 movi r5,-2 - 29d84: 414a703a and r5,r8,r5 - 29d88: 214b883a add r5,r4,r5 - 29d8c: 29800117 ldw r6,4(r5) + 29d70: e2000217 ldw r8,8(fp) + 29d74: ac09883a add r4,r21,r16 + 29d78: 22006126 beq r4,r8,29f00 <_realloc_r+0x20c> + 29d7c: 22400117 ldw r9,4(r4) + 29d80: 01ffff84 movi r7,-2 + 29d84: 49ce703a and r7,r9,r7 + 29d88: 21cf883a add r7,r4,r7 + 29d8c: 39800117 ldw r6,4(r7) 29d90: 3180004c andi r6,r6,1 - 29d94: 30003f26 beq r6,zero,29e94 <_realloc_r+0x1a0> - 29d98: 1080004c andi r2,r2,1 - 29d9c: 10008326 beq r2,zero,29fac <_realloc_r+0x2b8> - 29da0: 900b883a mov r5,r18 - 29da4: a009883a mov r4,r20 + 29d94: 30003e26 beq r6,zero,29e90 <_realloc_r+0x19c> + 29d98: 18c0004c andi r3,r3,1 + 29d9c: 18008126 beq r3,zero,29fa4 <_realloc_r+0x2b0> + 29da0: 880b883a mov r5,r17 + 29da4: 9009883a mov r4,r18 29da8: 0022bfc0 call 22bfc <_malloc_r> - 29dac: 1025883a mov r18,r2 + 29dac: 1023883a mov r17,r2 29db0: 10011e26 beq r2,zero,2a22c <_realloc_r+0x538> - 29db4: a93fff17 ldw r4,-4(r21) - 29db8: 10fffe04 addi r3,r2,-8 + 29db4: a0ffff17 ldw r3,-4(r20) + 29db8: 113ffe04 addi r4,r2,-8 29dbc: 00bfff84 movi r2,-2 - 29dc0: 2084703a and r2,r4,r2 - 29dc4: 9885883a add r2,r19,r2 - 29dc8: 1880ee26 beq r3,r2,2a184 <_realloc_r+0x490> + 29dc0: 1884703a and r2,r3,r2 + 29dc4: a885883a add r2,r21,r2 + 29dc8: 2080ee26 beq r4,r2,2a184 <_realloc_r+0x490> 29dcc: 81bfff04 addi r6,r16,-4 29dd0: 00800904 movi r2,36 29dd4: 1180b836 bltu r2,r6,2a0b8 <_realloc_r+0x3c4> 29dd8: 00c004c4 movi r3,19 - 29ddc: 19809636 bltu r3,r6,2a038 <_realloc_r+0x344> - 29de0: 9005883a mov r2,r18 - 29de4: a807883a mov r3,r21 + 29ddc: 19809536 bltu r3,r6,2a034 <_realloc_r+0x340> + 29de0: 8805883a mov r2,r17 + 29de4: a007883a mov r3,r20 29de8: 19000017 ldw r4,0(r3) 29dec: 11000015 stw r4,0(r2) 29df0: 19000117 ldw r4,4(r3) 29df4: 11000115 stw r4,4(r2) 29df8: 18c00217 ldw r3,8(r3) 29dfc: 10c00215 stw r3,8(r2) - 29e00: a80b883a mov r5,r21 - 29e04: a009883a mov r4,r20 + 29e00: a00b883a mov r5,r20 + 29e04: 9009883a mov r4,r18 29e08: 0027c1c0 call 27c1c <_free_r> - 29e0c: a009883a mov r4,r20 + 29e0c: 9009883a mov r4,r18 29e10: 002fec80 call 2fec8 <__malloc_unlock> - 29e14: 9005883a mov r2,r18 - 29e18: 00001206 br 29e64 <_realloc_r+0x170> - 29e1c: 00c00404 movi r3,16 - 29e20: 1823883a mov r17,r3 - 29e24: 003fce06 br 29d60 <_gp+0xfffecef4> - 29e28: a825883a mov r18,r21 - 29e2c: 8445c83a sub r2,r16,r17 - 29e30: 00c003c4 movi r3,15 - 29e34: 18802636 bltu r3,r2,29ed0 <_realloc_r+0x1dc> - 29e38: 99800117 ldw r6,4(r19) - 29e3c: 9c07883a add r3,r19,r16 - 29e40: 3180004c andi r6,r6,1 - 29e44: 3420b03a or r16,r6,r16 - 29e48: 9c000115 stw r16,4(r19) - 29e4c: 18800117 ldw r2,4(r3) - 29e50: 10800054 ori r2,r2,1 - 29e54: 18800115 stw r2,4(r3) - 29e58: a009883a mov r4,r20 - 29e5c: 002fec80 call 2fec8 <__malloc_unlock> - 29e60: 9005883a mov r2,r18 - 29e64: dfc00917 ldw ra,36(sp) - 29e68: df000817 ldw fp,32(sp) - 29e6c: ddc00717 ldw r23,28(sp) - 29e70: dd800617 ldw r22,24(sp) - 29e74: dd400517 ldw r21,20(sp) - 29e78: dd000417 ldw r20,16(sp) - 29e7c: dcc00317 ldw r19,12(sp) - 29e80: dc800217 ldw r18,8(sp) - 29e84: dc400117 ldw r17,4(sp) - 29e88: dc000017 ldw r16,0(sp) - 29e8c: dec00a04 addi sp,sp,40 - 29e90: f800283a ret - 29e94: 017fff04 movi r5,-4 - 29e98: 414a703a and r5,r8,r5 - 29e9c: 814d883a add r6,r16,r5 - 29ea0: 30c01f16 blt r6,r3,29f20 <_realloc_r+0x22c> - 29ea4: 20800317 ldw r2,12(r4) - 29ea8: 20c00217 ldw r3,8(r4) - 29eac: a825883a mov r18,r21 - 29eb0: 3021883a mov r16,r6 - 29eb4: 18800315 stw r2,12(r3) - 29eb8: 10c00215 stw r3,8(r2) - 29ebc: 003fdb06 br 29e2c <_gp+0xfffecfc0> - 29ec0: 00800304 movi r2,12 - 29ec4: a0800015 stw r2,0(r20) - 29ec8: 0005883a mov r2,zero - 29ecc: 003fe506 br 29e64 <_gp+0xfffecff8> - 29ed0: 98c00117 ldw r3,4(r19) - 29ed4: 9c4b883a add r5,r19,r17 - 29ed8: 11000054 ori r4,r2,1 - 29edc: 18c0004c andi r3,r3,1 - 29ee0: 1c62b03a or r17,r3,r17 - 29ee4: 9c400115 stw r17,4(r19) - 29ee8: 29000115 stw r4,4(r5) - 29eec: 2885883a add r2,r5,r2 - 29ef0: 10c00117 ldw r3,4(r2) - 29ef4: 29400204 addi r5,r5,8 - 29ef8: a009883a mov r4,r20 - 29efc: 18c00054 ori r3,r3,1 - 29f00: 10c00115 stw r3,4(r2) - 29f04: 0027c1c0 call 27c1c <_free_r> - 29f08: 003fd306 br 29e58 <_gp+0xfffecfec> - 29f0c: 017fff04 movi r5,-4 - 29f10: 414a703a and r5,r8,r5 - 29f14: 89800404 addi r6,r17,16 - 29f18: 8151883a add r8,r16,r5 - 29f1c: 4180590e bge r8,r6,2a084 <_realloc_r+0x390> - 29f20: 1080004c andi r2,r2,1 - 29f24: 103f9e1e bne r2,zero,29da0 <_gp+0xfffecf34> - 29f28: adbffe17 ldw r22,-8(r21) - 29f2c: 00bfff04 movi r2,-4 - 29f30: 9dadc83a sub r22,r19,r22 - 29f34: b1800117 ldw r6,4(r22) - 29f38: 3084703a and r2,r6,r2 - 29f3c: 20002026 beq r4,zero,29fc0 <_realloc_r+0x2cc> - 29f40: 80af883a add r23,r16,r2 - 29f44: b96f883a add r23,r23,r5 - 29f48: 21c05f26 beq r4,r7,2a0c8 <_realloc_r+0x3d4> - 29f4c: b8c01c16 blt r23,r3,29fc0 <_realloc_r+0x2cc> - 29f50: 20800317 ldw r2,12(r4) - 29f54: 20c00217 ldw r3,8(r4) - 29f58: 81bfff04 addi r6,r16,-4 - 29f5c: 01000904 movi r4,36 - 29f60: 18800315 stw r2,12(r3) - 29f64: 10c00215 stw r3,8(r2) - 29f68: b0c00217 ldw r3,8(r22) - 29f6c: b0800317 ldw r2,12(r22) - 29f70: b4800204 addi r18,r22,8 - 29f74: 18800315 stw r2,12(r3) - 29f78: 10c00215 stw r3,8(r2) - 29f7c: 21801b36 bltu r4,r6,29fec <_realloc_r+0x2f8> - 29f80: 008004c4 movi r2,19 - 29f84: 1180352e bgeu r2,r6,2a05c <_realloc_r+0x368> - 29f88: a8800017 ldw r2,0(r21) - 29f8c: b0800215 stw r2,8(r22) - 29f90: a8800117 ldw r2,4(r21) - 29f94: b0800315 stw r2,12(r22) - 29f98: 008006c4 movi r2,27 - 29f9c: 11807f36 bltu r2,r6,2a19c <_realloc_r+0x4a8> - 29fa0: b0800404 addi r2,r22,16 - 29fa4: ad400204 addi r21,r21,8 - 29fa8: 00002d06 br 2a060 <_realloc_r+0x36c> - 29fac: adbffe17 ldw r22,-8(r21) - 29fb0: 00bfff04 movi r2,-4 - 29fb4: 9dadc83a sub r22,r19,r22 - 29fb8: b1000117 ldw r4,4(r22) - 29fbc: 2084703a and r2,r4,r2 - 29fc0: b03f7726 beq r22,zero,29da0 <_gp+0xfffecf34> - 29fc4: 80af883a add r23,r16,r2 - 29fc8: b8ff7516 blt r23,r3,29da0 <_gp+0xfffecf34> - 29fcc: b0800317 ldw r2,12(r22) - 29fd0: b0c00217 ldw r3,8(r22) - 29fd4: 81bfff04 addi r6,r16,-4 - 29fd8: 01000904 movi r4,36 - 29fdc: 18800315 stw r2,12(r3) - 29fe0: 10c00215 stw r3,8(r2) - 29fe4: b4800204 addi r18,r22,8 - 29fe8: 21bfe52e bgeu r4,r6,29f80 <_gp+0xfffed114> - 29fec: a80b883a mov r5,r21 - 29ff0: 9009883a mov r4,r18 - 29ff4: 0028a340 call 28a34 - 29ff8: b821883a mov r16,r23 - 29ffc: b027883a mov r19,r22 - 2a000: 003f8a06 br 29e2c <_gp+0xfffecfc0> - 2a004: 300b883a mov r5,r6 - 2a008: dfc00917 ldw ra,36(sp) - 2a00c: df000817 ldw fp,32(sp) - 2a010: ddc00717 ldw r23,28(sp) - 2a014: dd800617 ldw r22,24(sp) - 2a018: dd400517 ldw r21,20(sp) - 2a01c: dd000417 ldw r20,16(sp) - 2a020: dcc00317 ldw r19,12(sp) - 2a024: dc800217 ldw r18,8(sp) - 2a028: dc400117 ldw r17,4(sp) - 2a02c: dc000017 ldw r16,0(sp) - 2a030: dec00a04 addi sp,sp,40 - 2a034: 0022bfc1 jmpi 22bfc <_malloc_r> - 2a038: a8c00017 ldw r3,0(r21) - 2a03c: 90c00015 stw r3,0(r18) - 2a040: a8c00117 ldw r3,4(r21) - 2a044: 90c00115 stw r3,4(r18) - 2a048: 00c006c4 movi r3,27 - 2a04c: 19804536 bltu r3,r6,2a164 <_realloc_r+0x470> - 2a050: 90800204 addi r2,r18,8 - 2a054: a8c00204 addi r3,r21,8 - 2a058: 003f6306 br 29de8 <_gp+0xfffecf7c> - 2a05c: 9005883a mov r2,r18 - 2a060: a8c00017 ldw r3,0(r21) - 2a064: b821883a mov r16,r23 - 2a068: b027883a mov r19,r22 - 2a06c: 10c00015 stw r3,0(r2) - 2a070: a8c00117 ldw r3,4(r21) - 2a074: 10c00115 stw r3,4(r2) - 2a078: a8c00217 ldw r3,8(r21) - 2a07c: 10c00215 stw r3,8(r2) - 2a080: 003f6a06 br 29e2c <_gp+0xfffecfc0> - 2a084: 9c67883a add r19,r19,r17 - 2a088: 4445c83a sub r2,r8,r17 - 2a08c: e4c00215 stw r19,8(fp) + 29e14: 8805883a mov r2,r17 + 29e18: 00001106 br 29e60 <_realloc_r+0x16c> + 29e1c: 00800404 movi r2,16 + 29e20: 102d883a mov r22,r2 + 29e24: 003fce06 br 29d60 <_realloc_r+0x6c> + 29e28: a023883a mov r17,r20 + 29e2c: 858fc83a sub r7,r16,r22 + 29e30: 008003c4 movi r2,15 + 29e34: 18c0004c andi r3,r3,1 + 29e38: 11c02436 bltu r2,r7,29ecc <_realloc_r+0x1d8> + 29e3c: 1c06b03a or r3,r3,r16 + 29e40: a8c00115 stw r3,4(r21) + 29e44: ac21883a add r16,r21,r16 + 29e48: 80800117 ldw r2,4(r16) + 29e4c: 10800054 ori r2,r2,1 + 29e50: 80800115 stw r2,4(r16) + 29e54: 9009883a mov r4,r18 + 29e58: 002fec80 call 2fec8 <__malloc_unlock> + 29e5c: 8805883a mov r2,r17 + 29e60: dfc00917 ldw ra,36(sp) + 29e64: df000817 ldw fp,32(sp) + 29e68: ddc00717 ldw r23,28(sp) + 29e6c: dd800617 ldw r22,24(sp) + 29e70: dd400517 ldw r21,20(sp) + 29e74: dd000417 ldw r20,16(sp) + 29e78: dcc00317 ldw r19,12(sp) + 29e7c: dc800217 ldw r18,8(sp) + 29e80: dc400117 ldw r17,4(sp) + 29e84: dc000017 ldw r16,0(sp) + 29e88: dec00a04 addi sp,sp,40 + 29e8c: f800283a ret + 29e90: 017fff04 movi r5,-4 + 29e94: 494a703a and r5,r9,r5 + 29e98: 814d883a add r6,r16,r5 + 29e9c: 30801e16 blt r6,r2,29f18 <_realloc_r+0x224> + 29ea0: 20800317 ldw r2,12(r4) + 29ea4: 21000217 ldw r4,8(r4) + 29ea8: a023883a mov r17,r20 + 29eac: 3021883a mov r16,r6 + 29eb0: 20800315 stw r2,12(r4) + 29eb4: 11000215 stw r4,8(r2) + 29eb8: 003fdc06 br 29e2c <_realloc_r+0x138> + 29ebc: 00800304 movi r2,12 + 29ec0: 90800015 stw r2,0(r18) + 29ec4: 0005883a mov r2,zero + 29ec8: 003fe506 br 29e60 <_realloc_r+0x16c> + 29ecc: 1d86b03a or r3,r3,r22 + 29ed0: a8c00115 stw r3,4(r21) + 29ed4: ad8b883a add r5,r21,r22 + 29ed8: 38c00054 ori r3,r7,1 + 29edc: 28c00115 stw r3,4(r5) + 29ee0: 29cf883a add r7,r5,r7 + 29ee4: 38c00117 ldw r3,4(r7) + 29ee8: 29400204 addi r5,r5,8 + 29eec: 9009883a mov r4,r18 + 29ef0: 18800054 ori r2,r3,1 + 29ef4: 38800115 stw r2,4(r7) + 29ef8: 0027c1c0 call 27c1c <_free_r> + 29efc: 003fd506 br 29e54 <_realloc_r+0x160> + 29f00: 21c00117 ldw r7,4(r4) + 29f04: 017fff04 movi r5,-4 + 29f08: b1800404 addi r6,r22,16 + 29f0c: 394a703a and r5,r7,r5 + 29f10: 814f883a add r7,r16,r5 + 29f14: 39805b0e bge r7,r6,2a084 <_realloc_r+0x390> + 29f18: 18c0004c andi r3,r3,1 + 29f1c: 183fa01e bne r3,zero,29da0 <_realloc_r+0xac> + 29f20: a4fffe17 ldw r19,-8(r20) + 29f24: 00ffff04 movi r3,-4 + 29f28: ace7c83a sub r19,r21,r19 + 29f2c: 99800117 ldw r6,4(r19) + 29f30: 30c6703a and r3,r6,r3 + 29f34: 20002026 beq r4,zero,29fb8 <_realloc_r+0x2c4> + 29f38: 80ef883a add r23,r16,r3 + 29f3c: b96f883a add r23,r23,r5 + 29f40: 22006126 beq r4,r8,2a0c8 <_realloc_r+0x3d4> + 29f44: b8801c16 blt r23,r2,29fb8 <_realloc_r+0x2c4> + 29f48: 20800317 ldw r2,12(r4) + 29f4c: 20c00217 ldw r3,8(r4) + 29f50: 81bfff04 addi r6,r16,-4 + 29f54: 01000904 movi r4,36 + 29f58: 18800315 stw r2,12(r3) + 29f5c: 10c00215 stw r3,8(r2) + 29f60: 98c00217 ldw r3,8(r19) + 29f64: 98800317 ldw r2,12(r19) + 29f68: 9c400204 addi r17,r19,8 + 29f6c: 18800315 stw r2,12(r3) + 29f70: 10c00215 stw r3,8(r2) + 29f74: 21801b36 bltu r4,r6,29fe4 <_realloc_r+0x2f0> + 29f78: 008004c4 movi r2,19 + 29f7c: 1180362e bgeu r2,r6,2a058 <_realloc_r+0x364> + 29f80: a0800017 ldw r2,0(r20) + 29f84: 98800215 stw r2,8(r19) + 29f88: a0800117 ldw r2,4(r20) + 29f8c: 98800315 stw r2,12(r19) + 29f90: 008006c4 movi r2,27 + 29f94: 11808136 bltu r2,r6,2a19c <_realloc_r+0x4a8> + 29f98: 98800404 addi r2,r19,16 + 29f9c: a5000204 addi r20,r20,8 + 29fa0: 00002e06 br 2a05c <_realloc_r+0x368> + 29fa4: a4fffe17 ldw r19,-8(r20) + 29fa8: 00ffff04 movi r3,-4 + 29fac: ace7c83a sub r19,r21,r19 + 29fb0: 99000117 ldw r4,4(r19) + 29fb4: 20c6703a and r3,r4,r3 + 29fb8: 983f7926 beq r19,zero,29da0 <_realloc_r+0xac> + 29fbc: 80ef883a add r23,r16,r3 + 29fc0: b8bf7716 blt r23,r2,29da0 <_realloc_r+0xac> + 29fc4: 98800317 ldw r2,12(r19) + 29fc8: 98c00217 ldw r3,8(r19) + 29fcc: 81bfff04 addi r6,r16,-4 + 29fd0: 01000904 movi r4,36 + 29fd4: 18800315 stw r2,12(r3) + 29fd8: 10c00215 stw r3,8(r2) + 29fdc: 9c400204 addi r17,r19,8 + 29fe0: 21bfe52e bgeu r4,r6,29f78 <_realloc_r+0x284> + 29fe4: a00b883a mov r5,r20 + 29fe8: 8809883a mov r4,r17 + 29fec: 0028a340 call 28a34 + 29ff0: 98c00117 ldw r3,4(r19) + 29ff4: b821883a mov r16,r23 + 29ff8: 982b883a mov r21,r19 + 29ffc: 003f8b06 br 29e2c <_realloc_r+0x138> + 2a000: 300b883a mov r5,r6 + 2a004: dfc00917 ldw ra,36(sp) + 2a008: df000817 ldw fp,32(sp) + 2a00c: ddc00717 ldw r23,28(sp) + 2a010: dd800617 ldw r22,24(sp) + 2a014: dd400517 ldw r21,20(sp) + 2a018: dd000417 ldw r20,16(sp) + 2a01c: dcc00317 ldw r19,12(sp) + 2a020: dc800217 ldw r18,8(sp) + 2a024: dc400117 ldw r17,4(sp) + 2a028: dc000017 ldw r16,0(sp) + 2a02c: dec00a04 addi sp,sp,40 + 2a030: 0022bfc1 jmpi 22bfc <_malloc_r> + 2a034: a0c00017 ldw r3,0(r20) + 2a038: 88c00015 stw r3,0(r17) + 2a03c: a0c00117 ldw r3,4(r20) + 2a040: 88c00115 stw r3,4(r17) + 2a044: 00c006c4 movi r3,27 + 2a048: 19804636 bltu r3,r6,2a164 <_realloc_r+0x470> + 2a04c: 88800204 addi r2,r17,8 + 2a050: a0c00204 addi r3,r20,8 + 2a054: 003f6406 br 29de8 <_realloc_r+0xf4> + 2a058: 8805883a mov r2,r17 + 2a05c: a0c00017 ldw r3,0(r20) + 2a060: b821883a mov r16,r23 + 2a064: 982b883a mov r21,r19 + 2a068: 10c00015 stw r3,0(r2) + 2a06c: a0c00117 ldw r3,4(r20) + 2a070: 10c00115 stw r3,4(r2) + 2a074: a0c00217 ldw r3,8(r20) + 2a078: 10c00215 stw r3,8(r2) + 2a07c: 98c00117 ldw r3,4(r19) + 2a080: 003f6a06 br 29e2c <_realloc_r+0x138> + 2a084: adab883a add r21,r21,r22 + 2a088: 3d85c83a sub r2,r7,r22 + 2a08c: e5400215 stw r21,8(fp) 2a090: 10800054 ori r2,r2,1 - 2a094: 98800115 stw r2,4(r19) - 2a098: a8bfff17 ldw r2,-4(r21) - 2a09c: a009883a mov r4,r20 + 2a094: a8800115 stw r2,4(r21) + 2a098: a0bfff17 ldw r2,-4(r20) + 2a09c: 9009883a mov r4,r18 2a0a0: 1080004c andi r2,r2,1 - 2a0a4: 1462b03a or r17,r2,r17 - 2a0a8: ac7fff15 stw r17,-4(r21) + 2a0a4: 1584b03a or r2,r2,r22 + 2a0a8: a0bfff15 stw r2,-4(r20) 2a0ac: 002fec80 call 2fec8 <__malloc_unlock> - 2a0b0: a805883a mov r2,r21 - 2a0b4: 003f6b06 br 29e64 <_gp+0xfffecff8> - 2a0b8: a80b883a mov r5,r21 - 2a0bc: 9009883a mov r4,r18 + 2a0b0: a005883a mov r2,r20 + 2a0b4: 003f6a06 br 29e60 <_realloc_r+0x16c> + 2a0b8: a00b883a mov r5,r20 + 2a0bc: 8809883a mov r4,r17 2a0c0: 0028a340 call 28a34 - 2a0c4: 003f4e06 br 29e00 <_gp+0xfffecf94> - 2a0c8: 89000404 addi r4,r17,16 - 2a0cc: b93fbc16 blt r23,r4,29fc0 <_gp+0xfffed154> - 2a0d0: b0800317 ldw r2,12(r22) - 2a0d4: b0c00217 ldw r3,8(r22) + 2a0c4: 003f4e06 br 29e00 <_realloc_r+0x10c> + 2a0c8: b1000404 addi r4,r22,16 + 2a0cc: b93fba16 blt r23,r4,29fb8 <_realloc_r+0x2c4> + 2a0d0: 98800317 ldw r2,12(r19) + 2a0d4: 98c00217 ldw r3,8(r19) 2a0d8: 81bfff04 addi r6,r16,-4 2a0dc: 01000904 movi r4,36 2a0e0: 18800315 stw r2,12(r3) 2a0e4: 10c00215 stw r3,8(r2) - 2a0e8: b4800204 addi r18,r22,8 + 2a0e8: 9c400204 addi r17,r19,8 2a0ec: 21804336 bltu r4,r6,2a1fc <_realloc_r+0x508> 2a0f0: 008004c4 movi r2,19 2a0f4: 11803f2e bgeu r2,r6,2a1f4 <_realloc_r+0x500> - 2a0f8: a8800017 ldw r2,0(r21) - 2a0fc: b0800215 stw r2,8(r22) - 2a100: a8800117 ldw r2,4(r21) - 2a104: b0800315 stw r2,12(r22) + 2a0f8: a0800017 ldw r2,0(r20) + 2a0fc: 98800215 stw r2,8(r19) + 2a100: a0800117 ldw r2,4(r20) + 2a104: 98800315 stw r2,12(r19) 2a108: 008006c4 movi r2,27 2a10c: 11803f36 bltu r2,r6,2a20c <_realloc_r+0x518> - 2a110: b0800404 addi r2,r22,16 - 2a114: ad400204 addi r21,r21,8 - 2a118: a8c00017 ldw r3,0(r21) + 2a110: 98800404 addi r2,r19,16 + 2a114: a5000204 addi r20,r20,8 + 2a118: a0c00017 ldw r3,0(r20) 2a11c: 10c00015 stw r3,0(r2) - 2a120: a8c00117 ldw r3,4(r21) + 2a120: a0c00117 ldw r3,4(r20) 2a124: 10c00115 stw r3,4(r2) - 2a128: a8c00217 ldw r3,8(r21) + 2a128: a0c00217 ldw r3,8(r20) 2a12c: 10c00215 stw r3,8(r2) - 2a130: b447883a add r3,r22,r17 - 2a134: bc45c83a sub r2,r23,r17 + 2a130: 9d87883a add r3,r19,r22 + 2a134: bd85c83a sub r2,r23,r22 2a138: e0c00215 stw r3,8(fp) 2a13c: 10800054 ori r2,r2,1 2a140: 18800115 stw r2,4(r3) - 2a144: b0800117 ldw r2,4(r22) - 2a148: a009883a mov r4,r20 + 2a144: 98800117 ldw r2,4(r19) + 2a148: 9009883a mov r4,r18 2a14c: 1080004c andi r2,r2,1 - 2a150: 1462b03a or r17,r2,r17 - 2a154: b4400115 stw r17,4(r22) + 2a150: 1584b03a or r2,r2,r22 + 2a154: 98800115 stw r2,4(r19) 2a158: 002fec80 call 2fec8 <__malloc_unlock> - 2a15c: 9005883a mov r2,r18 - 2a160: 003f4006 br 29e64 <_gp+0xfffecff8> - 2a164: a8c00217 ldw r3,8(r21) - 2a168: 90c00215 stw r3,8(r18) - 2a16c: a8c00317 ldw r3,12(r21) - 2a170: 90c00315 stw r3,12(r18) + 2a15c: 8805883a mov r2,r17 + 2a160: 003f3f06 br 29e60 <_realloc_r+0x16c> + 2a164: a0c00217 ldw r3,8(r20) + 2a168: 88c00215 stw r3,8(r17) + 2a16c: a0c00317 ldw r3,12(r20) + 2a170: 88c00315 stw r3,12(r17) 2a174: 30801126 beq r6,r2,2a1bc <_realloc_r+0x4c8> - 2a178: 90800404 addi r2,r18,16 - 2a17c: a8c00404 addi r3,r21,16 - 2a180: 003f1906 br 29de8 <_gp+0xfffecf7c> - 2a184: 90ffff17 ldw r3,-4(r18) + 2a178: 88800404 addi r2,r17,16 + 2a17c: a0c00404 addi r3,r20,16 + 2a180: 003f1906 br 29de8 <_realloc_r+0xf4> + 2a184: 893fff17 ldw r4,-4(r17) 2a188: 00bfff04 movi r2,-4 - 2a18c: a825883a mov r18,r21 - 2a190: 1884703a and r2,r3,r2 + 2a18c: a023883a mov r17,r20 + 2a190: 2084703a and r2,r4,r2 2a194: 80a1883a add r16,r16,r2 - 2a198: 003f2406 br 29e2c <_gp+0xfffecfc0> - 2a19c: a8800217 ldw r2,8(r21) - 2a1a0: b0800415 stw r2,16(r22) - 2a1a4: a8800317 ldw r2,12(r21) - 2a1a8: b0800515 stw r2,20(r22) + 2a198: 003f2406 br 29e2c <_realloc_r+0x138> + 2a19c: a0800217 ldw r2,8(r20) + 2a1a0: 98800415 stw r2,16(r19) + 2a1a4: a0800317 ldw r2,12(r20) + 2a1a8: 98800515 stw r2,20(r19) 2a1ac: 31000a26 beq r6,r4,2a1d8 <_realloc_r+0x4e4> - 2a1b0: b0800604 addi r2,r22,24 - 2a1b4: ad400404 addi r21,r21,16 - 2a1b8: 003fa906 br 2a060 <_gp+0xfffed1f4> - 2a1bc: a9000417 ldw r4,16(r21) - 2a1c0: 90800604 addi r2,r18,24 - 2a1c4: a8c00604 addi r3,r21,24 - 2a1c8: 91000415 stw r4,16(r18) - 2a1cc: a9000517 ldw r4,20(r21) - 2a1d0: 91000515 stw r4,20(r18) - 2a1d4: 003f0406 br 29de8 <_gp+0xfffecf7c> - 2a1d8: a8c00417 ldw r3,16(r21) - 2a1dc: ad400604 addi r21,r21,24 - 2a1e0: b0800804 addi r2,r22,32 - 2a1e4: b0c00615 stw r3,24(r22) - 2a1e8: a8ffff17 ldw r3,-4(r21) - 2a1ec: b0c00715 stw r3,28(r22) - 2a1f0: 003f9b06 br 2a060 <_gp+0xfffed1f4> - 2a1f4: 9005883a mov r2,r18 - 2a1f8: 003fc706 br 2a118 <_gp+0xfffed2ac> - 2a1fc: a80b883a mov r5,r21 - 2a200: 9009883a mov r4,r18 + 2a1b0: 98800604 addi r2,r19,24 + 2a1b4: a5000404 addi r20,r20,16 + 2a1b8: 003fa806 br 2a05c <_realloc_r+0x368> + 2a1bc: a1000417 ldw r4,16(r20) + 2a1c0: 88800604 addi r2,r17,24 + 2a1c4: a0c00604 addi r3,r20,24 + 2a1c8: 89000415 stw r4,16(r17) + 2a1cc: a1000517 ldw r4,20(r20) + 2a1d0: 89000515 stw r4,20(r17) + 2a1d4: 003f0406 br 29de8 <_realloc_r+0xf4> + 2a1d8: a0c00417 ldw r3,16(r20) + 2a1dc: a5000604 addi r20,r20,24 + 2a1e0: 98800804 addi r2,r19,32 + 2a1e4: 98c00615 stw r3,24(r19) + 2a1e8: a0ffff17 ldw r3,-4(r20) + 2a1ec: 98c00715 stw r3,28(r19) + 2a1f0: 003f9a06 br 2a05c <_realloc_r+0x368> + 2a1f4: 8805883a mov r2,r17 + 2a1f8: 003fc706 br 2a118 <_realloc_r+0x424> + 2a1fc: a00b883a mov r5,r20 + 2a200: 8809883a mov r4,r17 2a204: 0028a340 call 28a34 - 2a208: 003fc906 br 2a130 <_gp+0xfffed2c4> - 2a20c: a8800217 ldw r2,8(r21) - 2a210: b0800415 stw r2,16(r22) - 2a214: a8800317 ldw r2,12(r21) - 2a218: b0800515 stw r2,20(r22) + 2a208: 003fc906 br 2a130 <_realloc_r+0x43c> + 2a20c: a0800217 ldw r2,8(r20) + 2a210: 98800415 stw r2,16(r19) + 2a214: a0800317 ldw r2,12(r20) + 2a218: 98800515 stw r2,20(r19) 2a21c: 31000726 beq r6,r4,2a23c <_realloc_r+0x548> - 2a220: b0800604 addi r2,r22,24 - 2a224: ad400404 addi r21,r21,16 - 2a228: 003fbb06 br 2a118 <_gp+0xfffed2ac> - 2a22c: a009883a mov r4,r20 + 2a220: 98800604 addi r2,r19,24 + 2a224: a5000404 addi r20,r20,16 + 2a228: 003fbb06 br 2a118 <_realloc_r+0x424> + 2a22c: 9009883a mov r4,r18 2a230: 002fec80 call 2fec8 <__malloc_unlock> 2a234: 0005883a mov r2,zero - 2a238: 003f0a06 br 29e64 <_gp+0xfffecff8> - 2a23c: a8c00417 ldw r3,16(r21) - 2a240: ad400604 addi r21,r21,24 - 2a244: b0800804 addi r2,r22,32 - 2a248: b0c00615 stw r3,24(r22) - 2a24c: a8ffff17 ldw r3,-4(r21) - 2a250: b0c00715 stw r3,28(r22) - 2a254: 003fb006 br 2a118 <_gp+0xfffed2ac> + 2a238: 003f0906 br 29e60 <_realloc_r+0x16c> + 2a23c: a0c00417 ldw r3,16(r20) + 2a240: a5000604 addi r20,r20,24 + 2a244: 98800804 addi r2,r19,32 + 2a248: 98c00615 stw r3,24(r19) + 2a24c: a0ffff17 ldw r3,-4(r20) + 2a250: 98c00715 stw r3,28(r19) + 2a254: 003fb006 br 2a118 <_realloc_r+0x424> 0002a258 : 2a258: 2080030b ldhu r2,12(r4) @@ -12847,15 +12826,15 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2a364: 1000241e bne r2,zero,2a3f8 <__srefill_r+0x184> 2a368: 18c00114 ori r3,r3,4 2a36c: 80c0030d sth r3,12(r16) - 2a370: 003fe406 br 2a304 <_gp+0xfffed498> + 2a370: 003fe406 br 2a304 <__srefill_r+0x90> 2a374: 80c0030b ldhu r3,12(r16) 2a378: 1000161e bne r2,zero,2a3d4 <__srefill_r+0x160> 2a37c: 18c00814 ori r3,r3,32 2a380: 00bfffc4 movi r2,-1 2a384: 80c0030d sth r3,12(r16) - 2a388: 003fed06 br 2a340 <_gp+0xfffed4d4> + 2a388: 003fed06 br 2a340 <__srefill_r+0xcc> 2a38c: 0027aa80 call 27aa8 <__sinit> - 2a390: 003fc206 br 2a29c <_gp+0xfffed430> + 2a390: 003fc206 br 2a29c <__srefill_r+0x28> 2a394: 008000f4 movhi r2,3 2a398: 10939e04 addi r2,r2,20088 2a39c: 11000017 ldw r4,0(r2) @@ -12867,20 +12846,20 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2a3b4: 00800244 movi r2,9 2a3b8: 8480030d sth r18,12(r16) 2a3bc: 9480024c andi r18,r18,9 - 2a3c0: 90bfd51e bne r18,r2,2a318 <_gp+0xfffed4ac> + 2a3c0: 90bfd51e bne r18,r2,2a318 <__srefill_r+0xa4> 2a3c4: 800b883a mov r5,r16 2a3c8: 8809883a mov r4,r17 2a3cc: 00274b00 call 274b0 <__sflush_r> - 2a3d0: 003fd106 br 2a318 <_gp+0xfffed4ac> + 2a3d0: 003fd106 br 2a318 <__srefill_r+0xa4> 2a3d4: 18c01014 ori r3,r3,64 2a3d8: 80000115 stw zero,4(r16) 2a3dc: 00bfffc4 movi r2,-1 2a3e0: 80c0030d sth r3,12(r16) - 2a3e4: 003fd606 br 2a340 <_gp+0xfffed4d4> + 2a3e4: 003fd606 br 2a340 <__srefill_r+0xcc> 2a3e8: 80c00e17 ldw r3,56(r16) 2a3ec: 0005883a mov r2,zero 2a3f0: 80c00015 stw r3,0(r16) - 2a3f4: 003fd206 br 2a340 <_gp+0xfffed4d4> + 2a3f4: 003fd206 br 2a340 <__srefill_r+0xcc> 2a3f8: 800b883a mov r5,r16 2a3fc: 8809883a mov r4,r17 2a400: 00276cc0 call 276cc <_fflush_r> @@ -12890,17 +12869,17 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2a410: 80000215 stw zero,8(r16) 2a414: 1886703a and r3,r3,r2 2a418: 80000615 stw zero,24(r16) - 2a41c: 003fd206 br 2a368 <_gp+0xfffed4fc> + 2a41c: 003fd206 br 2a368 <__srefill_r+0xf4> 2a420: 00800244 movi r2,9 2a424: 88800015 stw r2,0(r17) 2a428: 18c01014 ori r3,r3,64 2a42c: 80c0030d sth r3,12(r16) 2a430: 00bfffc4 movi r2,-1 - 2a434: 003fc206 br 2a340 <_gp+0xfffed4d4> + 2a434: 003fc206 br 2a340 <__srefill_r+0xcc> 2a438: 800b883a mov r5,r16 2a43c: 8809883a mov r4,r17 2a440: 002864c0 call 2864c <__smakebuf_r> - 2a444: 003fb106 br 2a30c <_gp+0xfffed4a0> + 2a444: 003fb106 br 2a30c <__srefill_r+0x98> 0002a448 <__fpclassifyd>: 2a448: 00a00034 movhi r2,32768 @@ -12921,7 +12900,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2a484: 019ff834 movhi r6,32736 2a488: 28cb883a add r5,r5,r3 2a48c: 31bfffc4 addi r6,r6,-1 - 2a490: 317ff62e bgeu r6,r5,2a46c <_gp+0xfffed600> + 2a490: 317ff62e bgeu r6,r5,2a46c <__fpclassifyd+0x24> 2a494: 01400434 movhi r5,16 2a498: 297fffc4 addi r5,r5,-1 2a49c: 28800236 bltu r5,r2,2a4a8 <__fpclassifyd+0x60> @@ -13048,7 +13027,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2a650: 00c4303a nor r2,zero,r3 2a654: 3884703a and r2,r7,r2 2a658: 1204703a and r2,r2,r8 - 2a65c: 19bff626 beq r3,r6,2a638 <_gp+0xfffed7cc> + 2a65c: 19bff626 beq r3,r6,2a638 2a660: 20800003 ldbu r2,0(r4) 2a664: 10c03fcc andi r3,r2,255 2a668: 18c0201c xori r3,r3,128 @@ -13065,7 +13044,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2a694: 18803fcc andi r2,r3,255 2a698: 1080201c xori r2,r2,128 2a69c: 10bfe004 addi r2,r2,-128 - 2a6a0: 103ff71e bne r2,zero,2a680 <_gp+0xfffed814> + 2a6a0: 103ff71e bne r2,zero,2a680 2a6a4: 0007883a mov r3,zero 2a6a8: 28800003 ldbu r2,0(r5) 2a6ac: 1885c83a sub r2,r3,r2 @@ -13077,7 +13056,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2a6c4: 0005883a mov r2,zero 2a6c8: f800283a ret 2a6cc: 10c03fcc andi r3,r2,255 - 2a6d0: 003ff506 br 2a6a8 <_gp+0xfffed83c> + 2a6d0: 003ff506 br 2a6a8 0002a6d4 <__sprint_r.part.0>: 2a6d4: 28801917 ldw r2,100(r5) @@ -13115,7 +13094,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2a754: a009883a mov r4,r20 2a758: 002c2540 call 2c254 <_fputwc_r> 2a75c: e7000044 addi fp,fp,1 - 2a760: 14bff81e bne r2,r18,2a744 <_gp+0xfffed8d8> + 2a760: 14bff81e bne r2,r18,2a744 <__sprint_r.part.0+0x70> 2a764: 9005883a mov r2,r18 2a768: a8000215 stw zero,8(r21) 2a76c: a8000115 stw zero,4(r21) @@ -13138,11 +13117,11 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2a7b0: a8800215 stw r2,8(r21) 2a7b4: b5800204 addi r22,r22,8 2a7b8: bdc00204 addi r23,r23,8 - 2a7bc: 103fdb1e bne r2,zero,2a72c <_gp+0xfffed8c0> + 2a7bc: 103fdb1e bne r2,zero,2a72c <__sprint_r.part.0+0x58> 2a7c0: 0005883a mov r2,zero - 2a7c4: 003fe806 br 2a768 <_gp+0xfffed8fc> + 2a7c4: 003fe806 br 2a768 <__sprint_r.part.0+0x94> 2a7c8: 0027f2c0 call 27f2c <__sfvwrite_r> - 2a7cc: 003fe606 br 2a768 <_gp+0xfffed8fc> + 2a7cc: 003fe606 br 2a768 <__sprint_r.part.0+0x94> 0002a7d0 <__sprint_r>: 2a7d0: 30c00217 ldw r3,8(r6) @@ -13215,7 +13194,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2a8d4: 10c00326 beq r2,r3,2a8e4 <___vfiprintf_internal_r+0xfc> 2a8d8: 94800044 addi r18,r18,1 2a8dc: 90800007 ldb r2,0(r18) - 2a8e0: 103ffc1e bne r2,zero,2a8d4 <_gp+0xfffeda68> + 2a8e0: 103ffc1e bne r2,zero,2a8d4 <___vfiprintf_internal_r+0xec> 2a8e4: 9423c83a sub r17,r18,r16 2a8e8: 88001026 beq r17,zero,2a92c <___vfiprintf_internal_r+0x144> 2a8ec: d8c01c17 ldw r3,112(sp) @@ -13350,7 +13329,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2aaf0: da802317 ldw r10,140(sp) 2aaf4: 5455883a add r10,r10,r17 2aaf8: da802315 stw r10,140(sp) - 2aafc: 003f8b06 br 2a92c <_gp+0xfffedac0> + 2aafc: 003f8b06 br 2a92c <___vfiprintf_internal_r+0x144> 2ab00: d9002017 ldw r4,128(sp) 2ab04: a00b883a mov r5,r20 2ab08: 0025ad40 call 25ad4 <__swsetup_r> @@ -13358,9 +13337,9 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2ab10: a080030b ldhu r2,12(r20) 2ab14: 00c00284 movi r3,10 2ab18: 1080068c andi r2,r2,26 - 2ab1c: 10ff541e bne r2,r3,2a870 <_gp+0xfffeda04> + 2ab1c: 10ff541e bne r2,r3,2a870 <___vfiprintf_internal_r+0x88> 2ab20: a080038f ldh r2,14(r20) - 2ab24: 103f5216 blt r2,zero,2a870 <_gp+0xfffeda04> + 2ab24: 103f5216 blt r2,zero,2a870 <___vfiprintf_internal_r+0x88> 2ab28: d9c02217 ldw r7,136(sp) 2ab2c: d9002017 ldw r4,128(sp) 2ab30: e00d883a mov r6,fp @@ -13379,12 +13358,12 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2ab64: dec03704 addi sp,sp,220 2ab68: f800283a ret 2ab6c: 0027aa80 call 27aa8 <__sinit> - 2ab70: 003f2f06 br 2a830 <_gp+0xfffed9c4> + 2ab70: 003f2f06 br 2a830 <___vfiprintf_internal_r+0x48> 2ab74: 0463c83a sub r17,zero,r17 2ab78: d8802215 stw r2,136(sp) 2ab7c: a5000114 ori r20,r20,4 2ab80: 80c00007 ldb r3,0(r16) - 2ab84: 003f7706 br 2a964 <_gp+0xfffedaf8> + 2ab84: 003f7706 br 2a964 <___vfiprintf_internal_r+0x17c> 2ab88: 00800c04 movi r2,48 2ab8c: da802217 ldw r10,136(sp) 2ab90: d8801d05 stb r2,116(sp) @@ -13448,13 +13427,13 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2ac78: 41c00115 stw r7,4(r8) 2ac7c: d8801c15 stw r2,112(sp) 2ac80: d9001b15 stw r4,108(sp) - 2ac84: 793ff40e bge r15,r4,2ac58 <_gp+0xfffeddec> + 2ac84: 793ff40e bge r15,r4,2ac58 <___vfiprintf_internal_r+0x470> 2ac88: 1001b51e bne r2,zero,2b360 <___vfiprintf_internal_r+0xb78> 2ac8c: 843ffc04 addi r16,r16,-16 2ac90: 000d883a mov r6,zero 2ac94: 01400044 movi r5,1 2ac98: d811883a mov r8,sp - 2ac9c: 3c3ff316 blt r7,r16,2ac6c <_gp+0xfffede00> + 2ac9c: 3c3ff316 blt r7,r16,2ac6c <___vfiprintf_internal_r+0x484> 2aca0: 8007883a mov r3,r16 2aca4: da402517 ldw r9,148(sp) 2aca8: db802817 ldw r14,160(sp) @@ -13511,13 +13490,13 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2ad74: 41c00115 stw r7,4(r8) 2ad78: d8801c15 stw r2,112(sp) 2ad7c: d8c01b15 stw r3,108(sp) - 2ad80: 68fff40e bge r13,r3,2ad54 <_gp+0xfffedee8> + 2ad80: 68fff40e bge r13,r3,2ad54 <___vfiprintf_internal_r+0x56c> 2ad84: 1002241e bne r2,zero,2b618 <___vfiprintf_internal_r+0xe30> 2ad88: 843ffc04 addi r16,r16,-16 2ad8c: 01800044 movi r6,1 2ad90: 000b883a mov r5,zero 2ad94: d811883a mov r8,sp - 2ad98: 3c3ff316 blt r7,r16,2ad68 <_gp+0xfffedefc> + 2ad98: 3c3ff316 blt r7,r16,2ad68 <___vfiprintf_internal_r+0x580> 2ad9c: da402517 ldw r9,148(sp) 2ada0: e007883a mov r3,fp 2ada4: 8039883a mov fp,r16 @@ -13555,14 +13534,14 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2ae24: da802315 stw r10,140(sp) 2ae28: d8001b15 stw zero,108(sp) 2ae2c: d811883a mov r8,sp - 2ae30: 003ea206 br 2a8bc <_gp+0xfffeda50> + 2ae30: 003ea206 br 2a8bc <___vfiprintf_internal_r+0xd4> 2ae34: a5000814 ori r20,r20,32 2ae38: 80c00007 ldb r3,0(r16) - 2ae3c: 003ec906 br 2a964 <_gp+0xfffedaf8> + 2ae3c: 003ec906 br 2a964 <___vfiprintf_internal_r+0x17c> 2ae40: 80c00007 ldb r3,0(r16) 2ae44: 1b030926 beq r3,r12,2ba6c <___vfiprintf_internal_r+0x1284> 2ae48: a5000414 ori r20,r20,16 - 2ae4c: 003ec506 br 2a964 <_gp+0xfffedaf8> + 2ae4c: 003ec506 br 2a964 <___vfiprintf_internal_r+0x17c> 2ae50: 21003fcc andi r4,r4,255 2ae54: 20035e1e bne r4,zero,2bbd0 <___vfiprintf_internal_r+0x13e8> 2ae58: a080080c andi r2,r20,32 @@ -13577,7 +13556,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2ae7c: da802215 stw r10,136(sp) 2ae80: da802317 ldw r10,140(sp) 2ae84: 12800015 stw r10,0(r2) - 2ae88: 003e8c06 br 2a8bc <_gp+0xfffeda50> + 2ae88: 003e8c06 br 2a8bc <___vfiprintf_internal_r+0xd4> 2ae8c: 21003fcc andi r4,r4,255 2ae90: 2003511e bne r4,zero,2bbd8 <___vfiprintf_internal_r+0x13f0> 2ae94: a080080c andi r2,r20,32 @@ -13604,7 +13583,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2aee8: 20e4b03a or r18,r4,r3 2aeec: a8800005 stb r2,0(r21) 2aef0: 94c6b03a or r3,r18,r19 - 2aef4: 183ff61e bne r3,zero,2aed0 <_gp+0xfffee064> + 2aef4: 183ff61e bne r3,zero,2aed0 <___vfiprintf_internal_r+0x6e8> 2aef8: a0c0004c andi r3,r20,1 2aefc: 18005926 beq r3,zero,2b064 <___vfiprintf_internal_r+0x87c> 2af00: 10803fcc andi r2,r2,255 @@ -13617,7 +13596,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2af1c: a8ffffc5 stb r3,-1(r21) 2af20: 50a7c83a sub r19,r10,r2 2af24: 102b883a mov r21,r2 - 2af28: 003f2f06 br 2abe8 <_gp+0xfffedd7c> + 2af28: 003f2f06 br 2abe8 <___vfiprintf_internal_r+0x400> 2af2c: 21003fcc andi r4,r4,255 2af30: 2003421e bne r4,zero,2bc3c <___vfiprintf_internal_r+0x1454> 2af34: 008000f4 movhi r2,3 @@ -13638,7 +13617,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2af70: 48022216 blt r9,zero,2b7fc <___vfiprintf_internal_r+0x1014> 2af74: 00bfdfc4 movi r2,-129 2af78: a0a8703a and r20,r20,r2 - 2af7c: 003f1506 br 2abd4 <_gp+0xfffedd68> + 2af7c: 003f1506 br 2abd4 <___vfiprintf_internal_r+0x3ec> 2af80: da802217 ldw r10,136(sp) 2af84: 04800044 movi r18,1 2af88: d8001d85 stb zero,118(sp) @@ -13649,7 +13628,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2af9c: 9027883a mov r19,r18 2afa0: dd401004 addi r21,sp,64 2afa4: 0013883a mov r9,zero - 2afa8: 003f1706 br 2ac08 <_gp+0xfffedd9c> + 2afa8: 003f1706 br 2ac08 <___vfiprintf_internal_r+0x420> 2afac: 21003fcc andi r4,r4,255 2afb0: 2003201e bne r4,zero,2bc34 <___vfiprintf_internal_r+0x144c> 2afb4: a080080c andi r2,r20,32 @@ -13691,14 +13670,14 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2b044: 1021883a mov r16,r2 2b048: 10c4b03a or r2,r2,r3 2b04c: 1823883a mov r17,r3 - 2b050: 103fef1e bne r2,zero,2b010 <_gp+0xfffee1a4> + 2b050: 103fef1e bne r2,zero,2b010 <___vfiprintf_internal_r+0x828> 2b054: dc402417 ldw r17,144(sp) 2b058: dc002517 ldw r16,148(sp) 2b05c: 9013883a mov r9,r18 2b060: 9811883a mov r8,r19 2b064: da801e17 ldw r10,120(sp) 2b068: 5567c83a sub r19,r10,r21 - 2b06c: 003ede06 br 2abe8 <_gp+0xfffedd7c> + 2b06c: 003ede06 br 2abe8 <___vfiprintf_internal_r+0x400> 2b070: 38803fcc andi r2,r7,255 2b074: 1080201c xori r2,r2,128 2b078: 10bfe004 addi r2,r2,-128 @@ -13706,13 +13685,13 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2b080: 01000044 movi r4,1 2b084: 01c00804 movi r7,32 2b088: 80c00007 ldb r3,0(r16) - 2b08c: 003e3506 br 2a964 <_gp+0xfffedaf8> + 2b08c: 003e3506 br 2a964 <___vfiprintf_internal_r+0x17c> 2b090: a5000054 ori r20,r20,1 2b094: 80c00007 ldb r3,0(r16) - 2b098: 003e3206 br 2a964 <_gp+0xfffedaf8> + 2b098: 003e3206 br 2a964 <___vfiprintf_internal_r+0x17c> 2b09c: a5002014 ori r20,r20,128 2b0a0: 80c00007 ldb r3,0(r16) - 2b0a4: 003e2f06 br 2a964 <_gp+0xfffedaf8> + 2b0a4: 003e2f06 br 2a964 <___vfiprintf_internal_r+0x17c> 2b0a8: 8015883a mov r10,r16 2b0ac: 0023883a mov r17,zero 2b0b0: 18bff404 addi r2,r3,-48 @@ -13722,13 +13701,13 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2b0c0: 8015883a mov r10,r16 2b0c4: 1463883a add r17,r2,r17 2b0c8: 18bff404 addi r2,r3,-48 - 2b0cc: 30bff92e bgeu r6,r2,2b0b4 <_gp+0xfffee248> - 2b0d0: 003e2506 br 2a968 <_gp+0xfffedafc> + 2b0cc: 30bff92e bgeu r6,r2,2b0b4 <___vfiprintf_internal_r+0x8cc> + 2b0d0: 003e2506 br 2a968 <___vfiprintf_internal_r+0x180> 2b0d4: 21003fcc andi r4,r4,255 2b0d8: 2002d41e bne r4,zero,2bc2c <___vfiprintf_internal_r+0x1444> 2b0dc: a5000414 ori r20,r20,16 2b0e0: a080080c andi r2,r20,32 - 2b0e4: 103fb51e bne r2,zero,2afbc <_gp+0xfffee150> + 2b0e4: 103fb51e bne r2,zero,2afbc <___vfiprintf_internal_r+0x7d4> 2b0e8: a080040c andi r2,r20,16 2b0ec: 1001f826 beq r2,zero,2b8d0 <___vfiprintf_internal_r+0x10e8> 2b0f0: da802217 ldw r10,136(sp) @@ -13737,12 +13716,12 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2b0fc: da802215 stw r10,136(sp) 2b100: 9027d7fa srai r19,r18,31 2b104: 9805883a mov r2,r19 - 2b108: 003fb206 br 2afd4 <_gp+0xfffee168> + 2b108: 003fb206 br 2afd4 <___vfiprintf_internal_r+0x7ec> 2b10c: 21003fcc andi r4,r4,255 2b110: 2002c41e bne r4,zero,2bc24 <___vfiprintf_internal_r+0x143c> 2b114: a5000414 ori r20,r20,16 2b118: a080080c andi r2,r20,32 - 2b11c: 103f5f1e bne r2,zero,2ae9c <_gp+0xfffee030> + 2b11c: 103f5f1e bne r2,zero,2ae9c <___vfiprintf_internal_r+0x6b4> 2b120: a080040c andi r2,r20,16 2b124: 10020f26 beq r2,zero,2b964 <___vfiprintf_internal_r+0x117c> 2b128: da802217 ldw r10,136(sp) @@ -13754,12 +13733,12 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2b140: 00ffdfc4 movi r3,-129 2b144: d8802215 stw r2,136(sp) 2b148: a0e8703a and r20,r20,r3 - 2b14c: 903f5e1e bne r18,zero,2aec8 <_gp+0xfffee05c> + 2b14c: 903f5e1e bne r18,zero,2aec8 <___vfiprintf_internal_r+0x6e0> 2b150: 0039883a mov fp,zero 2b154: 4802a626 beq r9,zero,2bbf0 <___vfiprintf_internal_r+0x1408> 2b158: 0025883a mov r18,zero 2b15c: 0027883a mov r19,zero - 2b160: 003f5a06 br 2aecc <_gp+0xfffee060> + 2b160: 003f5a06 br 2aecc <___vfiprintf_internal_r+0x6e4> 2b164: 21003fcc andi r4,r4,255 2b168: 20029f1e bne r4,zero,2bbe8 <___vfiprintf_internal_r+0x1400> 2b16c: a5000414 ori r20,r20,16 @@ -13778,13 +13757,13 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2b1a0: d8802215 stw r2,136(sp) 2b1a4: 0039883a mov fp,zero 2b1a8: 94c4b03a or r2,r18,r19 - 2b1ac: 103f901e bne r2,zero,2aff0 <_gp+0xfffee184> + 2b1ac: 103f901e bne r2,zero,2aff0 <___vfiprintf_internal_r+0x808> 2b1b0: 00800044 movi r2,1 2b1b4: 10803fcc andi r2,r2,255 2b1b8: 00c00044 movi r3,1 2b1bc: 10c05926 beq r2,r3,2b324 <___vfiprintf_internal_r+0xb3c> 2b1c0: 00c00084 movi r3,2 - 2b1c4: 10ffe41e bne r2,r3,2b158 <_gp+0xfffee2ec> + 2b1c4: 10ffe41e bne r2,r3,2b158 <___vfiprintf_internal_r+0x970> 2b1c8: 0025883a mov r18,zero 2b1cc: 0027883a mov r19,zero 2b1d0: 00013d06 br 2b6c8 <___vfiprintf_internal_r+0xee0> @@ -13794,7 +13773,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2b1e0: 108a4e04 addi r2,r2,10552 2b1e4: d8802615 stw r2,152(sp) 2b1e8: a080080c andi r2,r20,32 - 2b1ec: 103f561e bne r2,zero,2af48 <_gp+0xfffee0dc> + 2b1ec: 103f561e bne r2,zero,2af48 <___vfiprintf_internal_r+0x760> 2b1f0: a080040c andi r2,r20,16 2b1f4: 1001d126 beq r2,zero,2b93c <___vfiprintf_internal_r+0x1154> 2b1f8: da802217 ldw r10,136(sp) @@ -13802,7 +13781,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2b200: 54800017 ldw r18,0(r10) 2b204: 52800104 addi r10,r10,4 2b208: da802215 stw r10,136(sp) - 2b20c: 003f5306 br 2af5c <_gp+0xfffee0f0> + 2b20c: 003f5306 br 2af5c <___vfiprintf_internal_r+0x774> 2b210: da802217 ldw r10,136(sp) 2b214: d8001d85 stb zero,118(sp) 2b218: 55400017 ldw r21,0(r10) @@ -13824,22 +13803,22 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2b258: df001d83 ldbu fp,118(sp) 2b25c: d8c02215 stw r3,136(sp) 2b260: 0013883a mov r9,zero - 2b264: 003e6006 br 2abe8 <_gp+0xfffedd7c> + 2b264: 003e6006 br 2abe8 <___vfiprintf_internal_r+0x400> 2b268: 21003fcc andi r4,r4,255 - 2b26c: 203fc026 beq r4,zero,2b170 <_gp+0xfffee304> + 2b26c: 203fc026 beq r4,zero,2b170 <___vfiprintf_internal_r+0x988> 2b270: d9c01d85 stb r7,118(sp) - 2b274: 003fbe06 br 2b170 <_gp+0xfffee304> + 2b274: 003fbe06 br 2b170 <___vfiprintf_internal_r+0x988> 2b278: da802217 ldw r10,136(sp) 2b27c: 54400017 ldw r17,0(r10) 2b280: 50800104 addi r2,r10,4 - 2b284: 883e3b16 blt r17,zero,2ab74 <_gp+0xfffedd08> + 2b284: 883e3b16 blt r17,zero,2ab74 <___vfiprintf_internal_r+0x38c> 2b288: d8802215 stw r2,136(sp) 2b28c: 80c00007 ldb r3,0(r16) - 2b290: 003db406 br 2a964 <_gp+0xfffedaf8> + 2b290: 003db406 br 2a964 <___vfiprintf_internal_r+0x17c> 2b294: 01000044 movi r4,1 2b298: 01c00ac4 movi r7,43 2b29c: 80c00007 ldb r3,0(r16) - 2b2a0: 003db006 br 2a964 <_gp+0xfffedaf8> + 2b2a0: 003db006 br 2a964 <___vfiprintf_internal_r+0x17c> 2b2a4: 80c00007 ldb r3,0(r16) 2b2a8: 82800044 addi r10,r16,1 2b2ac: 1b423c26 beq r3,r13,2bba0 <___vfiprintf_internal_r+0x13b8> @@ -13852,13 +13831,13 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2b2c8: 8015883a mov r10,r16 2b2cc: 4893883a add r9,r9,r2 2b2d0: 18bff404 addi r2,r3,-48 - 2b2d4: 30bff92e bgeu r6,r2,2b2bc <_gp+0xfffee450> - 2b2d8: 483da30e bge r9,zero,2a968 <_gp+0xfffedafc> + 2b2d4: 30bff92e bgeu r6,r2,2b2bc <___vfiprintf_internal_r+0xad4> + 2b2d8: 483da30e bge r9,zero,2a968 <___vfiprintf_internal_r+0x180> 2b2dc: 027fffc4 movi r9,-1 - 2b2e0: 003da106 br 2a968 <_gp+0xfffedafc> + 2b2e0: 003da106 br 2a968 <___vfiprintf_internal_r+0x180> 2b2e4: a5001014 ori r20,r20,64 2b2e8: 80c00007 ldb r3,0(r16) - 2b2ec: 003d9d06 br 2a964 <_gp+0xfffedaf8> + 2b2ec: 003d9d06 br 2a964 <___vfiprintf_internal_r+0x17c> 2b2f0: da802217 ldw r10,136(sp) 2b2f4: d8001d85 stb zero,118(sp) 2b2f8: 50c00204 addi r3,r10,8 @@ -13870,14 +13849,14 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2b310: d8c02215 stw r3,136(sp) 2b314: a128703a and r20,r20,r4 2b318: 0039883a mov fp,zero - 2b31c: 103f341e bne r2,zero,2aff0 <_gp+0xfffee184> - 2b320: 483e2e26 beq r9,zero,2abdc <_gp+0xfffedd70> + 2b31c: 103f341e bne r2,zero,2aff0 <___vfiprintf_internal_r+0x808> + 2b320: 483e2e26 beq r9,zero,2abdc <___vfiprintf_internal_r+0x3f4> 2b324: 0025883a mov r18,zero 2b328: 94800c04 addi r18,r18,48 2b32c: dc8019c5 stb r18,103(sp) 2b330: dcc02717 ldw r19,156(sp) 2b334: dd4019c4 addi r21,sp,103 - 2b338: 003e2b06 br 2abe8 <_gp+0xfffedd7c> + 2b338: 003e2b06 br 2abe8 <___vfiprintf_internal_r+0x400> 2b33c: 21003fcc andi r4,r4,255 2b340: 2002361e bne r4,zero,2bc1c <___vfiprintf_internal_r+0x1434> 2b344: 1801c126 beq r3,zero,2ba4c <___vfiprintf_internal_r+0x1264> @@ -13886,7 +13865,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2b350: d8001d85 stb zero,118(sp) 2b354: 9027883a mov r19,r18 2b358: dd401004 addi r21,sp,64 - 2b35c: 003f1106 br 2afa4 <_gp+0xfffee138> + 2b35c: 003f1106 br 2afa4 <___vfiprintf_internal_r+0x7bc> 2b360: d9402117 ldw r5,132(sp) 2b364: d9002017 ldw r4,128(sp) 2b368: d9801a04 addi r6,sp,104 @@ -13900,12 +13879,12 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2b388: d8801c17 ldw r2,112(sp) 2b38c: d811883a mov r8,sp 2b390: 31400044 addi r5,r6,1 - 2b394: 003e3306 br 2ac64 <_gp+0xfffeddf8> + 2b394: 003e3306 br 2ac64 <___vfiprintf_internal_r+0x47c> 2b398: d9401b17 ldw r5,108(sp) 2b39c: d8801c17 ldw r2,112(sp) 2b3a0: 29000044 addi r4,r5,1 2b3a4: d8c01d87 ldb r3,118(sp) - 2b3a8: 183e4d26 beq r3,zero,2ace0 <_gp+0xfffede74> + 2b3a8: 183e4d26 beq r3,zero,2ace0 <___vfiprintf_internal_r+0x4f8> 2b3ac: 00c00044 movi r3,1 2b3b0: d9401d84 addi r5,sp,118 2b3b4: 10c5883a add r2,r2,r3 @@ -13921,9 +13900,9 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2b3dc: 1809883a mov r4,r3 2b3e0: d811883a mov r8,sp 2b3e4: 00c02004 movi r3,128 - 2b3e8: e0fe4d26 beq fp,r3,2ad20 <_gp+0xfffedeb4> + 2b3e8: e0fe4d26 beq fp,r3,2ad20 <___vfiprintf_internal_r+0x538> 2b3ec: 4cf9c83a sub fp,r9,r19 - 2b3f0: 073e7b0e bge zero,fp,2ade0 <_gp+0xfffedf74> + 2b3f0: 073e7b0e bge zero,fp,2ade0 <___vfiprintf_internal_r+0x5f8> 2b3f4: 01c00404 movi r7,16 2b3f8: 3f01900e bge r7,fp,2ba3c <___vfiprintf_internal_r+0x1254> 2b3fc: 00c000f4 movhi r3,3 @@ -13942,13 +13921,13 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2b430: 41c00115 stw r7,4(r8) 2b434: d8801c15 stw r2,112(sp) 2b438: d8c01b15 stw r3,108(sp) - 2b43c: 68fff40e bge r13,r3,2b410 <_gp+0xfffee5a4> + 2b43c: 68fff40e bge r13,r3,2b410 <___vfiprintf_internal_r+0xc28> 2b440: 1000101e bne r2,zero,2b484 <___vfiprintf_internal_r+0xc9c> 2b444: e73ffc04 addi fp,fp,-16 2b448: 01000044 movi r4,1 2b44c: 000b883a mov r5,zero 2b450: d811883a mov r8,sp - 2b454: 3f3ff316 blt r7,fp,2b424 <_gp+0xfffee5b8> + 2b454: 3f3ff316 blt r7,fp,2b424 <___vfiprintf_internal_r+0xc3c> 2b458: da802417 ldw r10,144(sp) 2b45c: 1705883a add r2,r2,fp 2b460: 47000115 stw fp,4(r8) @@ -13959,7 +13938,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2b474: 19003616 blt r3,r4,2b550 <___vfiprintf_internal_r+0xd68> 2b478: 42000204 addi r8,r8,8 2b47c: 21000044 addi r4,r4,1 - 2b480: 003e5706 br 2ade0 <_gp+0xfffedf74> + 2b480: 003e5706 br 2ade0 <___vfiprintf_internal_r+0x5f8> 2b484: d9402117 ldw r5,132(sp) 2b488: d9002017 ldw r4,128(sp) 2b48c: d9801a04 addi r6,sp,104 @@ -13973,7 +13952,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2b4ac: d8801c17 ldw r2,112(sp) 2b4b0: d811883a mov r8,sp 2b4b4: 29000044 addi r4,r5,1 - 2b4b8: 003fd806 br 2b41c <_gp+0xfffee5b0> + 2b4b8: 003fd806 br 2b41c <___vfiprintf_internal_r+0xc34> 2b4bc: d9401b17 ldw r5,108(sp) 2b4c0: 00c000f4 movhi r3,3 2b4c4: 18cab704 addi r3,r3,10972 @@ -13987,7 +13966,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2b4e4: d9401b15 stw r5,108(sp) 2b4e8: 00c001c4 movi r3,7 2b4ec: 1940070e bge r3,r5,2b50c <___vfiprintf_internal_r+0xd24> - 2b4f0: 103e4826 beq r2,zero,2ae14 <_gp+0xfffedfa8> + 2b4f0: 103e4826 beq r2,zero,2ae14 <___vfiprintf_internal_r+0x62c> 2b4f4: d9402117 ldw r5,132(sp) 2b4f8: d9002017 ldw r4,128(sp) 2b4fc: d9801a04 addi r6,sp,104 @@ -13999,18 +13978,18 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2b514: da802317 ldw r10,140(sp) 2b518: 5455883a add r10,r10,r17 2b51c: da802315 stw r10,140(sp) - 2b520: 103e4126 beq r2,zero,2ae28 <_gp+0xfffedfbc> + 2b520: 103e4126 beq r2,zero,2ae28 <___vfiprintf_internal_r+0x640> 2b524: d9402117 ldw r5,132(sp) 2b528: d9002017 ldw r4,128(sp) 2b52c: d9801a04 addi r6,sp,104 2b530: 002a6d40 call 2a6d4 <__sprint_r.part.0> - 2b534: 103e3c26 beq r2,zero,2ae28 <_gp+0xfffedfbc> + 2b534: 103e3c26 beq r2,zero,2ae28 <___vfiprintf_internal_r+0x640> 2b538: dd002117 ldw r20,132(sp) 2b53c: a080030b ldhu r2,12(r20) 2b540: 1080100c andi r2,r2,64 2b544: 1001231e bne r2,zero,2b9d4 <___vfiprintf_internal_r+0x11ec> 2b548: d8802317 ldw r2,140(sp) - 2b54c: 003d7b06 br 2ab3c <_gp+0xfffedcd0> + 2b54c: 003d7b06 br 2ab3c <___vfiprintf_internal_r+0x354> 2b550: 1000991e bne r2,zero,2b7b8 <___vfiprintf_internal_r+0xfd0> 2b554: 00c00044 movi r3,1 2b558: 9805883a mov r2,r19 @@ -14021,11 +14000,11 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2b56c: d811883a mov r8,sp 2b570: 42000204 addi r8,r8,8 2b574: a2c0010c andi r11,r20,4 - 2b578: 583fe426 beq r11,zero,2b50c <_gp+0xfffee6a0> + 2b578: 583fe426 beq r11,zero,2b50c <___vfiprintf_internal_r+0xd24> 2b57c: 8ca7c83a sub r19,r17,r18 - 2b580: 04ffe20e bge zero,r19,2b50c <_gp+0xfffee6a0> + 2b580: 04ffe20e bge zero,r19,2b50c <___vfiprintf_internal_r+0xd24> 2b584: 01c00404 movi r7,16 - 2b588: 3cffcc0e bge r7,r19,2b4bc <_gp+0xfffee650> + 2b588: 3cffcc0e bge r7,r19,2b4bc <___vfiprintf_internal_r+0xcd4> 2b58c: 028000f4 movhi r10,3 2b590: 528ab704 addi r10,r10,10972 2b594: d9001b17 ldw r4,108(sp) @@ -14038,29 +14017,29 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2b5b0: 42000204 addi r8,r8,8 2b5b4: 1809883a mov r4,r3 2b5b8: 9cfffc04 addi r19,r19,-16 - 2b5bc: acffc40e bge r21,r19,2b4d0 <_gp+0xfffee664> + 2b5bc: acffc40e bge r21,r19,2b4d0 <___vfiprintf_internal_r+0xce8> 2b5c0: 10800404 addi r2,r2,16 2b5c4: 20c00044 addi r3,r4,1 2b5c8: 45800015 stw r22,0(r8) 2b5cc: 45400115 stw r21,4(r8) 2b5d0: d8801c15 stw r2,112(sp) 2b5d4: d8c01b15 stw r3,108(sp) - 2b5d8: a0fff40e bge r20,r3,2b5ac <_gp+0xfffee740> + 2b5d8: a0fff40e bge r20,r3,2b5ac <___vfiprintf_internal_r+0xdc4> 2b5dc: 1000041e bne r2,zero,2b5f0 <___vfiprintf_internal_r+0xe08> 2b5e0: 01400044 movi r5,1 2b5e4: 0009883a mov r4,zero 2b5e8: d811883a mov r8,sp - 2b5ec: 003ff206 br 2b5b8 <_gp+0xfffee74c> + 2b5ec: 003ff206 br 2b5b8 <___vfiprintf_internal_r+0xdd0> 2b5f0: d9402117 ldw r5,132(sp) 2b5f4: d9801a04 addi r6,sp,104 2b5f8: e009883a mov r4,fp 2b5fc: 002a6d40 call 2a6d4 <__sprint_r.part.0> - 2b600: 103fcd1e bne r2,zero,2b538 <_gp+0xfffee6cc> + 2b600: 103fcd1e bne r2,zero,2b538 <___vfiprintf_internal_r+0xd50> 2b604: d9001b17 ldw r4,108(sp) 2b608: d8801c17 ldw r2,112(sp) 2b60c: d811883a mov r8,sp 2b610: 21400044 addi r5,r4,1 - 2b614: 003fe806 br 2b5b8 <_gp+0xfffee74c> + 2b614: 003fe806 br 2b5b8 <___vfiprintf_internal_r+0xdd0> 2b618: d9402117 ldw r5,132(sp) 2b61c: d9002017 ldw r4,128(sp) 2b620: d9801a04 addi r6,sp,104 @@ -14069,12 +14048,12 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2b62c: 002a6d40 call 2a6d4 <__sprint_r.part.0> 2b630: d9c02b17 ldw r7,172(sp) 2b634: db402a17 ldw r13,168(sp) - 2b638: 103fbf1e bne r2,zero,2b538 <_gp+0xfffee6cc> + 2b638: 103fbf1e bne r2,zero,2b538 <___vfiprintf_internal_r+0xd50> 2b63c: d9401b17 ldw r5,108(sp) 2b640: d8801c17 ldw r2,112(sp) 2b644: d811883a mov r8,sp 2b648: 29800044 addi r6,r5,1 - 2b64c: 003dc406 br 2ad60 <_gp+0xfffedef4> + 2b64c: 003dc406 br 2ad60 <___vfiprintf_internal_r+0x578> 2b650: 1000d21e bne r2,zero,2b99c <___vfiprintf_internal_r+0x11b4> 2b654: d8c01d87 ldb r3,118(sp) 2b658: 18009526 beq r3,zero,2b8b0 <___vfiprintf_internal_r+0x10c8> @@ -14087,7 +14066,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2b674: 200b883a mov r5,r4 2b678: 42000204 addi r8,r8,8 2b67c: 21000044 addi r4,r4,1 - 2b680: 003d9706 br 2ace0 <_gp+0xfffede74> + 2b680: 003d9706 br 2ace0 <___vfiprintf_internal_r+0x4f8> 2b684: d9001d04 addi r4,sp,116 2b688: 00800084 movi r2,2 2b68c: d9000015 stw r4,0(sp) @@ -14097,13 +14076,13 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2b69c: 200b883a mov r5,r4 2b6a0: 42000204 addi r8,r8,8 2b6a4: 21000044 addi r4,r4,1 - 2b6a8: 003f4e06 br 2b3e4 <_gp+0xfffee578> + 2b6a8: 003f4e06 br 2b3e4 <___vfiprintf_internal_r+0xbfc> 2b6ac: d8001d85 stb zero,118(sp) 2b6b0: 48005016 blt r9,zero,2b7f4 <___vfiprintf_internal_r+0x100c> 2b6b4: 00ffdfc4 movi r3,-129 2b6b8: 94c4b03a or r2,r18,r19 2b6bc: a0e8703a and r20,r20,r3 - 2b6c0: 103d4426 beq r2,zero,2abd4 <_gp+0xfffedd68> + 2b6c0: 103d4426 beq r2,zero,2abd4 <___vfiprintf_internal_r+0x3ec> 2b6c4: 0039883a mov fp,zero 2b6c8: d9002617 ldw r4,152(sp) 2b6cc: dd401a04 addi r21,sp,104 @@ -14117,23 +14096,23 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2b6ec: 1ca4b03a or r18,r3,r18 2b6f0: a8800005 stb r2,0(r21) 2b6f4: 94c4b03a or r2,r18,r19 - 2b6f8: 103ff51e bne r2,zero,2b6d0 <_gp+0xfffee864> - 2b6fc: 003e5906 br 2b064 <_gp+0xfffee1f8> + 2b6f8: 103ff51e bne r2,zero,2b6d0 <___vfiprintf_internal_r+0xee8> + 2b6fc: 003e5906 br 2b064 <___vfiprintf_internal_r+0x87c> 2b700: d9402117 ldw r5,132(sp) 2b704: d9002017 ldw r4,128(sp) 2b708: d9801a04 addi r6,sp,104 2b70c: 002a6d40 call 2a6d4 <__sprint_r.part.0> - 2b710: 103f891e bne r2,zero,2b538 <_gp+0xfffee6cc> + 2b710: 103f891e bne r2,zero,2b538 <___vfiprintf_internal_r+0xd50> 2b714: d8801c17 ldw r2,112(sp) 2b718: d811883a mov r8,sp - 2b71c: 003f9506 br 2b574 <_gp+0xfffee708> + 2b71c: 003f9506 br 2b574 <___vfiprintf_internal_r+0xd8c> 2b720: d9402117 ldw r5,132(sp) 2b724: d9002017 ldw r4,128(sp) 2b728: d9801a04 addi r6,sp,104 2b72c: 002a6d40 call 2a6d4 <__sprint_r.part.0> - 2b730: 103f811e bne r2,zero,2b538 <_gp+0xfffee6cc> + 2b730: 103f811e bne r2,zero,2b538 <___vfiprintf_internal_r+0xd50> 2b734: d811883a mov r8,sp - 2b738: 003ced06 br 2aaf0 <_gp+0xfffedc84> + 2b738: 003ced06 br 2aaf0 <___vfiprintf_internal_r+0x308> 2b73c: d9402117 ldw r5,132(sp) 2b740: d9002017 ldw r4,128(sp) 2b744: d9801a04 addi r6,sp,104 @@ -14142,63 +14121,63 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2b750: 002a6d40 call 2a6d4 <__sprint_r.part.0> 2b754: da402c17 ldw r9,176(sp) 2b758: db802a17 ldw r14,168(sp) - 2b75c: 103f761e bne r2,zero,2b538 <_gp+0xfffee6cc> + 2b75c: 103f761e bne r2,zero,2b538 <___vfiprintf_internal_r+0xd50> 2b760: d9401b17 ldw r5,108(sp) 2b764: d8801c17 ldw r2,112(sp) 2b768: d811883a mov r8,sp 2b76c: 29000044 addi r4,r5,1 - 2b770: 003d5b06 br 2ace0 <_gp+0xfffede74> + 2b770: 003d5b06 br 2ace0 <___vfiprintf_internal_r+0x4f8> 2b774: d9402117 ldw r5,132(sp) 2b778: d9002017 ldw r4,128(sp) 2b77c: d9801a04 addi r6,sp,104 2b780: da402c15 stw r9,176(sp) 2b784: 002a6d40 call 2a6d4 <__sprint_r.part.0> 2b788: da402c17 ldw r9,176(sp) - 2b78c: 103f6a1e bne r2,zero,2b538 <_gp+0xfffee6cc> + 2b78c: 103f6a1e bne r2,zero,2b538 <___vfiprintf_internal_r+0xd50> 2b790: d9401b17 ldw r5,108(sp) 2b794: d8801c17 ldw r2,112(sp) 2b798: d811883a mov r8,sp 2b79c: 29000044 addi r4,r5,1 - 2b7a0: 003f1006 br 2b3e4 <_gp+0xfffee578> + 2b7a0: 003f1006 br 2b3e4 <___vfiprintf_internal_r+0xbfc> 2b7a4: 1000c31e bne r2,zero,2bab4 <___vfiprintf_internal_r+0x12cc> 2b7a8: 01000044 movi r4,1 2b7ac: 000b883a mov r5,zero 2b7b0: d811883a mov r8,sp - 2b7b4: 003f0d06 br 2b3ec <_gp+0xfffee580> + 2b7b4: 003f0d06 br 2b3ec <___vfiprintf_internal_r+0xc04> 2b7b8: d9402117 ldw r5,132(sp) 2b7bc: d9002017 ldw r4,128(sp) 2b7c0: d9801a04 addi r6,sp,104 2b7c4: 002a6d40 call 2a6d4 <__sprint_r.part.0> - 2b7c8: 103f5b1e bne r2,zero,2b538 <_gp+0xfffee6cc> + 2b7c8: 103f5b1e bne r2,zero,2b538 <___vfiprintf_internal_r+0xd50> 2b7cc: d9001b17 ldw r4,108(sp) 2b7d0: d8801c17 ldw r2,112(sp) 2b7d4: d811883a mov r8,sp 2b7d8: 21000044 addi r4,r4,1 - 2b7dc: 003d8006 br 2ade0 <_gp+0xfffedf74> + 2b7dc: 003d8006 br 2ade0 <___vfiprintf_internal_r+0x5f8> 2b7e0: 010000f4 movhi r4,3 2b7e4: 210a5304 addi r4,r4,10572 2b7e8: d9002615 stw r4,152(sp) 2b7ec: d8c02215 stw r3,136(sp) 2b7f0: 1029883a mov r20,r2 2b7f4: 94c4b03a or r2,r18,r19 - 2b7f8: 103fb21e bne r2,zero,2b6c4 <_gp+0xfffee858> + 2b7f8: 103fb21e bne r2,zero,2b6c4 <___vfiprintf_internal_r+0xedc> 2b7fc: 0039883a mov fp,zero 2b800: 00800084 movi r2,2 - 2b804: 003e6b06 br 2b1b4 <_gp+0xfffee348> + 2b804: 003e6b06 br 2b1b4 <___vfiprintf_internal_r+0x9cc> 2b808: da802217 ldw r10,136(sp) 2b80c: d8001d85 stb zero,118(sp) 2b810: 0027883a mov r19,zero 2b814: 50800104 addi r2,r10,4 2b818: 54800017 ldw r18,0(r10) - 2b81c: 483e6016 blt r9,zero,2b1a0 <_gp+0xfffee334> + 2b81c: 483e6016 blt r9,zero,2b1a0 <___vfiprintf_internal_r+0x9b8> 2b820: 00ffdfc4 movi r3,-129 2b824: d8802215 stw r2,136(sp) 2b828: a0e8703a and r20,r20,r3 2b82c: 0039883a mov fp,zero - 2b830: 903ebb26 beq r18,zero,2b320 <_gp+0xfffee4b4> + 2b830: 903ebb26 beq r18,zero,2b320 <___vfiprintf_internal_r+0xb38> 2b834: 00800244 movi r2,9 - 2b838: 14bdee36 bltu r2,r18,2aff4 <_gp+0xfffee188> - 2b83c: 003eba06 br 2b328 <_gp+0xfffee4bc> + 2b838: 14bdee36 bltu r2,r18,2aff4 <___vfiprintf_internal_r+0x80c> + 2b83c: 003eba06 br 2b328 <___vfiprintf_internal_r+0xb40> 2b840: 00800c04 movi r2,48 2b844: d8c01d45 stb r3,117(sp) 2b848: d8801d05 stb r2,116(sp) @@ -14209,14 +14188,14 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2b85c: a096703a and r11,r20,r2 2b860: 5d000094 ori r20,r11,2 2b864: 0039883a mov fp,zero - 2b868: 003f9706 br 2b6c8 <_gp+0xfffee85c> + 2b868: 003f9706 br 2b6c8 <___vfiprintf_internal_r+0xee0> 2b86c: 8025883a mov r18,r16 - 2b870: 003c2e06 br 2a92c <_gp+0xfffedac0> + 2b870: 003c2e06 br 2a92c <___vfiprintf_internal_r+0x144> 2b874: 008000f4 movhi r2,3 2b878: 108a5304 addi r2,r2,10572 2b87c: 0039883a mov fp,zero 2b880: d8802615 stw r2,152(sp) - 2b884: 003f9006 br 2b6c8 <_gp+0xfffee85c> + 2b884: 003f9006 br 2b6c8 <___vfiprintf_internal_r+0xee0> 2b888: 04a5c83a sub r18,zero,r18 2b88c: 07000b44 movi fp,45 2b890: 9004c03a cmpne r2,r18,zero @@ -14226,7 +14205,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2b8a0: 48009f16 blt r9,zero,2bb20 <___vfiprintf_internal_r+0x1338> 2b8a4: 00bfdfc4 movi r2,-129 2b8a8: a0a8703a and r20,r20,r2 - 2b8ac: 003dd006 br 2aff0 <_gp+0xfffee184> + 2b8ac: 003dd006 br 2aff0 <___vfiprintf_internal_r+0x808> 2b8b0: 70004c26 beq r14,zero,2b9e4 <___vfiprintf_internal_r+0x11fc> 2b8b4: 00800084 movi r2,2 2b8b8: d8c01d04 addi r3,sp,116 @@ -14234,16 +14213,16 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2b8c0: d8800115 stw r2,4(sp) 2b8c4: 01000044 movi r4,1 2b8c8: d811883a mov r8,sp - 2b8cc: 003f7306 br 2b69c <_gp+0xfffee830> + 2b8cc: 003f7306 br 2b69c <___vfiprintf_internal_r+0xeb4> 2b8d0: a080100c andi r2,r20,64 2b8d4: da802217 ldw r10,136(sp) - 2b8d8: 103e0626 beq r2,zero,2b0f4 <_gp+0xfffee288> + 2b8d8: 103e0626 beq r2,zero,2b0f4 <___vfiprintf_internal_r+0x90c> 2b8dc: 5480000f ldh r18,0(r10) 2b8e0: 52800104 addi r10,r10,4 2b8e4: da802215 stw r10,136(sp) 2b8e8: 9027d7fa srai r19,r18,31 2b8ec: 9805883a mov r2,r19 - 2b8f0: 003db806 br 2afd4 <_gp+0xfffee168> + 2b8f0: 003db806 br 2afd4 <___vfiprintf_internal_r+0x7ec> 2b8f4: a080040c andi r2,r20,16 2b8f8: 1000091e bne r2,zero,2b920 <___vfiprintf_internal_r+0x1138> 2b8fc: a2c0100c andi r11,r20,64 @@ -14254,14 +14233,14 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2b910: da802215 stw r10,136(sp) 2b914: da802317 ldw r10,140(sp) 2b918: 1280000d sth r10,0(r2) - 2b91c: 003be706 br 2a8bc <_gp+0xfffeda50> + 2b91c: 003be706 br 2a8bc <___vfiprintf_internal_r+0xd4> 2b920: da802217 ldw r10,136(sp) 2b924: 50800017 ldw r2,0(r10) 2b928: 52800104 addi r10,r10,4 2b92c: da802215 stw r10,136(sp) 2b930: da802317 ldw r10,140(sp) 2b934: 12800015 stw r10,0(r2) - 2b938: 003be006 br 2a8bc <_gp+0xfffeda50> + 2b938: 003be006 br 2a8bc <___vfiprintf_internal_r+0xd4> 2b93c: a080100c andi r2,r20,64 2b940: da802217 ldw r10,136(sp) 2b944: 10003026 beq r2,zero,2ba08 <___vfiprintf_internal_r+0x1220> @@ -14269,9 +14248,9 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2b94c: 52800104 addi r10,r10,4 2b950: 0027883a mov r19,zero 2b954: da802215 stw r10,136(sp) - 2b958: 003d8006 br 2af5c <_gp+0xfffee0f0> + 2b958: 003d8006 br 2af5c <___vfiprintf_internal_r+0x774> 2b95c: 80c00007 ldb r3,0(r16) - 2b960: 003c0006 br 2a964 <_gp+0xfffedaf8> + 2b960: 003c0006 br 2a964 <___vfiprintf_internal_r+0x17c> 2b964: a080100c andi r2,r20,64 2b968: d8001d85 stb zero,118(sp) 2b96c: da802217 ldw r10,136(sp) @@ -14279,13 +14258,13 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2b974: 50800104 addi r2,r10,4 2b978: 54800017 ldw r18,0(r10) 2b97c: 0027883a mov r19,zero - 2b980: 483def0e bge r9,zero,2b140 <_gp+0xfffee2d4> + 2b980: 483def0e bge r9,zero,2b140 <___vfiprintf_internal_r+0x958> 2b984: 94c6b03a or r3,r18,r19 2b988: d8802215 stw r2,136(sp) - 2b98c: 183d4e1e bne r3,zero,2aec8 <_gp+0xfffee05c> + 2b98c: 183d4e1e bne r3,zero,2aec8 <___vfiprintf_internal_r+0x6e0> 2b990: 0039883a mov fp,zero 2b994: 0005883a mov r2,zero - 2b998: 003e0606 br 2b1b4 <_gp+0xfffee348> + 2b998: 003e0606 br 2b1b4 <___vfiprintf_internal_r+0x9cc> 2b99c: d9402117 ldw r5,132(sp) 2b9a0: d9002017 ldw r4,128(sp) 2b9a4: d9801a04 addi r6,sp,104 @@ -14294,57 +14273,57 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2b9b0: 002a6d40 call 2a6d4 <__sprint_r.part.0> 2b9b4: da402c17 ldw r9,176(sp) 2b9b8: db802a17 ldw r14,168(sp) - 2b9bc: 103ede1e bne r2,zero,2b538 <_gp+0xfffee6cc> + 2b9bc: 103ede1e bne r2,zero,2b538 <___vfiprintf_internal_r+0xd50> 2b9c0: d9401b17 ldw r5,108(sp) 2b9c4: d8801c17 ldw r2,112(sp) 2b9c8: d811883a mov r8,sp 2b9cc: 29000044 addi r4,r5,1 - 2b9d0: 003e7406 br 2b3a4 <_gp+0xfffee538> + 2b9d0: 003e7406 br 2b3a4 <___vfiprintf_internal_r+0xbbc> 2b9d4: 00bfffc4 movi r2,-1 - 2b9d8: 003c5806 br 2ab3c <_gp+0xfffedcd0> + 2b9d8: 003c5806 br 2ab3c <___vfiprintf_internal_r+0x354> 2b9dc: d811883a mov r8,sp - 2b9e0: 003ee806 br 2b584 <_gp+0xfffee718> + 2b9e0: 003ee806 br 2b584 <___vfiprintf_internal_r+0xd9c> 2b9e4: 000b883a mov r5,zero 2b9e8: 01000044 movi r4,1 2b9ec: d811883a mov r8,sp - 2b9f0: 003e7c06 br 2b3e4 <_gp+0xfffee578> + 2b9f0: 003e7c06 br 2b3e4 <___vfiprintf_internal_r+0xbfc> 2b9f4: 50800104 addi r2,r10,4 2b9f8: 5480000b ldhu r18,0(r10) 2b9fc: 0027883a mov r19,zero - 2ba00: 483dcf0e bge r9,zero,2b140 <_gp+0xfffee2d4> - 2ba04: 003fdf06 br 2b984 <_gp+0xfffeeb18> + 2ba00: 483dcf0e bge r9,zero,2b140 <___vfiprintf_internal_r+0x958> + 2ba04: 003fdf06 br 2b984 <___vfiprintf_internal_r+0x119c> 2ba08: 54800017 ldw r18,0(r10) 2ba0c: 52800104 addi r10,r10,4 2ba10: 0027883a mov r19,zero 2ba14: da802215 stw r10,136(sp) - 2ba18: 003d5006 br 2af5c <_gp+0xfffee0f0> + 2ba18: 003d5006 br 2af5c <___vfiprintf_internal_r+0x774> 2ba1c: 50800104 addi r2,r10,4 2ba20: 5480000b ldhu r18,0(r10) 2ba24: 0027883a mov r19,zero - 2ba28: 483f7d0e bge r9,zero,2b820 <_gp+0xfffee9b4> - 2ba2c: 003ddc06 br 2b1a0 <_gp+0xfffee334> + 2ba28: 483f7d0e bge r9,zero,2b820 <___vfiprintf_internal_r+0x1038> + 2ba2c: 003ddc06 br 2b1a0 <___vfiprintf_internal_r+0x9b8> 2ba30: d8c02215 stw r3,136(sp) 2ba34: 0039883a mov fp,zero - 2ba38: 003ddb06 br 2b1a8 <_gp+0xfffee33c> + 2ba38: 003ddb06 br 2b1a8 <___vfiprintf_internal_r+0x9c0> 2ba3c: 028000f4 movhi r10,3 2ba40: 528ab304 addi r10,r10,10956 2ba44: da802415 stw r10,144(sp) - 2ba48: 003e8306 br 2b458 <_gp+0xfffee5ec> + 2ba48: 003e8306 br 2b458 <___vfiprintf_internal_r+0xc70> 2ba4c: d8801c17 ldw r2,112(sp) 2ba50: dd002117 ldw r20,132(sp) - 2ba54: 103eb926 beq r2,zero,2b53c <_gp+0xfffee6d0> + 2ba54: 103eb926 beq r2,zero,2b53c <___vfiprintf_internal_r+0xd54> 2ba58: d9002017 ldw r4,128(sp) 2ba5c: d9801a04 addi r6,sp,104 2ba60: a00b883a mov r5,r20 2ba64: 002a6d40 call 2a6d4 <__sprint_r.part.0> - 2ba68: 003eb406 br 2b53c <_gp+0xfffee6d0> + 2ba68: 003eb406 br 2b53c <___vfiprintf_internal_r+0xd54> 2ba6c: 80c00043 ldbu r3,1(r16) 2ba70: a5000814 ori r20,r20,32 2ba74: 84000044 addi r16,r16,1 2ba78: 18c03fcc andi r3,r3,255 2ba7c: 18c0201c xori r3,r3,128 2ba80: 18ffe004 addi r3,r3,-128 - 2ba84: 003bb706 br 2a964 <_gp+0xfffedaf8> + 2ba84: 003bb706 br 2a964 <___vfiprintf_internal_r+0x17c> 2ba88: a809883a mov r4,r21 2ba8c: d8c02a15 stw r3,168(sp) 2ba90: da002b15 stw r8,172(sp) @@ -14355,25 +14334,25 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2baa4: d8c02215 stw r3,136(sp) 2baa8: 0013883a mov r9,zero 2baac: da002b17 ldw r8,172(sp) - 2bab0: 003c4d06 br 2abe8 <_gp+0xfffedd7c> + 2bab0: 003c4d06 br 2abe8 <___vfiprintf_internal_r+0x400> 2bab4: d9402117 ldw r5,132(sp) 2bab8: d9002017 ldw r4,128(sp) 2babc: d9801a04 addi r6,sp,104 2bac0: da402c15 stw r9,176(sp) 2bac4: 002a6d40 call 2a6d4 <__sprint_r.part.0> 2bac8: da402c17 ldw r9,176(sp) - 2bacc: 103e9a1e bne r2,zero,2b538 <_gp+0xfffee6cc> + 2bacc: 103e9a1e bne r2,zero,2b538 <___vfiprintf_internal_r+0xd50> 2bad0: d9401b17 ldw r5,108(sp) 2bad4: d8801c17 ldw r2,112(sp) 2bad8: d811883a mov r8,sp 2badc: 29000044 addi r4,r5,1 - 2bae0: 003e4206 br 2b3ec <_gp+0xfffee580> + 2bae0: 003e4206 br 2b3ec <___vfiprintf_internal_r+0xc04> 2bae4: d9401b17 ldw r5,108(sp) 2bae8: 010000f4 movhi r4,3 2baec: 210ab704 addi r4,r4,10972 2baf0: d9002415 stw r4,144(sp) 2baf4: 29400044 addi r5,r5,1 - 2baf8: 003c6d06 br 2acb0 <_gp+0xfffede44> + 2baf8: 003c6d06 br 2acb0 <___vfiprintf_internal_r+0x4c8> 2bafc: 0039883a mov fp,zero 2bb00: 00800084 movi r2,2 2bb04: 10803fcc andi r2,r2,255 @@ -14382,10 +14361,10 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2bb10: 01000084 movi r4,2 2bb14: 11001e1e bne r2,r4,2bb90 <___vfiprintf_internal_r+0x13a8> 2bb18: 1829883a mov r20,r3 - 2bb1c: 003eea06 br 2b6c8 <_gp+0xfffee85c> + 2bb1c: 003eea06 br 2b6c8 <___vfiprintf_internal_r+0xee0> 2bb20: a007883a mov r3,r20 2bb24: 00800044 movi r2,1 - 2bb28: 003ff606 br 2bb04 <_gp+0xfffeec98> + 2bb28: 003ff606 br 2bb04 <___vfiprintf_internal_r+0x131c> 2bb2c: 00800184 movi r2,6 2bb30: 1240012e bgeu r2,r9,2bb38 <___vfiprintf_internal_r+0x1350> 2bb34: 1013883a mov r9,r2 @@ -14395,46 +14374,46 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2bb44: 054000f4 movhi r21,3 2bb48: d8c02215 stw r3,136(sp) 2bb4c: ad4a5804 addi r21,r21,10592 - 2bb50: 003d1406 br 2afa4 <_gp+0xfffee138> + 2bb50: 003d1406 br 2afa4 <___vfiprintf_internal_r+0x7bc> 2bb54: 028000f4 movhi r10,3 2bb58: 528ab304 addi r10,r10,10956 2bb5c: da802415 stw r10,144(sp) 2bb60: 200d883a mov r6,r4 - 2bb64: 003c9106 br 2adac <_gp+0xfffedf40> + 2bb64: 003c9106 br 2adac <___vfiprintf_internal_r+0x5c4> 2bb68: 5021883a mov r16,r10 2bb6c: 0013883a mov r9,zero - 2bb70: 003b7d06 br 2a968 <_gp+0xfffedafc> + 2bb70: 003b7d06 br 2a968 <___vfiprintf_internal_r+0x180> 2bb74: 4827883a mov r19,r9 2bb78: df001d83 ldbu fp,118(sp) 2bb7c: d8c02215 stw r3,136(sp) 2bb80: 0013883a mov r9,zero - 2bb84: 003c1806 br 2abe8 <_gp+0xfffedd7c> + 2bb84: 003c1806 br 2abe8 <___vfiprintf_internal_r+0x400> 2bb88: 1829883a mov r20,r3 - 2bb8c: 003d1806 br 2aff0 <_gp+0xfffee184> + 2bb8c: 003d1806 br 2aff0 <___vfiprintf_internal_r+0x808> 2bb90: 1829883a mov r20,r3 - 2bb94: 003ccd06 br 2aecc <_gp+0xfffee060> + 2bb94: 003ccd06 br 2aecc <___vfiprintf_internal_r+0x6e4> 2bb98: 0025883a mov r18,zero - 2bb9c: 003fe906 br 2bb44 <_gp+0xfffeecd8> + 2bb9c: 003fe906 br 2bb44 <___vfiprintf_internal_r+0x135c> 2bba0: d8802217 ldw r2,136(sp) 2bba4: 80c00043 ldbu r3,1(r16) 2bba8: 5021883a mov r16,r10 2bbac: 12400017 ldw r9,0(r2) 2bbb0: 10800104 addi r2,r2,4 2bbb4: d8802215 stw r2,136(sp) - 2bbb8: 483faf0e bge r9,zero,2ba78 <_gp+0xfffeec0c> + 2bbb8: 483faf0e bge r9,zero,2ba78 <___vfiprintf_internal_r+0x1290> 2bbbc: 18c03fcc andi r3,r3,255 2bbc0: 18c0201c xori r3,r3,128 2bbc4: 027fffc4 movi r9,-1 2bbc8: 18ffe004 addi r3,r3,-128 - 2bbcc: 003b6506 br 2a964 <_gp+0xfffedaf8> + 2bbcc: 003b6506 br 2a964 <___vfiprintf_internal_r+0x17c> 2bbd0: d9c01d85 stb r7,118(sp) - 2bbd4: 003ca006 br 2ae58 <_gp+0xfffedfec> + 2bbd4: 003ca006 br 2ae58 <___vfiprintf_internal_r+0x670> 2bbd8: d9c01d85 stb r7,118(sp) - 2bbdc: 003cad06 br 2ae94 <_gp+0xfffee028> + 2bbdc: 003cad06 br 2ae94 <___vfiprintf_internal_r+0x6ac> 2bbe0: d9c01d85 stb r7,118(sp) - 2bbe4: 003d7d06 br 2b1dc <_gp+0xfffee370> + 2bbe4: 003d7d06 br 2b1dc <___vfiprintf_internal_r+0x9f4> 2bbe8: d9c01d85 stb r7,118(sp) - 2bbec: 003d5f06 br 2b16c <_gp+0xfffee300> + 2bbec: 003d5f06 br 2b16c <___vfiprintf_internal_r+0x984> 2bbf0: a080004c andi r2,r20,1 2bbf4: 0039883a mov fp,zero 2bbf8: 10000526 beq r2,zero,2bc10 <___vfiprintf_internal_r+0x1428> @@ -14442,20 +14421,20 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2bc00: d88019c5 stb r2,103(sp) 2bc04: dcc02717 ldw r19,156(sp) 2bc08: dd4019c4 addi r21,sp,103 - 2bc0c: 003bf606 br 2abe8 <_gp+0xfffedd7c> + 2bc0c: 003bf606 br 2abe8 <___vfiprintf_internal_r+0x400> 2bc10: 0027883a mov r19,zero 2bc14: dd401a04 addi r21,sp,104 - 2bc18: 003bf306 br 2abe8 <_gp+0xfffedd7c> + 2bc18: 003bf306 br 2abe8 <___vfiprintf_internal_r+0x400> 2bc1c: d9c01d85 stb r7,118(sp) - 2bc20: 003dc806 br 2b344 <_gp+0xfffee4d8> + 2bc20: 003dc806 br 2b344 <___vfiprintf_internal_r+0xb5c> 2bc24: d9c01d85 stb r7,118(sp) - 2bc28: 003d3a06 br 2b114 <_gp+0xfffee2a8> + 2bc28: 003d3a06 br 2b114 <___vfiprintf_internal_r+0x92c> 2bc2c: d9c01d85 stb r7,118(sp) - 2bc30: 003d2a06 br 2b0dc <_gp+0xfffee270> + 2bc30: 003d2a06 br 2b0dc <___vfiprintf_internal_r+0x8f4> 2bc34: d9c01d85 stb r7,118(sp) - 2bc38: 003cde06 br 2afb4 <_gp+0xfffee148> + 2bc38: 003cde06 br 2afb4 <___vfiprintf_internal_r+0x7cc> 2bc3c: d9c01d85 stb r7,118(sp) - 2bc40: 003cbc06 br 2af34 <_gp+0xfffee0c8> + 2bc40: 003cbc06 br 2af34 <___vfiprintf_internal_r+0x74c> 0002bc44 <__vfiprintf_internal>: 2bc44: 008000f4 movhi r2,3 @@ -14513,7 +14492,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2bd0c: dec11e04 addi sp,sp,1144 2bd10: f800283a ret 2bd14: 047fffc4 movi r17,-1 - 2bd18: 003ff106 br 2bce0 <_gp+0xfffeee74> + 2bd18: 003ff106 br 2bce0 <__sbprintf+0x80> 0002bd1c <__swbuf_r>: 2bd1c: defffb04 addi sp,sp,-20 @@ -14573,29 +14552,29 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2bdf4: 8100030d sth r4,12(r16) 2bdf8: 81000517 ldw r4,20(r16) 2bdfc: 10c7c83a sub r3,r2,r3 - 2be00: 193fe016 blt r3,r4,2bd84 <_gp+0xfffeef18> + 2be00: 193fe016 blt r3,r4,2bd84 <__swbuf_r+0x68> 2be04: 800b883a mov r5,r16 2be08: 9009883a mov r4,r18 2be0c: 00276cc0 call 276cc <_fflush_r> 2be10: 1000071e bne r2,zero,2be30 <__swbuf_r+0x114> 2be14: 80800017 ldw r2,0(r16) 2be18: 00c00044 movi r3,1 - 2be1c: 003fda06 br 2bd88 <_gp+0xfffeef1c> + 2be1c: 003fda06 br 2bd88 <__swbuf_r+0x6c> 2be20: 800b883a mov r5,r16 2be24: 9009883a mov r4,r18 2be28: 00276cc0 call 276cc <_fflush_r> - 2be2c: 103fe326 beq r2,zero,2bdbc <_gp+0xfffeef50> + 2be2c: 103fe326 beq r2,zero,2bdbc <__swbuf_r+0xa0> 2be30: 00bfffc4 movi r2,-1 - 2be34: 003fe206 br 2bdc0 <_gp+0xfffeef54> + 2be34: 003fe206 br 2bdc0 <__swbuf_r+0xa4> 2be38: 800b883a mov r5,r16 2be3c: 9009883a mov r4,r18 2be40: 0025ad40 call 25ad4 <__swsetup_r> - 2be44: 103ffa1e bne r2,zero,2be30 <_gp+0xfffeefc4> + 2be44: 103ffa1e bne r2,zero,2be30 <__swbuf_r+0x114> 2be48: 8100030b ldhu r4,12(r16) 2be4c: 80c00417 ldw r3,16(r16) - 2be50: 003fc506 br 2bd68 <_gp+0xfffeeefc> + 2be50: 003fc506 br 2bd68 <__swbuf_r+0x4c> 2be54: 0027aa80 call 27aa8 <__sinit> - 2be58: 003fbc06 br 2bd4c <_gp+0xfffeeee0> + 2be58: 003fbc06 br 2bd4c <__swbuf_r+0x30> 0002be5c <__swbuf>: 2be5c: 008000f4 movhi r2,3 @@ -14627,9 +14606,9 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2bebc: dec00304 addi sp,sp,12 2bec0: f800283a ret 2bec4: 80c00017 ldw r3,0(r16) - 2bec8: 183ff926 beq r3,zero,2beb0 <_gp+0xfffef044> + 2bec8: 183ff926 beq r3,zero,2beb0 <_write_r+0x3c> 2becc: 88c00015 stw r3,0(r17) - 2bed0: 003ff706 br 2beb0 <_gp+0xfffef044> + 2bed0: 003ff706 br 2beb0 <_write_r+0x3c> 0002bed4 <_close_r>: 2bed4: defffd04 addi sp,sp,-12 @@ -14650,9 +14629,9 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2bf10: dec00304 addi sp,sp,12 2bf14: f800283a ret 2bf18: 80c00017 ldw r3,0(r16) - 2bf1c: 183ff926 beq r3,zero,2bf04 <_gp+0xfffef098> + 2bf1c: 183ff926 beq r3,zero,2bf04 <_close_r+0x30> 2bf20: 88c00015 stw r3,0(r17) - 2bf24: 003ff706 br 2bf04 <_gp+0xfffef098> + 2bf24: 003ff706 br 2bf04 <_close_r+0x30> 0002bf28 <_calloc_r>: 2bf28: 298b383a mul r5,r5,r6 @@ -14699,11 +14678,11 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2bfcc: dec00204 addi sp,sp,8 2bfd0: f800283a ret 2bfd4: 80800404 addi r2,r16,16 - 2bfd8: 003fee06 br 2bf94 <_gp+0xfffef128> + 2bfd8: 003fee06 br 2bf94 <_calloc_r+0x6c> 2bfdc: 80800204 addi r2,r16,8 - 2bfe0: 003fec06 br 2bf94 <_gp+0xfffef128> + 2bfe0: 003fec06 br 2bf94 <_calloc_r+0x6c> 2bfe4: 0005883a mov r2,zero - 2bfe8: 003fee06 br 2bfa4 <_gp+0xfffef138> + 2bfe8: 003fee06 br 2bfa4 <_calloc_r+0x7c> 0002bfec <_fclose_r>: 2bfec: 28003926 beq r5,zero,2c0d4 <_fclose_r+0xe8> @@ -14755,15 +14734,15 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2c0a4: 8000030d sth zero,12(r16) 2c0a8: 0027abc0 call 27abc <__sfp_lock_release> 2c0ac: 9005883a mov r2,r18 - 2c0b0: 003fdc06 br 2c024 <_gp+0xfffef1b8> + 2c0b0: 003fdc06 br 2c024 <_fclose_r+0x38> 2c0b4: 0027aa80 call 27aa8 <__sinit> - 2c0b8: 003fd706 br 2c018 <_gp+0xfffef1ac> + 2c0b8: 003fd706 br 2c018 <_fclose_r+0x2c> 2c0bc: 04bfffc4 movi r18,-1 - 2c0c0: 003fe806 br 2c064 <_gp+0xfffef1f8> + 2c0c0: 003fe806 br 2c064 <_fclose_r+0x78> 2c0c4: 81400417 ldw r5,16(r16) 2c0c8: 8809883a mov r4,r17 2c0cc: 0027c1c0 call 27c1c <_free_r> - 2c0d0: 003fe706 br 2c070 <_gp+0xfffef204> + 2c0d0: 003fe706 br 2c070 <_fclose_r+0x84> 2c0d4: 0005883a mov r2,zero 2c0d8: f800283a ret @@ -14814,7 +14793,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2c180: 80c00217 ldw r3,8(r16) 2c184: 18ffffc4 addi r3,r3,-1 2c188: 80c00215 stw r3,8(r16) - 2c18c: 183ff30e bge r3,zero,2c15c <_gp+0xfffef2f0> + 2c18c: 183ff30e bge r3,zero,2c15c <__fputwc+0x6c> 2c190: 80800617 ldw r2,24(r16) 2c194: 18801916 blt r3,r2,2c1fc <__fputwc+0x10c> 2c198: 80800017 ldw r2,0(r16) @@ -14826,7 +14805,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2c1b0: 80800015 stw r2,0(r16) 2c1b4: 8c400044 addi r17,r17,1 2c1b8: dc45883a add r2,sp,r17 - 2c1bc: 8d3fef36 bltu r17,r20,2c17c <_gp+0xfffef310> + 2c1bc: 8d3fef36 bltu r17,r20,2c17c <__fputwc+0x8c> 2c1c0: 9005883a mov r2,r18 2c1c4: 00000406 br 2c1d8 <__fputwc+0xe8> 2c1c8: 80c0030b ldhu r3,12(r16) @@ -14848,22 +14827,22 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2c208: 002bd1c0 call 2bd1c <__swbuf_r> 2c20c: 10bfffe0 cmpeqi r2,r2,-1 2c210: 10803fcc andi r2,r2,255 - 2c214: 103fd626 beq r2,zero,2c170 <_gp+0xfffef304> + 2c214: 103fd626 beq r2,zero,2c170 <__fputwc+0x80> 2c218: 00bfffc4 movi r2,-1 - 2c21c: 003fee06 br 2c1d8 <_gp+0xfffef36c> + 2c21c: 003fee06 br 2c1d8 <__fputwc+0xe8> 2c220: 90ffffc4 addi r3,r18,-1 2c224: 01003f84 movi r4,254 - 2c228: 20ffbf36 bltu r4,r3,2c128 <_gp+0xfffef2bc> + 2c228: 20ffbf36 bltu r4,r3,2c128 <__fputwc+0x38> 2c22c: 900b883a mov r5,r18 2c230: dc800005 stb r18,0(sp) 2c234: 1029883a mov r20,r2 - 2c238: 003fc506 br 2c150 <_gp+0xfffef2e4> + 2c238: 003fc506 br 2c150 <__fputwc+0x60> 2c23c: 800d883a mov r6,r16 2c240: a80b883a mov r5,r21 2c244: 9809883a mov r4,r19 2c248: 002bd1c0 call 2bd1c <__swbuf_r> 2c24c: 10bfffe0 cmpeqi r2,r2,-1 - 2c250: 003fef06 br 2c210 <_gp+0xfffef3a4> + 2c250: 003fef06 br 2c210 <__fputwc+0x120> 0002c254 <_fputwc_r>: 2c254: 3080030b ldhu r2,12(r6) @@ -14908,7 +14887,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2c2e8: d9400015 stw r5,0(sp) 2c2ec: 0027aa80 call 27aa8 <__sinit> 2c2f0: d9400017 ldw r5,0(sp) - 2c2f4: 003feb06 br 2c2a4 <_gp+0xfffef438> + 2c2f4: 003feb06 br 2c2a4 0002c2f8 <_fstat_r>: 2c2f8: defffd04 addi sp,sp,-12 @@ -14931,9 +14910,9 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2c33c: dec00304 addi sp,sp,12 2c340: f800283a ret 2c344: 80c00017 ldw r3,0(r16) - 2c348: 183ff926 beq r3,zero,2c330 <_gp+0xfffef4c4> + 2c348: 183ff926 beq r3,zero,2c330 <_fstat_r+0x38> 2c34c: 88c00015 stw r3,0(r17) - 2c350: 003ff706 br 2c330 <_gp+0xfffef4c4> + 2c350: 003ff706 br 2c330 <_fstat_r+0x38> 0002c354 <_isatty_r>: 2c354: defffd04 addi sp,sp,-12 @@ -14954,9 +14933,9 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2c390: dec00304 addi sp,sp,12 2c394: f800283a ret 2c398: 80c00017 ldw r3,0(r16) - 2c39c: 183ff926 beq r3,zero,2c384 <_gp+0xfffef518> + 2c39c: 183ff926 beq r3,zero,2c384 <_isatty_r+0x30> 2c3a0: 88c00015 stw r3,0(r17) - 2c3a4: 003ff706 br 2c384 <_gp+0xfffef518> + 2c3a4: 003ff706 br 2c384 <_isatty_r+0x30> 0002c3a8 <_lseek_r>: 2c3a8: defffd04 addi sp,sp,-12 @@ -14980,9 +14959,9 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2c3f0: dec00304 addi sp,sp,12 2c3f4: f800283a ret 2c3f8: 80c00017 ldw r3,0(r16) - 2c3fc: 183ff926 beq r3,zero,2c3e4 <_gp+0xfffef578> + 2c3fc: 183ff926 beq r3,zero,2c3e4 <_lseek_r+0x3c> 2c400: 88c00015 stw r3,0(r17) - 2c404: 003ff706 br 2c3e4 <_gp+0xfffef578> + 2c404: 003ff706 br 2c3e4 <_lseek_r+0x3c> 0002c408 <_read_r>: 2c408: defffd04 addi sp,sp,-12 @@ -15006,9 +14985,9 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2c450: dec00304 addi sp,sp,12 2c454: f800283a ret 2c458: 80c00017 ldw r3,0(r16) - 2c45c: 183ff926 beq r3,zero,2c444 <_gp+0xfffef5d8> + 2c45c: 183ff926 beq r3,zero,2c444 <_read_r+0x3c> 2c460: 88c00015 stw r3,0(r17) - 2c464: 003ff706 br 2c444 <_gp+0xfffef5d8> + 2c464: 003ff706 br 2c444 <_read_r+0x3c> 0002c468 <_wcrtomb_r>: 2c468: defff604 addi sp,sp,-40 @@ -15049,7 +15028,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2c4f4: d9400104 addi r5,sp,4 2c4f8: 8009883a mov r4,r16 2c4fc: 903ee83a callr r18 - 2c500: 003fed06 br 2c4b8 <_gp+0xfffef64c> + 2c500: 003fed06 br 2c4b8 <_wcrtomb_r+0x50> 0002c504 : 2c504: defff604 addi sp,sp,-40 @@ -15099,7 +15078,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2c5b4: d9400104 addi r5,sp,4 2c5b8: 8809883a mov r4,r17 2c5bc: 803ee83a callr r16 - 2c5c0: 003fe806 br 2c564 <_gp+0xfffef6f8> + 2c5c0: 003fe806 br 2c564 0002c5c4 <__ascii_wctomb>: 2c5c4: 28000526 beq r5,zero,2c5dc <__ascii_wctomb+0x18> @@ -15324,16 +15303,16 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2c920: 00803fc4 movi r2,255 2c924: 11c5803a cmpltu r2,r2,r7 2c928: 100490fa slli r2,r2,3 - 2c92c: 003f9e06 br 2c7a8 <_gp+0xfffef93c> + 2c92c: 003f9e06 br 2c7a8 <__udivdi3+0x158> 2c930: 00803fc4 movi r2,255 2c934: 1445803a cmpltu r2,r2,r17 2c938: 100490fa slli r2,r2,3 - 2c93c: 003fb206 br 2c808 <_gp+0xfffef99c> + 2c93c: 003fb206 br 2c808 <__udivdi3+0x1b8> 2c940: 00804034 movhi r2,256 2c944: 10bfffc4 addi r2,r2,-1 2c948: 11808836 bltu r2,r6,2cb6c <__udivdi3+0x51c> 2c94c: 00800404 movi r2,16 - 2c950: 003f5606 br 2c6ac <_gp+0xfffef840> + 2c950: 003f5606 br 2c6ac <__udivdi3+0x5c> 2c954: 30aed83a srl r23,r6,r2 2c958: 3d4e983a sll r7,r7,r21 2c95c: 80acd83a srl r22,r16,r2 @@ -15402,7 +15381,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2ca58: 81803e36 bltu r16,r6,2cb54 <__udivdi3+0x504> 2ca5c: 81803826 beq r16,r6,2cb40 <__udivdi3+0x4f0> 2ca60: 0007883a mov r3,zero - 2ca64: 003fa206 br 2c8f0 <_gp+0xfffefa84> + 2ca64: 003fa206 br 2c8f0 <__udivdi3+0x2a0> 2ca68: 88e2983a sll r17,r17,r3 2ca6c: 80a8d83a srl r20,r16,r2 2ca70: 80e0983a sll r16,r16,r3 @@ -15452,45 +15431,45 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2cb20: e038943a slli fp,fp,16 2cb24: 2421c83a sub r16,r4,r16 2cb28: e086b03a or r3,fp,r2 - 2cb2c: 003f4306 br 2c83c <_gp+0xfffef9d0> + 2cb2c: 003f4306 br 2c83c <__udivdi3+0x1ec> 2cb30: 2005883a mov r2,r4 - 2cb34: 003f6906 br 2c8dc <_gp+0xfffefa70> + 2cb34: 003f6906 br 2c8dc <__udivdi3+0x28c> 2cb38: 1805883a mov r2,r3 - 2cb3c: 003f0f06 br 2c77c <_gp+0xfffef910> + 2cb3c: 003f0f06 br 2c77c <__udivdi3+0x12c> 2cb40: 1806943a slli r3,r3,16 2cb44: 9d66983a sll r19,r19,r21 2cb48: 39ffffcc andi r7,r7,65535 2cb4c: 19c7883a add r3,r3,r7 - 2cb50: 98ffc32e bgeu r19,r3,2ca60 <_gp+0xfffefbf4> + 2cb50: 98ffc32e bgeu r19,r3,2ca60 <__udivdi3+0x410> 2cb54: 10bfffc4 addi r2,r2,-1 - 2cb58: 003fc106 br 2ca60 <_gp+0xfffefbf4> + 2cb58: 003fc106 br 2ca60 <__udivdi3+0x410> 2cb5c: 00800604 movi r2,24 - 2cb60: 003f1106 br 2c7a8 <_gp+0xfffef93c> + 2cb60: 003f1106 br 2c7a8 <__udivdi3+0x158> 2cb64: 00800604 movi r2,24 - 2cb68: 003f2706 br 2c808 <_gp+0xfffef99c> + 2cb68: 003f2706 br 2c808 <__udivdi3+0x1b8> 2cb6c: 00800604 movi r2,24 - 2cb70: 003ece06 br 2c6ac <_gp+0xfffef840> + 2cb70: 003ece06 br 2c6ac <__udivdi3+0x5c> 2cb74: 0007883a mov r3,zero 2cb78: 00800044 movi r2,1 - 2cb7c: 003f5c06 br 2c8f0 <_gp+0xfffefa84> - 2cb80: 813fa12e bgeu r16,r4,2ca08 <_gp+0xfffefb9c> + 2cb7c: 003f5c06 br 2c8f0 <__udivdi3+0x2a0> + 2cb80: 813fa12e bgeu r16,r4,2ca08 <__udivdi3+0x3b8> 2cb84: 10bfff84 addi r2,r2,-2 2cb88: 85e1883a add r16,r16,r23 - 2cb8c: 003f9f06 br 2ca0c <_gp+0xfffefba0> - 2cb90: 1c7f8a2e bgeu r3,r17,2c9bc <_gp+0xfffefb50> + 2cb8c: 003f9f06 br 2ca0c <__udivdi3+0x3bc> + 2cb90: 1c7f8a2e bgeu r3,r17,2c9bc <__udivdi3+0x36c> 2cb94: 31bfff84 addi r6,r6,-2 2cb98: 1dc7883a add r3,r3,r23 - 2cb9c: 003f8806 br 2c9c0 <_gp+0xfffefb54> + 2cb9c: 003f8806 br 2c9c0 <__udivdi3+0x370> 2cba0: 1805883a mov r2,r3 - 2cba4: 003fde06 br 2cb20 <_gp+0xfffefcb4> + 2cba4: 003fde06 br 2cb20 <__udivdi3+0x4d0> 2cba8: 1839883a mov fp,r3 - 2cbac: 003fc906 br 2cad4 <_gp+0xfffefc68> + 2cbac: 003fc906 br 2cad4 <__udivdi3+0x484> 2cbb0: b5bfff84 addi r22,r22,-2 2cbb4: 2449883a add r4,r4,r17 - 2cbb8: 003f3406 br 2c88c <_gp+0xfffefa20> + 2cbb8: 003f3406 br 2c88c <__udivdi3+0x23c> 2cbbc: b5bfff84 addi r22,r22,-2 2cbc0: 1445883a add r2,r2,r17 - 2cbc4: 003edb06 br 2c734 <_gp+0xfffef8c8> + 2cbc4: 003edb06 br 2c734 <__udivdi3+0xe4> 0002cbc8 <__umoddi3>: 2cbc8: defff404 addi sp,sp,-48 @@ -15643,8 +15622,8 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2ce14: 1545383a mul r2,r2,r21 2ce18: a53fffcc andi r20,r20,65535 2ce1c: a446b03a or r3,r20,r17 - 2ce20: 18bfb02e bgeu r3,r2,2cce4 <_gp+0xfffefe78> - 2ce24: 003fab06 br 2ccd4 <_gp+0xfffefe68> + 2ce20: 18bfb02e bgeu r3,r2,2cce4 <__umoddi3+0x11c> + 2ce24: 003fab06 br 2ccd4 <__umoddi3+0x10c> 2ce28: 2005883a mov r2,r4 2ce2c: 2807883a mov r3,r5 2ce30: dfc00b17 ldw ra,44(sp) @@ -15662,16 +15641,16 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2ce60: 04c03fc4 movi r19,255 2ce64: 99c9803a cmpltu r4,r19,r7 2ce68: 200890fa slli r4,r4,3 - 2ce6c: 003fa806 br 2cd10 <_gp+0xfffefea4> + 2ce6c: 003fa806 br 2cd10 <__umoddi3+0x148> 2ce70: 00803fc4 movi r2,255 2ce74: 14c5803a cmpltu r2,r2,r19 2ce78: 100490fa slli r2,r2,3 - 2ce7c: 003fc006 br 2cd80 <_gp+0xfffeff14> + 2ce7c: 003fc006 br 2cd80 <__umoddi3+0x1b8> 2ce80: 00804034 movhi r2,256 2ce84: 10bfffc4 addi r2,r2,-1 2ce88: 11808b36 bltu r2,r6,2d0b8 <__umoddi3+0x4f0> 2ce8c: 01000404 movi r4,16 - 2ce90: 003f6406 br 2cc24 <_gp+0xfffefdb8> + 2ce90: 003f6406 br 2cc24 <__umoddi3+0x5c> 2ce94: 34c4d83a srl r2,r6,r19 2ce98: 3d0e983a sll r7,r7,r20 2ce9c: 8cf8d83a srl fp,r17,r19 @@ -15755,7 +15734,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2cfd4: 3d0ed83a srl r7,r7,r20 2cfd8: 1d06d83a srl r3,r3,r20 2cfdc: 11c4b03a or r2,r2,r7 - 2cfe0: 003f9306 br 2ce30 <_gp+0xfffeffc4> + 2cfe0: 003f9306 br 2ce30 <__umoddi3+0x268> 2cfe4: 9ca6983a sll r19,r19,r18 2cfe8: 88e8d83a srl r20,r17,r3 2cfec: 80c4d83a srl r2,r16,r3 @@ -15798,35 +15777,35 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2d080: 2080012e bgeu r4,r2,2d088 <__umoddi3+0x4c0> 2d084: 24c9883a add r4,r4,r19 2d088: 20a3c83a sub r17,r4,r2 - 2d08c: 003f4806 br 2cdb0 <_gp+0xfffeff44> + 2d08c: 003f4806 br 2cdb0 <__umoddi3+0x1e8> 2d090: 2c8fc83a sub r7,r5,r18 2d094: 1545c83a sub r2,r2,r21 2d098: 29cb803a cmpltu r5,r5,r7 2d09c: 1145c83a sub r2,r2,r5 2d0a0: 4089c83a sub r4,r8,r2 - 2d0a4: 003fc706 br 2cfc4 <_gp+0xffff0158> + 2d0a4: 003fc706 br 2cfc4 <__umoddi3+0x3fc> 2d0a8: 01000604 movi r4,24 - 2d0ac: 003f1806 br 2cd10 <_gp+0xfffefea4> + 2d0ac: 003f1806 br 2cd10 <__umoddi3+0x148> 2d0b0: 00800604 movi r2,24 - 2d0b4: 003f3206 br 2cd80 <_gp+0xfffeff14> + 2d0b4: 003f3206 br 2cd80 <__umoddi3+0x1b8> 2d0b8: 01000604 movi r4,24 - 2d0bc: 003ed906 br 2cc24 <_gp+0xfffefdb8> - 2d0c0: 413fa52e bgeu r8,r4,2cf58 <_gp+0xffff00ec> + 2d0bc: 003ed906 br 2cc24 <__umoddi3+0x5c> + 2d0c0: 413fa52e bgeu r8,r4,2cf58 <__umoddi3+0x390> 2d0c4: 297fff84 addi r5,r5,-2 2d0c8: 4551883a add r8,r8,r21 - 2d0cc: 003fa306 br 2cf5c <_gp+0xffff00f0> - 2d0d0: 15ff8b2e bgeu r2,r23,2cf00 <_gp+0xffff0094> + 2d0cc: 003fa306 br 2cf5c <__umoddi3+0x394> + 2d0d0: 15ff8b2e bgeu r2,r23,2cf00 <__umoddi3+0x338> 2d0d4: 31bfff84 addi r6,r6,-2 2d0d8: 1545883a add r2,r2,r21 - 2d0dc: 003f8906 br 2cf04 <_gp+0xffff0098> + 2d0dc: 003f8906 br 2cf04 <__umoddi3+0x33c> 2d0e0: 24c9883a add r4,r4,r19 - 2d0e4: 003eee06 br 2cca0 <_gp+0xfffefe34> + 2d0e4: 003eee06 br 2cca0 <__umoddi3+0xd8> 2d0e8: 8005883a mov r2,r16 - 2d0ec: 003f1706 br 2cd4c <_gp+0xfffefee0> - 2d0f0: 817fe736 bltu r16,r5,2d090 <_gp+0xffff0224> + 2d0ec: 003f1706 br 2cd4c <__umoddi3+0x184> + 2d0f0: 817fe736 bltu r16,r5,2d090 <__umoddi3+0x4c8> 2d0f4: 280f883a mov r7,r5 2d0f8: 0009883a mov r4,zero - 2d0fc: 003fb106 br 2cfc4 <_gp+0xffff0158> + 2d0fc: 003fb106 br 2cfc4 <__umoddi3+0x3fc> 0002d100 <__adddf3>: 2d100: 02c00434 movhi r11,16 @@ -15901,7 +15880,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2d214: dec00504 addi sp,sp,20 2d218: f800283a ret 2d21c: 0081ffc4 movi r2,2047 - 2d220: 80bfd626 beq r16,r2,2d17c <_gp+0xffff0310> + 2d220: 80bfd626 beq r16,r2,2d17c <__adddf3+0x7c> 2d224: 4a402034 orhi r9,r9,128 2d228: 00800e04 movi r2,56 2d22c: 10c09f16 blt r2,r3,2d4ac <__adddf3+0x3ac> @@ -15953,13 +15932,13 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2d2e4: 1906b03a or r3,r3,r4 2d2e8: 18a2b03a or r17,r3,r2 2d2ec: 0021883a mov r16,zero - 2d2f0: 003fa206 br 2d17c <_gp+0xffff0310> + 2d2f0: 003fa206 br 2d17c <__adddf3+0x7c> 2d2f4: 1890b03a or r8,r3,r2 2d2f8: 40017d26 beq r8,zero,2d8f0 <__adddf3+0x7f0> 2d2fc: 1011883a mov r8,r2 2d300: 1823883a mov r17,r3 2d304: 888001cc andi r2,r17,7 - 2d308: 103f9e1e bne r2,zero,2d184 <_gp+0xffff0318> + 2d308: 103f9e1e bne r2,zero,2d184 <__adddf3+0x84> 2d30c: 4004977a slli r2,r8,29 2d310: 8822d0fa srli r17,r17,3 2d314: 4010d0fa srli r8,r8,3 @@ -15971,12 +15950,12 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2d32c: 01000434 movhi r4,16 2d330: 213fffc4 addi r4,r4,-1 2d334: 4110703a and r8,r8,r4 - 2d338: 003fa806 br 2d1dc <_gp+0xffff0370> + 2d338: 003fa806 br 2d1dc <__adddf3+0xdc> 2d33c: 8089c83a sub r4,r16,r2 2d340: 01005e0e bge zero,r4,2d4bc <__adddf3+0x3bc> 2d344: 10002b26 beq r2,zero,2d3f4 <__adddf3+0x2f4> 2d348: 0081ffc4 movi r2,2047 - 2d34c: 80bf8b26 beq r16,r2,2d17c <_gp+0xffff0310> + 2d34c: 80bf8b26 beq r16,r2,2d17c <__adddf3+0x7c> 2d350: 4a402034 orhi r9,r9,128 2d354: 00800e04 movi r2,56 2d358: 1100a40e bge r2,r4,2d5ec <__adddf3+0x4ec> @@ -15989,7 +15968,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2d374: 8a11883a add r8,r17,r8 2d378: 2823883a mov r17,r5 2d37c: 4080202c andhi r2,r8,128 - 2d380: 103fe026 beq r2,zero,2d304 <_gp+0xffff0498> + 2d380: 103fe026 beq r2,zero,2d304 <__adddf3+0x204> 2d384: 84000044 addi r16,r16,1 2d388: 0081ffc4 movi r2,2047 2d38c: 8080d226 beq r16,r2,2d6d8 <__adddf3+0x5d8> @@ -16002,14 +15981,14 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2d3a8: 28e2b03a or r17,r5,r3 2d3ac: 4010d07a srli r8,r8,1 2d3b0: 2462b03a or r17,r4,r17 - 2d3b4: 003f7106 br 2d17c <_gp+0xffff0310> + 2d3b4: 003f7106 br 2d17c <__adddf3+0x7c> 2d3b8: 4088b03a or r4,r8,r2 2d3bc: 20014526 beq r4,zero,2d8d4 <__adddf3+0x7d4> 2d3c0: 01000434 movhi r4,16 2d3c4: 42000234 orhi r8,r8,8 2d3c8: 213fffc4 addi r4,r4,-1 2d3cc: 4110703a and r8,r8,r4 - 2d3d0: 003f8206 br 2d1dc <_gp+0xffff0370> + 2d3d0: 003f8206 br 2d1dc <__adddf3+0xdc> 2d3d4: 18ffffc4 addi r3,r3,-1 2d3d8: 1800491e bne r3,zero,2d500 <__adddf3+0x400> 2d3dc: 898bc83a sub r5,r17,r6 @@ -16017,9 +15996,9 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2d3e4: 4251c83a sub r8,r8,r9 2d3e8: 4451c83a sub r8,r8,r17 2d3ec: 2823883a mov r17,r5 - 2d3f0: 003f9f06 br 2d270 <_gp+0xffff0404> + 2d3f0: 003f9f06 br 2d270 <__adddf3+0x170> 2d3f4: 4984b03a or r2,r9,r6 - 2d3f8: 103f6026 beq r2,zero,2d17c <_gp+0xffff0310> + 2d3f8: 103f6026 beq r2,zero,2d17c <__adddf3+0x7c> 2d3fc: 213fffc4 addi r4,r4,-1 2d400: 2000931e bne r4,zero,2d650 <__adddf3+0x550> 2d404: 898d883a add r6,r17,r6 @@ -16027,7 +16006,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2d40c: 4251883a add r8,r8,r9 2d410: 8a11883a add r8,r17,r8 2d414: 3023883a mov r17,r6 - 2d418: 003fd806 br 2d37c <_gp+0xffff0510> + 2d418: 003fd806 br 2d37c <__adddf3+0x27c> 2d41c: 1800541e bne r3,zero,2d570 <__adddf3+0x470> 2d420: 80800044 addi r2,r16,1 2d424: 1081ffcc andi r2,r2,2047 @@ -16044,30 +16023,30 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2d450: 344d803a cmpltu r6,r6,r17 2d454: 19a7c83a sub r19,r3,r6 2d458: 3825883a mov r18,r7 - 2d45c: 983f8a1e bne r19,zero,2d288 <_gp+0xffff041c> + 2d45c: 983f8a1e bne r19,zero,2d288 <__adddf3+0x188> 2d460: 8809883a mov r4,r17 2d464: 002f7040 call 2f704 <__clzsi2> 2d468: 10800804 addi r2,r2,32 2d46c: 10fffe04 addi r3,r2,-8 2d470: 010007c4 movi r4,31 - 2d474: 20ff890e bge r4,r3,2d29c <_gp+0xffff0430> + 2d474: 20ff890e bge r4,r3,2d29c <__adddf3+0x19c> 2d478: 10bff604 addi r2,r2,-40 2d47c: 8884983a sll r2,r17,r2 2d480: 0023883a mov r17,zero - 2d484: 1c3f8c0e bge r3,r16,2d2b8 <_gp+0xffff044c> + 2d484: 1c3f8c0e bge r3,r16,2d2b8 <__adddf3+0x1b8> 2d488: 023fe034 movhi r8,65408 2d48c: 423fffc4 addi r8,r8,-1 2d490: 80e1c83a sub r16,r16,r3 2d494: 1210703a and r8,r2,r8 - 2d498: 003f3806 br 2d17c <_gp+0xffff0310> + 2d498: 003f3806 br 2d17c <__adddf3+0x7c> 2d49c: 9007883a mov r3,r18 2d4a0: 0011883a mov r8,zero 2d4a4: 0005883a mov r2,zero - 2d4a8: 003f4c06 br 2d1dc <_gp+0xffff0370> + 2d4a8: 003f4c06 br 2d1dc <__adddf3+0xdc> 2d4ac: 498cb03a or r6,r9,r6 2d4b0: 300cc03a cmpne r6,r6,zero 2d4b4: 0007883a mov r3,zero - 2d4b8: 003f6806 br 2d25c <_gp+0xffff03f0> + 2d4b8: 003f6806 br 2d25c <__adddf3+0x15c> 2d4bc: 20009c1e bne r4,zero,2d730 <__adddf3+0x630> 2d4c0: 80800044 addi r2,r16,1 2d4c4: 1141ffcc andi r5,r2,2047 @@ -16084,10 +16063,10 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2d4f0: 4010d07a srli r8,r8,1 2d4f4: 1021883a mov r16,r2 2d4f8: 89a2b03a or r17,r17,r6 - 2d4fc: 003f1f06 br 2d17c <_gp+0xffff0310> + 2d4fc: 003f1f06 br 2d17c <__adddf3+0x7c> 2d500: 0081ffc4 movi r2,2047 - 2d504: 80bf481e bne r16,r2,2d228 <_gp+0xffff03bc> - 2d508: 003f1c06 br 2d17c <_gp+0xffff0310> + 2d504: 80bf481e bne r16,r2,2d228 <__adddf3+0x128> + 2d508: 003f1c06 br 2d17c <__adddf3+0x7c> 2d50c: 843ff844 addi r16,r16,-31 2d510: 01000804 movi r4,32 2d514: 1406d83a srl r3,r2,r16 @@ -16100,7 +16079,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2d530: 1c62b03a or r17,r3,r17 2d534: 0011883a mov r8,zero 2d538: 0021883a mov r16,zero - 2d53c: 003f7106 br 2d304 <_gp+0xffff0498> + 2d53c: 003f7106 br 2d304 <__adddf3+0x204> 2d540: 193ff804 addi r4,r3,-32 2d544: 00800804 movi r2,32 2d548: 4908d83a srl r4,r9,r4 @@ -16112,7 +16091,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2d560: 300cc03a cmpne r6,r6,zero 2d564: 218cb03a or r6,r4,r6 2d568: 0007883a mov r3,zero - 2d56c: 003f3b06 br 2d25c <_gp+0xffff03f0> + 2d56c: 003f3b06 br 2d25c <__adddf3+0x15c> 2d570: 80002a26 beq r16,zero,2d61c <__adddf3+0x51c> 2d574: 0101ffc4 movi r4,2047 2d578: 11006826 beq r2,r4,2d71c <__adddf3+0x61c> @@ -16137,13 +16116,13 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2d5c4: 1991c83a sub r8,r3,r6 2d5c8: 1021883a mov r16,r2 2d5cc: 3825883a mov r18,r7 - 2d5d0: 003f2706 br 2d270 <_gp+0xffff0404> + 2d5d0: 003f2706 br 2d270 <__adddf3+0x170> 2d5d4: 24d0b03a or r8,r4,r19 2d5d8: 40001b1e bne r8,zero,2d648 <__adddf3+0x548> 2d5dc: 0005883a mov r2,zero 2d5e0: 0007883a mov r3,zero 2d5e4: 0021883a mov r16,zero - 2d5e8: 003f4d06 br 2d320 <_gp+0xffff04b4> + 2d5e8: 003f4d06 br 2d320 <__adddf3+0x220> 2d5ec: 008007c4 movi r2,31 2d5f0: 11003c16 blt r2,r4,2d6e4 <__adddf3+0x5e4> 2d5f4: 00800804 movi r2,32 @@ -16155,7 +16134,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2d60c: 394ab03a or r5,r7,r5 2d610: 1004c03a cmpne r2,r2,zero 2d614: 288ab03a or r5,r5,r2 - 2d618: 003f5306 br 2d368 <_gp+0xffff04fc> + 2d618: 003f5306 br 2d368 <__adddf3+0x268> 2d61c: 4448b03a or r4,r8,r17 2d620: 20003e26 beq r4,zero,2d71c <__adddf3+0x61c> 2d624: 00c6303a nor r3,zero,r3 @@ -16166,33 +16145,33 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2d638: 1991c83a sub r8,r3,r6 2d63c: 1021883a mov r16,r2 2d640: 3825883a mov r18,r7 - 2d644: 003f0a06 br 2d270 <_gp+0xffff0404> + 2d644: 003f0a06 br 2d270 <__adddf3+0x170> 2d648: 2023883a mov r17,r4 - 2d64c: 003f0d06 br 2d284 <_gp+0xffff0418> + 2d64c: 003f0d06 br 2d284 <__adddf3+0x184> 2d650: 0081ffc4 movi r2,2047 - 2d654: 80bf3f1e bne r16,r2,2d354 <_gp+0xffff04e8> - 2d658: 003ec806 br 2d17c <_gp+0xffff0310> + 2d654: 80bf3f1e bne r16,r2,2d354 <__adddf3+0x254> + 2d658: 003ec806 br 2d17c <__adddf3+0x7c> 2d65c: 0005883a mov r2,zero - 2d660: 003fb106 br 2d528 <_gp+0xffff06bc> + 2d660: 003fb106 br 2d528 <__adddf3+0x428> 2d664: 0007883a mov r3,zero - 2d668: 003fbc06 br 2d55c <_gp+0xffff06f0> + 2d668: 003fbc06 br 2d55c <__adddf3+0x45c> 2d66c: 4444b03a or r2,r8,r17 2d670: 8000871e bne r16,zero,2d890 <__adddf3+0x790> 2d674: 1000ba26 beq r2,zero,2d960 <__adddf3+0x860> 2d678: 4984b03a or r2,r9,r6 - 2d67c: 103ebf26 beq r2,zero,2d17c <_gp+0xffff0310> + 2d67c: 103ebf26 beq r2,zero,2d17c <__adddf3+0x7c> 2d680: 8985883a add r2,r17,r6 2d684: 4247883a add r3,r8,r9 2d688: 1451803a cmpltu r8,r2,r17 2d68c: 40d1883a add r8,r8,r3 2d690: 40c0202c andhi r3,r8,128 2d694: 1023883a mov r17,r2 - 2d698: 183f1a26 beq r3,zero,2d304 <_gp+0xffff0498> + 2d698: 183f1a26 beq r3,zero,2d304 <__adddf3+0x204> 2d69c: 00bfe034 movhi r2,65408 2d6a0: 10bfffc4 addi r2,r2,-1 2d6a4: 2021883a mov r16,r4 2d6a8: 4090703a and r8,r8,r2 - 2d6ac: 003eb306 br 2d17c <_gp+0xffff0310> + 2d6ac: 003eb306 br 2d17c <__adddf3+0x7c> 2d6b0: 4444b03a or r2,r8,r17 2d6b4: 8000291e bne r16,zero,2d75c <__adddf3+0x65c> 2d6b8: 10004b1e bne r2,zero,2d7e8 <__adddf3+0x6e8> @@ -16201,11 +16180,11 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2d6c4: 4811883a mov r8,r9 2d6c8: 3023883a mov r17,r6 2d6cc: 3825883a mov r18,r7 - 2d6d0: 003eaa06 br 2d17c <_gp+0xffff0310> + 2d6d0: 003eaa06 br 2d17c <__adddf3+0x7c> 2d6d4: 1021883a mov r16,r2 2d6d8: 0011883a mov r8,zero 2d6dc: 0005883a mov r2,zero - 2d6e0: 003f0f06 br 2d320 <_gp+0xffff04b4> + 2d6e0: 003f0f06 br 2d320 <__adddf3+0x220> 2d6e4: 217ff804 addi r5,r4,-32 2d6e8: 00800804 movi r2,32 2d6ec: 494ad83a srl r5,r9,r5 @@ -16217,14 +16196,14 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2d704: 300cc03a cmpne r6,r6,zero 2d708: 298ab03a or r5,r5,r6 2d70c: 0013883a mov r9,zero - 2d710: 003f1506 br 2d368 <_gp+0xffff04fc> + 2d710: 003f1506 br 2d368 <__adddf3+0x268> 2d714: 0101ffc4 movi r4,2047 - 2d718: 113f9a1e bne r2,r4,2d584 <_gp+0xffff0718> + 2d718: 113f9a1e bne r2,r4,2d584 <__adddf3+0x484> 2d71c: 4811883a mov r8,r9 2d720: 3023883a mov r17,r6 2d724: 1021883a mov r16,r2 2d728: 3825883a mov r18,r7 - 2d72c: 003e9306 br 2d17c <_gp+0xffff0310> + 2d72c: 003e9306 br 2d17c <__adddf3+0x7c> 2d730: 8000161e bne r16,zero,2d78c <__adddf3+0x68c> 2d734: 444ab03a or r5,r8,r17 2d738: 28005126 beq r5,zero,2d880 <__adddf3+0x780> @@ -16235,7 +16214,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2d74c: 898d803a cmpltu r6,r17,r6 2d750: 3251883a add r8,r6,r9 2d754: 1021883a mov r16,r2 - 2d758: 003f0806 br 2d37c <_gp+0xffff0510> + 2d758: 003f0806 br 2d37c <__adddf3+0x27c> 2d75c: 1000301e bne r2,zero,2d820 <__adddf3+0x720> 2d760: 4984b03a or r2,r9,r6 2d764: 10007126 beq r2,zero,2d92c <__adddf3+0x82c> @@ -16243,11 +16222,11 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2d76c: 3023883a mov r17,r6 2d770: 3825883a mov r18,r7 2d774: 0401ffc4 movi r16,2047 - 2d778: 003e8006 br 2d17c <_gp+0xffff0310> + 2d778: 003e8006 br 2d17c <__adddf3+0x7c> 2d77c: 4462b03a or r17,r8,r17 2d780: 8822c03a cmpne r17,r17,zero 2d784: 0007883a mov r3,zero - 2d788: 003f8b06 br 2d5b8 <_gp+0xffff074c> + 2d788: 003f8b06 br 2d5b8 <__adddf3+0x4b8> 2d78c: 0141ffc4 movi r5,2047 2d790: 11403b26 beq r2,r5,2d880 <__adddf3+0x780> 2d794: 0109c83a sub r4,zero,r4 @@ -16270,21 +16249,21 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2d7d8: 898d803a cmpltu r6,r17,r6 2d7dc: 3251883a add r8,r6,r9 2d7e0: 1021883a mov r16,r2 - 2d7e4: 003ee506 br 2d37c <_gp+0xffff0510> + 2d7e4: 003ee506 br 2d37c <__adddf3+0x27c> 2d7e8: 4984b03a or r2,r9,r6 - 2d7ec: 103e6326 beq r2,zero,2d17c <_gp+0xffff0310> + 2d7ec: 103e6326 beq r2,zero,2d17c <__adddf3+0x7c> 2d7f0: 8987c83a sub r3,r17,r6 2d7f4: 88c9803a cmpltu r4,r17,r3 2d7f8: 4245c83a sub r2,r8,r9 2d7fc: 1105c83a sub r2,r2,r4 2d800: 1100202c andhi r4,r2,128 - 2d804: 203ebb26 beq r4,zero,2d2f4 <_gp+0xffff0488> + 2d804: 203ebb26 beq r4,zero,2d2f4 <__adddf3+0x1f4> 2d808: 3463c83a sub r17,r6,r17 2d80c: 4a07c83a sub r3,r9,r8 2d810: 344d803a cmpltu r6,r6,r17 2d814: 1991c83a sub r8,r3,r6 2d818: 3825883a mov r18,r7 - 2d81c: 003e5706 br 2d17c <_gp+0xffff0310> + 2d81c: 003e5706 br 2d17c <__adddf3+0x7c> 2d820: 4984b03a or r2,r9,r6 2d824: 10002e26 beq r2,zero,2d8e0 <__adddf3+0x7e0> 2d828: 4004d0fa srli r2,r8,3 @@ -16306,13 +16285,13 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2d868: 882290fa slli r17,r17,3 2d86c: 0401ffc4 movi r16,2047 2d870: 4090b03a or r8,r8,r2 - 2d874: 003e4106 br 2d17c <_gp+0xffff0310> + 2d874: 003e4106 br 2d17c <__adddf3+0x7c> 2d878: 0141ffc4 movi r5,2047 - 2d87c: 117fc71e bne r2,r5,2d79c <_gp+0xffff0930> + 2d87c: 117fc71e bne r2,r5,2d79c <__adddf3+0x69c> 2d880: 4811883a mov r8,r9 2d884: 3023883a mov r17,r6 2d888: 1021883a mov r16,r2 - 2d88c: 003e3b06 br 2d17c <_gp+0xffff0310> + 2d88c: 003e3b06 br 2d17c <__adddf3+0x7c> 2d890: 10002f26 beq r2,zero,2d950 <__adddf3+0x850> 2d894: 4984b03a or r2,r9,r6 2d898: 10001126 beq r2,zero,2d8e0 <__adddf3+0x7e0> @@ -16321,25 +16300,25 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2d8a4: 4010977a slli r8,r8,29 2d8a8: 10c0022c andhi r3,r2,8 2d8ac: 4462b03a or r17,r8,r17 - 2d8b0: 183feb26 beq r3,zero,2d860 <_gp+0xffff09f4> + 2d8b0: 183feb26 beq r3,zero,2d860 <__adddf3+0x760> 2d8b4: 4808d0fa srli r4,r9,3 2d8b8: 20c0022c andhi r3,r4,8 - 2d8bc: 183fe81e bne r3,zero,2d860 <_gp+0xffff09f4> + 2d8bc: 183fe81e bne r3,zero,2d860 <__adddf3+0x760> 2d8c0: 300cd0fa srli r6,r6,3 2d8c4: 4806977a slli r3,r9,29 2d8c8: 2005883a mov r2,r4 2d8cc: 19a2b03a or r17,r3,r6 - 2d8d0: 003fe306 br 2d860 <_gp+0xffff09f4> + 2d8d0: 003fe306 br 2d860 <__adddf3+0x760> 2d8d4: 0011883a mov r8,zero 2d8d8: 0005883a mov r2,zero - 2d8dc: 003e3f06 br 2d1dc <_gp+0xffff0370> + 2d8dc: 003e3f06 br 2d1dc <__adddf3+0xdc> 2d8e0: 0401ffc4 movi r16,2047 - 2d8e4: 003e2506 br 2d17c <_gp+0xffff0310> + 2d8e4: 003e2506 br 2d17c <__adddf3+0x7c> 2d8e8: 0013883a mov r9,zero - 2d8ec: 003f8406 br 2d700 <_gp+0xffff0894> + 2d8ec: 003f8406 br 2d700 <__adddf3+0x600> 2d8f0: 0005883a mov r2,zero 2d8f4: 0007883a mov r3,zero - 2d8f8: 003e8906 br 2d320 <_gp+0xffff04b4> + 2d8f8: 003e8906 br 2d320 <__adddf3+0x220> 2d8fc: 197ff804 addi r5,r3,-32 2d900: 01000804 movi r4,32 2d904: 414ad83a srl r5,r8,r5 @@ -16351,23 +16330,23 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2d91c: 1806c03a cmpne r3,r3,zero 2d920: 28e2b03a or r17,r5,r3 2d924: 0007883a mov r3,zero - 2d928: 003f2306 br 2d5b8 <_gp+0xffff074c> + 2d928: 003f2306 br 2d5b8 <__adddf3+0x4b8> 2d92c: 0007883a mov r3,zero 2d930: 5811883a mov r8,r11 2d934: 00bfffc4 movi r2,-1 2d938: 0401ffc4 movi r16,2047 - 2d93c: 003e7806 br 2d320 <_gp+0xffff04b4> + 2d93c: 003e7806 br 2d320 <__adddf3+0x220> 2d940: 4462b03a or r17,r8,r17 2d944: 8822c03a cmpne r17,r17,zero 2d948: 0009883a mov r4,zero - 2d94c: 003fa006 br 2d7d0 <_gp+0xffff0964> + 2d94c: 003fa006 br 2d7d0 <__adddf3+0x6d0> 2d950: 4811883a mov r8,r9 2d954: 3023883a mov r17,r6 2d958: 0401ffc4 movi r16,2047 - 2d95c: 003e0706 br 2d17c <_gp+0xffff0310> + 2d95c: 003e0706 br 2d17c <__adddf3+0x7c> 2d960: 4811883a mov r8,r9 2d964: 3023883a mov r17,r6 - 2d968: 003e0406 br 2d17c <_gp+0xffff0310> + 2d968: 003e0406 br 2d17c <__adddf3+0x7c> 2d96c: 21fff804 addi r7,r4,-32 2d970: 01400804 movi r5,32 2d974: 41ced83a srl r7,r8,r7 @@ -16379,11 +16358,11 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2d98c: 2008c03a cmpne r4,r4,zero 2d990: 3922b03a or r17,r7,r4 2d994: 0009883a mov r4,zero - 2d998: 003f8d06 br 2d7d0 <_gp+0xffff0964> + 2d998: 003f8d06 br 2d7d0 <__adddf3+0x6d0> 2d99c: 0007883a mov r3,zero - 2d9a0: 003fdd06 br 2d918 <_gp+0xffff0aac> + 2d9a0: 003fdd06 br 2d918 <__adddf3+0x818> 2d9a4: 0009883a mov r4,zero - 2d9a8: 003ff706 br 2d988 <_gp+0xffff0b1c> + 2d9a8: 003ff706 br 2d988 <__adddf3+0x888> 0002d9ac <__divdf3>: 2d9ac: defff204 addi sp,sp,-56 @@ -16408,44 +16387,44 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2d9f8: 0081ffc4 movi r2,2047 2d9fc: 2025883a mov r18,r4 2da00: a8803726 beq r21,r2,2dae0 <__divdf3+0x134> - 2da04: 80800434 orhi r2,r16,16 - 2da08: 100490fa slli r2,r2,3 + 2da04: 80c00434 orhi r3,r16,16 + 2da08: 180690fa slli r3,r3,3 2da0c: 2020d77a srli r16,r4,29 2da10: 202490fa slli r18,r4,3 2da14: ad7f0044 addi r21,r21,-1023 - 2da18: 80a0b03a or r16,r16,r2 + 2da18: 80e0b03a or r16,r16,r3 2da1c: 0027883a mov r19,zero 2da20: 0013883a mov r9,zero - 2da24: 3804d53a srli r2,r7,20 + 2da24: 3808d53a srli r4,r7,20 2da28: 382cd7fa srli r22,r7,31 2da2c: 04400434 movhi r17,16 2da30: 8c7fffc4 addi r17,r17,-1 - 2da34: 1081ffcc andi r2,r2,2047 + 2da34: 2101ffcc andi r4,r4,2047 2da38: 3011883a mov r8,r6 2da3c: 3c62703a and r17,r7,r17 2da40: b5c03fcc andi r23,r22,255 - 2da44: 10006c26 beq r2,zero,2dbf8 <__divdf3+0x24c> - 2da48: 00c1ffc4 movi r3,2047 - 2da4c: 10c06426 beq r2,r3,2dbe0 <__divdf3+0x234> + 2da44: 20006c26 beq r4,zero,2dbf8 <__divdf3+0x24c> + 2da48: 0081ffc4 movi r2,2047 + 2da4c: 20806426 beq r4,r2,2dbe0 <__divdf3+0x234> 2da50: 88c00434 orhi r3,r17,16 2da54: 180690fa slli r3,r3,3 2da58: 3022d77a srli r17,r6,29 2da5c: 301090fa slli r8,r6,3 - 2da60: 10bf0044 addi r2,r2,-1023 + 2da60: 213f0044 addi r4,r4,-1023 2da64: 88e2b03a or r17,r17,r3 - 2da68: 000f883a mov r7,zero - 2da6c: a58cf03a xor r6,r20,r22 - 2da70: 3cc8b03a or r4,r7,r19 - 2da74: a8abc83a sub r21,r21,r2 - 2da78: 008003c4 movi r2,15 - 2da7c: 3007883a mov r3,r6 - 2da80: 34c03fcc andi r19,r6,255 - 2da84: 11009036 bltu r2,r4,2dcc8 <__divdf3+0x31c> - 2da88: 200890ba slli r4,r4,2 + 2da68: 000d883a mov r6,zero + 2da6c: a584f03a xor r2,r20,r22 + 2da70: 34cab03a or r5,r6,r19 + 2da74: 1007883a mov r3,r2 + 2da78: 14c03fcc andi r19,r2,255 + 2da7c: 008003c4 movi r2,15 + 2da80: a92bc83a sub r21,r21,r4 + 2da84: 11409036 bltu r2,r5,2dcc8 <__divdf3+0x31c> + 2da88: 280a90ba slli r5,r5,2 2da8c: 008000f4 movhi r2,3 2da90: 10b6a804 addi r2,r2,-9568 - 2da94: 2089883a add r4,r4,r2 - 2da98: 20800017 ldw r2,0(r4) + 2da94: 288b883a add r5,r5,r2 + 2da98: 28800017 ldw r2,0(r5) 2da9c: 1000683a jmp r2 2daa0: 0002dcc8 cmpgei zero,zero,2931 2daa4: 0002db18 cmpnei zero,zero,2924 @@ -16469,13 +16448,13 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2daec: 0021883a mov r16,zero 2daf0: 0025883a mov r18,zero 2daf4: 02400084 movi r9,2 - 2daf8: 003fca06 br 2da24 <_gp+0xffff0bb8> + 2daf8: 003fca06 br 2da24 <__divdf3+0x78> 2dafc: 8023883a mov r17,r16 2db00: 9011883a mov r8,r18 2db04: e02f883a mov r23,fp - 2db08: 480f883a mov r7,r9 + 2db08: 480d883a mov r6,r9 2db0c: 00800084 movi r2,2 - 2db10: 3881311e bne r7,r2,2dfd8 <__divdf3+0x62c> + 2db10: 3081311e bne r6,r2,2dfd8 <__divdf3+0x62c> 2db14: b827883a mov r19,r23 2db18: 98c0004c andi r3,r19,1 2db1c: 0081ffc4 movi r2,2047 @@ -16512,29 +16491,29 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2db98: 002f7040 call 2f704 <__clzsi2> 2db9c: d9800317 ldw r6,12(sp) 2dba0: d9c00217 ldw r7,8(sp) - 2dba4: 113ffd44 addi r4,r2,-11 - 2dba8: 00c00704 movi r3,28 - 2dbac: 19012116 blt r3,r4,2e034 <__divdf3+0x688> - 2dbb0: 00c00744 movi r3,29 + 2dba4: 10fffd44 addi r3,r2,-11 + 2dba8: 01000704 movi r4,28 + 2dbac: 20c12116 blt r4,r3,2e034 <__divdf3+0x688> + 2dbb0: 01000744 movi r4,29 2dbb4: 147ffe04 addi r17,r2,-8 - 2dbb8: 1907c83a sub r3,r3,r4 + 2dbb8: 20c9c83a sub r4,r4,r3 2dbbc: 8460983a sll r16,r16,r17 - 2dbc0: 98c6d83a srl r3,r19,r3 + 2dbc0: 9908d83a srl r4,r19,r4 2dbc4: 9c64983a sll r18,r19,r17 - 2dbc8: 1c20b03a or r16,r3,r16 - 2dbcc: 1080fcc4 addi r2,r2,1011 - 2dbd0: 00abc83a sub r21,zero,r2 + 2dbc8: 2420b03a or r16,r4,r16 + 2dbcc: 057f0084 movi r21,-1022 + 2dbd0: a8ebc83a sub r21,r21,r3 2dbd4: 0027883a mov r19,zero 2dbd8: 0013883a mov r9,zero - 2dbdc: 003f9106 br 2da24 <_gp+0xffff0bb8> - 2dbe0: 3446b03a or r3,r6,r17 - 2dbe4: 18001f1e bne r3,zero,2dc64 <__divdf3+0x2b8> + 2dbdc: 003f9106 br 2da24 <__divdf3+0x78> + 2dbe0: 3444b03a or r2,r6,r17 + 2dbe4: 10001f1e bne r2,zero,2dc64 <__divdf3+0x2b8> 2dbe8: 0023883a mov r17,zero 2dbec: 0011883a mov r8,zero - 2dbf0: 01c00084 movi r7,2 - 2dbf4: 003f9d06 br 2da6c <_gp+0xffff0c00> - 2dbf8: 3446b03a or r3,r6,r17 - 2dbfc: 18001526 beq r3,zero,2dc54 <__divdf3+0x2a8> + 2dbf0: 01800084 movi r6,2 + 2dbf4: 003f9d06 br 2da6c <__divdf3+0xc0> + 2dbf8: 3444b03a or r2,r6,r17 + 2dbfc: 10001526 beq r2,zero,2dc54 <__divdf3+0x2a8> 2dc00: 88011b26 beq r17,zero,2e070 <__divdf3+0x6c4> 2dc04: 8809883a mov r4,r17 2dc08: d9800315 stw r6,12(sp) @@ -16542,40 +16521,40 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2dc10: 002f7040 call 2f704 <__clzsi2> 2dc14: d9800317 ldw r6,12(sp) 2dc18: da400117 ldw r9,4(sp) - 2dc1c: 113ffd44 addi r4,r2,-11 - 2dc20: 00c00704 movi r3,28 - 2dc24: 19010e16 blt r3,r4,2e060 <__divdf3+0x6b4> - 2dc28: 00c00744 movi r3,29 + 2dc1c: 10fffd44 addi r3,r2,-11 + 2dc20: 01000704 movi r4,28 + 2dc24: 20c10e16 blt r4,r3,2e060 <__divdf3+0x6b4> + 2dc28: 01000744 movi r4,29 2dc2c: 123ffe04 addi r8,r2,-8 - 2dc30: 1907c83a sub r3,r3,r4 + 2dc30: 20c9c83a sub r4,r4,r3 2dc34: 8a22983a sll r17,r17,r8 - 2dc38: 30c6d83a srl r3,r6,r3 + 2dc38: 3108d83a srl r4,r6,r4 2dc3c: 3210983a sll r8,r6,r8 - 2dc40: 1c62b03a or r17,r3,r17 - 2dc44: 1080fcc4 addi r2,r2,1011 - 2dc48: 0085c83a sub r2,zero,r2 - 2dc4c: 000f883a mov r7,zero - 2dc50: 003f8606 br 2da6c <_gp+0xffff0c00> + 2dc40: 2462b03a or r17,r4,r17 + 2dc44: 013f0084 movi r4,-1022 + 2dc48: 20c9c83a sub r4,r4,r3 + 2dc4c: 000d883a mov r6,zero + 2dc50: 003f8606 br 2da6c <__divdf3+0xc0> 2dc54: 0023883a mov r17,zero 2dc58: 0011883a mov r8,zero - 2dc5c: 01c00044 movi r7,1 - 2dc60: 003f8206 br 2da6c <_gp+0xffff0c00> - 2dc64: 01c000c4 movi r7,3 - 2dc68: 003f8006 br 2da6c <_gp+0xffff0c00> + 2dc5c: 01800044 movi r6,1 + 2dc60: 003f8206 br 2da6c <__divdf3+0xc0> + 2dc64: 018000c4 movi r6,3 + 2dc68: 003f8006 br 2da6c <__divdf3+0xc0> 2dc6c: 04c00104 movi r19,4 2dc70: 0021883a mov r16,zero 2dc74: 0025883a mov r18,zero 2dc78: 02400044 movi r9,1 - 2dc7c: 003f6906 br 2da24 <_gp+0xffff0bb8> + 2dc7c: 003f6906 br 2da24 <__divdf3+0x78> 2dc80: 04c00304 movi r19,12 2dc84: 024000c4 movi r9,3 - 2dc88: 003f6606 br 2da24 <_gp+0xffff0bb8> + 2dc88: 003f6606 br 2da24 <__divdf3+0x78> 2dc8c: 01400434 movhi r5,16 2dc90: 0007883a mov r3,zero 2dc94: 297fffc4 addi r5,r5,-1 2dc98: 04bfffc4 movi r18,-1 2dc9c: 0081ffc4 movi r2,2047 - 2dca0: 003fa106 br 2db28 <_gp+0xffff0cbc> + 2dca0: 003fa106 br 2db28 <__divdf3+0x17c> 2dca4: 00c00044 movi r3,1 2dca8: 1887c83a sub r3,r3,r2 2dcac: 01000e04 movi r4,56 @@ -16584,17 +16563,17 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2dcb8: 0005883a mov r2,zero 2dcbc: 000b883a mov r5,zero 2dcc0: 0025883a mov r18,zero - 2dcc4: 003f9806 br 2db28 <_gp+0xffff0cbc> + 2dcc4: 003f9806 br 2db28 <__divdf3+0x17c> 2dcc8: 8c00fd36 bltu r17,r16,2e0c0 <__divdf3+0x714> 2dccc: 8440fb26 beq r16,r17,2e0bc <__divdf3+0x710> 2dcd0: 8007883a mov r3,r16 2dcd4: ad7fffc4 addi r21,r21,-1 2dcd8: 0021883a mov r16,zero - 2dcdc: 4004d63a srli r2,r8,24 + 2dcdc: 400ad63a srli r5,r8,24 2dce0: 8822923a slli r17,r17,8 2dce4: 1809883a mov r4,r3 2dce8: 402c923a slli r22,r8,8 - 2dcec: 88b8b03a or fp,r17,r2 + 2dcec: 8978b03a or fp,r17,r5 2dcf0: e028d43a srli r20,fp,16 2dcf4: d8c00015 stw r3,0(sp) 2dcf8: e5ffffcc andi r23,fp,65535 @@ -16744,7 +16723,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2df38: ba403626 beq r23,r9,2e014 <__divdf3+0x668> 2df3c: 42000054 ori r8,r8,1 2df40: a880ffc4 addi r2,r21,1023 - 2df44: 00bf570e bge zero,r2,2dca4 <_gp+0xffff0e38> + 2df44: 00bf570e bge zero,r2,2dca4 <__divdf3+0x2f8> 2df48: 40c001cc andi r3,r8,7 2df4c: 18000726 beq r3,zero,2df6c <__divdf3+0x5c0> 2df50: 40c003cc andi r3,r8,15 @@ -16761,7 +16740,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2df7c: a8810004 addi r2,r21,1024 2df80: 88e2703a and r17,r17,r3 2df84: 00c1ff84 movi r3,2046 - 2df88: 18bee316 blt r3,r2,2db18 <_gp+0xffff0cac> + 2df88: 18bee316 blt r3,r2,2db18 <__divdf3+0x16c> 2df8c: 8824977a slli r18,r17,29 2df90: 4010d0fa srli r8,r8,3 2df94: 8822927a slli r17,r17,9 @@ -16769,7 +16748,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2df9c: 9224b03a or r18,r18,r8 2dfa0: 880ad33a srli r5,r17,12 2dfa4: 98c0004c andi r3,r19,1 - 2dfa8: 003edf06 br 2db28 <_gp+0xffff0cbc> + 2dfa8: 003edf06 br 2db28 <__divdf3+0x17c> 2dfac: 8080022c andhi r2,r16,8 2dfb0: 10001226 beq r2,zero,2dffc <__divdf3+0x650> 2dfb4: 8880022c andhi r2,r17,8 @@ -16780,45 +16759,45 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2dfc8: b007883a mov r3,r22 2dfcc: 288a703a and r5,r5,r2 2dfd0: 4025883a mov r18,r8 - 2dfd4: 003f3106 br 2dc9c <_gp+0xffff0e30> + 2dfd4: 003f3106 br 2dc9c <__divdf3+0x2f0> 2dfd8: 008000c4 movi r2,3 - 2dfdc: 3880a626 beq r7,r2,2e278 <__divdf3+0x8cc> + 2dfdc: 3080a626 beq r6,r2,2e278 <__divdf3+0x8cc> 2dfe0: 00800044 movi r2,1 - 2dfe4: 3880521e bne r7,r2,2e130 <__divdf3+0x784> + 2dfe4: 3080521e bne r6,r2,2e130 <__divdf3+0x784> 2dfe8: b807883a mov r3,r23 2dfec: 0005883a mov r2,zero 2dff0: 000b883a mov r5,zero 2dff4: 0025883a mov r18,zero - 2dff8: 003ecb06 br 2db28 <_gp+0xffff0cbc> + 2dff8: 003ecb06 br 2db28 <__divdf3+0x17c> 2dffc: 00800434 movhi r2,16 2e000: 81400234 orhi r5,r16,8 2e004: 10bfffc4 addi r2,r2,-1 2e008: a007883a mov r3,r20 2e00c: 288a703a and r5,r5,r2 - 2e010: 003f2206 br 2dc9c <_gp+0xffff0e30> - 2e014: 183fca26 beq r3,zero,2df40 <_gp+0xffff10d4> + 2e010: 003f2206 br 2dc9c <__divdf3+0x2f0> + 2e014: 183fca26 beq r3,zero,2df40 <__divdf3+0x594> 2e018: e5ef883a add r23,fp,r23 2e01c: 40bfffc4 addi r2,r8,-1 2e020: bf00392e bgeu r23,fp,2e108 <__divdf3+0x75c> 2e024: 1011883a mov r8,r2 - 2e028: ba7fc41e bne r23,r9,2df3c <_gp+0xffff10d0> - 2e02c: b0ffc31e bne r22,r3,2df3c <_gp+0xffff10d0> - 2e030: 003fc306 br 2df40 <_gp+0xffff10d4> - 2e034: 143ff604 addi r16,r2,-40 - 2e038: 9c20983a sll r16,r19,r16 + 2e028: ba7fc41e bne r23,r9,2df3c <__divdf3+0x590> + 2e02c: b0ffc31e bne r22,r3,2df3c <__divdf3+0x590> + 2e030: 003fc306 br 2df40 <__divdf3+0x594> + 2e034: 10bff604 addi r2,r2,-40 + 2e038: 98a0983a sll r16,r19,r2 2e03c: 0025883a mov r18,zero - 2e040: 003ee206 br 2dbcc <_gp+0xffff0d60> + 2e040: 003ee206 br 2dbcc <__divdf3+0x220> 2e044: d9800315 stw r6,12(sp) 2e048: d9c00215 stw r7,8(sp) 2e04c: 002f7040 call 2f704 <__clzsi2> 2e050: 10800804 addi r2,r2,32 2e054: d9c00217 ldw r7,8(sp) 2e058: d9800317 ldw r6,12(sp) - 2e05c: 003ed106 br 2dba4 <_gp+0xffff0d38> - 2e060: 147ff604 addi r17,r2,-40 - 2e064: 3462983a sll r17,r6,r17 + 2e05c: 003ed106 br 2dba4 <__divdf3+0x1f8> + 2e060: 10bff604 addi r2,r2,-40 + 2e064: 30a2983a sll r17,r6,r2 2e068: 0011883a mov r8,zero - 2e06c: 003ef506 br 2dc44 <_gp+0xffff0dd8> + 2e06c: 003ef506 br 2dc44 <__divdf3+0x298> 2e070: 3009883a mov r4,r6 2e074: d9800315 stw r6,12(sp) 2e078: da400115 stw r9,4(sp) @@ -16826,7 +16805,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2e080: 10800804 addi r2,r2,32 2e084: da400117 ldw r9,4(sp) 2e088: d9800317 ldw r6,12(sp) - 2e08c: 003ee306 br 2dc1c <_gp+0xffff0db0> + 2e08c: 003ee306 br 2dc1c <__divdf3+0x270> 2e090: 85a1883a add r16,r16,r22 2e094: 8585803a cmpltu r2,r16,r22 2e098: 1705883a add r2,r2,fp @@ -16837,38 +16816,38 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2e0ac: 1c806926 beq r3,r18,2e254 <__divdf3+0x8a8> 2e0b0: 90c7c83a sub r3,r18,r3 2e0b4: 1023883a mov r17,r2 - 2e0b8: 003f5206 br 2de04 <_gp+0xffff0f98> - 2e0bc: 923f0436 bltu r18,r8,2dcd0 <_gp+0xffff0e64> + 2e0b8: 003f5206 br 2de04 <__divdf3+0x458> + 2e0bc: 923f0436 bltu r18,r8,2dcd0 <__divdf3+0x324> 2e0c0: 800897fa slli r4,r16,31 2e0c4: 9004d07a srli r2,r18,1 2e0c8: 8006d07a srli r3,r16,1 2e0cc: 902097fa slli r16,r18,31 2e0d0: 20a4b03a or r18,r4,r2 - 2e0d4: 003f0106 br 2dcdc <_gp+0xffff0e70> - 2e0d8: e4bff51e bne fp,r18,2e0b0 <_gp+0xffff1244> - 2e0dc: 85bff22e bgeu r16,r22,2e0a8 <_gp+0xffff123c> + 2e0d4: 003f0106 br 2dcdc <__divdf3+0x330> + 2e0d8: e4bff51e bne fp,r18,2e0b0 <__divdf3+0x704> + 2e0dc: 85bff22e bgeu r16,r22,2e0a8 <__divdf3+0x6fc> 2e0e0: e0c7c83a sub r3,fp,r3 2e0e4: 1023883a mov r17,r2 - 2e0e8: 003f4606 br 2de04 <_gp+0xffff0f98> + 2e0e8: 003f4606 br 2de04 <__divdf3+0x458> 2e0ec: 100f883a mov r7,r2 - 2e0f0: 003f2b06 br 2dda0 <_gp+0xffff0f34> + 2e0f0: 003f2b06 br 2dda0 <__divdf3+0x3f4> 2e0f4: 180d883a mov r6,r3 - 2e0f8: 003f1306 br 2dd48 <_gp+0xffff0edc> - 2e0fc: 813fe436 bltu r16,r4,2e090 <_gp+0xffff1224> + 2e0f8: 003f1306 br 2dd48 <__divdf3+0x39c> + 2e0fc: 813fe436 bltu r16,r4,2e090 <__divdf3+0x6e4> 2e100: 0007883a mov r3,zero - 2e104: 003f3f06 br 2de04 <_gp+0xffff0f98> + 2e104: 003f3f06 br 2de04 <__divdf3+0x458> 2e108: ba402c36 bltu r23,r9,2e1bc <__divdf3+0x810> 2e10c: 4dc05426 beq r9,r23,2e260 <__divdf3+0x8b4> 2e110: 1011883a mov r8,r2 - 2e114: 003f8906 br 2df3c <_gp+0xffff10d0> + 2e114: 003f8906 br 2df3c <__divdf3+0x590> 2e118: 023fffc4 movi r8,-1 - 2e11c: 003f8806 br 2df40 <_gp+0xffff10d4> + 2e11c: 003f8806 br 2df40 <__divdf3+0x594> 2e120: 1811883a mov r8,r3 - 2e124: 003f5406 br 2de78 <_gp+0xffff100c> + 2e124: 003f5406 br 2de78 <__divdf3+0x4cc> 2e128: 1025883a mov r18,r2 - 2e12c: 003f6d06 br 2dee4 <_gp+0xffff1078> + 2e12c: 003f6d06 br 2dee4 <__divdf3+0x538> 2e130: b827883a mov r19,r23 - 2e134: 003f8206 br 2df40 <_gp+0xffff10d4> + 2e134: 003f8206 br 2df40 <__divdf3+0x594> 2e138: 010007c4 movi r4,31 2e13c: 20c02616 blt r4,r3,2e1d8 <__divdf3+0x82c> 2e140: 00800804 movi r2,32 @@ -16895,20 +16874,20 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2e194: 00800044 movi r2,1 2e198: 000b883a mov r5,zero 2e19c: 0025883a mov r18,zero - 2e1a0: 003e6106 br 2db28 <_gp+0xffff0cbc> + 2e1a0: 003e6106 br 2db28 <__divdf3+0x17c> 2e1a4: 85a1883a add r16,r16,r22 2e1a8: 8585803a cmpltu r2,r16,r22 2e1ac: 1705883a add r2,r2,fp 2e1b0: 14a5883a add r18,r2,r18 2e1b4: 8c7fff84 addi r17,r17,-2 - 2e1b8: 003f1106 br 2de00 <_gp+0xffff0f94> + 2e1b8: 003f1106 br 2de00 <__divdf3+0x454> 2e1bc: b589883a add r4,r22,r22 2e1c0: 25ad803a cmpltu r22,r4,r22 2e1c4: b739883a add fp,r22,fp 2e1c8: 40bfff84 addi r2,r8,-2 2e1cc: bf2f883a add r23,r23,fp 2e1d0: 202d883a mov r22,r4 - 2e1d4: 003f9306 br 2e024 <_gp+0xffff11b8> + 2e1d4: 003f9306 br 2e024 <__divdf3+0x678> 2e1d8: 013ff844 movi r4,-31 2e1dc: 2085c83a sub r2,r4,r2 2e1e0: 8888d83a srl r4,r17,r2 @@ -16927,35 +16906,35 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2e214: 98c0004c andi r3,r19,1 2e218: 0005883a mov r2,zero 2e21c: 9464b03a or r18,r18,r17 - 2e220: 003e4106 br 2db28 <_gp+0xffff0cbc> + 2e220: 003e4106 br 2db28 <__divdf3+0x17c> 2e224: 1007883a mov r3,r2 2e228: 0023883a mov r17,zero 2e22c: 880a927a slli r5,r17,9 2e230: 1805883a mov r2,r3 2e234: 8822977a slli r17,r17,29 2e238: 280ad33a srli r5,r5,12 - 2e23c: 003ff406 br 2e210 <_gp+0xffff13a4> + 2e23c: 003ff406 br 2e210 <__divdf3+0x864> 2e240: 10c003cc andi r3,r2,15 2e244: 01000104 movi r4,4 - 2e248: 193ff626 beq r3,r4,2e224 <_gp+0xffff13b8> + 2e248: 193ff626 beq r3,r4,2e224 <__divdf3+0x878> 2e24c: 0023883a mov r17,zero - 2e250: 003fca06 br 2e17c <_gp+0xffff1310> - 2e254: 813fd336 bltu r16,r4,2e1a4 <_gp+0xffff1338> + 2e250: 003fca06 br 2e17c <__divdf3+0x7d0> + 2e254: 813fd336 bltu r16,r4,2e1a4 <__divdf3+0x7f8> 2e258: 1023883a mov r17,r2 - 2e25c: 003fa806 br 2e100 <_gp+0xffff1294> - 2e260: b0ffd636 bltu r22,r3,2e1bc <_gp+0xffff1350> + 2e25c: 003fa806 br 2e100 <__divdf3+0x754> + 2e260: b0ffd636 bltu r22,r3,2e1bc <__divdf3+0x810> 2e264: 1011883a mov r8,r2 - 2e268: b0ff341e bne r22,r3,2df3c <_gp+0xffff10d0> - 2e26c: 003f3406 br 2df40 <_gp+0xffff10d4> + 2e268: b0ff341e bne r22,r3,2df3c <__divdf3+0x590> + 2e26c: 003f3406 br 2df40 <__divdf3+0x594> 2e270: 0005883a mov r2,zero - 2e274: 003fe006 br 2e1f8 <_gp+0xffff138c> + 2e274: 003fe006 br 2e1f8 <__divdf3+0x84c> 2e278: 00800434 movhi r2,16 2e27c: 89400234 orhi r5,r17,8 2e280: 10bfffc4 addi r2,r2,-1 2e284: b807883a mov r3,r23 2e288: 288a703a and r5,r5,r2 2e28c: 4025883a mov r18,r8 - 2e290: 003e8206 br 2dc9c <_gp+0xffff0e30> + 2e290: 003e8206 br 2dc9c <__divdf3+0x2f0> 0002e294 <__eqdf2>: 2e294: 2804d53a srli r2,r5,20 @@ -16975,19 +16954,19 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2e2cc: 10c00226 beq r2,r3,2e2d8 <__eqdf2+0x44> 2e2d0: 00800044 movi r2,1 2e2d4: f800283a ret - 2e2d8: 4a3ffd1e bne r9,r8,2e2d0 <_gp+0xffff1464> - 2e2dc: 21bffc1e bne r4,r6,2e2d0 <_gp+0xffff1464> + 2e2d8: 4a3ffd1e bne r9,r8,2e2d0 <__eqdf2+0x3c> + 2e2dc: 21bffc1e bne r4,r6,2e2d0 <__eqdf2+0x3c> 2e2e0: 29c00c26 beq r5,r7,2e314 <__eqdf2+0x80> - 2e2e4: 103ffa1e bne r2,zero,2e2d0 <_gp+0xffff1464> + 2e2e4: 103ffa1e bne r2,zero,2e2d0 <__eqdf2+0x3c> 2e2e8: 2244b03a or r2,r4,r9 2e2ec: 1004c03a cmpne r2,r2,zero 2e2f0: f800283a ret 2e2f4: 3214b03a or r10,r6,r8 - 2e2f8: 503ff426 beq r10,zero,2e2cc <_gp+0xffff1460> + 2e2f8: 503ff426 beq r10,zero,2e2cc <__eqdf2+0x38> 2e2fc: 00800044 movi r2,1 2e300: f800283a ret 2e304: 2254b03a or r10,r4,r9 - 2e308: 503fee26 beq r10,zero,2e2c4 <_gp+0xffff1458> + 2e308: 503fee26 beq r10,zero,2e2c4 <__eqdf2+0x30> 2e30c: 00800044 movi r2,1 2e310: f800283a ret 2e314: 0005883a mov r2,zero @@ -17027,26 +17006,26 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2e394: 00800044 movi r2,1 2e398: f800283a ret 2e39c: 3212b03a or r9,r6,r8 - 2e3a0: 483fec26 beq r9,zero,2e354 <_gp+0xffff14e8> + 2e3a0: 483fec26 beq r9,zero,2e354 <__gedf2+0x38> 2e3a4: 00bfff84 movi r2,-2 2e3a8: f800283a ret 2e3ac: 39c03fcc andi r7,r7,255 2e3b0: 29c00626 beq r5,r7,2e3cc <__gedf2+0xb0> - 2e3b4: 283ff726 beq r5,zero,2e394 <_gp+0xffff1528> + 2e3b4: 283ff726 beq r5,zero,2e394 <__gedf2+0x78> 2e3b8: 00bfffc4 movi r2,-1 2e3bc: f800283a ret 2e3c0: 2292b03a or r9,r4,r10 - 2e3c4: 483fe126 beq r9,zero,2e34c <_gp+0xffff14e0> - 2e3c8: 003ff606 br 2e3a4 <_gp+0xffff1538> - 2e3cc: 18bff916 blt r3,r2,2e3b4 <_gp+0xffff1548> + 2e3c4: 483fe126 beq r9,zero,2e34c <__gedf2+0x30> + 2e3c8: 003ff606 br 2e3a4 <__gedf2+0x88> + 2e3cc: 18bff916 blt r3,r2,2e3b4 <__gedf2+0x98> 2e3d0: 10c00316 blt r2,r3,2e3e0 <__gedf2+0xc4> - 2e3d4: 42bff736 bltu r8,r10,2e3b4 <_gp+0xffff1548> + 2e3d4: 42bff736 bltu r8,r10,2e3b4 <__gedf2+0x98> 2e3d8: 52000326 beq r10,r8,2e3e8 <__gedf2+0xcc> 2e3dc: 5200042e bgeu r10,r8,2e3f0 <__gedf2+0xd4> - 2e3e0: 283fec1e bne r5,zero,2e394 <_gp+0xffff1528> - 2e3e4: 003ff406 br 2e3b8 <_gp+0xffff154c> - 2e3e8: 313ff236 bltu r6,r4,2e3b4 <_gp+0xffff1548> - 2e3ec: 21bffc36 bltu r4,r6,2e3e0 <_gp+0xffff1574> + 2e3e0: 283fec1e bne r5,zero,2e394 <__gedf2+0x78> + 2e3e4: 003ff406 br 2e3b8 <__gedf2+0x9c> + 2e3e8: 313ff236 bltu r6,r4,2e3b4 <__gedf2+0x98> + 2e3ec: 21bffc36 bltu r4,r6,2e3e0 <__gedf2+0xc4> 2e3f0: 0005883a mov r2,zero 2e3f4: f800283a ret @@ -17086,7 +17065,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2e478: 00800044 movi r2,1 2e47c: f800283a ret 2e480: 30d2b03a or r9,r6,r3 - 2e484: 483fea26 beq r9,zero,2e430 <_gp+0xffff15c4> + 2e484: 483fea26 beq r9,zero,2e430 <__ledf2+0x38> 2e488: 00800084 movi r2,2 2e48c: f800283a ret 2e490: 39c03fcc andi r7,r7,255 @@ -17095,86 +17074,86 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2e49c: 00800044 movi r2,1 2e4a0: f800283a ret 2e4a4: 2292b03a or r9,r4,r10 - 2e4a8: 483fdf26 beq r9,zero,2e428 <_gp+0xffff15bc> + 2e4a8: 483fdf26 beq r9,zero,2e428 <__ledf2+0x30> 2e4ac: 00800084 movi r2,2 2e4b0: f800283a ret 2e4b4: 4080030e bge r8,r2,2e4c4 <__ledf2+0xcc> - 2e4b8: 383fef26 beq r7,zero,2e478 <_gp+0xffff160c> + 2e4b8: 383fef26 beq r7,zero,2e478 <__ledf2+0x80> 2e4bc: 00bfffc4 movi r2,-1 2e4c0: f800283a ret - 2e4c4: 123feb16 blt r2,r8,2e474 <_gp+0xffff1608> - 2e4c8: 1abff336 bltu r3,r10,2e498 <_gp+0xffff162c> + 2e4c4: 123feb16 blt r2,r8,2e474 <__ledf2+0x7c> + 2e4c8: 1abff336 bltu r3,r10,2e498 <__ledf2+0xa0> 2e4cc: 50c00326 beq r10,r3,2e4dc <__ledf2+0xe4> 2e4d0: 50c0042e bgeu r10,r3,2e4e4 <__ledf2+0xec> - 2e4d4: 283fe81e bne r5,zero,2e478 <_gp+0xffff160c> - 2e4d8: 003ff806 br 2e4bc <_gp+0xffff1650> - 2e4dc: 313fee36 bltu r6,r4,2e498 <_gp+0xffff162c> - 2e4e0: 21bffc36 bltu r4,r6,2e4d4 <_gp+0xffff1668> + 2e4d4: 283fe81e bne r5,zero,2e478 <__ledf2+0x80> + 2e4d8: 003ff806 br 2e4bc <__ledf2+0xc4> + 2e4dc: 313fee36 bltu r6,r4,2e498 <__ledf2+0xa0> + 2e4e0: 21bffc36 bltu r4,r6,2e4d4 <__ledf2+0xdc> 2e4e4: 0005883a mov r2,zero 2e4e8: f800283a ret 0002e4ec <__muldf3>: 2e4ec: defff304 addi sp,sp,-52 - 2e4f0: 2804d53a srli r2,r5,20 - 2e4f4: dd800915 stw r22,36(sp) - 2e4f8: 282cd7fa srli r22,r5,31 - 2e4fc: dc000315 stw r16,12(sp) - 2e500: 04000434 movhi r16,16 - 2e504: dd400815 stw r21,32(sp) - 2e508: dc800515 stw r18,20(sp) + 2e4f0: dd400815 stw r21,32(sp) + 2e4f4: 282ad53a srli r21,r5,20 + 2e4f8: dd800915 stw r22,36(sp) + 2e4fc: 282cd7fa srli r22,r5,31 + 2e500: dc000315 stw r16,12(sp) + 2e504: 04000434 movhi r16,16 + 2e508: dd000715 stw r20,28(sp) 2e50c: 843fffc4 addi r16,r16,-1 2e510: dfc00c15 stw ra,48(sp) 2e514: df000b15 stw fp,44(sp) 2e518: ddc00a15 stw r23,40(sp) - 2e51c: dd000715 stw r20,28(sp) - 2e520: dcc00615 stw r19,24(sp) + 2e51c: dcc00615 stw r19,24(sp) + 2e520: dc800515 stw r18,20(sp) 2e524: dc400415 stw r17,16(sp) - 2e528: 1481ffcc andi r18,r2,2047 + 2e528: ad41ffcc andi r21,r21,2047 2e52c: 2c20703a and r16,r5,r16 - 2e530: b02b883a mov r21,r22 + 2e530: b029883a mov r20,r22 2e534: b2403fcc andi r9,r22,255 - 2e538: 90006026 beq r18,zero,2e6bc <__muldf3+0x1d0> + 2e538: a8006026 beq r21,zero,2e6bc <__muldf3+0x1d0> 2e53c: 0081ffc4 movi r2,2047 - 2e540: 2029883a mov r20,r4 - 2e544: 90803626 beq r18,r2,2e620 <__muldf3+0x134> - 2e548: 80800434 orhi r2,r16,16 - 2e54c: 100490fa slli r2,r2,3 + 2e540: 2027883a mov r19,r4 + 2e544: a8803626 beq r21,r2,2e620 <__muldf3+0x134> + 2e548: 80c00434 orhi r3,r16,16 + 2e54c: 180690fa slli r3,r3,3 2e550: 2020d77a srli r16,r4,29 - 2e554: 202890fa slli r20,r4,3 - 2e558: 94bf0044 addi r18,r18,-1023 - 2e55c: 80a0b03a or r16,r16,r2 - 2e560: 0027883a mov r19,zero + 2e554: 202690fa slli r19,r4,3 + 2e558: ad7f0044 addi r21,r21,-1023 + 2e55c: 80e0b03a or r16,r16,r3 + 2e560: 0025883a mov r18,zero 2e564: 0039883a mov fp,zero - 2e568: 3804d53a srli r2,r7,20 + 2e568: 3808d53a srli r4,r7,20 2e56c: 382ed7fa srli r23,r7,31 2e570: 04400434 movhi r17,16 2e574: 8c7fffc4 addi r17,r17,-1 - 2e578: 1081ffcc andi r2,r2,2047 + 2e578: 2101ffcc andi r4,r4,2047 2e57c: 3011883a mov r8,r6 2e580: 3c62703a and r17,r7,r17 2e584: ba803fcc andi r10,r23,255 - 2e588: 10006d26 beq r2,zero,2e740 <__muldf3+0x254> - 2e58c: 00c1ffc4 movi r3,2047 - 2e590: 10c06526 beq r2,r3,2e728 <__muldf3+0x23c> + 2e588: 20006d26 beq r4,zero,2e740 <__muldf3+0x254> + 2e58c: 0081ffc4 movi r2,2047 + 2e590: 20806526 beq r4,r2,2e728 <__muldf3+0x23c> 2e594: 88c00434 orhi r3,r17,16 2e598: 180690fa slli r3,r3,3 2e59c: 3022d77a srli r17,r6,29 2e5a0: 301090fa slli r8,r6,3 - 2e5a4: 10bf0044 addi r2,r2,-1023 + 2e5a4: 213f0044 addi r4,r4,-1023 2e5a8: 88e2b03a or r17,r17,r3 2e5ac: 000b883a mov r5,zero - 2e5b0: 9085883a add r2,r18,r2 - 2e5b4: 2cc8b03a or r4,r5,r19 + 2e5b0: a909883a add r4,r21,r4 + 2e5b4: 2c84b03a or r2,r5,r18 2e5b8: 00c003c4 movi r3,15 2e5bc: bdacf03a xor r22,r23,r22 - 2e5c0: 12c00044 addi r11,r2,1 - 2e5c4: 19009936 bltu r3,r4,2e82c <__muldf3+0x340> - 2e5c8: 200890ba slli r4,r4,2 + 2e5c0: 22c00044 addi r11,r4,1 + 2e5c4: 18809936 bltu r3,r2,2e82c <__muldf3+0x340> + 2e5c8: 100490ba slli r2,r2,2 2e5cc: 00c000f4 movhi r3,3 2e5d0: 18f97804 addi r3,r3,-6688 - 2e5d4: 20c9883a add r4,r4,r3 - 2e5d8: 20c00017 ldw r3,0(r4) - 2e5dc: 1800683a jmp r3 + 2e5d4: 10c5883a add r2,r2,r3 + 2e5d8: 10800017 ldw r2,0(r2) + 2e5dc: 1000683a jmp r2 2e5e0: 0002e82c andhi zero,zero,2976 2e5e4: 0002e640 call 2e64 <__alt_mem_onchip_memory2_0-0x1d19c> 2e5e8: 0002e640 call 2e64 <__alt_mem_onchip_memory2_0-0x1d19c> @@ -17193,11 +17172,11 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2e61c: 0002ea34 movhi zero,2984 2e620: 2404b03a or r2,r4,r16 2e624: 10006f1e bne r2,zero,2e7e4 <__muldf3+0x2f8> - 2e628: 04c00204 movi r19,8 + 2e628: 04800204 movi r18,8 2e62c: 0021883a mov r16,zero - 2e630: 0029883a mov r20,zero + 2e630: 0027883a mov r19,zero 2e634: 07000084 movi fp,2 - 2e638: 003fcb06 br 2e568 <_gp+0xffff16fc> + 2e638: 003fcb06 br 2e568 <__muldf3+0x7c> 2e63c: 502d883a mov r22,r10 2e640: 00800084 movi r2,2 2e644: 28805726 beq r5,r2,2e7a4 <__muldf3+0x2b8> @@ -17205,19 +17184,19 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2e64c: 28816626 beq r5,r2,2ebe8 <__muldf3+0x6fc> 2e650: 00800044 movi r2,1 2e654: 2881411e bne r5,r2,2eb5c <__muldf3+0x670> - 2e658: b02b883a mov r21,r22 + 2e658: b029883a mov r20,r22 2e65c: 0005883a mov r2,zero 2e660: 000b883a mov r5,zero - 2e664: 0029883a mov r20,zero + 2e664: 0027883a mov r19,zero 2e668: 1004953a slli r2,r2,20 - 2e66c: a8c03fcc andi r3,r21,255 + 2e66c: a0c03fcc andi r3,r20,255 2e670: 04400434 movhi r17,16 2e674: 8c7fffc4 addi r17,r17,-1 2e678: 180697fa slli r3,r3,31 2e67c: 2c4a703a and r5,r5,r17 2e680: 288ab03a or r5,r5,r2 2e684: 28c6b03a or r3,r5,r3 - 2e688: a005883a mov r2,r20 + 2e688: 9805883a mov r2,r19 2e68c: dfc00c17 ldw ra,48(sp) 2e690: df000b17 ldw fp,44(sp) 2e694: ddc00a17 ldw r23,40(sp) @@ -17231,7 +17210,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2e6b4: dec00d04 addi sp,sp,52 2e6b8: f800283a ret 2e6bc: 2404b03a or r2,r4,r16 - 2e6c0: 2027883a mov r19,r4 + 2e6c0: 2025883a mov r18,r4 2e6c4: 10004226 beq r2,zero,2e7d0 <__muldf3+0x2e4> 2e6c8: 8000fc26 beq r16,zero,2eabc <__muldf3+0x5d0> 2e6cc: 8009883a mov r4,r16 @@ -17242,29 +17221,29 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2e6e0: d9800217 ldw r6,8(sp) 2e6e4: d9c00017 ldw r7,0(sp) 2e6e8: da400117 ldw r9,4(sp) - 2e6ec: 113ffd44 addi r4,r2,-11 - 2e6f0: 00c00704 movi r3,28 - 2e6f4: 1900ed16 blt r3,r4,2eaac <__muldf3+0x5c0> - 2e6f8: 00c00744 movi r3,29 + 2e6ec: 10fffd44 addi r3,r2,-11 + 2e6f0: 01000704 movi r4,28 + 2e6f4: 20c0ed16 blt r4,r3,2eaac <__muldf3+0x5c0> + 2e6f8: 01000744 movi r4,29 2e6fc: 147ffe04 addi r17,r2,-8 - 2e700: 1907c83a sub r3,r3,r4 + 2e700: 20c9c83a sub r4,r4,r3 2e704: 8460983a sll r16,r16,r17 - 2e708: 98c6d83a srl r3,r19,r3 - 2e70c: 9c68983a sll r20,r19,r17 - 2e710: 1c20b03a or r16,r3,r16 - 2e714: 1080fcc4 addi r2,r2,1011 - 2e718: 00a5c83a sub r18,zero,r2 - 2e71c: 0027883a mov r19,zero + 2e708: 9108d83a srl r4,r18,r4 + 2e70c: 9466983a sll r19,r18,r17 + 2e710: 2420b03a or r16,r4,r16 + 2e714: 013f0084 movi r4,-1022 + 2e718: 20ebc83a sub r21,r4,r3 + 2e71c: 0025883a mov r18,zero 2e720: 0039883a mov fp,zero - 2e724: 003f9006 br 2e568 <_gp+0xffff16fc> - 2e728: 3446b03a or r3,r6,r17 - 2e72c: 1800261e bne r3,zero,2e7c8 <__muldf3+0x2dc> + 2e724: 003f9006 br 2e568 <__muldf3+0x7c> + 2e728: 3444b03a or r2,r6,r17 + 2e72c: 1000261e bne r2,zero,2e7c8 <__muldf3+0x2dc> 2e730: 0023883a mov r17,zero 2e734: 0011883a mov r8,zero 2e738: 01400084 movi r5,2 - 2e73c: 003f9c06 br 2e5b0 <_gp+0xffff1744> - 2e740: 3446b03a or r3,r6,r17 - 2e744: 18001c26 beq r3,zero,2e7b8 <__muldf3+0x2cc> + 2e73c: 003f9c06 br 2e5b0 <__muldf3+0xc4> + 2e740: 3444b03a or r2,r6,r17 + 2e744: 10001c26 beq r2,zero,2e7b8 <__muldf3+0x2cc> 2e748: 8800ce26 beq r17,zero,2ea84 <__muldf3+0x598> 2e74c: 8809883a mov r4,r17 2e750: d9800215 stw r6,8(sp) @@ -17284,104 +17263,104 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2e788: 30c6d83a srl r3,r6,r3 2e78c: 3210983a sll r8,r6,r8 2e790: 1c62b03a or r17,r3,r17 - 2e794: 1080fcc4 addi r2,r2,1011 - 2e798: 0085c83a sub r2,zero,r2 + 2e794: 017f0084 movi r5,-1022 + 2e798: 2909c83a sub r4,r5,r4 2e79c: 000b883a mov r5,zero - 2e7a0: 003f8306 br 2e5b0 <_gp+0xffff1744> - 2e7a4: b02b883a mov r21,r22 + 2e7a0: 003f8306 br 2e5b0 <__muldf3+0xc4> + 2e7a4: b029883a mov r20,r22 2e7a8: 0081ffc4 movi r2,2047 2e7ac: 000b883a mov r5,zero - 2e7b0: 0029883a mov r20,zero - 2e7b4: 003fac06 br 2e668 <_gp+0xffff17fc> + 2e7b0: 0027883a mov r19,zero + 2e7b4: 003fac06 br 2e668 <__muldf3+0x17c> 2e7b8: 0023883a mov r17,zero 2e7bc: 0011883a mov r8,zero 2e7c0: 01400044 movi r5,1 - 2e7c4: 003f7a06 br 2e5b0 <_gp+0xffff1744> + 2e7c4: 003f7a06 br 2e5b0 <__muldf3+0xc4> 2e7c8: 014000c4 movi r5,3 - 2e7cc: 003f7806 br 2e5b0 <_gp+0xffff1744> - 2e7d0: 04c00104 movi r19,4 + 2e7cc: 003f7806 br 2e5b0 <__muldf3+0xc4> + 2e7d0: 04800104 movi r18,4 2e7d4: 0021883a mov r16,zero - 2e7d8: 0029883a mov r20,zero + 2e7d8: 0027883a mov r19,zero 2e7dc: 07000044 movi fp,1 - 2e7e0: 003f6106 br 2e568 <_gp+0xffff16fc> - 2e7e4: 04c00304 movi r19,12 + 2e7e0: 003f6106 br 2e568 <__muldf3+0x7c> + 2e7e4: 04800304 movi r18,12 2e7e8: 070000c4 movi fp,3 - 2e7ec: 003f5e06 br 2e568 <_gp+0xffff16fc> + 2e7ec: 003f5e06 br 2e568 <__muldf3+0x7c> 2e7f0: 01400434 movhi r5,16 - 2e7f4: 002b883a mov r21,zero + 2e7f4: 0029883a mov r20,zero 2e7f8: 297fffc4 addi r5,r5,-1 - 2e7fc: 053fffc4 movi r20,-1 + 2e7fc: 04ffffc4 movi r19,-1 2e800: 0081ffc4 movi r2,2047 - 2e804: 003f9806 br 2e668 <_gp+0xffff17fc> + 2e804: 003f9806 br 2e668 <__muldf3+0x17c> 2e808: 8023883a mov r17,r16 - 2e80c: a011883a mov r8,r20 + 2e80c: 9811883a mov r8,r19 2e810: e00b883a mov r5,fp - 2e814: 003f8a06 br 2e640 <_gp+0xffff17d4> + 2e814: 003f8a06 br 2e640 <__muldf3+0x154> 2e818: 8023883a mov r17,r16 - 2e81c: a011883a mov r8,r20 + 2e81c: 9811883a mov r8,r19 2e820: 482d883a mov r22,r9 2e824: e00b883a mov r5,fp - 2e828: 003f8506 br 2e640 <_gp+0xffff17d4> - 2e82c: a00ad43a srli r5,r20,16 + 2e828: 003f8506 br 2e640 <__muldf3+0x154> + 2e82c: 980ad43a srli r5,r19,16 2e830: 401ad43a srli r13,r8,16 - 2e834: a53fffcc andi r20,r20,65535 + 2e834: 9cffffcc andi r19,r19,65535 2e838: 423fffcc andi r8,r8,65535 - 2e83c: 4519383a mul r12,r8,r20 - 2e840: 4147383a mul r3,r8,r5 - 2e844: 6d09383a mul r4,r13,r20 - 2e848: 600cd43a srli r6,r12,16 + 2e83c: 44d9383a mul r12,r8,r19 + 2e840: 4145383a mul r2,r8,r5 + 2e844: 6ccd383a mul r6,r13,r19 + 2e848: 6006d43a srli r3,r12,16 2e84c: 2b5d383a mul r14,r5,r13 - 2e850: 20c9883a add r4,r4,r3 - 2e854: 310d883a add r6,r6,r4 - 2e858: 30c0022e bgeu r6,r3,2e864 <__muldf3+0x378> - 2e85c: 00c00074 movhi r3,1 - 2e860: 70dd883a add r14,r14,r3 - 2e864: 8826d43a srli r19,r17,16 + 2e850: 308d883a add r6,r6,r2 + 2e854: 198d883a add r6,r3,r6 + 2e858: 3080022e bgeu r6,r2,2e864 <__muldf3+0x378> + 2e85c: 00800074 movhi r2,1 + 2e860: 709d883a add r14,r14,r2 + 2e864: 8828d43a srli r20,r17,16 2e868: 8bffffcc andi r15,r17,65535 - 2e86c: 7d23383a mul r17,r15,r20 - 2e870: 7949383a mul r4,r15,r5 - 2e874: 9d29383a mul r20,r19,r20 + 2e86c: 7ce3383a mul r17,r15,r19 + 2e870: 7945383a mul r2,r15,r5 + 2e874: a4e7383a mul r19,r20,r19 2e878: 8814d43a srli r10,r17,16 2e87c: 3012943a slli r9,r6,16 - 2e880: a129883a add r20,r20,r4 + 2e880: 98a7883a add r19,r19,r2 2e884: 633fffcc andi r12,r12,65535 - 2e888: 5515883a add r10,r10,r20 + 2e888: 54d5883a add r10,r10,r19 2e88c: 3006d43a srli r3,r6,16 2e890: 4b13883a add r9,r9,r12 - 2e894: 2ccb383a mul r5,r5,r19 - 2e898: 5100022e bgeu r10,r4,2e8a4 <__muldf3+0x3b8> - 2e89c: 01000074 movhi r4,1 - 2e8a0: 290b883a add r5,r5,r4 + 2e894: 2d0b383a mul r5,r5,r20 + 2e898: 5080022e bgeu r10,r2,2e8a4 <__muldf3+0x3b8> + 2e89c: 00800074 movhi r2,1 + 2e8a0: 288b883a add r5,r5,r2 2e8a4: 802ad43a srli r21,r16,16 2e8a8: 843fffcc andi r16,r16,65535 2e8ac: 440d383a mul r6,r8,r16 2e8b0: 4565383a mul r18,r8,r21 - 2e8b4: 8349383a mul r4,r16,r13 + 2e8b4: 8359383a mul r12,r16,r13 2e8b8: 500e943a slli r7,r10,16 2e8bc: 3010d43a srli r8,r6,16 - 2e8c0: 5028d43a srli r20,r10,16 - 2e8c4: 2489883a add r4,r4,r18 + 2e8c0: 5026d43a srli r19,r10,16 + 2e8c4: 6499883a add r12,r12,r18 2e8c8: 8abfffcc andi r10,r17,65535 2e8cc: 3a95883a add r10,r7,r10 - 2e8d0: 4119883a add r12,r8,r4 - 2e8d4: a169883a add r20,r20,r5 + 2e8d0: 4319883a add r12,r8,r12 + 2e8d4: 9967883a add r19,r19,r5 2e8d8: 1a87883a add r3,r3,r10 2e8dc: 6d5b383a mul r13,r13,r21 2e8e0: 6480022e bgeu r12,r18,2e8ec <__muldf3+0x400> - 2e8e4: 01000074 movhi r4,1 - 2e8e8: 691b883a add r13,r13,r4 + 2e8e4: 00800074 movhi r2,1 + 2e8e8: 689b883a add r13,r13,r2 2e8ec: 7c25383a mul r18,r15,r16 2e8f0: 7d4b383a mul r5,r15,r21 - 2e8f4: 84cf383a mul r7,r16,r19 + 2e8f4: 850f383a mul r7,r16,r20 2e8f8: 901ed43a srli r15,r18,16 - 2e8fc: 6008d43a srli r4,r12,16 + 2e8fc: 6004d43a srli r2,r12,16 2e900: 6010943a slli r8,r12,16 2e904: 394f883a add r7,r7,r5 2e908: 333fffcc andi r12,r6,65535 2e90c: 79df883a add r15,r15,r7 - 2e910: 235b883a add r13,r4,r13 - 2e914: 9d63383a mul r17,r19,r21 - 2e918: 4309883a add r4,r8,r12 + 2e910: 135b883a add r13,r2,r13 + 2e914: a563383a mul r17,r20,r21 + 2e918: 4305883a add r2,r8,r12 2e91c: 7940022e bgeu r15,r5,2e928 <__muldf3+0x43c> 2e920: 01400074 movhi r5,1 2e924: 8963883a add r17,r17,r5 @@ -17390,68 +17369,68 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2e930: 70c7883a add r3,r14,r3 2e934: 298d883a add r6,r5,r6 2e938: 1a8f803a cmpltu r7,r3,r10 - 2e93c: 350b883a add r5,r6,r20 - 2e940: 20c7883a add r3,r4,r3 + 2e93c: 34cb883a add r5,r6,r19 + 2e940: 10c7883a add r3,r2,r3 2e944: 3955883a add r10,r7,r5 - 2e948: 1909803a cmpltu r4,r3,r4 + 2e948: 1885803a cmpltu r2,r3,r2 2e94c: 6a91883a add r8,r13,r10 2e950: 780cd43a srli r6,r15,16 - 2e954: 2219883a add r12,r4,r8 - 2e958: 2d0b803a cmpltu r5,r5,r20 + 2e954: 1219883a add r12,r2,r8 + 2e958: 2ccb803a cmpltu r5,r5,r19 2e95c: 51cf803a cmpltu r7,r10,r7 2e960: 29ceb03a or r7,r5,r7 2e964: 4351803a cmpltu r8,r8,r13 - 2e968: 610b803a cmpltu r5,r12,r4 - 2e96c: 4148b03a or r4,r8,r5 + 2e968: 608b803a cmpltu r5,r12,r2 + 2e96c: 4144b03a or r2,r8,r5 2e970: 398f883a add r7,r7,r6 - 2e974: 3909883a add r4,r7,r4 + 2e974: 3885883a add r2,r7,r2 2e978: 1810927a slli r8,r3,9 - 2e97c: 2449883a add r4,r4,r17 - 2e980: 2008927a slli r4,r4,9 + 2e97c: 1445883a add r2,r2,r17 + 2e980: 1004927a slli r2,r2,9 2e984: 6022d5fa srli r17,r12,23 2e988: 1806d5fa srli r3,r3,23 2e98c: 4252b03a or r9,r8,r9 2e990: 600a927a slli r5,r12,9 2e994: 4810c03a cmpne r8,r9,zero - 2e998: 2462b03a or r17,r4,r17 + 2e998: 1462b03a or r17,r2,r17 2e99c: 40c6b03a or r3,r8,r3 - 2e9a0: 8900402c andhi r4,r17,256 + 2e9a0: 8880402c andhi r2,r17,256 2e9a4: 1950b03a or r8,r3,r5 - 2e9a8: 20000726 beq r4,zero,2e9c8 <__muldf3+0x4dc> + 2e9a8: 10000726 beq r2,zero,2e9c8 <__muldf3+0x4dc> 2e9ac: 4006d07a srli r3,r8,1 2e9b0: 880497fa slli r2,r17,31 2e9b4: 4200004c andi r8,r8,1 2e9b8: 8822d07a srli r17,r17,1 2e9bc: 1a10b03a or r8,r3,r8 2e9c0: 1210b03a or r8,r2,r8 - 2e9c4: 5805883a mov r2,r11 - 2e9c8: 1140ffc4 addi r5,r2,1023 - 2e9cc: 0140440e bge zero,r5,2eae0 <__muldf3+0x5f4> + 2e9c4: 5809883a mov r4,r11 + 2e9c8: 2080ffc4 addi r2,r4,1023 + 2e9cc: 0080440e bge zero,r2,2eae0 <__muldf3+0x5f4> 2e9d0: 40c001cc andi r3,r8,7 2e9d4: 18000726 beq r3,zero,2e9f4 <__muldf3+0x508> 2e9d8: 40c003cc andi r3,r8,15 - 2e9dc: 01000104 movi r4,4 - 2e9e0: 19000426 beq r3,r4,2e9f4 <__muldf3+0x508> - 2e9e4: 4107883a add r3,r8,r4 + 2e9dc: 01400104 movi r5,4 + 2e9e0: 19400426 beq r3,r5,2e9f4 <__muldf3+0x508> + 2e9e4: 4147883a add r3,r8,r5 2e9e8: 1a11803a cmpltu r8,r3,r8 2e9ec: 8a23883a add r17,r17,r8 2e9f0: 1811883a mov r8,r3 2e9f4: 88c0402c andhi r3,r17,256 2e9f8: 18000426 beq r3,zero,2ea0c <__muldf3+0x520> - 2e9fc: 11410004 addi r5,r2,1024 - 2ea00: 00bfc034 movhi r2,65280 - 2ea04: 10bfffc4 addi r2,r2,-1 - 2ea08: 88a2703a and r17,r17,r2 - 2ea0c: 0081ff84 movi r2,2046 - 2ea10: 117f6416 blt r2,r5,2e7a4 <_gp+0xffff1938> - 2ea14: 8828977a slli r20,r17,29 + 2e9fc: 00ffc034 movhi r3,65280 + 2ea00: 18ffffc4 addi r3,r3,-1 + 2ea04: 20810004 addi r2,r4,1024 + 2ea08: 88e2703a and r17,r17,r3 + 2ea0c: 00c1ff84 movi r3,2046 + 2ea10: 18bf6416 blt r3,r2,2e7a4 <__muldf3+0x2b8> + 2ea14: 8826977a slli r19,r17,29 2ea18: 4010d0fa srli r8,r8,3 2ea1c: 8822927a slli r17,r17,9 - 2ea20: 2881ffcc andi r2,r5,2047 - 2ea24: a228b03a or r20,r20,r8 + 2ea20: 1081ffcc andi r2,r2,2047 + 2ea24: 9a26b03a or r19,r19,r8 2ea28: 880ad33a srli r5,r17,12 - 2ea2c: b02b883a mov r21,r22 - 2ea30: 003f0d06 br 2e668 <_gp+0xffff17fc> + 2ea2c: b029883a mov r20,r22 + 2ea30: 003f0d06 br 2e668 <__muldf3+0x17c> 2ea34: 8080022c andhi r2,r16,8 2ea38: 10000926 beq r2,zero,2ea60 <__muldf3+0x574> 2ea3c: 8880022c andhi r2,r17,8 @@ -17459,19 +17438,19 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2ea44: 00800434 movhi r2,16 2ea48: 89400234 orhi r5,r17,8 2ea4c: 10bfffc4 addi r2,r2,-1 - 2ea50: b82b883a mov r21,r23 + 2ea50: b829883a mov r20,r23 2ea54: 288a703a and r5,r5,r2 - 2ea58: 4029883a mov r20,r8 - 2ea5c: 003f6806 br 2e800 <_gp+0xffff1994> + 2ea58: 4027883a mov r19,r8 + 2ea5c: 003f6806 br 2e800 <__muldf3+0x314> 2ea60: 00800434 movhi r2,16 2ea64: 81400234 orhi r5,r16,8 2ea68: 10bfffc4 addi r2,r2,-1 2ea6c: 288a703a and r5,r5,r2 - 2ea70: 003f6306 br 2e800 <_gp+0xffff1994> - 2ea74: 147ff604 addi r17,r2,-40 - 2ea78: 3462983a sll r17,r6,r17 + 2ea70: 003f6306 br 2e800 <__muldf3+0x314> + 2ea74: 10bff604 addi r2,r2,-40 + 2ea78: 30a2983a sll r17,r6,r2 2ea7c: 0011883a mov r8,zero - 2ea80: 003f4406 br 2e794 <_gp+0xffff1928> + 2ea80: 003f4406 br 2e794 <__muldf3+0x2a8> 2ea84: 3009883a mov r4,r6 2ea88: d9800215 stw r6,8(sp) 2ea8c: da400115 stw r9,4(sp) @@ -17481,11 +17460,11 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2ea9c: da800017 ldw r10,0(sp) 2eaa0: da400117 ldw r9,4(sp) 2eaa4: d9800217 ldw r6,8(sp) - 2eaa8: 003f3006 br 2e76c <_gp+0xffff1900> - 2eaac: 143ff604 addi r16,r2,-40 - 2eab0: 9c20983a sll r16,r19,r16 - 2eab4: 0029883a mov r20,zero - 2eab8: 003f1606 br 2e714 <_gp+0xffff18a8> + 2eaa8: 003f3006 br 2e76c <__muldf3+0x280> + 2eaac: 10bff604 addi r2,r2,-40 + 2eab0: 90a0983a sll r16,r18,r2 + 2eab4: 0027883a mov r19,zero + 2eab8: 003f1606 br 2e714 <__muldf3+0x228> 2eabc: d9800215 stw r6,8(sp) 2eac0: d9c00015 stw r7,0(sp) 2eac4: da400115 stw r9,4(sp) @@ -17494,13 +17473,13 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2ead0: da400117 ldw r9,4(sp) 2ead4: d9c00017 ldw r7,0(sp) 2ead8: d9800217 ldw r6,8(sp) - 2eadc: 003f0306 br 2e6ec <_gp+0xffff1880> + 2eadc: 003f0306 br 2e6ec <__muldf3+0x200> 2eae0: 00c00044 movi r3,1 - 2eae4: 1947c83a sub r3,r3,r5 - 2eae8: 00800e04 movi r2,56 - 2eaec: 10feda16 blt r2,r3,2e658 <_gp+0xffff17ec> - 2eaf0: 008007c4 movi r2,31 - 2eaf4: 10c01b16 blt r2,r3,2eb64 <__muldf3+0x678> + 2eae4: 1887c83a sub r3,r3,r2 + 2eae8: 01000e04 movi r4,56 + 2eaec: 20feda16 blt r4,r3,2e658 <__muldf3+0x16c> + 2eaf0: 010007c4 movi r4,31 + 2eaf4: 20c01b16 blt r4,r3,2eb64 <__muldf3+0x678> 2eaf8: 00800804 movi r2,32 2eafc: 10c5c83a sub r2,r2,r3 2eb00: 888a983a sll r5,r17,r2 @@ -17521,15 +17500,15 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2eb3c: 88a3883a add r17,r17,r2 2eb40: 8880202c andhi r2,r17,128 2eb44: 10001c26 beq r2,zero,2ebb8 <__muldf3+0x6cc> - 2eb48: b02b883a mov r21,r22 + 2eb48: b029883a mov r20,r22 2eb4c: 00800044 movi r2,1 2eb50: 000b883a mov r5,zero - 2eb54: 0029883a mov r20,zero - 2eb58: 003ec306 br 2e668 <_gp+0xffff17fc> - 2eb5c: 5805883a mov r2,r11 - 2eb60: 003f9906 br 2e9c8 <_gp+0xffff1b5c> - 2eb64: 00bff844 movi r2,-31 - 2eb68: 1145c83a sub r2,r2,r5 + 2eb54: 0027883a mov r19,zero + 2eb58: 003ec306 br 2e668 <__muldf3+0x17c> + 2eb5c: 5809883a mov r4,r11 + 2eb60: 003f9906 br 2e9c8 <__muldf3+0x4dc> + 2eb64: 013ff844 movi r4,-31 + 2eb68: 2085c83a sub r2,r4,r2 2eb6c: 8888d83a srl r4,r17,r2 2eb70: 00800804 movi r2,32 2eb74: 18801a26 beq r3,r2,2ebe0 <__muldf3+0x6f4> @@ -17542,32 +17521,32 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2eb90: 144001cc andi r17,r2,7 2eb94: 88000d1e bne r17,zero,2ebcc <__muldf3+0x6e0> 2eb98: 000b883a mov r5,zero - 2eb9c: 1028d0fa srli r20,r2,3 - 2eba0: b02b883a mov r21,r22 + 2eb9c: 1026d0fa srli r19,r2,3 + 2eba0: b029883a mov r20,r22 2eba4: 0005883a mov r2,zero - 2eba8: a468b03a or r20,r20,r17 - 2ebac: 003eae06 br 2e668 <_gp+0xffff17fc> + 2eba8: 9c66b03a or r19,r19,r17 + 2ebac: 003eae06 br 2e668 <__muldf3+0x17c> 2ebb0: 1007883a mov r3,r2 2ebb4: 0023883a mov r17,zero 2ebb8: 880a927a slli r5,r17,9 2ebbc: 1805883a mov r2,r3 2ebc0: 8822977a slli r17,r17,29 2ebc4: 280ad33a srli r5,r5,12 - 2ebc8: 003ff406 br 2eb9c <_gp+0xffff1d30> + 2ebc8: 003ff406 br 2eb9c <__muldf3+0x6b0> 2ebcc: 10c003cc andi r3,r2,15 2ebd0: 01000104 movi r4,4 - 2ebd4: 193ff626 beq r3,r4,2ebb0 <_gp+0xffff1d44> + 2ebd4: 193ff626 beq r3,r4,2ebb0 <__muldf3+0x6c4> 2ebd8: 0023883a mov r17,zero - 2ebdc: 003fd506 br 2eb34 <_gp+0xffff1cc8> + 2ebdc: 003fd506 br 2eb34 <__muldf3+0x648> 2ebe0: 0005883a mov r2,zero - 2ebe4: 003fe706 br 2eb84 <_gp+0xffff1d18> + 2ebe4: 003fe706 br 2eb84 <__muldf3+0x698> 2ebe8: 00800434 movhi r2,16 2ebec: 89400234 orhi r5,r17,8 2ebf0: 10bfffc4 addi r2,r2,-1 - 2ebf4: b02b883a mov r21,r22 + 2ebf4: b029883a mov r20,r22 2ebf8: 288a703a and r5,r5,r2 - 2ebfc: 4029883a mov r20,r8 - 2ec00: 003eff06 br 2e800 <_gp+0xffff1994> + 2ebfc: 4027883a mov r19,r8 + 2ec00: 003eff06 br 2e800 <__muldf3+0x314> 0002ec04 <__subdf3>: 2ec04: 02000434 movhi r8,16 @@ -17644,7 +17623,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2ed20: dec00504 addi sp,sp,20 2ed24: f800283a ret 2ed28: 0101ffc4 movi r4,2047 - 2ed2c: 813fd626 beq r16,r4,2ec88 <_gp+0xffff1e1c> + 2ed2c: 813fd626 beq r16,r4,2ec88 <__subdf3+0x84> 2ed30: 29402034 orhi r5,r5,128 2ed34: 01000e04 movi r4,56 2ed38: 2080a316 blt r4,r2,2efc8 <__subdf3+0x3c4> @@ -17696,13 +17675,13 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2edf0: 290ab03a or r5,r5,r4 2edf4: 28a2b03a or r17,r5,r2 2edf8: 0021883a mov r16,zero - 2edfc: 003fa206 br 2ec88 <_gp+0xffff1e1c> + 2edfc: 003fa206 br 2ec88 <__subdf3+0x84> 2ee00: 2090b03a or r8,r4,r2 2ee04: 40018e26 beq r8,zero,2f440 <__subdf3+0x83c> 2ee08: 1007883a mov r3,r2 2ee0c: 2023883a mov r17,r4 2ee10: 888001cc andi r2,r17,7 - 2ee14: 103f9e1e bne r2,zero,2ec90 <_gp+0xffff1e24> + 2ee14: 103f9e1e bne r2,zero,2ec90 <__subdf3+0x8c> 2ee18: 1804977a slli r2,r3,29 2ee1c: 8822d0fa srli r17,r17,3 2ee20: 1810d0fa srli r8,r3,3 @@ -17714,11 +17693,11 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2ee38: 297fffc4 addi r5,r5,-1 2ee3c: 80e0703a and r16,r16,r3 2ee40: 414a703a and r5,r8,r5 - 2ee44: 003fa806 br 2ece8 <_gp+0xffff1e7c> + 2ee44: 003fa806 br 2ece8 <__subdf3+0xe4> 2ee48: 0080630e bge zero,r2,2efd8 <__subdf3+0x3d4> 2ee4c: 48003026 beq r9,zero,2ef10 <__subdf3+0x30c> 2ee50: 0101ffc4 movi r4,2047 - 2ee54: 813f8c26 beq r16,r4,2ec88 <_gp+0xffff1e1c> + 2ee54: 813f8c26 beq r16,r4,2ec88 <__subdf3+0x84> 2ee58: 29402034 orhi r5,r5,128 2ee5c: 01000e04 movi r4,56 2ee60: 2080a90e bge r4,r2,2f108 <__subdf3+0x504> @@ -17745,18 +17724,18 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2eeb4: 1806d07a srli r3,r3,1 2eeb8: 1462b03a or r17,r2,r17 2eebc: 3825883a mov r18,r7 - 2eec0: 003f7106 br 2ec88 <_gp+0xffff1e1c> + 2eec0: 003f7106 br 2ec88 <__subdf3+0x84> 2eec4: 2984b03a or r2,r5,r6 - 2eec8: 103f6826 beq r2,zero,2ec6c <_gp+0xffff1e00> + 2eec8: 103f6826 beq r2,zero,2ec6c <__subdf3+0x68> 2eecc: 39c03fcc andi r7,r7,255 - 2eed0: 003f6706 br 2ec70 <_gp+0xffff1e04> + 2eed0: 003f6706 br 2ec70 <__subdf3+0x6c> 2eed4: 4086b03a or r3,r8,r2 2eed8: 18015226 beq r3,zero,2f424 <__subdf3+0x820> 2eedc: 00c00434 movhi r3,16 2eee0: 41400234 orhi r5,r8,8 2eee4: 18ffffc4 addi r3,r3,-1 2eee8: 28ca703a and r5,r5,r3 - 2eeec: 003f7e06 br 2ece8 <_gp+0xffff1e7c> + 2eeec: 003f7e06 br 2ece8 <__subdf3+0xe4> 2eef0: 10bfffc4 addi r2,r2,-1 2eef4: 1000491e bne r2,zero,2f01c <__subdf3+0x418> 2eef8: 898fc83a sub r7,r17,r6 @@ -17764,9 +17743,9 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2ef00: 1947c83a sub r3,r3,r5 2ef04: 1c47c83a sub r3,r3,r17 2ef08: 3823883a mov r17,r7 - 2ef0c: 003f9b06 br 2ed7c <_gp+0xffff1f10> + 2ef0c: 003f9b06 br 2ed7c <__subdf3+0x178> 2ef10: 2988b03a or r4,r5,r6 - 2ef14: 203f5c26 beq r4,zero,2ec88 <_gp+0xffff1e1c> + 2ef14: 203f5c26 beq r4,zero,2ec88 <__subdf3+0x84> 2ef18: 10bfffc4 addi r2,r2,-1 2ef1c: 1000931e bne r2,zero,2f16c <__subdf3+0x568> 2ef20: 898d883a add r6,r17,r6 @@ -17774,7 +17753,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2ef28: 1947883a add r3,r3,r5 2ef2c: 88c7883a add r3,r17,r3 2ef30: 3023883a mov r17,r6 - 2ef34: 003fd306 br 2ee84 <_gp+0xffff2018> + 2ef34: 003fd306 br 2ee84 <__subdf3+0x280> 2ef38: 1000541e bne r2,zero,2f08c <__subdf3+0x488> 2ef3c: 80800044 addi r2,r16,1 2ef40: 1081ffcc andi r2,r2,2047 @@ -17791,30 +17770,30 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2ef6c: 344d803a cmpltu r6,r6,r17 2ef70: 19a7c83a sub r19,r3,r6 2ef74: 3825883a mov r18,r7 - 2ef78: 983f861e bne r19,zero,2ed94 <_gp+0xffff1f28> + 2ef78: 983f861e bne r19,zero,2ed94 <__subdf3+0x190> 2ef7c: 8809883a mov r4,r17 2ef80: 002f7040 call 2f704 <__clzsi2> 2ef84: 10800804 addi r2,r2,32 2ef88: 113ffe04 addi r4,r2,-8 2ef8c: 00c007c4 movi r3,31 - 2ef90: 193f850e bge r3,r4,2eda8 <_gp+0xffff1f3c> + 2ef90: 193f850e bge r3,r4,2eda8 <__subdf3+0x1a4> 2ef94: 10bff604 addi r2,r2,-40 2ef98: 8884983a sll r2,r17,r2 2ef9c: 0023883a mov r17,zero - 2efa0: 243f880e bge r4,r16,2edc4 <_gp+0xffff1f58> + 2efa0: 243f880e bge r4,r16,2edc4 <__subdf3+0x1c0> 2efa4: 00ffe034 movhi r3,65408 2efa8: 18ffffc4 addi r3,r3,-1 2efac: 8121c83a sub r16,r16,r4 2efb0: 10c6703a and r3,r2,r3 - 2efb4: 003f3406 br 2ec88 <_gp+0xffff1e1c> + 2efb4: 003f3406 br 2ec88 <__subdf3+0x84> 2efb8: 9100004c andi r4,r18,1 2efbc: 000b883a mov r5,zero 2efc0: 0005883a mov r2,zero - 2efc4: 003f4806 br 2ece8 <_gp+0xffff1e7c> + 2efc4: 003f4806 br 2ece8 <__subdf3+0xe4> 2efc8: 298cb03a or r6,r5,r6 2efcc: 300cc03a cmpne r6,r6,zero 2efd0: 0005883a mov r2,zero - 2efd4: 003f6406 br 2ed68 <_gp+0xffff1efc> + 2efd4: 003f6406 br 2ed68 <__subdf3+0x164> 2efd8: 10009a1e bne r2,zero,2f244 <__subdf3+0x640> 2efdc: 82400044 addi r9,r16,1 2efe0: 4881ffcc andi r2,r9,2047 @@ -17831,10 +17810,10 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2f00c: 1806d07a srli r3,r3,1 2f010: 4821883a mov r16,r9 2f014: 89a2b03a or r17,r17,r6 - 2f018: 003f1b06 br 2ec88 <_gp+0xffff1e1c> + 2f018: 003f1b06 br 2ec88 <__subdf3+0x84> 2f01c: 0101ffc4 movi r4,2047 - 2f020: 813f441e bne r16,r4,2ed34 <_gp+0xffff1ec8> - 2f024: 003f1806 br 2ec88 <_gp+0xffff1e1c> + 2f020: 813f441e bne r16,r4,2ed34 <__subdf3+0x130> + 2f024: 003f1806 br 2ec88 <__subdf3+0x84> 2f028: 843ff844 addi r16,r16,-31 2f02c: 01400804 movi r5,32 2f030: 1408d83a srl r4,r2,r16 @@ -17847,7 +17826,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2f04c: 2462b03a or r17,r4,r17 2f050: 0007883a mov r3,zero 2f054: 0021883a mov r16,zero - 2f058: 003f6d06 br 2ee10 <_gp+0xffff1fa4> + 2f058: 003f6d06 br 2ee10 <__subdf3+0x20c> 2f05c: 11fff804 addi r7,r2,-32 2f060: 01000804 movi r4,32 2f064: 29ced83a srl r7,r5,r7 @@ -17859,7 +17838,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2f07c: 300cc03a cmpne r6,r6,zero 2f080: 398cb03a or r6,r7,r6 2f084: 0005883a mov r2,zero - 2f088: 003f3706 br 2ed68 <_gp+0xffff1efc> + 2f088: 003f3706 br 2ed68 <__subdf3+0x164> 2f08c: 80002a26 beq r16,zero,2f138 <__subdf3+0x534> 2f090: 0101ffc4 movi r4,2047 2f094: 49006626 beq r9,r4,2f230 <__subdf3+0x62c> @@ -17884,13 +17863,13 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2f0e0: 1187c83a sub r3,r2,r6 2f0e4: 4821883a mov r16,r9 2f0e8: 3825883a mov r18,r7 - 2f0ec: 003f2306 br 2ed7c <_gp+0xffff1f10> + 2f0ec: 003f2306 br 2ed7c <__subdf3+0x178> 2f0f0: 24d0b03a or r8,r4,r19 2f0f4: 40001b1e bne r8,zero,2f164 <__subdf3+0x560> 2f0f8: 0005883a mov r2,zero 2f0fc: 0009883a mov r4,zero 2f100: 0021883a mov r16,zero - 2f104: 003f4906 br 2ee2c <_gp+0xffff1fc0> + 2f104: 003f4906 br 2ee2c <__subdf3+0x228> 2f108: 010007c4 movi r4,31 2f10c: 20803a16 blt r4,r2,2f1f8 <__subdf3+0x5f4> 2f110: 01000804 movi r4,32 @@ -17902,7 +17881,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2f128: 4a12b03a or r9,r9,r8 2f12c: 2008c03a cmpne r4,r4,zero 2f130: 4912b03a or r9,r9,r4 - 2f134: 003f4e06 br 2ee70 <_gp+0xffff2004> + 2f134: 003f4e06 br 2ee70 <__subdf3+0x26c> 2f138: 1c48b03a or r4,r3,r17 2f13c: 20003c26 beq r4,zero,2f230 <__subdf3+0x62c> 2f140: 0084303a nor r2,zero,r2 @@ -17913,35 +17892,35 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2f154: 1187c83a sub r3,r2,r6 2f158: 4821883a mov r16,r9 2f15c: 3825883a mov r18,r7 - 2f160: 003f0606 br 2ed7c <_gp+0xffff1f10> + 2f160: 003f0606 br 2ed7c <__subdf3+0x178> 2f164: 2023883a mov r17,r4 - 2f168: 003f0906 br 2ed90 <_gp+0xffff1f24> + 2f168: 003f0906 br 2ed90 <__subdf3+0x18c> 2f16c: 0101ffc4 movi r4,2047 - 2f170: 813f3a1e bne r16,r4,2ee5c <_gp+0xffff1ff0> - 2f174: 003ec406 br 2ec88 <_gp+0xffff1e1c> + 2f170: 813f3a1e bne r16,r4,2ee5c <__subdf3+0x258> + 2f174: 003ec406 br 2ec88 <__subdf3+0x84> 2f178: 0005883a mov r2,zero - 2f17c: 003fb106 br 2f044 <_gp+0xffff21d8> + 2f17c: 003fb106 br 2f044 <__subdf3+0x440> 2f180: 0005883a mov r2,zero - 2f184: 003fbc06 br 2f078 <_gp+0xffff220c> + 2f184: 003fbc06 br 2f078 <__subdf3+0x474> 2f188: 1c44b03a or r2,r3,r17 2f18c: 80008e1e bne r16,zero,2f3c8 <__subdf3+0x7c4> 2f190: 1000c826 beq r2,zero,2f4b4 <__subdf3+0x8b0> 2f194: 2984b03a or r2,r5,r6 - 2f198: 103ebb26 beq r2,zero,2ec88 <_gp+0xffff1e1c> + 2f198: 103ebb26 beq r2,zero,2ec88 <__subdf3+0x84> 2f19c: 8989883a add r4,r17,r6 2f1a0: 1945883a add r2,r3,r5 2f1a4: 2447803a cmpltu r3,r4,r17 2f1a8: 1887883a add r3,r3,r2 2f1ac: 1880202c andhi r2,r3,128 2f1b0: 2023883a mov r17,r4 - 2f1b4: 103f1626 beq r2,zero,2ee10 <_gp+0xffff1fa4> + 2f1b4: 103f1626 beq r2,zero,2ee10 <__subdf3+0x20c> 2f1b8: 00bfe034 movhi r2,65408 2f1bc: 10bfffc4 addi r2,r2,-1 2f1c0: 5021883a mov r16,r10 2f1c4: 1886703a and r3,r3,r2 - 2f1c8: 003eaf06 br 2ec88 <_gp+0xffff1e1c> + 2f1c8: 003eaf06 br 2ec88 <__subdf3+0x84> 2f1cc: 3825883a mov r18,r7 - 2f1d0: 003f0f06 br 2ee10 <_gp+0xffff1fa4> + 2f1d0: 003f0f06 br 2ee10 <__subdf3+0x20c> 2f1d4: 1c44b03a or r2,r3,r17 2f1d8: 8000251e bne r16,zero,2f270 <__subdf3+0x66c> 2f1dc: 1000661e bne r2,zero,2f378 <__subdf3+0x774> @@ -17950,7 +17929,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2f1e8: 2807883a mov r3,r5 2f1ec: 3023883a mov r17,r6 2f1f0: 3825883a mov r18,r7 - 2f1f4: 003ea406 br 2ec88 <_gp+0xffff1e1c> + 2f1f4: 003ea406 br 2ec88 <__subdf3+0x84> 2f1f8: 127ff804 addi r9,r2,-32 2f1fc: 01000804 movi r4,32 2f200: 2a52d83a srl r9,r5,r9 @@ -17962,14 +17941,14 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2f218: 300cc03a cmpne r6,r6,zero 2f21c: 4992b03a or r9,r9,r6 2f220: 0005883a mov r2,zero - 2f224: 003f1206 br 2ee70 <_gp+0xffff2004> + 2f224: 003f1206 br 2ee70 <__subdf3+0x26c> 2f228: 0101ffc4 movi r4,2047 - 2f22c: 493f9c1e bne r9,r4,2f0a0 <_gp+0xffff2234> + 2f22c: 493f9c1e bne r9,r4,2f0a0 <__subdf3+0x49c> 2f230: 2807883a mov r3,r5 2f234: 3023883a mov r17,r6 2f238: 4821883a mov r16,r9 2f23c: 3825883a mov r18,r7 - 2f240: 003e9106 br 2ec88 <_gp+0xffff1e1c> + 2f240: 003e9106 br 2ec88 <__subdf3+0x84> 2f244: 80001f1e bne r16,zero,2f2c4 <__subdf3+0x6c0> 2f248: 1c48b03a or r4,r3,r17 2f24c: 20005a26 beq r4,zero,2f3b8 <__subdf3+0x7b4> @@ -17980,7 +17959,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2f260: 898d803a cmpltu r6,r17,r6 2f264: 3087883a add r3,r6,r2 2f268: 4821883a mov r16,r9 - 2f26c: 003f0506 br 2ee84 <_gp+0xffff2018> + 2f26c: 003f0506 br 2ee84 <__subdf3+0x280> 2f270: 10002b1e bne r2,zero,2f320 <__subdf3+0x71c> 2f274: 2984b03a or r2,r5,r6 2f278: 10008026 beq r2,zero,2f47c <__subdf3+0x878> @@ -17988,20 +17967,20 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2f280: 3023883a mov r17,r6 2f284: 3825883a mov r18,r7 2f288: 0401ffc4 movi r16,2047 - 2f28c: 003e7e06 br 2ec88 <_gp+0xffff1e1c> + 2f28c: 003e7e06 br 2ec88 <__subdf3+0x84> 2f290: 3809883a mov r4,r7 2f294: 0011883a mov r8,zero 2f298: 0005883a mov r2,zero - 2f29c: 003ee306 br 2ee2c <_gp+0xffff1fc0> + 2f29c: 003ee306 br 2ee2c <__subdf3+0x228> 2f2a0: 1c62b03a or r17,r3,r17 2f2a4: 8822c03a cmpne r17,r17,zero 2f2a8: 0005883a mov r2,zero - 2f2ac: 003f8906 br 2f0d4 <_gp+0xffff2268> + 2f2ac: 003f8906 br 2f0d4 <__subdf3+0x4d0> 2f2b0: 3809883a mov r4,r7 2f2b4: 4821883a mov r16,r9 2f2b8: 0011883a mov r8,zero 2f2bc: 0005883a mov r2,zero - 2f2c0: 003eda06 br 2ee2c <_gp+0xffff1fc0> + 2f2c0: 003eda06 br 2ee2c <__subdf3+0x228> 2f2c4: 0101ffc4 movi r4,2047 2f2c8: 49003b26 beq r9,r4,2f3b8 <__subdf3+0x7b4> 2f2cc: 0085c83a sub r2,zero,r2 @@ -18024,7 +18003,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2f310: 898d803a cmpltu r6,r17,r6 2f314: 3087883a add r3,r6,r2 2f318: 4821883a mov r16,r9 - 2f31c: 003ed906 br 2ee84 <_gp+0xffff2018> + 2f31c: 003ed906 br 2ee84 <__subdf3+0x280> 2f320: 2984b03a or r2,r5,r6 2f324: 10004226 beq r2,zero,2f430 <__subdf3+0x82c> 2f328: 1808d0fa srli r4,r3,3 @@ -18046,27 +18025,27 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2f368: 882290fa slli r17,r17,3 2f36c: 0401ffc4 movi r16,2047 2f370: 1906b03a or r3,r3,r4 - 2f374: 003e4406 br 2ec88 <_gp+0xffff1e1c> + 2f374: 003e4406 br 2ec88 <__subdf3+0x84> 2f378: 2984b03a or r2,r5,r6 - 2f37c: 103e4226 beq r2,zero,2ec88 <_gp+0xffff1e1c> + 2f37c: 103e4226 beq r2,zero,2ec88 <__subdf3+0x84> 2f380: 8989c83a sub r4,r17,r6 2f384: 8911803a cmpltu r8,r17,r4 2f388: 1945c83a sub r2,r3,r5 2f38c: 1205c83a sub r2,r2,r8 2f390: 1200202c andhi r8,r2,128 - 2f394: 403e9a26 beq r8,zero,2ee00 <_gp+0xffff1f94> + 2f394: 403e9a26 beq r8,zero,2ee00 <__subdf3+0x1fc> 2f398: 3463c83a sub r17,r6,r17 2f39c: 28c5c83a sub r2,r5,r3 2f3a0: 344d803a cmpltu r6,r6,r17 2f3a4: 1187c83a sub r3,r2,r6 2f3a8: 3825883a mov r18,r7 - 2f3ac: 003e3606 br 2ec88 <_gp+0xffff1e1c> + 2f3ac: 003e3606 br 2ec88 <__subdf3+0x84> 2f3b0: 0101ffc4 movi r4,2047 - 2f3b4: 493fc71e bne r9,r4,2f2d4 <_gp+0xffff2468> + 2f3b4: 493fc71e bne r9,r4,2f2d4 <__subdf3+0x6d0> 2f3b8: 2807883a mov r3,r5 2f3bc: 3023883a mov r17,r6 2f3c0: 4821883a mov r16,r9 - 2f3c4: 003e3006 br 2ec88 <_gp+0xffff1e1c> + 2f3c4: 003e3006 br 2ec88 <__subdf3+0x84> 2f3c8: 10003626 beq r2,zero,2f4a4 <__subdf3+0x8a0> 2f3cc: 2984b03a or r2,r5,r6 2f3d0: 10001726 beq r2,zero,2f430 <__subdf3+0x82c> @@ -18089,17 +18068,17 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2f414: 3825883a mov r18,r7 2f418: 1906b03a or r3,r3,r4 2f41c: 0401ffc4 movi r16,2047 - 2f420: 003e1906 br 2ec88 <_gp+0xffff1e1c> + 2f420: 003e1906 br 2ec88 <__subdf3+0x84> 2f424: 000b883a mov r5,zero 2f428: 0005883a mov r2,zero - 2f42c: 003e2e06 br 2ece8 <_gp+0xffff1e7c> + 2f42c: 003e2e06 br 2ece8 <__subdf3+0xe4> 2f430: 0401ffc4 movi r16,2047 - 2f434: 003e1406 br 2ec88 <_gp+0xffff1e1c> + 2f434: 003e1406 br 2ec88 <__subdf3+0x84> 2f438: 0005883a mov r2,zero - 2f43c: 003f7506 br 2f214 <_gp+0xffff23a8> + 2f43c: 003f7506 br 2f214 <__subdf3+0x610> 2f440: 0005883a mov r2,zero 2f444: 0009883a mov r4,zero - 2f448: 003e7806 br 2ee2c <_gp+0xffff1fc0> + 2f448: 003e7806 br 2ee2c <__subdf3+0x228> 2f44c: 123ff804 addi r8,r2,-32 2f450: 01000804 movi r4,32 2f454: 1a10d83a srl r8,r3,r8 @@ -18111,24 +18090,24 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2f46c: 1004c03a cmpne r2,r2,zero 2f470: 40a2b03a or r17,r8,r2 2f474: 0005883a mov r2,zero - 2f478: 003f1606 br 2f0d4 <_gp+0xffff2268> + 2f478: 003f1606 br 2f0d4 <__subdf3+0x4d0> 2f47c: 02000434 movhi r8,16 2f480: 0009883a mov r4,zero 2f484: 423fffc4 addi r8,r8,-1 2f488: 00bfffc4 movi r2,-1 2f48c: 0401ffc4 movi r16,2047 - 2f490: 003e6606 br 2ee2c <_gp+0xffff1fc0> + 2f490: 003e6606 br 2ee2c <__subdf3+0x228> 2f494: 1c62b03a or r17,r3,r17 2f498: 8822c03a cmpne r17,r17,zero 2f49c: 0005883a mov r2,zero - 2f4a0: 003f9906 br 2f308 <_gp+0xffff249c> + 2f4a0: 003f9906 br 2f308 <__subdf3+0x704> 2f4a4: 2807883a mov r3,r5 2f4a8: 3023883a mov r17,r6 2f4ac: 0401ffc4 movi r16,2047 - 2f4b0: 003df506 br 2ec88 <_gp+0xffff1e1c> + 2f4b0: 003df506 br 2ec88 <__subdf3+0x84> 2f4b4: 2807883a mov r3,r5 2f4b8: 3023883a mov r17,r6 - 2f4bc: 003df206 br 2ec88 <_gp+0xffff1e1c> + 2f4bc: 003df206 br 2ec88 <__subdf3+0x84> 2f4c0: 123ff804 addi r8,r2,-32 2f4c4: 01000804 movi r4,32 2f4c8: 1a10d83a srl r8,r3,r8 @@ -18140,11 +18119,11 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2f4e0: 1004c03a cmpne r2,r2,zero 2f4e4: 40a2b03a or r17,r8,r2 2f4e8: 0005883a mov r2,zero - 2f4ec: 003f8606 br 2f308 <_gp+0xffff249c> + 2f4ec: 003f8606 br 2f308 <__subdf3+0x704> 2f4f0: 0005883a mov r2,zero - 2f4f4: 003fdc06 br 2f468 <_gp+0xffff25fc> + 2f4f4: 003fdc06 br 2f468 <__subdf3+0x864> 2f4f8: 0005883a mov r2,zero - 2f4fc: 003ff706 br 2f4dc <_gp+0xffff2670> + 2f4fc: 003ff706 br 2f4dc <__subdf3+0x8d8> 0002f500 <__fixdfsi>: 2f500: 280cd53a srli r6,r5,20 @@ -18178,7 +18157,7 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2f570: 008104c4 movi r2,1043 2f574: 1185c83a sub r2,r2,r6 2f578: 1884d83a srl r2,r3,r2 - 2f57c: 003ff306 br 2f54c <_gp+0xffff26e0> + 2f57c: 003ff306 br 2f54c <__fixdfsi+0x4c> 0002f580 <__floatsidf>: 2f580: defffd04 addi sp,sp,-12 @@ -18228,14 +18207,14 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2f630: 2941ffcc andi r5,r5,2047 2f634: 1906703a and r3,r3,r4 2f638: 800d883a mov r6,r16 - 2f63c: 003fe906 br 2f5e4 <_gp+0xffff2778> + 2f63c: 003fe906 br 2f5e4 <__floatsidf+0x64> 2f640: 000d883a mov r6,zero 2f644: 000b883a mov r5,zero 2f648: 0007883a mov r3,zero 2f64c: 0005883a mov r2,zero - 2f650: 003fe406 br 2f5e4 <_gp+0xffff2778> + 2f650: 003fe406 br 2f5e4 <__floatsidf+0x64> 2f654: 0123c83a sub r17,zero,r4 - 2f658: 003fd106 br 2f5a0 <_gp+0xffff2734> + 2f658: 003fd106 br 2f5a0 <__floatsidf+0x20> 0002f65c <__floatunsidf>: 2f65c: defffe04 addi sp,sp,-8 @@ -18276,10 +18255,10 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2f6e8: 81a0983a sll r16,r16,r6 2f6ec: 2101ffcc andi r4,r4,2047 2f6f0: 28ca703a and r5,r5,r3 - 2f6f4: 003fed06 br 2f6ac <_gp+0xffff2840> + 2f6f4: 003fed06 br 2f6ac <__floatunsidf+0x50> 2f6f8: 0009883a mov r4,zero 2f6fc: 000b883a mov r5,zero - 2f700: 003fea06 br 2f6ac <_gp+0xffff2840> + 2f700: 003fea06 br 2f6ac <__floatunsidf+0x50> 0002f704 <__clzsi2>: 2f704: 00bfffd4 movui r2,65535 @@ -18303,10 +18282,10 @@ void QUEUE_Empty(QUEUE_STRUCT *pQueue){ 2f74c: f800283a ret 2f750: 00800604 movi r2,24 2f754: 00c00204 movi r3,8 - 2f758: 003ff606 br 2f734 <_gp+0xffff28c8> + 2f758: 003ff606 br 2f734 <__clzsi2+0x30> 2f75c: 00800404 movi r2,16 2f760: 1007883a mov r3,r2 - 2f764: 003ff306 br 2f734 <_gp+0xffff28c8> + 2f764: 003ff306 br 2f734 <__clzsi2+0x30> 0002f768 : #undef errno @@ -18848,7 +18827,7 @@ static void ALT_INLINE alt_load_section (alt_u32* from, while( to != end ) 2fc60: e0fffe17 ldw r3,-8(fp) 2fc64: e0bfff17 ldw r2,-4(fp) - 2fc68: 18bff51e bne r3,r2,2fc40 <_gp+0xffff2dd4> + 2fc68: 18bff51e bne r3,r2,2fc40 { *to++ = *from++; } @@ -19653,7 +19632,7 @@ void alt_tick (void) while (alarm != (alt_alarm*) &alt_alarm_list) 302c8: e0fffd17 ldw r3,-12(fp) 302cc: d0a01004 addi r2,gp,-32704 - 302d0: 18bfcf1e bne r3,r2,30210 <_gp+0xffff33a4> + 302d0: 18bfcf1e bne r3,r2,30210 /* * Update the operating system specific timer facilities. @@ -20251,7 +20230,7 @@ static void altera_avalon_jtag_uart_irq(void* context, alt_u32 id) /* Post an event to notify jtag_uart_read that a character has been read */ ALT_FLAG_POST (sp->events, ALT_JTAG_UART_READ_RDY, OS_FLAG_SET); } - 30830: 003fe206 br 307bc <_gp+0xffff3950> + 30830: 003fe206 br 307bc /* Check whether there is space in the buffer. If not then we must not * read any characters from the buffer as they will be lost. */ @@ -20306,7 +20285,7 @@ static void altera_avalon_jtag_uart_irq(void* context, alt_u32 id) if (control & ALTERA_AVALON_JTAG_UART_CONTROL_WI_MSK) 30888: e0bffd17 ldw r2,-12(fp) 3088c: 1080800c andi r2,r2,512 - 30890: 103fbe26 beq r2,zero,3078c <_gp+0xffff3920> + 30890: 103fbe26 beq r2,zero,3078c { /* process a write irq */ unsigned int space = (control & ALTERA_AVALON_JTAG_UART_CONTROL_WSPACE_MSK) >> ALTERA_AVALON_JTAG_UART_CONTROL_WSPACE_OFST; @@ -20357,7 +20336,7 @@ static void altera_avalon_jtag_uart_irq(void* context, alt_u32 id) 30900: 10c00d17 ldw r3,52(r2) 30904: e0bffb17 ldw r2,-20(fp) 30908: 10800c17 ldw r2,48(r2) - 3090c: 18bfe51e bne r3,r2,308a4 <_gp+0xffff3a38> + 3090c: 18bfe51e bne r3,r2,308a4 ALT_FLAG_POST (sp->events, ALT_JTAG_UART_WRITE_RDY, OS_FLAG_SET); space--; @@ -20365,7 +20344,7 @@ static void altera_avalon_jtag_uart_irq(void* context, alt_u32 id) if (space > 0) 30910: e0bffa17 ldw r2,-24(fp) - 30914: 103f9d26 beq r2,zero,3078c <_gp+0xffff3920> + 30914: 103f9d26 beq r2,zero,3078c { /* If we don't have any more data available then turn off the TX interrupt */ sp->irq_enable &= ~ALTERA_AVALON_JTAG_UART_CONTROL_WE_MSK; @@ -20392,7 +20371,7 @@ static void altera_avalon_jtag_uart_irq(void* context, alt_u32 id) } } } - 30958: 003f8c06 br 3078c <_gp+0xffff3920> + 30958: 003f8c06 br 3078c { unsigned int control = IORD_ALTERA_AVALON_JTAG_UART_CONTROL(base); @@ -20519,7 +20498,7 @@ int altera_avalon_jtag_uart_close(altera_avalon_jtag_uart_state* sp, int flags) 30a60: 10c00917 ldw r3,36(r2) 30a64: e0bffe17 ldw r2,-8(fp) 30a68: 10800117 ldw r2,4(r2) - 30a6c: 18bff136 bltu r3,r2,30a34 <_gp+0xffff3bc8> + 30a6c: 18bff136 bltu r3,r2,30a34 if (flags & O_NONBLOCK) { return -EWOULDBLOCK; } @@ -20749,7 +20728,7 @@ altera_avalon_jtag_uart_read(altera_avalon_jtag_uart_state* sp, } while (space > 0); 30c5c: e0bffe17 ldw r2,-8(fp) - 30c60: 00bfcf16 blt zero,r2,30ba0 <_gp+0xffff3d34> + 30c60: 00bfcf16 blt zero,r2,30ba0 30c64: 00000106 br 30c6c n = in - out; else @@ -20789,7 +20768,7 @@ altera_avalon_jtag_uart_read(altera_avalon_jtag_uart_state* sp, 30c9c: 10c00917 ldw r3,36(r2) 30ca0: e0bffc17 ldw r2,-16(fp) 30ca4: 10800117 ldw r2,4(r2) - 30ca8: 18bff736 bltu r3,r2,30c88 <_gp+0xffff3e1c> + 30ca8: 18bff736 bltu r3,r2,30c88 ; #endif /* __ucosii__ */ @@ -20805,7 +20784,7 @@ altera_avalon_jtag_uart_read(altera_avalon_jtag_uart_state* sp, while (space > 0) 30cbc: e0bffe17 ldw r2,-8(fp) - 30cc0: 00bfb716 blt zero,r2,30ba0 <_gp+0xffff3d34> + 30cc0: 00bfb716 blt zero,r2,30ba0 30cc4: 00000506 br 30cdc } while (space > 0); @@ -21027,7 +21006,7 @@ altera_avalon_jtag_uart_write(altera_avalon_jtag_uart_state* sp, /* Copy as much as we can into the transmit buffer */ while (count > 0) 30e9c: e0bffe17 ldw r2,-8(fp) - 30ea0: 00bfc716 blt zero,r2,30dc0 <_gp+0xffff3f54> + 30ea0: 00bfc716 blt zero,r2,30dc0 30ea4: 00000106 br 30eac n = ALTERA_AVALON_JTAG_UART_BUF_LEN - in; else @@ -21112,7 +21091,7 @@ static ALT_INLINE alt_irq_context ALT_ALWAYS_INLINE 30f38: 10c00917 ldw r3,36(r2) 30f3c: e0bffc17 ldw r2,-16(fp) 30f40: 10800117 ldw r2,4(r2) - 30f44: 18bff736 bltu r3,r2,30f24 <_gp+0xffff40b8> + 30f44: 18bff736 bltu r3,r2,30f24 ; #endif /* __ucosii__ */ @@ -21125,7 +21104,7 @@ static ALT_INLINE alt_irq_context ALT_ALWAYS_INLINE } while (count > 0); 30f54: e0bffe17 ldw r2,-8(fp) - 30f58: 00bfd016 blt zero,r2,30e9c <_gp+0xffff4030> + 30f58: 00bfd016 blt zero,r2,30e9c 30f5c: 00000306 br 30f6c */ /* consider: test whether there is anything there while doing this and delay for at most 2s. */ @@ -21553,7 +21532,7 @@ unsigned int alt_busy_sleep (unsigned int us) 31264: 00a00034 movhi r2,32768 31268: 10bfffc4 addi r2,r2,-1 3126c: 10bfffc4 addi r2,r2,-1 - 31270: 103ffe1e bne r2,zero,3126c <_gp+0xffff4400> + 31270: 103ffe1e bne r2,zero,3126c "\n\t.pushsection .debug_alt_sim_info" "\n\t.int 4, 0, 0b, 1b" "\n\t.popsection" @@ -21593,7 +21572,7 @@ unsigned int alt_busy_sleep (unsigned int us) 312bc: e0bffc15 stw r2,-16(fp) 312c0: e0fffc17 ldw r3,-16(fp) 312c4: e0bffe17 ldw r2,-8(fp) - 312c8: 18bfe616 blt r3,r2,31264 <_gp+0xffff43f8> + 312c8: 18bfe616 blt r3,r2,31264 "\n\tbne %0,zero,0b" "\n1:" "\n\t.pushsection .debug_alt_sim_info" @@ -21618,7 +21597,7 @@ unsigned int alt_busy_sleep (unsigned int us) */ __asm__ volatile ( 312f8: 10bfffc4 addi r2,r2,-1 - 312fc: 103ffe1e bne r2,zero,312f8 <_gp+0xffff448c> + 312fc: 103ffe1e bne r2,zero,312f8 31300: 00000d06 br 31338 "\n\tbgt %0,zero,0b" "\n1:" @@ -21644,7 +21623,7 @@ unsigned int alt_busy_sleep (unsigned int us) */ __asm__ volatile ( 31330: 10bfffc4 addi r2,r2,-1 - 31334: 00bffe16 blt zero,r2,31330 <_gp+0xffff44c4> + 31334: 00bffe16 blt zero,r2,31330 "\n\t.int 4, 0, 0b, 1b" "\n\t.popsection" :: "r" (us*(ALT_CPU_FREQ/(cycles_per_loop * 1000000)))); @@ -21690,7 +21669,7 @@ void alt_dcache_flush_all (void) 31374: e0bfff15 stw r2,-4(fp) 31378: e0bfff17 ldw r2,-4(fp) 3137c: 10820030 cmpltui r2,r2,2048 - 31380: 103ff81e bne r2,zero,31364 <_gp+0xffff44f8> + 31380: 103ff81e bne r2,zero,31364 { __asm__ volatile ("flushd (%0)" :: "r" (i)); } @@ -21842,7 +21821,7 @@ void _do_ctors(void) 314c4: e0ffff17 ldw r3,-4(fp) 314c8: 008000f4 movhi r2,3 314cc: 1088d004 addi r2,r2,9024 - 314d0: 18bff62e bgeu r3,r2,314ac <_gp+0xffff4640> + 314d0: 18bff62e bgeu r3,r2,314ac <_do_ctors+0x20> (*ctor) (); } 314d4: 0001883a nop @@ -21886,7 +21865,7 @@ void _do_dtors(void) 31524: e0ffff17 ldw r3,-4(fp) 31528: 008000f4 movhi r2,3 3152c: 1088d004 addi r2,r2,9024 - 31530: 18bff62e bgeu r3,r2,3150c <_gp+0xffff46a0> + 31530: 18bff62e bgeu r3,r2,3150c <_do_dtors+0x20> (*dtor) (); } 31534: 0001883a nop @@ -22484,7 +22463,7 @@ static int alt_file_locked (alt_fd* fd) 31a88: 10800017 ldw r2,0(r2) 31a8c: 1007883a mov r3,r2 31a90: e0bffe17 ldw r2,-8(fp) - 31a94: 18bfdd2e bgeu r3,r2,31a0c <_gp+0xffff4ba0> + 31a94: 18bfdd2e bgeu r3,r2,31a0c } } @@ -22737,7 +22716,7 @@ alt_dev* alt_find_dev(const char* name, alt_llist* llist) while (next != (alt_dev*) llist) 31c94: e0fffc17 ldw r3,-16(fp) 31c98: e0bfff17 ldw r2,-4(fp) - 31c9c: 18bff01e bne r3,r2,31c60 <_gp+0xffff4df4> + 31c9c: 18bff01e bne r3,r2,31c60 next = (alt_dev*) next->llist.next; } @@ -22857,7 +22836,7 @@ alt_dev* alt_find_file (const char* name) 31da4: e0fffd17 ldw r3,-12(fp) 31da8: 008000f4 movhi r2,3 31dac: 1093a404 addi r2,r2,20112 - 31db0: 18bfcb1e bne r3,r2,31ce0 <_gp+0xffff4e74> + 31db0: 18bfcb1e bne r3,r2,31ce0 next = (alt_dev*) next->llist.next; } @@ -22942,7 +22921,7 @@ int alt_get_fd (alt_dev* dev) 31e5c: e0bffd15 stw r2,-12(fp) 31e60: e0bffd17 ldw r2,-12(fp) 31e64: 10800810 cmplti r2,r2,32 - 31e68: 103fe01e bne r2,zero,31dec <_gp+0xffff4f80> + 31e68: 103fe01e bne r2,zero,31dec * file descriptor pool. */ @@ -23008,7 +22987,7 @@ void alt_icache_flush (void* start, alt_u32 len) 31ed4: e0bffc15 stw r2,-16(fp) 31ed8: e0fffc17 ldw r3,-16(fp) 31edc: e0bffd17 ldw r2,-12(fp) - 31ee0: 18bff836 bltu r3,r2,31ec4 <_gp+0xffff5058> + 31ee0: 18bff836 bltu r3,r2,31ec4 * For an unaligned flush request, we've got one more line left. * Note that this is dependent on NIOS2_ICACHE_LINE_SIZE to be a * multiple of 2 (which it always is). @@ -23142,18 +23121,18 @@ alt_exception_cause_generated_bad_addr(alt_exception_cause cause) 32030: 10c00e1e bne r2,r3,3206c 32034: 21000044 addi r4,r4,1 32038: 29400044 addi r5,r5,1 - 3203c: 31fff91e bne r6,r7,32024 <_gp+0xffff51b8> + 3203c: 31fff91e bne r6,r7,32024 32040: 0005883a mov r2,zero 32044: f800283a ret 32048: 20c00017 ldw r3,0(r4) 3204c: 28800017 ldw r2,0(r5) - 32050: 18bfee1e bne r3,r2,3200c <_gp+0xffff51a0> + 32050: 18bfee1e bne r3,r2,3200c 32054: 31bfff04 addi r6,r6,-4 32058: 21000104 addi r4,r4,4 3205c: 29400104 addi r5,r5,4 - 32060: 39bff936 bltu r7,r6,32048 <_gp+0xffff51dc> - 32064: 303fe91e bne r6,zero,3200c <_gp+0xffff51a0> - 32068: 003ff506 br 32040 <_gp+0xffff51d4> + 32060: 39bff936 bltu r7,r6,32048 + 32064: 303fe91e bne r6,zero,3200c + 32068: 003ff506 br 32040 3206c: 10c5c83a sub r2,r2,r3 32070: f800283a ret @@ -23206,7 +23185,7 @@ alt_exception_cause_generated_bad_addr(alt_exception_cause cause) 32128: 20805215 stw r2,328(r4) 3212c: 10006215 stw zero,392(r2) 32130: 10006315 stw zero,396(r2) - 32134: 883fde26 beq r17,zero,320b0 <_gp+0xffff5244> + 32134: 883fde26 beq r17,zero,320b0 <__register_exitproc+0x3c> 32138: 18c9883a add r4,r3,r3 3213c: 2109883a add r4,r4,r4 32140: 1109883a add r4,r2,r4 @@ -23218,16 +23197,16 @@ alt_exception_cause_generated_bad_addr(alt_exception_cause cause) 32158: 12406215 stw r9,392(r2) 3215c: 21c04215 stw r7,264(r4) 32160: 01000084 movi r4,2 - 32164: 893fd21e bne r17,r4,320b0 <_gp+0xffff5244> + 32164: 893fd21e bne r17,r4,320b0 <__register_exitproc+0x3c> 32168: 11006317 ldw r4,396(r2) 3216c: 218cb03a or r6,r4,r6 32170: 11806315 stw r6,396(r2) - 32174: 003fce06 br 320b0 <_gp+0xffff5244> + 32174: 003fce06 br 320b0 <__register_exitproc+0x3c> 32178: 18805304 addi r2,r3,332 3217c: 18805215 stw r2,328(r3) - 32180: 003fc606 br 3209c <_gp+0xffff5230> + 32180: 003fc606 br 3209c <__register_exitproc+0x28> 32184: 00bfffc4 movi r2,-1 - 32188: 003fd006 br 320cc <_gp+0xffff5260> + 32188: 003fd006 br 320cc <__register_exitproc+0x58> 0003218c <__call_exitprocs>: 3218c: defff504 addi sp,sp,-44 @@ -23266,7 +23245,7 @@ alt_exception_cause_generated_bad_addr(alt_exception_cause cause) 32210: bdffffc4 addi r23,r23,-1 32214: 843fff04 addi r16,r16,-4 32218: 8c7fff04 addi r17,r17,-4 - 3221c: bd7ff91e bne r23,r21,32204 <_gp+0xffff5398> + 3221c: bd7ff91e bne r23,r21,32204 <__call_exitprocs+0x78> 32220: 008000b4 movhi r2,2 32224: 108afa04 addi r2,r2,11240 32228: 10000926 beq r2,zero,32250 <__call_exitprocs+0xc4> @@ -23278,7 +23257,7 @@ alt_exception_cause_generated_bad_addr(alt_exception_cause cause) 32240: 98800015 stw r2,0(r19) 32244: 0022be80 call 22be8 32248: 9d000017 ldw r20,0(r19) - 3224c: a03fe41e bne r20,zero,321e0 <_gp+0xffff5374> + 3224c: a03fe41e bne r20,zero,321e0 <__call_exitprocs+0x54> 32250: dfc00a17 ldw ra,40(sp) 32254: df000917 ldw fp,36(sp) 32258: ddc00817 ldw r23,32(sp) @@ -23296,7 +23275,7 @@ alt_exception_cause_generated_bad_addr(alt_exception_cause cause) 32288: 10bfffc4 addi r2,r2,-1 3228c: 15c01426 beq r2,r23,322e0 <__call_exitprocs+0x154> 32290: 80000015 stw zero,0(r16) - 32294: 183fde26 beq r3,zero,32210 <_gp+0xffff53a4> + 32294: 183fde26 beq r3,zero,32210 <__call_exitprocs+0x84> 32298: 95c8983a sll r4,r18,r23 3229c: a0806217 ldw r2,392(r20) 322a0: a5800117 ldw r22,4(r20) @@ -23309,23 +23288,23 @@ alt_exception_cause_generated_bad_addr(alt_exception_cause cause) 322bc: d9000017 ldw r4,0(sp) 322c0: 183ee83a callr r3 322c4: a0800117 ldw r2,4(r20) - 322c8: 15bfbf1e bne r2,r22,321c8 <_gp+0xffff535c> + 322c8: 15bfbf1e bne r2,r22,321c8 <__call_exitprocs+0x3c> 322cc: 98800017 ldw r2,0(r19) - 322d0: 153fcf26 beq r2,r20,32210 <_gp+0xffff53a4> - 322d4: 003fbc06 br 321c8 <_gp+0xffff535c> + 322d0: 153fcf26 beq r2,r20,32210 <__call_exitprocs+0x84> + 322d4: 003fbc06 br 321c8 <__call_exitprocs+0x3c> 322d8: 183ee83a callr r3 - 322dc: 003ff906 br 322c4 <_gp+0xffff5458> + 322dc: 003ff906 br 322c4 <__call_exitprocs+0x138> 322e0: a5c00115 stw r23,4(r20) - 322e4: 003feb06 br 32294 <_gp+0xffff5428> + 322e4: 003feb06 br 32294 <__call_exitprocs+0x108> 322e8: 89000017 ldw r4,0(r17) 322ec: 183ee83a callr r3 - 322f0: 003ff406 br 322c4 <_gp+0xffff5458> + 322f0: 003ff406 br 322c4 <__call_exitprocs+0x138> 322f4: a0800017 ldw r2,0(r20) 322f8: a027883a mov r19,r20 322fc: 1029883a mov r20,r2 - 32300: 003fb606 br 321dc <_gp+0xffff5370> + 32300: 003fb606 br 321dc <__call_exitprocs+0x50> 32304: 0005883a mov r2,zero - 32308: 003ffb06 br 322f8 <_gp+0xffff548c> + 32308: 003ffb06 br 322f8 <__call_exitprocs+0x16c> 0003230c <_exit>: * @@ -23373,4 +23352,4 @@ static ALT_INLINE ALT_ALWAYS_INLINE void alt_sim_halt(int exit_code) ALT_LOG_PRINT_BOOT("[alt_exit.c] Spinning forever.\r\n"); while (1); - 3233c: 003fff06 br 3233c <_gp+0xffff54d0> + 3233c: 003fff06 br 3233c <_exit+0x30> diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/main.c b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/main.c index bfe2481..c0b3e26 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/main.c +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/main.c @@ -1,10 +1,9 @@ - - #include #include "I2C_core.h" #include "terasic_includes.h" #include "mipi_camera_config.h" #include "mipi_bridge_config.h" +#include "system.h" #include "auto_focus.h" @@ -82,82 +81,56 @@ void mipi_show_error_info_more(void){ printf("CSIPktLen = %d\n",MipiBridgeRegRead(0x006E)); } - - bool MIPI_Init(void){ bool bSuccess; - - bSuccess = oc_i2c_init_ex(I2C_OPENCORES_MIPI_BASE, 50*1000*1000,400*1000); //I2C: 400K if (!bSuccess) printf("failed to init MIPI- Bridge i2c\r\n"); - usleep(50*1000); MipiBridgeInit(); - usleep(500*1000); - // bSuccess = oc_i2c_init_ex(I2C_OPENCORES_CAMERA_BASE, 50*1000*1000,400*1000); //I2C: 400K // if (!bSuccess) // printf("failed to init MIPI- Camera i2c\r\n"); - MipiCameraInit(); MIPI_BIN_LEVEL(DEFAULT_LEVEL); // OV8865_FOCUS_Move_to(340); - // oc_i2c_uninit(I2C_OPENCORES_CAMERA_BASE); // Release I2C bus , due to two I2C master shared! - - usleep(1000); - - // oc_i2c_uninit(I2C_OPENCORES_MIPI_BASE); - return bSuccess; } - - - int main() { - fcntl(STDIN_FILENO, F_SETFL, O_NONBLOCK); + printf("DE10-LITE D8M VGA Demo\n"); + printf("Imperial College EEE2 Project version\n"); + IOWR(MIPI_PWDN_N_BASE, 0x00, 0x00); + IOWR(MIPI_RESET_N_BASE, 0x00, 0x00); + usleep(2000); + IOWR(MIPI_PWDN_N_BASE, 0x00, 0xFF); + usleep(2000); + IOWR(MIPI_RESET_N_BASE, 0x00, 0xFF); + printf("Image Processor ID: %x\n",IORD(EEE_IMGPROC_0_BASE,EEE_IMGPROC_ID)); + usleep(2000); - printf("DE10-LITE D8M VGA Demo\n"); - printf("Imperial College EEE2 Project version\n"); - IOWR(MIPI_PWDN_N_BASE, 0x00, 0x00); - IOWR(MIPI_RESET_N_BASE, 0x00, 0x00); - - usleep(2000); - IOWR(MIPI_PWDN_N_BASE, 0x00, 0xFF); - usleep(2000); - IOWR(MIPI_RESET_N_BASE, 0x00, 0xFF); - - printf("Image Processor ID: %x\n",IORD(0x42000,EEE_IMGPROC_ID)); - //printf("Image Processor ID: %x\n",IORD(EEE_IMGPROC_0_BASE,EEE_IMGPROC_ID)); //Don't know why this doesn't work - definition is in system.h in BSP - - - usleep(2000); - - - // MIPI Init - if (!MIPI_Init()){ - printf("MIPI_Init Init failed!\r\n"); - }else{ - printf("MIPI_Init Init successfully!\r\n"); - } - -// while(1){ - mipi_clear_error(); - usleep(50*1000); - mipi_clear_error(); - usleep(1000*1000); - mipi_show_error_info(); -// mipi_show_error_info_more(); - printf("\n"); -// } + // MIPI Init + if (!MIPI_Init()){ + printf("MIPI_Init Init failed!\r\n"); + }else{ + printf("MIPI_Init Init successfully!\r\n"); + } + // while(1){ + mipi_clear_error(); + usleep(50*1000); + mipi_clear_error(); + usleep(1000*1000); + mipi_show_error_info(); + // mipi_show_error_info_more(); + printf("\n"); + // } #if 0 // focus sweep printf("\nFocus sweep\n"); @@ -171,16 +144,11 @@ int main() else ii -= 20; printf("%d\n",ii); - OV8865_FOCUS_Move_to(ii); - usleep(50*1000); + OV8865_FOCUS_Move_to(ii); + usleep(50*1000); } #endif - - - - - ////////////////////////////////////////////////////////// alt_u16 bin_level = DEFAULT_LEVEL; alt_u8 manual_focus_step = 10; diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/.cproject b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/.cproject index 601cc56..33b8c17 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/.cproject +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/.cproject @@ -1,37 +1,44 @@ - - + + - + - - - - - - - + + + + + + + - - + + - - - - + + + + + + + + + + - + + @@ -40,16 +47,16 @@ - + - + - + diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/.settings/language.settings.xml b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/.settings/language.settings.xml index 5734959..06daa80 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/.settings/language.settings.xml +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/.settings/language.settings.xml @@ -1,8 +1,8 @@ - + - + diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/HAL/inc/sys/alt_log_printf.h b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/HAL/inc/sys/alt_log_printf.h index 8c9a8c4..c15ca05 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/HAL/inc/sys/alt_log_printf.h +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/HAL/inc/sys/alt_log_printf.h @@ -244,12 +244,7 @@ void alt_log_write(const void *ptr, size_t len); /* extern all global variables */ - /* CASE:368514 - The boot message flag is linked into the sdata section - * because if it is zero, it would otherwise be placed in the bss section. - * alt_log examines this variable before the BSS is cleared in the boot-up - * process. - */ - extern volatile alt_u32 alt_log_boot_on_flag __attribute__ ((section (".sdata"))); + extern volatile alt_u32 alt_log_boot_on_flag; extern volatile alt_u8 alt_log_write_on_flag; extern volatile alt_u8 alt_log_sys_clk_on_flag; extern volatile alt_u8 alt_log_jtag_uart_alarm_on_flag; diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/HAL/src/alt_load.c b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/HAL/src/alt_load.c index de0abe1..644fdb4 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/HAL/src/alt_load.c +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/HAL/src/alt_load.c @@ -35,28 +35,17 @@ /* * Linker defined symbols. - These used to be - * extern alt_u32 __flash_rwdata_start; - * extern alt_u32 __ram_rwdata_start; - * extern alt_u32 __ram_rwdata_end; - * but that results in a fatal error when compiling -mgpopt=global - * because gcc assumes they are normal C variables in .sdata - * and therefore addressable from gp using a 16-bit offset, - * when in fact they are special values defined by linker.x - * and located nowhere near .sdata. - * Specifying __attribute__((section(".data"))) will force these - * in .data. (CASE:258384.) */ -extern alt_u32 __flash_rwdata_start __attribute__((section(".data"))); -extern alt_u32 __ram_rwdata_start __attribute__((section(".data"))); -extern alt_u32 __ram_rwdata_end __attribute__((section(".data"))); -extern alt_u32 __flash_rodata_start __attribute__((section(".data"))); -extern alt_u32 __ram_rodata_start __attribute__((section(".data"))); -extern alt_u32 __ram_rodata_end __attribute__((section(".data"))); -extern alt_u32 __flash_exceptions_start __attribute__((section(".data"))); -extern alt_u32 __ram_exceptions_start __attribute__((section(".data"))); -extern alt_u32 __ram_exceptions_end __attribute__((section(".data"))); +extern alt_u32 __flash_rwdata_start; +extern alt_u32 __ram_rwdata_start; +extern alt_u32 __ram_rwdata_end; +extern alt_u32 __flash_rodata_start; +extern alt_u32 __ram_rodata_start; +extern alt_u32 __ram_rodata_end; +extern alt_u32 __flash_exceptions_start; +extern alt_u32 __ram_exceptions_start; +extern alt_u32 __ram_exceptions_end; /* * alt_load() is called when the code is executing from flash. In this case diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/HAL/src/alt_log_printf.c b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/HAL/src/alt_log_printf.c index 67d63fd..1f7056d 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/HAL/src/alt_log_printf.c +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/HAL/src/alt_log_printf.c @@ -52,13 +52,13 @@ char alt_log_write_buf[ALT_LOG_WRITE_ECHO_LEN+2]; /* global variables for all 'on' flags */ /* - * CASE:368514 - The boot message flag is linked into the sdata section + * The boot message flag is linked into the data (rwdata) section * because if it is zero, it would otherwise be placed in the bss section. * alt_log examines this variable before the BSS is cleared in the boot-up * process. */ volatile alt_u32 alt_log_boot_on_flag \ - __attribute__ ((section (".sdata"))) = ALT_LOG_BOOT_ON_FLAG_SETTING; + __attribute__ ((section (".data"))) = ALT_LOG_BOOT_ON_FLAG_SETTING; volatile alt_u8 alt_log_write_on_flag = ALT_LOG_WRITE_ON_FLAG_SETTING; diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/Makefile b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/Makefile index 462f36a..3f9282b 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/Makefile +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/Makefile @@ -93,12 +93,12 @@ OBJ_DIR := ./obj # This following VERSION comment indicates the version of the tool used to # generate this makefile. A makefile variable is provided for VERSION as well. -# ACDS_VERSION: 16.1 -ACDS_VERSION := 16.1 +# ACDS_VERSION: 16.0 +ACDS_VERSION := 16.0 # This following BUILD_NUMBER comment indicates the build number of the tool # used to generate this makefile. -# BUILD_NUMBER: 196 +# BUILD_NUMBER: 222 SETTINGS_FILE := settings.bsp SOPC_FILE := ../../Qsys.sopcinfo @@ -147,6 +147,17 @@ BSP_CFLAGS_WARNINGS = -Wall # C compiler command. CC = nios2-elf-gcc -xc +# C/C++ compiler to generate (do not generate) GP-relative accesses. 'none' +# tells the compilter not to generate GP-relative accesses. 'local' will +# generate GP-relative accesses for small data objects that are not external, +# weak, or uninitialized common symbols. Also use GP-relative addressing for +# objects that have been explicitly placed in a small data section via a +# section attribute. provides the default set of debug symbols typically +# required to debug a typical application. 'global' is same as 'local' but also +# generate GP-relative accesses for small data objects that are external, weak, +# or common. +CFLAGS_MGPOPT = -mgpopt=local + # C++ compiler command. CXX = nios2-elf-gcc -xc++ @@ -393,6 +404,7 @@ BSP_CFLAGS += \ $(BSP_CFLAGS_DEBUG) \ $(BSP_CFLAGS_WARNINGS) \ $(BSP_CFLAGS_USER_FLAGS) \ + $(CFLAGS_MGPOPT) \ $(ALT_CFLAGS) \ $(CFLAGS) diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/mem_init.mk b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/mem_init.mk index 91d14b0..770118e 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/mem_init.mk +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/mem_init.mk @@ -150,12 +150,12 @@ flash2dat_extra_args = $(mem_pad_flag) $(mem_reloc_input_flag) # This following VERSION comment indicates the version of the tool used to # generate this makefile. A makefile variable is provided for VERSION as well. -# ACDS_VERSION: 16.1 -ACDS_VERSION := 16.1 +# ACDS_VERSION: 16.0 +ACDS_VERSION := 16.0 # This following BUILD_NUMBER comment indicates the build number of the tool # used to generate this makefile. -# BUILD_NUMBER: 196 +# BUILD_NUMBER: 222 # Optimize for simulation SIM_OPTIMIZE ?= 0 diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/public.mk b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/public.mk index 67debcf..9d9d24b 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/public.mk +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/public.mk @@ -77,12 +77,12 @@ ALT_CPPFLAGS += -pipe # This following VERSION comment indicates the version of the tool used to # generate this makefile. A makefile variable is provided for VERSION as well. -# ACDS_VERSION: 16.1 -ACDS_VERSION := 16.1 +# ACDS_VERSION: 16.0 +ACDS_VERSION := 16.0 # This following BUILD_NUMBER comment indicates the build number of the tool # used to generate this makefile. -# BUILD_NUMBER: 196 +# BUILD_NUMBER: 222 # Qsys--generated SOPCINFO file. Required for resolving node instance ID's with # design component names. @@ -157,9 +157,9 @@ SOPC_SYSID_FLAG += --sidp=0x410e0 ELF_PATCH_FLAG += --sidp 0x410e0 # The SOPC Timestamp -# setting SOPC_TIMESTAMP is 1621008007 -SOPC_SYSID_FLAG += --timestamp=1621008007 -ELF_PATCH_FLAG += --timestamp 1621008007 +# setting SOPC_TIMESTAMP is 1622558600 +SOPC_SYSID_FLAG += --timestamp=1622558600 +ELF_PATCH_FLAG += --timestamp 1622558600 # Enable JTAG UART driver to recover when host is inactive causing buffer to # full without returning error. Printf will not fail with this recovery. none @@ -256,18 +256,6 @@ ALT_CPPFLAGS += -DALT_NO_INSTRUCTION_EMULATION # SOPC_SYSID_FLAG in public.mk. none # setting hal.enable_sopc_sysid_check is true -# C/C++ compiler to generate (do not generate) GP-relative accesses. 'none' -# tells the compilter not to generate GP-relative accesses. 'local' will -# generate GP-relative accesses for small data objects that are not external, -# weak, or uninitialized common symbols. Also use GP-relative addressing for -# objects that have been explicitly placed in a small data section via a -# section attribute. provides the default set of debug symbols typically -# required to debug a typical application. 'global' is same as 'local' but also -# generate GP-relative accesses for small data objects that are external, weak, -# or common. none -# setting hal.make.cflags_mgpopt is -mgpopt=local -ALT_CFLAGS += -mgpopt=local - # Enable BSP generation to query if SOPC system is big endian. If true ignores # export of 'ALT_CFLAGS += -meb' to public.mk if big endian system. none # setting hal.make.ignore_system_derived.big_endian is false diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/settings.bsp b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/settings.bsp index 44e0a15..9da8033 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/settings.bsp +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/settings.bsp @@ -2,11 +2,11 @@ hal default - 14-May-2021 21:40:25 - 1621024825749 - F:\Ed\Stuff\EEE2Rover\DE10_LITE_D8M_VIP_16\software\D8M_Camera_Test_bsp + Jun 1, 2021 3:52:17 PM + 1622559138001 + /home/ad3919/nfshome/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp settings.bsp - ..\..\Qsys.sopcinfo + ../../Qsys.sopcinfo default nios2_gen2 1.9 @@ -322,6 +322,18 @@ false common + + hal.make.cflags_mgpopt + CFLAGS_MGPOPT + UnquotedString + -mgpopt=local + -mgpopt=local + makefile_variable + C/C++ compiler to generate (do not generate) GP-relative accesses. 'none' tells the compilter not to generate GP-relative accesses. 'local' will generate GP-relative accesses for small data objects that are not external, weak, or uninitialized common symbols. Also use GP-relative addressing for objects that have been explicitly placed in a small data section via a section attribute. provides the default set of debug symbols typically required to debug a typical application. 'global' is same as 'local' but also generate GP-relative accesses for small data objects that are external, weak, or common. + none + false + common + hal.make.ar AR @@ -538,18 +550,6 @@ false none - - hal.make.cflags_mgpopt - CFLAGS_MGPOPT - UnquotedString - -mgpopt=local - -mgpopt=global - public_mk_define - C/C++ compiler to generate (do not generate) GP-relative accesses. 'none' tells the compilter not to generate GP-relative accesses. 'local' will generate GP-relative accesses for small data objects that are not external, weak, or uninitialized common symbols. Also use GP-relative addressing for objects that have been explicitly placed in a small data section via a section attribute. provides the default set of debug symbols typically required to debug a typical application. 'global' is same as 'local' but also generate GP-relative accesses for small data objects that are external, weak, or common. - none - false - common - hal.make.ignore_system_derived.sopc_system_id none diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/summary.html b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/summary.html index bc960e9..8a08e02 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/summary.html +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/summary.html @@ -7,7 +7,7 @@ BSP Type:hal -SOPC Design File:..\..\Qsys.sopcinfo +SOPC Design File:../../Qsys.sopcinfo Quartus JDI File:default @@ -22,13 +22,13 @@ BSP Version:default -BSP Generated On:14-May-2021 21:40:25 +BSP Generated On:Jun 1, 2021 3:52:17 PM -BSP Generated Timestamp:1621024825749 +BSP Generated Timestamp:1622559138001 -BSP Generated Location:F:\Ed\Stuff\EEE2Rover\DE10_LITE_D8M_VIP_16\software\D8M_Camera_Test_bsp +BSP Generated Location:/home/ad3919/nfshome/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp
    @@ -1446,7 +1446,7 @@ Identifier:CFLAGS_MGPOPT -Default Value:-mgpopt=global +Default Value:-mgpopt=local Value:-mgpopt=local @@ -1455,7 +1455,7 @@ Type:UnquotedString -Destination:public_mk_define +Destination:makefile_variable Description:C/C++ compiler to generate (do not generate) GP-relative accesses. 'none' tells the compilter not to generate GP-relative accesses. 'local' will generate GP-relative accesses for small data objects that are not external, weak, or uninitialized common symbols. Also use GP-relative addressing for objects that have been explicitly placed in a small data section via a section attribute. provides the default set of debug symbols typically required to debug a typical application. 'global' is same as 'local' but also generate GP-relative accesses for small data objects that are external, weak, or common. diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/system.h b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/system.h index d00394e..30290a1 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/system.h +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/system.h @@ -4,7 +4,7 @@ * Machine generated for CPU 'nios2_gen2' in SOPC Builder design 'Qsys' * SOPC Builder design path: ../../Qsys.sopcinfo * - * Generated: Fri May 14 17:18:20 BST 2021 + * Generated: Tue Jun 01 15:52:19 BST 2021 */ /* @@ -464,7 +464,7 @@ #define SYSID_QSYS_IRQ_INTERRUPT_CONTROLLER_ID -1 #define SYSID_QSYS_NAME "/dev/sysid_qsys" #define SYSID_QSYS_SPAN 8 -#define SYSID_QSYS_TIMESTAMP 1621008007 +#define SYSID_QSYS_TIMESTAMP 1622558600 #define SYSID_QSYS_TYPE "altera_avalon_sysid_qsys" From 084959db0e2ca27d17845b06744da1987ae6a6a6 Mon Sep 17 00:00:00 2001 From: Aadi Desai <21363892+supleed2@users.noreply.github.com> Date: Wed, 2 Jun 2021 18:50:54 +0100 Subject: [PATCH 02/32] Add temp file to migrate to main.cpp --- Control/platformio.ini | 7 +- Control/src/temp.cpp | 447 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 453 insertions(+), 1 deletion(-) create mode 100644 Control/src/temp.cpp diff --git a/Control/platformio.ini b/Control/platformio.ini index 1f6cf0c..7daf920 100644 --- a/Control/platformio.ini +++ b/Control/platformio.ini @@ -15,4 +15,9 @@ framework = arduino monitor_speed = 115200 upload_port = COM[3] monitor_filters = send_on_enter -lib_deps = plerup/EspSoftwareSerial@^6.12.6 +lib_deps = + plerup/EspSoftwareSerial@^6.12.6 + links2004/WebSockets@^2.3.6 + me-no-dev/AsyncTCP@^1.1.1 + me-no-dev/ESPAsyncTCP@^1.2.2 + me-no-dev/ESP Async WebServer@^1.2.3 diff --git a/Control/src/temp.cpp b/Control/src/temp.cpp new file mode 100644 index 0000000..fb81261 --- /dev/null +++ b/Control/src/temp.cpp @@ -0,0 +1,447 @@ +#include +#include +#include +#include +#include +#include "Ticker.h" + +const int potPin = 34; //used to simulate battery voltage. +const int butPin = 16; //used to increment a variable to simulate distance increasing. +const int U_Led = 14; //LED subsitute for the 'movement forward command'. +const int L_Led = 12; //LED subsitute for the 'movement left command'. +const int R_Led = 15; //LED subsitute for the 'movement right command'. +const int D_Led = 13; //LED subsitute for the 'movement back command'. + +/* const char* ssid = "ssid"; +const char* password = "xxxxxxxx"; */ + +int potVal = 0; +bool butState = 1; //Variables only for testing - will be removed in final + +int d = 0; //Initializing variable for odometer distance. + +void send_sensor(); +Ticker timer; + +char index_html[] PROGMEM = R"=====( + + + + +Rover Command Center + + + + + + + +

    ROVER COMMAND CENTER

    + +
    + +
    +
    +

    Movement Control

    +
    + +
    +
    + + + +
    + +
    +
    + +
    +
    +

    Sensor Data

    +
      + +
    • + +
      +
      + +
      +
      • + + +
    • + +
      +
      + 28mm +
      +
      • + +
    +
    + +
    + +
    + + + + + +)====="; + +AsyncWebServer server(80); // server port 80 for initial HTTP request for the main webpage. +WebSocketsServer websockets(81); // server port 81 for real time data flow through websockets. + +void notFound(AsyncWebServerRequest *request) +{ + request->send(404, "text/plain", "Page Not found. Check URI/IP address."); +} + +void webSocketEvent(uint8_t num, WStype_t type, uint8_t * payload, size_t length) { + + switch (type) + { + case WStype_DISCONNECTED: + Serial.printf("Client[%u] Disconnected!\n", num); + break; + case WStype_CONNECTED: { + IPAddress ip = websockets.remoteIP(num); + Serial.printf("Client[%u] Connected from %d.%d.%d.%d url: %s\n", num, ip[0], ip[1], ip[2], ip[3], payload); + } + break; + case WStype_TEXT: { + Serial.printf("Client[%u] sent Text: %s\n", num, payload); + String command = String((char*)( payload)); + + DynamicJsonDocument doc(200); //creating an instance of a DynamicJsonDocument allocating 200bytes on the heap. + DeserializationError error = deserializeJson(doc, command); // deserialize 'doc' and parse for parameters we expect to receive. + if (error) { + Serial.print("deserializeJson() failed: "); + Serial.println(error.c_str()); + return; + } + + int MVM_F_status = doc["MVM_F"]; + int MVM_L_status = doc["MVM_L"]; + int MVM_R_status = doc["MVM_R"]; + int MVM_B_status = doc["MVM_B"]; + + digitalWrite(U_Led,MVM_F_status); + digitalWrite(L_Led,MVM_L_status); + digitalWrite(R_Led,MVM_R_status); + digitalWrite(D_Led,MVM_B_status); + } + } +} + +void setup() +{ + + Serial.begin(115200); + pinMode(U_Led,OUTPUT); + pinMode(L_Led,OUTPUT); + pinMode(R_Led,OUTPUT); + pinMode(D_Led,OUTPUT); + pinMode(butPin, INPUT_PULLUP); + + +/* Serial.println(); + Serial.println(); + Serial.print("Connecting to "); + Serial.println(ssid); + + WiFi.begin(ssid, password); + + while (WiFi.status() != WL_CONNECTED) { + delay(500); + Serial.print("."); + } + + Serial.println(""); + Serial.println("Rover connected to "); + Serial.println(ssid); + Serial.println(); + Serial.println("Rover IP address: "); + Serial.println(WiFi.localIP()); */ + + WiFi.softAP("RoverAP", "SplendidCheeks"); + Serial.println(); + Serial.println("RoverAP running"); + Serial.print("Rover IP address: "); + Serial.println(WiFi.softAPIP()); + + + if (!MDNS.begin("rover")) { + Serial.println("Error setting up MDNS responder!"); + while (1) { + delay(2000); + } + } + Serial.println("mDNS responder started! Rover Command Center can now be accessed at 'rover.local' "); + + + + server.on("/", [](AsyncWebServerRequest * request) + { + request->send_P(200, "text/html", index_html); + }); + + server.onNotFound(notFound); + + server.begin(); + websockets.begin(); + websockets.onEvent(webSocketEvent); + timer.attach(0.5,send_sensor_data); +} + +void loop() +{ + websockets.loop(); + potVal = analogRead(potPin); +} + +void send_sensor_data() +{ + + butState = digitalRead(butPin); + if (butState == LOW) { + //increment ODO: + d += 10; + } + // JSON_Data = {"BTRY_VOLT":v,"ODO_DIST":d} + String JSON_Data = "{\"BTRY_VOLT\":"; + JSON_Data += potVal; + JSON_Data += ",\"ODO_DIST\":"; + JSON_Data += d; + JSON_Data += "}"; + websockets.broadcastTXT(JSON_Data); +} \ No newline at end of file From a120aa10fc109d03153863255398b62be8d980c2 Mon Sep 17 00:00:00 2001 From: Aadi Desai <21363892+supleed2@users.noreply.github.com> Date: Wed, 2 Jun 2021 18:53:55 +0100 Subject: [PATCH 03/32] Add Json dependency to project --- Control/platformio.ini | 1 + 1 file changed, 1 insertion(+) diff --git a/Control/platformio.ini b/Control/platformio.ini index 7daf920..54c5471 100644 --- a/Control/platformio.ini +++ b/Control/platformio.ini @@ -21,3 +21,4 @@ lib_deps = me-no-dev/AsyncTCP@^1.1.1 me-no-dev/ESPAsyncTCP@^1.2.2 me-no-dev/ESP Async WebServer@^1.2.3 + bblanchon/ArduinoJson@^6.18.0 From d8209c009f5a0bc6c490b4e3aca7602abe703c6a Mon Sep 17 00:00:00 2001 From: Aadi Desai <21363892+supleed2@users.noreply.github.com> Date: Thu, 3 Jun 2021 01:09:29 +0100 Subject: [PATCH 04/32] Add dummy credentials file --- Control/.gitignore | 1 + Control/src/credentials.h.dummy | 7 +++++++ 2 files changed, 8 insertions(+) create mode 100644 Control/src/credentials.h.dummy diff --git a/Control/.gitignore b/Control/.gitignore index 89cc49c..c7b130a 100644 --- a/Control/.gitignore +++ b/Control/.gitignore @@ -3,3 +3,4 @@ .vscode/c_cpp_properties.json .vscode/launch.json .vscode/ipch +src/credentials.h diff --git a/Control/src/credentials.h.dummy b/Control/src/credentials.h.dummy new file mode 100644 index 0000000..11fbc84 --- /dev/null +++ b/Control/src/credentials.h.dummy @@ -0,0 +1,7 @@ +#ifndef CREDENTIALS_H +#define CREDENTIALS_H + +#define WIFI_SSID "SSID_here" +#define WIFI_PW "Password_here" + +#endif From 3920375c4383d57177c3af6c66ceb1590fa5c235 Mon Sep 17 00:00:00 2001 From: Aadi Desai <21363892+supleed2@users.noreply.github.com> Date: Thu, 3 Jun 2021 21:28:20 +0100 Subject: [PATCH 05/32] Update library dependencies --- Control/platformio.ini | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/Control/platformio.ini b/Control/platformio.ini index 54c5471..175e408 100644 --- a/Control/platformio.ini +++ b/Control/platformio.ini @@ -17,8 +17,8 @@ upload_port = COM[3] monitor_filters = send_on_enter lib_deps = plerup/EspSoftwareSerial@^6.12.6 - links2004/WebSockets@^2.3.6 - me-no-dev/AsyncTCP@^1.1.1 - me-no-dev/ESPAsyncTCP@^1.2.2 + sstaub/Ticker@^4.2.0 me-no-dev/ESP Async WebServer@^1.2.3 + me-no-dev/AsyncTCP@^1.1.1 + links2004/WebSockets@^2.3.6 bblanchon/ArduinoJson@^6.18.0 From de87475e47708eedf8afae6ef2ed026af15eb19c Mon Sep 17 00:00:00 2001 From: Aadi Desai <21363892+supleed2@users.noreply.github.com> Date: Thu, 3 Jun 2021 21:29:00 +0100 Subject: [PATCH 06/32] Add debugging compilation and monitor flags --- Control/platformio.ini | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/Control/platformio.ini b/Control/platformio.ini index 175e408..9880f9b 100644 --- a/Control/platformio.ini +++ b/Control/platformio.ini @@ -14,7 +14,13 @@ board = esp32dev framework = arduino monitor_speed = 115200 upload_port = COM[3] -monitor_filters = send_on_enter +monitor_filters = + send_on_enter + esp32_exception_decoder +build_flags = + -DCORE_DEBUG_LEVEL=5 + -Wno-unknown-pragmas +build_type = debug lib_deps = plerup/EspSoftwareSerial@^6.12.6 sstaub/Ticker@^4.2.0 From 87b16945f21f9b01e98b2673ed74cd30b4bb961d Mon Sep 17 00:00:00 2001 From: Aadi Desai <21363892+supleed2@users.noreply.github.com> Date: Thu, 3 Jun 2021 21:29:14 +0100 Subject: [PATCH 07/32] Merge code from temp.cpp into main.cpp --- Control/src/main.cpp | 485 ++++++++++++++++++++++++++++++++++++++----- Control/src/temp.cpp | 447 --------------------------------------- 2 files changed, 437 insertions(+), 495 deletions(-) delete mode 100644 Control/src/temp.cpp diff --git a/Control/src/main.cpp b/Control/src/main.cpp index d3e85ef..a76a5e3 100644 --- a/Control/src/main.cpp +++ b/Control/src/main.cpp @@ -1,61 +1,450 @@ #include #include -#include +// #include Software Serial not currently needed +#include +#include +#include +#include +#include +#include +#include +#ifdef LOG_LOCAL_LEVEL + #undef LOG_LOCAL_LEVEL +#endif +#define LOG_LOCAL_LEVEL ESP_LOG_VERBOSE +#include "esp_log.h" -#define RX1pin 14 // Pin 10 on expansion board -#define TX1pin 4 // Pin 11 on expansion board -#define RX2pin 15 // Pin 12 on expansion board -#define TX2pin 2 // Pin 13 on expansion board -#define RX3pin 18 // Pin 6 on expansion board -#define TX3pin 5 // Pin 7 on expansion board -#define RX4pin 17 // Pin 8 on expansion board -#define TX4pin 16 // Pin 9 on expansion board +#define RX1pin 14 // Pin 10 on expansion board, UART1 +#define TX1pin 4 // Pin 11 on expansion board, UART1 -void forwardprint1() { - if(Serial1.available()){ - input1 = String(Serial1.readStringUntil('\n')); - Serial2.println(input1); - } +// Function Declarations +void printFPGAoutput(); +void returnSensorData(); +void notFound(AsyncWebServerRequest *request); +void webSocketEvent(uint8_t num, WStype_t type, uint8_t *payload, size_t length); + +// Global objects +AsyncWebServer webserver(80); +WebSocketsServer websocketserver(81); +Ticker ticker(returnSensorData, 500, 0, MILLIS); + +// Global variables +int battery_voltage = 0; +int distance_travelled = 0; + +#pragma region HTMLsource +char index_html[] PROGMEM = R"=====( + + + + +Rover Control Panel + + + + + + + +

    ROVER COMMAND CENTER

    + +
    + +
    +
    +

    Movement Control

    +
    + +
    +
    + + + +
    + +
    +
    + +
    +
    +

    Sensor Data

    +
      + +
    • + +
      +
      + +
      +
      • + + +
    • + +
      +
      + 28mm +
      +
      • + +
    +
    + +
    + +
    + + + + + +)====="; +#pragma endregion + +void setup() +{ + esp_log_level_set("*", ESP_LOG_ERROR); // set all components to ERROR level + esp_log_level_set("wifi", ESP_LOG_WARN); // enable WARN logs from WiFi stack + esp_log_level_set("dhcpc", ESP_LOG_INFO); // enable INFO logs from DHCP client + + Serial.begin(115200); // Set up hardware UART0 (Connected to USB port) + Serial1.begin(9600, SERIAL_8N1, RX1pin, TX1pin); // Set up hardware UART1 + // Set up remaining communication ports here (Energy, Drive, Vision) + + Serial.println("Connecting to AP"); + WiFi.begin(WIFI_SSID, WIFI_PW); + while (WiFi.status() != WL_CONNECTED) + { + delay(500); + Serial.print("."); + } + Serial.println("\nConnected to AP"); + while (!MDNS.begin("rover")) + { + Serial.println("Error setting up mDNS, retrying in 5s"); + delay(5000); + } + Serial.println("mDNS set up, access Control Panel at 'rover.local/'"); + + webserver.on("/", [](AsyncWebServerRequest *request) + { request->send_P(200, "text/html", index_html); }); + webserver.onNotFound(notFound); + webserver.begin(); + + websocketserver.begin(); + websocketserver.onEvent(webSocketEvent); + ticker.start(); +} + +void loop() +{ + printFPGAoutput(); + + String FPGAinput; // Forward serial monitor input to FPGA + if (Serial.available()) + { + FPGAinput = String(Serial.readStringUntil('\n')); + Serial1.println(FPGAinput); + } + + websocketserver.loop(); // Handle incoming client connections +} + +void printFPGAoutput() +{ // Print serial communication from FPGA to serial monitor + String FPGAoutput; + if (Serial1.available()) + { + FPGAoutput = String(Serial1.readStringUntil('\n')); + Serial.println(FPGAoutput); } } -int counter; -String input, input1, input2, input3, input4; -SoftwareSerial Serial3; -SoftwareSerial Serial4; - -void setup() { - Serial.begin(115200); // Set up hardware UART 0 (Connected to USB port) - Serial1.begin(9600, SERIAL_8N1, RX1pin, TX1pin); // Set up hardware UART 1 - Serial2.begin(9600, SERIAL_8N1, RX2pin, TX2pin); // Set up hardware UART 2 - Serial3.begin(9600, SWSERIAL_8N1, RX3pin, TX3pin); // Set up software UART 3 - Serial4.begin(9600, SWSERIAL_8N1, RX4pin, TX4pin); // Set up software UART 4 +void returnSensorData() +{ + // Collect sensor data here? + String JSON_Data = String("{\"BTRY_VOLT\":") + battery_voltage + String(",\"ODO_DIST\":") + distance_travelled + "}"; + websocketserver.broadcastTXT(JSON_Data); } -void loop() { - if(Serial.available()){ - input = String(Serial.readStringUntil('\n')); - Serial1.println(input); +void notFound(AsyncWebServerRequest *request) +{ + request->send(404, "text/plain", "Page Not found. Check URI/IP address."); +} + +void webSocketEvent(uint8_t num, WStype_t type, uint8_t *payload, size_t length) +{ + switch (type) + { + case WStype_DISCONNECTED: + { + Serial.printf("Client[%u] Disconnected!\n", num); + } + break; + case WStype_CONNECTED: + { + IPAddress ip = websocketserver.remoteIP(num); + Serial.printf("Client[%u] Connected from %d.%d.%d.%d url: %s\n", num, ip[0], ip[1], ip[2], ip[3], payload); + } + break; + case WStype_TEXT: + { + Serial.printf("Client[%u] sent Text: %s\n", num, payload); + String command = String((char *)(payload)); + + DynamicJsonDocument doc(200); //creating an instance of a DynamicJsonDocument allocating 200bytes on the heap. + DeserializationError error = deserializeJson(doc, command); // deserialize 'doc' and parse for parameters we expect to receive. + if (error) + { + Serial.print("deserializeJson() failed: "); + Serial.println(error.c_str()); + return; + } + + int MVM_F_status = doc["MVM_F"]; + int MVM_L_status = doc["MVM_L"]; + int MVM_R_status = doc["MVM_R"]; + int MVM_B_status = doc["MVM_B"]; + + Serial.println('<' + MVM_F_status + ',' + MVM_B_status + ',' + MVM_L_status + ',' + MVM_R_status + '>'); + } + break; + case WStype_PONG: + { + Serial.println("Websocket keep-alive PONG"); + } + default: + { + Serial.println(String("Websocket received invalid event type: ") + type + String(", exiting")); + exit(1); + } } - forwardprint1(); - forwardprint2(); - forwardprint3(); - forwardprint4(); -} \ No newline at end of file +} diff --git a/Control/src/temp.cpp b/Control/src/temp.cpp deleted file mode 100644 index fb81261..0000000 --- a/Control/src/temp.cpp +++ /dev/null @@ -1,447 +0,0 @@ -#include -#include -#include -#include -#include -#include "Ticker.h" - -const int potPin = 34; //used to simulate battery voltage. -const int butPin = 16; //used to increment a variable to simulate distance increasing. -const int U_Led = 14; //LED subsitute for the 'movement forward command'. -const int L_Led = 12; //LED subsitute for the 'movement left command'. -const int R_Led = 15; //LED subsitute for the 'movement right command'. -const int D_Led = 13; //LED subsitute for the 'movement back command'. - -/* const char* ssid = "ssid"; -const char* password = "xxxxxxxx"; */ - -int potVal = 0; -bool butState = 1; //Variables only for testing - will be removed in final - -int d = 0; //Initializing variable for odometer distance. - -void send_sensor(); -Ticker timer; - -char index_html[] PROGMEM = R"=====( - - - - -Rover Command Center - - - - - - - -

    ROVER COMMAND CENTER

    - -
    - -
    -
    -

    Movement Control

    -
    - -
    -
    - - - -
    - -
    -
    - -
    -
    -

    Sensor Data

    -
      - -
    • - -
      -
      - -
      -
      • - - -
    • - -
      -
      - 28mm -
      -
      • - -
    -
    - -
    - -
    - - - - - -)====="; - -AsyncWebServer server(80); // server port 80 for initial HTTP request for the main webpage. -WebSocketsServer websockets(81); // server port 81 for real time data flow through websockets. - -void notFound(AsyncWebServerRequest *request) -{ - request->send(404, "text/plain", "Page Not found. Check URI/IP address."); -} - -void webSocketEvent(uint8_t num, WStype_t type, uint8_t * payload, size_t length) { - - switch (type) - { - case WStype_DISCONNECTED: - Serial.printf("Client[%u] Disconnected!\n", num); - break; - case WStype_CONNECTED: { - IPAddress ip = websockets.remoteIP(num); - Serial.printf("Client[%u] Connected from %d.%d.%d.%d url: %s\n", num, ip[0], ip[1], ip[2], ip[3], payload); - } - break; - case WStype_TEXT: { - Serial.printf("Client[%u] sent Text: %s\n", num, payload); - String command = String((char*)( payload)); - - DynamicJsonDocument doc(200); //creating an instance of a DynamicJsonDocument allocating 200bytes on the heap. - DeserializationError error = deserializeJson(doc, command); // deserialize 'doc' and parse for parameters we expect to receive. - if (error) { - Serial.print("deserializeJson() failed: "); - Serial.println(error.c_str()); - return; - } - - int MVM_F_status = doc["MVM_F"]; - int MVM_L_status = doc["MVM_L"]; - int MVM_R_status = doc["MVM_R"]; - int MVM_B_status = doc["MVM_B"]; - - digitalWrite(U_Led,MVM_F_status); - digitalWrite(L_Led,MVM_L_status); - digitalWrite(R_Led,MVM_R_status); - digitalWrite(D_Led,MVM_B_status); - } - } -} - -void setup() -{ - - Serial.begin(115200); - pinMode(U_Led,OUTPUT); - pinMode(L_Led,OUTPUT); - pinMode(R_Led,OUTPUT); - pinMode(D_Led,OUTPUT); - pinMode(butPin, INPUT_PULLUP); - - -/* Serial.println(); - Serial.println(); - Serial.print("Connecting to "); - Serial.println(ssid); - - WiFi.begin(ssid, password); - - while (WiFi.status() != WL_CONNECTED) { - delay(500); - Serial.print("."); - } - - Serial.println(""); - Serial.println("Rover connected to "); - Serial.println(ssid); - Serial.println(); - Serial.println("Rover IP address: "); - Serial.println(WiFi.localIP()); */ - - WiFi.softAP("RoverAP", "SplendidCheeks"); - Serial.println(); - Serial.println("RoverAP running"); - Serial.print("Rover IP address: "); - Serial.println(WiFi.softAPIP()); - - - if (!MDNS.begin("rover")) { - Serial.println("Error setting up MDNS responder!"); - while (1) { - delay(2000); - } - } - Serial.println("mDNS responder started! Rover Command Center can now be accessed at 'rover.local' "); - - - - server.on("/", [](AsyncWebServerRequest * request) - { - request->send_P(200, "text/html", index_html); - }); - - server.onNotFound(notFound); - - server.begin(); - websockets.begin(); - websockets.onEvent(webSocketEvent); - timer.attach(0.5,send_sensor_data); -} - -void loop() -{ - websockets.loop(); - potVal = analogRead(potPin); -} - -void send_sensor_data() -{ - - butState = digitalRead(butPin); - if (butState == LOW) { - //increment ODO: - d += 10; - } - // JSON_Data = {"BTRY_VOLT":v,"ODO_DIST":d} - String JSON_Data = "{\"BTRY_VOLT\":"; - JSON_Data += potVal; - JSON_Data += ",\"ODO_DIST\":"; - JSON_Data += d; - JSON_Data += "}"; - websockets.broadcastTXT(JSON_Data); -} \ No newline at end of file From bcdd392020f2d3f2f72f2102106e6236bec45a03 Mon Sep 17 00:00:00 2001 From: Aadi Desai <21363892+supleed2@users.noreply.github.com> Date: Fri, 4 Jun 2021 01:02:32 +0100 Subject: [PATCH 08/32] Migrate to SPIFFS, untested --- Control/data/favicon.ico | Bin 0 -> 1150 bytes Control/data/index.html | 304 +++++++++++++++++++++++++++++ Control/src/main.cpp | 400 ++++++--------------------------------- 3 files changed, 360 insertions(+), 344 deletions(-) create mode 100644 Control/data/favicon.ico create mode 100644 Control/data/index.html diff --git a/Control/data/favicon.ico b/Control/data/favicon.ico new file mode 100644 index 0000000000000000000000000000000000000000..cbaef43c600ad681185a856bc52468f966e77896 GIT binary patch literal 1150 zcmbW1?Mstk6vm(0^Rj2d%@t^f$u_Ln%ZF$qm@?F-1ATx4K&4=~l9;qSPpg z(gdJj4tN$tA$QDvfcFMx~0%V^$M1(_j&-f)aQQ%0RfcU<%BD7xne^$BV_H+Sb-) z<^4G|@3PK;dG-iJqfvu-S^a*$om`Cmu7e)pUh&g+)6UM0%v$`U( zlap#9k@&naS?6Rg>LhsoEOTXc0b-f+NG_MthKGl>SS)6s zJCDBX^Z6X)?xWe{PA=iOEM98F(VRmwMSQ2byIT`~JRaA_$H!H2XULW6>gsA_1u}Q( zdkL&m;#s`CU0q$q=;-LaUuHBhF>&ahZfR+;b#`_d@;eR&gJw7!Hrw0V&F1E2TPPGV zrQg23K0TYwYC}Uqn%tGttMpb51OoO{Dy2)^WHR{&gp+;+;vX0o(CBB7-d=(Q&MC7k z*4EaZ$Ye5dHlu>yzC%v@@*6=v%iZ3Pdyu)vthm3^g+k$ + + + + Rover Control Panel + + + + + + + + + + +

    ROVER COMMAND CENTER

    + +
    + +
    +
    +

    Movement Control

    +
    + +
    +
    + + + +
    + +
    +
    + +
    +
    +

    Sensor Data

    +
      + +
    • +
      + +
      +
      + +
      +
      • + + +
    • +
      + +
      +
      + 28mm +
      +
      • + +
    +
    + +
    + +
    + + + + \ No newline at end of file diff --git a/Control/src/main.cpp b/Control/src/main.cpp index a76a5e3..6cc0738 100644 --- a/Control/src/main.cpp +++ b/Control/src/main.cpp @@ -8,9 +8,10 @@ #include #include #include -#ifdef LOG_LOCAL_LEVEL - #undef LOG_LOCAL_LEVEL -#endif +#include + +// Enable extra debugging info +#undef LOG_LOCAL_LEVEL #define LOG_LOCAL_LEVEL ESP_LOG_VERBOSE #include "esp_log.h" @@ -32,313 +33,22 @@ Ticker ticker(returnSensorData, 500, 0, MILLIS); int battery_voltage = 0; int distance_travelled = 0; -#pragma region HTMLsource -char index_html[] PROGMEM = R"=====( - - - - -Rover Control Panel - - - - - - - -

    ROVER COMMAND CENTER

    - -
    - -
    -
    -

    Movement Control

    -
    - -
    -
    - - - -
    - -
    -
    - -
    -
    -

    Sensor Data

    -
      - -
    • - -
      -
      - -
      -
      • - - -
    • - -
      -
      - 28mm -
      -
      • - -
    -
    - -
    - -
    - - - - - -)====="; -#pragma endregion - void setup() { - esp_log_level_set("*", ESP_LOG_ERROR); // set all components to ERROR level - esp_log_level_set("wifi", ESP_LOG_WARN); // enable WARN logs from WiFi stack - esp_log_level_set("dhcpc", ESP_LOG_INFO); // enable INFO logs from DHCP client + esp_log_level_set("*", ESP_LOG_ERROR); // set all components to ERROR level + esp_log_level_set("wifi", ESP_LOG_WARN); // enable WARN logs from WiFi stack + esp_log_level_set("dhcpc", ESP_LOG_INFO); // enable INFO logs from DHCP client Serial.begin(115200); // Set up hardware UART0 (Connected to USB port) Serial1.begin(9600, SERIAL_8N1, RX1pin, TX1pin); // Set up hardware UART1 // Set up remaining communication ports here (Energy, Drive, Vision) + if (!SPIFFS.begin(true)) + { + Serial.println("SPIFFS failed to mount"); + return; + } + Serial.println("Connecting to AP"); WiFi.begin(WIFI_SSID, WIFI_PW); while (WiFi.status() != WL_CONNECTED) @@ -354,8 +64,10 @@ void setup() } Serial.println("mDNS set up, access Control Panel at 'rover.local/'"); - webserver.on("/", [](AsyncWebServerRequest *request) - { request->send_P(200, "text/html", index_html); }); + webserver.on("/", HTTP_GET, [](AsyncWebServerRequest *request) + { request->send(SPIFFS, "/index.html", "text/html"); }); + webserver.on("/favicon.ico", HTTP_GET, [](AsyncWebServerRequest *request) + { request->send(SPIFFS, "/favicon.ico", "image/png"); }); webserver.onNotFound(notFound); webserver.begin(); @@ -404,47 +116,47 @@ void webSocketEvent(uint8_t num, WStype_t type, uint8_t *payload, size_t length) { switch (type) { - case WStype_DISCONNECTED: - { - Serial.printf("Client[%u] Disconnected!\n", num); - } - break; - case WStype_CONNECTED: - { - IPAddress ip = websocketserver.remoteIP(num); - Serial.printf("Client[%u] Connected from %d.%d.%d.%d url: %s\n", num, ip[0], ip[1], ip[2], ip[3], payload); - } - break; - case WStype_TEXT: - { - Serial.printf("Client[%u] sent Text: %s\n", num, payload); - String command = String((char *)(payload)); + case WStype_DISCONNECTED: + { + Serial.printf("Client[%u] Disconnected!\n", num); + } + break; + case WStype_CONNECTED: + { + IPAddress ip = websocketserver.remoteIP(num); + Serial.printf("Client[%u] Connected from %d.%d.%d.%d url: %s\n", num, ip[0], ip[1], ip[2], ip[3], payload); + } + break; + case WStype_TEXT: + { + Serial.printf("Client[%u] sent Text: %s\n", num, payload); + String command = String((char *)(payload)); - DynamicJsonDocument doc(200); //creating an instance of a DynamicJsonDocument allocating 200bytes on the heap. - DeserializationError error = deserializeJson(doc, command); // deserialize 'doc' and parse for parameters we expect to receive. - if (error) - { - Serial.print("deserializeJson() failed: "); - Serial.println(error.c_str()); - return; - } - - int MVM_F_status = doc["MVM_F"]; - int MVM_L_status = doc["MVM_L"]; - int MVM_R_status = doc["MVM_R"]; - int MVM_B_status = doc["MVM_B"]; - - Serial.println('<' + MVM_F_status + ',' + MVM_B_status + ',' + MVM_L_status + ',' + MVM_R_status + '>'); - } - break; - case WStype_PONG: + DynamicJsonDocument doc(200); //creating an instance of a DynamicJsonDocument allocating 200bytes on the heap. + DeserializationError error = deserializeJson(doc, command); // deserialize 'doc' and parse for parameters we expect to receive. + if (error) { - Serial.println("Websocket keep-alive PONG"); - } - default: - { - Serial.println(String("Websocket received invalid event type: ") + type + String(", exiting")); - exit(1); + Serial.print("deserializeJson() failed: "); + Serial.println(error.c_str()); + return; } + + int MVM_F_status = doc["MVM_F"]; + int MVM_L_status = doc["MVM_L"]; + int MVM_R_status = doc["MVM_R"]; + int MVM_B_status = doc["MVM_B"]; + + Serial.println('<' + MVM_F_status + ',' + MVM_B_status + ',' + MVM_L_status + ',' + MVM_R_status + '>'); + } + break; + case WStype_PONG: + { + Serial.println("Websocket keep-alive PONG"); + } + default: + { + Serial.println(String("Websocket received invalid event type: ") + type + String(", exiting")); + exit(1); + } } } From e07744478db2255be0b946b985da68bce5d5e135 Mon Sep 17 00:00:00 2001 From: Aadi Desai <21363892+supleed2@users.noreply.github.com> Date: Fri, 4 Jun 2021 17:12:40 +0100 Subject: [PATCH 09/32] SPIFFS tested, working --- Control/src/main.cpp | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/Control/src/main.cpp b/Control/src/main.cpp index 6cc0738..b122c92 100644 --- a/Control/src/main.cpp +++ b/Control/src/main.cpp @@ -43,20 +43,18 @@ void setup() Serial1.begin(9600, SERIAL_8N1, RX1pin, TX1pin); // Set up hardware UART1 // Set up remaining communication ports here (Energy, Drive, Vision) - if (!SPIFFS.begin(true)) + if (!SPIFFS.begin(true)) // Mount SPIFFS { Serial.println("SPIFFS failed to mount"); return; } + Serial.println("SPIFFS mounted"); - Serial.println("Connecting to AP"); WiFi.begin(WIFI_SSID, WIFI_PW); while (WiFi.status() != WL_CONNECTED) { delay(500); - Serial.print("."); } - Serial.println("\nConnected to AP"); while (!MDNS.begin("rover")) { Serial.println("Error setting up mDNS, retrying in 5s"); @@ -153,6 +151,7 @@ void webSocketEvent(uint8_t num, WStype_t type, uint8_t *payload, size_t length) { Serial.println("Websocket keep-alive PONG"); } + break; default: { Serial.println(String("Websocket received invalid event type: ") + type + String(", exiting")); From 99c3af355bdbf70e4825428bbd41a467f45dffd5 Mon Sep 17 00:00:00 2001 From: Aadi Desai <21363892+supleed2@users.noreply.github.com> Date: Sat, 5 Jun 2021 13:10:51 +0100 Subject: [PATCH 10/32] Add portable Ticker @ 2.0.0 Library --- Control/lib/TickerV2/keywords.txt | 14 ++++ Control/lib/TickerV2/library.properties | 9 ++ Control/lib/TickerV2/src/TickerV2.cpp | 58 +++++++++++++ Control/lib/TickerV2/src/TickerV2.h | 107 ++++++++++++++++++++++++ Control/platformio.ini | 1 - 5 files changed, 188 insertions(+), 1 deletion(-) create mode 100644 Control/lib/TickerV2/keywords.txt create mode 100644 Control/lib/TickerV2/library.properties create mode 100644 Control/lib/TickerV2/src/TickerV2.cpp create mode 100644 Control/lib/TickerV2/src/TickerV2.h diff --git a/Control/lib/TickerV2/keywords.txt b/Control/lib/TickerV2/keywords.txt new file mode 100644 index 0000000..52026d7 --- /dev/null +++ b/Control/lib/TickerV2/keywords.txt @@ -0,0 +1,14 @@ +####################################### +# Datatypes (KEYWORD1) +####################################### + +Ticker KEYWORD1 + +####################################### +# Methods and Functions (KEYWORD2) +####################################### + +attach KEYWORD2 +attach_ms KEYWORD2 +once KEYWORD2 +detach KEYWORD2 \ No newline at end of file diff --git a/Control/lib/TickerV2/library.properties b/Control/lib/TickerV2/library.properties new file mode 100644 index 0000000..96528a2 --- /dev/null +++ b/Control/lib/TickerV2/library.properties @@ -0,0 +1,9 @@ +name=TickerV2 +version=2.0.0 +author=Bert Melis +maintainer=Hristo Gochkov +sentence=Allows to call functions with a given interval. +paragraph= +category=Timing +url= +architectures=esp32 \ No newline at end of file diff --git a/Control/lib/TickerV2/src/TickerV2.cpp b/Control/lib/TickerV2/src/TickerV2.cpp new file mode 100644 index 0000000..c2267f8 --- /dev/null +++ b/Control/lib/TickerV2/src/TickerV2.cpp @@ -0,0 +1,58 @@ +/* + Ticker.cpp - esp32 library that calls functions periodically + + Copyright (c) 2017 Bert Melis. All rights reserved. + + Based on the original work of: + Copyright (c) 2014 Ivan Grokhotkov. All rights reserved. + The original version is part of the esp8266 core for Arduino environment. + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +*/ + +#include "TickerV2.h" + +Ticker::Ticker() : + _timer(nullptr) {} + +Ticker::~Ticker() { + detach(); +} + +void Ticker::_attach_ms(uint32_t milliseconds, bool repeat, callback_with_arg_t callback, uint32_t arg) { + esp_timer_create_args_t _timerConfig; + _timerConfig.arg = reinterpret_cast(arg); + _timerConfig.callback = callback; + _timerConfig.dispatch_method = ESP_TIMER_TASK; + _timerConfig.name = "Ticker"; + if (_timer) { + esp_timer_stop(_timer); + esp_timer_delete(_timer); + } + esp_timer_create(&_timerConfig, &_timer); + if (repeat) { + esp_timer_start_periodic(_timer, milliseconds * 1000ULL); + } else { + esp_timer_start_once(_timer, milliseconds * 1000ULL); + } +} + +void Ticker::detach() { + if (_timer) { + esp_timer_stop(_timer); + esp_timer_delete(_timer); + _timer = nullptr; + } +} \ No newline at end of file diff --git a/Control/lib/TickerV2/src/TickerV2.h b/Control/lib/TickerV2/src/TickerV2.h new file mode 100644 index 0000000..af1fb0f --- /dev/null +++ b/Control/lib/TickerV2/src/TickerV2.h @@ -0,0 +1,107 @@ +/* + Ticker.h - esp32 library that calls functions periodically + + Copyright (c) 2017 Bert Melis. All rights reserved. + + Based on the original work of: + Copyright (c) 2014 Ivan Grokhotkov. All rights reserved. + The original version is part of the esp8266 core for Arduino environment. + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +*/ + +#ifndef TICKERV2_H +#define TICKERV2_H + +extern "C" { + #include "esp_timer.h" +} + +class Ticker +{ +public: + Ticker(); + ~Ticker(); + typedef void (*callback_t)(void); + typedef void (*callback_with_arg_t)(void*); + + void attach(float seconds, callback_t callback) + { + _attach_ms(seconds * 1000, true, reinterpret_cast(callback), 0); + } + + void attach_ms(uint32_t milliseconds, callback_t callback) + { + _attach_ms(milliseconds, true, reinterpret_cast(callback), 0); + } + + template + void attach(float seconds, void (*callback)(TArg), TArg arg) + { + static_assert(sizeof(TArg) <= sizeof(uint32_t), "attach() callback argument size must be <= 4 bytes"); + // C-cast serves two purposes: + // static_cast for smaller integer types, + // reinterpret_cast + const_cast for pointer types + uint32_t arg32 = (uint32_t)arg; + _attach_ms(seconds * 1000, true, reinterpret_cast(callback), arg32); + } + + template + void attach_ms(uint32_t milliseconds, void (*callback)(TArg), TArg arg) + { + static_assert(sizeof(TArg) <= sizeof(uint32_t), "attach_ms() callback argument size must be <= 4 bytes"); + uint32_t arg32 = (uint32_t)arg; + _attach_ms(milliseconds, true, reinterpret_cast(callback), arg32); + } + + void once(float seconds, callback_t callback) + { + _attach_ms(seconds * 1000, false, reinterpret_cast(callback), 0); + } + + void once_ms(uint32_t milliseconds, callback_t callback) + { + _attach_ms(milliseconds, false, reinterpret_cast(callback), 0); + } + + template + void once(float seconds, void (*callback)(TArg), TArg arg) + { + static_assert(sizeof(TArg) <= sizeof(uint32_t), "attach() callback argument size must be <= 4 bytes"); + uint32_t arg32 = (uint32_t)(arg); + _attach_ms(seconds * 1000, false, reinterpret_cast(callback), arg32); + } + + template + void once_ms(uint32_t milliseconds, void (*callback)(TArg), TArg arg) + { + static_assert(sizeof(TArg) <= sizeof(uint32_t), "attach_ms() callback argument size must be <= 4 bytes"); + uint32_t arg32 = (uint32_t)(arg); + _attach_ms(milliseconds, false, reinterpret_cast(callback), arg32); + } + + void detach(); + bool active(); + +protected: + void _attach_ms(uint32_t milliseconds, bool repeat, callback_with_arg_t callback, uint32_t arg); + + +protected: + esp_timer_handle_t _timer; +}; + + +#endif // TICKERV2_H \ No newline at end of file diff --git a/Control/platformio.ini b/Control/platformio.ini index 9880f9b..0f97db2 100644 --- a/Control/platformio.ini +++ b/Control/platformio.ini @@ -23,7 +23,6 @@ build_flags = build_type = debug lib_deps = plerup/EspSoftwareSerial@^6.12.6 - sstaub/Ticker@^4.2.0 me-no-dev/ESP Async WebServer@^1.2.3 me-no-dev/AsyncTCP@^1.1.1 links2004/WebSockets@^2.3.6 From 0dee19f28ca086933637317325ab4daecb6b1cae Mon Sep 17 00:00:00 2001 From: Aadi Desai <21363892+supleed2@users.noreply.github.com> Date: Sat, 5 Jun 2021 13:11:09 +0100 Subject: [PATCH 11/32] Updated main to use portable Ticker Lib --- Control/data/index.html | 8 +------- Control/src/main.cpp | 18 ++++++++++++++---- 2 files changed, 15 insertions(+), 11 deletions(-) diff --git a/Control/data/index.html b/Control/data/index.html index e9ed800..152b6f2 100644 --- a/Control/data/index.html +++ b/Control/data/index.html @@ -108,17 +108,11 @@ var BTRY_VOLT = 0; var ODO_DIST = 0; - function round(value, precision) { - var multiplier = Math.pow(10, precision || 0); - return Math.round(value * multiplier) / multiplier; - } - connection.onmessage = function (event) { var raw_data = event.data; console.log(raw_data); var data = JSON.parse(raw_data); - digiBTRY_VOLT = data.BTRY_VOLT; - BTRY_VOLT = round((digiBTRY_VOLT * (4.8e-4) + 4), 1) + BTRY_VOLT = data.BTRY_VOLT; ODO_DIST = data.ODO_DIST; document.getElementById("btry_meter").value = BTRY_VOLT; document.getElementById("Odometer").innerHTML = ODO_DIST; diff --git a/Control/src/main.cpp b/Control/src/main.cpp index b122c92..245331e 100644 --- a/Control/src/main.cpp +++ b/Control/src/main.cpp @@ -4,7 +4,7 @@ #include #include #include -#include +#include "TickerV2.h" #include #include #include @@ -27,10 +27,10 @@ void webSocketEvent(uint8_t num, WStype_t type, uint8_t *payload, size_t length) // Global objects AsyncWebServer webserver(80); WebSocketsServer websocketserver(81); -Ticker ticker(returnSensorData, 500, 0, MILLIS); +Ticker ticker; // Global variables -int battery_voltage = 0; +float battery_voltage = 4.0f; int distance_travelled = 0; void setup() @@ -71,7 +71,7 @@ void setup() websocketserver.begin(); websocketserver.onEvent(webSocketEvent); - ticker.start(); + ticker.attach(0.5, returnSensorData); } void loop() @@ -101,7 +101,17 @@ void printFPGAoutput() void returnSensorData() { // Collect sensor data here? + distance_travelled++; + if (battery_voltage < 6) + { + battery_voltage += 0.2; + } + else + { + battery_voltage = 4; + } String JSON_Data = String("{\"BTRY_VOLT\":") + battery_voltage + String(",\"ODO_DIST\":") + distance_travelled + "}"; + Serial.println(JSON_Data); websocketserver.broadcastTXT(JSON_Data); } From 9463a14cdcb077003c30d00896199d38810e0720 Mon Sep 17 00:00:00 2001 From: Aadi Desai <21363892+supleed2@users.noreply.github.com> Date: Mon, 7 Jun 2021 14:08:58 +0100 Subject: [PATCH 12/32] Create Drive<->Control reference doc --- Control/ref/drive.cpp | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 Control/ref/drive.cpp diff --git a/Control/ref/drive.cpp b/Control/ref/drive.cpp new file mode 100644 index 0000000..5658baf --- /dev/null +++ b/Control/ref/drive.cpp @@ -0,0 +1,40 @@ +#include +#include +#include + +#define RXpin 0 // Define your RX pin here +#define TXpin 0 // Define your TX pin here + +void setup() +{ + Serial.begin(115200); // Set up hardware UART0 (Connected to USB port) + Serial1.begin(9600, SERIAL_8N1, RXpin, TXpin); // Set up hardware UART1 + + // Other Drive setup stuff +} + +void loop() +{ + DynamicJsonDocument rdoc(1024); // receive doc, not sure how big this needs to be + deserializeJson(rdoc, Serial1); // Take JSON input from UART1 + int requiredHeading = rdoc["rH"]; + int distance = rdoc["dist"]; + float speed = rdoc["sp"]; + int currentHeading = rdoc["cH"]; + + bool commandComplete = 0; + float powerUsage_mW = 0.0; + int distTravelled_mm = 0; + int current_x = 0; + int current_y = 0; + + // Do Drive stuff, set the 5 values above + + DynamicJsonDocument tdoc(1024); // transmit doc, not sure how big this needs to be + tdoc["comp"] = commandComplete; + tdoc["mW"] = powerUsage_mW; + tdoc["mm"] = distTravelled_mm; + tdoc["pos"][0] = current_x; + tdoc["pos"][1] = current_y; + serializeJson(tdoc, Serial1); // Build JSON and send on UART1 +} \ No newline at end of file From fd76a692e1913d3fd77c265e311c19df55d252bd Mon Sep 17 00:00:00 2001 From: Aadi Desai <21363892+supleed2@users.noreply.github.com> Date: Mon, 7 Jun 2021 16:29:04 +0100 Subject: [PATCH 13/32] Add ability for Drive to request current heading from Control --- Control/ref/drive.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Control/ref/drive.cpp b/Control/ref/drive.cpp index 5658baf..8a59cdc 100644 --- a/Control/ref/drive.cpp +++ b/Control/ref/drive.cpp @@ -17,7 +17,7 @@ void loop() { DynamicJsonDocument rdoc(1024); // receive doc, not sure how big this needs to be deserializeJson(rdoc, Serial1); // Take JSON input from UART1 - int requiredHeading = rdoc["rH"]; + int requiredHeading = rdoc["rH"]; // if -1: command in progress, returning requested heading, dist/sp to be ignored int distance = rdoc["dist"]; float speed = rdoc["sp"]; int currentHeading = rdoc["cH"]; @@ -31,7 +31,7 @@ void loop() // Do Drive stuff, set the 5 values above DynamicJsonDocument tdoc(1024); // transmit doc, not sure how big this needs to be - tdoc["comp"] = commandComplete; + tdoc["comp"] = commandComplete; // If 0: command in progress, current heading requested tdoc["mW"] = powerUsage_mW; tdoc["mm"] = distTravelled_mm; tdoc["pos"][0] = current_x; From 0798db2d3e78423b90f6fb1b134ea52290e02b76 Mon Sep 17 00:00:00 2001 From: Aadi Desai <21363892+supleed2@users.noreply.github.com> Date: Mon, 7 Jun 2021 16:59:56 +0100 Subject: [PATCH 14/32] Add expansion board mapping for connection to DE10 Lite --- Control/ref/vision.cpp | 1 + 1 file changed, 1 insertion(+) create mode 100644 Control/ref/vision.cpp diff --git a/Control/ref/vision.cpp b/Control/ref/vision.cpp new file mode 100644 index 0000000..e699eca --- /dev/null +++ b/Control/ref/vision.cpp @@ -0,0 +1 @@ +const int ARDUINO_IO[16] = {-1/*RX*/, -1/*RX*/, 23, 22, 21, 19, 18, 5, 17, 16, 14, 4, 15, 2, 13, 12}; // Expansion board mapping From c7a5a930f138508e4f57faa146709936d49629f3 Mon Sep 17 00:00:00 2001 From: Aadi Desai <21363892+supleed2@users.noreply.github.com> Date: Tue, 8 Jun 2021 19:07:13 +0100 Subject: [PATCH 15/32] Vision "Fresh Start" from Updated Upstream --- .../DE10_LITE_D8M_VIP_16/.qsys_edit/Qsys.xml | 113 +- .../.qsys_edit/Qsys_schematic.nlv | 58 +- .../.qsys_edit/filters.xml | 2 +- .../.qsys_edit/preferences.xml | 7 +- .../DE10_LITE_D8M_VIP.qsf | 2 +- .../DE10_LITE_D8M_VIP.qws | Bin 407 -> 1312 bytes .../DE10_LITE_D8M_VIP_16/DE10_LITE_D8M_VIP.v | 12 +- .../DE10_LITE_D8M_VIP_time_limited.cdf | 13 - .../DE10_LITE_D8M_VIP_time_limited.sof | Bin 3330349 -> 0 bytes Vision/DE10_LITE_D8M_VIP_16/Qsys.qsys | 131 +- Vision/DE10_LITE_D8M_VIP_16/Qsys.sopcinfo | 1555 +- Vision/DE10_LITE_D8M_VIP_16/Qsys/Qsys.bsf | 37 +- Vision/DE10_LITE_D8M_VIP_16/Qsys/Qsys.cmp | 4 +- Vision/DE10_LITE_D8M_VIP_16/Qsys/Qsys.html | 266 +- Vision/DE10_LITE_D8M_VIP_16/Qsys/Qsys.xml | 4763 ++- Vision/DE10_LITE_D8M_VIP_16/Qsys/Qsys_bb.v | 6 +- .../Qsys/Qsys_generation.rpt | 226 +- .../Qsys/Qsys_generation_previous.rpt | 231 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Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.ui.workbench/workingsets.xml delete mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/version.ini delete mode 100644 Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/RemoteSystemsTempFiles/.project create mode 100644 Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/drivers/inc/altera_avalon_uart.h create mode 100644 Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/drivers/inc/altera_avalon_uart_fd.h create mode 100644 Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/drivers/inc/altera_avalon_uart_regs.h create mode 100644 Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/drivers/src/altera_avalon_uart_fd.c create mode 100644 Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/drivers/src/altera_avalon_uart_init.c create mode 100644 Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/drivers/src/altera_avalon_uart_ioctl.c create mode 100644 Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/drivers/src/altera_avalon_uart_read.c create mode 100644 Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/drivers/src/altera_avalon_uart_write.c delete mode 100644 Vision/DE10_LITE_D8M_VIP_16/uart_interface_hw.tcl create mode 100644 Vision/doc/OV8865 Data Sheet.pdf diff --git a/Vision/DE10_LITE_D8M_VIP_16/.qsys_edit/Qsys.xml b/Vision/DE10_LITE_D8M_VIP_16/.qsys_edit/Qsys.xml index 9fb466d..bfcb16d 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/.qsys_edit/Qsys.xml +++ b/Vision/DE10_LITE_D8M_VIP_16/.qsys_edit/Qsys.xml @@ -781,7 +781,7 @@ true - + 0 dock.PlaceholderList @@ -827,7 +827,7 @@ false - + dock.single.Clock\ Domains\ \-\ Beta dock.single.IP\ Catalog @@ -853,7 +853,7 @@ - + dock.single.Hierarchy @@ -878,9 +878,9 @@ - + - + dock.single.Connections dock.single.System\ Contents @@ -897,12 +897,18 @@ dock.single.Interconnect\ Requirements dock.single.Instrumentation dock.single.Instance\ Parameters - dock.single.Address\ Map dock.single.Domains 0 dock.PlaceholderList + + + dock.single.System\ Contents + + true + + dock.single.Address\ Map @@ -965,7 +971,7 @@ - + dock.single.Messages dock.single.Generation\ Messages @@ -996,16 +1002,6 @@ - - - - - Messages - - - - - 0 @@ -1183,6 +1179,16 @@ + + + + + Messages + + + + + @@ -1611,21 +1617,9 @@ - dock.mode.maximized dock.mode.normal - - dock.mode.maximized - ccontrol center - - - - 1 - dock.single.Address\ Map - - - dock.mode.normal ccontrol center @@ -1633,9 +1627,10 @@ dock.single.Address\ Map - - - + + + + @@ -1852,21 +1847,9 @@ - dock.mode.maximized dock.mode.normal - - dock.mode.maximized - ccontrol center - - - - 0 - dock.single.System\ Contents - - - dock.mode.normal ccontrol center @@ -1874,9 +1857,10 @@ dock.single.System\ Contents - - - + + + + @@ -1892,21 +1876,9 @@ dock.mode.minimized - dock.mode.maximized dock.mode.normal - - dock.mode.maximized - ccontrol center - - - - 2 - dock.single.Interconnect\ Requirements - - - dock.mode.minimized ccontrol north @@ -1927,8 +1899,8 @@ dock.single.Interconnect\ Requirements - - + + @@ -2168,7 +2140,24 @@ - + + + + dock.mode.normal + + dock.mode.normal + ccontrol center + + + + + + + + + + + diff --git a/Vision/DE10_LITE_D8M_VIP_16/.qsys_edit/Qsys_schematic.nlv b/Vision/DE10_LITE_D8M_VIP_16/.qsys_edit/Qsys_schematic.nlv index 2179962..d9f42d6 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/.qsys_edit/Qsys_schematic.nlv +++ b/Vision/DE10_LITE_D8M_VIP_16/.qsys_edit/Qsys_schematic.nlv @@ -15,45 +15,45 @@ preplace inst Qsys.TERASIC_CAMERA_0 -pg 1 -lvl 4 -y 740 preplace inst Qsys.mipi_reset_n -pg 1 -lvl 8 -y 1190 preplace inst Qsys.alt_vip_vfb_0 -pg 1 -lvl 5 -y 620 preplace inst Qsys -pg 1 -lvl 1 -y 40 -regy -20 -preplace inst Qsys.uart_interface_0 -pg 1 -lvl 2 -y 330 -preplace inst Qsys.EEE_IMGPROC_0 -pg 1 -lvl 7 -y 600 +preplace inst Qsys.EEE_IMGPROC_0 -pg 1 -lvl 7 -y 700 preplace inst Qsys.timer -pg 1 -lvl 8 -y 440 preplace inst Qsys.mipi_pwdn_n -pg 1 -lvl 8 -y 1090 preplace inst Qsys.key -pg 1 -lvl 8 -y 620 +preplace inst Qsys.uart_0 -pg 1 -lvl 3 -y 720 preplace inst Qsys.sw -pg 1 -lvl 8 -y 1290 preplace inst Qsys.TERASIC_AUTO_FOCUS_0 -pg 1 -lvl 6 -y 560 preplace inst Qsys.nios2_gen2.cpu -pg 1 -preplace inst Qsys.nios2_gen2 -pg 1 -lvl 2 -y 520 +preplace inst Qsys.nios2_gen2 -pg 1 -lvl 2 -y 550 preplace inst Qsys.i2c_opencores_mipi -pg 1 -lvl 8 -y 170 -preplace netloc EXPORTQsys(MASTER)altpll_0.c1,(MASTER)Qsys.clk_sdram) 1 3 6 NJ 280 NJ 280 NJ 280 NJ 280 NJ 300 NJ -preplace netloc INTERCONNECTQsys(SLAVE)sysid_qsys.control_slave,(SLAVE)timer.s1,(MASTER)nios2_gen2.instruction_master,(SLAVE)jtag_uart.avalon_jtag_slave,(SLAVE)altpll_0.pll_slave,(SLAVE)nios2_gen2.debug_mem_slave,(SLAVE)led.s1,(SLAVE)EEE_IMGPROC_0.s1,(SLAVE)mipi_pwdn_n.s1,(SLAVE)i2c_opencores_mipi.avalon_slave_0,(MASTER)nios2_gen2.data_master,(SLAVE)TERASIC_AUTO_FOCUS_0.mm_ctrl,(SLAVE)sw.s1,(SLAVE)i2c_opencores_camera.avalon_slave_0,(SLAVE)onchip_memory2_0.s1,(SLAVE)mipi_reset_n.s1,(SLAVE)key.s1) 1 1 7 450 420 850 810 NJ 710 NJ 710 1910 730 2190 770 2580 +preplace netloc INTERCONNECTQsys(SLAVE)sysid_qsys.reset,(SLAVE)onchip_memory2_0.reset1,(SLAVE)timer.reset,(SLAVE)key.reset,(SLAVE)sw.reset,(SLAVE)altpll_0.inclk_interface_reset,(SLAVE)i2c_opencores_camera.clock_reset,(SLAVE)TERASIC_AUTO_FOCUS_0.reset,(SLAVE)i2c_opencores_mipi.clock_reset,(SLAVE)mipi_reset_n.reset,(SLAVE)jtag_uart.reset,(SLAVE)alt_vip_itc_0.is_clk_rst_reset,(SLAVE)sdram.reset,(SLAVE)led.reset,(SLAVE)TERASIC_CAMERA_0.clock_reset_reset,(SLAVE)nios2_gen2.reset,(SLAVE)alt_vip_vfb_0.reset,(SLAVE)EEE_IMGPROC_0.reset,(MASTER)nios2_gen2.debug_reset_request,(SLAVE)mipi_pwdn_n.reset,(SLAVE)uart_0.reset,(MASTER)clk_50.clk_reset) 1 1 7 430 750 830 850 1190 830 1670 730 1890 770 2110 910 2700 +preplace netloc FAN_OUTQsys(SLAVE)key.clk,(SLAVE)i2c_opencores_camera.clock,(SLAVE)nios2_gen2.clk,(SLAVE)uart_0.clk,(MASTER)clk_50.clk,(SLAVE)jtag_uart.clk,(SLAVE)onchip_memory2_0.clk1,(SLAVE)altpll_0.inclk_interface,(SLAVE)i2c_opencores_mipi.clock,(SLAVE)sw.clk,(SLAVE)mipi_reset_n.clk,(SLAVE)sysid_qsys.clk,(SLAVE)led.clk,(SLAVE)mipi_pwdn_n.clk,(SLAVE)timer.clk) 1 1 7 410 450 930 400 NJ 400 NJ 400 NJ 400 NJ 400 2660 preplace netloc EXPORTQsys(SLAVE)i2c_opencores_camera.export,(SLAVE)Qsys.i2c_opencores_camera_export) 1 0 8 NJ 100 NJ 100 NJ 100 NJ 100 NJ 100 NJ 100 NJ 100 NJ -preplace netloc EXPORTQsys(SLAVE)led.external_connection,(SLAVE)Qsys.led_external_connection) 1 0 8 NJ 1420 NJ 1420 NJ 1420 NJ 1420 NJ 1420 NJ 1420 NJ 1420 NJ -preplace netloc EXPORTQsys(SLAVE)Qsys.eee_imgproc_0_conduit_mode,(SLAVE)EEE_IMGPROC_0.conduit_mode) 1 0 7 NJ 300 NJ 300 NJ 410 NJ 410 NJ 410 NJ 410 NJ -preplace netloc EXPORTQsys(SLAVE)Qsys.altpll_0_locked_conduit,(SLAVE)altpll_0.locked_conduit) 1 0 3 NJ 280 NJ 280 NJ -preplace netloc FAN_OUTQsys(SLAVE)mipi_pwdn_n.clk,(SLAVE)i2c_opencores_camera.clock,(SLAVE)key.clk,(SLAVE)onchip_memory2_0.clk1,(MASTER)clk_50.clk,(SLAVE)jtag_uart.clk,(SLAVE)mipi_reset_n.clk,(SLAVE)nios2_gen2.clk,(SLAVE)sysid_qsys.clk,(SLAVE)altpll_0.inclk_interface,(SLAVE)i2c_opencores_mipi.clock,(SLAVE)led.clk,(SLAVE)sw.clk,(SLAVE)timer.clk,(SLAVE)uart_interface_0.clock) 1 1 7 410 320 950 380 NJ 340 NJ 300 NJ 300 NJ 300 2640 -preplace netloc EXPORTQsys(SLAVE)Qsys.sdram_wire,(SLAVE)sdram.wire) 1 0 8 NJ 980 NJ 980 NJ 980 NJ 980 NJ 980 NJ 980 NJ 980 NJ +preplace netloc EXPORTQsys(SLAVE)sdram.wire,(SLAVE)Qsys.sdram_wire) 1 0 8 NJ 980 NJ 980 NJ 980 NJ 980 NJ 980 NJ 980 NJ 980 NJ +preplace netloc EXPORTQsys(SLAVE)Qsys.eee_imgproc_0_conduit_mode,(SLAVE)EEE_IMGPROC_0.conduit_mode) 1 0 7 NJ 490 NJ 490 NJ 550 NJ 550 NJ 550 NJ 550 NJ +preplace netloc EXPORTQsys(MASTER)Qsys.clk_sdram,(MASTER)altpll_0.c1) 1 3 6 NJ 220 NJ 220 NJ 220 NJ 220 NJ 160 NJ +preplace netloc EXPORTQsys(SLAVE)TERASIC_CAMERA_0.conduit_end,(SLAVE)Qsys.terasic_camera_0_conduit_end) 1 0 4 NJ 430 NJ 430 NJ 470 NJ preplace netloc EXPORTQsys(SLAVE)mipi_pwdn_n.external_connection,(SLAVE)Qsys.mipi_pwdn_n_external_connection) 1 0 8 NJ 1120 NJ 1120 NJ 1120 NJ 1120 NJ 1120 NJ 1120 NJ 1120 NJ -preplace netloc FAN_OUTQsys(SLAVE)sdram.clk,(SLAVE)alt_vip_itc_0.is_clk_rst,(MASTER)altpll_0.c2,(SLAVE)TERASIC_CAMERA_0.clock_reset,(SLAVE)TERASIC_AUTO_FOCUS_0.clock,(SLAVE)EEE_IMGPROC_0.clock,(SLAVE)alt_vip_vfb_0.clock) 1 3 5 1250 300 1670 730 1870 690 2150 860 2600 -preplace netloc EXPORTQsys(SLAVE)Qsys.uart_interface_0_conduit_end,(SLAVE)uart_interface_0.conduit_end) 1 0 2 NJ 360 NJ -preplace netloc POINT_TO_POINTQsys(MASTER)EEE_IMGPROC_0.avalon_streaming_source,(SLAVE)alt_vip_itc_0.din) 1 7 1 2600 -preplace netloc EXPORTQsys(SLAVE)Qsys.terasic_auto_focus_0_conduit,(SLAVE)TERASIC_AUTO_FOCUS_0.Conduit) 1 0 6 NJ 460 NJ 460 NJ 570 NJ 570 NJ 570 NJ -preplace netloc FAN_OUTQsys(SLAVE)i2c_opencores_mipi.interrupt_sender,(SLAVE)i2c_opencores_camera.interrupt_sender,(SLAVE)jtag_uart.irq,(MASTER)nios2_gen2.irq,(SLAVE)timer.irq) 1 2 6 NJ 870 NJ 870 NJ 790 NJ 790 NJ 790 2620 -preplace netloc EXPORTQsys(SLAVE)key.external_connection,(SLAVE)Qsys.key_external_connection) 1 0 8 NJ 710 NJ 710 NJ 830 NJ 730 NJ 770 NJ 750 NJ 750 NJ +preplace netloc EXPORTQsys(SLAVE)Qsys.clk,(SLAVE)clk_50.clk_in) 1 0 1 NJ +preplace netloc EXPORTQsys(SLAVE)altpll_0.areset_conduit,(SLAVE)Qsys.altpll_0_areset_conduit) 1 0 3 NJ 260 NJ 260 NJ +preplace netloc EXPORTQsys(SLAVE)Qsys.key_external_connection,(SLAVE)key.external_connection) 1 0 8 NJ 370 NJ 370 NJ 450 NJ 450 NJ 450 NJ 450 NJ 650 NJ +preplace netloc POINT_TO_POINTQsys(MASTER)EEE_IMGPROC_0.avalon_streaming_source,(SLAVE)alt_vip_itc_0.din) 1 7 1 2620 +preplace netloc EXPORTQsys(SLAVE)Qsys.led_external_connection,(SLAVE)led.external_connection) 1 0 8 NJ 1420 NJ 1420 NJ 1420 NJ 1420 NJ 1420 NJ 1420 NJ 1420 NJ +preplace netloc EXPORTQsys(SLAVE)Qsys.uart_0_rx_tx,(SLAVE)uart_0.external_connection) 1 0 3 NJ 510 NJ 510 NJ +preplace netloc EXPORTQsys(SLAVE)Qsys.terasic_auto_focus_0_conduit,(SLAVE)TERASIC_AUTO_FOCUS_0.Conduit) 1 0 6 NJ 690 NJ 690 NJ 690 NJ 690 NJ 570 NJ preplace netloc EXPORTQsys(SLAVE)Qsys.i2c_opencores_mipi_export,(SLAVE)i2c_opencores_mipi.export) 1 0 8 NJ 240 NJ 240 NJ 240 NJ 240 NJ 240 NJ 240 NJ 240 NJ -preplace netloc EXPORTQsys(SLAVE)Qsys.alt_vip_itc_0_clocked_video,(SLAVE)alt_vip_itc_0.clocked_video) 1 0 8 NJ 890 NJ 890 NJ 890 NJ 890 NJ 820 NJ 820 NJ 820 NJ -preplace netloc POINT_TO_POINTQsys(SLAVE)TERASIC_AUTO_FOCUS_0.din,(MASTER)alt_vip_vfb_0.dout) 1 5 1 1890 -preplace netloc FAN_INQsys(SLAVE)sdram.s1,(MASTER)alt_vip_vfb_0.write_master,(MASTER)alt_vip_vfb_0.read_master) 1 5 3 1890 960 NJ 960 NJ -preplace netloc EXPORTQsys(SLAVE)clk_50.clk_in,(SLAVE)Qsys.clk) 1 0 1 NJ -preplace netloc POINT_TO_POINTQsys(SLAVE)EEE_IMGPROC_0.avalon_streaming_sink,(MASTER)TERASIC_AUTO_FOCUS_0.dout) 1 6 1 N -preplace netloc POINT_TO_POINTQsys(SLAVE)alt_vip_vfb_0.din,(MASTER)TERASIC_CAMERA_0.avalon_streaming_source) 1 4 1 1630 +preplace netloc FAN_OUTQsys(MASTER)nios2_gen2.irq,(SLAVE)jtag_uart.irq,(SLAVE)i2c_opencores_mipi.interrupt_sender,(SLAVE)uart_0.irq,(SLAVE)timer.irq,(SLAVE)i2c_opencores_camera.interrupt_sender) 1 2 6 950 530 NJ 530 NJ 530 NJ 530 NJ 670 2620 +preplace netloc FAN_OUTQsys(MASTER)altpll_0.c2,(SLAVE)EEE_IMGPROC_0.clock,(SLAVE)sdram.clk,(SLAVE)TERASIC_CAMERA_0.clock_reset,(SLAVE)alt_vip_itc_0.is_clk_rst,(SLAVE)TERASIC_AUTO_FOCUS_0.clock,(SLAVE)alt_vip_vfb_0.clock) 1 3 5 1190 730 1630 710 1910 730 2150 890 2680 +preplace netloc POINT_TO_POINTQsys(SLAVE)EEE_IMGPROC_0.avalon_streaming_sink,(MASTER)TERASIC_AUTO_FOCUS_0.dout) 1 6 1 2110 +preplace netloc INTERCONNECTQsys(SLAVE)i2c_opencores_mipi.avalon_slave_0,(SLAVE)nios2_gen2.debug_mem_slave,(SLAVE)jtag_uart.avalon_jtag_slave,(SLAVE)led.s1,(MASTER)nios2_gen2.instruction_master,(SLAVE)mipi_reset_n.s1,(SLAVE)onchip_memory2_0.s1,(SLAVE)uart_0.s1,(SLAVE)sysid_qsys.control_slave,(SLAVE)sw.s1,(SLAVE)altpll_0.pll_slave,(SLAVE)mipi_pwdn_n.s1,(SLAVE)TERASIC_AUTO_FOCUS_0.mm_ctrl,(SLAVE)timer.s1,(SLAVE)i2c_opencores_camera.avalon_slave_0,(SLAVE)key.s1,(MASTER)nios2_gen2.data_master,(SLAVE)EEE_IMGPROC_0.s1) 1 1 7 430 470 890 710 NJ 710 NJ 610 1870 790 2170 690 2580 preplace netloc EXPORTQsys(SLAVE)sw.external_connection,(SLAVE)Qsys.sw_external_connection) 1 0 8 NJ 1320 NJ 1320 NJ 1320 NJ 1320 NJ 1320 NJ 1320 NJ 1320 NJ preplace netloc EXPORTQsys(SLAVE)Qsys.mipi_reset_n_external_connection,(SLAVE)mipi_reset_n.external_connection) 1 0 8 NJ 1220 NJ 1220 NJ 1220 NJ 1220 NJ 1220 NJ 1220 NJ 1220 NJ -preplace netloc EXPORTQsys(MASTER)altpll_0.c3,(MASTER)Qsys.clk_vga) 1 3 6 NJ 320 NJ 320 NJ 320 NJ 320 NJ 320 NJ -preplace netloc EXPORTQsys(SLAVE)Qsys.altpll_0_areset_conduit,(SLAVE)altpll_0.areset_conduit) 1 0 3 NJ 260 NJ 260 NJ -preplace netloc EXPORTQsys(MASTER)Qsys.d8m_xclkin,(MASTER)altpll_0.c4) 1 3 6 NJ 220 NJ 220 NJ 220 NJ 220 NJ 160 NJ -preplace netloc EXPORTQsys(SLAVE)Qsys.terasic_camera_0_conduit_end,(SLAVE)TERASIC_CAMERA_0.conduit_end) 1 0 4 NJ 480 NJ 480 NJ 790 NJ +preplace netloc EXPORTQsys(MASTER)altpll_0.c4,(MASTER)Qsys.d8m_xclkin) 1 3 6 NJ 380 NJ 380 NJ 380 NJ 280 NJ 320 NJ +preplace netloc EXPORTQsys(MASTER)altpll_0.c3,(MASTER)Qsys.clk_vga) 1 3 6 NJ 320 NJ 320 NJ 320 NJ 260 NJ 300 NJ +preplace netloc POINT_TO_POINTQsys(MASTER)TERASIC_CAMERA_0.avalon_streaming_source,(SLAVE)alt_vip_vfb_0.din) 1 4 1 1650 +preplace netloc POINT_TO_POINTQsys(MASTER)alt_vip_vfb_0.dout,(SLAVE)TERASIC_AUTO_FOCUS_0.din) 1 5 1 1890 preplace netloc EXPORTQsys(SLAVE)Qsys.reset,(SLAVE)clk_50.clk_in_reset) 1 0 1 NJ -preplace netloc INTERCONNECTQsys(SLAVE)sw.reset,(SLAVE)timer.reset,(SLAVE)onchip_memory2_0.reset1,(SLAVE)key.reset,(SLAVE)alt_vip_vfb_0.reset,(SLAVE)uart_interface_0.reset,(SLAVE)mipi_pwdn_n.reset,(SLAVE)i2c_opencores_camera.clock_reset,(SLAVE)led.reset,(SLAVE)TERASIC_AUTO_FOCUS_0.reset,(SLAVE)TERASIC_CAMERA_0.clock_reset_reset,(MASTER)clk_50.clk_reset,(SLAVE)jtag_uart.reset,(MASTER)nios2_gen2.debug_reset_request,(SLAVE)EEE_IMGPROC_0.reset,(SLAVE)sysid_qsys.reset,(SLAVE)alt_vip_itc_0.is_clk_rst_reset,(SLAVE)sdram.reset,(SLAVE)nios2_gen2.reset,(SLAVE)i2c_opencores_mipi.clock_reset,(SLAVE)altpll_0.inclk_interface_reset,(SLAVE)mipi_reset_n.reset) 1 1 7 430 440 910 850 1290 690 1690 750 1930 710 2170 880 2680 -levelinfo -pg 1 0 200 3000 -levelinfo -hier Qsys 210 240 590 1020 1340 1720 2020 2320 2750 2900 +preplace netloc EXPORTQsys(SLAVE)altpll_0.locked_conduit,(SLAVE)Qsys.altpll_0_locked_conduit) 1 0 3 NJ 320 NJ 320 NJ +preplace netloc EXPORTQsys(SLAVE)alt_vip_itc_0.clocked_video,(SLAVE)Qsys.alt_vip_itc_0_clocked_video) 1 0 8 NJ 870 NJ 870 NJ 870 NJ 870 NJ 870 NJ 870 NJ 870 NJ +preplace netloc FAN_INQsys(MASTER)alt_vip_vfb_0.write_master,(MASTER)alt_vip_vfb_0.read_master,(SLAVE)sdram.s1) 1 5 3 1850 960 NJ 960 NJ +levelinfo -pg 1 0 200 3040 +levelinfo -hier Qsys 210 240 590 980 1300 1700 1980 2320 2790 2940 diff --git a/Vision/DE10_LITE_D8M_VIP_16/.qsys_edit/filters.xml b/Vision/DE10_LITE_D8M_VIP_16/.qsys_edit/filters.xml index 2c6ab93..5ca182d 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/.qsys_edit/filters.xml +++ b/Vision/DE10_LITE_D8M_VIP_16/.qsys_edit/filters.xml @@ -1,2 +1,2 @@ - + diff --git a/Vision/DE10_LITE_D8M_VIP_16/.qsys_edit/preferences.xml b/Vision/DE10_LITE_D8M_VIP_16/.qsys_edit/preferences.xml index ef41bac..86c4ee4 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/.qsys_edit/preferences.xml +++ b/Vision/DE10_LITE_D8M_VIP_16/.qsys_edit/preferences.xml @@ -3,12 +3,13 @@ - + - - + + diff --git a/Vision/DE10_LITE_D8M_VIP_16/DE10_LITE_D8M_VIP.qsf b/Vision/DE10_LITE_D8M_VIP_16/DE10_LITE_D8M_VIP.qsf index d52ca1a..f5e15d6 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/DE10_LITE_D8M_VIP.qsf +++ b/Vision/DE10_LITE_D8M_VIP_16/DE10_LITE_D8M_VIP.qsf @@ -6,7 +6,7 @@ set_global_assignment -name FAMILY "MAX 10" set_global_assignment -name DEVICE 10M50DAF484C7G set_global_assignment -name TOP_LEVEL_ENTITY DE10_LITE_D8M_VIP set_global_assignment -name ORIGINAL_QUARTUS_VERSION 15.1.0 -set_global_assignment -name LAST_QUARTUS_VERSION 16.0.2 +set_global_assignment -name LAST_QUARTUS_VERSION "16.1.0 Lite Edition" set_global_assignment -name PROJECT_CREATION_TIME_DATE "15:21:37 AUGUST 23,2016" set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA set_global_assignment -name DEVICE_FILTER_PIN_COUNT 484 diff --git a/Vision/DE10_LITE_D8M_VIP_16/DE10_LITE_D8M_VIP.qws b/Vision/DE10_LITE_D8M_VIP_16/DE10_LITE_D8M_VIP.qws index 82ecf992739581253eb66876118b7d80cedfc976..9a7beedca978bb85d11ff496ce86170b270e4bde 100644 GIT binary patch literal 1312 zcmeH_yG{a85QcwN3Q8+03kySt2?)jrc1A^Gf{_?vyK!+r_nm6iY$OSK-&B4C&*(2$F8{AupaGV77@m49`PZi;QG57z-0C@#?ipd#cj6cPkdxl-u-#9_rh9q@-+Rpb literal 407 zcmZusK@NgI44eg{KER8K5AcEk#KfZy@DGN7Tr| zQAm&3oAHi#0@luNn$CXkR`eo}H8!|;;Rt+6r{&$8Oahg*dw}LGa^hX_!X^xGL@6^w yP%X3gha@j6%wGiy`jTc!16ZNCbX98hRUDc7?OOj!8_?-fbE&Ytt)!-uAr3xXnO6h= diff --git a/Vision/DE10_LITE_D8M_VIP_16/DE10_LITE_D8M_VIP.v b/Vision/DE10_LITE_D8M_VIP_16/DE10_LITE_D8M_VIP.v index 48fb746..d9cd6e9 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/DE10_LITE_D8M_VIP.v +++ b/Vision/DE10_LITE_D8M_VIP_16/DE10_LITE_D8M_VIP.v @@ -178,15 +178,9 @@ Qsys u0 ( .eee_imgproc_0_conduit_mode_new_signal (SW[0]), -// .uart_interface_0_conduit_end_rx (ARDUINO_IO[13]), // input from ESP32 RX2pin -// .uart_interface_0_conduit_end_rx_data (), // output [7:0] -// .uart_interface_0_conduit_end_rx_valid (), // output -// -// .uart_interface_0_conduit_end_tx (ARDUINO_IO[12]), // output to ESP32 TX2pin -// .uart_interface_0_conduit_end_tx_data (), // input [7:0] -// .uart_interface_0_conduit_end_tx_transmit (), // input -// .uart_interface_0_conduit_end_tx_ready () // output - ); + .uart_0_rx_tx_rxd (ARDUINO_IO[1]), // uart_0_rx_tx.rxd + .uart_0_rx_tx_txd (ARDUINO_IO[0]) // + ); FpsMonitor uFps( .clk50(MAX10_CLK2_50), diff --git a/Vision/DE10_LITE_D8M_VIP_16/DE10_LITE_D8M_VIP_time_limited.cdf b/Vision/DE10_LITE_D8M_VIP_16/DE10_LITE_D8M_VIP_time_limited.cdf deleted file mode 100644 index ce89fc9..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/DE10_LITE_D8M_VIP_time_limited.cdf +++ /dev/null @@ -1,13 +0,0 @@ -/* Quartus Prime Version 16.1.0 Build 196 10/24/2016 SJ Lite Edition */ -JedecChain; - FileRevision(JESD32A); - DefaultMfr(6E); - - P ActionCode(Cfg) - Device PartName(10M50DAF484) Path("C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/") 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zv*MC#com%5W22$EiBi7wcx^*anvt z`s$VOo43+VzPx|fT;4G%b}nB=TZZ0_xe&Fw`@=xFs#fESjfLZ}lWXNrToQQ_<1Rv|63Km)=kD3uQ65XKf7UGC{Tp4y B)%*Ye diff --git a/Vision/DE10_LITE_D8M_VIP_16/Qsys.qsys b/Vision/DE10_LITE_D8M_VIP_16/Qsys.qsys index 009d746..d018843 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/Qsys.qsys +++ b/Vision/DE10_LITE_D8M_VIP_16/Qsys.qsys @@ -13,9 +13,14 @@ { datum _sortIndex { - value = "19"; + value = "18"; type = "int"; } + datum sopceditor_expanded + { + value = "0"; + type = "boolean"; + } } element Qsys { @@ -45,9 +50,14 @@ { datum _sortIndex { - value = "16"; + value = "17"; type = "int"; } + datum sopceditor_expanded + { + value = "0"; + type = "boolean"; + } } element TERASIC_AUTO_FOCUS_0.mm_ctrl { @@ -61,38 +71,58 @@ { datum _sortIndex { - value = "13"; + value = "14"; type = "int"; } + datum sopceditor_expanded + { + value = "0"; + type = "boolean"; + } } element alt_vip_itc_0 { datum _sortIndex { - value = "17"; + value = "19"; type = "int"; } + datum sopceditor_expanded + { + value = "0"; + type = "boolean"; + } } element alt_vip_vfb_0 { datum _sortIndex { - value = "14"; + value = "16"; type = "int"; } datum megawizard_uipreferences { - value = "{output_directory=F:\\Board_Proj\\D8M\\DE10_LITE_D8M_VIP, output_language=VERILOG}"; + value = "{output_directory=F:\\Ed\\Stuff\\EEE2Rover\\DE10_LITE_D8M_VIP_16, output_language=VERILOG}"; type = "String"; } + datum sopceditor_expanded + { + value = "0"; + type = "boolean"; + } } element altpll_0 { datum _sortIndex { - value = "18"; + value = "20"; type = "int"; } + datum sopceditor_expanded + { + value = "0"; + type = "boolean"; + } } element altpll_0.pll_slave { @@ -114,7 +144,7 @@ { datum _sortIndex { - value = "5"; + value = "6"; type = "int"; } } @@ -130,7 +160,7 @@ { datum _sortIndex { - value = "4"; + value = "5"; type = "int"; } } @@ -162,7 +192,7 @@ { datum _sortIndex { - value = "8"; + value = "9"; type = "int"; } } @@ -178,7 +208,7 @@ { datum _sortIndex { - value = "6"; + value = "7"; type = "int"; } } @@ -194,7 +224,7 @@ { datum _sortIndex { - value = "10"; + value = "11"; type = "int"; } } @@ -210,7 +240,7 @@ { datum _sortIndex { - value = "9"; + value = "10"; type = "int"; } } @@ -261,6 +291,11 @@ value = "15"; type = "int"; } + datum sopceditor_expanded + { + value = "0"; + type = "boolean"; + } } element sdram.s1 { @@ -274,7 +309,7 @@ { datum _sortIndex { - value = "7"; + value = "8"; type = "int"; } } @@ -290,7 +325,7 @@ { datum _sortIndex { - value = "11"; + value = "12"; type = "int"; } } @@ -306,7 +341,7 @@ { datum _sortIndex { - value = "12"; + value = "13"; type = "int"; } } @@ -318,6 +353,14 @@ type = "String"; } } + element uart_0 + { + datum _sortIndex + { + value = "4"; + type = "int"; + } + } } ]]> @@ -424,6 +467,11 @@ internal="TERASIC_CAMERA_0.conduit_end" type="conduit" dir="end" /> + - ]]> + ]]> @@ -806,14 +854,14 @@ - ]]> + ]]> - + @@ -945,7 +993,7 @@ - + @@ -1019,6 +1067,22 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + - - + + java.lang.Integer - 1622558600 + 1622729449 false true false @@ -118,7 +118,7 @@ the requested settings for a module instance. --> true true - + @@ -163,7 +163,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -211,7 +211,7 @@ parameters are a RESULT of the module parameters. --> + version="16.1"> @@ -363,7 +363,7 @@ parameters are a RESULT of the module parameters. --> + version="16.1"> @@ -512,7 +512,7 @@ parameters are a RESULT of the module parameters. --> valid - + @@ -883,7 +883,7 @@ parameters are a RESULT of the module parameters. --> address - + @@ -968,7 +968,7 @@ the requested settings for a module instance. --> true true - + @@ -1013,7 +1013,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -1058,7 +1058,7 @@ parameters are a RESULT of the module parameters. --> reset_n - + @@ -1429,7 +1429,7 @@ parameters are a RESULT of the module parameters. --> address - + @@ -1578,7 +1578,7 @@ parameters are a RESULT of the module parameters. --> endofpacket - + @@ -1727,7 +1727,7 @@ parameters are a RESULT of the module parameters. --> endofpacket - + @@ -1824,7 +1824,7 @@ the requested settings for a module instance. --> true true - + @@ -1869,7 +1869,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -1914,7 +1914,7 @@ parameters are a RESULT of the module parameters. --> reset_n - + @@ -1980,7 +1980,7 @@ parameters are a RESULT of the module parameters. --> + version="16.1"> @@ -2426,7 +2426,7 @@ the requested settings for a module instance. --> true true - + @@ -2471,7 +2471,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -2516,7 +2516,7 @@ parameters are a RESULT of the module parameters. --> reset - + @@ -2665,7 +2665,7 @@ parameters are a RESULT of the module parameters. --> endofpacket - + @@ -2880,7 +2880,7 @@ the requested settings for a module instance. --> true true - + @@ -2925,7 +2925,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -2970,7 +2970,7 @@ parameters are a RESULT of the module parameters. --> reset - + @@ -3119,7 +3119,7 @@ parameters are a RESULT of the module parameters. --> endofpacket - + @@ -3268,7 +3268,7 @@ parameters are a RESULT of the module parameters. --> endofpacket - + @@ -3575,7 +3575,7 @@ parameters are a RESULT of the module parameters. --> 67108864 - + @@ -3877,7 +3877,7 @@ parameters are a RESULT of the module parameters. --> - + @@ -5220,7 +5220,7 @@ the requested settings for a module instance. --> true true - + @@ -5281,7 +5281,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -5326,7 +5326,7 @@ parameters are a RESULT of the module parameters. --> reset - + @@ -5687,7 +5687,7 @@ parameters are a RESULT of the module parameters. --> writedata - + @@ -5756,7 +5756,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -5825,7 +5825,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -5930,7 +5930,7 @@ parameters are a RESULT of the module parameters. --> alt_vip_itc_0.is_clk_rst - + @@ -5999,7 +5999,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -6068,7 +6068,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -6113,7 +6113,7 @@ parameters are a RESULT of the module parameters. --> export - + @@ -6159,7 +6159,7 @@ parameters are a RESULT of the module parameters. --> - + @@ -6212,7 +6212,7 @@ the requested settings for a module instance. --> true true - + @@ -6277,7 +6277,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -6326,7 +6326,7 @@ parameters are a RESULT of the module parameters. --> reset_n - + @@ -6448,6 +6448,12 @@ parameters are a RESULT of the module parameters. --> clk nios2_gen2.clk + + false + uart_0 + clk + uart_0.clk + false onchip_memory2_0 @@ -6473,7 +6479,7 @@ parameters are a RESULT of the module parameters. --> altpll_0.inclk_interface - + @@ -6558,7 +6564,7 @@ the requested settings for a module instance. --> true true - + @@ -6603,7 +6609,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -6648,7 +6654,7 @@ parameters are a RESULT of the module parameters. --> reset - + @@ -6699,7 +6705,7 @@ parameters are a RESULT of the module parameters. --> export - + @@ -7066,7 +7072,7 @@ parameters are a RESULT of the module parameters. --> waitrequest_n - + @@ -7167,7 +7173,7 @@ the requested settings for a module instance. --> true true - + @@ -7212,7 +7218,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -7257,7 +7263,7 @@ parameters are a RESULT of the module parameters. --> reset - + @@ -7308,7 +7314,7 @@ parameters are a RESULT of the module parameters. --> export - + @@ -7675,7 +7681,7 @@ parameters are a RESULT of the module parameters. --> waitrequest_n - + @@ -7756,7 +7762,7 @@ parameters are a RESULT of the module parameters. --> @@ -7939,7 +7945,7 @@ the requested settings for a module instance. --> true true - + @@ -8000,7 +8006,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -8045,7 +8051,7 @@ parameters are a RESULT of the module parameters. --> reset_n - + @@ -8422,7 +8428,7 @@ parameters are a RESULT of the module parameters. --> waitrequest - + @@ -8500,7 +8506,7 @@ parameters are a RESULT of the module parameters. --> - + @@ -8757,7 +8763,7 @@ the requested settings for a module instance. --> true true - + @@ -8818,7 +8824,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -8863,7 +8869,7 @@ parameters are a RESULT of the module parameters. --> reset_n - + @@ -9210,7 +9216,7 @@ parameters are a RESULT of the module parameters. --> readdata - + @@ -9256,7 +9262,7 @@ parameters are a RESULT of the module parameters. --> - + @@ -9513,7 +9519,7 @@ the requested settings for a module instance. --> true true - + @@ -9574,7 +9580,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -9619,7 +9625,7 @@ parameters are a RESULT of the module parameters. --> reset_n - + @@ -9984,7 +9990,7 @@ parameters are a RESULT of the module parameters. --> readdata - + @@ -10033,7 +10039,7 @@ parameters are a RESULT of the module parameters. --> @@ -10291,7 +10297,7 @@ the requested settings for a module instance. --> true true - + @@ -10352,7 +10358,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -10397,7 +10403,7 @@ parameters are a RESULT of the module parameters. --> reset_n - + @@ -10762,7 +10768,7 @@ parameters are a RESULT of the module parameters. --> readdata - + @@ -10811,7 +10817,7 @@ parameters are a RESULT of the module parameters. --> @@ -11069,7 +11075,7 @@ the requested settings for a module instance. --> true true - + @@ -11130,7 +11136,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -11175,7 +11181,7 @@ parameters are a RESULT of the module parameters. --> reset_n - + @@ -11540,7 +11546,7 @@ parameters are a RESULT of the module parameters. --> readdata - + @@ -11589,7 +11595,7 @@ parameters are a RESULT of the module parameters. --> @@ -11905,6 +11911,14 @@ the requested settings for a module instance. --> false true + + boolean + false + false + true + false + true + boolean false @@ -13197,7 +13211,7 @@ the requested settings for a module instance. --> java.lang.String - ]]> + ]]> false true false @@ -13217,7 +13231,7 @@ the requested settings for a module instance. --> java.lang.String - ]]> + ]]> false true false @@ -13346,7 +13360,7 @@ the requested settings for a module instance. --> long - 15 + 31 false true false @@ -13396,7 +13410,7 @@ the requested settings for a module instance. --> java.lang.String - ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PHYSICAL_DESIGN_PLANNER 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 0 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1 + ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 0 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1 false true false @@ -13457,7 +13471,7 @@ the requested settings for a module instance. --> true true - + @@ -13518,7 +13532,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -13569,7 +13583,7 @@ parameters are a RESULT of the module parameters. --> reset_req - + @@ -13951,7 +13965,7 @@ parameters are a RESULT of the module parameters. --> s1 onchip_memory2_0.s1 131072 - 100000 + 131072 false @@ -14009,8 +14023,16 @@ parameters are a RESULT of the module parameters. --> 270336 32 + + false + uart_0 + s1 + uart_0.s1 + 270368 + 32 + - + @@ -14316,10 +14338,10 @@ parameters are a RESULT of the module parameters. --> s1 onchip_memory2_0.s1 131072 - 100000 + 131072 - + @@ -14415,8 +14437,15 @@ parameters are a RESULT of the module parameters. --> timer.irq 3 + + false + uart_0 + irq + uart_0.irq + 4 + - + @@ -14477,7 +14506,7 @@ parameters are a RESULT of the module parameters. --> reset - + @@ -14855,7 +14884,7 @@ parameters are a RESULT of the module parameters. --> + version="16.1"> @@ -14944,7 +14973,7 @@ parameters are a RESULT of the module parameters. --> @@ -15002,7 +15031,7 @@ the requested settings for a module instance. --> embeddedsw.CMacro.SIZE_VALUE - 100000 + 131072 embeddedsw.CMacro.WRITABLE @@ -15092,6 +15121,14 @@ the requested settings for a module instance. --> true true + + boolean + false + true + true + false + true + boolean false @@ -15108,6 +15145,14 @@ the requested settings for a module instance. --> true true + + boolean + false + false + false + true + true + java.lang.String NONE @@ -15118,7 +15163,7 @@ the requested settings for a module instance. --> long - 100000 + 131072 false true true @@ -15156,6 +15201,14 @@ the requested settings for a module instance. --> true true + + boolean + false + true + true + false + true + int 1 @@ -15240,7 +15293,7 @@ the requested settings for a module instance. --> java.lang.String - ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PHYSICAL_DESIGN_PLANNER 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 0 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1 + ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 0 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1 false true false @@ -15311,7 +15364,7 @@ the requested settings for a module instance. --> true true - + @@ -15356,7 +15409,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -15394,7 +15447,7 @@ parameters are a RESULT of the module parameters. --> java.math.BigInteger - 100000 + 131072 true true false @@ -15482,7 +15535,7 @@ parameters are a RESULT of the module parameters. --> java.math.BigInteger - 100000 + 131072 false true true @@ -15733,7 +15786,7 @@ parameters are a RESULT of the module parameters. --> byteenable - + @@ -15788,7 +15841,7 @@ parameters are a RESULT of the module parameters. --> @@ -16183,7 +16236,7 @@ the requested settings for a module instance. --> true true - + @@ -16244,7 +16297,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -16289,7 +16342,7 @@ parameters are a RESULT of the module parameters. --> reset_n - + @@ -16678,7 +16731,7 @@ parameters are a RESULT of the module parameters. --> waitrequest - + @@ -16772,7 +16825,7 @@ parameters are a RESULT of the module parameters. --> - + @@ -17029,7 +17082,7 @@ the requested settings for a module instance. --> true true - + @@ -17090,7 +17143,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -17135,7 +17188,7 @@ parameters are a RESULT of the module parameters. --> reset_n - + @@ -17482,7 +17535,7 @@ parameters are a RESULT of the module parameters. --> readdata - + @@ -17531,7 +17584,7 @@ parameters are a RESULT of the module parameters. --> @@ -17541,7 +17594,7 @@ the requested settings for a module instance. --> embeddedsw.CMacro.TIMESTAMP - 1622558600 + 1622729449 embeddedsw.dts.compatible @@ -17561,7 +17614,7 @@ the requested settings for a module instance. --> embeddedsw.dts.params.timestamp - 1622558600 + 1622729449 embeddedsw.dts.vendor @@ -17577,7 +17630,7 @@ the requested settings for a module instance. --> int - 1622558600 + 1622729449 true false false @@ -17600,7 +17653,7 @@ the requested settings for a module instance. --> true true - + @@ -17645,7 +17698,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -17690,7 +17743,7 @@ parameters are a RESULT of the module parameters. --> reset_n - + @@ -18034,7 +18087,7 @@ parameters are a RESULT of the module parameters. --> - + @@ -18259,7 +18312,7 @@ the requested settings for a module instance. --> true true - + @@ -18320,7 +18373,7 @@ parameters are a RESULT of the module parameters. --> clk - + @@ -18365,7 +18418,7 @@ parameters are a RESULT of the module parameters. --> reset_n - + @@ -18734,7 +18787,7 @@ parameters are a RESULT of the module parameters. --> write_n - + @@ -18812,10 +18865,839 @@ parameters are a RESULT of the module parameters. --> + + + + embeddedsw.CMacro.BAUD + 115200 + + + embeddedsw.CMacro.DATA_BITS + 8 + + + embeddedsw.CMacro.FIXED_BAUD + 1 + + + embeddedsw.CMacro.FREQ + 50000000 + + + embeddedsw.CMacro.PARITY + 'N' + + + embeddedsw.CMacro.SIM_CHAR_STREAM + "" + + + embeddedsw.CMacro.SIM_TRUE_BAUD + 0 + + + embeddedsw.CMacro.STOP_BITS + 1 + + + embeddedsw.CMacro.SYNC_REG_DEPTH + 2 + + + embeddedsw.CMacro.USE_CTS_RTS + 0 + + + embeddedsw.CMacro.USE_EOP_REGISTER + 0 + + + embeddedsw.dts.compatible + altr,uart-1.0 + + + embeddedsw.dts.group + serial + + + embeddedsw.dts.name + uart + + + embeddedsw.dts.params.clock-frequency + 50000000 + + + embeddedsw.dts.params.current-speed + 115200 + + + embeddedsw.dts.vendor + altr + + + int + 115200 + false + true + true + true + + + int + 8 + false + true + true + true + + + boolean + true + false + true + true + true + + + java.lang.String + NONE + false + true + true + true + + + java.lang.String + + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 1 + false + true + true + true + + + int + 2 + false + true + true + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + false + true + + + long + 50000000 + false + true + false + true + CLOCK_RATE + clk + + + double + 0.01 + true + true + true + true + + + java.lang.String + N + true + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + + + + boolean + false + false + true + false + true + + + java.lang.String + + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.Boolean + true + true + true + false + true + + + java.lang.Long + 50000000 + true + true + false + true + + clock + false + + clk + Input + 1 + clk + + + + + + java.lang.String + clk + false + true + true + true + + + com.altera.sopcmodel.reset.Reset$Edges + DEASSERT + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + reset + false + + reset_n + Input + 1 + reset_n + + + + + + embeddedsw.configuration.isFlash + 0 + + + embeddedsw.configuration.isMemoryDevice + 0 + + + embeddedsw.configuration.isNonVolatileStorage + 0 + + + embeddedsw.configuration.isPrintableDevice + 1 + + + com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment + NATIVE + false + true + false + true + + + int + 0 + false + true + false + true + + + java.math.BigInteger + 8 + true + true + false + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.lang.String + clk + false + true + true + true + + + java.lang.String + reset + false + true + true + true + + + int + 8 + false + true + true + true + + + java.math.BigInteger + + false + true + false + true + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + false + true + + + boolean + false + false + true + true + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + true + true + + + boolean + false + false + true + false + true + + + java.math.BigInteger + 0 + false + true + true + true + + + int + 0 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + int + 0 + false + false + true + true + + + int + 0 + false + false + true + true + + + int + 1 + false + true + false + true + + + boolean + true + false + true + false + true + + + int + 0 + false + true + true + true + + + int + 1 + false + true + false + true + + + int + 1 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + true + true + + + com.altera.sopcmodel.avalon.TimingUnits + Cycles + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 1 + false + true + false + true + + + int + 1 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + avalon + false + + address + Input + 3 + address + + + begintransfer + Input + 1 + begintransfer + + + chipselect + Input + 1 + chipselect + + + read_n + Input + 1 + read_n + + + write_n + Input + 1 + write_n + + + writedata + Input + 16 + writedata + + + readdata + Output + 16 + readdata + + + + + + java.lang.String + + false + true + true + true + + + java.lang.String + + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + conduit + false + + rxd + Input + 1 + export + + + txd + Output + 1 + export + + + + + + com.altera.entityinterfaces.IConnectionPoint + uart_0.s1 + false + true + true + true + + + java.lang.String + clk + false + true + false + true + + + java.lang.String + reset + false + true + false + true + + + java.lang.Integer + + false + true + true + true + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + true + true + + + com.altera.sopcmodel.interrupt.InterruptConnectionPoint$EIrqScheme + NONE + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + interrupt + false + + irq + Output + 1 + irq + + + @@ -18866,7 +19748,7 @@ parameters are a RESULT of the module parameters. --> @@ -18917,7 +19799,7 @@ parameters are a RESULT of the module parameters. --> @@ -18968,7 +19850,7 @@ parameters are a RESULT of the module parameters. --> @@ -19019,7 +19901,7 @@ parameters are a RESULT of the module parameters. --> @@ -19070,7 +19952,7 @@ parameters are a RESULT of the module parameters. --> @@ -19121,7 +20003,7 @@ parameters are a RESULT of the module parameters. --> @@ -19172,7 +20054,7 @@ parameters are a RESULT of the module parameters. --> @@ -19223,7 +20105,7 @@ parameters are a RESULT of the module parameters. --> @@ -19274,7 +20156,7 @@ parameters are a RESULT of the module parameters. --> @@ -19325,7 +20207,7 @@ parameters are a RESULT of the module parameters. --> @@ -19376,7 +20258,7 @@ parameters are a RESULT of the module parameters. --> @@ -19427,7 +20309,7 @@ parameters are a RESULT of the module parameters. --> @@ -19478,7 +20360,7 @@ parameters are a RESULT of the module parameters. --> @@ -19529,7 +20411,7 @@ parameters are a RESULT of the module parameters. --> @@ -19577,10 +20459,61 @@ parameters are a RESULT of the module parameters. --> EEE_IMGPROC_0 s1 + + + int + 1 + false + true + true + true + + + java.math.BigInteger + 0x00042020 + false + true + true + true + + + boolean + false + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + nios2_gen2 + data_master + uart_0 + s1 + @@ -19631,7 +20564,7 @@ parameters are a RESULT of the module parameters. --> @@ -19682,7 +20615,7 @@ parameters are a RESULT of the module parameters. --> @@ -19733,7 +20666,7 @@ parameters are a RESULT of the module parameters. --> @@ -19784,7 +20717,7 @@ parameters are a RESULT of the module parameters. --> @@ -19811,7 +20744,7 @@ parameters are a RESULT of the module parameters. --> @@ -19838,7 +20771,7 @@ parameters are a RESULT of the module parameters. --> @@ -19865,7 +20798,7 @@ parameters are a RESULT of the module parameters. --> @@ -19892,7 +20825,7 @@ parameters are a RESULT of the module parameters. --> @@ -19919,7 +20852,7 @@ parameters are a RESULT of the module parameters. --> @@ -19946,7 +20879,7 @@ parameters are a RESULT of the module parameters. --> @@ -19973,7 +20906,7 @@ parameters are a RESULT of the module parameters. --> @@ -20000,7 +20933,7 @@ parameters are a RESULT of the module parameters. --> @@ -20027,7 +20960,7 @@ parameters are a RESULT of the module parameters. --> @@ -20054,7 +20987,7 @@ parameters are a RESULT of the module parameters. --> @@ -20081,7 +21014,7 @@ parameters are a RESULT of the module parameters. --> @@ -20108,7 +21041,7 @@ parameters are a RESULT of the module parameters. --> @@ -20135,7 +21068,7 @@ parameters are a RESULT of the module parameters. --> @@ -20162,7 +21095,7 @@ parameters are a RESULT of the module parameters. --> @@ -20189,7 +21122,7 @@ parameters are a RESULT of the module parameters. --> @@ -20216,7 +21149,7 @@ parameters are a RESULT of the module parameters. --> @@ -20243,7 +21176,7 @@ parameters are a RESULT of the module parameters. --> @@ -20270,7 +21203,7 @@ parameters are a RESULT of the module parameters. --> @@ -20294,10 +21227,37 @@ parameters are a RESULT of the module parameters. --> nios2_gen2 clk + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clk_50 + clk + uart_0 + clk + @@ -20324,7 +21284,7 @@ parameters are a RESULT of the module parameters. --> @@ -20351,7 +21311,7 @@ parameters are a RESULT of the module parameters. --> @@ -20378,7 +21338,7 @@ parameters are a RESULT of the module parameters. --> @@ -20405,7 +21365,7 @@ parameters are a RESULT of the module parameters. --> @@ -20440,7 +21400,7 @@ parameters are a RESULT of the module parameters. --> @@ -20475,7 +21435,7 @@ parameters are a RESULT of the module parameters. --> @@ -20510,7 +21470,7 @@ parameters are a RESULT of the module parameters. --> @@ -20542,10 +21502,45 @@ parameters are a RESULT of the module parameters. --> timer irq + + + int + 4 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + nios2_gen2 + irq + uart_0 + irq + @@ -20572,7 +21567,7 @@ parameters are a RESULT of the module parameters. --> @@ -20599,7 +21594,7 @@ parameters are a RESULT of the module parameters. --> @@ -20626,7 +21621,7 @@ parameters are a RESULT of the module parameters. --> @@ -20653,7 +21648,7 @@ parameters are a RESULT of the module parameters. --> @@ -20680,7 +21675,7 @@ parameters are a RESULT of the module parameters. --> @@ -20707,7 +21702,7 @@ parameters are a RESULT of the module parameters. --> @@ -20734,7 +21729,7 @@ parameters are a RESULT of the module parameters. --> @@ -20761,7 +21756,7 @@ parameters are a RESULT of the module parameters. --> @@ -20788,7 +21783,7 @@ parameters are a RESULT of the module parameters. --> @@ -20815,7 +21810,7 @@ parameters are a RESULT of the module parameters. --> @@ -20842,7 +21837,7 @@ parameters are a RESULT of the module parameters. --> @@ -20869,7 +21864,7 @@ parameters are a RESULT of the module parameters. --> @@ -20896,7 +21891,7 @@ parameters are a RESULT of the module parameters. --> @@ -20923,7 +21918,7 @@ parameters are a RESULT of the module parameters. --> @@ -20950,7 +21945,7 @@ parameters are a RESULT of the module parameters. --> @@ -20977,7 +21972,7 @@ parameters are a RESULT of the module parameters. --> @@ -21004,7 +21999,7 @@ parameters are a RESULT of the module parameters. --> @@ -21028,10 +22023,37 @@ parameters are a RESULT of the module parameters. --> EEE_IMGPROC_0 reset + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clk_50 + clk_reset + uart_0 + reset + @@ -21058,7 +22080,7 @@ parameters are a RESULT of the module parameters. --> @@ -21085,7 +22107,7 @@ parameters are a RESULT of the module parameters. --> @@ -21112,7 +22134,7 @@ parameters are a RESULT of the module parameters. --> @@ -21139,7 +22161,7 @@ parameters are a RESULT of the module parameters. --> @@ -21166,7 +22188,7 @@ parameters are a RESULT of the module parameters. --> @@ -21193,7 +22215,7 @@ parameters are a RESULT of the module parameters. --> @@ -21220,7 +22242,7 @@ parameters are a RESULT of the module parameters. --> @@ -21247,7 +22269,7 @@ parameters are a RESULT of the module parameters. --> @@ -21274,7 +22296,7 @@ parameters are a RESULT of the module parameters. --> @@ -21301,7 +22323,7 @@ parameters are a RESULT of the module parameters. --> @@ -21328,7 +22350,7 @@ parameters are a RESULT of the module parameters. --> @@ -21355,7 +22377,7 @@ parameters are a RESULT of the module parameters. --> @@ -21382,7 +22404,7 @@ parameters are a RESULT of the module parameters. --> @@ -21409,7 +22431,7 @@ parameters are a RESULT of the module parameters. --> @@ -21436,7 +22458,7 @@ parameters are a RESULT of the module parameters. --> @@ -21463,7 +22485,7 @@ parameters are a RESULT of the module parameters. --> @@ -21490,7 +22512,7 @@ parameters are a RESULT of the module parameters. --> @@ -21514,10 +22536,37 @@ parameters are a RESULT of the module parameters. --> EEE_IMGPROC_0 reset + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + nios2_gen2 + debug_reset_request + uart_0 + reset + @@ -21550,20 +22599,20 @@ parameters are a RESULT of the module parameters. --> 1.0 - 19 + 20 clock_sink com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint Clock Input - 16.0 + 16.1 - 19 + 20 reset_sink com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint Reset Input - 16.0 + 16.1 4 @@ -21571,7 +22620,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint Avalon Streaming Sink - 16.0 + 16.1 4 @@ -21579,23 +22628,23 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint Avalon Streaming Source - 16.0 + 16.1 - 16 + 17 avalon_slave com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint Avalon Memory Mapped Slave - 16.0 + 16.1 - 14 + 15 conduit_end com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint Conduit - 16.0 + 16.1 1 @@ -21635,7 +22684,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint Avalon Memory Mapped Master - 16.0 + 16.1 1 @@ -21643,7 +22692,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IModule Avalon ALTPLL - 16.0 + 16.1 5 @@ -21651,7 +22700,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint Clock Output - 16.0 + 16.1 1 @@ -21659,7 +22708,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IModule Clock Source - 16.0 + 16.1 1 @@ -21667,7 +22716,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint Clock Input - 16.0 + 16.1 1 @@ -21675,7 +22724,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint Reset Input - 16.0 + 16.1 1 @@ -21683,7 +22732,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint Clock Output - 16.0 + 16.1 1 @@ -21691,7 +22740,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint Reset Output - 16.0 + 16.1 2 @@ -21702,12 +22751,12 @@ parameters are a RESULT of the module parameters. --> 12.0 - 4 + 5 interrupt_sender com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint Interrupt Sender - 16.0 + 16.1 1 @@ -21715,7 +22764,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IModule JTAG UART - 16.0 + 16.1 5 @@ -21723,7 +22772,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IModule PIO (Parallel I/O) - 16.0 + 16.1 1 @@ -21731,7 +22780,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IModule Nios II Processor - 16.0 + 16.1 1 @@ -21739,7 +22788,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint Interrupt Receiver - 16.0 + 16.1 1 @@ -21747,7 +22796,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint Reset Output - 16.0 + 16.1 1 @@ -21755,7 +22804,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint Custom Instruction Master - 16.0 + 16.1 1 @@ -21763,7 +22812,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IModule On-Chip Memory (RAM or ROM) - 16.0 + 16.1 1 @@ -21771,7 +22820,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IModule SDRAM Controller - 16.0 + 16.1 1 @@ -21779,7 +22828,7 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IModule System ID Peripheral - 16.0 + 16.1 1 @@ -21787,15 +22836,23 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IModule Interval Timer - 16.0 + 16.1 - 19 + 1 + altera_avalon_uart + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IModule + UART (RS-232 Serial Port) + 16.1 + + + 20 avalon com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IConnection Avalon Memory Mapped Connection - 16.0 + 16.1 4 @@ -21803,32 +22860,32 @@ parameters are a RESULT of the module parameters. --> com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IConnection Avalon Streaming Connection - 16.0 + 16.1 - 19 + 20 clock com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IConnection Clock Connection - 16.0 + 16.1 - 4 + 5 interrupt com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IConnection Interrupt Connection - 16.0 + 16.1 - 37 + 39 reset com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IConnection Reset Connection - 16.0 + 16.1 - 16.0 222 + 16.1 196 diff --git a/Vision/DE10_LITE_D8M_VIP_16/Qsys/Qsys.bsf b/Vision/DE10_LITE_D8M_VIP_16/Qsys/Qsys.bsf index a76fee8..52b4672 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/Qsys/Qsys.bsf +++ b/Vision/DE10_LITE_D8M_VIP_16/Qsys/Qsys.bsf @@ -21,9 +21,9 @@ agreement for further details. */ (header "symbol" (version "1.1")) (symbol - (rect 0 0 576 1072) + (rect 0 0 576 1128) (text "Qsys" (rect 273 -1 295 11)(font "Arial" (font_size 10))) - (text "inst" (rect 8 1056 20 1068)(font "Arial" )) + (text "inst" (rect 8 1112 20 1124)(font "Arial" )) (port (pt 0 72) (input) @@ -108,6 +108,13 @@ agreement for further details. (text "terasic_camera_0_conduit_end_PIXCLK" (rect 4 1029 214 1040)(font "Arial" (font_size 8))) (line (pt 0 1040)(pt 240 1040)(line_width 1)) ) + (port + (pt 0 1080) + (input) + (text "uart_0_rx_tx_rxd" (rect 0 0 71 12)(font "Arial" (font_size 8))) + (text "uart_0_rx_tx_rxd" (rect 4 1069 100 1080)(font "Arial" (font_size 8))) + (line (pt 0 1080)(pt 240 1080)(line_width 1)) + ) (port (pt 0 88) (output) @@ -269,6 +276,13 @@ agreement for further details. (text "sdram_wire_we_n" (rect 4 829 94 840)(font "Arial" (font_size 8))) (line (pt 0 840)(pt 240 840)(line_width 1)) ) + (port + (pt 0 1096) + (output) + (text "uart_0_rx_tx_txd" (rect 0 0 70 12)(font "Arial" (font_size 8))) + (text "uart_0_rx_tx_txd" (rect 4 1085 100 1096)(font "Arial" (font_size 8))) + (line (pt 0 1096)(pt 240 1096)(line_width 1)) + ) (port (pt 0 400) (bidir) @@ -380,11 +394,14 @@ agreement for further details. (text "FVAL" (rect 245 1003 514 2016)(font "Arial" (color 0 0 0))) (text "LVAL" (rect 245 1019 514 2048)(font "Arial" (color 0 0 0))) (text "PIXCLK" (rect 245 1035 526 2080)(font "Arial" (color 0 0 0))) - (text " Qsys " (rect 550 1056 1136 2122)(font "Arial" )) + (text "uart_0_rx_tx" (rect 166 1051 404 2115)(font "Arial" (color 128 0 0)(font_size 9))) + (text "rxd" (rect 245 1075 508 2160)(font "Arial" (color 0 0 0))) + (text "txd" (rect 245 1091 508 2192)(font "Arial" (color 0 0 0))) + (text " Qsys " (rect 550 1112 1136 2234)(font "Arial" )) (line (pt 240 32)(pt 336 32)(line_width 1)) - (line (pt 336 32)(pt 336 1056)(line_width 1)) - (line (pt 240 1056)(pt 336 1056)(line_width 1)) - (line (pt 240 32)(pt 240 1056)(line_width 1)) + (line (pt 336 32)(pt 336 1112)(line_width 1)) + (line (pt 240 1112)(pt 336 1112)(line_width 1)) + (line (pt 240 32)(pt 240 1112)(line_width 1)) (line (pt 241 52)(pt 241 204)(line_width 1)) (line (pt 242 52)(pt 242 204)(line_width 1)) (line (pt 241 220)(pt 241 244)(line_width 1)) @@ -423,9 +440,11 @@ agreement for further details. (line (pt 242 900)(pt 242 956)(line_width 1)) (line (pt 241 972)(pt 241 1044)(line_width 1)) (line (pt 242 972)(pt 242 1044)(line_width 1)) + (line (pt 241 1060)(pt 241 1100)(line_width 1)) + (line (pt 242 1060)(pt 242 1100)(line_width 1)) (line (pt 0 0)(pt 576 0)(line_width 1)) - (line (pt 576 0)(pt 576 1072)(line_width 1)) - (line (pt 0 1072)(pt 576 1072)(line_width 1)) - (line (pt 0 0)(pt 0 1072)(line_width 1)) + (line (pt 576 0)(pt 576 1128)(line_width 1)) + (line (pt 0 1128)(pt 576 1128)(line_width 1)) + (line (pt 0 0)(pt 0 1128)(line_width 1)) ) ) diff --git a/Vision/DE10_LITE_D8M_VIP_16/Qsys/Qsys.cmp b/Vision/DE10_LITE_D8M_VIP_16/Qsys/Qsys.cmp index 6375a52..d95fc65 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/Qsys/Qsys.cmp +++ b/Vision/DE10_LITE_D8M_VIP_16/Qsys/Qsys.cmp @@ -41,7 +41,9 @@ terasic_camera_0_conduit_end_D : in std_logic_vector(11 downto 0) := (others => 'X'); -- D terasic_camera_0_conduit_end_FVAL : in std_logic := 'X'; -- FVAL terasic_camera_0_conduit_end_LVAL : in std_logic := 'X'; -- LVAL - terasic_camera_0_conduit_end_PIXCLK : in std_logic := 'X' -- PIXCLK + terasic_camera_0_conduit_end_PIXCLK : in std_logic := 'X'; -- PIXCLK + uart_0_rx_tx_rxd : in std_logic := 'X'; -- rxd + uart_0_rx_tx_txd : out std_logic -- txd ); end component Qsys; diff --git a/Vision/DE10_LITE_D8M_VIP_16/Qsys/Qsys.html b/Vision/DE10_LITE_D8M_VIP_16/Qsys/Qsys.html index a8ca9c1..c09ce4a 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/Qsys/Qsys.html +++ b/Vision/DE10_LITE_D8M_VIP_16/Qsys/Qsys.html @@ -67,7 +67,7 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord - +
    2021.05.27.17:50:162021.06.03.15:09:34 Datasheet
    @@ -137,7 +137,10 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord     altera_avalon_sysid_qsys 16.1
       timer - altera_avalon_timer 16.1 + altera_avalon_timer 16.1 +
       + uart_0 + altera_avalon_uart 16.1

    @@ -432,6 +435,23 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord 0x00041000 + +   + uart_0 + + + + + + + + + s1  + + + 0x00042020 + +
    @@ -3115,7 +3135,7 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord clk_50 clk   - nios2_gen2 + nios2_gen2   clk @@ -3530,6 +3550,42 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord + + + + data_master   + + uart_0 + + + + + +   s1 + + + + + irq   + + + + +   irq + + + + + debug_reset_request   + + + + +   reset + + + + @@ -4282,7 +4338,7 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord instSlaveMapParam - <address-map><slave name='onchip_memory2_0.s1' start='0x20000' end='0x386A0' type='altera_avalon_onchip_memory2.s1' /><slave name='nios2_gen2.debug_mem_slave' start='0x40800' end='0x41000' type='altera_nios2_gen2.debug_mem_slave' /></address-map> + <address-map><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' type='altera_avalon_onchip_memory2.s1' /><slave name='nios2_gen2.debug_mem_slave' start='0x40800' end='0x41000' type='altera_nios2_gen2.debug_mem_slave' /></address-map> faSlaveMapParam @@ -4290,7 +4346,7 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord dataSlaveMapParam - <address-map><slave name='onchip_memory2_0.s1' start='0x20000' end='0x386A0' type='altera_avalon_onchip_memory2.s1' /><slave name='nios2_gen2.debug_mem_slave' start='0x40800' end='0x41000' type='altera_nios2_gen2.debug_mem_slave' /><slave name='timer.s1' start='0x41000' end='0x41020' type='altera_avalon_timer.s1' /><slave name='TERASIC_AUTO_FOCUS_0.mm_ctrl' start='0x41020' end='0x41040' type='TERASIC_AUTO_FOCUS.mm_ctrl' /><slave name='i2c_opencores_camera.avalon_slave_0' start='0x41040' end='0x41060' type='i2c_opencores.avalon_slave_0' /><slave name='i2c_opencores_mipi.avalon_slave_0' start='0x41060' end='0x41080' type='i2c_opencores.avalon_slave_0' /><slave name='mipi_pwdn_n.s1' start='0x41080' end='0x41090' type='altera_avalon_pio.s1' /><slave name='mipi_reset_n.s1' start='0x41090' end='0x410A0' type='altera_avalon_pio.s1' /><slave name='key.s1' start='0x410A0' end='0x410B0' type='altera_avalon_pio.s1' /><slave name='sw.s1' start='0x410B0' end='0x410C0' type='altera_avalon_pio.s1' /><slave name='led.s1' start='0x410C0' end='0x410D0' type='altera_avalon_pio.s1' /><slave name='altpll_0.pll_slave' start='0x410D0' end='0x410E0' type='altpll.pll_slave' /><slave name='sysid_qsys.control_slave' start='0x410E0' end='0x410E8' type='altera_avalon_sysid_qsys.control_slave' /><slave name='jtag_uart.avalon_jtag_slave' start='0x410E8' end='0x410F0' type='altera_avalon_jtag_uart.avalon_jtag_slave' /><slave name='EEE_IMGPROC_0.s1' start='0x42000' end='0x42020' type='EEE_IMGPROC.s1' /></address-map> + <address-map><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' type='altera_avalon_onchip_memory2.s1' /><slave name='nios2_gen2.debug_mem_slave' start='0x40800' end='0x41000' type='altera_nios2_gen2.debug_mem_slave' /><slave name='timer.s1' start='0x41000' end='0x41020' type='altera_avalon_timer.s1' /><slave name='TERASIC_AUTO_FOCUS_0.mm_ctrl' start='0x41020' end='0x41040' type='TERASIC_AUTO_FOCUS.mm_ctrl' /><slave name='i2c_opencores_camera.avalon_slave_0' start='0x41040' end='0x41060' type='i2c_opencores.avalon_slave_0' /><slave name='i2c_opencores_mipi.avalon_slave_0' start='0x41060' end='0x41080' type='i2c_opencores.avalon_slave_0' /><slave name='mipi_pwdn_n.s1' start='0x41080' end='0x41090' type='altera_avalon_pio.s1' /><slave name='mipi_reset_n.s1' start='0x41090' end='0x410A0' type='altera_avalon_pio.s1' /><slave name='key.s1' start='0x410A0' end='0x410B0' type='altera_avalon_pio.s1' /><slave name='sw.s1' start='0x410B0' end='0x410C0' type='altera_avalon_pio.s1' /><slave name='led.s1' start='0x410C0' end='0x410D0' type='altera_avalon_pio.s1' /><slave name='altpll_0.pll_slave' start='0x410D0' end='0x410E0' type='altpll.pll_slave' /><slave name='sysid_qsys.control_slave' start='0x410E0' end='0x410E8' type='altera_avalon_sysid_qsys.control_slave' /><slave name='jtag_uart.avalon_jtag_slave' start='0x410E8' end='0x410F0' type='altera_avalon_jtag_uart.avalon_jtag_slave' /><slave name='EEE_IMGPROC_0.s1' start='0x42000' end='0x42020' type='EEE_IMGPROC.s1' /><slave name='uart_0.s1' start='0x42020' end='0x42040' type='altera_avalon_uart.s1' /></address-map> tightlyCoupledDataMaster0MapParam @@ -4342,7 +4398,7 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord internalIrqMaskSystemInfo - 15 + 31 customInstSlavesSystemInfo @@ -4632,7 +4688,7 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord memorySize - 100000 + 131072 readDuringWriteMode @@ -4793,7 +4849,7 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord SIZE_VALUE - 100000 + 131072 WRITABLE @@ -5358,7 +5414,7 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord timestamp - 1622134216 + 1622729373 deviceFamily @@ -5383,7 +5439,7 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord TIMESTAMP - 1622134216 + 1622729373 @@ -5584,10 +5640,196 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord
    + +
    +
    +

    uart_0

    altera_avalon_uart v16.1 +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    + nios2_gen2 + data_master  uart_0
      s1
    irq  
      irq
    debug_reset_request  
      reset
    + clk_50 + clk  
      clk
    clk_reset  
      reset
    +
    +
    +
    + + + + +
    +

    Parameters

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    baud115200
    dataBits8
    fixedBaudtrue
    parityNONE
    simCharStream
    simInteractiveInputEnablefalse
    simInteractiveOutputEnablefalse
    simTrueBaudfalse
    stopBits1
    syncRegDepth2
    useCtsRtsfalse
    useEopRegisterfalse
    useRelativePathForSimFilefalse
    clockRate50000000
    baudError0.01
    parityFisrtCharN
    deviceFamilyUNKNOWN
    generateLegacySimfalse
    +
       + + + + +
    +

    Software Assignments

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    BAUD115200
    DATA_BITS8
    FIXED_BAUD1
    FREQ50000000
    PARITY'N'
    SIM_CHAR_STREAM""
    SIM_TRUE_BAUD0
    STOP_BITS1
    SYNC_REG_DEPTH2
    USE_CTS_RTS0
    USE_EOP_REGISTER0
    +
    +
    - - + +
    generation took 0.01 secondsrendering took 0.08 secondsgeneration took 0.00 secondsrendering took 0.03 seconds
    diff --git a/Vision/DE10_LITE_D8M_VIP_16/Qsys/Qsys.xml b/Vision/DE10_LITE_D8M_VIP_16/Qsys/Qsys.xml index dc8c9a7..e975755 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/Qsys/Qsys.xml +++ b/Vision/DE10_LITE_D8M_VIP_16/Qsys/Qsys.xml @@ -1,7 +1,7 @@ + date="2021.06.03.15:10:09" + outputDirectory="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/"> + + + + + + - + @@ -309,1770 +315,1774 @@ + - + + + path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_AUTO_FOCUS/TERASIC_AUTO_FOCUS_hw.tcl" /> + path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/TERASIC_CAMERA_hw.tcl" /> + path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/TERASIC_CAMERA.v" /> + path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/CAMERA_RGB.v" /> + path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/CAMERA_Bayer.v" /> + path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/Bayer2RGB.v" /> + path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/Bayer_LineBuffer.v" /> + path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/rgb_fifo.v" /> + path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/add2.v" /> + path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/add4.v" /> + path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/alt_vip_itc_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid.sv" /> + path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid_sync_compare.v" /> + path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid_calculate_mode.v" /> + path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid_control.v" /> + path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid_mode_banks.sv" /> + path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid_statemachine.v" /> + path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_fifo.v" /> + path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_generic_count.v" /> + path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_to_binary.v" /> + path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_sync.v" /> + path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_trigger_sync.v" /> + path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_sync_generation.v" /> + path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_frame_counter.v" /> + path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_sample_counter.v" /> + path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/alt_vipitc131_cvo.sdc" /> + path="F:/intelfpga_lite/16.1/ip/altera/frame_buffer/lib/alt_vip_vfb.cpp" /> + - + path="F:/intelfpga_lite/16.1/ip/altera/frame_buffer/lib/vip_constants.h" /> + path="F:/intelfpga_lite/16.1/ip/altera/frame_buffer/lib/vip_elementclass_info.h" /> + path="F:/intelfpga_lite/16.1/ip/altera/frame_buffer/lib/vip_vfb_hwfast.hpp" /> + - + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/alt_cdfg_types.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/alt_cusp_synth.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/alt_exception.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/alt_lib_types.h" /> + - + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_au.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_avalon_eb.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_avalon_mm.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_avalon_st.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_cmp.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_fifo.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_fifo_paged.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_fp_au.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_fp_cmp.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_fp_mult.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_gpio.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_immed.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_mac.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_mem.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_mult.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_multadd.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_reg.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_shift.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_tapped_delay.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_avalon_bus.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_avalon_eb_channel.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_avalon_st_channel.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_debug.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_exit.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_overlay.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_pc.h" /> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cassert" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cctype" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/climits" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/config/stl_confix.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/config/stl_cusp.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/config/stlcomp.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cstddef" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cstdio" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cstdlib" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cstring" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/ctype.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/exception" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/fstream" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/iosfwd" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/iostream" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/math.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/memory" /> + - + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/pthread.h" /> + - + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/sstream" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stdarg.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stddef.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stdexcept" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stdio.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stdlib.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_algobase.c" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_algobase.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_alloc.c" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_alloc.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_auto_ptr.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_bvector.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_config.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_config_compat.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_config_compat_post.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_construct.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_ctraits_fns.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_ctype.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_cwchar.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_epilog.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_function.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_function_adaptors.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_function_base.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_hash_fun.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_iterator.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_iterator_base.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_locale.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_new.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_pair.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_prolog.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_range_errors.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_raw_storage_iter.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_relops_cont.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_set.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_site_config.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string.c" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string_fwd.c" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string_fwd.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string_hash.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string_io.c" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string_io.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_tempbuf.c" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_tempbuf.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_threads.c" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_threads.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_tree.c" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_tree.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_uninitialized.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_vector.c" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_vector.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/c_locale.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/type_traits.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl_user_config.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/string" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/string.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/typeinfo" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/cstring" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/fstream" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/iosfwd" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/iostream" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/istream" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/ostream" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/sstream" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/vector" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/wrap_std/fstream" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/wrap_std/iosfwd" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/wrap_std/iostream" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/wrap_std/sstream" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_buffer.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_clock.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_clock_ports.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_communication_ids.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_event_finder.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_event_queue.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_export.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_fifo.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_fifo_ifs.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_fifo_ports.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_interface.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_mutex.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_mutex_if.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_port.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_prim_channel.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_semaphore.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_semaphore_if.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal_ifs.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal_ports.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal_resolved.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal_resolved_ports.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal_rv.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal_rv_ports.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_bit.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_bit_ids.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_bit_proxies.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_bv.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_bv_base.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_logic.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_lv.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_lv_base.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_proxy.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/fx.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_context.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fix.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fixed.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fx_ids.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxcast_switch.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxdefs.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxnum.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxnum_observer.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxtype_params.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxval.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxval_observer.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_ufix.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_ufixed.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_ieee.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_mant.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_other_defs.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_params.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_rep.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_string.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_utils.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_bigint.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_biguint.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_int.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_int_base.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_int_ids.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_length_param.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_nbdefs.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_nbexterns.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_nbutils.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_signed.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_uint.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_uint_base.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_unsigned.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/misc/sc_concatref.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/misc/sc_value_base.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_attribute.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_cmnhdr.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_constants.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_event.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_externs.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_kernel_ids.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_lambda.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_lambda_defs.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_lambda_exps.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_lambda_friends.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_macros.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_module.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_module_name.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_object.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_process.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_process_b.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_process_host.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_sensitive.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_simcontext.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_time.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_ver.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_wait.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_wait_cthread.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/tracing/sc_trace.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/tracing/sc_vcd_trace.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/tracing/sc_wif_trace.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_hash.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_iostream.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_list.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_mempool.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_pq.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_report.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_report_handler.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_string.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_temporary.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_vector.h" /> + + - - + path="F:/intelFPGA_lite/16.1/ip/altera/frame_buffer/lib/ip_toolbench/frame_buffer.jar" /> + path="F:/intelFPGA_lite/16.1/ip/altera/frame_buffer/lib/ip_toolbench/forms_rt.jar" /> + path="F:/intelFPGA_lite/16.1/ip/altera/frame_buffer/lib/ip_toolbench/jdom.jar" /> + path="F:/intelFPGA_lite/16.1/ip/altera/common/ip_toolbench/v1.3.0/bin/launcher.jar" /> + path="F:/intelFPGA_lite/16.1/ip/altera/common/ip_toolbench/v1.3.0/bin/flowbase.jar" /> + path="F:/intelFPGA_lite/16.1/ip/altera/common/ip_toolbench/v1.3.0/bin/flowmanager.jar" /> + path="F:/intelFPGA_lite/16.1/ip/altera/common/ip_toolbench/v1.3.0/bin/util/jptf.jar" /> + path="F:/intelFPGA_lite/16.1/ip/altera/common/lib/com.altera.megawizard2.jar" /> + path="F:/intelfpga_lite/16.1/ip/altera/frame_buffer/lib/alt_vip_vfb.cpp" /> + - + path="F:/intelfpga_lite/16.1/ip/altera/frame_buffer/lib/vip_constants.h" /> + path="F:/intelfpga_lite/16.1/ip/altera/frame_buffer/lib/vip_elementclass_info.h" /> + path="F:/intelfpga_lite/16.1/ip/altera/frame_buffer/lib/vip_vfb_hwfast.hpp" /> + - + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/alt_cdfg_types.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/alt_cusp_synth.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/alt_exception.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/alt_lib_types.h" /> + - + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_au.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_avalon_eb.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_avalon_mm.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_avalon_st.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_cmp.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_fifo.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_fifo_paged.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_fp_au.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_fp_cmp.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_fp_mult.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_gpio.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_immed.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_mac.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_mem.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_mult.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_multadd.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_reg.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_shift.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_tapped_delay.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_avalon_bus.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_avalon_eb_channel.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_avalon_st_channel.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_debug.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_exit.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_overlay.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_pc.h" /> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cassert" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cctype" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/climits" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/config/stl_confix.h" /> + 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path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_lambda_friends.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_macros.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_module.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_module_name.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_object.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_process.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_process_b.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_process_host.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_sensitive.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_simcontext.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_time.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_ver.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_wait.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_wait_cthread.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/tracing/sc_trace.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/tracing/sc_vcd_trace.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/tracing/sc_wif_trace.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_hash.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_iostream.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_list.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_mempool.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_pq.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_report.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_report_handler.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_string.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_temporary.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_vector.h" /> + + - - + path="F:/intelFPGA_lite/16.1/ip/altera/frame_buffer/lib/ip_toolbench/frame_buffer.jar" /> + path="F:/intelFPGA_lite/16.1/ip/altera/frame_buffer/lib/ip_toolbench/forms_rt.jar" /> + path="F:/intelFPGA_lite/16.1/ip/altera/frame_buffer/lib/ip_toolbench/jdom.jar" /> + path="F:/intelFPGA_lite/16.1/ip/altera/common/ip_toolbench/v1.3.0/bin/launcher.jar" /> + path="F:/intelFPGA_lite/16.1/ip/altera/common/ip_toolbench/v1.3.0/bin/flowbase.jar" /> + path="F:/intelFPGA_lite/16.1/ip/altera/common/ip_toolbench/v1.3.0/bin/flowmanager.jar" /> + path="F:/intelFPGA_lite/16.1/ip/altera/common/ip_toolbench/v1.3.0/bin/util/jptf.jar" /> + path="F:/intelFPGA_lite/16.1/ip/altera/common/lib/com.altera.megawizard2.jar" /> + path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_altpll/altera_avalon_altpll_hw.tcl" /> + path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/i2c_opencores/i2c_opencores_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_jtag_uart/altera_avalon_jtag_uart_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_pio/altera_avalon_pio_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_pio/altera_avalon_pio_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_pio/altera_avalon_pio_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/nios2_ip/altera_nios2_gen2/altera_nios2_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/nios2_ip/altera_nios2_gen2/altera_nios2_unit_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/altera_avalon_onchip_memory2_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_new_sdram_controller/altera_avalon_new_sdram_controller_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_pio/altera_avalon_pio_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_sysid_qsys/altera_avalon_sysid_qsys_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_timer/altera_avalon_timer_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_uart/altera_avalon_uart_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_mm_interconnect/altera_mm_interconnect_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_master_translator/altera_merlin_master_translator_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_slave_translator/altera_merlin_slave_translator_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_master_agent/altera_merlin_master_agent_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_slave_agent/altera_merlin_slave_agent_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo.v" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_traffic_limiter/altera_merlin_traffic_limiter_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_handshake_clock_crosser/altera_avalon_st_handshake_clock_crosser_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_handshake_clock_crosser/altera_avalon_st_handshake_clock_crosser.v" /> + path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_adapter/altera_avalon_st_adapter_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_error_adapter/avalon-st_error_adapter_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_mm_interconnect/altera_mm_interconnect_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_master_translator/altera_merlin_master_translator_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_slave_translator/altera_merlin_slave_translator_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_master_agent/altera_merlin_master_agent_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_slave_agent/altera_merlin_slave_agent_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo.v" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_burst_adapter/altera_merlin_burst_adapter_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_width_adapter/altera_merlin_width_adapter_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_adapter/altera_avalon_st_adapter_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_error_adapter/avalon-st_error_adapter_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_irq_mapper/altera_irq_mapper_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_reset_controller/altera_reset_controller_hw.tcl" /> queue size: 0 starting:Qsys "Qsys" @@ -2081,10 +2091,10 @@ Transform: CustomInstructionTransform No custom instruction connections, skipping transform - 20     modules, 83 connections]]> + 21     modules, 88 connections]]> Transform: MMTransform Transform: InitialInterconnectTransform - 16

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zzLU+(ubU;&W-V~8iz3TH@WPmaq^V8`-@y5M)j?>Tgl#_$;n@_^*5x)w>d*T*-Tw(# z_kbz&M$?o}*g}3k*)Da~L9cY+X=3U5$7}p@AlP>4mA$J;fHX~aOtb+WAGAVxy4pM| z26Ov;+G-1`@`}%2E-lLWGtsI!p0*luGdhQ}v+4wFs~8#XsX33>2`L#|6T$F!&|XmS z9R(TL1_T@7*xS{NejbS&fp$|Pf{e*wVzb7Q(gv0cIqk?N8uElnBh@Ta+6X0G;1)`N zAi1)oPZ^cuuAcE}>nS`xx$jT(9&Qe#8gNu89qQVouhHrxNX#8^gX8D-=Y zzN1`$?}$q6cjW)O#l}magV2n3lXUAb8q~9}Di~8G3%Ww|1}%V(SGW$tl8=o8PVu1F zvIIZ%5@KT`bCV%fj0u!vm`w}Dd?maDZi3NRQftgcDM83pEL%?2fJLdN5g244M@E

     modules, 61 connections]]> + 17     modules, 65 connections]]> Transform: TerminalIdAssignmentUpdateTransform Transform: DefaultSlaveTransform Transform: TranslatorTransform @@ -2139,7 +2149,10 @@ - 33     modules, 128 connections]]> + + + + 35     modules, 136 connections]]> Transform: IDPadTransform Transform: DomainTransform Transform merlin_domain_transform not run on matched interfaces nios2_gen2.data_master and nios2_gen2_data_master_translator.avalon_anti_master_0 @@ -2285,6 +2298,15 @@ + + + + + + + + + Transform merlin_domain_transform not run on matched interfaces jtag_uart_avalon_jtag_slave_translator.avalon_anti_slave_0 and jtag_uart.avalon_jtag_slave Transform merlin_domain_transform not run on matched interfaces i2c_opencores_mipi_avalon_slave_0_translator.avalon_anti_slave_0 and i2c_opencores_mipi.avalon_slave_0 Transform merlin_domain_transform not run on matched interfaces i2c_opencores_camera_avalon_slave_0_translator.avalon_anti_slave_0 and i2c_opencores_camera.avalon_slave_0 @@ -2300,7 +2322,8 @@ Transform merlin_domain_transform not run on matched interfaces mipi_reset_n_s1_translator.avalon_anti_slave_0 and mipi_reset_n.s1 Transform merlin_domain_transform not run on matched interfaces mipi_pwdn_n_s1_translator.avalon_anti_slave_0 and mipi_pwdn_n.s1 Transform merlin_domain_transform not run on matched interfaces EEE_IMGPROC_0_s1_translator.avalon_anti_slave_0 and EEE_IMGPROC_0.s1 - 68     modules, 359 connections]]> + Transform merlin_domain_transform not run on matched interfaces uart_0_s1_translator.avalon_anti_slave_0 and uart_0.s1 + 72     modules, 381 connections]]> Transform: RouterTransform @@ -2353,7 +2376,10 @@ - 85     modules, 426 connections]]> + + + + 90     modules, 452 connections]]> Transform: TrafficLimiterTransform @@ -2361,7 +2387,7 @@ - 87     modules, 436 connections]]> + 92     modules, 462 connections]]> Transform: BurstTransform Transform: TreeTransform Transform: NetworkToSwitchTransform @@ -2467,7 +2493,13 @@ - 120     modules, 520 connections]]> + + + + + + + 127     modules, 551 connections]]> Transform: WidthTransform Transform: RouterTableTransform Transform: ThreadIDMappingTableTransform @@ -2490,12 +2522,12 @@ 124 modules, 548 connections]]> + culprit="com_altera_sopcmodel_transforms_avalon_ClockCrossingTransform">131 modules, 579 connections]]> Transform: PipelineTransform Transform: SpotPipelineTransform Transform: PerformanceMonitorTransform Transform: TrafficLimiterUpdateTransform - 124 modules, 550 connections]]> + 131 modules, 581 connections]]> Transform: InsertClockAndResetBridgesTransform @@ -2512,13 +2544,13 @@ - 129 modules, 682 connections]]> + 136 modules, 720 connections]]> Transform: InterconnectConnectionsTagger Transform: HierarchyTransform - 21 modules, 90 connections]]> + 22 modules, 95 connections]]> Transform: InitialInterconnectTransform 5 modules, 8 connections]]> Transform: TerminalIdAssignmentUpdateTransform @@ -2621,13 +2653,13 @@ - 22 modules, 94 connections]]> - 22 modules, 94 connections]]> + 23 modules, 99 connections]]> + 23 modules, 99 connections]]> Transform: InterruptMapperTransform - 23 modules, 98 connections]]> + 24 modules, 103 connections]]> Transform: InterruptSyncTransform Transform: InterruptFanoutTransform Transform: AvalonStreamingTransform @@ -2644,7 +2676,7 @@ - 27 modules, 97 connections]]> + 28 modules, 102 connections]]> Qsys" reuses EEE_IMGPROC "submodules/EEE_IMGPROC"]]> Qsys" reuses TERASIC_AUTO_FOCUS "submodules/TERASIC_AUTO_FOCUS"]]> Qsys" reuses TERASIC_CAMERA "submodules/TERASIC_CAMERA"]]> @@ -2664,41 +2696,42 @@ Qsys" reuses altera_avalon_pio "submodules/Qsys_sw"]]> Qsys" reuses altera_avalon_sysid_qsys "submodules/Qsys_sysid_qsys"]]> Qsys" reuses altera_avalon_timer "submodules/Qsys_timer"]]> + Qsys" reuses altera_avalon_uart "submodules/Qsys_uart_0"]]> Qsys" reuses altera_mm_interconnect "submodules/Qsys_mm_interconnect_0"]]> Qsys" reuses altera_mm_interconnect "submodules/Qsys_mm_interconnect_1"]]> Qsys" reuses altera_irq_mapper "submodules/Qsys_irq_mapper"]]> Qsys" reuses altera_reset_controller "submodules/altera_reset_controller"]]> Qsys" reuses altera_reset_controller "submodules/altera_reset_controller"]]> Qsys" reuses altera_reset_controller "submodules/altera_reset_controller"]]> - queue size: 24 starting:EEE_IMGPROC "submodules/EEE_IMGPROC" + queue size: 25 starting:EEE_IMGPROC "submodules/EEE_IMGPROC" Qsys" instantiated EEE_IMGPROC "EEE_IMGPROC_0"]]> - queue size: 23 starting:TERASIC_AUTO_FOCUS "submodules/TERASIC_AUTO_FOCUS" + queue size: 24 starting:TERASIC_AUTO_FOCUS "submodules/TERASIC_AUTO_FOCUS" Qsys" instantiated TERASIC_AUTO_FOCUS "TERASIC_AUTO_FOCUS_0"]]> - queue size: 22 starting:TERASIC_CAMERA "submodules/TERASIC_CAMERA" + queue size: 23 starting:TERASIC_CAMERA "submodules/TERASIC_CAMERA" set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files - Command: C:/intelfpga_lite/16.1/quartus\bin64/quartus_sh.exe -t C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0002_sopcqmap/not_a_project_setup.tcl - Command: C:/intelfpga_lite/16.1/quartus\bin64/quartus_map.exe not_a_project --generate_hdl_interface=C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/TERASIC_CAMERA.v --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0002_sopcqmap/ --ini=disable_check_quartus_compatibility_qsys_only=on - Command took 0.625s - Command took 0.719s + Command: F:/intelfpga_lite/16.1/quartus\bin64/quartus_sh.exe -t C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0054_sopcqmap/not_a_project_setup.tcl + Command: F:/intelfpga_lite/16.1/quartus\bin64/quartus_map.exe not_a_project --generate_hdl_interface=F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/TERASIC_CAMERA.v --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0054_sopcqmap/ --ini=disable_check_quartus_compatibility_qsys_only=on + Command took 0.590s + Command took 0.627s set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files - Command: C:/intelfpga_lite/16.1/quartus\bin64/quartus_sh.exe -t C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0005_sopcqmap/not_a_project_setup.tcl - Command: C:/intelfpga_lite/16.1/quartus\bin64/quartus_map.exe not_a_project --generate_hdl_interface=C:\Users\Anish Ghanekar\OneDrive - Imperial College London\GitHub\EE2Rover\Vision\DE10_LITE_D8M_VIP_16\ip\TERASIC_CAMERA\TERASIC_CAMERA.v --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0005_sopcqmap/ --set=HDL_INTERFACE_INSTANCE_NAME=inst --set=HDL_INTERFACE_INSTANCE_ENTITY=TERASIC_CAMERA "--set=HDL_INTERFACE_INSTANCE_PARAMETERS=VIDEO_W=D\"640\";VIDEO_H=D\"480\";" --ini=disable_check_quartus_compatibility_qsys_only=on - Command took 0.614s - Command took 0.704s + Command: F:/intelfpga_lite/16.1/quartus\bin64/quartus_sh.exe -t C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0057_sopcqmap/not_a_project_setup.tcl + Command: F:/intelfpga_lite/16.1/quartus\bin64/quartus_map.exe not_a_project --generate_hdl_interface=F:\Ed\Stuff\EEE2Rover\DE10_LITE_D8M_VIP_16\ip\TERASIC_CAMERA\TERASIC_CAMERA.v --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0057_sopcqmap/ --set=HDL_INTERFACE_INSTANCE_NAME=inst --set=HDL_INTERFACE_INSTANCE_ENTITY=TERASIC_CAMERA "--set=HDL_INTERFACE_INSTANCE_PARAMETERS=VIDEO_W=D\"640\";VIDEO_H=D\"480\";" --ini=disable_check_quartus_compatibility_qsys_only=on + Command took 0.533s + Command took 0.605s Qsys" instantiated TERASIC_CAMERA "TERASIC_CAMERA_0"]]> - queue size: 21 starting:alt_vip_itc "submodules/alt_vipitc131_IS2Vid" + queue size: 22 starting:alt_vip_itc "submodules/alt_vipitc131_IS2Vid" set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files - Command: C:/intelfpga_lite/16.1/quartus\bin64/quartus_sh.exe -t C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0006_sopcqmap/not_a_project_setup.tcl - Command: C:/intelfpga_lite/16.1/quartus\bin64/quartus_map.exe not_a_project --generate_hdl_interface=C:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid.sv --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0006_sopcqmap/ --ini=disable_check_quartus_compatibility_qsys_only=on - Command took 0.616s - Command took 0.718s + Command: F:/intelfpga_lite/16.1/quartus\bin64/quartus_sh.exe -t C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0058_sopcqmap/not_a_project_setup.tcl + Command: F:/intelfpga_lite/16.1/quartus\bin64/quartus_map.exe not_a_project --generate_hdl_interface=F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid.sv --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0058_sopcqmap/ --ini=disable_check_quartus_compatibility_qsys_only=on + Command took 0.524s + Command took 0.629s set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files - Command: C:/intelfpga_lite/16.1/quartus\bin64/quartus_sh.exe -t C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0007_sopcqmap/not_a_project_setup.tcl - Command: C:/intelfpga_lite/16.1/quartus\bin64/quartus_map.exe not_a_project --generate_hdl_interface=C:\intelfpga_lite\16.1\ip\altera\clocked_video_output\src_hdl\alt_vipitc131_IS2Vid.sv --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0007_sopcqmap/ --set=HDL_INTERFACE_INSTANCE_NAME=inst --set=HDL_INTERFACE_INSTANCE_ENTITY=alt_vipitc131_IS2Vid "--set=HDL_INTERFACE_INSTANCE_PARAMETERS=NUMBER_OF_COLOUR_PLANES=D\"3\";COLOUR_PLANES_ARE_IN_PARALLEL=D\"1\";BPS=D\"8\";INTERLACED=D\"0\";H_ACTIVE_PIXELS=D\"640\";V_ACTIVE_LINES=D\"480\";ACCEPT_COLOURS_IN_SEQ=D\"0\";FIFO_DEPTH=D\"640\";CLOCKS_ARE_SAME=D\"0\";USE_CONTROL=D\"0\";NO_OF_MODES=D\"1\";THRESHOLD=D\"639\";STD_WIDTH=D\"1\";GENERATE_SYNC=D\"0\";USE_EMBEDDED_SYNCS=D\"0\";AP_LINE=D\"0\";V_BLANK=D\"0\";H_BLANK=D\"0\";H_SYNC_LENGTH=D\"96\";H_FRONT_PORCH=D\"16\";H_BACK_PORCH=D\"48\";V_SYNC_LENGTH=D\"2\";V_FRONT_PORCH=D\"10\";V_BACK_PORCH=D\"33\";F_RISING_EDGE=D\"0\";F_FALLING_EDGE=D\"0\";FIELD0_V_RISING_EDGE=D\"0\";FIELD0_V_BLANK=D\"0\";FIELD0_V_SYNC_LENGTH=D\"0\";FIELD0_V_FRONT_PORCH=D\"0\";FIELD0_V_BACK_PORCH=D\"0\";ANC_LINE=D\"0\";FIELD0_ANC_LINE=D\"0\";" --ini=disable_check_quartus_compatibility_qsys_only=on - Command took 0.588s - Command took 0.750s + Command: F:/intelfpga_lite/16.1/quartus\bin64/quartus_sh.exe -t C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0059_sopcqmap/not_a_project_setup.tcl + Command: F:/intelfpga_lite/16.1/quartus\bin64/quartus_map.exe not_a_project --generate_hdl_interface=F:\intelfpga_lite\16.1\ip\altera\clocked_video_output\src_hdl\alt_vipitc131_IS2Vid.sv --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0059_sopcqmap/ --set=HDL_INTERFACE_INSTANCE_NAME=inst --set=HDL_INTERFACE_INSTANCE_ENTITY=alt_vipitc131_IS2Vid "--set=HDL_INTERFACE_INSTANCE_PARAMETERS=NUMBER_OF_COLOUR_PLANES=D\"3\";COLOUR_PLANES_ARE_IN_PARALLEL=D\"1\";BPS=D\"8\";INTERLACED=D\"0\";H_ACTIVE_PIXELS=D\"640\";V_ACTIVE_LINES=D\"480\";ACCEPT_COLOURS_IN_SEQ=D\"0\";FIFO_DEPTH=D\"640\";CLOCKS_ARE_SAME=D\"0\";USE_CONTROL=D\"0\";NO_OF_MODES=D\"1\";THRESHOLD=D\"639\";STD_WIDTH=D\"1\";GENERATE_SYNC=D\"0\";USE_EMBEDDED_SYNCS=D\"0\";AP_LINE=D\"0\";V_BLANK=D\"0\";H_BLANK=D\"0\";H_SYNC_LENGTH=D\"96\";H_FRONT_PORCH=D\"16\";H_BACK_PORCH=D\"48\";V_SYNC_LENGTH=D\"2\";V_FRONT_PORCH=D\"10\";V_BACK_PORCH=D\"33\";F_RISING_EDGE=D\"0\";F_FALLING_EDGE=D\"0\";FIELD0_V_RISING_EDGE=D\"0\";FIELD0_V_BLANK=D\"0\";FIELD0_V_SYNC_LENGTH=D\"0\";FIELD0_V_FRONT_PORCH=D\"0\";FIELD0_V_BACK_PORCH=D\"0\";ANC_LINE=D\"0\";FIELD0_ANC_LINE=D\"0\";" --ini=disable_check_quartus_compatibility_qsys_only=on + Command took 0.527s + Command took 0.635s Qsys" instantiated alt_vip_itc "alt_vip_itc_0"]]> - queue size: 20 starting:alt_vip_vfb "submodules/Qsys_alt_vip_vfb_0" + queue size: 21 starting:alt_vip_vfb "submodules/Qsys_alt_vip_vfb_0" alt_vip_vfb_0" reuses alt_cusp_muxbin2 "submodules/alt_cusp161_muxbin2"]]> alt_vip_vfb_0" reuses alt_cusp_muxbin2 "submodules/alt_cusp161_muxbin2"]]> alt_vip_vfb_0" reuses alt_au "submodules/alt_cusp161_au"]]> @@ -2899,67 +2932,67 @@ dut" reuses alt_cusp_testbench_clock "submodules/alt_cusp161_clock_reset"]]> dut" reuses alt_vip_vfb "submodules/Qsys_alt_vip_vfb_0"]]> Qsys" instantiated alt_vip_vfb "alt_vip_vfb_0"]]> - queue size: 343 starting:alt_cusp_muxbin2 "submodules/alt_cusp161_muxbin2" + queue size: 350 starting:alt_cusp_muxbin2 "submodules/alt_cusp161_muxbin2" alt_vip_vfb_0" instantiated alt_cusp_muxbin2 "vfb_writer_packet_write_address_au_l_muxinst"]]> - queue size: 341 starting:alt_au "submodules/alt_cusp161_au" + queue size: 348 starting:alt_au "submodules/alt_cusp161_au" alt_vip_vfb_0" instantiated alt_au "vfb_writer_packet_write_address_au"]]> - queue size: 332 starting:alt_reg "submodules/alt_cusp161_reg" + queue size: 339 starting:alt_reg "submodules/alt_cusp161_reg" alt_vip_vfb_0" instantiated alt_reg "vfb_writer_overflow_flag_reg"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> - queue size: 331 starting:alt_cusp_muxhot16 "submodules/alt_cusp161_muxhot16" + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> + queue size: 338 starting:alt_cusp_muxhot16 "submodules/alt_cusp161_muxhot16" alt_vip_vfb_0" instantiated alt_cusp_muxhot16 "vfb_writer_length_counter_au_enable_muxinst"]]> - queue size: 307 starting:alt_avalon_st_input "submodules/alt_cusp161_avalon_st_input" + queue size: 314 starting:alt_avalon_st_input "submodules/alt_cusp161_avalon_st_input" alt_vip_vfb_0" instantiated alt_avalon_st_input "din"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> - queue size: 302 starting:alt_avalon_st_output "submodules/alt_cusp161_avalon_st_output" + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> + queue size: 309 starting:alt_avalon_st_output "submodules/alt_cusp161_avalon_st_output" alt_vip_vfb_0" instantiated alt_avalon_st_output "dout"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> - queue size: 298 starting:alt_avalon_mm_bursting_master_fifo "submodules/alt_cusp161_avalon_mm_bursting_master_fifo" + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> + queue size: 305 starting:alt_avalon_mm_bursting_master_fifo "submodules/alt_cusp161_avalon_mm_bursting_master_fifo" alt_vip_vfb_0" instantiated alt_avalon_mm_bursting_master_fifo "read_master"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> - queue size: 296 starting:alt_cusp_pulling_width_adapter "submodules/alt_cusp161_pulling_width_adapter" + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> + queue size: 303 starting:alt_cusp_pulling_width_adapter "submodules/alt_cusp161_pulling_width_adapter" alt_vip_vfb_0" instantiated alt_cusp_pulling_width_adapter "read_master_pull"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> - queue size: 290 starting:alt_cusp_pushing_width_adapter "submodules/alt_cusp161_pushing_width_adapter" + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> + queue size: 297 starting:alt_cusp_pushing_width_adapter "submodules/alt_cusp161_pushing_width_adapter" alt_vip_vfb_0" instantiated alt_cusp_pushing_width_adapter "write_master_push"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> - queue size: 256 starting:alt_pc "submodules/alt_cusp161_pc" + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> + queue size: 263 starting:alt_pc "submodules/alt_cusp161_pc" alt_vip_vfb_0" instantiated alt_pc "pc0"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> - queue size: 196 starting:alt_cmp "submodules/alt_cusp161_cmp" + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> + queue size: 203 starting:alt_cmp "submodules/alt_cusp161_cmp" alt_vip_vfb_0" instantiated alt_cmp "fu_id_4494_line325_93"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> - queue size: 146 starting:alt_cusp_testbench_clock "submodules/alt_cusp161_clock_reset" + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> + queue size: 153 starting:alt_cusp_testbench_clock "submodules/alt_cusp161_clock_reset" alt_vip_vfb_0" instantiated alt_cusp_testbench_clock "clocksource"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> - queue size: 218 starting:altpll "submodules/Qsys_altpll_0" + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> + queue size: 219 starting:altpll "submodules/Qsys_altpll_0" set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files - Command: C:/intelfpga_lite/16.1/quartus\bin64/quartus_map.exe not_a_project --generate_hdl_interface=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0008_sopcgen/Qsys_altpll_0.v --source=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0008_sopcgen/Qsys_altpll_0.v --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0009_sopcqmap/ --ini=disable_check_quartus_compatibility_qsys_only=on - Command took 0.841s + Command: F:/intelfpga_lite/16.1/quartus\bin64/quartus_map.exe not_a_project --generate_hdl_interface=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0060_sopcgen/Qsys_altpll_0.v --source=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0060_sopcgen/Qsys_altpll_0.v --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0061_sopcqmap/ --ini=disable_check_quartus_compatibility_qsys_only=on + Command took 0.661s Qsys" instantiated altpll "altpll_0"]]> - queue size: 217 starting:i2c_opencores "submodules/i2c_opencores" + queue size: 218 starting:i2c_opencores "submodules/i2c_opencores" Qsys" instantiated i2c_opencores "i2c_opencores_camera"]]> - queue size: 215 starting:altera_avalon_jtag_uart "submodules/Qsys_jtag_uart" + queue size: 216 starting:altera_avalon_jtag_uart "submodules/Qsys_jtag_uart" Starting RTL generation for module 'Qsys_jtag_uart' - Generation command is [exec C:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I C:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_jtag_uart -- C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_jtag_uart/generate_rtl.pl --name=Qsys_jtag_uart --dir=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0011_jtag_uart_gen/ --quartus_dir=C:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0011_jtag_uart_gen//Qsys_jtag_uart_component_configuration.pl --do_build_sim=0 ] + Generation command is [exec F:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I F:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_jtag_uart -- F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_jtag_uart/generate_rtl.pl --name=Qsys_jtag_uart --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0063_jtag_uart_gen/ --quartus_dir=F:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0063_jtag_uart_gen//Qsys_jtag_uart_component_configuration.pl --do_build_sim=0 ] Done RTL generation for module 'Qsys_jtag_uart' Qsys" instantiated altera_avalon_jtag_uart "jtag_uart"]]> - queue size: 214 starting:altera_avalon_pio "submodules/Qsys_key" + queue size: 215 starting:altera_avalon_pio "submodules/Qsys_key" Starting RTL generation for module 'Qsys_key' - Generation command is [exec C:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I C:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio -- C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio/generate_rtl.pl --name=Qsys_key --dir=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0012_key_gen/ --quartus_dir=C:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0012_key_gen//Qsys_key_component_configuration.pl --do_build_sim=0 ] + Generation command is [exec F:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I F:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio -- F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio/generate_rtl.pl --name=Qsys_key --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0064_key_gen/ --quartus_dir=F:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0064_key_gen//Qsys_key_component_configuration.pl --do_build_sim=0 ] Done RTL generation for module 'Qsys_key' Qsys" instantiated altera_avalon_pio "key"]]> - queue size: 213 starting:altera_avalon_pio "submodules/Qsys_led" + queue size: 214 starting:altera_avalon_pio "submodules/Qsys_led" Starting RTL generation for module 'Qsys_led' - Generation command is [exec C:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I C:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio -- C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio/generate_rtl.pl --name=Qsys_led --dir=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0013_led_gen/ --quartus_dir=C:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0013_led_gen//Qsys_led_component_configuration.pl --do_build_sim=0 ] + Generation command is [exec F:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I F:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio -- F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio/generate_rtl.pl --name=Qsys_led --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0065_led_gen/ --quartus_dir=F:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0065_led_gen//Qsys_led_component_configuration.pl --do_build_sim=0 ] Done RTL generation for module 'Qsys_led' Qsys" instantiated altera_avalon_pio "led"]]> - queue size: 212 starting:altera_avalon_pio "submodules/Qsys_mipi_pwdn_n" + queue size: 213 starting:altera_avalon_pio "submodules/Qsys_mipi_pwdn_n" Starting RTL generation for module 'Qsys_mipi_pwdn_n' - Generation command is [exec C:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I C:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio -- C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio/generate_rtl.pl --name=Qsys_mipi_pwdn_n --dir=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0014_mipi_pwdn_n_gen/ --quartus_dir=C:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0014_mipi_pwdn_n_gen//Qsys_mipi_pwdn_n_component_configuration.pl --do_build_sim=0 ] + Generation command is [exec F:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I F:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio -- F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio/generate_rtl.pl --name=Qsys_mipi_pwdn_n --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0066_mipi_pwdn_n_gen/ --quartus_dir=F:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0066_mipi_pwdn_n_gen//Qsys_mipi_pwdn_n_component_configuration.pl --do_build_sim=0 ] Done RTL generation for module 'Qsys_mipi_pwdn_n' Qsys" instantiated altera_avalon_pio "mipi_pwdn_n"]]> - queue size: 210 starting:altera_nios2_gen2 "submodules/Qsys_nios2_gen2" + queue size: 211 starting:altera_nios2_gen2 "submodules/Qsys_nios2_gen2" @@ -2974,64 +3007,69 @@ Transform: ResetAdaptation nios2_gen2" reuses altera_nios2_gen2_unit "submodules/Qsys_nios2_gen2_cpu"]]> Qsys" instantiated altera_nios2_gen2 "nios2_gen2"]]> - queue size: 144 starting:altera_nios2_gen2_unit "submodules/Qsys_nios2_gen2_cpu" + queue size: 151 starting:altera_nios2_gen2_unit "submodules/Qsys_nios2_gen2_cpu" Starting RTL generation for module 'Qsys_nios2_gen2_cpu' - Generation command is [exec C:/intelFPGA_lite/16.1/quartus/bin64//eperlcmd.exe -I C:/intelFPGA_lite/16.1/quartus/bin64//perl/lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I C:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/cpu_lib -I C:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/nios_lib -I C:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2 -I C:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2 -- C:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/generate_rtl.epl --name=Qsys_nios2_gen2_cpu --dir=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0022_cpu_gen/ --quartus_bindir=C:/intelFPGA_lite/16.1/quartus/bin64/ --verilog --config=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0022_cpu_gen//Qsys_nios2_gen2_cpu_processor_configuration.pl --do_build_sim=0 ] - # 2021.05.27 17:51:00 (*) Starting Nios II generation - # 2021.05.27 17:51:00 (*) Checking for plaintext license. - # 2021.05.27 17:51:01 (*) Couldn't query license setup in Quartus directory C:/intelFPGA_lite/16.1/quartus/bin64/ - # 2021.05.27 17:51:01 (*) Defaulting to contents of LM_LICENSE_FILE environment variable - # 2021.05.27 17:51:01 (*) LM_LICENSE_FILE environment variable is empty - # 2021.05.27 17:51:01 (*) Plaintext license not found. - # 2021.05.27 17:51:01 (*) Checking for encrypted license (non-evaluation). - # 2021.05.27 17:51:01 (*) Couldn't query license setup in Quartus directory C:/intelFPGA_lite/16.1/quartus/bin64/ - # 2021.05.27 17:51:01 (*) Defaulting to contents of LM_LICENSE_FILE environment variable - # 2021.05.27 17:51:01 (*) LM_LICENSE_FILE environment variable is empty - # 2021.05.27 17:51:01 (*) Encrypted license not found. Defaulting to OCP evaluation license (produces a time-limited SOF) - # 2021.05.27 17:51:01 (*) Elaborating CPU configuration settings - # 2021.05.27 17:51:01 (*) Creating all objects for CPU - # 2021.05.27 17:51:01 (*) Testbench - # 2021.05.27 17:51:02 (*) Instruction decoding - # 2021.05.27 17:51:02 (*) Instruction fields - # 2021.05.27 17:51:02 (*) Instruction decodes - # 2021.05.27 17:51:02 (*) Signals for RTL simulation waveforms - # 2021.05.27 17:51:02 (*) Instruction controls - # 2021.05.27 17:51:02 (*) Pipeline frontend - # 2021.05.27 17:51:02 (*) Pipeline backend - # 2021.05.27 17:51:05 (*) Generating RTL from CPU objects - # 2021.05.27 17:51:06 (*) Creating encrypted RTL - # 2021.05.27 17:51:07 (*) Done Nios II generation + Generation command is [exec F:/intelFPGA_lite/16.1/quartus/bin64//eperlcmd.exe -I F:/intelFPGA_lite/16.1/quartus/bin64//perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/cpu_lib -I F:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/nios_lib -I F:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2 -I F:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2 -- F:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/generate_rtl.epl --name=Qsys_nios2_gen2_cpu --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0075_cpu_gen/ --quartus_bindir=F:/intelFPGA_lite/16.1/quartus/bin64/ --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0075_cpu_gen//Qsys_nios2_gen2_cpu_processor_configuration.pl --do_build_sim=0 ] + # 2021.06.03 15:10:02 (*) Starting Nios II generation + # 2021.06.03 15:10:02 (*) Checking for plaintext license. + # 2021.06.03 15:10:03 (*) Couldn't query license setup in Quartus directory F:/intelFPGA_lite/16.1/quartus/bin64/ + # 2021.06.03 15:10:03 (*) Defaulting to contents of LM_LICENSE_FILE environment variable + # 2021.06.03 15:10:03 (*) LM_LICENSE_FILE environment variable is empty + # 2021.06.03 15:10:03 (*) Plaintext license not found. + # 2021.06.03 15:10:03 (*) Checking for encrypted license (non-evaluation). + # 2021.06.03 15:10:03 (*) Couldn't query license setup in Quartus directory F:/intelFPGA_lite/16.1/quartus/bin64/ + # 2021.06.03 15:10:03 (*) Defaulting to contents of LM_LICENSE_FILE environment variable + # 2021.06.03 15:10:03 (*) LM_LICENSE_FILE environment variable is empty + # 2021.06.03 15:10:03 (*) Encrypted license not found. Defaulting to OCP evaluation license (produces a time-limited SOF) + # 2021.06.03 15:10:03 (*) Elaborating CPU configuration settings + # 2021.06.03 15:10:03 (*) Creating all objects for CPU + # 2021.06.03 15:10:03 (*) Testbench + # 2021.06.03 15:10:03 (*) Instruction decoding + # 2021.06.03 15:10:03 (*) Instruction fields + # 2021.06.03 15:10:03 (*) Instruction decodes + # 2021.06.03 15:10:04 (*) Signals for RTL simulation waveforms + # 2021.06.03 15:10:04 (*) Instruction controls + # 2021.06.03 15:10:04 (*) Pipeline frontend + # 2021.06.03 15:10:04 (*) Pipeline backend + # 2021.06.03 15:10:06 (*) Generating RTL from CPU objects + # 2021.06.03 15:10:08 (*) Creating encrypted RTL + # 2021.06.03 15:10:08 (*) Done Nios II generation Done RTL generation for module 'Qsys_nios2_gen2_cpu' nios2_gen2" instantiated altera_nios2_gen2_unit "cpu"]]> - queue size: 210 starting:altera_avalon_onchip_memory2 "submodules/Qsys_onchip_memory2_0" + queue size: 211 starting:altera_avalon_onchip_memory2 "submodules/Qsys_onchip_memory2_0" Starting RTL generation for module 'Qsys_onchip_memory2_0' - Generation command is [exec C:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I C:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2 -- C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/generate_rtl.pl --name=Qsys_onchip_memory2_0 --dir=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0015_onchip_memory2_0_gen/ --quartus_dir=C:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0015_onchip_memory2_0_gen//Qsys_onchip_memory2_0_component_configuration.pl --do_build_sim=0 ] + Generation command is [exec F:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I F:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2 -- F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/generate_rtl.pl --name=Qsys_onchip_memory2_0 --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0067_onchip_memory2_0_gen/ --quartus_dir=F:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0067_onchip_memory2_0_gen//Qsys_onchip_memory2_0_component_configuration.pl --do_build_sim=0 ] Done RTL generation for module 'Qsys_onchip_memory2_0' Qsys" instantiated altera_avalon_onchip_memory2 "onchip_memory2_0"]]> - queue size: 209 starting:altera_avalon_new_sdram_controller "submodules/Qsys_sdram" + queue size: 210 starting:altera_avalon_new_sdram_controller "submodules/Qsys_sdram" Starting RTL generation for module 'Qsys_sdram' - Generation command is [exec C:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I C:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_new_sdram_controller -- C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_new_sdram_controller/generate_rtl.pl --name=Qsys_sdram --dir=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0016_sdram_gen/ --quartus_dir=C:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0016_sdram_gen//Qsys_sdram_component_configuration.pl --do_build_sim=0 ] + Generation command is [exec F:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I F:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_new_sdram_controller -- F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_new_sdram_controller/generate_rtl.pl --name=Qsys_sdram --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0068_sdram_gen/ --quartus_dir=F:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0068_sdram_gen//Qsys_sdram_component_configuration.pl --do_build_sim=0 ] Done RTL generation for module 'Qsys_sdram' Qsys" instantiated altera_avalon_new_sdram_controller "sdram"]]> - queue size: 208 starting:altera_avalon_pio "submodules/Qsys_sw" + queue size: 209 starting:altera_avalon_pio "submodules/Qsys_sw" Starting RTL generation for module 'Qsys_sw' - Generation command is [exec C:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I C:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio -- C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio/generate_rtl.pl --name=Qsys_sw --dir=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0017_sw_gen/ --quartus_dir=C:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0017_sw_gen//Qsys_sw_component_configuration.pl --do_build_sim=0 ] + Generation command is [exec F:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I F:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio -- F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio/generate_rtl.pl --name=Qsys_sw --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0069_sw_gen/ --quartus_dir=F:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0069_sw_gen//Qsys_sw_component_configuration.pl --do_build_sim=0 ] Done RTL generation for module 'Qsys_sw' Qsys" instantiated altera_avalon_pio "sw"]]> - queue size: 207 starting:altera_avalon_sysid_qsys "submodules/Qsys_sysid_qsys" + queue size: 208 starting:altera_avalon_sysid_qsys "submodules/Qsys_sysid_qsys" Qsys" instantiated altera_avalon_sysid_qsys "sysid_qsys"]]> - queue size: 206 starting:altera_avalon_timer "submodules/Qsys_timer" + queue size: 207 starting:altera_avalon_timer "submodules/Qsys_timer" Starting RTL generation for module 'Qsys_timer' - Generation command is [exec C:/intelFPGA_lite/16.1/quartus/bin64//perl/bin/perl.exe -I C:/intelFPGA_lite/16.1/quartus/bin64//perl/lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_timer -- C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_timer/generate_rtl.pl --name=Qsys_timer --dir=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0019_timer_gen/ --quartus_dir=C:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0019_timer_gen//Qsys_timer_component_configuration.pl --do_build_sim=0 ] + Generation command is [exec F:/intelFPGA_lite/16.1/quartus/bin64//perl/bin/perl.exe -I F:/intelFPGA_lite/16.1/quartus/bin64//perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_timer -- F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_timer/generate_rtl.pl --name=Qsys_timer --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0071_timer_gen/ --quartus_dir=F:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0071_timer_gen//Qsys_timer_component_configuration.pl --do_build_sim=0 ] Done RTL generation for module 'Qsys_timer' Qsys" instantiated altera_avalon_timer "timer"]]> + queue size: 206 starting:altera_avalon_uart "submodules/Qsys_uart_0" + Starting RTL generation for module 'Qsys_uart_0' + Generation command is [exec F:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I F:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_uart -- F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_uart/generate_rtl.pl --name=Qsys_uart_0 --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0072_uart_0_gen/ --quartus_dir=F:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0072_uart_0_gen//Qsys_uart_0_component_configuration.pl --do_build_sim=0 ] + Done RTL generation for module 'Qsys_uart_0' + Qsys" instantiated altera_avalon_uart "uart_0"]]> queue size: 205 starting:altera_mm_interconnect "submodules/Qsys_mm_interconnect_0" Transform: CustomInstructionTransform No custom instruction connections, skipping transform - 113 modules, 386 connections]]> + 119 modules, 407 connections]]> Transform: MMTransform Transform: InitialInterconnectTransform 0 modules, 0 connections]]> @@ -3057,7 +3095,7 @@ Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform - 113 modules, 386 connections]]> + 119 modules, 407 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform @@ -3082,7 +3120,7 @@ Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform - 113 modules, 386 connections]]> + 119 modules, 407 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform @@ -3107,7 +3145,7 @@ Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform - 113 modules, 386 connections]]> + 119 modules, 407 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform @@ -3132,7 +3170,7 @@ Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform - 113 modules, 386 connections]]> + 119 modules, 407 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform @@ -3157,7 +3195,7 @@ Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform - 113 modules, 386 connections]]> + 119 modules, 407 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform @@ -3182,7 +3220,7 @@ Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform - 113 modules, 386 connections]]> + 119 modules, 407 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform @@ -3207,7 +3245,7 @@ Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform - 113 modules, 386 connections]]> + 119 modules, 407 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform @@ -3232,7 +3270,7 @@ Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform - 113 modules, 386 connections]]> + 119 modules, 407 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform @@ -3257,7 +3295,7 @@ Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform - 113 modules, 386 connections]]> + 119 modules, 407 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform @@ -3282,7 +3320,7 @@ Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform - 113 modules, 386 connections]]> + 119 modules, 407 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform @@ -3307,7 +3345,7 @@ Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform - 113 modules, 386 connections]]> + 119 modules, 407 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform @@ -3332,7 +3370,7 @@ Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform - 113 modules, 386 connections]]> + 119 modules, 407 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform @@ -3357,7 +3395,7 @@ Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform - 113 modules, 386 connections]]> + 119 modules, 407 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform @@ -3382,7 +3420,7 @@ Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform - 113 modules, 386 connections]]> + 119 modules, 407 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform @@ -3407,7 +3445,7 @@ Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform - 113 modules, 386 connections]]> + 119 modules, 407 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform @@ -3432,7 +3470,7 @@ Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform - 113 modules, 386 connections]]> + 119 modules, 407 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform @@ -3457,7 +3495,32 @@ Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform - 113 modules, 386 connections]]> + 119 modules, 407 connections]]> + Transform: InitialInterconnectTransform + 0 modules, 0 connections]]> + Transform: TerminalIdAssignmentUpdateTransform + Transform: DefaultSlaveTransform + Transform: TranslatorTransform + No Avalon connections, skipping transform + Transform: IDPadTransform + Transform: DomainTransform + Transform: RouterTransform + Transform: TrafficLimiterTransform + Transform: BurstTransform + Transform: TreeTransform + Transform: NetworkToSwitchTransform + Transform: WidthTransform + Transform: RouterTableTransform + Transform: ThreadIDMappingTableTransform + Transform: ClockCrossingTransform + Transform: PipelineTransform + Transform: SpotPipelineTransform + Transform: PerformanceMonitorTransform + Transform: TrafficLimiterUpdateTransform + Transform: InsertClockAndResetBridgesTransform + Transform: InterconnectConnectionsTagger + Transform: HierarchyTransform + 119 modules, 407 connections]]> Transform: InterruptMapperTransform Transform: InterruptSyncTransform Transform: InterruptFanoutTransform @@ -3469,122 +3532,130 @@ Timing: ELA:1/0.000s Timing: ELA:2/0.000s/0.001s Timing: ELA:1/0.007s - Timing: COM:3/0.029s/0.039s + Timing: COM:3/0.026s/0.034s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s - Timing: ELA:2/0.001s/0.001s + Timing: ELA:2/0.000s/0.001s Timing: ELA:1/0.007s - Timing: COM:3/0.012s/0.013s + Timing: COM:3/0.011s/0.011s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s - Timing: ELA:2/0.000s/0.001s - Timing: ELA:1/0.007s - Timing: COM:3/0.013s/0.014s + Timing: ELA:2/0.000s/0.000s + Timing: ELA:1/0.006s + Timing: COM:3/0.010s/0.011s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s - Timing: ELA:2/0.000s/0.000s + Timing: ELA:2/0.000s/0.001s Timing: ELA:1/0.007s - Timing: COM:3/0.012s/0.012s + Timing: COM:3/0.011s/0.012s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s - Timing: ELA:2/0.000s/0.000s - Timing: ELA:1/0.007s - Timing: COM:3/0.017s/0.027s + Timing: ELA:2/0.000s/0.001s + Timing: ELA:1/0.006s + Timing: COM:3/0.010s/0.012s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s Timing: ELA:2/0.000s/0.000s - Timing: ELA:1/0.007s - Timing: COM:3/0.013s/0.016s + Timing: ELA:1/0.008s + Timing: COM:3/0.011s/0.012s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s - Timing: ELA:2/0.000s/0.001s - Timing: ELA:1/0.006s - Timing: COM:3/0.012s/0.014s + Timing: ELA:2/0.000s/0.000s + Timing: ELA:1/0.007s + Timing: COM:3/0.011s/0.011s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s - Timing: ELA:2/0.000s/0.000s - Timing: ELA:1/0.007s - Timing: COM:3/0.012s/0.013s + Timing: ELA:2/0.000s/0.001s + Timing: ELA:1/0.005s + Timing: COM:3/0.011s/0.012s Inserting error_adapter: error_adapter_0 - Timing: ELA:1/0.001s + Timing: ELA:1/0.000s Timing: ELA:2/0.000s/0.001s - Timing: ELA:1/0.007s - Timing: COM:3/0.016s/0.024s + Timing: ELA:1/0.006s + Timing: COM:3/0.011s/0.012s Inserting error_adapter: error_adapter_0 - Timing: ELA:1/0.001s + Timing: ELA:1/0.000s Timing: ELA:2/0.000s/0.001s - Timing: ELA:1/0.008s - Timing: COM:3/0.012s/0.013s + Timing: ELA:1/0.007s + Timing: COM:3/0.009s/0.011s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s - Timing: ELA:2/0.001s/0.001s - Timing: ELA:1/0.006s - Timing: COM:3/0.011s/0.012s + Timing: ELA:2/0.000s/0.001s + Timing: ELA:1/0.007s + Timing: COM:3/0.011s/0.013s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s - Timing: ELA:2/0.000s/0.000s - Timing: ELA:1/0.007s - Timing: COM:3/0.011s/0.012s + Timing: ELA:2/0.000s/0.001s + Timing: ELA:1/0.006s + Timing: COM:3/0.017s/0.027s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s - Timing: ELA:2/0.001s/0.001s - Timing: ELA:1/0.007s - Timing: COM:3/0.015s/0.022s + Timing: ELA:2/0.000s/0.001s + Timing: ELA:1/0.008s + Timing: COM:3/0.011s/0.013s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s - Timing: ELA:2/0.000s/0.001s - Timing: ELA:1/0.007s - Timing: COM:3/0.011s/0.012s + Timing: ELA:2/0.000s/0.000s + Timing: ELA:1/0.006s + Timing: COM:3/0.010s/0.012s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s - Timing: ELA:2/0.001s/0.001s - Timing: ELA:1/0.006s - Timing: COM:3/0.012s/0.015s + Timing: ELA:2/0.000s/0.001s + Timing: ELA:1/0.005s + Timing: COM:3/0.009s/0.011s + + + + Inserting error_adapter: error_adapter_0 + Timing: ELA:1/0.000s + Timing: ELA:2/0.000s/0.001s + Timing: ELA:1/0.005s + Timing: COM:3/0.009s/0.010s 128 modules, 431 connections]]> + culprit="com_altera_sopcmodel_transforms_avalonst_AvalonStreamingTransform">135 modules, 455 connections]]> Transform: ResetAdaptation mm_interconnect_0" reuses altera_merlin_master_translator "submodules/altera_merlin_master_translator"]]> mm_interconnect_0" reuses altera_merlin_master_translator "submodules/altera_merlin_master_translator"]]> @@ -3603,6 +3674,7 @@ mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> + mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> mm_interconnect_0" reuses altera_merlin_master_agent "submodules/altera_merlin_master_agent"]]> mm_interconnect_0" reuses altera_merlin_master_agent "submodules/altera_merlin_master_agent"]]> mm_interconnect_0" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"]]> @@ -3637,6 +3709,8 @@ mm_interconnect_0" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"]]> mm_interconnect_0" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"]]> mm_interconnect_0" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"]]> + mm_interconnect_0" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"]]> + mm_interconnect_0" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"]]> mm_interconnect_0" reuses altera_merlin_router "submodules/Qsys_mm_interconnect_0_router"]]> mm_interconnect_0" reuses altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_001"]]> mm_interconnect_0" reuses altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_002"]]> @@ -3654,6 +3728,7 @@ mm_interconnect_0" reuses altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_002"]]> mm_interconnect_0" reuses altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_002"]]> mm_interconnect_0" reuses altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_002"]]> + mm_interconnect_0" reuses altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_002"]]> mm_interconnect_0" reuses altera_merlin_traffic_limiter "submodules/altera_merlin_traffic_limiter"]]> mm_interconnect_0" reuses altera_merlin_traffic_limiter "submodules/altera_merlin_traffic_limiter"]]> mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_cmd_demux"]]> @@ -3673,6 +3748,7 @@ mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_cmd_mux"]]> mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_cmd_mux"]]> mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_cmd_mux"]]> + mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_cmd_mux"]]> mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux"]]> mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux"]]> mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux"]]> @@ -3688,6 +3764,7 @@ mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux"]]> mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux"]]> mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux_005"]]> + mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux"]]> mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_rsp_mux"]]> mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_rsp_mux_001"]]> mm_interconnect_0" reuses altera_avalon_st_handshake_clock_crosser "submodules/altera_avalon_st_handshake_clock_crosser"]]> @@ -3709,53 +3786,54 @@ mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/Qsys_mm_interconnect_0_avalon_st_adapter"]]> mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/Qsys_mm_interconnect_0_avalon_st_adapter"]]> mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/Qsys_mm_interconnect_0_avalon_st_adapter"]]> + mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/Qsys_mm_interconnect_0_avalon_st_adapter"]]> Qsys" instantiated altera_mm_interconnect "mm_interconnect_0"]]> - queue size: 143 starting:altera_merlin_master_translator "submodules/altera_merlin_master_translator" + queue size: 150 starting:altera_merlin_master_translator "submodules/altera_merlin_master_translator" mm_interconnect_0" instantiated altera_merlin_master_translator "nios2_gen2_data_master_translator"]]> - queue size: 141 starting:altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" + queue size: 148 starting:altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" mm_interconnect_0" instantiated altera_merlin_slave_translator "jtag_uart_avalon_jtag_slave_translator"]]> - queue size: 126 starting:altera_merlin_master_agent "submodules/altera_merlin_master_agent" + queue size: 132 starting:altera_merlin_master_agent "submodules/altera_merlin_master_agent" mm_interconnect_0" instantiated altera_merlin_master_agent "nios2_gen2_data_master_agent"]]> - queue size: 124 starting:altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" + queue size: 130 starting:altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" mm_interconnect_0" instantiated altera_merlin_slave_agent "jtag_uart_avalon_jtag_slave_agent"]]> - queue size: 123 starting:altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" + queue size: 129 starting:altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" mm_interconnect_0" instantiated altera_avalon_sc_fifo "jtag_uart_avalon_jtag_slave_agent_rsp_fifo"]]> - queue size: 92 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_0_router" + queue size: 96 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_0_router" mm_interconnect_0" instantiated altera_merlin_router "router"]]> - queue size: 91 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_001" + queue size: 95 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_001" mm_interconnect_0" instantiated altera_merlin_router "router_001"]]> - queue size: 90 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_002" + queue size: 94 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_002" mm_interconnect_0" instantiated altera_merlin_router "router_002"]]> - queue size: 86 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_006" + queue size: 90 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_006" mm_interconnect_0" instantiated altera_merlin_router "router_006"]]> - queue size: 75 starting:altera_merlin_traffic_limiter "submodules/altera_merlin_traffic_limiter" + queue size: 78 starting:altera_merlin_traffic_limiter "submodules/altera_merlin_traffic_limiter" mm_interconnect_0" instantiated altera_merlin_traffic_limiter "nios2_gen2_data_master_limiter"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_sc_fifo.v]]> - queue size: 73 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_cmd_demux" + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_sc_fifo.v]]> + queue size: 76 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_cmd_demux" mm_interconnect_0" instantiated altera_merlin_demultiplexer "cmd_demux"]]> - queue size: 72 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_cmd_demux_001" + queue size: 75 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_cmd_demux_001" mm_interconnect_0" instantiated altera_merlin_demultiplexer "cmd_demux_001"]]> - queue size: 71 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_cmd_mux" + queue size: 74 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_cmd_mux" mm_interconnect_0" instantiated altera_merlin_multiplexer "cmd_mux"]]> - queue size: 67 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_cmd_mux_004" + queue size: 70 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_cmd_mux_004" mm_interconnect_0" instantiated altera_merlin_multiplexer "cmd_mux_004"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv]]> - queue size: 56 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux" + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv]]> + queue size: 58 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux" mm_interconnect_0" instantiated altera_merlin_demultiplexer "rsp_demux"]]> - queue size: 52 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux_004" + queue size: 54 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux_004" mm_interconnect_0" instantiated altera_merlin_demultiplexer "rsp_demux_004"]]> - queue size: 51 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux_005" + queue size: 53 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux_005" mm_interconnect_0" instantiated altera_merlin_demultiplexer "rsp_demux_005"]]> - queue size: 41 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_rsp_mux" + queue size: 42 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_rsp_mux" mm_interconnect_0" instantiated altera_merlin_multiplexer "rsp_mux"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv]]> - queue size: 40 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_rsp_mux_001" + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv]]> + queue size: 41 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_rsp_mux_001" mm_interconnect_0" instantiated altera_merlin_multiplexer "rsp_mux_001"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv]]> - queue size: 39 starting:altera_avalon_st_handshake_clock_crosser "submodules/altera_avalon_st_handshake_clock_crosser" + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv]]> + queue size: 40 starting:altera_avalon_st_handshake_clock_crosser "submodules/altera_avalon_st_handshake_clock_crosser" mm_interconnect_0" instantiated altera_avalon_st_handshake_clock_crosser "crosser"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_pipeline_base.v]]> - queue size: 35 starting:altera_avalon_st_adapter "submodules/Qsys_mm_interconnect_0_avalon_st_adapter" + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_pipeline_base.v]]> + queue size: 36 starting:altera_avalon_st_adapter "submodules/Qsys_mm_interconnect_0_avalon_st_adapter" @@ -3772,7 +3850,7 @@ mm_interconnect_0" instantiated altera_avalon_st_adapter "avalon_st_adapter"]]> queue size: 1 starting:error_adapter "submodules/Qsys_mm_interconnect_0_avalon_st_adapter_error_adapter_0" avalon_st_adapter" instantiated error_adapter "error_adapter_0"]]> - queue size: 327 starting:altera_mm_interconnect "submodules/Qsys_mm_interconnect_1" + queue size: 334 starting:altera_mm_interconnect "submodules/Qsys_mm_interconnect_1" @@ -3864,9 +3942,9 @@ Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s - Timing: ELA:2/0.001s/0.001s - Timing: ELA:1/0.006s - Timing: COM:3/0.012s/0.013s + Timing: ELA:2/0.000s/0.001s + Timing: ELA:1/0.007s + Timing: COM:3/0.013s/0.015s 23 modules, 67 connections]]> @@ -3893,15 +3971,15 @@ mm_interconnect_1" reuses altera_merlin_width_adapter "submodules/altera_merlin_width_adapter"]]> mm_interconnect_1" reuses altera_avalon_st_adapter "submodules/Qsys_mm_interconnect_1_avalon_st_adapter"]]> Qsys" instantiated altera_mm_interconnect "mm_interconnect_1"]]> - queue size: 143 starting:altera_merlin_master_translator "submodules/altera_merlin_master_translator" + queue size: 150 starting:altera_merlin_master_translator "submodules/altera_merlin_master_translator" mm_interconnect_0" instantiated altera_merlin_master_translator "nios2_gen2_data_master_translator"]]> - queue size: 141 starting:altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" + queue size: 148 starting:altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" mm_interconnect_0" instantiated altera_merlin_slave_translator "jtag_uart_avalon_jtag_slave_translator"]]> - queue size: 126 starting:altera_merlin_master_agent "submodules/altera_merlin_master_agent" + queue size: 132 starting:altera_merlin_master_agent "submodules/altera_merlin_master_agent" mm_interconnect_0" instantiated altera_merlin_master_agent "nios2_gen2_data_master_agent"]]> - queue size: 124 starting:altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" + queue size: 130 starting:altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" mm_interconnect_0" instantiated altera_merlin_slave_agent "jtag_uart_avalon_jtag_slave_agent"]]> - queue size: 123 starting:altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" + queue size: 129 starting:altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" mm_interconnect_0" instantiated altera_avalon_sc_fifo "jtag_uart_avalon_jtag_slave_agent_rsp_fifo"]]> queue size: 13 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_1_router" mm_interconnect_1" instantiated altera_merlin_router "router"]]> @@ -3909,21 +3987,21 @@ mm_interconnect_1" instantiated altera_merlin_router "router_002"]]> queue size: 10 starting:altera_merlin_burst_adapter "submodules/altera_merlin_burst_adapter" mm_interconnect_1" instantiated altera_merlin_burst_adapter "sdram_s1_burst_adapter"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_pipeline_base.v]]> + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_pipeline_base.v]]> queue size: 9 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_1_cmd_demux" mm_interconnect_1" instantiated altera_merlin_demultiplexer "cmd_demux"]]> queue size: 7 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_1_cmd_mux" mm_interconnect_1" instantiated altera_merlin_multiplexer "cmd_mux"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv]]> + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv]]> queue size: 6 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_1_rsp_demux" mm_interconnect_1" instantiated altera_merlin_demultiplexer "rsp_demux"]]> queue size: 5 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_1_rsp_mux" mm_interconnect_1" instantiated altera_merlin_multiplexer "rsp_mux"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv]]> + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv]]> queue size: 3 starting:altera_merlin_width_adapter "submodules/altera_merlin_width_adapter" mm_interconnect_1" instantiated altera_merlin_width_adapter "sdram_s1_rsp_width_adapter"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_address_alignment.sv]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_burst_uncompressor.sv]]> + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_address_alignment.sv]]> + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_burst_uncompressor.sv]]> queue size: 1 starting:altera_avalon_st_adapter "submodules/Qsys_mm_interconnect_1_avalon_st_adapter" @@ -3941,9 +4019,9 @@ mm_interconnect_1" instantiated altera_avalon_st_adapter "avalon_st_adapter"]]> queue size: 0 starting:error_adapter "submodules/Qsys_mm_interconnect_1_avalon_st_adapter_error_adapter_0" avalon_st_adapter" instantiated error_adapter "error_adapter_0"]]> - queue size: 347 starting:altera_irq_mapper "submodules/Qsys_irq_mapper" + queue size: 354 starting:altera_irq_mapper "submodules/Qsys_irq_mapper" Qsys" instantiated altera_irq_mapper "irq_mapper"]]> - queue size: 346 starting:altera_reset_controller "submodules/altera_reset_controller" + queue size: 353 starting:altera_reset_controller "submodules/altera_reset_controller" Qsys" instantiated altera_reset_controller "rst_controller"]]> @@ -3956,19 +4034,18 @@ name="EEE_IMGPROC"> - + - queue size: 24 starting:EEE_IMGPROC "submodules/EEE_IMGPROC" + queue size: 25 starting:EEE_IMGPROC "submodules/EEE_IMGPROC" Qsys" instantiated EEE_IMGPROC "EEE_IMGPROC_0"]]> @@ -3983,35 +4060,35 @@ + path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_AUTO_FOCUS/TERASIC_AUTO_FOCUS_hw.tcl" /> - queue size: 23 starting:TERASIC_AUTO_FOCUS "submodules/TERASIC_AUTO_FOCUS" + queue size: 24 starting:TERASIC_AUTO_FOCUS "submodules/TERASIC_AUTO_FOCUS" Qsys" instantiated TERASIC_AUTO_FOCUS "TERASIC_AUTO_FOCUS_0"]]> @@ -4024,65 +4101,65 @@ name="TERASIC_CAMERA"> + path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/TERASIC_CAMERA_hw.tcl" /> + path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/TERASIC_CAMERA.v" /> + path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/CAMERA_RGB.v" /> + path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/CAMERA_Bayer.v" /> + path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/Bayer2RGB.v" /> + path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/Bayer_LineBuffer.v" /> + path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/rgb_fifo.v" /> + path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/add2.v" /> + path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/add4.v" /> - queue size: 22 starting:TERASIC_CAMERA "submodules/TERASIC_CAMERA" + queue size: 23 starting:TERASIC_CAMERA "submodules/TERASIC_CAMERA" set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files - Command: C:/intelfpga_lite/16.1/quartus\bin64/quartus_sh.exe -t C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0002_sopcqmap/not_a_project_setup.tcl - Command: C:/intelfpga_lite/16.1/quartus\bin64/quartus_map.exe not_a_project --generate_hdl_interface=C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/TERASIC_CAMERA.v --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0002_sopcqmap/ --ini=disable_check_quartus_compatibility_qsys_only=on - Command took 0.625s - Command took 0.719s + Command: F:/intelfpga_lite/16.1/quartus\bin64/quartus_sh.exe -t C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0054_sopcqmap/not_a_project_setup.tcl + Command: F:/intelfpga_lite/16.1/quartus\bin64/quartus_map.exe not_a_project --generate_hdl_interface=F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/TERASIC_CAMERA.v --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0054_sopcqmap/ --ini=disable_check_quartus_compatibility_qsys_only=on + Command took 0.590s + Command took 0.627s set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files - Command: C:/intelfpga_lite/16.1/quartus\bin64/quartus_sh.exe -t C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0005_sopcqmap/not_a_project_setup.tcl - Command: C:/intelfpga_lite/16.1/quartus\bin64/quartus_map.exe not_a_project --generate_hdl_interface=C:\Users\Anish Ghanekar\OneDrive - Imperial College London\GitHub\EE2Rover\Vision\DE10_LITE_D8M_VIP_16\ip\TERASIC_CAMERA\TERASIC_CAMERA.v --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0005_sopcqmap/ --set=HDL_INTERFACE_INSTANCE_NAME=inst --set=HDL_INTERFACE_INSTANCE_ENTITY=TERASIC_CAMERA "--set=HDL_INTERFACE_INSTANCE_PARAMETERS=VIDEO_W=D\"640\";VIDEO_H=D\"480\";" --ini=disable_check_quartus_compatibility_qsys_only=on - Command took 0.614s - Command took 0.704s + Command: F:/intelfpga_lite/16.1/quartus\bin64/quartus_sh.exe -t C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0057_sopcqmap/not_a_project_setup.tcl + Command: F:/intelfpga_lite/16.1/quartus\bin64/quartus_map.exe not_a_project --generate_hdl_interface=F:\Ed\Stuff\EEE2Rover\DE10_LITE_D8M_VIP_16\ip\TERASIC_CAMERA\TERASIC_CAMERA.v --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0057_sopcqmap/ --set=HDL_INTERFACE_INSTANCE_NAME=inst --set=HDL_INTERFACE_INSTANCE_ENTITY=TERASIC_CAMERA "--set=HDL_INTERFACE_INSTANCE_PARAMETERS=VIDEO_W=D\"640\";VIDEO_H=D\"480\";" --ini=disable_check_quartus_compatibility_qsys_only=on + Command took 0.533s + Command took 0.605s Qsys" instantiated TERASIC_CAMERA "TERASIC_CAMERA_0"]]> @@ -4095,100 +4172,100 @@ name="alt_vipitc131_IS2Vid"> + path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/alt_vip_itc_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid.sv" /> + path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid_sync_compare.v" /> + path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid_calculate_mode.v" /> + path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid_control.v" /> + path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid_mode_banks.sv" /> + path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid_statemachine.v" /> + path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_fifo.v" /> + path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_generic_count.v" /> + path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_to_binary.v" /> + path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_sync.v" /> + path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_trigger_sync.v" /> + path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_sync_generation.v" /> + path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_frame_counter.v" /> + path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_sample_counter.v" /> + path="F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/alt_vipitc131_cvo.sdc" /> - queue size: 21 starting:alt_vip_itc "submodules/alt_vipitc131_IS2Vid" + queue size: 22 starting:alt_vip_itc "submodules/alt_vipitc131_IS2Vid" set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files - Command: C:/intelfpga_lite/16.1/quartus\bin64/quartus_sh.exe -t C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0006_sopcqmap/not_a_project_setup.tcl - Command: C:/intelfpga_lite/16.1/quartus\bin64/quartus_map.exe not_a_project --generate_hdl_interface=C:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid.sv --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0006_sopcqmap/ --ini=disable_check_quartus_compatibility_qsys_only=on - Command took 0.616s - Command took 0.718s + Command: F:/intelfpga_lite/16.1/quartus\bin64/quartus_sh.exe -t C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0058_sopcqmap/not_a_project_setup.tcl + Command: F:/intelfpga_lite/16.1/quartus\bin64/quartus_map.exe not_a_project --generate_hdl_interface=F:/intelfpga_lite/16.1/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid.sv --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0058_sopcqmap/ --ini=disable_check_quartus_compatibility_qsys_only=on + Command took 0.524s + Command took 0.629s set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files - Command: C:/intelfpga_lite/16.1/quartus\bin64/quartus_sh.exe -t C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0007_sopcqmap/not_a_project_setup.tcl - Command: C:/intelfpga_lite/16.1/quartus\bin64/quartus_map.exe not_a_project --generate_hdl_interface=C:\intelfpga_lite\16.1\ip\altera\clocked_video_output\src_hdl\alt_vipitc131_IS2Vid.sv --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0007_sopcqmap/ --set=HDL_INTERFACE_INSTANCE_NAME=inst --set=HDL_INTERFACE_INSTANCE_ENTITY=alt_vipitc131_IS2Vid "--set=HDL_INTERFACE_INSTANCE_PARAMETERS=NUMBER_OF_COLOUR_PLANES=D\"3\";COLOUR_PLANES_ARE_IN_PARALLEL=D\"1\";BPS=D\"8\";INTERLACED=D\"0\";H_ACTIVE_PIXELS=D\"640\";V_ACTIVE_LINES=D\"480\";ACCEPT_COLOURS_IN_SEQ=D\"0\";FIFO_DEPTH=D\"640\";CLOCKS_ARE_SAME=D\"0\";USE_CONTROL=D\"0\";NO_OF_MODES=D\"1\";THRESHOLD=D\"639\";STD_WIDTH=D\"1\";GENERATE_SYNC=D\"0\";USE_EMBEDDED_SYNCS=D\"0\";AP_LINE=D\"0\";V_BLANK=D\"0\";H_BLANK=D\"0\";H_SYNC_LENGTH=D\"96\";H_FRONT_PORCH=D\"16\";H_BACK_PORCH=D\"48\";V_SYNC_LENGTH=D\"2\";V_FRONT_PORCH=D\"10\";V_BACK_PORCH=D\"33\";F_RISING_EDGE=D\"0\";F_FALLING_EDGE=D\"0\";FIELD0_V_RISING_EDGE=D\"0\";FIELD0_V_BLANK=D\"0\";FIELD0_V_SYNC_LENGTH=D\"0\";FIELD0_V_FRONT_PORCH=D\"0\";FIELD0_V_BACK_PORCH=D\"0\";ANC_LINE=D\"0\";FIELD0_ANC_LINE=D\"0\";" --ini=disable_check_quartus_compatibility_qsys_only=on - Command took 0.588s - Command took 0.750s + Command: F:/intelfpga_lite/16.1/quartus\bin64/quartus_sh.exe -t C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0059_sopcqmap/not_a_project_setup.tcl + Command: F:/intelfpga_lite/16.1/quartus\bin64/quartus_map.exe not_a_project --generate_hdl_interface=F:\intelfpga_lite\16.1\ip\altera\clocked_video_output\src_hdl\alt_vipitc131_IS2Vid.sv --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0059_sopcqmap/ --set=HDL_INTERFACE_INSTANCE_NAME=inst --set=HDL_INTERFACE_INSTANCE_ENTITY=alt_vipitc131_IS2Vid "--set=HDL_INTERFACE_INSTANCE_PARAMETERS=NUMBER_OF_COLOUR_PLANES=D\"3\";COLOUR_PLANES_ARE_IN_PARALLEL=D\"1\";BPS=D\"8\";INTERLACED=D\"0\";H_ACTIVE_PIXELS=D\"640\";V_ACTIVE_LINES=D\"480\";ACCEPT_COLOURS_IN_SEQ=D\"0\";FIFO_DEPTH=D\"640\";CLOCKS_ARE_SAME=D\"0\";USE_CONTROL=D\"0\";NO_OF_MODES=D\"1\";THRESHOLD=D\"639\";STD_WIDTH=D\"1\";GENERATE_SYNC=D\"0\";USE_EMBEDDED_SYNCS=D\"0\";AP_LINE=D\"0\";V_BLANK=D\"0\";H_BLANK=D\"0\";H_SYNC_LENGTH=D\"96\";H_FRONT_PORCH=D\"16\";H_BACK_PORCH=D\"48\";V_SYNC_LENGTH=D\"2\";V_FRONT_PORCH=D\"10\";V_BACK_PORCH=D\"33\";F_RISING_EDGE=D\"0\";F_FALLING_EDGE=D\"0\";FIELD0_V_RISING_EDGE=D\"0\";FIELD0_V_BLANK=D\"0\";FIELD0_V_SYNC_LENGTH=D\"0\";FIELD0_V_FRONT_PORCH=D\"0\";FIELD0_V_BACK_PORCH=D\"0\";ANC_LINE=D\"0\";FIELD0_ANC_LINE=D\"0\";" --ini=disable_check_quartus_compatibility_qsys_only=on + Command took 0.527s + Command took 0.635s Qsys" instantiated alt_vip_itc "alt_vip_itc_0"]]> @@ -4215,1154 +4292,1154 @@ value="<frameBufferParams><VFB_NAME>MyFrameBuffer</VFB_NAME><VFB_MAX_WIDTH>640</VFB_MAX_WIDTH><VFB_MAX_HEIGHT>480</VFB_MAX_HEIGHT><VFB_BPS>8</VFB_BPS><VFB_CHANNELS_IN_SEQ>1</VFB_CHANNELS_IN_SEQ><VFB_CHANNELS_IN_PAR>3</VFB_CHANNELS_IN_PAR><VFB_WRITER_RUNTIME_CONTROL>false</VFB_WRITER_RUNTIME_CONTROL><VFB_DROP_FRAMES>true</VFB_DROP_FRAMES><VFB_READER_RUNTIME_CONTROL>0</VFB_READER_RUNTIME_CONTROL><VFB_REPEAT_FRAMES>true</VFB_REPEAT_FRAMES><VFB_FRAMEBUFFERS_ADDR>00000000</VFB_FRAMEBUFFERS_ADDR><VFB_MEM_PORT_WIDTH>32</VFB_MEM_PORT_WIDTH><VFB_MEM_MASTERS_USE_SEPARATE_CLOCK>false</VFB_MEM_MASTERS_USE_SEPARATE_CLOCK><VFB_RDATA_FIFO_DEPTH>1024</VFB_RDATA_FIFO_DEPTH><VFB_RDATA_BURST_TARGET>4</VFB_RDATA_BURST_TARGET><VFB_WDATA_FIFO_DEPTH>1024</VFB_WDATA_FIFO_DEPTH><VFB_WDATA_BURST_TARGET>4</VFB_WDATA_BURST_TARGET><VFB_MAX_NUMBER_PACKETS>1</VFB_MAX_NUMBER_PACKETS><VFB_MAX_SYMBOLS_IN_PACKET>10</VFB_MAX_SYMBOLS_IN_PACKET><VFB_INTERLACED_SUPPORT>0</VFB_INTERLACED_SUPPORT><VFB_CONTROLLED_DROP_REPEAT>0</VFB_CONTROLLED_DROP_REPEAT><VFB_BURST_ALIGNMENT>0</VFB_BURST_ALIGNMENT><VFB_DROP_INVALID_FIELDS>false</VFB_DROP_INVALID_FIELDS></frameBufferParams>" /> - + path="F:/intelfpga_lite/16.1/ip/altera/frame_buffer/lib/alt_vip_vfb.cpp" /> + + path="F:/intelfpga_lite/16.1/ip/altera/frame_buffer/lib/vip_constants.h" /> + path="F:/intelfpga_lite/16.1/ip/altera/frame_buffer/lib/vip_elementclass_info.h" /> - + path="F:/intelfpga_lite/16.1/ip/altera/frame_buffer/lib/vip_vfb_hwfast.hpp" /> + + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/alt_cdfg_types.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/alt_cusp_synth.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/alt_exception.h" /> - + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/alt_lib_types.h" /> + + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_au.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_avalon_eb.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_avalon_mm.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_avalon_st.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_cmp.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_fifo.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_fifo_paged.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_fp_au.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_fp_cmp.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_fp_mult.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_gpio.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_immed.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_mac.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_mem.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_mult.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_multadd.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_reg.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_shift.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/fuLib/alt_tapped_delay.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_avalon_bus.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_avalon_eb_channel.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_avalon_st_channel.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_debug.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_exit.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_overlay.h" /> - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_pc.h" /> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cassert" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cctype" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/climits" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/config/stl_confix.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/config/stl_cusp.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/config/stlcomp.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cstddef" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cstdio" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cstdlib" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cstring" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/ctype.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/exception" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/fstream" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/iosfwd" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/iostream" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/math.h" /> - + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/memory" /> + - + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/pthread.h" /> + + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/sstream" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stdarg.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stddef.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stdexcept" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stdio.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stdlib.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_algobase.c" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_algobase.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_alloc.c" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_alloc.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_auto_ptr.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_bvector.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_config.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_config_compat.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_config_compat_post.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_construct.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_ctraits_fns.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_ctype.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_cwchar.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_epilog.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_function.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_function_adaptors.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_function_base.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_hash_fun.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_iterator.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_iterator_base.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_locale.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_new.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_pair.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_prolog.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_range_errors.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_raw_storage_iter.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_relops_cont.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_set.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_site_config.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string.c" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string_fwd.c" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string_fwd.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string_hash.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string_io.c" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string_io.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_tempbuf.c" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_tempbuf.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_threads.c" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_threads.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_tree.c" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_tree.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_uninitialized.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_vector.c" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_vector.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/c_locale.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/type_traits.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl_user_config.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/string" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/string.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/typeinfo" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/cstring" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/fstream" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/iosfwd" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/iostream" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/istream" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/ostream" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/sstream" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/vector" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/wrap_std/fstream" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/wrap_std/iosfwd" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/wrap_std/iostream" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/wrap_std/sstream" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_buffer.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_clock.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_clock_ports.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_communication_ids.h" /> + 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path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_avalon_eb_channel.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_avalon_st_channel.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_debug.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_exit.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_overlay.h" /> - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + path="F:/intelFPGA_lite/16.1/quartus/cusp/include/cusp/simlib/alt_pc.h" /> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cassert" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/cctype" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/climits" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/config/stl_confix.h" /> + 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path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/memory" /> + - + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/pthread.h" /> + + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/sstream" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stdarg.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stddef.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stdexcept" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stdio.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stdlib.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_algobase.c" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_algobase.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_alloc.c" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_alloc.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_auto_ptr.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_bvector.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_config.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_config_compat.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_config_compat_post.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_construct.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_ctraits_fns.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_ctype.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_cwchar.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_epilog.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_function.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_function_adaptors.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_function_base.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_hash_fun.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_iterator.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_iterator_base.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_locale.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_new.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_pair.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_prolog.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_range_errors.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_raw_storage_iter.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_relops_cont.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_set.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_site_config.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string.c" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string_fwd.c" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string_fwd.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string_hash.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string_io.c" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_string_io.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_tempbuf.c" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_tempbuf.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_threads.c" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_threads.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_tree.c" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_tree.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_uninitialized.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_vector.c" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/_vector.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/c_locale.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl/type_traits.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/stl_user_config.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/string" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/string.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/typeinfo" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/cstring" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/fstream" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/iosfwd" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/iostream" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/istream" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/ostream" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/using/sstream" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/vector" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/wrap_std/fstream" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/wrap_std/iosfwd" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/wrap_std/iostream" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/synthinclude/stlport/wrap_std/sstream" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_buffer.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_clock.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_clock_ports.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_communication_ids.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_event_finder.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_event_queue.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_export.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_fifo.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_fifo_ifs.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_fifo_ports.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_interface.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_mutex.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_mutex_if.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_port.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_prim_channel.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_semaphore.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_semaphore_if.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal_ifs.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal_ports.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal_resolved.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal_resolved_ports.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal_rv.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/communication/sc_signal_rv_ports.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_bit.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_bit_ids.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_bit_proxies.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_bv.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_bv_base.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_logic.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_lv.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_lv_base.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/bit/sc_proxy.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/fx.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_context.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fix.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fixed.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fx_ids.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxcast_switch.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxdefs.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxnum.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxnum_observer.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxtype_params.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxval.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_fxval_observer.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_ufix.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/sc_ufixed.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_ieee.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_mant.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_other_defs.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_params.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_rep.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_string.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/fx/scfx_utils.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_bigint.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_biguint.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_int.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_int_base.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_int_ids.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_length_param.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_nbdefs.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_nbexterns.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_nbutils.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_signed.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_uint.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_uint_base.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/int/sc_unsigned.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/misc/sc_concatref.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/datatypes/misc/sc_value_base.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_attribute.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_cmnhdr.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_constants.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_event.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_externs.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_kernel_ids.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_lambda.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_lambda_defs.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_lambda_exps.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_lambda_friends.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_macros.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_module.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_module_name.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_object.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_process.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_process_b.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_process_host.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_sensitive.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_simcontext.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_time.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_ver.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_wait.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/kernel/sc_wait_cthread.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/tracing/sc_trace.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/tracing/sc_vcd_trace.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/tracing/sc_wif_trace.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_hash.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_iostream.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_list.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_mempool.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_pq.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_report.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_report_handler.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_string.h" /> + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_temporary.h" /> - - + path="F:/intelFPGA_lite/16.1/quartus/cusp/systemc/include/sysc/utils/sc_vector.h" /> + + + path="F:/intelFPGA_lite/16.1/ip/altera/frame_buffer/lib/ip_toolbench/frame_buffer.jar" /> + path="F:/intelFPGA_lite/16.1/ip/altera/frame_buffer/lib/ip_toolbench/forms_rt.jar" /> + path="F:/intelFPGA_lite/16.1/ip/altera/frame_buffer/lib/ip_toolbench/jdom.jar" /> + path="F:/intelFPGA_lite/16.1/ip/altera/common/ip_toolbench/v1.3.0/bin/launcher.jar" /> + path="F:/intelFPGA_lite/16.1/ip/altera/common/ip_toolbench/v1.3.0/bin/flowbase.jar" /> + path="F:/intelFPGA_lite/16.1/ip/altera/common/ip_toolbench/v1.3.0/bin/flowmanager.jar" /> + path="F:/intelFPGA_lite/16.1/ip/altera/common/ip_toolbench/v1.3.0/bin/util/jptf.jar" /> + path="F:/intelFPGA_lite/16.1/ip/altera/common/lib/com.altera.megawizard2.jar" /> - queue size: 20 starting:alt_vip_vfb "submodules/Qsys_alt_vip_vfb_0" + queue size: 21 starting:alt_vip_vfb "submodules/Qsys_alt_vip_vfb_0" alt_vip_vfb_0" reuses alt_cusp_muxbin2 "submodules/alt_cusp161_muxbin2"]]> alt_vip_vfb_0" reuses alt_cusp_muxbin2 "submodules/alt_cusp161_muxbin2"]]> alt_vip_vfb_0" reuses alt_au "submodules/alt_cusp161_au"]]> @@ -5563,39 +5640,39 @@ dut" reuses alt_cusp_testbench_clock "submodules/alt_cusp161_clock_reset"]]> dut" reuses alt_vip_vfb "submodules/Qsys_alt_vip_vfb_0"]]> Qsys" instantiated alt_vip_vfb "alt_vip_vfb_0"]]> - queue size: 343 starting:alt_cusp_muxbin2 "submodules/alt_cusp161_muxbin2" + queue size: 350 starting:alt_cusp_muxbin2 "submodules/alt_cusp161_muxbin2" alt_vip_vfb_0" instantiated alt_cusp_muxbin2 "vfb_writer_packet_write_address_au_l_muxinst"]]> - queue size: 341 starting:alt_au "submodules/alt_cusp161_au" + queue size: 348 starting:alt_au "submodules/alt_cusp161_au" alt_vip_vfb_0" instantiated alt_au "vfb_writer_packet_write_address_au"]]> - queue size: 332 starting:alt_reg "submodules/alt_cusp161_reg" + queue size: 339 starting:alt_reg "submodules/alt_cusp161_reg" alt_vip_vfb_0" instantiated alt_reg "vfb_writer_overflow_flag_reg"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> - queue size: 331 starting:alt_cusp_muxhot16 "submodules/alt_cusp161_muxhot16" + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> + queue size: 338 starting:alt_cusp_muxhot16 "submodules/alt_cusp161_muxhot16" alt_vip_vfb_0" instantiated alt_cusp_muxhot16 "vfb_writer_length_counter_au_enable_muxinst"]]> - queue size: 307 starting:alt_avalon_st_input "submodules/alt_cusp161_avalon_st_input" + queue size: 314 starting:alt_avalon_st_input "submodules/alt_cusp161_avalon_st_input" alt_vip_vfb_0" instantiated alt_avalon_st_input "din"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> - queue size: 302 starting:alt_avalon_st_output "submodules/alt_cusp161_avalon_st_output" + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> + queue size: 309 starting:alt_avalon_st_output "submodules/alt_cusp161_avalon_st_output" alt_vip_vfb_0" instantiated alt_avalon_st_output "dout"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> - queue size: 298 starting:alt_avalon_mm_bursting_master_fifo "submodules/alt_cusp161_avalon_mm_bursting_master_fifo" + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> + queue size: 305 starting:alt_avalon_mm_bursting_master_fifo "submodules/alt_cusp161_avalon_mm_bursting_master_fifo" alt_vip_vfb_0" instantiated alt_avalon_mm_bursting_master_fifo "read_master"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> - queue size: 296 starting:alt_cusp_pulling_width_adapter "submodules/alt_cusp161_pulling_width_adapter" + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> + queue size: 303 starting:alt_cusp_pulling_width_adapter "submodules/alt_cusp161_pulling_width_adapter" alt_vip_vfb_0" instantiated alt_cusp_pulling_width_adapter "read_master_pull"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> - queue size: 290 starting:alt_cusp_pushing_width_adapter "submodules/alt_cusp161_pushing_width_adapter" + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> + queue size: 297 starting:alt_cusp_pushing_width_adapter "submodules/alt_cusp161_pushing_width_adapter" alt_vip_vfb_0" instantiated alt_cusp_pushing_width_adapter "write_master_push"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> - queue size: 256 starting:alt_pc "submodules/alt_cusp161_pc" + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> + queue size: 263 starting:alt_pc "submodules/alt_cusp161_pc" alt_vip_vfb_0" instantiated alt_pc "pc0"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> - queue size: 196 starting:alt_cmp "submodules/alt_cusp161_cmp" + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> + queue size: 203 starting:alt_cmp "submodules/alt_cusp161_cmp" alt_vip_vfb_0" instantiated alt_cmp "fu_id_4494_line325_93"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> - queue size: 146 starting:alt_cusp_testbench_clock "submodules/alt_cusp161_clock_reset" + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> + queue size: 153 starting:alt_cusp_testbench_clock "submodules/alt_cusp161_clock_reset" alt_vip_vfb_0" instantiated alt_cusp_testbench_clock "clocksource"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> + path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_altpll/altera_avalon_altpll_hw.tcl" /> - queue size: 218 starting:altpll "submodules/Qsys_altpll_0" + queue size: 219 starting:altpll "submodules/Qsys_altpll_0" set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files - Command: C:/intelfpga_lite/16.1/quartus\bin64/quartus_map.exe not_a_project --generate_hdl_interface=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0008_sopcgen/Qsys_altpll_0.v --source=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0008_sopcgen/Qsys_altpll_0.v --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0009_sopcqmap/ --ini=disable_check_quartus_compatibility_qsys_only=on - Command took 0.841s + Command: F:/intelfpga_lite/16.1/quartus\bin64/quartus_map.exe not_a_project --generate_hdl_interface=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0060_sopcgen/Qsys_altpll_0.v --source=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0060_sopcgen/Qsys_altpll_0.v --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0061_sopcqmap/ --ini=disable_check_quartus_compatibility_qsys_only=on + Command took 0.661s Qsys" instantiated altpll "altpll_0"]]> @@ -5811,35 +5888,35 @@ name="i2c_opencores"> + path="F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/i2c_opencores/i2c_opencores_hw.tcl" /> - queue size: 217 starting:i2c_opencores "submodules/i2c_opencores" + queue size: 218 starting:i2c_opencores "submodules/i2c_opencores" Qsys" instantiated i2c_opencores "i2c_opencores_camera"]]> @@ -5868,21 +5945,21 @@ + path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_jtag_uart/altera_avalon_jtag_uart_hw.tcl" /> - queue size: 215 starting:altera_avalon_jtag_uart "submodules/Qsys_jtag_uart" + queue size: 216 starting:altera_avalon_jtag_uart "submodules/Qsys_jtag_uart" Starting RTL generation for module 'Qsys_jtag_uart' - Generation command is [exec C:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I C:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_jtag_uart -- C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_jtag_uart/generate_rtl.pl --name=Qsys_jtag_uart --dir=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0011_jtag_uart_gen/ --quartus_dir=C:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0011_jtag_uart_gen//Qsys_jtag_uart_component_configuration.pl --do_build_sim=0 ] + Generation command is [exec F:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I F:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_jtag_uart -- F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_jtag_uart/generate_rtl.pl --name=Qsys_jtag_uart --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0063_jtag_uart_gen/ --quartus_dir=F:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0063_jtag_uart_gen//Qsys_jtag_uart_component_configuration.pl --do_build_sim=0 ] Done RTL generation for module 'Qsys_jtag_uart' Qsys" instantiated altera_avalon_jtag_uart "jtag_uart"]]> @@ -5916,21 +5993,21 @@ + path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_pio/altera_avalon_pio_hw.tcl" /> - queue size: 214 starting:altera_avalon_pio "submodules/Qsys_key" + queue size: 215 starting:altera_avalon_pio "submodules/Qsys_key" Starting RTL generation for module 'Qsys_key' - Generation command is [exec C:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I C:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio -- C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio/generate_rtl.pl --name=Qsys_key --dir=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0012_key_gen/ --quartus_dir=C:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0012_key_gen//Qsys_key_component_configuration.pl --do_build_sim=0 ] + Generation command is [exec F:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I F:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio -- F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio/generate_rtl.pl --name=Qsys_key --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0064_key_gen/ --quartus_dir=F:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0064_key_gen//Qsys_key_component_configuration.pl --do_build_sim=0 ] Done RTL generation for module 'Qsys_key' Qsys" instantiated altera_avalon_pio "key"]]> @@ -5964,21 +6041,21 @@ + path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_pio/altera_avalon_pio_hw.tcl" /> - queue size: 213 starting:altera_avalon_pio "submodules/Qsys_led" + queue size: 214 starting:altera_avalon_pio "submodules/Qsys_led" Starting RTL generation for module 'Qsys_led' - Generation command is [exec C:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I C:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio -- C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio/generate_rtl.pl --name=Qsys_led --dir=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0013_led_gen/ --quartus_dir=C:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0013_led_gen//Qsys_led_component_configuration.pl --do_build_sim=0 ] + Generation command is [exec F:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I F:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio -- F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio/generate_rtl.pl --name=Qsys_led --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0065_led_gen/ --quartus_dir=F:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0065_led_gen//Qsys_led_component_configuration.pl --do_build_sim=0 ] Done RTL generation for module 'Qsys_led' Qsys" instantiated altera_avalon_pio "led"]]> @@ -6012,28 +6089,28 @@ + path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_pio/altera_avalon_pio_hw.tcl" /> - queue size: 212 starting:altera_avalon_pio "submodules/Qsys_mipi_pwdn_n" + queue size: 213 starting:altera_avalon_pio "submodules/Qsys_mipi_pwdn_n" Starting RTL generation for module 'Qsys_mipi_pwdn_n' - Generation command is [exec C:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I C:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio -- C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio/generate_rtl.pl --name=Qsys_mipi_pwdn_n --dir=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0014_mipi_pwdn_n_gen/ --quartus_dir=C:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0014_mipi_pwdn_n_gen//Qsys_mipi_pwdn_n_component_configuration.pl --do_build_sim=0 ] + Generation command is [exec F:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I F:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio -- F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio/generate_rtl.pl --name=Qsys_mipi_pwdn_n --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0066_mipi_pwdn_n_gen/ --quartus_dir=F:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0066_mipi_pwdn_n_gen//Qsys_mipi_pwdn_n_component_configuration.pl --do_build_sim=0 ] Done RTL generation for module 'Qsys_mipi_pwdn_n' Qsys" instantiated altera_avalon_pio "mipi_pwdn_n"]]> - + + value="<address-map><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' type='altera_avalon_onchip_memory2.s1' /><slave name='nios2_gen2.debug_mem_slave' start='0x40800' end='0x41000' type='altera_nios2_gen2.debug_mem_slave' /><slave name='timer.s1' start='0x41000' end='0x41020' type='altera_avalon_timer.s1' /><slave name='TERASIC_AUTO_FOCUS_0.mm_ctrl' start='0x41020' end='0x41040' type='TERASIC_AUTO_FOCUS.mm_ctrl' /><slave name='i2c_opencores_camera.avalon_slave_0' start='0x41040' end='0x41060' type='i2c_opencores.avalon_slave_0' /><slave name='i2c_opencores_mipi.avalon_slave_0' start='0x41060' end='0x41080' type='i2c_opencores.avalon_slave_0' /><slave name='mipi_pwdn_n.s1' start='0x41080' end='0x41090' type='altera_avalon_pio.s1' /><slave name='mipi_reset_n.s1' start='0x41090' end='0x410A0' type='altera_avalon_pio.s1' /><slave name='key.s1' start='0x410A0' end='0x410B0' type='altera_avalon_pio.s1' /><slave name='sw.s1' start='0x410B0' end='0x410C0' type='altera_avalon_pio.s1' /><slave name='led.s1' start='0x410C0' end='0x410D0' type='altera_avalon_pio.s1' /><slave name='altpll_0.pll_slave' start='0x410D0' end='0x410E0' type='altpll.pll_slave' /><slave name='sysid_qsys.control_slave' start='0x410E0' end='0x410E8' type='altera_avalon_sysid_qsys.control_slave' /><slave name='jtag_uart.avalon_jtag_slave' start='0x410E8' end='0x410F0' type='altera_avalon_jtag_uart.avalon_jtag_slave' /><slave name='EEE_IMGPROC_0.s1' start='0x42000' end='0x42020' type='EEE_IMGPROC.s1' /><slave name='uart_0.s1' start='0x42020' end='0x42040' type='altera_avalon_uart.s1' /></address-map>" /> @@ -6224,7 +6301,7 @@ + value="<address-map><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' type='altera_avalon_onchip_memory2.s1' /><slave name='nios2_gen2.debug_mem_slave' start='0x40800' end='0x41000' type='altera_nios2_gen2.debug_mem_slave' /></address-map>" /> @@ -6241,78 +6318,78 @@ + path="F:/intelfpga_lite/16.1/ip/altera/nios2_ip/altera_nios2_gen2/altera_nios2_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/nios2_ip/altera_nios2_gen2/altera_nios2_unit_hw.tcl" /> - queue size: 210 starting:altera_nios2_gen2 "submodules/Qsys_nios2_gen2" + queue size: 211 starting:altera_nios2_gen2 "submodules/Qsys_nios2_gen2" @@ -6327,40 +6404,40 @@ Transform: ResetAdaptation nios2_gen2" reuses altera_nios2_gen2_unit "submodules/Qsys_nios2_gen2_cpu"]]> Qsys" instantiated altera_nios2_gen2 "nios2_gen2"]]> - queue size: 144 starting:altera_nios2_gen2_unit "submodules/Qsys_nios2_gen2_cpu" + queue size: 151 starting:altera_nios2_gen2_unit "submodules/Qsys_nios2_gen2_cpu" Starting RTL generation for module 'Qsys_nios2_gen2_cpu' - Generation command is [exec C:/intelFPGA_lite/16.1/quartus/bin64//eperlcmd.exe -I C:/intelFPGA_lite/16.1/quartus/bin64//perl/lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I C:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/cpu_lib -I C:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/nios_lib -I C:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2 -I C:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2 -- C:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/generate_rtl.epl --name=Qsys_nios2_gen2_cpu --dir=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0022_cpu_gen/ --quartus_bindir=C:/intelFPGA_lite/16.1/quartus/bin64/ --verilog --config=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0022_cpu_gen//Qsys_nios2_gen2_cpu_processor_configuration.pl --do_build_sim=0 ] - # 2021.05.27 17:51:00 (*) Starting Nios II generation - # 2021.05.27 17:51:00 (*) Checking for plaintext license. - # 2021.05.27 17:51:01 (*) Couldn't query license setup in Quartus directory C:/intelFPGA_lite/16.1/quartus/bin64/ - # 2021.05.27 17:51:01 (*) Defaulting to contents of LM_LICENSE_FILE environment variable - # 2021.05.27 17:51:01 (*) LM_LICENSE_FILE environment variable is empty - # 2021.05.27 17:51:01 (*) Plaintext license not found. - # 2021.05.27 17:51:01 (*) Checking for encrypted license (non-evaluation). - # 2021.05.27 17:51:01 (*) Couldn't query license setup in Quartus directory C:/intelFPGA_lite/16.1/quartus/bin64/ - # 2021.05.27 17:51:01 (*) Defaulting to contents of LM_LICENSE_FILE environment variable - # 2021.05.27 17:51:01 (*) LM_LICENSE_FILE environment variable is empty - # 2021.05.27 17:51:01 (*) Encrypted license not found. Defaulting to OCP evaluation license (produces a time-limited SOF) - # 2021.05.27 17:51:01 (*) Elaborating CPU configuration settings - # 2021.05.27 17:51:01 (*) Creating all objects for CPU - # 2021.05.27 17:51:01 (*) Testbench - # 2021.05.27 17:51:02 (*) Instruction decoding - # 2021.05.27 17:51:02 (*) Instruction fields - # 2021.05.27 17:51:02 (*) Instruction decodes - # 2021.05.27 17:51:02 (*) Signals for RTL simulation waveforms - # 2021.05.27 17:51:02 (*) Instruction controls - # 2021.05.27 17:51:02 (*) Pipeline frontend - # 2021.05.27 17:51:02 (*) Pipeline backend - # 2021.05.27 17:51:05 (*) Generating RTL from CPU objects - # 2021.05.27 17:51:06 (*) Creating encrypted RTL - # 2021.05.27 17:51:07 (*) Done Nios II generation + Generation command is [exec F:/intelFPGA_lite/16.1/quartus/bin64//eperlcmd.exe -I F:/intelFPGA_lite/16.1/quartus/bin64//perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/cpu_lib -I F:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/nios_lib -I F:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2 -I F:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2 -- F:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/generate_rtl.epl --name=Qsys_nios2_gen2_cpu --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0075_cpu_gen/ --quartus_bindir=F:/intelFPGA_lite/16.1/quartus/bin64/ --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0075_cpu_gen//Qsys_nios2_gen2_cpu_processor_configuration.pl --do_build_sim=0 ] + # 2021.06.03 15:10:02 (*) Starting Nios II generation + # 2021.06.03 15:10:02 (*) Checking for plaintext license. + # 2021.06.03 15:10:03 (*) Couldn't query license setup in Quartus directory F:/intelFPGA_lite/16.1/quartus/bin64/ + # 2021.06.03 15:10:03 (*) Defaulting to contents of LM_LICENSE_FILE environment variable + # 2021.06.03 15:10:03 (*) LM_LICENSE_FILE environment variable is empty + # 2021.06.03 15:10:03 (*) Plaintext license not found. + # 2021.06.03 15:10:03 (*) Checking for encrypted license (non-evaluation). + # 2021.06.03 15:10:03 (*) Couldn't query license setup in Quartus directory F:/intelFPGA_lite/16.1/quartus/bin64/ + # 2021.06.03 15:10:03 (*) Defaulting to contents of LM_LICENSE_FILE environment variable + # 2021.06.03 15:10:03 (*) LM_LICENSE_FILE environment variable is empty + # 2021.06.03 15:10:03 (*) Encrypted license not found. Defaulting to OCP evaluation license (produces a time-limited SOF) + # 2021.06.03 15:10:03 (*) Elaborating CPU configuration settings + # 2021.06.03 15:10:03 (*) Creating all objects for CPU + # 2021.06.03 15:10:03 (*) Testbench + # 2021.06.03 15:10:03 (*) Instruction decoding + # 2021.06.03 15:10:03 (*) Instruction fields + # 2021.06.03 15:10:03 (*) Instruction decodes + # 2021.06.03 15:10:04 (*) Signals for RTL simulation waveforms + # 2021.06.03 15:10:04 (*) Instruction controls + # 2021.06.03 15:10:04 (*) Pipeline frontend + # 2021.06.03 15:10:04 (*) Pipeline backend + # 2021.06.03 15:10:06 (*) Generating RTL from CPU objects + # 2021.06.03 15:10:08 (*) Creating encrypted RTL + # 2021.06.03 15:10:08 (*) Done Nios II generation Done RTL generation for module 'Qsys_nios2_gen2_cpu' nios2_gen2" instantiated altera_nios2_gen2_unit "cpu"]]> - + @@ -6404,21 +6481,21 @@ + path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/altera_avalon_onchip_memory2_hw.tcl" /> - queue size: 210 starting:altera_avalon_onchip_memory2 "submodules/Qsys_onchip_memory2_0" + queue size: 211 starting:altera_avalon_onchip_memory2 "submodules/Qsys_onchip_memory2_0" Starting RTL generation for module 'Qsys_onchip_memory2_0' - Generation command is [exec C:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I C:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2 -- C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/generate_rtl.pl --name=Qsys_onchip_memory2_0 --dir=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0015_onchip_memory2_0_gen/ --quartus_dir=C:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0015_onchip_memory2_0_gen//Qsys_onchip_memory2_0_component_configuration.pl --do_build_sim=0 ] + Generation command is [exec F:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I F:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2 -- F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/generate_rtl.pl --name=Qsys_onchip_memory2_0 --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0067_onchip_memory2_0_gen/ --quartus_dir=F:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0067_onchip_memory2_0_gen//Qsys_onchip_memory2_0_component_configuration.pl --do_build_sim=0 ] Done RTL generation for module 'Qsys_onchip_memory2_0' Qsys" instantiated altera_avalon_onchip_memory2 "onchip_memory2_0"]]> @@ -6457,25 +6534,25 @@ + path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_new_sdram_controller/altera_avalon_new_sdram_controller_hw.tcl" /> - queue size: 209 starting:altera_avalon_new_sdram_controller "submodules/Qsys_sdram" + queue size: 210 starting:altera_avalon_new_sdram_controller "submodules/Qsys_sdram" Starting RTL generation for module 'Qsys_sdram' - Generation command is [exec C:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I C:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_new_sdram_controller -- C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_new_sdram_controller/generate_rtl.pl --name=Qsys_sdram --dir=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0016_sdram_gen/ --quartus_dir=C:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0016_sdram_gen//Qsys_sdram_component_configuration.pl --do_build_sim=0 ] + Generation command is [exec F:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I F:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_new_sdram_controller -- F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_new_sdram_controller/generate_rtl.pl --name=Qsys_sdram --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0068_sdram_gen/ --quartus_dir=F:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0068_sdram_gen//Qsys_sdram_component_configuration.pl --do_build_sim=0 ] Done RTL generation for module 'Qsys_sdram' Qsys" instantiated altera_avalon_new_sdram_controller "sdram"]]> @@ -6509,49 +6586,49 @@ + path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_pio/altera_avalon_pio_hw.tcl" /> - queue size: 208 starting:altera_avalon_pio "submodules/Qsys_sw" + queue size: 209 starting:altera_avalon_pio "submodules/Qsys_sw" Starting RTL generation for module 'Qsys_sw' - Generation command is [exec C:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I C:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio -- C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio/generate_rtl.pl --name=Qsys_sw --dir=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0017_sw_gen/ --quartus_dir=C:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0017_sw_gen//Qsys_sw_component_configuration.pl --do_build_sim=0 ] + Generation command is [exec F:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I F:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio -- F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio/generate_rtl.pl --name=Qsys_sw --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0069_sw_gen/ --quartus_dir=F:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0069_sw_gen//Qsys_sw_component_configuration.pl --do_build_sim=0 ] Done RTL generation for module 'Qsys_sw' Qsys" instantiated altera_avalon_pio "sw"]]> - + + path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_sysid_qsys/altera_avalon_sysid_qsys_hw.tcl" /> - queue size: 207 starting:altera_avalon_sysid_qsys "submodules/Qsys_sysid_qsys" + queue size: 208 starting:altera_avalon_sysid_qsys "submodules/Qsys_sysid_qsys" Qsys" instantiated altera_avalon_sysid_qsys "sysid_qsys"]]> @@ -6581,28 +6658,72 @@ + path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_timer/altera_avalon_timer_hw.tcl" /> - queue size: 206 starting:altera_avalon_timer "submodules/Qsys_timer" + queue size: 207 starting:altera_avalon_timer "submodules/Qsys_timer" Starting RTL generation for module 'Qsys_timer' - Generation command is [exec C:/intelFPGA_lite/16.1/quartus/bin64//perl/bin/perl.exe -I C:/intelFPGA_lite/16.1/quartus/bin64//perl/lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_timer -- C:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_timer/generate_rtl.pl --name=Qsys_timer --dir=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0019_timer_gen/ --quartus_dir=C:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0019_timer_gen//Qsys_timer_component_configuration.pl --do_build_sim=0 ] + Generation command is [exec F:/intelFPGA_lite/16.1/quartus/bin64//perl/bin/perl.exe -I F:/intelFPGA_lite/16.1/quartus/bin64//perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_timer -- F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_timer/generate_rtl.pl --name=Qsys_timer --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0071_timer_gen/ --quartus_dir=F:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0071_timer_gen//Qsys_timer_component_configuration.pl --do_build_sim=0 ] Done RTL generation for module 'Qsys_timer' Qsys" instantiated altera_avalon_timer "timer"]]> + + + + + + + + + + + + + + + + + + + + + + + + + + + queue size: 206 starting:altera_avalon_uart "submodules/Qsys_uart_0" + Starting RTL generation for module 'Qsys_uart_0' + Generation command is [exec F:/intelfpga_lite/16.1/quartus/bin64/perl/bin/perl.exe -I F:/intelfpga_lite/16.1/quartus/bin64/perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/common -I F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_uart -- F:/intelfpga_lite/16.1/quartus/../ip/altera/sopc_builder_ip/altera_avalon_uart/generate_rtl.pl --name=Qsys_uart_0 --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0072_uart_0_gen/ --quartus_dir=F:/intelfpga_lite/16.1/quartus --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0072_uart_0_gen//Qsys_uart_0_component_configuration.pl --do_build_sim=0 ] + Done RTL generation for module 'Qsys_uart_0' + Qsys" instantiated altera_avalon_uart "uart_0"]]> + + + +};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {SUPPRESS_0_BYTEEN_RSP} {0};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {ID} {1};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {BURSTWRAP_VALUE} {3};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {CACHE_VALUE} {0};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {SECURE_ACCESS_BIT} {1};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {USE_WRITERESPONSE} {0};add_instance {jtag_uart_avalon_jtag_slave_agent} {altera_merlin_slave_agent};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_DATA_H} {31};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_DATA_L} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {ST_DATA_W} {97};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {ID} {5};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {ECC_ENABLE} {0};add_instance {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {i2c_opencores_mipi_avalon_slave_0_agent} {altera_merlin_slave_agent};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_DATA_H} {31};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_DATA_L} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {ST_DATA_W} {97};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {ID} {4};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent} {ECC_ENABLE} {0};add_instance {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {i2c_opencores_camera_avalon_slave_0_agent} {altera_merlin_slave_agent};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_DATA_H} {31};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_DATA_L} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {ST_DATA_W} {97};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {ID} {3};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent} {ECC_ENABLE} {0};add_instance {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {sysid_qsys_control_slave_agent} {altera_merlin_slave_agent};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_DATA_H} {31};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_DATA_L} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {sysid_qsys_control_slave_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {sysid_qsys_control_slave_agent} {ST_DATA_W} {97};set_instance_parameter_value {sysid_qsys_control_slave_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {sysid_qsys_control_slave_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {sysid_qsys_control_slave_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {sysid_qsys_control_slave_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {sysid_qsys_control_slave_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {sysid_qsys_control_slave_agent} {ID} {13};set_instance_parameter_value {sysid_qsys_control_slave_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent} {ECC_ENABLE} {0};add_instance {sysid_qsys_control_slave_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {sysid_qsys_control_slave_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {nios2_gen2_debug_mem_slave_agent} {altera_merlin_slave_agent};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_DATA_H} {31};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_DATA_L} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {ST_DATA_W} {97};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {ID} {10};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent} {ECC_ENABLE} {0};add_instance {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {nios2_gen2_debug_mem_slave_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {altera_merlin_slave_agent};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_DATA_H} {31};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_DATA_L} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {ST_DATA_W} {97};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {ID} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent} {ECC_ENABLE} {0};add_instance {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {BITS_PER_SYMBOL} {34};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {USE_PACKETS} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {EMPTY_LATENCY} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {altpll_0_pll_slave_agent} {altera_merlin_slave_agent};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_DATA_H} {31};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_DATA_L} {0};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {altpll_0_pll_slave_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {altpll_0_pll_slave_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {altpll_0_pll_slave_agent} {ST_DATA_W} {97};set_instance_parameter_value {altpll_0_pll_slave_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {altpll_0_pll_slave_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {altpll_0_pll_slave_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {altpll_0_pll_slave_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {altpll_0_pll_slave_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {altpll_0_pll_slave_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {altpll_0_pll_slave_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {altpll_0_pll_slave_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {altpll_0_pll_slave_agent} {ID} {2};set_instance_parameter_value {altpll_0_pll_slave_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {altpll_0_pll_slave_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {altpll_0_pll_slave_agent} {ECC_ENABLE} {0};add_instance {altpll_0_pll_slave_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {altpll_0_pll_slave_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {onchip_memory2_0_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_DATA_H} {31};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {onchip_memory2_0_s1_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {onchip_memory2_0_s1_agent} {ST_DATA_W} {97};set_instance_parameter_value {onchip_memory2_0_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {onchip_memory2_0_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {onchip_memory2_0_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {onchip_memory2_0_s1_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {onchip_memory2_0_s1_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {onchip_memory2_0_s1_agent} {ID} {11};set_instance_parameter_value {onchip_memory2_0_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent} {ECC_ENABLE} {0};add_instance {onchip_memory2_0_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {onchip_memory2_0_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {timer_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {timer_s1_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {timer_s1_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {timer_s1_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {timer_s1_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {timer_s1_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {timer_s1_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {timer_s1_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {timer_s1_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {timer_s1_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {timer_s1_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {timer_s1_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {timer_s1_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {timer_s1_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {timer_s1_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {timer_s1_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {timer_s1_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {timer_s1_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {timer_s1_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {timer_s1_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {timer_s1_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {timer_s1_agent} {PKT_DATA_H} {31};set_instance_parameter_value {timer_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {timer_s1_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {timer_s1_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {timer_s1_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {timer_s1_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {timer_s1_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {timer_s1_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {timer_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {timer_s1_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {timer_s1_agent} {ST_DATA_W} {97};set_instance_parameter_value {timer_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {timer_s1_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {timer_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {timer_s1_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {timer_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {timer_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {timer_s1_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {timer_s1_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {timer_s1_agent} {ID} {14};set_instance_parameter_value {timer_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {timer_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {timer_s1_agent} {ECC_ENABLE} {0};add_instance {timer_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {timer_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {led_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {led_s1_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {led_s1_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {led_s1_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {led_s1_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {led_s1_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {led_s1_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {led_s1_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {led_s1_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {led_s1_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {led_s1_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {led_s1_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {led_s1_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {led_s1_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {led_s1_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {led_s1_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {led_s1_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {led_s1_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {led_s1_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {led_s1_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {led_s1_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {led_s1_agent} {PKT_DATA_H} {31};set_instance_parameter_value {led_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {led_s1_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {led_s1_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {led_s1_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {led_s1_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {led_s1_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {led_s1_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {led_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {led_s1_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {led_s1_agent} {ST_DATA_W} {97};set_instance_parameter_value {led_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {led_s1_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {led_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {led_s1_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {led_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {led_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {led_s1_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {led_s1_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {led_s1_agent} {ID} {7};set_instance_parameter_value {led_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {led_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {led_s1_agent} {ECC_ENABLE} {0};add_instance {led_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {led_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {led_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {led_s1_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {led_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {led_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {led_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {led_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {led_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {led_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {led_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {led_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {led_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {led_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {led_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {sw_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {sw_s1_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {sw_s1_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {sw_s1_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {sw_s1_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {sw_s1_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {sw_s1_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {sw_s1_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {sw_s1_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {sw_s1_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {sw_s1_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {sw_s1_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {sw_s1_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {sw_s1_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {sw_s1_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {sw_s1_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {sw_s1_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {sw_s1_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {sw_s1_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {sw_s1_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {sw_s1_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {sw_s1_agent} {PKT_DATA_H} {31};set_instance_parameter_value {sw_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {sw_s1_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {sw_s1_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {sw_s1_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {sw_s1_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {sw_s1_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {sw_s1_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {sw_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {sw_s1_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {sw_s1_agent} {ST_DATA_W} {97};set_instance_parameter_value {sw_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {sw_s1_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {sw_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {sw_s1_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {sw_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {sw_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {sw_s1_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {sw_s1_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {sw_s1_agent} {ID} {12};set_instance_parameter_value {sw_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {sw_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {sw_s1_agent} {ECC_ENABLE} {0};add_instance {sw_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {sw_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {key_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {key_s1_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {key_s1_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {key_s1_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {key_s1_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {key_s1_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {key_s1_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {key_s1_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {key_s1_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {key_s1_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {key_s1_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {key_s1_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {key_s1_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {key_s1_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {key_s1_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {key_s1_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {key_s1_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {key_s1_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {key_s1_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {key_s1_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {key_s1_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {key_s1_agent} {PKT_DATA_H} {31};set_instance_parameter_value {key_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {key_s1_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {key_s1_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {key_s1_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {key_s1_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {key_s1_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {key_s1_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {key_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {key_s1_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {key_s1_agent} {ST_DATA_W} {97};set_instance_parameter_value {key_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {key_s1_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {key_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {key_s1_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {key_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {key_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {key_s1_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {key_s1_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {key_s1_agent} {ID} {6};set_instance_parameter_value {key_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {key_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {key_s1_agent} {ECC_ENABLE} {0};add_instance {key_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {key_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {key_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {key_s1_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {key_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {key_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {key_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {key_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {key_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {key_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {key_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {key_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {key_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {key_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {key_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {mipi_reset_n_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_DATA_H} {31};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {mipi_reset_n_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {mipi_reset_n_s1_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {mipi_reset_n_s1_agent} {ST_DATA_W} {97};set_instance_parameter_value {mipi_reset_n_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {mipi_reset_n_s1_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {mipi_reset_n_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {mipi_reset_n_s1_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {mipi_reset_n_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {mipi_reset_n_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {mipi_reset_n_s1_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {mipi_reset_n_s1_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {mipi_reset_n_s1_agent} {ID} {9};set_instance_parameter_value {mipi_reset_n_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {mipi_reset_n_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {mipi_reset_n_s1_agent} {ECC_ENABLE} {0};add_instance {mipi_reset_n_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {mipi_reset_n_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {mipi_pwdn_n_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_DATA_H} {31};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {ST_DATA_W} {97};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {ID} {8};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent} {ECC_ENABLE} {0};add_instance {mipi_pwdn_n_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {mipi_pwdn_n_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {EEE_IMGPROC_0_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_DATA_H} {31};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {ST_DATA_W} {97};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {ID} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent} {ECC_ENABLE} {0};add_instance {EEE_IMGPROC_0_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {EEE_IMGPROC_0_s1_agent_rdata_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {BITS_PER_SYMBOL} {34};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {USE_PACKETS} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {EMPTY_LATENCY} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {EEE_IMGPROC_0_s1_agent_rdata_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {uart_0_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {uart_0_s1_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {uart_0_s1_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {uart_0_s1_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {uart_0_s1_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {uart_0_s1_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {uart_0_s1_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {uart_0_s1_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {uart_0_s1_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {uart_0_s1_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {uart_0_s1_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {uart_0_s1_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {uart_0_s1_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {uart_0_s1_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {uart_0_s1_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {uart_0_s1_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {uart_0_s1_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {uart_0_s1_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {uart_0_s1_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {uart_0_s1_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {uart_0_s1_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {uart_0_s1_agent} {PKT_DATA_H} {31};set_instance_parameter_value {uart_0_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {uart_0_s1_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {uart_0_s1_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {uart_0_s1_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {uart_0_s1_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {uart_0_s1_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {uart_0_s1_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {uart_0_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {uart_0_s1_agent} {ST_CHANNEL_W} {16};set_instance_parameter_value {uart_0_s1_agent} {ST_DATA_W} {97};set_instance_parameter_value {uart_0_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {uart_0_s1_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {uart_0_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {uart_0_s1_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {uart_0_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {uart_0_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {uart_0_s1_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {uart_0_s1_agent} {MAX_BURSTWRAP} {7};set_instance_parameter_value {uart_0_s1_agent} {ID} {15};set_instance_parameter_value {uart_0_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {uart_0_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {uart_0_s1_agent} {ECC_ENABLE} {0};add_instance {uart_0_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {98};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {uart_0_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {router} {altera_merlin_router};set_instance_parameter_value {router} {DESTINATION_ID} {11 10 14 1 3 4 8 9 6 12 7 2 13 5 0 15 };set_instance_parameter_value {router} {CHANNEL_ID} {0000000010000000 0000000000010000 0000000100000000 0000000000100000 0000000000000100 0000000000000010 0010000000000000 0001000000000000 0000100000000000 0000010000000000 0000001000000000 0000000001000000 0000000000001000 0000000000000001 0100000000000000 1000000000000000 };set_instance_parameter_value {router} {TYPE_OF_TRANSACTION} {both both both both both both both both read read both both read both both both };set_instance_parameter_value {router} {START_ADDRESS} {0x20000 0x40800 0x41000 0x41020 0x41040 0x41060 0x41080 0x41090 0x410a0 0x410b0 0x410c0 0x410d0 0x410e0 0x410e8 0x42000 0x42020 };set_instance_parameter_value {router} {END_ADDRESS} {0x40000 0x41000 0x41020 0x41040 0x41060 0x41080 0x41090 0x410a0 0x410b0 0x410c0 0x410d0 0x410e0 0x410e8 0x410f0 0x42020 0x42040 };set_instance_parameter_value {router} {NON_SECURED_TAG} {1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 };set_instance_parameter_value {router} {SECURED_RANGE_PAIRS} {0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 };set_instance_parameter_value {router} {SECURED_RANGE_LIST} {0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 };set_instance_parameter_value {router} {SPAN_OFFSET} {};set_instance_parameter_value {router} {PKT_ADDR_H} {54};set_instance_parameter_value {router} {PKT_ADDR_L} {36};set_instance_parameter_value {router} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router} {PKT_TRANS_READ} {58};set_instance_parameter_value {router} {ST_DATA_W} {97};set_instance_parameter_value {router} {ST_CHANNEL_W} {16};set_instance_parameter_value {router} {DECODER_TYPE} {0};set_instance_parameter_value {router} {DEFAULT_CHANNEL} {7};set_instance_parameter_value {router} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router} {DEFAULT_DESTID} {11};set_instance_parameter_value {router} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router} {MEMORY_ALIASING_DECODE} {0};add_instance {router_001} {altera_merlin_router};set_instance_parameter_value {router_001} {DESTINATION_ID} {11 10 };set_instance_parameter_value {router_001} {CHANNEL_ID} {10 01 };set_instance_parameter_value {router_001} {TYPE_OF_TRANSACTION} {both both };set_instance_parameter_value {router_001} {START_ADDRESS} {0x20000 0x40800 };set_instance_parameter_value {router_001} {END_ADDRESS} {0x40000 0x41000 };set_instance_parameter_value {router_001} {NON_SECURED_TAG} {1 1 };set_instance_parameter_value {router_001} {SECURED_RANGE_PAIRS} {0 0 };set_instance_parameter_value {router_001} {SECURED_RANGE_LIST} {0 0 };set_instance_parameter_value {router_001} {SPAN_OFFSET} {};set_instance_parameter_value {router_001} {PKT_ADDR_H} {54};set_instance_parameter_value {router_001} {PKT_ADDR_L} {36};set_instance_parameter_value {router_001} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_001} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_001} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_001} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_001} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_001} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_001} {ST_DATA_W} {97};set_instance_parameter_value {router_001} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_001} {DECODER_TYPE} {0};set_instance_parameter_value {router_001} {DEFAULT_CHANNEL} {1};set_instance_parameter_value {router_001} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_001} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_001} {DEFAULT_DESTID} {11};set_instance_parameter_value {router_001} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_001} {MEMORY_ALIASING_DECODE} {0};add_instance {router_002} {altera_merlin_router};set_instance_parameter_value {router_002} {DESTINATION_ID} {0 };set_instance_parameter_value {router_002} {CHANNEL_ID} {1 };set_instance_parameter_value {router_002} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_002} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_002} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_002} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_002} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_002} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_002} {SPAN_OFFSET} {};set_instance_parameter_value {router_002} {PKT_ADDR_H} {54};set_instance_parameter_value {router_002} {PKT_ADDR_L} {36};set_instance_parameter_value {router_002} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_002} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_002} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_002} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_002} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_002} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_002} {ST_DATA_W} {97};set_instance_parameter_value {router_002} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_002} {DECODER_TYPE} {1};set_instance_parameter_value {router_002} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_002} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_002} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_002} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_002} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_002} {MEMORY_ALIASING_DECODE} {0};add_instance {router_003} {altera_merlin_router};set_instance_parameter_value {router_003} {DESTINATION_ID} {0 };set_instance_parameter_value {router_003} {CHANNEL_ID} {1 };set_instance_parameter_value {router_003} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_003} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_003} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_003} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_003} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_003} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_003} {SPAN_OFFSET} {};set_instance_parameter_value {router_003} {PKT_ADDR_H} {54};set_instance_parameter_value {router_003} {PKT_ADDR_L} {36};set_instance_parameter_value {router_003} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_003} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_003} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_003} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_003} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_003} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_003} {ST_DATA_W} {97};set_instance_parameter_value {router_003} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_003} {DECODER_TYPE} {1};set_instance_parameter_value {router_003} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_003} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_003} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_003} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_003} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_003} {MEMORY_ALIASING_DECODE} {0};add_instance {router_004} {altera_merlin_router};set_instance_parameter_value {router_004} {DESTINATION_ID} {0 };set_instance_parameter_value {router_004} {CHANNEL_ID} {1 };set_instance_parameter_value {router_004} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_004} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_004} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_004} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_004} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_004} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_004} {SPAN_OFFSET} {};set_instance_parameter_value {router_004} {PKT_ADDR_H} {54};set_instance_parameter_value {router_004} {PKT_ADDR_L} {36};set_instance_parameter_value {router_004} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_004} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_004} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_004} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_004} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_004} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_004} {ST_DATA_W} {97};set_instance_parameter_value {router_004} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_004} {DECODER_TYPE} {1};set_instance_parameter_value {router_004} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_004} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_004} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_004} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_004} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_004} {MEMORY_ALIASING_DECODE} {0};add_instance {router_005} {altera_merlin_router};set_instance_parameter_value {router_005} {DESTINATION_ID} {0 };set_instance_parameter_value {router_005} {CHANNEL_ID} {1 };set_instance_parameter_value {router_005} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_005} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_005} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_005} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_005} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_005} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_005} {SPAN_OFFSET} {};set_instance_parameter_value {router_005} {PKT_ADDR_H} {54};set_instance_parameter_value {router_005} {PKT_ADDR_L} {36};set_instance_parameter_value {router_005} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_005} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_005} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_005} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_005} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_005} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_005} {ST_DATA_W} {97};set_instance_parameter_value {router_005} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_005} {DECODER_TYPE} {1};set_instance_parameter_value {router_005} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_005} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_005} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_005} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_005} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_005} {MEMORY_ALIASING_DECODE} {0};add_instance {router_006} {altera_merlin_router};set_instance_parameter_value {router_006} {DESTINATION_ID} {0 1 };set_instance_parameter_value {router_006} {CHANNEL_ID} {01 10 };set_instance_parameter_value {router_006} {TYPE_OF_TRANSACTION} {both read };set_instance_parameter_value {router_006} {START_ADDRESS} {0x0 0x0 };set_instance_parameter_value {router_006} {END_ADDRESS} {0x0 0x0 };set_instance_parameter_value {router_006} {NON_SECURED_TAG} {1 1 };set_instance_parameter_value {router_006} {SECURED_RANGE_PAIRS} {0 0 };set_instance_parameter_value {router_006} {SECURED_RANGE_LIST} {0 0 };set_instance_parameter_value {router_006} {SPAN_OFFSET} {};set_instance_parameter_value {router_006} {PKT_ADDR_H} {54};set_instance_parameter_value {router_006} {PKT_ADDR_L} {36};set_instance_parameter_value {router_006} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_006} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_006} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_006} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_006} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_006} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_006} {ST_DATA_W} {97};set_instance_parameter_value {router_006} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_006} {DECODER_TYPE} {1};set_instance_parameter_value {router_006} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_006} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_006} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_006} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_006} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_006} {MEMORY_ALIASING_DECODE} {0};add_instance {router_007} {altera_merlin_router};set_instance_parameter_value {router_007} {DESTINATION_ID} {0 };set_instance_parameter_value {router_007} {CHANNEL_ID} {1 };set_instance_parameter_value {router_007} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_007} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_007} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_007} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_007} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_007} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_007} {SPAN_OFFSET} {};set_instance_parameter_value {router_007} {PKT_ADDR_H} {54};set_instance_parameter_value {router_007} {PKT_ADDR_L} {36};set_instance_parameter_value {router_007} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_007} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_007} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_007} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_007} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_007} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_007} {ST_DATA_W} {97};set_instance_parameter_value {router_007} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_007} {DECODER_TYPE} {1};set_instance_parameter_value {router_007} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_007} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_007} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_007} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_007} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_007} {MEMORY_ALIASING_DECODE} {0};add_instance {router_008} {altera_merlin_router};set_instance_parameter_value {router_008} {DESTINATION_ID} {0 };set_instance_parameter_value {router_008} {CHANNEL_ID} {1 };set_instance_parameter_value {router_008} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_008} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_008} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_008} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_008} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_008} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_008} {SPAN_OFFSET} {};set_instance_parameter_value {router_008} {PKT_ADDR_H} {54};set_instance_parameter_value {router_008} {PKT_ADDR_L} {36};set_instance_parameter_value {router_008} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_008} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_008} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_008} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_008} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_008} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_008} {ST_DATA_W} {97};set_instance_parameter_value {router_008} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_008} {DECODER_TYPE} {1};set_instance_parameter_value {router_008} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_008} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_008} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_008} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_008} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_008} {MEMORY_ALIASING_DECODE} {0};add_instance {router_009} {altera_merlin_router};set_instance_parameter_value {router_009} {DESTINATION_ID} {0 1 };set_instance_parameter_value {router_009} {CHANNEL_ID} {01 10 };set_instance_parameter_value {router_009} {TYPE_OF_TRANSACTION} {both read };set_instance_parameter_value {router_009} {START_ADDRESS} {0x0 0x0 };set_instance_parameter_value {router_009} {END_ADDRESS} {0x0 0x0 };set_instance_parameter_value {router_009} {NON_SECURED_TAG} {1 1 };set_instance_parameter_value {router_009} {SECURED_RANGE_PAIRS} {0 0 };set_instance_parameter_value {router_009} {SECURED_RANGE_LIST} {0 0 };set_instance_parameter_value {router_009} {SPAN_OFFSET} {};set_instance_parameter_value {router_009} {PKT_ADDR_H} {54};set_instance_parameter_value {router_009} {PKT_ADDR_L} {36};set_instance_parameter_value {router_009} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_009} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_009} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_009} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_009} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_009} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_009} {ST_DATA_W} {97};set_instance_parameter_value {router_009} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_009} {DECODER_TYPE} {1};set_instance_parameter_value {router_009} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_009} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_009} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_009} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_009} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_009} {MEMORY_ALIASING_DECODE} {0};add_instance {router_010} {altera_merlin_router};set_instance_parameter_value {router_010} {DESTINATION_ID} {0 };set_instance_parameter_value {router_010} {CHANNEL_ID} {1 };set_instance_parameter_value {router_010} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_010} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_010} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_010} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_010} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_010} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_010} {SPAN_OFFSET} {};set_instance_parameter_value {router_010} {PKT_ADDR_H} {54};set_instance_parameter_value {router_010} {PKT_ADDR_L} {36};set_instance_parameter_value {router_010} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_010} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_010} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_010} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_010} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_010} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_010} {ST_DATA_W} {97};set_instance_parameter_value {router_010} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_010} {DECODER_TYPE} {1};set_instance_parameter_value {router_010} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_010} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_010} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_010} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_010} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_010} {MEMORY_ALIASING_DECODE} {0};add_instance {router_011} {altera_merlin_router};set_instance_parameter_value {router_011} {DESTINATION_ID} {0 };set_instance_parameter_value {router_011} {CHANNEL_ID} {1 };set_instance_parameter_value {router_011} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_011} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_011} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_011} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_011} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_011} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_011} {SPAN_OFFSET} {};set_instance_parameter_value {router_011} {PKT_ADDR_H} {54};set_instance_parameter_value {router_011} {PKT_ADDR_L} {36};set_instance_parameter_value {router_011} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_011} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_011} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_011} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_011} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_011} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_011} {ST_DATA_W} {97};set_instance_parameter_value {router_011} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_011} {DECODER_TYPE} {1};set_instance_parameter_value {router_011} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_011} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_011} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_011} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_011} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_011} {MEMORY_ALIASING_DECODE} {0};add_instance {router_012} {altera_merlin_router};set_instance_parameter_value {router_012} {DESTINATION_ID} {0 };set_instance_parameter_value {router_012} {CHANNEL_ID} {1 };set_instance_parameter_value {router_012} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_012} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_012} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_012} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_012} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_012} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_012} {SPAN_OFFSET} {};set_instance_parameter_value {router_012} {PKT_ADDR_H} {54};set_instance_parameter_value {router_012} {PKT_ADDR_L} {36};set_instance_parameter_value {router_012} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_012} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_012} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_012} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_012} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_012} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_012} {ST_DATA_W} {97};set_instance_parameter_value {router_012} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_012} {DECODER_TYPE} {1};set_instance_parameter_value {router_012} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_012} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_012} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_012} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_012} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_012} {MEMORY_ALIASING_DECODE} {0};add_instance {router_013} {altera_merlin_router};set_instance_parameter_value {router_013} {DESTINATION_ID} {0 };set_instance_parameter_value {router_013} {CHANNEL_ID} {1 };set_instance_parameter_value {router_013} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_013} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_013} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_013} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_013} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_013} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_013} {SPAN_OFFSET} {};set_instance_parameter_value {router_013} {PKT_ADDR_H} {54};set_instance_parameter_value {router_013} {PKT_ADDR_L} {36};set_instance_parameter_value {router_013} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_013} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_013} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_013} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_013} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_013} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_013} {ST_DATA_W} {97};set_instance_parameter_value {router_013} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_013} {DECODER_TYPE} {1};set_instance_parameter_value {router_013} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_013} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_013} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_013} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_013} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_013} {MEMORY_ALIASING_DECODE} {0};add_instance {router_014} {altera_merlin_router};set_instance_parameter_value {router_014} {DESTINATION_ID} {0 };set_instance_parameter_value {router_014} {CHANNEL_ID} {1 };set_instance_parameter_value {router_014} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_014} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_014} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_014} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_014} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_014} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_014} {SPAN_OFFSET} {};set_instance_parameter_value {router_014} {PKT_ADDR_H} {54};set_instance_parameter_value {router_014} {PKT_ADDR_L} {36};set_instance_parameter_value {router_014} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_014} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_014} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_014} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_014} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_014} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_014} {ST_DATA_W} {97};set_instance_parameter_value {router_014} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_014} {DECODER_TYPE} {1};set_instance_parameter_value {router_014} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_014} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_014} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_014} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_014} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_014} {MEMORY_ALIASING_DECODE} {0};add_instance {router_015} {altera_merlin_router};set_instance_parameter_value {router_015} {DESTINATION_ID} {0 };set_instance_parameter_value {router_015} {CHANNEL_ID} {1 };set_instance_parameter_value {router_015} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_015} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_015} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_015} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_015} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_015} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_015} {SPAN_OFFSET} {};set_instance_parameter_value {router_015} {PKT_ADDR_H} {54};set_instance_parameter_value {router_015} {PKT_ADDR_L} {36};set_instance_parameter_value {router_015} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_015} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_015} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_015} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_015} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_015} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_015} {ST_DATA_W} {97};set_instance_parameter_value {router_015} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_015} {DECODER_TYPE} {1};set_instance_parameter_value {router_015} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_015} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_015} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_015} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_015} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_015} {MEMORY_ALIASING_DECODE} {0};add_instance {router_016} {altera_merlin_router};set_instance_parameter_value {router_016} {DESTINATION_ID} {0 };set_instance_parameter_value {router_016} {CHANNEL_ID} {1 };set_instance_parameter_value {router_016} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_016} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_016} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_016} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_016} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_016} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_016} {SPAN_OFFSET} {};set_instance_parameter_value {router_016} {PKT_ADDR_H} {54};set_instance_parameter_value {router_016} {PKT_ADDR_L} {36};set_instance_parameter_value {router_016} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_016} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_016} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_016} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_016} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_016} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_016} {ST_DATA_W} {97};set_instance_parameter_value {router_016} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_016} {DECODER_TYPE} {1};set_instance_parameter_value {router_016} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_016} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_016} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_016} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_016} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_016} {MEMORY_ALIASING_DECODE} {0};add_instance {router_017} {altera_merlin_router};set_instance_parameter_value {router_017} {DESTINATION_ID} {0 };set_instance_parameter_value {router_017} {CHANNEL_ID} {1 };set_instance_parameter_value {router_017} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_017} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_017} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_017} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_017} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_017} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_017} {SPAN_OFFSET} {};set_instance_parameter_value {router_017} {PKT_ADDR_H} {54};set_instance_parameter_value {router_017} {PKT_ADDR_L} {36};set_instance_parameter_value {router_017} {PKT_PROTECTION_H} {87};set_instance_parameter_value {router_017} {PKT_PROTECTION_L} {85};set_instance_parameter_value {router_017} {PKT_DEST_ID_H} {83};set_instance_parameter_value {router_017} {PKT_DEST_ID_L} {80};set_instance_parameter_value {router_017} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {router_017} {PKT_TRANS_READ} {58};set_instance_parameter_value {router_017} {ST_DATA_W} {97};set_instance_parameter_value {router_017} {ST_CHANNEL_W} {16};set_instance_parameter_value {router_017} {DECODER_TYPE} {1};set_instance_parameter_value {router_017} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_017} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_017} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_017} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_017} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_017} {MEMORY_ALIASING_DECODE} {0};add_instance {nios2_gen2_data_master_limiter} {altera_merlin_traffic_limiter};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PKT_DEST_ID_H} {83};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PKT_DEST_ID_L} {80};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PKT_SRC_ID_H} {79};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PKT_SRC_ID_L} {76};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PKT_BYTEEN_H} {35};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PKT_BYTEEN_L} {32};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PKT_THREAD_ID_H} {84};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PKT_THREAD_ID_L} {84};set_instance_parameter_value {nios2_gen2_data_master_limiter} {MAX_BURST_LENGTH} {1};set_instance_parameter_value {nios2_gen2_data_master_limiter} {MAX_OUTSTANDING_RESPONSES} {5};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PIPELINED} {0};set_instance_parameter_value {nios2_gen2_data_master_limiter} {ST_DATA_W} {97};set_instance_parameter_value {nios2_gen2_data_master_limiter} {ST_CHANNEL_W} {16};set_instance_parameter_value {nios2_gen2_data_master_limiter} {VALID_WIDTH} {16};set_instance_parameter_value {nios2_gen2_data_master_limiter} {ENFORCE_ORDER} {1};set_instance_parameter_value {nios2_gen2_data_master_limiter} {PREVENT_HAZARDS} {0};set_instance_parameter_value {nios2_gen2_data_master_limiter} {SUPPORTS_POSTED_WRITES} {1};set_instance_parameter_value {nios2_gen2_data_master_limiter} {SUPPORTS_NONPOSTED_WRITES} {0};set_instance_parameter_value {nios2_gen2_data_master_limiter} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {nios2_gen2_data_master_limiter} {REORDER} {0};add_instance {nios2_gen2_instruction_master_limiter} {altera_merlin_traffic_limiter};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PKT_DEST_ID_H} {83};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PKT_DEST_ID_L} {80};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PKT_SRC_ID_H} {79};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PKT_SRC_ID_L} {76};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PKT_BYTEEN_H} {35};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PKT_BYTEEN_L} {32};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PKT_THREAD_ID_H} {84};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PKT_THREAD_ID_L} {84};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {MAX_BURST_LENGTH} {1};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {MAX_OUTSTANDING_RESPONSES} {1};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PIPELINED} {0};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {ST_DATA_W} {97};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {ST_CHANNEL_W} {16};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {VALID_WIDTH} {16};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {ENFORCE_ORDER} {1};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {PREVENT_HAZARDS} {0};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {SUPPORTS_POSTED_WRITES} {1};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {SUPPORTS_NONPOSTED_WRITES} {0};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};set_instance_parameter_value {nios2_gen2_instruction_master_limiter} {REORDER} {0};add_instance {cmd_demux} {altera_merlin_demultiplexer};set_instance_parameter_value {cmd_demux} {ST_DATA_W} {97};set_instance_parameter_value {cmd_demux} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_demux} {NUM_OUTPUTS} {16};set_instance_parameter_value {cmd_demux} {VALID_WIDTH} {16};set_instance_parameter_value {cmd_demux} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_demux_001} {altera_merlin_demultiplexer};set_instance_parameter_value {cmd_demux_001} {ST_DATA_W} {97};set_instance_parameter_value {cmd_demux_001} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_demux_001} {NUM_OUTPUTS} {2};set_instance_parameter_value {cmd_demux_001} {VALID_WIDTH} {16};set_instance_parameter_value {cmd_demux_001} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_001} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_001} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_001} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_001} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_001} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_001} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_001} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_001} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_001} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_001} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_002} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_002} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_002} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_002} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_002} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_002} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_002} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_002} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_002} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_002} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_003} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_003} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_003} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_003} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_003} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_003} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_003} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_003} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_003} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_003} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_004} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_004} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_004} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_004} {NUM_INPUTS} {2};set_instance_parameter_value {cmd_mux_004} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_004} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_004} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_004} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_004} {ARBITRATION_SHARES} {1 1 };set_instance_parameter_value {cmd_mux_004} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_005} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_005} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_005} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_005} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_005} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_005} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_005} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_005} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_005} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_005} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_006} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_006} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_006} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_006} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_006} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_006} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_006} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_006} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_006} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_006} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_007} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_007} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_007} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_007} {NUM_INPUTS} {2};set_instance_parameter_value {cmd_mux_007} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_007} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_007} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_007} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_007} {ARBITRATION_SHARES} {1 1 };set_instance_parameter_value {cmd_mux_007} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_008} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_008} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_008} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_008} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_008} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_008} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_008} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_008} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_008} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_008} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_009} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_009} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_009} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_009} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_009} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_009} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_009} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_009} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_009} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_009} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_010} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_010} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_010} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_010} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_010} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_010} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_010} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_010} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_010} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_010} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_011} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_011} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_011} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_011} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_011} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_011} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_011} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_011} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_011} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_011} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_012} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_012} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_012} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_012} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_012} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_012} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_012} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_012} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_012} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_012} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_013} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_013} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_013} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_013} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_013} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_013} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_013} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_013} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_013} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_013} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_014} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_014} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_014} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_014} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_014} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_014} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_014} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_014} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_014} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_014} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {cmd_mux_015} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_015} {ST_DATA_W} {97};set_instance_parameter_value {cmd_mux_015} {ST_CHANNEL_W} {16};set_instance_parameter_value {cmd_mux_015} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_015} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_015} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_015} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {cmd_mux_015} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_015} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_015} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_001} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_001} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_001} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_001} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_001} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_001} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_002} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_002} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_002} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_002} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_002} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_002} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_003} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_003} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_003} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_003} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_003} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_003} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_004} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_004} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_004} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_004} {NUM_OUTPUTS} {2};set_instance_parameter_value {rsp_demux_004} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_004} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_005} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_005} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_005} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_005} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_005} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_005} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_006} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_006} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_006} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_006} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_006} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_006} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_007} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_007} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_007} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_007} {NUM_OUTPUTS} {2};set_instance_parameter_value {rsp_demux_007} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_007} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_008} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_008} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_008} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_008} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_008} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_008} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_009} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_009} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_009} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_009} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_009} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_009} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_010} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_010} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_010} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_010} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_010} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_010} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_011} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_011} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_011} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_011} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_011} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_011} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_012} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_012} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_012} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_012} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_012} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_012} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_013} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_013} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_013} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_013} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_013} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_013} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_014} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_014} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_014} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_014} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_014} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_014} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_demux_015} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_015} {ST_DATA_W} {97};set_instance_parameter_value {rsp_demux_015} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_demux_015} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_015} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_015} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_mux} {altera_merlin_multiplexer};set_instance_parameter_value {rsp_mux} {ST_DATA_W} {97};set_instance_parameter_value {rsp_mux} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_mux} {NUM_INPUTS} {16};set_instance_parameter_value {rsp_mux} {PIPELINE_ARB} {0};set_instance_parameter_value {rsp_mux} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {rsp_mux} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {rsp_mux} {ARBITRATION_SCHEME} {no-arb};set_instance_parameter_value {rsp_mux} {ARBITRATION_SHARES} {1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 };set_instance_parameter_value {rsp_mux} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {rsp_mux_001} {altera_merlin_multiplexer};set_instance_parameter_value {rsp_mux_001} {ST_DATA_W} {97};set_instance_parameter_value {rsp_mux_001} {ST_CHANNEL_W} {16};set_instance_parameter_value {rsp_mux_001} {NUM_INPUTS} {2};set_instance_parameter_value {rsp_mux_001} {PIPELINE_ARB} {0};set_instance_parameter_value {rsp_mux_001} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {rsp_mux_001} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {rsp_mux_001} {ARBITRATION_SCHEME} {no-arb};set_instance_parameter_value {rsp_mux_001} {ARBITRATION_SHARES} {1 1 };set_instance_parameter_value {rsp_mux_001} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)};add_instance {crosser} {altera_avalon_st_handshake_clock_crosser};set_instance_parameter_value {crosser} {DATA_WIDTH} {97};set_instance_parameter_value {crosser} {BITS_PER_SYMBOL} {97};set_instance_parameter_value {crosser} {USE_PACKETS} {1};set_instance_parameter_value {crosser} {USE_CHANNEL} {1};set_instance_parameter_value {crosser} {CHANNEL_WIDTH} {16};set_instance_parameter_value {crosser} {MAX_CHANNEL} {0};set_instance_parameter_value {crosser} {USE_ERROR} {0};set_instance_parameter_value {crosser} {ERROR_WIDTH} {1};set_instance_parameter_value {crosser} {VALID_SYNC_DEPTH} {2};set_instance_parameter_value {crosser} {READY_SYNC_DEPTH} {2};set_instance_parameter_value {crosser} {USE_OUTPUT_PIPELINE} {0};add_instance {crosser_001} {altera_avalon_st_handshake_clock_crosser};set_instance_parameter_value {crosser_001} {DATA_WIDTH} {97};set_instance_parameter_value {crosser_001} {BITS_PER_SYMBOL} {97};set_instance_parameter_value {crosser_001} {USE_PACKETS} {1};set_instance_parameter_value {crosser_001} {USE_CHANNEL} {1};set_instance_parameter_value {crosser_001} {CHANNEL_WIDTH} {16};set_instance_parameter_value {crosser_001} {MAX_CHANNEL} {0};set_instance_parameter_value {crosser_001} {USE_ERROR} {0};set_instance_parameter_value {crosser_001} {ERROR_WIDTH} {1};set_instance_parameter_value {crosser_001} {VALID_SYNC_DEPTH} {2};set_instance_parameter_value {crosser_001} {READY_SYNC_DEPTH} {2};set_instance_parameter_value {crosser_001} {USE_OUTPUT_PIPELINE} {0};add_instance {crosser_002} {altera_avalon_st_handshake_clock_crosser};set_instance_parameter_value {crosser_002} {DATA_WIDTH} {97};set_instance_parameter_value {crosser_002} {BITS_PER_SYMBOL} {97};set_instance_parameter_value {crosser_002} {USE_PACKETS} {1};set_instance_parameter_value {crosser_002} {USE_CHANNEL} {1};set_instance_parameter_value {crosser_002} {CHANNEL_WIDTH} {16};set_instance_parameter_value {crosser_002} {MAX_CHANNEL} {0};set_instance_parameter_value {crosser_002} {USE_ERROR} {0};set_instance_parameter_value {crosser_002} {ERROR_WIDTH} {1};set_instance_parameter_value {crosser_002} {VALID_SYNC_DEPTH} {2};set_instance_parameter_value {crosser_002} {READY_SYNC_DEPTH} {2};set_instance_parameter_value {crosser_002} {USE_OUTPUT_PIPELINE} {0};add_instance {crosser_003} {altera_avalon_st_handshake_clock_crosser};set_instance_parameter_value {crosser_003} {DATA_WIDTH} {97};set_instance_parameter_value {crosser_003} {BITS_PER_SYMBOL} {97};set_instance_parameter_value {crosser_003} {USE_PACKETS} {1};set_instance_parameter_value {crosser_003} {USE_CHANNEL} {1};set_instance_parameter_value {crosser_003} {CHANNEL_WIDTH} {16};set_instance_parameter_value {crosser_003} {MAX_CHANNEL} {0};set_instance_parameter_value {crosser_003} {USE_ERROR} {0};set_instance_parameter_value {crosser_003} {ERROR_WIDTH} {1};set_instance_parameter_value {crosser_003} {VALID_SYNC_DEPTH} {2};set_instance_parameter_value {crosser_003} {READY_SYNC_DEPTH} {2};set_instance_parameter_value {crosser_003} {USE_OUTPUT_PIPELINE} {0};add_instance {nios2_gen2_reset_reset_bridge} {altera_reset_bridge};set_instance_parameter_value {nios2_gen2_reset_reset_bridge} {ACTIVE_LOW_RESET} {0};set_instance_parameter_value {nios2_gen2_reset_reset_bridge} {SYNCHRONOUS_EDGES} {deassert};set_instance_parameter_value {nios2_gen2_reset_reset_bridge} {NUM_RESET_OUTPUTS} {1};set_instance_parameter_value {nios2_gen2_reset_reset_bridge} {USE_RESET_REQUEST} {0};add_instance {TERASIC_AUTO_FOCUS_0_reset_reset_bridge} {altera_reset_bridge};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_reset_reset_bridge} {ACTIVE_LOW_RESET} {0};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_reset_reset_bridge} {SYNCHRONOUS_EDGES} {deassert};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_reset_reset_bridge} {NUM_RESET_OUTPUTS} {1};set_instance_parameter_value {TERASIC_AUTO_FOCUS_0_reset_reset_bridge} {USE_RESET_REQUEST} {0};add_instance {altpll_0_inclk_interface_reset_reset_bridge} {altera_reset_bridge};set_instance_parameter_value {altpll_0_inclk_interface_reset_reset_bridge} {ACTIVE_LOW_RESET} {0};set_instance_parameter_value {altpll_0_inclk_interface_reset_reset_bridge} {SYNCHRONOUS_EDGES} {deassert};set_instance_parameter_value {altpll_0_inclk_interface_reset_reset_bridge} {NUM_RESET_OUTPUTS} {1};set_instance_parameter_value {altpll_0_inclk_interface_reset_reset_bridge} {USE_RESET_REQUEST} {0};add_instance {clk_50_clk_clock_bridge} {altera_clock_bridge};set_instance_parameter_value {clk_50_clk_clock_bridge} {EXPLICIT_CLOCK_RATE} {50000000};set_instance_parameter_value {clk_50_clk_clock_bridge} {NUM_CLOCK_OUTPUTS} {1};add_instance {altpll_0_c2_clock_bridge} {altera_clock_bridge};set_instance_parameter_value {altpll_0_c2_clock_bridge} {EXPLICIT_CLOCK_RATE} {100000000};set_instance_parameter_value {altpll_0_c2_clock_bridge} {NUM_CLOCK_OUTPUTS} {1};add_connection {nios2_gen2_data_master_translator.avalon_universal_master_0} {nios2_gen2_data_master_agent.av} {avalon};set_connection_parameter_value {nios2_gen2_data_master_translator.avalon_universal_master_0/nios2_gen2_data_master_agent.av} {arbitrationPriority} {1};set_connection_parameter_value {nios2_gen2_data_master_translator.avalon_universal_master_0/nios2_gen2_data_master_agent.av} {baseAddress} {0x0000};set_connection_parameter_value {nios2_gen2_data_master_translator.avalon_universal_master_0/nios2_gen2_data_master_agent.av} {defaultConnection} {false};add_connection {nios2_gen2_instruction_master_translator.avalon_universal_master_0} {nios2_gen2_instruction_master_agent.av} {avalon};set_connection_parameter_value {nios2_gen2_instruction_master_translator.avalon_universal_master_0/nios2_gen2_instruction_master_agent.av} {arbitrationPriority} {1};set_connection_parameter_value {nios2_gen2_instruction_master_translator.avalon_universal_master_0/nios2_gen2_instruction_master_agent.av} {baseAddress} {0x0000};set_connection_parameter_value {nios2_gen2_instruction_master_translator.avalon_universal_master_0/nios2_gen2_instruction_master_agent.av} {defaultConnection} {false};add_connection {jtag_uart_avalon_jtag_slave_agent.m0} {jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {jtag_uart_avalon_jtag_slave_agent.m0/jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {jtag_uart_avalon_jtag_slave_agent.m0/jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {jtag_uart_avalon_jtag_slave_agent.m0/jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {jtag_uart_avalon_jtag_slave_agent.rf_source} {jtag_uart_avalon_jtag_slave_agent_rsp_fifo.in} {avalon_streaming};add_connection {jtag_uart_avalon_jtag_slave_agent_rsp_fifo.out} {jtag_uart_avalon_jtag_slave_agent.rf_sink} {avalon_streaming};add_connection {jtag_uart_avalon_jtag_slave_agent.rdata_fifo_src} {jtag_uart_avalon_jtag_slave_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux.src} {jtag_uart_avalon_jtag_slave_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux.src/jtag_uart_avalon_jtag_slave_agent.cp} {qsys_mm.command};add_connection {i2c_opencores_mipi_avalon_slave_0_agent.m0} {i2c_opencores_mipi_avalon_slave_0_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent.m0/i2c_opencores_mipi_avalon_slave_0_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent.m0/i2c_opencores_mipi_avalon_slave_0_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {i2c_opencores_mipi_avalon_slave_0_agent.m0/i2c_opencores_mipi_avalon_slave_0_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {i2c_opencores_mipi_avalon_slave_0_agent.rf_source} {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo.in} {avalon_streaming};add_connection {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo.out} {i2c_opencores_mipi_avalon_slave_0_agent.rf_sink} {avalon_streaming};add_connection {i2c_opencores_mipi_avalon_slave_0_agent.rdata_fifo_src} {i2c_opencores_mipi_avalon_slave_0_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_001.src} {i2c_opencores_mipi_avalon_slave_0_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_001.src/i2c_opencores_mipi_avalon_slave_0_agent.cp} {qsys_mm.command};add_connection {i2c_opencores_camera_avalon_slave_0_agent.m0} {i2c_opencores_camera_avalon_slave_0_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {i2c_opencores_camera_avalon_slave_0_agent.m0/i2c_opencores_camera_avalon_slave_0_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {i2c_opencores_camera_avalon_slave_0_agent.m0/i2c_opencores_camera_avalon_slave_0_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {i2c_opencores_camera_avalon_slave_0_agent.m0/i2c_opencores_camera_avalon_slave_0_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {i2c_opencores_camera_avalon_slave_0_agent.rf_source} {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo.in} {avalon_streaming};add_connection {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo.out} {i2c_opencores_camera_avalon_slave_0_agent.rf_sink} {avalon_streaming};add_connection {i2c_opencores_camera_avalon_slave_0_agent.rdata_fifo_src} {i2c_opencores_camera_avalon_slave_0_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_002.src} {i2c_opencores_camera_avalon_slave_0_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_002.src/i2c_opencores_camera_avalon_slave_0_agent.cp} {qsys_mm.command};add_connection {sysid_qsys_control_slave_agent.m0} {sysid_qsys_control_slave_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {sysid_qsys_control_slave_agent.m0/sysid_qsys_control_slave_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {sysid_qsys_control_slave_agent.m0/sysid_qsys_control_slave_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {sysid_qsys_control_slave_agent.m0/sysid_qsys_control_slave_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {sysid_qsys_control_slave_agent.rf_source} {sysid_qsys_control_slave_agent_rsp_fifo.in} {avalon_streaming};add_connection {sysid_qsys_control_slave_agent_rsp_fifo.out} {sysid_qsys_control_slave_agent.rf_sink} {avalon_streaming};add_connection {sysid_qsys_control_slave_agent.rdata_fifo_src} {sysid_qsys_control_slave_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_003.src} {sysid_qsys_control_slave_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_003.src/sysid_qsys_control_slave_agent.cp} {qsys_mm.command};add_connection {nios2_gen2_debug_mem_slave_agent.m0} {nios2_gen2_debug_mem_slave_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {nios2_gen2_debug_mem_slave_agent.m0/nios2_gen2_debug_mem_slave_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {nios2_gen2_debug_mem_slave_agent.m0/nios2_gen2_debug_mem_slave_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {nios2_gen2_debug_mem_slave_agent.m0/nios2_gen2_debug_mem_slave_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {nios2_gen2_debug_mem_slave_agent.rf_source} {nios2_gen2_debug_mem_slave_agent_rsp_fifo.in} {avalon_streaming};add_connection {nios2_gen2_debug_mem_slave_agent_rsp_fifo.out} {nios2_gen2_debug_mem_slave_agent.rf_sink} {avalon_streaming};add_connection {nios2_gen2_debug_mem_slave_agent.rdata_fifo_src} {nios2_gen2_debug_mem_slave_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_004.src} {nios2_gen2_debug_mem_slave_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_004.src/nios2_gen2_debug_mem_slave_agent.cp} {qsys_mm.command};add_connection {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.m0} {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.m0/TERASIC_AUTO_FOCUS_0_mm_ctrl_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.m0/TERASIC_AUTO_FOCUS_0_mm_ctrl_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.m0/TERASIC_AUTO_FOCUS_0_mm_ctrl_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.rf_source} {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo.in} {avalon_streaming};add_connection {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo.out} {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.rf_sink} {avalon_streaming};add_connection {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.rdata_fifo_src} {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo.in} {avalon_streaming};add_connection {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo.out} {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_005.src} {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_005.src/TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.cp} {qsys_mm.command};add_connection {altpll_0_pll_slave_agent.m0} {altpll_0_pll_slave_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {altpll_0_pll_slave_agent.m0/altpll_0_pll_slave_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {altpll_0_pll_slave_agent.m0/altpll_0_pll_slave_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {altpll_0_pll_slave_agent.m0/altpll_0_pll_slave_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {altpll_0_pll_slave_agent.rf_source} {altpll_0_pll_slave_agent_rsp_fifo.in} {avalon_streaming};add_connection {altpll_0_pll_slave_agent_rsp_fifo.out} {altpll_0_pll_slave_agent.rf_sink} {avalon_streaming};add_connection {altpll_0_pll_slave_agent.rdata_fifo_src} {altpll_0_pll_slave_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_006.src} {altpll_0_pll_slave_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_006.src/altpll_0_pll_slave_agent.cp} {qsys_mm.command};add_connection {onchip_memory2_0_s1_agent.m0} {onchip_memory2_0_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {onchip_memory2_0_s1_agent.m0/onchip_memory2_0_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {onchip_memory2_0_s1_agent.m0/onchip_memory2_0_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {onchip_memory2_0_s1_agent.m0/onchip_memory2_0_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {onchip_memory2_0_s1_agent.rf_source} {onchip_memory2_0_s1_agent_rsp_fifo.in} {avalon_streaming};add_connection {onchip_memory2_0_s1_agent_rsp_fifo.out} {onchip_memory2_0_s1_agent.rf_sink} {avalon_streaming};add_connection {onchip_memory2_0_s1_agent.rdata_fifo_src} {onchip_memory2_0_s1_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_007.src} {onchip_memory2_0_s1_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_007.src/onchip_memory2_0_s1_agent.cp} {qsys_mm.command};add_connection {timer_s1_agent.m0} {timer_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {timer_s1_agent.m0/timer_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {timer_s1_agent.m0/timer_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {timer_s1_agent.m0/timer_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {timer_s1_agent.rf_source} {timer_s1_agent_rsp_fifo.in} {avalon_streaming};add_connection {timer_s1_agent_rsp_fifo.out} {timer_s1_agent.rf_sink} {avalon_streaming};add_connection {timer_s1_agent.rdata_fifo_src} {timer_s1_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_008.src} {timer_s1_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_008.src/timer_s1_agent.cp} {qsys_mm.command};add_connection {led_s1_agent.m0} {led_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {led_s1_agent.m0/led_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {led_s1_agent.m0/led_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {led_s1_agent.m0/led_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {led_s1_agent.rf_source} {led_s1_agent_rsp_fifo.in} {avalon_streaming};add_connection {led_s1_agent_rsp_fifo.out} {led_s1_agent.rf_sink} {avalon_streaming};add_connection {led_s1_agent.rdata_fifo_src} {led_s1_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_009.src} {led_s1_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_009.src/led_s1_agent.cp} {qsys_mm.command};add_connection {sw_s1_agent.m0} {sw_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {sw_s1_agent.m0/sw_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {sw_s1_agent.m0/sw_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {sw_s1_agent.m0/sw_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {sw_s1_agent.rf_source} {sw_s1_agent_rsp_fifo.in} {avalon_streaming};add_connection {sw_s1_agent_rsp_fifo.out} {sw_s1_agent.rf_sink} {avalon_streaming};add_connection {sw_s1_agent.rdata_fifo_src} {sw_s1_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_010.src} {sw_s1_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_010.src/sw_s1_agent.cp} {qsys_mm.command};add_connection {key_s1_agent.m0} {key_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {key_s1_agent.m0/key_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {key_s1_agent.m0/key_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {key_s1_agent.m0/key_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {key_s1_agent.rf_source} {key_s1_agent_rsp_fifo.in} {avalon_streaming};add_connection {key_s1_agent_rsp_fifo.out} {key_s1_agent.rf_sink} {avalon_streaming};add_connection {key_s1_agent.rdata_fifo_src} {key_s1_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_011.src} {key_s1_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_011.src/key_s1_agent.cp} {qsys_mm.command};add_connection {mipi_reset_n_s1_agent.m0} {mipi_reset_n_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {mipi_reset_n_s1_agent.m0/mipi_reset_n_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {mipi_reset_n_s1_agent.m0/mipi_reset_n_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {mipi_reset_n_s1_agent.m0/mipi_reset_n_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {mipi_reset_n_s1_agent.rf_source} {mipi_reset_n_s1_agent_rsp_fifo.in} {avalon_streaming};add_connection {mipi_reset_n_s1_agent_rsp_fifo.out} {mipi_reset_n_s1_agent.rf_sink} {avalon_streaming};add_connection {mipi_reset_n_s1_agent.rdata_fifo_src} {mipi_reset_n_s1_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_012.src} {mipi_reset_n_s1_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_012.src/mipi_reset_n_s1_agent.cp} {qsys_mm.command};add_connection {mipi_pwdn_n_s1_agent.m0} {mipi_pwdn_n_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {mipi_pwdn_n_s1_agent.m0/mipi_pwdn_n_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {mipi_pwdn_n_s1_agent.m0/mipi_pwdn_n_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {mipi_pwdn_n_s1_agent.m0/mipi_pwdn_n_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {mipi_pwdn_n_s1_agent.rf_source} {mipi_pwdn_n_s1_agent_rsp_fifo.in} {avalon_streaming};add_connection {mipi_pwdn_n_s1_agent_rsp_fifo.out} {mipi_pwdn_n_s1_agent.rf_sink} {avalon_streaming};add_connection {mipi_pwdn_n_s1_agent.rdata_fifo_src} {mipi_pwdn_n_s1_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_013.src} {mipi_pwdn_n_s1_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_013.src/mipi_pwdn_n_s1_agent.cp} {qsys_mm.command};add_connection {EEE_IMGPROC_0_s1_agent.m0} {EEE_IMGPROC_0_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {EEE_IMGPROC_0_s1_agent.m0/EEE_IMGPROC_0_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {EEE_IMGPROC_0_s1_agent.m0/EEE_IMGPROC_0_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {EEE_IMGPROC_0_s1_agent.m0/EEE_IMGPROC_0_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {EEE_IMGPROC_0_s1_agent.rf_source} {EEE_IMGPROC_0_s1_agent_rsp_fifo.in} {avalon_streaming};add_connection {EEE_IMGPROC_0_s1_agent_rsp_fifo.out} {EEE_IMGPROC_0_s1_agent.rf_sink} {avalon_streaming};add_connection {EEE_IMGPROC_0_s1_agent.rdata_fifo_src} {EEE_IMGPROC_0_s1_agent_rdata_fifo.in} {avalon_streaming};add_connection {EEE_IMGPROC_0_s1_agent_rdata_fifo.out} {EEE_IMGPROC_0_s1_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_014.src} {EEE_IMGPROC_0_s1_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_014.src/EEE_IMGPROC_0_s1_agent.cp} {qsys_mm.command};add_connection {uart_0_s1_agent.m0} {uart_0_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {uart_0_s1_agent.m0/uart_0_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {uart_0_s1_agent.m0/uart_0_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {uart_0_s1_agent.m0/uart_0_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {uart_0_s1_agent.rf_source} {uart_0_s1_agent_rsp_fifo.in} {avalon_streaming};add_connection {uart_0_s1_agent_rsp_fifo.out} {uart_0_s1_agent.rf_sink} {avalon_streaming};add_connection {uart_0_s1_agent.rdata_fifo_src} {uart_0_s1_agent.rdata_fifo_sink} {avalon_streaming};add_connection {cmd_mux_015.src} {uart_0_s1_agent.cp} {avalon_streaming};preview_set_connection_tag {cmd_mux_015.src/uart_0_s1_agent.cp} {qsys_mm.command};add_connection {nios2_gen2_data_master_agent.cp} {router.sink} {avalon_streaming};preview_set_connection_tag {nios2_gen2_data_master_agent.cp/router.sink} {qsys_mm.command};add_connection {nios2_gen2_instruction_master_agent.cp} {router_001.sink} {avalon_streaming};preview_set_connection_tag {nios2_gen2_instruction_master_agent.cp/router_001.sink} {qsys_mm.command};add_connection {jtag_uart_avalon_jtag_slave_agent.rp} {router_002.sink} {avalon_streaming};preview_set_connection_tag {jtag_uart_avalon_jtag_slave_agent.rp/router_002.sink} {qsys_mm.response};add_connection {router_002.src} {rsp_demux.sink} {avalon_streaming};preview_set_connection_tag {router_002.src/rsp_demux.sink} {qsys_mm.response};add_connection {i2c_opencores_mipi_avalon_slave_0_agent.rp} {router_003.sink} {avalon_streaming};preview_set_connection_tag {i2c_opencores_mipi_avalon_slave_0_agent.rp/router_003.sink} {qsys_mm.response};add_connection {router_003.src} {rsp_demux_001.sink} {avalon_streaming};preview_set_connection_tag {router_003.src/rsp_demux_001.sink} {qsys_mm.response};add_connection {i2c_opencores_camera_avalon_slave_0_agent.rp} {router_004.sink} {avalon_streaming};preview_set_connection_tag {i2c_opencores_camera_avalon_slave_0_agent.rp/router_004.sink} {qsys_mm.response};add_connection {router_004.src} {rsp_demux_002.sink} {avalon_streaming};preview_set_connection_tag {router_004.src/rsp_demux_002.sink} {qsys_mm.response};add_connection {sysid_qsys_control_slave_agent.rp} {router_005.sink} {avalon_streaming};preview_set_connection_tag {sysid_qsys_control_slave_agent.rp/router_005.sink} {qsys_mm.response};add_connection {router_005.src} {rsp_demux_003.sink} {avalon_streaming};preview_set_connection_tag {router_005.src/rsp_demux_003.sink} {qsys_mm.response};add_connection {nios2_gen2_debug_mem_slave_agent.rp} {router_006.sink} {avalon_streaming};preview_set_connection_tag {nios2_gen2_debug_mem_slave_agent.rp/router_006.sink} {qsys_mm.response};add_connection {router_006.src} {rsp_demux_004.sink} {avalon_streaming};preview_set_connection_tag {router_006.src/rsp_demux_004.sink} {qsys_mm.response};add_connection {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.rp} {router_007.sink} {avalon_streaming};preview_set_connection_tag {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.rp/router_007.sink} {qsys_mm.response};add_connection {router_007.src} {rsp_demux_005.sink} {avalon_streaming};preview_set_connection_tag {router_007.src/rsp_demux_005.sink} {qsys_mm.response};add_connection {altpll_0_pll_slave_agent.rp} {router_008.sink} {avalon_streaming};preview_set_connection_tag {altpll_0_pll_slave_agent.rp/router_008.sink} {qsys_mm.response};add_connection {router_008.src} {rsp_demux_006.sink} {avalon_streaming};preview_set_connection_tag {router_008.src/rsp_demux_006.sink} {qsys_mm.response};add_connection {onchip_memory2_0_s1_agent.rp} {router_009.sink} {avalon_streaming};preview_set_connection_tag {onchip_memory2_0_s1_agent.rp/router_009.sink} {qsys_mm.response};add_connection {router_009.src} {rsp_demux_007.sink} {avalon_streaming};preview_set_connection_tag {router_009.src/rsp_demux_007.sink} {qsys_mm.response};add_connection {timer_s1_agent.rp} {router_010.sink} {avalon_streaming};preview_set_connection_tag {timer_s1_agent.rp/router_010.sink} {qsys_mm.response};add_connection {router_010.src} {rsp_demux_008.sink} {avalon_streaming};preview_set_connection_tag {router_010.src/rsp_demux_008.sink} {qsys_mm.response};add_connection {led_s1_agent.rp} {router_011.sink} {avalon_streaming};preview_set_connection_tag {led_s1_agent.rp/router_011.sink} {qsys_mm.response};add_connection {router_011.src} {rsp_demux_009.sink} {avalon_streaming};preview_set_connection_tag {router_011.src/rsp_demux_009.sink} {qsys_mm.response};add_connection {sw_s1_agent.rp} {router_012.sink} {avalon_streaming};preview_set_connection_tag {sw_s1_agent.rp/router_012.sink} {qsys_mm.response};add_connection {router_012.src} {rsp_demux_010.sink} {avalon_streaming};preview_set_connection_tag {router_012.src/rsp_demux_010.sink} {qsys_mm.response};add_connection {key_s1_agent.rp} {router_013.sink} {avalon_streaming};preview_set_connection_tag {key_s1_agent.rp/router_013.sink} {qsys_mm.response};add_connection {router_013.src} {rsp_demux_011.sink} {avalon_streaming};preview_set_connection_tag {router_013.src/rsp_demux_011.sink} {qsys_mm.response};add_connection {mipi_reset_n_s1_agent.rp} {router_014.sink} {avalon_streaming};preview_set_connection_tag {mipi_reset_n_s1_agent.rp/router_014.sink} {qsys_mm.response};add_connection {router_014.src} {rsp_demux_012.sink} {avalon_streaming};preview_set_connection_tag {router_014.src/rsp_demux_012.sink} {qsys_mm.response};add_connection {mipi_pwdn_n_s1_agent.rp} {router_015.sink} {avalon_streaming};preview_set_connection_tag {mipi_pwdn_n_s1_agent.rp/router_015.sink} {qsys_mm.response};add_connection {router_015.src} {rsp_demux_013.sink} {avalon_streaming};preview_set_connection_tag {router_015.src/rsp_demux_013.sink} {qsys_mm.response};add_connection {EEE_IMGPROC_0_s1_agent.rp} {router_016.sink} {avalon_streaming};preview_set_connection_tag {EEE_IMGPROC_0_s1_agent.rp/router_016.sink} {qsys_mm.response};add_connection {router_016.src} {rsp_demux_014.sink} {avalon_streaming};preview_set_connection_tag {router_016.src/rsp_demux_014.sink} {qsys_mm.response};add_connection {uart_0_s1_agent.rp} {router_017.sink} {avalon_streaming};preview_set_connection_tag {uart_0_s1_agent.rp/router_017.sink} {qsys_mm.response};add_connection {router_017.src} {rsp_demux_015.sink} {avalon_streaming};preview_set_connection_tag {router_017.src/rsp_demux_015.sink} {qsys_mm.response};add_connection {router.src} {nios2_gen2_data_master_limiter.cmd_sink} {avalon_streaming};preview_set_connection_tag {router.src/nios2_gen2_data_master_limiter.cmd_sink} {qsys_mm.command};add_connection {nios2_gen2_data_master_limiter.cmd_src} {cmd_demux.sink} {avalon_streaming};preview_set_connection_tag {nios2_gen2_data_master_limiter.cmd_src/cmd_demux.sink} {qsys_mm.command};add_connection {rsp_mux.src} {nios2_gen2_data_master_limiter.rsp_sink} {avalon_streaming};preview_set_connection_tag {rsp_mux.src/nios2_gen2_data_master_limiter.rsp_sink} {qsys_mm.response};add_connection {nios2_gen2_data_master_limiter.rsp_src} {nios2_gen2_data_master_agent.rp} {avalon_streaming};preview_set_connection_tag {nios2_gen2_data_master_limiter.rsp_src/nios2_gen2_data_master_agent.rp} {qsys_mm.response};add_connection {router_001.src} {nios2_gen2_instruction_master_limiter.cmd_sink} {avalon_streaming};preview_set_connection_tag {router_001.src/nios2_gen2_instruction_master_limiter.cmd_sink} {qsys_mm.command};add_connection {nios2_gen2_instruction_master_limiter.cmd_src} {cmd_demux_001.sink} {avalon_streaming};preview_set_connection_tag {nios2_gen2_instruction_master_limiter.cmd_src/cmd_demux_001.sink} {qsys_mm.command};add_connection {rsp_mux_001.src} {nios2_gen2_instruction_master_limiter.rsp_sink} {avalon_streaming};preview_set_connection_tag {rsp_mux_001.src/nios2_gen2_instruction_master_limiter.rsp_sink} {qsys_mm.response};add_connection {nios2_gen2_instruction_master_limiter.rsp_src} {nios2_gen2_instruction_master_agent.rp} {avalon_streaming};preview_set_connection_tag {nios2_gen2_instruction_master_limiter.rsp_src/nios2_gen2_instruction_master_agent.rp} {qsys_mm.response};add_connection {cmd_demux.src0} {cmd_mux.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src0/cmd_mux.sink0} {qsys_mm.command};add_connection {cmd_demux.src1} {cmd_mux_001.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src1/cmd_mux_001.sink0} {qsys_mm.command};add_connection {cmd_demux.src2} {cmd_mux_002.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src2/cmd_mux_002.sink0} {qsys_mm.command};add_connection {cmd_demux.src3} {cmd_mux_003.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src3/cmd_mux_003.sink0} {qsys_mm.command};add_connection {cmd_demux.src4} {cmd_mux_004.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src4/cmd_mux_004.sink0} {qsys_mm.command};add_connection {cmd_demux.src6} {cmd_mux_006.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src6/cmd_mux_006.sink0} {qsys_mm.command};add_connection {cmd_demux.src7} {cmd_mux_007.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src7/cmd_mux_007.sink0} {qsys_mm.command};add_connection {cmd_demux.src8} {cmd_mux_008.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src8/cmd_mux_008.sink0} {qsys_mm.command};add_connection {cmd_demux.src9} {cmd_mux_009.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src9/cmd_mux_009.sink0} {qsys_mm.command};add_connection {cmd_demux.src10} {cmd_mux_010.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src10/cmd_mux_010.sink0} {qsys_mm.command};add_connection {cmd_demux.src11} {cmd_mux_011.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src11/cmd_mux_011.sink0} {qsys_mm.command};add_connection {cmd_demux.src12} {cmd_mux_012.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src12/cmd_mux_012.sink0} {qsys_mm.command};add_connection {cmd_demux.src13} {cmd_mux_013.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src13/cmd_mux_013.sink0} {qsys_mm.command};add_connection {cmd_demux.src15} {cmd_mux_015.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src15/cmd_mux_015.sink0} {qsys_mm.command};add_connection {cmd_demux_001.src0} {cmd_mux_004.sink1} {avalon_streaming};preview_set_connection_tag {cmd_demux_001.src0/cmd_mux_004.sink1} {qsys_mm.command};add_connection {cmd_demux_001.src1} {cmd_mux_007.sink1} {avalon_streaming};preview_set_connection_tag {cmd_demux_001.src1/cmd_mux_007.sink1} {qsys_mm.command};add_connection {rsp_demux.src0} {rsp_mux.sink0} {avalon_streaming};preview_set_connection_tag {rsp_demux.src0/rsp_mux.sink0} {qsys_mm.response};add_connection {rsp_demux_001.src0} {rsp_mux.sink1} {avalon_streaming};preview_set_connection_tag {rsp_demux_001.src0/rsp_mux.sink1} {qsys_mm.response};add_connection {rsp_demux_002.src0} {rsp_mux.sink2} {avalon_streaming};preview_set_connection_tag {rsp_demux_002.src0/rsp_mux.sink2} {qsys_mm.response};add_connection {rsp_demux_003.src0} {rsp_mux.sink3} {avalon_streaming};preview_set_connection_tag {rsp_demux_003.src0/rsp_mux.sink3} {qsys_mm.response};add_connection {rsp_demux_004.src0} {rsp_mux.sink4} {avalon_streaming};preview_set_connection_tag {rsp_demux_004.src0/rsp_mux.sink4} {qsys_mm.response};add_connection {rsp_demux_004.src1} {rsp_mux_001.sink0} {avalon_streaming};preview_set_connection_tag {rsp_demux_004.src1/rsp_mux_001.sink0} {qsys_mm.response};add_connection {rsp_demux_006.src0} {rsp_mux.sink6} {avalon_streaming};preview_set_connection_tag {rsp_demux_006.src0/rsp_mux.sink6} {qsys_mm.response};add_connection {rsp_demux_007.src0} {rsp_mux.sink7} {avalon_streaming};preview_set_connection_tag {rsp_demux_007.src0/rsp_mux.sink7} {qsys_mm.response};add_connection {rsp_demux_007.src1} {rsp_mux_001.sink1} {avalon_streaming};preview_set_connection_tag {rsp_demux_007.src1/rsp_mux_001.sink1} {qsys_mm.response};add_connection {rsp_demux_008.src0} {rsp_mux.sink8} {avalon_streaming};preview_set_connection_tag {rsp_demux_008.src0/rsp_mux.sink8} {qsys_mm.response};add_connection {rsp_demux_009.src0} {rsp_mux.sink9} {avalon_streaming};preview_set_connection_tag {rsp_demux_009.src0/rsp_mux.sink9} {qsys_mm.response};add_connection {rsp_demux_010.src0} {rsp_mux.sink10} {avalon_streaming};preview_set_connection_tag {rsp_demux_010.src0/rsp_mux.sink10} {qsys_mm.response};add_connection {rsp_demux_011.src0} {rsp_mux.sink11} {avalon_streaming};preview_set_connection_tag {rsp_demux_011.src0/rsp_mux.sink11} {qsys_mm.response};add_connection {rsp_demux_012.src0} {rsp_mux.sink12} {avalon_streaming};preview_set_connection_tag {rsp_demux_012.src0/rsp_mux.sink12} {qsys_mm.response};add_connection {rsp_demux_013.src0} {rsp_mux.sink13} {avalon_streaming};preview_set_connection_tag {rsp_demux_013.src0/rsp_mux.sink13} {qsys_mm.response};add_connection {rsp_demux_015.src0} {rsp_mux.sink15} {avalon_streaming};preview_set_connection_tag {rsp_demux_015.src0/rsp_mux.sink15} {qsys_mm.response};add_connection {cmd_demux.src5} {crosser.in} {avalon_streaming};preview_set_connection_tag {cmd_demux.src5/crosser.in} {qsys_mm.command};add_connection {crosser.out} {cmd_mux_005.sink0} {avalon_streaming};preview_set_connection_tag {crosser.out/cmd_mux_005.sink0} {qsys_mm.command};add_connection {cmd_demux.src14} {crosser_001.in} {avalon_streaming};preview_set_connection_tag {cmd_demux.src14/crosser_001.in} {qsys_mm.command};add_connection {crosser_001.out} {cmd_mux_014.sink0} {avalon_streaming};preview_set_connection_tag {crosser_001.out/cmd_mux_014.sink0} {qsys_mm.command};add_connection {rsp_demux_005.src0} {crosser_002.in} {avalon_streaming};preview_set_connection_tag {rsp_demux_005.src0/crosser_002.in} {qsys_mm.response};add_connection {crosser_002.out} {rsp_mux.sink5} {avalon_streaming};preview_set_connection_tag {crosser_002.out/rsp_mux.sink5} {qsys_mm.response};add_connection {rsp_demux_014.src0} {crosser_003.in} {avalon_streaming};preview_set_connection_tag {rsp_demux_014.src0/crosser_003.in} {qsys_mm.response};add_connection {crosser_003.out} {rsp_mux.sink14} {avalon_streaming};preview_set_connection_tag {crosser_003.out/rsp_mux.sink14} {qsys_mm.response};add_connection {nios2_gen2_data_master_limiter.cmd_valid} {cmd_demux.sink_valid} {avalon_streaming};add_connection {nios2_gen2_instruction_master_limiter.cmd_valid} {cmd_demux_001.sink_valid} {avalon_streaming};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {nios2_gen2_data_master_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {nios2_gen2_instruction_master_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {jtag_uart_avalon_jtag_slave_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {i2c_opencores_mipi_avalon_slave_0_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {i2c_opencores_camera_avalon_slave_0_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {sysid_qsys_control_slave_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {nios2_gen2_debug_mem_slave_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {onchip_memory2_0_s1_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {timer_s1_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {led_s1_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {sw_s1_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {key_s1_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {mipi_reset_n_s1_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {mipi_pwdn_n_s1_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {uart_0_s1_translator.reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {nios2_gen2_data_master_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {nios2_gen2_instruction_master_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {jtag_uart_avalon_jtag_slave_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {jtag_uart_avalon_jtag_slave_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {i2c_opencores_mipi_avalon_slave_0_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {i2c_opencores_camera_avalon_slave_0_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {sysid_qsys_control_slave_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {sysid_qsys_control_slave_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {nios2_gen2_debug_mem_slave_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {nios2_gen2_debug_mem_slave_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {onchip_memory2_0_s1_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {onchip_memory2_0_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {timer_s1_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {timer_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {led_s1_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {led_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {sw_s1_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {sw_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {key_s1_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {key_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {mipi_reset_n_s1_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {mipi_reset_n_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {mipi_pwdn_n_s1_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {mipi_pwdn_n_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {uart_0_s1_agent.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {uart_0_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_001.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_002.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_003.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_004.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_005.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_006.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_009.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_010.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_011.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_012.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_013.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_014.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_015.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {router_017.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {nios2_gen2_data_master_limiter.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {nios2_gen2_instruction_master_limiter.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_demux.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_demux_001.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux_001.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux_002.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux_003.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux_004.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux_007.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux_008.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux_009.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux_010.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux_011.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux_012.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux_013.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {cmd_mux_015.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux_001.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux_002.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux_003.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux_004.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux_007.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux_008.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux_009.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux_010.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux_011.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux_012.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux_013.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_demux_015.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_mux.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {rsp_mux_001.clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {crosser.in_clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {crosser_001.in_clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {crosser_002.out_clk_reset} {reset};add_connection {nios2_gen2_reset_reset_bridge.out_reset} {crosser_003.out_clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator.reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {EEE_IMGPROC_0_s1_translator.reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo.clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo.clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {EEE_IMGPROC_0_s1_agent.clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {EEE_IMGPROC_0_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {EEE_IMGPROC_0_s1_agent_rdata_fifo.clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {router_007.clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {router_016.clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {cmd_mux_005.clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {cmd_mux_014.clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {rsp_demux_005.clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {rsp_demux_014.clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {crosser.out_clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {crosser_001.out_clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {crosser_002.in_clk_reset} {reset};add_connection {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.out_reset} {crosser_003.in_clk_reset} {reset};add_connection {altpll_0_inclk_interface_reset_reset_bridge.out_reset} {altpll_0_pll_slave_translator.reset} {reset};add_connection {altpll_0_inclk_interface_reset_reset_bridge.out_reset} {altpll_0_pll_slave_agent.clk_reset} {reset};add_connection {altpll_0_inclk_interface_reset_reset_bridge.out_reset} {altpll_0_pll_slave_agent_rsp_fifo.clk_reset} {reset};add_connection {altpll_0_inclk_interface_reset_reset_bridge.out_reset} {router_008.clk_reset} {reset};add_connection {altpll_0_inclk_interface_reset_reset_bridge.out_reset} {cmd_mux_006.clk_reset} {reset};add_connection {altpll_0_inclk_interface_reset_reset_bridge.out_reset} {rsp_demux_006.clk_reset} {reset};add_connection {clk_50_clk_clock_bridge.out_clk} {nios2_gen2_data_master_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {nios2_gen2_instruction_master_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {jtag_uart_avalon_jtag_slave_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {i2c_opencores_mipi_avalon_slave_0_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {i2c_opencores_camera_avalon_slave_0_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {sysid_qsys_control_slave_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {nios2_gen2_debug_mem_slave_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {altpll_0_pll_slave_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {onchip_memory2_0_s1_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {timer_s1_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {led_s1_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {sw_s1_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {key_s1_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {mipi_reset_n_s1_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {mipi_pwdn_n_s1_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {uart_0_s1_translator.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {nios2_gen2_data_master_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {nios2_gen2_instruction_master_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {jtag_uart_avalon_jtag_slave_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {jtag_uart_avalon_jtag_slave_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {i2c_opencores_mipi_avalon_slave_0_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {i2c_opencores_camera_avalon_slave_0_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {sysid_qsys_control_slave_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {sysid_qsys_control_slave_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {nios2_gen2_debug_mem_slave_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {nios2_gen2_debug_mem_slave_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {altpll_0_pll_slave_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {altpll_0_pll_slave_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {onchip_memory2_0_s1_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {onchip_memory2_0_s1_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {timer_s1_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {timer_s1_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {led_s1_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {led_s1_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {sw_s1_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {sw_s1_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {key_s1_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {key_s1_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {mipi_reset_n_s1_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {mipi_reset_n_s1_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {mipi_pwdn_n_s1_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {mipi_pwdn_n_s1_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {uart_0_s1_agent.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {uart_0_s1_agent_rsp_fifo.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_001.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_002.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_003.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_004.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_005.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_006.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_008.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_009.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_010.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_011.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_012.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_013.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_014.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_015.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {router_017.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {nios2_gen2_data_master_limiter.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {nios2_gen2_instruction_master_limiter.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_demux.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_mux.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_demux_001.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_mux_001.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_001.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_001.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_002.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_002.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_003.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_003.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_004.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_004.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_006.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_006.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_007.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_007.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_008.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_008.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_009.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_009.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_010.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_010.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_011.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_011.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_012.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_012.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_013.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_013.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {cmd_mux_015.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {rsp_demux_015.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {crosser.in_clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {crosser_001.in_clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {crosser_002.out_clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {crosser_003.out_clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {nios2_gen2_reset_reset_bridge.clk} {clock};add_connection {clk_50_clk_clock_bridge.out_clk} {altpll_0_inclk_interface_reset_reset_bridge.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {EEE_IMGPROC_0_s1_translator.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {EEE_IMGPROC_0_s1_agent.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {EEE_IMGPROC_0_s1_agent_rsp_fifo.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {EEE_IMGPROC_0_s1_agent_rdata_fifo.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {router_007.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {router_016.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {cmd_mux_005.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {rsp_demux_005.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {cmd_mux_014.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {rsp_demux_014.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {crosser.out_clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {crosser_001.out_clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {crosser_002.in_clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {crosser_003.in_clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.clk} {clock};add_interface {altpll_0_c2} {clock} {slave};set_interface_property {altpll_0_c2} {EXPORT_OF} {altpll_0_c2_clock_bridge.in_clk};add_interface {clk_50_clk} {clock} {slave};set_interface_property {clk_50_clk} {EXPORT_OF} {clk_50_clk_clock_bridge.in_clk};add_interface {altpll_0_inclk_interface_reset_reset_bridge_in_reset} {reset} {slave};set_interface_property {altpll_0_inclk_interface_reset_reset_bridge_in_reset} {EXPORT_OF} {altpll_0_inclk_interface_reset_reset_bridge.in_reset};add_interface {nios2_gen2_reset_reset_bridge_in_reset} {reset} {slave};set_interface_property {nios2_gen2_reset_reset_bridge_in_reset} {EXPORT_OF} {nios2_gen2_reset_reset_bridge.in_reset};add_interface {TERASIC_AUTO_FOCUS_0_reset_reset_bridge_in_reset} {reset} {slave};set_interface_property {TERASIC_AUTO_FOCUS_0_reset_reset_bridge_in_reset} {EXPORT_OF} {TERASIC_AUTO_FOCUS_0_reset_reset_bridge.in_reset};add_interface {nios2_gen2_data_master} {avalon} {slave};set_interface_property {nios2_gen2_data_master} {EXPORT_OF} {nios2_gen2_data_master_translator.avalon_anti_master_0};add_interface {nios2_gen2_instruction_master} {avalon} {slave};set_interface_property {nios2_gen2_instruction_master} {EXPORT_OF} {nios2_gen2_instruction_master_translator.avalon_anti_master_0};add_interface {altpll_0_pll_slave} {avalon} {master};set_interface_property {altpll_0_pll_slave} {EXPORT_OF} {altpll_0_pll_slave_translator.avalon_anti_slave_0};add_interface {EEE_IMGPROC_0_s1} {avalon} {master};set_interface_property {EEE_IMGPROC_0_s1} {EXPORT_OF} {EEE_IMGPROC_0_s1_translator.avalon_anti_slave_0};add_interface {i2c_opencores_camera_avalon_slave_0} {avalon} {master};set_interface_property {i2c_opencores_camera_avalon_slave_0} {EXPORT_OF} {i2c_opencores_camera_avalon_slave_0_translator.avalon_anti_slave_0};add_interface {i2c_opencores_mipi_avalon_slave_0} {avalon} {master};set_interface_property {i2c_opencores_mipi_avalon_slave_0} {EXPORT_OF} {i2c_opencores_mipi_avalon_slave_0_translator.avalon_anti_slave_0};add_interface {jtag_uart_avalon_jtag_slave} {avalon} {master};set_interface_property {jtag_uart_avalon_jtag_slave} {EXPORT_OF} {jtag_uart_avalon_jtag_slave_translator.avalon_anti_slave_0};add_interface {key_s1} {avalon} {master};set_interface_property {key_s1} {EXPORT_OF} {key_s1_translator.avalon_anti_slave_0};add_interface {led_s1} {avalon} {master};set_interface_property {led_s1} {EXPORT_OF} {led_s1_translator.avalon_anti_slave_0};add_interface {mipi_pwdn_n_s1} {avalon} {master};set_interface_property {mipi_pwdn_n_s1} {EXPORT_OF} {mipi_pwdn_n_s1_translator.avalon_anti_slave_0};add_interface {mipi_reset_n_s1} {avalon} {master};set_interface_property {mipi_reset_n_s1} {EXPORT_OF} {mipi_reset_n_s1_translator.avalon_anti_slave_0};add_interface {nios2_gen2_debug_mem_slave} {avalon} {master};set_interface_property {nios2_gen2_debug_mem_slave} {EXPORT_OF} {nios2_gen2_debug_mem_slave_translator.avalon_anti_slave_0};add_interface {onchip_memory2_0_s1} {avalon} {master};set_interface_property {onchip_memory2_0_s1} {EXPORT_OF} {onchip_memory2_0_s1_translator.avalon_anti_slave_0};add_interface {sw_s1} {avalon} {master};set_interface_property {sw_s1} {EXPORT_OF} {sw_s1_translator.avalon_anti_slave_0};add_interface {sysid_qsys_control_slave} {avalon} {master};set_interface_property {sysid_qsys_control_slave} {EXPORT_OF} {sysid_qsys_control_slave_translator.avalon_anti_slave_0};add_interface {TERASIC_AUTO_FOCUS_0_mm_ctrl} {avalon} {master};set_interface_property {TERASIC_AUTO_FOCUS_0_mm_ctrl} {EXPORT_OF} {TERASIC_AUTO_FOCUS_0_mm_ctrl_translator.avalon_anti_slave_0};add_interface {timer_s1} {avalon} {master};set_interface_property {timer_s1} {EXPORT_OF} {timer_s1_translator.avalon_anti_slave_0};add_interface {uart_0_s1} {avalon} {master};set_interface_property {uart_0_s1} {EXPORT_OF} {uart_0_s1_translator.avalon_anti_slave_0};set_module_assignment {interconnect_id.EEE_IMGPROC_0.s1} {0};set_module_assignment {interconnect_id.TERASIC_AUTO_FOCUS_0.mm_ctrl} {1};set_module_assignment {interconnect_id.altpll_0.pll_slave} {2};set_module_assignment {interconnect_id.i2c_opencores_camera.avalon_slave_0} {3};set_module_assignment {interconnect_id.i2c_opencores_mipi.avalon_slave_0} {4};set_module_assignment {interconnect_id.jtag_uart.avalon_jtag_slave} {5};set_module_assignment {interconnect_id.key.s1} {6};set_module_assignment {interconnect_id.led.s1} {7};set_module_assignment {interconnect_id.mipi_pwdn_n.s1} {8};set_module_assignment {interconnect_id.mipi_reset_n.s1} {9};set_module_assignment {interconnect_id.nios2_gen2.data_master} {0};set_module_assignment {interconnect_id.nios2_gen2.debug_mem_slave} {10};set_module_assignment {interconnect_id.nios2_gen2.instruction_master} {1};set_module_assignment {interconnect_id.onchip_memory2_0.s1} {11};set_module_assignment {interconnect_id.sw.s1} {12};set_module_assignment {interconnect_id.sysid_qsys.control_slave} {13};set_module_assignment {interconnect_id.timer.s1} {14};set_module_assignment {interconnect_id.uart_0.s1} {15};" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_mm_interconnect/altera_mm_interconnect_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_master_translator/altera_merlin_master_translator_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_slave_translator/altera_merlin_slave_translator_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_master_agent/altera_merlin_master_agent_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_slave_agent/altera_merlin_slave_agent_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo.v" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_traffic_limiter/altera_merlin_traffic_limiter_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_handshake_clock_crosser/altera_avalon_st_handshake_clock_crosser_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_handshake_clock_crosser/altera_avalon_st_handshake_clock_crosser.v" /> + path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_adapter/altera_avalon_st_adapter_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_error_adapter/avalon-st_error_adapter_hw.tcl" /> @@ -7192,7 +7334,7 @@ Transform: CustomInstructionTransform No custom instruction connections, skipping transform - 113 modules, 386 connections]]> + 119 modules, 407 connections]]> Transform: MMTransform Transform: InitialInterconnectTransform 0 modules, 0 connections]]> @@ -7218,7 +7360,7 @@ Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform - 113 modules, 386 connections]]> + 119 modules, 407 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform @@ -7243,7 +7385,7 @@ Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform - 113 modules, 386 connections]]> + 119 modules, 407 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform @@ -7268,7 +7410,7 @@ Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform - 113 modules, 386 connections]]> + 119 modules, 407 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform @@ -7293,7 +7435,7 @@ Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform - 113 modules, 386 connections]]> + 119 modules, 407 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform @@ -7318,7 +7460,7 @@ Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform - 113 modules, 386 connections]]> + 119 modules, 407 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform @@ -7343,7 +7485,7 @@ Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform - 113 modules, 386 connections]]> + 119 modules, 407 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform @@ -7368,7 +7510,7 @@ Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform - 113 modules, 386 connections]]> + 119 modules, 407 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform @@ -7393,7 +7535,7 @@ Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform - 113 modules, 386 connections]]> + 119 modules, 407 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform @@ -7418,7 +7560,7 @@ Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform - 113 modules, 386 connections]]> + 119 modules, 407 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform @@ -7443,7 +7585,7 @@ Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform - 113 modules, 386 connections]]> + 119 modules, 407 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform @@ -7468,7 +7610,7 @@ Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform - 113 modules, 386 connections]]> + 119 modules, 407 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform @@ -7493,7 +7635,7 @@ Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform - 113 modules, 386 connections]]> + 119 modules, 407 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform @@ -7518,7 +7660,7 @@ Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform - 113 modules, 386 connections]]> + 119 modules, 407 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform @@ -7543,7 +7685,7 @@ Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform - 113 modules, 386 connections]]> + 119 modules, 407 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform @@ -7568,7 +7710,7 @@ Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform - 113 modules, 386 connections]]> + 119 modules, 407 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform @@ -7593,7 +7735,7 @@ Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform - 113 modules, 386 connections]]> + 119 modules, 407 connections]]> Transform: InitialInterconnectTransform 0 modules, 0 connections]]> Transform: TerminalIdAssignmentUpdateTransform @@ -7618,7 +7760,32 @@ Transform: InsertClockAndResetBridgesTransform Transform: InterconnectConnectionsTagger Transform: HierarchyTransform - 113 modules, 386 connections]]> + 119 modules, 407 connections]]> + Transform: InitialInterconnectTransform + 0 modules, 0 connections]]> + Transform: TerminalIdAssignmentUpdateTransform + Transform: DefaultSlaveTransform + Transform: TranslatorTransform + No Avalon connections, skipping transform + Transform: IDPadTransform + Transform: DomainTransform + Transform: RouterTransform + Transform: TrafficLimiterTransform + Transform: BurstTransform + Transform: TreeTransform + Transform: NetworkToSwitchTransform + Transform: WidthTransform + Transform: RouterTableTransform + Transform: ThreadIDMappingTableTransform + Transform: ClockCrossingTransform + Transform: PipelineTransform + Transform: SpotPipelineTransform + Transform: PerformanceMonitorTransform + Transform: TrafficLimiterUpdateTransform + Transform: InsertClockAndResetBridgesTransform + Transform: InterconnectConnectionsTagger + Transform: HierarchyTransform + 119 modules, 407 connections]]> Transform: InterruptMapperTransform Transform: InterruptSyncTransform Transform: InterruptFanoutTransform @@ -7630,122 +7797,130 @@ Timing: ELA:1/0.000s Timing: ELA:2/0.000s/0.001s Timing: ELA:1/0.007s - Timing: COM:3/0.029s/0.039s + Timing: COM:3/0.026s/0.034s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s - Timing: ELA:2/0.001s/0.001s + Timing: ELA:2/0.000s/0.001s Timing: ELA:1/0.007s - Timing: COM:3/0.012s/0.013s + Timing: COM:3/0.011s/0.011s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s - Timing: ELA:2/0.000s/0.001s - Timing: ELA:1/0.007s - Timing: COM:3/0.013s/0.014s + Timing: ELA:2/0.000s/0.000s + Timing: ELA:1/0.006s + Timing: COM:3/0.010s/0.011s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s - Timing: ELA:2/0.000s/0.000s + Timing: ELA:2/0.000s/0.001s Timing: ELA:1/0.007s - Timing: COM:3/0.012s/0.012s + Timing: COM:3/0.011s/0.012s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s - Timing: ELA:2/0.000s/0.000s - Timing: ELA:1/0.007s - Timing: COM:3/0.017s/0.027s + Timing: ELA:2/0.000s/0.001s + Timing: ELA:1/0.006s + Timing: COM:3/0.010s/0.012s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s Timing: ELA:2/0.000s/0.000s - Timing: ELA:1/0.007s - Timing: COM:3/0.013s/0.016s + Timing: ELA:1/0.008s + Timing: COM:3/0.011s/0.012s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s - Timing: ELA:2/0.000s/0.001s - Timing: ELA:1/0.006s - Timing: COM:3/0.012s/0.014s + Timing: ELA:2/0.000s/0.000s + Timing: ELA:1/0.007s + Timing: COM:3/0.011s/0.011s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s - Timing: ELA:2/0.000s/0.000s - Timing: ELA:1/0.007s - Timing: COM:3/0.012s/0.013s + Timing: ELA:2/0.000s/0.001s + Timing: ELA:1/0.005s + Timing: COM:3/0.011s/0.012s Inserting error_adapter: error_adapter_0 - Timing: ELA:1/0.001s + Timing: ELA:1/0.000s Timing: ELA:2/0.000s/0.001s - Timing: ELA:1/0.007s - Timing: COM:3/0.016s/0.024s + Timing: ELA:1/0.006s + Timing: COM:3/0.011s/0.012s Inserting error_adapter: error_adapter_0 - Timing: ELA:1/0.001s + Timing: ELA:1/0.000s Timing: ELA:2/0.000s/0.001s - Timing: ELA:1/0.008s - Timing: COM:3/0.012s/0.013s + Timing: ELA:1/0.007s + Timing: COM:3/0.009s/0.011s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s - Timing: ELA:2/0.001s/0.001s - Timing: ELA:1/0.006s - Timing: COM:3/0.011s/0.012s + Timing: ELA:2/0.000s/0.001s + Timing: ELA:1/0.007s + Timing: COM:3/0.011s/0.013s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s - Timing: ELA:2/0.000s/0.000s - Timing: ELA:1/0.007s - Timing: COM:3/0.011s/0.012s + Timing: ELA:2/0.000s/0.001s + Timing: ELA:1/0.006s + Timing: COM:3/0.017s/0.027s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s - Timing: ELA:2/0.001s/0.001s - Timing: ELA:1/0.007s - Timing: COM:3/0.015s/0.022s + Timing: ELA:2/0.000s/0.001s + Timing: ELA:1/0.008s + Timing: COM:3/0.011s/0.013s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s - Timing: ELA:2/0.000s/0.001s - Timing: ELA:1/0.007s - Timing: COM:3/0.011s/0.012s + Timing: ELA:2/0.000s/0.000s + Timing: ELA:1/0.006s + Timing: COM:3/0.010s/0.012s Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s - Timing: ELA:2/0.001s/0.001s - Timing: ELA:1/0.006s - Timing: COM:3/0.012s/0.015s + Timing: ELA:2/0.000s/0.001s + Timing: ELA:1/0.005s + Timing: COM:3/0.009s/0.011s + + + + Inserting error_adapter: error_adapter_0 + Timing: ELA:1/0.000s + Timing: ELA:2/0.000s/0.001s + Timing: ELA:1/0.005s + Timing: COM:3/0.009s/0.010s 128 modules, 431 connections]]> + culprit="com_altera_sopcmodel_transforms_avalonst_AvalonStreamingTransform">135 modules, 455 connections]]> Transform: ResetAdaptation mm_interconnect_0" reuses altera_merlin_master_translator "submodules/altera_merlin_master_translator"]]> mm_interconnect_0" reuses altera_merlin_master_translator "submodules/altera_merlin_master_translator"]]> @@ -7764,6 +7939,7 @@ mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> + mm_interconnect_0" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator"]]> mm_interconnect_0" reuses altera_merlin_master_agent "submodules/altera_merlin_master_agent"]]> mm_interconnect_0" reuses altera_merlin_master_agent "submodules/altera_merlin_master_agent"]]> mm_interconnect_0" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"]]> @@ -7798,6 +7974,8 @@ mm_interconnect_0" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"]]> mm_interconnect_0" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"]]> mm_interconnect_0" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"]]> + mm_interconnect_0" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent"]]> + mm_interconnect_0" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo"]]> mm_interconnect_0" reuses altera_merlin_router "submodules/Qsys_mm_interconnect_0_router"]]> mm_interconnect_0" reuses altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_001"]]> mm_interconnect_0" reuses altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_002"]]> @@ -7815,6 +7993,7 @@ mm_interconnect_0" reuses altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_002"]]> mm_interconnect_0" reuses altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_002"]]> mm_interconnect_0" reuses altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_002"]]> + mm_interconnect_0" reuses altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_002"]]> mm_interconnect_0" reuses altera_merlin_traffic_limiter "submodules/altera_merlin_traffic_limiter"]]> mm_interconnect_0" reuses altera_merlin_traffic_limiter "submodules/altera_merlin_traffic_limiter"]]> mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_cmd_demux"]]> @@ -7834,6 +8013,7 @@ mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_cmd_mux"]]> mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_cmd_mux"]]> mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_cmd_mux"]]> + mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_cmd_mux"]]> mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux"]]> mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux"]]> mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux"]]> @@ -7849,6 +8029,7 @@ mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux"]]> mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux"]]> mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux_005"]]> + mm_interconnect_0" reuses altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux"]]> mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_rsp_mux"]]> mm_interconnect_0" reuses altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_rsp_mux_001"]]> mm_interconnect_0" reuses altera_avalon_st_handshake_clock_crosser "submodules/altera_avalon_st_handshake_clock_crosser"]]> @@ -7870,53 +8051,54 @@ mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/Qsys_mm_interconnect_0_avalon_st_adapter"]]> mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/Qsys_mm_interconnect_0_avalon_st_adapter"]]> mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/Qsys_mm_interconnect_0_avalon_st_adapter"]]> + mm_interconnect_0" reuses altera_avalon_st_adapter "submodules/Qsys_mm_interconnect_0_avalon_st_adapter"]]> Qsys" instantiated altera_mm_interconnect "mm_interconnect_0"]]> - queue size: 143 starting:altera_merlin_master_translator "submodules/altera_merlin_master_translator" + queue size: 150 starting:altera_merlin_master_translator "submodules/altera_merlin_master_translator" mm_interconnect_0" instantiated altera_merlin_master_translator "nios2_gen2_data_master_translator"]]> - queue size: 141 starting:altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" + queue size: 148 starting:altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" mm_interconnect_0" instantiated altera_merlin_slave_translator "jtag_uart_avalon_jtag_slave_translator"]]> - queue size: 126 starting:altera_merlin_master_agent "submodules/altera_merlin_master_agent" + queue size: 132 starting:altera_merlin_master_agent "submodules/altera_merlin_master_agent" mm_interconnect_0" instantiated altera_merlin_master_agent "nios2_gen2_data_master_agent"]]> - queue size: 124 starting:altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" + queue size: 130 starting:altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" mm_interconnect_0" instantiated altera_merlin_slave_agent "jtag_uart_avalon_jtag_slave_agent"]]> - queue size: 123 starting:altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" + queue size: 129 starting:altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" mm_interconnect_0" instantiated altera_avalon_sc_fifo "jtag_uart_avalon_jtag_slave_agent_rsp_fifo"]]> - queue size: 92 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_0_router" + queue size: 96 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_0_router" mm_interconnect_0" instantiated altera_merlin_router "router"]]> - queue size: 91 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_001" + queue size: 95 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_001" mm_interconnect_0" instantiated altera_merlin_router "router_001"]]> - queue size: 90 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_002" + queue size: 94 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_002" mm_interconnect_0" instantiated altera_merlin_router "router_002"]]> - queue size: 86 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_006" + queue size: 90 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_006" mm_interconnect_0" instantiated altera_merlin_router "router_006"]]> - queue size: 75 starting:altera_merlin_traffic_limiter "submodules/altera_merlin_traffic_limiter" + queue size: 78 starting:altera_merlin_traffic_limiter "submodules/altera_merlin_traffic_limiter" mm_interconnect_0" instantiated altera_merlin_traffic_limiter "nios2_gen2_data_master_limiter"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_sc_fifo.v]]> - queue size: 73 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_cmd_demux" + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_sc_fifo.v]]> + queue size: 76 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_cmd_demux" mm_interconnect_0" instantiated altera_merlin_demultiplexer "cmd_demux"]]> - queue size: 72 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_cmd_demux_001" + queue size: 75 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_cmd_demux_001" mm_interconnect_0" instantiated altera_merlin_demultiplexer "cmd_demux_001"]]> - queue size: 71 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_cmd_mux" + queue size: 74 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_cmd_mux" mm_interconnect_0" instantiated altera_merlin_multiplexer "cmd_mux"]]> - queue size: 67 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_cmd_mux_004" + queue size: 70 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_cmd_mux_004" mm_interconnect_0" instantiated altera_merlin_multiplexer "cmd_mux_004"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv]]> - queue size: 56 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux" + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv]]> + queue size: 58 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux" mm_interconnect_0" instantiated altera_merlin_demultiplexer "rsp_demux"]]> - queue size: 52 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux_004" + queue size: 54 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux_004" mm_interconnect_0" instantiated altera_merlin_demultiplexer "rsp_demux_004"]]> - queue size: 51 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux_005" + queue size: 53 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux_005" mm_interconnect_0" instantiated altera_merlin_demultiplexer "rsp_demux_005"]]> - queue size: 41 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_rsp_mux" + queue size: 42 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_rsp_mux" mm_interconnect_0" instantiated altera_merlin_multiplexer "rsp_mux"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv]]> - queue size: 40 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_rsp_mux_001" + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv]]> + queue size: 41 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_rsp_mux_001" mm_interconnect_0" instantiated altera_merlin_multiplexer "rsp_mux_001"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv]]> - queue size: 39 starting:altera_avalon_st_handshake_clock_crosser "submodules/altera_avalon_st_handshake_clock_crosser" + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv]]> + queue size: 40 starting:altera_avalon_st_handshake_clock_crosser "submodules/altera_avalon_st_handshake_clock_crosser" mm_interconnect_0" instantiated altera_avalon_st_handshake_clock_crosser "crosser"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_pipeline_base.v]]> - queue size: 35 starting:altera_avalon_st_adapter "submodules/Qsys_mm_interconnect_0_avalon_st_adapter" + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_pipeline_base.v]]> + queue size: 36 starting:altera_avalon_st_adapter "submodules/Qsys_mm_interconnect_0_avalon_st_adapter" @@ -8010,167 +8192,167 @@ };set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {SUPPRESS_0_BYTEEN_RSP} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {ID} {1};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {BURSTWRAP_VALUE} {1};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {CACHE_VALUE} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {SECURE_ACCESS_BIT} {1};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {USE_WRITERESPONSE} {0};add_instance {sdram_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {sdram_s1_agent} {PKT_ORI_BURST_SIZE_H} {85};set_instance_parameter_value {sdram_s1_agent} {PKT_ORI_BURST_SIZE_L} {83};set_instance_parameter_value {sdram_s1_agent} {PKT_RESPONSE_STATUS_H} {82};set_instance_parameter_value {sdram_s1_agent} {PKT_RESPONSE_STATUS_L} {81};set_instance_parameter_value {sdram_s1_agent} {PKT_BURST_SIZE_H} {64};set_instance_parameter_value {sdram_s1_agent} {PKT_BURST_SIZE_L} {62};set_instance_parameter_value {sdram_s1_agent} {PKT_TRANS_LOCK} {54};set_instance_parameter_value {sdram_s1_agent} {PKT_BEGIN_BURST} {69};set_instance_parameter_value {sdram_s1_agent} {PKT_PROTECTION_H} {76};set_instance_parameter_value {sdram_s1_agent} {PKT_PROTECTION_L} {74};set_instance_parameter_value {sdram_s1_agent} {PKT_BURSTWRAP_H} {61};set_instance_parameter_value {sdram_s1_agent} {PKT_BURSTWRAP_L} {61};set_instance_parameter_value {sdram_s1_agent} {PKT_BYTE_CNT_H} {60};set_instance_parameter_value {sdram_s1_agent} {PKT_BYTE_CNT_L} {56};set_instance_parameter_value {sdram_s1_agent} {PKT_ADDR_H} {49};set_instance_parameter_value {sdram_s1_agent} {PKT_ADDR_L} {18};set_instance_parameter_value {sdram_s1_agent} {PKT_TRANS_COMPRESSED_READ} {50};set_instance_parameter_value {sdram_s1_agent} {PKT_TRANS_POSTED} {51};set_instance_parameter_value {sdram_s1_agent} {PKT_TRANS_WRITE} {52};set_instance_parameter_value {sdram_s1_agent} {PKT_TRANS_READ} {53};set_instance_parameter_value {sdram_s1_agent} {PKT_DATA_H} {15};set_instance_parameter_value {sdram_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {sdram_s1_agent} {PKT_BYTEEN_H} {17};set_instance_parameter_value {sdram_s1_agent} {PKT_BYTEEN_L} {16};set_instance_parameter_value {sdram_s1_agent} {PKT_SRC_ID_H} {71};set_instance_parameter_value {sdram_s1_agent} {PKT_SRC_ID_L} {71};set_instance_parameter_value {sdram_s1_agent} {PKT_DEST_ID_H} {72};set_instance_parameter_value {sdram_s1_agent} {PKT_DEST_ID_L} {72};set_instance_parameter_value {sdram_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {sdram_s1_agent} {ST_CHANNEL_W} {2};set_instance_parameter_value {sdram_s1_agent} {ST_DATA_W} {86};set_instance_parameter_value {sdram_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {sdram_s1_agent} {AVS_BURSTCOUNT_W} {2};set_instance_parameter_value {sdram_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {sdram_s1_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(85:83) response_status(82:81) cache(80:77) protection(76:74) thread_id(73) dest_id(72) src_id(71) qos(70) begin_burst(69) data_sideband(68) addr_sideband(67) burst_type(66:65) burst_size(64:62) burstwrap(61) byte_cnt(60:56) trans_exclusive(55) trans_lock(54) trans_read(53) trans_write(52) trans_posted(51) trans_compressed_read(50) addr(49:18) byteen(17:16) data(15:0)};set_instance_parameter_value {sdram_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {1};set_instance_parameter_value {sdram_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {sdram_s1_agent} {MAX_BYTE_CNT} {2};set_instance_parameter_value {sdram_s1_agent} {MAX_BURSTWRAP} {1};set_instance_parameter_value {sdram_s1_agent} {ID} {0};set_instance_parameter_value {sdram_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {sdram_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {sdram_s1_agent} {ECC_ENABLE} {0};add_instance {sdram_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {87};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {FIFO_DEPTH} {8};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {sdram_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {sdram_s1_agent_rdata_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {BITS_PER_SYMBOL} {18};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {FIFO_DEPTH} {8};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {USE_PACKETS} {0};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {EMPTY_LATENCY} {3};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {USE_MEMORY_BLOCKS} {1};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {sdram_s1_agent_rdata_fifo} {EXPLICIT_MAXCHANNEL} {0};add_instance {router} {altera_merlin_router};set_instance_parameter_value {router} {DESTINATION_ID} {0 };set_instance_parameter_value {router} {CHANNEL_ID} {1 };set_instance_parameter_value {router} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router} {START_ADDRESS} {0x4000000 };set_instance_parameter_value {router} {END_ADDRESS} {0x8000000 };set_instance_parameter_value {router} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router} {SPAN_OFFSET} {};set_instance_parameter_value {router} {PKT_ADDR_H} {67};set_instance_parameter_value {router} {PKT_ADDR_L} {36};set_instance_parameter_value {router} {PKT_PROTECTION_H} {94};set_instance_parameter_value {router} {PKT_PROTECTION_L} {92};set_instance_parameter_value {router} {PKT_DEST_ID_H} {90};set_instance_parameter_value {router} {PKT_DEST_ID_L} {90};set_instance_parameter_value {router} {PKT_TRANS_WRITE} {70};set_instance_parameter_value {router} {PKT_TRANS_READ} {71};set_instance_parameter_value {router} {ST_DATA_W} {104};set_instance_parameter_value {router} {ST_CHANNEL_W} {2};set_instance_parameter_value {router} {DECODER_TYPE} {0};set_instance_parameter_value {router} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router} {DEFAULT_DESTID} {0};set_instance_parameter_value {router} {MERLIN_PACKET_FORMAT} {ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router} {MEMORY_ALIASING_DECODE} {0};add_instance {router_001} {altera_merlin_router};set_instance_parameter_value {router_001} {DESTINATION_ID} {0 };set_instance_parameter_value {router_001} {CHANNEL_ID} {1 };set_instance_parameter_value {router_001} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_001} {START_ADDRESS} {0x4000000 };set_instance_parameter_value {router_001} {END_ADDRESS} {0x8000000 };set_instance_parameter_value {router_001} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_001} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_001} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_001} {SPAN_OFFSET} {};set_instance_parameter_value {router_001} {PKT_ADDR_H} {67};set_instance_parameter_value {router_001} {PKT_ADDR_L} {36};set_instance_parameter_value {router_001} {PKT_PROTECTION_H} {94};set_instance_parameter_value {router_001} {PKT_PROTECTION_L} {92};set_instance_parameter_value {router_001} {PKT_DEST_ID_H} {90};set_instance_parameter_value {router_001} {PKT_DEST_ID_L} {90};set_instance_parameter_value {router_001} {PKT_TRANS_WRITE} {70};set_instance_parameter_value {router_001} {PKT_TRANS_READ} {71};set_instance_parameter_value {router_001} {ST_DATA_W} {104};set_instance_parameter_value {router_001} {ST_CHANNEL_W} {2};set_instance_parameter_value {router_001} {DECODER_TYPE} {0};set_instance_parameter_value {router_001} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_001} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_001} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_001} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_001} {MERLIN_PACKET_FORMAT} {ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_001} {MEMORY_ALIASING_DECODE} {0};add_instance {router_002} {altera_merlin_router};set_instance_parameter_value {router_002} {DESTINATION_ID} {0 1 };set_instance_parameter_value {router_002} {CHANNEL_ID} {01 10 };set_instance_parameter_value {router_002} {TYPE_OF_TRANSACTION} {read write };set_instance_parameter_value {router_002} {START_ADDRESS} {0x0 0x0 };set_instance_parameter_value {router_002} {END_ADDRESS} {0x0 0x0 };set_instance_parameter_value {router_002} {NON_SECURED_TAG} {1 1 };set_instance_parameter_value {router_002} {SECURED_RANGE_PAIRS} {0 0 };set_instance_parameter_value {router_002} {SECURED_RANGE_LIST} {0 0 };set_instance_parameter_value {router_002} {SPAN_OFFSET} {};set_instance_parameter_value {router_002} {PKT_ADDR_H} {49};set_instance_parameter_value {router_002} {PKT_ADDR_L} {18};set_instance_parameter_value {router_002} {PKT_PROTECTION_H} {76};set_instance_parameter_value {router_002} {PKT_PROTECTION_L} {74};set_instance_parameter_value {router_002} {PKT_DEST_ID_H} {72};set_instance_parameter_value {router_002} {PKT_DEST_ID_L} {72};set_instance_parameter_value {router_002} {PKT_TRANS_WRITE} {52};set_instance_parameter_value {router_002} {PKT_TRANS_READ} {53};set_instance_parameter_value {router_002} {ST_DATA_W} {86};set_instance_parameter_value {router_002} {ST_CHANNEL_W} {2};set_instance_parameter_value {router_002} {DECODER_TYPE} {1};set_instance_parameter_value {router_002} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_002} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_002} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_002} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_002} {MERLIN_PACKET_FORMAT} {ori_burst_size(85:83) response_status(82:81) cache(80:77) protection(76:74) thread_id(73) dest_id(72) src_id(71) qos(70) begin_burst(69) data_sideband(68) addr_sideband(67) burst_type(66:65) burst_size(64:62) burstwrap(61) byte_cnt(60:56) trans_exclusive(55) trans_lock(54) trans_read(53) trans_write(52) trans_posted(51) trans_compressed_read(50) addr(49:18) byteen(17:16) data(15:0)};set_instance_parameter_value {router_002} {MEMORY_ALIASING_DECODE} {0};add_instance {sdram_s1_burst_adapter} {altera_merlin_burst_adapter};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_ADDR_H} {49};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_ADDR_L} {18};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_BEGIN_BURST} {69};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_BYTE_CNT_H} {60};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_BYTE_CNT_L} {56};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_BYTEEN_H} {17};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_BYTEEN_L} {16};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_BURST_SIZE_H} {64};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_BURST_SIZE_L} {62};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_BURST_TYPE_H} {66};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_BURST_TYPE_L} {65};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_BURSTWRAP_H} {61};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_BURSTWRAP_L} {61};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_TRANS_COMPRESSED_READ} {50};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_TRANS_WRITE} {52};set_instance_parameter_value {sdram_s1_burst_adapter} {PKT_TRANS_READ} {53};set_instance_parameter_value {sdram_s1_burst_adapter} {OUT_NARROW_SIZE} {0};set_instance_parameter_value {sdram_s1_burst_adapter} {IN_NARROW_SIZE} {0};set_instance_parameter_value {sdram_s1_burst_adapter} {OUT_FIXED} {0};set_instance_parameter_value {sdram_s1_burst_adapter} {OUT_COMPLETE_WRAP} {0};set_instance_parameter_value {sdram_s1_burst_adapter} {ST_DATA_W} {86};set_instance_parameter_value {sdram_s1_burst_adapter} {ST_CHANNEL_W} {2};set_instance_parameter_value {sdram_s1_burst_adapter} {OUT_BYTE_CNT_H} {57};set_instance_parameter_value {sdram_s1_burst_adapter} {OUT_BURSTWRAP_H} {61};set_instance_parameter_value {sdram_s1_burst_adapter} {MERLIN_PACKET_FORMAT} {ori_burst_size(85:83) response_status(82:81) cache(80:77) protection(76:74) thread_id(73) dest_id(72) src_id(71) qos(70) begin_burst(69) data_sideband(68) addr_sideband(67) burst_type(66:65) burst_size(64:62) burstwrap(61) byte_cnt(60:56) trans_exclusive(55) trans_lock(54) trans_read(53) trans_write(52) trans_posted(51) trans_compressed_read(50) addr(49:18) byteen(17:16) data(15:0)};set_instance_parameter_value {sdram_s1_burst_adapter} {COMPRESSED_READ_SUPPORT} {1};set_instance_parameter_value {sdram_s1_burst_adapter} {BYTEENABLE_SYNTHESIS} {1};set_instance_parameter_value {sdram_s1_burst_adapter} {PIPE_INPUTS} {0};set_instance_parameter_value {sdram_s1_burst_adapter} {NO_WRAP_SUPPORT} {0};set_instance_parameter_value {sdram_s1_burst_adapter} {INCOMPLETE_WRAP_SUPPORT} {0};set_instance_parameter_value {sdram_s1_burst_adapter} {BURSTWRAP_CONST_MASK} {1};set_instance_parameter_value {sdram_s1_burst_adapter} {BURSTWRAP_CONST_VALUE} {1};set_instance_parameter_value {sdram_s1_burst_adapter} {ADAPTER_VERSION} {13.1};add_instance {cmd_demux} {altera_merlin_demultiplexer};set_instance_parameter_value {cmd_demux} {ST_DATA_W} {104};set_instance_parameter_value {cmd_demux} {ST_CHANNEL_W} {2};set_instance_parameter_value {cmd_demux} {NUM_OUTPUTS} {1};set_instance_parameter_value {cmd_demux} {VALID_WIDTH} {1};set_instance_parameter_value {cmd_demux} {MERLIN_PACKET_FORMAT} {ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};add_instance {cmd_demux_001} {altera_merlin_demultiplexer};set_instance_parameter_value {cmd_demux_001} {ST_DATA_W} {104};set_instance_parameter_value {cmd_demux_001} {ST_CHANNEL_W} {2};set_instance_parameter_value {cmd_demux_001} {NUM_OUTPUTS} {1};set_instance_parameter_value {cmd_demux_001} {VALID_WIDTH} {1};set_instance_parameter_value {cmd_demux_001} {MERLIN_PACKET_FORMAT} {ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};add_instance {cmd_mux} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux} {ST_DATA_W} {104};set_instance_parameter_value {cmd_mux} {ST_CHANNEL_W} {2};set_instance_parameter_value {cmd_mux} {NUM_INPUTS} {2};set_instance_parameter_value {cmd_mux} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux} {PKT_TRANS_LOCK} {72};set_instance_parameter_value {cmd_mux} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux} {ARBITRATION_SHARES} {50 30 };set_instance_parameter_value {cmd_mux} {MERLIN_PACKET_FORMAT} {ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};add_instance {rsp_demux} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux} {ST_DATA_W} {104};set_instance_parameter_value {rsp_demux} {ST_CHANNEL_W} {2};set_instance_parameter_value {rsp_demux} {NUM_OUTPUTS} {2};set_instance_parameter_value {rsp_demux} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux} {MERLIN_PACKET_FORMAT} {ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};add_instance {rsp_mux} {altera_merlin_multiplexer};set_instance_parameter_value {rsp_mux} {ST_DATA_W} {104};set_instance_parameter_value {rsp_mux} {ST_CHANNEL_W} {2};set_instance_parameter_value {rsp_mux} {NUM_INPUTS} {1};set_instance_parameter_value {rsp_mux} {PIPELINE_ARB} {0};set_instance_parameter_value {rsp_mux} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {rsp_mux} {PKT_TRANS_LOCK} {72};set_instance_parameter_value {rsp_mux} {ARBITRATION_SCHEME} {no-arb};set_instance_parameter_value {rsp_mux} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {rsp_mux} {MERLIN_PACKET_FORMAT} {ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};add_instance {rsp_mux_001} {altera_merlin_multiplexer};set_instance_parameter_value {rsp_mux_001} {ST_DATA_W} {104};set_instance_parameter_value {rsp_mux_001} {ST_CHANNEL_W} {2};set_instance_parameter_value {rsp_mux_001} {NUM_INPUTS} {1};set_instance_parameter_value {rsp_mux_001} {PIPELINE_ARB} {0};set_instance_parameter_value {rsp_mux_001} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {rsp_mux_001} {PKT_TRANS_LOCK} {72};set_instance_parameter_value {rsp_mux_001} {ARBITRATION_SCHEME} {no-arb};set_instance_parameter_value {rsp_mux_001} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {rsp_mux_001} {MERLIN_PACKET_FORMAT} {ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};add_instance {sdram_s1_rsp_width_adapter} {altera_merlin_width_adapter};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_ADDR_H} {49};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_ADDR_L} {18};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_DATA_H} {15};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_DATA_L} {0};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_BYTEEN_H} {17};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_BYTEEN_L} {16};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_BYTE_CNT_H} {60};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_BYTE_CNT_L} {56};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_TRANS_COMPRESSED_READ} {50};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_TRANS_WRITE} {52};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_BURSTWRAP_H} {61};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_BURSTWRAP_L} {61};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_BURST_SIZE_H} {64};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_BURST_SIZE_L} {62};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_RESPONSE_STATUS_H} {82};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_RESPONSE_STATUS_L} {81};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_TRANS_EXCLUSIVE} {55};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_BURST_TYPE_H} {66};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_BURST_TYPE_L} {65};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_ORI_BURST_SIZE_L} {83};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_PKT_ORI_BURST_SIZE_H} {85};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_ST_DATA_W} {86};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_ADDR_H} {67};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_ADDR_L} {36};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_DATA_H} {31};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_DATA_L} {0};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_BYTEEN_H} {35};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_BYTEEN_L} {32};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_BYTE_CNT_H} {78};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_BYTE_CNT_L} {74};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_TRANS_COMPRESSED_READ} {68};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_BURST_SIZE_H} {82};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_BURST_SIZE_L} {80};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_RESPONSE_STATUS_H} {100};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_RESPONSE_STATUS_L} {99};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_TRANS_EXCLUSIVE} {73};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_BURST_TYPE_H} {84};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_BURST_TYPE_L} {83};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_ORI_BURST_SIZE_L} {101};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_PKT_ORI_BURST_SIZE_H} {103};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_ST_DATA_W} {104};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {ST_CHANNEL_W} {2};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OPTIMIZE_FOR_RSP} {0};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {RESPONSE_PATH} {1};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {CONSTANT_BURST_SIZE} {1};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {PACKING} {1};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {IN_MERLIN_PACKET_FORMAT} {ori_burst_size(85:83) response_status(82:81) cache(80:77) protection(76:74) thread_id(73) dest_id(72) src_id(71) qos(70) begin_burst(69) data_sideband(68) addr_sideband(67) burst_type(66:65) burst_size(64:62) burstwrap(61) byte_cnt(60:56) trans_exclusive(55) trans_lock(54) trans_read(53) trans_write(52) trans_posted(51) trans_compressed_read(50) addr(49:18) byteen(17:16) data(15:0)};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {OUT_MERLIN_PACKET_FORMAT} {ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {COMMAND_SIZE_W} {3};set_instance_parameter_value {sdram_s1_rsp_width_adapter} {ENABLE_ADDRESS_ALIGNMENT} {0};add_instance {sdram_s1_cmd_width_adapter} {altera_merlin_width_adapter};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_ADDR_H} {67};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_ADDR_L} {36};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_DATA_H} {31};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_DATA_L} {0};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_BYTEEN_H} {35};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_BYTEEN_L} {32};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_BYTE_CNT_H} {78};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_BYTE_CNT_L} {74};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_TRANS_COMPRESSED_READ} {68};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_TRANS_WRITE} {70};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_BURSTWRAP_H} {79};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_BURSTWRAP_L} {79};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_BURST_SIZE_H} {82};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_BURST_SIZE_L} {80};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_RESPONSE_STATUS_H} {100};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_RESPONSE_STATUS_L} {99};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_TRANS_EXCLUSIVE} {73};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_BURST_TYPE_H} {84};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_BURST_TYPE_L} {83};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_ORI_BURST_SIZE_L} {101};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_PKT_ORI_BURST_SIZE_H} {103};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_ST_DATA_W} {104};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_ADDR_H} {49};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_ADDR_L} {18};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_DATA_H} {15};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_DATA_L} {0};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_BYTEEN_H} {17};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_BYTEEN_L} {16};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_BYTE_CNT_H} {60};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_BYTE_CNT_L} {56};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_TRANS_COMPRESSED_READ} {50};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_BURST_SIZE_H} {64};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_BURST_SIZE_L} {62};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_RESPONSE_STATUS_H} {82};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_RESPONSE_STATUS_L} {81};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_TRANS_EXCLUSIVE} {55};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_BURST_TYPE_H} {66};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_BURST_TYPE_L} {65};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_ORI_BURST_SIZE_L} {83};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_PKT_ORI_BURST_SIZE_H} {85};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_ST_DATA_W} {86};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {ST_CHANNEL_W} {2};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OPTIMIZE_FOR_RSP} {0};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {RESPONSE_PATH} {0};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {CONSTANT_BURST_SIZE} {1};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {PACKING} {1};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {IN_MERLIN_PACKET_FORMAT} {ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0)};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {OUT_MERLIN_PACKET_FORMAT} {ori_burst_size(85:83) response_status(82:81) cache(80:77) protection(76:74) thread_id(73) dest_id(72) src_id(71) qos(70) begin_burst(69) data_sideband(68) addr_sideband(67) burst_type(66:65) burst_size(64:62) burstwrap(61) byte_cnt(60:56) trans_exclusive(55) trans_lock(54) trans_read(53) trans_write(52) trans_posted(51) trans_compressed_read(50) addr(49:18) byteen(17:16) data(15:0)};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {COMMAND_SIZE_W} {3};set_instance_parameter_value {sdram_s1_cmd_width_adapter} {ENABLE_ADDRESS_ALIGNMENT} {0};add_instance {alt_vip_vfb_0_reset_reset_bridge} {altera_reset_bridge};set_instance_parameter_value {alt_vip_vfb_0_reset_reset_bridge} {ACTIVE_LOW_RESET} {0};set_instance_parameter_value {alt_vip_vfb_0_reset_reset_bridge} {SYNCHRONOUS_EDGES} {deassert};set_instance_parameter_value {alt_vip_vfb_0_reset_reset_bridge} {NUM_RESET_OUTPUTS} {1};set_instance_parameter_value {alt_vip_vfb_0_reset_reset_bridge} {USE_RESET_REQUEST} {0};add_instance {altpll_0_c2_clock_bridge} {altera_clock_bridge};set_instance_parameter_value {altpll_0_c2_clock_bridge} {EXPLICIT_CLOCK_RATE} {100000000};set_instance_parameter_value {altpll_0_c2_clock_bridge} {NUM_CLOCK_OUTPUTS} {1};add_connection {alt_vip_vfb_0_read_master_translator.avalon_universal_master_0} {alt_vip_vfb_0_read_master_agent.av} {avalon};set_connection_parameter_value {alt_vip_vfb_0_read_master_translator.avalon_universal_master_0/alt_vip_vfb_0_read_master_agent.av} {arbitrationPriority} {1};set_connection_parameter_value {alt_vip_vfb_0_read_master_translator.avalon_universal_master_0/alt_vip_vfb_0_read_master_agent.av} {baseAddress} {0x0000};set_connection_parameter_value {alt_vip_vfb_0_read_master_translator.avalon_universal_master_0/alt_vip_vfb_0_read_master_agent.av} {defaultConnection} {false};add_connection {rsp_mux.src} {alt_vip_vfb_0_read_master_agent.rp} {avalon_streaming};preview_set_connection_tag {rsp_mux.src/alt_vip_vfb_0_read_master_agent.rp} {qsys_mm.response};add_connection {alt_vip_vfb_0_write_master_translator.avalon_universal_master_0} {alt_vip_vfb_0_write_master_agent.av} {avalon};set_connection_parameter_value {alt_vip_vfb_0_write_master_translator.avalon_universal_master_0/alt_vip_vfb_0_write_master_agent.av} {arbitrationPriority} {1};set_connection_parameter_value {alt_vip_vfb_0_write_master_translator.avalon_universal_master_0/alt_vip_vfb_0_write_master_agent.av} {baseAddress} {0x0000};set_connection_parameter_value {alt_vip_vfb_0_write_master_translator.avalon_universal_master_0/alt_vip_vfb_0_write_master_agent.av} {defaultConnection} {false};add_connection {rsp_mux_001.src} {alt_vip_vfb_0_write_master_agent.rp} {avalon_streaming};preview_set_connection_tag {rsp_mux_001.src/alt_vip_vfb_0_write_master_agent.rp} {qsys_mm.response};add_connection {sdram_s1_agent.m0} {sdram_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {sdram_s1_agent.m0/sdram_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {sdram_s1_agent.m0/sdram_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {sdram_s1_agent.m0/sdram_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};add_connection {sdram_s1_agent.rf_source} {sdram_s1_agent_rsp_fifo.in} {avalon_streaming};add_connection {sdram_s1_agent_rsp_fifo.out} {sdram_s1_agent.rf_sink} {avalon_streaming};add_connection {sdram_s1_agent.rdata_fifo_src} {sdram_s1_agent_rdata_fifo.in} {avalon_streaming};add_connection {sdram_s1_agent_rdata_fifo.out} {sdram_s1_agent.rdata_fifo_sink} {avalon_streaming};add_connection {alt_vip_vfb_0_read_master_agent.cp} {router.sink} {avalon_streaming};preview_set_connection_tag {alt_vip_vfb_0_read_master_agent.cp/router.sink} {qsys_mm.command};add_connection {router.src} {cmd_demux.sink} {avalon_streaming};preview_set_connection_tag {router.src/cmd_demux.sink} {qsys_mm.command};add_connection {alt_vip_vfb_0_write_master_agent.cp} {router_001.sink} {avalon_streaming};preview_set_connection_tag {alt_vip_vfb_0_write_master_agent.cp/router_001.sink} {qsys_mm.command};add_connection {router_001.src} {cmd_demux_001.sink} {avalon_streaming};preview_set_connection_tag {router_001.src/cmd_demux_001.sink} {qsys_mm.command};add_connection {sdram_s1_agent.rp} {router_002.sink} {avalon_streaming};preview_set_connection_tag {sdram_s1_agent.rp/router_002.sink} {qsys_mm.response};add_connection {sdram_s1_burst_adapter.source0} {sdram_s1_agent.cp} {avalon_streaming};preview_set_connection_tag {sdram_s1_burst_adapter.source0/sdram_s1_agent.cp} {qsys_mm.command};add_connection {cmd_demux.src0} {cmd_mux.sink0} {avalon_streaming};preview_set_connection_tag {cmd_demux.src0/cmd_mux.sink0} {qsys_mm.command};add_connection {cmd_demux_001.src0} {cmd_mux.sink1} {avalon_streaming};preview_set_connection_tag {cmd_demux_001.src0/cmd_mux.sink1} {qsys_mm.command};add_connection {rsp_demux.src0} {rsp_mux.sink0} {avalon_streaming};preview_set_connection_tag {rsp_demux.src0/rsp_mux.sink0} {qsys_mm.response};add_connection {rsp_demux.src1} {rsp_mux_001.sink0} {avalon_streaming};preview_set_connection_tag {rsp_demux.src1/rsp_mux_001.sink0} {qsys_mm.response};add_connection {router_002.src} {sdram_s1_rsp_width_adapter.sink} {avalon_streaming};preview_set_connection_tag {router_002.src/sdram_s1_rsp_width_adapter.sink} {qsys_mm.response};add_connection {sdram_s1_rsp_width_adapter.src} {rsp_demux.sink} {avalon_streaming};preview_set_connection_tag {sdram_s1_rsp_width_adapter.src/rsp_demux.sink} {qsys_mm.response};add_connection {cmd_mux.src} {sdram_s1_cmd_width_adapter.sink} {avalon_streaming};preview_set_connection_tag {cmd_mux.src/sdram_s1_cmd_width_adapter.sink} {qsys_mm.command};add_connection {sdram_s1_cmd_width_adapter.src} {sdram_s1_burst_adapter.sink0} {avalon_streaming};preview_set_connection_tag {sdram_s1_cmd_width_adapter.src/sdram_s1_burst_adapter.sink0} {qsys_mm.command};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {alt_vip_vfb_0_read_master_translator.reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {alt_vip_vfb_0_write_master_translator.reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {sdram_s1_translator.reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {alt_vip_vfb_0_read_master_agent.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {alt_vip_vfb_0_write_master_agent.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {sdram_s1_agent.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {sdram_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {sdram_s1_agent_rdata_fifo.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {router.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {router_001.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {router_002.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {sdram_s1_burst_adapter.cr0_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {cmd_demux.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {cmd_demux_001.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {cmd_mux.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {rsp_demux.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {rsp_mux.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {rsp_mux_001.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {sdram_s1_rsp_width_adapter.clk_reset} {reset};add_connection {alt_vip_vfb_0_reset_reset_bridge.out_reset} {sdram_s1_cmd_width_adapter.clk_reset} {reset};add_connection {altpll_0_c2_clock_bridge.out_clk} {alt_vip_vfb_0_read_master_translator.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {alt_vip_vfb_0_write_master_translator.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {sdram_s1_translator.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {alt_vip_vfb_0_read_master_agent.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {alt_vip_vfb_0_write_master_agent.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {sdram_s1_agent.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {sdram_s1_agent_rsp_fifo.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {sdram_s1_agent_rdata_fifo.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {router.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {router_001.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {router_002.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {sdram_s1_burst_adapter.cr0} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {cmd_demux.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {rsp_mux.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {cmd_demux_001.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {rsp_mux_001.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {cmd_mux.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {rsp_demux.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {sdram_s1_rsp_width_adapter.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {sdram_s1_cmd_width_adapter.clk} {clock};add_connection {altpll_0_c2_clock_bridge.out_clk} {alt_vip_vfb_0_reset_reset_bridge.clk} {clock};add_interface {altpll_0_c2} {clock} {slave};set_interface_property {altpll_0_c2} {EXPORT_OF} {altpll_0_c2_clock_bridge.in_clk};add_interface {alt_vip_vfb_0_reset_reset_bridge_in_reset} {reset} {slave};set_interface_property {alt_vip_vfb_0_reset_reset_bridge_in_reset} {EXPORT_OF} {alt_vip_vfb_0_reset_reset_bridge.in_reset};add_interface {alt_vip_vfb_0_read_master} {avalon} {slave};set_interface_property {alt_vip_vfb_0_read_master} {EXPORT_OF} {alt_vip_vfb_0_read_master_translator.avalon_anti_master_0};add_interface {alt_vip_vfb_0_write_master} {avalon} {slave};set_interface_property {alt_vip_vfb_0_write_master} {EXPORT_OF} {alt_vip_vfb_0_write_master_translator.avalon_anti_master_0};add_interface {sdram_s1} {avalon} {master};set_interface_property {sdram_s1} {EXPORT_OF} {sdram_s1_translator.avalon_anti_slave_0};set_module_assignment {interconnect_id.alt_vip_vfb_0.read_master} {0};set_module_assignment {interconnect_id.alt_vip_vfb_0.write_master} {1};set_module_assignment {interconnect_id.sdram.s1} {0};" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_mm_interconnect/altera_mm_interconnect_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_master_translator/altera_merlin_master_translator_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_slave_translator/altera_merlin_slave_translator_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_master_agent/altera_merlin_master_agent_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_slave_agent/altera_merlin_slave_agent_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo.v" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_burst_adapter/altera_merlin_burst_adapter_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_width_adapter/altera_merlin_width_adapter_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_adapter/altera_avalon_st_adapter_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_error_adapter/avalon-st_error_adapter_hw.tcl" /> - queue size: 327 starting:altera_mm_interconnect "submodules/Qsys_mm_interconnect_1" + queue size: 334 starting:altera_mm_interconnect "submodules/Qsys_mm_interconnect_1" @@ -8262,9 +8444,9 @@ Inserting error_adapter: error_adapter_0 Timing: ELA:1/0.000s - Timing: ELA:2/0.001s/0.001s - Timing: ELA:1/0.006s - Timing: COM:3/0.012s/0.013s + Timing: ELA:2/0.000s/0.001s + Timing: ELA:1/0.007s + Timing: COM:3/0.013s/0.015s 23 modules, 67 connections]]> @@ -8291,15 +8473,15 @@ mm_interconnect_1" reuses altera_merlin_width_adapter "submodules/altera_merlin_width_adapter"]]> mm_interconnect_1" reuses altera_avalon_st_adapter "submodules/Qsys_mm_interconnect_1_avalon_st_adapter"]]> Qsys" instantiated altera_mm_interconnect "mm_interconnect_1"]]> - queue size: 143 starting:altera_merlin_master_translator "submodules/altera_merlin_master_translator" + queue size: 150 starting:altera_merlin_master_translator "submodules/altera_merlin_master_translator" mm_interconnect_0" instantiated altera_merlin_master_translator "nios2_gen2_data_master_translator"]]> - queue size: 141 starting:altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" + queue size: 148 starting:altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" mm_interconnect_0" instantiated altera_merlin_slave_translator "jtag_uart_avalon_jtag_slave_translator"]]> - queue size: 126 starting:altera_merlin_master_agent "submodules/altera_merlin_master_agent" + queue size: 132 starting:altera_merlin_master_agent "submodules/altera_merlin_master_agent" mm_interconnect_0" instantiated altera_merlin_master_agent "nios2_gen2_data_master_agent"]]> - queue size: 124 starting:altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" + queue size: 130 starting:altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" mm_interconnect_0" instantiated altera_merlin_slave_agent "jtag_uart_avalon_jtag_slave_agent"]]> - queue size: 123 starting:altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" + queue size: 129 starting:altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" mm_interconnect_0" instantiated altera_avalon_sc_fifo "jtag_uart_avalon_jtag_slave_agent_rsp_fifo"]]> queue size: 13 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_1_router" mm_interconnect_1" instantiated altera_merlin_router "router"]]> @@ -8307,21 +8489,21 @@ mm_interconnect_1" instantiated altera_merlin_router "router_002"]]> queue size: 10 starting:altera_merlin_burst_adapter "submodules/altera_merlin_burst_adapter" mm_interconnect_1" instantiated altera_merlin_burst_adapter "sdram_s1_burst_adapter"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_pipeline_base.v]]> + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_pipeline_base.v]]> queue size: 9 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_1_cmd_demux" mm_interconnect_1" instantiated altera_merlin_demultiplexer "cmd_demux"]]> queue size: 7 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_1_cmd_mux" mm_interconnect_1" instantiated altera_merlin_multiplexer "cmd_mux"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv]]> + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv]]> queue size: 6 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_1_rsp_demux" mm_interconnect_1" instantiated altera_merlin_demultiplexer "rsp_demux"]]> queue size: 5 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_1_rsp_mux" mm_interconnect_1" instantiated altera_merlin_multiplexer "rsp_mux"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv]]> + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv]]> queue size: 3 starting:altera_merlin_width_adapter "submodules/altera_merlin_width_adapter" mm_interconnect_1" instantiated altera_merlin_width_adapter "sdram_s1_rsp_width_adapter"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_address_alignment.sv]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_burst_uncompressor.sv]]> + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_address_alignment.sv]]> + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_burst_uncompressor.sv]]> queue size: 1 starting:altera_avalon_st_adapter "submodules/Qsys_mm_interconnect_1_avalon_st_adapter" @@ -8343,30 +8525,30 @@ - - + + + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_irq_mapper/altera_irq_mapper_hw.tcl" /> - queue size: 347 starting:altera_irq_mapper "submodules/Qsys_irq_mapper" + queue size: 354 starting:altera_irq_mapper "submodules/Qsys_irq_mapper" Qsys" instantiated altera_irq_mapper "irq_mapper"]]> @@ -8379,29 +8561,29 @@ name="altera_reset_controller"> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_reset_controller/altera_reset_controller_hw.tcl" /> - queue size: 346 starting:altera_reset_controller "submodules/altera_reset_controller" + queue size: 353 starting:altera_reset_controller "submodules/altera_reset_controller" Qsys" instantiated altera_reset_controller "rst_controller"]]> @@ -8416,7 +8598,7 @@ @@ -8426,7 +8608,7 @@ instantiator="Qsys_alt_vip_vfb_0" as="vfb_writer_packet_write_address_au_l_muxinst,vfb_writer_packet_write_address_au_sload_muxinst,vfb_writer_first_packet_id_au_enable_muxinst,vfb_writer_first_packet_id_au_sload_muxinst,vfb_writer_next_to_last_packet_id_au_enable_muxinst,vfb_writer_overflow_trigger_au_sload_muxinst,vfb_writer_overflow_flag_reg_enable_muxinst,vfb_writer_word_counter_trigger_au_sload_muxinst,vfb_writer_field_interlace_reg_d_muxinst,vfb_writer_field_interlace_reg_enable_muxinst,vfb_writer_write_address_au_l_muxinst,vfb_reader_current_packet_id_au_l_muxinst,read_master_renable_trigger_muxinst,read_master_addr_muxinst,read_master_len_be_muxinst,write_master_len_be_muxinst,write_master_push_input_muxinst,vfb_writer_packets_sample_length_reg_d_muxinst,vfb_writer_packets_sample_length_reg_enable_muxinst,vfb_writer_packets_word_length_reg_d_muxinst,vfb_writer_packets_word_length_reg_enable_muxinst,packetdimensions_reg_d_muxinst,packetdimensions_reg_131_d_muxinst,packetdimensions_reg_1312_d_muxinst,packetdimensions_reg_1313_d_muxinst,output_reg_d_muxinst,output_reg_153_d_muxinst,output_reg_1532_d_muxinst,output_reg_1533_d_muxinst,output_reg_1534_d_muxinst,output_reg_1535_d_muxinst,msg_buffer_reply_id_3148_line162_d_muxinst,msg_buffer_id_3153_line170_d_muxinst,msg_field_width_id_3157_line172_d_muxinst,msg_field_height_id_3161_line174_d_muxinst,msg_field_interlace_id_3165_line176_d_muxinst,msg_samples_in_field_id_3169_line178_d_muxinst,msg_words_in_field_id_3173_line180_d_muxinst,msg_first_packet_id_3177_line222_d_muxinst,msg_next_to_last_packet_id_3181_line223_d_muxinst,vfb_reader_length_cnt_id_3256_line897_a_muxinst,vfb_reader_length_cnt_id_3265_line897_a_muxinst" /> - queue size: 343 starting:alt_cusp_muxbin2 "submodules/alt_cusp161_muxbin2" + queue size: 350 starting:alt_cusp_muxbin2 "submodules/alt_cusp161_muxbin2" alt_vip_vfb_0" instantiated alt_cusp_muxbin2 "vfb_writer_packet_write_address_au_l_muxinst"]]> @@ -8444,13 +8626,13 @@ @@ -8460,7 +8642,7 @@ instantiator="Qsys_alt_vip_vfb_0" as="vfb_writer_packet_write_address_au,vfb_writer_first_packet_id_au,vfb_writer_next_to_last_packet_id_au,vfb_writer_overflow_trigger_au,vfb_writer_length_counter_au,vfb_writer_word_counter_au,vfb_writer_word_counter_trigger_au,vfb_writer_write_address_au,vfb_reader_read_address_au,vfb_reader_packet_read_address_au,vfb_reader_current_packet_id_au,wrap_packet_id_id_3247_line1077,vfb_reader_length_cnt_4_id_3254_line897,vfb_reader_length_cnt_id_3256_line897,vfb_reader_length_cnt_id_3265_line897" /> - queue size: 341 starting:alt_au "submodules/alt_cusp161_au" + queue size: 348 starting:alt_au "submodules/alt_cusp161_au" alt_vip_vfb_0" instantiated alt_au "vfb_writer_packet_write_address_au"]]> @@ -8477,10 +8659,10 @@ @@ -8490,9 +8672,9 @@ instantiator="Qsys_alt_vip_vfb_0" as="vfb_writer_overflow_flag_reg,vfb_writer_field_width_reg,vfb_writer_field_height_reg,vfb_writer_field_interlace_reg,vfb_writer_just_read_reg,vfb_writer_packets_sample_length_reg,vfb_writer_packets_word_length_reg,msg_packets_sample_length_reg,msg_packets_word_length_reg,packetdimensions_reg,packetdimensions_reg_131,packetdimensions_reg_1312,packetdimensions_reg_1313,output_reg,output_reg_153,output_reg_1532,output_reg_1533,output_reg_1534,output_reg_1535,output_reg_1536,output_reg_1537,output_reg_1538,msg_buffer_reply_id_3148_line162,msg_buffer_id_3153_line170,msg_field_width_id_3157_line172,msg_field_height_id_3161_line174,msg_field_interlace_id_3165_line176,msg_samples_in_field_id_3169_line178,msg_words_in_field_id_3173_line180,msg_first_packet_id_3177_line222,msg_next_to_last_packet_id_3181_line223,vfb_writer_buffer_id_3185_line228,write_to_read_buf_id_3188_line153,write_to_read_ack_id_3191_line164,vfb_writer_packet_base_address_0_id_3194_line204,isnotimagedata_0_id_3196_line144,iscontrolpacket_0_id_3198_line202,no_last_burst_0_id_3200_line301,no_last_burst_0_id_3204_line585,cond588_0_id_3206,drop_0_id_3208_line345,loop_repeat_0_id_3210_line367,burst_trigger_0_id_3212_line563,cond568_0_id_3214,cond290_0_id_3218,vfb_reader_buffer_id_3220_line865,read_to_write_ack_id_3223_line156,read_to_write_buf_id_3226_line160,vfb_reader_field_width_0_id_3229_line773,vfb_reader_samples_in_field_0_id_3231_line889,vfb_reader_field_height_0_id_3233_line775,vfb_reader_words_in_field_0_id_3235_line891,vfb_reader_field_interlace_0_id_3237_line777,vfb_reader_next_to_last_packet_id_0_id_3239_line876,reader_packets_sample_length_0_id_3241_line878,reader_packets_word_length_0_id_3243_line880,vfb_reader_packet_base_address_0_id_3245_line873,vfb_reader_length_cnt_3_id_3250_line897,vfb_reader_word_cnt_0_id_3252_line898,repeat_0_id_3259_line1140,loop_repeat_0_id_3261_line1148,cond1203_0_id_3263,cond1113_0_id_3268,ispreviousendpacket_0_comb_id_7828,justreadqueue_1_1_comb_id_7831,justreadqueue_2_1_comb_id_7834,justreadqueue_1_2_comb_id_7837,ispreviousendpacket_1_comb_id_7840,justreadaccesswire_3_comb_id_7843,justreadaccesswire_4_comb_id_7846,justreadqueue_1_4_comb_id_7849,justreadqueue_2_2_comb_id_7852,justreadqueue_1_5_comb_id_7855,ispreviousendpacket_2_comb_id_7858,justreadaccesswire_6_comb_id_7861,justreadaccesswire_7_comb_id_7864,justreadqueue_1_7_comb_id_7867,justreadqueue_2_3_comb_id_7870,justreadqueue_1_8_comb_id_7873,word_counter_trigger_flag_0_comb_id_7876,op_2226_comb_id_7879,op_2226_comb_0_id_7882,op_4405_comb_id_7885,op_4407_comb_id_7888,op_3252_comb_id_7894,op_3252_comb_0_id_7897,op_4420_comb_id_7900,op_4421_comb_id_7903,cond1113_0_stage_1_id_7906,cond1113_0_stage_2_id_7909,cond1113_0_stage_3_id_7912,empty_image_0_comb_id_7915,cond1203_0_stage_1_id_7918,cond1203_0_stage_2_id_7921,cond1203_0_stage_3_id_7924" /> - queue size: 332 starting:alt_reg "submodules/alt_cusp161_reg" + queue size: 339 starting:alt_reg "submodules/alt_cusp161_reg" alt_vip_vfb_0" instantiated alt_reg "vfb_writer_overflow_flag_reg"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> @@ -8516,7 +8698,7 @@ instantiator="Qsys_alt_vip_vfb_0" as="vfb_writer_length_counter_au_enable_muxinst,vfb_writer_word_counter_au_enable_muxinst,vfb_writer_word_counter_au_enable_trigger_muxinst,vfb_writer_word_counter_trigger_au_enable_muxinst,vfb_writer_write_address_au_enable_trigger_muxinst,vfb_writer_just_read_reg_enable_muxinst,vfb_reader_packet_read_address_au_sload_muxinst,din_takeb_trigger_muxinst,dout_takeb_trigger_muxinst,dout_wdata_muxinst,dout_seteop_trigger_muxinst,dout_eop_muxinst,read_master_pull_pull_trigger_muxinst,write_master_cenable_trigger_muxinst,write_master_push_push_trigger_muxinst,pc0_usenextpc_trigger_muxinst,pc0_hold_trigger_muxinst,pc1_usenextpc_trigger_muxinst,pc1_hold_trigger_muxinst" /> - queue size: 331 starting:alt_cusp_muxhot16 "submodules/alt_cusp161_muxhot16" + queue size: 338 starting:alt_cusp_muxhot16 "submodules/alt_cusp161_muxhot16" alt_vip_vfb_0" instantiated alt_cusp_muxhot16 "vfb_writer_length_counter_au_enable_muxinst"]]> @@ -8535,10 +8717,10 @@ @@ -8546,9 +8728,9 @@ - queue size: 307 starting:alt_avalon_st_input "submodules/alt_cusp161_avalon_st_input" + queue size: 314 starting:alt_avalon_st_input "submodules/alt_cusp161_avalon_st_input" alt_vip_vfb_0" instantiated alt_avalon_st_input "din"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> @@ -8579,9 +8761,9 @@ - queue size: 302 starting:alt_avalon_st_output "submodules/alt_cusp161_avalon_st_output" + queue size: 309 starting:alt_avalon_st_output "submodules/alt_cusp161_avalon_st_output" alt_vip_vfb_0" instantiated alt_avalon_st_output "dout"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> @@ -8646,9 +8828,9 @@ - queue size: 298 starting:alt_avalon_mm_bursting_master_fifo "submodules/alt_cusp161_avalon_mm_bursting_master_fifo" + queue size: 305 starting:alt_avalon_mm_bursting_master_fifo "submodules/alt_cusp161_avalon_mm_bursting_master_fifo" alt_vip_vfb_0" instantiated alt_avalon_mm_bursting_master_fifo "read_master"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> @@ -8675,9 +8857,9 @@ - queue size: 296 starting:alt_cusp_pulling_width_adapter "submodules/alt_cusp161_pulling_width_adapter" + queue size: 303 starting:alt_cusp_pulling_width_adapter "submodules/alt_cusp161_pulling_width_adapter" alt_vip_vfb_0" instantiated alt_cusp_pulling_width_adapter "read_master_pull"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> @@ -8704,9 +8886,9 @@ - queue size: 290 starting:alt_cusp_pushing_width_adapter "submodules/alt_cusp161_pushing_width_adapter" + queue size: 297 starting:alt_cusp_pushing_width_adapter "submodules/alt_cusp161_pushing_width_adapter" alt_vip_vfb_0" instantiated alt_cusp_pushing_width_adapter "write_master_push"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> @@ -8741,9 +8923,9 @@ - queue size: 256 starting:alt_pc "submodules/alt_cusp161_pc" + queue size: 263 starting:alt_pc "submodules/alt_cusp161_pc" alt_vip_vfb_0" instantiated alt_pc "pc0"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> @@ -8771,9 +8953,9 @@ instantiator="Qsys_alt_vip_vfb_0" as="fu_id_4494_line325_93,fu_id_4510_line325_52,fu_id_4526_line201_52,fu_id_4696_line202_58,fu_id_4890_line330_94,fu_id_4899_line331_96,fu_id_4982_line639_55,fu_id_5210_line696_38,fu_id_5669_line510_66,fu_id_5804_line563_105,fu_id_5987_line933_38,fu_id_6225_line1062_114,fu_id_6241_line1063_112,fu_id_6257_line1078_53,fu_id_6266_line1094_53,fu_id_6323_line1188_29,fu_id_6458_line1248_53,fu_id_6704_line1126_52" /> - queue size: 196 starting:alt_cmp "submodules/alt_cusp161_cmp" + queue size: 203 starting:alt_cmp "submodules/alt_cusp161_cmp" alt_vip_vfb_0" instantiated alt_cmp "fu_id_4494_line325_93"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> @@ -8796,14 +8978,14 @@ - queue size: 146 starting:alt_cusp_testbench_clock "submodules/alt_cusp161_clock_reset" + queue size: 153 starting:alt_cusp_testbench_clock "submodules/alt_cusp161_clock_reset" alt_vip_vfb_0" instantiated alt_cusp_testbench_clock "clocksource"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_cusp161_package.vhd]]> - + @@ -8868,7 +9050,7 @@ + value="<address-map><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' type='altera_avalon_onchip_memory2.s1' /><slave name='nios2_gen2.debug_mem_slave' start='0x40800' end='0x41000' type='altera_nios2_gen2.debug_mem_slave' /><slave name='timer.s1' start='0x41000' end='0x41020' type='altera_avalon_timer.s1' /><slave name='TERASIC_AUTO_FOCUS_0.mm_ctrl' start='0x41020' end='0x41040' type='TERASIC_AUTO_FOCUS.mm_ctrl' /><slave name='i2c_opencores_camera.avalon_slave_0' start='0x41040' end='0x41060' type='i2c_opencores.avalon_slave_0' /><slave name='i2c_opencores_mipi.avalon_slave_0' start='0x41060' end='0x41080' type='i2c_opencores.avalon_slave_0' /><slave name='mipi_pwdn_n.s1' start='0x41080' end='0x41090' type='altera_avalon_pio.s1' /><slave name='mipi_reset_n.s1' start='0x41090' end='0x410A0' type='altera_avalon_pio.s1' /><slave name='key.s1' start='0x410A0' end='0x410B0' type='altera_avalon_pio.s1' /><slave name='sw.s1' start='0x410B0' end='0x410C0' type='altera_avalon_pio.s1' /><slave name='led.s1' start='0x410C0' end='0x410D0' type='altera_avalon_pio.s1' /><slave name='altpll_0.pll_slave' start='0x410D0' end='0x410E0' type='altpll.pll_slave' /><slave name='sysid_qsys.control_slave' start='0x410E0' end='0x410E8' type='altera_avalon_sysid_qsys.control_slave' /><slave name='jtag_uart.avalon_jtag_slave' start='0x410E8' end='0x410F0' type='altera_avalon_jtag_uart.avalon_jtag_slave' /><slave name='EEE_IMGPROC_0.s1' start='0x42000' end='0x42020' type='EEE_IMGPROC.s1' /><slave name='uart_0.s1' start='0x42020' end='0x42040' type='altera_avalon_uart.s1' /></address-map>" /> @@ -8974,7 +9156,7 @@ + value="<address-map><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' type='altera_avalon_onchip_memory2.s1' /><slave name='nios2_gen2.debug_mem_slave' start='0x40800' end='0x41000' type='altera_nios2_gen2.debug_mem_slave' /></address-map>" /> @@ -8998,97 +9180,97 @@ + path="F:/intelfpga_lite/16.1/ip/altera/nios2_ip/altera_nios2_gen2/altera_nios2_unit_hw.tcl" /> - queue size: 144 starting:altera_nios2_gen2_unit "submodules/Qsys_nios2_gen2_cpu" + queue size: 151 starting:altera_nios2_gen2_unit "submodules/Qsys_nios2_gen2_cpu" Starting RTL generation for module 'Qsys_nios2_gen2_cpu' - Generation command is [exec C:/intelFPGA_lite/16.1/quartus/bin64//eperlcmd.exe -I C:/intelFPGA_lite/16.1/quartus/bin64//perl/lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I C:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I C:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/cpu_lib -I C:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/nios_lib -I C:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2 -I C:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2 -- C:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/generate_rtl.epl --name=Qsys_nios2_gen2_cpu --dir=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0022_cpu_gen/ --quartus_bindir=C:/intelFPGA_lite/16.1/quartus/bin64/ --verilog --config=C:/Users/ANISHG~1/AppData/Local/Temp/alt8774_3370923321813107178.dir/0022_cpu_gen//Qsys_nios2_gen2_cpu_processor_configuration.pl --do_build_sim=0 ] - # 2021.05.27 17:51:00 (*) Starting Nios II generation - # 2021.05.27 17:51:00 (*) Checking for plaintext license. - # 2021.05.27 17:51:01 (*) Couldn't query license setup in Quartus directory C:/intelFPGA_lite/16.1/quartus/bin64/ - # 2021.05.27 17:51:01 (*) Defaulting to contents of LM_LICENSE_FILE environment variable - # 2021.05.27 17:51:01 (*) LM_LICENSE_FILE environment variable is empty - # 2021.05.27 17:51:01 (*) Plaintext license not found. - # 2021.05.27 17:51:01 (*) Checking for encrypted license (non-evaluation). - # 2021.05.27 17:51:01 (*) Couldn't query license setup in Quartus directory C:/intelFPGA_lite/16.1/quartus/bin64/ - # 2021.05.27 17:51:01 (*) Defaulting to contents of LM_LICENSE_FILE environment variable - # 2021.05.27 17:51:01 (*) LM_LICENSE_FILE environment variable is empty - # 2021.05.27 17:51:01 (*) Encrypted license not found. Defaulting to OCP evaluation license (produces a time-limited SOF) - # 2021.05.27 17:51:01 (*) Elaborating CPU configuration settings - # 2021.05.27 17:51:01 (*) Creating all objects for CPU - # 2021.05.27 17:51:01 (*) Testbench - # 2021.05.27 17:51:02 (*) Instruction decoding - # 2021.05.27 17:51:02 (*) Instruction fields - # 2021.05.27 17:51:02 (*) Instruction decodes - # 2021.05.27 17:51:02 (*) Signals for RTL simulation waveforms - # 2021.05.27 17:51:02 (*) Instruction controls - # 2021.05.27 17:51:02 (*) Pipeline frontend - # 2021.05.27 17:51:02 (*) Pipeline backend - # 2021.05.27 17:51:05 (*) Generating RTL from CPU objects - # 2021.05.27 17:51:06 (*) Creating encrypted RTL - # 2021.05.27 17:51:07 (*) Done Nios II generation + Generation command is [exec F:/intelFPGA_lite/16.1/quartus/bin64//eperlcmd.exe -I F:/intelFPGA_lite/16.1/quartus/bin64//perl/lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/europa -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin/perl_lib -I F:/intelfpga_lite/16.1/quartus/sopc_builder/bin -I F:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/cpu_lib -I F:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/nios_lib -I F:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2 -I F:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2 -- F:/intelfpga_lite/16.1/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/generate_rtl.epl --name=Qsys_nios2_gen2_cpu --dir=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0075_cpu_gen/ --quartus_bindir=F:/intelFPGA_lite/16.1/quartus/bin64/ --verilog --config=C:/Users/Ed/AppData/Local/Temp/alt8781_5454540036417882954.dir/0075_cpu_gen//Qsys_nios2_gen2_cpu_processor_configuration.pl --do_build_sim=0 ] + # 2021.06.03 15:10:02 (*) Starting Nios II generation + # 2021.06.03 15:10:02 (*) Checking for plaintext license. + # 2021.06.03 15:10:03 (*) Couldn't query license setup in Quartus directory F:/intelFPGA_lite/16.1/quartus/bin64/ + # 2021.06.03 15:10:03 (*) Defaulting to contents of LM_LICENSE_FILE environment variable + # 2021.06.03 15:10:03 (*) LM_LICENSE_FILE environment variable is empty + # 2021.06.03 15:10:03 (*) Plaintext license not found. + # 2021.06.03 15:10:03 (*) Checking for encrypted license (non-evaluation). + # 2021.06.03 15:10:03 (*) Couldn't query license setup in Quartus directory F:/intelFPGA_lite/16.1/quartus/bin64/ + # 2021.06.03 15:10:03 (*) Defaulting to contents of LM_LICENSE_FILE environment variable + # 2021.06.03 15:10:03 (*) LM_LICENSE_FILE environment variable is empty + # 2021.06.03 15:10:03 (*) Encrypted license not found. Defaulting to OCP evaluation license (produces a time-limited SOF) + # 2021.06.03 15:10:03 (*) Elaborating CPU configuration settings + # 2021.06.03 15:10:03 (*) Creating all objects for CPU + # 2021.06.03 15:10:03 (*) Testbench + # 2021.06.03 15:10:03 (*) Instruction decoding + # 2021.06.03 15:10:03 (*) Instruction fields + # 2021.06.03 15:10:03 (*) Instruction decodes + # 2021.06.03 15:10:04 (*) Signals for RTL simulation waveforms + # 2021.06.03 15:10:04 (*) Instruction controls + # 2021.06.03 15:10:04 (*) Pipeline frontend + # 2021.06.03 15:10:04 (*) Pipeline backend + # 2021.06.03 15:10:06 (*) Generating RTL from CPU objects + # 2021.06.03 15:10:08 (*) Creating encrypted RTL + # 2021.06.03 15:10:08 (*) Done Nios II generation Done RTL generation for module 'Qsys_nios2_gen2_cpu' nios2_gen2" instantiated altera_nios2_gen2_unit "cpu"]]> @@ -9103,14 +9285,14 @@ + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_master_translator/altera_merlin_master_translator_hw.tcl" /> - queue size: 143 starting:altera_merlin_master_translator "submodules/altera_merlin_master_translator" + queue size: 150 starting:altera_merlin_master_translator "submodules/altera_merlin_master_translator" mm_interconnect_0" instantiated altera_merlin_master_translator "nios2_gen2_data_master_translator"]]> @@ -9133,22 +9315,22 @@ name="altera_merlin_slave_translator"> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_slave_translator/altera_merlin_slave_translator_hw.tcl" /> + as="jtag_uart_avalon_jtag_slave_translator,i2c_opencores_mipi_avalon_slave_0_translator,i2c_opencores_camera_avalon_slave_0_translator,sysid_qsys_control_slave_translator,nios2_gen2_debug_mem_slave_translator,TERASIC_AUTO_FOCUS_0_mm_ctrl_translator,altpll_0_pll_slave_translator,onchip_memory2_0_s1_translator,timer_s1_translator,led_s1_translator,sw_s1_translator,key_s1_translator,mipi_reset_n_s1_translator,mipi_pwdn_n_s1_translator,EEE_IMGPROC_0_s1_translator,uart_0_s1_translator" /> - queue size: 141 starting:altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" + queue size: 148 starting:altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" mm_interconnect_0" instantiated altera_merlin_slave_translator "jtag_uart_avalon_jtag_slave_translator"]]> @@ -9261,22 +9443,29 @@ end="0x00000000000042020" responds="1" user_default="0" /> + <slave + id="15" + name="uart_0_s1_translator.avalon_universal_slave_0" + start="0x0000000000042020" + end="0x00000000000042040" + responds="1" + user_default="0" /> </address_map> -,AV_BURSTBOUNDARIES=1,AV_BURSTCOUNT_W=3,AV_LINEWRAPBURSTS=0,BURSTWRAP_VALUE=7,CACHE_VALUE=0,ID=0,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_ADDR_SIDEBAND_H=72,PKT_ADDR_SIDEBAND_L=72,PKT_BEGIN_BURST=74,PKT_BURSTWRAP_H=66,PKT_BURSTWRAP_L=64,PKT_BURST_SIZE_H=69,PKT_BURST_SIZE_L=67,PKT_BURST_TYPE_H=71,PKT_BURST_TYPE_L=70,PKT_BYTEEN_H=35,PKT_BYTEEN_L=32,PKT_BYTE_CNT_H=63,PKT_BYTE_CNT_L=61,PKT_CACHE_H=91,PKT_CACHE_L=88,PKT_DATA_H=31,PKT_DATA_L=0,PKT_DATA_SIDEBAND_H=73,PKT_DATA_SIDEBAND_L=73,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_ORI_BURST_SIZE_H=96,PKT_ORI_BURST_SIZE_L=94,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_QOS_H=75,PKT_QOS_L=75,PKT_RESPONSE_STATUS_H=93,PKT_RESPONSE_STATUS_L=92,PKT_SRC_ID_H=79,PKT_SRC_ID_L=76,PKT_THREAD_ID_H=84,PKT_THREAD_ID_L=84,PKT_TRANS_COMPRESSED_READ=55,PKT_TRANS_EXCLUSIVE=60,PKT_TRANS_LOCK=59,PKT_TRANS_POSTED=56,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,SECURE_ACCESS_BIT=1,ST_CHANNEL_W=15,ST_DATA_W=97,SUPPRESS_0_BYTEEN_RSP=0,USE_READRESPONSE=0,USE_WRITERESPONSE=0" +,AV_BURSTBOUNDARIES=1,AV_BURSTCOUNT_W=3,AV_LINEWRAPBURSTS=0,BURSTWRAP_VALUE=7,CACHE_VALUE=0,ID=0,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_ADDR_SIDEBAND_H=72,PKT_ADDR_SIDEBAND_L=72,PKT_BEGIN_BURST=74,PKT_BURSTWRAP_H=66,PKT_BURSTWRAP_L=64,PKT_BURST_SIZE_H=69,PKT_BURST_SIZE_L=67,PKT_BURST_TYPE_H=71,PKT_BURST_TYPE_L=70,PKT_BYTEEN_H=35,PKT_BYTEEN_L=32,PKT_BYTE_CNT_H=63,PKT_BYTE_CNT_L=61,PKT_CACHE_H=91,PKT_CACHE_L=88,PKT_DATA_H=31,PKT_DATA_L=0,PKT_DATA_SIDEBAND_H=73,PKT_DATA_SIDEBAND_L=73,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_ORI_BURST_SIZE_H=96,PKT_ORI_BURST_SIZE_L=94,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_QOS_H=75,PKT_QOS_L=75,PKT_RESPONSE_STATUS_H=93,PKT_RESPONSE_STATUS_L=92,PKT_SRC_ID_H=79,PKT_SRC_ID_L=76,PKT_THREAD_ID_H=84,PKT_THREAD_ID_L=84,PKT_TRANS_COMPRESSED_READ=55,PKT_TRANS_EXCLUSIVE=60,PKT_TRANS_LOCK=59,PKT_TRANS_POSTED=56,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,SECURE_ACCESS_BIT=1,ST_CHANNEL_W=16,ST_DATA_W=97,SUPPRESS_0_BYTEEN_RSP=0,USE_READRESPONSE=0,USE_WRITERESPONSE=0" instancePathKey="Qsys:.:mm_interconnect_0:.:nios2_gen2_data_master_agent" kind="altera_merlin_master_agent" version="16.1" name="altera_merlin_master_agent"> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_master_agent/altera_merlin_master_agent_hw.tcl" /> - queue size: 126 starting:altera_merlin_master_agent "submodules/altera_merlin_master_agent" + queue size: 132 starting:altera_merlin_master_agent "submodules/altera_merlin_master_agent" mm_interconnect_0" instantiated altera_merlin_master_agent "nios2_gen2_data_master_agent"]]> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_slave_agent/altera_merlin_slave_agent_hw.tcl" /> + as="jtag_uart_avalon_jtag_slave_agent,i2c_opencores_mipi_avalon_slave_0_agent,i2c_opencores_camera_avalon_slave_0_agent,sysid_qsys_control_slave_agent,nios2_gen2_debug_mem_slave_agent,TERASIC_AUTO_FOCUS_0_mm_ctrl_agent,altpll_0_pll_slave_agent,onchip_memory2_0_s1_agent,timer_s1_agent,led_s1_agent,sw_s1_agent,key_s1_agent,mipi_reset_n_s1_agent,mipi_pwdn_n_s1_agent,EEE_IMGPROC_0_s1_agent,uart_0_s1_agent" /> - queue size: 124 starting:altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" + queue size: 130 starting:altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" mm_interconnect_0" instantiated altera_merlin_slave_agent "jtag_uart_avalon_jtag_slave_agent"]]> @@ -9333,47 +9522,47 @@ + path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo.v" /> + as="jtag_uart_avalon_jtag_slave_agent_rsp_fifo,i2c_opencores_mipi_avalon_slave_0_agent_rsp_fifo,i2c_opencores_camera_avalon_slave_0_agent_rsp_fifo,sysid_qsys_control_slave_agent_rsp_fifo,nios2_gen2_debug_mem_slave_agent_rsp_fifo,TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rsp_fifo,TERASIC_AUTO_FOCUS_0_mm_ctrl_agent_rdata_fifo,altpll_0_pll_slave_agent_rsp_fifo,onchip_memory2_0_s1_agent_rsp_fifo,timer_s1_agent_rsp_fifo,led_s1_agent_rsp_fifo,sw_s1_agent_rsp_fifo,key_s1_agent_rsp_fifo,mipi_reset_n_s1_agent_rsp_fifo,mipi_pwdn_n_s1_agent_rsp_fifo,EEE_IMGPROC_0_s1_agent_rsp_fifo,EEE_IMGPROC_0_s1_agent_rdata_fifo,uart_0_s1_agent_rsp_fifo" /> - queue size: 123 starting:altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" + queue size: 129 starting:altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" mm_interconnect_0" instantiated altera_avalon_sc_fifo "jtag_uart_avalon_jtag_slave_agent_rsp_fifo"]]> - + + value="0x20000,0x40800,0x41000,0x41020,0x41040,0x41060,0x41080,0x41090,0x410a0,0x410b0,0x410c0,0x410d0,0x410e0,0x410e8,0x42000,0x42020" /> + value="11:0000000010000000:0x20000:0x40000:both:1:0:0:1,10:0000000000010000:0x40800:0x41000:both:1:0:0:1,14:0000000100000000:0x41000:0x41020:both:1:0:0:1,1:0000000000100000:0x41020:0x41040:both:1:0:0:1,3:0000000000000100:0x41040:0x41060:both:1:0:0:1,4:0000000000000010:0x41060:0x41080:both:1:0:0:1,8:0010000000000000:0x41080:0x41090:both:1:0:0:1,9:0001000000000000:0x41090:0x410a0:both:1:0:0:1,6:0000100000000000:0x410a0:0x410b0:read:1:0:0:1,12:0000010000000000:0x410b0:0x410c0:read:1:0:0:1,7:0000001000000000:0x410c0:0x410d0:both:1:0:0:1,2:0000000001000000:0x410d0:0x410e0:both:1:0:0:1,13:0000000000001000:0x410e0:0x410e8:read:1:0:0:1,5:0000000000000001:0x410e8:0x410f0:both:1:0:0:1,0:0100000000000000:0x42000:0x42020:both:1:0:0:1,15:1000000000000000:0x42020:0x42040:both:1:0:0:1" /> @@ -9384,50 +9573,50 @@ value="ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0)" /> + value="0000000010000000,0000000000010000,0000000100000000,0000000000100000,0000000000000100,0000000000000010,0010000000000000,0001000000000000,0000100000000000,0000010000000000,0000001000000000,0000000001000000,0000000000001000,0000000000000001,0100000000000000,1000000000000000" /> - + value="both,both,both,both,both,both,both,both,read,read,both,both,read,both,both,both" /> + - + + value="0x40000,0x41000,0x41020,0x41040,0x41060,0x41080,0x41090,0x410a0,0x410b0,0x410c0,0x410d0,0x410e0,0x410e8,0x410f0,0x42020,0x42040" /> - - + + + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" /> - queue size: 92 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_0_router" + queue size: 96 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_0_router" mm_interconnect_0" instantiated altera_merlin_router "router"]]> - + @@ -9460,30 +9649,30 @@ + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" /> - queue size: 91 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_001" + queue size: 95 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_001" mm_interconnect_0" instantiated altera_merlin_router "router_001"]]> - + @@ -9514,32 +9703,32 @@ + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" /> + as="router_002,router_003,router_004,router_005,router_007,router_008,router_010,router_011,router_012,router_013,router_014,router_015,router_016,router_017" /> - queue size: 90 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_002" + queue size: 94 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_002" mm_interconnect_0" instantiated altera_merlin_router "router_002"]]> - + @@ -9572,65 +9761,65 @@ + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" /> - queue size: 86 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_006" + queue size: 90 starting:altera_merlin_router "submodules/Qsys_mm_interconnect_0_router_006" mm_interconnect_0" instantiated altera_merlin_router "router_006"]]> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_traffic_limiter/altera_merlin_traffic_limiter_hw.tcl" /> - queue size: 75 starting:altera_merlin_traffic_limiter "submodules/altera_merlin_traffic_limiter" + queue size: 78 starting:altera_merlin_traffic_limiter "submodules/altera_merlin_traffic_limiter" mm_interconnect_0" instantiated altera_merlin_traffic_limiter "nios2_gen2_data_master_limiter"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_sc_fifo.v]]> + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_sc_fifo.v]]> - + - + - + + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" /> - queue size: 73 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_cmd_demux" + queue size: 76 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_cmd_demux" mm_interconnect_0" instantiated altera_merlin_demultiplexer "cmd_demux"]]> - + - + + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" /> - queue size: 72 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_cmd_demux_001" + queue size: 75 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_cmd_demux_001" mm_interconnect_0" instantiated altera_merlin_demultiplexer "cmd_demux_001"]]> - + @@ -9716,31 +9905,31 @@ + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" /> + as="cmd_mux,cmd_mux_001,cmd_mux_002,cmd_mux_003,cmd_mux_005,cmd_mux_006,cmd_mux_008,cmd_mux_009,cmd_mux_010,cmd_mux_011,cmd_mux_012,cmd_mux_013,cmd_mux_014,cmd_mux_015" /> - queue size: 71 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_cmd_mux" + queue size: 74 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_cmd_mux" mm_interconnect_0" instantiated altera_merlin_multiplexer "cmd_mux"]]> - + @@ -9758,30 +9947,30 @@ + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" /> - queue size: 67 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_cmd_mux_004" + queue size: 70 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_cmd_mux_004" mm_interconnect_0" instantiated altera_merlin_multiplexer "cmd_mux_004"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv]]> + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv]]> - + @@ -9797,27 +9986,27 @@ + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" /> + as="rsp_demux,rsp_demux_001,rsp_demux_002,rsp_demux_003,rsp_demux_006,rsp_demux_008,rsp_demux_009,rsp_demux_010,rsp_demux_011,rsp_demux_012,rsp_demux_013,rsp_demux_015" /> - queue size: 56 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux" + queue size: 58 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux" mm_interconnect_0" instantiated altera_merlin_demultiplexer "rsp_demux"]]> - + @@ -9833,27 +10022,27 @@ + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" /> - queue size: 52 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux_004" + queue size: 54 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux_004" mm_interconnect_0" instantiated altera_merlin_demultiplexer "rsp_demux_004"]]> - + @@ -9869,27 +10058,27 @@ + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" /> - queue size: 51 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux_005" + queue size: 53 starting:altera_merlin_demultiplexer "submodules/Qsys_mm_interconnect_0_rsp_demux_005" mm_interconnect_0" instantiated altera_merlin_demultiplexer "rsp_demux_005"]]> - - - + + + @@ -9907,30 +10096,30 @@ + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" /> - queue size: 41 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_rsp_mux" + queue size: 42 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_rsp_mux" mm_interconnect_0" instantiated altera_merlin_multiplexer "rsp_mux"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv]]> + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv]]> - + @@ -9948,30 +10137,30 @@ + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" /> - queue size: 40 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_rsp_mux_001" + queue size: 41 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_0_rsp_mux_001" mm_interconnect_0" instantiated altera_merlin_multiplexer "rsp_mux_001"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv]]> + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv]]> - + + path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_handshake_clock_crosser/altera_avalon_st_handshake_clock_crosser_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_handshake_clock_crosser/altera_avalon_st_handshake_clock_crosser.v" /> - queue size: 39 starting:altera_avalon_st_handshake_clock_crosser "submodules/altera_avalon_st_handshake_clock_crosser" + queue size: 40 starting:altera_avalon_st_handshake_clock_crosser "submodules/altera_avalon_st_handshake_clock_crosser" mm_interconnect_0" instantiated altera_avalon_st_handshake_clock_crosser "crosser"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_pipeline_base.v]]> + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_pipeline_base.v]]> + path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_adapter/altera_avalon_st_adapter_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_error_adapter/avalon-st_error_adapter_hw.tcl" /> + as="avalon_st_adapter,avalon_st_adapter_001,avalon_st_adapter_002,avalon_st_adapter_003,avalon_st_adapter_004,avalon_st_adapter_005,avalon_st_adapter_006,avalon_st_adapter_007,avalon_st_adapter_008,avalon_st_adapter_009,avalon_st_adapter_010,avalon_st_adapter_011,avalon_st_adapter_012,avalon_st_adapter_013,avalon_st_adapter_014,avalon_st_adapter_015" /> - queue size: 35 starting:altera_avalon_st_adapter "submodules/Qsys_mm_interconnect_0_avalon_st_adapter" + queue size: 36 starting:altera_avalon_st_adapter "submodules/Qsys_mm_interconnect_0_avalon_st_adapter" @@ -10136,14 +10325,14 @@ + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" /> @@ -10192,14 +10381,14 @@ + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" /> @@ -10221,57 +10410,57 @@ + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_burst_adapter/altera_merlin_burst_adapter_hw.tcl" /> queue size: 10 starting:altera_merlin_burst_adapter "submodules/altera_merlin_burst_adapter" mm_interconnect_1" instantiated altera_merlin_burst_adapter "sdram_s1_burst_adapter"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_pipeline_base.v]]> + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_avalon_st_pipeline_base.v]]> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" /> @@ -10328,25 +10517,25 @@ + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" /> queue size: 7 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_1_cmd_mux" mm_interconnect_1" instantiated altera_merlin_multiplexer "cmd_mux"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv]]> + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv]]> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" /> @@ -10403,25 +10592,25 @@ + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" /> queue size: 5 starting:altera_merlin_multiplexer "submodules/Qsys_mm_interconnect_1_rsp_mux" mm_interconnect_1" instantiated altera_merlin_multiplexer "rsp_mux"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv]]> + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_arbitrator.sv]]> + path="F:/intelfpga_lite/16.1/ip/altera/merlin/altera_merlin_width_adapter/altera_merlin_width_adapter_hw.tcl" /> queue size: 3 starting:altera_merlin_width_adapter "submodules/altera_merlin_width_adapter" mm_interconnect_1" instantiated altera_merlin_width_adapter "sdram_s1_rsp_width_adapter"]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_address_alignment.sv]]> - C:/Users/Anish Ghanekar/OneDrive - Imperial College London/GitHub/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_burst_uncompressor.sv]]> + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_address_alignment.sv]]> + F:/Ed/Stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/altera_merlin_burst_uncompressor.sv]]> + path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_adapter/altera_avalon_st_adapter_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_error_adapter/avalon-st_error_adapter_hw.tcl" /> @@ -10565,14 +10754,14 @@ + path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_error_adapter/avalon-st_error_adapter_hw.tcl" /> + path="F:/intelfpga_lite/16.1/ip/altera/avalon_st/altera_avalon_st_error_adapter/avalon-st_error_adapter_hw.tcl" /> ), // terasic_camera_0_conduit_end.D .terasic_camera_0_conduit_end_FVAL (), // .FVAL .terasic_camera_0_conduit_end_LVAL (), // .LVAL - .terasic_camera_0_conduit_end_PIXCLK () // .PIXCLK + .terasic_camera_0_conduit_end_PIXCLK (), // .PIXCLK + .uart_0_rx_tx_rxd (), // uart_0_rx_tx.rxd + .uart_0_rx_tx_txd () // .txd ); diff --git a/Vision/DE10_LITE_D8M_VIP_16/Qsys/Qsys_inst.vhd b/Vision/DE10_LITE_D8M_VIP_16/Qsys/Qsys_inst.vhd index 9a4f759..4e31e75 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/Qsys/Qsys_inst.vhd +++ b/Vision/DE10_LITE_D8M_VIP_16/Qsys/Qsys_inst.vhd @@ -41,7 +41,9 @@ terasic_camera_0_conduit_end_D : in std_logic_vector(11 downto 0) := (others => 'X'); -- D terasic_camera_0_conduit_end_FVAL : in std_logic := 'X'; -- FVAL terasic_camera_0_conduit_end_LVAL : in std_logic := 'X'; -- LVAL - terasic_camera_0_conduit_end_PIXCLK : in std_logic := 'X' -- PIXCLK + terasic_camera_0_conduit_end_PIXCLK : in std_logic := 'X'; -- PIXCLK + uart_0_rx_tx_rxd : in std_logic := 'X'; -- rxd + uart_0_rx_tx_txd : out std_logic -- txd ); end component Qsys; @@ -88,6 +90,8 @@ terasic_camera_0_conduit_end_D => CONNECTED_TO_terasic_camera_0_conduit_end_D, -- terasic_camera_0_conduit_end.D terasic_camera_0_conduit_end_FVAL => CONNECTED_TO_terasic_camera_0_conduit_end_FVAL, -- .FVAL terasic_camera_0_conduit_end_LVAL => CONNECTED_TO_terasic_camera_0_conduit_end_LVAL, -- .LVAL - terasic_camera_0_conduit_end_PIXCLK => CONNECTED_TO_terasic_camera_0_conduit_end_PIXCLK -- .PIXCLK + terasic_camera_0_conduit_end_PIXCLK => CONNECTED_TO_terasic_camera_0_conduit_end_PIXCLK, -- .PIXCLK + uart_0_rx_tx_rxd => CONNECTED_TO_uart_0_rx_tx_rxd, -- uart_0_rx_tx.rxd + uart_0_rx_tx_txd => CONNECTED_TO_uart_0_rx_tx_txd -- .txd ); diff --git a/Vision/DE10_LITE_D8M_VIP_16/RemoteSystemsTempFiles/.project b/Vision/DE10_LITE_D8M_VIP_16/RemoteSystemsTempFiles/.project deleted file mode 100644 index 5447a64..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/RemoteSystemsTempFiles/.project +++ /dev/null @@ -1,12 +0,0 @@ - - - RemoteSystemsTempFiles - - - - - - - org.eclipse.rse.ui.remoteSystemsTempNature - - diff --git a/Vision/DE10_LITE_D8M_VIP_16/ip/EEE_IMGPROC/EEE_IMGPROC.v b/Vision/DE10_LITE_D8M_VIP_16/ip/EEE_IMGPROC/EEE_IMGPROC.v index 13f2d0f..5d55bda 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/ip/EEE_IMGPROC/EEE_IMGPROC.v +++ b/Vision/DE10_LITE_D8M_VIP_16/ip/EEE_IMGPROC/EEE_IMGPROC.v @@ -72,25 +72,13 @@ parameter BB_COL_DEFAULT = 24'h00ff00; wire [7:0] red, green, blue, grey; wire [7:0] red_out, green_out, blue_out; -wire [8:0] hue; -wire [7:0] saturation, value; wire sop, eop, in_valid, out_ready; //////////////////////////////////////////////////////////////////////// -// RGB --> HSV Conversion -wire [7:0] min, max, delta; -assign min = (red < green) ? ((red < blue) ? red : blue) : ((green < blue) ? green : blue); -assign max = (red > green) ? ((red > blue) ? red : blue) : ((green > blue) ? green : blue); -assign delta = max - min; -assign hue = (red == max) ? (green - blue)/delta : ((green == max) ? 8'h55+((blue - red)/delta) : 8'haa+((red - green)/delta)); -assign saturation = (max == 8'h00) ? 8'h00 : delta / max; -assign value = max; - // Detect red areas wire red_detect; -//assign red_detect = red[7] & ~green[7] & ~blue[7]; -assign red_detect = blue[7]; +assign red_detect = red[7] & ~green[7] & ~blue[7]; // Find boundary of cursor box diff --git a/Vision/DE10_LITE_D8M_VIP_16/ip/de10lite-hdl/uart.v b/Vision/DE10_LITE_D8M_VIP_16/ip/de10lite-hdl/uart.v deleted file mode 100644 index df3820e..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/ip/de10lite-hdl/uart.v +++ /dev/null @@ -1,273 +0,0 @@ -/* -Source: https://github.com/hildebrandmw/de10lite-hdl/blob/master/components/uart/hdl/uart.v -Description: Very simple UART tx/rx module. Requires a streaming interface, -provides no buffering for input or output data. -*/ - -module uart -#( parameter CLK_FREQ = 50_000_000, - parameter BAUD = 115_200 -) -( input clk, - input reset, - - // Receiving - input rx, // Received serial stream - output reg [7:0] rx_data, // Deserialized byte. - output rx_valid, // Asserted when rx_data is valid - - // Transmitting - output reg tx, // Transmitted serial stream - input [7:0] tx_data, // Deserialized byte to transmit. - input tx_transmit, // Start Signal. No effect if tx_ready = 0 - output reg tx_ready // Asserted when ready to accept data - ); - - /////////////////////////////// - // Functionality Description // - /////////////////////////////// - - /* - RECEIVING: Module receives a serial stream through the port rx. - When a byte has been successfully received, the received data will be - available on the output port rx_data and the output port rx_valid will be - asserted for 1 clock cycle. - - Validity of output data is not guaranteed if rx_valid is not 1. If this - is important for you, you may modify this design to register the output. - - TRANSMITTING: When input port tx_transmit is 1 (asserted), module will - store the data on the input port tx_data and serialize through the output - port tx. - - Module will only save and transmit the data at tx_data if the signal - tx_ready is asserted when tx_transmit is asserted. This module will not - buffer input data. While transmitting, tx_ready is deasserted and the - input port tx_transmit will have no effect. - - Once tx_ready is deasserted, data at port tx_data is not used and need - not be stable. - */ - - ///////////////////////// - // Signal Declarations // - ///////////////////////// - - // ---------------------- // - // -- Local Parameters -- // - // ---------------------- // - - // Number of synchronization stages to avoid metastability - localparam SYNC_STAGES = 2; - - // Over Sampling Factor - localparam OSF = 16; - - // Compute count to generate local clock enable - localparam CLK_DIV_COUNT = CLK_FREQ / (OSF * BAUD); - - // ---------------------------- // - // -- Clock Dividing Counter -- // - // ---------------------------- // - - reg [15:0] count; - reg enable; // Local Clock Enable - - // -- RX Synchronizer -- - reg [SYNC_STAGES-1:0] rx_sync; - reg rx_internal; - - // ---------------- // - // -- RX Signals -- // - // ---------------- // - - // State Machine Assignments - localparam RX_WAIT = 0; - localparam RX_CHECK_START = 1; - localparam RX_RECEIVING = 2; - localparam RX_WAIT_FOR_STOP = 3; - - localparam RX_INITIAL_STATE = RX_WAIT; - reg [1:0] rx_state = RX_INITIAL_STATE; - - reg [4:0] rx_count; // Counts Over-sampling clock enables - reg [2:0] rx_sampleCount; // Counts number of bits received - - // These last two signals are used to make sure the "rx_valid" signal - // is only asserted for one clock cycle. - - reg rx_validInternal, rx_validLast; - - // -----------------// - // -- TX Signals -- // - // -----------------// - - // State Machine Assignments - localparam TX_WAIT = 0; - localparam TX_TRANSMITTING = 1; - - localparam TX_INITIAL_STATE = TX_WAIT; - reg tx_state = TX_INITIAL_STATE; - - reg [9:0] tx_dataBuffer; // Capture Register for transmitted data - reg [4:0] tx_count; // Counts over-sampling clock - reg [3:0] tx_sampleCount; // Number of Bits Sent - - ///////////////////// - // Implementations // - ///////////////////// - - // ---------------------------- // - // -- Misc Synchronous Logic -- // - // ---------------------------- // - - always @(posedge clk) begin - - // Clock Divider - if (reset) begin - count <= 0; - enable <= 0; - end else if (count == CLK_DIV_COUNT - 1) begin - count <= 0; - enable <= 1; - end else begin - count <= count + 1; - enable <= 0; - end - - // RX Synchronizer - if (enable) begin - {rx_sync,rx_internal} <= {rx, rx_sync}; - end - - // Pulse Shortener for rx_valid signal - rx_validLast <= rx_validInternal; - end - - // Pulse Shortner for rx_valid signal - assign rx_valid = rx_validInternal & ~rx_validLast; - - - // ---------------------- // - // -- RX State Machine -- // - // ---------------------- // - - always @(posedge clk) begin - if (reset) begin - rx_state <= RX_INITIAL_STATE; - rx_validInternal <= 0; - end else if (enable) begin - case (rx_state) - - // Wait for the start bit. (RX = 0) - - RX_WAIT: begin - rx_validInternal <= 0; - if (rx_internal == 0) begin - rx_state <= RX_CHECK_START; - rx_count <= 1; - end - end - - // Aligh with center of transmitted bit - - RX_CHECK_START: begin - - // Check if RX is still 0 - if (rx_count == (OSF >> 1) - 1 && rx_internal == 0) begin - rx_state <= RX_RECEIVING; - rx_count <= 0; - rx_sampleCount <= 0; - - // Faulty Start Bit - end else if (rx_count == (OSF >> 1) - 1 && rx_internal == 1) begin - rx_state <= RX_WAIT; - - // Default Option: Count local clocks - end else begin - rx_count <= rx_count + 1; - end - end - - // Sample in middle of received bit. Shift data into rx_data - RX_RECEIVING: begin - if (rx_count == OSF - 1) begin - rx_count <= 0; - rx_data <= {rx_internal, rx_data[7:1]}; - rx_sampleCount <= rx_sampleCount + 1; - - // Check if this is the last bit of data - if (rx_sampleCount == 7) begin - rx_state <= RX_WAIT_FOR_STOP; - end - end else begin - rx_count <= rx_count + 1; - end - end - - // Wait until stop bit is received - // Not the best logic in the world, but it works. - RX_WAIT_FOR_STOP: begin - if (rx_internal == 1'b1) begin - rx_state <= RX_WAIT; - rx_validInternal <= 1; - end - end - - // In case something goes horribly wrong. - default: begin - rx_state <= RX_INITIAL_STATE; - end - endcase - end - end - - // ---------------------- // - // -- TX State Machine -- // - // ---------------------- // - - always @(posedge clk) begin - if (reset) begin - tx_state <= TX_INITIAL_STATE; - tx <= 1; - end else begin - case (tx_state) - // Wait for start signal. - // Register transmitted data and deassert ready. - TX_WAIT: begin - tx <= 1; - if (tx_transmit) begin - tx_dataBuffer <= {1'b1, tx_data, 1'b0}; - tx_count <= 0; - tx_sampleCount <= 0; - tx_ready <= 0; - tx_state <= TX_TRANSMITTING; - end else begin - tx_ready <= 1; - end - end - - // Shift Out Data - TX_TRANSMITTING: begin - if (enable) begin - if (tx_count == OSF - 1) begin - tx_count <= 0; - tx_sampleCount <= tx_sampleCount + 1; - tx <= tx_dataBuffer[0]; - tx_dataBuffer <= {1'b1, tx_dataBuffer[9:1]}; - if (tx_sampleCount == 9) begin - tx_state <= TX_WAIT; - end - end else begin - tx_count <= tx_count + 1; - end - end - end - - default: begin - tx_state <= TX_WAIT; - end - endcase - end - end -endmodule \ No newline at end of file diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.lock b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.lock deleted file mode 100644 index e69de29..0000000 diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.log b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.log deleted file mode 100644 index 201f5be..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.log +++ /dev/null @@ -1,480 +0,0 @@ -!SESSION 2021-06-01 14:03:06.351 ----------------------------------------------- -eclipse.buildId=4.3.2.M20140221-1700 -java.version=1.8.0_05 -java.vendor=Oracle Corporation -BootLoader constants: OS=linux, ARCH=x86_64, WS=gtk, NL=en_US -Framework arguments: -product org.eclipse.epp.package.cpp.product -pluginCustomization /usr/local/altera/16.0/nios2eds/bin/eclipse_nios2/plugin_customization.ini -Command-line arguments: -os linux -ws gtk -arch x86_64 -product org.eclipse.epp.package.cpp.product -pluginCustomization /usr/local/altera/16.0/nios2eds/bin/eclipse_nios2/plugin_customization.ini - -!ENTRY org.eclipse.ui 2 0 2021-06-01 14:04:23.380 -!MESSAGE Warnings while parsing the commands from the 'org.eclipse.ui.commands' and 'org.eclipse.ui.actionDefinitions' extension points. -!SUBENTRY 1 org.eclipse.ui 2 0 2021-06-01 14:04:23.380 -!MESSAGE Commands should really have a category: plug-in='org.eclipse.linuxtools.systemtap.ui.graphing', id='org.eclipse.linuxtools.systemtap.ui.graphing.commands.SaveGraphImage', categoryId='org.eclipse.linuxtools.systemtap.ui.graphing.category.file' - -!ENTRY org.eclipse.ui 2 0 2021-06-01 14:04:24.498 -!MESSAGE Warnings while parsing the commands from the 'org.eclipse.ui.commands' and 'org.eclipse.ui.actionDefinitions' extension points. -!SUBENTRY 1 org.eclipse.ui 2 0 2021-06-01 14:04:24.498 -!MESSAGE Commands should really have a category: plug-in='org.eclipse.linuxtools.systemtap.ui.graphing', id='org.eclipse.linuxtools.systemtap.ui.graphing.commands.SaveGraphImage', categoryId='org.eclipse.linuxtools.systemtap.ui.graphing.category.file' - -!ENTRY org.eclipse.cdt.core 1 0 2021-06-01 14:06:17.329 -!MESSAGE Indexed 'D8M_Camera_Test' (6 sources, 6 headers) in 0.60 sec: 306 declarations; 1,011 references; 24 unresolved inclusions; 0 syntax errors; 201 unresolved names (13.24%) - -!ENTRY org.eclipse.cdt.core 1 0 2021-06-01 14:07:50.514 -!MESSAGE Indexed 'D8M_Camera_Test_bsp' (83 sources, 154 headers) in 1.78 sec: 5,266 declarations; 8,569 references; 16 unresolved inclusions; 2 syntax errors; 51 unresolved names (0.37%) - -!ENTRY org.eclipse.jface 2 0 2021-06-01 14:09:49.546 -!MESSAGE Keybinding conflicts occurred. They may interfere with normal accelerator operation. -!SUBENTRY 1 org.eclipse.jface 2 0 2021-06-01 14:09:49.546 -!MESSAGE A conflict occurred for ALT+CTRL+I: -Binding(ALT+CTRL+I, - ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.open.include.browser,Open Include Browser, - Open an include browser on the selected element, - Category(org.eclipse.ui.category.navigate,Navigate,null,true), - org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@24090832, - ,,true),null), - org.eclipse.ui.defaultAcceleratorConfiguration, - org.eclipse.cdt.ui.cEditorScope,,,system) -Binding(ALT+CTRL+I, - ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.open.include.browser,Open Include Browser, - Open an include browser on the selected element, - Category(org.eclipse.ui.category.navigate,Navigate,null,true), - org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@24090832, - ,,true),null), - org.eclipse.ui.defaultAcceleratorConfiguration, - org.eclipse.cdt.ui.cViewScope,,,system) -!SUBENTRY 1 org.eclipse.jface 2 0 2021-06-01 14:09:49.546 -!MESSAGE A conflict occurred for CTRL+SHIFT+T: -Binding(CTRL+SHIFT+T, - ParameterizedCommand(Command(org.eclipse.cdt.ui.navigate.opentype,Open Element, - Open an element in an Editor, - Category(org.eclipse.cdt.ui.category.source,Source,Source commands,true), - org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@7e38d2a2, - ,,true),null), - org.eclipse.ui.defaultAcceleratorConfiguration, - org.eclipse.cdt.ui.cEditorScope,,,system) -Binding(CTRL+SHIFT+T, - ParameterizedCommand(Command(org.eclipse.cdt.ui.navigate.opentype,Open Element, - Open an element in an Editor, - Category(org.eclipse.cdt.ui.category.source,Source,Source commands,true), - org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@7e38d2a2, - ,,true),null), - org.eclipse.ui.defaultAcceleratorConfiguration, - org.eclipse.cdt.ui.cViewScope,,,system) -!SUBENTRY 1 org.eclipse.jface 2 0 2021-06-01 14:09:49.546 -!MESSAGE A conflict occurred for F4: -Binding(F4, - ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.open.type.hierarchy,Open Type Hierarchy, - Open a type hierarchy on the selected element, - Category(org.eclipse.ui.category.navigate,Navigate,null,true), - org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@79408109, - ,,true),null), - org.eclipse.ui.defaultAcceleratorConfiguration, - org.eclipse.cdt.ui.cEditorScope,,,system) -Binding(F4, - ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.open.type.hierarchy,Open Type Hierarchy, - Open a type hierarchy on the selected element, - Category(org.eclipse.ui.category.navigate,Navigate,null,true), - org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@79408109, - ,,true),null), - org.eclipse.ui.defaultAcceleratorConfiguration, - org.eclipse.cdt.ui.cViewScope,,,system) -!SUBENTRY 1 org.eclipse.jface 2 0 2021-06-01 14:09:49.546 -!MESSAGE A conflict occurred for ALT+SHIFT+R: -Binding(ALT+SHIFT+R, - ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.text.rename.element,Rename - Refactoring , - Rename the selected element, - Category(org.eclipse.cdt.ui.category.refactoring,Refactor - C++,C/C++ Refactorings,true), - org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@33671907, - ,,true),null), - org.eclipse.ui.defaultAcceleratorConfiguration, - org.eclipse.cdt.ui.cEditorScope,,,system) -Binding(ALT+SHIFT+R, - ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.text.rename.element,Rename - Refactoring , - Rename the selected element, - Category(org.eclipse.cdt.ui.category.refactoring,Refactor - C++,C/C++ Refactorings,true), - org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@33671907, - ,,true),null), - org.eclipse.ui.defaultAcceleratorConfiguration, - org.eclipse.cdt.ui.cViewScope,,,system) -!SUBENTRY 1 org.eclipse.jface 2 0 2021-06-01 14:09:49.546 -!MESSAGE A conflict occurred for F3: -Binding(F3, - ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.opendecl,Open Declaration, - Open an editor on the selected element's declaration(s), - Category(org.eclipse.cdt.ui.category.source,Source,Source commands,true), - org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@5fc3dfc1, - ,,true),null), - org.eclipse.ui.defaultAcceleratorConfiguration, - org.eclipse.cdt.ui.cEditorScope,,,system) -Binding(F3, - ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.opendecl,Open Declaration, - Open an editor on the selected element's declaration(s), - Category(org.eclipse.cdt.ui.category.source,Source,Source commands,true), - org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@5fc3dfc1, - ,,true),null), - org.eclipse.ui.defaultAcceleratorConfiguration, - org.eclipse.cdt.ui.cViewScope,,,system) -!SUBENTRY 1 org.eclipse.jface 2 0 2021-06-01 14:09:49.546 -!MESSAGE A conflict occurred for CTRL+SHIFT+G: -Binding(CTRL+SHIFT+G, - ParameterizedCommand(Command(org.eclipse.cdt.ui.search.findrefs,References, - Search for references to the selected element in the workspace, - Category(org.eclipse.cdt.ui.category.source,Source,Source commands,true), - org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@67d6bb59, - ,,true),null), - org.eclipse.ui.defaultAcceleratorConfiguration, - org.eclipse.cdt.ui.cEditorScope,,,system) -Binding(CTRL+SHIFT+G, - ParameterizedCommand(Command(org.eclipse.cdt.ui.search.findrefs,References, - Search for references to the selected element in the workspace, - Category(org.eclipse.cdt.ui.category.source,Source,Source commands,true), - org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@67d6bb59, - ,,true),null), - org.eclipse.ui.defaultAcceleratorConfiguration, - org.eclipse.cdt.ui.cViewScope,,,system) -!SUBENTRY 1 org.eclipse.jface 2 0 2021-06-01 14:09:49.546 -!MESSAGE A conflict occurred for CTRL+G: -Binding(CTRL+G, - ParameterizedCommand(Command(org.eclipse.cdt.ui.search.finddecl,Declaration, - Search for declarations of the selected element in the workspace, - Category(org.eclipse.cdt.ui.category.source,Source,Source commands,true), - org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@1a632663, - ,,true),null), - org.eclipse.ui.defaultAcceleratorConfiguration, - org.eclipse.cdt.ui.cEditorScope,,,system) -Binding(CTRL+G, - ParameterizedCommand(Command(org.eclipse.cdt.ui.search.finddecl,Declaration, - Search for declarations of the selected element in the workspace, - Category(org.eclipse.cdt.ui.category.source,Source,Source commands,true), - org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@1a632663, - ,,true),null), - org.eclipse.ui.defaultAcceleratorConfiguration, - org.eclipse.cdt.ui.cViewScope,,,system) -!SUBENTRY 1 org.eclipse.jface 2 0 2021-06-01 14:09:49.546 -!MESSAGE A conflict occurred for ALT+CTRL+H: -Binding(ALT+CTRL+H, - ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.open.call.hierarchy,Open Call Hierarchy, - Open the call hierarchy for the selected element, - Category(org.eclipse.ui.category.navigate,Navigate,null,true), - org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@1147ab09, - ,,true),null), - org.eclipse.ui.defaultAcceleratorConfiguration, - org.eclipse.cdt.ui.cEditorScope,,,system) -Binding(ALT+CTRL+H, - ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.open.call.hierarchy,Open Call Hierarchy, - Open the call hierarchy for the selected element, - Category(org.eclipse.ui.category.navigate,Navigate,null,true), - org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@1147ab09, - ,,true),null), - org.eclipse.ui.defaultAcceleratorConfiguration, - org.eclipse.cdt.ui.cViewScope,,,system) -!SUBENTRY 1 org.eclipse.jface 2 0 2021-06-01 14:09:49.546 -!MESSAGE A conflict occurred for CTRL+SHIFT+H: -Binding(CTRL+SHIFT+H, - ParameterizedCommand(Command(org.eclipse.cdt.ui.navigate.open.type.in.hierarchy,Open Type in Hierarchy, - Open a type in the type hierarchy view, - Category(org.eclipse.ui.category.navigate,Navigate,null,true), - org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@503b5337, - ,,true),null), - org.eclipse.ui.defaultAcceleratorConfiguration, - org.eclipse.cdt.ui.cEditorScope,,,system) -Binding(CTRL+SHIFT+H, - ParameterizedCommand(Command(org.eclipse.cdt.ui.navigate.open.type.in.hierarchy,Open Type in Hierarchy, - Open a type in the type hierarchy view, - Category(org.eclipse.ui.category.navigate,Navigate,null,true), - org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@503b5337, - ,,true),null), - org.eclipse.ui.defaultAcceleratorConfiguration, - org.eclipse.cdt.ui.cViewScope,,,system) - -!ENTRY com.altera.sbtgui.launch 1 0 2021-06-01 14:11:37.605 -!MESSAGE Executing: [/bin/bash, -c, nios2-download '--cable=USB-Blaster on 129.31.224.137 [USB-0]' --device=1 --instance=0 --stop --sidp=0x410e0 --id=0x0] - -!ENTRY com.altera.sbtgui.launch 1 0 2021-06-01 14:11:39.859 -!MESSAGE Executing: [/bin/bash, -c, nios2-download '--cable=USB-Blaster on 129.31.224.137 [USB-0]' --device=1 --instance=0 --go --sidp=0x410e0 --id=0x0 /home/ad3919/nfshome/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/D8M_Camera_Test.elf] - -!ENTRY com.altera.sbtgui.launch 1 0 2021-06-01 14:35:55.217 -!MESSAGE Executing: [/bin/bash, -c, nios2-download '--cable=USB-Blaster on 129.31.224.137 [USB-0]' --device=1 --instance=0 --stop --sidp=0x410e0 --id=0x0] - -!ENTRY com.altera.sbtgui.launch 1 0 2021-06-01 14:35:58.889 -!MESSAGE Executing: [/bin/bash, -c, nios2-download '--cable=USB-Blaster on 129.31.224.137 [USB-0]' --device=1 --instance=0 --go --sidp=0x410e0 --id=0x0 /home/ad3919/nfshome/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/D8M_Camera_Test.elf] -!SESSION 2021-06-01 15:25:18.150 ----------------------------------------------- -eclipse.buildId=4.3.2.M20140221-1700 -java.version=1.8.0_05 -java.vendor=Oracle Corporation -BootLoader constants: OS=linux, ARCH=x86_64, WS=gtk, NL=en_US -Framework arguments: -product org.eclipse.epp.package.cpp.product -pluginCustomization /usr/local/altera/16.0/nios2eds/bin/eclipse_nios2/plugin_customization.ini -Command-line arguments: -os linux -ws gtk -arch x86_64 -product org.eclipse.epp.package.cpp.product -pluginCustomization /usr/local/altera/16.0/nios2eds/bin/eclipse_nios2/plugin_customization.ini - -!ENTRY org.eclipse.core.resources 2 10035 2021-06-01 15:25:34.463 -!MESSAGE The workspace exited with unsaved changes in the previous session; refreshing workspace to recover changes. - -!ENTRY org.eclipse.ui 2 0 2021-06-01 15:25:35.756 -!MESSAGE Warnings while parsing the commands from the 'org.eclipse.ui.commands' and 'org.eclipse.ui.actionDefinitions' extension points. -!SUBENTRY 1 org.eclipse.ui 2 0 2021-06-01 15:25:35.756 -!MESSAGE Commands should really have a category: plug-in='org.eclipse.linuxtools.systemtap.ui.graphing', id='org.eclipse.linuxtools.systemtap.ui.graphing.commands.SaveGraphImage', categoryId='org.eclipse.linuxtools.systemtap.ui.graphing.category.file' - -!ENTRY org.eclipse.ui 2 0 2021-06-01 15:25:36.679 -!MESSAGE Warnings while parsing the commands from the 'org.eclipse.ui.commands' and 'org.eclipse.ui.actionDefinitions' extension points. -!SUBENTRY 1 org.eclipse.ui 2 0 2021-06-01 15:25:36.679 -!MESSAGE Commands should really have a category: plug-in='org.eclipse.linuxtools.systemtap.ui.graphing', id='org.eclipse.linuxtools.systemtap.ui.graphing.commands.SaveGraphImage', categoryId='org.eclipse.linuxtools.systemtap.ui.graphing.category.file' - -!ENTRY com.altera.sbtgui.launch 1 0 2021-06-01 15:30:01.828 -!MESSAGE Executing: [/bin/bash, -c, nios2-download '--cable=USB-Blaster on 129.31.224.137 [USB-0]' --device=1 --instance=0 --stop --sidp=0x410e0 --id=0x0] - -!ENTRY com.altera.sbtgui.launch 4 0 2021-06-01 15:30:03.222 -!MESSAGE Failed Executing: [nios2-download, '--cable=USB-Blaster on 129.31.224.137 [USB-0]', --device=1, --instance=0, --stop, --sidp=0x410e0, --id=0x0] return code: 8 - -!ENTRY com.altera.sbtgui.launch 1 0 2021-06-01 15:30:04.718 -!MESSAGE Executing: [/bin/bash, -c, nios2-download '--cable=USB-Blaster on 129.31.224.137 [USB-0]' --device=1 --instance=0 --go --sidp=0x410e0 --id=0x0 /home/ad3919/nfshome/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/D8M_Camera_Test.elf] - -!ENTRY com.altera.sbtgui.launch 4 0 2021-06-01 15:30:06.290 -!MESSAGE Failed Executing: [nios2-download, '--cable=USB-Blaster on 129.31.224.137 [USB-0]', --device=1, --instance=0, --go, --sidp=0x410e0, --id=0x0, /home/ad3919/nfshome/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/D8M_Camera_Test.elf] return code: 8 - -!ENTRY com.altera.sbtgui.launch 4 0 2021-06-01 15:30:06.295 -!MESSAGE Downloading ELF Process failed - -!ENTRY com.altera.sbtgui.launch 1 0 2021-06-01 15:30:48.922 -!MESSAGE Executing: [/bin/bash, -c, nios2-download '--cable=USB-Blaster on 129.31.224.137 [USB-0]' --device=1 --instance=0 --stop --sidp=0x410e0 --id=0x0] - -!ENTRY com.altera.sbtgui.launch 4 0 2021-06-01 15:30:50.294 -!MESSAGE Failed Executing: [nios2-download, '--cable=USB-Blaster on 129.31.224.137 [USB-0]', --device=1, --instance=0, --stop, --sidp=0x410e0, --id=0x0] return code: 8 - -!ENTRY com.altera.sbtgui.launch 1 0 2021-06-01 15:30:51.067 -!MESSAGE Executing: [/bin/bash, -c, nios2-download '--cable=USB-Blaster on 129.31.224.137 [USB-0]' --device=1 --instance=0 --go --sidp=0x410e0 --id=0x0 /home/ad3919/nfshome/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/D8M_Camera_Test.elf] - -!ENTRY com.altera.sbtgui.launch 4 0 2021-06-01 15:30:52.474 -!MESSAGE Failed Executing: [nios2-download, '--cable=USB-Blaster on 129.31.224.137 [USB-0]', --device=1, --instance=0, --go, --sidp=0x410e0, --id=0x0, /home/ad3919/nfshome/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/D8M_Camera_Test.elf] return code: 8 - -!ENTRY com.altera.sbtgui.launch 4 0 2021-06-01 15:30:52.478 -!MESSAGE Downloading ELF Process failed - -!ENTRY com.altera.sbtgui.launch 1 0 2021-06-01 15:31:19.409 -!MESSAGE Executing: [/bin/bash, -c, nios2-download '--cable=USB-Blaster on 129.31.224.137 [USB-0]' --device=1 --instance=0 --stop --sidp=0x410e0 --id=0x0] - -!ENTRY com.altera.sbtgui.launch 4 0 2021-06-01 15:31:20.799 -!MESSAGE Failed Executing: [nios2-download, '--cable=USB-Blaster on 129.31.224.137 [USB-0]', --device=1, --instance=0, --stop, --sidp=0x410e0, --id=0x0] return code: 8 - -!ENTRY com.altera.sbtgui.launch 1 0 2021-06-01 15:31:21.477 -!MESSAGE Executing: [/bin/bash, -c, nios2-download '--cable=USB-Blaster on 129.31.224.137 [USB-0]' --device=1 --instance=0 --go --sidp=0x410e0 --id=0x0 /home/ad3919/nfshome/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/D8M_Camera_Test.elf] - -!ENTRY com.altera.sbtgui.launch 4 0 2021-06-01 15:31:22.936 -!MESSAGE Failed Executing: [nios2-download, '--cable=USB-Blaster on 129.31.224.137 [USB-0]', --device=1, --instance=0, --go, --sidp=0x410e0, --id=0x0, /home/ad3919/nfshome/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/D8M_Camera_Test.elf] return code: 8 - -!ENTRY com.altera.sbtgui.launch 4 0 2021-06-01 15:31:22.940 -!MESSAGE Downloading ELF Process failed - -!ENTRY org.eclipse.cdt.core 1 0 2021-06-01 15:39:40.412 -!MESSAGE Indexed 'D8M_Camera_Test' (6 sources, 68 headers) in 0.40 sec: 2,546 declarations; 4,517 references; 0 unresolved inclusions; 0 syntax errors; 0 unresolved names (0.00%) - -!ENTRY com.altera.sbtgui.launch 1 0 2021-06-01 15:41:17.879 -!MESSAGE Executing: [/bin/bash, -c, nios2-download '--cable=USB-Blaster on 129.31.224.137 [USB-0]' --device=1 --instance=0 --stop --sidp=0x410e0 --id=0x0] - -!ENTRY com.altera.sbtgui.launch 4 0 2021-06-01 15:41:19.297 -!MESSAGE Failed Executing: [nios2-download, '--cable=USB-Blaster on 129.31.224.137 [USB-0]', --device=1, --instance=0, --stop, --sidp=0x410e0, --id=0x0] return code: 8 - -!ENTRY com.altera.sbtgui.launch 1 0 2021-06-01 15:41:19.587 -!MESSAGE Executing: [/bin/bash, -c, nios2-download '--cable=USB-Blaster on 129.31.224.137 [USB-0]' --device=1 --instance=0 --go --sidp=0x410e0 --id=0x0 /home/ad3919/nfshome/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/D8M_Camera_Test.elf] - -!ENTRY com.altera.sbtgui.launch 4 0 2021-06-01 15:41:21.001 -!MESSAGE Failed Executing: [nios2-download, '--cable=USB-Blaster on 129.31.224.137 [USB-0]', --device=1, --instance=0, --go, --sidp=0x410e0, --id=0x0, /home/ad3919/nfshome/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/D8M_Camera_Test.elf] return code: 8 - -!ENTRY com.altera.sbtgui.launch 4 0 2021-06-01 15:41:21.005 -!MESSAGE Downloading ELF Process failed -!SESSION 2021-06-01 15:51:10.061 ----------------------------------------------- -eclipse.buildId=4.3.2.M20140221-1700 -java.version=1.8.0_05 -java.vendor=Oracle Corporation -BootLoader constants: OS=linux, ARCH=x86_64, WS=gtk, NL=en_US -Framework arguments: -product org.eclipse.epp.package.cpp.product -pluginCustomization /usr/local/altera/16.0/nios2eds/bin/eclipse_nios2/plugin_customization.ini -Command-line arguments: -os linux -ws gtk -arch x86_64 -product org.eclipse.epp.package.cpp.product -pluginCustomization /usr/local/altera/16.0/nios2eds/bin/eclipse_nios2/plugin_customization.ini - -!ENTRY org.eclipse.ui 2 0 2021-06-01 15:51:21.549 -!MESSAGE Warnings while parsing the commands from the 'org.eclipse.ui.commands' and 'org.eclipse.ui.actionDefinitions' extension points. -!SUBENTRY 1 org.eclipse.ui 2 0 2021-06-01 15:51:21.549 -!MESSAGE Commands should really have a category: plug-in='org.eclipse.linuxtools.systemtap.ui.graphing', id='org.eclipse.linuxtools.systemtap.ui.graphing.commands.SaveGraphImage', categoryId='org.eclipse.linuxtools.systemtap.ui.graphing.category.file' - -!ENTRY org.eclipse.ui 2 0 2021-06-01 15:51:22.916 -!MESSAGE Warnings while parsing the commands from the 'org.eclipse.ui.commands' and 'org.eclipse.ui.actionDefinitions' extension points. -!SUBENTRY 1 org.eclipse.ui 2 0 2021-06-01 15:51:22.916 -!MESSAGE Commands should really have a category: plug-in='org.eclipse.linuxtools.systemtap.ui.graphing', id='org.eclipse.linuxtools.systemtap.ui.graphing.commands.SaveGraphImage', categoryId='org.eclipse.linuxtools.systemtap.ui.graphing.category.file' - -!ENTRY org.eclipse.jface 2 0 2021-06-01 15:51:50.182 -!MESSAGE Keybinding conflicts occurred. They may interfere with normal accelerator operation. -!SUBENTRY 1 org.eclipse.jface 2 0 2021-06-01 15:51:50.182 -!MESSAGE A conflict occurred for F3: -Binding(F3, - ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.opendecl,Open Declaration, - Open an editor on the selected element's declaration(s), - Category(org.eclipse.cdt.ui.category.source,Source,Source commands,true), - org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@612bb755, - ,,true),null), - org.eclipse.ui.defaultAcceleratorConfiguration, - org.eclipse.cdt.ui.cEditorScope,,,system) -Binding(F3, - ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.opendecl,Open Declaration, - Open an editor on the selected element's declaration(s), - Category(org.eclipse.cdt.ui.category.source,Source,Source commands,true), - org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@612bb755, - ,,true),null), - org.eclipse.ui.defaultAcceleratorConfiguration, - org.eclipse.cdt.ui.cViewScope,,,system) -!SUBENTRY 1 org.eclipse.jface 2 0 2021-06-01 15:51:50.182 -!MESSAGE A conflict occurred for ALT+CTRL+I: -Binding(ALT+CTRL+I, - ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.open.include.browser,Open Include Browser, - Open an include browser on the selected element, - Category(org.eclipse.ui.category.navigate,Navigate,null,true), - org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@6ba226cd, - ,,true),null), - org.eclipse.ui.defaultAcceleratorConfiguration, - org.eclipse.cdt.ui.cEditorScope,,,system) -Binding(ALT+CTRL+I, - ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.open.include.browser,Open Include Browser, - Open an include browser on the selected element, - Category(org.eclipse.ui.category.navigate,Navigate,null,true), - org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@6ba226cd, - ,,true),null), - org.eclipse.ui.defaultAcceleratorConfiguration, - org.eclipse.cdt.ui.cViewScope,,,system) -!SUBENTRY 1 org.eclipse.jface 2 0 2021-06-01 15:51:50.182 -!MESSAGE A conflict occurred for F4: -Binding(F4, - ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.open.type.hierarchy,Open Type Hierarchy, - Open a type hierarchy on the selected element, - Category(org.eclipse.ui.category.navigate,Navigate,null,true), - org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@62e99458, - ,,true),null), - org.eclipse.ui.defaultAcceleratorConfiguration, - org.eclipse.cdt.ui.cEditorScope,,,system) -Binding(F4, - ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.open.type.hierarchy,Open Type Hierarchy, - Open a type hierarchy on the selected element, - Category(org.eclipse.ui.category.navigate,Navigate,null,true), - org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@62e99458, - ,,true),null), - org.eclipse.ui.defaultAcceleratorConfiguration, - org.eclipse.cdt.ui.cViewScope,,,system) -!SUBENTRY 1 org.eclipse.jface 2 0 2021-06-01 15:51:50.182 -!MESSAGE A conflict occurred for ALT+SHIFT+R: -Binding(ALT+SHIFT+R, - ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.text.rename.element,Rename - Refactoring , - Rename the selected element, - Category(org.eclipse.cdt.ui.category.refactoring,Refactor - C++,C/C++ Refactorings,true), - org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@1eddca25, - ,,true),null), - org.eclipse.ui.defaultAcceleratorConfiguration, - org.eclipse.cdt.ui.cEditorScope,,,system) -Binding(ALT+SHIFT+R, - ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.text.rename.element,Rename - Refactoring , - Rename the selected element, - Category(org.eclipse.cdt.ui.category.refactoring,Refactor - C++,C/C++ Refactorings,true), - org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@1eddca25, - ,,true),null), - org.eclipse.ui.defaultAcceleratorConfiguration, - org.eclipse.cdt.ui.cViewScope,,,system) -!SUBENTRY 1 org.eclipse.jface 2 0 2021-06-01 15:51:50.182 -!MESSAGE A conflict occurred for CTRL+SHIFT+G: -Binding(CTRL+SHIFT+G, - ParameterizedCommand(Command(org.eclipse.cdt.ui.search.findrefs,References, - Search for references to the selected element in the workspace, - Category(org.eclipse.cdt.ui.category.source,Source,Source commands,true), - org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@22f057b4, - ,,true),null), - org.eclipse.ui.defaultAcceleratorConfiguration, - org.eclipse.cdt.ui.cEditorScope,,,system) -Binding(CTRL+SHIFT+G, - ParameterizedCommand(Command(org.eclipse.cdt.ui.search.findrefs,References, - Search for references to the selected element in the workspace, - Category(org.eclipse.cdt.ui.category.source,Source,Source commands,true), - org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@22f057b4, - ,,true),null), - org.eclipse.ui.defaultAcceleratorConfiguration, - org.eclipse.cdt.ui.cViewScope,,,system) -!SUBENTRY 1 org.eclipse.jface 2 0 2021-06-01 15:51:50.182 -!MESSAGE A conflict occurred for CTRL+G: -Binding(CTRL+G, - ParameterizedCommand(Command(org.eclipse.cdt.ui.search.finddecl,Declaration, - Search for declarations of the selected element in the workspace, - Category(org.eclipse.cdt.ui.category.source,Source,Source commands,true), - org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@581e8969, - ,,true),null), - org.eclipse.ui.defaultAcceleratorConfiguration, - org.eclipse.cdt.ui.cEditorScope,,,system) -Binding(CTRL+G, - ParameterizedCommand(Command(org.eclipse.cdt.ui.search.finddecl,Declaration, - Search for declarations of the selected element in the workspace, - Category(org.eclipse.cdt.ui.category.source,Source,Source commands,true), - org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@581e8969, - ,,true),null), - org.eclipse.ui.defaultAcceleratorConfiguration, - org.eclipse.cdt.ui.cViewScope,,,system) -!SUBENTRY 1 org.eclipse.jface 2 0 2021-06-01 15:51:50.182 -!MESSAGE A conflict occurred for ALT+CTRL+H: -Binding(ALT+CTRL+H, - ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.open.call.hierarchy,Open Call Hierarchy, - Open the call hierarchy for the selected element, - Category(org.eclipse.ui.category.navigate,Navigate,null,true), - org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@767b9d66, - ,,true),null), - org.eclipse.ui.defaultAcceleratorConfiguration, - org.eclipse.cdt.ui.cEditorScope,,,system) -Binding(ALT+CTRL+H, - ParameterizedCommand(Command(org.eclipse.cdt.ui.edit.open.call.hierarchy,Open Call Hierarchy, - Open the call hierarchy for the selected element, - Category(org.eclipse.ui.category.navigate,Navigate,null,true), - org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@767b9d66, - ,,true),null), - org.eclipse.ui.defaultAcceleratorConfiguration, - org.eclipse.cdt.ui.cViewScope,,,system) -!SUBENTRY 1 org.eclipse.jface 2 0 2021-06-01 15:51:50.182 -!MESSAGE A conflict occurred for CTRL+SHIFT+H: -Binding(CTRL+SHIFT+H, - ParameterizedCommand(Command(org.eclipse.cdt.ui.navigate.open.type.in.hierarchy,Open Type in Hierarchy, - Open a type in the type hierarchy view, - Category(org.eclipse.ui.category.navigate,Navigate,null,true), - org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@687fd6e, - ,,true),null), - org.eclipse.ui.defaultAcceleratorConfiguration, - org.eclipse.cdt.ui.cEditorScope,,,system) -Binding(CTRL+SHIFT+H, - ParameterizedCommand(Command(org.eclipse.cdt.ui.navigate.open.type.in.hierarchy,Open Type in Hierarchy, - Open a type in the type hierarchy view, - Category(org.eclipse.ui.category.navigate,Navigate,null,true), - org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@687fd6e, - ,,true),null), - org.eclipse.ui.defaultAcceleratorConfiguration, - org.eclipse.cdt.ui.cViewScope,,,system) -!SUBENTRY 1 org.eclipse.jface 2 0 2021-06-01 15:51:50.182 -!MESSAGE A conflict occurred for CTRL+SHIFT+T: -Binding(CTRL+SHIFT+T, - ParameterizedCommand(Command(org.eclipse.cdt.ui.navigate.opentype,Open Element, - Open an element in an Editor, - Category(org.eclipse.cdt.ui.category.source,Source,Source commands,true), - org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@266a47fd, - ,,true),null), - org.eclipse.ui.defaultAcceleratorConfiguration, - org.eclipse.cdt.ui.cEditorScope,,,system) -Binding(CTRL+SHIFT+T, - ParameterizedCommand(Command(org.eclipse.cdt.ui.navigate.opentype,Open Element, - Open an element in an Editor, - Category(org.eclipse.cdt.ui.category.source,Source,Source commands,true), - org.eclipse.ui.internal.WorkbenchHandlerServiceHandler@266a47fd, - ,,true),null), - org.eclipse.ui.defaultAcceleratorConfiguration, - org.eclipse.cdt.ui.cViewScope,,,system) - -!ENTRY com.altera.sbtgui.launch 1 0 2021-06-01 15:53:32.747 -!MESSAGE Executing: [/bin/bash, -c, nios2-download '--cable=USB-Blaster on 129.31.224.137 [USB-0]' --device=1 --instance=0 --stop --sidp=0x410e0 --id=0x0] - -!ENTRY com.altera.sbtgui.launch 4 0 2021-06-01 15:53:34.132 -!MESSAGE Failed Executing: [nios2-download, '--cable=USB-Blaster on 129.31.224.137 [USB-0]', --device=1, --instance=0, --stop, --sidp=0x410e0, --id=0x0] return code: 8 - -!ENTRY com.altera.sbtgui.launch 1 0 2021-06-01 15:53:34.450 -!MESSAGE Executing: [/bin/bash, -c, nios2-download '--cable=USB-Blaster on 129.31.224.137 [USB-0]' --device=1 --instance=0 --go --sidp=0x410e0 --id=0x0 /home/ad3919/nfshome/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/D8M_Camera_Test.elf] - -!ENTRY com.altera.sbtgui.launch 4 0 2021-06-01 15:53:36.047 -!MESSAGE Failed Executing: [nios2-download, '--cable=USB-Blaster on 129.31.224.137 [USB-0]', --device=1, --instance=0, --go, --sidp=0x410e0, --id=0x0, /home/ad3919/nfshome/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/D8M_Camera_Test.elf] return code: 8 - -!ENTRY com.altera.sbtgui.launch 4 0 2021-06-01 15:53:36.052 -!MESSAGE Downloading ELF Process failed diff --git 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- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.make.core/specs.c b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.make.core/specs.c deleted file mode 100644 index 8b13789..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.make.core/specs.c +++ /dev/null @@ -1 +0,0 @@ - diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.make.core/specs.cpp b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.make.core/specs.cpp deleted file mode 100644 index 8b13789..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.make.core/specs.cpp +++ /dev/null @@ -1 +0,0 @@ - diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.managedbuilder.core/spec.C b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.managedbuilder.core/spec.C deleted file mode 100644 index e69de29..0000000 diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.managedbuilder.core/spec.c b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.managedbuilder.core/spec.c deleted file mode 100644 index e69de29..0000000 diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.ui/D8M_Camera_Test.build.log b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.ui/D8M_Camera_Test.build.log deleted file mode 100644 index 2f46da9..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.ui/D8M_Camera_Test.build.log +++ /dev/null @@ -1,9 +0,0 @@ -15:53:28 **** Incremental Build of configuration Nios II for project D8M_Camera_Test **** -make all -Info: Building ../D8M_Camera_Test_bsp/ -make --no-print-directory -C ../D8M_Camera_Test_bsp/ -[BSP build complete] -[D8M_Camera_Test build complete] - -15:53:28 Build Finished (took 237ms) - diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.ui/D8M_Camera_Test_bsp.build.log b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.ui/D8M_Camera_Test_bsp.build.log deleted file mode 100644 index 1f0e53a..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.ui/D8M_Camera_Test_bsp.build.log +++ /dev/null @@ -1,129 +0,0 @@ -15:52:33 **** Build of configuration Nios II for project D8M_Camera_Test_bsp **** -make all -Compiling alt_alarm_start.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_alarm_start.o HAL/src/alt_alarm_start.c -Compiling alt_busy_sleep.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_busy_sleep.o HAL/src/alt_busy_sleep.c -Compiling alt_close.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_close.o HAL/src/alt_close.c -Compiling alt_dcache_flush.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_dcache_flush.o HAL/src/alt_dcache_flush.c -Compiling alt_dcache_flush_all.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_dcache_flush_all.o HAL/src/alt_dcache_flush_all.c -Compiling alt_dcache_flush_no_writeback.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_dcache_flush_no_writeback.o HAL/src/alt_dcache_flush_no_writeback.c -Compiling alt_dev.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_dev.o HAL/src/alt_dev.c -Compiling alt_dma_rxchan_open.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_dma_rxchan_open.o HAL/src/alt_dma_rxchan_open.c -Compiling alt_dma_txchan_open.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_dma_txchan_open.o HAL/src/alt_dma_txchan_open.c -Compiling alt_ecc_fatal_exception.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_ecc_fatal_exception.o HAL/src/alt_ecc_fatal_exception.c -Compiling alt_exception_entry.S... -nios2-elf-gcc -MP -MMD -c -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -Wa,-gdwarf2 -o obj/HAL/src/alt_exception_entry.o HAL/src/alt_exception_entry.S -Compiling alt_exit.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_exit.o HAL/src/alt_exit.c -Compiling alt_fcntl.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_fcntl.o HAL/src/alt_fcntl.c -Compiling alt_fd_lock.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_fd_lock.o HAL/src/alt_fd_lock.c -Compiling alt_fd_unlock.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_fd_unlock.o HAL/src/alt_fd_unlock.c -Compiling alt_find_dev.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_find_dev.o HAL/src/alt_find_dev.c -Compiling alt_find_file.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_find_file.o HAL/src/alt_find_file.c -Compiling alt_flash_dev.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_flash_dev.o HAL/src/alt_flash_dev.c -Compiling alt_fs_reg.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_fs_reg.o HAL/src/alt_fs_reg.c -Compiling alt_fstat.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_fstat.o HAL/src/alt_fstat.c -Compiling alt_get_fd.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_get_fd.o HAL/src/alt_get_fd.c -Compiling alt_gmon.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_gmon.o HAL/src/alt_gmon.c -Compiling alt_icache_flush.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_icache_flush.o HAL/src/alt_icache_flush.c -Compiling alt_icache_flush_all.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_icache_flush_all.o HAL/src/alt_icache_flush_all.c -Compiling alt_iic.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_iic.o HAL/src/alt_iic.c -Compiling alt_iic_isr_register.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_iic_isr_register.o HAL/src/alt_iic_isr_register.c -Compiling alt_instruction_exception_entry.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_instruction_exception_entry.o HAL/src/alt_instruction_exception_entry.c -Compiling alt_instruction_exception_register.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_instruction_exception_register.o HAL/src/alt_instruction_exception_register.c -Compiling alt_io_redirect.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_io_redirect.o HAL/src/alt_io_redirect.c -Compiling alt_ioctl.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_ioctl.o HAL/src/alt_ioctl.c -Compiling alt_irq_entry.S... -nios2-elf-gcc -MP -MMD -c -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -Wa,-gdwarf2 -o obj/HAL/src/alt_irq_entry.o HAL/src/alt_irq_entry.S -Compiling alt_irq_handler.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_irq_handler.o HAL/src/alt_irq_handler.c -Compiling alt_irq_register.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_irq_register.o HAL/src/alt_irq_register.c -Compiling alt_irq_vars.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_irq_vars.o HAL/src/alt_irq_vars.c -Compiling alt_isatty.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_isatty.o HAL/src/alt_isatty.c -Compiling alt_lseek.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_lseek.o HAL/src/alt_lseek.c -Compiling alt_main.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_main.o HAL/src/alt_main.c -Compiling alt_open.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_open.o HAL/src/alt_open.c -Compiling alt_read.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_read.o HAL/src/alt_read.c -Compiling alt_release_fd.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_release_fd.o HAL/src/alt_release_fd.c -Compiling alt_remap_cached.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_remap_cached.o HAL/src/alt_remap_cached.c -Compiling alt_remap_uncached.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_remap_uncached.o HAL/src/alt_remap_uncached.c -Compiling alt_sbrk.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_sbrk.o HAL/src/alt_sbrk.c -Compiling alt_software_exception.S... -nios2-elf-gcc -MP -MMD -c -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -Wa,-gdwarf2 -o obj/HAL/src/alt_software_exception.o HAL/src/alt_software_exception.S -Compiling alt_tick.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_tick.o HAL/src/alt_tick.c -Compiling alt_uncached_free.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_uncached_free.o HAL/src/alt_uncached_free.c -Compiling alt_uncached_malloc.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_uncached_malloc.o HAL/src/alt_uncached_malloc.c -Compiling alt_write.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/alt_write.o HAL/src/alt_write.c -Compiling altera_nios2_gen2_irq.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/HAL/src/altera_nios2_gen2_irq.o HAL/src/altera_nios2_gen2_irq.c -Compiling crt0.S... -nios2-elf-gcc -MP -MMD -c -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -Wa,-gdwarf2 -o obj/HAL/src/crt0.o HAL/src/crt0.S -Compiling alt_sys_init.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/alt_sys_init.o alt_sys_init.c -Compiling altera_avalon_jtag_uart_fd.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/drivers/src/altera_avalon_jtag_uart_fd.o drivers/src/altera_avalon_jtag_uart_fd.c -Compiling altera_avalon_jtag_uart_init.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/drivers/src/altera_avalon_jtag_uart_init.o drivers/src/altera_avalon_jtag_uart_init.c -Compiling altera_avalon_jtag_uart_ioctl.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/drivers/src/altera_avalon_jtag_uart_ioctl.o drivers/src/altera_avalon_jtag_uart_ioctl.c -Compiling altera_avalon_jtag_uart_read.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/drivers/src/altera_avalon_jtag_uart_read.o drivers/src/altera_avalon_jtag_uart_read.c -Compiling altera_avalon_jtag_uart_write.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/drivers/src/altera_avalon_jtag_uart_write.o drivers/src/altera_avalon_jtag_uart_write.c -Compiling altera_avalon_sysid_qsys.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/drivers/src/altera_avalon_sysid_qsys.o drivers/src/altera_avalon_sysid_qsys.c -Compiling altera_avalon_timer_sc.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/drivers/src/altera_avalon_timer_sc.o drivers/src/altera_avalon_timer_sc.c -Compiling altera_avalon_timer_ts.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/drivers/src/altera_avalon_timer_ts.o drivers/src/altera_avalon_timer_ts.c -Compiling altera_avalon_timer_vars.c... -nios2-elf-gcc -xc -MP -MMD -c -I./HAL/inc -I. -I./drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mgpopt=local -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/drivers/src/altera_avalon_timer_vars.o drivers/src/altera_avalon_timer_vars.c -Creating libhal_bsp.a... -rm -f -f libhal_bsp.a -nios2-elf-ar -src libhal_bsp.a obj/HAL/src/alt_alarm_start.o obj/HAL/src/alt_busy_sleep.o obj/HAL/src/alt_close.o obj/HAL/src/alt_dcache_flush.o obj/HAL/src/alt_dcache_flush_all.o obj/HAL/src/alt_dcache_flush_no_writeback.o obj/HAL/src/alt_dev.o obj/HAL/src/alt_dev_llist_insert.o obj/HAL/src/alt_dma_rxchan_open.o obj/HAL/src/alt_dma_txchan_open.o obj/HAL/src/alt_do_ctors.o obj/HAL/src/alt_do_dtors.o obj/HAL/src/alt_ecc_fatal_entry.o obj/HAL/src/alt_ecc_fatal_exception.o obj/HAL/src/alt_env_lock.o obj/HAL/src/alt_environ.o obj/HAL/src/alt_errno.o obj/HAL/src/alt_exception_entry.o obj/HAL/src/alt_exception_muldiv.o obj/HAL/src/alt_exception_trap.o obj/HAL/src/alt_execve.o obj/HAL/src/alt_exit.o obj/HAL/src/alt_fcntl.o obj/HAL/src/alt_fd_lock.o obj/HAL/src/alt_fd_unlock.o obj/HAL/src/alt_find_dev.o obj/HAL/src/alt_find_file.o obj/HAL/src/alt_flash_dev.o obj/HAL/src/alt_fork.o obj/HAL/src/alt_fs_reg.o obj/HAL/src/alt_fstat.o obj/HAL/src/alt_get_fd.o obj/HAL/src/alt_getchar.o obj/HAL/src/alt_getpid.o obj/HAL/src/alt_gettod.o obj/HAL/src/alt_gmon.o obj/HAL/src/alt_icache_flush.o obj/HAL/src/alt_icache_flush_all.o obj/HAL/src/alt_iic.o obj/HAL/src/alt_iic_isr_register.o obj/HAL/src/alt_instruction_exception_entry.o obj/HAL/src/alt_instruction_exception_register.o obj/HAL/src/alt_io_redirect.o obj/HAL/src/alt_ioctl.o obj/HAL/src/alt_irq_entry.o obj/HAL/src/alt_irq_handler.o obj/HAL/src/alt_irq_register.o obj/HAL/src/alt_irq_vars.o obj/HAL/src/alt_isatty.o obj/HAL/src/alt_kill.o obj/HAL/src/alt_link.o obj/HAL/src/alt_load.o obj/HAL/src/alt_log_macro.o obj/HAL/src/alt_log_printf.o obj/HAL/src/alt_lseek.o obj/HAL/src/alt_main.o obj/HAL/src/alt_malloc_lock.o obj/HAL/src/alt_mcount.o obj/HAL/src/alt_open.o obj/HAL/src/alt_printf.o obj/HAL/src/alt_putchar.o obj/HAL/src/alt_putcharbuf.o obj/HAL/src/alt_putstr.o obj/HAL/src/alt_read.o obj/HAL/src/alt_release_fd.o obj/HAL/src/alt_remap_cached.o obj/HAL/src/alt_remap_uncached.o obj/HAL/src/alt_rename.o obj/HAL/src/alt_sbrk.o obj/HAL/src/alt_settod.o obj/HAL/src/alt_software_exception.o obj/HAL/src/alt_stat.o obj/HAL/src/alt_tick.o obj/HAL/src/alt_times.o obj/HAL/src/alt_uncached_free.o obj/HAL/src/alt_uncached_malloc.o obj/HAL/src/alt_unlink.o obj/HAL/src/alt_usleep.o obj/HAL/src/alt_wait.o obj/HAL/src/alt_write.o obj/HAL/src/altera_nios2_gen2_irq.o obj/HAL/src/crt0.o obj/alt_sys_init.o obj/drivers/src/altera_avalon_jtag_uart_fd.o obj/drivers/src/altera_avalon_jtag_uart_init.o obj/drivers/src/altera_avalon_jtag_uart_ioctl.o obj/drivers/src/altera_avalon_jtag_uart_read.o obj/drivers/src/altera_avalon_jtag_uart_write.o obj/drivers/src/altera_avalon_sysid_qsys.o obj/drivers/src/altera_avalon_timer_sc.o obj/drivers/src/altera_avalon_timer_ts.o obj/drivers/src/altera_avalon_timer_vars.o -[BSP build complete] - -15:52:36 Build Finished (took 2s.792ms) - diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.ui/dialog_settings.xml b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.ui/dialog_settings.xml deleted file mode 100644 index c552249..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.ui/dialog_settings.xml +++ /dev/null @@ -1,7 +0,0 @@ - -
    -
    -
    -
    -
    -
    diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.ui/global-build.log b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.ui/global-build.log deleted file mode 100644 index e446209..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.cdt.ui/global-build.log +++ /dev/null @@ -1,61 +0,0 @@ -15:53:05 **** Build of configuration Nios II for project D8M_Camera_Test **** -make all -Info: Building ../D8M_Camera_Test_bsp/ -make --no-print-directory -C ../D8M_Camera_Test_bsp/ -[BSP build complete] -Info: Compiling I2C_core.c to obj/default/I2C_core.o -nios2-elf-gcc -xc -MP -MMD -c -I../D8M_Camera_Test_bsp//HAL/inc -I../D8M_Camera_Test_bsp/ -I../D8M_Camera_Test_bsp//drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/default/I2C_core.o I2C_core.c -I2C_core.c: In function 'oc_i2c_uninit': -I2C_core.c:146:15: warning: unknown escape sequence: '\I' - printf("\I2C core is failed to disable! \r\n"); - ^ -I2C_core.c: In function 'OC_I2CL_Read': -I2C_core.c:612:22: warning: unused variable 'DataLow' [-Wunused-variable] - alt_u8 DataHigh, DataLow; - ^ -I2C_core.c:612:12: warning: unused variable 'DataHigh' [-Wunused-variable] - alt_u8 DataHigh, DataLow; - ^ -Info: Compiling auto_focus.c to obj/default/auto_focus.o -nios2-elf-gcc -xc -MP -MMD -c -I../D8M_Camera_Test_bsp//HAL/inc -I../D8M_Camera_Test_bsp/ -I../D8M_Camera_Test_bsp//drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/default/auto_focus.o auto_focus.c -auto_focus.c: In function 'Focus_Window': -auto_focus.c:80:11: warning: 'end_focus' may be used uninitialized in this function [-Wmaybe-uninitialized] - return end_focus; - ^ -Info: Compiling main.c to obj/default/main.o -nios2-elf-gcc -xc -MP -MMD -c -I../D8M_Camera_Test_bsp//HAL/inc -I../D8M_Camera_Test_bsp/ -I../D8M_Camera_Test_bsp//drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/default/main.o main.c -main.c: In function 'main': -main.c:233:20: warning: format '%x' expects argument of type 'unsigned int', but argument 2 has type 'alt_u32 {aka long unsigned int}' [-Wformat=] - printf("\nExposure = %x ", exposureTime); - ^ -main.c:233:20: warning: format '%x' expects argument of type 'unsigned int', but argument 2 has type 'alt_u32 {aka long unsigned int}' [-Wformat=] -main.c:238:20: warning: format '%x' expects argument of type 'unsigned int', but argument 2 has type 'alt_u32 {aka long unsigned int}' [-Wformat=] - printf("\nExposure = %x ", exposureTime); - ^ -main.c:238:20: warning: format '%x' expects argument of type 'unsigned int', but argument 2 has type 'alt_u32 {aka long unsigned int}' [-Wformat=] -Info: Compiling mipi_bridge_config.c to obj/default/mipi_bridge_config.o -nios2-elf-gcc -xc -MP -MMD -c -I../D8M_Camera_Test_bsp//HAL/inc -I../D8M_Camera_Test_bsp/ -I../D8M_Camera_Test_bsp//drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/default/mipi_bridge_config.o mipi_bridge_config.c -Info: Compiling mipi_camera_config.c to obj/default/mipi_camera_config.o -nios2-elf-gcc -xc -MP -MMD -c -I../D8M_Camera_Test_bsp//HAL/inc -I../D8M_Camera_Test_bsp/ -I../D8M_Camera_Test_bsp//drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/default/mipi_camera_config.o mipi_camera_config.c -Info: Compiling queue.c to obj/default/queue.o -nios2-elf-gcc -xc -MP -MMD -c -I../D8M_Camera_Test_bsp//HAL/inc -I../D8M_Camera_Test_bsp/ -I../D8M_Camera_Test_bsp//drivers/inc -pipe -D__hal__ -DALT_NO_INSTRUCTION_EMULATION -DALT_SINGLE_THREADED -O0 -g -Wall -mno-hw-div -mhw-mul -mno-hw-mulx -o obj/default/queue.o queue.c -Info: Linking D8M_Camera_Test.elf -nios2-elf-g++ -T'../D8M_Camera_Test_bsp//linker.x' -msys-crt0='../D8M_Camera_Test_bsp//obj/HAL/src/crt0.o' -msys-lib=hal_bsp -L../D8M_Camera_Test_bsp/ -Wl,-Map=D8M_Camera_Test.map -O0 -g -Wall -mno-hw-div -mhw-mul -mno-hw-mulx -o D8M_Camera_Test.elf obj/default/I2C_core.o obj/default/auto_focus.o obj/default/main.o obj/default/mipi_bridge_config.o obj/default/mipi_camera_config.o obj/default/queue.o -lm -msys-lib=m -nios2-elf-insert D8M_Camera_Test.elf --thread_model hal --cpu_name nios2_gen2 --qsys true --simulation_enabled false --id 0 --sidp 0x410e0 --timestamp 1622558600 --stderr_dev jtag_uart --stdin_dev jtag_uart --stdout_dev jtag_uart --sopc_system_name Qsys --quartus_project_dir "/home/ad3919/nfshome/EE2Rover/Vision/DE10_LITE_D8M_VIP_16" --jdi ../..//output_files/DE10_LITE_D8M_VIP.jdi --sopcinfo /home/ad3919/nfshome/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/../../Qsys.sopcinfo -Info: (D8M_Camera_Test.elf) 84 KBytes program size (code + initialized data). -Info: 5096 Bytes free for stack + heap. -Info: Creating D8M_Camera_Test.objdump -nios2-elf-objdump --disassemble --syms --all-header --source D8M_Camera_Test.elf >D8M_Camera_Test.objdump -[D8M_Camera_Test build complete] -15:53:25 **** Build of configuration Nios II for project D8M_Camera_Test **** -make all -Info: Building ../D8M_Camera_Test_bsp/ -make --no-print-directory -C ../D8M_Camera_Test_bsp/ -[BSP build complete] -[D8M_Camera_Test build complete] -15:53:28 **** Incremental Build of configuration Nios II for project D8M_Camera_Test **** -make all -Info: Building ../D8M_Camera_Test_bsp/ -make --no-print-directory -C ../D8M_Camera_Test_bsp/ -[BSP build complete] -[D8M_Camera_Test build complete] diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.history/41/700f9430dec2001b1f77c40a2d51fad4 b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.history/41/700f9430dec2001b1f77c40a2d51fad4 deleted file mode 100644 index 6ad8dec..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.history/41/700f9430dec2001b1f77c40a2d51fad4 +++ /dev/null @@ -1,302 +0,0 @@ - - -#include -#include "I2C_core.h" -#include "terasic_includes.h" -#include "mipi_camera_config.h" -#include "mipi_bridge_config.h" -#include "system.h" - -#include "auto_focus.h" - -#include -#include - -//EEE_IMGPROC defines -#define EEE_IMGPROC_MSG_START ('R'<<16 | 'B'<<8 | 'B') - -//offsets -#define EEE_IMGPROC_STATUS 0 -#define EEE_IMGPROC_MSG 1 -#define EEE_IMGPROC_ID 2 -#define EEE_IMGPROC_BBCOL 3 - -#define EXPOSURE_INIT 0x002000 -#define EXPOSURE_STEP 0x100 -#define GAIN_INIT 0xFFF -#define GAIN_STEP 0xFFF -#define DEFAULT_LEVEL 3 - -#define MIPI_REG_PHYClkCtl 0x0056 -#define MIPI_REG_PHYData0Ctl 0x0058 -#define MIPI_REG_PHYData1Ctl 0x005A -#define MIPI_REG_PHYData2Ctl 0x005C -#define MIPI_REG_PHYData3Ctl 0x005E -#define MIPI_REG_PHYTimDly 0x0060 -#define MIPI_REG_PHYSta 0x0062 -#define MIPI_REG_CSIStatus 0x0064 -#define MIPI_REG_CSIErrEn 0x0066 -#define MIPI_REG_MDLSynErr 0x0068 -#define MIPI_REG_FrmErrCnt 0x0080 -#define MIPI_REG_MDLErrCnt 0x0090 - -void mipi_clear_error(void){ - MipiBridgeRegWrite(MIPI_REG_CSIStatus,0x01FF); // clear error - MipiBridgeRegWrite(MIPI_REG_MDLSynErr,0x0000); // clear error - MipiBridgeRegWrite(MIPI_REG_FrmErrCnt,0x0000); // clear error - MipiBridgeRegWrite(MIPI_REG_MDLErrCnt, 0x0000); // clear error - - MipiBridgeRegWrite(0x0082,0x00); - MipiBridgeRegWrite(0x0084,0x00); - MipiBridgeRegWrite(0x0086,0x00); - MipiBridgeRegWrite(0x0088,0x00); - MipiBridgeRegWrite(0x008A,0x00); - MipiBridgeRegWrite(0x008C,0x00); - MipiBridgeRegWrite(0x008E,0x00); - MipiBridgeRegWrite(0x0090,0x00); -} - -void mipi_show_error_info(void){ - - alt_u16 PHY_status, SCI_status, MDLSynErr, FrmErrCnt, MDLErrCnt; - - PHY_status = MipiBridgeRegRead(MIPI_REG_PHYSta); - SCI_status = MipiBridgeRegRead(MIPI_REG_CSIStatus); - MDLSynErr = MipiBridgeRegRead(MIPI_REG_MDLSynErr); - FrmErrCnt = MipiBridgeRegRead(MIPI_REG_FrmErrCnt); - MDLErrCnt = MipiBridgeRegRead(MIPI_REG_MDLErrCnt); - printf("PHY_status=%xh, CSI_status=%xh, MDLSynErr=%xh, FrmErrCnt=%xh, MDLErrCnt=%xh\r\n", PHY_status, SCI_status, MDLSynErr,FrmErrCnt, MDLErrCnt); -} - -void mipi_show_error_info_more(void){ - printf("FrmErrCnt = %d\n",MipiBridgeRegRead(0x0080)); - printf("CRCErrCnt = %d\n",MipiBridgeRegRead(0x0082)); - printf("CorErrCnt = %d\n",MipiBridgeRegRead(0x0084)); - printf("HdrErrCnt = %d\n",MipiBridgeRegRead(0x0086)); - printf("EIDErrCnt = %d\n",MipiBridgeRegRead(0x0088)); - printf("CtlErrCnt = %d\n",MipiBridgeRegRead(0x008A)); - printf("SoTErrCnt = %d\n",MipiBridgeRegRead(0x008C)); - printf("SynErrCnt = %d\n",MipiBridgeRegRead(0x008E)); - printf("MDLErrCnt = %d\n",MipiBridgeRegRead(0x0090)); - printf("FIFOSTATUS = %d\n",MipiBridgeRegRead(0x00F8)); - printf("DataType = 0x%04x\n",MipiBridgeRegRead(0x006A)); - printf("CSIPktLen = %d\n",MipiBridgeRegRead(0x006E)); -} - - - -bool MIPI_Init(void){ - bool bSuccess; - - - bSuccess = oc_i2c_init_ex(I2C_OPENCORES_MIPI_BASE, 50*1000*1000,400*1000); //I2C: 400K - if (!bSuccess) - printf("failed to init MIPI- Bridge i2c\r\n"); - - usleep(50*1000); - MipiBridgeInit(); - - usleep(500*1000); - -// bSuccess = oc_i2c_init_ex(I2C_OPENCORES_CAMERA_BASE, 50*1000*1000,400*1000); //I2C: 400K -// if (!bSuccess) -// printf("failed to init MIPI- Camera i2c\r\n"); - - MipiCameraInit(); - MIPI_BIN_LEVEL(DEFAULT_LEVEL); -// OV8865_FOCUS_Move_to(340); - -// oc_i2c_uninit(I2C_OPENCORES_CAMERA_BASE); // Release I2C bus , due to two I2C master shared! - - - usleep(1000); - - -// oc_i2c_uninit(I2C_OPENCORES_MIPI_BASE); - - return bSuccess; -} - - - - -int main() -{ - - fcntl(STDIN_FILENO, F_SETFL, O_NONBLOCK); - - printf("DE10-LITE D8M VGA Demo\n"); - printf("Imperial College EEE2 Project version\n"); - IOWR(MIPI_PWDN_N_BASE, 0x00, 0x00); - IOWR(MIPI_RESET_N_BASE, 0x00, 0x00); - - usleep(2000); - IOWR(MIPI_PWDN_N_BASE, 0x00, 0xFF); - usleep(2000); - IOWR(MIPI_RESET_N_BASE, 0x00, 0xFF); - - printf("Image Processor ID: %x\n",IORD(0x42000,EEE_IMGPROC_ID)); - //printf("Image Processor ID: %x\n",IORD(EEE_IMGPROC_0_BASE,EEE_IMGPROC_ID)); //Don't know why this doesn't work - definition is in system.h in BSP - - - usleep(2000); - - - // MIPI Init - if (!MIPI_Init()){ - printf("MIPI_Init Init failed!\r\n"); - }else{ - printf("MIPI_Init Init successfully!\r\n"); - } - -// while(1){ - mipi_clear_error(); - usleep(50*1000); - mipi_clear_error(); - usleep(1000*1000); - mipi_show_error_info(); -// mipi_show_error_info_more(); - printf("\n"); -// } - - -#if 0 // focus sweep - printf("\nFocus sweep\n"); - alt_u16 ii= 350; - alt_u8 dir = 0; - while(1){ - if(ii< 50) dir = 1; - else if (ii> 1000) dir =0; - - if(dir) ii += 20; - else ii -= 20; - - printf("%d\n",ii); - OV8865_FOCUS_Move_to(ii); - usleep(50*1000); - } -#endif - - - - - - - ////////////////////////////////////////////////////////// - alt_u16 bin_level = DEFAULT_LEVEL; - alt_u8 manual_focus_step = 10; - alt_u16 current_focus = 300; - int boundingBoxColour = 0; - alt_u32 exposureTime = EXPOSURE_INIT; - alt_u16 gain = GAIN_INIT; - - OV8865SetExposure(exposureTime); - OV8865SetGain(gain); - Focus_Init(); - while(1){ - - // touch KEY0 to trigger Auto focus - if((IORD(KEY_BASE,0)&0x03) == 0x02){ - - current_focus = Focus_Window(320,240); - } - // touch KEY1 to ZOOM - if((IORD(KEY_BASE,0)&0x03) == 0x01){ - if(bin_level == 3 )bin_level = 1; - else bin_level ++; - printf("set bin level to %d\n",bin_level); - MIPI_BIN_LEVEL(bin_level); - usleep(500000); - - } - - - #if 0 - if((IORD(KEY_BASE,0)&0x0F) == 0x0E){ - - current_focus = Focus_Window(320,240); - } - - // touch KEY1 to trigger Manual focus - step - if((IORD(KEY_BASE,0)&0x0F) == 0x0D){ - - if(current_focus > manual_focus_step) current_focus -= manual_focus_step; - else current_focus = 0; - OV8865_FOCUS_Move_to(current_focus); - - } - - // touch KEY2 to trigger Manual focus + step - if((IORD(KEY_BASE,0)&0x0F) == 0x0B){ - current_focus += manual_focus_step; - if(current_focus >1023) current_focus = 1023; - OV8865_FOCUS_Move_to(current_focus); - } - - // touch KEY3 to ZOOM - if((IORD(KEY_BASE,0)&0x0F) == 0x07){ - if(bin_level == 3 )bin_level = 1; - else bin_level ++; - printf("set bin level to %d\n",bin_level); - MIPI_BIN_LEVEL(bin_level); - usleep(500000); - - } - #endif - - //Read messages from the image processor and print them on the terminal - while ((IORD(0x42000,EEE_IMGPROC_STATUS)>>8) & 0xff) { //Find out if there are words to read - int word = IORD(0x42000,EEE_IMGPROC_MSG); //Get next word from message buffer - if (word == EEE_IMGPROC_MSG_START){ //Newline on message identifier - printf("\n"); - } - printf("%08x ",word); - } - - //Update the bounding box colour - boundingBoxColour = ((boundingBoxColour + 1) & 0xff); - IOWR(0x42000, EEE_IMGPROC_BBCOL, (boundingBoxColour << 8) | (0xff - boundingBoxColour)); - - //Process input commands - int in = getchar(); - switch (in) { - case 'e': { - exposureTime += EXPOSURE_STEP; - OV8865SetExposure(exposureTime); - printf("\nExposure = %x ", exposureTime); - break;} - case 'd': { - exposureTime -= EXPOSURE_STEP; - OV8865SetExposure(exposureTime); - printf("\nExposure = %x ", exposureTime); - break;} - case 't': { - gain += GAIN_STEP; - OV8865SetGain(gain); - printf("\nGain = %x ", gain); - break;} - case 'g': { - gain -= GAIN_STEP; - OV8865SetGain(gain); - printf("\nGain = %x ", gain); - break;} - case 'r': { - current_focus += manual_focus_step; - if(current_focus >1023) current_focus = 1023; - OV8865_FOCUS_Move_to(current_focus); - printf("\nFocus = %x ",current_focus); - break;} - case 'f': { - if(current_focus > manual_focus_step) current_focus -= manual_focus_step; - OV8865_FOCUS_Move_to(current_focus); - printf("\nFocus = %x ",current_focus); - break;} - } - - - //Main loop delay - usleep(10000); - - }; - return 0; -} diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.history/70/707fa8e6dfc2001b1f77c40a2d51fad4 b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.history/70/707fa8e6dfc2001b1f77c40a2d51fad4 deleted file mode 100644 index 20385e7..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.history/70/707fa8e6dfc2001b1f77c40a2d51fad4 +++ /dev/null @@ -1,283 +0,0 @@ -#include -#include "I2C_core.h" -#include "terasic_includes.h" -#include "mipi_camera_config.h" -#include "mipi_bridge_config.h" -#include "system.h" - -#include "auto_focus.h" - -#include -#include - -//EEE_IMGPROC defines -#define EEE_IMGPROC_MSG_START ('R'<<16 | 'B'<<8 | 'B') - -//offsets -#define EEE_IMGPROC_STATUS 0 -#define EEE_IMGPROC_MSG 1 -#define EEE_IMGPROC_ID 2 -#define EEE_IMGPROC_BBCOL 3 - -#define EXPOSURE_INIT 0x002000 -#define EXPOSURE_STEP 0x100 -#define GAIN_INIT 0xFFF -#define GAIN_STEP 0xFFF -#define DEFAULT_LEVEL 3 - -#define MIPI_REG_PHYClkCtl 0x0056 -#define MIPI_REG_PHYData0Ctl 0x0058 -#define MIPI_REG_PHYData1Ctl 0x005A -#define MIPI_REG_PHYData2Ctl 0x005C -#define MIPI_REG_PHYData3Ctl 0x005E -#define MIPI_REG_PHYTimDly 0x0060 -#define MIPI_REG_PHYSta 0x0062 -#define MIPI_REG_CSIStatus 0x0064 -#define MIPI_REG_CSIErrEn 0x0066 -#define MIPI_REG_MDLSynErr 0x0068 -#define MIPI_REG_FrmErrCnt 0x0080 -#define MIPI_REG_MDLErrCnt 0x0090 - -void mipi_clear_error(void){ - MipiBridgeRegWrite(MIPI_REG_CSIStatus,0x01FF); // clear error - MipiBridgeRegWrite(MIPI_REG_MDLSynErr,0x0000); // clear error - MipiBridgeRegWrite(MIPI_REG_FrmErrCnt,0x0000); // clear error - MipiBridgeRegWrite(MIPI_REG_MDLErrCnt, 0x0000); // clear error - - MipiBridgeRegWrite(0x0082,0x00); - MipiBridgeRegWrite(0x0084,0x00); - MipiBridgeRegWrite(0x0086,0x00); - MipiBridgeRegWrite(0x0088,0x00); - MipiBridgeRegWrite(0x008A,0x00); - MipiBridgeRegWrite(0x008C,0x00); - MipiBridgeRegWrite(0x008E,0x00); - MipiBridgeRegWrite(0x0090,0x00); -} - -void mipi_show_error_info(void){ - - alt_u16 PHY_status, SCI_status, MDLSynErr, FrmErrCnt, MDLErrCnt; - - PHY_status = MipiBridgeRegRead(MIPI_REG_PHYSta); - SCI_status = MipiBridgeRegRead(MIPI_REG_CSIStatus); - MDLSynErr = MipiBridgeRegRead(MIPI_REG_MDLSynErr); - FrmErrCnt = MipiBridgeRegRead(MIPI_REG_FrmErrCnt); - MDLErrCnt = MipiBridgeRegRead(MIPI_REG_MDLErrCnt); - printf("PHY_status=%xh, CSI_status=%xh, MDLSynErr=%xh, FrmErrCnt=%xh, MDLErrCnt=%xh\r\n", PHY_status, SCI_status, MDLSynErr,FrmErrCnt, MDLErrCnt); -} - -void mipi_show_error_info_more(void){ - printf("FrmErrCnt = %d\n",MipiBridgeRegRead(0x0080)); - printf("CRCErrCnt = %d\n",MipiBridgeRegRead(0x0082)); - printf("CorErrCnt = %d\n",MipiBridgeRegRead(0x0084)); - printf("HdrErrCnt = %d\n",MipiBridgeRegRead(0x0086)); - printf("EIDErrCnt = %d\n",MipiBridgeRegRead(0x0088)); - printf("CtlErrCnt = %d\n",MipiBridgeRegRead(0x008A)); - printf("SoTErrCnt = %d\n",MipiBridgeRegRead(0x008C)); - printf("SynErrCnt = %d\n",MipiBridgeRegRead(0x008E)); - printf("MDLErrCnt = %d\n",MipiBridgeRegRead(0x0090)); - printf("FIFOSTATUS = %d\n",MipiBridgeRegRead(0x00F8)); - printf("DataType = 0x%04x\n",MipiBridgeRegRead(0x006A)); - printf("CSIPktLen = %d\n",MipiBridgeRegRead(0x006E)); -} - -bool MIPI_Init(void){ - bool bSuccess; - bSuccess = oc_i2c_init_ex(I2C_OPENCORES_MIPI_BASE, 50*1000*1000,400*1000); //I2C: 400K - if (!bSuccess) - printf("failed to init MIPI- Bridge i2c\r\n"); - usleep(50*1000); - MipiBridgeInit(); - usleep(500*1000); -// bSuccess = oc_i2c_init_ex(I2C_OPENCORES_CAMERA_BASE, 50*1000*1000,400*1000); //I2C: 400K -// if (!bSuccess) -// printf("failed to init MIPI- Camera i2c\r\n"); - MipiCameraInit(); - MIPI_BIN_LEVEL(DEFAULT_LEVEL); -// OV8865_FOCUS_Move_to(340); -// oc_i2c_uninit(I2C_OPENCORES_CAMERA_BASE); // Release I2C bus , due to two I2C master shared! - usleep(1000); -// oc_i2c_uninit(I2C_OPENCORES_MIPI_BASE); - return bSuccess; -} - -int main() -{ - - fcntl(STDIN_FILENO, F_SETFL, O_NONBLOCK); - - printf("DE10-LITE D8M VGA Demo\n"); - printf("Imperial College EEE2 Project version\n"); - IOWR(MIPI_PWDN_N_BASE, 0x00, 0x00); - IOWR(MIPI_RESET_N_BASE, 0x00, 0x00); - - usleep(2000); - IOWR(MIPI_PWDN_N_BASE, 0x00, 0xFF); - usleep(2000); - IOWR(MIPI_RESET_N_BASE, 0x00, 0xFF); - - printf("Image Processor ID: %x\n",IORD(EEE_IMGPROC_0_BASE,EEE_IMGPROC_ID)); - //printf("Image Processor ID: %x\n",IORD(EEE_IMGPROC_0_BASE,EEE_IMGPROC_ID)); //Don't know why this doesn't work - definition is in system.h in BSP - - - usleep(2000); - - - // MIPI Init - if (!MIPI_Init()){ - printf("MIPI_Init Init failed!\r\n"); - }else{ - printf("MIPI_Init Init successfully!\r\n"); - } - -// while(1){ - mipi_clear_error(); - usleep(50*1000); - mipi_clear_error(); - usleep(1000*1000); - mipi_show_error_info(); -// mipi_show_error_info_more(); - printf("\n"); -// } - - -#if 0 // focus sweep - printf("\nFocus sweep\n"); - alt_u16 ii= 350; - alt_u8 dir = 0; - while(1){ - if(ii< 50) dir = 1; - else if (ii> 1000) dir =0; - - if(dir) ii += 20; - else ii -= 20; - - printf("%d\n",ii); - OV8865_FOCUS_Move_to(ii); - usleep(50*1000); - } -#endif - - - - - - - ////////////////////////////////////////////////////////// - alt_u16 bin_level = DEFAULT_LEVEL; - alt_u8 manual_focus_step = 10; - alt_u16 current_focus = 300; - int boundingBoxColour = 0; - alt_u32 exposureTime = EXPOSURE_INIT; - alt_u16 gain = GAIN_INIT; - - OV8865SetExposure(exposureTime); - OV8865SetGain(gain); - Focus_Init(); - while(1){ - - // touch KEY0 to trigger Auto focus - if((IORD(KEY_BASE,0)&0x03) == 0x02){ - - current_focus = Focus_Window(320,240); - } - // touch KEY1 to ZOOM - if((IORD(KEY_BASE,0)&0x03) == 0x01){ - if(bin_level == 3 )bin_level = 1; - else bin_level ++; - printf("set bin level to %d\n",bin_level); - MIPI_BIN_LEVEL(bin_level); - usleep(500000); - - } - - - #if 0 - if((IORD(KEY_BASE,0)&0x0F) == 0x0E){ - - current_focus = Focus_Window(320,240); - } - - // touch KEY1 to trigger Manual focus - step - if((IORD(KEY_BASE,0)&0x0F) == 0x0D){ - - if(current_focus > manual_focus_step) current_focus -= manual_focus_step; - else current_focus = 0; - OV8865_FOCUS_Move_to(current_focus); - - } - - // touch KEY2 to trigger Manual focus + step - if((IORD(KEY_BASE,0)&0x0F) == 0x0B){ - current_focus += manual_focus_step; - if(current_focus >1023) current_focus = 1023; - OV8865_FOCUS_Move_to(current_focus); - } - - // touch KEY3 to ZOOM - if((IORD(KEY_BASE,0)&0x0F) == 0x07){ - if(bin_level == 3 )bin_level = 1; - else bin_level ++; - printf("set bin level to %d\n",bin_level); - MIPI_BIN_LEVEL(bin_level); - usleep(500000); - - } - #endif - - //Read messages from the image processor and print them on the terminal - while ((IORD(0x42000,EEE_IMGPROC_STATUS)>>8) & 0xff) { //Find out if there are words to read - int word = IORD(0x42000,EEE_IMGPROC_MSG); //Get next word from message buffer - if (word == EEE_IMGPROC_MSG_START){ //Newline on message identifier - printf("\n"); - } - printf("%08x ",word); - } - - //Update the bounding box colour - boundingBoxColour = ((boundingBoxColour + 1) & 0xff); - IOWR(0x42000, EEE_IMGPROC_BBCOL, (boundingBoxColour << 8) | (0xff - boundingBoxColour)); - - //Process input commands - int in = getchar(); - switch (in) { - case 'e': { - exposureTime += EXPOSURE_STEP; - OV8865SetExposure(exposureTime); - printf("\nExposure = %x ", exposureTime); - break;} - case 'd': { - exposureTime -= EXPOSURE_STEP; - OV8865SetExposure(exposureTime); - printf("\nExposure = %x ", exposureTime); - break;} - case 't': { - gain += GAIN_STEP; - OV8865SetGain(gain); - printf("\nGain = %x ", gain); - break;} - case 'g': { - gain -= GAIN_STEP; - OV8865SetGain(gain); - printf("\nGain = %x ", gain); - break;} - case 'r': { - current_focus += manual_focus_step; - if(current_focus >1023) current_focus = 1023; - OV8865_FOCUS_Move_to(current_focus); - printf("\nFocus = %x ",current_focus); - break;} - case 'f': { - if(current_focus > manual_focus_step) current_focus -= manual_focus_step; - OV8865_FOCUS_Move_to(current_focus); - printf("\nFocus = %x ",current_focus); - break;} - } - - - //Main loop delay - usleep(10000); - - }; - return 0; -} diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.history/a8/f0a55278dfc2001b1f77c40a2d51fad4 b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.history/a8/f0a55278dfc2001b1f77c40a2d51fad4 deleted file mode 100644 index fcfe7dc..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.history/a8/f0a55278dfc2001b1f77c40a2d51fad4 +++ /dev/null @@ -1,302 +0,0 @@ - - -#include -#include "I2C_core.h" -#include "terasic_includes.h" -#include "mipi_camera_config.h" -#include "mipi_bridge_config.h" -#include "system.h" - -#include "auto_focus.h" - -#include -#include - -//EEE_IMGPROC defines -#define EEE_IMGPROC_MSG_START ('R'<<16 | 'B'<<8 | 'B') - -//offsets -#define EEE_IMGPROC_STATUS 0 -#define EEE_IMGPROC_MSG 1 -#define EEE_IMGPROC_ID 2 -#define EEE_IMGPROC_BBCOL 3 - -#define EXPOSURE_INIT 0x002000 -#define EXPOSURE_STEP 0x100 -#define GAIN_INIT 0xFFF -#define GAIN_STEP 0xFFF -#define DEFAULT_LEVEL 3 - -#define MIPI_REG_PHYClkCtl 0x0056 -#define MIPI_REG_PHYData0Ctl 0x0058 -#define MIPI_REG_PHYData1Ctl 0x005A -#define MIPI_REG_PHYData2Ctl 0x005C -#define MIPI_REG_PHYData3Ctl 0x005E -#define MIPI_REG_PHYTimDly 0x0060 -#define MIPI_REG_PHYSta 0x0062 -#define MIPI_REG_CSIStatus 0x0064 -#define MIPI_REG_CSIErrEn 0x0066 -#define MIPI_REG_MDLSynErr 0x0068 -#define MIPI_REG_FrmErrCnt 0x0080 -#define MIPI_REG_MDLErrCnt 0x0090 - -void mipi_clear_error(void){ - MipiBridgeRegWrite(MIPI_REG_CSIStatus,0x01FF); // clear error - MipiBridgeRegWrite(MIPI_REG_MDLSynErr,0x0000); // clear error - MipiBridgeRegWrite(MIPI_REG_FrmErrCnt,0x0000); // clear error - MipiBridgeRegWrite(MIPI_REG_MDLErrCnt, 0x0000); // clear error - - MipiBridgeRegWrite(0x0082,0x00); - MipiBridgeRegWrite(0x0084,0x00); - MipiBridgeRegWrite(0x0086,0x00); - MipiBridgeRegWrite(0x0088,0x00); - MipiBridgeRegWrite(0x008A,0x00); - MipiBridgeRegWrite(0x008C,0x00); - MipiBridgeRegWrite(0x008E,0x00); - MipiBridgeRegWrite(0x0090,0x00); -} - -void mipi_show_error_info(void){ - - alt_u16 PHY_status, SCI_status, MDLSynErr, FrmErrCnt, MDLErrCnt; - - PHY_status = MipiBridgeRegRead(MIPI_REG_PHYSta); - SCI_status = MipiBridgeRegRead(MIPI_REG_CSIStatus); - MDLSynErr = MipiBridgeRegRead(MIPI_REG_MDLSynErr); - FrmErrCnt = MipiBridgeRegRead(MIPI_REG_FrmErrCnt); - MDLErrCnt = MipiBridgeRegRead(MIPI_REG_MDLErrCnt); - printf("PHY_status=%xh, CSI_status=%xh, MDLSynErr=%xh, FrmErrCnt=%xh, MDLErrCnt=%xh\r\n", PHY_status, SCI_status, MDLSynErr,FrmErrCnt, MDLErrCnt); -} - -void mipi_show_error_info_more(void){ - printf("FrmErrCnt = %d\n",MipiBridgeRegRead(0x0080)); - printf("CRCErrCnt = %d\n",MipiBridgeRegRead(0x0082)); - printf("CorErrCnt = %d\n",MipiBridgeRegRead(0x0084)); - printf("HdrErrCnt = %d\n",MipiBridgeRegRead(0x0086)); - printf("EIDErrCnt = %d\n",MipiBridgeRegRead(0x0088)); - printf("CtlErrCnt = %d\n",MipiBridgeRegRead(0x008A)); - printf("SoTErrCnt = %d\n",MipiBridgeRegRead(0x008C)); - printf("SynErrCnt = %d\n",MipiBridgeRegRead(0x008E)); - printf("MDLErrCnt = %d\n",MipiBridgeRegRead(0x0090)); - printf("FIFOSTATUS = %d\n",MipiBridgeRegRead(0x00F8)); - printf("DataType = 0x%04x\n",MipiBridgeRegRead(0x006A)); - printf("CSIPktLen = %d\n",MipiBridgeRegRead(0x006E)); -} - - - -bool MIPI_Init(void){ - bool bSuccess; - - - bSuccess = oc_i2c_init_ex(I2C_OPENCORES_MIPI_BASE, 50*1000*1000,400*1000); //I2C: 400K - if (!bSuccess) - printf("failed to init MIPI- Bridge i2c\r\n"); - - usleep(50*1000); - MipiBridgeInit(); - - usleep(500*1000); - -// bSuccess = oc_i2c_init_ex(I2C_OPENCORES_CAMERA_BASE, 50*1000*1000,400*1000); //I2C: 400K -// if (!bSuccess) -// printf("failed to init MIPI- Camera i2c\r\n"); - - MipiCameraInit(); - MIPI_BIN_LEVEL(DEFAULT_LEVEL); -// OV8865_FOCUS_Move_to(340); - -// oc_i2c_uninit(I2C_OPENCORES_CAMERA_BASE); // Release I2C bus , due to two I2C master shared! - - - usleep(1000); - - -// oc_i2c_uninit(I2C_OPENCORES_MIPI_BASE); - - return bSuccess; -} - - - - -int main() -{ - - fcntl(STDIN_FILENO, F_SETFL, O_NONBLOCK); - - printf("DE10-LITE D8M VGA Demo\n"); - printf("Imperial College EEE2 Project version\n"); - IOWR(MIPI_PWDN_N_BASE, 0x00, 0x00); - IOWR(MIPI_RESET_N_BASE, 0x00, 0x00); - - usleep(2000); - IOWR(MIPI_PWDN_N_BASE, 0x00, 0xFF); - usleep(2000); - IOWR(MIPI_RESET_N_BASE, 0x00, 0xFF); - - printf("Image Processor ID: %x\n",IORD(EEE_IMGPROC_0_BASE,EEE_IMGPROC_ID)); - //printf("Image Processor ID: %x\n",IORD(EEE_IMGPROC_0_BASE,EEE_IMGPROC_ID)); //Don't know why this doesn't work - definition is in system.h in BSP - - - usleep(2000); - - - // MIPI Init - if (!MIPI_Init()){ - printf("MIPI_Init Init failed!\r\n"); - }else{ - printf("MIPI_Init Init successfully!\r\n"); - } - -// while(1){ - mipi_clear_error(); - usleep(50*1000); - mipi_clear_error(); - usleep(1000*1000); - mipi_show_error_info(); -// mipi_show_error_info_more(); - printf("\n"); -// } - - -#if 0 // focus sweep - printf("\nFocus sweep\n"); - alt_u16 ii= 350; - alt_u8 dir = 0; - while(1){ - if(ii< 50) dir = 1; - else if (ii> 1000) dir =0; - - if(dir) ii += 20; - else ii -= 20; - - printf("%d\n",ii); - OV8865_FOCUS_Move_to(ii); - usleep(50*1000); - } -#endif - - - - - - - ////////////////////////////////////////////////////////// - alt_u16 bin_level = DEFAULT_LEVEL; - alt_u8 manual_focus_step = 10; - alt_u16 current_focus = 300; - int boundingBoxColour = 0; - alt_u32 exposureTime = EXPOSURE_INIT; - alt_u16 gain = GAIN_INIT; - - OV8865SetExposure(exposureTime); - OV8865SetGain(gain); - Focus_Init(); - while(1){ - - // touch KEY0 to trigger Auto focus - if((IORD(KEY_BASE,0)&0x03) == 0x02){ - - current_focus = Focus_Window(320,240); - } - // touch KEY1 to ZOOM - if((IORD(KEY_BASE,0)&0x03) == 0x01){ - if(bin_level == 3 )bin_level = 1; - else bin_level ++; - printf("set bin level to %d\n",bin_level); - MIPI_BIN_LEVEL(bin_level); - usleep(500000); - - } - - - #if 0 - if((IORD(KEY_BASE,0)&0x0F) == 0x0E){ - - current_focus = Focus_Window(320,240); - } - - // touch KEY1 to trigger Manual focus - step - if((IORD(KEY_BASE,0)&0x0F) == 0x0D){ - - if(current_focus > manual_focus_step) current_focus -= manual_focus_step; - else current_focus = 0; - OV8865_FOCUS_Move_to(current_focus); - - } - - // touch KEY2 to trigger Manual focus + step - if((IORD(KEY_BASE,0)&0x0F) == 0x0B){ - current_focus += manual_focus_step; - if(current_focus >1023) current_focus = 1023; - OV8865_FOCUS_Move_to(current_focus); - } - - // touch KEY3 to ZOOM - if((IORD(KEY_BASE,0)&0x0F) == 0x07){ - if(bin_level == 3 )bin_level = 1; - else bin_level ++; - printf("set bin level to %d\n",bin_level); - MIPI_BIN_LEVEL(bin_level); - usleep(500000); - - } - #endif - - //Read messages from the image processor and print them on the terminal - while ((IORD(0x42000,EEE_IMGPROC_STATUS)>>8) & 0xff) { //Find out if there are words to read - int word = IORD(0x42000,EEE_IMGPROC_MSG); //Get next word from message buffer - if (word == EEE_IMGPROC_MSG_START){ //Newline on message identifier - printf("\n"); - } - printf("%08x ",word); - } - - //Update the bounding box colour - boundingBoxColour = ((boundingBoxColour + 1) & 0xff); - IOWR(0x42000, EEE_IMGPROC_BBCOL, (boundingBoxColour << 8) | (0xff - boundingBoxColour)); - - //Process input commands - int in = getchar(); - switch (in) { - case 'e': { - exposureTime += EXPOSURE_STEP; - OV8865SetExposure(exposureTime); - printf("\nExposure = %x ", exposureTime); - break;} - case 'd': { - exposureTime -= EXPOSURE_STEP; - OV8865SetExposure(exposureTime); - printf("\nExposure = %x ", exposureTime); - break;} - case 't': { - gain += GAIN_STEP; - OV8865SetGain(gain); - printf("\nGain = %x ", gain); - break;} - case 'g': { - gain -= GAIN_STEP; - OV8865SetGain(gain); - printf("\nGain = %x ", gain); - break;} - case 'r': { - current_focus += manual_focus_step; - if(current_focus >1023) current_focus = 1023; - OV8865_FOCUS_Move_to(current_focus); - printf("\nFocus = %x ",current_focus); - break;} - case 'f': { - if(current_focus > manual_focus_step) current_focus -= manual_focus_step; - OV8865_FOCUS_Move_to(current_focus); - printf("\nFocus = %x ",current_focus); - break;} - } - - - //Main loop delay - usleep(10000); - - }; - return 0; -} diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.history/be/d008f016dec2001b1f77c40a2d51fad4 b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.history/be/d008f016dec2001b1f77c40a2d51fad4 deleted file mode 100644 index bfe2481..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.resources/.history/be/d008f016dec2001b1f77c40a2d51fad4 +++ /dev/null @@ -1,301 +0,0 @@ - - -#include -#include "I2C_core.h" -#include "terasic_includes.h" -#include "mipi_camera_config.h" -#include "mipi_bridge_config.h" - -#include "auto_focus.h" - -#include -#include - -//EEE_IMGPROC defines -#define EEE_IMGPROC_MSG_START ('R'<<16 | 'B'<<8 | 'B') - -//offsets -#define EEE_IMGPROC_STATUS 0 -#define EEE_IMGPROC_MSG 1 -#define EEE_IMGPROC_ID 2 -#define EEE_IMGPROC_BBCOL 3 - -#define EXPOSURE_INIT 0x002000 -#define EXPOSURE_STEP 0x100 -#define GAIN_INIT 0xFFF -#define GAIN_STEP 0xFFF -#define DEFAULT_LEVEL 3 - -#define MIPI_REG_PHYClkCtl 0x0056 -#define MIPI_REG_PHYData0Ctl 0x0058 -#define MIPI_REG_PHYData1Ctl 0x005A -#define MIPI_REG_PHYData2Ctl 0x005C -#define MIPI_REG_PHYData3Ctl 0x005E -#define MIPI_REG_PHYTimDly 0x0060 -#define MIPI_REG_PHYSta 0x0062 -#define MIPI_REG_CSIStatus 0x0064 -#define MIPI_REG_CSIErrEn 0x0066 -#define MIPI_REG_MDLSynErr 0x0068 -#define MIPI_REG_FrmErrCnt 0x0080 -#define MIPI_REG_MDLErrCnt 0x0090 - -void mipi_clear_error(void){ - MipiBridgeRegWrite(MIPI_REG_CSIStatus,0x01FF); // clear error - MipiBridgeRegWrite(MIPI_REG_MDLSynErr,0x0000); // clear error - MipiBridgeRegWrite(MIPI_REG_FrmErrCnt,0x0000); // clear error - MipiBridgeRegWrite(MIPI_REG_MDLErrCnt, 0x0000); // clear error - - MipiBridgeRegWrite(0x0082,0x00); - MipiBridgeRegWrite(0x0084,0x00); - MipiBridgeRegWrite(0x0086,0x00); - MipiBridgeRegWrite(0x0088,0x00); - MipiBridgeRegWrite(0x008A,0x00); - MipiBridgeRegWrite(0x008C,0x00); - MipiBridgeRegWrite(0x008E,0x00); - MipiBridgeRegWrite(0x0090,0x00); -} - -void mipi_show_error_info(void){ - - alt_u16 PHY_status, SCI_status, MDLSynErr, FrmErrCnt, MDLErrCnt; - - PHY_status = MipiBridgeRegRead(MIPI_REG_PHYSta); - SCI_status = MipiBridgeRegRead(MIPI_REG_CSIStatus); - MDLSynErr = MipiBridgeRegRead(MIPI_REG_MDLSynErr); - FrmErrCnt = MipiBridgeRegRead(MIPI_REG_FrmErrCnt); - MDLErrCnt = MipiBridgeRegRead(MIPI_REG_MDLErrCnt); - printf("PHY_status=%xh, CSI_status=%xh, MDLSynErr=%xh, FrmErrCnt=%xh, MDLErrCnt=%xh\r\n", PHY_status, SCI_status, MDLSynErr,FrmErrCnt, MDLErrCnt); -} - -void mipi_show_error_info_more(void){ - printf("FrmErrCnt = %d\n",MipiBridgeRegRead(0x0080)); - printf("CRCErrCnt = %d\n",MipiBridgeRegRead(0x0082)); - printf("CorErrCnt = %d\n",MipiBridgeRegRead(0x0084)); - printf("HdrErrCnt = %d\n",MipiBridgeRegRead(0x0086)); - printf("EIDErrCnt = %d\n",MipiBridgeRegRead(0x0088)); - printf("CtlErrCnt = %d\n",MipiBridgeRegRead(0x008A)); - printf("SoTErrCnt = %d\n",MipiBridgeRegRead(0x008C)); - printf("SynErrCnt = %d\n",MipiBridgeRegRead(0x008E)); - printf("MDLErrCnt = %d\n",MipiBridgeRegRead(0x0090)); - printf("FIFOSTATUS = %d\n",MipiBridgeRegRead(0x00F8)); - printf("DataType = 0x%04x\n",MipiBridgeRegRead(0x006A)); - printf("CSIPktLen = %d\n",MipiBridgeRegRead(0x006E)); -} - - - -bool MIPI_Init(void){ - bool bSuccess; - - - bSuccess = oc_i2c_init_ex(I2C_OPENCORES_MIPI_BASE, 50*1000*1000,400*1000); //I2C: 400K - if (!bSuccess) - printf("failed to init MIPI- Bridge i2c\r\n"); - - usleep(50*1000); - MipiBridgeInit(); - - usleep(500*1000); - -// bSuccess = oc_i2c_init_ex(I2C_OPENCORES_CAMERA_BASE, 50*1000*1000,400*1000); //I2C: 400K -// if (!bSuccess) -// printf("failed to init MIPI- Camera i2c\r\n"); - - MipiCameraInit(); - MIPI_BIN_LEVEL(DEFAULT_LEVEL); -// OV8865_FOCUS_Move_to(340); - -// oc_i2c_uninit(I2C_OPENCORES_CAMERA_BASE); // Release I2C bus , due to two I2C master shared! - - - usleep(1000); - - -// oc_i2c_uninit(I2C_OPENCORES_MIPI_BASE); - - return bSuccess; -} - - - - -int main() -{ - - fcntl(STDIN_FILENO, F_SETFL, O_NONBLOCK); - - printf("DE10-LITE D8M VGA Demo\n"); - printf("Imperial College EEE2 Project version\n"); - IOWR(MIPI_PWDN_N_BASE, 0x00, 0x00); - IOWR(MIPI_RESET_N_BASE, 0x00, 0x00); - - usleep(2000); - IOWR(MIPI_PWDN_N_BASE, 0x00, 0xFF); - usleep(2000); - IOWR(MIPI_RESET_N_BASE, 0x00, 0xFF); - - printf("Image Processor ID: %x\n",IORD(0x42000,EEE_IMGPROC_ID)); - //printf("Image Processor ID: %x\n",IORD(EEE_IMGPROC_0_BASE,EEE_IMGPROC_ID)); //Don't know why this doesn't work - definition is in system.h in BSP - - - usleep(2000); - - - // MIPI Init - if (!MIPI_Init()){ - printf("MIPI_Init Init failed!\r\n"); - }else{ - printf("MIPI_Init Init successfully!\r\n"); - } - -// while(1){ - mipi_clear_error(); - usleep(50*1000); - mipi_clear_error(); - usleep(1000*1000); - mipi_show_error_info(); -// mipi_show_error_info_more(); - printf("\n"); -// } - - -#if 0 // focus sweep - printf("\nFocus sweep\n"); - alt_u16 ii= 350; - alt_u8 dir = 0; - while(1){ - if(ii< 50) dir = 1; - else if (ii> 1000) dir =0; - - if(dir) ii += 20; - else ii -= 20; - - printf("%d\n",ii); - OV8865_FOCUS_Move_to(ii); - usleep(50*1000); - } -#endif - - - - - - - ////////////////////////////////////////////////////////// - alt_u16 bin_level = DEFAULT_LEVEL; - alt_u8 manual_focus_step = 10; - alt_u16 current_focus = 300; - int boundingBoxColour = 0; - alt_u32 exposureTime = EXPOSURE_INIT; - alt_u16 gain = GAIN_INIT; - - OV8865SetExposure(exposureTime); - OV8865SetGain(gain); - Focus_Init(); - while(1){ - - // touch KEY0 to trigger Auto focus - if((IORD(KEY_BASE,0)&0x03) == 0x02){ - - current_focus = Focus_Window(320,240); - } - // touch KEY1 to ZOOM - if((IORD(KEY_BASE,0)&0x03) == 0x01){ - if(bin_level == 3 )bin_level = 1; - else bin_level ++; - printf("set bin level to %d\n",bin_level); - MIPI_BIN_LEVEL(bin_level); - usleep(500000); - - } - - - #if 0 - if((IORD(KEY_BASE,0)&0x0F) == 0x0E){ - - current_focus = Focus_Window(320,240); - } - - // touch KEY1 to trigger Manual focus - step - if((IORD(KEY_BASE,0)&0x0F) == 0x0D){ - - if(current_focus > manual_focus_step) current_focus -= manual_focus_step; - else current_focus = 0; - OV8865_FOCUS_Move_to(current_focus); - - } - - // touch KEY2 to trigger Manual focus + step - if((IORD(KEY_BASE,0)&0x0F) == 0x0B){ - current_focus += manual_focus_step; - if(current_focus >1023) current_focus = 1023; - OV8865_FOCUS_Move_to(current_focus); - } - - // touch KEY3 to ZOOM - if((IORD(KEY_BASE,0)&0x0F) == 0x07){ - if(bin_level == 3 )bin_level = 1; - else bin_level ++; - printf("set bin level to %d\n",bin_level); - MIPI_BIN_LEVEL(bin_level); - usleep(500000); - - } - #endif - - //Read messages from the image processor and print them on the terminal - while ((IORD(0x42000,EEE_IMGPROC_STATUS)>>8) & 0xff) { //Find out if there are words to read - int word = IORD(0x42000,EEE_IMGPROC_MSG); //Get next word from message buffer - if (word == EEE_IMGPROC_MSG_START){ //Newline on message identifier - printf("\n"); - } - printf("%08x ",word); - } - - //Update the bounding box colour - boundingBoxColour = ((boundingBoxColour + 1) & 0xff); - IOWR(0x42000, EEE_IMGPROC_BBCOL, (boundingBoxColour << 8) | (0xff - boundingBoxColour)); - - //Process input commands - int in = getchar(); - switch (in) { - case 'e': { - exposureTime += EXPOSURE_STEP; - OV8865SetExposure(exposureTime); - printf("\nExposure = %x ", exposureTime); - break;} - case 'd': { - exposureTime -= EXPOSURE_STEP; - OV8865SetExposure(exposureTime); - printf("\nExposure = %x ", exposureTime); - break;} - case 't': { - gain += GAIN_STEP; - OV8865SetGain(gain); - printf("\nGain = %x ", gain); - break;} - case 'g': { - gain -= GAIN_STEP; - OV8865SetGain(gain); - printf("\nGain = %x ", gain); - break;} - case 'r': { - current_focus += manual_focus_step; - if(current_focus >1023) current_focus = 1023; - OV8865_FOCUS_Move_to(current_focus); - printf("\nFocus = %x ",current_focus); - break;} - case 'f': { - if(current_focus > manual_focus_step) current_focus -= manual_focus_step; - OV8865_FOCUS_Move_to(current_focus); - printf("\nFocus = %x ",current_focus); - break;} - } - - - //Main loop delay - usleep(10000); - - }; - return 0; -} diff --git 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a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.core.prj-D8M_Camera_Test_bsp.prefs b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.core.prj-D8M_Camera_Test_bsp.prefs deleted file mode 100644 index 9c00dc4..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.core.prj-D8M_Camera_Test_bsp.prefs +++ /dev/null @@ -1,2 +0,0 @@ -eclipse.preferences.version=1 -indexer/preferenceScope=0 diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.debug.core.prefs b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.debug.core.prefs deleted file mode 100644 index b8c9267..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.debug.core.prefs +++ /dev/null @@ -1,2 +0,0 @@ -eclipse.preferences.version=1 -org.eclipse.cdt.debug.core.cDebug.default_source_containers=\n\n\n\n\n\n\n\n diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.managedbuilder.core.prefs b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.managedbuilder.core.prefs deleted file mode 100644 index d4789ed..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.managedbuilder.core.prefs +++ /dev/null @@ -1,3 +0,0 @@ -eclipse.preferences.version=1 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diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.mylyn.ui.prefs b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.mylyn.ui.prefs deleted file mode 100644 index 0451f54..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.mylyn.ui.prefs +++ /dev/null @@ -1,2 +0,0 @@ -eclipse.preferences.version=1 -org.eclipse.mylyn.cdt.ui.run.count.3_3_0=1 diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.ui.prefs b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.ui.prefs deleted file mode 100644 index 71ac973..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.ui.prefs +++ /dev/null @@ -1,5 +0,0 @@ -content_assist_disabled_computers=org.eclipse.cdt.ui.textProposalCategory\u0000org.eclipse.cdt.ui.parserProposalCategory\u0000 -eclipse.preferences.version=1 -spelling_locale_initialized=true -useAnnotationsPrefPage=true -useQuickDiffPrefPage=true diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.core.resources.prefs b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.core.resources.prefs deleted file mode 100644 index dffc6b5..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.core.resources.prefs +++ /dev/null @@ -1,2 +0,0 @@ -eclipse.preferences.version=1 -version=1 diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.core.prefs b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.core.prefs deleted file mode 100644 index 57e3b77..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.core.prefs +++ /dev/null @@ -1,5 +0,0 @@ -//org.eclipse.debug.core.PREFERRED_DELEGATES/org.eclipse.cdt.launch.applicationLaunchType=org.eclipse.cdt.dsf.gdb.launch.localCLaunch,debug;org.eclipse.cdt.cdi.launch.localCLaunch,run -//org.eclipse.debug.core.PREFERRED_DELEGATES/org.eclipse.cdt.launch.attachLaunchType=org.eclipse.cdt.dsf.gdb.launch.attachCLaunch,debug -//org.eclipse.debug.core.PREFERRED_DELEGATES/org.eclipse.cdt.launch.postmortemLaunchType=org.eclipse.cdt.dsf.gdb.launch.coreCLaunch,debug -//org.eclipse.debug.core.PREFERRED_DELEGATES/org.eclipse.cdt.launch.remoteApplicationLaunchType=org.eclipse.rse.remotecdt.dsf.debug,debug -eclipse.preferences.version=1 diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.ui.prefs b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.ui.prefs deleted file mode 100644 index a2917e5..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.debug.ui.prefs +++ /dev/null @@ -1,3 +0,0 @@ -eclipse.preferences.version=1 -org.eclipse.debug.ui.PREF_LAUNCH_PERSPECTIVES=\n\n -preferredTargets=org.eclipse.cdt.debug.ui.toggleCBreakpointTarget\:org.eclipse.cdt.debug.ui.toggleCBreakpointTarget| diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.egit.core.prefs b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.egit.core.prefs deleted file mode 100644 index 101feea..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.egit.core.prefs +++ /dev/null @@ -1,2 +0,0 @@ -GitRepositoriesView.GitDirectories=/home/ad3919/nfshome/EE2Rover/.git\: -eclipse.preferences.version=1 diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.mylyn.context.core.prefs b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.mylyn.context.core.prefs deleted file mode 100644 index 43e97e4..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.mylyn.context.core.prefs +++ /dev/null @@ -1,2 +0,0 @@ -eclipse.preferences.version=1 -mylyn.attention.migrated=true diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.mylyn.monitor.ui.prefs b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.mylyn.monitor.ui.prefs deleted file mode 100644 index 8d462a6..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.mylyn.monitor.ui.prefs +++ /dev/null @@ -1,2 +0,0 @@ -eclipse.preferences.version=1 -org.eclipse.mylyn.monitor.activity.tracking.enabled.checked=true diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.mylyn.tasks.ui.prefs b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.mylyn.tasks.ui.prefs deleted file mode 100644 index 453b994..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.mylyn.tasks.ui.prefs +++ /dev/null @@ -1,3 +0,0 @@ -eclipse.preferences.version=1 -org.eclipse.mylyn.tasks.ui.filters.nonmatching=true -org.eclipse.mylyn.tasks.ui.filters.nonmatching.encouraged=true diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.rse.core.prefs b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.rse.core.prefs deleted file mode 100644 index 614b7cc..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.rse.core.prefs +++ /dev/null @@ -1,3 +0,0 @@ -eclipse.preferences.version=1 -org.eclipse.rse.systemtype.local.systemType.defaultUserId=ad3919 -useridperkey=ee-mill2.Local\=ad3919; diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.rse.ui.prefs b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.rse.ui.prefs deleted file mode 100644 index 9104419..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.rse.ui.prefs +++ /dev/null @@ -1,2 +0,0 @@ -eclipse.preferences.version=1 -org.eclipse.rse.preferences.order.connections=ee-mill2.Local diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.team.cvs.ui.prefs b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.team.cvs.ui.prefs deleted file mode 100644 index f9e585b..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.team.cvs.ui.prefs +++ /dev/null @@ -1,2 +0,0 @@ -eclipse.preferences.version=1 -pref_first_startup=false diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.team.ui.prefs b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.team.ui.prefs deleted file mode 100644 index 56cd496..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.team.ui.prefs +++ /dev/null @@ -1,2 +0,0 @@ -eclipse.preferences.version=1 -org.eclipse.team.ui.first_time=false diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.editors.prefs b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.editors.prefs deleted file mode 100644 index 61f3bb8..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.editors.prefs +++ /dev/null @@ -1,2 +0,0 @@ -eclipse.preferences.version=1 -overviewRuler_migration=migrated_3.1 diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.ide.prefs b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.ide.prefs deleted file mode 100644 index 7518eb5..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.ide.prefs +++ /dev/null @@ -1,6 +0,0 @@ -PROBLEMS_FILTERS_MIGRATE=true -TASKS_FILTERS_MIGRATE=true -eclipse.preferences.version=1 -platformState=1622552591073 -quickStart=false -tipsAndTricks=true diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.workbench.prefs b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.workbench.prefs deleted file mode 100644 index b842874..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.ui.workbench.prefs +++ /dev/null @@ -1,2 +0,0 @@ -ENABLED_DECORATORS=com.altera.sbtgui.project.decorator.bsp\:true,com.altera.sbtgui.project.nios2builddecorator\:true,org.eclipse.cdt.ui.indexedFiles\:false,org.eclipse.cdt.managedbuilder.ui.excludedFile\:true,org.eclipse.cdt.managedbuilder.ui.includeFolder\:true,org.eclipse.cdt.internal.ui.CustomBuildSettingsDecorator\:true,org.eclipse.egit.ui.internal.decorators.GitLightweightDecorator\:true,org.eclipse.linuxtools.tmf.ui.trace_folder.decorator\:true,org.eclipse.linuxtools.tmf.ui.experiment_folder.decorator\:true,org.eclipse.linuxtools.tmf.ui.linked_trace.decorator\:true,org.eclipse.mylyn.context.ui.decorator.interest\:true,org.eclipse.mylyn.tasks.ui.decorators.task\:true,org.eclipse.mylyn.team.ui.changeset.decorator\:true,org.eclipse.rse.core.virtualobject.decorator\:true,org.eclipse.rse.core.binary.executable.decorator\:true,org.eclipse.rse.core.script.executable.decorator\:true,org.eclipse.rse.core.java.executable.decorator\:true,org.eclipse.rse.core.library.decorator\:true,org.eclipse.rse.core.link.decorator\:true,org.eclipse.rse.subsystems.error.decorator\:true,org.eclipse.team.cvs.ui.decorator\:true,org.eclipse.ui.LinkedResourceDecorator\:true,org.eclipse.ui.SymlinkDecorator\:true,org.eclipse.ui.VirtualResourceDecorator\:true,org.eclipse.ui.ContentTypeDecorator\:true,org.eclipse.ui.ResourceFilterDecorator\:false, -eclipse.preferences.version=1 diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.debug.core/.launches/D8M_Camera_Test Nios II Hardware configuration.launch b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.debug.core/.launches/D8M_Camera_Test Nios II Hardware configuration.launch deleted file mode 100644 index 07034d1..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.debug.core/.launches/D8M_Camera_Test Nios II Hardware configuration.launch +++ /dev/null @@ -1,25 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.debug.ui/launchConfigurationHistory.xml b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.debug.ui/launchConfigurationHistory.xml deleted file mode 100644 index 654c898..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.debug.ui/launchConfigurationHistory.xml +++ /dev/null @@ -1,27 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.e4.workbench/workbench.xmi b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.e4.workbench/workbench.xmi deleted file mode 100644 index 28cd811..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.e4.workbench/workbench.xmi +++ /dev/null @@ -1,2114 +0,0 @@ - - - - activeSchemeId:org.eclipse.ui.defaultAcceleratorConfiguration - ModelMigrationProcessor.001 - - - - - - topLevel - shellMaximized - - - - - persp.actionSet:org.eclipse.mylyn.context.ui.actionSet - persp.actionSet:org.eclipse.mylyn.doc.actionSet - persp.actionSet:org.eclipse.mylyn.tasks.ui.navigation - persp.actionSet:org.eclipse.ui.cheatsheets.actionSet - persp.actionSet:org.eclipse.rse.core.search.searchActionSet - persp.actionSet:org.eclipse.search.searchActionSet - persp.actionSet:org.eclipse.ui.edit.text.actionSet.annotationNavigation - persp.actionSet:org.eclipse.ui.edit.text.actionSet.navigation - persp.actionSet:org.eclipse.ui.edit.text.actionSet.convertLineDelimitersTo - persp.actionSet:org.eclipse.ui.externaltools.ExternalToolsSet - persp.actionSet:org.eclipse.ui.actionSet.keyBindings - persp.actionSet:org.eclipse.ui.actionSet.openFiles - persp.actionSet:org.eclipse.cdt.ui.SearchActionSet - persp.actionSet:org.eclipse.cdt.ui.CElementCreationActionSet - persp.actionSet:org.eclipse.ui.NavigateActionSet - persp.viewSC:org.eclipse.ui.console.ConsoleView - persp.viewSC:org.eclipse.search.ui.views.SearchView - persp.viewSC:org.eclipse.ui.views.ContentOutline - persp.viewSC:org.eclipse.ui.views.ProblemView - persp.viewSC:org.eclipse.cdt.ui.CView - persp.viewSC:org.eclipse.ui.views.ResourceNavigator - persp.viewSC:org.eclipse.ui.views.PropertySheet - persp.viewSC:org.eclipse.ui.views.TaskList - persp.actionSet:org.eclipse.debug.ui.launchActionSet - persp.newWizSC:com.altera.sbtgui.ui.newSoftwareExample - persp.newWizSC:com.altera.sbtgui.ui.newApplication - persp.newWizSC:com.altera.sbtgui.ui.newBsp - persp.newWizSC:com.altera.sbtgui.ui.newLibrary - persp.perspSC:com.altera.sbtgui.ui.debugPerspective - persp.viewSC:com.altera.sbtgui.launch.hardware.ByteStreamConsoleView - - - newtablook - - - - - - - - - - newtablook - - - - - newtablook - active - - - - - - - - - - - - - - - - - - - View - categoryTag:Help - - - View - categoryTag:General - - - View - categoryTag:Help - - - - newtablook - org.eclipse.e4.primaryDataStack - EditorStack - - - Editor - org.eclipse.cdt.ui.editor.CEditor - removeOnHide - - menuContribution:popup - popup:#CEditorContext - popup:org.eclipse.cdt.ui.editor.CEditor.EditorContext - popup:#AbstractTextEditorContext - - - menuContribution:popup - popup:#CEditorRulerContext - popup:org.eclipse.cdt.ui.editor.CEditor.RulerContext - popup:#AbstractTextEditorRulerContext - - - menuContribution:popup - popup:#OverviewRulerContext - - - - - Editor - org.eclipse.cdt.ui.editor.CEditor - removeOnHide - - - - - - View - categoryTag:General - - ViewMenu - menuContribution:menu - - - menuContribution:popup - popup:org.eclipse.ui.navigator.ProjectExplorer#PopupMenu - - - - - View - categoryTag:&C/C++ - - - View - categoryTag:General - - - View - categoryTag:General - - - - View - categoryTag:General - - ViewMenu - menuContribution:menu - - - menuContribution:popup - popup:org.eclipse.ui.views.ProblemView - popup:org.eclipse.ui.ide.MarkersView - - - - - - View - categoryTag:General - - ViewMenu - menuContribution:menu - - - - - - View - categoryTag:General - active - activeOnClose - - ViewMenu - menuContribution:menu - - - menuContribution:popup - popup:org.eclipse.ui.MessageConsole.#ContextMenu - - - menuContribution:popup - popup:org.eclipse.cdt.ui.CDTGlobalBuildConsole - - - menuContribution:popup - popup:org.eclipse.cdt.ui.CDTBuildConsole - - - menuContribution:popup - popup:org.eclipse.debug.ui.ProcessConsoleType.#ContextMenu - - - menuContribution:popup - popup:org.eclipse.debug.ui.ProcessConsoleType.#ContextMenu - - - menuContribution:popup - popup:org.eclipse.debug.ui.ProcessConsoleType.#ContextMenu - - - - - View - categoryTag:Nios II - - - - View - categoryTag:General - - ViewMenu - menuContribution:menu - - - - - - View - categoryTag:General - - ViewMenu - menuContribution:menu - - - menuContribution:popup - popup:#TranslationUnitOutlinerContext - - - menuContribution:popup - popup:#TranslationUnitOutlinerContext - - - - - View - categoryTag:Nios II - - - - toolbarSeparator - - - - Draggable - - - - - - - - - - - - - - - - toolbarSeparator - - - - Draggable - - - - - - - - Draggable - - - - - - - Draggable - - - - - - - Draggable - - - - - - toolbarSeparator - - - - Draggable - - - - - - - - - - - - toolbarSeparator - - - - toolbarSeparator - - - - Draggable - - - - - stretch - - - glue - - - - glue - - - Draggable - - - - - stretch - - - - Draggable - - - - - - - - - - - - - - - - - - - - platform:gtk - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Editor - - - View - categoryTag:Profiling - - - View - categoryTag:Profiling - - - View - categoryTag:Profiling - - - View - categoryTag:Profiling - - - View - categoryTag:Nios II - - - View - categoryTag:&C/C++ - - - View - categoryTag:Debug - - - View - categoryTag:Debug - - - View - categoryTag:Debug - - - View - categoryTag:Debug - - - View - categoryTag:Debug - - - View - categoryTag:Debug - - - View - categoryTag:Make - - - View - categoryTag:&C/C++ - - - View - categoryTag:&C/C++ - - - View - categoryTag:&C/C++ - - - View - categoryTag:&C/C++ - - - View - categoryTag:&C/C++ - - - View - categoryTag:General - - - View - categoryTag:Debug - - - View - categoryTag:Debug - - - View - categoryTag:Debug - - - View - categoryTag:Debug - - - View - categoryTag:Debug - - - View - categoryTag:Debug - - - View - categoryTag:Debug - - - View - categoryTag:Git - - - View - categoryTag:Git - - - View - categoryTag:Git - - - View - categoryTag:Git - - - View - categoryTag:Git - - - View - categoryTag:Help - - - View - categoryTag:&C/C++ - - - View - categoryTag:&C/C++ - - - View - categoryTag:Charts - - - View - categoryTag:Profiling - - - View - categoryTag:Profiling - - - View - categoryTag:LTTng - - - View - categoryTag:LTTng - - - View - categoryTag:LTTng - - - View - categoryTag:Man pages - - - View - categoryTag:C/C++ Profiling - - - View - categoryTag:Profiling - - - View - categoryTag:Profiling - - - View - categoryTag:Profiling - - - View - categoryTag:Profiling - - - View - categoryTag:Profiling - - - View - categoryTag:SystemTap - - - View - categoryTag:SystemTap - - - View - categoryTag:SystemTap - - - View - categoryTag:SystemTap - - - View - categoryTag:Tracing - - - View - categoryTag:Tracing - - - View - categoryTag:Tracing - - - View - categoryTag:Tracing - - - View - categoryTag:Tracing - - - View - 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a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.rse.core/initializerMarks/org.eclipse.rse.internal.core.RSELocalConnectionInitializer.mark b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.rse.core/initializerMarks/org.eclipse.rse.internal.core.RSELocalConnectionInitializer.mark deleted file mode 100644 index e69de29..0000000 diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.rse.core/profiles/PRF.ee-mill2_0/FP.local.files_0/node.properties b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.rse.core/profiles/PRF.ee-mill2_0/FP.local.files_0/node.properties deleted file mode 100644 index 4f8cbbb..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.rse.core/profiles/PRF.ee-mill2_0/FP.local.files_0/node.properties +++ /dev/null @@ -1,57 +0,0 @@ -# RSE DOM Node -00-name=ee-mill2\:local.files -01-type=FilterPool -03-attr.default=true -03-attr.deletable=true -03-attr.id=local.files -03-attr.nonRenamable=false -03-attr.owningParentName=null -03-attr.release=200 -03-attr.singleFilterStringOnly=false -03-attr.singleFilterStringOnlyESet=false -03-attr.stringsCaseSensitive=true -03-attr.supportsDuplicateFilterStrings=false -03-attr.supportsNestedFilters=true -03-attr.type=default -06-child.00000.00-name=My Home -06-child.00000.01-type=Filter -06-child.00000.03-attr.default=false -06-child.00000.03-attr.filterType=default -06-child.00000.03-attr.id=My Home -06-child.00000.03-attr.nonChangable=false -06-child.00000.03-attr.nonDeletable=false -06-child.00000.03-attr.nonRenamable=false -06-child.00000.03-attr.promptable=false -06-child.00000.03-attr.relativeOrder=0 -06-child.00000.03-attr.release=200 -06-child.00000.03-attr.singleFilterStringOnly=false -06-child.00000.03-attr.stringsCaseSensitive=true -06-child.00000.03-attr.stringsNonChangable=false -06-child.00000.03-attr.supportsDuplicateFilterStrings=false -06-child.00000.03-attr.supportsNestedFilters=true -06-child.00000.06-child.00000.00-name=/home/ad3919/* -06-child.00000.06-child.00000.01-type=FilterString -06-child.00000.06-child.00000.03-attr.default=false -06-child.00000.06-child.00000.03-attr.string=/home/ad3919/* -06-child.00000.06-child.00000.03-attr.type=default -06-child.00001.00-name=Root -06-child.00001.01-type=Filter -06-child.00001.03-attr.default=false -06-child.00001.03-attr.filterType=default -06-child.00001.03-attr.id=Root -06-child.00001.03-attr.nonChangable=false -06-child.00001.03-attr.nonDeletable=false -06-child.00001.03-attr.nonRenamable=false -06-child.00001.03-attr.promptable=false -06-child.00001.03-attr.relativeOrder=0 -06-child.00001.03-attr.release=200 -06-child.00001.03-attr.singleFilterStringOnly=false -06-child.00001.03-attr.stringsCaseSensitive=true -06-child.00001.03-attr.stringsNonChangable=false -06-child.00001.03-attr.supportsDuplicateFilterStrings=false -06-child.00001.03-attr.supportsNestedFilters=true -06-child.00001.06-child.00000.00-name=/* -06-child.00001.06-child.00000.01-type=FilterString -06-child.00001.06-child.00000.03-attr.default=false -06-child.00001.06-child.00000.03-attr.string=/* -06-child.00001.06-child.00000.03-attr.type=default diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.rse.core/profiles/PRF.ee-mill2_0/H.local_16/node.properties b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.rse.core/profiles/PRF.ee-mill2_0/H.local_16/node.properties deleted file mode 100644 index 2366177..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.rse.core/profiles/PRF.ee-mill2_0/H.local_16/node.properties +++ /dev/null @@ -1,25 +0,0 @@ -# RSE DOM Node -00-name=Local -01-type=Host -03-attr.description= -03-attr.hostname=LOCALHOST -03-attr.offline=false -03-attr.promptable=false -03-attr.systemType=org.eclipse.rse.systemtype.local -03-attr.type=Local -06-child.00000.00-name=Local Connector Service -06-child.00000.01-type=ConnectorService -06-child.00000.03-attr.group=Local Connector Service -06-child.00000.03-attr.port=0 -06-child.00000.03-attr.useSSL=false -06-child.00000.06-child.00000.00-name=Local Files -06-child.00000.06-child.00000.01-type=SubSystem -06-child.00000.06-child.00000.03-attr.hidden=false -06-child.00000.06-child.00000.03-attr.type=local.files -06-child.00000.06-child.00000.06-child.00000.00-name=ee-mill2___ee-mill2\:local.files -06-child.00000.06-child.00000.06-child.00000.01-type=FilterPoolReference -06-child.00000.06-child.00000.06-child.00000.03-attr.refID=local.files -06-child.00000.06-child.00001.00-name=Local Shells -06-child.00000.06-child.00001.01-type=SubSystem -06-child.00000.06-child.00001.03-attr.hidden=false -06-child.00000.06-child.00001.03-attr.type=local.shells diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.rse.core/profiles/PRF.ee-mill2_0/node.properties b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.rse.core/profiles/PRF.ee-mill2_0/node.properties deleted file mode 100644 index c6d3c97..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.rse.core/profiles/PRF.ee-mill2_0/node.properties +++ /dev/null @@ -1,7 +0,0 @@ -# RSE DOM Node -00-name=ee-mill2 -01-type=Profile -03-attr.defaultPrivate=true -03-attr.isActive=true -05-ref.00000=FP.local.files_0 -05-ref.00001=H.local_16 diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.rse.ui/.log b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.rse.ui/.log deleted file mode 100644 index e69de29..0000000 diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.ui.workbench/dialog_settings.xml b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.ui.workbench/dialog_settings.xml deleted file mode 100644 index 57b71cf..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.ui.workbench/dialog_settings.xml +++ /dev/null @@ -1,15 +0,0 @@ - -

    -
    - - - - - - - - - - -
    -
    diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.ui.workbench/workingsets.xml b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.ui.workbench/workingsets.xml deleted file mode 100644 index e455102..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/.plugins/org.eclipse.ui.workbench/workingsets.xml +++ /dev/null @@ -1,4 +0,0 @@ - - - - \ No newline at end of file diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/version.ini b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/version.ini deleted file mode 100644 index c51ff74..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/.metadata/version.ini +++ /dev/null @@ -1 +0,0 @@ -org.eclipse.core.runtime=1 \ No newline at end of file diff --git a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/RemoteSystemsTempFiles/.project b/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/RemoteSystemsTempFiles/.project deleted file mode 100644 index 5447a64..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/sbtWorkspace/RemoteSystemsTempFiles/.project +++ /dev/null @@ -1,12 +0,0 @@ - - - RemoteSystemsTempFiles - - - - - - - org.eclipse.rse.ui.remoteSystemsTempNature - - diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/.cproject b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/.cproject index 9d3e177..ff3bb77 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/.cproject +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/.cproject @@ -1,44 +1,37 @@ - - + + - + - - - - - - - + + + + + + + - - + + - - - - - - - - - - + + + + - + - @@ -47,15 +40,15 @@ - + - + - + diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/.settings/language.settings.xml b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/.settings/language.settings.xml index 9bc992e..1eda590 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/.settings/language.settings.xml +++ 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-/usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-memcpy.o) - /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-dtoa.o) (memcpy) -/usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-memmove.o) - /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-fvwrite.o) (memmove) -/usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-mprec.o) - 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-/usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a(_umoddi3.o) - /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-vfprintf.o) (__umoddi3) -/usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a(adddf3.o) - /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-dtoa.o) (__adddf3) -/usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a(divdf3.o) - /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-dtoa.o) (__divdf3) -/usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a(eqdf2.o) - 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f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-wcrtomb.o) (__wctomb) +f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(_udivdi3.o) + f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-vfprintf.o) (__udivdi3) +f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(_umoddi3.o) + f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-vfprintf.o) (__umoddi3) +f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(adddf3.o) + f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-dtoa.o) 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f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-vfprintf.o) (__ltdf2) +f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(muldf3.o) + f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-dtoa.o) (__muldf3) +f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(subdf3.o) + f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-dtoa.o) (__subdf3) +f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(fixdfsi.o) + f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-dtoa.o) (__fixdfsi) +f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(floatsidf.o) + f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-dtoa.o) (__floatsidf) +f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(floatunsidf.o) + f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-dtoa.o) (__floatunsidf) +f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(_clz.o) + f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(_udivdi3.o) (__clz_tab) +f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(_clzsi2.o) + f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(adddf3.o) (__clzsi2) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_close.o) + f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(closer.o) (close) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_dev.o) + ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_close.o) (alt_fd_list) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_errno.o) + ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_close.o) (alt_errno) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_fstat.o) + f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-fstatr.o) (fstat) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_isatty.o) + f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-isattyr.o) (isatty) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_load.o) ../D8M_Camera_Test_bsp//obj/HAL/src/crt0.o (alt_load) -../D8M_Camera_Test_bsp//libhal_bsp.a(alt_lseek.o) - /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-lseekr.o) (lseek) -../D8M_Camera_Test_bsp//libhal_bsp.a(alt_main.o) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_lseek.o) + f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-lseekr.o) (lseek) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_main.o) ../D8M_Camera_Test_bsp//obj/HAL/src/crt0.o (alt_main) -../D8M_Camera_Test_bsp//libhal_bsp.a(alt_malloc_lock.o) - /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-mallocr.o) (__malloc_lock) -../D8M_Camera_Test_bsp//libhal_bsp.a(alt_read.o) - /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-readr.o) (read) -../D8M_Camera_Test_bsp//libhal_bsp.a(alt_release_fd.o) - ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_close.o) (alt_release_fd) -../D8M_Camera_Test_bsp//libhal_bsp.a(alt_sbrk.o) - /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-sbrkr.o) (sbrk) -../D8M_Camera_Test_bsp//libhal_bsp.a(alt_tick.o) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_malloc_lock.o) + f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-mallocr.o) (__malloc_lock) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_read.o) + f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-readr.o) (read) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_release_fd.o) + ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_close.o) (alt_release_fd) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_sbrk.o) + f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-sbrkr.o) (sbrk) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_tick.o) obj/default/auto_focus.o (_alt_tick_rate) -../D8M_Camera_Test_bsp//libhal_bsp.a(alt_usleep.o) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_usleep.o) obj/default/I2C_core.o (usleep) -../D8M_Camera_Test_bsp//libhal_bsp.a(alt_write.o) - /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-writer.o) (write) -../D8M_Camera_Test_bsp//libhal_bsp.a(alt_sys_init.o) - ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_main.o) (alt_irq_init) -../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_fd.o) - ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_sys_init.o) (altera_avalon_jtag_uart_read_fd) -../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_init.o) - ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_sys_init.o) (altera_avalon_jtag_uart_init) -../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_ioctl.o) - ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_fd.o) (altera_avalon_jtag_uart_ioctl) -../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_read.o) - ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_fd.o) (altera_avalon_jtag_uart_read) -../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_write.o) - ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_fd.o) (altera_avalon_jtag_uart_write) -../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_timer_sc.o) - ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_sys_init.o) (alt_avalon_timer_sc_init) -../D8M_Camera_Test_bsp//libhal_bsp.a(alt_alarm_start.o) - ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_init.o) (alt_alarm_start) -../D8M_Camera_Test_bsp//libhal_bsp.a(alt_busy_sleep.o) - ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_usleep.o) (alt_busy_sleep) -../D8M_Camera_Test_bsp//libhal_bsp.a(alt_dcache_flush_all.o) - ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_load.o) (alt_dcache_flush_all) -../D8M_Camera_Test_bsp//libhal_bsp.a(alt_dev_llist_insert.o) - ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_sys_init.o) (alt_dev_llist_insert) -../D8M_Camera_Test_bsp//libhal_bsp.a(alt_do_ctors.o) - ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_main.o) (_do_ctors) -../D8M_Camera_Test_bsp//libhal_bsp.a(alt_do_dtors.o) - ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_main.o) (_do_dtors) -../D8M_Camera_Test_bsp//libhal_bsp.a(alt_icache_flush_all.o) - ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_load.o) (alt_icache_flush_all) -../D8M_Camera_Test_bsp//libhal_bsp.a(alt_iic.o) - ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_init.o) (alt_ic_isr_register) -../D8M_Camera_Test_bsp//libhal_bsp.a(alt_iic_isr_register.o) - ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_iic.o) (alt_iic_isr_register) -../D8M_Camera_Test_bsp//libhal_bsp.a(alt_io_redirect.o) - ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_main.o) (alt_io_redirect) -../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_entry.o) - ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_iic_isr_register.o) (alt_irq_entry) -../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_handler.o) - ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_iic_isr_register.o) (alt_irq) -../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_vars.o) - ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_iic.o) (alt_irq_active) -../D8M_Camera_Test_bsp//libhal_bsp.a(alt_open.o) - ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_io_redirect.o) (open) -../D8M_Camera_Test_bsp//libhal_bsp.a(altera_nios2_gen2_irq.o) - ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_sys_init.o) (altera_nios2_gen2_irq_init) -../D8M_Camera_Test_bsp//libhal_bsp.a(alt_exception_entry.o) - ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_entry.o) (alt_exception) -../D8M_Camera_Test_bsp//libhal_bsp.a(alt_find_dev.o) - ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_open.o) (alt_find_dev) -../D8M_Camera_Test_bsp//libhal_bsp.a(alt_find_file.o) - ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_open.o) (alt_find_file) -../D8M_Camera_Test_bsp//libhal_bsp.a(alt_get_fd.o) - ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_open.o) (alt_get_fd) -../D8M_Camera_Test_bsp//libhal_bsp.a(alt_icache_flush.o) - ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_icache_flush_all.o) (alt_icache_flush) -../D8M_Camera_Test_bsp//libhal_bsp.a(alt_instruction_exception_entry.o) - ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_exception_entry.o) (alt_instruction_exception_entry) -/usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-atexit.o) - ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_main.o) (atexit) -/usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-exit.o) - ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_main.o) (exit) -/usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-memcmp.o) - ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_find_dev.o) (memcmp) -/usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-__atexit.o) - /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-atexit.o) (__register_exitproc) -/usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-__call_atexit.o) - /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-exit.o) (__call_exitprocs) -../D8M_Camera_Test_bsp//libhal_bsp.a(alt_exit.o) - /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-exit.o) (_exit) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_write.o) + f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-writer.o) (write) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_sys_init.o) + ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_main.o) (alt_irq_init) +../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_fd.o) + ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_sys_init.o) (altera_avalon_jtag_uart_read_fd) +../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_init.o) + ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_sys_init.o) (altera_avalon_jtag_uart_init) +../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_ioctl.o) + ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_fd.o) (altera_avalon_jtag_uart_ioctl) +../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_read.o) + ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_fd.o) (altera_avalon_jtag_uart_read) +../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_write.o) + ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_fd.o) (altera_avalon_jtag_uart_write) +../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_timer_sc.o) + ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_sys_init.o) (alt_avalon_timer_sc_init) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_alarm_start.o) + ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_init.o) (alt_alarm_start) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_busy_sleep.o) + ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_usleep.o) (alt_busy_sleep) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_dcache_flush_all.o) + ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_load.o) (alt_dcache_flush_all) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_dev_llist_insert.o) + ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_sys_init.o) (alt_dev_llist_insert) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_do_ctors.o) + ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_main.o) (_do_ctors) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_do_dtors.o) + ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_main.o) (_do_dtors) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_icache_flush_all.o) + ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_load.o) (alt_icache_flush_all) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_iic.o) + ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_init.o) (alt_ic_isr_register) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_iic_isr_register.o) + ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_iic.o) (alt_iic_isr_register) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_io_redirect.o) + ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_main.o) (alt_io_redirect) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_irq_entry.o) + ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_iic_isr_register.o) (alt_irq_entry) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_irq_handler.o) + ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_iic_isr_register.o) (alt_irq) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_irq_vars.o) + ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_iic.o) (alt_irq_active) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_open.o) + ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_io_redirect.o) (open) +../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_nios2_gen2_irq.o) + ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_sys_init.o) (altera_nios2_gen2_irq_init) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_exception_entry.o) + ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_irq_entry.o) (alt_exception) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_find_dev.o) + ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_open.o) (alt_find_dev) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_find_file.o) + ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_open.o) (alt_find_file) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_get_fd.o) + ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_open.o) (alt_get_fd) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_icache_flush.o) + ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_icache_flush_all.o) (alt_icache_flush) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_instruction_exception_entry.o) + ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_exception_entry.o) (alt_instruction_exception_entry) +f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-atexit.o) + ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_main.o) (atexit) +f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-exit.o) + ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_main.o) (exit) +f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-memcmp.o) + ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_find_dev.o) (memcmp) +f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-__atexit.o) + f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-atexit.o) (__register_exitproc) +f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-__call_atexit.o) + f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-exit.o) (__call_exitprocs) +../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_exit.o) + f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-exit.o) (_exit) Allocating common symbols Common symbol size file -alt_irq 0x100 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_handler.o) -errno 0x4 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-int_errno.o) +alt_irq 0x100 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_irq_handler.o) +errno 0x4 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-int_errno.o) Memory Configuration @@ -243,16 +235,16 @@ LOAD obj/default/main.o LOAD obj/default/mipi_bridge_config.o LOAD obj/default/mipi_camera_config.o LOAD obj/default/queue.o -LOAD /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libstdc++.a -LOAD /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libm.a -LOAD /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a +LOAD f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libstdc++.a +LOAD f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libm.a +LOAD f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a START GROUP -LOAD /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a -LOAD /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a -LOAD ../D8M_Camera_Test_bsp//libhal_bsp.a -LOAD /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libm.a +LOAD f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a +LOAD f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a +LOAD ../D8M_Camera_Test_bsp/\libhal_bsp.a +LOAD f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libm.a END GROUP -LOAD /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a +LOAD f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a 0x0000000000020000 __alt_mem_onchip_memory2_0 = 0x20000 .entry 0x0000000000020000 0x20 @@ -266,59 +258,59 @@ LOAD /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gc *(.irq) *(.exceptions.entry.label) .exceptions.entry.label - 0x0000000000020020 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_entry.o) + 0x0000000000020020 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_irq_entry.o) 0x0000000000020020 alt_irq_entry .exceptions.entry.label - 0x0000000000020020 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_exception_entry.o) + 0x0000000000020020 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_exception_entry.o) 0x0000000000020020 alt_exception *(.exceptions.entry.user) *(.exceptions.entry.ecc_fatal) *(.exceptions.entry) .exceptions.entry - 0x0000000000020020 0x54 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_exception_entry.o) + 0x0000000000020020 0x54 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_exception_entry.o) *(.exceptions.irqtest.user) *(.exceptions.irqtest) .exceptions.irqtest - 0x0000000000020074 0x10 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_entry.o) + 0x0000000000020074 0x10 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_irq_entry.o) *(.exceptions.irqhandler.user) *(.exceptions.irqhandler) .exceptions.irqhandler - 0x0000000000020084 0x4 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_entry.o) + 0x0000000000020084 0x4 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_irq_entry.o) *(.exceptions.irqreturn.user) *(.exceptions.irqreturn) .exceptions.irqreturn - 0x0000000000020088 0x4 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_entry.o) + 0x0000000000020088 0x4 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_irq_entry.o) *(.exceptions.notirq.label) .exceptions.notirq.label - 0x000000000002008c 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_entry.o) + 0x000000000002008c 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_irq_entry.o) *(.exceptions.notirq.user) *(.exceptions.notirq) .exceptions.notirq - 0x000000000002008c 0x8 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_exception_entry.o) + 0x000000000002008c 0x8 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_exception_entry.o) *(.exceptions.soft.user) *(.exceptions.soft) *(.exceptions.unknown.user) *(.exceptions.unknown) .exceptions.unknown - 0x0000000000020094 0x14 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_exception_entry.o) + 0x0000000000020094 0x14 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_exception_entry.o) *(.exceptions.exit.label) .exceptions.exit.label - 0x00000000000200a8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_entry.o) + 0x00000000000200a8 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_irq_entry.o) .exceptions.exit.label - 0x00000000000200a8 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_exception_entry.o) + 0x00000000000200a8 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_exception_entry.o) *(.exceptions.exit.user) *(.exceptions.exit) .exceptions.exit - 0x00000000000200a8 0x54 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_exception_entry.o) + 0x00000000000200a8 0x54 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_exception_entry.o) *(.exceptions) - .exceptions 0x00000000000200fc 0xd4 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_handler.o) + .exceptions 0x00000000000200fc 0xd4 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_irq_handler.o) 0x00000000000200fc alt_irq_handler - .exceptions 0x00000000000201d0 0x74 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_instruction_exception_entry.o) + .exceptions 0x00000000000201d0 0x74 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_instruction_exception_entry.o) 0x00000000000201d0 alt_instruction_exception_entry 0x0000000000020244 PROVIDE (__ram_exceptions_end, ABSOLUTE (.)) 0x0000000000020020 PROVIDE (__flash_exceptions_start, LOADADDR (.exceptions)) -.text 0x0000000000020244 0x120fc +.text 0x0000000000020244 0x117d8 [!provide] PROVIDE (stext, ABSOLUTE (.)) *(.interp) *(.hash) @@ -383,513 +375,492 @@ LOAD /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gc 0x000000000002103c Focus_Init 0x0000000000021164 Focus_Window 0x0000000000021344 Focus_Released - .text 0x00000000000213f4 0x778 obj/default/main.o + .text 0x00000000000213f4 0x588 obj/default/main.o 0x00000000000213f4 mipi_clear_error 0x00000000000214ac mipi_show_error_info 0x0000000000021544 mipi_show_error_info_more 0x00000000000216bc MIPI_Init 0x0000000000021744 main - .text 0x0000000000021b6c 0x260 obj/default/mipi_bridge_config.o - 0x0000000000021b6c nSWAP16 - 0x0000000000021bb8 MipiBridgeRegWrite - 0x0000000000021c24 MipiBridgeRegRead - 0x0000000000021c9c MipiBridgeInit - .text 0x0000000000021dcc 0x8bc obj/default/mipi_camera_config.o - 0x0000000000021dcc OV8865_read_cmos_sensor_8 - 0x0000000000021e30 OV8865_write_cmos_sensor_8 - 0x0000000000021e9c OV8865_write_AF - 0x0000000000021f08 OV8865_read_AF - 0x0000000000021f88 OV8865_FOCUS_Move_to - 0x0000000000022058 OV8865SetExposure - 0x0000000000022138 OV8865SetGain - 0x0000000000022204 OV8865ReadExposure - 0x00000000000222c0 MIPI_BIN_LEVEL - 0x0000000000022480 MipiCameraInit - .text 0x0000000000022688 0x2a0 obj/default/queue.o - 0x0000000000022688 QUEUE_New - 0x00000000000226f8 QUEUE_Delete - 0x000000000002272c QUEUE_IsEmpty - 0x000000000002276c QUEUE_IsFull - 0x00000000000227d0 QUEUE_Push - 0x0000000000022864 QUEUE_Pop - 0x00000000000228f4 QUEUE_Empty - .text 0x0000000000022928 0x1b4 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a(lib2-divmod.o) - 0x0000000000022928 __divsi3 - 0x00000000000229ac __modsi3 - 0x0000000000022a20 __udivsi3 - 0x0000000000022a84 __umodsi3 - .text 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../D8M_Camera_Test_bsp//libhal_bsp.a(alt_dev.o) - .text 0x000000000002f8b4 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_errno.o) - .text 0x000000000002f8b4 0x170 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_fcntl.o) - 0x000000000002f904 fcntl - .text 0x000000000002fa24 0x100 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_fstat.o) - 0x000000000002fa74 fstat - .text 0x000000000002fb24 0xf4 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_isatty.o) - 0x000000000002fb74 isatty - .text 0x000000000002fc18 0xec ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_load.o) - 0x000000000002fc80 alt_load - .text 0x000000000002fd04 0x124 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_lseek.o) - 0x000000000002fd54 lseek - .text 0x000000000002fe28 0x7c ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_main.o) - 0x000000000002fe28 alt_main - .text 0x000000000002fea4 0x48 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_malloc_lock.o) - 0x000000000002fea4 __malloc_lock - 0x000000000002fec8 __malloc_unlock - .text 0x000000000002feec 0x14c ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_read.o) - 0x000000000002ff3c read - .text 0x0000000000030038 0x64 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_release_fd.o) - 0x0000000000030038 alt_release_fd - .text 0x000000000003009c 0xb0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_sbrk.o) - 0x000000000003009c sbrk - .text 0x000000000003014c 0x1a4 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_tick.o) - 0x000000000003014c alt_alarm_stop - 0x00000000000301e8 alt_tick - .text 0x00000000000302f0 0x30 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_usleep.o) - 0x00000000000302f0 usleep - .text 0x0000000000030320 0x148 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_write.o) - 0x0000000000030370 write - .text 0x0000000000030468 0xd4 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_sys_init.o) - 0x00000000000304a0 alt_irq_init - 0x00000000000304d8 alt_sys_init - .text 0x000000000003053c 0x164 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_fd.o) - 0x000000000003053c altera_avalon_jtag_uart_read_fd - 0x000000000003059c altera_avalon_jtag_uart_write_fd - 0x00000000000305fc altera_avalon_jtag_uart_close_fd - 0x000000000003064c altera_avalon_jtag_uart_ioctl_fd - .text 0x00000000000306a0 0x3e4 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_init.o) - 0x00000000000306a0 altera_avalon_jtag_uart_init - 0x0000000000030a1c altera_avalon_jtag_uart_close - .text 0x0000000000030a84 0xf0 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_ioctl.o) - 0x0000000000030a84 altera_avalon_jtag_uart_ioctl - .text 0x0000000000030b74 0x21c ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_read.o) - 0x0000000000030b74 altera_avalon_jtag_uart_read - .text 0x0000000000030d90 0x224 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_write.o) - 0x0000000000030d90 altera_avalon_jtag_uart_write - .text 0x0000000000030fb4 0x104 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_timer_sc.o) - 0x000000000003102c alt_avalon_timer_sc_init - .text 0x00000000000310b8 0x140 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_alarm_start.o) - 0x00000000000310b8 alt_alarm_start - .text 0x00000000000311f8 0x158 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_busy_sleep.o) - 0x00000000000311f8 alt_busy_sleep - .text 0x0000000000031350 0x48 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_dcache_flush_all.o) - 0x0000000000031350 alt_dcache_flush_all - .text 0x0000000000031398 0xf4 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_dev_llist_insert.o) - 0x00000000000313e8 alt_dev_llist_insert - .text 0x000000000003148c 0x60 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_do_ctors.o) - 0x000000000003148c _do_ctors - .text 0x00000000000314ec 0x60 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_do_dtors.o) - 0x00000000000314ec _do_dtors - .text 0x000000000003154c 0x34 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_icache_flush_all.o) - 0x000000000003154c alt_icache_flush_all - .text 0x0000000000031580 0x1e0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_iic.o) - 0x0000000000031580 alt_ic_isr_register - 0x00000000000315d0 alt_ic_irq_enable - 0x0000000000031670 alt_ic_irq_disable - 0x0000000000031714 alt_ic_irq_enabled - .text 0x0000000000031760 0xf0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_iic_isr_register.o) - 0x0000000000031760 alt_iic_isr_register - .text 0x0000000000031850 0x140 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_io_redirect.o) - 0x0000000000031914 alt_io_redirect - .text 0x0000000000031990 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_entry.o) - .text 0x0000000000031990 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_handler.o) - .text 0x0000000000031990 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_vars.o) - .text 0x0000000000031990 0x274 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_open.o) - 0x0000000000031aac open - .text 0x0000000000031c04 0x24 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_nios2_gen2_irq.o) - 0x0000000000031c04 altera_nios2_gen2_irq_init - .text 0x0000000000031c28 0x0 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_exception_entry.o) - .text 0x0000000000031c28 0x90 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_find_dev.o) - 0x0000000000031c28 alt_find_dev - .text 0x0000000000031cb8 0x114 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_find_file.o) - 0x0000000000031cb8 alt_find_file - .text 0x0000000000031dcc 0xb4 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_get_fd.o) - 0x0000000000031dcc alt_get_fd - .text 0x0000000000031e80 0x90 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_icache_flush.o) - 0x0000000000031e80 alt_icache_flush - .text 0x0000000000031f10 0x9c ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_instruction_exception_entry.o) - 0x0000000000031f10 alt_exception_cause_generated_bad_addr - .text 0x0000000000031fac 0x0 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-atexit.o) - .text.atexit 0x0000000000031fac 0x14 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-atexit.o) - 0x0000000000031fac atexit - .text 0x0000000000031fc0 0x0 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-exit.o) - .text.exit 0x0000000000031fc0 0x38 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-exit.o) - 0x0000000000031fc0 exit - .text 0x0000000000031ff8 0x0 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-memcmp.o) - .text.memcmp 0x0000000000031ff8 0x7c /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-memcmp.o) - 0x0000000000031ff8 memcmp - .text 0x0000000000032074 0x0 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-__atexit.o) + 0x000000000002be40 0x5c f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-wctomb_r.o) + 0x000000000002be40 _wctomb_r + .text 0x000000000002be9c 0x578 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(_udivdi3.o) + 0x000000000002be9c __udivdi3 + .text 0x000000000002c414 0x538 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(_umoddi3.o) + 0x000000000002c414 __umoddi3 + .text 0x000000000002c94c 0x8ac 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f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(muldf3.o) + 0x000000000002dd38 __muldf3 + .text 0x000000000002e450 0x8fc f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(subdf3.o) + 0x000000000002e450 __subdf3 + .text 0x000000000002ed4c 0x80 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(fixdfsi.o) + 0x000000000002ed4c __fixdfsi + .text 0x000000000002edcc 0xdc f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(floatsidf.o) + 0x000000000002edcc __floatsidf + .text 0x000000000002eea8 0xa8 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(floatunsidf.o) + 0x000000000002eea8 __floatunsidf + .text 0x000000000002ef50 0x0 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(_clz.o) + .text 0x000000000002ef50 0x64 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(_clzsi2.o) + 0x000000000002ef50 __clzsi2 + .text 0x000000000002efb4 0x120 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_close.o) + 0x000000000002f004 close + .text 0x000000000002f0d4 0x2c ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_dev.o) + .text 0x000000000002f100 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_errno.o) + .text 0x000000000002f100 0x100 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_fstat.o) + 0x000000000002f150 fstat + .text 0x000000000002f200 0xf4 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_isatty.o) + 0x000000000002f250 isatty + .text 0x000000000002f2f4 0xec ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_load.o) + 0x000000000002f35c alt_load + .text 0x000000000002f3e0 0x124 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_lseek.o) + 0x000000000002f430 lseek + .text 0x000000000002f504 0x7c ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_main.o) + 0x000000000002f504 alt_main + .text 0x000000000002f580 0x48 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_malloc_lock.o) + 0x000000000002f580 __malloc_lock + 0x000000000002f5a4 __malloc_unlock + .text 0x000000000002f5c8 0x14c ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_read.o) + 0x000000000002f618 read + .text 0x000000000002f714 0x64 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_release_fd.o) + 0x000000000002f714 alt_release_fd + .text 0x000000000002f778 0xb0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_sbrk.o) + 0x000000000002f778 sbrk + .text 0x000000000002f828 0x1a4 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_tick.o) + 0x000000000002f828 alt_alarm_stop + 0x000000000002f8c4 alt_tick + .text 0x000000000002f9cc 0x30 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_usleep.o) + 0x000000000002f9cc usleep + .text 0x000000000002f9fc 0x148 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_write.o) + 0x000000000002fa4c write + .text 0x000000000002fb44 0xd4 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_sys_init.o) + 0x000000000002fb7c alt_irq_init + 0x000000000002fbb4 alt_sys_init + .text 0x000000000002fc18 0x164 ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_fd.o) + 0x000000000002fc18 altera_avalon_jtag_uart_read_fd + 0x000000000002fc78 altera_avalon_jtag_uart_write_fd + 0x000000000002fcd8 altera_avalon_jtag_uart_close_fd + 0x000000000002fd28 altera_avalon_jtag_uart_ioctl_fd + .text 0x000000000002fd7c 0x3e4 ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_init.o) + 0x000000000002fd7c altera_avalon_jtag_uart_init + 0x00000000000300f8 altera_avalon_jtag_uart_close + .text 0x0000000000030160 0xf0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_ioctl.o) + 0x0000000000030160 altera_avalon_jtag_uart_ioctl + .text 0x0000000000030250 0x21c ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_read.o) + 0x0000000000030250 altera_avalon_jtag_uart_read + .text 0x000000000003046c 0x224 ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_write.o) + 0x000000000003046c altera_avalon_jtag_uart_write + .text 0x0000000000030690 0x104 ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_timer_sc.o) + 0x0000000000030708 alt_avalon_timer_sc_init + .text 0x0000000000030794 0x140 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_alarm_start.o) + 0x0000000000030794 alt_alarm_start + .text 0x00000000000308d4 0x158 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_busy_sleep.o) + 0x00000000000308d4 alt_busy_sleep + .text 0x0000000000030a2c 0x48 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_dcache_flush_all.o) + 0x0000000000030a2c alt_dcache_flush_all + .text 0x0000000000030a74 0xf4 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_dev_llist_insert.o) + 0x0000000000030ac4 alt_dev_llist_insert + .text 0x0000000000030b68 0x60 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_do_ctors.o) + 0x0000000000030b68 _do_ctors + .text 0x0000000000030bc8 0x60 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_do_dtors.o) + 0x0000000000030bc8 _do_dtors + .text 0x0000000000030c28 0x34 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_icache_flush_all.o) + 0x0000000000030c28 alt_icache_flush_all + .text 0x0000000000030c5c 0x1e0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_iic.o) + 0x0000000000030c5c alt_ic_isr_register + 0x0000000000030cac alt_ic_irq_enable + 0x0000000000030d4c alt_ic_irq_disable + 0x0000000000030df0 alt_ic_irq_enabled + .text 0x0000000000030e3c 0xf0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_iic_isr_register.o) + 0x0000000000030e3c alt_iic_isr_register + .text 0x0000000000030f2c 0x140 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_io_redirect.o) + 0x0000000000030ff0 alt_io_redirect + .text 0x000000000003106c 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_irq_entry.o) + .text 0x000000000003106c 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_irq_handler.o) + .text 0x000000000003106c 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_irq_vars.o) + .text 0x000000000003106c 0x274 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_open.o) + 0x0000000000031188 open + .text 0x00000000000312e0 0x24 ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_nios2_gen2_irq.o) + 0x00000000000312e0 altera_nios2_gen2_irq_init + .text 0x0000000000031304 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_exception_entry.o) + .text 0x0000000000031304 0x90 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_find_dev.o) + 0x0000000000031304 alt_find_dev + .text 0x0000000000031394 0x114 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_find_file.o) + 0x0000000000031394 alt_find_file + .text 0x00000000000314a8 0xb4 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_get_fd.o) + 0x00000000000314a8 alt_get_fd + .text 0x000000000003155c 0x90 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_icache_flush.o) + 0x000000000003155c alt_icache_flush + .text 0x00000000000315ec 0x9c ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_instruction_exception_entry.o) + 0x00000000000315ec alt_exception_cause_generated_bad_addr + .text 0x0000000000031688 0x0 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-atexit.o) + .text.atexit 0x0000000000031688 0x14 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-atexit.o) + 0x0000000000031688 atexit + .text 0x000000000003169c 0x0 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-exit.o) + .text.exit 0x000000000003169c 0x38 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-exit.o) + 0x000000000003169c exit + .text 0x00000000000316d4 0x0 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-memcmp.o) + .text.memcmp 0x00000000000316d4 0x7c f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-memcmp.o) + 0x00000000000316d4 memcmp + .text 0x0000000000031750 0x0 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-__atexit.o) .text.__register_exitproc - 0x0000000000032074 0x118 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-__atexit.o) - 0x0000000000032074 __register_exitproc - .text 0x000000000003218c 0x0 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-__call_atexit.o) + 0x0000000000031750 0x118 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-__atexit.o) + 0x0000000000031750 __register_exitproc + .text 0x0000000000031868 0x0 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-__call_atexit.o) .text.__call_exitprocs - 0x000000000003218c 0x180 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-__call_atexit.o) - 0x000000000003218c __call_exitprocs - .text 0x000000000003230c 0x34 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_exit.o) - 0x000000000003230c _exit + 0x0000000000031868 0x180 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-__call_atexit.o) + 0x0000000000031868 __call_exitprocs + .text 0x00000000000319e8 0x34 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_exit.o) + 0x00000000000319e8 _exit *(.gnu.warning.*) *(.fini) [!provide] PROVIDE (__etext, ABSOLUTE (.)) [!provide] PROVIDE (_etext, ABSOLUTE (.)) [!provide] PROVIDE (etext, ABSOLUTE (.)) *(.eh_frame_hdr) - 0x0000000000032340 . = ALIGN (0x4) + 0x0000000000031a1c . = ALIGN (0x4) [!provide] PROVIDE (__preinit_array_start, ABSOLUTE (.)) *(.preinit_array) [!provide] PROVIDE (__preinit_array_end, ABSOLUTE (.)) @@ -902,442 +873,434 @@ LOAD /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gc *(.eh_frame) *(.gcc_except_table .gcc_except_table.*) *(.dynamic) - 0x0000000000032340 PROVIDE (__CTOR_LIST__, ABSOLUTE (.)) + 0x0000000000031a1c PROVIDE (__CTOR_LIST__, ABSOLUTE (.)) *(.ctors) *(SORT(.ctors.*)) - 0x0000000000032340 PROVIDE (__CTOR_END__, ABSOLUTE (.)) - 0x0000000000032340 PROVIDE (__DTOR_LIST__, ABSOLUTE (.)) + 0x0000000000031a1c PROVIDE (__CTOR_END__, ABSOLUTE (.)) + 0x0000000000031a1c PROVIDE (__DTOR_LIST__, ABSOLUTE (.)) *(.dtors) *(SORT(.dtors.*)) - 0x0000000000032340 PROVIDE (__DTOR_END__, ABSOLUTE (.)) + 0x0000000000031a1c PROVIDE (__DTOR_END__, ABSOLUTE (.)) *(.jcr) - 0x0000000000032340 . = ALIGN (0x4) + 0x0000000000031a1c . = ALIGN (0x4) -.rodata 0x0000000000032340 0x8d8 - 0x0000000000032340 PROVIDE (__ram_rodata_start, ABSOLUTE (.)) - 0x0000000000032340 . = ALIGN (0x4) +.rodata 0x0000000000031a1c 0x8c8 + 0x0000000000031a1c PROVIDE (__ram_rodata_start, ABSOLUTE (.)) + 0x0000000000031a1c . = ALIGN (0x4) *(.rodata .rodata.* .gnu.linkonce.r.*) - .rodata 0x0000000000032340 0x277 obj/default/I2C_core.o - *fill* 0x00000000000325b7 0x1 - .rodata 0x00000000000325b8 0x4e obj/default/auto_focus.o - *fill* 0x0000000000032606 0x2 - .rodata 0x0000000000032608 0x215 obj/default/main.o - *fill* 0x000000000003281d 0x3 - .rodata 0x0000000000032820 0x61 obj/default/mipi_bridge_config.o - *fill* 0x0000000000032881 0x3 - .rodata 0x0000000000032884 0x9c obj/default/mipi_camera_config.o + .rodata 0x0000000000031a1c 0x277 obj/default/I2C_core.o + *fill* 0x0000000000031c93 0x1 + .rodata 0x0000000000031c94 0x4e obj/default/auto_focus.o + *fill* 0x0000000000031ce2 0x2 + .rodata 0x0000000000031ce4 0x1ea obj/default/main.o + *fill* 0x0000000000031ece 0x2 + .rodata 0x0000000000031ed0 0x61 obj/default/mipi_bridge_config.o + *fill* 0x0000000000031f31 0x3 + .rodata 0x0000000000031f34 0xb8 obj/default/mipi_camera_config.o .rodata.str1.4 - 0x0000000000032920 0x2 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-impure.o) - *fill* 0x0000000000032922 0x2 + 0x0000000000031fec 0x2 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-puts.o) + *fill* 0x0000000000031fee 0x2 .rodata.str1.4 - 0x0000000000032924 0x2 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-puts.o) - *fill* 0x0000000000032926 0x2 - .rodata.str1.4 - 0x0000000000032928 0x42 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-vfprintf.o) + 0x0000000000031ff0 0x42 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-vfprintf.o) .rodata.zeroes.4404 - 0x000000000003296a 0x10 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-vfprintf.o) + 0x0000000000032032 0x10 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-vfprintf.o) .rodata.blanks.4403 - 0x000000000003297a 0x10 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-vfprintf.o) - *fill* 0x000000000003298a 0x2 + 0x0000000000032042 0x10 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-vfprintf.o) + *fill* 0x0000000000032052 0x2 .rodata.str1.4 - 0x000000000003298c 0x10 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-dtoa.o) + 0x0000000000032054 0x10 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-dtoa.o) 0x12 (size before relaxing) .rodata.str1.4 - 0x000000000003299c 0xc /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-locale.o) + 0x0000000000032064 0x2 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-impure.o) + *fill* 0x0000000000032066 0x2 + .rodata.str1.4 + 0x0000000000032068 0xc f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-locale.o) 0x12 (size before relaxing) .rodata.p05.2768 - 0x00000000000329a8 0xc /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-mprec.o) + 0x0000000000032074 0xc f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-mprec.o) .rodata.__mprec_tinytens - 0x00000000000329b4 0x28 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-mprec.o) - 0x00000000000329b4 __mprec_tinytens + 0x0000000000032080 0x28 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-mprec.o) + 0x0000000000032080 __mprec_tinytens .rodata.__mprec_bigtens - 0x00000000000329dc 0x28 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-mprec.o) - 0x00000000000329dc __mprec_bigtens + 0x00000000000320a8 0x28 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-mprec.o) + 0x00000000000320a8 __mprec_bigtens .rodata.__mprec_tens - 0x0000000000032a04 0xc8 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-mprec.o) - 0x0000000000032a04 __mprec_tens + 0x00000000000320d0 0xc8 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-mprec.o) + 0x00000000000320d0 __mprec_tens .rodata.str1.4 - 0x0000000000032acc 0x2f /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-vfiprintf.o) + 0x0000000000032198 0x2f f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-vfiprintf.o) .rodata.zeroes.4349 - 0x0000000000032acc 0x10 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-vfiprintf.o) + 0x0000000000032198 0x10 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-vfiprintf.o) .rodata.blanks.4348 - 0x0000000000032adc 0x10 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-vfiprintf.o) - .rodata 0x0000000000032aec 0x100 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a(_clz.o) - 0x0000000000032aec __clz_tab - .rodata 0x0000000000032bec 0xa ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_dev.o) - *fill* 0x0000000000032bf6 0x2 - .rodata 0x0000000000032bf8 0xf ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_main.o) - *fill* 0x0000000000032c07 0x1 - .rodata 0x0000000000032c08 0xf ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_sys_init.o) + 0x00000000000321a8 0x10 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-vfiprintf.o) + .rodata 0x00000000000321b8 0x100 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(_clz.o) + 0x00000000000321b8 __clz_tab + .rodata 0x00000000000322b8 0xa ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_dev.o) + *fill* 0x00000000000322c2 0x2 + .rodata 0x00000000000322c4 0xf ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_main.o) + *fill* 0x00000000000322d3 0x1 + .rodata 0x00000000000322d4 0xf ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_sys_init.o) *(.rodata1) - 0x0000000000032c18 . = ALIGN (0x4) - *fill* 0x0000000000032c17 0x1 - 0x0000000000032c18 PROVIDE (__ram_rodata_end, ABSOLUTE (.)) - 0x0000000000032340 PROVIDE (__flash_rodata_start, LOADADDR (.rodata)) + 0x00000000000322e4 . = ALIGN (0x4) + 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f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(eqdf2.o) + .bss 0x0000000000036884 0x0 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(gedf2.o) + .bss 0x0000000000036884 0x0 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(ledf2.o) + .bss 0x0000000000036884 0x0 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(muldf3.o) + .bss 0x0000000000036884 0x0 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(subdf3.o) + .bss 0x0000000000036884 0x0 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(fixdfsi.o) + .bss 0x0000000000036884 0x0 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(floatsidf.o) + .bss 0x0000000000036884 0x0 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(floatunsidf.o) + .bss 0x0000000000036884 0x0 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(_clz.o) + .bss 0x0000000000036884 0x0 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(_clzsi2.o) + .bss 0x0000000000036884 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_close.o) + .bss 0x0000000000036884 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_dev.o) + .bss 0x0000000000036884 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_errno.o) + .bss 0x0000000000036884 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_fstat.o) + .bss 0x0000000000036884 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_isatty.o) + .bss 0x0000000000036884 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_load.o) + .bss 0x0000000000036884 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_lseek.o) + .bss 0x0000000000036884 0x0 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.bss 0x0000000000036884 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_read.o) + .bss 0x0000000000036884 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_write.o) + .bss 0x0000000000036884 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_timer_sc.o) + .bss 0x0000000000036884 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_alarm_start.o) + .bss 0x0000000000036884 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_busy_sleep.o) + .bss 0x0000000000036884 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_dcache_flush_all.o) + .bss 0x0000000000036884 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_dev_llist_insert.o) + .bss 0x0000000000036884 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_do_ctors.o) + .bss 0x0000000000036884 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_do_dtors.o) + .bss 0x0000000000036884 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_icache_flush_all.o) + .bss 0x0000000000036884 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_iic.o) + .bss 0x0000000000036884 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_iic_isr_register.o) + .bss 0x0000000000036884 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_io_redirect.o) + .bss 0x0000000000036884 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_irq_entry.o) + .bss 0x0000000000036884 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_irq_handler.o) + .bss 0x0000000000036884 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_irq_vars.o) + .bss 0x0000000000036884 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_open.o) + .bss 0x0000000000036884 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_nios2_gen2_irq.o) + .bss 0x0000000000036884 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_exception_entry.o) + .bss 0x0000000000036884 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_find_dev.o) + .bss 0x0000000000036884 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_find_file.o) + .bss 0x0000000000036884 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_get_fd.o) + .bss 0x0000000000036884 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_icache_flush.o) + .bss 0x0000000000036884 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_instruction_exception_entry.o) + .bss 0x0000000000036884 0x0 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-atexit.o) + .bss 0x0000000000036884 0x0 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-exit.o) + .bss 0x0000000000036884 0x0 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-memcmp.o) + .bss 0x0000000000036884 0x0 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-__atexit.o) + .bss 0x0000000000036884 0x0 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-__call_atexit.o) + .bss 0x0000000000036884 0x0 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_exit.o) *(COMMON) - COMMON 0x00000000000371b8 0x100 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_irq_handler.o) - 0x00000000000371b8 alt_irq - 0x00000000000372b8 . = ALIGN (0x4) - 0x00000000000372b8 __bss_end = ABSOLUTE (.) + COMMON 0x0000000000036884 0x100 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_irq_handler.o) + 0x0000000000036884 alt_irq + 0x0000000000036984 . = ALIGN (0x4) + 0x0000000000036984 __bss_end = ABSOLUTE (.) .onchip_memory2_0 - 0x00000000000372b8 0x0 + 0x0000000000036984 0x0 [!provide] PROVIDE (_alt_partition_onchip_memory2_0_start, ABSOLUTE (.)) *(.onchip_memory2_0 .onchip_memory2_0. onchip_memory2_0.*) - 0x00000000000372b8 . = ALIGN (0x4) + 0x0000000000036984 . = ALIGN (0x4) [!provide] PROVIDE (_alt_partition_onchip_memory2_0_end, ABSOLUTE (.)) - 0x00000000000372b8 _end = ABSOLUTE (.) - 0x00000000000372b8 end = ABSOLUTE (.) - 0x00000000000372b8 __alt_stack_base = ABSOLUTE (.) + 0x0000000000036984 _end = ABSOLUTE (.) + 0x0000000000036984 end = ABSOLUTE (.) + 0x0000000000036984 __alt_stack_base = ABSOLUTE (.) [!provide] PROVIDE (_alt_partition_onchip_memory2_0_load_addr, LOADADDR (.onchip_memory2_0)) .stab @@ -1367,114 +1330,110 @@ LOAD /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gc .comment 0x0000000000000023 0x24 obj/default/mipi_bridge_config.o .comment 0x0000000000000023 0x24 obj/default/mipi_camera_config.o .comment 0x0000000000000023 0x24 obj/default/queue.o - .comment 0x0000000000000023 0x24 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a(lib2-divmod.o) - .comment 0x0000000000000023 0x24 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-getc.o) - .comment 0x0000000000000023 0x24 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-impure.o) - .comment 0x0000000000000023 0x24 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-malloc.o) - .comment 0x0000000000000023 0x24 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-mallocr.o) - .comment 0x0000000000000023 0x24 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-memset.o) - .comment 0x0000000000000023 0x24 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-printf.o) - .comment 0x0000000000000023 0x24 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-putchar.o) - .comment 0x0000000000000023 0x24 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-puts.o) - .comment 0x0000000000000023 0x24 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-rget.o) - .comment 0x0000000000000023 0x24 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-sbrkr.o) - .comment 0x0000000000000023 0x24 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-strlen.o) - .comment 0x0000000000000023 0x24 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-vfprintf.o) - .comment 0x0000000000000023 0x24 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-wsetup.o) - .comment 0x0000000000000023 0x24 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-dtoa.o) - .comment 0x0000000000000023 0x24 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-fflush.o) - .comment 0x0000000000000023 0x24 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-findfp.o) - .comment 0x0000000000000023 0x24 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- .comment 0x0000000000000023 0x24 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-putc.o) - .comment 0x0000000000000023 0x24 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-reallocr.o) - .comment 0x0000000000000023 0x24 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-refill.o) - .comment 0x0000000000000023 0x24 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-s_fpclassify.o) - .comment 0x0000000000000023 0x24 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.comment 0x0000000000000023 0x24 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_tick.o) + .comment 0x0000000000000023 0x24 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_usleep.o) + .comment 0x0000000000000023 0x24 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_write.o) + .comment 0x0000000000000023 0x24 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_sys_init.o) + .comment 0x0000000000000023 0x24 ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_fd.o) + .comment 0x0000000000000023 0x24 ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_init.o) + .comment 0x0000000000000023 0x24 ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_ioctl.o) + .comment 0x0000000000000023 0x24 ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_read.o) + .comment 0x0000000000000023 0x24 ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_write.o) + .comment 0x0000000000000023 0x24 ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_timer_sc.o) + .comment 0x0000000000000023 0x24 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f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-exit.o) + .comment 0x0000000000000023 0x24 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-memcmp.o) + .comment 0x0000000000000023 0x24 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-__atexit.o) + .comment 0x0000000000000023 0x24 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-__call_atexit.o) + .comment 0x0000000000000023 0x24 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_exit.o) .debug *(.debug) @@ -1488,7 +1447,7 @@ LOAD /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gc .debug_sfnames *(.debug_sfnames) -.debug_aranges 0x0000000000000000 0x10a8 +.debug_aranges 0x0000000000000000 0x1010 *(.debug_aranges) .debug_aranges 0x0000000000000000 0x28 ../D8M_Camera_Test_bsp//obj/HAL/src/crt0.o @@ -1505,995 +1464,960 @@ LOAD /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gc .debug_aranges 0x00000000000000c8 0x20 obj/default/queue.o .debug_aranges - 0x00000000000000e8 0x20 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a(lib2-divmod.o) + 0x00000000000000e8 0x20 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0\libgcc.a(lib2-divmod.o) .debug_aranges - 0x0000000000000108 0x28 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/../../../../../H-x86_64-pc-linux-gnu/nios2-elf/lib/libc.a(lib_a-getc.o) + 0x0000000000000108 0x28 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.debug_aranges - 0x0000000000000b40 0x20 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_main.o) + 0x0000000000000b28 0x20 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_sbrk.o) .debug_aranges - 0x0000000000000b60 0x20 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_malloc_lock.o) + 0x0000000000000b48 0x20 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_tick.o) .debug_aranges - 0x0000000000000b80 0x20 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_read.o) + 0x0000000000000b68 0x20 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_usleep.o) .debug_aranges - 0x0000000000000ba0 0x20 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_release_fd.o) + 0x0000000000000b88 0x20 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_write.o) .debug_aranges - 0x0000000000000bc0 0x20 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_sbrk.o) + 0x0000000000000ba8 0x20 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_sys_init.o) .debug_aranges - 0x0000000000000be0 0x20 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_tick.o) + 0x0000000000000bc8 0x20 ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_fd.o) .debug_aranges - 0x0000000000000c00 0x20 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_usleep.o) + 0x0000000000000be8 0x20 ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_init.o) .debug_aranges - 0x0000000000000c20 0x20 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_write.o) + 0x0000000000000c08 0x20 ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_ioctl.o) .debug_aranges - 0x0000000000000c40 0x20 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_sys_init.o) + 0x0000000000000c28 0x20 ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_read.o) .debug_aranges - 0x0000000000000c60 0x20 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_fd.o) + 0x0000000000000c48 0x20 ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_jtag_uart_write.o) .debug_aranges - 0x0000000000000c80 0x20 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_init.o) + 0x0000000000000c68 0x20 ../D8M_Camera_Test_bsp/\libhal_bsp.a(altera_avalon_timer_sc.o) .debug_aranges - 0x0000000000000ca0 0x20 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_ioctl.o) + 0x0000000000000c88 0x20 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_alarm_start.o) .debug_aranges - 0x0000000000000cc0 0x20 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_read.o) + 0x0000000000000ca8 0x20 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_busy_sleep.o) .debug_aranges - 0x0000000000000ce0 0x20 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_write.o) + 0x0000000000000cc8 0x20 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_dcache_flush_all.o) .debug_aranges - 0x0000000000000d00 0x20 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_timer_sc.o) + 0x0000000000000ce8 0x20 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_dev_llist_insert.o) .debug_aranges - 0x0000000000000d20 0x20 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_alarm_start.o) + 0x0000000000000d08 0x20 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/usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a(floatunsidf.o) - .debug_abbrev 0x0000000000007390 0x5d /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a(_clz.o) - .debug_abbrev 0x00000000000073ed 0xbe /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a(_clzsi2.o) - .debug_abbrev 0x00000000000074ab 0x11f ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_close.o) - .debug_abbrev 0x00000000000075ca 0xd9 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_dev.o) - .debug_abbrev 0x00000000000076a3 0x5a ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_errno.o) - .debug_abbrev 0x00000000000076fd 0x13c ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_fcntl.o) - .debug_abbrev 0x0000000000007839 0x11f ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_fstat.o) - .debug_abbrev 0x0000000000007958 0x11f ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_isatty.o) - .debug_abbrev 0x0000000000007a77 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0x0000000000008635 0x127 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_fd.o) - .debug_abbrev 0x000000000000875c 0x19e ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_init.o) - .debug_abbrev 0x00000000000088fa 0x111 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_ioctl.o) - .debug_abbrev 0x0000000000008a0b 0x1aa ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_read.o) - .debug_abbrev 0x0000000000008bb5 0x1a8 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_jtag_uart_write.o) - .debug_abbrev 0x0000000000008d5d 0x155 ../D8M_Camera_Test_bsp//libhal_bsp.a(altera_avalon_timer_sc.o) - .debug_abbrev 0x0000000000008eb2 0x162 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_alarm_start.o) - .debug_abbrev 0x0000000000009014 0x7e ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_busy_sleep.o) - .debug_abbrev 0x0000000000009092 0x5a ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_dcache_flush_all.o) - .debug_abbrev 0x00000000000090ec 0x114 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f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-exit.o) + .debug_loc 0x00000000000176ec 0x126 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-memcmp.o) + .debug_loc 0x0000000000017812 0x185 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-__atexit.o) + .debug_loc 0x0000000000017997 0x1ce f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-__call_atexit.o) .debug_macinfo *(.debug_macinfo) @@ -2516,81 +2440,78 @@ LOAD /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gc .debug_alt_sim_info 0x0000000000000000 0x30 ../D8M_Camera_Test_bsp//obj/HAL/src/crt0.o .debug_alt_sim_info - 0x0000000000000030 0x30 ../D8M_Camera_Test_bsp//libhal_bsp.a(alt_busy_sleep.o) + 0x0000000000000030 0x30 ../D8M_Camera_Test_bsp/\libhal_bsp.a(alt_busy_sleep.o) 0x00000000000386a0 __alt_data_end = 0x386a0 0x00000000000386a0 PROVIDE (__alt_stack_pointer, __alt_data_end) [!provide] PROVIDE (__alt_stack_limit, __alt_stack_base) - 0x00000000000372b8 PROVIDE (__alt_heap_start, end) + 0x0000000000036984 PROVIDE (__alt_heap_start, end) 0x00000000000386a0 PROVIDE (__alt_heap_limit, 0x386a0) OUTPUT(D8M_Camera_Test.elf elf32-littlenios2) -.debug_ranges 0x0000000000000000 0x19e0 +.debug_ranges 0x0000000000000000 0x1938 .debug_ranges 0x0000000000000000 0x20 ../D8M_Camera_Test_bsp//obj/HAL/src/crt0.o - .debug_ranges 0x0000000000000020 0x60 /usr/local/altera/16.0/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/bin/../lib/gcc/nios2-elf/5.2.0/libgcc.a(lib2-divmod.o) - .debug_ranges 0x0000000000000080 0x48 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0x30 f:/intelfpga_lite/16.1/nios2eds/bin/gnu/h-x86_64-mingw32/bin/../lib/gcc/nios2-elf/5.3.0/../../../../../H-x86_64-mingw32/nios2-elf/lib\libc.a(lib_a-__call_atexit.o) diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/D8M_Camera_Test.objdump b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/D8M_Camera_Test.objdump index 918dfb4..92211a2 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/D8M_Camera_Test.objdump +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/D8M_Camera_Test.objdump @@ -9,10 +9,10 @@ Program Header: LOAD off 0x00001000 vaddr 0x00020000 paddr 0x00020000 align 2**12 filesz 0x00000020 memsz 0x00000020 flags r-x LOAD off 0x00001020 vaddr 0x00020020 paddr 0x00020020 align 2**12 - filesz 0x00012bf8 memsz 0x00012bf8 flags r-x - LOAD off 0x00013c18 vaddr 0x00032c18 paddr 0x00034eb8 align 2**12 + filesz 0x000122c4 memsz 0x000122c4 flags r-x + LOAD off 0x000132e4 vaddr 0x000322e4 paddr 0x00034584 align 2**12 filesz 0x000022a0 memsz 0x000022a0 flags rw- - LOAD off 0x00016158 vaddr 0x00037158 paddr 0x00037158 align 2**12 + LOAD off 0x00015824 vaddr 0x00036824 paddr 0x00036824 align 2**12 filesz 0x00000000 memsz 0x00000160 flags rw- Sections: @@ -21,72 +21,72 @@ Idx Name Size VMA LMA File off Algn CONTENTS, ALLOC, LOAD, READONLY, CODE 1 .exceptions 00000224 00020020 00020020 00001020 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .text 000120fc 00020244 00020244 00001244 2**2 + 2 .text 000117d8 00020244 00020244 00001244 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE - 3 .rodata 000008d8 00032340 00032340 00013340 2**2 + 3 .rodata 000008c8 00031a1c 00031a1c 00012a1c 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 4 .rwdata 000022a0 00032c18 00034eb8 00013c18 2**2 + 4 .rwdata 000022a0 000322e4 00034584 000132e4 2**2 CONTENTS, ALLOC, LOAD, DATA, SMALL_DATA - 5 .bss 00000160 00037158 00037158 00016158 2**2 + 5 .bss 00000160 00036824 00036824 00015824 2**2 ALLOC, SMALL_DATA - 6 .onchip_memory2_0 00000000 000372b8 000372b8 00015eb8 2**0 + 6 .onchip_memory2_0 00000000 00036984 00036984 00015584 2**0 CONTENTS - 7 .comment 00000023 00000000 00000000 00015eb8 2**0 + 7 .comment 00000023 00000000 00000000 00015584 2**0 CONTENTS, READONLY - 8 .debug_aranges 000010a8 00000000 00000000 00015ee0 2**3 + 8 .debug_aranges 00001010 00000000 00000000 000155a8 2**3 CONTENTS, READONLY, DEBUGGING - 9 .debug_info 00028f70 00000000 00000000 00016f88 2**0 + 9 .debug_info 000264b1 00000000 00000000 000165b8 2**0 CONTENTS, READONLY, DEBUGGING - 10 .debug_abbrev 0000a67c 00000000 00000000 0003fef8 2**0 + 10 .debug_abbrev 00009d1e 00000000 00000000 0003ca69 2**0 CONTENTS, READONLY, DEBUGGING - 11 .debug_line 0000cfb3 00000000 00000000 0004a574 2**0 + 11 .debug_line 0000c54b 00000000 00000000 00046787 2**0 CONTENTS, READONLY, DEBUGGING - 12 .debug_frame 000029b0 00000000 00000000 00057528 2**2 + 12 .debug_frame 000027d4 00000000 00000000 00052cd4 2**2 CONTENTS, READONLY, DEBUGGING - 13 .debug_str 00003f8b 00000000 00000000 00059ed8 2**0 + 13 .debug_str 00003dde 00000000 00000000 000554a8 2**0 CONTENTS, READONLY, DEBUGGING - 14 .debug_loc 000181fe 00000000 00000000 0005de63 2**0 + 14 .debug_loc 00017b65 00000000 00000000 00059286 2**0 CONTENTS, READONLY, DEBUGGING - 15 .debug_alt_sim_info 00000060 00000000 00000000 00076064 2**2 + 15 .debug_alt_sim_info 00000060 00000000 00000000 00070dec 2**2 CONTENTS, READONLY, DEBUGGING - 16 .debug_ranges 000019e0 00000000 00000000 000760c8 2**3 + 16 .debug_ranges 00001938 00000000 00000000 00070e50 2**3 CONTENTS, READONLY, DEBUGGING - 17 .thread_model 00000003 00000000 00000000 0007b472 2**0 + 17 .thread_model 00000003 00000000 00000000 00075fd6 2**0 CONTENTS, READONLY - 18 .cpu 0000000a 00000000 00000000 0007b475 2**0 + 18 .cpu 0000000a 00000000 00000000 00075fd9 2**0 CONTENTS, READONLY - 19 .qsys 00000001 00000000 00000000 0007b47f 2**0 + 19 .qsys 00000001 00000000 00000000 00075fe3 2**0 CONTENTS, READONLY - 20 .simulation_enabled 00000001 00000000 00000000 0007b480 2**0 + 20 .simulation_enabled 00000001 00000000 00000000 00075fe4 2**0 CONTENTS, READONLY - 21 .sysid_hash 00000004 00000000 00000000 0007b481 2**0 + 21 .sysid_hash 00000004 00000000 00000000 00075fe5 2**0 CONTENTS, READONLY - 22 .sysid_base 00000004 00000000 00000000 0007b485 2**0 + 22 .sysid_base 00000004 00000000 00000000 00075fe9 2**0 CONTENTS, READONLY - 23 .sysid_time 00000004 00000000 00000000 0007b489 2**0 + 23 .sysid_time 00000004 00000000 00000000 00075fed 2**0 CONTENTS, READONLY - 24 .stderr_dev 00000009 00000000 00000000 0007b48d 2**0 + 24 .stderr_dev 00000009 00000000 00000000 00075ff1 2**0 CONTENTS, READONLY - 25 .stdin_dev 00000009 00000000 00000000 0007b496 2**0 + 25 .stdin_dev 00000009 00000000 00000000 00075ffa 2**0 CONTENTS, READONLY - 26 .stdout_dev 00000009 00000000 00000000 0007b49f 2**0 + 26 .stdout_dev 00000009 00000000 00000000 00076003 2**0 CONTENTS, READONLY - 27 .sopc_system_name 00000004 00000000 00000000 0007b4a8 2**0 + 27 .sopc_system_name 00000004 00000000 00000000 0007600c 2**0 CONTENTS, READONLY - 28 .quartus_project_dir 00000039 00000000 00000000 0007b4ac 2**0 + 28 .quartus_project_dir 0000002a 00000000 00000000 00076010 2**0 CONTENTS, READONLY - 29 .jdi 00003b41 00000000 00000000 0007b4e5 2**0 + 29 .jdi 0000414a 00000000 00000000 0007603a 2**0 CONTENTS, READONLY - 30 .sopcinfo 00099263 00000000 00000000 0007f026 2**0 + 30 .sopcinfo 00099607 00000000 00000000 0007a184 2**0 CONTENTS, READONLY SYMBOL TABLE: 00020000 l d .entry 00000000 .entry 00020020 l d .exceptions 00000000 .exceptions 00020244 l d .text 00000000 .text -00032340 l d .rodata 00000000 .rodata -00032c18 l d .rwdata 00000000 .rwdata -00037158 l d .bss 00000000 .bss -000372b8 l d .onchip_memory2_0 00000000 .onchip_memory2_0 +00031a1c l d .rodata 00000000 .rodata +000322e4 l d .rwdata 00000000 .rwdata +00036824 l d .bss 00000000 .bss +00036984 l d .onchip_memory2_0 00000000 .onchip_memory2_0 00000000 l d .comment 00000000 .comment 00000000 l d .debug_aranges 00000000 .debug_aranges 00000000 l d .debug_info 00000000 .debug_info @@ -105,61 +105,57 @@ SYMBOL TABLE: 00000000 l df *ABS* 00000000 auto_focus.c 00000000 l df *ABS* 00000000 main.c 00000000 l df *ABS* 00000000 mipi_bridge_config.c -00032c18 l O .rwdata 00000034 MipiBridgeReg +000322e4 l O .rwdata 00000034 MipiBridgeReg 00000000 l df *ABS* 00000000 mipi_camera_config.c -00032c4c l O .rwdata 00000774 MipiCameraReg +00032318 l O .rwdata 00000774 MipiCameraReg 00000000 l df *ABS* 00000000 queue.c 00000000 l df *ABS* 00000000 lib2-divmod.c -00000000 l df *ABS* 00000000 getc.c -00000000 l df *ABS* 00000000 impure.c -000333c0 l O .rwdata 00000424 impure_data 00000000 l df *ABS* 00000000 malloc.c 00000000 l df *ABS* 00000000 mallocr.c 00000000 l df *ABS* 00000000 memset.c 00000000 l df *ABS* 00000000 printf.c 00000000 l df *ABS* 00000000 putchar.c 00000000 l df *ABS* 00000000 puts.c -00000000 l df *ABS* 00000000 rget.c 00000000 l df *ABS* 00000000 sbrkr.c 00000000 l df *ABS* 00000000 strlen.c 00000000 l df *ABS* 00000000 vfprintf.c -0003296a l O .rodata 00000010 zeroes.4404 -00025a18 l F .text 000000bc __sbprintf -0003297a l O .rodata 00000010 blanks.4403 +00032032 l O .rodata 00000010 zeroes.4404 +00025454 l F .text 000000bc __sbprintf +00032042 l O .rodata 00000010 blanks.4403 00000000 l df *ABS* 00000000 wsetup.c 00000000 l df *ABS* 00000000 dtoa.c -00025c28 l F .text 00000200 quorem +00025664 l F .text 00000200 quorem 00000000 l df *ABS* 00000000 fflush.c 00000000 l df *ABS* 00000000 findfp.c -00027758 l F .text 00000008 __fp_unlock -0002776c l F .text 0000019c __sinit.part.1 -00027908 l F .text 00000008 __fp_lock +00027194 l F .text 00000008 __fp_unlock +000271a8 l F .text 0000019c __sinit.part.1 +00027344 l F .text 00000008 __fp_lock 00000000 l df *ABS* 00000000 mallocr.c 00000000 l df *ABS* 00000000 fvwrite.c 00000000 l df *ABS* 00000000 fwalk.c +00000000 l df *ABS* 00000000 impure.c +00032e94 l O .rwdata 00000424 impure_data 00000000 l df *ABS* 00000000 int_errno.c 00000000 l df *ABS* 00000000 locale.c -00033c0c l O .rwdata 00000020 lc_ctype_charset -00033bec l O .rwdata 00000020 lc_message_charset -00033c2c l O .rwdata 00000038 lconv +000332d8 l O .rwdata 00000020 lc_ctype_charset +000332b8 l O .rwdata 00000020 lc_message_charset +000332f8 l O .rwdata 00000038 lconv 00000000 l df *ABS* 00000000 makebuf.c 00000000 l df *ABS* 00000000 memchr.c 00000000 l df *ABS* 00000000 memcpy.c 00000000 l df *ABS* 00000000 memmove.c 00000000 l df *ABS* 00000000 mprec.c -000329a8 l O .rodata 0000000c p05.2768 +00032074 l O .rodata 0000000c p05.2768 00000000 l df *ABS* 00000000 putc.c 00000000 l df *ABS* 00000000 mallocr.c -00000000 l df *ABS* 00000000 refill.c -0002a258 l F .text 0000001c lflush 00000000 l df *ABS* 00000000 s_fpclassify.c 00000000 l df *ABS* 00000000 stdio.c 00000000 l df *ABS* 00000000 strcmp.c 00000000 l df *ABS* 00000000 vfprintf.c -0002a6d4 l F .text 000000fc __sprint_r.part.0 -00032adc l O .rodata 00000010 blanks.4348 -00032acc l O .rodata 00000010 zeroes.4349 -0002bc60 l F .text 000000bc __sbprintf +00029f20 l F .text 000000fc __sprint_r.part.0 +000321a8 l O .rodata 00000010 blanks.4348 +00032198 l O .rodata 00000010 zeroes.4349 +0002b4ac l F .text 000000bc __sbprintf 00000000 l df *ABS* 00000000 wbuf.c 00000000 l df *ABS* 00000000 writer.c 00000000 l df *ABS* 00000000 closer.c @@ -187,59 +183,57 @@ SYMBOL TABLE: 00000000 l df *ABS* 00000000 libgcc2.c 00000000 l df *ABS* 00000000 libgcc2.c 00000000 l df *ABS* 00000000 alt_close.c -0002f768 l F .text 00000050 alt_get_errno +0002efb4 l F .text 00000050 alt_get_errno 00000000 l df *ABS* 00000000 alt_dev.c -0002f888 l F .text 0000002c alt_dev_null_write +0002f0d4 l F .text 0000002c alt_dev_null_write 00000000 l df *ABS* 00000000 alt_errno.c -00000000 l df *ABS* 00000000 alt_fcntl.c -0002f8b4 l F .text 00000050 alt_get_errno 00000000 l df *ABS* 00000000 alt_fstat.c -0002fa24 l F .text 00000050 alt_get_errno +0002f100 l F .text 00000050 alt_get_errno 00000000 l df *ABS* 00000000 alt_isatty.c -0002fb24 l F .text 00000050 alt_get_errno +0002f200 l F .text 00000050 alt_get_errno 00000000 l df *ABS* 00000000 alt_load.c -0002fc18 l F .text 00000068 alt_load_section +0002f2f4 l F .text 00000068 alt_load_section 00000000 l df *ABS* 00000000 alt_lseek.c -0002fd04 l F .text 00000050 alt_get_errno +0002f3e0 l F .text 00000050 alt_get_errno 00000000 l df *ABS* 00000000 alt_main.c 00000000 l df *ABS* 00000000 alt_malloc_lock.c 00000000 l df *ABS* 00000000 alt_read.c -0002feec l F .text 00000050 alt_get_errno +0002f5c8 l F .text 00000050 alt_get_errno 00000000 l df *ABS* 00000000 alt_release_fd.c 00000000 l df *ABS* 00000000 alt_sbrk.c -00034ea8 l O .rwdata 00000004 heap_end +00034574 l O .rwdata 00000004 heap_end 00000000 l df *ABS* 00000000 alt_tick.c 00000000 l df *ABS* 00000000 alt_usleep.c 00000000 l df *ABS* 00000000 alt_write.c -00030320 l F .text 00000050 alt_get_errno +0002f9fc l F .text 00000050 alt_get_errno 00000000 l df *ABS* 00000000 alt_sys_init.c -00030468 l F .text 00000038 alt_dev_reg -00033e0c l O .rwdata 00001060 jtag_uart +0002fb44 l F .text 00000038 alt_dev_reg +000334d8 l O .rwdata 00001060 jtag_uart 00000000 l df *ABS* 00000000 altera_avalon_jtag_uart_fd.c 00000000 l df *ABS* 00000000 altera_avalon_jtag_uart_init.c -00030768 l F .text 0000020c altera_avalon_jtag_uart_irq -00030974 l F .text 000000a8 altera_avalon_jtag_uart_timeout +0002fe44 l F .text 0000020c altera_avalon_jtag_uart_irq +00030050 l F .text 000000a8 altera_avalon_jtag_uart_timeout 00000000 l df *ABS* 00000000 altera_avalon_jtag_uart_ioctl.c 00000000 l df *ABS* 00000000 altera_avalon_jtag_uart_read.c 00000000 l df *ABS* 00000000 altera_avalon_jtag_uart_write.c 00000000 l df *ABS* 00000000 altera_avalon_timer_sc.c -00030fb4 l F .text 00000078 alt_avalon_timer_sc_irq +00030690 l F .text 00000078 alt_avalon_timer_sc_irq 00000000 l df *ABS* 00000000 alt_alarm_start.c 00000000 l df *ABS* 00000000 alt_busy_sleep.c 00000000 l df *ABS* 00000000 alt_dcache_flush_all.c 00000000 l df *ABS* 00000000 alt_dev_llist_insert.c -00031398 l F .text 00000050 alt_get_errno +00030a74 l F .text 00000050 alt_get_errno 00000000 l df *ABS* 00000000 alt_do_ctors.c 00000000 l df *ABS* 00000000 alt_do_dtors.c 00000000 l df *ABS* 00000000 alt_icache_flush_all.c 00000000 l df *ABS* 00000000 alt_iic.c 00000000 l df *ABS* 00000000 alt_iic_isr_register.c 00000000 l df *ABS* 00000000 alt_io_redirect.c -00031850 l F .text 000000c4 alt_open_fd +00030f2c l F .text 000000c4 alt_open_fd 00000000 l df *ABS* 00000000 alt_irq_vars.c 00000000 l df *ABS* 00000000 alt_open.c -00031990 l F .text 00000050 alt_get_errno -000319e0 l F .text 000000cc alt_file_locked +0003106c l F .text 00000050 alt_get_errno +000310bc l F .text 000000cc alt_file_locked 00000000 l df *ABS* 00000000 altera_nios2_gen2_irq.c 00000000 l df *ABS* 00000000 alt_find_dev.c 00000000 l df *ABS* 00000000 alt_find_file.c @@ -251,297 +245,288 @@ SYMBOL TABLE: 00000000 l df *ABS* 00000000 __atexit.c 00000000 l df *ABS* 00000000 __call_atexit.c 00000000 l df *ABS* 00000000 alt_exit.c -0003718c g O .bss 00000004 alt_instruction_exception_handler -000235a4 g F .text 00000018 putchar -00029a14 g F .text 00000074 _mprec_log10 -00029b00 g F .text 0000008c __any_on -0002c354 g F .text 00000054 _isatty_r -000329b4 g O .rodata 00000028 __mprec_tinytens -0002fe28 g F .text 0000007c alt_main -000235bc g F .text 000000c0 _puts_r -000371b8 g O .bss 00000100 alt_irq -0002c3a8 g F .text 00000060 _lseek_r +00036858 g O .bss 00000004 alt_instruction_exception_handler +00023068 g F .text 00000018 putchar +00029450 g F .text 00000074 _mprec_log10 +0002953c g F .text 0000008c __any_on +0002bba0 g F .text 00000054 _isatty_r +00032080 g O .rodata 00000028 __mprec_tinytens +0002f504 g F .text 0000007c alt_main +00023080 g F .text 000000c0 _puts_r +00036884 g O .bss 00000100 alt_irq +0002bbf4 g F .text 00000060 _lseek_r 00021344 g F .text 000000b0 Focus_Released 000205e4 g F .text 00000060 ACK_check -00034eb8 g *ABS* 00000000 __flash_rwdata_start +00034584 g *ABS* 00000000 __flash_rwdata_start 00020558 g F .text 0000008c ACK_single_check -0002e294 g F .text 00000088 .hidden __eqdf2 +0002dae0 g F .text 00000088 .hidden __eqdf2 00021164 g F .text 000001e0 Focus_Window -00021e9c g F .text 0000006c OV8865_write_AF -000372b8 g *ABS* 00000000 __alt_heap_start -0002276c g F .text 00000064 QUEUE_IsFull -00023560 g F .text 0000003c printf -0002c468 g F .text 0000009c _wcrtomb_r -0002a594 g F .text 0000005c __sseek -00027aa8 g F .text 00000010 __sinit -0002bd1c g F .text 00000140 __swbuf_r -00028570 g F .text 0000007c _setlocale_r -00027910 g F .text 00000068 __sfmoreglue -0002fec8 g F .text 00000024 __malloc_unlock -00028a34 g F .text 0000015c memmove +00021cac g F .text 0000006c OV8865_write_AF +00036984 g *ABS* 00000000 __alt_heap_start +00022328 g F .text 00000064 QUEUE_IsFull +00023024 g F .text 0000003c printf +0002bcb4 g F .text 0000009c _wcrtomb_r +00029de0 g F .text 0000005c __sseek +000274e4 g F .text 00000010 __sinit +0002b568 g F .text 00000140 __swbuf_r +00027fac g F .text 0000007c _setlocale_r +0002734c g F .text 00000068 __sfmoreglue +0002f5a4 g F .text 00000024 __malloc_unlock +00028470 g F .text 0000015c memmove 00020644 g F .text 00000200 OC_I2C_Write -00027a90 g F .text 00000018 _cleanup -00028b90 g F .text 000000a8 _Balloc +000274cc g F .text 00000018 _cleanup +000285cc g F .text 000000a8 _Balloc 0002103c g F .text 00000128 Focus_Init -0002e31c g F .text 000000dc .hidden __gtdf2 -00031c04 g F .text 00000024 altera_nios2_gen2_irq_init +0002db68 g F .text 000000dc .hidden __gtdf2 +000312e0 g F .text 00000024 altera_nios2_gen2_irq_init 00020000 g F .entry 0000001c __reset 00020020 g *ABS* 00000000 __flash_exceptions_start -0002c2f8 g F .text 0000005c _fstat_r -00034e74 g O .rwdata 00000001 focus_scal -00037164 g O .bss 00000004 errno -00023704 g F .text 00000014 __srget -0002a510 g F .text 00000008 __seofread -00037178 g O .bss 00000004 alt_argv -0003ce6c g *ABS* 00000000 _gp -000302f0 g F .text 00000030 usleep -00033c8c g O .rwdata 00000180 alt_fd_list -00022adc g F .text 00000070 _getc_r -00022b4c g F .text 00000088 getc -0002359c g F .text 00000008 _putchar_r -00031c28 g F .text 00000090 alt_find_dev -000288ec g F .text 00000148 memcpy +0002bb44 g F .text 0000005c _fstat_r +00034540 g O .rwdata 00000001 focus_scal +00036830 g O .bss 00000004 errno +00029d5c g F .text 00000008 __seofread +00036844 g O .bss 00000004 alt_argv +0003c538 g *ABS* 00000000 _gp +0002f9cc g F .text 00000030 usleep +00033358 g O .rwdata 00000180 alt_fd_list +00023060 g F .text 00000008 _putchar_r +00031304 g F .text 00000090 alt_find_dev +00028328 g F .text 00000148 memcpy 00020398 g F .text 0000013c oc_i2c_init_ex -00027760 g F .text 0000000c _cleanup_r -0002f580 g F .text 000000dc .hidden __floatsidf -00031914 g F .text 0000007c alt_io_redirect -0002e3f8 g F .text 000000f4 .hidden __ltdf2 -00032340 g *ABS* 00000000 __DTOR_END__ -0002367c g F .text 00000014 puts -00031f10 g F .text 0000009c alt_exception_cause_generated_bad_addr -0002a448 g F .text 00000074 __fpclassifyd -00029970 g F .text 000000a4 __ratio -0002bc44 g F .text 0000001c __vfiprintf_internal -0002272c g F .text 00000040 QUEUE_IsEmpty -00030b74 g F .text 0000021c altera_avalon_jtag_uart_read -00022bd4 g F .text 00000014 malloc -00023530 g F .text 00000030 _printf_r +0002719c g F .text 0000000c _cleanup_r +0002edcc g F .text 000000dc .hidden __floatsidf +00030ff0 g F .text 0000007c alt_io_redirect +0002dc44 g F .text 000000f4 .hidden __ltdf2 +00031a1c g *ABS* 00000000 __DTOR_END__ +00023140 g F .text 00000014 puts +000315ec g F .text 0000009c alt_exception_cause_generated_bad_addr +00029c94 g F .text 00000074 __fpclassifyd +000293ac g F .text 000000a4 __ratio +0002b490 g F .text 0000001c __vfiprintf_internal +000222e8 g F .text 00000040 QUEUE_IsEmpty +00030250 g F .text 0000021c altera_avalon_jtag_uart_read +00022698 g F .text 00000014 malloc +00022ff4 g F .text 00000030 _printf_r 00020000 g *ABS* 00000000 __alt_mem_onchip_memory2_0 -00022a20 g F .text 00000064 .hidden __udivsi3 -0002fb74 g F .text 000000a4 isatty -00032a04 g O .rodata 000000c8 __mprec_tens -000285ec g F .text 0000000c __locale_charset -00031e80 g F .text 00000090 alt_icache_flush -00037160 g O .bss 00000004 __malloc_top_pad -000228f4 g F .text 00000034 QUEUE_Empty -00021f88 g F .text 000000d0 OV8865_FOCUS_Move_to -00034e88 g O .rwdata 00000004 __mb_cur_max -0002861c g F .text 0000000c _localeconv_r -00028f9c g F .text 0000003c __i2b -00027f2c g F .text 000004bc __sfvwrite_r -00022864 g F .text 00000090 QUEUE_Pop -00023718 g F .text 00000054 _sbrk_r -0002c408 g F .text 00000060 _read_r -00034e72 g O .rwdata 00000002 focus_height -00034ea0 g O .rwdata 00000004 alt_max_fd -0002bfec g F .text 000000f0 _fclose_r -00021e30 g F .text 0000006c OV8865_write_cmos_sensor_8 -00027728 g F .text 00000030 fflush -0003715c g O .bss 00000004 __malloc_max_sbrked_mem -0002d100 g F .text 000008ac .hidden __adddf3 -00029718 g F .text 0000010c __b2d -0002cbc8 g F .text 00000538 .hidden __umoddi3 -0002fd54 g F .text 000000d4 lseek -00034e78 g O .rwdata 00000004 _global_impure_ptr -00029cf4 g F .text 00000564 _realloc_r -000372b8 g *ABS* 00000000 __bss_end -00031760 g F .text 000000f0 alt_iic_isr_register -000301e8 g F .text 00000108 alt_tick -0002c650 g F .text 00000578 .hidden __udivdi3 -0002c254 g F .text 00000024 _fputwc_r -000329dc g O .rodata 00000028 __mprec_bigtens -00028d80 g F .text 00000104 __s2b -0002f65c g F .text 000000a8 .hidden __floatunsidf -00034e6e g O .rwdata 00000002 video_h -00029458 g F .text 00000060 __mcmp -00027ac8 g F .text 00000018 __fp_lock_all -00031714 g F .text 0000004c alt_ic_irq_enabled +000225dc g F .text 00000064 .hidden __udivsi3 +0002f250 g F .text 000000a4 isatty +000320d0 g O .rodata 000000c8 __mprec_tens +00028028 g F .text 0000000c __locale_charset +0003155c g F .text 00000090 alt_icache_flush +0003682c g O .bss 00000004 __malloc_top_pad +000224b0 g F .text 00000034 QUEUE_Empty +00021d98 g F .text 000000e4 OV8865_FOCUS_Move_to +00034554 g O .rwdata 00000004 __mb_cur_max +00028058 g F .text 0000000c _localeconv_r +000289d8 g F .text 0000003c __i2b +00027968 g F .text 000004bc __sfvwrite_r +00022420 g F .text 00000090 QUEUE_Pop +00023154 g F .text 00000054 _sbrk_r +0002bc54 g F .text 00000060 _read_r +0003453e g O .rwdata 00000002 focus_height +0003456c g O .rwdata 00000004 alt_max_fd +0002b838 g F .text 000000f0 _fclose_r +00021c40 g F .text 0000006c OV8865_write_cmos_sensor_8 +00027164 g F .text 00000030 fflush +00036828 g O .bss 00000004 __malloc_max_sbrked_mem +0002c94c g F .text 000008ac .hidden __adddf3 +00029154 g F .text 0000010c __b2d +0002c414 g F .text 00000538 .hidden __umoddi3 +0002f430 g F .text 000000d4 lseek +0003454c g O .rwdata 00000004 _global_impure_ptr +00029730 g F .text 00000564 _realloc_r +00036984 g *ABS* 00000000 __bss_end +00030e3c g F .text 000000f0 alt_iic_isr_register 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__flash_rodata_start +00031a1c g *ABS* 00000000 __DTOR_LIST__ +0002dae0 g F .text 00000088 .hidden __nedf2 +0002fb7c g F .text 00000038 alt_irq_init +0002f714 g F .text 00000064 alt_release_fd +00021aac g F .text 00000130 MipiBridgeInit +000321b8 g O .rodata 00000100 .hidden __clz_tab +00036834 g O .bss 00000004 _PathLocale +00031688 g F .text 00000014 atexit +0002b6c0 g F .text 00000060 _write_r +00028064 g F .text 00000018 setlocale +00034550 g O .rwdata 00000004 _impure_ptr +00036840 g O .bss 00000004 alt_argc +00021a34 g F .text 00000078 MipiBridgeRegRead +00026eec g F .text 0000021c __sflush_r +00030bc8 g F .text 00000060 _do_dtors +00028050 g F .text 00000008 __locale_cjk_lang +00034538 g O .rwdata 00000002 video_w 00020020 g .exceptions 00000000 alt_irq_entry -000296b4 g F .text 00000064 __ulp -00027ae0 g F .text 00000018 __fp_unlock_all -00034e90 g O .rwdata 00000008 alt_fs_list +000290f0 g F .text 00000064 __ulp +0002751c g F .text 00000018 __fp_unlock_all +0003455c g O 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.rwdata 00000004 __malloc_trim_threshold 00020a74 g F .text 00000138 OC_I2C_Read_Continue -00028608 g F .text 0000000c __locale_msgcharset -00031fc0 g F .text 00000038 exit -00034e76 g O .rwdata 00000001 focus_th -000284ac g F .text 000000c4 _fwalk_reent -000294b8 g F .text 000001fc __mdiff -000229ac g F .text 00000074 .hidden __modsi3 +00028044 g F .text 0000000c __locale_msgcharset +0003169c g F .text 00000038 exit +00034542 g O .rwdata 00000001 focus_th +00027ee8 g F .text 000000c4 _fwalk_reent +00028ef4 g F .text 000001fc __mdiff +00022568 g F .text 00000074 .hidden __modsi3 000386a0 g *ABS* 00000000 __alt_data_end 00020020 g F .exceptions 00000000 alt_exception -00027abc g F .text 00000004 __sfp_lock_release +000274f8 g F .text 00000004 __sfp_lock_release 000214ac g F .text 00000098 mipi_show_error_info -000226f8 g F .text 00000034 QUEUE_Delete +000222b4 g F .text 00000034 QUEUE_Delete 00020dbc g F .text 00000280 OC_I2CL_Read -0003230c g F .text 00000034 _exit -000310b8 g F .text 00000140 alt_alarm_start -0002864c g F .text 000001bc __smakebuf_r -0002376c g F .text 00000098 strlen -00031aac g F .text 00000158 open -0002e31c g F .text 000000dc .hidden __gedf2 -00034e8c g O .rwdata 00000004 __wctomb -0002a7d0 g F .text 00000018 __sprint_r -0003154c g F .text 00000034 alt_icache_flush_all -00022058 g F .text 000000e0 OV8865SetExposure -00034eb4 g O .rwdata 00000004 alt_priority_mask -00034e70 g O .rwdata 00000002 focus_width -000315d0 g F .text 000000a0 alt_ic_irq_enable -000259fc g F .text 0000001c __vfprintf_internal -0002c5f4 g F .text 0000005c _wctomb_r +000319e8 g F .text 00000034 _exit +00030794 g F .text 00000140 alt_alarm_start +00028088 g F .text 000001bc __smakebuf_r +000231a8 g F .text 00000098 strlen +00031188 g F .text 00000158 open +0002db68 g F .text 000000dc .hidden __gedf2 +00034558 g O .rwdata 00000004 __wctomb +0002a01c g F .text 00000018 __sprint_r +00030c28 g F .text 00000034 alt_icache_flush_all +00034580 g O .rwdata 00000004 alt_priority_mask +0003453c g O .rwdata 00000002 focus_width +00030cac g F .text 000000a0 alt_ic_irq_enable +00025438 g F .text 0000001c __vfprintf_internal +0002be40 g F .text 0000005c _wctomb_r 000216bc g F .text 00000088 MIPI_Init -0002ec04 g F .text 000008fc .hidden __subdf3 -0002f904 g F .text 00000120 fcntl -00028eec g F .text 000000b0 __lo0bits -00034eac g O .rwdata 00000008 alt_alarm_list -0003148c g F .text 00000060 _do_ctors -0002c504 g F .text 000000c0 wcrtomb -0002f7b8 g F .text 000000d0 close -00021f08 g F .text 00000080 OV8865_read_AF -0002fc80 g F .text 00000084 alt_load -0002c278 g F .text 00000080 fputwc -00022be8 g F .text 00000014 free -00027ac0 g F .text 00000004 __sinit_lock_acquire -00028c60 g F .text 00000120 __multadd -00028c38 g F .text 00000028 _Bfree +0002e450 g F .text 000008fc .hidden __subdf3 +00028928 g F .text 000000b0 __lo0bits +00034578 g O .rwdata 00000008 alt_alarm_list +00030b68 g F .text 00000060 _do_ctors +0002bd50 g F .text 000000c0 wcrtomb +0002f004 g F .text 000000d0 close +00021d18 g F .text 00000080 OV8865_read_AF +0002f35c g F .text 00000084 alt_load +0002bac4 g F .text 00000080 fputwc +000226ac g F .text 00000014 free +000274fc g F .text 00000004 __sinit_lock_acquire +0002869c g F .text 00000120 __multadd +00028674 g F .text 00000028 _Bfree @@ -563,7 +548,7 @@ Disassembly of section .entry: addi r2, r2, -NIOS2_ICACHE_LINE_SIZE 20008: 10bff804 addi r2,r2,-32 bgt r2, zero, 0b - 2000c: 00bffd16 blt zero,r2,20004 <__reset+0x4> + 2000c: 00bffd16 blt zero,r2,20004 <_gp+0xfffe3acc> * Jump to the _start entry point in the .text section if reset code * is allowed or if optimizing for RTL simulation. */ @@ -826,13 +811,13 @@ static ALT_INLINE alt_u32 ALT_ALWAYS_INLINE alt_irq_pending (void) #ifdef ALT_ENHANCED_INTERRUPT_API_PRESENT alt_irq[i].handler(alt_irq[i].context); 2013c: 008000f4 movhi r2,3 - 20140: 109c6e04 addi r2,r2,29112 + 20140: 109a2104 addi r2,r2,26756 20144: e0fffd17 ldw r3,-12(fp) 20148: 180690fa slli r3,r3,3 2014c: 10c5883a add r2,r2,r3 20150: 10c00017 ldw r3,0(r2) 20154: 008000f4 movhi r2,3 - 20158: 109c6e04 addi r2,r2,29112 + 20158: 109a2104 addi r2,r2,26756 2015c: e13ffd17 ldw r4,-12(fp) 20160: 200890fa slli r4,r4,3 20164: 1105883a add r2,r2,r4 @@ -868,14 +853,14 @@ static ALT_INLINE alt_u32 ALT_ALWAYS_INLINE alt_irq_pending (void) 201a0: e0bffd15 stw r2,-12(fp) } while (1); - 201a4: 003fe106 br 2012c + 201a4: 003fe106 br 2012c <_gp+0xfffe3bf4> active = alt_irq_pending (); 201a8: e0bffb15 stw r2,-20(fp) } while (active); 201ac: e0bffb17 ldw r2,-20(fp) - 201b0: 103fdb1e bne r2,zero,20120 + 201b0: 103fdb1e bne r2,zero,20120 <_gp+0xfffe3be8> /* * Notify the operating system that interrupt processing is complete. @@ -985,7 +970,7 @@ Disassembly of section .text: 2024c: 10bff804 addi r2,r2,-32 #endif bgt r2, zero, 0b - 20250: 00bffd16 blt zero,r2,20248 <_start+0x4> + 20250: 00bffd16 blt zero,r2,20248 <_gp+0xfffe3d10> /* * Now that the caches are initialized, set up the stack pointer and global pointer. @@ -998,7 +983,7 @@ Disassembly of section .text: movhi gp, %hi(_gp) 2025c: 068000f4 movhi gp,3 ori gp, gp, %lo(_gp) - 20260: d6b39b14 ori gp,gp,52844 + 20260: d6b14e14 ori gp,gp,50488 */ #ifndef ALT_SIM_OPTIMIZE /* Log that the BSS is about to be cleared. */ @@ -1007,12 +992,12 @@ Disassembly of section .text: movhi r2, %hi(__bss_start) 20264: 008000f4 movhi r2,3 ori r2, r2, %lo(__bss_start) - 20268: 109c5614 ori r2,r2,29016 + 20268: 109a0914 ori r2,r2,26660 movhi r3, %hi(__bss_end) 2026c: 00c000f4 movhi r3,3 ori r3, r3, %lo(__bss_end) - 20270: 18dcae14 ori r3,r3,29368 + 20270: 18da6114 ori r3,r3,27012 beq r2, r3, 1f 20274: 10c00326 beq r2,r3,20284 <_start+0x40> @@ -1023,28 +1008,28 @@ Disassembly of section .text: addi r2, r2, 4 2027c: 10800104 addi r2,r2,4 bltu r2, r3, 0b - 20280: 10fffd36 bltu r2,r3,20278 <_start+0x34> + 20280: 10fffd36 bltu r2,r3,20278 <_gp+0xfffe3d40> * section aren't defined until alt_load() has been called). */ mov et, zero #endif call alt_load - 20284: 002fc800 call 2fc80 + 20284: 002f35c0 call 2f35c /* Log that alt_main is about to be called. */ ALT_LOG_PUTS(alt_log_msg_alt_main) /* Call the C entry point. It should never return. */ call alt_main - 20288: 002fe280 call 2fe28 + 20288: 002f5040 call 2f504 0002028c : /* Wait in infinite loop in case alt_main does return. */ alt_after_alt_main: br alt_after_alt_main - 2028c: 003fff06 br 2028c + 2028c: 003fff06 br 2028c <_gp+0xfffe3d54> 00020290 : #define SLEEP_TIME 250 //us @@ -1178,7 +1163,7 @@ bool oc_i2c_init_ex(alt_32 i2c_base, alt_32 ref_clk, alt_32 i2c_clk) 203c8: 10800164 muli r2,r2,5 203cc: 100b883a mov r5,r2 203d0: e13ffe17 ldw r4,-8(fp) - 203d4: 00229280 call 22928 <__divsi3> + 203d4: 00224e40 call 224e4 <__divsi3> 203d8: 10bfffc4 addi r2,r2,-1 203dc: e0bffa15 stw r2,-24(fp) prescale_low = prescale & 0xFF; @@ -1273,8 +1258,8 @@ bool oc_i2c_init_ex(alt_32 i2c_base, alt_32 ref_clk, alt_32 i2c_clk) else printf("\nI2C core is not enabled successfully! \r\n"); 204b0: 010000f4 movhi r4,3 - 204b4: 2108d004 addi r4,r4,9024 - 204b8: 002367c0 call 2367c + 204b4: 21068704 addi r4,r4,6684 + 204b8: 00231400 call 23140 return bSuccess; 204bc: e0bff817 ldw r2,-32(fp) @@ -1330,8 +1315,8 @@ bool oc_i2c_uninit(alt_32 i2c_base) else printf("\I2C core is failed to disable! \r\n"); 20534: 010000f4 movhi r4,3 - 20538: 2108db04 addi r4,r4,9068 - 2053c: 002367c0 call 2367c + 20538: 21069204 addi r4,r4,6728 + 2053c: 00231400 call 23140 return bSuccess; 20540: e0bffc17 ldw r2,-16(fp) @@ -1362,7 +1347,7 @@ bool ACK_single_check(alt_32 i2c_base) usleep(ACK_SLEEP_TIME); 20574: 01003e84 movi r4,250 - 20578: 00302f00 call 302f0 + 20578: 002f9cc0 call 2f9cc read_data =IORD(i2c_base, 4); 2057c: e0bfff17 ldw r2,-4(fp) 20580: 10800404 addi r2,r2,16 @@ -1379,7 +1364,7 @@ bool ACK_single_check(alt_32 i2c_base) 205a0: 10000a26 beq r2,zero,205cc usleep(ACK_SLEEP_TIME); 205a4: 01003e84 movi r4,250 - 205a8: 00302f00 call 302f0 + 205a8: 002f9cc0 call 2f9cc read_data =IORD(i2c_base, 4); 205ac: e0bfff17 ldw r2,-4(fp) 205b0: 10800404 addi r2,r2,16 @@ -1433,7 +1418,7 @@ bool ACK_check(alt_32 i2c_base){ 2061c: 10c00044 addi r3,r2,1 20620: e0fffe15 stw r3,-8(fp) 20624: 10800290 cmplti r2,r2,10 - 20628: 103ff61e bne r2,zero,20604 + 20628: 103ff61e bne r2,zero,20604 <_gp+0xfffe40cc> bSuccess = ACK_single_check(i2c_base); } @@ -1473,8 +1458,8 @@ bool OC_I2C_Write(alt_32 i2c_base,alt_u8 device_address,alt_u8 sub_address, alt 20680: 1000051e bne r2,zero,20698 printf("OC_I2C_Write error[0]\r\n"); 20684: 010000f4 movhi r4,3 - 20688: 2108e404 addi r4,r4,9104 - 2068c: 002367c0 call 2367c + 20688: 21069b04 addi r4,r4,6764 + 2068c: 00231400 call 23140 return FALSE; 20690: 0005883a mov r2,zero 20694: 00006606 br 20830 @@ -1488,8 +1473,8 @@ bool OC_I2C_Write(alt_32 i2c_base,alt_u8 device_address,alt_u8 sub_address, alt 206a8: 1000051e bne r2,zero,206c0 printf("OC_I2C_Write error[1]\r\n"); 206ac: 010000f4 movhi r4,3 - 206b0: 2108ea04 addi r4,r4,9128 - 206b4: 002367c0 call 2367c + 206b0: 2106a104 addi r4,r4,6788 + 206b4: 00231400 call 23140 return FALSE; 206b8: 0005883a mov r2,zero 206bc: 00005c06 br 20830 @@ -1502,8 +1487,8 @@ bool OC_I2C_Write(alt_32 i2c_base,alt_u8 device_address,alt_u8 sub_address, alt 206c8: 1000051e bne r2,zero,206e0 printf("OC_I2C_Write error[2]\r\n"); 206cc: 010000f4 movhi r4,3 - 206d0: 2108f004 addi r4,r4,9152 - 206d4: 002367c0 call 2367c + 206d0: 2106a704 addi r4,r4,6812 + 206d4: 00231400 call 23140 return FALSE; 206d8: 0005883a mov r2,zero 206dc: 00005406 br 20830 @@ -1520,8 +1505,8 @@ bool OC_I2C_Write(alt_32 i2c_base,alt_u8 device_address,alt_u8 sub_address, alt 206f4: 1000051e bne r2,zero,2070c printf("OC_I2C_Write error[3]\r\n"); 206f8: 010000f4 movhi r4,3 - 206fc: 2108f604 addi r4,r4,9176 - 20700: 002367c0 call 2367c + 206fc: 2106ad04 addi r4,r4,6836 + 20700: 00231400 call 23140 return FALSE; 20704: 0005883a mov r2,zero 20708: 00004906 br 20830 @@ -1536,8 +1521,8 @@ bool OC_I2C_Write(alt_32 i2c_base,alt_u8 device_address,alt_u8 sub_address, alt 2071c: 1000051e bne r2,zero,20734 printf("OC_I2C_Write error[4]\r\n"); 20720: 010000f4 movhi r4,3 - 20724: 2108fc04 addi r4,r4,9200 - 20728: 002367c0 call 2367c + 20724: 2106b304 addi r4,r4,6860 + 20728: 00231400 call 23140 return FALSE; 2072c: 0005883a mov r2,zero 20730: 00003f06 br 20830 @@ -1550,8 +1535,8 @@ bool OC_I2C_Write(alt_32 i2c_base,alt_u8 device_address,alt_u8 sub_address, alt 2073c: 1000051e bne r2,zero,20754 printf("OC_I2C_Write error[5]\r\n"); 20740: 010000f4 movhi r4,3 - 20744: 21090204 addi r4,r4,9224 - 20748: 002367c0 call 2367c + 20744: 2106b904 addi r4,r4,6884 + 20748: 00231400 call 23140 return FALSE; 2074c: 0005883a mov r2,zero 20750: 00003706 br 20830 @@ -1578,8 +1563,8 @@ bool OC_I2C_Write(alt_32 i2c_base,alt_u8 device_address,alt_u8 sub_address, alt 20788: 1000051e bne r2,zero,207a0 printf("OC_I2C_Write error[6]\r\n"); 2078c: 010000f4 movhi r4,3 - 20790: 21090804 addi r4,r4,9248 - 20794: 002367c0 call 2367c + 20790: 2106bf04 addi r4,r4,6908 + 20794: 00231400 call 23140 return FALSE; 20798: 0005883a mov r2,zero 2079c: 00002406 br 20830 @@ -1594,8 +1579,8 @@ bool OC_I2C_Write(alt_32 i2c_base,alt_u8 device_address,alt_u8 sub_address, alt 207b0: 1000051e bne r2,zero,207c8 printf("OC_I2C_Write error[7]\r\n"); 207b4: 010000f4 movhi r4,3 - 207b8: 21090e04 addi r4,r4,9272 - 207bc: 002367c0 call 2367c + 207b8: 2106c504 addi r4,r4,6932 + 207bc: 00231400 call 23140 return FALSE; 207c0: 0005883a mov r2,zero 207c4: 00001a06 br 20830 @@ -1608,8 +1593,8 @@ bool OC_I2C_Write(alt_32 i2c_base,alt_u8 device_address,alt_u8 sub_address, alt 207d0: 1000051e bne r2,zero,207e8 printf("OC_I2C_Write error[8]\r\n"); 207d4: 010000f4 movhi r4,3 - 207d8: 21091404 addi r4,r4,9296 - 207dc: 002367c0 call 2367c + 207d8: 2106cb04 addi r4,r4,6956 + 207dc: 00231400 call 23140 return FALSE; 207e0: 0005883a mov r2,zero 207e4: 00001206 br 20830 @@ -1623,7 +1608,7 @@ bool OC_I2C_Write(alt_32 i2c_base,alt_u8 device_address,alt_u8 sub_address, alt 207ec: 10bfffc4 addi r2,r2,-1 207f0: e0bffb15 stw r2,-20(fp) 207f4: e0bffb17 ldw r2,-20(fp) - 207f8: 103fda0e bge r2,zero,20764 + 207f8: 103fda0e bge r2,zero,20764 <_gp+0xfffe422c> //wait TIP bit go to 0 to end Tx if(!ACK_check( i2c_base)) return false; @@ -1637,8 +1622,8 @@ bool OC_I2C_Write(alt_32 i2c_base,alt_u8 device_address,alt_u8 sub_address, alt 2080c: 1000051e bne r2,zero,20824 printf("OC_I2C_Write error[9]\r\n"); 20810: 010000f4 movhi r4,3 - 20814: 21091a04 addi r4,r4,9320 - 20818: 002367c0 call 2367c + 20814: 2106d104 addi r4,r4,6980 + 20818: 00231400 call 23140 return FALSE; 2081c: 0005883a mov r2,zero 20820: 00000306 br 20830 @@ -1647,7 +1632,7 @@ bool OC_I2C_Write(alt_32 i2c_base,alt_u8 device_address,alt_u8 sub_address, alt //OS_msleep(1); usleep(SLEEP_TIME); 20824: 01003e84 movi r4,250 - 20828: 00302f00 call 302f0 + 20828: 002f9cc0 call 2f9cc // printf("\n receive ACK-data! \n"); @@ -1677,7 +1662,7 @@ bool ACK_judge_for_read(alt_32 i2c_base) // OS_msleep( SLEEP_TIME ); usleep(ACK_SLEEP_TIME); 20858: 01003e84 movi r4,250 - 2085c: 00302f00 call 302f0 + 2085c: 002f9cc0 call 2f9cc // while(this_data & 0x02) // { // this_data = Read32_Data ( hPCIe, i2c_base, 4); @@ -1749,8 +1734,8 @@ bool OC_I2C_Read(alt_32 i2c_base,alt_u8 device_address,alt_u8 sub_address, alt_ 20900: 1000051e bne r2,zero,20918 printf("OC_I2C_Read error[2]\r\n"); 20904: 010000f4 movhi r4,3 - 20908: 21092004 addi r4,r4,9344 - 2090c: 002367c0 call 2367c + 20908: 2106d704 addi r4,r4,7004 + 2090c: 00231400 call 23140 return FALSE; 20910: 0005883a mov r2,zero 20914: 00005206 br 20a60 @@ -1776,8 +1761,8 @@ bool OC_I2C_Read(alt_32 i2c_base,alt_u8 device_address,alt_u8 sub_address, alt_ 20948: 1000051e bne r2,zero,20960 printf("OC_I2C_Read error[5]\r\n"); 2094c: 010000f4 movhi r4,3 - 20950: 21092604 addi r4,r4,9368 - 20954: 002367c0 call 2367c + 20950: 2106dd04 addi r4,r4,7028 + 20954: 00231400 call 23140 return FALSE; 20958: 0005883a mov r2,zero 2095c: 00004006 br 20a60 @@ -1810,8 +1795,8 @@ bool OC_I2C_Read(alt_32 i2c_base,alt_u8 device_address,alt_u8 sub_address, alt_ 20998: 1000051e bne r2,zero,209b0 printf("OC_I2C_Read error[8]\r\n"); 2099c: 010000f4 movhi r4,3 - 209a0: 21092c04 addi r4,r4,9392 - 209a4: 002367c0 call 2367c + 209a0: 2106e304 addi r4,r4,7052 + 209a4: 00231400 call 23140 return FALSE; 209a8: 0005883a mov r2,zero 209ac: 00002c06 br 20a60 @@ -1841,8 +1826,8 @@ bool OC_I2C_Read(alt_32 i2c_base,alt_u8 device_address,alt_u8 sub_address, alt_ 209ec: 1000051e bne r2,zero,20a04 printf("OC_I2C_Read error[10]\r\n"); 209f0: 010000f4 movhi r4,3 - 209f4: 21093204 addi r4,r4,9416 - 209f8: 002367c0 call 2367c + 209f4: 2106e904 addi r4,r4,7076 + 209f8: 00231400 call 23140 return FALSE; 209fc: 0005883a mov r2,zero 20a00: 00001706 br 20a60 @@ -1871,7 +1856,7 @@ bool OC_I2C_Read(alt_32 i2c_base,alt_u8 device_address,alt_u8 sub_address, alt_ 20a30: e0bffa15 stw r2,-24(fp) 20a34: e0fffa17 ldw r3,-24(fp) 20a38: e0800217 ldw r2,8(fp) - 20a3c: 18bfde16 blt r3,r2,209b8 + 20a3c: 18bfde16 blt r3,r2,209b8 <_gp+0xfffe4480> Data32=IORD( i2c_base, 3); *(pData8+i) = Data32 & 0xff; @@ -1888,7 +1873,7 @@ bool OC_I2C_Read(alt_32 i2c_base,alt_u8 device_address,alt_u8 sub_address, alt_ //OS_msleep(1); usleep(SLEEP_TIME); 20a54: 01003e84 movi r4,250 - 20a58: 00302f00 call 302f0 + 20a58: 002f9cc0 call 2f9cc // printf(" Read [%02X] = %02Xh\r\n", sub_address, data); @@ -1942,8 +1927,8 @@ bool OC_I2C_Read_Continue(alt_32 i2c_base,alt_u8 device_address, alt_u8 *pData8 20ad0: 1000051e bne r2,zero,20ae8 printf("OC_I2C_Read error[8]\r\n"); 20ad4: 010000f4 movhi r4,3 - 20ad8: 21092c04 addi r4,r4,9392 - 20adc: 002367c0 call 2367c + 20ad8: 2106e304 addi r4,r4,7052 + 20adc: 00231400 call 23140 return FALSE; 20ae0: 0005883a mov r2,zero 20ae4: 00002c06 br 20b98 @@ -1973,8 +1958,8 @@ bool OC_I2C_Read_Continue(alt_32 i2c_base,alt_u8 device_address, alt_u8 *pData8 20b24: 1000051e bne r2,zero,20b3c printf("OC_I2C_Read error[10]\r\n"); 20b28: 010000f4 movhi r4,3 - 20b2c: 21093204 addi r4,r4,9416 - 20b30: 002367c0 call 2367c + 20b2c: 2106e904 addi r4,r4,7076 + 20b30: 00231400 call 23140 return FALSE; 20b34: 0005883a mov r2,zero 20b38: 00001706 br 20b98 @@ -2003,7 +1988,7 @@ bool OC_I2C_Read_Continue(alt_32 i2c_base,alt_u8 device_address, alt_u8 *pData8 20b68: e0bffa15 stw r2,-24(fp) 20b6c: e0fffa17 ldw r3,-24(fp) 20b70: e0bfff17 ldw r2,-4(fp) - 20b74: 18bfde16 blt r3,r2,20af0 + 20b74: 18bfde16 blt r3,r2,20af0 <_gp+0xfffe45b8> Data32=IORD( i2c_base, 3); *(pData8+i) = Data32 & 0xff; @@ -2020,7 +2005,7 @@ bool OC_I2C_Read_Continue(alt_32 i2c_base,alt_u8 device_address, alt_u8 *pData8 //OS_msleep(1); usleep(SLEEP_TIME); 20b8c: 01003e84 movi r4,250 - 20b90: 00302f00 call 302f0 + 20b90: 002f9cc0 call 2f9cc // printf(" Read [%02X] = %02Xh\r\n", sub_address, data); @@ -2093,8 +2078,8 @@ bool OC_I2CL_Write(alt_32 i2c_base,alt_u8 device_address,alt_u16 sub_address,al 20c2c: 1000051e bne r2,zero,20c44 printf("OC_I2CL_Write error[0]\r\n"); 20c30: 010000f4 movhi r4,3 - 20c34: 21093804 addi r4,r4,9440 - 20c38: 002367c0 call 2367c + 20c34: 2106ef04 addi r4,r4,7100 + 20c38: 00231400 call 23140 return FALSE; 20c3c: 0005883a mov r2,zero 20c40: 00005906 br 20da8 @@ -2132,8 +2117,8 @@ bool OC_I2CL_Write(alt_32 i2c_base,alt_u8 device_address,alt_u16 sub_address,al 20c88: 1000051e bne r2,zero,20ca0 printf("OC_I2CL_Write error[1]\r\n"); 20c8c: 010000f4 movhi r4,3 - 20c90: 21093e04 addi r4,r4,9464 - 20c94: 002367c0 call 2367c + 20c90: 2106f504 addi r4,r4,7124 + 20c94: 00231400 call 23140 return FALSE; 20c98: 0005883a mov r2,zero 20c9c: 00004206 br 20da8 @@ -2166,8 +2151,8 @@ bool OC_I2CL_Write(alt_32 i2c_base,alt_u8 device_address,alt_u16 sub_address,al 20cd8: 1000051e bne r2,zero,20cf0 printf("OC_I2CL_Write error[2]\r\n"); 20cdc: 010000f4 movhi r4,3 - 20ce0: 21094404 addi r4,r4,9488 - 20ce4: 002367c0 call 2367c + 20ce0: 2106fb04 addi r4,r4,7148 + 20ce4: 00231400 call 23140 return FALSE; 20ce8: 0005883a mov r2,zero 20cec: 00002e06 br 20da8 @@ -2214,8 +2199,8 @@ bool OC_I2CL_Write(alt_32 i2c_base,alt_u8 device_address,alt_u16 sub_address,al 20d54: 1000051e bne r2,zero,20d6c printf("OC_I2CL_Write error[3]\r\n"); 20d58: 010000f4 movhi r4,3 - 20d5c: 21094a04 addi r4,r4,9512 - 20d60: 002367c0 call 2367c + 20d5c: 21070104 addi r4,r4,7172 + 20d60: 00231400 call 23140 return FALSE; 20d64: 0005883a mov r2,zero 20d68: 00000f06 br 20da8 @@ -2229,7 +2214,7 @@ bool OC_I2CL_Write(alt_32 i2c_base,alt_u8 device_address,alt_u16 sub_address,al 20d70: 10bfffc4 addi r2,r2,-1 20d74: e0bffa15 stw r2,-24(fp) 20d78: e0bffa17 ldw r2,-24(fp) - 20d7c: 103fe00e bge r2,zero,20d00 + 20d7c: 103fe00e bge r2,zero,20d00 <_gp+0xfffe47c8> //wait TIP bit go to 0 to end Tx if(!ACK_check( i2c_base)) return FALSE; @@ -2248,7 +2233,7 @@ bool OC_I2CL_Write(alt_32 i2c_base,alt_u8 device_address,alt_u16 sub_address,al //OS_msleep(1); usleep(SLEEP_TIME); 20d9c: 01003e84 movi r4,250 - 20da0: 00302f00 call 302f0 + 20da0: 002f9cc0 call 2f9cc // printf("\n receive ACK-data! \n"); return TRUE; @@ -2321,8 +2306,8 @@ bool OC_I2CL_Read(alt_32 i2c_base,alt_u8 device_address, alt_u16 sub_address, a 20e3c: 1000051e bne r2,zero,20e54 printf("OC_I2CL_Read error[0]\r\n"); 20e40: 010000f4 movhi r4,3 - 20e44: 21095004 addi r4,r4,9536 - 20e48: 002367c0 call 2367c + 20e44: 21070704 addi r4,r4,7196 + 20e48: 00231400 call 23140 return FALSE; 20e4c: 0005883a mov r2,zero 20e50: 00007506 br 21028 @@ -2360,8 +2345,8 @@ bool OC_I2CL_Read(alt_32 i2c_base,alt_u8 device_address, alt_u16 sub_address, a 20e98: 1000051e bne r2,zero,20eb0 printf("OC_I2CL_Read error[1]\r\n"); 20e9c: 010000f4 movhi r4,3 - 20ea0: 21095604 addi r4,r4,9560 - 20ea4: 002367c0 call 2367c + 20ea0: 21070d04 addi r4,r4,7220 + 20ea4: 00231400 call 23140 return FALSE; 20ea8: 0005883a mov r2,zero 20eac: 00005e06 br 21028 @@ -2397,8 +2382,8 @@ bool OC_I2CL_Read(alt_32 i2c_base,alt_u8 device_address, alt_u16 sub_address, a 20ef4: 1000051e bne r2,zero,20f0c printf("OC_I2CL_Read error[2]\r\n"); 20ef8: 010000f4 movhi r4,3 - 20efc: 21095c04 addi r4,r4,9584 - 20f00: 002367c0 call 2367c + 20efc: 21071304 addi r4,r4,7244 + 20f00: 00231400 call 23140 return FALSE; 20f04: 0005883a mov r2,zero 20f08: 00004706 br 21028 @@ -2438,8 +2423,8 @@ bool OC_I2CL_Read(alt_32 i2c_base,alt_u8 device_address, alt_u16 sub_address, a 20f58: 1000051e bne r2,zero,20f70 printf("OC_I2CL_Read error[3]\r\n"); 20f5c: 010000f4 movhi r4,3 - 20f60: 21096204 addi r4,r4,9608 - 20f64: 002367c0 call 2367c + 20f60: 21071904 addi r4,r4,7268 + 20f64: 00231400 call 23140 return FALSE; 20f68: 0005883a mov r2,zero 20f6c: 00002e06 br 21028 @@ -2472,8 +2457,8 @@ bool OC_I2CL_Read(alt_32 i2c_base,alt_u8 device_address, alt_u16 sub_address, a 20fac: 1000051e bne r2,zero,20fc4 printf("OC_I2CL_Read error[4]\r\n"); 20fb0: 010000f4 movhi r4,3 - 20fb4: 21096804 addi r4,r4,9632 - 20fb8: 002367c0 call 2367c + 20fb4: 21071f04 addi r4,r4,7292 + 20fb8: 00231400 call 23140 return FALSE; 20fbc: 0005883a mov r2,zero 20fc0: 00001906 br 21028 @@ -2502,7 +2487,7 @@ bool OC_I2CL_Read(alt_32 i2c_base,alt_u8 device_address, alt_u16 sub_address, a 20ff0: e0bff915 stw r2,-28(fp) 20ff4: e0fff917 ldw r3,-28(fp) 20ff8: e0800217 ldw r2,8(fp) - 20ffc: 18bfde16 blt r3,r2,20f78 + 20ffc: 18bfde16 blt r3,r2,20f78 <_gp+0xfffe4a40> DataLow = Data32 & 0xff; pData16 = (DataHigh << 8) | DataLow; @@ -2521,7 +2506,7 @@ bool OC_I2CL_Read(alt_32 i2c_base,alt_u8 device_address, alt_u16 sub_address, a //OS_msleep(1); usleep(SLEEP_TIME); 2101c: 01003e84 movi r4,250 - 21020: 00302f00 call 302f0 + 21020: 002f9cc0 call 2f9cc return TRUE; 21024: 00800044 movi r2,1 @@ -2610,7 +2595,7 @@ void Focus_Init(void){ //////////// focus at initial time usleep(100); 2111c: 01001904 movi r4,100 - 21120: 00302f00 call 302f0 + 21120: 002f9cc0 call 2f9cc IOWR(TERASIC_AUTO_FOCUS_0_BASE,REG_GO, 1); 21124: 00c00044 movi r3,1 21128: 00800134 movhi r2,4 @@ -2618,7 +2603,7 @@ void Focus_Init(void){ 21130: 10c00035 stwio r3,0(r2) usleep(2); 21134: 01000084 movi r4,2 - 21138: 00302f00 call 302f0 + 21138: 002f9cc0 call 2f9cc IOWR(TERASIC_AUTO_FOCUS_0_BASE,REG_GO, 0); 2113c: 0007883a mov r3,zero 21140: 00800134 movhi r2,4 @@ -2729,8 +2714,8 @@ alt_u16 Focus_Window(int x,int y){ 21294: 180d883a mov r6,r3 21298: 100b883a mov r5,r2 2129c: 010000f4 movhi r4,3 - 212a0: 21096e04 addi r4,r4,9656 - 212a4: 00235600 call 23560 + 212a0: 21072504 addi r4,r4,7316 + 212a4: 00230240 call 23024 IOWR(TERASIC_AUTO_FOCUS_0_BASE,REG_FOCUS_X_START, x_start);//x_start 212a8: e0fffc0b ldhu r3,-16(fp) @@ -2745,7 +2730,7 @@ alt_u16 Focus_Window(int x,int y){ usleep(10); 212c8: 01000284 movi r4,10 - 212cc: 00302f00 call 302f0 + 212cc: 002f9cc0 call 2f9cc IOWR(TERASIC_AUTO_FOCUS_0_BASE,REG_GO, 1); 212d0: 00c00044 movi r3,1 @@ -2754,7 +2739,7 @@ alt_u16 Focus_Window(int x,int y){ 212dc: 10c00035 stwio r3,0(r2) usleep(2); 212e0: 01000084 movi r4,2 - 212e4: 00302f00 call 302f0 + 212e4: 002f9cc0 call 2f9cc IOWR(TERASIC_AUTO_FOCUS_0_BASE,REG_GO, 0); 212e8: 0007883a mov r3,zero 212ec: 00800134 movhi r2,4 @@ -2773,8 +2758,8 @@ alt_u16 Focus_Window(int x,int y){ 21310: e0bffd0b ldhu r2,-12(fp) 21314: 100b883a mov r5,r2 21318: 010000f4 movhi r4,3 - 2131c: 21097504 addi r4,r4,9684 - 21320: 00235600 call 23560 + 2131c: 21072c04 addi r4,r4,7344 + 21320: 00230240 call 23024 return end_focus; 21324: e0bffd0b ldhu r2,-12(fp) @@ -2807,7 +2792,7 @@ static ALT_INLINE alt_u32 ALT_ALWAYS_INLINE alt_nticks (void) { return _alt_nticks; 21358: 008000f4 movhi r2,3 - 2135c: 109c6104 addi r2,r2,29060 + 2135c: 109a1404 addi r2,r2,26704 21360: 10c00017 ldw r3,0(r2) * Obtain the system clock rate in ticks/s. */ @@ -2816,7 +2801,7 @@ static ALT_INLINE alt_u32 ALT_ALWAYS_INLINE alt_ticks_per_second (void) { return _alt_tick_rate; 21364: 008000f4 movhi r2,3 - 21368: 109c6004 addi r2,r2,29056 + 21368: 109a1304 addi r2,r2,26700 2136c: 10800017 ldw r2,0(r2) alt_u32 TimeOut; @@ -2839,12 +2824,12 @@ static ALT_INLINE alt_u32 ALT_ALWAYS_INLINE alt_nticks (void) { return _alt_nticks; 21394: 008000f4 movhi r2,3 - 21398: 109c6104 addi r2,r2,29060 + 21398: 109a1404 addi r2,r2,26704 2139c: 10c00017 ldw r3,0(r2) 213a0: e0bfff17 ldw r2,-4(fp) - 213a4: 18bff636 bltu r3,r2,21380 + 213a4: 18bff636 bltu r3,r2,21380 <_gp+0xfffe4e48> 213a8: 008000f4 movhi r2,3 - 213ac: 109c6104 addi r2,r2,29060 + 213ac: 109a1404 addi r2,r2,26704 213b0: 10c00017 ldw r3,0(r2) if(alt_nticks() < TimeOut ) Released = TRUE; @@ -2855,12 +2840,12 @@ static ALT_INLINE alt_u32 ALT_ALWAYS_INLINE alt_nticks (void) 213c4: 00000306 br 213d4 else printf("\n =>¡¡Released check TimeOut!\n"); 213c8: 010000f4 movhi r4,3 - 213cc: 21097a04 addi r4,r4,9704 - 213d0: 002367c0 call 2367c + 213cc: 21073104 addi r4,r4,7364 + 213d0: 00231400 call 23140 usleep(10000); 213d4: 0109c404 movi r4,10000 - 213d8: 00302f00 call 302f0 + 213d8: 002f9cc0 call 2f9cc return Released; 213dc: e0bffe17 ldw r2,-8(fp) @@ -2885,52 +2870,52 @@ void mipi_clear_error(void){ MipiBridgeRegWrite(MIPI_REG_CSIStatus,0x01FF); // clear error 21404: 01407fc4 movi r5,511 21408: 01001904 movi r4,100 - 2140c: 0021bb80 call 21bb8 + 2140c: 00219c80 call 219c8 MipiBridgeRegWrite(MIPI_REG_MDLSynErr,0x0000); // clear error 21410: 000b883a mov r5,zero 21414: 01001a04 movi r4,104 - 21418: 0021bb80 call 21bb8 + 21418: 00219c80 call 219c8 MipiBridgeRegWrite(MIPI_REG_FrmErrCnt,0x0000); // clear error 2141c: 000b883a mov r5,zero 21420: 01002004 movi r4,128 - 21424: 0021bb80 call 21bb8 + 21424: 00219c80 call 219c8 MipiBridgeRegWrite(MIPI_REG_MDLErrCnt, 0x0000); // clear error 21428: 000b883a mov r5,zero 2142c: 01002404 movi r4,144 - 21430: 0021bb80 call 21bb8 + 21430: 00219c80 call 219c8 MipiBridgeRegWrite(0x0082,0x00); 21434: 000b883a mov r5,zero 21438: 01002084 movi r4,130 - 2143c: 0021bb80 call 21bb8 + 2143c: 00219c80 call 219c8 MipiBridgeRegWrite(0x0084,0x00); 21440: 000b883a mov r5,zero 21444: 01002104 movi r4,132 - 21448: 0021bb80 call 21bb8 + 21448: 00219c80 call 219c8 MipiBridgeRegWrite(0x0086,0x00); 2144c: 000b883a mov r5,zero 21450: 01002184 movi r4,134 - 21454: 0021bb80 call 21bb8 + 21454: 00219c80 call 219c8 MipiBridgeRegWrite(0x0088,0x00); 21458: 000b883a mov r5,zero 2145c: 01002204 movi r4,136 - 21460: 0021bb80 call 21bb8 + 21460: 00219c80 call 219c8 MipiBridgeRegWrite(0x008A,0x00); 21464: 000b883a mov r5,zero 21468: 01002284 movi r4,138 - 2146c: 0021bb80 call 21bb8 + 2146c: 00219c80 call 219c8 MipiBridgeRegWrite(0x008C,0x00); 21470: 000b883a mov r5,zero 21474: 01002304 movi r4,140 - 21478: 0021bb80 call 21bb8 + 21478: 00219c80 call 219c8 MipiBridgeRegWrite(0x008E,0x00); 2147c: 000b883a mov r5,zero 21480: 01002384 movi r4,142 - 21484: 0021bb80 call 21bb8 + 21484: 00219c80 call 219c8 MipiBridgeRegWrite(0x0090,0x00); 21488: 000b883a mov r5,zero 2148c: 01002404 movi r4,144 - 21490: 0021bb80 call 21bb8 + 21490: 00219c80 call 219c8 } 21494: 0001883a nop 21498: e037883a mov sp,fp @@ -2951,23 +2936,23 @@ void mipi_show_error_info(void){ PHY_status = MipiBridgeRegRead(MIPI_REG_PHYSta); 214bc: 01001884 movi r4,98 - 214c0: 0021c240 call 21c24 + 214c0: 0021a340 call 21a34 214c4: e0bffd0d sth r2,-12(fp) SCI_status = MipiBridgeRegRead(MIPI_REG_CSIStatus); 214c8: 01001904 movi r4,100 - 214cc: 0021c240 call 21c24 + 214cc: 0021a340 call 21a34 214d0: e0bffd8d sth r2,-10(fp) MDLSynErr = MipiBridgeRegRead(MIPI_REG_MDLSynErr); 214d4: 01001a04 movi r4,104 - 214d8: 0021c240 call 21c24 + 214d8: 0021a340 call 21a34 214dc: e0bffe0d sth r2,-8(fp) FrmErrCnt = MipiBridgeRegRead(MIPI_REG_FrmErrCnt); 214e0: 01002004 movi r4,128 - 214e4: 0021c240 call 21c24 + 214e4: 0021a340 call 21a34 214e8: e0bffe8d sth r2,-6(fp) MDLErrCnt = MipiBridgeRegRead(MIPI_REG_MDLErrCnt); 214ec: 01002404 movi r4,144 - 214f0: 0021c240 call 21c24 + 214f0: 0021a340 call 21a34 214f4: e0bfff0d sth r2,-4(fp) printf("PHY_status=%xh, CSI_status=%xh, MDLSynErr=%xh, FrmErrCnt=%xh, MDLErrCnt=%xh\r\n", PHY_status, SCI_status, MDLSynErr,FrmErrCnt, MDLErrCnt); 214f8: e13ffd0b ldhu r4,-12(fp) @@ -2981,8 +2966,8 @@ void mipi_show_error_info(void){ 21518: 280d883a mov r6,r5 2151c: 200b883a mov r5,r4 21520: 010000f4 movhi r4,3 - 21524: 21098204 addi r4,r4,9736 - 21528: 00235600 call 23560 + 21524: 21073904 addi r4,r4,7396 + 21528: 00230240 call 23024 } 2152c: 0001883a nop 21530: e037883a mov sp,fp @@ -3000,100 +2985,100 @@ void mipi_show_error_info_more(void){ 21550: d839883a mov fp,sp printf("FrmErrCnt = %d\n",MipiBridgeRegRead(0x0080)); 21554: 01002004 movi r4,128 - 21558: 0021c240 call 21c24 + 21558: 0021a340 call 21a34 2155c: 10bfffcc andi r2,r2,65535 21560: 100b883a mov r5,r2 21564: 010000f4 movhi r4,3 - 21568: 21099604 addi r4,r4,9816 - 2156c: 00235600 call 23560 + 21568: 21074d04 addi r4,r4,7476 + 2156c: 00230240 call 23024 printf("CRCErrCnt = %d\n",MipiBridgeRegRead(0x0082)); 21570: 01002084 movi r4,130 - 21574: 0021c240 call 21c24 + 21574: 0021a340 call 21a34 21578: 10bfffcc andi r2,r2,65535 2157c: 100b883a mov r5,r2 21580: 010000f4 movhi r4,3 - 21584: 21099a04 addi r4,r4,9832 - 21588: 00235600 call 23560 + 21584: 21075104 addi r4,r4,7492 + 21588: 00230240 call 23024 printf("CorErrCnt = %d\n",MipiBridgeRegRead(0x0084)); 2158c: 01002104 movi r4,132 - 21590: 0021c240 call 21c24 + 21590: 0021a340 call 21a34 21594: 10bfffcc andi r2,r2,65535 21598: 100b883a mov r5,r2 2159c: 010000f4 movhi r4,3 - 215a0: 21099e04 addi r4,r4,9848 - 215a4: 00235600 call 23560 + 215a0: 21075504 addi r4,r4,7508 + 215a4: 00230240 call 23024 printf("HdrErrCnt = %d\n",MipiBridgeRegRead(0x0086)); 215a8: 01002184 movi r4,134 - 215ac: 0021c240 call 21c24 + 215ac: 0021a340 call 21a34 215b0: 10bfffcc andi r2,r2,65535 215b4: 100b883a mov r5,r2 215b8: 010000f4 movhi r4,3 - 215bc: 2109a204 addi r4,r4,9864 - 215c0: 00235600 call 23560 + 215bc: 21075904 addi r4,r4,7524 + 215c0: 00230240 call 23024 printf("EIDErrCnt = %d\n",MipiBridgeRegRead(0x0088)); 215c4: 01002204 movi r4,136 - 215c8: 0021c240 call 21c24 + 215c8: 0021a340 call 21a34 215cc: 10bfffcc andi r2,r2,65535 215d0: 100b883a mov r5,r2 215d4: 010000f4 movhi r4,3 - 215d8: 2109a604 addi r4,r4,9880 - 215dc: 00235600 call 23560 + 215d8: 21075d04 addi r4,r4,7540 + 215dc: 00230240 call 23024 printf("CtlErrCnt = %d\n",MipiBridgeRegRead(0x008A)); 215e0: 01002284 movi r4,138 - 215e4: 0021c240 call 21c24 + 215e4: 0021a340 call 21a34 215e8: 10bfffcc andi r2,r2,65535 215ec: 100b883a mov r5,r2 215f0: 010000f4 movhi r4,3 - 215f4: 2109aa04 addi r4,r4,9896 - 215f8: 00235600 call 23560 + 215f4: 21076104 addi r4,r4,7556 + 215f8: 00230240 call 23024 printf("SoTErrCnt = %d\n",MipiBridgeRegRead(0x008C)); 215fc: 01002304 movi r4,140 - 21600: 0021c240 call 21c24 + 21600: 0021a340 call 21a34 21604: 10bfffcc andi r2,r2,65535 21608: 100b883a mov r5,r2 2160c: 010000f4 movhi r4,3 - 21610: 2109ae04 addi r4,r4,9912 - 21614: 00235600 call 23560 + 21610: 21076504 addi r4,r4,7572 + 21614: 00230240 call 23024 printf("SynErrCnt = %d\n",MipiBridgeRegRead(0x008E)); 21618: 01002384 movi r4,142 - 2161c: 0021c240 call 21c24 + 2161c: 0021a340 call 21a34 21620: 10bfffcc andi r2,r2,65535 21624: 100b883a mov r5,r2 21628: 010000f4 movhi r4,3 - 2162c: 2109b204 addi r4,r4,9928 - 21630: 00235600 call 23560 + 2162c: 21076904 addi r4,r4,7588 + 21630: 00230240 call 23024 printf("MDLErrCnt = %d\n",MipiBridgeRegRead(0x0090)); 21634: 01002404 movi r4,144 - 21638: 0021c240 call 21c24 + 21638: 0021a340 call 21a34 2163c: 10bfffcc andi r2,r2,65535 21640: 100b883a mov r5,r2 21644: 010000f4 movhi r4,3 - 21648: 2109b604 addi r4,r4,9944 - 2164c: 00235600 call 23560 + 21648: 21076d04 addi r4,r4,7604 + 2164c: 00230240 call 23024 printf("FIFOSTATUS = %d\n",MipiBridgeRegRead(0x00F8)); 21650: 01003e04 movi r4,248 - 21654: 0021c240 call 21c24 + 21654: 0021a340 call 21a34 21658: 10bfffcc andi r2,r2,65535 2165c: 100b883a mov r5,r2 21660: 010000f4 movhi r4,3 - 21664: 2109ba04 addi r4,r4,9960 - 21668: 00235600 call 23560 + 21664: 21077104 addi r4,r4,7620 + 21668: 00230240 call 23024 printf("DataType = 0x%04x\n",MipiBridgeRegRead(0x006A)); 2166c: 01001a84 movi r4,106 - 21670: 0021c240 call 21c24 + 21670: 0021a340 call 21a34 21674: 10bfffcc andi r2,r2,65535 21678: 100b883a mov r5,r2 2167c: 010000f4 movhi r4,3 - 21680: 2109bf04 addi r4,r4,9980 - 21684: 00235600 call 23560 + 21680: 21077604 addi r4,r4,7640 + 21684: 00230240 call 23024 printf("CSIPktLen = %d\n",MipiBridgeRegRead(0x006E)); 21688: 01001b84 movi r4,110 - 2168c: 0021c240 call 21c24 + 2168c: 0021a340 call 21a34 21690: 10bfffcc andi r2,r2,65535 21694: 100b883a mov r5,r2 21698: 010000f4 movhi r4,3 - 2169c: 2109c404 addi r4,r4,10000 - 216a0: 00235600 call 23560 + 2169c: 21077b04 addi r4,r4,7660 + 216a0: 00230240 call 23024 } 216a4: 0001883a nop 216a8: e037883a mov sp,fp @@ -3104,12 +3089,16 @@ void mipi_show_error_info_more(void){ 000216bc : + + bool MIPI_Init(void){ 216bc: defffd04 addi sp,sp,-12 216c0: dfc00215 stw ra,8(sp) 216c4: df000115 stw fp,4(sp) 216c8: df000104 addi fp,sp,4 bool bSuccess; + + bSuccess = oc_i2c_init_ex(I2C_OPENCORES_MIPI_BASE, 50*1000*1000,400*1000); //I2C: 400K 216cc: 018001b4 movhi r6,6 216d0: 3186a004 addi r6,r6,6784 @@ -3124,31 +3113,41 @@ bool MIPI_Init(void){ 216f0: 1000031e bne r2,zero,21700 printf("failed to init MIPI- Bridge i2c\r\n"); 216f4: 010000f4 movhi r4,3 - 216f8: 2109c804 addi r4,r4,10016 - 216fc: 002367c0 call 2367c + 216f8: 21077f04 addi r4,r4,7676 + 216fc: 00231400 call 23140 + usleep(50*1000); 21700: 0130d414 movui r4,50000 - 21704: 00302f00 call 302f0 + 21704: 002f9cc0 call 2f9cc MipiBridgeInit(); - 21708: 0021c9c0 call 21c9c + 21708: 0021aac0 call 21aac + usleep(500*1000); 2170c: 01000234 movhi r4,8 21710: 21284804 addi r4,r4,-24288 - 21714: 00302f00 call 302f0 + 21714: 002f9cc0 call 2f9cc + // bSuccess = oc_i2c_init_ex(I2C_OPENCORES_CAMERA_BASE, 50*1000*1000,400*1000); //I2C: 400K // if (!bSuccess) // printf("failed to init MIPI- Camera i2c\r\n"); + MipiCameraInit(); - 21718: 00224800 call 22480 + 21718: 002203c0 call 2203c MIPI_BIN_LEVEL(DEFAULT_LEVEL); - 2171c: 010000c4 movi r4,3 - 21720: 00222c00 call 222c0 + 2171c: 01000084 movi r4,2 + 21720: 0021e7c0 call 21e7c // OV8865_FOCUS_Move_to(340); + // oc_i2c_uninit(I2C_OPENCORES_CAMERA_BASE); // Release I2C bus , due to two I2C master shared! + + usleep(1000); 21724: 0100fa04 movi r4,1000 - 21728: 00302f00 call 302f0 + 21728: 002f9cc0 call 2f9cc + + // oc_i2c_uninit(I2C_OPENCORES_MIPI_BASE); + return bSuccess; 2172c: e0bfff17 ldw r2,-4(fp) } @@ -3160,20196 +3159,19460 @@ bool MIPI_Init(void){ 00021744

      : + + + int main() { - 21744: defff804 addi sp,sp,-32 - 21748: dfc00715 stw ra,28(sp) - 2174c: df000615 stw fp,24(sp) - 21750: df000604 addi fp,sp,24 - fcntl(STDIN_FILENO, F_SETFL, O_NONBLOCK); - 21754: 01900004 movi r6,16384 - 21758: 01400104 movi r5,4 - 2175c: 0009883a mov r4,zero - 21760: 002f9040 call 2f904 - printf("DE10-LITE D8M VGA Demo\n"); + 21744: defffa04 addi sp,sp,-24 + 21748: dfc00515 stw ra,20(sp) + 2174c: df000415 stw fp,16(sp) + 21750: df000404 addi fp,sp,16 + int boundingBoxColour = 0; + 21754: e03ffc15 stw zero,-16(fp) + + + printf("DE10-LITE D8M VGA Demo\n"); + 21758: 010000f4 movhi r4,3 + 2175c: 21078804 addi r4,r4,7712 + 21760: 00231400 call 23140 + printf("Imperial College EEE2 Project version\n"); 21764: 010000f4 movhi r4,3 - 21768: 2109d104 addi r4,r4,10052 - 2176c: 002367c0 call 2367c - printf("Imperial College EEE2 Project version\n"); - 21770: 010000f4 movhi r4,3 - 21774: 2109d704 addi r4,r4,10076 - 21778: 002367c0 call 2367c - IOWR(MIPI_PWDN_N_BASE, 0x00, 0x00); - 2177c: 0007883a mov r3,zero - 21780: 00800134 movhi r2,4 - 21784: 10842004 addi r2,r2,4224 - 21788: 10c00035 stwio r3,0(r2) - IOWR(MIPI_RESET_N_BASE, 0x00, 0x00); - 2178c: 0007883a mov r3,zero - 21790: 00800134 movhi r2,4 - 21794: 10842404 addi r2,r2,4240 - 21798: 10c00035 stwio r3,0(r2) - usleep(2000); - 2179c: 0101f404 movi r4,2000 - 217a0: 00302f00 call 302f0 - IOWR(MIPI_PWDN_N_BASE, 0x00, 0xFF); - 217a4: 00c03fc4 movi r3,255 - 217a8: 00800134 movhi r2,4 - 217ac: 10842004 addi r2,r2,4224 - 217b0: 10c00035 stwio r3,0(r2) - usleep(2000); - 217b4: 0101f404 movi r4,2000 - 217b8: 00302f00 call 302f0 - IOWR(MIPI_RESET_N_BASE, 0x00, 0xFF); - 217bc: 00c03fc4 movi r3,255 + 21768: 21078e04 addi r4,r4,7736 + 2176c: 00231400 call 23140 + IOWR(MIPI_PWDN_N_BASE, 0x00, 0x00); + 21770: 0007883a mov r3,zero + 21774: 00800134 movhi r2,4 + 21778: 10842004 addi r2,r2,4224 + 2177c: 10c00035 stwio r3,0(r2) + IOWR(MIPI_RESET_N_BASE, 0x00, 0x00); + 21780: 0007883a mov r3,zero + 21784: 00800134 movhi r2,4 + 21788: 10842404 addi r2,r2,4240 + 2178c: 10c00035 stwio r3,0(r2) + + usleep(2000); + 21790: 0101f404 movi r4,2000 + 21794: 002f9cc0 call 2f9cc + IOWR(MIPI_PWDN_N_BASE, 0x00, 0xFF); + 21798: 00c03fc4 movi r3,255 + 2179c: 00800134 movhi r2,4 + 217a0: 10842004 addi r2,r2,4224 + 217a4: 10c00035 stwio r3,0(r2) + usleep(2000); + 217a8: 0101f404 movi r4,2000 + 217ac: 002f9cc0 call 2f9cc + IOWR(MIPI_RESET_N_BASE, 0x00, 0xFF); + 217b0: 00c03fc4 movi r3,255 + 217b4: 00800134 movhi r2,4 + 217b8: 10842404 addi r2,r2,4240 + 217bc: 10c00035 stwio r3,0(r2) + + printf("Image Processor ID: %x\n",IORD(0x42000,EEE_IMGPROC_ID)); 217c0: 00800134 movhi r2,4 - 217c4: 10842404 addi r2,r2,4240 - 217c8: 10c00035 stwio r3,0(r2) - printf("Image Processor ID: %x\n",IORD(EEE_IMGPROC_0_BASE,EEE_IMGPROC_ID)); - 217cc: 00800134 movhi r2,4 - 217d0: 10880204 addi r2,r2,8200 - 217d4: 10800037 ldwio r2,0(r2) - 217d8: 100b883a mov r5,r2 - 217dc: 010000f4 movhi r4,3 - 217e0: 2109e104 addi r4,r4,10116 - 217e4: 00235600 call 23560 - usleep(2000); - 217e8: 0101f404 movi r4,2000 - 217ec: 00302f00 call 302f0 + 217c4: 10880204 addi r2,r2,8200 + 217c8: 10800037 ldwio r2,0(r2) + 217cc: 100b883a mov r5,r2 + 217d0: 010000f4 movhi r4,3 + 217d4: 21079804 addi r4,r4,7776 + 217d8: 00230240 call 23024 + //printf("Image Processor ID: %x\n",IORD(EEE_IMGPROC_0_BASE,EEE_IMGPROC_ID)); //Don't know why this doesn't work - definition is in system.h in BSP - // MIPI Init - if (!MIPI_Init()){ - 217f0: 00216bc0 call 216bc - 217f4: 1000041e bne r2,zero,21808 - printf("MIPI_Init Init failed!\r\n"); - 217f8: 010000f4 movhi r4,3 - 217fc: 2109e704 addi r4,r4,10140 - 21800: 002367c0 call 2367c - 21804: 00000306 br 21814 - }else{ - printf("MIPI_Init Init successfully!\r\n"); - 21808: 010000f4 movhi r4,3 - 2180c: 2109ed04 addi r4,r4,10164 - 21810: 002367c0 call 2367c - } - // while(1){ - mipi_clear_error(); + usleep(2000); + 217dc: 0101f404 movi r4,2000 + 217e0: 002f9cc0 call 2f9cc + + + // MIPI Init + if (!MIPI_Init()){ + 217e4: 00216bc0 call 216bc + 217e8: 1000041e bne r2,zero,217fc + printf("MIPI_Init Init failed!\r\n"); + 217ec: 010000f4 movhi r4,3 + 217f0: 21079e04 addi r4,r4,7800 + 217f4: 00231400 call 23140 + 217f8: 00000306 br 21808 + }else{ + printf("MIPI_Init Init successfully!\r\n"); + 217fc: 010000f4 movhi r4,3 + 21800: 2107a404 addi r4,r4,7824 + 21804: 00231400 call 23140 + } + +// while(1){ + mipi_clear_error(); + 21808: 00213f40 call 213f4 + usleep(50*1000); + 2180c: 0130d414 movui r4,50000 + 21810: 002f9cc0 call 2f9cc + mipi_clear_error(); 21814: 00213f40 call 213f4 - usleep(50*1000); - 21818: 0130d414 movui r4,50000 - 2181c: 00302f00 call 302f0 - mipi_clear_error(); - 21820: 00213f40 call 213f4 - usleep(1000*1000); - 21824: 010003f4 movhi r4,15 - 21828: 21109004 addi r4,r4,16960 - 2182c: 00302f00 call 302f0 - mipi_show_error_info(); - 21830: 00214ac0 call 214ac - // mipi_show_error_info_more(); - printf("\n"); - 21834: 01000284 movi r4,10 - 21838: 00235a40 call 235a4 - usleep(50*1000); - } -#endif + usleep(1000*1000); + 21818: 010003f4 movhi r4,15 + 2181c: 21109004 addi r4,r4,16960 + 21820: 002f9cc0 call 2f9cc + mipi_show_error_info(); + 21824: 00214ac0 call 214ac +// mipi_show_error_info_more(); + printf("\n"); + 21828: 01000284 movi r4,10 + 2182c: 00230680 call 23068 + + + ////////////////////////////////////////////////////////// alt_u16 bin_level = DEFAULT_LEVEL; - 2183c: 008000c4 movi r2,3 - 21840: e0bffa0d sth r2,-24(fp) + 21830: 00800084 movi r2,2 + 21834: e0bffd0d sth r2,-12(fp) alt_u8 manual_focus_step = 10; - 21844: 00800284 movi r2,10 - 21848: e0bffd85 stb r2,-10(fp) + 21838: 00800284 movi r2,10 + 2183c: e0bffd85 stb r2,-10(fp) alt_u16 current_focus = 300; - 2184c: 00804b04 movi r2,300 - 21850: e0bffa8d sth r2,-22(fp) - int boundingBoxColour = 0; - 21854: e03ffb15 stw zero,-20(fp) - alt_u32 exposureTime = EXPOSURE_INIT; - 21858: 00880004 movi r2,8192 - 2185c: e0bffc15 stw r2,-16(fp) - alt_u16 gain = GAIN_INIT; - 21860: 0083ffc4 movi r2,4095 - 21864: e0bffd0d sth r2,-12(fp) - - OV8865SetExposure(exposureTime); - 21868: e13ffc17 ldw r4,-16(fp) - 2186c: 00220580 call 22058 - OV8865SetGain(gain); - 21870: e0bffd0b ldhu r2,-12(fp) - 21874: 1009883a mov r4,r2 - 21878: 00221380 call 22138 + 21840: 00804b04 movi r2,300 + 21844: e0bffe0d sth r2,-8(fp) Focus_Init(); - 2187c: 002103c0 call 2103c + 21848: 002103c0 call 2103c while(1){ // touch KEY0 to trigger Auto focus if((IORD(KEY_BASE,0)&0x03) == 0x02){ - 21880: 00800134 movhi r2,4 - 21884: 10842804 addi r2,r2,4256 - 21888: 10800037 ldwio r2,0(r2) - 2188c: 108000cc andi r2,r2,3 - 21890: 10800098 cmpnei r2,r2,2 - 21894: 1000041e bne r2,zero,218a8 + 2184c: 00800134 movhi r2,4 + 21850: 10842804 addi r2,r2,4256 + 21854: 10800037 ldwio r2,0(r2) + 21858: 108000cc andi r2,r2,3 + 2185c: 10800098 cmpnei r2,r2,2 + 21860: 1000041e bne r2,zero,21874 current_focus = Focus_Window(320,240); - 21898: 01403c04 movi r5,240 - 2189c: 01005004 movi r4,320 - 218a0: 00211640 call 21164 - 218a4: e0bffa8d sth r2,-22(fp) + 21864: 01403c04 movi r5,240 + 21868: 01005004 movi r4,320 + 2186c: 00211640 call 21164 + 21870: e0bffe0d sth r2,-8(fp) } // touch KEY1 to ZOOM if((IORD(KEY_BASE,0)&0x03) == 0x01){ - 218a8: 00800134 movhi r2,4 - 218ac: 10842804 addi r2,r2,4256 - 218b0: 10800037 ldwio r2,0(r2) - 218b4: 108000cc andi r2,r2,3 - 218b8: 10800058 cmpnei r2,r2,1 - 218bc: 1000241e bne r2,zero,21950 + 21874: 00800134 movhi r2,4 + 21878: 10842804 addi r2,r2,4256 + 2187c: 10800037 ldwio r2,0(r2) + 21880: 108000cc andi r2,r2,3 + 21884: 10800058 cmpnei r2,r2,1 + 21888: 1000241e bne r2,zero,2191c if(bin_level == 3 )bin_level = 1; - 218c0: e0bffa0b ldhu r2,-24(fp) - 218c4: 108000d8 cmpnei r2,r2,3 - 218c8: 1000031e bne r2,zero,218d8 - 218cc: 00800044 movi r2,1 - 218d0: e0bffa0d sth r2,-24(fp) - 218d4: 00000306 br 218e4 + 2188c: e0bffd0b ldhu r2,-12(fp) + 21890: 108000d8 cmpnei r2,r2,3 + 21894: 1000031e bne r2,zero,218a4 + 21898: 00800044 movi r2,1 + 2189c: e0bffd0d sth r2,-12(fp) + 218a0: 00000306 br 218b0 else bin_level ++; - 218d8: e0bffa0b ldhu r2,-24(fp) - 218dc: 10800044 addi r2,r2,1 - 218e0: e0bffa0d sth r2,-24(fp) + 218a4: e0bffd0b ldhu r2,-12(fp) + 218a8: 10800044 addi r2,r2,1 + 218ac: e0bffd0d sth r2,-12(fp) printf("set bin level to %d\n",bin_level); - 218e4: e0bffa0b ldhu r2,-24(fp) - 218e8: 100b883a mov r5,r2 - 218ec: 010000f4 movhi r4,3 - 218f0: 2109f504 addi r4,r4,10196 - 218f4: 00235600 call 23560 + 218b0: e0bffd0b ldhu r2,-12(fp) + 218b4: 100b883a mov r5,r2 + 218b8: 010000f4 movhi r4,3 + 218bc: 2107ac04 addi r4,r4,7856 + 218c0: 00230240 call 23024 MIPI_BIN_LEVEL(bin_level); - 218f8: e0bffa0b ldhu r2,-24(fp) - 218fc: 10803fcc andi r2,r2,255 - 21900: 1009883a mov r4,r2 - 21904: 00222c00 call 222c0 + 218c4: e0bffd0b ldhu r2,-12(fp) + 218c8: 10803fcc andi r2,r2,255 + 218cc: 1009883a mov r4,r2 + 218d0: 0021e7c0 call 21e7c usleep(500000); - 21908: 01000234 movhi r4,8 - 2190c: 21284804 addi r4,r4,-24288 - 21910: 00302f00 call 302f0 + 218d4: 01000234 movhi r4,8 + 218d8: 21284804 addi r4,r4,-24288 + 218dc: 002f9cc0 call 2f9cc } #endif //Read messages from the image processor and print them on the terminal while ((IORD(0x42000,EEE_IMGPROC_STATUS)>>8) & 0xff) { //Find out if there are words to read - 21914: 00000e06 br 21950 + 218e0: 00000e06 br 2191c int word = IORD(0x42000,EEE_IMGPROC_MSG); //Get next word from message buffer - 21918: 00800134 movhi r2,4 - 2191c: 10880104 addi r2,r2,8196 - 21920: 10800037 ldwio r2,0(r2) - 21924: e0bfff15 stw r2,-4(fp) + 218e4: 00800134 movhi r2,4 + 218e8: 10880104 addi r2,r2,8196 + 218ec: 10800037 ldwio r2,0(r2) + 218f0: e0bfff15 stw r2,-4(fp) if (word == EEE_IMGPROC_MSG_START){ //Newline on message identifier - 21928: e0ffff17 ldw r3,-4(fp) - 2192c: 008014b4 movhi r2,82 - 21930: 10909084 addi r2,r2,16962 - 21934: 1880021e bne r3,r2,21940 + 218f4: e0ffff17 ldw r3,-4(fp) + 218f8: 008014b4 movhi r2,82 + 218fc: 10909084 addi r2,r2,16962 + 21900: 1880021e bne r3,r2,2190c printf("\n"); - 21938: 01000284 movi r4,10 - 2193c: 00235a40 call 235a4 + 21904: 01000284 movi r4,10 + 21908: 00230680 call 23068 } printf("%08x ",word); - 21940: e17fff17 ldw r5,-4(fp) - 21944: 010000f4 movhi r4,3 - 21948: 2109fb04 addi r4,r4,10220 - 2194c: 00235600 call 23560 + 2190c: e17fff17 ldw r5,-4(fp) + 21910: 010000f4 movhi r4,3 + 21914: 2107b204 addi r4,r4,7880 + 21918: 00230240 call 23024 } #endif //Read messages from the image processor and print them on the terminal while ((IORD(0x42000,EEE_IMGPROC_STATUS)>>8) & 0xff) { //Find out if there are words to read - 21950: 00800134 movhi r2,4 - 21954: 10880004 addi r2,r2,8192 - 21958: 10800037 ldwio r2,0(r2) - 2195c: 1005d23a srai r2,r2,8 - 21960: 10803fcc andi r2,r2,255 - 21964: 103fec1e bne r2,zero,21918 + 2191c: 00800134 movhi r2,4 + 21920: 10880004 addi r2,r2,8192 + 21924: 10800037 ldwio r2,0(r2) + 21928: 1005d23a srai r2,r2,8 + 2192c: 10803fcc andi r2,r2,255 + 21930: 103fec1e bne r2,zero,218e4 <_gp+0xfffe53ac> } printf("%08x ",word); } //Update the bounding box colour - boundingBoxColour = ((boundingBoxColour + 1) & 0xff); - 21968: e0bffb17 ldw r2,-20(fp) - 2196c: 10800044 addi r2,r2,1 - 21970: 10803fcc andi r2,r2,255 - 21974: e0bffb15 stw r2,-20(fp) + boundingBoxColour = (++boundingBoxColour & 0xff); + 21934: e0bffc17 ldw r2,-16(fp) + 21938: 10800044 addi r2,r2,1 + 2193c: e0bffc15 stw r2,-16(fp) + 21940: e0bffc17 ldw r2,-16(fp) + 21944: 10803fcc andi r2,r2,255 + 21948: e0bffc15 stw r2,-16(fp) IOWR(0x42000, EEE_IMGPROC_BBCOL, (boundingBoxColour << 8) | (0xff - boundingBoxColour)); - 21978: e0bffb17 ldw r2,-20(fp) - 2197c: 1006923a slli r3,r2,8 - 21980: 01003fc4 movi r4,255 - 21984: e0bffb17 ldw r2,-20(fp) - 21988: 2085c83a sub r2,r4,r2 - 2198c: 1886b03a or r3,r3,r2 - 21990: 00800134 movhi r2,4 - 21994: 10880304 addi r2,r2,8204 - 21998: 10c00035 stwio r3,0(r2) + 2194c: e0bffc17 ldw r2,-16(fp) + 21950: 1006923a slli r3,r2,8 + 21954: 01003fc4 movi r4,255 + 21958: e0bffc17 ldw r2,-16(fp) + 2195c: 2085c83a sub r2,r4,r2 + 21960: 1886b03a or r3,r3,r2 + 21964: 00800134 movhi r2,4 + 21968: 10880304 addi r2,r2,8204 + 2196c: 10c00035 stwio r3,0(r2) - //Process input commands - int in = getchar(); - 2199c: 008000f4 movhi r2,3 - 219a0: 10939f04 addi r2,r2,20092 - 219a4: 10800017 ldw r2,0(r2) - 219a8: 10800117 ldw r2,4(r2) - 219ac: 1009883a mov r4,r2 - 219b0: 0022b4c0 call 22b4c - 219b4: e0bffe15 stw r2,-8(fp) - switch (in) { - 219b8: e0bffe17 ldw r2,-8(fp) - 219bc: 10bfe704 addi r2,r2,-100 - 219c0: 10c00468 cmpgeui r3,r2,17 - 219c4: 1800661e bne r3,zero,21b60 - 219c8: 100690ba slli r3,r2,2 - 219cc: 008000b4 movhi r2,2 - 219d0: 10867804 addi r2,r2,6624 - 219d4: 1885883a add r2,r3,r2 - 219d8: 10800017 ldw r2,0(r2) - 219dc: 1000683a jmp r2 - 219e0: 00021a4c andi zero,zero,2153 - 219e4: 00021a24 muli zero,zero,2152 - 219e8: 00021b1c xori zero,zero,2156 - 219ec: 00021aa4 muli zero,zero,2154 - 219f0: 00021b60 cmpeqi zero,zero,2157 - 219f4: 00021b60 cmpeqi zero,zero,2157 - 219f8: 00021b60 cmpeqi zero,zero,2157 - 219fc: 00021b60 cmpeqi zero,zero,2157 - 21a00: 00021b60 cmpeqi zero,zero,2157 - 21a04: 00021b60 cmpeqi zero,zero,2157 - 21a08: 00021b60 cmpeqi zero,zero,2157 - 21a0c: 00021b60 cmpeqi zero,zero,2157 - 21a10: 00021b60 cmpeqi zero,zero,2157 - 21a14: 00021b60 cmpeqi zero,zero,2157 - 21a18: 00021ad4 movui zero,2155 - 21a1c: 00021b60 cmpeqi zero,zero,2157 - 21a20: 00021a74 movhi zero,2153 - case 'e': { - exposureTime += EXPOSURE_STEP; - 21a24: e0bffc17 ldw r2,-16(fp) - 21a28: 10804004 addi r2,r2,256 - 21a2c: e0bffc15 stw r2,-16(fp) - OV8865SetExposure(exposureTime); - 21a30: e13ffc17 ldw r4,-16(fp) - 21a34: 00220580 call 22058 - printf("\nExposure = %x ", exposureTime); - 21a38: e17ffc17 ldw r5,-16(fp) - 21a3c: 010000f4 movhi r4,3 - 21a40: 2109fd04 addi r4,r4,10228 - 21a44: 00235600 call 23560 - break;} - 21a48: 00004506 br 21b60 - case 'd': { - exposureTime -= EXPOSURE_STEP; - 21a4c: e0bffc17 ldw r2,-16(fp) - 21a50: 10bfc004 addi r2,r2,-256 - 21a54: e0bffc15 stw r2,-16(fp) - OV8865SetExposure(exposureTime); - 21a58: e13ffc17 ldw r4,-16(fp) - 21a5c: 00220580 call 22058 - printf("\nExposure = %x ", exposureTime); - 21a60: e17ffc17 ldw r5,-16(fp) - 21a64: 010000f4 movhi r4,3 - 21a68: 2109fd04 addi r4,r4,10228 - 21a6c: 00235600 call 23560 - break;} - 21a70: 00003b06 br 21b60 - case 't': { - gain += GAIN_STEP; - 21a74: e0bffd0b ldhu r2,-12(fp) - 21a78: 1083ffc4 addi r2,r2,4095 - 21a7c: e0bffd0d sth r2,-12(fp) - OV8865SetGain(gain); - 21a80: e0bffd0b ldhu r2,-12(fp) - 21a84: 1009883a mov r4,r2 - 21a88: 00221380 call 22138 - printf("\nGain = %x ", gain); - 21a8c: e0bffd0b ldhu r2,-12(fp) - 21a90: 100b883a mov r5,r2 - 21a94: 010000f4 movhi r4,3 - 21a98: 210a0104 addi r4,r4,10244 - 21a9c: 00235600 call 23560 - break;} - 21aa0: 00002f06 br 21b60 - case 'g': { - gain -= GAIN_STEP; - 21aa4: e0bffd0b ldhu r2,-12(fp) - 21aa8: 10bc0044 addi r2,r2,-4095 - 21aac: e0bffd0d sth r2,-12(fp) - OV8865SetGain(gain); - 21ab0: e0bffd0b ldhu r2,-12(fp) - 21ab4: 1009883a mov r4,r2 - 21ab8: 00221380 call 22138 - printf("\nGain = %x ", gain); - 21abc: e0bffd0b ldhu r2,-12(fp) - 21ac0: 100b883a mov r5,r2 - 21ac4: 010000f4 movhi r4,3 - 21ac8: 210a0104 addi r4,r4,10244 - 21acc: 00235600 call 23560 - break;} - 21ad0: 00002306 br 21b60 - case 'r': { - current_focus += manual_focus_step; - 21ad4: e0fffd83 ldbu r3,-10(fp) - 21ad8: e0bffa8b ldhu r2,-22(fp) - 21adc: 1885883a add r2,r3,r2 - 21ae0: e0bffa8d sth r2,-22(fp) - if(current_focus >1023) current_focus = 1023; - 21ae4: e0bffa8b ldhu r2,-22(fp) - 21ae8: 10810030 cmpltui r2,r2,1024 - 21aec: 1000021e bne r2,zero,21af8 - 21af0: 0080ffc4 movi r2,1023 - 21af4: e0bffa8d sth r2,-22(fp) - OV8865_FOCUS_Move_to(current_focus); - 21af8: e0bffa8b ldhu r2,-22(fp) - 21afc: 1009883a mov r4,r2 - 21b00: 0021f880 call 21f88 - printf("\nFocus = %x ",current_focus); - 21b04: e0bffa8b ldhu r2,-22(fp) - 21b08: 100b883a mov r5,r2 - 21b0c: 010000f4 movhi r4,3 - 21b10: 210a0404 addi r4,r4,10256 - 21b14: 00235600 call 23560 - break;} - 21b18: 00001106 br 21b60 - case 'f': { - if(current_focus > manual_focus_step) current_focus -= manual_focus_step; - 21b1c: e0bffd83 ldbu r2,-10(fp) - 21b20: 10ffffcc andi r3,r2,65535 - 21b24: e0bffa8b ldhu r2,-22(fp) - 21b28: 1880042e bgeu r3,r2,21b3c - 21b2c: e0bffd83 ldbu r2,-10(fp) - 21b30: e0fffa8b ldhu r3,-22(fp) - 21b34: 1885c83a sub r2,r3,r2 - 21b38: e0bffa8d sth r2,-22(fp) - OV8865_FOCUS_Move_to(current_focus); - 21b3c: e0bffa8b ldhu r2,-22(fp) - 21b40: 1009883a mov r4,r2 - 21b44: 0021f880 call 21f88 - printf("\nFocus = %x ",current_focus); - 21b48: e0bffa8b ldhu r2,-22(fp) - 21b4c: 100b883a mov r5,r2 - 21b50: 010000f4 movhi r4,3 - 21b54: 210a0404 addi r4,r4,10256 - 21b58: 00235600 call 23560 - break;} - 21b5c: 0001883a nop - } //Main loop delay usleep(10000); - 21b60: 0109c404 movi r4,10000 - 21b64: 00302f00 call 302f0 + 21970: 0109c404 movi r4,10000 + 21974: 002f9cc0 call 2f9cc }; - 21b68: 003f4506 br 21880 + 21978: 003fb406 br 2184c <_gp+0xfffe5314> -00021b6c : +0002197c : {0x0004,0x8047} // Configuration Control Register }; alt_u16 nSWAP16(alt_u16 x){ - 21b6c: defffd04 addi sp,sp,-12 - 21b70: df000215 stw fp,8(sp) - 21b74: df000204 addi fp,sp,8 - 21b78: 2005883a mov r2,r4 - 21b7c: e0bfff0d sth r2,-4(fp) + 2197c: defffd04 addi sp,sp,-12 + 21980: df000215 stw fp,8(sp) + 21984: df000204 addi fp,sp,8 + 21988: 2005883a mov r2,r4 + 2198c: e0bfff0d sth r2,-4(fp) alt_u16 y; //y = (((x) >> 8) & 0xff) | (((x) & 0xff) << 8); // y = x; y = (x >> 8) & 0x00ff; - 21b80: e0bfff0b ldhu r2,-4(fp) - 21b84: 1004d23a srli r2,r2,8 - 21b88: e0bffe0d sth r2,-8(fp) + 21990: e0bfff0b ldhu r2,-4(fp) + 21994: 1004d23a srli r2,r2,8 + 21998: e0bffe0d sth r2,-8(fp) y |= (x << 8) & 0xff00; - 21b8c: e0bfff0b ldhu r2,-4(fp) - 21b90: 1004923a slli r2,r2,8 - 21b94: 1007883a mov r3,r2 - 21b98: e0bffe0b ldhu r2,-8(fp) - 21b9c: 1884b03a or r2,r3,r2 - 21ba0: e0bffe0d sth r2,-8(fp) + 2199c: e0bfff0b ldhu r2,-4(fp) + 219a0: 1004923a slli r2,r2,8 + 219a4: 1007883a mov r3,r2 + 219a8: e0bffe0b ldhu r2,-8(fp) + 219ac: 1884b03a or r2,r3,r2 + 219b0: e0bffe0d sth r2,-8(fp) return y; - 21ba4: e0bffe0b ldhu r2,-8(fp) + 219b4: e0bffe0b ldhu r2,-8(fp) } - 21ba8: e037883a mov sp,fp - 21bac: df000017 ldw fp,0(sp) - 21bb0: dec00104 addi sp,sp,4 - 21bb4: f800283a ret + 219b8: e037883a mov sp,fp + 219bc: df000017 ldw fp,0(sp) + 219c0: dec00104 addi sp,sp,4 + 219c4: f800283a ret -00021bb8 : +000219c8 : void MipiBridgeRegWrite(alt_u16 Addr, alt_u16 Value){ - 21bb8: defffa04 addi sp,sp,-24 - 21bbc: dfc00515 stw ra,20(sp) - 21bc0: df000415 stw fp,16(sp) - 21bc4: df000404 addi fp,sp,16 - 21bc8: 2007883a mov r3,r4 - 21bcc: 2805883a mov r2,r5 - 21bd0: e0fffe0d sth r3,-8(fp) - 21bd4: e0bfff0d sth r2,-4(fp) + 219c8: defffa04 addi sp,sp,-24 + 219cc: dfc00515 stw ra,20(sp) + 219d0: df000415 stw fp,16(sp) + 219d4: df000404 addi fp,sp,16 + 219d8: 2007883a mov r3,r4 + 219dc: 2805883a mov r2,r5 + 219e0: e0fffe0d sth r3,-8(fp) + 219e4: e0bfff0d sth r2,-4(fp) const alt_u8 device_address = MIPI_BRIDGE_I2C_ADDR; - 21bd8: 00800704 movi r2,28 - 21bdc: e0bffd05 stb r2,-12(fp) + 219e8: 00800704 movi r2,28 + 219ec: e0bffd05 stb r2,-12(fp) OC_I2CL_Write(I2C_OPENCORES_MIPI_BASE, device_address, Addr, (alt_u8 *)&Value, sizeof(Value)); - 21be0: e0fffd03 ldbu r3,-12(fp) - 21be4: e13ffe0b ldhu r4,-8(fp) - 21be8: e17fff04 addi r5,fp,-4 - 21bec: 00800084 movi r2,2 - 21bf0: d8800015 stw r2,0(sp) - 21bf4: 280f883a mov r7,r5 - 21bf8: 200d883a mov r6,r4 - 21bfc: 180b883a mov r5,r3 - 21c00: 01000134 movhi r4,4 - 21c04: 21041804 addi r4,r4,4192 - 21c08: 0020bac0 call 20bac + 219f0: e0fffd03 ldbu r3,-12(fp) + 219f4: e13ffe0b ldhu r4,-8(fp) + 219f8: e17fff04 addi r5,fp,-4 + 219fc: 00800084 movi r2,2 + 21a00: d8800015 stw r2,0(sp) + 21a04: 280f883a mov r7,r5 + 21a08: 200d883a mov r6,r4 + 21a0c: 180b883a mov r5,r3 + 21a10: 01000134 movhi r4,4 + 21a14: 21041804 addi r4,r4,4192 + 21a18: 0020bac0 call 20bac } - 21c0c: 0001883a nop - 21c10: e037883a mov sp,fp - 21c14: dfc00117 ldw ra,4(sp) - 21c18: df000017 ldw fp,0(sp) - 21c1c: dec00204 addi sp,sp,8 - 21c20: f800283a ret + 21a1c: 0001883a nop + 21a20: e037883a mov sp,fp + 21a24: dfc00117 ldw ra,4(sp) + 21a28: df000017 ldw fp,0(sp) + 21a2c: dec00204 addi sp,sp,8 + 21a30: f800283a ret -00021c24 : +00021a34 : alt_u16 MipiBridgeRegRead(alt_u16 Addr){ - 21c24: defffa04 addi sp,sp,-24 - 21c28: dfc00515 stw ra,20(sp) - 21c2c: df000415 stw fp,16(sp) - 21c30: df000404 addi fp,sp,16 - 21c34: 2005883a mov r2,r4 - 21c38: e0bfff0d sth r2,-4(fp) + 21a34: defffa04 addi sp,sp,-24 + 21a38: dfc00515 stw ra,20(sp) + 21a3c: df000415 stw fp,16(sp) + 21a40: df000404 addi fp,sp,16 + 21a44: 2005883a mov r2,r4 + 21a48: e0bfff0d sth r2,-4(fp) alt_u16 Value,tValue; const alt_u8 device_address = MIPI_BRIDGE_I2C_ADDR; - 21c3c: 00800704 movi r2,28 - 21c40: e0bffd05 stb r2,-12(fp) + 21a4c: 00800704 movi r2,28 + 21a50: e0bffd05 stb r2,-12(fp) OC_I2CL_Read(I2C_OPENCORES_MIPI_BASE,device_address, Addr,(alt_u8 *)&Value,sizeof(Value)); - 21c44: e0fffd03 ldbu r3,-12(fp) - 21c48: e13fff0b ldhu r4,-4(fp) - 21c4c: e17ffe04 addi r5,fp,-8 - 21c50: 00800084 movi r2,2 - 21c54: d8800015 stw r2,0(sp) - 21c58: 280f883a mov r7,r5 - 21c5c: 200d883a mov r6,r4 - 21c60: 180b883a mov r5,r3 - 21c64: 01000134 movhi r4,4 - 21c68: 21041804 addi r4,r4,4192 - 21c6c: 0020dbc0 call 20dbc + 21a54: e0fffd03 ldbu r3,-12(fp) + 21a58: e13fff0b ldhu r4,-4(fp) + 21a5c: e17ffe04 addi r5,fp,-8 + 21a60: 00800084 movi r2,2 + 21a64: d8800015 stw r2,0(sp) + 21a68: 280f883a mov r7,r5 + 21a6c: 200d883a mov r6,r4 + 21a70: 180b883a mov r5,r3 + 21a74: 01000134 movhi r4,4 + 21a78: 21041804 addi r4,r4,4192 + 21a7c: 0020dbc0 call 20dbc tValue = nSWAP16(Value); - 21c70: e0bffe0b ldhu r2,-8(fp) - 21c74: 10bfffcc andi r2,r2,65535 - 21c78: 1009883a mov r4,r2 - 21c7c: 0021b6c0 call 21b6c - 21c80: e0bffd8d sth r2,-10(fp) + 21a80: e0bffe0b ldhu r2,-8(fp) + 21a84: 10bfffcc andi r2,r2,65535 + 21a88: 1009883a mov r4,r2 + 21a8c: 002197c0 call 2197c + 21a90: e0bffd8d sth r2,-10(fp) return (tValue); - 21c84: e0bffd8b ldhu r2,-10(fp) + 21a94: e0bffd8b ldhu r2,-10(fp) } - 21c88: e037883a mov sp,fp - 21c8c: dfc00117 ldw ra,4(sp) - 21c90: df000017 ldw fp,0(sp) - 21c94: dec00204 addi sp,sp,8 - 21c98: f800283a ret + 21a98: e037883a mov sp,fp + 21a9c: dfc00117 ldw ra,4(sp) + 21aa0: df000017 ldw fp,0(sp) + 21aa4: dec00204 addi sp,sp,8 + 21aa8: f800283a ret -00021c9c : +00021aac : void MipiBridgeInit(void){ - 21c9c: defffb04 addi sp,sp,-20 - 21ca0: dfc00415 stw ra,16(sp) - 21ca4: df000315 stw fp,12(sp) - 21ca8: df000304 addi fp,sp,12 + 21aac: defffb04 addi sp,sp,-20 + 21ab0: dfc00415 stw ra,16(sp) + 21ab4: df000315 stw fp,12(sp) + 21ab8: df000304 addi fp,sp,12 alt_u16 data; int i, num; printf("\nStart MipiBridgeInit!\n"); - 21cac: 010000f4 movhi r4,3 - 21cb0: 210a0804 addi r4,r4,10272 - 21cb4: 002367c0 call 2367c + 21abc: 010000f4 movhi r4,3 + 21ac0: 2107b404 addi r4,r4,7888 + 21ac4: 00231400 call 23140 data = MipiBridgeRegRead(0x0000); // read chip and revision id; - 21cb8: 0009883a mov r4,zero - 21cbc: 0021c240 call 21c24 - 21cc0: e0bffe0d sth r2,-8(fp) + 21ac8: 0009883a mov r4,zero + 21acc: 0021a340 call 21a34 + 21ad0: e0bffe0d sth r2,-8(fp) printf("Chip and Revision ID is 0x%04xh(expected: 0x4401);\n",data); - 21cc4: e0bffe0b ldhu r2,-8(fp) - 21cc8: 100b883a mov r5,r2 - 21ccc: 010000f4 movhi r4,3 - 21cd0: 210a0e04 addi r4,r4,10296 - 21cd4: 00235600 call 23560 + 21ad4: e0bffe0b ldhu r2,-8(fp) + 21ad8: 100b883a mov r5,r2 + 21adc: 010000f4 movhi r4,3 + 21ae0: 2107ba04 addi r4,r4,7912 + 21ae4: 00230240 call 23024 num = sizeof(MipiBridgeReg)/sizeof(MipiBridgeReg[0]); - 21cd8: 00800344 movi r2,13 - 21cdc: e0bfff15 stw r2,-4(fp) + 21ae8: 00800344 movi r2,13 + 21aec: e0bfff15 stw r2,-4(fp) for(i=0;i + 21af0: e03ffd15 stw zero,-12(fp) + 21af4: 00002d06 br 21bac if (MipiBridgeReg[i].Addr == 0xFFFF) usleep(MipiBridgeReg[i].Data*1000); - 21ce8: 008000f4 movhi r2,3 - 21cec: 108b0604 addi r2,r2,11288 - 21cf0: e0fffd17 ldw r3,-12(fp) - 21cf4: 18c7883a add r3,r3,r3 - 21cf8: 18c7883a add r3,r3,r3 - 21cfc: 10c5883a add r2,r2,r3 - 21d00: 1080000b ldhu r2,0(r2) - 21d04: 10ffffcc andi r3,r2,65535 - 21d08: 00bfffd4 movui r2,65535 - 21d0c: 18800d1e bne r3,r2,21d44 - 21d10: 008000f4 movhi r2,3 - 21d14: 108b0604 addi r2,r2,11288 - 21d18: e0fffd17 ldw r3,-12(fp) - 21d1c: 18c7883a add r3,r3,r3 - 21d20: 18c7883a add r3,r3,r3 - 21d24: 10c5883a add r2,r2,r3 - 21d28: 10800084 addi r2,r2,2 - 21d2c: 1080000b ldhu r2,0(r2) - 21d30: 10bfffcc andi r2,r2,65535 - 21d34: 1080fa24 muli r2,r2,1000 - 21d38: 1009883a mov r4,r2 - 21d3c: 00302f00 call 302f0 - 21d40: 00001306 br 21d90 + 21af8: 008000f4 movhi r2,3 + 21afc: 1088b904 addi r2,r2,8932 + 21b00: e0fffd17 ldw r3,-12(fp) + 21b04: 18c7883a add r3,r3,r3 + 21b08: 18c7883a add r3,r3,r3 + 21b0c: 10c5883a add r2,r2,r3 + 21b10: 1080000b ldhu r2,0(r2) + 21b14: 10ffffcc andi r3,r2,65535 + 21b18: 00bfffd4 movui r2,65535 + 21b1c: 18800d1e bne r3,r2,21b54 + 21b20: 008000f4 movhi r2,3 + 21b24: 1088b904 addi r2,r2,8932 + 21b28: e0fffd17 ldw r3,-12(fp) + 21b2c: 18c7883a add r3,r3,r3 + 21b30: 18c7883a add r3,r3,r3 + 21b34: 10c5883a add r2,r2,r3 + 21b38: 10800084 addi r2,r2,2 + 21b3c: 1080000b ldhu r2,0(r2) + 21b40: 10bfffcc andi r2,r2,65535 + 21b44: 1080fa24 muli r2,r2,1000 + 21b48: 1009883a mov r4,r2 + 21b4c: 002f9cc0 call 2f9cc + 21b50: 00001306 br 21ba0 else MipiBridgeRegWrite(MipiBridgeReg[i].Addr, MipiBridgeReg[i].Data); - 21d44: 008000f4 movhi r2,3 - 21d48: 108b0604 addi r2,r2,11288 - 21d4c: e0fffd17 ldw r3,-12(fp) - 21d50: 18c7883a add r3,r3,r3 - 21d54: 18c7883a add r3,r3,r3 - 21d58: 10c5883a add r2,r2,r3 - 21d5c: 1080000b ldhu r2,0(r2) - 21d60: 113fffcc andi r4,r2,65535 - 21d64: 008000f4 movhi r2,3 - 21d68: 108b0604 addi r2,r2,11288 - 21d6c: e0fffd17 ldw r3,-12(fp) - 21d70: 18c7883a add r3,r3,r3 - 21d74: 18c7883a add r3,r3,r3 - 21d78: 10c5883a add r2,r2,r3 - 21d7c: 10800084 addi r2,r2,2 - 21d80: 1080000b ldhu r2,0(r2) - 21d84: 10bfffcc andi r2,r2,65535 - 21d88: 100b883a mov r5,r2 - 21d8c: 0021bb80 call 21bb8 + 21b54: 008000f4 movhi r2,3 + 21b58: 1088b904 addi r2,r2,8932 + 21b5c: e0fffd17 ldw r3,-12(fp) + 21b60: 18c7883a add r3,r3,r3 + 21b64: 18c7883a add r3,r3,r3 + 21b68: 10c5883a add r2,r2,r3 + 21b6c: 1080000b ldhu r2,0(r2) + 21b70: 113fffcc andi r4,r2,65535 + 21b74: 008000f4 movhi r2,3 + 21b78: 1088b904 addi r2,r2,8932 + 21b7c: e0fffd17 ldw r3,-12(fp) + 21b80: 18c7883a add r3,r3,r3 + 21b84: 18c7883a add r3,r3,r3 + 21b88: 10c5883a add r2,r2,r3 + 21b8c: 10800084 addi r2,r2,2 + 21b90: 1080000b ldhu r2,0(r2) + 21b94: 10bfffcc andi r2,r2,65535 + 21b98: 100b883a mov r5,r2 + 21b9c: 00219c80 call 219c8 printf("Chip and Revision ID is 0x%04xh(expected: 0x4401);\n",data); num = sizeof(MipiBridgeReg)/sizeof(MipiBridgeReg[0]); for(i=0;i + 21ba0: e0bffd17 ldw r2,-12(fp) + 21ba4: 10800044 addi r2,r2,1 + 21ba8: e0bffd15 stw r2,-12(fp) + 21bac: e0fffd17 ldw r3,-12(fp) + 21bb0: e0bfff17 ldw r2,-4(fp) + 21bb4: 18bfd016 blt r3,r2,21af8 <_gp+0xfffe55c0> // MipiBridgeRegWrite(0x005A,((cap<<6) + (HsRxRs<<4) + ClkDly_data)); // MipiBridgeRegWrite(0x005C,((cap<<6) + (HsRxRs<<4) + ClkDly_data)); // MipiBridgeRegWrite(0x005E,((cap<<6) + (HsRxRs<<4) + ClkDly_data)); // printf("End MipiBridgeInit!\n\n"); - 21da8: 010000f4 movhi r4,3 - 21dac: 210a1b04 addi r4,r4,10348 - 21db0: 002367c0 call 2367c + 21bb8: 010000f4 movhi r4,3 + 21bbc: 2107c704 addi r4,r4,7964 + 21bc0: 00231400 call 23140 } - 21db4: 0001883a nop - 21db8: e037883a mov sp,fp - 21dbc: dfc00117 ldw ra,4(sp) - 21dc0: df000017 ldw fp,0(sp) - 21dc4: dec00204 addi sp,sp,8 - 21dc8: f800283a ret + 21bc4: 0001883a nop + 21bc8: e037883a mov sp,fp + 21bcc: dfc00117 ldw ra,4(sp) + 21bd0: df000017 ldw fp,0(sp) + 21bd4: dec00204 addi sp,sp,8 + 21bd8: f800283a ret -00021dcc : +00021bdc : }; alt_u8 OV8865_read_cmos_sensor_8(alt_u16 Addr){ - 21dcc: defffb04 addi sp,sp,-20 - 21dd0: dfc00415 stw ra,16(sp) - 21dd4: df000315 stw fp,12(sp) - 21dd8: df000304 addi fp,sp,12 - 21ddc: 2005883a mov r2,r4 - 21de0: e0bfff0d sth r2,-4(fp) + 21bdc: defffb04 addi sp,sp,-20 + 21be0: dfc00415 stw ra,16(sp) + 21be4: df000315 stw fp,12(sp) + 21be8: df000304 addi fp,sp,12 + 21bec: 2005883a mov r2,r4 + 21bf0: e0bfff0d sth r2,-4(fp) const alt_u8 device_address = MIPI_I2C_ADDR; - 21de4: 00801b04 movi r2,108 - 21de8: e0bffe05 stb r2,-8(fp) + 21bf4: 00801b04 movi r2,108 + 21bf8: e0bffe05 stb r2,-8(fp) alt_u8 Value; //OC_I2CL_Write(I2C_OPENCORES_CAMERA_BASE, device_address, SWAP16(Addr), (alt_u8 *)&Value, sizeof(Value)); OC_I2CL_Read(I2C_OPENCORES_CAMERA_BASE, device_address, Addr, (alt_u8 *)&Value, sizeof(Value)); - 21dec: e0fffe03 ldbu r3,-8(fp) - 21df0: e13fff0b ldhu r4,-4(fp) - 21df4: e17ffe44 addi r5,fp,-7 - 21df8: 00800044 movi r2,1 - 21dfc: d8800015 stw r2,0(sp) - 21e00: 280f883a mov r7,r5 - 21e04: 200d883a mov r6,r4 - 21e08: 180b883a mov r5,r3 - 21e0c: 01000134 movhi r4,4 - 21e10: 21041004 addi r4,r4,4160 - 21e14: 0020dbc0 call 20dbc + 21bfc: e0fffe03 ldbu r3,-8(fp) + 21c00: e13fff0b ldhu r4,-4(fp) + 21c04: e17ffe44 addi r5,fp,-7 + 21c08: 00800044 movi r2,1 + 21c0c: d8800015 stw r2,0(sp) + 21c10: 280f883a mov r7,r5 + 21c14: 200d883a mov r6,r4 + 21c18: 180b883a mov r5,r3 + 21c1c: 01000134 movhi r4,4 + 21c20: 21041004 addi r4,r4,4160 + 21c24: 0020dbc0 call 20dbc return (Value); - 21e18: e0bffe43 ldbu r2,-7(fp) + 21c28: e0bffe43 ldbu r2,-7(fp) } - 21e1c: e037883a mov sp,fp - 21e20: dfc00117 ldw ra,4(sp) - 21e24: df000017 ldw fp,0(sp) - 21e28: dec00204 addi sp,sp,8 - 21e2c: f800283a ret + 21c2c: e037883a mov sp,fp + 21c30: dfc00117 ldw ra,4(sp) + 21c34: df000017 ldw fp,0(sp) + 21c38: dec00204 addi sp,sp,8 + 21c3c: f800283a ret -00021e30 : +00021c40 : void OV8865_write_cmos_sensor_8(alt_u16 Addr, alt_u8 Value){ - 21e30: defffa04 addi sp,sp,-24 - 21e34: dfc00515 stw ra,20(sp) - 21e38: df000415 stw fp,16(sp) - 21e3c: df000404 addi fp,sp,16 - 21e40: 2007883a mov r3,r4 - 21e44: 2805883a mov r2,r5 - 21e48: e0fffe0d sth r3,-8(fp) - 21e4c: e0bfff05 stb r2,-4(fp) + 21c40: defffa04 addi sp,sp,-24 + 21c44: dfc00515 stw ra,20(sp) + 21c48: df000415 stw fp,16(sp) + 21c4c: df000404 addi fp,sp,16 + 21c50: 2007883a mov r3,r4 + 21c54: 2805883a mov r2,r5 + 21c58: e0fffe0d sth r3,-8(fp) + 21c5c: e0bfff05 stb r2,-4(fp) const alt_u8 device_address = MIPI_I2C_ADDR; - 21e50: 00801b04 movi r2,108 - 21e54: e0bffd05 stb r2,-12(fp) + 21c60: 00801b04 movi r2,108 + 21c64: e0bffd05 stb r2,-12(fp) //OC_I2CL_Write(I2C_OPENCORES_CAMERA_BASE, device_address, SWAP16(Addr), (alt_u8 *)&Value, sizeof(Value)); OC_I2CL_Write(I2C_OPENCORES_CAMERA_BASE, device_address, Addr, (alt_u8 *)&Value, sizeof(Value)); - 21e58: e0fffd03 ldbu r3,-12(fp) - 21e5c: e13ffe0b ldhu r4,-8(fp) - 21e60: e17fff04 addi r5,fp,-4 - 21e64: 00800044 movi r2,1 - 21e68: d8800015 stw r2,0(sp) - 21e6c: 280f883a mov r7,r5 - 21e70: 200d883a mov r6,r4 - 21e74: 180b883a mov r5,r3 - 21e78: 01000134 movhi r4,4 - 21e7c: 21041004 addi r4,r4,4160 - 21e80: 0020bac0 call 20bac + 21c68: e0fffd03 ldbu r3,-12(fp) + 21c6c: e13ffe0b ldhu r4,-8(fp) + 21c70: e17fff04 addi r5,fp,-4 + 21c74: 00800044 movi r2,1 + 21c78: d8800015 stw r2,0(sp) + 21c7c: 280f883a mov r7,r5 + 21c80: 200d883a mov r6,r4 + 21c84: 180b883a mov r5,r3 + 21c88: 01000134 movhi r4,4 + 21c8c: 21041004 addi r4,r4,4160 + 21c90: 0020bac0 call 20bac } - 21e84: 0001883a nop - 21e88: e037883a mov sp,fp - 21e8c: dfc00117 ldw ra,4(sp) - 21e90: df000017 ldw fp,0(sp) - 21e94: dec00204 addi sp,sp,8 - 21e98: f800283a ret + 21c94: 0001883a nop + 21c98: e037883a mov sp,fp + 21c9c: dfc00117 ldw ra,4(sp) + 21ca0: df000017 ldw fp,0(sp) + 21ca4: dec00204 addi sp,sp,8 + 21ca8: f800283a ret -00021e9c : +00021cac : void OV8865_write_AF(alt_u8 msb, alt_u8 lsb){ - 21e9c: defffa04 addi sp,sp,-24 - 21ea0: dfc00515 stw ra,20(sp) - 21ea4: df000415 stw fp,16(sp) - 21ea8: df000404 addi fp,sp,16 - 21eac: 2007883a mov r3,r4 - 21eb0: 2805883a mov r2,r5 - 21eb4: e0fffe05 stb r3,-8(fp) - 21eb8: e0bfff05 stb r2,-4(fp) + 21cac: defffa04 addi sp,sp,-24 + 21cb0: dfc00515 stw ra,20(sp) + 21cb4: df000415 stw fp,16(sp) + 21cb8: df000404 addi fp,sp,16 + 21cbc: 2007883a mov r3,r4 + 21cc0: 2805883a mov r2,r5 + 21cc4: e0fffe05 stb r3,-8(fp) + 21cc8: e0bfff05 stb r2,-4(fp) // VCM149C const alt_u8 device_address = MIPI_AF_I2C_ADDR; - 21ebc: 00800604 movi r2,24 - 21ec0: e0bffd05 stb r2,-12(fp) + 21ccc: 00800604 movi r2,24 + 21cd0: e0bffd05 stb r2,-12(fp) OC_I2C_Write(I2C_OPENCORES_CAMERA_BASE, device_address, msb, (alt_u8 *)&lsb, sizeof(lsb)); - 21ec4: e0fffd03 ldbu r3,-12(fp) - 21ec8: e13ffe03 ldbu r4,-8(fp) - 21ecc: e17fff04 addi r5,fp,-4 - 21ed0: 00800044 movi r2,1 - 21ed4: d8800015 stw r2,0(sp) - 21ed8: 280f883a mov r7,r5 - 21edc: 200d883a mov r6,r4 - 21ee0: 180b883a mov r5,r3 - 21ee4: 01000134 movhi r4,4 - 21ee8: 21041004 addi r4,r4,4160 - 21eec: 00206440 call 20644 + 21cd4: e0fffd03 ldbu r3,-12(fp) + 21cd8: e13ffe03 ldbu r4,-8(fp) + 21cdc: e17fff04 addi r5,fp,-4 + 21ce0: 00800044 movi r2,1 + 21ce4: d8800015 stw r2,0(sp) + 21ce8: 280f883a mov r7,r5 + 21cec: 200d883a mov r6,r4 + 21cf0: 180b883a mov r5,r3 + 21cf4: 01000134 movhi r4,4 + 21cf8: 21041004 addi r4,r4,4160 + 21cfc: 00206440 call 20644 } - 21ef0: 0001883a nop - 21ef4: e037883a mov sp,fp - 21ef8: dfc00117 ldw ra,4(sp) - 21efc: df000017 ldw fp,0(sp) - 21f00: dec00204 addi sp,sp,8 - 21f04: f800283a ret + 21d00: 0001883a nop + 21d04: e037883a mov sp,fp + 21d08: dfc00117 ldw ra,4(sp) + 21d0c: df000017 ldw fp,0(sp) + 21d10: dec00204 addi sp,sp,8 + 21d14: f800283a ret -00021f08 : +00021d18 : void OV8865_read_AF(void){ - 21f08: defffb04 addi sp,sp,-20 - 21f0c: dfc00415 stw ra,16(sp) - 21f10: df000315 stw fp,12(sp) - 21f14: df000304 addi fp,sp,12 + 21d18: defffb04 addi sp,sp,-20 + 21d1c: dfc00415 stw ra,16(sp) + 21d20: df000315 stw fp,12(sp) + 21d24: df000304 addi fp,sp,12 // VCM149C const alt_u8 device_address = MIPI_AF_I2C_ADDR; - 21f18: 00800604 movi r2,24 - 21f1c: e0bffd05 stb r2,-12(fp) + 21d28: 00800604 movi r2,24 + 21d2c: e0bffd05 stb r2,-12(fp) alt_u8 szData8[2]; bool bSuccess; bSuccess = OC_I2C_Read_Continue(I2C_OPENCORES_CAMERA_BASE, device_address, szData8, sizeof(szData8)); - 21f20: e0bffd03 ldbu r2,-12(fp) - 21f24: e0ffff04 addi r3,fp,-4 - 21f28: 01c00084 movi r7,2 - 21f2c: 180d883a mov r6,r3 - 21f30: 100b883a mov r5,r2 - 21f34: 01000134 movhi r4,4 - 21f38: 21041004 addi r4,r4,4160 - 21f3c: 0020a740 call 20a74 - 21f40: e0bffe15 stw r2,-8(fp) + 21d30: e0bffd03 ldbu r2,-12(fp) + 21d34: e0ffff04 addi r3,fp,-4 + 21d38: 01c00084 movi r7,2 + 21d3c: 180d883a mov r6,r3 + 21d40: 100b883a mov r5,r2 + 21d44: 01000134 movhi r4,4 + 21d48: 21041004 addi r4,r4,4160 + 21d4c: 0020a740 call 20a74 + 21d50: e0bffe15 stw r2,-8(fp) if (bSuccess) - 21f44: e0bffe17 ldw r2,-8(fp) - 21f48: 10000926 beq r2,zero,21f70 + 21d54: e0bffe17 ldw r2,-8(fp) + 21d58: 10000926 beq r2,zero,21d80 printf("Read MSB=%xh, LSB=%xh\r\n", szData8[0], szData8[1]); - 21f4c: e0bfff03 ldbu r2,-4(fp) - 21f50: 10803fcc andi r2,r2,255 - 21f54: e0ffff43 ldbu r3,-3(fp) - 21f58: 18c03fcc andi r3,r3,255 - 21f5c: 180d883a mov r6,r3 - 21f60: 100b883a mov r5,r2 - 21f64: 010000f4 movhi r4,3 - 21f68: 210a2104 addi r4,r4,10372 - 21f6c: 00235600 call 23560 + 21d5c: e0bfff03 ldbu r2,-4(fp) + 21d60: 10803fcc andi r2,r2,255 + 21d64: e0ffff43 ldbu r3,-3(fp) + 21d68: 18c03fcc andi r3,r3,255 + 21d6c: 180d883a mov r6,r3 + 21d70: 100b883a mov r5,r2 + 21d74: 010000f4 movhi r4,3 + 21d78: 2107cd04 addi r4,r4,7988 + 21d7c: 00230240 call 23024 } - 21f70: 0001883a nop - 21f74: e037883a mov sp,fp - 21f78: dfc00117 ldw ra,4(sp) - 21f7c: df000017 ldw fp,0(sp) - 21f80: dec00204 addi sp,sp,8 - 21f84: f800283a ret + 21d80: 0001883a nop + 21d84: e037883a mov sp,fp + 21d88: dfc00117 ldw ra,4(sp) + 21d8c: df000017 ldw fp,0(sp) + 21d90: dec00204 addi sp,sp,8 + 21d94: f800283a ret -00021f88 : +00021d98 : void OV8865_FOCUS_Move_to(alt_u16 a_u2MovePosition) { - 21f88: defffb04 addi sp,sp,-20 - 21f8c: dfc00415 stw ra,16(sp) - 21f90: df000315 stw fp,12(sp) - 21f94: df000304 addi fp,sp,12 - 21f98: 2005883a mov r2,r4 - 21f9c: e0bfff0d sth r2,-4(fp) + 21d98: defffb04 addi sp,sp,-20 + 21d9c: dfc00415 stw ra,16(sp) + 21da0: df000315 stw fp,12(sp) + 21da4: df000304 addi fp,sp,12 + 21da8: 2005883a mov r2,r4 + 21dac: e0bfff0d sth r2,-4(fp) if (a_u2MovePosition > 1023) {a_u2MovePosition = 1023;} - 21fa0: e0bfff0b ldhu r2,-4(fp) - 21fa4: 10810030 cmpltui r2,r2,1024 - 21fa8: 1000021e bne r2,zero,21fb4 - 21fac: 0080ffc4 movi r2,1023 - 21fb0: e0bfff0d sth r2,-4(fp) + 21db0: e0bfff0b ldhu r2,-4(fp) + 21db4: 10810030 cmpltui r2,r2,1024 + 21db8: 1000021e bne r2,zero,21dc4 + 21dbc: 0080ffc4 movi r2,1023 + 21dc0: e0bfff0d sth r2,-4(fp) if (a_u2MovePosition < 0) {a_u2MovePosition = 0;} int bSuccess; Focus_Released(); // waiting for VCM release I2C bus - 21fb4: 00213440 call 21344 + 21dc4: 00213440 call 21344 bSuccess = oc_i2c_init_ex(I2C_OPENCORES_CAMERA_BASE, 50*1000*1000,400*1000); //I2C: 400K - 21fb8: 018001b4 movhi r6,6 - 21fbc: 3186a004 addi r6,r6,6784 - 21fc0: 0140bef4 movhi r5,763 - 21fc4: 297c2004 addi r5,r5,-3968 - 21fc8: 01000134 movhi r4,4 - 21fcc: 21041004 addi r4,r4,4160 - 21fd0: 00203980 call 20398 - 21fd4: e0bffd15 stw r2,-12(fp) + 21dc8: 018001b4 movhi r6,6 + 21dcc: 3186a004 addi r6,r6,6784 + 21dd0: 0140bef4 movhi r5,763 + 21dd4: 297c2004 addi r5,r5,-3968 + 21dd8: 01000134 movhi r4,4 + 21ddc: 21041004 addi r4,r4,4160 + 21de0: 00203980 call 20398 + 21de4: e0bffd15 stw r2,-12(fp) if (!bSuccess) - 21fd8: e0bffd17 ldw r2,-12(fp) - 21fdc: 1000031e bne r2,zero,21fec + 21de8: e0bffd17 ldw r2,-12(fp) + 21dec: 1000031e bne r2,zero,21dfc printf("failed to init MIPI- Camera i2c\r\n"); - 21fe0: 010000f4 movhi r4,3 - 21fe4: 210a2704 addi r4,r4,10396 - 21fe8: 002367c0 call 2367c + 21df0: 010000f4 movhi r4,3 + 21df4: 2107d304 addi r4,r4,8012 + 21df8: 00231400 call 23140 - //printf("Manual set focus to %d\r\n",a_u2MovePosition); + printf("Manual set focus to %d\r\n",a_u2MovePosition); + 21dfc: e0bfff0b ldhu r2,-4(fp) + 21e00: 100b883a mov r5,r2 + 21e04: 010000f4 movhi r4,3 + 21e08: 2107dc04 addi r4,r4,8048 + 21e0c: 00230240 call 23024 alt_u8 msb,lsb; msb = (a_u2MovePosition >> 4)&0x00FF; - 21fec: e0bfff0b ldhu r2,-4(fp) - 21ff0: 1004d13a srli r2,r2,4 - 21ff4: e0bffe05 stb r2,-8(fp) + 21e10: e0bfff0b ldhu r2,-4(fp) + 21e14: 1004d13a srli r2,r2,4 + 21e18: e0bffe05 stb r2,-8(fp) lsb = (a_u2MovePosition << 4 )&0x00F0; - 21ff8: e0bfff0b ldhu r2,-4(fp) - 21ffc: 1004913a slli r2,r2,4 - 22000: e0bffe45 stb r2,-7(fp) + 21e1c: e0bfff0b ldhu r2,-4(fp) + 21e20: 1004913a slli r2,r2,4 + 21e24: e0bffe45 stb r2,-7(fp) lsb += 0x06; - 22004: e0bffe43 ldbu r2,-7(fp) - 22008: 10800184 addi r2,r2,6 - 2200c: e0bffe45 stb r2,-7(fp) + 21e28: e0bffe43 ldbu r2,-7(fp) + 21e2c: 10800184 addi r2,r2,6 + 21e30: e0bffe45 stb r2,-7(fp) // printf("Write MSB=%xh, LSB=%xh\r\n", msb, lsb); OV8865_write_AF(msb, lsb+0x6); - 22010: e0fffe03 ldbu r3,-8(fp) - 22014: e0bffe43 ldbu r2,-7(fp) - 22018: 10800184 addi r2,r2,6 - 2201c: 10803fcc andi r2,r2,255 - 22020: 100b883a mov r5,r2 - 22024: 1809883a mov r4,r3 - 22028: 0021e9c0 call 21e9c + 21e34: e0fffe03 ldbu r3,-8(fp) + 21e38: e0bffe43 ldbu r2,-7(fp) + 21e3c: 10800184 addi r2,r2,6 + 21e40: 10803fcc andi r2,r2,255 + 21e44: 100b883a mov r5,r2 + 21e48: 1809883a mov r4,r3 + 21e4c: 0021cac0 call 21cac usleep(1000); - 2202c: 0100fa04 movi r4,1000 - 22030: 00302f00 call 302f0 + 21e50: 0100fa04 movi r4,1000 + 21e54: 002f9cc0 call 2f9cc // OV8865_read_AF(); oc_i2c_uninit(I2C_OPENCORES_CAMERA_BASE); // Release I2C bus , due to two I2C master shared! - 22034: 01000134 movhi r4,4 - 22038: 21041004 addi r4,r4,4160 - 2203c: 00204d40 call 204d4 + 21e58: 01000134 movhi r4,4 + 21e5c: 21041004 addi r4,r4,4160 + 21e60: 00204d40 call 204d4 } - 22040: 0001883a nop - 22044: e037883a mov sp,fp - 22048: dfc00117 ldw ra,4(sp) - 2204c: df000017 ldw fp,0(sp) - 22050: dec00204 addi sp,sp,8 - 22054: f800283a ret + 21e64: 0001883a nop + 21e68: e037883a mov sp,fp + 21e6c: dfc00117 ldw ra,4(sp) + 21e70: df000017 ldw fp,0(sp) + 21e74: dec00204 addi sp,sp,8 + 21e78: f800283a ret -00022058 : - -void OV8865SetExposure(alt_u32 exposure){ - 22058: defffc04 addi sp,sp,-16 - 2205c: dfc00315 stw ra,12(sp) - 22060: df000215 stw fp,8(sp) - 22064: df000204 addi fp,sp,8 - 22068: e13fff15 stw r4,-4(fp) - - Focus_Released(); // waiting for VCM release I2C bus - 2206c: 00213440 call 21344 - - int bSuccess = oc_i2c_init_ex(I2C_OPENCORES_CAMERA_BASE, 50*1000*1000,400*1000); //I2C: 400K - 22070: 018001b4 movhi r6,6 - 22074: 3186a004 addi r6,r6,6784 - 22078: 0140bef4 movhi r5,763 - 2207c: 297c2004 addi r5,r5,-3968 - 22080: 01000134 movhi r4,4 - 22084: 21041004 addi r4,r4,4160 - 22088: 00203980 call 20398 - 2208c: e0bffe15 stw r2,-8(fp) - if (!bSuccess) - 22090: e0bffe17 ldw r2,-8(fp) - 22094: 1000031e bne r2,zero,220a4 - printf("failed to init MIPI- Camera i2c\r\n"); - 22098: 010000f4 movhi r4,3 - 2209c: 210a2704 addi r4,r4,10396 - 220a0: 002367c0 call 2367c - - if (exposure > 0xFFFFF) exposure = 0xFFFFF; - 220a4: e0ffff17 ldw r3,-4(fp) - 220a8: 00800434 movhi r2,16 - 220ac: 18800336 bltu r3,r2,220bc - 220b0: 00800434 movhi r2,16 - 220b4: 10bfffc4 addi r2,r2,-1 - 220b8: e0bfff15 stw r2,-4(fp) - if (exposure < 0x20) exposure = 0x20; - 220bc: e0bfff17 ldw r2,-4(fp) - 220c0: 10800828 cmpgeui r2,r2,32 - 220c4: 1000021e bne r2,zero,220d0 - 220c8: 00800804 movi r2,32 - 220cc: e0bfff15 stw r2,-4(fp) - - OV8865_write_cmos_sensor_8(0x3500, (exposure >> 16) & 0x0F); - 220d0: e0bfff17 ldw r2,-4(fp) - 220d4: 1004d43a srli r2,r2,16 - 220d8: 108003cc andi r2,r2,15 - 220dc: 100b883a mov r5,r2 - 220e0: 010d4004 movi r4,13568 - 220e4: 0021e300 call 21e30 - OV8865_write_cmos_sensor_8(0x3501, (exposure >> 8) & 0xFF); - 220e8: e0bfff17 ldw r2,-4(fp) - 220ec: 1004d23a srli r2,r2,8 - 220f0: 10803fcc andi r2,r2,255 - 220f4: 100b883a mov r5,r2 - 220f8: 010d4044 movi r4,13569 - 220fc: 0021e300 call 21e30 - OV8865_write_cmos_sensor_8(0x3502, exposure & 0xFF); - 22100: e0bfff17 ldw r2,-4(fp) - 22104: 10803fcc andi r2,r2,255 - 22108: 100b883a mov r5,r2 - 2210c: 010d4084 movi r4,13570 - 22110: 0021e300 call 21e30 - - - oc_i2c_uninit(I2C_OPENCORES_CAMERA_BASE); - 22114: 01000134 movhi r4,4 - 22118: 21041004 addi r4,r4,4160 - 2211c: 00204d40 call 204d4 -} - 22120: 0001883a nop - 22124: e037883a mov sp,fp - 22128: dfc00117 ldw ra,4(sp) - 2212c: df000017 ldw fp,0(sp) - 22130: dec00204 addi sp,sp,8 - 22134: f800283a ret - -00022138 : - -void OV8865SetGain(alt_u16 gain){ - 22138: defffc04 addi sp,sp,-16 - 2213c: dfc00315 stw ra,12(sp) - 22140: df000215 stw fp,8(sp) - 22144: df000204 addi fp,sp,8 - 22148: 2005883a mov r2,r4 - 2214c: e0bfff0d sth r2,-4(fp) - - Focus_Released(); // waiting for VCM release I2C bus - 22150: 00213440 call 21344 - - int bSuccess = oc_i2c_init_ex(I2C_OPENCORES_CAMERA_BASE, 50*1000*1000,400*1000); //I2C: 400K - 22154: 018001b4 movhi r6,6 - 22158: 3186a004 addi r6,r6,6784 - 2215c: 0140bef4 movhi r5,763 - 22160: 297c2004 addi r5,r5,-3968 - 22164: 01000134 movhi r4,4 - 22168: 21041004 addi r4,r4,4160 - 2216c: 00203980 call 20398 - 22170: e0bffe15 stw r2,-8(fp) - if (!bSuccess) - 22174: e0bffe17 ldw r2,-8(fp) - 22178: 1000031e bne r2,zero,22188 - printf("failed to init MIPI- Camera i2c\r\n"); - 2217c: 010000f4 movhi r4,3 - 22180: 210a2704 addi r4,r4,10396 - 22184: 002367c0 call 2367c - - if (gain > 0x7FF) gain = 0x7FF; - 22188: e0bfff0b ldhu r2,-4(fp) - 2218c: 10820030 cmpltui r2,r2,2048 - 22190: 1000021e bne r2,zero,2219c - 22194: 0081ffc4 movi r2,2047 - 22198: e0bfff0d sth r2,-4(fp) - if (gain < 0x080) gain = 0x080; - 2219c: e0bfff0b ldhu r2,-4(fp) - 221a0: 10802028 cmpgeui r2,r2,128 - 221a4: 1000021e bne r2,zero,221b0 - 221a8: 00802004 movi r2,128 - 221ac: e0bfff0d sth r2,-4(fp) - - OV8865_write_cmos_sensor_8(0x3508, (gain >> 8) & 0x0F); - 221b0: e0bfff0b ldhu r2,-4(fp) - 221b4: 1004d23a srli r2,r2,8 - 221b8: 10803fcc andi r2,r2,255 - 221bc: 108003cc andi r2,r2,15 - 221c0: 100b883a mov r5,r2 - 221c4: 010d4204 movi r4,13576 - 221c8: 0021e300 call 21e30 - OV8865_write_cmos_sensor_8(0x3509, gain & 0xFF); - 221cc: e0bfff0b ldhu r2,-4(fp) - 221d0: 10803fcc andi r2,r2,255 - 221d4: 100b883a mov r5,r2 - 221d8: 010d4244 movi r4,13577 - 221dc: 0021e300 call 21e30 - - - oc_i2c_uninit(I2C_OPENCORES_CAMERA_BASE); - 221e0: 01000134 movhi r4,4 - 221e4: 21041004 addi r4,r4,4160 - 221e8: 00204d40 call 204d4 -} - 221ec: 0001883a nop - 221f0: e037883a mov sp,fp - 221f4: dfc00117 ldw ra,4(sp) - 221f8: df000017 ldw fp,0(sp) - 221fc: dec00204 addi sp,sp,8 - 22200: f800283a ret - -00022204 : - -alt_u32 OV8865ReadExposure(){ - 22204: defffb04 addi sp,sp,-20 - 22208: dfc00415 stw ra,16(sp) - 2220c: df000315 stw fp,12(sp) - 22210: dc000215 stw r16,8(sp) - 22214: df000304 addi fp,sp,12 - - alt_u32 exposure; - - Focus_Released(); // waiting for VCM release I2C bus - 22218: 00213440 call 21344 - - int bSuccess = oc_i2c_init_ex(I2C_OPENCORES_CAMERA_BASE, 50*1000*1000,400*1000); //I2C: 400K - 2221c: 018001b4 movhi r6,6 - 22220: 3186a004 addi r6,r6,6784 - 22224: 0140bef4 movhi r5,763 - 22228: 297c2004 addi r5,r5,-3968 - 2222c: 01000134 movhi r4,4 - 22230: 21041004 addi r4,r4,4160 - 22234: 00203980 call 20398 - 22238: e0bffd15 stw r2,-12(fp) - if (!bSuccess) - 2223c: e0bffd17 ldw r2,-12(fp) - 22240: 1000031e bne r2,zero,22250 - printf("failed to init MIPI- Camera i2c\r\n"); - 22244: 010000f4 movhi r4,3 - 22248: 210a2704 addi r4,r4,10396 - 2224c: 002367c0 call 2367c - - exposure = OV8865_read_cmos_sensor_8(0x3500); - 22250: 010d4004 movi r4,13568 - 22254: 0021dcc0 call 21dcc - 22258: 10803fcc andi r2,r2,255 - 2225c: e0bffe15 stw r2,-8(fp) - exposure = (exposure <<8) | OV8865_read_cmos_sensor_8(0x3501); - 22260: e0bffe17 ldw r2,-8(fp) - 22264: 1020923a slli r16,r2,8 - 22268: 010d4044 movi r4,13569 - 2226c: 0021dcc0 call 21dcc - 22270: 10803fcc andi r2,r2,255 - 22274: 8084b03a or r2,r16,r2 - 22278: e0bffe15 stw r2,-8(fp) - exposure = (exposure <<8) | OV8865_read_cmos_sensor_8(0x3502); - 2227c: e0bffe17 ldw r2,-8(fp) - 22280: 1020923a slli r16,r2,8 - 22284: 010d4084 movi r4,13570 - 22288: 0021dcc0 call 21dcc - 2228c: 10803fcc andi r2,r2,255 - 22290: 8084b03a or r2,r16,r2 - 22294: e0bffe15 stw r2,-8(fp) - - oc_i2c_uninit(I2C_OPENCORES_CAMERA_BASE); - 22298: 01000134 movhi r4,4 - 2229c: 21041004 addi r4,r4,4160 - 222a0: 00204d40 call 204d4 - - return exposure; - 222a4: e0bffe17 ldw r2,-8(fp) -} - 222a8: e6ffff04 addi sp,fp,-4 - 222ac: dfc00217 ldw ra,8(sp) - 222b0: df000117 ldw fp,4(sp) - 222b4: dc000017 ldw r16,0(sp) - 222b8: dec00304 addi sp,sp,12 - 222bc: f800283a ret - -000222c0 : +00021e7c : //ZOOM void MIPI_BIN_LEVEL(alt_u8 level){ - 222c0: defffc04 addi sp,sp,-16 - 222c4: dfc00315 stw ra,12(sp) - 222c8: df000215 stw fp,8(sp) - 222cc: df000204 addi fp,sp,8 - 222d0: 2005883a mov r2,r4 - 222d4: e0bfff05 stb r2,-4(fp) + 21e7c: defffc04 addi sp,sp,-16 + 21e80: dfc00315 stw ra,12(sp) + 21e84: df000215 stw fp,8(sp) + 21e88: df000204 addi fp,sp,8 + 21e8c: 2005883a mov r2,r4 + 21e90: e0bfff05 stb r2,-4(fp) if(level <= 1) level = 1; - 222d8: e0bfff03 ldbu r2,-4(fp) - 222dc: 108000a8 cmpgeui r2,r2,2 - 222e0: 1000021e bne r2,zero,222ec - 222e4: 00800044 movi r2,1 - 222e8: e0bfff05 stb r2,-4(fp) + 21e94: e0bfff03 ldbu r2,-4(fp) + 21e98: 108000a8 cmpgeui r2,r2,2 + 21e9c: 1000021e bne r2,zero,21ea8 + 21ea0: 00800044 movi r2,1 + 21ea4: e0bfff05 stb r2,-4(fp) if(level >= 3) level = 3; - 222ec: e0bfff03 ldbu r2,-4(fp) - 222f0: 108000f0 cmpltui r2,r2,3 - 222f4: 1000021e bne r2,zero,22300 - 222f8: 008000c4 movi r2,3 - 222fc: e0bfff05 stb r2,-4(fp) + 21ea8: e0bfff03 ldbu r2,-4(fp) + 21eac: 108000f0 cmpltui r2,r2,3 + 21eb0: 1000021e bne r2,zero,21ebc + 21eb4: 008000c4 movi r2,3 + 21eb8: e0bfff05 stb r2,-4(fp) Focus_Released(); // waiting for VCM release I2C bus - 22300: 00213440 call 21344 + 21ebc: 00213440 call 21344 int bSuccess; bSuccess = oc_i2c_init_ex(I2C_OPENCORES_CAMERA_BASE, 50*1000*1000,400*1000); //I2C: 400K - 22304: 018001b4 movhi r6,6 - 22308: 3186a004 addi r6,r6,6784 - 2230c: 0140bef4 movhi r5,763 - 22310: 297c2004 addi r5,r5,-3968 - 22314: 01000134 movhi r4,4 - 22318: 21041004 addi r4,r4,4160 - 2231c: 00203980 call 20398 - 22320: e0bffe15 stw r2,-8(fp) + 21ec0: 018001b4 movhi r6,6 + 21ec4: 3186a004 addi r6,r6,6784 + 21ec8: 0140bef4 movhi r5,763 + 21ecc: 297c2004 addi r5,r5,-3968 + 21ed0: 01000134 movhi r4,4 + 21ed4: 21041004 addi r4,r4,4160 + 21ed8: 00203980 call 20398 + 21edc: e0bffe15 stw r2,-8(fp) if (!bSuccess) - 22324: e0bffe17 ldw r2,-8(fp) - 22328: 1000031e bne r2,zero,22338 + 21ee0: e0bffe17 ldw r2,-8(fp) + 21ee4: 1000031e bne r2,zero,21ef4 printf("failed to init MIPI- Camera i2c\r\n"); - 2232c: 010000f4 movhi r4,3 - 22330: 210a2704 addi r4,r4,10396 - 22334: 002367c0 call 2367c + 21ee8: 010000f4 movhi r4,3 + 21eec: 2107d304 addi r4,r4,8012 + 21ef0: 00231400 call 23140 OV8865_write_cmos_sensor_8(0x0100, 0x00); - 22338: 000b883a mov r5,zero - 2233c: 01004004 movi r4,256 - 22340: 0021e300 call 21e30 + 21ef4: 000b883a mov r5,zero + 21ef8: 01004004 movi r4,256 + 21efc: 0021c400 call 21c40 if(level == 1){ - 22344: e0bfff03 ldbu r2,-4(fp) - 22348: 10800058 cmpnei r2,r2,1 - 2234c: 1000131e bne r2,zero,2239c + 21f00: e0bfff03 ldbu r2,-4(fp) + 21f04: 10800058 cmpnei r2,r2,1 + 21f08: 1000131e bne r2,zero,21f58 OV8865_write_cmos_sensor_8(0x3814, 0x01); - 22350: 01400044 movi r5,1 - 22354: 010e0504 movi r4,14356 - 22358: 0021e300 call 21e30 + 21f0c: 01400044 movi r5,1 + 21f10: 010e0504 movi r4,14356 + 21f14: 0021c400 call 21c40 OV8865_write_cmos_sensor_8(0x3815, 0x01); - 2235c: 01400044 movi r5,1 - 22360: 010e0544 movi r4,14357 - 22364: 0021e300 call 21e30 + 21f18: 01400044 movi r5,1 + 21f1c: 010e0544 movi r4,14357 + 21f20: 0021c400 call 21c40 OV8865_write_cmos_sensor_8(0x382a, 0x01); - 22368: 01400044 movi r5,1 - 2236c: 010e0a84 movi r4,14378 - 22370: 0021e300 call 21e30 + 21f24: 01400044 movi r5,1 + 21f28: 010e0a84 movi r4,14378 + 21f2c: 0021c400 call 21c40 OV8865_write_cmos_sensor_8(0x382b, 0x01); - 22374: 01400044 movi r5,1 - 22378: 010e0ac4 movi r4,14379 - 2237c: 0021e300 call 21e30 + 21f30: 01400044 movi r5,1 + 21f34: 010e0ac4 movi r4,14379 + 21f38: 0021c400 call 21c40 OV8865_write_cmos_sensor_8(0x3830, 8); - 22380: 01400204 movi r5,8 - 22384: 010e0c04 movi r4,14384 - 22388: 0021e300 call 21e30 + 21f3c: 01400204 movi r5,8 + 21f40: 010e0c04 movi r4,14384 + 21f44: 0021c400 call 21c40 OV8865_write_cmos_sensor_8(0x3836, 2); - 2238c: 01400084 movi r5,2 - 22390: 010e0d84 movi r4,14390 - 22394: 0021e300 call 21e30 - 22398: 00002b06 br 22448 + 21f48: 01400084 movi r5,2 + 21f4c: 010e0d84 movi r4,14390 + 21f50: 0021c400 call 21c40 + 21f54: 00002b06 br 22004 } else if(level == 2){ - 2239c: e0bfff03 ldbu r2,-4(fp) - 223a0: 10800098 cmpnei r2,r2,2 - 223a4: 1000131e bne r2,zero,223f4 + 21f58: e0bfff03 ldbu r2,-4(fp) + 21f5c: 10800098 cmpnei r2,r2,2 + 21f60: 1000131e bne r2,zero,21fb0 OV8865_write_cmos_sensor_8(0x3814, 0x03); - 223a8: 014000c4 movi r5,3 - 223ac: 010e0504 movi r4,14356 - 223b0: 0021e300 call 21e30 + 21f64: 014000c4 movi r5,3 + 21f68: 010e0504 movi r4,14356 + 21f6c: 0021c400 call 21c40 OV8865_write_cmos_sensor_8(0x3815, 0x01); - 223b4: 01400044 movi r5,1 - 223b8: 010e0544 movi r4,14357 - 223bc: 0021e300 call 21e30 + 21f70: 01400044 movi r5,1 + 21f74: 010e0544 movi r4,14357 + 21f78: 0021c400 call 21c40 OV8865_write_cmos_sensor_8(0x382a, 0x03); - 223c0: 014000c4 movi r5,3 - 223c4: 010e0a84 movi r4,14378 - 223c8: 0021e300 call 21e30 + 21f7c: 014000c4 movi r5,3 + 21f80: 010e0a84 movi r4,14378 + 21f84: 0021c400 call 21c40 OV8865_write_cmos_sensor_8(0x382b, 0x01); - 223cc: 01400044 movi r5,1 - 223d0: 010e0ac4 movi r4,14379 - 223d4: 0021e300 call 21e30 + 21f88: 01400044 movi r5,1 + 21f8c: 010e0ac4 movi r4,14379 + 21f90: 0021c400 call 21c40 OV8865_write_cmos_sensor_8(0x3830, 4); - 223d8: 01400104 movi r5,4 - 223dc: 010e0c04 movi r4,14384 - 223e0: 0021e300 call 21e30 + 21f94: 01400104 movi r5,4 + 21f98: 010e0c04 movi r4,14384 + 21f9c: 0021c400 call 21c40 OV8865_write_cmos_sensor_8(0x3836, 1); - 223e4: 01400044 movi r5,1 - 223e8: 010e0d84 movi r4,14390 - 223ec: 0021e300 call 21e30 - 223f0: 00001506 br 22448 + 21fa0: 01400044 movi r5,1 + 21fa4: 010e0d84 movi r4,14390 + 21fa8: 0021c400 call 21c40 + 21fac: 00001506 br 22004 } else if(level == 3){ - 223f4: e0bfff03 ldbu r2,-4(fp) - 223f8: 108000d8 cmpnei r2,r2,3 - 223fc: 1000121e bne r2,zero,22448 + 21fb0: e0bfff03 ldbu r2,-4(fp) + 21fb4: 108000d8 cmpnei r2,r2,3 + 21fb8: 1000121e bne r2,zero,22004 OV8865_write_cmos_sensor_8(0x3814, 0x07); - 22400: 014001c4 movi r5,7 - 22404: 010e0504 movi r4,14356 - 22408: 0021e300 call 21e30 + 21fbc: 014001c4 movi r5,7 + 21fc0: 010e0504 movi r4,14356 + 21fc4: 0021c400 call 21c40 OV8865_write_cmos_sensor_8(0x3815, 0x01); - 2240c: 01400044 movi r5,1 - 22410: 010e0544 movi r4,14357 - 22414: 0021e300 call 21e30 + 21fc8: 01400044 movi r5,1 + 21fcc: 010e0544 movi r4,14357 + 21fd0: 0021c400 call 21c40 OV8865_write_cmos_sensor_8(0x382a, 0x07); - 22418: 014001c4 movi r5,7 - 2241c: 010e0a84 movi r4,14378 - 22420: 0021e300 call 21e30 + 21fd4: 014001c4 movi r5,7 + 21fd8: 010e0a84 movi r4,14378 + 21fdc: 0021c400 call 21c40 OV8865_write_cmos_sensor_8(0x382b, 0x01); - 22424: 01400044 movi r5,1 - 22428: 010e0ac4 movi r4,14379 - 2242c: 0021e300 call 21e30 + 21fe0: 01400044 movi r5,1 + 21fe4: 010e0ac4 movi r4,14379 + 21fe8: 0021c400 call 21c40 OV8865_write_cmos_sensor_8(0x3830, 8); - 22430: 01400204 movi r5,8 - 22434: 010e0c04 movi r4,14384 - 22438: 0021e300 call 21e30 + 21fec: 01400204 movi r5,8 + 21ff0: 010e0c04 movi r4,14384 + 21ff4: 0021c400 call 21c40 OV8865_write_cmos_sensor_8(0x3836, 2); - 2243c: 01400084 movi r5,2 - 22440: 010e0d84 movi r4,14390 - 22444: 0021e300 call 21e30 + 21ff8: 01400084 movi r5,2 + 21ffc: 010e0d84 movi r4,14390 + 22000: 0021c400 call 21c40 } usleep(10000); - 22448: 0109c404 movi r4,10000 - 2244c: 00302f00 call 302f0 + 22004: 0109c404 movi r4,10000 + 22008: 002f9cc0 call 2f9cc OV8865_write_cmos_sensor_8(0x0100, 0x01); - 22450: 01400044 movi r5,1 - 22454: 01004004 movi r4,256 - 22458: 0021e300 call 21e30 + 2200c: 01400044 movi r5,1 + 22010: 01004004 movi r4,256 + 22014: 0021c400 call 21c40 oc_i2c_uninit(I2C_OPENCORES_CAMERA_BASE); // Release I2C bus , due to two I2C master shared! - 2245c: 01000134 movhi r4,4 - 22460: 21041004 addi r4,r4,4160 - 22464: 00204d40 call 204d4 + 22018: 01000134 movhi r4,4 + 2201c: 21041004 addi r4,r4,4160 + 22020: 00204d40 call 204d4 } - 22468: 0001883a nop - 2246c: e037883a mov sp,fp - 22470: dfc00117 ldw ra,4(sp) - 22474: df000017 ldw fp,0(sp) - 22478: dec00204 addi sp,sp,8 - 2247c: f800283a ret + 22024: 0001883a nop + 22028: e037883a mov sp,fp + 2202c: dfc00117 ldw ra,4(sp) + 22030: df000017 ldw fp,0(sp) + 22034: dec00204 addi sp,sp,8 + 22038: f800283a ret -00022480 : +0002203c : // OV8865_write_cmos_sensor_8(0x0100, 0x01); //} void MipiCameraInit(void) { - 22480: defffb04 addi sp,sp,-20 - 22484: dfc00415 stw ra,16(sp) - 22488: df000315 stw fp,12(sp) - 2248c: df000304 addi fp,sp,12 + 2203c: defffb04 addi sp,sp,-20 + 22040: dfc00415 stw ra,16(sp) + 22044: df000315 stw fp,12(sp) + 22048: df000304 addi fp,sp,12 int i, num; int bSuccess; Focus_Released(); // waiting for VCM release I2C bus - 22490: 00213440 call 21344 + 2204c: 00213440 call 21344 bSuccess = oc_i2c_init_ex(I2C_OPENCORES_CAMERA_BASE, 50*1000*1000,400*1000); //I2C: 400K - 22494: 018001b4 movhi r6,6 - 22498: 3186a004 addi r6,r6,6784 - 2249c: 0140bef4 movhi r5,763 - 224a0: 297c2004 addi r5,r5,-3968 - 224a4: 01000134 movhi r4,4 - 224a8: 21041004 addi r4,r4,4160 - 224ac: 00203980 call 20398 - 224b0: e0bffe15 stw r2,-8(fp) + 22050: 018001b4 movhi r6,6 + 22054: 3186a004 addi r6,r6,6784 + 22058: 0140bef4 movhi r5,763 + 2205c: 297c2004 addi r5,r5,-3968 + 22060: 01000134 movhi r4,4 + 22064: 21041004 addi r4,r4,4160 + 22068: 00203980 call 20398 + 2206c: e0bffe15 stw r2,-8(fp) if (!bSuccess) - 224b4: e0bffe17 ldw r2,-8(fp) - 224b8: 1000031e bne r2,zero,224c8 + 22070: e0bffe17 ldw r2,-8(fp) + 22074: 1000031e bne r2,zero,22084 printf("failed to init MIPI- Camera i2c\r\n"); - 224bc: 010000f4 movhi r4,3 - 224c0: 210a2704 addi r4,r4,10396 - 224c4: 002367c0 call 2367c + 22078: 010000f4 movhi r4,3 + 2207c: 2107d304 addi r4,r4,8012 + 22080: 00231400 call 23140 // usleep(10000); // } // OV8865DB("\nStart MipiCameraInit -OV8865!\r\n"); - 224c8: 010000f4 movhi r4,3 - 224cc: 210a3004 addi r4,r4,10432 - 224d0: 002367c0 call 2367c + 22084: 010000f4 movhi r4,3 + 22088: 2107e304 addi r4,r4,8076 + 2208c: 00231400 call 23140 OV8865DB("Write Read Test!\n"); - 224d4: 010000f4 movhi r4,3 - 224d8: 210a3804 addi r4,r4,10464 - 224dc: 002367c0 call 2367c + 22090: 010000f4 movhi r4,3 + 22094: 2107eb04 addi r4,r4,8108 + 22098: 00231400 call 23140 for(i=0;i<10;i++){ - 224e0: e03ffd15 stw zero,-12(fp) - 224e4: 00001406 br 22538 + 2209c: e03ffd15 stw zero,-12(fp) + 220a0: 00001406 br 220f4 OV8865_write_cmos_sensor_8(0x3809,i); - 224e8: e0bffd17 ldw r2,-12(fp) - 224ec: 10803fcc andi r2,r2,255 - 224f0: 100b883a mov r5,r2 - 224f4: 010e0244 movi r4,14345 - 224f8: 0021e300 call 21e30 + 220a4: e0bffd17 ldw r2,-12(fp) + 220a8: 10803fcc andi r2,r2,255 + 220ac: 100b883a mov r5,r2 + 220b0: 010e0244 movi r4,14345 + 220b4: 0021c400 call 21c40 usleep(100); - 224fc: 01001904 movi r4,100 - 22500: 00302f00 call 302f0 + 220b8: 01001904 movi r4,100 + 220bc: 002f9cc0 call 2f9cc printf("%d (%d)\n",OV8865_read_cmos_sensor_8(0x3809),i); - 22504: 010e0244 movi r4,14345 - 22508: 0021dcc0 call 21dcc - 2250c: 10803fcc andi r2,r2,255 - 22510: e1bffd17 ldw r6,-12(fp) - 22514: 100b883a mov r5,r2 - 22518: 010000f4 movhi r4,3 - 2251c: 210a3d04 addi r4,r4,10484 - 22520: 00235600 call 23560 + 220c0: 010e0244 movi r4,14345 + 220c4: 0021bdc0 call 21bdc + 220c8: 10803fcc andi r2,r2,255 + 220cc: e1bffd17 ldw r6,-12(fp) + 220d0: 100b883a mov r5,r2 + 220d4: 010000f4 movhi r4,3 + 220d8: 2107f004 addi r4,r4,8128 + 220dc: 00230240 call 23024 usleep(100); - 22524: 01001904 movi r4,100 - 22528: 00302f00 call 302f0 + 220e0: 01001904 movi r4,100 + 220e4: 002f9cc0 call 2f9cc OV8865DB("\nStart MipiCameraInit -OV8865!\r\n"); OV8865DB("Write Read Test!\n"); for(i=0;i<10;i++){ - 2252c: e0bffd17 ldw r2,-12(fp) - 22530: 10800044 addi r2,r2,1 - 22534: e0bffd15 stw r2,-12(fp) - 22538: e0bffd17 ldw r2,-12(fp) - 2253c: 10800290 cmplti r2,r2,10 - 22540: 103fe91e bne r2,zero,224e8 + 220e8: e0bffd17 ldw r2,-12(fp) + 220ec: 10800044 addi r2,r2,1 + 220f0: e0bffd15 stw r2,-12(fp) + 220f4: e0bffd17 ldw r2,-12(fp) + 220f8: 10800290 cmplti r2,r2,10 + 220fc: 103fe91e bne r2,zero,220a4 <_gp+0xfffe5b6c> OV8865_write_cmos_sensor_8(0x3809,i); usleep(100); printf("%d (%d)\n",OV8865_read_cmos_sensor_8(0x3809),i); usleep(100); } num = sizeof(MipiCameraReg)/sizeof(MipiCameraReg[0]); - 22544: 00804f84 movi r2,318 - 22548: e0bfff15 stw r2,-4(fp) + 22100: 00804f84 movi r2,318 + 22104: e0bfff15 stw r2,-4(fp) for(i=0;i + 22108: e03ffd15 stw zero,-12(fp) + 2210c: 00003c06 br 22200 if (MipiCameraReg[i].Type == TIME_DELAY) usleep(MipiCameraReg[i].Data*100); - 22554: 008000f4 movhi r2,3 - 22558: 108b1304 addi r2,r2,11340 - 2255c: e0fffd17 ldw r3,-12(fp) - 22560: 18c001a4 muli r3,r3,6 - 22564: 10c5883a add r2,r2,r3 - 22568: 10800003 ldbu r2,0(r2) - 2256c: 10803fcc andi r2,r2,255 - 22570: 108000d8 cmpnei r2,r2,3 - 22574: 10000c1e bne r2,zero,225a8 - 22578: 008000f4 movhi r2,3 - 2257c: 108b1304 addi r2,r2,11340 - 22580: e0fffd17 ldw r3,-12(fp) - 22584: 18c001a4 muli r3,r3,6 - 22588: 10c5883a add r2,r2,r3 - 2258c: 10800104 addi r2,r2,4 - 22590: 10800003 ldbu r2,0(r2) - 22594: 10803fcc andi r2,r2,255 - 22598: 10801924 muli r2,r2,100 - 2259c: 1009883a mov r4,r2 - 225a0: 00302f00 call 302f0 - 225a4: 00002406 br 22638 + 22110: 008000f4 movhi r2,3 + 22114: 1088c604 addi r2,r2,8984 + 22118: e0fffd17 ldw r3,-12(fp) + 2211c: 18c001a4 muli r3,r3,6 + 22120: 10c5883a add r2,r2,r3 + 22124: 10800003 ldbu r2,0(r2) + 22128: 10803fcc andi r2,r2,255 + 2212c: 108000d8 cmpnei r2,r2,3 + 22130: 10000c1e bne r2,zero,22164 + 22134: 008000f4 movhi r2,3 + 22138: 1088c604 addi r2,r2,8984 + 2213c: e0fffd17 ldw r3,-12(fp) + 22140: 18c001a4 muli r3,r3,6 + 22144: 10c5883a add r2,r2,r3 + 22148: 10800104 addi r2,r2,4 + 2214c: 10800003 ldbu r2,0(r2) + 22150: 10803fcc andi r2,r2,255 + 22154: 10801924 muli r2,r2,100 + 22158: 1009883a mov r4,r2 + 2215c: 002f9cc0 call 2f9cc + 22160: 00002406 br 221f4 else if(MipiCameraReg[i].Type == END_OF_SCRIPT) break; - 225a8: 008000f4 movhi r2,3 - 225ac: 108b1304 addi r2,r2,11340 - 225b0: e0fffd17 ldw r3,-12(fp) - 225b4: 18c001a4 muli r3,r3,6 - 225b8: 10c5883a add r2,r2,r3 - 225bc: 10800003 ldbu r2,0(r2) - 225c0: 10803fcc andi r2,r2,255 - 225c4: 10800118 cmpnei r2,r2,4 - 225c8: 10002226 beq r2,zero,22654 + 22164: 008000f4 movhi r2,3 + 22168: 1088c604 addi r2,r2,8984 + 2216c: e0fffd17 ldw r3,-12(fp) + 22170: 18c001a4 muli r3,r3,6 + 22174: 10c5883a add r2,r2,r3 + 22178: 10800003 ldbu r2,0(r2) + 2217c: 10803fcc andi r2,r2,255 + 22180: 10800118 cmpnei r2,r2,4 + 22184: 10002226 beq r2,zero,22210 else if(MipiCameraReg[i].Type == 0x6c) OV8865_write_cmos_sensor_8(MipiCameraReg[i].Addr, MipiCameraReg[i].Data); - 225cc: 008000f4 movhi r2,3 - 225d0: 108b1304 addi r2,r2,11340 - 225d4: e0fffd17 ldw r3,-12(fp) - 225d8: 18c001a4 muli r3,r3,6 - 225dc: 10c5883a add r2,r2,r3 - 225e0: 10800003 ldbu r2,0(r2) - 225e4: 10803fcc andi r2,r2,255 - 225e8: 10801b18 cmpnei r2,r2,108 - 225ec: 1000121e bne r2,zero,22638 - 225f0: 008000f4 movhi r2,3 - 225f4: 108b1304 addi r2,r2,11340 - 225f8: e0fffd17 ldw r3,-12(fp) - 225fc: 18c001a4 muli r3,r3,6 - 22600: 10c5883a add r2,r2,r3 - 22604: 10800084 addi r2,r2,2 - 22608: 1080000b ldhu r2,0(r2) - 2260c: 113fffcc andi r4,r2,65535 - 22610: 008000f4 movhi r2,3 - 22614: 108b1304 addi r2,r2,11340 - 22618: e0fffd17 ldw r3,-12(fp) - 2261c: 18c001a4 muli r3,r3,6 - 22620: 10c5883a add r2,r2,r3 - 22624: 10800104 addi r2,r2,4 - 22628: 10800003 ldbu r2,0(r2) - 2262c: 10803fcc andi r2,r2,255 - 22630: 100b883a mov r5,r2 - 22634: 0021e300 call 21e30 + 22188: 008000f4 movhi r2,3 + 2218c: 1088c604 addi r2,r2,8984 + 22190: e0fffd17 ldw r3,-12(fp) + 22194: 18c001a4 muli r3,r3,6 + 22198: 10c5883a add r2,r2,r3 + 2219c: 10800003 ldbu r2,0(r2) + 221a0: 10803fcc andi r2,r2,255 + 221a4: 10801b18 cmpnei r2,r2,108 + 221a8: 1000121e bne r2,zero,221f4 + 221ac: 008000f4 movhi r2,3 + 221b0: 1088c604 addi r2,r2,8984 + 221b4: e0fffd17 ldw r3,-12(fp) + 221b8: 18c001a4 muli r3,r3,6 + 221bc: 10c5883a add r2,r2,r3 + 221c0: 10800084 addi r2,r2,2 + 221c4: 1080000b ldhu r2,0(r2) + 221c8: 113fffcc andi r4,r2,65535 + 221cc: 008000f4 movhi r2,3 + 221d0: 1088c604 addi r2,r2,8984 + 221d4: e0fffd17 ldw r3,-12(fp) + 221d8: 18c001a4 muli r3,r3,6 + 221dc: 10c5883a add r2,r2,r3 + 221e0: 10800104 addi r2,r2,4 + 221e4: 10800003 ldbu r2,0(r2) + 221e8: 10803fcc andi r2,r2,255 + 221ec: 100b883a mov r5,r2 + 221f0: 0021c400 call 21c40 usleep(100); printf("%d (%d)\n",OV8865_read_cmos_sensor_8(0x3809),i); usleep(100); } num = sizeof(MipiCameraReg)/sizeof(MipiCameraReg[0]); for(i=0;i - 22650: 00000106 br 22658 + 221f4: e0bffd17 ldw r2,-12(fp) + 221f8: 10800044 addi r2,r2,1 + 221fc: e0bffd15 stw r2,-12(fp) + 22200: e0fffd17 ldw r3,-12(fp) + 22204: e0bfff17 ldw r2,-4(fp) + 22208: 18bfc116 blt r3,r2,22110 <_gp+0xfffe5bd8> + 2220c: 00000106 br 22214 if (MipiCameraReg[i].Type == TIME_DELAY) usleep(MipiCameraReg[i].Data*100); else if(MipiCameraReg[i].Type == END_OF_SCRIPT) break; - 22654: 0001883a nop + 22210: 0001883a nop else if(MipiCameraReg[i].Type == 0x6c) OV8865_write_cmos_sensor_8(MipiCameraReg[i].Addr, MipiCameraReg[i].Data); } oc_i2c_uninit(I2C_OPENCORES_CAMERA_BASE); // Release I2C bus , due to two I2C master shared! - 22658: 01000134 movhi r4,4 - 2265c: 21041004 addi r4,r4,4160 - 22660: 00204d40 call 204d4 + 22214: 01000134 movhi r4,4 + 22218: 21041004 addi r4,r4,4160 + 2221c: 00204d40 call 204d4 OV8865DB("\nEnd MipiCameraInit! -OV8865!\r\n\n"); - 22664: 010000f4 movhi r4,3 - 22668: 210a4004 addi r4,r4,10496 - 2266c: 002367c0 call 2367c + 22220: 010000f4 movhi r4,3 + 22224: 2107f304 addi r4,r4,8140 + 22228: 00231400 call 23140 } - 22670: 0001883a nop - 22674: e037883a mov sp,fp - 22678: dfc00117 ldw ra,4(sp) - 2267c: df000017 ldw fp,0(sp) - 22680: dec00204 addi sp,sp,8 - 22684: f800283a ret + 2222c: 0001883a nop + 22230: e037883a mov sp,fp + 22234: dfc00117 ldw ra,4(sp) + 22238: df000017 ldw fp,0(sp) + 2223c: dec00204 addi sp,sp,8 + 22240: f800283a ret -00022688 : +00022244 : #include "queue.h" QUEUE_STRUCT* QUEUE_New(int nQueueNum){ - 22688: defffb04 addi sp,sp,-20 - 2268c: dfc00415 stw ra,16(sp) - 22690: df000315 stw fp,12(sp) - 22694: df000304 addi fp,sp,12 - 22698: e13fff15 stw r4,-4(fp) + 22244: defffb04 addi sp,sp,-20 + 22248: dfc00415 stw ra,16(sp) + 2224c: df000315 stw fp,12(sp) + 22250: df000304 addi fp,sp,12 + 22254: e13fff15 stw r4,-4(fp) int nSize; QUEUE_STRUCT *pQueue; nSize = sizeof(QUEUE_STRUCT)+nQueueNum*sizeof(alt_u32); - 2269c: e0bfff17 ldw r2,-4(fp) - 226a0: 10800144 addi r2,r2,5 - 226a4: 1085883a add r2,r2,r2 - 226a8: 1085883a add r2,r2,r2 - 226ac: e0bffd15 stw r2,-12(fp) + 22258: e0bfff17 ldw r2,-4(fp) + 2225c: 10800144 addi r2,r2,5 + 22260: 1085883a add r2,r2,r2 + 22264: 1085883a add r2,r2,r2 + 22268: e0bffd15 stw r2,-12(fp) pQueue = (QUEUE_STRUCT *)malloc(nSize); - 226b0: e0bffd17 ldw r2,-12(fp) - 226b4: 1009883a mov r4,r2 - 226b8: 0022bd40 call 22bd4 - 226bc: e0bffe15 stw r2,-8(fp) + 2226c: e0bffd17 ldw r2,-12(fp) + 22270: 1009883a mov r4,r2 + 22274: 00226980 call 22698 + 22278: e0bffe15 stw r2,-8(fp) memset((void *)pQueue, 0, nSize); - 226c0: e0bffd17 ldw r2,-12(fp) - 226c4: 100d883a mov r6,r2 - 226c8: 000b883a mov r5,zero - 226cc: e13ffe17 ldw r4,-8(fp) - 226d0: 00234080 call 23408 + 2227c: e0bffd17 ldw r2,-12(fp) + 22280: 100d883a mov r6,r2 + 22284: 000b883a mov r5,zero + 22288: e13ffe17 ldw r4,-8(fp) + 2228c: 0022ecc0 call 22ecc pQueue->num = nQueueNum; - 226d4: e0ffff17 ldw r3,-4(fp) - 226d8: e0bffe17 ldw r2,-8(fp) - 226dc: 10c00015 stw r3,0(r2) + 22290: e0ffff17 ldw r3,-4(fp) + 22294: e0bffe17 ldw r2,-8(fp) + 22298: 10c00015 stw r3,0(r2) return pQueue; - 226e0: e0bffe17 ldw r2,-8(fp) + 2229c: e0bffe17 ldw r2,-8(fp) } - 226e4: e037883a mov sp,fp - 226e8: dfc00117 ldw ra,4(sp) - 226ec: df000017 ldw fp,0(sp) - 226f0: dec00204 addi sp,sp,8 - 226f4: f800283a ret + 222a0: e037883a mov sp,fp + 222a4: dfc00117 ldw ra,4(sp) + 222a8: df000017 ldw fp,0(sp) + 222ac: dec00204 addi sp,sp,8 + 222b0: f800283a ret -000226f8 : +000222b4 : void QUEUE_Delete(QUEUE_STRUCT *pQueue){ - 226f8: defffd04 addi sp,sp,-12 - 226fc: dfc00215 stw ra,8(sp) - 22700: df000115 stw fp,4(sp) - 22704: df000104 addi fp,sp,4 - 22708: e13fff15 stw r4,-4(fp) + 222b4: defffd04 addi sp,sp,-12 + 222b8: dfc00215 stw ra,8(sp) + 222bc: df000115 stw fp,4(sp) + 222c0: df000104 addi fp,sp,4 + 222c4: e13fff15 stw r4,-4(fp) free(pQueue); - 2270c: e13fff17 ldw r4,-4(fp) - 22710: 0022be80 call 22be8 + 222c8: e13fff17 ldw r4,-4(fp) + 222cc: 00226ac0 call 226ac } - 22714: 0001883a nop - 22718: e037883a mov sp,fp - 2271c: dfc00117 ldw ra,4(sp) - 22720: df000017 ldw fp,0(sp) - 22724: dec00204 addi sp,sp,8 - 22728: f800283a ret + 222d0: 0001883a nop + 222d4: e037883a mov sp,fp + 222d8: dfc00117 ldw ra,4(sp) + 222dc: df000017 ldw fp,0(sp) + 222e0: dec00204 addi sp,sp,8 + 222e4: f800283a ret -0002272c : +000222e8 : bool QUEUE_IsEmpty(QUEUE_STRUCT *pQueue){ - 2272c: defffe04 addi sp,sp,-8 - 22730: df000115 stw fp,4(sp) - 22734: df000104 addi fp,sp,4 - 22738: e13fff15 stw r4,-4(fp) + 222e8: defffe04 addi sp,sp,-8 + 222ec: df000115 stw fp,4(sp) + 222f0: df000104 addi fp,sp,4 + 222f4: e13fff15 stw r4,-4(fp) if (pQueue->front == pQueue->rear) - 2273c: e0bfff17 ldw r2,-4(fp) - 22740: 10c00117 ldw r3,4(r2) - 22744: e0bfff17 ldw r2,-4(fp) - 22748: 10800217 ldw r2,8(r2) - 2274c: 1880021e bne r3,r2,22758 + 222f8: e0bfff17 ldw r2,-4(fp) + 222fc: 10c00117 ldw r3,4(r2) + 22300: e0bfff17 ldw r2,-4(fp) + 22304: 10800217 ldw r2,8(r2) + 22308: 1880021e bne r3,r2,22314 return TRUE; - 22750: 00800044 movi r2,1 - 22754: 00000106 br 2275c + 2230c: 00800044 movi r2,1 + 22310: 00000106 br 22318 return FALSE; - 22758: 0005883a mov r2,zero + 22314: 0005883a mov r2,zero } - 2275c: e037883a mov sp,fp - 22760: df000017 ldw fp,0(sp) - 22764: dec00104 addi sp,sp,4 - 22768: f800283a ret + 22318: e037883a mov sp,fp + 2231c: df000017 ldw fp,0(sp) + 22320: dec00104 addi sp,sp,4 + 22324: f800283a ret -0002276c : +00022328 : bool QUEUE_IsFull(QUEUE_STRUCT *pQueue){ - 2276c: defffd04 addi sp,sp,-12 - 22770: dfc00215 stw ra,8(sp) - 22774: df000115 stw fp,4(sp) - 22778: df000104 addi fp,sp,4 - 2277c: e13fff15 stw r4,-4(fp) + 22328: defffd04 addi sp,sp,-12 + 2232c: dfc00215 stw ra,8(sp) + 22330: df000115 stw fp,4(sp) + 22334: df000104 addi fp,sp,4 + 22338: e13fff15 stw r4,-4(fp) if (((pQueue->front+1)%pQueue->num) == pQueue->rear) - 22780: e0bfff17 ldw r2,-4(fp) - 22784: 10800117 ldw r2,4(r2) - 22788: 10c00044 addi r3,r2,1 - 2278c: e0bfff17 ldw r2,-4(fp) - 22790: 10800017 ldw r2,0(r2) - 22794: 100b883a mov r5,r2 - 22798: 1809883a mov r4,r3 - 2279c: 0022a840 call 22a84 <__umodsi3> - 227a0: 1007883a mov r3,r2 - 227a4: e0bfff17 ldw r2,-4(fp) - 227a8: 10800217 ldw r2,8(r2) - 227ac: 1880021e bne r3,r2,227b8 + 2233c: e0bfff17 ldw r2,-4(fp) + 22340: 10800117 ldw r2,4(r2) + 22344: 10c00044 addi r3,r2,1 + 22348: e0bfff17 ldw r2,-4(fp) + 2234c: 10800017 ldw r2,0(r2) + 22350: 100b883a mov r5,r2 + 22354: 1809883a mov r4,r3 + 22358: 00226400 call 22640 <__umodsi3> + 2235c: 1007883a mov r3,r2 + 22360: e0bfff17 ldw r2,-4(fp) + 22364: 10800217 ldw r2,8(r2) + 22368: 1880021e bne r3,r2,22374 return TRUE; - 227b0: 00800044 movi r2,1 - 227b4: 00000106 br 227bc + 2236c: 00800044 movi r2,1 + 22370: 00000106 br 22378 return FALSE; - 227b8: 0005883a mov r2,zero + 22374: 0005883a mov r2,zero } - 227bc: e037883a mov sp,fp - 227c0: dfc00117 ldw ra,4(sp) - 227c4: df000017 ldw fp,0(sp) - 227c8: dec00204 addi sp,sp,8 - 227cc: f800283a ret + 22378: e037883a mov sp,fp + 2237c: dfc00117 ldw ra,4(sp) + 22380: df000017 ldw fp,0(sp) + 22384: dec00204 addi sp,sp,8 + 22388: f800283a ret -000227d0 : +0002238c : bool QUEUE_Push(QUEUE_STRUCT *pQueue, alt_u32 data32){ - 227d0: defffc04 addi sp,sp,-16 - 227d4: dfc00315 stw ra,12(sp) - 227d8: df000215 stw fp,8(sp) - 227dc: df000204 addi fp,sp,8 - 227e0: e13ffe15 stw r4,-8(fp) - 227e4: e17fff15 stw r5,-4(fp) + 2238c: defffc04 addi sp,sp,-16 + 22390: dfc00315 stw ra,12(sp) + 22394: df000215 stw fp,8(sp) + 22398: df000204 addi fp,sp,8 + 2239c: e13ffe15 stw r4,-8(fp) + 223a0: e17fff15 stw r5,-4(fp) if (QUEUE_IsFull(pQueue)) - 227e8: e13ffe17 ldw r4,-8(fp) - 227ec: 002276c0 call 2276c - 227f0: 10000226 beq r2,zero,227fc + 223a4: e13ffe17 ldw r4,-8(fp) + 223a8: 00223280 call 22328 + 223ac: 10000226 beq r2,zero,223b8 return FALSE; - 227f4: 0005883a mov r2,zero - 227f8: 00001506 br 22850 + 223b0: 0005883a mov r2,zero + 223b4: 00001506 br 2240c pQueue->data[pQueue->front] = data32; - 227fc: e0bffe17 ldw r2,-8(fp) - 22800: 10800117 ldw r2,4(r2) - 22804: e0fffe17 ldw r3,-8(fp) - 22808: 108000c4 addi r2,r2,3 - 2280c: 1085883a add r2,r2,r2 - 22810: 1085883a add r2,r2,r2 - 22814: 1885883a add r2,r3,r2 - 22818: e0ffff17 ldw r3,-4(fp) - 2281c: 10c00015 stw r3,0(r2) + 223b8: e0bffe17 ldw r2,-8(fp) + 223bc: 10800117 ldw r2,4(r2) + 223c0: e0fffe17 ldw r3,-8(fp) + 223c4: 108000c4 addi r2,r2,3 + 223c8: 1085883a add r2,r2,r2 + 223cc: 1085883a add r2,r2,r2 + 223d0: 1885883a add r2,r3,r2 + 223d4: e0ffff17 ldw r3,-4(fp) + 223d8: 10c00015 stw r3,0(r2) pQueue->front = (pQueue->front+1)%pQueue->num; - 22820: e0bffe17 ldw r2,-8(fp) - 22824: 10800117 ldw r2,4(r2) - 22828: 10c00044 addi r3,r2,1 - 2282c: e0bffe17 ldw r2,-8(fp) - 22830: 10800017 ldw r2,0(r2) - 22834: 100b883a mov r5,r2 - 22838: 1809883a mov r4,r3 - 2283c: 0022a840 call 22a84 <__umodsi3> - 22840: 1007883a mov r3,r2 - 22844: e0bffe17 ldw r2,-8(fp) - 22848: 10c00115 stw r3,4(r2) + 223dc: e0bffe17 ldw r2,-8(fp) + 223e0: 10800117 ldw r2,4(r2) + 223e4: 10c00044 addi r3,r2,1 + 223e8: e0bffe17 ldw r2,-8(fp) + 223ec: 10800017 ldw r2,0(r2) + 223f0: 100b883a mov r5,r2 + 223f4: 1809883a mov r4,r3 + 223f8: 00226400 call 22640 <__umodsi3> + 223fc: 1007883a mov r3,r2 + 22400: e0bffe17 ldw r2,-8(fp) + 22404: 10c00115 stw r3,4(r2) return TRUE; - 2284c: 00800044 movi r2,1 + 22408: 00800044 movi r2,1 } - 22850: e037883a mov sp,fp - 22854: dfc00117 ldw ra,4(sp) - 22858: df000017 ldw fp,0(sp) - 2285c: dec00204 addi sp,sp,8 - 22860: f800283a ret + 2240c: e037883a mov sp,fp + 22410: dfc00117 ldw ra,4(sp) + 22414: df000017 ldw fp,0(sp) + 22418: dec00204 addi sp,sp,8 + 2241c: f800283a ret -00022864 : +00022420 : alt_u32 QUEUE_Pop(QUEUE_STRUCT *pQueue){ - 22864: defffc04 addi sp,sp,-16 - 22868: dfc00315 stw ra,12(sp) - 2286c: df000215 stw fp,8(sp) - 22870: df000204 addi fp,sp,8 - 22874: e13fff15 stw r4,-4(fp) + 22420: defffc04 addi sp,sp,-16 + 22424: dfc00315 stw ra,12(sp) + 22428: df000215 stw fp,8(sp) + 2242c: df000204 addi fp,sp,8 + 22430: e13fff15 stw r4,-4(fp) alt_u32 data32; if (QUEUE_IsEmpty(pQueue)) - 22878: e13fff17 ldw r4,-4(fp) - 2287c: 002272c0 call 2272c - 22880: 10000226 beq r2,zero,2288c + 22434: e13fff17 ldw r4,-4(fp) + 22438: 00222e80 call 222e8 + 2243c: 10000226 beq r2,zero,22448 return 0; - 22884: 0005883a mov r2,zero - 22888: 00001506 br 228e0 + 22440: 0005883a mov r2,zero + 22444: 00001506 br 2249c data32 = pQueue->data[pQueue->rear]; - 2288c: e0bfff17 ldw r2,-4(fp) - 22890: 10800217 ldw r2,8(r2) - 22894: e0ffff17 ldw r3,-4(fp) - 22898: 108000c4 addi r2,r2,3 - 2289c: 1085883a add r2,r2,r2 - 228a0: 1085883a add r2,r2,r2 - 228a4: 1885883a add r2,r3,r2 - 228a8: 10800017 ldw r2,0(r2) - 228ac: e0bffe15 stw r2,-8(fp) + 22448: e0bfff17 ldw r2,-4(fp) + 2244c: 10800217 ldw r2,8(r2) + 22450: e0ffff17 ldw r3,-4(fp) + 22454: 108000c4 addi r2,r2,3 + 22458: 1085883a add r2,r2,r2 + 2245c: 1085883a add r2,r2,r2 + 22460: 1885883a add r2,r3,r2 + 22464: 10800017 ldw r2,0(r2) + 22468: e0bffe15 stw r2,-8(fp) pQueue->rear = (pQueue->rear+1)%pQueue->num; - 228b0: e0bfff17 ldw r2,-4(fp) - 228b4: 10800217 ldw r2,8(r2) - 228b8: 10c00044 addi r3,r2,1 - 228bc: e0bfff17 ldw r2,-4(fp) - 228c0: 10800017 ldw r2,0(r2) - 228c4: 100b883a mov r5,r2 - 228c8: 1809883a mov r4,r3 - 228cc: 0022a840 call 22a84 <__umodsi3> - 228d0: 1007883a mov r3,r2 - 228d4: e0bfff17 ldw r2,-4(fp) - 228d8: 10c00215 stw r3,8(r2) + 2246c: e0bfff17 ldw r2,-4(fp) + 22470: 10800217 ldw r2,8(r2) + 22474: 10c00044 addi r3,r2,1 + 22478: e0bfff17 ldw r2,-4(fp) + 2247c: 10800017 ldw r2,0(r2) + 22480: 100b883a mov r5,r2 + 22484: 1809883a mov r4,r3 + 22488: 00226400 call 22640 <__umodsi3> + 2248c: 1007883a mov r3,r2 + 22490: e0bfff17 ldw r2,-4(fp) + 22494: 10c00215 stw r3,8(r2) return data32; - 228dc: e0bffe17 ldw r2,-8(fp) + 22498: e0bffe17 ldw r2,-8(fp) } - 228e0: e037883a mov sp,fp - 228e4: dfc00117 ldw ra,4(sp) - 228e8: df000017 ldw fp,0(sp) - 228ec: dec00204 addi sp,sp,8 - 228f0: f800283a ret + 2249c: e037883a mov sp,fp + 224a0: dfc00117 ldw ra,4(sp) + 224a4: df000017 ldw fp,0(sp) + 224a8: dec00204 addi sp,sp,8 + 224ac: f800283a ret -000228f4 : +000224b0 : void QUEUE_Empty(QUEUE_STRUCT *pQueue){ - 228f4: defffe04 addi sp,sp,-8 - 228f8: df000115 stw fp,4(sp) - 228fc: df000104 addi fp,sp,4 - 22900: e13fff15 stw r4,-4(fp) + 224b0: defffe04 addi sp,sp,-8 + 224b4: df000115 stw fp,4(sp) + 224b8: df000104 addi fp,sp,4 + 224bc: e13fff15 stw r4,-4(fp) pQueue->front = 0; - 22904: e0bfff17 ldw r2,-4(fp) - 22908: 10000115 stw zero,4(r2) + 224c0: e0bfff17 ldw r2,-4(fp) + 224c4: 10000115 stw zero,4(r2) pQueue->rear = 0; - 2290c: e0bfff17 ldw r2,-4(fp) - 22910: 10000215 stw zero,8(r2) + 224c8: e0bfff17 ldw r2,-4(fp) + 224cc: 10000215 stw zero,8(r2) } - 22914: 0001883a nop - 22918: e037883a mov sp,fp - 2291c: df000017 ldw fp,0(sp) - 22920: dec00104 addi sp,sp,4 - 22924: f800283a ret + 224d0: 0001883a nop + 224d4: e037883a mov sp,fp + 224d8: df000017 ldw fp,0(sp) + 224dc: dec00104 addi sp,sp,4 + 224e0: f800283a ret -00022928 <__divsi3>: - 22928: 20001b16 blt r4,zero,22998 <__divsi3+0x70> - 2292c: 000f883a mov r7,zero - 22930: 28001616 blt r5,zero,2298c <__divsi3+0x64> - 22934: 200d883a mov r6,r4 - 22938: 29001a2e bgeu r5,r4,229a4 <__divsi3+0x7c> - 2293c: 00800804 movi r2,32 - 22940: 00c00044 movi r3,1 - 22944: 00000106 br 2294c <__divsi3+0x24> - 22948: 10000d26 beq r2,zero,22980 <__divsi3+0x58> - 2294c: 294b883a add r5,r5,r5 - 22950: 10bfffc4 addi r2,r2,-1 - 22954: 18c7883a add r3,r3,r3 - 22958: 293ffb36 bltu r5,r4,22948 <__divsi3+0x20> - 2295c: 0005883a mov r2,zero - 22960: 18000726 beq r3,zero,22980 <__divsi3+0x58> - 22964: 0005883a mov r2,zero - 22968: 31400236 bltu r6,r5,22974 <__divsi3+0x4c> - 2296c: 314dc83a sub r6,r6,r5 - 22970: 10c4b03a or r2,r2,r3 - 22974: 1806d07a srli r3,r3,1 - 22978: 280ad07a srli r5,r5,1 - 2297c: 183ffa1e bne r3,zero,22968 <__divsi3+0x40> - 22980: 38000126 beq r7,zero,22988 <__divsi3+0x60> - 22984: 0085c83a sub r2,zero,r2 - 22988: f800283a ret - 2298c: 014bc83a sub r5,zero,r5 - 22990: 39c0005c xori r7,r7,1 - 22994: 003fe706 br 22934 <__divsi3+0xc> - 22998: 0109c83a sub r4,zero,r4 - 2299c: 01c00044 movi r7,1 - 229a0: 003fe306 br 22930 <__divsi3+0x8> - 229a4: 00c00044 movi r3,1 - 229a8: 003fee06 br 22964 <__divsi3+0x3c> +000224e4 <__divsi3>: + 224e4: 20001b16 blt r4,zero,22554 <__divsi3+0x70> + 224e8: 000f883a mov r7,zero + 224ec: 28001616 blt r5,zero,22548 <__divsi3+0x64> + 224f0: 200d883a mov r6,r4 + 224f4: 29001a2e bgeu r5,r4,22560 <__divsi3+0x7c> + 224f8: 00800804 movi r2,32 + 224fc: 00c00044 movi r3,1 + 22500: 00000106 br 22508 <__divsi3+0x24> + 22504: 10000d26 beq r2,zero,2253c <__divsi3+0x58> + 22508: 294b883a add r5,r5,r5 + 2250c: 10bfffc4 addi r2,r2,-1 + 22510: 18c7883a add r3,r3,r3 + 22514: 293ffb36 bltu r5,r4,22504 <_gp+0xfffe5fcc> + 22518: 0005883a mov r2,zero + 2251c: 18000726 beq r3,zero,2253c <__divsi3+0x58> + 22520: 0005883a mov r2,zero + 22524: 31400236 bltu r6,r5,22530 <__divsi3+0x4c> + 22528: 314dc83a sub r6,r6,r5 + 2252c: 10c4b03a or r2,r2,r3 + 22530: 1806d07a srli r3,r3,1 + 22534: 280ad07a srli r5,r5,1 + 22538: 183ffa1e bne r3,zero,22524 <_gp+0xfffe5fec> + 2253c: 38000126 beq r7,zero,22544 <__divsi3+0x60> + 22540: 0085c83a sub r2,zero,r2 + 22544: f800283a ret + 22548: 014bc83a sub r5,zero,r5 + 2254c: 39c0005c xori r7,r7,1 + 22550: 003fe706 br 224f0 <_gp+0xfffe5fb8> + 22554: 0109c83a sub r4,zero,r4 + 22558: 01c00044 movi r7,1 + 2255c: 003fe306 br 224ec <_gp+0xfffe5fb4> + 22560: 00c00044 movi r3,1 + 22564: 003fee06 br 22520 <_gp+0xfffe5fe8> -000229ac <__modsi3>: - 229ac: 20001716 blt r4,zero,22a0c <__modsi3+0x60> - 229b0: 000f883a mov r7,zero - 229b4: 2005883a mov r2,r4 - 229b8: 28001216 blt r5,zero,22a04 <__modsi3+0x58> - 229bc: 2900162e bgeu r5,r4,22a18 <__modsi3+0x6c> - 229c0: 01800804 movi r6,32 - 229c4: 00c00044 movi r3,1 - 229c8: 00000106 br 229d0 <__modsi3+0x24> - 229cc: 30000a26 beq r6,zero,229f8 <__modsi3+0x4c> - 229d0: 294b883a add r5,r5,r5 - 229d4: 31bfffc4 addi r6,r6,-1 - 229d8: 18c7883a add r3,r3,r3 - 229dc: 293ffb36 bltu r5,r4,229cc <__modsi3+0x20> - 229e0: 18000526 beq r3,zero,229f8 <__modsi3+0x4c> - 229e4: 1806d07a srli r3,r3,1 - 229e8: 11400136 bltu r2,r5,229f0 <__modsi3+0x44> - 229ec: 1145c83a sub r2,r2,r5 - 229f0: 280ad07a srli r5,r5,1 - 229f4: 183ffb1e bne r3,zero,229e4 <__modsi3+0x38> - 229f8: 38000126 beq r7,zero,22a00 <__modsi3+0x54> - 229fc: 0085c83a sub r2,zero,r2 - 22a00: f800283a ret - 22a04: 014bc83a sub r5,zero,r5 - 22a08: 003fec06 br 229bc <__modsi3+0x10> - 22a0c: 0109c83a sub r4,zero,r4 - 22a10: 01c00044 movi r7,1 - 22a14: 003fe706 br 229b4 <__modsi3+0x8> - 22a18: 00c00044 movi r3,1 - 22a1c: 003ff106 br 229e4 <__modsi3+0x38> +00022568 <__modsi3>: + 22568: 20001716 blt r4,zero,225c8 <__modsi3+0x60> + 2256c: 000f883a mov r7,zero + 22570: 2005883a mov r2,r4 + 22574: 28001216 blt r5,zero,225c0 <__modsi3+0x58> + 22578: 2900162e bgeu r5,r4,225d4 <__modsi3+0x6c> + 2257c: 01800804 movi r6,32 + 22580: 00c00044 movi r3,1 + 22584: 00000106 br 2258c <__modsi3+0x24> + 22588: 30000a26 beq r6,zero,225b4 <__modsi3+0x4c> + 2258c: 294b883a add r5,r5,r5 + 22590: 31bfffc4 addi r6,r6,-1 + 22594: 18c7883a add r3,r3,r3 + 22598: 293ffb36 bltu r5,r4,22588 <_gp+0xfffe6050> + 2259c: 18000526 beq r3,zero,225b4 <__modsi3+0x4c> + 225a0: 1806d07a srli r3,r3,1 + 225a4: 11400136 bltu r2,r5,225ac <__modsi3+0x44> + 225a8: 1145c83a sub r2,r2,r5 + 225ac: 280ad07a srli r5,r5,1 + 225b0: 183ffb1e bne r3,zero,225a0 <_gp+0xfffe6068> + 225b4: 38000126 beq r7,zero,225bc <__modsi3+0x54> + 225b8: 0085c83a sub r2,zero,r2 + 225bc: f800283a ret + 225c0: 014bc83a sub r5,zero,r5 + 225c4: 003fec06 br 22578 <_gp+0xfffe6040> + 225c8: 0109c83a sub r4,zero,r4 + 225cc: 01c00044 movi r7,1 + 225d0: 003fe706 br 22570 <_gp+0xfffe6038> + 225d4: 00c00044 movi r3,1 + 225d8: 003ff106 br 225a0 <_gp+0xfffe6068> -00022a20 <__udivsi3>: - 22a20: 200d883a mov r6,r4 - 22a24: 2900152e bgeu r5,r4,22a7c <__udivsi3+0x5c> - 22a28: 28001416 blt r5,zero,22a7c <__udivsi3+0x5c> - 22a2c: 00800804 movi r2,32 - 22a30: 00c00044 movi r3,1 - 22a34: 00000206 br 22a40 <__udivsi3+0x20> - 22a38: 10000e26 beq r2,zero,22a74 <__udivsi3+0x54> - 22a3c: 28000516 blt r5,zero,22a54 <__udivsi3+0x34> - 22a40: 294b883a add r5,r5,r5 - 22a44: 10bfffc4 addi r2,r2,-1 - 22a48: 18c7883a add r3,r3,r3 - 22a4c: 293ffa36 bltu r5,r4,22a38 <__udivsi3+0x18> - 22a50: 18000826 beq r3,zero,22a74 <__udivsi3+0x54> - 22a54: 0005883a mov r2,zero - 22a58: 31400236 bltu r6,r5,22a64 <__udivsi3+0x44> - 22a5c: 314dc83a sub r6,r6,r5 - 22a60: 10c4b03a or r2,r2,r3 - 22a64: 1806d07a srli r3,r3,1 - 22a68: 280ad07a srli r5,r5,1 - 22a6c: 183ffa1e bne r3,zero,22a58 <__udivsi3+0x38> - 22a70: f800283a ret - 22a74: 0005883a mov r2,zero - 22a78: f800283a ret - 22a7c: 00c00044 movi r3,1 - 22a80: 003ff406 br 22a54 <__udivsi3+0x34> +000225dc <__udivsi3>: + 225dc: 200d883a mov r6,r4 + 225e0: 2900152e bgeu r5,r4,22638 <__udivsi3+0x5c> + 225e4: 28001416 blt r5,zero,22638 <__udivsi3+0x5c> + 225e8: 00800804 movi r2,32 + 225ec: 00c00044 movi r3,1 + 225f0: 00000206 br 225fc <__udivsi3+0x20> + 225f4: 10000e26 beq r2,zero,22630 <__udivsi3+0x54> + 225f8: 28000516 blt r5,zero,22610 <__udivsi3+0x34> + 225fc: 294b883a add r5,r5,r5 + 22600: 10bfffc4 addi r2,r2,-1 + 22604: 18c7883a add r3,r3,r3 + 22608: 293ffa36 bltu r5,r4,225f4 <_gp+0xfffe60bc> + 2260c: 18000826 beq r3,zero,22630 <__udivsi3+0x54> + 22610: 0005883a mov r2,zero + 22614: 31400236 bltu r6,r5,22620 <__udivsi3+0x44> + 22618: 314dc83a sub r6,r6,r5 + 2261c: 10c4b03a or r2,r2,r3 + 22620: 1806d07a srli r3,r3,1 + 22624: 280ad07a srli r5,r5,1 + 22628: 183ffa1e bne r3,zero,22614 <_gp+0xfffe60dc> + 2262c: f800283a ret + 22630: 0005883a mov r2,zero + 22634: f800283a ret + 22638: 00c00044 movi r3,1 + 2263c: 003ff406 br 22610 <_gp+0xfffe60d8> -00022a84 <__umodsi3>: - 22a84: 2005883a mov r2,r4 - 22a88: 2900122e bgeu r5,r4,22ad4 <__umodsi3+0x50> - 22a8c: 28001116 blt r5,zero,22ad4 <__umodsi3+0x50> - 22a90: 01800804 movi r6,32 - 22a94: 00c00044 movi r3,1 - 22a98: 00000206 br 22aa4 <__umodsi3+0x20> - 22a9c: 30000c26 beq r6,zero,22ad0 <__umodsi3+0x4c> - 22aa0: 28000516 blt r5,zero,22ab8 <__umodsi3+0x34> - 22aa4: 294b883a add r5,r5,r5 - 22aa8: 31bfffc4 addi r6,r6,-1 - 22aac: 18c7883a add r3,r3,r3 - 22ab0: 293ffa36 bltu r5,r4,22a9c <__umodsi3+0x18> - 22ab4: 18000626 beq r3,zero,22ad0 <__umodsi3+0x4c> - 22ab8: 1806d07a srli r3,r3,1 - 22abc: 11400136 bltu r2,r5,22ac4 <__umodsi3+0x40> - 22ac0: 1145c83a sub r2,r2,r5 - 22ac4: 280ad07a srli r5,r5,1 - 22ac8: 183ffb1e bne r3,zero,22ab8 <__umodsi3+0x34> - 22acc: f800283a ret - 22ad0: f800283a ret - 22ad4: 00c00044 movi r3,1 - 22ad8: 003ff706 br 22ab8 <__umodsi3+0x34> +00022640 <__umodsi3>: + 22640: 2005883a mov r2,r4 + 22644: 2900122e bgeu r5,r4,22690 <__umodsi3+0x50> + 22648: 28001116 blt r5,zero,22690 <__umodsi3+0x50> + 2264c: 01800804 movi r6,32 + 22650: 00c00044 movi r3,1 + 22654: 00000206 br 22660 <__umodsi3+0x20> + 22658: 30000c26 beq r6,zero,2268c <__umodsi3+0x4c> + 2265c: 28000516 blt r5,zero,22674 <__umodsi3+0x34> + 22660: 294b883a add r5,r5,r5 + 22664: 31bfffc4 addi r6,r6,-1 + 22668: 18c7883a add r3,r3,r3 + 2266c: 293ffa36 bltu r5,r4,22658 <_gp+0xfffe6120> + 22670: 18000626 beq r3,zero,2268c <__umodsi3+0x4c> + 22674: 1806d07a srli r3,r3,1 + 22678: 11400136 bltu r2,r5,22680 <__umodsi3+0x40> + 2267c: 1145c83a sub r2,r2,r5 + 22680: 280ad07a srli r5,r5,1 + 22684: 183ffb1e bne r3,zero,22674 <_gp+0xfffe613c> + 22688: f800283a ret + 2268c: f800283a ret + 22690: 00c00044 movi r3,1 + 22694: 003ff706 br 22674 <_gp+0xfffe613c> -00022adc <_getc_r>: - 22adc: defffd04 addi sp,sp,-12 - 22ae0: dc000115 stw r16,4(sp) - 22ae4: dfc00215 stw ra,8(sp) - 22ae8: 2021883a mov r16,r4 - 22aec: 20000226 beq r4,zero,22af8 <_getc_r+0x1c> - 22af0: 20800e17 ldw r2,56(r4) - 22af4: 10000c26 beq r2,zero,22b28 <_getc_r+0x4c> - 22af8: 28800117 ldw r2,4(r5) - 22afc: 10bfffc4 addi r2,r2,-1 - 22b00: 28800115 stw r2,4(r5) - 22b04: 10000c16 blt r2,zero,22b38 <_getc_r+0x5c> - 22b08: 28800017 ldw r2,0(r5) - 22b0c: 10c00044 addi r3,r2,1 - 22b10: 28c00015 stw r3,0(r5) - 22b14: 10800003 ldbu r2,0(r2) - 22b18: dfc00217 ldw ra,8(sp) - 22b1c: dc000117 ldw r16,4(sp) - 22b20: dec00304 addi sp,sp,12 - 22b24: f800283a ret - 22b28: d9400015 stw r5,0(sp) - 22b2c: 0027aa80 call 27aa8 <__sinit> - 22b30: d9400017 ldw r5,0(sp) - 22b34: 003ff006 br 22af8 <_getc_r+0x1c> - 22b38: 8009883a mov r4,r16 - 22b3c: dfc00217 ldw ra,8(sp) - 22b40: dc000117 ldw r16,4(sp) - 22b44: dec00304 addi sp,sp,12 - 22b48: 00236901 jmpi 23690 <__srget_r> +00022698 : + 22698: 008000f4 movhi r2,3 + 2269c: 10915404 addi r2,r2,17744 + 226a0: 200b883a mov r5,r4 + 226a4: 11000017 ldw r4,0(r2) + 226a8: 00226c01 jmpi 226c0 <_malloc_r> -00022b4c : - 22b4c: 008000f4 movhi r2,3 - 22b50: defffd04 addi sp,sp,-12 - 22b54: 10939f04 addi r2,r2,20092 - 22b58: dc400115 stw r17,4(sp) - 22b5c: 14400017 ldw r17,0(r2) - 22b60: dc000015 stw r16,0(sp) - 22b64: dfc00215 stw ra,8(sp) - 22b68: 2021883a mov r16,r4 - 22b6c: 88000226 beq r17,zero,22b78 - 22b70: 88800e17 ldw r2,56(r17) - 22b74: 10000d26 beq r2,zero,22bac - 22b78: 80800117 ldw r2,4(r16) - 22b7c: 10bfffc4 addi r2,r2,-1 - 22b80: 80800115 stw r2,4(r16) - 22b84: 10000c16 blt r2,zero,22bb8 - 22b88: 80800017 ldw r2,0(r16) - 22b8c: 10c00044 addi r3,r2,1 - 22b90: 80c00015 stw r3,0(r16) - 22b94: 10800003 ldbu r2,0(r2) - 22b98: dfc00217 ldw ra,8(sp) - 22b9c: dc400117 ldw r17,4(sp) - 22ba0: dc000017 ldw r16,0(sp) - 22ba4: dec00304 addi sp,sp,12 - 22ba8: f800283a ret - 22bac: 8809883a mov r4,r17 - 22bb0: 0027aa80 call 27aa8 <__sinit> - 22bb4: 003ff006 br 22b78 - 22bb8: 800b883a mov r5,r16 - 22bbc: 8809883a mov r4,r17 - 22bc0: dfc00217 ldw ra,8(sp) - 22bc4: dc400117 ldw r17,4(sp) - 22bc8: dc000017 ldw r16,0(sp) - 22bcc: dec00304 addi sp,sp,12 - 22bd0: 00236901 jmpi 23690 <__srget_r> +000226ac : + 226ac: 008000f4 movhi r2,3 + 226b0: 10915404 addi r2,r2,17744 + 226b4: 200b883a mov r5,r4 + 226b8: 11000017 ldw r4,0(r2) + 226bc: 00276581 jmpi 27658 <_free_r> -00022bd4 : - 22bd4: 008000f4 movhi r2,3 - 22bd8: 10939f04 addi r2,r2,20092 - 22bdc: 200b883a mov r5,r4 - 22be0: 11000017 ldw r4,0(r2) - 22be4: 0022bfc1 jmpi 22bfc <_malloc_r> +000226c0 <_malloc_r>: + 226c0: defff504 addi sp,sp,-44 + 226c4: dc800315 stw r18,12(sp) + 226c8: dfc00a15 stw ra,40(sp) + 226cc: df000915 stw fp,36(sp) + 226d0: ddc00815 stw r23,32(sp) + 226d4: dd800715 stw r22,28(sp) + 226d8: dd400615 stw r21,24(sp) + 226dc: dd000515 stw r20,20(sp) + 226e0: dcc00415 stw r19,16(sp) + 226e4: dc400215 stw r17,8(sp) + 226e8: dc000115 stw r16,4(sp) + 226ec: 288002c4 addi r2,r5,11 + 226f0: 00c00584 movi r3,22 + 226f4: 2025883a mov r18,r4 + 226f8: 18807f2e bgeu r3,r2,228f8 <_malloc_r+0x238> + 226fc: 047ffe04 movi r17,-8 + 22700: 1462703a and r17,r2,r17 + 22704: 8800a316 blt r17,zero,22994 <_malloc_r+0x2d4> + 22708: 8940a236 bltu r17,r5,22994 <_malloc_r+0x2d4> + 2270c: 002f5800 call 2f580 <__malloc_lock> + 22710: 00807dc4 movi r2,503 + 22714: 1441e92e bgeu r2,r17,22ebc <_malloc_r+0x7fc> + 22718: 8804d27a srli r2,r17,9 + 2271c: 1000a126 beq r2,zero,229a4 <_malloc_r+0x2e4> + 22720: 00c00104 movi r3,4 + 22724: 18811e36 bltu r3,r2,22ba0 <_malloc_r+0x4e0> + 22728: 8804d1ba srli r2,r17,6 + 2272c: 12000e44 addi r8,r2,57 + 22730: 11c00e04 addi r7,r2,56 + 22734: 4209883a add r4,r8,r8 + 22738: 04c000f4 movhi r19,3 + 2273c: 2109883a add r4,r4,r4 + 22740: 9ccaa304 addi r19,r19,10892 + 22744: 2109883a add r4,r4,r4 + 22748: 9909883a add r4,r19,r4 + 2274c: 24000117 ldw r16,4(r4) + 22750: 213ffe04 addi r4,r4,-8 + 22754: 24009726 beq r4,r16,229b4 <_malloc_r+0x2f4> + 22758: 80800117 ldw r2,4(r16) + 2275c: 01bfff04 movi r6,-4 + 22760: 014003c4 movi r5,15 + 22764: 1184703a and r2,r2,r6 + 22768: 1447c83a sub r3,r2,r17 + 2276c: 28c00716 blt r5,r3,2278c <_malloc_r+0xcc> + 22770: 1800920e bge r3,zero,229bc <_malloc_r+0x2fc> + 22774: 84000317 ldw r16,12(r16) + 22778: 24008e26 beq r4,r16,229b4 <_malloc_r+0x2f4> + 2277c: 80800117 ldw r2,4(r16) + 22780: 1184703a and r2,r2,r6 + 22784: 1447c83a sub r3,r2,r17 + 22788: 28fff90e bge r5,r3,22770 <_gp+0xfffe6238> + 2278c: 3809883a mov r4,r7 + 22790: 018000f4 movhi r6,3 + 22794: 9c000417 ldw r16,16(r19) + 22798: 318aa304 addi r6,r6,10892 + 2279c: 32000204 addi r8,r6,8 + 227a0: 82013426 beq r16,r8,22c74 <_malloc_r+0x5b4> + 227a4: 80c00117 ldw r3,4(r16) + 227a8: 00bfff04 movi r2,-4 + 227ac: 188e703a and r7,r3,r2 + 227b0: 3c45c83a sub r2,r7,r17 + 227b4: 00c003c4 movi r3,15 + 227b8: 18811f16 blt r3,r2,22c38 <_malloc_r+0x578> + 227bc: 32000515 stw r8,20(r6) + 227c0: 32000415 stw r8,16(r6) + 227c4: 10007f0e bge r2,zero,229c4 <_malloc_r+0x304> + 227c8: 00807fc4 movi r2,511 + 227cc: 11c0fd36 bltu r2,r7,22bc4 <_malloc_r+0x504> + 227d0: 3806d0fa srli r3,r7,3 + 227d4: 01c00044 movi r7,1 + 227d8: 30800117 ldw r2,4(r6) + 227dc: 19400044 addi r5,r3,1 + 227e0: 294b883a add r5,r5,r5 + 227e4: 1807d0ba srai r3,r3,2 + 227e8: 294b883a add r5,r5,r5 + 227ec: 294b883a add r5,r5,r5 + 227f0: 298b883a add r5,r5,r6 + 227f4: 38c6983a sll r3,r7,r3 + 227f8: 29c00017 ldw r7,0(r5) + 227fc: 2a7ffe04 addi r9,r5,-8 + 22800: 1886b03a or r3,r3,r2 + 22804: 82400315 stw r9,12(r16) + 22808: 81c00215 stw r7,8(r16) + 2280c: 30c00115 stw r3,4(r6) + 22810: 2c000015 stw r16,0(r5) + 22814: 3c000315 stw r16,12(r7) + 22818: 2005d0ba srai r2,r4,2 + 2281c: 01400044 movi r5,1 + 22820: 288a983a sll r5,r5,r2 + 22824: 19406f36 bltu r3,r5,229e4 <_malloc_r+0x324> + 22828: 28c4703a and r2,r5,r3 + 2282c: 10000a1e bne r2,zero,22858 <_malloc_r+0x198> + 22830: 00bfff04 movi r2,-4 + 22834: 294b883a add r5,r5,r5 + 22838: 2088703a and r4,r4,r2 + 2283c: 28c4703a and r2,r5,r3 + 22840: 21000104 addi r4,r4,4 + 22844: 1000041e bne r2,zero,22858 <_malloc_r+0x198> + 22848: 294b883a add r5,r5,r5 + 2284c: 28c4703a and r2,r5,r3 + 22850: 21000104 addi r4,r4,4 + 22854: 103ffc26 beq r2,zero,22848 <_gp+0xfffe6310> + 22858: 02bfff04 movi r10,-4 + 2285c: 024003c4 movi r9,15 + 22860: 21800044 addi r6,r4,1 + 22864: 318d883a add r6,r6,r6 + 22868: 318d883a add r6,r6,r6 + 2286c: 318d883a add r6,r6,r6 + 22870: 998d883a add r6,r19,r6 + 22874: 333ffe04 addi r12,r6,-8 + 22878: 2017883a mov r11,r4 + 2287c: 31800104 addi r6,r6,4 + 22880: 34000017 ldw r16,0(r6) + 22884: 31fffd04 addi r7,r6,-12 + 22888: 81c0041e bne r16,r7,2289c <_malloc_r+0x1dc> + 2288c: 0000fb06 br 22c7c <_malloc_r+0x5bc> + 22890: 1801030e bge r3,zero,22ca0 <_malloc_r+0x5e0> + 22894: 84000317 ldw r16,12(r16) + 22898: 81c0f826 beq r16,r7,22c7c <_malloc_r+0x5bc> + 2289c: 80800117 ldw r2,4(r16) + 228a0: 1284703a and r2,r2,r10 + 228a4: 1447c83a sub r3,r2,r17 + 228a8: 48fff90e bge r9,r3,22890 <_gp+0xfffe6358> + 228ac: 80800317 ldw r2,12(r16) + 228b0: 81000217 ldw r4,8(r16) + 228b4: 89400054 ori r5,r17,1 + 228b8: 81400115 stw r5,4(r16) + 228bc: 20800315 stw r2,12(r4) + 228c0: 11000215 stw r4,8(r2) + 228c4: 8463883a add r17,r16,r17 + 228c8: 9c400515 stw r17,20(r19) + 228cc: 9c400415 stw r17,16(r19) + 228d0: 18800054 ori r2,r3,1 + 228d4: 88800115 stw r2,4(r17) + 228d8: 8a000315 stw r8,12(r17) + 228dc: 8a000215 stw r8,8(r17) + 228e0: 88e3883a add r17,r17,r3 + 228e4: 88c00015 stw r3,0(r17) + 228e8: 9009883a mov r4,r18 + 228ec: 002f5a40 call 2f5a4 <__malloc_unlock> + 228f0: 80800204 addi r2,r16,8 + 228f4: 00001b06 br 22964 <_malloc_r+0x2a4> + 228f8: 04400404 movi r17,16 + 228fc: 89402536 bltu r17,r5,22994 <_malloc_r+0x2d4> + 22900: 002f5800 call 2f580 <__malloc_lock> + 22904: 00800184 movi r2,6 + 22908: 01000084 movi r4,2 + 2290c: 04c000f4 movhi r19,3 + 22910: 1085883a add r2,r2,r2 + 22914: 9ccaa304 addi r19,r19,10892 + 22918: 1085883a add r2,r2,r2 + 2291c: 9885883a add r2,r19,r2 + 22920: 14000117 ldw r16,4(r2) + 22924: 10fffe04 addi r3,r2,-8 + 22928: 80c0d926 beq r16,r3,22c90 <_malloc_r+0x5d0> + 2292c: 80c00117 ldw r3,4(r16) + 22930: 81000317 ldw r4,12(r16) + 22934: 00bfff04 movi r2,-4 + 22938: 1884703a and r2,r3,r2 + 2293c: 81400217 ldw r5,8(r16) + 22940: 8085883a add r2,r16,r2 + 22944: 10c00117 ldw r3,4(r2) + 22948: 29000315 stw r4,12(r5) + 2294c: 21400215 stw r5,8(r4) + 22950: 18c00054 ori r3,r3,1 + 22954: 10c00115 stw r3,4(r2) + 22958: 9009883a mov r4,r18 + 2295c: 002f5a40 call 2f5a4 <__malloc_unlock> + 22960: 80800204 addi r2,r16,8 + 22964: dfc00a17 ldw ra,40(sp) + 22968: df000917 ldw fp,36(sp) + 2296c: ddc00817 ldw r23,32(sp) + 22970: dd800717 ldw r22,28(sp) + 22974: dd400617 ldw r21,24(sp) + 22978: dd000517 ldw r20,20(sp) + 2297c: dcc00417 ldw r19,16(sp) + 22980: dc800317 ldw r18,12(sp) + 22984: dc400217 ldw r17,8(sp) + 22988: dc000117 ldw r16,4(sp) + 2298c: dec00b04 addi sp,sp,44 + 22990: f800283a ret + 22994: 00800304 movi r2,12 + 22998: 90800015 stw r2,0(r18) + 2299c: 0005883a mov r2,zero + 229a0: 003ff006 br 22964 <_gp+0xfffe642c> + 229a4: 01002004 movi r4,128 + 229a8: 02001004 movi r8,64 + 229ac: 01c00fc4 movi r7,63 + 229b0: 003f6106 br 22738 <_gp+0xfffe6200> + 229b4: 4009883a mov r4,r8 + 229b8: 003f7506 br 22790 <_gp+0xfffe6258> + 229bc: 81000317 ldw r4,12(r16) + 229c0: 003fde06 br 2293c <_gp+0xfffe6404> + 229c4: 81c5883a add r2,r16,r7 + 229c8: 11400117 ldw r5,4(r2) + 229cc: 9009883a mov r4,r18 + 229d0: 29400054 ori r5,r5,1 + 229d4: 11400115 stw r5,4(r2) + 229d8: 002f5a40 call 2f5a4 <__malloc_unlock> + 229dc: 80800204 addi r2,r16,8 + 229e0: 003fe006 br 22964 <_gp+0xfffe642c> + 229e4: 9c000217 ldw r16,8(r19) + 229e8: 00bfff04 movi r2,-4 + 229ec: 85800117 ldw r22,4(r16) + 229f0: b0ac703a and r22,r22,r2 + 229f4: b4400336 bltu r22,r17,22a04 <_malloc_r+0x344> + 229f8: b445c83a sub r2,r22,r17 + 229fc: 00c003c4 movi r3,15 + 22a00: 18805d16 blt r3,r2,22b78 <_malloc_r+0x4b8> + 22a04: 05c000f4 movhi r23,3 + 22a08: 008000f4 movhi r2,3 + 22a0c: 109a0b04 addi r2,r2,26668 + 22a10: bdd15104 addi r23,r23,17732 + 22a14: 15400017 ldw r21,0(r2) + 22a18: b8c00017 ldw r3,0(r23) + 22a1c: 00bfffc4 movi r2,-1 + 22a20: 858d883a add r6,r16,r22 + 22a24: 8d6b883a add r21,r17,r21 + 22a28: 1880ea26 beq r3,r2,22dd4 <_malloc_r+0x714> + 22a2c: ad4403c4 addi r21,r21,4111 + 22a30: 00bc0004 movi r2,-4096 + 22a34: a8aa703a and r21,r21,r2 + 22a38: a80b883a mov r5,r21 + 22a3c: 9009883a mov r4,r18 + 22a40: d9800015 stw r6,0(sp) + 22a44: 00231540 call 23154 <_sbrk_r> + 22a48: 1029883a mov r20,r2 + 22a4c: 00bfffc4 movi r2,-1 + 22a50: d9800017 ldw r6,0(sp) + 22a54: a080e826 beq r20,r2,22df8 <_malloc_r+0x738> + 22a58: a180a636 bltu r20,r6,22cf4 <_malloc_r+0x634> + 22a5c: 070000f4 movhi fp,3 + 22a60: e71a1704 addi fp,fp,26716 + 22a64: e0800017 ldw r2,0(fp) + 22a68: a887883a add r3,r21,r2 + 22a6c: e0c00015 stw r3,0(fp) + 22a70: 3500e626 beq r6,r20,22e0c <_malloc_r+0x74c> + 22a74: b9000017 ldw r4,0(r23) + 22a78: 00bfffc4 movi r2,-1 + 22a7c: 2080ee26 beq r4,r2,22e38 <_malloc_r+0x778> + 22a80: a185c83a sub r2,r20,r6 + 22a84: 10c5883a add r2,r2,r3 + 22a88: e0800015 stw r2,0(fp) + 22a8c: a0c001cc andi r3,r20,7 + 22a90: 1800bc26 beq r3,zero,22d84 <_malloc_r+0x6c4> + 22a94: a0e9c83a sub r20,r20,r3 + 22a98: 00840204 movi r2,4104 + 22a9c: a5000204 addi r20,r20,8 + 22aa0: 10c7c83a sub r3,r2,r3 + 22aa4: a545883a add r2,r20,r21 + 22aa8: 1083ffcc andi r2,r2,4095 + 22aac: 18abc83a sub r21,r3,r2 + 22ab0: a80b883a mov r5,r21 + 22ab4: 9009883a mov r4,r18 + 22ab8: 00231540 call 23154 <_sbrk_r> + 22abc: 00ffffc4 movi r3,-1 + 22ac0: 10c0e126 beq r2,r3,22e48 <_malloc_r+0x788> + 22ac4: 1505c83a sub r2,r2,r20 + 22ac8: 1545883a add r2,r2,r21 + 22acc: 10800054 ori r2,r2,1 + 22ad0: e0c00017 ldw r3,0(fp) + 22ad4: 9d000215 stw r20,8(r19) + 22ad8: a0800115 stw r2,4(r20) + 22adc: a8c7883a add r3,r21,r3 + 22ae0: e0c00015 stw r3,0(fp) + 22ae4: 84c00e26 beq r16,r19,22b20 <_malloc_r+0x460> + 22ae8: 018003c4 movi r6,15 + 22aec: 3580a72e bgeu r6,r22,22d8c <_malloc_r+0x6cc> + 22af0: 81400117 ldw r5,4(r16) + 22af4: 013ffe04 movi r4,-8 + 22af8: b0bffd04 addi r2,r22,-12 + 22afc: 1104703a and r2,r2,r4 + 22b00: 2900004c andi r4,r5,1 + 22b04: 2088b03a or r4,r4,r2 + 22b08: 81000115 stw r4,4(r16) + 22b0c: 01400144 movi r5,5 + 22b10: 8089883a add r4,r16,r2 + 22b14: 21400115 stw r5,4(r4) + 22b18: 21400215 stw r5,8(r4) + 22b1c: 3080cd36 bltu r6,r2,22e54 <_malloc_r+0x794> + 22b20: 008000f4 movhi r2,3 + 22b24: 109a0a04 addi r2,r2,26664 + 22b28: 11000017 ldw r4,0(r2) + 22b2c: 20c0012e bgeu r4,r3,22b34 <_malloc_r+0x474> + 22b30: 10c00015 stw r3,0(r2) + 22b34: 008000f4 movhi r2,3 + 22b38: 109a0904 addi r2,r2,26660 + 22b3c: 11000017 ldw r4,0(r2) + 22b40: 9c000217 ldw r16,8(r19) + 22b44: 20c0012e bgeu r4,r3,22b4c <_malloc_r+0x48c> + 22b48: 10c00015 stw r3,0(r2) + 22b4c: 80c00117 ldw r3,4(r16) + 22b50: 00bfff04 movi r2,-4 + 22b54: 1886703a and r3,r3,r2 + 22b58: 1c45c83a sub r2,r3,r17 + 22b5c: 1c400236 bltu r3,r17,22b68 <_malloc_r+0x4a8> + 22b60: 00c003c4 movi r3,15 + 22b64: 18800416 blt r3,r2,22b78 <_malloc_r+0x4b8> + 22b68: 9009883a mov r4,r18 + 22b6c: 002f5a40 call 2f5a4 <__malloc_unlock> + 22b70: 0005883a mov r2,zero + 22b74: 003f7b06 br 22964 <_gp+0xfffe642c> + 22b78: 88c00054 ori r3,r17,1 + 22b7c: 80c00115 stw r3,4(r16) + 22b80: 8463883a add r17,r16,r17 + 22b84: 10800054 ori r2,r2,1 + 22b88: 9c400215 stw r17,8(r19) + 22b8c: 88800115 stw r2,4(r17) + 22b90: 9009883a mov r4,r18 + 22b94: 002f5a40 call 2f5a4 <__malloc_unlock> + 22b98: 80800204 addi r2,r16,8 + 22b9c: 003f7106 br 22964 <_gp+0xfffe642c> + 22ba0: 00c00504 movi r3,20 + 22ba4: 18804a2e bgeu r3,r2,22cd0 <_malloc_r+0x610> + 22ba8: 00c01504 movi r3,84 + 22bac: 18806e36 bltu r3,r2,22d68 <_malloc_r+0x6a8> + 22bb0: 8804d33a srli r2,r17,12 + 22bb4: 12001bc4 addi r8,r2,111 + 22bb8: 11c01b84 addi r7,r2,110 + 22bbc: 4209883a add r4,r8,r8 + 22bc0: 003edd06 br 22738 <_gp+0xfffe6200> + 22bc4: 3804d27a srli r2,r7,9 + 22bc8: 00c00104 movi r3,4 + 22bcc: 1880442e bgeu r3,r2,22ce0 <_malloc_r+0x620> + 22bd0: 00c00504 movi r3,20 + 22bd4: 18808136 bltu r3,r2,22ddc <_malloc_r+0x71c> + 22bd8: 11401704 addi r5,r2,92 + 22bdc: 10c016c4 addi r3,r2,91 + 22be0: 294b883a add r5,r5,r5 + 22be4: 294b883a add r5,r5,r5 + 22be8: 294b883a add r5,r5,r5 + 22bec: 994b883a add r5,r19,r5 + 22bf0: 28800017 ldw r2,0(r5) + 22bf4: 018000f4 movhi r6,3 + 22bf8: 297ffe04 addi r5,r5,-8 + 22bfc: 318aa304 addi r6,r6,10892 + 22c00: 28806526 beq r5,r2,22d98 <_malloc_r+0x6d8> + 22c04: 01bfff04 movi r6,-4 + 22c08: 10c00117 ldw r3,4(r2) + 22c0c: 1986703a and r3,r3,r6 + 22c10: 38c0022e bgeu r7,r3,22c1c <_malloc_r+0x55c> + 22c14: 10800217 ldw r2,8(r2) + 22c18: 28bffb1e bne r5,r2,22c08 <_gp+0xfffe66d0> + 22c1c: 11400317 ldw r5,12(r2) + 22c20: 98c00117 ldw r3,4(r19) + 22c24: 81400315 stw r5,12(r16) + 22c28: 80800215 stw r2,8(r16) + 22c2c: 2c000215 stw r16,8(r5) + 22c30: 14000315 stw r16,12(r2) + 22c34: 003ef806 br 22818 <_gp+0xfffe62e0> + 22c38: 88c00054 ori r3,r17,1 + 22c3c: 80c00115 stw r3,4(r16) + 22c40: 8463883a add r17,r16,r17 + 22c44: 34400515 stw r17,20(r6) + 22c48: 34400415 stw r17,16(r6) + 22c4c: 10c00054 ori r3,r2,1 + 22c50: 8a000315 stw r8,12(r17) + 22c54: 8a000215 stw r8,8(r17) + 22c58: 88c00115 stw r3,4(r17) + 22c5c: 88a3883a add r17,r17,r2 + 22c60: 88800015 stw r2,0(r17) + 22c64: 9009883a mov r4,r18 + 22c68: 002f5a40 call 2f5a4 <__malloc_unlock> + 22c6c: 80800204 addi r2,r16,8 + 22c70: 003f3c06 br 22964 <_gp+0xfffe642c> + 22c74: 30c00117 ldw r3,4(r6) + 22c78: 003ee706 br 22818 <_gp+0xfffe62e0> + 22c7c: 5ac00044 addi r11,r11,1 + 22c80: 588000cc andi r2,r11,3 + 22c84: 31800204 addi r6,r6,8 + 22c88: 103efd1e bne r2,zero,22880 <_gp+0xfffe6348> + 22c8c: 00002406 br 22d20 <_malloc_r+0x660> + 22c90: 14000317 ldw r16,12(r2) + 22c94: 143f251e bne r2,r16,2292c <_gp+0xfffe63f4> + 22c98: 21000084 addi r4,r4,2 + 22c9c: 003ebc06 br 22790 <_gp+0xfffe6258> + 22ca0: 8085883a add r2,r16,r2 + 22ca4: 10c00117 ldw r3,4(r2) + 22ca8: 81000317 ldw r4,12(r16) + 22cac: 81400217 ldw r5,8(r16) + 22cb0: 18c00054 ori r3,r3,1 + 22cb4: 10c00115 stw r3,4(r2) + 22cb8: 29000315 stw r4,12(r5) + 22cbc: 21400215 stw r5,8(r4) + 22cc0: 9009883a mov r4,r18 + 22cc4: 002f5a40 call 2f5a4 <__malloc_unlock> + 22cc8: 80800204 addi r2,r16,8 + 22ccc: 003f2506 br 22964 <_gp+0xfffe642c> + 22cd0: 12001704 addi r8,r2,92 + 22cd4: 11c016c4 addi r7,r2,91 + 22cd8: 4209883a add r4,r8,r8 + 22cdc: 003e9606 br 22738 <_gp+0xfffe6200> + 22ce0: 3804d1ba srli r2,r7,6 + 22ce4: 11400e44 addi r5,r2,57 + 22ce8: 10c00e04 addi r3,r2,56 + 22cec: 294b883a add r5,r5,r5 + 22cf0: 003fbc06 br 22be4 <_gp+0xfffe66ac> + 22cf4: 84ff5926 beq r16,r19,22a5c <_gp+0xfffe6524> + 22cf8: 008000f4 movhi r2,3 + 22cfc: 108aa304 addi r2,r2,10892 + 22d00: 14000217 ldw r16,8(r2) + 22d04: 00bfff04 movi r2,-4 + 22d08: 80c00117 ldw r3,4(r16) + 22d0c: 1886703a and r3,r3,r2 + 22d10: 003f9106 br 22b58 <_gp+0xfffe6620> + 22d14: 60800217 ldw r2,8(r12) + 22d18: 213fffc4 addi r4,r4,-1 + 22d1c: 1300651e bne r2,r12,22eb4 <_malloc_r+0x7f4> + 22d20: 208000cc andi r2,r4,3 + 22d24: 633ffe04 addi r12,r12,-8 + 22d28: 103ffa1e bne r2,zero,22d14 <_gp+0xfffe67dc> + 22d2c: 98800117 ldw r2,4(r19) + 22d30: 0146303a nor r3,zero,r5 + 22d34: 1884703a and r2,r3,r2 + 22d38: 98800115 stw r2,4(r19) + 22d3c: 294b883a add r5,r5,r5 + 22d40: 117f2836 bltu r2,r5,229e4 <_gp+0xfffe64ac> + 22d44: 283f2726 beq r5,zero,229e4 <_gp+0xfffe64ac> + 22d48: 2886703a and r3,r5,r2 + 22d4c: 5809883a mov r4,r11 + 22d50: 183ec31e bne r3,zero,22860 <_gp+0xfffe6328> + 22d54: 294b883a add r5,r5,r5 + 22d58: 2886703a and r3,r5,r2 + 22d5c: 21000104 addi r4,r4,4 + 22d60: 183ffc26 beq r3,zero,22d54 <_gp+0xfffe681c> + 22d64: 003ebe06 br 22860 <_gp+0xfffe6328> + 22d68: 00c05504 movi r3,340 + 22d6c: 18801236 bltu r3,r2,22db8 <_malloc_r+0x6f8> + 22d70: 8804d3fa srli r2,r17,15 + 22d74: 12001e04 addi r8,r2,120 + 22d78: 11c01dc4 addi r7,r2,119 + 22d7c: 4209883a add r4,r8,r8 + 22d80: 003e6d06 br 22738 <_gp+0xfffe6200> + 22d84: 00c40004 movi r3,4096 + 22d88: 003f4606 br 22aa4 <_gp+0xfffe656c> + 22d8c: 00800044 movi r2,1 + 22d90: a0800115 stw r2,4(r20) + 22d94: 003f7406 br 22b68 <_gp+0xfffe6630> + 22d98: 1805d0ba srai r2,r3,2 + 22d9c: 01c00044 movi r7,1 + 22da0: 30c00117 ldw r3,4(r6) + 22da4: 388e983a sll r7,r7,r2 + 22da8: 2805883a mov r2,r5 + 22dac: 38c6b03a or r3,r7,r3 + 22db0: 30c00115 stw r3,4(r6) + 22db4: 003f9b06 br 22c24 <_gp+0xfffe66ec> + 22db8: 00c15504 movi r3,1364 + 22dbc: 18801a36 bltu r3,r2,22e28 <_malloc_r+0x768> + 22dc0: 8804d4ba srli r2,r17,18 + 22dc4: 12001f44 addi r8,r2,125 + 22dc8: 11c01f04 addi r7,r2,124 + 22dcc: 4209883a add r4,r8,r8 + 22dd0: 003e5906 br 22738 <_gp+0xfffe6200> + 22dd4: ad400404 addi r21,r21,16 + 22dd8: 003f1706 br 22a38 <_gp+0xfffe6500> + 22ddc: 00c01504 movi r3,84 + 22de0: 18802336 bltu r3,r2,22e70 <_malloc_r+0x7b0> + 22de4: 3804d33a srli r2,r7,12 + 22de8: 11401bc4 addi r5,r2,111 + 22dec: 10c01b84 addi r3,r2,110 + 22df0: 294b883a add r5,r5,r5 + 22df4: 003f7b06 br 22be4 <_gp+0xfffe66ac> + 22df8: 9c000217 ldw r16,8(r19) + 22dfc: 00bfff04 movi r2,-4 + 22e00: 80c00117 ldw r3,4(r16) + 22e04: 1886703a and r3,r3,r2 + 22e08: 003f5306 br 22b58 <_gp+0xfffe6620> + 22e0c: 3083ffcc andi r2,r6,4095 + 22e10: 103f181e bne r2,zero,22a74 <_gp+0xfffe653c> + 22e14: 99000217 ldw r4,8(r19) + 22e18: b545883a add r2,r22,r21 + 22e1c: 10800054 ori r2,r2,1 + 22e20: 20800115 stw r2,4(r4) + 22e24: 003f3e06 br 22b20 <_gp+0xfffe65e8> + 22e28: 01003f84 movi r4,254 + 22e2c: 02001fc4 movi r8,127 + 22e30: 01c01f84 movi r7,126 + 22e34: 003e4006 br 22738 <_gp+0xfffe6200> + 22e38: 008000f4 movhi r2,3 + 22e3c: 10915104 addi r2,r2,17732 + 22e40: 15000015 stw r20,0(r2) + 22e44: 003f1106 br 22a8c <_gp+0xfffe6554> + 22e48: 00800044 movi r2,1 + 22e4c: 002b883a mov r21,zero + 22e50: 003f1f06 br 22ad0 <_gp+0xfffe6598> + 22e54: 81400204 addi r5,r16,8 + 22e58: 9009883a mov r4,r18 + 22e5c: 00276580 call 27658 <_free_r> + 22e60: 008000f4 movhi r2,3 + 22e64: 109a1704 addi r2,r2,26716 + 22e68: 10c00017 ldw r3,0(r2) + 22e6c: 003f2c06 br 22b20 <_gp+0xfffe65e8> + 22e70: 00c05504 movi r3,340 + 22e74: 18800536 bltu r3,r2,22e8c <_malloc_r+0x7cc> + 22e78: 3804d3fa srli r2,r7,15 + 22e7c: 11401e04 addi r5,r2,120 + 22e80: 10c01dc4 addi r3,r2,119 + 22e84: 294b883a add r5,r5,r5 + 22e88: 003f5606 br 22be4 <_gp+0xfffe66ac> + 22e8c: 00c15504 movi r3,1364 + 22e90: 18800536 bltu r3,r2,22ea8 <_malloc_r+0x7e8> + 22e94: 3804d4ba srli r2,r7,18 + 22e98: 11401f44 addi r5,r2,125 + 22e9c: 10c01f04 addi r3,r2,124 + 22ea0: 294b883a add r5,r5,r5 + 22ea4: 003f4f06 br 22be4 <_gp+0xfffe66ac> + 22ea8: 01403f84 movi r5,254 + 22eac: 00c01f84 movi r3,126 + 22eb0: 003f4c06 br 22be4 <_gp+0xfffe66ac> + 22eb4: 98800117 ldw r2,4(r19) + 22eb8: 003fa006 br 22d3c <_gp+0xfffe6804> + 22ebc: 8808d0fa srli r4,r17,3 + 22ec0: 20800044 addi r2,r4,1 + 22ec4: 1085883a add r2,r2,r2 + 22ec8: 003e9006 br 2290c <_gp+0xfffe63d4> -00022be8 : - 22be8: 008000f4 movhi r2,3 - 22bec: 10939f04 addi r2,r2,20092 - 22bf0: 200b883a mov r5,r4 - 22bf4: 11000017 ldw r4,0(r2) - 22bf8: 0027c1c1 jmpi 27c1c <_free_r> +00022ecc : + 22ecc: 20c000cc andi r3,r4,3 + 22ed0: 2005883a mov r2,r4 + 22ed4: 18004426 beq r3,zero,22fe8 + 22ed8: 31ffffc4 addi r7,r6,-1 + 22edc: 30004026 beq r6,zero,22fe0 + 22ee0: 2813883a mov r9,r5 + 22ee4: 200d883a mov r6,r4 + 22ee8: 2007883a mov r3,r4 + 22eec: 00000406 br 22f00 + 22ef0: 3a3fffc4 addi r8,r7,-1 + 22ef4: 31800044 addi r6,r6,1 + 22ef8: 38003926 beq r7,zero,22fe0 + 22efc: 400f883a mov r7,r8 + 22f00: 18c00044 addi r3,r3,1 + 22f04: 32400005 stb r9,0(r6) + 22f08: 1a0000cc andi r8,r3,3 + 22f0c: 403ff81e bne r8,zero,22ef0 <_gp+0xfffe69b8> + 22f10: 010000c4 movi r4,3 + 22f14: 21c02d2e bgeu r4,r7,22fcc + 22f18: 29003fcc andi r4,r5,255 + 22f1c: 200c923a slli r6,r4,8 + 22f20: 3108b03a or r4,r6,r4 + 22f24: 200c943a slli r6,r4,16 + 22f28: 218cb03a or r6,r4,r6 + 22f2c: 010003c4 movi r4,15 + 22f30: 21c0182e bgeu r4,r7,22f94 + 22f34: 3b3ffc04 addi r12,r7,-16 + 22f38: 6018d13a srli r12,r12,4 + 22f3c: 1a000104 addi r8,r3,4 + 22f40: 1ac00204 addi r11,r3,8 + 22f44: 6008913a slli r4,r12,4 + 22f48: 1a800304 addi r10,r3,12 + 22f4c: 1813883a mov r9,r3 + 22f50: 21000504 addi r4,r4,20 + 22f54: 1909883a add r4,r3,r4 + 22f58: 49800015 stw r6,0(r9) + 22f5c: 41800015 stw r6,0(r8) + 22f60: 59800015 stw r6,0(r11) + 22f64: 51800015 stw r6,0(r10) + 22f68: 42000404 addi r8,r8,16 + 22f6c: 4a400404 addi r9,r9,16 + 22f70: 5ac00404 addi r11,r11,16 + 22f74: 52800404 addi r10,r10,16 + 22f78: 413ff71e bne r8,r4,22f58 <_gp+0xfffe6a20> + 22f7c: 63000044 addi r12,r12,1 + 22f80: 6018913a slli r12,r12,4 + 22f84: 39c003cc andi r7,r7,15 + 22f88: 010000c4 movi r4,3 + 22f8c: 1b07883a add r3,r3,r12 + 22f90: 21c00e2e bgeu r4,r7,22fcc + 22f94: 1813883a mov r9,r3 + 22f98: 3811883a mov r8,r7 + 22f9c: 010000c4 movi r4,3 + 22fa0: 49800015 stw r6,0(r9) + 22fa4: 423fff04 addi r8,r8,-4 + 22fa8: 4a400104 addi r9,r9,4 + 22fac: 223ffc36 bltu r4,r8,22fa0 <_gp+0xfffe6a68> + 22fb0: 393fff04 addi r4,r7,-4 + 22fb4: 2008d0ba srli r4,r4,2 + 22fb8: 39c000cc andi r7,r7,3 + 22fbc: 21000044 addi r4,r4,1 + 22fc0: 2109883a add r4,r4,r4 + 22fc4: 2109883a add r4,r4,r4 + 22fc8: 1907883a add r3,r3,r4 + 22fcc: 38000526 beq r7,zero,22fe4 + 22fd0: 19cf883a add r7,r3,r7 + 22fd4: 19400005 stb r5,0(r3) + 22fd8: 18c00044 addi r3,r3,1 + 22fdc: 38fffd1e bne r7,r3,22fd4 <_gp+0xfffe6a9c> + 22fe0: f800283a ret + 22fe4: f800283a ret + 22fe8: 2007883a mov r3,r4 + 22fec: 300f883a mov r7,r6 + 22ff0: 003fc706 br 22f10 <_gp+0xfffe69d8> -00022bfc <_malloc_r>: - 22bfc: defff504 addi sp,sp,-44 - 22c00: dc800315 stw r18,12(sp) - 22c04: dfc00a15 stw ra,40(sp) - 22c08: df000915 stw fp,36(sp) - 22c0c: ddc00815 stw r23,32(sp) - 22c10: dd800715 stw r22,28(sp) - 22c14: dd400615 stw r21,24(sp) - 22c18: dd000515 stw r20,20(sp) - 22c1c: dcc00415 stw r19,16(sp) - 22c20: dc400215 stw r17,8(sp) - 22c24: dc000115 stw r16,4(sp) - 22c28: 288002c4 addi r2,r5,11 - 22c2c: 00c00584 movi r3,22 - 22c30: 2025883a mov r18,r4 - 22c34: 18807f2e bgeu r3,r2,22e34 <_malloc_r+0x238> - 22c38: 047ffe04 movi r17,-8 - 22c3c: 1462703a and r17,r2,r17 - 22c40: 8800a316 blt r17,zero,22ed0 <_malloc_r+0x2d4> - 22c44: 8940a236 bltu r17,r5,22ed0 <_malloc_r+0x2d4> - 22c48: 002fea40 call 2fea4 <__malloc_lock> - 22c4c: 00807dc4 movi r2,503 - 22c50: 1441e92e bgeu r2,r17,233f8 <_malloc_r+0x7fc> - 22c54: 8804d27a srli r2,r17,9 - 22c58: 1000a126 beq r2,zero,22ee0 <_malloc_r+0x2e4> - 22c5c: 00c00104 movi r3,4 - 22c60: 18811e36 bltu r3,r2,230dc <_malloc_r+0x4e0> - 22c64: 8804d1ba srli r2,r17,6 - 22c68: 12000e44 addi r8,r2,57 - 22c6c: 11c00e04 addi r7,r2,56 - 22c70: 4209883a add r4,r8,r8 - 22c74: 04c000f4 movhi r19,3 - 22c78: 2109883a add r4,r4,r4 - 22c7c: 9ccdf904 addi r19,r19,14308 - 22c80: 2109883a add r4,r4,r4 - 22c84: 9909883a add r4,r19,r4 - 22c88: 24000117 ldw r16,4(r4) - 22c8c: 213ffe04 addi r4,r4,-8 - 22c90: 24009726 beq r4,r16,22ef0 <_malloc_r+0x2f4> - 22c94: 80800117 ldw r2,4(r16) - 22c98: 01bfff04 movi r6,-4 - 22c9c: 014003c4 movi r5,15 - 22ca0: 1184703a and r2,r2,r6 - 22ca4: 1447c83a sub r3,r2,r17 - 22ca8: 28c00716 blt r5,r3,22cc8 <_malloc_r+0xcc> - 22cac: 1800920e bge r3,zero,22ef8 <_malloc_r+0x2fc> - 22cb0: 84000317 ldw r16,12(r16) - 22cb4: 24008e26 beq r4,r16,22ef0 <_malloc_r+0x2f4> - 22cb8: 80800117 ldw r2,4(r16) - 22cbc: 1184703a and r2,r2,r6 - 22cc0: 1447c83a sub r3,r2,r17 - 22cc4: 28fff90e bge r5,r3,22cac <_malloc_r+0xb0> - 22cc8: 3809883a mov r4,r7 - 22ccc: 018000f4 movhi r6,3 - 22cd0: 9c000417 ldw r16,16(r19) - 22cd4: 318df904 addi r6,r6,14308 - 22cd8: 32000204 addi r8,r6,8 - 22cdc: 82013426 beq r16,r8,231b0 <_malloc_r+0x5b4> - 22ce0: 80c00117 ldw r3,4(r16) - 22ce4: 00bfff04 movi r2,-4 - 22ce8: 188e703a and r7,r3,r2 - 22cec: 3c45c83a sub r2,r7,r17 - 22cf0: 00c003c4 movi r3,15 - 22cf4: 18811f16 blt r3,r2,23174 <_malloc_r+0x578> - 22cf8: 32000515 stw r8,20(r6) - 22cfc: 32000415 stw r8,16(r6) - 22d00: 10007f0e bge r2,zero,22f00 <_malloc_r+0x304> - 22d04: 00807fc4 movi r2,511 - 22d08: 11c0fd36 bltu r2,r7,23100 <_malloc_r+0x504> - 22d0c: 3806d0fa srli r3,r7,3 - 22d10: 01c00044 movi r7,1 - 22d14: 30800117 ldw r2,4(r6) - 22d18: 19400044 addi r5,r3,1 - 22d1c: 294b883a add r5,r5,r5 - 22d20: 1807d0ba srai r3,r3,2 - 22d24: 294b883a add r5,r5,r5 - 22d28: 294b883a add r5,r5,r5 - 22d2c: 298b883a add r5,r5,r6 - 22d30: 38c6983a sll r3,r7,r3 - 22d34: 29c00017 ldw r7,0(r5) - 22d38: 2a7ffe04 addi r9,r5,-8 - 22d3c: 1886b03a or r3,r3,r2 - 22d40: 82400315 stw r9,12(r16) - 22d44: 81c00215 stw r7,8(r16) - 22d48: 30c00115 stw r3,4(r6) - 22d4c: 2c000015 stw r16,0(r5) - 22d50: 3c000315 stw r16,12(r7) - 22d54: 2005d0ba srai r2,r4,2 - 22d58: 01400044 movi r5,1 - 22d5c: 288a983a sll r5,r5,r2 - 22d60: 19406f36 bltu r3,r5,22f20 <_malloc_r+0x324> - 22d64: 28c4703a and r2,r5,r3 - 22d68: 10000a1e bne r2,zero,22d94 <_malloc_r+0x198> - 22d6c: 00bfff04 movi r2,-4 - 22d70: 294b883a add r5,r5,r5 - 22d74: 2088703a and r4,r4,r2 - 22d78: 28c4703a and r2,r5,r3 - 22d7c: 21000104 addi r4,r4,4 - 22d80: 1000041e bne r2,zero,22d94 <_malloc_r+0x198> - 22d84: 294b883a add r5,r5,r5 - 22d88: 28c4703a and r2,r5,r3 - 22d8c: 21000104 addi r4,r4,4 - 22d90: 103ffc26 beq r2,zero,22d84 <_malloc_r+0x188> - 22d94: 02bfff04 movi r10,-4 - 22d98: 024003c4 movi r9,15 - 22d9c: 21800044 addi r6,r4,1 - 22da0: 318d883a add r6,r6,r6 - 22da4: 318d883a add r6,r6,r6 - 22da8: 318d883a add r6,r6,r6 - 22dac: 998d883a add r6,r19,r6 - 22db0: 333ffe04 addi r12,r6,-8 - 22db4: 2017883a mov r11,r4 - 22db8: 31800104 addi r6,r6,4 - 22dbc: 34000017 ldw r16,0(r6) - 22dc0: 31fffd04 addi r7,r6,-12 - 22dc4: 81c0041e bne r16,r7,22dd8 <_malloc_r+0x1dc> - 22dc8: 0000fb06 br 231b8 <_malloc_r+0x5bc> - 22dcc: 1801030e bge r3,zero,231dc <_malloc_r+0x5e0> - 22dd0: 84000317 ldw r16,12(r16) - 22dd4: 81c0f826 beq r16,r7,231b8 <_malloc_r+0x5bc> - 22dd8: 80800117 ldw r2,4(r16) - 22ddc: 1284703a and r2,r2,r10 - 22de0: 1447c83a sub r3,r2,r17 - 22de4: 48fff90e bge r9,r3,22dcc <_malloc_r+0x1d0> - 22de8: 80800317 ldw r2,12(r16) - 22dec: 81000217 ldw r4,8(r16) - 22df0: 89400054 ori r5,r17,1 - 22df4: 81400115 stw r5,4(r16) - 22df8: 20800315 stw r2,12(r4) - 22dfc: 11000215 stw r4,8(r2) - 22e00: 8463883a add r17,r16,r17 - 22e04: 9c400515 stw r17,20(r19) - 22e08: 9c400415 stw r17,16(r19) - 22e0c: 18800054 ori r2,r3,1 - 22e10: 88800115 stw r2,4(r17) - 22e14: 8a000315 stw r8,12(r17) - 22e18: 8a000215 stw r8,8(r17) - 22e1c: 88e3883a add r17,r17,r3 - 22e20: 88c00015 stw r3,0(r17) - 22e24: 9009883a mov r4,r18 - 22e28: 002fec80 call 2fec8 <__malloc_unlock> - 22e2c: 80800204 addi r2,r16,8 - 22e30: 00001b06 br 22ea0 <_malloc_r+0x2a4> - 22e34: 04400404 movi r17,16 - 22e38: 89402536 bltu r17,r5,22ed0 <_malloc_r+0x2d4> - 22e3c: 002fea40 call 2fea4 <__malloc_lock> - 22e40: 00800184 movi r2,6 - 22e44: 01000084 movi r4,2 - 22e48: 04c000f4 movhi r19,3 - 22e4c: 1085883a add r2,r2,r2 - 22e50: 9ccdf904 addi r19,r19,14308 - 22e54: 1085883a add r2,r2,r2 - 22e58: 9885883a add r2,r19,r2 - 22e5c: 14000117 ldw r16,4(r2) - 22e60: 10fffe04 addi r3,r2,-8 - 22e64: 80c0d926 beq r16,r3,231cc <_malloc_r+0x5d0> - 22e68: 80c00117 ldw r3,4(r16) - 22e6c: 81000317 ldw r4,12(r16) - 22e70: 00bfff04 movi r2,-4 - 22e74: 1884703a and r2,r3,r2 - 22e78: 81400217 ldw r5,8(r16) - 22e7c: 8085883a add r2,r16,r2 - 22e80: 10c00117 ldw r3,4(r2) - 22e84: 29000315 stw r4,12(r5) - 22e88: 21400215 stw r5,8(r4) - 22e8c: 18c00054 ori r3,r3,1 - 22e90: 10c00115 stw r3,4(r2) - 22e94: 9009883a mov r4,r18 - 22e98: 002fec80 call 2fec8 <__malloc_unlock> - 22e9c: 80800204 addi r2,r16,8 - 22ea0: dfc00a17 ldw ra,40(sp) - 22ea4: df000917 ldw fp,36(sp) - 22ea8: ddc00817 ldw r23,32(sp) - 22eac: dd800717 ldw r22,28(sp) - 22eb0: dd400617 ldw r21,24(sp) - 22eb4: dd000517 ldw r20,20(sp) - 22eb8: dcc00417 ldw r19,16(sp) - 22ebc: dc800317 ldw r18,12(sp) - 22ec0: dc400217 ldw r17,8(sp) - 22ec4: dc000117 ldw r16,4(sp) - 22ec8: dec00b04 addi sp,sp,44 - 22ecc: f800283a ret - 22ed0: 00800304 movi r2,12 - 22ed4: 90800015 stw r2,0(r18) - 22ed8: 0005883a mov r2,zero - 22edc: 003ff006 br 22ea0 <_malloc_r+0x2a4> - 22ee0: 01002004 movi r4,128 - 22ee4: 02001004 movi r8,64 - 22ee8: 01c00fc4 movi r7,63 - 22eec: 003f6106 br 22c74 <_malloc_r+0x78> - 22ef0: 4009883a mov r4,r8 - 22ef4: 003f7506 br 22ccc <_malloc_r+0xd0> - 22ef8: 81000317 ldw r4,12(r16) - 22efc: 003fde06 br 22e78 <_malloc_r+0x27c> - 22f00: 81c5883a add r2,r16,r7 - 22f04: 11400117 ldw r5,4(r2) - 22f08: 9009883a mov r4,r18 - 22f0c: 29400054 ori r5,r5,1 - 22f10: 11400115 stw r5,4(r2) - 22f14: 002fec80 call 2fec8 <__malloc_unlock> - 22f18: 80800204 addi r2,r16,8 - 22f1c: 003fe006 br 22ea0 <_malloc_r+0x2a4> - 22f20: 9c000217 ldw r16,8(r19) - 22f24: 00bfff04 movi r2,-4 - 22f28: 85800117 ldw r22,4(r16) - 22f2c: b0ac703a and r22,r22,r2 - 22f30: b4400336 bltu r22,r17,22f40 <_malloc_r+0x344> - 22f34: b445c83a sub r2,r22,r17 - 22f38: 00c003c4 movi r3,15 - 22f3c: 18805d16 blt r3,r2,230b4 <_malloc_r+0x4b8> - 22f40: 05c000f4 movhi r23,3 - 22f44: 008000f4 movhi r2,3 - 22f48: 109c5804 addi r2,r2,29024 - 22f4c: bdd3a004 addi r23,r23,20096 - 22f50: 15400017 ldw r21,0(r2) - 22f54: b8c00017 ldw r3,0(r23) - 22f58: 00bfffc4 movi r2,-1 - 22f5c: 858d883a add r6,r16,r22 - 22f60: 8d6b883a add r21,r17,r21 - 22f64: 1880ea26 beq r3,r2,23310 <_malloc_r+0x714> - 22f68: ad4403c4 addi r21,r21,4111 - 22f6c: 00bc0004 movi r2,-4096 - 22f70: a8aa703a and r21,r21,r2 - 22f74: a80b883a mov r5,r21 - 22f78: 9009883a mov r4,r18 - 22f7c: d9800015 stw r6,0(sp) - 22f80: 00237180 call 23718 <_sbrk_r> - 22f84: 1029883a mov r20,r2 - 22f88: 00bfffc4 movi r2,-1 - 22f8c: d9800017 ldw r6,0(sp) - 22f90: a080e826 beq r20,r2,23334 <_malloc_r+0x738> - 22f94: a180a636 bltu r20,r6,23230 <_malloc_r+0x634> - 22f98: 070000f4 movhi fp,3 - 22f9c: e71c6404 addi fp,fp,29072 - 22fa0: e0800017 ldw r2,0(fp) - 22fa4: a887883a add r3,r21,r2 - 22fa8: e0c00015 stw r3,0(fp) - 22fac: 3500e626 beq r6,r20,23348 <_malloc_r+0x74c> - 22fb0: b9000017 ldw r4,0(r23) - 22fb4: 00bfffc4 movi r2,-1 - 22fb8: 2080ee26 beq r4,r2,23374 <_malloc_r+0x778> - 22fbc: a185c83a sub r2,r20,r6 - 22fc0: 10c5883a add r2,r2,r3 - 22fc4: e0800015 stw r2,0(fp) - 22fc8: a0c001cc andi r3,r20,7 - 22fcc: 1800bc26 beq r3,zero,232c0 <_malloc_r+0x6c4> - 22fd0: a0e9c83a sub r20,r20,r3 - 22fd4: 00840204 movi r2,4104 - 22fd8: a5000204 addi r20,r20,8 - 22fdc: 10c7c83a sub r3,r2,r3 - 22fe0: a545883a add r2,r20,r21 - 22fe4: 1083ffcc andi r2,r2,4095 - 22fe8: 18abc83a sub r21,r3,r2 - 22fec: a80b883a mov r5,r21 - 22ff0: 9009883a mov r4,r18 - 22ff4: 00237180 call 23718 <_sbrk_r> - 22ff8: 00ffffc4 movi r3,-1 - 22ffc: 10c0e126 beq r2,r3,23384 <_malloc_r+0x788> - 23000: 1505c83a sub r2,r2,r20 - 23004: 1545883a add r2,r2,r21 - 23008: 10800054 ori r2,r2,1 - 2300c: e0c00017 ldw r3,0(fp) - 23010: 9d000215 stw r20,8(r19) - 23014: a0800115 stw r2,4(r20) - 23018: a8c7883a add r3,r21,r3 - 2301c: e0c00015 stw r3,0(fp) - 23020: 84c00e26 beq r16,r19,2305c <_malloc_r+0x460> - 23024: 018003c4 movi r6,15 - 23028: 3580a72e bgeu r6,r22,232c8 <_malloc_r+0x6cc> - 2302c: 81400117 ldw r5,4(r16) - 23030: 013ffe04 movi r4,-8 - 23034: b0bffd04 addi r2,r22,-12 - 23038: 1104703a and r2,r2,r4 - 2303c: 2900004c andi r4,r5,1 - 23040: 2088b03a or r4,r4,r2 - 23044: 81000115 stw r4,4(r16) - 23048: 01400144 movi r5,5 - 2304c: 8089883a add r4,r16,r2 - 23050: 21400115 stw r5,4(r4) - 23054: 21400215 stw r5,8(r4) - 23058: 3080cd36 bltu r6,r2,23390 <_malloc_r+0x794> - 2305c: 008000f4 movhi r2,3 - 23060: 109c5704 addi r2,r2,29020 - 23064: 11000017 ldw r4,0(r2) - 23068: 20c0012e bgeu r4,r3,23070 <_malloc_r+0x474> - 2306c: 10c00015 stw r3,0(r2) - 23070: 008000f4 movhi r2,3 - 23074: 109c5604 addi r2,r2,29016 - 23078: 11000017 ldw r4,0(r2) - 2307c: 9c000217 ldw r16,8(r19) - 23080: 20c0012e bgeu r4,r3,23088 <_malloc_r+0x48c> - 23084: 10c00015 stw r3,0(r2) - 23088: 80c00117 ldw r3,4(r16) - 2308c: 00bfff04 movi r2,-4 - 23090: 1886703a and r3,r3,r2 - 23094: 1c45c83a sub r2,r3,r17 - 23098: 1c400236 bltu r3,r17,230a4 <_malloc_r+0x4a8> - 2309c: 00c003c4 movi r3,15 - 230a0: 18800416 blt r3,r2,230b4 <_malloc_r+0x4b8> - 230a4: 9009883a mov r4,r18 - 230a8: 002fec80 call 2fec8 <__malloc_unlock> - 230ac: 0005883a mov r2,zero - 230b0: 003f7b06 br 22ea0 <_malloc_r+0x2a4> - 230b4: 88c00054 ori r3,r17,1 - 230b8: 80c00115 stw r3,4(r16) - 230bc: 8463883a add r17,r16,r17 - 230c0: 10800054 ori r2,r2,1 - 230c4: 9c400215 stw r17,8(r19) - 230c8: 88800115 stw r2,4(r17) - 230cc: 9009883a mov r4,r18 - 230d0: 002fec80 call 2fec8 <__malloc_unlock> - 230d4: 80800204 addi r2,r16,8 - 230d8: 003f7106 br 22ea0 <_malloc_r+0x2a4> - 230dc: 00c00504 movi r3,20 - 230e0: 18804a2e bgeu r3,r2,2320c <_malloc_r+0x610> - 230e4: 00c01504 movi r3,84 - 230e8: 18806e36 bltu r3,r2,232a4 <_malloc_r+0x6a8> - 230ec: 8804d33a srli r2,r17,12 - 230f0: 12001bc4 addi r8,r2,111 - 230f4: 11c01b84 addi r7,r2,110 - 230f8: 4209883a add r4,r8,r8 - 230fc: 003edd06 br 22c74 <_malloc_r+0x78> - 23100: 3804d27a srli r2,r7,9 - 23104: 00c00104 movi r3,4 - 23108: 1880442e bgeu r3,r2,2321c <_malloc_r+0x620> - 2310c: 00c00504 movi r3,20 - 23110: 18808136 bltu r3,r2,23318 <_malloc_r+0x71c> - 23114: 11401704 addi r5,r2,92 - 23118: 10c016c4 addi r3,r2,91 - 2311c: 294b883a add r5,r5,r5 - 23120: 294b883a add r5,r5,r5 - 23124: 294b883a add r5,r5,r5 - 23128: 994b883a add r5,r19,r5 - 2312c: 28800017 ldw r2,0(r5) - 23130: 018000f4 movhi r6,3 - 23134: 297ffe04 addi r5,r5,-8 - 23138: 318df904 addi r6,r6,14308 - 2313c: 28806526 beq r5,r2,232d4 <_malloc_r+0x6d8> - 23140: 01bfff04 movi r6,-4 - 23144: 10c00117 ldw r3,4(r2) - 23148: 1986703a and r3,r3,r6 - 2314c: 38c0022e bgeu r7,r3,23158 <_malloc_r+0x55c> - 23150: 10800217 ldw r2,8(r2) - 23154: 28bffb1e bne r5,r2,23144 <_malloc_r+0x548> - 23158: 11400317 ldw r5,12(r2) - 2315c: 98c00117 ldw r3,4(r19) - 23160: 81400315 stw r5,12(r16) - 23164: 80800215 stw r2,8(r16) - 23168: 2c000215 stw r16,8(r5) - 2316c: 14000315 stw r16,12(r2) - 23170: 003ef806 br 22d54 <_malloc_r+0x158> - 23174: 88c00054 ori r3,r17,1 - 23178: 80c00115 stw r3,4(r16) - 2317c: 8463883a add r17,r16,r17 - 23180: 34400515 stw r17,20(r6) - 23184: 34400415 stw r17,16(r6) - 23188: 10c00054 ori r3,r2,1 - 2318c: 8a000315 stw r8,12(r17) - 23190: 8a000215 stw r8,8(r17) - 23194: 88c00115 stw r3,4(r17) - 23198: 88a3883a add r17,r17,r2 - 2319c: 88800015 stw r2,0(r17) - 231a0: 9009883a mov r4,r18 - 231a4: 002fec80 call 2fec8 <__malloc_unlock> - 231a8: 80800204 addi r2,r16,8 - 231ac: 003f3c06 br 22ea0 <_malloc_r+0x2a4> - 231b0: 30c00117 ldw r3,4(r6) - 231b4: 003ee706 br 22d54 <_malloc_r+0x158> - 231b8: 5ac00044 addi r11,r11,1 - 231bc: 588000cc andi r2,r11,3 - 231c0: 31800204 addi r6,r6,8 - 231c4: 103efd1e bne r2,zero,22dbc <_malloc_r+0x1c0> - 231c8: 00002406 br 2325c <_malloc_r+0x660> - 231cc: 14000317 ldw r16,12(r2) - 231d0: 143f251e bne r2,r16,22e68 <_malloc_r+0x26c> - 231d4: 21000084 addi r4,r4,2 - 231d8: 003ebc06 br 22ccc <_malloc_r+0xd0> - 231dc: 8085883a add r2,r16,r2 - 231e0: 10c00117 ldw r3,4(r2) - 231e4: 81000317 ldw r4,12(r16) - 231e8: 81400217 ldw r5,8(r16) - 231ec: 18c00054 ori r3,r3,1 - 231f0: 10c00115 stw r3,4(r2) - 231f4: 29000315 stw r4,12(r5) - 231f8: 21400215 stw r5,8(r4) - 231fc: 9009883a mov r4,r18 - 23200: 002fec80 call 2fec8 <__malloc_unlock> - 23204: 80800204 addi r2,r16,8 - 23208: 003f2506 br 22ea0 <_malloc_r+0x2a4> - 2320c: 12001704 addi r8,r2,92 - 23210: 11c016c4 addi r7,r2,91 - 23214: 4209883a add r4,r8,r8 - 23218: 003e9606 br 22c74 <_malloc_r+0x78> - 2321c: 3804d1ba srli r2,r7,6 - 23220: 11400e44 addi r5,r2,57 - 23224: 10c00e04 addi r3,r2,56 - 23228: 294b883a add r5,r5,r5 - 2322c: 003fbc06 br 23120 <_malloc_r+0x524> - 23230: 84ff5926 beq r16,r19,22f98 <_malloc_r+0x39c> - 23234: 008000f4 movhi r2,3 - 23238: 108df904 addi r2,r2,14308 - 2323c: 14000217 ldw r16,8(r2) - 23240: 00bfff04 movi r2,-4 - 23244: 80c00117 ldw r3,4(r16) - 23248: 1886703a and r3,r3,r2 - 2324c: 003f9106 br 23094 <_malloc_r+0x498> - 23250: 60800217 ldw r2,8(r12) - 23254: 213fffc4 addi r4,r4,-1 - 23258: 1300651e bne r2,r12,233f0 <_malloc_r+0x7f4> - 2325c: 208000cc andi r2,r4,3 - 23260: 633ffe04 addi r12,r12,-8 - 23264: 103ffa1e bne r2,zero,23250 <_malloc_r+0x654> - 23268: 98800117 ldw r2,4(r19) - 2326c: 0146303a nor r3,zero,r5 - 23270: 1884703a and r2,r3,r2 - 23274: 98800115 stw r2,4(r19) - 23278: 294b883a add r5,r5,r5 - 2327c: 117f2836 bltu r2,r5,22f20 <_malloc_r+0x324> - 23280: 283f2726 beq r5,zero,22f20 <_malloc_r+0x324> - 23284: 2886703a and r3,r5,r2 - 23288: 5809883a mov r4,r11 - 2328c: 183ec31e bne r3,zero,22d9c <_malloc_r+0x1a0> - 23290: 294b883a add r5,r5,r5 - 23294: 2886703a and r3,r5,r2 - 23298: 21000104 addi r4,r4,4 - 2329c: 183ffc26 beq r3,zero,23290 <_malloc_r+0x694> - 232a0: 003ebe06 br 22d9c <_malloc_r+0x1a0> - 232a4: 00c05504 movi r3,340 - 232a8: 18801236 bltu r3,r2,232f4 <_malloc_r+0x6f8> - 232ac: 8804d3fa srli r2,r17,15 - 232b0: 12001e04 addi r8,r2,120 - 232b4: 11c01dc4 addi r7,r2,119 - 232b8: 4209883a add r4,r8,r8 - 232bc: 003e6d06 br 22c74 <_malloc_r+0x78> - 232c0: 00c40004 movi r3,4096 - 232c4: 003f4606 br 22fe0 <_malloc_r+0x3e4> - 232c8: 00800044 movi r2,1 - 232cc: a0800115 stw r2,4(r20) - 232d0: 003f7406 br 230a4 <_malloc_r+0x4a8> - 232d4: 1805d0ba srai r2,r3,2 - 232d8: 01c00044 movi r7,1 - 232dc: 30c00117 ldw r3,4(r6) - 232e0: 388e983a sll r7,r7,r2 - 232e4: 2805883a mov r2,r5 - 232e8: 38c6b03a or r3,r7,r3 - 232ec: 30c00115 stw r3,4(r6) - 232f0: 003f9b06 br 23160 <_malloc_r+0x564> - 232f4: 00c15504 movi r3,1364 - 232f8: 18801a36 bltu r3,r2,23364 <_malloc_r+0x768> - 232fc: 8804d4ba srli r2,r17,18 - 23300: 12001f44 addi r8,r2,125 - 23304: 11c01f04 addi r7,r2,124 - 23308: 4209883a add r4,r8,r8 - 2330c: 003e5906 br 22c74 <_malloc_r+0x78> - 23310: ad400404 addi r21,r21,16 - 23314: 003f1706 br 22f74 <_malloc_r+0x378> - 23318: 00c01504 movi r3,84 - 2331c: 18802336 bltu r3,r2,233ac <_malloc_r+0x7b0> - 23320: 3804d33a srli r2,r7,12 - 23324: 11401bc4 addi r5,r2,111 - 23328: 10c01b84 addi r3,r2,110 - 2332c: 294b883a add r5,r5,r5 - 23330: 003f7b06 br 23120 <_malloc_r+0x524> - 23334: 9c000217 ldw r16,8(r19) - 23338: 00bfff04 movi r2,-4 - 2333c: 80c00117 ldw r3,4(r16) - 23340: 1886703a and r3,r3,r2 - 23344: 003f5306 br 23094 <_malloc_r+0x498> - 23348: 3083ffcc andi r2,r6,4095 - 2334c: 103f181e bne r2,zero,22fb0 <_malloc_r+0x3b4> - 23350: 99000217 ldw r4,8(r19) - 23354: b545883a add r2,r22,r21 - 23358: 10800054 ori r2,r2,1 - 2335c: 20800115 stw r2,4(r4) - 23360: 003f3e06 br 2305c <_malloc_r+0x460> - 23364: 01003f84 movi r4,254 - 23368: 02001fc4 movi r8,127 - 2336c: 01c01f84 movi r7,126 - 23370: 003e4006 br 22c74 <_malloc_r+0x78> - 23374: 008000f4 movhi r2,3 - 23378: 1093a004 addi r2,r2,20096 - 2337c: 15000015 stw r20,0(r2) - 23380: 003f1106 br 22fc8 <_malloc_r+0x3cc> - 23384: 00800044 movi r2,1 - 23388: 002b883a mov r21,zero - 2338c: 003f1f06 br 2300c <_malloc_r+0x410> - 23390: 81400204 addi r5,r16,8 - 23394: 9009883a mov r4,r18 - 23398: 0027c1c0 call 27c1c <_free_r> - 2339c: 008000f4 movhi r2,3 - 233a0: 109c6404 addi r2,r2,29072 - 233a4: 10c00017 ldw r3,0(r2) - 233a8: 003f2c06 br 2305c <_malloc_r+0x460> - 233ac: 00c05504 movi r3,340 - 233b0: 18800536 bltu r3,r2,233c8 <_malloc_r+0x7cc> - 233b4: 3804d3fa srli r2,r7,15 - 233b8: 11401e04 addi r5,r2,120 - 233bc: 10c01dc4 addi r3,r2,119 - 233c0: 294b883a add r5,r5,r5 - 233c4: 003f5606 br 23120 <_malloc_r+0x524> - 233c8: 00c15504 movi r3,1364 - 233cc: 18800536 bltu r3,r2,233e4 <_malloc_r+0x7e8> - 233d0: 3804d4ba srli r2,r7,18 - 233d4: 11401f44 addi r5,r2,125 - 233d8: 10c01f04 addi r3,r2,124 - 233dc: 294b883a add r5,r5,r5 - 233e0: 003f4f06 br 23120 <_malloc_r+0x524> - 233e4: 01403f84 movi r5,254 - 233e8: 00c01f84 movi r3,126 - 233ec: 003f4c06 br 23120 <_malloc_r+0x524> - 233f0: 98800117 ldw r2,4(r19) - 233f4: 003fa006 br 23278 <_malloc_r+0x67c> - 233f8: 8808d0fa srli r4,r17,3 - 233fc: 20800044 addi r2,r4,1 - 23400: 1085883a add r2,r2,r2 - 23404: 003e9006 br 22e48 <_malloc_r+0x24c> +00022ff4 <_printf_r>: + 22ff4: defffd04 addi sp,sp,-12 + 22ff8: 2805883a mov r2,r5 + 22ffc: dfc00015 stw ra,0(sp) + 23000: d9800115 stw r6,4(sp) + 23004: d9c00215 stw r7,8(sp) + 23008: 21400217 ldw r5,8(r4) + 2300c: d9c00104 addi r7,sp,4 + 23010: 100d883a mov r6,r2 + 23014: 00232400 call 23240 <___vfprintf_internal_r> + 23018: dfc00017 ldw ra,0(sp) + 2301c: dec00304 addi sp,sp,12 + 23020: f800283a ret -00023408 : - 23408: 20c000cc andi r3,r4,3 - 2340c: 2005883a mov r2,r4 - 23410: 18004426 beq r3,zero,23524 - 23414: 31ffffc4 addi r7,r6,-1 - 23418: 30004026 beq r6,zero,2351c - 2341c: 2813883a mov r9,r5 - 23420: 200d883a mov r6,r4 - 23424: 2007883a mov r3,r4 - 23428: 00000406 br 2343c - 2342c: 3a3fffc4 addi r8,r7,-1 - 23430: 31800044 addi r6,r6,1 - 23434: 38003926 beq r7,zero,2351c - 23438: 400f883a mov r7,r8 - 2343c: 18c00044 addi r3,r3,1 - 23440: 32400005 stb r9,0(r6) - 23444: 1a0000cc andi r8,r3,3 - 23448: 403ff81e bne r8,zero,2342c - 2344c: 010000c4 movi r4,3 - 23450: 21c02d2e bgeu r4,r7,23508 - 23454: 29003fcc andi r4,r5,255 - 23458: 200c923a slli r6,r4,8 - 2345c: 3108b03a or r4,r6,r4 - 23460: 200c943a slli r6,r4,16 - 23464: 218cb03a or r6,r4,r6 - 23468: 010003c4 movi r4,15 - 2346c: 21c0182e bgeu r4,r7,234d0 - 23470: 3b3ffc04 addi r12,r7,-16 - 23474: 6018d13a srli r12,r12,4 - 23478: 1a000104 addi r8,r3,4 - 2347c: 1ac00204 addi r11,r3,8 - 23480: 6008913a slli r4,r12,4 - 23484: 1a800304 addi r10,r3,12 - 23488: 1813883a mov r9,r3 - 2348c: 21000504 addi r4,r4,20 - 23490: 1909883a add r4,r3,r4 - 23494: 49800015 stw r6,0(r9) - 23498: 41800015 stw r6,0(r8) - 2349c: 59800015 stw r6,0(r11) - 234a0: 51800015 stw r6,0(r10) - 234a4: 42000404 addi r8,r8,16 - 234a8: 4a400404 addi r9,r9,16 - 234ac: 5ac00404 addi r11,r11,16 - 234b0: 52800404 addi r10,r10,16 - 234b4: 413ff71e bne r8,r4,23494 - 234b8: 63000044 addi r12,r12,1 - 234bc: 6018913a slli r12,r12,4 - 234c0: 39c003cc andi r7,r7,15 - 234c4: 010000c4 movi r4,3 - 234c8: 1b07883a add r3,r3,r12 - 234cc: 21c00e2e bgeu r4,r7,23508 - 234d0: 1813883a mov r9,r3 - 234d4: 3811883a mov r8,r7 - 234d8: 010000c4 movi r4,3 - 234dc: 49800015 stw r6,0(r9) - 234e0: 423fff04 addi r8,r8,-4 - 234e4: 4a400104 addi r9,r9,4 - 234e8: 223ffc36 bltu r4,r8,234dc - 234ec: 393fff04 addi r4,r7,-4 - 234f0: 2008d0ba srli r4,r4,2 - 234f4: 39c000cc andi r7,r7,3 - 234f8: 21000044 addi r4,r4,1 - 234fc: 2109883a add r4,r4,r4 - 23500: 2109883a add r4,r4,r4 - 23504: 1907883a add r3,r3,r4 - 23508: 38000526 beq r7,zero,23520 - 2350c: 19cf883a add r7,r3,r7 - 23510: 19400005 stb r5,0(r3) - 23514: 18c00044 addi r3,r3,1 - 23518: 38fffd1e bne r7,r3,23510 - 2351c: f800283a ret - 23520: f800283a ret - 23524: 2007883a mov r3,r4 - 23528: 300f883a mov r7,r6 - 2352c: 003fc706 br 2344c +00023024 : + 23024: defffc04 addi sp,sp,-16 + 23028: dfc00015 stw ra,0(sp) + 2302c: d9400115 stw r5,4(sp) + 23030: d9800215 stw r6,8(sp) + 23034: d9c00315 stw r7,12(sp) + 23038: 008000f4 movhi r2,3 + 2303c: 10915404 addi r2,r2,17744 + 23040: 10800017 ldw r2,0(r2) + 23044: 200b883a mov r5,r4 + 23048: d9800104 addi r6,sp,4 + 2304c: 11000217 ldw r4,8(r2) + 23050: 00254380 call 25438 <__vfprintf_internal> + 23054: dfc00017 ldw ra,0(sp) + 23058: dec00404 addi sp,sp,16 + 2305c: f800283a ret -00023530 <_printf_r>: - 23530: defffd04 addi sp,sp,-12 - 23534: 2805883a mov r2,r5 - 23538: dfc00015 stw ra,0(sp) - 2353c: d9800115 stw r6,4(sp) - 23540: d9c00215 stw r7,8(sp) - 23544: 21400217 ldw r5,8(r4) - 23548: d9c00104 addi r7,sp,4 - 2354c: 100d883a mov r6,r2 - 23550: 00238040 call 23804 <___vfprintf_internal_r> - 23554: dfc00017 ldw ra,0(sp) - 23558: dec00304 addi sp,sp,12 - 2355c: f800283a ret +00023060 <_putchar_r>: + 23060: 21800217 ldw r6,8(r4) + 23064: 00295c81 jmpi 295c8 <_putc_r> -00023560 : - 23560: defffc04 addi sp,sp,-16 - 23564: dfc00015 stw ra,0(sp) - 23568: d9400115 stw r5,4(sp) - 2356c: d9800215 stw r6,8(sp) - 23570: d9c00315 stw r7,12(sp) - 23574: 008000f4 movhi r2,3 - 23578: 10939f04 addi r2,r2,20092 - 2357c: 10800017 ldw r2,0(r2) - 23580: 200b883a mov r5,r4 - 23584: d9800104 addi r6,sp,4 - 23588: 11000217 ldw r4,8(r2) - 2358c: 00259fc0 call 259fc <__vfprintf_internal> - 23590: dfc00017 ldw ra,0(sp) - 23594: dec00404 addi sp,sp,16 - 23598: f800283a ret +00023068 : + 23068: 008000f4 movhi r2,3 + 2306c: 10915404 addi r2,r2,17744 + 23070: 200b883a mov r5,r4 + 23074: 11000017 ldw r4,0(r2) + 23078: 21800217 ldw r6,8(r4) + 2307c: 00295c81 jmpi 295c8 <_putc_r> -0002359c <_putchar_r>: - 2359c: 21800217 ldw r6,8(r4) - 235a0: 0029b8c1 jmpi 29b8c <_putc_r> +00023080 <_puts_r>: + 23080: defff604 addi sp,sp,-40 + 23084: dc000715 stw r16,28(sp) + 23088: 2021883a mov r16,r4 + 2308c: 2809883a mov r4,r5 + 23090: dc400815 stw r17,32(sp) + 23094: dfc00915 stw ra,36(sp) + 23098: 2823883a mov r17,r5 + 2309c: 00231a80 call 231a8 + 230a0: 10c00044 addi r3,r2,1 + 230a4: d8800115 stw r2,4(sp) + 230a8: 008000f4 movhi r2,3 + 230ac: 1087fb04 addi r2,r2,8172 + 230b0: d8800215 stw r2,8(sp) + 230b4: 00800044 movi r2,1 + 230b8: d8800315 stw r2,12(sp) + 230bc: 00800084 movi r2,2 + 230c0: dc400015 stw r17,0(sp) + 230c4: d8c00615 stw r3,24(sp) + 230c8: dec00415 stw sp,16(sp) + 230cc: d8800515 stw r2,20(sp) + 230d0: 80000226 beq r16,zero,230dc <_puts_r+0x5c> + 230d4: 80800e17 ldw r2,56(r16) + 230d8: 10001426 beq r2,zero,2312c <_puts_r+0xac> + 230dc: 81400217 ldw r5,8(r16) + 230e0: 2880030b ldhu r2,12(r5) + 230e4: 10c8000c andi r3,r2,8192 + 230e8: 1800061e bne r3,zero,23104 <_puts_r+0x84> + 230ec: 29001917 ldw r4,100(r5) + 230f0: 00f7ffc4 movi r3,-8193 + 230f4: 10880014 ori r2,r2,8192 + 230f8: 20c6703a and r3,r4,r3 + 230fc: 2880030d sth r2,12(r5) + 23100: 28c01915 stw r3,100(r5) + 23104: d9800404 addi r6,sp,16 + 23108: 8009883a mov r4,r16 + 2310c: 00279680 call 27968 <__sfvwrite_r> + 23110: 1000091e bne r2,zero,23138 <_puts_r+0xb8> + 23114: 00800284 movi r2,10 + 23118: dfc00917 ldw ra,36(sp) + 2311c: dc400817 ldw r17,32(sp) + 23120: dc000717 ldw r16,28(sp) + 23124: dec00a04 addi sp,sp,40 + 23128: f800283a ret + 2312c: 8009883a mov r4,r16 + 23130: 00274e40 call 274e4 <__sinit> + 23134: 003fe906 br 230dc <_gp+0xfffe6ba4> + 23138: 00bfffc4 movi r2,-1 + 2313c: 003ff606 br 23118 <_gp+0xfffe6be0> -000235a4 : - 235a4: 008000f4 movhi r2,3 - 235a8: 10939f04 addi r2,r2,20092 - 235ac: 200b883a mov r5,r4 - 235b0: 11000017 ldw r4,0(r2) - 235b4: 21800217 ldw r6,8(r4) - 235b8: 0029b8c1 jmpi 29b8c <_putc_r> +00023140 : + 23140: 008000f4 movhi r2,3 + 23144: 10915404 addi r2,r2,17744 + 23148: 200b883a mov r5,r4 + 2314c: 11000017 ldw r4,0(r2) + 23150: 00230801 jmpi 23080 <_puts_r> -000235bc <_puts_r>: - 235bc: defff604 addi sp,sp,-40 - 235c0: dc000715 stw r16,28(sp) - 235c4: 2021883a mov r16,r4 - 235c8: 2809883a mov r4,r5 - 235cc: dc400815 stw r17,32(sp) - 235d0: dfc00915 stw ra,36(sp) - 235d4: 2823883a mov r17,r5 - 235d8: 002376c0 call 2376c - 235dc: 10c00044 addi r3,r2,1 - 235e0: d8800115 stw r2,4(sp) - 235e4: 008000f4 movhi r2,3 - 235e8: 108a4904 addi r2,r2,10532 - 235ec: d8800215 stw r2,8(sp) - 235f0: 00800044 movi r2,1 - 235f4: d8800315 stw r2,12(sp) - 235f8: 00800084 movi r2,2 - 235fc: dc400015 stw r17,0(sp) - 23600: d8c00615 stw r3,24(sp) - 23604: dec00415 stw sp,16(sp) - 23608: d8800515 stw r2,20(sp) - 2360c: 80000226 beq r16,zero,23618 <_puts_r+0x5c> - 23610: 80800e17 ldw r2,56(r16) - 23614: 10001426 beq r2,zero,23668 <_puts_r+0xac> - 23618: 81400217 ldw r5,8(r16) - 2361c: 2880030b ldhu r2,12(r5) - 23620: 10c8000c andi r3,r2,8192 - 23624: 1800061e bne r3,zero,23640 <_puts_r+0x84> - 23628: 29001917 ldw r4,100(r5) - 2362c: 00f7ffc4 movi r3,-8193 - 23630: 10880014 ori r2,r2,8192 - 23634: 20c6703a and r3,r4,r3 - 23638: 2880030d sth r2,12(r5) - 2363c: 28c01915 stw r3,100(r5) - 23640: d9800404 addi r6,sp,16 - 23644: 8009883a mov r4,r16 - 23648: 0027f2c0 call 27f2c <__sfvwrite_r> - 2364c: 1000091e bne r2,zero,23674 <_puts_r+0xb8> - 23650: 00800284 movi r2,10 - 23654: dfc00917 ldw ra,36(sp) - 23658: dc400817 ldw r17,32(sp) - 2365c: dc000717 ldw r16,28(sp) - 23660: dec00a04 addi sp,sp,40 - 23664: f800283a ret - 23668: 8009883a mov r4,r16 - 2366c: 0027aa80 call 27aa8 <__sinit> - 23670: 003fe906 br 23618 <_puts_r+0x5c> - 23674: 00bfffc4 movi r2,-1 - 23678: 003ff606 br 23654 <_puts_r+0x98> +00023154 <_sbrk_r>: + 23154: defffd04 addi sp,sp,-12 + 23158: dc000015 stw r16,0(sp) + 2315c: 040000f4 movhi r16,3 + 23160: dc400115 stw r17,4(sp) + 23164: 841a0c04 addi r16,r16,26672 + 23168: 2023883a mov r17,r4 + 2316c: 2809883a mov r4,r5 + 23170: dfc00215 stw ra,8(sp) + 23174: 80000015 stw zero,0(r16) + 23178: 002f7780 call 2f778 + 2317c: 00ffffc4 movi r3,-1 + 23180: 10c00526 beq r2,r3,23198 <_sbrk_r+0x44> + 23184: dfc00217 ldw ra,8(sp) + 23188: dc400117 ldw r17,4(sp) + 2318c: dc000017 ldw r16,0(sp) + 23190: dec00304 addi sp,sp,12 + 23194: f800283a ret + 23198: 80c00017 ldw r3,0(r16) + 2319c: 183ff926 beq r3,zero,23184 <_gp+0xfffe6c4c> + 231a0: 88c00015 stw r3,0(r17) + 231a4: 003ff706 br 23184 <_gp+0xfffe6c4c> -0002367c : - 2367c: 008000f4 movhi r2,3 - 23680: 10939f04 addi r2,r2,20092 - 23684: 200b883a mov r5,r4 - 23688: 11000017 ldw r4,0(r2) - 2368c: 00235bc1 jmpi 235bc <_puts_r> +000231a8 : + 231a8: 208000cc andi r2,r4,3 + 231ac: 10002026 beq r2,zero,23230 + 231b0: 20800007 ldb r2,0(r4) + 231b4: 10002026 beq r2,zero,23238 + 231b8: 2005883a mov r2,r4 + 231bc: 00000206 br 231c8 + 231c0: 10c00007 ldb r3,0(r2) + 231c4: 18001826 beq r3,zero,23228 + 231c8: 10800044 addi r2,r2,1 + 231cc: 10c000cc andi r3,r2,3 + 231d0: 183ffb1e bne r3,zero,231c0 <_gp+0xfffe6c88> + 231d4: 10c00017 ldw r3,0(r2) + 231d8: 01ffbff4 movhi r7,65279 + 231dc: 39ffbfc4 addi r7,r7,-257 + 231e0: 00ca303a nor r5,zero,r3 + 231e4: 01a02074 movhi r6,32897 + 231e8: 19c7883a add r3,r3,r7 + 231ec: 31a02004 addi r6,r6,-32640 + 231f0: 1946703a and r3,r3,r5 + 231f4: 1986703a and r3,r3,r6 + 231f8: 1800091e bne r3,zero,23220 + 231fc: 10800104 addi r2,r2,4 + 23200: 10c00017 ldw r3,0(r2) + 23204: 19cb883a add r5,r3,r7 + 23208: 00c6303a nor r3,zero,r3 + 2320c: 28c6703a and r3,r5,r3 + 23210: 1986703a and r3,r3,r6 + 23214: 183ff926 beq r3,zero,231fc <_gp+0xfffe6cc4> + 23218: 00000106 br 23220 + 2321c: 10800044 addi r2,r2,1 + 23220: 10c00007 ldb r3,0(r2) + 23224: 183ffd1e bne r3,zero,2321c <_gp+0xfffe6ce4> + 23228: 1105c83a sub r2,r2,r4 + 2322c: f800283a ret + 23230: 2005883a mov r2,r4 + 23234: 003fe706 br 231d4 <_gp+0xfffe6c9c> + 23238: 0005883a mov r2,zero + 2323c: f800283a ret -00023690 <__srget_r>: - 23690: defffd04 addi sp,sp,-12 - 23694: dc400115 stw r17,4(sp) - 23698: dc000015 stw r16,0(sp) - 2369c: dfc00215 stw ra,8(sp) - 236a0: 2023883a mov r17,r4 - 236a4: 2821883a mov r16,r5 - 236a8: 20000226 beq r4,zero,236b4 <__srget_r+0x24> - 236ac: 20800e17 ldw r2,56(r4) - 236b0: 10001026 beq r2,zero,236f4 <__srget_r+0x64> - 236b4: 800b883a mov r5,r16 - 236b8: 8809883a mov r4,r17 - 236bc: 002a2740 call 2a274 <__srefill_r> - 236c0: 10000e1e bne r2,zero,236fc <__srget_r+0x6c> - 236c4: 80c00017 ldw r3,0(r16) - 236c8: 80800117 ldw r2,4(r16) - 236cc: 19000044 addi r4,r3,1 - 236d0: 10bfffc4 addi r2,r2,-1 - 236d4: 80800115 stw r2,4(r16) - 236d8: 81000015 stw r4,0(r16) - 236dc: 18800003 ldbu r2,0(r3) - 236e0: dfc00217 ldw ra,8(sp) - 236e4: dc400117 ldw r17,4(sp) - 236e8: dc000017 ldw r16,0(sp) - 236ec: dec00304 addi sp,sp,12 - 236f0: f800283a ret - 236f4: 0027aa80 call 27aa8 <__sinit> - 236f8: 003fee06 br 236b4 <__srget_r+0x24> - 236fc: 00bfffc4 movi r2,-1 - 23700: 003ff706 br 236e0 <__srget_r+0x50> - -00023704 <__srget>: - 23704: 008000f4 movhi r2,3 - 23708: 10939f04 addi r2,r2,20092 - 2370c: 200b883a mov r5,r4 - 23710: 11000017 ldw r4,0(r2) - 23714: 00236901 jmpi 23690 <__srget_r> - -00023718 <_sbrk_r>: - 23718: defffd04 addi sp,sp,-12 - 2371c: dc000015 stw r16,0(sp) - 23720: 040000f4 movhi r16,3 - 23724: dc400115 stw r17,4(sp) - 23728: 841c5904 addi r16,r16,29028 - 2372c: 2023883a mov r17,r4 - 23730: 2809883a mov r4,r5 - 23734: dfc00215 stw ra,8(sp) - 23738: 80000015 stw zero,0(r16) - 2373c: 003009c0 call 3009c - 23740: 00ffffc4 movi r3,-1 - 23744: 10c00526 beq r2,r3,2375c <_sbrk_r+0x44> - 23748: dfc00217 ldw ra,8(sp) - 2374c: dc400117 ldw r17,4(sp) - 23750: dc000017 ldw r16,0(sp) - 23754: dec00304 addi sp,sp,12 - 23758: f800283a ret - 2375c: 80c00017 ldw r3,0(r16) - 23760: 183ff926 beq r3,zero,23748 <_sbrk_r+0x30> - 23764: 88c00015 stw r3,0(r17) - 23768: 003ff706 br 23748 <_sbrk_r+0x30> - -0002376c : - 2376c: 208000cc andi r2,r4,3 - 23770: 10002026 beq r2,zero,237f4 - 23774: 20800007 ldb r2,0(r4) - 23778: 10002026 beq r2,zero,237fc - 2377c: 2005883a mov r2,r4 - 23780: 00000206 br 2378c - 23784: 10c00007 ldb r3,0(r2) - 23788: 18001826 beq r3,zero,237ec - 2378c: 10800044 addi r2,r2,1 - 23790: 10c000cc andi r3,r2,3 - 23794: 183ffb1e bne r3,zero,23784 - 23798: 10c00017 ldw r3,0(r2) - 2379c: 01ffbff4 movhi r7,65279 - 237a0: 39ffbfc4 addi r7,r7,-257 - 237a4: 00ca303a nor r5,zero,r3 - 237a8: 01a02074 movhi r6,32897 - 237ac: 19c7883a add r3,r3,r7 - 237b0: 31a02004 addi r6,r6,-32640 - 237b4: 1946703a and r3,r3,r5 - 237b8: 1986703a and r3,r3,r6 - 237bc: 1800091e bne r3,zero,237e4 - 237c0: 10800104 addi r2,r2,4 - 237c4: 10c00017 ldw r3,0(r2) - 237c8: 19cb883a add r5,r3,r7 - 237cc: 00c6303a nor r3,zero,r3 - 237d0: 28c6703a and r3,r5,r3 - 237d4: 1986703a and r3,r3,r6 - 237d8: 183ff926 beq r3,zero,237c0 - 237dc: 00000106 br 237e4 - 237e0: 10800044 addi r2,r2,1 - 237e4: 10c00007 ldb r3,0(r2) - 237e8: 183ffd1e bne r3,zero,237e0 - 237ec: 1105c83a sub r2,r2,r4 - 237f0: f800283a ret - 237f4: 2005883a mov r2,r4 - 237f8: 003fe706 br 23798 - 237fc: 0005883a mov r2,zero - 23800: f800283a ret - -00023804 <___vfprintf_internal_r>: - 23804: deffb804 addi sp,sp,-288 - 23808: dfc04715 stw ra,284(sp) - 2380c: ddc04515 stw r23,276(sp) - 23810: dd404315 stw r21,268(sp) - 23814: d9002c15 stw r4,176(sp) - 23818: 282f883a mov r23,r5 - 2381c: 302b883a mov r21,r6 - 23820: d9c02d15 stw r7,180(sp) - 23824: df004615 stw fp,280(sp) - 23828: dd804415 stw r22,272(sp) - 2382c: dd004215 stw r20,264(sp) - 23830: dcc04115 stw r19,260(sp) - 23834: dc804015 stw r18,256(sp) - 23838: dc403f15 stw r17,252(sp) - 2383c: dc003e15 stw r16,248(sp) - 23840: 002861c0 call 2861c <_localeconv_r> - 23844: 10800017 ldw r2,0(r2) - 23848: 1009883a mov r4,r2 - 2384c: d8803415 stw r2,208(sp) - 23850: 002376c0 call 2376c - 23854: d8803715 stw r2,220(sp) - 23858: d8802c17 ldw r2,176(sp) - 2385c: 10000226 beq r2,zero,23868 <___vfprintf_internal_r+0x64> - 23860: 10800e17 ldw r2,56(r2) - 23864: 1000f926 beq r2,zero,23c4c <___vfprintf_internal_r+0x448> - 23868: b880030b ldhu r2,12(r23) - 2386c: 10c8000c andi r3,r2,8192 - 23870: 1800061e bne r3,zero,2388c <___vfprintf_internal_r+0x88> - 23874: b9001917 ldw r4,100(r23) - 23878: 00f7ffc4 movi r3,-8193 - 2387c: 10880014 ori r2,r2,8192 - 23880: 20c6703a and r3,r4,r3 - 23884: b880030d sth r2,12(r23) - 23888: b8c01915 stw r3,100(r23) - 2388c: 10c0020c andi r3,r2,8 - 23890: 1800c126 beq r3,zero,23b98 <___vfprintf_internal_r+0x394> - 23894: b8c00417 ldw r3,16(r23) - 23898: 1800bf26 beq r3,zero,23b98 <___vfprintf_internal_r+0x394> - 2389c: 1080068c andi r2,r2,26 - 238a0: 00c00284 movi r3,10 - 238a4: 10c0c426 beq r2,r3,23bb8 <___vfprintf_internal_r+0x3b4> - 238a8: d8c00404 addi r3,sp,16 - 238ac: 050000f4 movhi r20,3 - 238b0: d9001e04 addi r4,sp,120 - 238b4: a50a5a84 addi r20,r20,10602 - 238b8: d8c01e15 stw r3,120(sp) - 238bc: d8002015 stw zero,128(sp) - 238c0: d8001f15 stw zero,124(sp) - 238c4: d8003315 stw zero,204(sp) - 238c8: d8003615 stw zero,216(sp) - 238cc: d8003815 stw zero,224(sp) - 238d0: 1811883a mov r8,r3 - 238d4: d8003915 stw zero,228(sp) - 238d8: d8003a15 stw zero,232(sp) - 238dc: d8002f15 stw zero,188(sp) - 238e0: d9002815 stw r4,160(sp) - 238e4: a8800007 ldb r2,0(r21) - 238e8: 10027b26 beq r2,zero,242d8 <___vfprintf_internal_r+0xad4> - 238ec: 00c00944 movi r3,37 - 238f0: a821883a mov r16,r21 - 238f4: 10c0021e bne r2,r3,23900 <___vfprintf_internal_r+0xfc> - 238f8: 00001406 br 2394c <___vfprintf_internal_r+0x148> - 238fc: 10c00326 beq r2,r3,2390c <___vfprintf_internal_r+0x108> - 23900: 84000044 addi r16,r16,1 - 23904: 80800007 ldb r2,0(r16) - 23908: 103ffc1e bne r2,zero,238fc <___vfprintf_internal_r+0xf8> - 2390c: 8563c83a sub r17,r16,r21 - 23910: 88000e26 beq r17,zero,2394c <___vfprintf_internal_r+0x148> - 23914: d8c02017 ldw r3,128(sp) - 23918: d8801f17 ldw r2,124(sp) - 2391c: 45400015 stw r21,0(r8) - 23920: 1c47883a add r3,r3,r17 - 23924: 10800044 addi r2,r2,1 - 23928: d8c02015 stw r3,128(sp) - 2392c: 44400115 stw r17,4(r8) - 23930: d8801f15 stw r2,124(sp) - 23934: 00c001c4 movi r3,7 - 23938: 1880a716 blt r3,r2,23bd8 <___vfprintf_internal_r+0x3d4> - 2393c: 42000204 addi r8,r8,8 - 23940: d9402f17 ldw r5,188(sp) - 23944: 2c4b883a add r5,r5,r17 - 23948: d9402f15 stw r5,188(sp) - 2394c: 80800007 ldb r2,0(r16) - 23950: 1000a826 beq r2,zero,23bf4 <___vfprintf_internal_r+0x3f0> - 23954: 84400047 ldb r17,1(r16) - 23958: 00bfffc4 movi r2,-1 - 2395c: 85400044 addi r21,r16,1 - 23960: d8002785 stb zero,158(sp) - 23964: 0007883a mov r3,zero - 23968: 000f883a mov r7,zero - 2396c: d8802915 stw r2,164(sp) - 23970: d8003115 stw zero,196(sp) - 23974: 0025883a mov r18,zero - 23978: 01401604 movi r5,88 - 2397c: 01800244 movi r6,9 - 23980: 02800a84 movi r10,42 - 23984: 02401b04 movi r9,108 - 23988: ad400044 addi r21,r21,1 - 2398c: 88bff804 addi r2,r17,-32 - 23990: 28830436 bltu r5,r2,245a4 <___vfprintf_internal_r+0xda0> - 23994: 100490ba slli r2,r2,2 - 23998: 010000b4 movhi r4,2 - 2399c: 210e6b04 addi r4,r4,14764 - 239a0: 1105883a add r2,r2,r4 - 239a4: 10800017 ldw r2,0(r2) - 239a8: 1000683a jmp r2 - 239ac: 000244c4 movi zero,2323 - 239b0: 000245a4 muli zero,zero,2326 - 239b4: 000245a4 muli zero,zero,2326 - 239b8: 000244e4 muli zero,zero,2323 - 239bc: 000245a4 muli zero,zero,2326 - 239c0: 000245a4 muli zero,zero,2326 - 239c4: 000245a4 muli zero,zero,2326 - 239c8: 000245a4 muli zero,zero,2326 - 239cc: 000245a4 muli zero,zero,2326 - 239d0: 000245a4 muli zero,zero,2326 - 239d4: 00023c58 cmpnei zero,zero,2289 - 239d8: 00024400 call 2440 <__alt_mem_onchip_memory2_0-0x1dbc0> - 239dc: 000245a4 muli zero,zero,2326 - 239e0: 00023b20 cmpeqi zero,zero,2284 - 239e4: 00023c80 call 23c8 <__alt_mem_onchip_memory2_0-0x1dc38> - 239e8: 000245a4 muli zero,zero,2326 - 239ec: 00023cc0 call 23cc <__alt_mem_onchip_memory2_0-0x1dc34> - 239f0: 00023ccc andi zero,zero,2291 - 239f4: 00023ccc andi zero,zero,2291 - 239f8: 00023ccc andi zero,zero,2291 - 239fc: 00023ccc andi zero,zero,2291 - 23a00: 00023ccc andi zero,zero,2291 - 23a04: 00023ccc andi zero,zero,2291 - 23a08: 00023ccc andi zero,zero,2291 - 23a0c: 00023ccc andi zero,zero,2291 - 23a10: 00023ccc andi zero,zero,2291 - 23a14: 000245a4 muli zero,zero,2326 - 23a18: 000245a4 muli zero,zero,2326 - 23a1c: 000245a4 muli zero,zero,2326 - 23a20: 000245a4 muli zero,zero,2326 - 23a24: 000245a4 muli zero,zero,2326 - 23a28: 000245a4 muli zero,zero,2326 - 23a2c: 000245a4 muli zero,zero,2326 - 23a30: 000245a4 muli zero,zero,2326 - 23a34: 000245a4 muli zero,zero,2326 - 23a38: 000245a4 muli zero,zero,2326 - 23a3c: 00023d00 call 23d0 <__alt_mem_onchip_memory2_0-0x1dc30> - 23a40: 00023dbc xorhi zero,zero,2294 - 23a44: 000245a4 muli zero,zero,2326 - 23a48: 00023dbc xorhi zero,zero,2294 - 23a4c: 000245a4 muli zero,zero,2326 - 23a50: 000245a4 muli zero,zero,2326 - 23a54: 000245a4 muli zero,zero,2326 - 23a58: 000245a4 muli zero,zero,2326 - 23a5c: 00023e5c xori zero,zero,2297 - 23a60: 000245a4 muli zero,zero,2326 - 23a64: 000245a4 muli zero,zero,2326 - 23a68: 00023e68 cmpgeui zero,zero,2297 - 23a6c: 000245a4 muli zero,zero,2326 - 23a70: 000245a4 muli zero,zero,2326 - 23a74: 000245a4 muli zero,zero,2326 - 23a78: 000245a4 muli zero,zero,2326 - 23a7c: 000245a4 muli zero,zero,2326 - 23a80: 000242e0 cmpeqi zero,zero,2315 - 23a84: 000245a4 muli zero,zero,2326 - 23a88: 000245a4 muli zero,zero,2326 - 23a8c: 00024340 call 2434 <__alt_mem_onchip_memory2_0-0x1dbcc> - 23a90: 000245a4 muli zero,zero,2326 - 23a94: 000245a4 muli zero,zero,2326 - 23a98: 000245a4 muli zero,zero,2326 - 23a9c: 000245a4 muli zero,zero,2326 - 23aa0: 000245a4 muli zero,zero,2326 - 23aa4: 000245a4 muli zero,zero,2326 - 23aa8: 000245a4 muli zero,zero,2326 - 23aac: 000245a4 muli zero,zero,2326 - 23ab0: 000245a4 muli zero,zero,2326 - 23ab4: 000245a4 muli zero,zero,2326 - 23ab8: 00024550 cmplti zero,zero,2325 - 23abc: 000244f0 cmpltui zero,zero,2323 - 23ac0: 00023dbc xorhi zero,zero,2294 - 23ac4: 00023dbc xorhi zero,zero,2294 - 23ac8: 00023dbc xorhi zero,zero,2294 - 23acc: 00024500 call 2450 <__alt_mem_onchip_memory2_0-0x1dbb0> - 23ad0: 000244f0 cmpltui zero,zero,2323 - 23ad4: 000245a4 muli zero,zero,2326 - 23ad8: 000245a4 muli zero,zero,2326 - 23adc: 0002450c andi zero,zero,2324 - 23ae0: 000245a4 muli zero,zero,2326 - 23ae4: 0002451c xori zero,zero,2324 - 23ae8: 000243f0 cmpltui zero,zero,2319 - 23aec: 00023b2c andhi zero,zero,2284 - 23af0: 00024410 cmplti zero,zero,2320 - 23af4: 000245a4 muli zero,zero,2326 - 23af8: 0002441c xori zero,zero,2320 - 23afc: 000245a4 muli zero,zero,2326 - 23b00: 00024478 rdprs zero,zero,2321 - 23b04: 000245a4 muli zero,zero,2326 - 23b08: 000245a4 muli zero,zero,2326 - 23b0c: 00024488 cmpgei zero,zero,2322 - 23b10: d9003117 ldw r4,196(sp) - 23b14: d8802d15 stw r2,180(sp) - 23b18: 0109c83a sub r4,zero,r4 - 23b1c: d9003115 stw r4,196(sp) - 23b20: 94800114 ori r18,r18,4 - 23b24: ac400007 ldb r17,0(r21) - 23b28: 003f9706 br 23988 <___vfprintf_internal_r+0x184> - 23b2c: 00800c04 movi r2,48 - 23b30: d9002d17 ldw r4,180(sp) - 23b34: d9402917 ldw r5,164(sp) - 23b38: d8802705 stb r2,156(sp) - 23b3c: 00801e04 movi r2,120 - 23b40: d8802745 stb r2,157(sp) - 23b44: d8002785 stb zero,158(sp) - 23b48: 20c00104 addi r3,r4,4 - 23b4c: 24c00017 ldw r19,0(r4) - 23b50: 002d883a mov r22,zero - 23b54: 90800094 ori r2,r18,2 - 23b58: 28029a16 blt r5,zero,245c4 <___vfprintf_internal_r+0xdc0> - 23b5c: 00bfdfc4 movi r2,-129 - 23b60: 90a4703a and r18,r18,r2 - 23b64: d8c02d15 stw r3,180(sp) - 23b68: 94800094 ori r18,r18,2 - 23b6c: 9802871e bne r19,zero,2458c <___vfprintf_internal_r+0xd88> - 23b70: 008000f4 movhi r2,3 - 23b74: 108a5304 addi r2,r2,10572 - 23b78: d8803915 stw r2,228(sp) - 23b7c: 04401e04 movi r17,120 - 23b80: d8802917 ldw r2,164(sp) - 23b84: 0039883a mov fp,zero - 23b88: 1001e926 beq r2,zero,24330 <___vfprintf_internal_r+0xb2c> - 23b8c: 0027883a mov r19,zero - 23b90: 002d883a mov r22,zero - 23b94: 00020506 br 243ac <___vfprintf_internal_r+0xba8> - 23b98: d9002c17 ldw r4,176(sp) - 23b9c: b80b883a mov r5,r23 - 23ba0: 0025ad40 call 25ad4 <__swsetup_r> - 23ba4: 1005ac1e bne r2,zero,25258 <___vfprintf_internal_r+0x1a54> - 23ba8: b880030b ldhu r2,12(r23) - 23bac: 00c00284 movi r3,10 - 23bb0: 1080068c andi r2,r2,26 - 23bb4: 10ff3c1e bne r2,r3,238a8 <___vfprintf_internal_r+0xa4> - 23bb8: b880038f ldh r2,14(r23) - 23bbc: 103f3a16 blt r2,zero,238a8 <___vfprintf_internal_r+0xa4> - 23bc0: d9c02d17 ldw r7,180(sp) - 23bc4: d9002c17 ldw r4,176(sp) - 23bc8: a80d883a mov r6,r21 - 23bcc: b80b883a mov r5,r23 - 23bd0: 0025a180 call 25a18 <__sbprintf> - 23bd4: 00001106 br 23c1c <___vfprintf_internal_r+0x418> - 23bd8: d9002c17 ldw r4,176(sp) - 23bdc: d9801e04 addi r6,sp,120 - 23be0: b80b883a mov r5,r23 - 23be4: 002a7d00 call 2a7d0 <__sprint_r> - 23be8: 1000081e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> - 23bec: da000404 addi r8,sp,16 - 23bf0: 003f5306 br 23940 <___vfprintf_internal_r+0x13c> - 23bf4: d8802017 ldw r2,128(sp) - 23bf8: 10000426 beq r2,zero,23c0c <___vfprintf_internal_r+0x408> - 23bfc: d9002c17 ldw r4,176(sp) - 23c00: d9801e04 addi r6,sp,120 - 23c04: b80b883a mov r5,r23 - 23c08: 002a7d00 call 2a7d0 <__sprint_r> - 23c0c: b880030b ldhu r2,12(r23) - 23c10: 1080100c andi r2,r2,64 - 23c14: 1005901e bne r2,zero,25258 <___vfprintf_internal_r+0x1a54> - 23c18: d8802f17 ldw r2,188(sp) - 23c1c: dfc04717 ldw ra,284(sp) - 23c20: df004617 ldw fp,280(sp) - 23c24: ddc04517 ldw r23,276(sp) - 23c28: dd804417 ldw r22,272(sp) - 23c2c: dd404317 ldw r21,268(sp) - 23c30: dd004217 ldw r20,264(sp) - 23c34: dcc04117 ldw r19,260(sp) - 23c38: dc804017 ldw r18,256(sp) - 23c3c: dc403f17 ldw r17,252(sp) - 23c40: dc003e17 ldw r16,248(sp) - 23c44: dec04804 addi sp,sp,288 - 23c48: f800283a ret - 23c4c: d9002c17 ldw r4,176(sp) - 23c50: 0027aa80 call 27aa8 <__sinit> - 23c54: 003f0406 br 23868 <___vfprintf_internal_r+0x64> - 23c58: d8802d17 ldw r2,180(sp) - 23c5c: d9002d17 ldw r4,180(sp) - 23c60: 10800017 ldw r2,0(r2) - 23c64: d8803115 stw r2,196(sp) - 23c68: 20800104 addi r2,r4,4 - 23c6c: d9003117 ldw r4,196(sp) - 23c70: 203fa716 blt r4,zero,23b10 <___vfprintf_internal_r+0x30c> - 23c74: d8802d15 stw r2,180(sp) - 23c78: ac400007 ldb r17,0(r21) - 23c7c: 003f4206 br 23988 <___vfprintf_internal_r+0x184> - 23c80: ac400007 ldb r17,0(r21) - 23c84: aac00044 addi r11,r21,1 - 23c88: 8a872826 beq r17,r10,2592c <___vfprintf_internal_r+0x2128> - 23c8c: 88bff404 addi r2,r17,-48 - 23c90: 0009883a mov r4,zero - 23c94: 30867d36 bltu r6,r2,2568c <___vfprintf_internal_r+0x1e88> - 23c98: 5c400007 ldb r17,0(r11) - 23c9c: 210002a4 muli r4,r4,10 - 23ca0: 5d400044 addi r21,r11,1 - 23ca4: a817883a mov r11,r21 - 23ca8: 2089883a add r4,r4,r2 - 23cac: 88bff404 addi r2,r17,-48 - 23cb0: 30bff92e bgeu r6,r2,23c98 <___vfprintf_internal_r+0x494> - 23cb4: 2005c916 blt r4,zero,253dc <___vfprintf_internal_r+0x1bd8> - 23cb8: d9002915 stw r4,164(sp) - 23cbc: 003f3306 br 2398c <___vfprintf_internal_r+0x188> - 23cc0: 94802014 ori r18,r18,128 - 23cc4: ac400007 ldb r17,0(r21) - 23cc8: 003f2f06 br 23988 <___vfprintf_internal_r+0x184> - 23ccc: a809883a mov r4,r21 - 23cd0: d8003115 stw zero,196(sp) - 23cd4: 88bff404 addi r2,r17,-48 - 23cd8: 0017883a mov r11,zero - 23cdc: 24400007 ldb r17,0(r4) - 23ce0: 5ac002a4 muli r11,r11,10 - 23ce4: ad400044 addi r21,r21,1 - 23ce8: a809883a mov r4,r21 - 23cec: 12d7883a add r11,r2,r11 - 23cf0: 88bff404 addi r2,r17,-48 - 23cf4: 30bff92e bgeu r6,r2,23cdc <___vfprintf_internal_r+0x4d8> - 23cf8: dac03115 stw r11,196(sp) - 23cfc: 003f2306 br 2398c <___vfprintf_internal_r+0x188> - 23d00: 18c03fcc andi r3,r3,255 - 23d04: 18072b1e bne r3,zero,259b4 <___vfprintf_internal_r+0x21b0> - 23d08: 94800414 ori r18,r18,16 - 23d0c: 9080080c andi r2,r18,32 - 23d10: 10037b26 beq r2,zero,24b00 <___vfprintf_internal_r+0x12fc> - 23d14: d9402d17 ldw r5,180(sp) - 23d18: 28800117 ldw r2,4(r5) - 23d1c: 2cc00017 ldw r19,0(r5) - 23d20: 29400204 addi r5,r5,8 - 23d24: d9402d15 stw r5,180(sp) - 23d28: 102d883a mov r22,r2 - 23d2c: 10044b16 blt r2,zero,24e5c <___vfprintf_internal_r+0x1658> - 23d30: d9402917 ldw r5,164(sp) - 23d34: df002783 ldbu fp,158(sp) - 23d38: 2803bc16 blt r5,zero,24c2c <___vfprintf_internal_r+0x1428> - 23d3c: 00ffdfc4 movi r3,-129 - 23d40: 9d84b03a or r2,r19,r22 - 23d44: 90e4703a and r18,r18,r3 - 23d48: 10017726 beq r2,zero,24328 <___vfprintf_internal_r+0xb24> - 23d4c: b0038326 beq r22,zero,24b5c <___vfprintf_internal_r+0x1358> - 23d50: dc402a15 stw r17,168(sp) - 23d54: dc001e04 addi r16,sp,120 - 23d58: b023883a mov r17,r22 - 23d5c: 402d883a mov r22,r8 - 23d60: 9809883a mov r4,r19 - 23d64: 880b883a mov r5,r17 - 23d68: 01800284 movi r6,10 - 23d6c: 000f883a mov r7,zero - 23d70: 002cbc80 call 2cbc8 <__umoddi3> - 23d74: 10800c04 addi r2,r2,48 - 23d78: 843fffc4 addi r16,r16,-1 - 23d7c: 9809883a mov r4,r19 - 23d80: 880b883a mov r5,r17 - 23d84: 80800005 stb r2,0(r16) - 23d88: 01800284 movi r6,10 - 23d8c: 000f883a mov r7,zero - 23d90: 002c6500 call 2c650 <__udivdi3> - 23d94: 1027883a mov r19,r2 - 23d98: 10c4b03a or r2,r2,r3 - 23d9c: 1823883a mov r17,r3 - 23da0: 103fef1e bne r2,zero,23d60 <___vfprintf_internal_r+0x55c> - 23da4: d8c02817 ldw r3,160(sp) - 23da8: dc402a17 ldw r17,168(sp) - 23dac: b011883a mov r8,r22 - 23db0: 1c07c83a sub r3,r3,r16 - 23db4: d8c02e15 stw r3,184(sp) - 23db8: 00005906 br 23f20 <___vfprintf_internal_r+0x71c> - 23dbc: 18c03fcc andi r3,r3,255 - 23dc0: 1806fa1e bne r3,zero,259ac <___vfprintf_internal_r+0x21a8> - 23dc4: 9080020c andi r2,r18,8 - 23dc8: 10048a26 beq r2,zero,24ff4 <___vfprintf_internal_r+0x17f0> - 23dcc: d8c02d17 ldw r3,180(sp) - 23dd0: d9002d17 ldw r4,180(sp) - 23dd4: d9402d17 ldw r5,180(sp) - 23dd8: 18c00017 ldw r3,0(r3) - 23ddc: 21000117 ldw r4,4(r4) - 23de0: 29400204 addi r5,r5,8 - 23de4: d8c03615 stw r3,216(sp) - 23de8: d9003815 stw r4,224(sp) - 23dec: d9402d15 stw r5,180(sp) - 23df0: d9003617 ldw r4,216(sp) - 23df4: d9403817 ldw r5,224(sp) - 23df8: da003d15 stw r8,244(sp) - 23dfc: 04000044 movi r16,1 - 23e00: 002a4480 call 2a448 <__fpclassifyd> - 23e04: da003d17 ldw r8,244(sp) - 23e08: 14041f1e bne r2,r16,24e88 <___vfprintf_internal_r+0x1684> - 23e0c: d9003617 ldw r4,216(sp) - 23e10: d9403817 ldw r5,224(sp) - 23e14: 000d883a mov r6,zero - 23e18: 000f883a mov r7,zero - 23e1c: 002e3f80 call 2e3f8 <__ledf2> - 23e20: da003d17 ldw r8,244(sp) - 23e24: 1005be16 blt r2,zero,25520 <___vfprintf_internal_r+0x1d1c> - 23e28: df002783 ldbu fp,158(sp) - 23e2c: 008011c4 movi r2,71 - 23e30: 1445330e bge r2,r17,25300 <___vfprintf_internal_r+0x1afc> - 23e34: 040000f4 movhi r16,3 - 23e38: 840a4b04 addi r16,r16,10540 - 23e3c: 00c000c4 movi r3,3 - 23e40: 00bfdfc4 movi r2,-129 - 23e44: d8c02a15 stw r3,168(sp) - 23e48: 90a4703a and r18,r18,r2 - 23e4c: d8c02e15 stw r3,184(sp) - 23e50: d8002915 stw zero,164(sp) - 23e54: d8003215 stw zero,200(sp) - 23e58: 00003706 br 23f38 <___vfprintf_internal_r+0x734> - 23e5c: 94800214 ori r18,r18,8 - 23e60: ac400007 ldb r17,0(r21) - 23e64: 003ec806 br 23988 <___vfprintf_internal_r+0x184> - 23e68: 18c03fcc andi r3,r3,255 - 23e6c: 1806db1e bne r3,zero,259dc <___vfprintf_internal_r+0x21d8> - 23e70: 94800414 ori r18,r18,16 - 23e74: 9080080c andi r2,r18,32 - 23e78: 1002d826 beq r2,zero,249dc <___vfprintf_internal_r+0x11d8> - 23e7c: d9402d17 ldw r5,180(sp) - 23e80: d8c02917 ldw r3,164(sp) - 23e84: d8002785 stb zero,158(sp) - 23e88: 28800204 addi r2,r5,8 - 23e8c: 2cc00017 ldw r19,0(r5) - 23e90: 2d800117 ldw r22,4(r5) - 23e94: 18048f16 blt r3,zero,250d4 <___vfprintf_internal_r+0x18d0> - 23e98: 013fdfc4 movi r4,-129 - 23e9c: 9d86b03a or r3,r19,r22 - 23ea0: d8802d15 stw r2,180(sp) - 23ea4: 9124703a and r18,r18,r4 - 23ea8: 1802d91e bne r3,zero,24a10 <___vfprintf_internal_r+0x120c> - 23eac: d8c02917 ldw r3,164(sp) - 23eb0: 0039883a mov fp,zero - 23eb4: 1805c326 beq r3,zero,255c4 <___vfprintf_internal_r+0x1dc0> - 23eb8: 0027883a mov r19,zero - 23ebc: 002d883a mov r22,zero - 23ec0: dc001e04 addi r16,sp,120 - 23ec4: 9806d0fa srli r3,r19,3 - 23ec8: b008977a slli r4,r22,29 - 23ecc: b02cd0fa srli r22,r22,3 - 23ed0: 9cc001cc andi r19,r19,7 - 23ed4: 98800c04 addi r2,r19,48 - 23ed8: 843fffc4 addi r16,r16,-1 - 23edc: 20e6b03a or r19,r4,r3 - 23ee0: 80800005 stb r2,0(r16) - 23ee4: 9d86b03a or r3,r19,r22 - 23ee8: 183ff61e bne r3,zero,23ec4 <___vfprintf_internal_r+0x6c0> - 23eec: 90c0004c andi r3,r18,1 - 23ef0: 18013b26 beq r3,zero,243e0 <___vfprintf_internal_r+0xbdc> - 23ef4: 10803fcc andi r2,r2,255 - 23ef8: 1080201c xori r2,r2,128 - 23efc: 10bfe004 addi r2,r2,-128 - 23f00: 00c00c04 movi r3,48 - 23f04: 10c13626 beq r2,r3,243e0 <___vfprintf_internal_r+0xbdc> - 23f08: 80ffffc5 stb r3,-1(r16) - 23f0c: d8c02817 ldw r3,160(sp) - 23f10: 80bfffc4 addi r2,r16,-1 - 23f14: 1021883a mov r16,r2 - 23f18: 1887c83a sub r3,r3,r2 - 23f1c: d8c02e15 stw r3,184(sp) - 23f20: d8802e17 ldw r2,184(sp) - 23f24: d9002917 ldw r4,164(sp) - 23f28: 1100010e bge r2,r4,23f30 <___vfprintf_internal_r+0x72c> - 23f2c: 2005883a mov r2,r4 - 23f30: d8802a15 stw r2,168(sp) - 23f34: d8003215 stw zero,200(sp) - 23f38: e7003fcc andi fp,fp,255 - 23f3c: e700201c xori fp,fp,128 - 23f40: e73fe004 addi fp,fp,-128 - 23f44: e0000326 beq fp,zero,23f54 <___vfprintf_internal_r+0x750> - 23f48: d8c02a17 ldw r3,168(sp) - 23f4c: 18c00044 addi r3,r3,1 - 23f50: d8c02a15 stw r3,168(sp) - 23f54: 90c0008c andi r3,r18,2 - 23f58: d8c02b15 stw r3,172(sp) - 23f5c: 18000326 beq r3,zero,23f6c <___vfprintf_internal_r+0x768> - 23f60: d8c02a17 ldw r3,168(sp) - 23f64: 18c00084 addi r3,r3,2 - 23f68: d8c02a15 stw r3,168(sp) - 23f6c: 90c0210c andi r3,r18,132 - 23f70: d8c03015 stw r3,192(sp) - 23f74: 1801a31e bne r3,zero,24604 <___vfprintf_internal_r+0xe00> - 23f78: d9003117 ldw r4,196(sp) - 23f7c: d8c02a17 ldw r3,168(sp) - 23f80: 20e7c83a sub r19,r4,r3 - 23f84: 04c19f0e bge zero,r19,24604 <___vfprintf_internal_r+0xe00> - 23f88: 02400404 movi r9,16 - 23f8c: d8c02017 ldw r3,128(sp) - 23f90: d8801f17 ldw r2,124(sp) - 23f94: 4cc50d0e bge r9,r19,253cc <___vfprintf_internal_r+0x1bc8> - 23f98: 014000f4 movhi r5,3 - 23f9c: 294a5e84 addi r5,r5,10618 - 23fa0: dc403b15 stw r17,236(sp) - 23fa4: d9403515 stw r5,212(sp) - 23fa8: 9823883a mov r17,r19 - 23fac: 482d883a mov r22,r9 - 23fb0: 9027883a mov r19,r18 - 23fb4: 070001c4 movi fp,7 - 23fb8: 8025883a mov r18,r16 - 23fbc: dc002c17 ldw r16,176(sp) - 23fc0: 00000306 br 23fd0 <___vfprintf_internal_r+0x7cc> - 23fc4: 8c7ffc04 addi r17,r17,-16 - 23fc8: 42000204 addi r8,r8,8 - 23fcc: b440130e bge r22,r17,2401c <___vfprintf_internal_r+0x818> - 23fd0: 010000f4 movhi r4,3 - 23fd4: 18c00404 addi r3,r3,16 - 23fd8: 10800044 addi r2,r2,1 - 23fdc: 210a5e84 addi r4,r4,10618 - 23fe0: 41000015 stw r4,0(r8) - 23fe4: 45800115 stw r22,4(r8) - 23fe8: d8c02015 stw r3,128(sp) - 23fec: d8801f15 stw r2,124(sp) - 23ff0: e0bff40e bge fp,r2,23fc4 <___vfprintf_internal_r+0x7c0> - 23ff4: d9801e04 addi r6,sp,120 - 23ff8: b80b883a mov r5,r23 - 23ffc: 8009883a mov r4,r16 - 24000: 002a7d00 call 2a7d0 <__sprint_r> - 24004: 103f011e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> - 24008: 8c7ffc04 addi r17,r17,-16 - 2400c: d8c02017 ldw r3,128(sp) - 24010: d8801f17 ldw r2,124(sp) - 24014: da000404 addi r8,sp,16 - 24018: b47fed16 blt r22,r17,23fd0 <___vfprintf_internal_r+0x7cc> - 2401c: 9021883a mov r16,r18 - 24020: 9825883a mov r18,r19 - 24024: 8827883a mov r19,r17 - 24028: dc403b17 ldw r17,236(sp) - 2402c: d9403517 ldw r5,212(sp) - 24030: 98c7883a add r3,r19,r3 - 24034: 10800044 addi r2,r2,1 - 24038: 41400015 stw r5,0(r8) - 2403c: 44c00115 stw r19,4(r8) - 24040: d8c02015 stw r3,128(sp) - 24044: d8801f15 stw r2,124(sp) - 24048: 010001c4 movi r4,7 - 2404c: 2082a316 blt r4,r2,24adc <___vfprintf_internal_r+0x12d8> - 24050: df002787 ldb fp,158(sp) - 24054: 42000204 addi r8,r8,8 - 24058: e0000c26 beq fp,zero,2408c <___vfprintf_internal_r+0x888> - 2405c: d8801f17 ldw r2,124(sp) - 24060: d9002784 addi r4,sp,158 - 24064: 18c00044 addi r3,r3,1 - 24068: 10800044 addi r2,r2,1 - 2406c: 41000015 stw r4,0(r8) - 24070: 01000044 movi r4,1 - 24074: 41000115 stw r4,4(r8) - 24078: d8c02015 stw r3,128(sp) - 2407c: d8801f15 stw r2,124(sp) - 24080: 010001c4 movi r4,7 - 24084: 20823c16 blt r4,r2,24978 <___vfprintf_internal_r+0x1174> - 24088: 42000204 addi r8,r8,8 - 2408c: d8802b17 ldw r2,172(sp) - 24090: 10000c26 beq r2,zero,240c4 <___vfprintf_internal_r+0x8c0> - 24094: d8801f17 ldw r2,124(sp) - 24098: d9002704 addi r4,sp,156 - 2409c: 18c00084 addi r3,r3,2 - 240a0: 10800044 addi r2,r2,1 - 240a4: 41000015 stw r4,0(r8) - 240a8: 01000084 movi r4,2 - 240ac: 41000115 stw r4,4(r8) - 240b0: d8c02015 stw r3,128(sp) - 240b4: d8801f15 stw r2,124(sp) - 240b8: 010001c4 movi r4,7 - 240bc: 20823616 blt r4,r2,24998 <___vfprintf_internal_r+0x1194> - 240c0: 42000204 addi r8,r8,8 - 240c4: d9003017 ldw r4,192(sp) - 240c8: 00802004 movi r2,128 - 240cc: 20819926 beq r4,r2,24734 <___vfprintf_internal_r+0xf30> - 240d0: d9402917 ldw r5,164(sp) - 240d4: d8802e17 ldw r2,184(sp) - 240d8: 28adc83a sub r22,r5,r2 - 240dc: 0580310e bge zero,r22,241a4 <___vfprintf_internal_r+0x9a0> - 240e0: 07000404 movi fp,16 - 240e4: d8801f17 ldw r2,124(sp) - 240e8: e584140e bge fp,r22,2513c <___vfprintf_internal_r+0x1938> - 240ec: 014000f4 movhi r5,3 - 240f0: 294a5a84 addi r5,r5,10602 - 240f4: dc402915 stw r17,164(sp) - 240f8: d9402b15 stw r5,172(sp) - 240fc: b023883a mov r17,r22 - 24100: 04c001c4 movi r19,7 - 24104: a82d883a mov r22,r21 - 24108: 902b883a mov r21,r18 - 2410c: 8025883a mov r18,r16 - 24110: dc002c17 ldw r16,176(sp) - 24114: 00000306 br 24124 <___vfprintf_internal_r+0x920> - 24118: 8c7ffc04 addi r17,r17,-16 - 2411c: 42000204 addi r8,r8,8 - 24120: e440110e bge fp,r17,24168 <___vfprintf_internal_r+0x964> - 24124: 18c00404 addi r3,r3,16 - 24128: 10800044 addi r2,r2,1 - 2412c: 45000015 stw r20,0(r8) - 24130: 47000115 stw fp,4(r8) - 24134: d8c02015 stw r3,128(sp) - 24138: d8801f15 stw r2,124(sp) - 2413c: 98bff60e bge r19,r2,24118 <___vfprintf_internal_r+0x914> - 24140: d9801e04 addi r6,sp,120 - 24144: b80b883a mov r5,r23 - 24148: 8009883a mov r4,r16 - 2414c: 002a7d00 call 2a7d0 <__sprint_r> - 24150: 103eae1e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> - 24154: 8c7ffc04 addi r17,r17,-16 - 24158: d8c02017 ldw r3,128(sp) - 2415c: d8801f17 ldw r2,124(sp) - 24160: da000404 addi r8,sp,16 - 24164: e47fef16 blt fp,r17,24124 <___vfprintf_internal_r+0x920> - 24168: 9021883a mov r16,r18 - 2416c: a825883a mov r18,r21 - 24170: b02b883a mov r21,r22 - 24174: 882d883a mov r22,r17 - 24178: dc402917 ldw r17,164(sp) - 2417c: d9002b17 ldw r4,172(sp) - 24180: 1d87883a add r3,r3,r22 - 24184: 10800044 addi r2,r2,1 - 24188: 41000015 stw r4,0(r8) - 2418c: 45800115 stw r22,4(r8) - 24190: d8c02015 stw r3,128(sp) - 24194: d8801f15 stw r2,124(sp) - 24198: 010001c4 movi r4,7 - 2419c: 2081ee16 blt r4,r2,24958 <___vfprintf_internal_r+0x1154> - 241a0: 42000204 addi r8,r8,8 - 241a4: 9080400c andi r2,r18,256 - 241a8: 1001181e bne r2,zero,2460c <___vfprintf_internal_r+0xe08> - 241ac: d9402e17 ldw r5,184(sp) - 241b0: d8801f17 ldw r2,124(sp) - 241b4: 44000015 stw r16,0(r8) - 241b8: 1947883a add r3,r3,r5 - 241bc: 10800044 addi r2,r2,1 - 241c0: 41400115 stw r5,4(r8) - 241c4: d8c02015 stw r3,128(sp) - 241c8: d8801f15 stw r2,124(sp) - 241cc: 010001c4 movi r4,7 - 241d0: 2081d316 blt r4,r2,24920 <___vfprintf_internal_r+0x111c> - 241d4: 42000204 addi r8,r8,8 - 241d8: 9480010c andi r18,r18,4 - 241dc: 90003226 beq r18,zero,242a8 <___vfprintf_internal_r+0xaa4> - 241e0: d9403117 ldw r5,196(sp) - 241e4: d8802a17 ldw r2,168(sp) - 241e8: 28a1c83a sub r16,r5,r2 - 241ec: 04002e0e bge zero,r16,242a8 <___vfprintf_internal_r+0xaa4> - 241f0: 04400404 movi r17,16 - 241f4: d8801f17 ldw r2,124(sp) - 241f8: 8c04a20e bge r17,r16,25484 <___vfprintf_internal_r+0x1c80> - 241fc: 014000f4 movhi r5,3 - 24200: 294a5e84 addi r5,r5,10618 - 24204: d9403515 stw r5,212(sp) - 24208: 048001c4 movi r18,7 - 2420c: dcc02c17 ldw r19,176(sp) - 24210: 00000306 br 24220 <___vfprintf_internal_r+0xa1c> - 24214: 843ffc04 addi r16,r16,-16 - 24218: 42000204 addi r8,r8,8 - 2421c: 8c00130e bge r17,r16,2426c <___vfprintf_internal_r+0xa68> - 24220: 010000f4 movhi r4,3 - 24224: 18c00404 addi r3,r3,16 - 24228: 10800044 addi r2,r2,1 - 2422c: 210a5e84 addi r4,r4,10618 - 24230: 41000015 stw r4,0(r8) - 24234: 44400115 stw r17,4(r8) - 24238: d8c02015 stw r3,128(sp) - 2423c: d8801f15 stw r2,124(sp) - 24240: 90bff40e bge r18,r2,24214 <___vfprintf_internal_r+0xa10> - 24244: d9801e04 addi r6,sp,120 - 24248: b80b883a mov r5,r23 - 2424c: 9809883a mov r4,r19 - 24250: 002a7d00 call 2a7d0 <__sprint_r> - 24254: 103e6d1e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> - 24258: 843ffc04 addi r16,r16,-16 - 2425c: d8c02017 ldw r3,128(sp) - 24260: d8801f17 ldw r2,124(sp) - 24264: da000404 addi r8,sp,16 - 24268: 8c3fed16 blt r17,r16,24220 <___vfprintf_internal_r+0xa1c> - 2426c: d9403517 ldw r5,212(sp) - 24270: 1c07883a add r3,r3,r16 - 24274: 10800044 addi r2,r2,1 - 24278: 41400015 stw r5,0(r8) - 2427c: 44000115 stw r16,4(r8) - 24280: d8c02015 stw r3,128(sp) - 24284: d8801f15 stw r2,124(sp) - 24288: 010001c4 movi r4,7 - 2428c: 2080060e bge r4,r2,242a8 <___vfprintf_internal_r+0xaa4> - 24290: d9002c17 ldw r4,176(sp) - 24294: d9801e04 addi r6,sp,120 - 24298: b80b883a mov r5,r23 - 2429c: 002a7d00 call 2a7d0 <__sprint_r> - 242a0: 103e5a1e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> - 242a4: d8c02017 ldw r3,128(sp) - 242a8: d8803117 ldw r2,196(sp) - 242ac: d9002a17 ldw r4,168(sp) - 242b0: 1100010e bge r2,r4,242b8 <___vfprintf_internal_r+0xab4> - 242b4: 2005883a mov r2,r4 - 242b8: d9402f17 ldw r5,188(sp) - 242bc: 288b883a add r5,r5,r2 - 242c0: d9402f15 stw r5,188(sp) - 242c4: 18019e1e bne r3,zero,24940 <___vfprintf_internal_r+0x113c> - 242c8: a8800007 ldb r2,0(r21) - 242cc: d8001f15 stw zero,124(sp) - 242d0: da000404 addi r8,sp,16 - 242d4: 103d851e bne r2,zero,238ec <___vfprintf_internal_r+0xe8> - 242d8: a821883a mov r16,r21 - 242dc: 003d9b06 br 2394c <___vfprintf_internal_r+0x148> - 242e0: 18c03fcc andi r3,r3,255 - 242e4: 1805c11e bne r3,zero,259ec <___vfprintf_internal_r+0x21e8> - 242e8: 94800414 ori r18,r18,16 - 242ec: 9080080c andi r2,r18,32 - 242f0: 10020c26 beq r2,zero,24b24 <___vfprintf_internal_r+0x1320> - 242f4: d8802d17 ldw r2,180(sp) - 242f8: d9002917 ldw r4,164(sp) - 242fc: d8002785 stb zero,158(sp) - 24300: 10c00204 addi r3,r2,8 - 24304: 14c00017 ldw r19,0(r2) - 24308: 15800117 ldw r22,4(r2) - 2430c: 20040f16 blt r4,zero,2534c <___vfprintf_internal_r+0x1b48> - 24310: 013fdfc4 movi r4,-129 - 24314: 9d84b03a or r2,r19,r22 - 24318: d8c02d15 stw r3,180(sp) - 2431c: 9124703a and r18,r18,r4 - 24320: 0039883a mov fp,zero - 24324: 103e891e bne r2,zero,23d4c <___vfprintf_internal_r+0x548> - 24328: d9002917 ldw r4,164(sp) - 2432c: 2002c11e bne r4,zero,24e34 <___vfprintf_internal_r+0x1630> - 24330: d8002915 stw zero,164(sp) - 24334: d8002e15 stw zero,184(sp) - 24338: dc001e04 addi r16,sp,120 - 2433c: 003ef806 br 23f20 <___vfprintf_internal_r+0x71c> - 24340: 18c03fcc andi r3,r3,255 - 24344: 18059d1e bne r3,zero,259bc <___vfprintf_internal_r+0x21b8> - 24348: 014000f4 movhi r5,3 - 2434c: 294a4e04 addi r5,r5,10552 - 24350: d9403915 stw r5,228(sp) - 24354: 9080080c andi r2,r18,32 - 24358: 10005226 beq r2,zero,244a4 <___vfprintf_internal_r+0xca0> - 2435c: d8802d17 ldw r2,180(sp) - 24360: 14c00017 ldw r19,0(r2) - 24364: 15800117 ldw r22,4(r2) - 24368: 10800204 addi r2,r2,8 - 2436c: d8802d15 stw r2,180(sp) - 24370: 9080004c andi r2,r18,1 - 24374: 10019026 beq r2,zero,249b8 <___vfprintf_internal_r+0x11b4> - 24378: 9d84b03a or r2,r19,r22 - 2437c: 10036926 beq r2,zero,25124 <___vfprintf_internal_r+0x1920> - 24380: d8c02917 ldw r3,164(sp) - 24384: 00800c04 movi r2,48 - 24388: d8802705 stb r2,156(sp) - 2438c: dc402745 stb r17,157(sp) - 24390: d8002785 stb zero,158(sp) - 24394: 90800094 ori r2,r18,2 - 24398: 18045d16 blt r3,zero,25510 <___vfprintf_internal_r+0x1d0c> - 2439c: 00bfdfc4 movi r2,-129 - 243a0: 90a4703a and r18,r18,r2 - 243a4: 94800094 ori r18,r18,2 - 243a8: 0039883a mov fp,zero - 243ac: d9003917 ldw r4,228(sp) - 243b0: dc001e04 addi r16,sp,120 - 243b4: 988003cc andi r2,r19,15 - 243b8: b006973a slli r3,r22,28 - 243bc: 2085883a add r2,r4,r2 - 243c0: 9826d13a srli r19,r19,4 - 243c4: 10800003 ldbu r2,0(r2) - 243c8: b02cd13a srli r22,r22,4 - 243cc: 843fffc4 addi r16,r16,-1 - 243d0: 1ce6b03a or r19,r3,r19 - 243d4: 80800005 stb r2,0(r16) - 243d8: 9d84b03a or r2,r19,r22 - 243dc: 103ff51e bne r2,zero,243b4 <___vfprintf_internal_r+0xbb0> - 243e0: d8c02817 ldw r3,160(sp) - 243e4: 1c07c83a sub r3,r3,r16 - 243e8: d8c02e15 stw r3,184(sp) - 243ec: 003ecc06 br 23f20 <___vfprintf_internal_r+0x71c> - 243f0: 18c03fcc andi r3,r3,255 - 243f4: 183e9f26 beq r3,zero,23e74 <___vfprintf_internal_r+0x670> - 243f8: d9c02785 stb r7,158(sp) - 243fc: 003e9d06 br 23e74 <___vfprintf_internal_r+0x670> - 24400: 00c00044 movi r3,1 - 24404: 01c00ac4 movi r7,43 - 24408: ac400007 ldb r17,0(r21) - 2440c: 003d5e06 br 23988 <___vfprintf_internal_r+0x184> - 24410: 94800814 ori r18,r18,32 - 24414: ac400007 ldb r17,0(r21) - 24418: 003d5b06 br 23988 <___vfprintf_internal_r+0x184> - 2441c: d8c02d17 ldw r3,180(sp) - 24420: d8002785 stb zero,158(sp) - 24424: 1c000017 ldw r16,0(r3) - 24428: 1cc00104 addi r19,r3,4 - 2442c: 80041926 beq r16,zero,25494 <___vfprintf_internal_r+0x1c90> - 24430: d9002917 ldw r4,164(sp) - 24434: 2003d016 blt r4,zero,25378 <___vfprintf_internal_r+0x1b74> - 24438: 200d883a mov r6,r4 - 2443c: 000b883a mov r5,zero - 24440: 8009883a mov r4,r16 - 24444: da003d15 stw r8,244(sp) - 24448: 00288080 call 28808 - 2444c: da003d17 ldw r8,244(sp) - 24450: 10045426 beq r2,zero,255a4 <___vfprintf_internal_r+0x1da0> - 24454: 1405c83a sub r2,r2,r16 - 24458: d8802e15 stw r2,184(sp) - 2445c: 1003cc16 blt r2,zero,25390 <___vfprintf_internal_r+0x1b8c> - 24460: df002783 ldbu fp,158(sp) - 24464: d8802a15 stw r2,168(sp) - 24468: dcc02d15 stw r19,180(sp) - 2446c: d8002915 stw zero,164(sp) - 24470: d8003215 stw zero,200(sp) - 24474: 003eb006 br 23f38 <___vfprintf_internal_r+0x734> - 24478: 18c03fcc andi r3,r3,255 - 2447c: 183f9b26 beq r3,zero,242ec <___vfprintf_internal_r+0xae8> - 24480: d9c02785 stb r7,158(sp) - 24484: 003f9906 br 242ec <___vfprintf_internal_r+0xae8> - 24488: 18c03fcc andi r3,r3,255 - 2448c: 1805551e bne r3,zero,259e4 <___vfprintf_internal_r+0x21e0> - 24490: 014000f4 movhi r5,3 - 24494: 294a5304 addi r5,r5,10572 - 24498: d9403915 stw r5,228(sp) - 2449c: 9080080c andi r2,r18,32 - 244a0: 103fae1e bne r2,zero,2435c <___vfprintf_internal_r+0xb58> - 244a4: 9080040c andi r2,r18,16 - 244a8: 1002de26 beq r2,zero,25024 <___vfprintf_internal_r+0x1820> - 244ac: d8c02d17 ldw r3,180(sp) - 244b0: 002d883a mov r22,zero - 244b4: 1cc00017 ldw r19,0(r3) - 244b8: 18c00104 addi r3,r3,4 - 244bc: d8c02d15 stw r3,180(sp) - 244c0: 003fab06 br 24370 <___vfprintf_internal_r+0xb6c> - 244c4: 38803fcc andi r2,r7,255 - 244c8: 1080201c xori r2,r2,128 - 244cc: 10bfe004 addi r2,r2,-128 - 244d0: 1002d21e bne r2,zero,2501c <___vfprintf_internal_r+0x1818> - 244d4: 00c00044 movi r3,1 - 244d8: 01c00804 movi r7,32 - 244dc: ac400007 ldb r17,0(r21) - 244e0: 003d2906 br 23988 <___vfprintf_internal_r+0x184> - 244e4: 94800054 ori r18,r18,1 - 244e8: ac400007 ldb r17,0(r21) - 244ec: 003d2606 br 23988 <___vfprintf_internal_r+0x184> - 244f0: 18c03fcc andi r3,r3,255 - 244f4: 183e0526 beq r3,zero,23d0c <___vfprintf_internal_r+0x508> - 244f8: d9c02785 stb r7,158(sp) - 244fc: 003e0306 br 23d0c <___vfprintf_internal_r+0x508> - 24500: 94801014 ori r18,r18,64 - 24504: ac400007 ldb r17,0(r21) - 24508: 003d1f06 br 23988 <___vfprintf_internal_r+0x184> - 2450c: ac400007 ldb r17,0(r21) - 24510: 8a438726 beq r17,r9,25330 <___vfprintf_internal_r+0x1b2c> - 24514: 94800414 ori r18,r18,16 - 24518: 003d1b06 br 23988 <___vfprintf_internal_r+0x184> - 2451c: 18c03fcc andi r3,r3,255 - 24520: 1805341e bne r3,zero,259f4 <___vfprintf_internal_r+0x21f0> - 24524: 9080080c andi r2,r18,32 - 24528: 1002cd26 beq r2,zero,25060 <___vfprintf_internal_r+0x185c> - 2452c: d9402d17 ldw r5,180(sp) - 24530: d9002f17 ldw r4,188(sp) - 24534: 28800017 ldw r2,0(r5) - 24538: 2007d7fa srai r3,r4,31 - 2453c: 29400104 addi r5,r5,4 - 24540: d9402d15 stw r5,180(sp) - 24544: 11000015 stw r4,0(r2) - 24548: 10c00115 stw r3,4(r2) - 2454c: 003ce506 br 238e4 <___vfprintf_internal_r+0xe0> - 24550: d8c02d17 ldw r3,180(sp) - 24554: d9002d17 ldw r4,180(sp) - 24558: d8002785 stb zero,158(sp) - 2455c: 18800017 ldw r2,0(r3) - 24560: 21000104 addi r4,r4,4 - 24564: 00c00044 movi r3,1 - 24568: d8c02a15 stw r3,168(sp) - 2456c: d8801405 stb r2,80(sp) - 24570: d9002d15 stw r4,180(sp) - 24574: d8c02e15 stw r3,184(sp) - 24578: d8002915 stw zero,164(sp) - 2457c: d8003215 stw zero,200(sp) - 24580: dc001404 addi r16,sp,80 - 24584: 0039883a mov fp,zero - 24588: 003e7206 br 23f54 <___vfprintf_internal_r+0x750> - 2458c: 010000f4 movhi r4,3 - 24590: 210a5304 addi r4,r4,10572 - 24594: 0039883a mov fp,zero - 24598: d9003915 stw r4,228(sp) - 2459c: 04401e04 movi r17,120 - 245a0: 003f8206 br 243ac <___vfprintf_internal_r+0xba8> - 245a4: 18c03fcc andi r3,r3,255 - 245a8: 1805061e bne r3,zero,259c4 <___vfprintf_internal_r+0x21c0> - 245ac: 883d9126 beq r17,zero,23bf4 <___vfprintf_internal_r+0x3f0> - 245b0: 00c00044 movi r3,1 - 245b4: d8c02a15 stw r3,168(sp) - 245b8: dc401405 stb r17,80(sp) - 245bc: d8002785 stb zero,158(sp) - 245c0: 003fec06 br 24574 <___vfprintf_internal_r+0xd70> - 245c4: 014000f4 movhi r5,3 - 245c8: 294a5304 addi r5,r5,10572 - 245cc: d9403915 stw r5,228(sp) - 245d0: d8c02d15 stw r3,180(sp) - 245d4: 1025883a mov r18,r2 - 245d8: 04401e04 movi r17,120 - 245dc: 9d84b03a or r2,r19,r22 - 245e0: 1000fc1e bne r2,zero,249d4 <___vfprintf_internal_r+0x11d0> - 245e4: 0039883a mov fp,zero - 245e8: 00800084 movi r2,2 - 245ec: 10803fcc andi r2,r2,255 - 245f0: 00c00044 movi r3,1 - 245f4: 10c20f26 beq r2,r3,24e34 <___vfprintf_internal_r+0x1630> - 245f8: 00c00084 movi r3,2 - 245fc: 10fd6326 beq r2,r3,23b8c <___vfprintf_internal_r+0x388> - 24600: 003e2d06 br 23eb8 <___vfprintf_internal_r+0x6b4> - 24604: d8c02017 ldw r3,128(sp) - 24608: 003e9306 br 24058 <___vfprintf_internal_r+0x854> - 2460c: 00801944 movi r2,101 - 24610: 14407e0e bge r2,r17,2480c <___vfprintf_internal_r+0x1008> - 24614: d9003617 ldw r4,216(sp) - 24618: d9403817 ldw r5,224(sp) - 2461c: 000d883a mov r6,zero - 24620: 000f883a mov r7,zero - 24624: d8c03c15 stw r3,240(sp) - 24628: da003d15 stw r8,244(sp) - 2462c: 002e2940 call 2e294 <__eqdf2> - 24630: d8c03c17 ldw r3,240(sp) - 24634: da003d17 ldw r8,244(sp) - 24638: 1000f71e bne r2,zero,24a18 <___vfprintf_internal_r+0x1214> - 2463c: d8801f17 ldw r2,124(sp) - 24640: 010000f4 movhi r4,3 - 24644: 210a5a04 addi r4,r4,10600 - 24648: 18c00044 addi r3,r3,1 - 2464c: 10800044 addi r2,r2,1 - 24650: 41000015 stw r4,0(r8) - 24654: 01000044 movi r4,1 - 24658: 41000115 stw r4,4(r8) - 2465c: d8c02015 stw r3,128(sp) - 24660: d8801f15 stw r2,124(sp) - 24664: 010001c4 movi r4,7 - 24668: 2082b816 blt r4,r2,2514c <___vfprintf_internal_r+0x1948> - 2466c: 42000204 addi r8,r8,8 - 24670: d8802617 ldw r2,152(sp) - 24674: d9403317 ldw r5,204(sp) - 24678: 11400216 blt r2,r5,24684 <___vfprintf_internal_r+0xe80> - 2467c: 9080004c andi r2,r18,1 - 24680: 103ed526 beq r2,zero,241d8 <___vfprintf_internal_r+0x9d4> - 24684: d8803717 ldw r2,220(sp) - 24688: d9003417 ldw r4,208(sp) - 2468c: d9403717 ldw r5,220(sp) - 24690: 1887883a add r3,r3,r2 - 24694: d8801f17 ldw r2,124(sp) - 24698: 41000015 stw r4,0(r8) - 2469c: 41400115 stw r5,4(r8) - 246a0: 10800044 addi r2,r2,1 - 246a4: d8c02015 stw r3,128(sp) - 246a8: d8801f15 stw r2,124(sp) - 246ac: 010001c4 movi r4,7 - 246b0: 20832916 blt r4,r2,25358 <___vfprintf_internal_r+0x1b54> - 246b4: 42000204 addi r8,r8,8 - 246b8: d8803317 ldw r2,204(sp) - 246bc: 143fffc4 addi r16,r2,-1 - 246c0: 043ec50e bge zero,r16,241d8 <___vfprintf_internal_r+0x9d4> - 246c4: 04400404 movi r17,16 - 246c8: d8801f17 ldw r2,124(sp) - 246cc: 8c00880e bge r17,r16,248f0 <___vfprintf_internal_r+0x10ec> - 246d0: 014000f4 movhi r5,3 - 246d4: 294a5a84 addi r5,r5,10602 - 246d8: d9402b15 stw r5,172(sp) - 246dc: 058001c4 movi r22,7 - 246e0: dcc02c17 ldw r19,176(sp) - 246e4: 00000306 br 246f4 <___vfprintf_internal_r+0xef0> - 246e8: 42000204 addi r8,r8,8 - 246ec: 843ffc04 addi r16,r16,-16 - 246f0: 8c00820e bge r17,r16,248fc <___vfprintf_internal_r+0x10f8> - 246f4: 18c00404 addi r3,r3,16 - 246f8: 10800044 addi r2,r2,1 - 246fc: 45000015 stw r20,0(r8) - 24700: 44400115 stw r17,4(r8) - 24704: d8c02015 stw r3,128(sp) - 24708: d8801f15 stw r2,124(sp) - 2470c: b0bff60e bge r22,r2,246e8 <___vfprintf_internal_r+0xee4> - 24710: d9801e04 addi r6,sp,120 - 24714: b80b883a mov r5,r23 - 24718: 9809883a mov r4,r19 - 2471c: 002a7d00 call 2a7d0 <__sprint_r> - 24720: 103d3a1e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> - 24724: d8c02017 ldw r3,128(sp) - 24728: d8801f17 ldw r2,124(sp) - 2472c: da000404 addi r8,sp,16 - 24730: 003fee06 br 246ec <___vfprintf_internal_r+0xee8> - 24734: d9403117 ldw r5,196(sp) - 24738: d8802a17 ldw r2,168(sp) - 2473c: 28adc83a sub r22,r5,r2 - 24740: 05be630e bge zero,r22,240d0 <___vfprintf_internal_r+0x8cc> - 24744: 07000404 movi fp,16 - 24748: d8801f17 ldw r2,124(sp) - 2474c: e5838f0e bge fp,r22,2558c <___vfprintf_internal_r+0x1d88> - 24750: 014000f4 movhi r5,3 - 24754: 294a5a84 addi r5,r5,10602 - 24758: dc403015 stw r17,192(sp) - 2475c: d9402b15 stw r5,172(sp) - 24760: b023883a mov r17,r22 - 24764: 04c001c4 movi r19,7 - 24768: a82d883a mov r22,r21 - 2476c: 902b883a mov r21,r18 - 24770: 8025883a mov r18,r16 - 24774: dc002c17 ldw r16,176(sp) - 24778: 00000306 br 24788 <___vfprintf_internal_r+0xf84> - 2477c: 8c7ffc04 addi r17,r17,-16 - 24780: 42000204 addi r8,r8,8 - 24784: e440110e bge fp,r17,247cc <___vfprintf_internal_r+0xfc8> - 24788: 18c00404 addi r3,r3,16 - 2478c: 10800044 addi r2,r2,1 - 24790: 45000015 stw r20,0(r8) - 24794: 47000115 stw fp,4(r8) - 24798: d8c02015 stw r3,128(sp) - 2479c: d8801f15 stw r2,124(sp) - 247a0: 98bff60e bge r19,r2,2477c <___vfprintf_internal_r+0xf78> - 247a4: d9801e04 addi r6,sp,120 - 247a8: b80b883a mov r5,r23 - 247ac: 8009883a mov r4,r16 - 247b0: 002a7d00 call 2a7d0 <__sprint_r> - 247b4: 103d151e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> - 247b8: 8c7ffc04 addi r17,r17,-16 - 247bc: d8c02017 ldw r3,128(sp) - 247c0: d8801f17 ldw r2,124(sp) - 247c4: da000404 addi r8,sp,16 - 247c8: e47fef16 blt fp,r17,24788 <___vfprintf_internal_r+0xf84> - 247cc: 9021883a mov r16,r18 - 247d0: a825883a mov r18,r21 - 247d4: b02b883a mov r21,r22 - 247d8: 882d883a mov r22,r17 - 247dc: dc403017 ldw r17,192(sp) - 247e0: d9002b17 ldw r4,172(sp) - 247e4: 1d87883a add r3,r3,r22 - 247e8: 10800044 addi r2,r2,1 - 247ec: 41000015 stw r4,0(r8) - 247f0: 45800115 stw r22,4(r8) +00023240 <___vfprintf_internal_r>: + 23240: deffb804 addi sp,sp,-288 + 23244: dfc04715 stw ra,284(sp) + 23248: ddc04515 stw r23,276(sp) + 2324c: dd404315 stw r21,268(sp) + 23250: d9002c15 stw r4,176(sp) + 23254: 282f883a mov r23,r5 + 23258: 302b883a mov r21,r6 + 2325c: d9c02d15 stw r7,180(sp) + 23260: df004615 stw fp,280(sp) + 23264: dd804415 stw r22,272(sp) + 23268: dd004215 stw r20,264(sp) + 2326c: dcc04115 stw r19,260(sp) + 23270: dc804015 stw r18,256(sp) + 23274: dc403f15 stw r17,252(sp) + 23278: dc003e15 stw r16,248(sp) + 2327c: 00280580 call 28058 <_localeconv_r> + 23280: 10800017 ldw r2,0(r2) + 23284: 1009883a mov r4,r2 + 23288: d8803415 stw r2,208(sp) + 2328c: 00231a80 call 231a8 + 23290: d8803715 stw r2,220(sp) + 23294: d8802c17 ldw r2,176(sp) + 23298: 10000226 beq r2,zero,232a4 <___vfprintf_internal_r+0x64> + 2329c: 10800e17 ldw r2,56(r2) + 232a0: 1000f926 beq r2,zero,23688 <___vfprintf_internal_r+0x448> + 232a4: b880030b ldhu r2,12(r23) + 232a8: 10c8000c andi r3,r2,8192 + 232ac: 1800061e bne r3,zero,232c8 <___vfprintf_internal_r+0x88> + 232b0: b9001917 ldw r4,100(r23) + 232b4: 00f7ffc4 movi r3,-8193 + 232b8: 10880014 ori r2,r2,8192 + 232bc: 20c6703a and r3,r4,r3 + 232c0: b880030d sth r2,12(r23) + 232c4: b8c01915 stw r3,100(r23) + 232c8: 10c0020c andi r3,r2,8 + 232cc: 1800c126 beq r3,zero,235d4 <___vfprintf_internal_r+0x394> + 232d0: b8c00417 ldw r3,16(r23) + 232d4: 1800bf26 beq r3,zero,235d4 <___vfprintf_internal_r+0x394> + 232d8: 1080068c andi r2,r2,26 + 232dc: 00c00284 movi r3,10 + 232e0: 10c0c426 beq r2,r3,235f4 <___vfprintf_internal_r+0x3b4> + 232e4: d8c00404 addi r3,sp,16 + 232e8: 050000f4 movhi r20,3 + 232ec: d9001e04 addi r4,sp,120 + 232f0: a5080c84 addi r20,r20,8242 + 232f4: d8c01e15 stw r3,120(sp) + 232f8: d8002015 stw zero,128(sp) + 232fc: d8001f15 stw zero,124(sp) + 23300: d8003315 stw zero,204(sp) + 23304: d8003615 stw zero,216(sp) + 23308: d8003815 stw zero,224(sp) + 2330c: 1811883a mov r8,r3 + 23310: d8003915 stw zero,228(sp) + 23314: d8003a15 stw zero,232(sp) + 23318: d8002f15 stw zero,188(sp) + 2331c: d9002815 stw r4,160(sp) + 23320: a8800007 ldb r2,0(r21) + 23324: 10027b26 beq r2,zero,23d14 <___vfprintf_internal_r+0xad4> + 23328: 00c00944 movi r3,37 + 2332c: a821883a mov r16,r21 + 23330: 10c0021e bne r2,r3,2333c <___vfprintf_internal_r+0xfc> + 23334: 00001406 br 23388 <___vfprintf_internal_r+0x148> + 23338: 10c00326 beq r2,r3,23348 <___vfprintf_internal_r+0x108> + 2333c: 84000044 addi r16,r16,1 + 23340: 80800007 ldb r2,0(r16) + 23344: 103ffc1e bne r2,zero,23338 <_gp+0xfffe6e00> + 23348: 8563c83a sub r17,r16,r21 + 2334c: 88000e26 beq r17,zero,23388 <___vfprintf_internal_r+0x148> + 23350: d8c02017 ldw r3,128(sp) + 23354: d8801f17 ldw r2,124(sp) + 23358: 45400015 stw r21,0(r8) + 2335c: 1c47883a add r3,r3,r17 + 23360: 10800044 addi r2,r2,1 + 23364: d8c02015 stw r3,128(sp) + 23368: 44400115 stw r17,4(r8) + 2336c: d8801f15 stw r2,124(sp) + 23370: 00c001c4 movi r3,7 + 23374: 1880a716 blt r3,r2,23614 <___vfprintf_internal_r+0x3d4> + 23378: 42000204 addi r8,r8,8 + 2337c: d9402f17 ldw r5,188(sp) + 23380: 2c4b883a add r5,r5,r17 + 23384: d9402f15 stw r5,188(sp) + 23388: 80800007 ldb r2,0(r16) + 2338c: 1000a826 beq r2,zero,23630 <___vfprintf_internal_r+0x3f0> + 23390: 84400047 ldb r17,1(r16) + 23394: 00bfffc4 movi r2,-1 + 23398: 85400044 addi r21,r16,1 + 2339c: d8002785 stb zero,158(sp) + 233a0: 0007883a mov r3,zero + 233a4: 000f883a mov r7,zero + 233a8: d8802915 stw r2,164(sp) + 233ac: d8003115 stw zero,196(sp) + 233b0: 0025883a mov r18,zero + 233b4: 01401604 movi r5,88 + 233b8: 01800244 movi r6,9 + 233bc: 02800a84 movi r10,42 + 233c0: 02401b04 movi r9,108 + 233c4: ad400044 addi r21,r21,1 + 233c8: 88bff804 addi r2,r17,-32 + 233cc: 28830436 bltu r5,r2,23fe0 <___vfprintf_internal_r+0xda0> + 233d0: 100490ba slli r2,r2,2 + 233d4: 010000b4 movhi r4,2 + 233d8: 210cfa04 addi r4,r4,13288 + 233dc: 1105883a add r2,r2,r4 + 233e0: 10800017 ldw r2,0(r2) + 233e4: 1000683a jmp r2 + 233e8: 00023f00 call 23f0 <__alt_mem_onchip_memory2_0-0x1dc10> + 233ec: 00023fe0 cmpeqi zero,zero,2303 + 233f0: 00023fe0 cmpeqi zero,zero,2303 + 233f4: 00023f20 cmpeqi zero,zero,2300 + 233f8: 00023fe0 cmpeqi zero,zero,2303 + 233fc: 00023fe0 cmpeqi zero,zero,2303 + 23400: 00023fe0 cmpeqi zero,zero,2303 + 23404: 00023fe0 cmpeqi zero,zero,2303 + 23408: 00023fe0 cmpeqi zero,zero,2303 + 2340c: 00023fe0 cmpeqi zero,zero,2303 + 23410: 00023694 movui zero,2266 + 23414: 00023e3c xorhi zero,zero,2296 + 23418: 00023fe0 cmpeqi zero,zero,2303 + 2341c: 0002355c xori zero,zero,2261 + 23420: 000236bc xorhi zero,zero,2266 + 23424: 00023fe0 cmpeqi zero,zero,2303 + 23428: 000236fc xorhi zero,zero,2267 + 2342c: 00023708 cmpgei zero,zero,2268 + 23430: 00023708 cmpgei zero,zero,2268 + 23434: 00023708 cmpgei zero,zero,2268 + 23438: 00023708 cmpgei zero,zero,2268 + 2343c: 00023708 cmpgei zero,zero,2268 + 23440: 00023708 cmpgei zero,zero,2268 + 23444: 00023708 cmpgei zero,zero,2268 + 23448: 00023708 cmpgei zero,zero,2268 + 2344c: 00023708 cmpgei zero,zero,2268 + 23450: 00023fe0 cmpeqi zero,zero,2303 + 23454: 00023fe0 cmpeqi zero,zero,2303 + 23458: 00023fe0 cmpeqi zero,zero,2303 + 2345c: 00023fe0 cmpeqi zero,zero,2303 + 23460: 00023fe0 cmpeqi zero,zero,2303 + 23464: 00023fe0 cmpeqi zero,zero,2303 + 23468: 00023fe0 cmpeqi zero,zero,2303 + 2346c: 00023fe0 cmpeqi zero,zero,2303 + 23470: 00023fe0 cmpeqi zero,zero,2303 + 23474: 00023fe0 cmpeqi zero,zero,2303 + 23478: 0002373c xorhi zero,zero,2268 + 2347c: 000237f8 rdprs zero,zero,2271 + 23480: 00023fe0 cmpeqi zero,zero,2303 + 23484: 000237f8 rdprs zero,zero,2271 + 23488: 00023fe0 cmpeqi zero,zero,2303 + 2348c: 00023fe0 cmpeqi zero,zero,2303 + 23490: 00023fe0 cmpeqi zero,zero,2303 + 23494: 00023fe0 cmpeqi zero,zero,2303 + 23498: 00023898 cmpnei zero,zero,2274 + 2349c: 00023fe0 cmpeqi zero,zero,2303 + 234a0: 00023fe0 cmpeqi zero,zero,2303 + 234a4: 000238a4 muli zero,zero,2274 + 234a8: 00023fe0 cmpeqi zero,zero,2303 + 234ac: 00023fe0 cmpeqi zero,zero,2303 + 234b0: 00023fe0 cmpeqi zero,zero,2303 + 234b4: 00023fe0 cmpeqi zero,zero,2303 + 234b8: 00023fe0 cmpeqi zero,zero,2303 + 234bc: 00023d1c xori zero,zero,2292 + 234c0: 00023fe0 cmpeqi zero,zero,2303 + 234c4: 00023fe0 cmpeqi zero,zero,2303 + 234c8: 00023d7c xorhi zero,zero,2293 + 234cc: 00023fe0 cmpeqi zero,zero,2303 + 234d0: 00023fe0 cmpeqi zero,zero,2303 + 234d4: 00023fe0 cmpeqi zero,zero,2303 + 234d8: 00023fe0 cmpeqi zero,zero,2303 + 234dc: 00023fe0 cmpeqi zero,zero,2303 + 234e0: 00023fe0 cmpeqi zero,zero,2303 + 234e4: 00023fe0 cmpeqi zero,zero,2303 + 234e8: 00023fe0 cmpeqi zero,zero,2303 + 234ec: 00023fe0 cmpeqi zero,zero,2303 + 234f0: 00023fe0 cmpeqi zero,zero,2303 + 234f4: 00023f8c andi zero,zero,2302 + 234f8: 00023f2c andhi zero,zero,2300 + 234fc: 000237f8 rdprs zero,zero,2271 + 23500: 000237f8 rdprs zero,zero,2271 + 23504: 000237f8 rdprs zero,zero,2271 + 23508: 00023f3c xorhi zero,zero,2300 + 2350c: 00023f2c andhi zero,zero,2300 + 23510: 00023fe0 cmpeqi zero,zero,2303 + 23514: 00023fe0 cmpeqi zero,zero,2303 + 23518: 00023f48 cmpgei zero,zero,2301 + 2351c: 00023fe0 cmpeqi zero,zero,2303 + 23520: 00023f58 cmpnei zero,zero,2301 + 23524: 00023e2c andhi zero,zero,2296 + 23528: 00023568 cmpgeui zero,zero,2261 + 2352c: 00023e4c andi zero,zero,2297 + 23530: 00023fe0 cmpeqi zero,zero,2303 + 23534: 00023e58 cmpnei zero,zero,2297 + 23538: 00023fe0 cmpeqi zero,zero,2303 + 2353c: 00023eb4 movhi zero,2298 + 23540: 00023fe0 cmpeqi zero,zero,2303 + 23544: 00023fe0 cmpeqi zero,zero,2303 + 23548: 00023ec4 movi zero,2299 + 2354c: d9003117 ldw r4,196(sp) + 23550: d8802d15 stw r2,180(sp) + 23554: 0109c83a sub r4,zero,r4 + 23558: d9003115 stw r4,196(sp) + 2355c: 94800114 ori r18,r18,4 + 23560: ac400007 ldb r17,0(r21) + 23564: 003f9706 br 233c4 <_gp+0xfffe6e8c> + 23568: 00800c04 movi r2,48 + 2356c: d9002d17 ldw r4,180(sp) + 23570: d9402917 ldw r5,164(sp) + 23574: d8802705 stb r2,156(sp) + 23578: 00801e04 movi r2,120 + 2357c: d8802745 stb r2,157(sp) + 23580: d8002785 stb zero,158(sp) + 23584: 20c00104 addi r3,r4,4 + 23588: 24c00017 ldw r19,0(r4) + 2358c: 002d883a mov r22,zero + 23590: 90800094 ori r2,r18,2 + 23594: 28029a16 blt r5,zero,24000 <___vfprintf_internal_r+0xdc0> + 23598: 00bfdfc4 movi r2,-129 + 2359c: 90a4703a and r18,r18,r2 + 235a0: d8c02d15 stw r3,180(sp) + 235a4: 94800094 ori r18,r18,2 + 235a8: 9802871e bne r19,zero,23fc8 <___vfprintf_internal_r+0xd88> + 235ac: 008000f4 movhi r2,3 + 235b0: 10880504 addi r2,r2,8212 + 235b4: d8803915 stw r2,228(sp) + 235b8: 04401e04 movi r17,120 + 235bc: d8802917 ldw r2,164(sp) + 235c0: 0039883a mov fp,zero + 235c4: 1001e926 beq r2,zero,23d6c <___vfprintf_internal_r+0xb2c> + 235c8: 0027883a mov r19,zero + 235cc: 002d883a mov r22,zero + 235d0: 00020506 br 23de8 <___vfprintf_internal_r+0xba8> + 235d4: d9002c17 ldw r4,176(sp) + 235d8: b80b883a mov r5,r23 + 235dc: 00255100 call 25510 <__swsetup_r> + 235e0: 1005ac1e bne r2,zero,24c94 <___vfprintf_internal_r+0x1a54> + 235e4: b880030b ldhu r2,12(r23) + 235e8: 00c00284 movi r3,10 + 235ec: 1080068c andi r2,r2,26 + 235f0: 10ff3c1e bne r2,r3,232e4 <_gp+0xfffe6dac> + 235f4: b880038f ldh r2,14(r23) + 235f8: 103f3a16 blt r2,zero,232e4 <_gp+0xfffe6dac> + 235fc: d9c02d17 ldw r7,180(sp) + 23600: d9002c17 ldw r4,176(sp) + 23604: a80d883a mov r6,r21 + 23608: b80b883a mov r5,r23 + 2360c: 00254540 call 25454 <__sbprintf> + 23610: 00001106 br 23658 <___vfprintf_internal_r+0x418> + 23614: d9002c17 ldw r4,176(sp) + 23618: d9801e04 addi r6,sp,120 + 2361c: b80b883a mov r5,r23 + 23620: 002a01c0 call 2a01c <__sprint_r> + 23624: 1000081e bne r2,zero,23648 <___vfprintf_internal_r+0x408> + 23628: da000404 addi r8,sp,16 + 2362c: 003f5306 br 2337c <_gp+0xfffe6e44> + 23630: d8802017 ldw r2,128(sp) + 23634: 10000426 beq r2,zero,23648 <___vfprintf_internal_r+0x408> + 23638: d9002c17 ldw r4,176(sp) + 2363c: d9801e04 addi r6,sp,120 + 23640: b80b883a mov r5,r23 + 23644: 002a01c0 call 2a01c <__sprint_r> + 23648: b880030b ldhu r2,12(r23) + 2364c: 1080100c andi r2,r2,64 + 23650: 1005901e bne r2,zero,24c94 <___vfprintf_internal_r+0x1a54> + 23654: d8802f17 ldw r2,188(sp) + 23658: dfc04717 ldw ra,284(sp) + 2365c: df004617 ldw fp,280(sp) + 23660: ddc04517 ldw r23,276(sp) + 23664: dd804417 ldw r22,272(sp) + 23668: dd404317 ldw r21,268(sp) + 2366c: dd004217 ldw r20,264(sp) + 23670: dcc04117 ldw r19,260(sp) + 23674: dc804017 ldw r18,256(sp) + 23678: dc403f17 ldw r17,252(sp) + 2367c: dc003e17 ldw r16,248(sp) + 23680: dec04804 addi sp,sp,288 + 23684: f800283a ret + 23688: d9002c17 ldw r4,176(sp) + 2368c: 00274e40 call 274e4 <__sinit> + 23690: 003f0406 br 232a4 <_gp+0xfffe6d6c> + 23694: d8802d17 ldw r2,180(sp) + 23698: d9002d17 ldw r4,180(sp) + 2369c: 10800017 ldw r2,0(r2) + 236a0: d8803115 stw r2,196(sp) + 236a4: 20800104 addi r2,r4,4 + 236a8: d9003117 ldw r4,196(sp) + 236ac: 203fa716 blt r4,zero,2354c <_gp+0xfffe7014> + 236b0: d8802d15 stw r2,180(sp) + 236b4: ac400007 ldb r17,0(r21) + 236b8: 003f4206 br 233c4 <_gp+0xfffe6e8c> + 236bc: ac400007 ldb r17,0(r21) + 236c0: aac00044 addi r11,r21,1 + 236c4: 8a872826 beq r17,r10,25368 <___vfprintf_internal_r+0x2128> + 236c8: 88bff404 addi r2,r17,-48 + 236cc: 0009883a mov r4,zero + 236d0: 30867d36 bltu r6,r2,250c8 <___vfprintf_internal_r+0x1e88> + 236d4: 5c400007 ldb r17,0(r11) + 236d8: 210002a4 muli r4,r4,10 + 236dc: 5d400044 addi r21,r11,1 + 236e0: a817883a mov r11,r21 + 236e4: 2089883a add r4,r4,r2 + 236e8: 88bff404 addi r2,r17,-48 + 236ec: 30bff92e bgeu r6,r2,236d4 <_gp+0xfffe719c> + 236f0: 2005c916 blt r4,zero,24e18 <___vfprintf_internal_r+0x1bd8> + 236f4: d9002915 stw r4,164(sp) + 236f8: 003f3306 br 233c8 <_gp+0xfffe6e90> + 236fc: 94802014 ori r18,r18,128 + 23700: ac400007 ldb r17,0(r21) + 23704: 003f2f06 br 233c4 <_gp+0xfffe6e8c> + 23708: a809883a mov r4,r21 + 2370c: d8003115 stw zero,196(sp) + 23710: 88bff404 addi r2,r17,-48 + 23714: 0017883a mov r11,zero + 23718: 24400007 ldb r17,0(r4) + 2371c: 5ac002a4 muli r11,r11,10 + 23720: ad400044 addi r21,r21,1 + 23724: a809883a mov r4,r21 + 23728: 12d7883a add r11,r2,r11 + 2372c: 88bff404 addi r2,r17,-48 + 23730: 30bff92e bgeu r6,r2,23718 <_gp+0xfffe71e0> + 23734: dac03115 stw r11,196(sp) + 23738: 003f2306 br 233c8 <_gp+0xfffe6e90> + 2373c: 18c03fcc andi r3,r3,255 + 23740: 18072b1e bne r3,zero,253f0 <___vfprintf_internal_r+0x21b0> + 23744: 94800414 ori r18,r18,16 + 23748: 9080080c andi r2,r18,32 + 2374c: 10037b26 beq r2,zero,2453c <___vfprintf_internal_r+0x12fc> + 23750: d9402d17 ldw r5,180(sp) + 23754: 28800117 ldw r2,4(r5) + 23758: 2cc00017 ldw r19,0(r5) + 2375c: 29400204 addi r5,r5,8 + 23760: d9402d15 stw r5,180(sp) + 23764: 102d883a mov r22,r2 + 23768: 10044b16 blt r2,zero,24898 <___vfprintf_internal_r+0x1658> + 2376c: d9402917 ldw r5,164(sp) + 23770: df002783 ldbu fp,158(sp) + 23774: 2803bc16 blt r5,zero,24668 <___vfprintf_internal_r+0x1428> + 23778: 00ffdfc4 movi r3,-129 + 2377c: 9d84b03a or r2,r19,r22 + 23780: 90e4703a and r18,r18,r3 + 23784: 10017726 beq r2,zero,23d64 <___vfprintf_internal_r+0xb24> + 23788: b0038326 beq r22,zero,24598 <___vfprintf_internal_r+0x1358> + 2378c: dc402a15 stw r17,168(sp) + 23790: dc001e04 addi r16,sp,120 + 23794: b023883a mov r17,r22 + 23798: 402d883a mov r22,r8 + 2379c: 9809883a mov r4,r19 + 237a0: 880b883a mov r5,r17 + 237a4: 01800284 movi r6,10 + 237a8: 000f883a mov r7,zero + 237ac: 002c4140 call 2c414 <__umoddi3> + 237b0: 10800c04 addi r2,r2,48 + 237b4: 843fffc4 addi r16,r16,-1 + 237b8: 9809883a mov r4,r19 + 237bc: 880b883a mov r5,r17 + 237c0: 80800005 stb r2,0(r16) + 237c4: 01800284 movi r6,10 + 237c8: 000f883a mov r7,zero + 237cc: 002be9c0 call 2be9c <__udivdi3> + 237d0: 1027883a mov r19,r2 + 237d4: 10c4b03a or r2,r2,r3 + 237d8: 1823883a mov r17,r3 + 237dc: 103fef1e bne r2,zero,2379c <_gp+0xfffe7264> + 237e0: d8c02817 ldw r3,160(sp) + 237e4: dc402a17 ldw r17,168(sp) + 237e8: b011883a mov r8,r22 + 237ec: 1c07c83a sub r3,r3,r16 + 237f0: d8c02e15 stw r3,184(sp) + 237f4: 00005906 br 2395c <___vfprintf_internal_r+0x71c> + 237f8: 18c03fcc andi r3,r3,255 + 237fc: 1806fa1e bne r3,zero,253e8 <___vfprintf_internal_r+0x21a8> + 23800: 9080020c andi r2,r18,8 + 23804: 10048a26 beq r2,zero,24a30 <___vfprintf_internal_r+0x17f0> + 23808: d8c02d17 ldw r3,180(sp) + 2380c: d9002d17 ldw r4,180(sp) + 23810: d9402d17 ldw r5,180(sp) + 23814: 18c00017 ldw r3,0(r3) + 23818: 21000117 ldw r4,4(r4) + 2381c: 29400204 addi r5,r5,8 + 23820: d8c03615 stw r3,216(sp) + 23824: d9003815 stw r4,224(sp) + 23828: d9402d15 stw r5,180(sp) + 2382c: d9003617 ldw r4,216(sp) + 23830: d9403817 ldw r5,224(sp) + 23834: da003d15 stw r8,244(sp) + 23838: 04000044 movi r16,1 + 2383c: 0029c940 call 29c94 <__fpclassifyd> + 23840: da003d17 ldw r8,244(sp) + 23844: 14041f1e bne r2,r16,248c4 <___vfprintf_internal_r+0x1684> + 23848: d9003617 ldw r4,216(sp) + 2384c: d9403817 ldw r5,224(sp) + 23850: 000d883a mov r6,zero + 23854: 000f883a mov r7,zero + 23858: 002dc440 call 2dc44 <__ledf2> + 2385c: da003d17 ldw r8,244(sp) + 23860: 1005be16 blt r2,zero,24f5c <___vfprintf_internal_r+0x1d1c> + 23864: df002783 ldbu fp,158(sp) + 23868: 008011c4 movi r2,71 + 2386c: 1445330e bge r2,r17,24d3c <___vfprintf_internal_r+0x1afc> + 23870: 040000f4 movhi r16,3 + 23874: 8407fd04 addi r16,r16,8180 + 23878: 00c000c4 movi r3,3 + 2387c: 00bfdfc4 movi r2,-129 + 23880: d8c02a15 stw r3,168(sp) + 23884: 90a4703a and r18,r18,r2 + 23888: d8c02e15 stw r3,184(sp) + 2388c: d8002915 stw zero,164(sp) + 23890: d8003215 stw zero,200(sp) + 23894: 00003706 br 23974 <___vfprintf_internal_r+0x734> + 23898: 94800214 ori r18,r18,8 + 2389c: ac400007 ldb r17,0(r21) + 238a0: 003ec806 br 233c4 <_gp+0xfffe6e8c> + 238a4: 18c03fcc andi r3,r3,255 + 238a8: 1806db1e bne r3,zero,25418 <___vfprintf_internal_r+0x21d8> + 238ac: 94800414 ori r18,r18,16 + 238b0: 9080080c andi r2,r18,32 + 238b4: 1002d826 beq r2,zero,24418 <___vfprintf_internal_r+0x11d8> + 238b8: d9402d17 ldw r5,180(sp) + 238bc: d8c02917 ldw r3,164(sp) + 238c0: d8002785 stb zero,158(sp) + 238c4: 28800204 addi r2,r5,8 + 238c8: 2cc00017 ldw r19,0(r5) + 238cc: 2d800117 ldw r22,4(r5) + 238d0: 18048f16 blt r3,zero,24b10 <___vfprintf_internal_r+0x18d0> + 238d4: 013fdfc4 movi r4,-129 + 238d8: 9d86b03a or r3,r19,r22 + 238dc: d8802d15 stw r2,180(sp) + 238e0: 9124703a and r18,r18,r4 + 238e4: 1802d91e bne r3,zero,2444c <___vfprintf_internal_r+0x120c> + 238e8: d8c02917 ldw r3,164(sp) + 238ec: 0039883a mov fp,zero + 238f0: 1805c326 beq r3,zero,25000 <___vfprintf_internal_r+0x1dc0> + 238f4: 0027883a mov r19,zero + 238f8: 002d883a mov r22,zero + 238fc: dc001e04 addi r16,sp,120 + 23900: 9806d0fa srli r3,r19,3 + 23904: b008977a slli r4,r22,29 + 23908: b02cd0fa srli r22,r22,3 + 2390c: 9cc001cc andi r19,r19,7 + 23910: 98800c04 addi r2,r19,48 + 23914: 843fffc4 addi r16,r16,-1 + 23918: 20e6b03a or r19,r4,r3 + 2391c: 80800005 stb r2,0(r16) + 23920: 9d86b03a or r3,r19,r22 + 23924: 183ff61e bne r3,zero,23900 <_gp+0xfffe73c8> + 23928: 90c0004c andi r3,r18,1 + 2392c: 18013b26 beq r3,zero,23e1c <___vfprintf_internal_r+0xbdc> + 23930: 10803fcc andi r2,r2,255 + 23934: 1080201c xori r2,r2,128 + 23938: 10bfe004 addi r2,r2,-128 + 2393c: 00c00c04 movi r3,48 + 23940: 10c13626 beq r2,r3,23e1c <___vfprintf_internal_r+0xbdc> + 23944: 80ffffc5 stb r3,-1(r16) + 23948: d8c02817 ldw r3,160(sp) + 2394c: 80bfffc4 addi r2,r16,-1 + 23950: 1021883a mov r16,r2 + 23954: 1887c83a sub r3,r3,r2 + 23958: d8c02e15 stw r3,184(sp) + 2395c: d8802e17 ldw r2,184(sp) + 23960: d9002917 ldw r4,164(sp) + 23964: 1100010e bge r2,r4,2396c <___vfprintf_internal_r+0x72c> + 23968: 2005883a mov r2,r4 + 2396c: d8802a15 stw r2,168(sp) + 23970: d8003215 stw zero,200(sp) + 23974: e7003fcc andi fp,fp,255 + 23978: e700201c xori fp,fp,128 + 2397c: e73fe004 addi fp,fp,-128 + 23980: e0000326 beq fp,zero,23990 <___vfprintf_internal_r+0x750> + 23984: d8c02a17 ldw r3,168(sp) + 23988: 18c00044 addi r3,r3,1 + 2398c: d8c02a15 stw r3,168(sp) + 23990: 90c0008c andi r3,r18,2 + 23994: d8c02b15 stw r3,172(sp) + 23998: 18000326 beq r3,zero,239a8 <___vfprintf_internal_r+0x768> + 2399c: d8c02a17 ldw r3,168(sp) + 239a0: 18c00084 addi r3,r3,2 + 239a4: d8c02a15 stw r3,168(sp) + 239a8: 90c0210c andi r3,r18,132 + 239ac: d8c03015 stw r3,192(sp) + 239b0: 1801a31e bne r3,zero,24040 <___vfprintf_internal_r+0xe00> + 239b4: d9003117 ldw r4,196(sp) + 239b8: d8c02a17 ldw r3,168(sp) + 239bc: 20e7c83a sub r19,r4,r3 + 239c0: 04c19f0e bge zero,r19,24040 <___vfprintf_internal_r+0xe00> + 239c4: 02400404 movi r9,16 + 239c8: d8c02017 ldw r3,128(sp) + 239cc: d8801f17 ldw r2,124(sp) + 239d0: 4cc50d0e bge r9,r19,24e08 <___vfprintf_internal_r+0x1bc8> + 239d4: 014000f4 movhi r5,3 + 239d8: 29481084 addi r5,r5,8258 + 239dc: dc403b15 stw r17,236(sp) + 239e0: d9403515 stw r5,212(sp) + 239e4: 9823883a mov r17,r19 + 239e8: 482d883a mov r22,r9 + 239ec: 9027883a mov r19,r18 + 239f0: 070001c4 movi fp,7 + 239f4: 8025883a mov r18,r16 + 239f8: dc002c17 ldw r16,176(sp) + 239fc: 00000306 br 23a0c <___vfprintf_internal_r+0x7cc> + 23a00: 8c7ffc04 addi r17,r17,-16 + 23a04: 42000204 addi r8,r8,8 + 23a08: b440130e bge r22,r17,23a58 <___vfprintf_internal_r+0x818> + 23a0c: 010000f4 movhi r4,3 + 23a10: 18c00404 addi r3,r3,16 + 23a14: 10800044 addi r2,r2,1 + 23a18: 21081084 addi r4,r4,8258 + 23a1c: 41000015 stw r4,0(r8) + 23a20: 45800115 stw r22,4(r8) + 23a24: d8c02015 stw r3,128(sp) + 23a28: d8801f15 stw r2,124(sp) + 23a2c: e0bff40e bge fp,r2,23a00 <_gp+0xfffe74c8> + 23a30: d9801e04 addi r6,sp,120 + 23a34: b80b883a mov r5,r23 + 23a38: 8009883a mov r4,r16 + 23a3c: 002a01c0 call 2a01c <__sprint_r> + 23a40: 103f011e bne r2,zero,23648 <_gp+0xfffe7110> + 23a44: 8c7ffc04 addi r17,r17,-16 + 23a48: d8c02017 ldw r3,128(sp) + 23a4c: d8801f17 ldw r2,124(sp) + 23a50: da000404 addi r8,sp,16 + 23a54: b47fed16 blt r22,r17,23a0c <_gp+0xfffe74d4> + 23a58: 9021883a mov r16,r18 + 23a5c: 9825883a mov r18,r19 + 23a60: 8827883a mov r19,r17 + 23a64: dc403b17 ldw r17,236(sp) + 23a68: d9403517 ldw r5,212(sp) + 23a6c: 98c7883a add r3,r19,r3 + 23a70: 10800044 addi r2,r2,1 + 23a74: 41400015 stw r5,0(r8) + 23a78: 44c00115 stw r19,4(r8) + 23a7c: d8c02015 stw r3,128(sp) + 23a80: d8801f15 stw r2,124(sp) + 23a84: 010001c4 movi r4,7 + 23a88: 2082a316 blt r4,r2,24518 <___vfprintf_internal_r+0x12d8> + 23a8c: df002787 ldb fp,158(sp) + 23a90: 42000204 addi r8,r8,8 + 23a94: e0000c26 beq fp,zero,23ac8 <___vfprintf_internal_r+0x888> + 23a98: d8801f17 ldw r2,124(sp) + 23a9c: d9002784 addi r4,sp,158 + 23aa0: 18c00044 addi r3,r3,1 + 23aa4: 10800044 addi r2,r2,1 + 23aa8: 41000015 stw r4,0(r8) + 23aac: 01000044 movi r4,1 + 23ab0: 41000115 stw r4,4(r8) + 23ab4: d8c02015 stw r3,128(sp) + 23ab8: d8801f15 stw r2,124(sp) + 23abc: 010001c4 movi r4,7 + 23ac0: 20823c16 blt r4,r2,243b4 <___vfprintf_internal_r+0x1174> + 23ac4: 42000204 addi r8,r8,8 + 23ac8: d8802b17 ldw r2,172(sp) + 23acc: 10000c26 beq r2,zero,23b00 <___vfprintf_internal_r+0x8c0> + 23ad0: d8801f17 ldw r2,124(sp) + 23ad4: d9002704 addi r4,sp,156 + 23ad8: 18c00084 addi r3,r3,2 + 23adc: 10800044 addi r2,r2,1 + 23ae0: 41000015 stw r4,0(r8) + 23ae4: 01000084 movi r4,2 + 23ae8: 41000115 stw r4,4(r8) + 23aec: d8c02015 stw r3,128(sp) + 23af0: d8801f15 stw r2,124(sp) + 23af4: 010001c4 movi r4,7 + 23af8: 20823616 blt r4,r2,243d4 <___vfprintf_internal_r+0x1194> + 23afc: 42000204 addi r8,r8,8 + 23b00: d9003017 ldw r4,192(sp) + 23b04: 00802004 movi r2,128 + 23b08: 20819926 beq r4,r2,24170 <___vfprintf_internal_r+0xf30> + 23b0c: d9402917 ldw r5,164(sp) + 23b10: d8802e17 ldw r2,184(sp) + 23b14: 28adc83a sub r22,r5,r2 + 23b18: 0580310e bge zero,r22,23be0 <___vfprintf_internal_r+0x9a0> + 23b1c: 07000404 movi fp,16 + 23b20: d8801f17 ldw r2,124(sp) + 23b24: e584140e bge fp,r22,24b78 <___vfprintf_internal_r+0x1938> + 23b28: 014000f4 movhi r5,3 + 23b2c: 29480c84 addi r5,r5,8242 + 23b30: dc402915 stw r17,164(sp) + 23b34: d9402b15 stw r5,172(sp) + 23b38: b023883a mov r17,r22 + 23b3c: 04c001c4 movi r19,7 + 23b40: a82d883a mov r22,r21 + 23b44: 902b883a mov r21,r18 + 23b48: 8025883a mov r18,r16 + 23b4c: dc002c17 ldw r16,176(sp) + 23b50: 00000306 br 23b60 <___vfprintf_internal_r+0x920> + 23b54: 8c7ffc04 addi r17,r17,-16 + 23b58: 42000204 addi r8,r8,8 + 23b5c: e440110e bge fp,r17,23ba4 <___vfprintf_internal_r+0x964> + 23b60: 18c00404 addi r3,r3,16 + 23b64: 10800044 addi r2,r2,1 + 23b68: 45000015 stw r20,0(r8) + 23b6c: 47000115 stw fp,4(r8) + 23b70: d8c02015 stw r3,128(sp) + 23b74: d8801f15 stw r2,124(sp) + 23b78: 98bff60e bge r19,r2,23b54 <_gp+0xfffe761c> + 23b7c: d9801e04 addi r6,sp,120 + 23b80: b80b883a mov r5,r23 + 23b84: 8009883a mov r4,r16 + 23b88: 002a01c0 call 2a01c <__sprint_r> + 23b8c: 103eae1e bne r2,zero,23648 <_gp+0xfffe7110> + 23b90: 8c7ffc04 addi r17,r17,-16 + 23b94: d8c02017 ldw r3,128(sp) + 23b98: d8801f17 ldw r2,124(sp) + 23b9c: da000404 addi r8,sp,16 + 23ba0: e47fef16 blt fp,r17,23b60 <_gp+0xfffe7628> + 23ba4: 9021883a mov r16,r18 + 23ba8: a825883a mov r18,r21 + 23bac: b02b883a mov r21,r22 + 23bb0: 882d883a mov r22,r17 + 23bb4: dc402917 ldw r17,164(sp) + 23bb8: d9002b17 ldw r4,172(sp) + 23bbc: 1d87883a add r3,r3,r22 + 23bc0: 10800044 addi r2,r2,1 + 23bc4: 41000015 stw r4,0(r8) + 23bc8: 45800115 stw r22,4(r8) + 23bcc: d8c02015 stw r3,128(sp) + 23bd0: d8801f15 stw r2,124(sp) + 23bd4: 010001c4 movi r4,7 + 23bd8: 2081ee16 blt r4,r2,24394 <___vfprintf_internal_r+0x1154> + 23bdc: 42000204 addi r8,r8,8 + 23be0: 9080400c andi r2,r18,256 + 23be4: 1001181e bne r2,zero,24048 <___vfprintf_internal_r+0xe08> + 23be8: d9402e17 ldw r5,184(sp) + 23bec: d8801f17 ldw r2,124(sp) + 23bf0: 44000015 stw r16,0(r8) + 23bf4: 1947883a add r3,r3,r5 + 23bf8: 10800044 addi r2,r2,1 + 23bfc: 41400115 stw r5,4(r8) + 23c00: d8c02015 stw r3,128(sp) + 23c04: d8801f15 stw r2,124(sp) + 23c08: 010001c4 movi r4,7 + 23c0c: 2081d316 blt r4,r2,2435c <___vfprintf_internal_r+0x111c> + 23c10: 42000204 addi r8,r8,8 + 23c14: 9480010c andi r18,r18,4 + 23c18: 90003226 beq r18,zero,23ce4 <___vfprintf_internal_r+0xaa4> + 23c1c: d9403117 ldw r5,196(sp) + 23c20: d8802a17 ldw r2,168(sp) + 23c24: 28a1c83a sub r16,r5,r2 + 23c28: 04002e0e bge zero,r16,23ce4 <___vfprintf_internal_r+0xaa4> + 23c2c: 04400404 movi r17,16 + 23c30: d8801f17 ldw r2,124(sp) + 23c34: 8c04a20e bge r17,r16,24ec0 <___vfprintf_internal_r+0x1c80> + 23c38: 014000f4 movhi r5,3 + 23c3c: 29481084 addi r5,r5,8258 + 23c40: d9403515 stw r5,212(sp) + 23c44: 048001c4 movi r18,7 + 23c48: dcc02c17 ldw r19,176(sp) + 23c4c: 00000306 br 23c5c <___vfprintf_internal_r+0xa1c> + 23c50: 843ffc04 addi r16,r16,-16 + 23c54: 42000204 addi r8,r8,8 + 23c58: 8c00130e bge r17,r16,23ca8 <___vfprintf_internal_r+0xa68> + 23c5c: 010000f4 movhi r4,3 + 23c60: 18c00404 addi r3,r3,16 + 23c64: 10800044 addi r2,r2,1 + 23c68: 21081084 addi r4,r4,8258 + 23c6c: 41000015 stw r4,0(r8) + 23c70: 44400115 stw r17,4(r8) + 23c74: d8c02015 stw r3,128(sp) + 23c78: d8801f15 stw r2,124(sp) + 23c7c: 90bff40e bge r18,r2,23c50 <_gp+0xfffe7718> + 23c80: d9801e04 addi r6,sp,120 + 23c84: b80b883a mov r5,r23 + 23c88: 9809883a mov r4,r19 + 23c8c: 002a01c0 call 2a01c <__sprint_r> + 23c90: 103e6d1e bne r2,zero,23648 <_gp+0xfffe7110> + 23c94: 843ffc04 addi r16,r16,-16 + 23c98: d8c02017 ldw r3,128(sp) + 23c9c: d8801f17 ldw r2,124(sp) + 23ca0: da000404 addi r8,sp,16 + 23ca4: 8c3fed16 blt r17,r16,23c5c <_gp+0xfffe7724> + 23ca8: d9403517 ldw r5,212(sp) + 23cac: 1c07883a add r3,r3,r16 + 23cb0: 10800044 addi r2,r2,1 + 23cb4: 41400015 stw r5,0(r8) + 23cb8: 44000115 stw r16,4(r8) + 23cbc: d8c02015 stw r3,128(sp) + 23cc0: d8801f15 stw r2,124(sp) + 23cc4: 010001c4 movi r4,7 + 23cc8: 2080060e bge r4,r2,23ce4 <___vfprintf_internal_r+0xaa4> + 23ccc: d9002c17 ldw r4,176(sp) + 23cd0: d9801e04 addi r6,sp,120 + 23cd4: b80b883a mov r5,r23 + 23cd8: 002a01c0 call 2a01c <__sprint_r> + 23cdc: 103e5a1e bne r2,zero,23648 <_gp+0xfffe7110> + 23ce0: d8c02017 ldw r3,128(sp) + 23ce4: d8803117 ldw r2,196(sp) + 23ce8: d9002a17 ldw r4,168(sp) + 23cec: 1100010e bge r2,r4,23cf4 <___vfprintf_internal_r+0xab4> + 23cf0: 2005883a mov r2,r4 + 23cf4: d9402f17 ldw r5,188(sp) + 23cf8: 288b883a add r5,r5,r2 + 23cfc: d9402f15 stw r5,188(sp) + 23d00: 18019e1e bne r3,zero,2437c <___vfprintf_internal_r+0x113c> + 23d04: a8800007 ldb r2,0(r21) + 23d08: d8001f15 stw zero,124(sp) + 23d0c: da000404 addi r8,sp,16 + 23d10: 103d851e bne r2,zero,23328 <_gp+0xfffe6df0> + 23d14: a821883a mov r16,r21 + 23d18: 003d9b06 br 23388 <_gp+0xfffe6e50> + 23d1c: 18c03fcc andi r3,r3,255 + 23d20: 1805c11e bne r3,zero,25428 <___vfprintf_internal_r+0x21e8> + 23d24: 94800414 ori r18,r18,16 + 23d28: 9080080c andi r2,r18,32 + 23d2c: 10020c26 beq r2,zero,24560 <___vfprintf_internal_r+0x1320> + 23d30: d8802d17 ldw r2,180(sp) + 23d34: d9002917 ldw r4,164(sp) + 23d38: d8002785 stb zero,158(sp) + 23d3c: 10c00204 addi r3,r2,8 + 23d40: 14c00017 ldw r19,0(r2) + 23d44: 15800117 ldw r22,4(r2) + 23d48: 20040f16 blt r4,zero,24d88 <___vfprintf_internal_r+0x1b48> + 23d4c: 013fdfc4 movi r4,-129 + 23d50: 9d84b03a or r2,r19,r22 + 23d54: d8c02d15 stw r3,180(sp) + 23d58: 9124703a and r18,r18,r4 + 23d5c: 0039883a mov fp,zero + 23d60: 103e891e bne r2,zero,23788 <_gp+0xfffe7250> + 23d64: d9002917 ldw r4,164(sp) + 23d68: 2002c11e bne r4,zero,24870 <___vfprintf_internal_r+0x1630> + 23d6c: d8002915 stw zero,164(sp) + 23d70: d8002e15 stw zero,184(sp) + 23d74: dc001e04 addi r16,sp,120 + 23d78: 003ef806 br 2395c <_gp+0xfffe7424> + 23d7c: 18c03fcc andi r3,r3,255 + 23d80: 18059d1e bne r3,zero,253f8 <___vfprintf_internal_r+0x21b8> + 23d84: 014000f4 movhi r5,3 + 23d88: 29480004 addi r5,r5,8192 + 23d8c: d9403915 stw r5,228(sp) + 23d90: 9080080c andi r2,r18,32 + 23d94: 10005226 beq r2,zero,23ee0 <___vfprintf_internal_r+0xca0> + 23d98: d8802d17 ldw r2,180(sp) + 23d9c: 14c00017 ldw r19,0(r2) + 23da0: 15800117 ldw r22,4(r2) + 23da4: 10800204 addi r2,r2,8 + 23da8: d8802d15 stw r2,180(sp) + 23dac: 9080004c andi r2,r18,1 + 23db0: 10019026 beq r2,zero,243f4 <___vfprintf_internal_r+0x11b4> + 23db4: 9d84b03a or r2,r19,r22 + 23db8: 10036926 beq r2,zero,24b60 <___vfprintf_internal_r+0x1920> + 23dbc: d8c02917 ldw r3,164(sp) + 23dc0: 00800c04 movi r2,48 + 23dc4: d8802705 stb r2,156(sp) + 23dc8: dc402745 stb r17,157(sp) + 23dcc: d8002785 stb zero,158(sp) + 23dd0: 90800094 ori r2,r18,2 + 23dd4: 18045d16 blt r3,zero,24f4c <___vfprintf_internal_r+0x1d0c> + 23dd8: 00bfdfc4 movi r2,-129 + 23ddc: 90a4703a and r18,r18,r2 + 23de0: 94800094 ori r18,r18,2 + 23de4: 0039883a mov fp,zero + 23de8: d9003917 ldw r4,228(sp) + 23dec: dc001e04 addi r16,sp,120 + 23df0: 988003cc andi r2,r19,15 + 23df4: b006973a slli r3,r22,28 + 23df8: 2085883a add r2,r4,r2 + 23dfc: 9826d13a srli r19,r19,4 + 23e00: 10800003 ldbu r2,0(r2) + 23e04: b02cd13a srli r22,r22,4 + 23e08: 843fffc4 addi r16,r16,-1 + 23e0c: 1ce6b03a or r19,r3,r19 + 23e10: 80800005 stb r2,0(r16) + 23e14: 9d84b03a or r2,r19,r22 + 23e18: 103ff51e bne r2,zero,23df0 <_gp+0xfffe78b8> + 23e1c: d8c02817 ldw r3,160(sp) + 23e20: 1c07c83a sub r3,r3,r16 + 23e24: d8c02e15 stw r3,184(sp) + 23e28: 003ecc06 br 2395c <_gp+0xfffe7424> + 23e2c: 18c03fcc andi r3,r3,255 + 23e30: 183e9f26 beq r3,zero,238b0 <_gp+0xfffe7378> + 23e34: d9c02785 stb r7,158(sp) + 23e38: 003e9d06 br 238b0 <_gp+0xfffe7378> + 23e3c: 00c00044 movi r3,1 + 23e40: 01c00ac4 movi r7,43 + 23e44: ac400007 ldb r17,0(r21) + 23e48: 003d5e06 br 233c4 <_gp+0xfffe6e8c> + 23e4c: 94800814 ori r18,r18,32 + 23e50: ac400007 ldb r17,0(r21) + 23e54: 003d5b06 br 233c4 <_gp+0xfffe6e8c> + 23e58: d8c02d17 ldw r3,180(sp) + 23e5c: d8002785 stb zero,158(sp) + 23e60: 1c000017 ldw r16,0(r3) + 23e64: 1cc00104 addi r19,r3,4 + 23e68: 80041926 beq r16,zero,24ed0 <___vfprintf_internal_r+0x1c90> + 23e6c: d9002917 ldw r4,164(sp) + 23e70: 2003d016 blt r4,zero,24db4 <___vfprintf_internal_r+0x1b74> + 23e74: 200d883a mov r6,r4 + 23e78: 000b883a mov r5,zero + 23e7c: 8009883a mov r4,r16 + 23e80: da003d15 stw r8,244(sp) + 23e84: 00282440 call 28244 + 23e88: da003d17 ldw r8,244(sp) + 23e8c: 10045426 beq r2,zero,24fe0 <___vfprintf_internal_r+0x1da0> + 23e90: 1405c83a sub r2,r2,r16 + 23e94: d8802e15 stw r2,184(sp) + 23e98: 1003cc16 blt r2,zero,24dcc <___vfprintf_internal_r+0x1b8c> + 23e9c: df002783 ldbu fp,158(sp) + 23ea0: d8802a15 stw r2,168(sp) + 23ea4: dcc02d15 stw r19,180(sp) + 23ea8: d8002915 stw zero,164(sp) + 23eac: d8003215 stw zero,200(sp) + 23eb0: 003eb006 br 23974 <_gp+0xfffe743c> + 23eb4: 18c03fcc andi r3,r3,255 + 23eb8: 183f9b26 beq r3,zero,23d28 <_gp+0xfffe77f0> + 23ebc: d9c02785 stb r7,158(sp) + 23ec0: 003f9906 br 23d28 <_gp+0xfffe77f0> + 23ec4: 18c03fcc andi r3,r3,255 + 23ec8: 1805551e bne r3,zero,25420 <___vfprintf_internal_r+0x21e0> + 23ecc: 014000f4 movhi r5,3 + 23ed0: 29480504 addi r5,r5,8212 + 23ed4: d9403915 stw r5,228(sp) + 23ed8: 9080080c andi r2,r18,32 + 23edc: 103fae1e bne r2,zero,23d98 <_gp+0xfffe7860> + 23ee0: 9080040c andi r2,r18,16 + 23ee4: 1002de26 beq r2,zero,24a60 <___vfprintf_internal_r+0x1820> + 23ee8: d8c02d17 ldw r3,180(sp) + 23eec: 002d883a mov r22,zero + 23ef0: 1cc00017 ldw r19,0(r3) + 23ef4: 18c00104 addi r3,r3,4 + 23ef8: d8c02d15 stw r3,180(sp) + 23efc: 003fab06 br 23dac <_gp+0xfffe7874> + 23f00: 38803fcc andi r2,r7,255 + 23f04: 1080201c xori r2,r2,128 + 23f08: 10bfe004 addi r2,r2,-128 + 23f0c: 1002d21e bne r2,zero,24a58 <___vfprintf_internal_r+0x1818> + 23f10: 00c00044 movi r3,1 + 23f14: 01c00804 movi r7,32 + 23f18: ac400007 ldb r17,0(r21) + 23f1c: 003d2906 br 233c4 <_gp+0xfffe6e8c> + 23f20: 94800054 ori r18,r18,1 + 23f24: ac400007 ldb r17,0(r21) + 23f28: 003d2606 br 233c4 <_gp+0xfffe6e8c> + 23f2c: 18c03fcc andi r3,r3,255 + 23f30: 183e0526 beq r3,zero,23748 <_gp+0xfffe7210> + 23f34: d9c02785 stb r7,158(sp) + 23f38: 003e0306 br 23748 <_gp+0xfffe7210> + 23f3c: 94801014 ori r18,r18,64 + 23f40: ac400007 ldb r17,0(r21) + 23f44: 003d1f06 br 233c4 <_gp+0xfffe6e8c> + 23f48: ac400007 ldb r17,0(r21) + 23f4c: 8a438726 beq r17,r9,24d6c <___vfprintf_internal_r+0x1b2c> + 23f50: 94800414 ori r18,r18,16 + 23f54: 003d1b06 br 233c4 <_gp+0xfffe6e8c> + 23f58: 18c03fcc andi r3,r3,255 + 23f5c: 1805341e bne r3,zero,25430 <___vfprintf_internal_r+0x21f0> + 23f60: 9080080c andi r2,r18,32 + 23f64: 1002cd26 beq r2,zero,24a9c <___vfprintf_internal_r+0x185c> + 23f68: d9402d17 ldw r5,180(sp) + 23f6c: d9002f17 ldw r4,188(sp) + 23f70: 28800017 ldw r2,0(r5) + 23f74: 2007d7fa srai r3,r4,31 + 23f78: 29400104 addi r5,r5,4 + 23f7c: d9402d15 stw r5,180(sp) + 23f80: 11000015 stw r4,0(r2) + 23f84: 10c00115 stw r3,4(r2) + 23f88: 003ce506 br 23320 <_gp+0xfffe6de8> + 23f8c: d8c02d17 ldw r3,180(sp) + 23f90: d9002d17 ldw r4,180(sp) + 23f94: d8002785 stb zero,158(sp) + 23f98: 18800017 ldw r2,0(r3) + 23f9c: 21000104 addi r4,r4,4 + 23fa0: 00c00044 movi r3,1 + 23fa4: d8c02a15 stw r3,168(sp) + 23fa8: d8801405 stb r2,80(sp) + 23fac: d9002d15 stw r4,180(sp) + 23fb0: d8c02e15 stw r3,184(sp) + 23fb4: d8002915 stw zero,164(sp) + 23fb8: d8003215 stw zero,200(sp) + 23fbc: dc001404 addi r16,sp,80 + 23fc0: 0039883a mov fp,zero + 23fc4: 003e7206 br 23990 <_gp+0xfffe7458> + 23fc8: 010000f4 movhi r4,3 + 23fcc: 21080504 addi r4,r4,8212 + 23fd0: 0039883a mov fp,zero + 23fd4: d9003915 stw r4,228(sp) + 23fd8: 04401e04 movi r17,120 + 23fdc: 003f8206 br 23de8 <_gp+0xfffe78b0> + 23fe0: 18c03fcc andi r3,r3,255 + 23fe4: 1805061e bne r3,zero,25400 <___vfprintf_internal_r+0x21c0> + 23fe8: 883d9126 beq r17,zero,23630 <_gp+0xfffe70f8> + 23fec: 00c00044 movi r3,1 + 23ff0: d8c02a15 stw r3,168(sp) + 23ff4: dc401405 stb r17,80(sp) + 23ff8: d8002785 stb zero,158(sp) + 23ffc: 003fec06 br 23fb0 <_gp+0xfffe7a78> + 24000: 014000f4 movhi r5,3 + 24004: 29480504 addi r5,r5,8212 + 24008: d9403915 stw r5,228(sp) + 2400c: d8c02d15 stw r3,180(sp) + 24010: 1025883a mov r18,r2 + 24014: 04401e04 movi r17,120 + 24018: 9d84b03a or r2,r19,r22 + 2401c: 1000fc1e bne r2,zero,24410 <___vfprintf_internal_r+0x11d0> + 24020: 0039883a mov fp,zero + 24024: 00800084 movi r2,2 + 24028: 10803fcc andi r2,r2,255 + 2402c: 00c00044 movi r3,1 + 24030: 10c20f26 beq r2,r3,24870 <___vfprintf_internal_r+0x1630> + 24034: 00c00084 movi r3,2 + 24038: 10fd6326 beq r2,r3,235c8 <_gp+0xfffe7090> + 2403c: 003e2d06 br 238f4 <_gp+0xfffe73bc> + 24040: d8c02017 ldw r3,128(sp) + 24044: 003e9306 br 23a94 <_gp+0xfffe755c> + 24048: 00801944 movi r2,101 + 2404c: 14407e0e bge r2,r17,24248 <___vfprintf_internal_r+0x1008> + 24050: d9003617 ldw r4,216(sp) + 24054: d9403817 ldw r5,224(sp) + 24058: 000d883a mov r6,zero + 2405c: 000f883a mov r7,zero + 24060: d8c03c15 stw r3,240(sp) + 24064: da003d15 stw r8,244(sp) + 24068: 002dae00 call 2dae0 <__eqdf2> + 2406c: d8c03c17 ldw r3,240(sp) + 24070: da003d17 ldw r8,244(sp) + 24074: 1000f71e bne r2,zero,24454 <___vfprintf_internal_r+0x1214> + 24078: d8801f17 ldw r2,124(sp) + 2407c: 010000f4 movhi r4,3 + 24080: 21080c04 addi r4,r4,8240 + 24084: 18c00044 addi r3,r3,1 + 24088: 10800044 addi r2,r2,1 + 2408c: 41000015 stw r4,0(r8) + 24090: 01000044 movi r4,1 + 24094: 41000115 stw r4,4(r8) + 24098: d8c02015 stw r3,128(sp) + 2409c: d8801f15 stw r2,124(sp) + 240a0: 010001c4 movi r4,7 + 240a4: 2082b816 blt r4,r2,24b88 <___vfprintf_internal_r+0x1948> + 240a8: 42000204 addi r8,r8,8 + 240ac: d8802617 ldw r2,152(sp) + 240b0: d9403317 ldw r5,204(sp) + 240b4: 11400216 blt r2,r5,240c0 <___vfprintf_internal_r+0xe80> + 240b8: 9080004c andi r2,r18,1 + 240bc: 103ed526 beq r2,zero,23c14 <_gp+0xfffe76dc> + 240c0: d8803717 ldw r2,220(sp) + 240c4: d9003417 ldw r4,208(sp) + 240c8: d9403717 ldw r5,220(sp) + 240cc: 1887883a add r3,r3,r2 + 240d0: d8801f17 ldw r2,124(sp) + 240d4: 41000015 stw r4,0(r8) + 240d8: 41400115 stw r5,4(r8) + 240dc: 10800044 addi r2,r2,1 + 240e0: d8c02015 stw r3,128(sp) + 240e4: d8801f15 stw r2,124(sp) + 240e8: 010001c4 movi r4,7 + 240ec: 20832916 blt r4,r2,24d94 <___vfprintf_internal_r+0x1b54> + 240f0: 42000204 addi r8,r8,8 + 240f4: d8803317 ldw r2,204(sp) + 240f8: 143fffc4 addi r16,r2,-1 + 240fc: 043ec50e bge zero,r16,23c14 <_gp+0xfffe76dc> + 24100: 04400404 movi r17,16 + 24104: d8801f17 ldw r2,124(sp) + 24108: 8c00880e bge r17,r16,2432c <___vfprintf_internal_r+0x10ec> + 2410c: 014000f4 movhi r5,3 + 24110: 29480c84 addi r5,r5,8242 + 24114: d9402b15 stw r5,172(sp) + 24118: 058001c4 movi r22,7 + 2411c: dcc02c17 ldw r19,176(sp) + 24120: 00000306 br 24130 <___vfprintf_internal_r+0xef0> + 24124: 42000204 addi r8,r8,8 + 24128: 843ffc04 addi r16,r16,-16 + 2412c: 8c00820e bge r17,r16,24338 <___vfprintf_internal_r+0x10f8> + 24130: 18c00404 addi r3,r3,16 + 24134: 10800044 addi r2,r2,1 + 24138: 45000015 stw r20,0(r8) + 2413c: 44400115 stw r17,4(r8) + 24140: d8c02015 stw r3,128(sp) + 24144: d8801f15 stw r2,124(sp) + 24148: b0bff60e bge r22,r2,24124 <_gp+0xfffe7bec> + 2414c: d9801e04 addi r6,sp,120 + 24150: b80b883a mov r5,r23 + 24154: 9809883a mov r4,r19 + 24158: 002a01c0 call 2a01c <__sprint_r> + 2415c: 103d3a1e bne r2,zero,23648 <_gp+0xfffe7110> + 24160: d8c02017 ldw r3,128(sp) + 24164: d8801f17 ldw r2,124(sp) + 24168: da000404 addi r8,sp,16 + 2416c: 003fee06 br 24128 <_gp+0xfffe7bf0> + 24170: d9403117 ldw r5,196(sp) + 24174: d8802a17 ldw r2,168(sp) + 24178: 28adc83a sub r22,r5,r2 + 2417c: 05be630e bge zero,r22,23b0c <_gp+0xfffe75d4> + 24180: 07000404 movi fp,16 + 24184: d8801f17 ldw r2,124(sp) + 24188: e5838f0e bge fp,r22,24fc8 <___vfprintf_internal_r+0x1d88> + 2418c: 014000f4 movhi r5,3 + 24190: 29480c84 addi r5,r5,8242 + 24194: dc403015 stw r17,192(sp) + 24198: d9402b15 stw r5,172(sp) + 2419c: b023883a mov r17,r22 + 241a0: 04c001c4 movi r19,7 + 241a4: a82d883a mov r22,r21 + 241a8: 902b883a mov r21,r18 + 241ac: 8025883a mov r18,r16 + 241b0: dc002c17 ldw r16,176(sp) + 241b4: 00000306 br 241c4 <___vfprintf_internal_r+0xf84> + 241b8: 8c7ffc04 addi r17,r17,-16 + 241bc: 42000204 addi r8,r8,8 + 241c0: e440110e bge fp,r17,24208 <___vfprintf_internal_r+0xfc8> + 241c4: 18c00404 addi r3,r3,16 + 241c8: 10800044 addi r2,r2,1 + 241cc: 45000015 stw r20,0(r8) + 241d0: 47000115 stw fp,4(r8) + 241d4: d8c02015 stw r3,128(sp) + 241d8: d8801f15 stw r2,124(sp) + 241dc: 98bff60e bge r19,r2,241b8 <_gp+0xfffe7c80> + 241e0: d9801e04 addi r6,sp,120 + 241e4: b80b883a mov r5,r23 + 241e8: 8009883a mov r4,r16 + 241ec: 002a01c0 call 2a01c <__sprint_r> + 241f0: 103d151e bne r2,zero,23648 <_gp+0xfffe7110> + 241f4: 8c7ffc04 addi r17,r17,-16 + 241f8: d8c02017 ldw r3,128(sp) + 241fc: d8801f17 ldw r2,124(sp) + 24200: da000404 addi r8,sp,16 + 24204: e47fef16 blt fp,r17,241c4 <_gp+0xfffe7c8c> + 24208: 9021883a mov r16,r18 + 2420c: a825883a mov r18,r21 + 24210: b02b883a mov r21,r22 + 24214: 882d883a mov r22,r17 + 24218: dc403017 ldw r17,192(sp) + 2421c: d9002b17 ldw r4,172(sp) + 24220: 1d87883a add r3,r3,r22 + 24224: 10800044 addi r2,r2,1 + 24228: 41000015 stw r4,0(r8) + 2422c: 45800115 stw r22,4(r8) + 24230: d8c02015 stw r3,128(sp) + 24234: d8801f15 stw r2,124(sp) + 24238: 010001c4 movi r4,7 + 2423c: 20818e16 blt r4,r2,24878 <___vfprintf_internal_r+0x1638> + 24240: 42000204 addi r8,r8,8 + 24244: 003e3106 br 23b0c <_gp+0xfffe75d4> + 24248: d9403317 ldw r5,204(sp) + 2424c: 00800044 movi r2,1 + 24250: 18c00044 addi r3,r3,1 + 24254: 1141530e bge r2,r5,247a4 <___vfprintf_internal_r+0x1564> + 24258: dc401f17 ldw r17,124(sp) + 2425c: 00800044 movi r2,1 + 24260: 40800115 stw r2,4(r8) + 24264: 8c400044 addi r17,r17,1 + 24268: 44000015 stw r16,0(r8) + 2426c: d8c02015 stw r3,128(sp) + 24270: dc401f15 stw r17,124(sp) + 24274: 008001c4 movi r2,7 + 24278: 14416b16 blt r2,r17,24828 <___vfprintf_internal_r+0x15e8> + 2427c: 42000204 addi r8,r8,8 + 24280: d8803717 ldw r2,220(sp) + 24284: d9003417 ldw r4,208(sp) + 24288: 8c400044 addi r17,r17,1 + 2428c: 10c7883a add r3,r2,r3 + 24290: 40800115 stw r2,4(r8) + 24294: 41000015 stw r4,0(r8) + 24298: d8c02015 stw r3,128(sp) + 2429c: dc401f15 stw r17,124(sp) + 242a0: 008001c4 movi r2,7 + 242a4: 14416916 blt r2,r17,2484c <___vfprintf_internal_r+0x160c> + 242a8: 45800204 addi r22,r8,8 + 242ac: d9003617 ldw r4,216(sp) + 242b0: d9403817 ldw r5,224(sp) + 242b4: 000d883a mov r6,zero + 242b8: 000f883a mov r7,zero + 242bc: d8c03c15 stw r3,240(sp) + 242c0: 002dae00 call 2dae0 <__eqdf2> + 242c4: d8c03c17 ldw r3,240(sp) + 242c8: 1000bc26 beq r2,zero,245bc <___vfprintf_internal_r+0x137c> + 242cc: d9403317 ldw r5,204(sp) + 242d0: 84000044 addi r16,r16,1 + 242d4: 8c400044 addi r17,r17,1 + 242d8: 28bfffc4 addi r2,r5,-1 + 242dc: 1887883a add r3,r3,r2 + 242e0: b0800115 stw r2,4(r22) + 242e4: b4000015 stw r16,0(r22) + 242e8: d8c02015 stw r3,128(sp) + 242ec: dc401f15 stw r17,124(sp) + 242f0: 008001c4 movi r2,7 + 242f4: 14414316 blt r2,r17,24804 <___vfprintf_internal_r+0x15c4> + 242f8: b5800204 addi r22,r22,8 + 242fc: d9003a17 ldw r4,232(sp) + 24300: df0022c4 addi fp,sp,139 + 24304: 8c400044 addi r17,r17,1 + 24308: 20c7883a add r3,r4,r3 + 2430c: b7000015 stw fp,0(r22) + 24310: b1000115 stw r4,4(r22) + 24314: d8c02015 stw r3,128(sp) + 24318: dc401f15 stw r17,124(sp) + 2431c: 008001c4 movi r2,7 + 24320: 14400e16 blt r2,r17,2435c <___vfprintf_internal_r+0x111c> + 24324: b2000204 addi r8,r22,8 + 24328: 003e3a06 br 23c14 <_gp+0xfffe76dc> + 2432c: 010000f4 movhi r4,3 + 24330: 21080c84 addi r4,r4,8242 + 24334: d9002b15 stw r4,172(sp) + 24338: d9002b17 ldw r4,172(sp) + 2433c: 1c07883a add r3,r3,r16 + 24340: 44000115 stw r16,4(r8) + 24344: 41000015 stw r4,0(r8) + 24348: 10800044 addi r2,r2,1 + 2434c: d8c02015 stw r3,128(sp) + 24350: d8801f15 stw r2,124(sp) + 24354: 010001c4 movi r4,7 + 24358: 20be2d0e bge r4,r2,23c10 <_gp+0xfffe76d8> + 2435c: d9002c17 ldw r4,176(sp) + 24360: d9801e04 addi r6,sp,120 + 24364: b80b883a mov r5,r23 + 24368: 002a01c0 call 2a01c <__sprint_r> + 2436c: 103cb61e bne r2,zero,23648 <_gp+0xfffe7110> + 24370: d8c02017 ldw r3,128(sp) + 24374: da000404 addi r8,sp,16 + 24378: 003e2606 br 23c14 <_gp+0xfffe76dc> + 2437c: d9002c17 ldw r4,176(sp) + 24380: d9801e04 addi r6,sp,120 + 24384: b80b883a mov r5,r23 + 24388: 002a01c0 call 2a01c <__sprint_r> + 2438c: 103e5d26 beq r2,zero,23d04 <_gp+0xfffe77cc> + 24390: 003cad06 br 23648 <_gp+0xfffe7110> + 24394: d9002c17 ldw r4,176(sp) + 24398: d9801e04 addi r6,sp,120 + 2439c: b80b883a mov r5,r23 + 243a0: 002a01c0 call 2a01c <__sprint_r> + 243a4: 103ca81e bne r2,zero,23648 <_gp+0xfffe7110> + 243a8: d8c02017 ldw r3,128(sp) + 243ac: da000404 addi r8,sp,16 + 243b0: 003e0b06 br 23be0 <_gp+0xfffe76a8> + 243b4: d9002c17 ldw r4,176(sp) + 243b8: d9801e04 addi r6,sp,120 + 243bc: b80b883a mov r5,r23 + 243c0: 002a01c0 call 2a01c <__sprint_r> + 243c4: 103ca01e bne r2,zero,23648 <_gp+0xfffe7110> + 243c8: d8c02017 ldw r3,128(sp) + 243cc: da000404 addi r8,sp,16 + 243d0: 003dbd06 br 23ac8 <_gp+0xfffe7590> + 243d4: d9002c17 ldw r4,176(sp) + 243d8: d9801e04 addi r6,sp,120 + 243dc: b80b883a mov r5,r23 + 243e0: 002a01c0 call 2a01c <__sprint_r> + 243e4: 103c981e bne r2,zero,23648 <_gp+0xfffe7110> + 243e8: d8c02017 ldw r3,128(sp) + 243ec: da000404 addi r8,sp,16 + 243f0: 003dc306 br 23b00 <_gp+0xfffe75c8> + 243f4: d8802917 ldw r2,164(sp) + 243f8: d8002785 stb zero,158(sp) + 243fc: 103f0616 blt r2,zero,24018 <_gp+0xfffe7ae0> + 24400: 00ffdfc4 movi r3,-129 + 24404: 9d84b03a or r2,r19,r22 + 24408: 90e4703a and r18,r18,r3 + 2440c: 103c6b26 beq r2,zero,235bc <_gp+0xfffe7084> + 24410: 0039883a mov fp,zero + 24414: 003e7406 br 23de8 <_gp+0xfffe78b0> + 24418: 9080040c andi r2,r18,16 + 2441c: 1001b326 beq r2,zero,24aec <___vfprintf_internal_r+0x18ac> + 24420: d9002d17 ldw r4,180(sp) + 24424: d9402917 ldw r5,164(sp) + 24428: d8002785 stb zero,158(sp) + 2442c: 20800104 addi r2,r4,4 + 24430: 24c00017 ldw r19,0(r4) + 24434: 002d883a mov r22,zero + 24438: 2801b516 blt r5,zero,24b10 <___vfprintf_internal_r+0x18d0> + 2443c: 00ffdfc4 movi r3,-129 + 24440: d8802d15 stw r2,180(sp) + 24444: 90e4703a and r18,r18,r3 + 24448: 983d2726 beq r19,zero,238e8 <_gp+0xfffe73b0> + 2444c: 0039883a mov fp,zero + 24450: 003d2a06 br 238fc <_gp+0xfffe73c4> + 24454: dc402617 ldw r17,152(sp) + 24458: 0441d30e bge zero,r17,24ba8 <___vfprintf_internal_r+0x1968> + 2445c: dc403217 ldw r17,200(sp) + 24460: d8803317 ldw r2,204(sp) + 24464: 1440010e bge r2,r17,2446c <___vfprintf_internal_r+0x122c> + 24468: 1023883a mov r17,r2 + 2446c: 04400a0e bge zero,r17,24498 <___vfprintf_internal_r+0x1258> + 24470: d8801f17 ldw r2,124(sp) + 24474: 1c47883a add r3,r3,r17 + 24478: 44000015 stw r16,0(r8) + 2447c: 10800044 addi r2,r2,1 + 24480: 44400115 stw r17,4(r8) + 24484: d8c02015 stw r3,128(sp) + 24488: d8801f15 stw r2,124(sp) + 2448c: 010001c4 movi r4,7 + 24490: 20826516 blt r4,r2,24e28 <___vfprintf_internal_r+0x1be8> + 24494: 42000204 addi r8,r8,8 + 24498: 88026116 blt r17,zero,24e20 <___vfprintf_internal_r+0x1be0> + 2449c: d9003217 ldw r4,200(sp) + 244a0: 2463c83a sub r17,r4,r17 + 244a4: 04407b0e bge zero,r17,24694 <___vfprintf_internal_r+0x1454> + 244a8: 05800404 movi r22,16 + 244ac: d8801f17 ldw r2,124(sp) + 244b0: b4419d0e bge r22,r17,24b28 <___vfprintf_internal_r+0x18e8> + 244b4: 010000f4 movhi r4,3 + 244b8: 21080c84 addi r4,r4,8242 + 244bc: d9002b15 stw r4,172(sp) + 244c0: 070001c4 movi fp,7 + 244c4: dcc02c17 ldw r19,176(sp) + 244c8: 00000306 br 244d8 <___vfprintf_internal_r+0x1298> + 244cc: 42000204 addi r8,r8,8 + 244d0: 8c7ffc04 addi r17,r17,-16 + 244d4: b441970e bge r22,r17,24b34 <___vfprintf_internal_r+0x18f4> + 244d8: 18c00404 addi r3,r3,16 + 244dc: 10800044 addi r2,r2,1 + 244e0: 45000015 stw r20,0(r8) + 244e4: 45800115 stw r22,4(r8) + 244e8: d8c02015 stw r3,128(sp) + 244ec: d8801f15 stw r2,124(sp) + 244f0: e0bff60e bge fp,r2,244cc <_gp+0xfffe7f94> + 244f4: d9801e04 addi r6,sp,120 + 244f8: b80b883a mov r5,r23 + 244fc: 9809883a mov r4,r19 + 24500: 002a01c0 call 2a01c <__sprint_r> + 24504: 103c501e bne r2,zero,23648 <_gp+0xfffe7110> + 24508: d8c02017 ldw r3,128(sp) + 2450c: d8801f17 ldw r2,124(sp) + 24510: da000404 addi r8,sp,16 + 24514: 003fee06 br 244d0 <_gp+0xfffe7f98> + 24518: d9002c17 ldw r4,176(sp) + 2451c: d9801e04 addi r6,sp,120 + 24520: b80b883a mov r5,r23 + 24524: 002a01c0 call 2a01c <__sprint_r> + 24528: 103c471e bne r2,zero,23648 <_gp+0xfffe7110> + 2452c: d8c02017 ldw r3,128(sp) + 24530: df002787 ldb fp,158(sp) + 24534: da000404 addi r8,sp,16 + 24538: 003d5606 br 23a94 <_gp+0xfffe755c> + 2453c: 9080040c andi r2,r18,16 + 24540: 10016126 beq r2,zero,24ac8 <___vfprintf_internal_r+0x1888> + 24544: d8802d17 ldw r2,180(sp) + 24548: 14c00017 ldw r19,0(r2) + 2454c: 10800104 addi r2,r2,4 + 24550: d8802d15 stw r2,180(sp) + 24554: 982dd7fa srai r22,r19,31 + 24558: b005883a mov r2,r22 + 2455c: 003c8206 br 23768 <_gp+0xfffe7230> + 24560: 9080040c andi r2,r18,16 + 24564: 10003526 beq r2,zero,2463c <___vfprintf_internal_r+0x13fc> + 24568: d9402d17 ldw r5,180(sp) + 2456c: d8c02917 ldw r3,164(sp) + 24570: d8002785 stb zero,158(sp) + 24574: 28800104 addi r2,r5,4 + 24578: 2cc00017 ldw r19,0(r5) + 2457c: 002d883a mov r22,zero + 24580: 18003716 blt r3,zero,24660 <___vfprintf_internal_r+0x1420> + 24584: 00ffdfc4 movi r3,-129 + 24588: d8802d15 stw r2,180(sp) + 2458c: 90e4703a and r18,r18,r3 + 24590: 0039883a mov fp,zero + 24594: 983df326 beq r19,zero,23d64 <_gp+0xfffe782c> + 24598: 00800244 movi r2,9 + 2459c: 14fc7b36 bltu r2,r19,2378c <_gp+0xfffe7254> + 245a0: d8c02817 ldw r3,160(sp) + 245a4: dc001dc4 addi r16,sp,119 + 245a8: 9cc00c04 addi r19,r19,48 + 245ac: 1c07c83a sub r3,r3,r16 + 245b0: dcc01dc5 stb r19,119(sp) + 245b4: d8c02e15 stw r3,184(sp) + 245b8: 003ce806 br 2395c <_gp+0xfffe7424> + 245bc: d8803317 ldw r2,204(sp) + 245c0: 143fffc4 addi r16,r2,-1 + 245c4: 043f4d0e bge zero,r16,242fc <_gp+0xfffe7dc4> + 245c8: 07000404 movi fp,16 + 245cc: e400810e bge fp,r16,247d4 <___vfprintf_internal_r+0x1594> + 245d0: 014000f4 movhi r5,3 + 245d4: 29480c84 addi r5,r5,8242 + 245d8: d9402b15 stw r5,172(sp) + 245dc: 01c001c4 movi r7,7 + 245e0: dcc02c17 ldw r19,176(sp) + 245e4: 00000306 br 245f4 <___vfprintf_internal_r+0x13b4> + 245e8: b5800204 addi r22,r22,8 + 245ec: 843ffc04 addi r16,r16,-16 + 245f0: e4007b0e bge fp,r16,247e0 <___vfprintf_internal_r+0x15a0> + 245f4: 18c00404 addi r3,r3,16 + 245f8: 8c400044 addi r17,r17,1 + 245fc: b5000015 stw r20,0(r22) + 24600: b7000115 stw fp,4(r22) + 24604: d8c02015 stw r3,128(sp) + 24608: dc401f15 stw r17,124(sp) + 2460c: 3c7ff60e bge r7,r17,245e8 <_gp+0xfffe80b0> + 24610: d9801e04 addi r6,sp,120 + 24614: b80b883a mov r5,r23 + 24618: 9809883a mov r4,r19 + 2461c: d9c03c15 stw r7,240(sp) + 24620: 002a01c0 call 2a01c <__sprint_r> + 24624: d9c03c17 ldw r7,240(sp) + 24628: 103c071e bne r2,zero,23648 <_gp+0xfffe7110> + 2462c: d8c02017 ldw r3,128(sp) + 24630: dc401f17 ldw r17,124(sp) + 24634: dd800404 addi r22,sp,16 + 24638: 003fec06 br 245ec <_gp+0xfffe80b4> + 2463c: 9080100c andi r2,r18,64 + 24640: d8002785 stb zero,158(sp) + 24644: 10010e26 beq r2,zero,24a80 <___vfprintf_internal_r+0x1840> + 24648: d9002d17 ldw r4,180(sp) + 2464c: d9402917 ldw r5,164(sp) + 24650: 002d883a mov r22,zero + 24654: 20800104 addi r2,r4,4 + 24658: 24c0000b ldhu r19,0(r4) + 2465c: 283fc90e bge r5,zero,24584 <_gp+0xfffe804c> + 24660: d8802d15 stw r2,180(sp) + 24664: 0039883a mov fp,zero + 24668: 9d84b03a or r2,r19,r22 + 2466c: 103c461e bne r2,zero,23788 <_gp+0xfffe7250> + 24670: 00800044 movi r2,1 + 24674: 003e6c06 br 24028 <_gp+0xfffe7af0> + 24678: d9002c17 ldw r4,176(sp) + 2467c: d9801e04 addi r6,sp,120 + 24680: b80b883a mov r5,r23 + 24684: 002a01c0 call 2a01c <__sprint_r> + 24688: 103bef1e bne r2,zero,23648 <_gp+0xfffe7110> + 2468c: d8c02017 ldw r3,128(sp) + 24690: da000404 addi r8,sp,16 + 24694: d9003217 ldw r4,200(sp) + 24698: d8802617 ldw r2,152(sp) + 2469c: d9403317 ldw r5,204(sp) + 246a0: 8123883a add r17,r16,r4 + 246a4: 11400216 blt r2,r5,246b0 <___vfprintf_internal_r+0x1470> + 246a8: 9100004c andi r4,r18,1 + 246ac: 20000d26 beq r4,zero,246e4 <___vfprintf_internal_r+0x14a4> + 246b0: d9003717 ldw r4,220(sp) + 246b4: d9403417 ldw r5,208(sp) + 246b8: 1907883a add r3,r3,r4 + 246bc: d9001f17 ldw r4,124(sp) + 246c0: 41400015 stw r5,0(r8) + 246c4: d9403717 ldw r5,220(sp) + 246c8: 21000044 addi r4,r4,1 + 246cc: d8c02015 stw r3,128(sp) + 246d0: 41400115 stw r5,4(r8) + 246d4: d9001f15 stw r4,124(sp) + 246d8: 014001c4 movi r5,7 + 246dc: 2901e816 blt r5,r4,24e80 <___vfprintf_internal_r+0x1c40> + 246e0: 42000204 addi r8,r8,8 + 246e4: d9003317 ldw r4,204(sp) + 246e8: 8121883a add r16,r16,r4 + 246ec: 2085c83a sub r2,r4,r2 + 246f0: 8461c83a sub r16,r16,r17 + 246f4: 1400010e bge r2,r16,246fc <___vfprintf_internal_r+0x14bc> + 246f8: 1021883a mov r16,r2 + 246fc: 04000a0e bge zero,r16,24728 <___vfprintf_internal_r+0x14e8> + 24700: d9001f17 ldw r4,124(sp) + 24704: 1c07883a add r3,r3,r16 + 24708: 44400015 stw r17,0(r8) + 2470c: 21000044 addi r4,r4,1 + 24710: 44000115 stw r16,4(r8) + 24714: d8c02015 stw r3,128(sp) + 24718: d9001f15 stw r4,124(sp) + 2471c: 014001c4 movi r5,7 + 24720: 2901fb16 blt r5,r4,24f10 <___vfprintf_internal_r+0x1cd0> + 24724: 42000204 addi r8,r8,8 + 24728: 8001f716 blt r16,zero,24f08 <___vfprintf_internal_r+0x1cc8> + 2472c: 1421c83a sub r16,r2,r16 + 24730: 043d380e bge zero,r16,23c14 <_gp+0xfffe76dc> + 24734: 04400404 movi r17,16 + 24738: d8801f17 ldw r2,124(sp) + 2473c: 8c3efb0e bge r17,r16,2432c <_gp+0xfffe7df4> + 24740: 014000f4 movhi r5,3 + 24744: 29480c84 addi r5,r5,8242 + 24748: d9402b15 stw r5,172(sp) + 2474c: 058001c4 movi r22,7 + 24750: dcc02c17 ldw r19,176(sp) + 24754: 00000306 br 24764 <___vfprintf_internal_r+0x1524> + 24758: 42000204 addi r8,r8,8 + 2475c: 843ffc04 addi r16,r16,-16 + 24760: 8c3ef50e bge r17,r16,24338 <_gp+0xfffe7e00> + 24764: 18c00404 addi r3,r3,16 + 24768: 10800044 addi r2,r2,1 + 2476c: 45000015 stw r20,0(r8) + 24770: 44400115 stw r17,4(r8) + 24774: d8c02015 stw r3,128(sp) + 24778: d8801f15 stw r2,124(sp) + 2477c: b0bff60e bge r22,r2,24758 <_gp+0xfffe8220> + 24780: d9801e04 addi r6,sp,120 + 24784: b80b883a mov r5,r23 + 24788: 9809883a mov r4,r19 + 2478c: 002a01c0 call 2a01c <__sprint_r> + 24790: 103bad1e bne r2,zero,23648 <_gp+0xfffe7110> + 24794: d8c02017 ldw r3,128(sp) + 24798: d8801f17 ldw r2,124(sp) + 2479c: da000404 addi r8,sp,16 + 247a0: 003fee06 br 2475c <_gp+0xfffe8224> + 247a4: 9088703a and r4,r18,r2 + 247a8: 203eab1e bne r4,zero,24258 <_gp+0xfffe7d20> + 247ac: dc401f17 ldw r17,124(sp) + 247b0: 40800115 stw r2,4(r8) + 247b4: 44000015 stw r16,0(r8) + 247b8: 8c400044 addi r17,r17,1 + 247bc: d8c02015 stw r3,128(sp) + 247c0: dc401f15 stw r17,124(sp) + 247c4: 008001c4 movi r2,7 + 247c8: 14400e16 blt r2,r17,24804 <___vfprintf_internal_r+0x15c4> + 247cc: 45800204 addi r22,r8,8 + 247d0: 003eca06 br 242fc <_gp+0xfffe7dc4> + 247d4: 010000f4 movhi r4,3 + 247d8: 21080c84 addi r4,r4,8242 + 247dc: d9002b15 stw r4,172(sp) + 247e0: d8802b17 ldw r2,172(sp) + 247e4: 1c07883a add r3,r3,r16 + 247e8: 8c400044 addi r17,r17,1 + 247ec: b0800015 stw r2,0(r22) + 247f0: b4000115 stw r16,4(r22) 247f4: d8c02015 stw r3,128(sp) - 247f8: d8801f15 stw r2,124(sp) - 247fc: 010001c4 movi r4,7 - 24800: 20818e16 blt r4,r2,24e3c <___vfprintf_internal_r+0x1638> - 24804: 42000204 addi r8,r8,8 - 24808: 003e3106 br 240d0 <___vfprintf_internal_r+0x8cc> - 2480c: d9403317 ldw r5,204(sp) - 24810: 00800044 movi r2,1 - 24814: 18c00044 addi r3,r3,1 - 24818: 1141530e bge r2,r5,24d68 <___vfprintf_internal_r+0x1564> + 247f8: dc401f15 stw r17,124(sp) + 247fc: 008001c4 movi r2,7 + 24800: 147ebd0e bge r2,r17,242f8 <_gp+0xfffe7dc0> + 24804: d9002c17 ldw r4,176(sp) + 24808: d9801e04 addi r6,sp,120 + 2480c: b80b883a mov r5,r23 + 24810: 002a01c0 call 2a01c <__sprint_r> + 24814: 103b8c1e bne r2,zero,23648 <_gp+0xfffe7110> + 24818: d8c02017 ldw r3,128(sp) 2481c: dc401f17 ldw r17,124(sp) - 24820: 00800044 movi r2,1 - 24824: 40800115 stw r2,4(r8) - 24828: 8c400044 addi r17,r17,1 - 2482c: 44000015 stw r16,0(r8) - 24830: d8c02015 stw r3,128(sp) - 24834: dc401f15 stw r17,124(sp) - 24838: 008001c4 movi r2,7 - 2483c: 14416b16 blt r2,r17,24dec <___vfprintf_internal_r+0x15e8> - 24840: 42000204 addi r8,r8,8 - 24844: d8803717 ldw r2,220(sp) - 24848: d9003417 ldw r4,208(sp) - 2484c: 8c400044 addi r17,r17,1 - 24850: 10c7883a add r3,r2,r3 - 24854: 40800115 stw r2,4(r8) - 24858: 41000015 stw r4,0(r8) - 2485c: d8c02015 stw r3,128(sp) - 24860: dc401f15 stw r17,124(sp) - 24864: 008001c4 movi r2,7 - 24868: 14416916 blt r2,r17,24e10 <___vfprintf_internal_r+0x160c> - 2486c: 45800204 addi r22,r8,8 - 24870: d9003617 ldw r4,216(sp) - 24874: d9403817 ldw r5,224(sp) - 24878: 000d883a mov r6,zero - 2487c: 000f883a mov r7,zero - 24880: d8c03c15 stw r3,240(sp) - 24884: 002e2940 call 2e294 <__eqdf2> - 24888: d8c03c17 ldw r3,240(sp) - 2488c: 1000bc26 beq r2,zero,24b80 <___vfprintf_internal_r+0x137c> - 24890: d9403317 ldw r5,204(sp) - 24894: 84000044 addi r16,r16,1 - 24898: 8c400044 addi r17,r17,1 - 2489c: 28bfffc4 addi r2,r5,-1 - 248a0: 1887883a add r3,r3,r2 - 248a4: b0800115 stw r2,4(r22) - 248a8: b4000015 stw r16,0(r22) - 248ac: d8c02015 stw r3,128(sp) - 248b0: dc401f15 stw r17,124(sp) - 248b4: 008001c4 movi r2,7 - 248b8: 14414316 blt r2,r17,24dc8 <___vfprintf_internal_r+0x15c4> - 248bc: b5800204 addi r22,r22,8 - 248c0: d9003a17 ldw r4,232(sp) - 248c4: df0022c4 addi fp,sp,139 - 248c8: 8c400044 addi r17,r17,1 - 248cc: 20c7883a add r3,r4,r3 - 248d0: b7000015 stw fp,0(r22) - 248d4: b1000115 stw r4,4(r22) - 248d8: d8c02015 stw r3,128(sp) - 248dc: dc401f15 stw r17,124(sp) - 248e0: 008001c4 movi r2,7 - 248e4: 14400e16 blt r2,r17,24920 <___vfprintf_internal_r+0x111c> - 248e8: b2000204 addi r8,r22,8 - 248ec: 003e3a06 br 241d8 <___vfprintf_internal_r+0x9d4> - 248f0: 010000f4 movhi r4,3 - 248f4: 210a5a84 addi r4,r4,10602 - 248f8: d9002b15 stw r4,172(sp) - 248fc: d9002b17 ldw r4,172(sp) - 24900: 1c07883a add r3,r3,r16 - 24904: 44000115 stw r16,4(r8) - 24908: 41000015 stw r4,0(r8) - 2490c: 10800044 addi r2,r2,1 - 24910: d8c02015 stw r3,128(sp) - 24914: d8801f15 stw r2,124(sp) - 24918: 010001c4 movi r4,7 - 2491c: 20be2d0e bge r4,r2,241d4 <___vfprintf_internal_r+0x9d0> - 24920: d9002c17 ldw r4,176(sp) - 24924: d9801e04 addi r6,sp,120 - 24928: b80b883a mov r5,r23 - 2492c: 002a7d00 call 2a7d0 <__sprint_r> - 24930: 103cb61e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> - 24934: d8c02017 ldw r3,128(sp) - 24938: da000404 addi r8,sp,16 - 2493c: 003e2606 br 241d8 <___vfprintf_internal_r+0x9d4> - 24940: d9002c17 ldw r4,176(sp) - 24944: d9801e04 addi r6,sp,120 - 24948: b80b883a mov r5,r23 - 2494c: 002a7d00 call 2a7d0 <__sprint_r> - 24950: 103e5d26 beq r2,zero,242c8 <___vfprintf_internal_r+0xac4> - 24954: 003cad06 br 23c0c <___vfprintf_internal_r+0x408> - 24958: d9002c17 ldw r4,176(sp) - 2495c: d9801e04 addi r6,sp,120 - 24960: b80b883a mov r5,r23 - 24964: 002a7d00 call 2a7d0 <__sprint_r> - 24968: 103ca81e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> - 2496c: d8c02017 ldw r3,128(sp) - 24970: da000404 addi r8,sp,16 - 24974: 003e0b06 br 241a4 <___vfprintf_internal_r+0x9a0> - 24978: d9002c17 ldw r4,176(sp) - 2497c: d9801e04 addi r6,sp,120 - 24980: b80b883a mov r5,r23 - 24984: 002a7d00 call 2a7d0 <__sprint_r> - 24988: 103ca01e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> - 2498c: d8c02017 ldw r3,128(sp) - 24990: da000404 addi r8,sp,16 - 24994: 003dbd06 br 2408c <___vfprintf_internal_r+0x888> - 24998: d9002c17 ldw r4,176(sp) - 2499c: d9801e04 addi r6,sp,120 - 249a0: b80b883a mov r5,r23 - 249a4: 002a7d00 call 2a7d0 <__sprint_r> - 249a8: 103c981e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> - 249ac: d8c02017 ldw r3,128(sp) - 249b0: da000404 addi r8,sp,16 - 249b4: 003dc306 br 240c4 <___vfprintf_internal_r+0x8c0> - 249b8: d8802917 ldw r2,164(sp) - 249bc: d8002785 stb zero,158(sp) - 249c0: 103f0616 blt r2,zero,245dc <___vfprintf_internal_r+0xdd8> - 249c4: 00ffdfc4 movi r3,-129 - 249c8: 9d84b03a or r2,r19,r22 - 249cc: 90e4703a and r18,r18,r3 - 249d0: 103c6b26 beq r2,zero,23b80 <___vfprintf_internal_r+0x37c> - 249d4: 0039883a mov fp,zero - 249d8: 003e7406 br 243ac <___vfprintf_internal_r+0xba8> - 249dc: 9080040c andi r2,r18,16 - 249e0: 1001b326 beq r2,zero,250b0 <___vfprintf_internal_r+0x18ac> - 249e4: d9002d17 ldw r4,180(sp) - 249e8: d9402917 ldw r5,164(sp) - 249ec: d8002785 stb zero,158(sp) - 249f0: 20800104 addi r2,r4,4 - 249f4: 24c00017 ldw r19,0(r4) - 249f8: 002d883a mov r22,zero - 249fc: 2801b516 blt r5,zero,250d4 <___vfprintf_internal_r+0x18d0> - 24a00: 00ffdfc4 movi r3,-129 - 24a04: d8802d15 stw r2,180(sp) - 24a08: 90e4703a and r18,r18,r3 - 24a0c: 983d2726 beq r19,zero,23eac <___vfprintf_internal_r+0x6a8> - 24a10: 0039883a mov fp,zero - 24a14: 003d2a06 br 23ec0 <___vfprintf_internal_r+0x6bc> - 24a18: dc402617 ldw r17,152(sp) - 24a1c: 0441d30e bge zero,r17,2516c <___vfprintf_internal_r+0x1968> - 24a20: dc403217 ldw r17,200(sp) - 24a24: d8803317 ldw r2,204(sp) - 24a28: 1440010e bge r2,r17,24a30 <___vfprintf_internal_r+0x122c> - 24a2c: 1023883a mov r17,r2 - 24a30: 04400a0e bge zero,r17,24a5c <___vfprintf_internal_r+0x1258> - 24a34: d8801f17 ldw r2,124(sp) - 24a38: 1c47883a add r3,r3,r17 - 24a3c: 44000015 stw r16,0(r8) - 24a40: 10800044 addi r2,r2,1 - 24a44: 44400115 stw r17,4(r8) - 24a48: d8c02015 stw r3,128(sp) - 24a4c: d8801f15 stw r2,124(sp) - 24a50: 010001c4 movi r4,7 - 24a54: 20826516 blt r4,r2,253ec <___vfprintf_internal_r+0x1be8> - 24a58: 42000204 addi r8,r8,8 - 24a5c: 88026116 blt r17,zero,253e4 <___vfprintf_internal_r+0x1be0> - 24a60: d9003217 ldw r4,200(sp) - 24a64: 2463c83a sub r17,r4,r17 - 24a68: 04407b0e bge zero,r17,24c58 <___vfprintf_internal_r+0x1454> - 24a6c: 05800404 movi r22,16 - 24a70: d8801f17 ldw r2,124(sp) - 24a74: b4419d0e bge r22,r17,250ec <___vfprintf_internal_r+0x18e8> - 24a78: 010000f4 movhi r4,3 - 24a7c: 210a5a84 addi r4,r4,10602 - 24a80: d9002b15 stw r4,172(sp) - 24a84: 070001c4 movi fp,7 - 24a88: dcc02c17 ldw r19,176(sp) - 24a8c: 00000306 br 24a9c <___vfprintf_internal_r+0x1298> - 24a90: 42000204 addi r8,r8,8 - 24a94: 8c7ffc04 addi r17,r17,-16 - 24a98: b441970e bge r22,r17,250f8 <___vfprintf_internal_r+0x18f4> - 24a9c: 18c00404 addi r3,r3,16 - 24aa0: 10800044 addi r2,r2,1 - 24aa4: 45000015 stw r20,0(r8) - 24aa8: 45800115 stw r22,4(r8) - 24aac: d8c02015 stw r3,128(sp) - 24ab0: d8801f15 stw r2,124(sp) - 24ab4: e0bff60e bge fp,r2,24a90 <___vfprintf_internal_r+0x128c> - 24ab8: d9801e04 addi r6,sp,120 - 24abc: b80b883a mov r5,r23 - 24ac0: 9809883a mov r4,r19 - 24ac4: 002a7d00 call 2a7d0 <__sprint_r> - 24ac8: 103c501e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> - 24acc: d8c02017 ldw r3,128(sp) - 24ad0: d8801f17 ldw r2,124(sp) - 24ad4: da000404 addi r8,sp,16 - 24ad8: 003fee06 br 24a94 <___vfprintf_internal_r+0x1290> - 24adc: d9002c17 ldw r4,176(sp) - 24ae0: d9801e04 addi r6,sp,120 - 24ae4: b80b883a mov r5,r23 - 24ae8: 002a7d00 call 2a7d0 <__sprint_r> - 24aec: 103c471e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> - 24af0: d8c02017 ldw r3,128(sp) - 24af4: df002787 ldb fp,158(sp) - 24af8: da000404 addi r8,sp,16 - 24afc: 003d5606 br 24058 <___vfprintf_internal_r+0x854> - 24b00: 9080040c andi r2,r18,16 - 24b04: 10016126 beq r2,zero,2508c <___vfprintf_internal_r+0x1888> - 24b08: d8802d17 ldw r2,180(sp) - 24b0c: 14c00017 ldw r19,0(r2) - 24b10: 10800104 addi r2,r2,4 + 24820: dd800404 addi r22,sp,16 + 24824: 003eb506 br 242fc <_gp+0xfffe7dc4> + 24828: d9002c17 ldw r4,176(sp) + 2482c: d9801e04 addi r6,sp,120 + 24830: b80b883a mov r5,r23 + 24834: 002a01c0 call 2a01c <__sprint_r> + 24838: 103b831e bne r2,zero,23648 <_gp+0xfffe7110> + 2483c: d8c02017 ldw r3,128(sp) + 24840: dc401f17 ldw r17,124(sp) + 24844: da000404 addi r8,sp,16 + 24848: 003e8d06 br 24280 <_gp+0xfffe7d48> + 2484c: d9002c17 ldw r4,176(sp) + 24850: d9801e04 addi r6,sp,120 + 24854: b80b883a mov r5,r23 + 24858: 002a01c0 call 2a01c <__sprint_r> + 2485c: 103b7a1e bne r2,zero,23648 <_gp+0xfffe7110> + 24860: d8c02017 ldw r3,128(sp) + 24864: dc401f17 ldw r17,124(sp) + 24868: dd800404 addi r22,sp,16 + 2486c: 003e8f06 br 242ac <_gp+0xfffe7d74> + 24870: 0027883a mov r19,zero + 24874: 003f4a06 br 245a0 <_gp+0xfffe8068> + 24878: d9002c17 ldw r4,176(sp) + 2487c: d9801e04 addi r6,sp,120 + 24880: b80b883a mov r5,r23 + 24884: 002a01c0 call 2a01c <__sprint_r> + 24888: 103b6f1e bne r2,zero,23648 <_gp+0xfffe7110> + 2488c: d8c02017 ldw r3,128(sp) + 24890: da000404 addi r8,sp,16 + 24894: 003c9d06 br 23b0c <_gp+0xfffe75d4> + 24898: 04e7c83a sub r19,zero,r19 + 2489c: 9804c03a cmpne r2,r19,zero + 248a0: 05adc83a sub r22,zero,r22 + 248a4: b0adc83a sub r22,r22,r2 + 248a8: d8802917 ldw r2,164(sp) + 248ac: 07000b44 movi fp,45 + 248b0: df002785 stb fp,158(sp) + 248b4: 10017b16 blt r2,zero,24ea4 <___vfprintf_internal_r+0x1c64> + 248b8: 00bfdfc4 movi r2,-129 + 248bc: 90a4703a and r18,r18,r2 + 248c0: 003bb106 br 23788 <_gp+0xfffe7250> + 248c4: d9003617 ldw r4,216(sp) + 248c8: d9403817 ldw r5,224(sp) + 248cc: da003d15 stw r8,244(sp) + 248d0: 0029c940 call 29c94 <__fpclassifyd> + 248d4: da003d17 ldw r8,244(sp) + 248d8: 1000f026 beq r2,zero,24c9c <___vfprintf_internal_r+0x1a5c> + 248dc: d9002917 ldw r4,164(sp) + 248e0: 05bff7c4 movi r22,-33 + 248e4: 00bfffc4 movi r2,-1 + 248e8: 8dac703a and r22,r17,r22 + 248ec: 20820026 beq r4,r2,250f0 <___vfprintf_internal_r+0x1eb0> + 248f0: 008011c4 movi r2,71 + 248f4: b081f726 beq r22,r2,250d4 <___vfprintf_internal_r+0x1e94> + 248f8: d9003817 ldw r4,224(sp) + 248fc: 90c04014 ori r3,r18,256 + 24900: d8c02b15 stw r3,172(sp) + 24904: 20021516 blt r4,zero,2515c <___vfprintf_internal_r+0x1f1c> + 24908: dcc03817 ldw r19,224(sp) + 2490c: d8002a05 stb zero,168(sp) + 24910: 00801984 movi r2,102 + 24914: 8881f926 beq r17,r2,250fc <___vfprintf_internal_r+0x1ebc> + 24918: 00801184 movi r2,70 + 2491c: 88821c26 beq r17,r2,25190 <___vfprintf_internal_r+0x1f50> + 24920: 00801144 movi r2,69 + 24924: b081ef26 beq r22,r2,250e4 <___vfprintf_internal_r+0x1ea4> + 24928: d8c02917 ldw r3,164(sp) + 2492c: d8802104 addi r2,sp,132 + 24930: d8800315 stw r2,12(sp) + 24934: d9403617 ldw r5,216(sp) + 24938: d8802504 addi r2,sp,148 + 2493c: d9002c17 ldw r4,176(sp) + 24940: d8800215 stw r2,8(sp) + 24944: d8802604 addi r2,sp,152 + 24948: d8c00015 stw r3,0(sp) + 2494c: d8800115 stw r2,4(sp) + 24950: 01c00084 movi r7,2 + 24954: 980d883a mov r6,r19 + 24958: d8c03c15 stw r3,240(sp) + 2495c: da003d15 stw r8,244(sp) + 24960: 00258640 call 25864 <_dtoa_r> + 24964: 1021883a mov r16,r2 + 24968: 008019c4 movi r2,103 + 2496c: d8c03c17 ldw r3,240(sp) + 24970: da003d17 ldw r8,244(sp) + 24974: 88817126 beq r17,r2,24f3c <___vfprintf_internal_r+0x1cfc> + 24978: 008011c4 movi r2,71 + 2497c: 88829226 beq r17,r2,253c8 <___vfprintf_internal_r+0x2188> + 24980: 80f9883a add fp,r16,r3 + 24984: d9003617 ldw r4,216(sp) + 24988: 000d883a mov r6,zero + 2498c: 000f883a mov r7,zero + 24990: 980b883a mov r5,r19 + 24994: da003d15 stw r8,244(sp) + 24998: 002dae00 call 2dae0 <__eqdf2> + 2499c: da003d17 ldw r8,244(sp) + 249a0: 10018d26 beq r2,zero,24fd8 <___vfprintf_internal_r+0x1d98> + 249a4: d8802117 ldw r2,132(sp) + 249a8: 1700062e bgeu r2,fp,249c4 <___vfprintf_internal_r+0x1784> + 249ac: 01000c04 movi r4,48 + 249b0: 10c00044 addi r3,r2,1 + 249b4: d8c02115 stw r3,132(sp) + 249b8: 11000005 stb r4,0(r2) + 249bc: d8802117 ldw r2,132(sp) + 249c0: 173ffb36 bltu r2,fp,249b0 <_gp+0xfffe8478> + 249c4: 1405c83a sub r2,r2,r16 + 249c8: d8803315 stw r2,204(sp) + 249cc: 008011c4 movi r2,71 + 249d0: b0817626 beq r22,r2,24fac <___vfprintf_internal_r+0x1d6c> + 249d4: 00801944 movi r2,101 + 249d8: 1442810e bge r2,r17,253e0 <___vfprintf_internal_r+0x21a0> + 249dc: d8c02617 ldw r3,152(sp) + 249e0: 00801984 movi r2,102 + 249e4: d8c03215 stw r3,200(sp) + 249e8: 8881fe26 beq r17,r2,251e4 <___vfprintf_internal_r+0x1fa4> + 249ec: d8c03217 ldw r3,200(sp) + 249f0: d9003317 ldw r4,204(sp) + 249f4: 1901dd16 blt r3,r4,2516c <___vfprintf_internal_r+0x1f2c> + 249f8: 9480004c andi r18,r18,1 + 249fc: 90022b1e bne r18,zero,252ac <___vfprintf_internal_r+0x206c> + 24a00: 1805883a mov r2,r3 + 24a04: 18028016 blt r3,zero,25408 <___vfprintf_internal_r+0x21c8> + 24a08: d8c03217 ldw r3,200(sp) + 24a0c: 044019c4 movi r17,103 + 24a10: d8c02e15 stw r3,184(sp) + 24a14: df002a07 ldb fp,168(sp) + 24a18: e001531e bne fp,zero,24f68 <___vfprintf_internal_r+0x1d28> + 24a1c: df002783 ldbu fp,158(sp) + 24a20: d8802a15 stw r2,168(sp) + 24a24: dc802b17 ldw r18,172(sp) + 24a28: d8002915 stw zero,164(sp) + 24a2c: 003bd106 br 23974 <_gp+0xfffe743c> + 24a30: d8802d17 ldw r2,180(sp) + 24a34: d8c02d17 ldw r3,180(sp) + 24a38: d9002d17 ldw r4,180(sp) + 24a3c: 10800017 ldw r2,0(r2) + 24a40: 18c00117 ldw r3,4(r3) + 24a44: 21000204 addi r4,r4,8 + 24a48: d8803615 stw r2,216(sp) + 24a4c: d8c03815 stw r3,224(sp) + 24a50: d9002d15 stw r4,180(sp) + 24a54: 003b7506 br 2382c <_gp+0xfffe72f4> + 24a58: ac400007 ldb r17,0(r21) + 24a5c: 003a5906 br 233c4 <_gp+0xfffe6e8c> + 24a60: 9080100c andi r2,r18,64 + 24a64: 1000a826 beq r2,zero,24d08 <___vfprintf_internal_r+0x1ac8> + 24a68: d9002d17 ldw r4,180(sp) + 24a6c: 002d883a mov r22,zero + 24a70: 24c0000b ldhu r19,0(r4) + 24a74: 21000104 addi r4,r4,4 + 24a78: d9002d15 stw r4,180(sp) + 24a7c: 003ccb06 br 23dac <_gp+0xfffe7874> + 24a80: d8c02d17 ldw r3,180(sp) + 24a84: d9002917 ldw r4,164(sp) + 24a88: 002d883a mov r22,zero + 24a8c: 18800104 addi r2,r3,4 + 24a90: 1cc00017 ldw r19,0(r3) + 24a94: 203ebb0e bge r4,zero,24584 <_gp+0xfffe804c> + 24a98: 003ef106 br 24660 <_gp+0xfffe8128> + 24a9c: 9080040c andi r2,r18,16 + 24aa0: 1000921e bne r2,zero,24cec <___vfprintf_internal_r+0x1aac> + 24aa4: 9480100c andi r18,r18,64 + 24aa8: 90013926 beq r18,zero,24f90 <___vfprintf_internal_r+0x1d50> + 24aac: d9002d17 ldw r4,180(sp) + 24ab0: d9402f17 ldw r5,188(sp) + 24ab4: 20800017 ldw r2,0(r4) + 24ab8: 21000104 addi r4,r4,4 + 24abc: d9002d15 stw r4,180(sp) + 24ac0: 1140000d sth r5,0(r2) + 24ac4: 003a1606 br 23320 <_gp+0xfffe6de8> + 24ac8: 9080100c andi r2,r18,64 + 24acc: 10008026 beq r2,zero,24cd0 <___vfprintf_internal_r+0x1a90> + 24ad0: d8c02d17 ldw r3,180(sp) + 24ad4: 1cc0000f ldh r19,0(r3) + 24ad8: 18c00104 addi r3,r3,4 + 24adc: d8c02d15 stw r3,180(sp) + 24ae0: 982dd7fa srai r22,r19,31 + 24ae4: b005883a mov r2,r22 + 24ae8: 003b1f06 br 23768 <_gp+0xfffe7230> + 24aec: 9080100c andi r2,r18,64 + 24af0: d8002785 stb zero,158(sp) + 24af4: 10008a1e bne r2,zero,24d20 <___vfprintf_internal_r+0x1ae0> + 24af8: d9402d17 ldw r5,180(sp) + 24afc: d8c02917 ldw r3,164(sp) + 24b00: 002d883a mov r22,zero + 24b04: 28800104 addi r2,r5,4 + 24b08: 2cc00017 ldw r19,0(r5) + 24b0c: 183e4b0e bge r3,zero,2443c <_gp+0xfffe7f04> + 24b10: 9d86b03a or r3,r19,r22 24b14: d8802d15 stw r2,180(sp) - 24b18: 982dd7fa srai r22,r19,31 - 24b1c: b005883a mov r2,r22 - 24b20: 003c8206 br 23d2c <___vfprintf_internal_r+0x528> - 24b24: 9080040c andi r2,r18,16 - 24b28: 10003526 beq r2,zero,24c00 <___vfprintf_internal_r+0x13fc> - 24b2c: d9402d17 ldw r5,180(sp) - 24b30: d8c02917 ldw r3,164(sp) - 24b34: d8002785 stb zero,158(sp) - 24b38: 28800104 addi r2,r5,4 - 24b3c: 2cc00017 ldw r19,0(r5) - 24b40: 002d883a mov r22,zero - 24b44: 18003716 blt r3,zero,24c24 <___vfprintf_internal_r+0x1420> - 24b48: 00ffdfc4 movi r3,-129 - 24b4c: d8802d15 stw r2,180(sp) - 24b50: 90e4703a and r18,r18,r3 - 24b54: 0039883a mov fp,zero - 24b58: 983df326 beq r19,zero,24328 <___vfprintf_internal_r+0xb24> - 24b5c: 00800244 movi r2,9 - 24b60: 14fc7b36 bltu r2,r19,23d50 <___vfprintf_internal_r+0x54c> - 24b64: d8c02817 ldw r3,160(sp) - 24b68: dc001dc4 addi r16,sp,119 - 24b6c: 9cc00c04 addi r19,r19,48 - 24b70: 1c07c83a sub r3,r3,r16 - 24b74: dcc01dc5 stb r19,119(sp) - 24b78: d8c02e15 stw r3,184(sp) - 24b7c: 003ce806 br 23f20 <___vfprintf_internal_r+0x71c> - 24b80: d8803317 ldw r2,204(sp) - 24b84: 143fffc4 addi r16,r2,-1 - 24b88: 043f4d0e bge zero,r16,248c0 <___vfprintf_internal_r+0x10bc> - 24b8c: 07000404 movi fp,16 - 24b90: e400810e bge fp,r16,24d98 <___vfprintf_internal_r+0x1594> - 24b94: 014000f4 movhi r5,3 - 24b98: 294a5a84 addi r5,r5,10602 - 24b9c: d9402b15 stw r5,172(sp) - 24ba0: 01c001c4 movi r7,7 - 24ba4: dcc02c17 ldw r19,176(sp) - 24ba8: 00000306 br 24bb8 <___vfprintf_internal_r+0x13b4> - 24bac: b5800204 addi r22,r22,8 - 24bb0: 843ffc04 addi r16,r16,-16 - 24bb4: e4007b0e bge fp,r16,24da4 <___vfprintf_internal_r+0x15a0> - 24bb8: 18c00404 addi r3,r3,16 - 24bbc: 8c400044 addi r17,r17,1 - 24bc0: b5000015 stw r20,0(r22) - 24bc4: b7000115 stw fp,4(r22) + 24b18: 183e4c1e bne r3,zero,2444c <_gp+0xfffe7f14> + 24b1c: 0039883a mov fp,zero + 24b20: 0005883a mov r2,zero + 24b24: 003d4006 br 24028 <_gp+0xfffe7af0> + 24b28: 014000f4 movhi r5,3 + 24b2c: 29480c84 addi r5,r5,8242 + 24b30: d9402b15 stw r5,172(sp) + 24b34: d9402b17 ldw r5,172(sp) + 24b38: 1c47883a add r3,r3,r17 + 24b3c: 10800044 addi r2,r2,1 + 24b40: 41400015 stw r5,0(r8) + 24b44: 44400115 stw r17,4(r8) + 24b48: d8c02015 stw r3,128(sp) + 24b4c: d8801f15 stw r2,124(sp) + 24b50: 010001c4 movi r4,7 + 24b54: 20bec816 blt r4,r2,24678 <_gp+0xfffe8140> + 24b58: 42000204 addi r8,r8,8 + 24b5c: 003ecd06 br 24694 <_gp+0xfffe815c> + 24b60: d9002917 ldw r4,164(sp) + 24b64: d8002785 stb zero,158(sp) + 24b68: 203d2d16 blt r4,zero,24020 <_gp+0xfffe7ae8> + 24b6c: 00bfdfc4 movi r2,-129 + 24b70: 90a4703a and r18,r18,r2 + 24b74: 003a9106 br 235bc <_gp+0xfffe7084> + 24b78: 010000f4 movhi r4,3 + 24b7c: 21080c84 addi r4,r4,8242 + 24b80: d9002b15 stw r4,172(sp) + 24b84: 003c0c06 br 23bb8 <_gp+0xfffe7680> + 24b88: d9002c17 ldw r4,176(sp) + 24b8c: d9801e04 addi r6,sp,120 + 24b90: b80b883a mov r5,r23 + 24b94: 002a01c0 call 2a01c <__sprint_r> + 24b98: 103aab1e bne r2,zero,23648 <_gp+0xfffe7110> + 24b9c: d8c02017 ldw r3,128(sp) + 24ba0: da000404 addi r8,sp,16 + 24ba4: 003d4106 br 240ac <_gp+0xfffe7b74> + 24ba8: d8801f17 ldw r2,124(sp) + 24bac: 014000f4 movhi r5,3 + 24bb0: 01000044 movi r4,1 + 24bb4: 18c00044 addi r3,r3,1 + 24bb8: 10800044 addi r2,r2,1 + 24bbc: 29480c04 addi r5,r5,8240 + 24bc0: 41000115 stw r4,4(r8) + 24bc4: 41400015 stw r5,0(r8) 24bc8: d8c02015 stw r3,128(sp) - 24bcc: dc401f15 stw r17,124(sp) - 24bd0: 3c7ff60e bge r7,r17,24bac <___vfprintf_internal_r+0x13a8> - 24bd4: d9801e04 addi r6,sp,120 - 24bd8: b80b883a mov r5,r23 - 24bdc: 9809883a mov r4,r19 - 24be0: d9c03c15 stw r7,240(sp) - 24be4: 002a7d00 call 2a7d0 <__sprint_r> - 24be8: d9c03c17 ldw r7,240(sp) - 24bec: 103c071e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> - 24bf0: d8c02017 ldw r3,128(sp) - 24bf4: dc401f17 ldw r17,124(sp) - 24bf8: dd800404 addi r22,sp,16 - 24bfc: 003fec06 br 24bb0 <___vfprintf_internal_r+0x13ac> - 24c00: 9080100c andi r2,r18,64 - 24c04: d8002785 stb zero,158(sp) - 24c08: 10010e26 beq r2,zero,25044 <___vfprintf_internal_r+0x1840> - 24c0c: d9002d17 ldw r4,180(sp) - 24c10: d9402917 ldw r5,164(sp) - 24c14: 002d883a mov r22,zero - 24c18: 20800104 addi r2,r4,4 - 24c1c: 24c0000b ldhu r19,0(r4) - 24c20: 283fc90e bge r5,zero,24b48 <___vfprintf_internal_r+0x1344> - 24c24: d8802d15 stw r2,180(sp) - 24c28: 0039883a mov fp,zero - 24c2c: 9d84b03a or r2,r19,r22 - 24c30: 103c461e bne r2,zero,23d4c <___vfprintf_internal_r+0x548> - 24c34: 00800044 movi r2,1 - 24c38: 003e6c06 br 245ec <___vfprintf_internal_r+0xde8> - 24c3c: d9002c17 ldw r4,176(sp) - 24c40: d9801e04 addi r6,sp,120 - 24c44: b80b883a mov r5,r23 - 24c48: 002a7d00 call 2a7d0 <__sprint_r> - 24c4c: 103bef1e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> - 24c50: d8c02017 ldw r3,128(sp) - 24c54: da000404 addi r8,sp,16 - 24c58: d9003217 ldw r4,200(sp) - 24c5c: d8802617 ldw r2,152(sp) - 24c60: d9403317 ldw r5,204(sp) - 24c64: 8123883a add r17,r16,r4 - 24c68: 11400216 blt r2,r5,24c74 <___vfprintf_internal_r+0x1470> - 24c6c: 9100004c andi r4,r18,1 - 24c70: 20000d26 beq r4,zero,24ca8 <___vfprintf_internal_r+0x14a4> - 24c74: d9003717 ldw r4,220(sp) - 24c78: d9403417 ldw r5,208(sp) - 24c7c: 1907883a add r3,r3,r4 - 24c80: d9001f17 ldw r4,124(sp) - 24c84: 41400015 stw r5,0(r8) - 24c88: d9403717 ldw r5,220(sp) - 24c8c: 21000044 addi r4,r4,1 - 24c90: d8c02015 stw r3,128(sp) - 24c94: 41400115 stw r5,4(r8) - 24c98: d9001f15 stw r4,124(sp) - 24c9c: 014001c4 movi r5,7 - 24ca0: 2901e816 blt r5,r4,25444 <___vfprintf_internal_r+0x1c40> - 24ca4: 42000204 addi r8,r8,8 - 24ca8: d9003317 ldw r4,204(sp) - 24cac: 8121883a add r16,r16,r4 - 24cb0: 2085c83a sub r2,r4,r2 - 24cb4: 8461c83a sub r16,r16,r17 - 24cb8: 1400010e bge r2,r16,24cc0 <___vfprintf_internal_r+0x14bc> - 24cbc: 1021883a mov r16,r2 - 24cc0: 04000a0e bge zero,r16,24cec <___vfprintf_internal_r+0x14e8> - 24cc4: d9001f17 ldw r4,124(sp) - 24cc8: 1c07883a add r3,r3,r16 - 24ccc: 44400015 stw r17,0(r8) - 24cd0: 21000044 addi r4,r4,1 - 24cd4: 44000115 stw r16,4(r8) - 24cd8: d8c02015 stw r3,128(sp) - 24cdc: d9001f15 stw r4,124(sp) - 24ce0: 014001c4 movi r5,7 - 24ce4: 2901fb16 blt r5,r4,254d4 <___vfprintf_internal_r+0x1cd0> - 24ce8: 42000204 addi r8,r8,8 - 24cec: 8001f716 blt r16,zero,254cc <___vfprintf_internal_r+0x1cc8> - 24cf0: 1421c83a sub r16,r2,r16 - 24cf4: 043d380e bge zero,r16,241d8 <___vfprintf_internal_r+0x9d4> - 24cf8: 04400404 movi r17,16 - 24cfc: d8801f17 ldw r2,124(sp) - 24d00: 8c3efb0e bge r17,r16,248f0 <___vfprintf_internal_r+0x10ec> - 24d04: 014000f4 movhi r5,3 - 24d08: 294a5a84 addi r5,r5,10602 - 24d0c: d9402b15 stw r5,172(sp) - 24d10: 058001c4 movi r22,7 - 24d14: dcc02c17 ldw r19,176(sp) - 24d18: 00000306 br 24d28 <___vfprintf_internal_r+0x1524> - 24d1c: 42000204 addi r8,r8,8 - 24d20: 843ffc04 addi r16,r16,-16 - 24d24: 8c3ef50e bge r17,r16,248fc <___vfprintf_internal_r+0x10f8> - 24d28: 18c00404 addi r3,r3,16 - 24d2c: 10800044 addi r2,r2,1 - 24d30: 45000015 stw r20,0(r8) - 24d34: 44400115 stw r17,4(r8) - 24d38: d8c02015 stw r3,128(sp) - 24d3c: d8801f15 stw r2,124(sp) - 24d40: b0bff60e bge r22,r2,24d1c <___vfprintf_internal_r+0x1518> - 24d44: d9801e04 addi r6,sp,120 - 24d48: b80b883a mov r5,r23 - 24d4c: 9809883a mov r4,r19 - 24d50: 002a7d00 call 2a7d0 <__sprint_r> - 24d54: 103bad1e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> - 24d58: d8c02017 ldw r3,128(sp) - 24d5c: d8801f17 ldw r2,124(sp) - 24d60: da000404 addi r8,sp,16 - 24d64: 003fee06 br 24d20 <___vfprintf_internal_r+0x151c> - 24d68: 9088703a and r4,r18,r2 - 24d6c: 203eab1e bne r4,zero,2481c <___vfprintf_internal_r+0x1018> - 24d70: dc401f17 ldw r17,124(sp) - 24d74: 40800115 stw r2,4(r8) - 24d78: 44000015 stw r16,0(r8) - 24d7c: 8c400044 addi r17,r17,1 - 24d80: d8c02015 stw r3,128(sp) - 24d84: dc401f15 stw r17,124(sp) - 24d88: 008001c4 movi r2,7 - 24d8c: 14400e16 blt r2,r17,24dc8 <___vfprintf_internal_r+0x15c4> - 24d90: 45800204 addi r22,r8,8 - 24d94: 003eca06 br 248c0 <___vfprintf_internal_r+0x10bc> - 24d98: 010000f4 movhi r4,3 - 24d9c: 210a5a84 addi r4,r4,10602 - 24da0: d9002b15 stw r4,172(sp) - 24da4: d8802b17 ldw r2,172(sp) - 24da8: 1c07883a add r3,r3,r16 - 24dac: 8c400044 addi r17,r17,1 - 24db0: b0800015 stw r2,0(r22) - 24db4: b4000115 stw r16,4(r22) - 24db8: d8c02015 stw r3,128(sp) - 24dbc: dc401f15 stw r17,124(sp) - 24dc0: 008001c4 movi r2,7 - 24dc4: 147ebd0e bge r2,r17,248bc <___vfprintf_internal_r+0x10b8> - 24dc8: d9002c17 ldw r4,176(sp) - 24dcc: d9801e04 addi r6,sp,120 - 24dd0: b80b883a mov r5,r23 - 24dd4: 002a7d00 call 2a7d0 <__sprint_r> - 24dd8: 103b8c1e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> - 24ddc: d8c02017 ldw r3,128(sp) - 24de0: dc401f17 ldw r17,124(sp) - 24de4: dd800404 addi r22,sp,16 - 24de8: 003eb506 br 248c0 <___vfprintf_internal_r+0x10bc> - 24dec: d9002c17 ldw r4,176(sp) - 24df0: d9801e04 addi r6,sp,120 - 24df4: b80b883a mov r5,r23 - 24df8: 002a7d00 call 2a7d0 <__sprint_r> - 24dfc: 103b831e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> - 24e00: d8c02017 ldw r3,128(sp) - 24e04: dc401f17 ldw r17,124(sp) - 24e08: da000404 addi r8,sp,16 - 24e0c: 003e8d06 br 24844 <___vfprintf_internal_r+0x1040> - 24e10: d9002c17 ldw r4,176(sp) - 24e14: d9801e04 addi r6,sp,120 - 24e18: b80b883a mov r5,r23 - 24e1c: 002a7d00 call 2a7d0 <__sprint_r> - 24e20: 103b7a1e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> - 24e24: d8c02017 ldw r3,128(sp) - 24e28: dc401f17 ldw r17,124(sp) - 24e2c: dd800404 addi r22,sp,16 - 24e30: 003e8f06 br 24870 <___vfprintf_internal_r+0x106c> - 24e34: 0027883a mov r19,zero - 24e38: 003f4a06 br 24b64 <___vfprintf_internal_r+0x1360> - 24e3c: d9002c17 ldw r4,176(sp) - 24e40: d9801e04 addi r6,sp,120 - 24e44: b80b883a mov r5,r23 - 24e48: 002a7d00 call 2a7d0 <__sprint_r> - 24e4c: 103b6f1e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> - 24e50: d8c02017 ldw r3,128(sp) - 24e54: da000404 addi r8,sp,16 - 24e58: 003c9d06 br 240d0 <___vfprintf_internal_r+0x8cc> - 24e5c: 04e7c83a sub r19,zero,r19 - 24e60: 9804c03a cmpne r2,r19,zero - 24e64: 05adc83a sub r22,zero,r22 - 24e68: b0adc83a sub r22,r22,r2 - 24e6c: d8802917 ldw r2,164(sp) - 24e70: 07000b44 movi fp,45 - 24e74: df002785 stb fp,158(sp) - 24e78: 10017b16 blt r2,zero,25468 <___vfprintf_internal_r+0x1c64> - 24e7c: 00bfdfc4 movi r2,-129 - 24e80: 90a4703a and r18,r18,r2 - 24e84: 003bb106 br 23d4c <___vfprintf_internal_r+0x548> - 24e88: d9003617 ldw r4,216(sp) - 24e8c: d9403817 ldw r5,224(sp) - 24e90: da003d15 stw r8,244(sp) - 24e94: 002a4480 call 2a448 <__fpclassifyd> - 24e98: da003d17 ldw r8,244(sp) - 24e9c: 1000f026 beq r2,zero,25260 <___vfprintf_internal_r+0x1a5c> - 24ea0: d9002917 ldw r4,164(sp) - 24ea4: 05bff7c4 movi r22,-33 - 24ea8: 00bfffc4 movi r2,-1 - 24eac: 8dac703a and r22,r17,r22 - 24eb0: 20820026 beq r4,r2,256b4 <___vfprintf_internal_r+0x1eb0> - 24eb4: 008011c4 movi r2,71 - 24eb8: b081f726 beq r22,r2,25698 <___vfprintf_internal_r+0x1e94> - 24ebc: d9003817 ldw r4,224(sp) - 24ec0: 90c04014 ori r3,r18,256 - 24ec4: d8c02b15 stw r3,172(sp) - 24ec8: 20021516 blt r4,zero,25720 <___vfprintf_internal_r+0x1f1c> - 24ecc: dcc03817 ldw r19,224(sp) - 24ed0: d8002a05 stb zero,168(sp) - 24ed4: 00801984 movi r2,102 - 24ed8: 8881f926 beq r17,r2,256c0 <___vfprintf_internal_r+0x1ebc> - 24edc: 00801184 movi r2,70 - 24ee0: 88821c26 beq r17,r2,25754 <___vfprintf_internal_r+0x1f50> - 24ee4: 00801144 movi r2,69 - 24ee8: b081ef26 beq r22,r2,256a8 <___vfprintf_internal_r+0x1ea4> - 24eec: d8c02917 ldw r3,164(sp) - 24ef0: d8802104 addi r2,sp,132 - 24ef4: d8800315 stw r2,12(sp) - 24ef8: d9403617 ldw r5,216(sp) - 24efc: d8802504 addi r2,sp,148 - 24f00: d9002c17 ldw r4,176(sp) - 24f04: d8800215 stw r2,8(sp) - 24f08: d8802604 addi r2,sp,152 - 24f0c: d8c00015 stw r3,0(sp) - 24f10: d8800115 stw r2,4(sp) - 24f14: 01c00084 movi r7,2 - 24f18: 980d883a mov r6,r19 - 24f1c: d8c03c15 stw r3,240(sp) - 24f20: da003d15 stw r8,244(sp) - 24f24: 0025e280 call 25e28 <_dtoa_r> - 24f28: 1021883a mov r16,r2 - 24f2c: 008019c4 movi r2,103 - 24f30: d8c03c17 ldw r3,240(sp) - 24f34: da003d17 ldw r8,244(sp) - 24f38: 88817126 beq r17,r2,25500 <___vfprintf_internal_r+0x1cfc> - 24f3c: 008011c4 movi r2,71 - 24f40: 88829226 beq r17,r2,2598c <___vfprintf_internal_r+0x2188> - 24f44: 80f9883a add fp,r16,r3 - 24f48: d9003617 ldw r4,216(sp) - 24f4c: 000d883a mov r6,zero - 24f50: 000f883a mov r7,zero - 24f54: 980b883a mov r5,r19 - 24f58: da003d15 stw r8,244(sp) - 24f5c: 002e2940 call 2e294 <__eqdf2> - 24f60: da003d17 ldw r8,244(sp) - 24f64: 10018d26 beq r2,zero,2559c <___vfprintf_internal_r+0x1d98> - 24f68: d8802117 ldw r2,132(sp) - 24f6c: 1700062e bgeu r2,fp,24f88 <___vfprintf_internal_r+0x1784> - 24f70: 01000c04 movi r4,48 - 24f74: 10c00044 addi r3,r2,1 - 24f78: d8c02115 stw r3,132(sp) - 24f7c: 11000005 stb r4,0(r2) - 24f80: d8802117 ldw r2,132(sp) - 24f84: 173ffb36 bltu r2,fp,24f74 <___vfprintf_internal_r+0x1770> - 24f88: 1405c83a sub r2,r2,r16 - 24f8c: d8803315 stw r2,204(sp) - 24f90: 008011c4 movi r2,71 - 24f94: b0817626 beq r22,r2,25570 <___vfprintf_internal_r+0x1d6c> - 24f98: 00801944 movi r2,101 - 24f9c: 1442810e bge r2,r17,259a4 <___vfprintf_internal_r+0x21a0> - 24fa0: d8c02617 ldw r3,152(sp) - 24fa4: 00801984 movi r2,102 - 24fa8: d8c03215 stw r3,200(sp) - 24fac: 8881fe26 beq r17,r2,257a8 <___vfprintf_internal_r+0x1fa4> - 24fb0: d8c03217 ldw r3,200(sp) - 24fb4: d9003317 ldw r4,204(sp) - 24fb8: 1901dd16 blt r3,r4,25730 <___vfprintf_internal_r+0x1f2c> - 24fbc: 9480004c andi r18,r18,1 - 24fc0: 90022b1e bne r18,zero,25870 <___vfprintf_internal_r+0x206c> - 24fc4: 1805883a mov r2,r3 - 24fc8: 18028016 blt r3,zero,259cc <___vfprintf_internal_r+0x21c8> - 24fcc: d8c03217 ldw r3,200(sp) - 24fd0: 044019c4 movi r17,103 - 24fd4: d8c02e15 stw r3,184(sp) - 24fd8: df002a07 ldb fp,168(sp) - 24fdc: e001531e bne fp,zero,2552c <___vfprintf_internal_r+0x1d28> - 24fe0: df002783 ldbu fp,158(sp) - 24fe4: d8802a15 stw r2,168(sp) - 24fe8: dc802b17 ldw r18,172(sp) - 24fec: d8002915 stw zero,164(sp) - 24ff0: 003bd106 br 23f38 <___vfprintf_internal_r+0x734> - 24ff4: d8802d17 ldw r2,180(sp) - 24ff8: d8c02d17 ldw r3,180(sp) - 24ffc: d9002d17 ldw r4,180(sp) - 25000: 10800017 ldw r2,0(r2) - 25004: 18c00117 ldw r3,4(r3) - 25008: 21000204 addi r4,r4,8 - 2500c: d8803615 stw r2,216(sp) - 25010: d8c03815 stw r3,224(sp) - 25014: d9002d15 stw r4,180(sp) - 25018: 003b7506 br 23df0 <___vfprintf_internal_r+0x5ec> - 2501c: ac400007 ldb r17,0(r21) - 25020: 003a5906 br 23988 <___vfprintf_internal_r+0x184> - 25024: 9080100c andi r2,r18,64 - 25028: 1000a826 beq r2,zero,252cc <___vfprintf_internal_r+0x1ac8> - 2502c: d9002d17 ldw r4,180(sp) - 25030: 002d883a mov r22,zero - 25034: 24c0000b ldhu r19,0(r4) - 25038: 21000104 addi r4,r4,4 - 2503c: d9002d15 stw r4,180(sp) - 25040: 003ccb06 br 24370 <___vfprintf_internal_r+0xb6c> - 25044: d8c02d17 ldw r3,180(sp) - 25048: d9002917 ldw r4,164(sp) - 2504c: 002d883a mov r22,zero - 25050: 18800104 addi r2,r3,4 - 25054: 1cc00017 ldw r19,0(r3) - 25058: 203ebb0e bge r4,zero,24b48 <___vfprintf_internal_r+0x1344> - 2505c: 003ef106 br 24c24 <___vfprintf_internal_r+0x1420> - 25060: 9080040c andi r2,r18,16 - 25064: 1000921e bne r2,zero,252b0 <___vfprintf_internal_r+0x1aac> - 25068: 9480100c andi r18,r18,64 - 2506c: 90013926 beq r18,zero,25554 <___vfprintf_internal_r+0x1d50> - 25070: d9002d17 ldw r4,180(sp) - 25074: d9402f17 ldw r5,188(sp) - 25078: 20800017 ldw r2,0(r4) - 2507c: 21000104 addi r4,r4,4 - 25080: d9002d15 stw r4,180(sp) - 25084: 1140000d sth r5,0(r2) - 25088: 003a1606 br 238e4 <___vfprintf_internal_r+0xe0> - 2508c: 9080100c andi r2,r18,64 - 25090: 10008026 beq r2,zero,25294 <___vfprintf_internal_r+0x1a90> - 25094: d8c02d17 ldw r3,180(sp) - 25098: 1cc0000f ldh r19,0(r3) - 2509c: 18c00104 addi r3,r3,4 - 250a0: d8c02d15 stw r3,180(sp) - 250a4: 982dd7fa srai r22,r19,31 - 250a8: b005883a mov r2,r22 - 250ac: 003b1f06 br 23d2c <___vfprintf_internal_r+0x528> - 250b0: 9080100c andi r2,r18,64 - 250b4: d8002785 stb zero,158(sp) - 250b8: 10008a1e bne r2,zero,252e4 <___vfprintf_internal_r+0x1ae0> - 250bc: d9402d17 ldw r5,180(sp) - 250c0: d8c02917 ldw r3,164(sp) - 250c4: 002d883a mov r22,zero - 250c8: 28800104 addi r2,r5,4 - 250cc: 2cc00017 ldw r19,0(r5) - 250d0: 183e4b0e bge r3,zero,24a00 <___vfprintf_internal_r+0x11fc> - 250d4: 9d86b03a or r3,r19,r22 - 250d8: d8802d15 stw r2,180(sp) - 250dc: 183e4c1e bne r3,zero,24a10 <___vfprintf_internal_r+0x120c> - 250e0: 0039883a mov fp,zero - 250e4: 0005883a mov r2,zero - 250e8: 003d4006 br 245ec <___vfprintf_internal_r+0xde8> - 250ec: 014000f4 movhi r5,3 - 250f0: 294a5a84 addi r5,r5,10602 - 250f4: d9402b15 stw r5,172(sp) - 250f8: d9402b17 ldw r5,172(sp) - 250fc: 1c47883a add r3,r3,r17 - 25100: 10800044 addi r2,r2,1 - 25104: 41400015 stw r5,0(r8) - 25108: 44400115 stw r17,4(r8) - 2510c: d8c02015 stw r3,128(sp) - 25110: d8801f15 stw r2,124(sp) - 25114: 010001c4 movi r4,7 - 25118: 20bec816 blt r4,r2,24c3c <___vfprintf_internal_r+0x1438> - 2511c: 42000204 addi r8,r8,8 - 25120: 003ecd06 br 24c58 <___vfprintf_internal_r+0x1454> - 25124: d9002917 ldw r4,164(sp) - 25128: d8002785 stb zero,158(sp) - 2512c: 203d2d16 blt r4,zero,245e4 <___vfprintf_internal_r+0xde0> - 25130: 00bfdfc4 movi r2,-129 - 25134: 90a4703a and r18,r18,r2 - 25138: 003a9106 br 23b80 <___vfprintf_internal_r+0x37c> - 2513c: 010000f4 movhi r4,3 - 25140: 210a5a84 addi r4,r4,10602 - 25144: d9002b15 stw r4,172(sp) - 25148: 003c0c06 br 2417c <___vfprintf_internal_r+0x978> - 2514c: d9002c17 ldw r4,176(sp) - 25150: d9801e04 addi r6,sp,120 - 25154: b80b883a mov r5,r23 - 25158: 002a7d00 call 2a7d0 <__sprint_r> - 2515c: 103aab1e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> - 25160: d8c02017 ldw r3,128(sp) - 25164: da000404 addi r8,sp,16 - 25168: 003d4106 br 24670 <___vfprintf_internal_r+0xe6c> - 2516c: d8801f17 ldw r2,124(sp) - 25170: 014000f4 movhi r5,3 - 25174: 01000044 movi r4,1 - 25178: 18c00044 addi r3,r3,1 - 2517c: 10800044 addi r2,r2,1 - 25180: 294a5a04 addi r5,r5,10600 - 25184: 41000115 stw r4,4(r8) - 25188: 41400015 stw r5,0(r8) - 2518c: d8c02015 stw r3,128(sp) - 25190: d8801f15 stw r2,124(sp) - 25194: 010001c4 movi r4,7 - 25198: 20805c16 blt r4,r2,2530c <___vfprintf_internal_r+0x1b08> - 2519c: 42000204 addi r8,r8,8 - 251a0: 8800041e bne r17,zero,251b4 <___vfprintf_internal_r+0x19b0> - 251a4: d8803317 ldw r2,204(sp) - 251a8: 1000021e bne r2,zero,251b4 <___vfprintf_internal_r+0x19b0> - 251ac: 9080004c andi r2,r18,1 - 251b0: 103c0926 beq r2,zero,241d8 <___vfprintf_internal_r+0x9d4> - 251b4: d9003717 ldw r4,220(sp) - 251b8: d8801f17 ldw r2,124(sp) - 251bc: d9403417 ldw r5,208(sp) - 251c0: 20c7883a add r3,r4,r3 - 251c4: 10800044 addi r2,r2,1 - 251c8: 41000115 stw r4,4(r8) - 251cc: 41400015 stw r5,0(r8) - 251d0: d8c02015 stw r3,128(sp) - 251d4: d8801f15 stw r2,124(sp) - 251d8: 010001c4 movi r4,7 - 251dc: 20812116 blt r4,r2,25664 <___vfprintf_internal_r+0x1e60> - 251e0: 42000204 addi r8,r8,8 - 251e4: 0463c83a sub r17,zero,r17 - 251e8: 0440730e bge zero,r17,253b8 <___vfprintf_internal_r+0x1bb4> - 251ec: 05800404 movi r22,16 - 251f0: b440860e bge r22,r17,2540c <___vfprintf_internal_r+0x1c08> - 251f4: 014000f4 movhi r5,3 - 251f8: 294a5a84 addi r5,r5,10602 - 251fc: d9402b15 stw r5,172(sp) - 25200: 070001c4 movi fp,7 - 25204: dcc02c17 ldw r19,176(sp) - 25208: 00000306 br 25218 <___vfprintf_internal_r+0x1a14> - 2520c: 42000204 addi r8,r8,8 - 25210: 8c7ffc04 addi r17,r17,-16 - 25214: b440800e bge r22,r17,25418 <___vfprintf_internal_r+0x1c14> - 25218: 18c00404 addi r3,r3,16 - 2521c: 10800044 addi r2,r2,1 - 25220: 45000015 stw r20,0(r8) - 25224: 45800115 stw r22,4(r8) - 25228: d8c02015 stw r3,128(sp) - 2522c: d8801f15 stw r2,124(sp) - 25230: e0bff60e bge fp,r2,2520c <___vfprintf_internal_r+0x1a08> - 25234: d9801e04 addi r6,sp,120 - 25238: b80b883a mov r5,r23 - 2523c: 9809883a mov r4,r19 - 25240: 002a7d00 call 2a7d0 <__sprint_r> - 25244: 103a711e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> - 25248: d8c02017 ldw r3,128(sp) - 2524c: d8801f17 ldw r2,124(sp) - 25250: da000404 addi r8,sp,16 - 25254: 003fee06 br 25210 <___vfprintf_internal_r+0x1a0c> - 25258: 00bfffc4 movi r2,-1 - 2525c: 003a6f06 br 23c1c <___vfprintf_internal_r+0x418> - 25260: 008011c4 movi r2,71 - 25264: 1440b816 blt r2,r17,25548 <___vfprintf_internal_r+0x1d44> - 25268: 040000f4 movhi r16,3 - 2526c: 840a4c04 addi r16,r16,10544 - 25270: 00c000c4 movi r3,3 - 25274: 00bfdfc4 movi r2,-129 - 25278: d8c02a15 stw r3,168(sp) - 2527c: 90a4703a and r18,r18,r2 - 25280: df002783 ldbu fp,158(sp) - 25284: d8c02e15 stw r3,184(sp) - 25288: d8002915 stw zero,164(sp) - 2528c: d8003215 stw zero,200(sp) - 25290: 003b2906 br 23f38 <___vfprintf_internal_r+0x734> - 25294: d9002d17 ldw r4,180(sp) - 25298: 24c00017 ldw r19,0(r4) - 2529c: 21000104 addi r4,r4,4 - 252a0: d9002d15 stw r4,180(sp) - 252a4: 982dd7fa srai r22,r19,31 - 252a8: b005883a mov r2,r22 - 252ac: 003a9f06 br 23d2c <___vfprintf_internal_r+0x528> - 252b0: d9402d17 ldw r5,180(sp) - 252b4: d8c02f17 ldw r3,188(sp) - 252b8: 28800017 ldw r2,0(r5) - 252bc: 29400104 addi r5,r5,4 - 252c0: d9402d15 stw r5,180(sp) - 252c4: 10c00015 stw r3,0(r2) - 252c8: 00398606 br 238e4 <___vfprintf_internal_r+0xe0> - 252cc: d9402d17 ldw r5,180(sp) - 252d0: 002d883a mov r22,zero - 252d4: 2cc00017 ldw r19,0(r5) - 252d8: 29400104 addi r5,r5,4 - 252dc: d9402d15 stw r5,180(sp) - 252e0: 003c2306 br 24370 <___vfprintf_internal_r+0xb6c> - 252e4: d8c02d17 ldw r3,180(sp) - 252e8: d9002917 ldw r4,164(sp) - 252ec: 002d883a mov r22,zero - 252f0: 18800104 addi r2,r3,4 - 252f4: 1cc0000b ldhu r19,0(r3) - 252f8: 203dc10e bge r4,zero,24a00 <___vfprintf_internal_r+0x11fc> - 252fc: 003f7506 br 250d4 <___vfprintf_internal_r+0x18d0> - 25300: 040000f4 movhi r16,3 - 25304: 840a4a04 addi r16,r16,10536 - 25308: 003acc06 br 23e3c <___vfprintf_internal_r+0x638> - 2530c: d9002c17 ldw r4,176(sp) - 25310: d9801e04 addi r6,sp,120 - 25314: b80b883a mov r5,r23 - 25318: 002a7d00 call 2a7d0 <__sprint_r> - 2531c: 103a3b1e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> - 25320: dc402617 ldw r17,152(sp) - 25324: d8c02017 ldw r3,128(sp) - 25328: da000404 addi r8,sp,16 - 2532c: 003f9c06 br 251a0 <___vfprintf_internal_r+0x199c> - 25330: ac400043 ldbu r17,1(r21) - 25334: 94800814 ori r18,r18,32 - 25338: ad400044 addi r21,r21,1 - 2533c: 8c403fcc andi r17,r17,255 - 25340: 8c40201c xori r17,r17,128 - 25344: 8c7fe004 addi r17,r17,-128 - 25348: 00398f06 br 23988 <___vfprintf_internal_r+0x184> - 2534c: d8c02d15 stw r3,180(sp) - 25350: 0039883a mov fp,zero - 25354: 003e3506 br 24c2c <___vfprintf_internal_r+0x1428> - 25358: d9002c17 ldw r4,176(sp) - 2535c: d9801e04 addi r6,sp,120 - 25360: b80b883a mov r5,r23 - 25364: 002a7d00 call 2a7d0 <__sprint_r> - 25368: 103a281e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> - 2536c: d8c02017 ldw r3,128(sp) - 25370: da000404 addi r8,sp,16 - 25374: 003cd006 br 246b8 <___vfprintf_internal_r+0xeb4> - 25378: 8009883a mov r4,r16 - 2537c: da003d15 stw r8,244(sp) - 25380: 002376c0 call 2376c - 25384: d8802e15 stw r2,184(sp) - 25388: da003d17 ldw r8,244(sp) - 2538c: 103c340e bge r2,zero,24460 <___vfprintf_internal_r+0xc5c> - 25390: 0005883a mov r2,zero - 25394: 003c3206 br 24460 <___vfprintf_internal_r+0xc5c> - 25398: d9002c17 ldw r4,176(sp) - 2539c: d9801e04 addi r6,sp,120 - 253a0: b80b883a mov r5,r23 - 253a4: 002a7d00 call 2a7d0 <__sprint_r> - 253a8: 103a181e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> - 253ac: d8c02017 ldw r3,128(sp) - 253b0: d8801f17 ldw r2,124(sp) - 253b4: da000404 addi r8,sp,16 - 253b8: d9403317 ldw r5,204(sp) - 253bc: 10800044 addi r2,r2,1 - 253c0: 44000015 stw r16,0(r8) - 253c4: 28c7883a add r3,r5,r3 - 253c8: 003b7d06 br 241c0 <___vfprintf_internal_r+0x9bc> - 253cc: 010000f4 movhi r4,3 - 253d0: 210a5e84 addi r4,r4,10618 - 253d4: d9003515 stw r4,212(sp) - 253d8: 003b1406 br 2402c <___vfprintf_internal_r+0x828> - 253dc: 013fffc4 movi r4,-1 - 253e0: 003a3506 br 23cb8 <___vfprintf_internal_r+0x4b4> - 253e4: 0023883a mov r17,zero - 253e8: 003d9d06 br 24a60 <___vfprintf_internal_r+0x125c> - 253ec: d9002c17 ldw r4,176(sp) - 253f0: d9801e04 addi r6,sp,120 - 253f4: b80b883a mov r5,r23 - 253f8: 002a7d00 call 2a7d0 <__sprint_r> - 253fc: 103a031e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> - 25400: d8c02017 ldw r3,128(sp) - 25404: da000404 addi r8,sp,16 - 25408: 003d9406 br 24a5c <___vfprintf_internal_r+0x1258> - 2540c: 010000f4 movhi r4,3 - 25410: 210a5a84 addi r4,r4,10602 - 25414: d9002b15 stw r4,172(sp) - 25418: d9002b17 ldw r4,172(sp) - 2541c: 1c47883a add r3,r3,r17 - 25420: 10800044 addi r2,r2,1 - 25424: 41000015 stw r4,0(r8) - 25428: 44400115 stw r17,4(r8) - 2542c: d8c02015 stw r3,128(sp) - 25430: d8801f15 stw r2,124(sp) - 25434: 010001c4 movi r4,7 - 25438: 20bfd716 blt r4,r2,25398 <___vfprintf_internal_r+0x1b94> - 2543c: 42000204 addi r8,r8,8 - 25440: 003fdd06 br 253b8 <___vfprintf_internal_r+0x1bb4> - 25444: d9002c17 ldw r4,176(sp) - 25448: d9801e04 addi r6,sp,120 - 2544c: b80b883a mov r5,r23 - 25450: 002a7d00 call 2a7d0 <__sprint_r> - 25454: 1039ed1e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> - 25458: d8802617 ldw r2,152(sp) - 2545c: d8c02017 ldw r3,128(sp) - 25460: da000404 addi r8,sp,16 - 25464: 003e1006 br 24ca8 <___vfprintf_internal_r+0x14a4> - 25468: 00800044 movi r2,1 - 2546c: 10803fcc andi r2,r2,255 - 25470: 00c00044 movi r3,1 - 25474: 10fa3526 beq r2,r3,23d4c <___vfprintf_internal_r+0x548> - 25478: 00c00084 movi r3,2 - 2547c: 10fbcb26 beq r2,r3,243ac <___vfprintf_internal_r+0xba8> - 25480: 003a8f06 br 23ec0 <___vfprintf_internal_r+0x6bc> - 25484: 010000f4 movhi r4,3 - 25488: 210a5e84 addi r4,r4,10618 - 2548c: d9003515 stw r4,212(sp) - 25490: 003b7606 br 2426c <___vfprintf_internal_r+0xa68> - 25494: d8802917 ldw r2,164(sp) - 25498: 00c00184 movi r3,6 - 2549c: 1880012e bgeu r3,r2,254a4 <___vfprintf_internal_r+0x1ca0> - 254a0: 1805883a mov r2,r3 - 254a4: d8802e15 stw r2,184(sp) - 254a8: 1000ef16 blt r2,zero,25868 <___vfprintf_internal_r+0x2064> - 254ac: 040000f4 movhi r16,3 - 254b0: d8802a15 stw r2,168(sp) - 254b4: dcc02d15 stw r19,180(sp) - 254b8: d8002915 stw zero,164(sp) - 254bc: d8003215 stw zero,200(sp) - 254c0: 840a5804 addi r16,r16,10592 - 254c4: 0039883a mov fp,zero - 254c8: 003aa206 br 23f54 <___vfprintf_internal_r+0x750> - 254cc: 0021883a mov r16,zero - 254d0: 003e0706 br 24cf0 <___vfprintf_internal_r+0x14ec> - 254d4: d9002c17 ldw r4,176(sp) - 254d8: d9801e04 addi r6,sp,120 - 254dc: b80b883a mov r5,r23 - 254e0: 002a7d00 call 2a7d0 <__sprint_r> - 254e4: 1039c91e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> - 254e8: d8802617 ldw r2,152(sp) - 254ec: d9403317 ldw r5,204(sp) - 254f0: d8c02017 ldw r3,128(sp) - 254f4: da000404 addi r8,sp,16 - 254f8: 2885c83a sub r2,r5,r2 - 254fc: 003dfb06 br 24cec <___vfprintf_internal_r+0x14e8> - 25500: 9080004c andi r2,r18,1 - 25504: 103e8f1e bne r2,zero,24f44 <___vfprintf_internal_r+0x1740> - 25508: d8802117 ldw r2,132(sp) - 2550c: 003e9e06 br 24f88 <___vfprintf_internal_r+0x1784> - 25510: 1025883a mov r18,r2 - 25514: 0039883a mov fp,zero - 25518: 00800084 movi r2,2 - 2551c: 003fd306 br 2546c <___vfprintf_internal_r+0x1c68> - 25520: 07000b44 movi fp,45 - 25524: df002785 stb fp,158(sp) - 25528: 003a4006 br 23e2c <___vfprintf_internal_r+0x628> - 2552c: 00c00b44 movi r3,45 - 25530: d8c02785 stb r3,158(sp) - 25534: d8802a15 stw r2,168(sp) - 25538: dc802b17 ldw r18,172(sp) - 2553c: d8002915 stw zero,164(sp) - 25540: 07000b44 movi fp,45 - 25544: 003a8006 br 23f48 <___vfprintf_internal_r+0x744> - 25548: 040000f4 movhi r16,3 - 2554c: 840a4d04 addi r16,r16,10548 - 25550: 003f4706 br 25270 <___vfprintf_internal_r+0x1a6c> - 25554: d8c02d17 ldw r3,180(sp) - 25558: d9002f17 ldw r4,188(sp) - 2555c: 18800017 ldw r2,0(r3) - 25560: 18c00104 addi r3,r3,4 - 25564: d8c02d15 stw r3,180(sp) - 25568: 11000015 stw r4,0(r2) - 2556c: 0038dd06 br 238e4 <___vfprintf_internal_r+0xe0> - 25570: dd802617 ldw r22,152(sp) - 25574: 00bfff44 movi r2,-3 - 25578: b0801c16 blt r22,r2,255ec <___vfprintf_internal_r+0x1de8> - 2557c: d9402917 ldw r5,164(sp) - 25580: 2d801a16 blt r5,r22,255ec <___vfprintf_internal_r+0x1de8> - 25584: dd803215 stw r22,200(sp) - 25588: 003e8906 br 24fb0 <___vfprintf_internal_r+0x17ac> - 2558c: 010000f4 movhi r4,3 - 25590: 210a5a84 addi r4,r4,10602 - 25594: d9002b15 stw r4,172(sp) - 25598: 003c9106 br 247e0 <___vfprintf_internal_r+0xfdc> - 2559c: e005883a mov r2,fp - 255a0: 003e7906 br 24f88 <___vfprintf_internal_r+0x1784> - 255a4: d9402917 ldw r5,164(sp) - 255a8: df002783 ldbu fp,158(sp) - 255ac: dcc02d15 stw r19,180(sp) - 255b0: d9402a15 stw r5,168(sp) - 255b4: d9402e15 stw r5,184(sp) - 255b8: d8002915 stw zero,164(sp) - 255bc: d8003215 stw zero,200(sp) - 255c0: 003a5d06 br 23f38 <___vfprintf_internal_r+0x734> - 255c4: 9080004c andi r2,r18,1 - 255c8: 0039883a mov fp,zero - 255cc: 10000426 beq r2,zero,255e0 <___vfprintf_internal_r+0x1ddc> - 255d0: 00800c04 movi r2,48 - 255d4: dc001dc4 addi r16,sp,119 - 255d8: d8801dc5 stb r2,119(sp) - 255dc: 003b8006 br 243e0 <___vfprintf_internal_r+0xbdc> - 255e0: d8002e15 stw zero,184(sp) - 255e4: dc001e04 addi r16,sp,120 - 255e8: 003a4d06 br 23f20 <___vfprintf_internal_r+0x71c> - 255ec: 8c7fff84 addi r17,r17,-2 - 255f0: b5bfffc4 addi r22,r22,-1 - 255f4: dd802615 stw r22,152(sp) - 255f8: dc4022c5 stb r17,139(sp) - 255fc: b000bf16 blt r22,zero,258fc <___vfprintf_internal_r+0x20f8> - 25600: 00800ac4 movi r2,43 - 25604: d8802305 stb r2,140(sp) - 25608: 00800244 movi r2,9 - 2560c: 15807016 blt r2,r22,257d0 <___vfprintf_internal_r+0x1fcc> - 25610: 00800c04 movi r2,48 - 25614: b5800c04 addi r22,r22,48 - 25618: d8802345 stb r2,141(sp) - 2561c: dd802385 stb r22,142(sp) - 25620: d88023c4 addi r2,sp,143 - 25624: df0022c4 addi fp,sp,139 - 25628: d8c03317 ldw r3,204(sp) - 2562c: 1739c83a sub fp,r2,fp - 25630: d9003317 ldw r4,204(sp) - 25634: e0c7883a add r3,fp,r3 - 25638: df003a15 stw fp,232(sp) - 2563c: d8c02e15 stw r3,184(sp) - 25640: 00800044 movi r2,1 - 25644: 1100b30e bge r2,r4,25914 <___vfprintf_internal_r+0x2110> - 25648: d8c02e17 ldw r3,184(sp) - 2564c: 18c00044 addi r3,r3,1 - 25650: d8c02e15 stw r3,184(sp) - 25654: 1805883a mov r2,r3 - 25658: 1800ac16 blt r3,zero,2590c <___vfprintf_internal_r+0x2108> - 2565c: d8003215 stw zero,200(sp) - 25660: 003e5d06 br 24fd8 <___vfprintf_internal_r+0x17d4> - 25664: d9002c17 ldw r4,176(sp) - 25668: d9801e04 addi r6,sp,120 - 2566c: b80b883a mov r5,r23 - 25670: 002a7d00 call 2a7d0 <__sprint_r> - 25674: 1039651e bne r2,zero,23c0c <___vfprintf_internal_r+0x408> - 25678: dc402617 ldw r17,152(sp) - 2567c: d8c02017 ldw r3,128(sp) - 25680: d8801f17 ldw r2,124(sp) - 25684: da000404 addi r8,sp,16 - 25688: 003ed606 br 251e4 <___vfprintf_internal_r+0x19e0> - 2568c: 582b883a mov r21,r11 - 25690: d8002915 stw zero,164(sp) - 25694: 0038bd06 br 2398c <___vfprintf_internal_r+0x188> - 25698: d8802917 ldw r2,164(sp) - 2569c: 103e071e bne r2,zero,24ebc <___vfprintf_internal_r+0x16b8> - 256a0: dc002915 stw r16,164(sp) - 256a4: 003e0506 br 24ebc <___vfprintf_internal_r+0x16b8> - 256a8: d9002917 ldw r4,164(sp) - 256ac: 20c00044 addi r3,r4,1 - 256b0: 003e0f06 br 24ef0 <___vfprintf_internal_r+0x16ec> - 256b4: 01400184 movi r5,6 - 256b8: d9402915 stw r5,164(sp) - 256bc: 003dff06 br 24ebc <___vfprintf_internal_r+0x16b8> - 256c0: d8802104 addi r2,sp,132 - 256c4: d8800315 stw r2,12(sp) - 256c8: d8802504 addi r2,sp,148 - 256cc: d8800215 stw r2,8(sp) - 256d0: d8802604 addi r2,sp,152 - 256d4: d8800115 stw r2,4(sp) - 256d8: d8802917 ldw r2,164(sp) - 256dc: d9403617 ldw r5,216(sp) - 256e0: d9002c17 ldw r4,176(sp) - 256e4: d8800015 stw r2,0(sp) - 256e8: 01c000c4 movi r7,3 - 256ec: 980d883a mov r6,r19 - 256f0: da003d15 stw r8,244(sp) - 256f4: 0025e280 call 25e28 <_dtoa_r> - 256f8: d8c02917 ldw r3,164(sp) - 256fc: da003d17 ldw r8,244(sp) - 25700: 1021883a mov r16,r2 - 25704: 10f9883a add fp,r2,r3 - 25708: 81000007 ldb r4,0(r16) - 2570c: 00800c04 movi r2,48 - 25710: 20805e26 beq r4,r2,2588c <___vfprintf_internal_r+0x2088> - 25714: d8c02617 ldw r3,152(sp) - 25718: e0f9883a add fp,fp,r3 - 2571c: 003e0a06 br 24f48 <___vfprintf_internal_r+0x1744> - 25720: 00c00b44 movi r3,45 - 25724: 24e0003c xorhi r19,r4,32768 - 25728: d8c02a05 stb r3,168(sp) - 2572c: 003de906 br 24ed4 <___vfprintf_internal_r+0x16d0> - 25730: d8c03217 ldw r3,200(sp) - 25734: 00c07a0e bge zero,r3,25920 <___vfprintf_internal_r+0x211c> - 25738: 00800044 movi r2,1 - 2573c: d9003317 ldw r4,204(sp) - 25740: 1105883a add r2,r2,r4 - 25744: d8802e15 stw r2,184(sp) - 25748: 10004e16 blt r2,zero,25884 <___vfprintf_internal_r+0x2080> - 2574c: 044019c4 movi r17,103 - 25750: 003e2106 br 24fd8 <___vfprintf_internal_r+0x17d4> - 25754: d9002917 ldw r4,164(sp) - 25758: d8802104 addi r2,sp,132 - 2575c: d8800315 stw r2,12(sp) - 25760: d9000015 stw r4,0(sp) - 25764: d8802504 addi r2,sp,148 - 25768: d9403617 ldw r5,216(sp) - 2576c: d9002c17 ldw r4,176(sp) - 25770: d8800215 stw r2,8(sp) - 25774: d8802604 addi r2,sp,152 - 25778: d8800115 stw r2,4(sp) - 2577c: 01c000c4 movi r7,3 - 25780: 980d883a mov r6,r19 - 25784: da003d15 stw r8,244(sp) - 25788: 0025e280 call 25e28 <_dtoa_r> - 2578c: d8c02917 ldw r3,164(sp) - 25790: da003d17 ldw r8,244(sp) - 25794: 1021883a mov r16,r2 - 25798: 00801184 movi r2,70 - 2579c: 80f9883a add fp,r16,r3 - 257a0: 88bfd926 beq r17,r2,25708 <___vfprintf_internal_r+0x1f04> - 257a4: 003de806 br 24f48 <___vfprintf_internal_r+0x1744> - 257a8: d9002917 ldw r4,164(sp) - 257ac: 00c04d0e bge zero,r3,258e4 <___vfprintf_internal_r+0x20e0> - 257b0: 2000441e bne r4,zero,258c4 <___vfprintf_internal_r+0x20c0> - 257b4: 9480004c andi r18,r18,1 - 257b8: 9000421e bne r18,zero,258c4 <___vfprintf_internal_r+0x20c0> - 257bc: 1805883a mov r2,r3 - 257c0: 18007016 blt r3,zero,25984 <___vfprintf_internal_r+0x2180> - 257c4: d8c03217 ldw r3,200(sp) - 257c8: d8c02e15 stw r3,184(sp) - 257cc: 003e0206 br 24fd8 <___vfprintf_internal_r+0x17d4> - 257d0: df0022c4 addi fp,sp,139 - 257d4: dc002915 stw r16,164(sp) - 257d8: 4027883a mov r19,r8 - 257dc: e021883a mov r16,fp - 257e0: b009883a mov r4,r22 - 257e4: 01400284 movi r5,10 - 257e8: 00229ac0 call 229ac <__modsi3> - 257ec: 10800c04 addi r2,r2,48 - 257f0: 843fffc4 addi r16,r16,-1 - 257f4: b009883a mov r4,r22 - 257f8: 01400284 movi r5,10 - 257fc: 80800005 stb r2,0(r16) - 25800: 00229280 call 22928 <__divsi3> - 25804: 102d883a mov r22,r2 - 25808: 00800244 movi r2,9 - 2580c: 15bff416 blt r2,r22,257e0 <___vfprintf_internal_r+0x1fdc> - 25810: 9811883a mov r8,r19 - 25814: b0800c04 addi r2,r22,48 - 25818: 8027883a mov r19,r16 - 2581c: 997fffc4 addi r5,r19,-1 - 25820: 98bfffc5 stb r2,-1(r19) - 25824: dc002917 ldw r16,164(sp) - 25828: 2f006a2e bgeu r5,fp,259d4 <___vfprintf_internal_r+0x21d0> - 2582c: d9c02384 addi r7,sp,142 - 25830: 3ccfc83a sub r7,r7,r19 - 25834: d9002344 addi r4,sp,141 - 25838: e1cf883a add r7,fp,r7 - 2583c: 00000106 br 25844 <___vfprintf_internal_r+0x2040> - 25840: 28800003 ldbu r2,0(r5) - 25844: 20800005 stb r2,0(r4) - 25848: 21000044 addi r4,r4,1 - 2584c: 29400044 addi r5,r5,1 - 25850: 393ffb1e bne r7,r4,25840 <___vfprintf_internal_r+0x203c> - 25854: d8802304 addi r2,sp,140 - 25858: 14c5c83a sub r2,r2,r19 - 2585c: d8c02344 addi r3,sp,141 - 25860: 1885883a add r2,r3,r2 - 25864: 003f7006 br 25628 <___vfprintf_internal_r+0x1e24> - 25868: 0005883a mov r2,zero - 2586c: 003f0f06 br 254ac <___vfprintf_internal_r+0x1ca8> - 25870: d8c03217 ldw r3,200(sp) - 25874: 18c00044 addi r3,r3,1 - 25878: d8c02e15 stw r3,184(sp) - 2587c: 1805883a mov r2,r3 - 25880: 183fb20e bge r3,zero,2574c <___vfprintf_internal_r+0x1f48> - 25884: 0005883a mov r2,zero - 25888: 003fb006 br 2574c <___vfprintf_internal_r+0x1f48> - 2588c: d9003617 ldw r4,216(sp) - 25890: 000d883a mov r6,zero - 25894: 000f883a mov r7,zero - 25898: 980b883a mov r5,r19 - 2589c: d8c03c15 stw r3,240(sp) - 258a0: da003d15 stw r8,244(sp) - 258a4: 002e2940 call 2e294 <__eqdf2> - 258a8: d8c03c17 ldw r3,240(sp) - 258ac: da003d17 ldw r8,244(sp) - 258b0: 103f9826 beq r2,zero,25714 <___vfprintf_internal_r+0x1f10> - 258b4: 00800044 movi r2,1 - 258b8: 10c7c83a sub r3,r2,r3 - 258bc: d8c02615 stw r3,152(sp) - 258c0: 003f9506 br 25718 <___vfprintf_internal_r+0x1f14> - 258c4: d9002917 ldw r4,164(sp) - 258c8: d8c03217 ldw r3,200(sp) - 258cc: 20800044 addi r2,r4,1 - 258d0: 1885883a add r2,r3,r2 - 258d4: d8802e15 stw r2,184(sp) - 258d8: 103dbf0e bge r2,zero,24fd8 <___vfprintf_internal_r+0x17d4> - 258dc: 0005883a mov r2,zero - 258e0: 003dbd06 br 24fd8 <___vfprintf_internal_r+0x17d4> - 258e4: 2000211e bne r4,zero,2596c <___vfprintf_internal_r+0x2168> - 258e8: 9480004c andi r18,r18,1 - 258ec: 90001f1e bne r18,zero,2596c <___vfprintf_internal_r+0x2168> - 258f0: 00800044 movi r2,1 - 258f4: d8802e15 stw r2,184(sp) - 258f8: 003db706 br 24fd8 <___vfprintf_internal_r+0x17d4> - 258fc: 00800b44 movi r2,45 - 25900: 05adc83a sub r22,zero,r22 - 25904: d8802305 stb r2,140(sp) - 25908: 003f3f06 br 25608 <___vfprintf_internal_r+0x1e04> - 2590c: 0005883a mov r2,zero - 25910: 003f5206 br 2565c <___vfprintf_internal_r+0x1e58> - 25914: 90a4703a and r18,r18,r2 - 25918: 903f4e26 beq r18,zero,25654 <___vfprintf_internal_r+0x1e50> - 2591c: 003f4a06 br 25648 <___vfprintf_internal_r+0x1e44> - 25920: 00800084 movi r2,2 - 25924: 10c5c83a sub r2,r2,r3 - 25928: 003f8406 br 2573c <___vfprintf_internal_r+0x1f38> - 2592c: d8802d17 ldw r2,180(sp) - 25930: d9002d17 ldw r4,180(sp) - 25934: ac400043 ldbu r17,1(r21) - 25938: 10800017 ldw r2,0(r2) - 2593c: 582b883a mov r21,r11 - 25940: d8802915 stw r2,164(sp) - 25944: 20800104 addi r2,r4,4 - 25948: d9002917 ldw r4,164(sp) - 2594c: d8802d15 stw r2,180(sp) - 25950: 203e7a0e bge r4,zero,2533c <___vfprintf_internal_r+0x1b38> - 25954: 8c403fcc andi r17,r17,255 - 25958: 00bfffc4 movi r2,-1 - 2595c: 8c40201c xori r17,r17,128 - 25960: d8802915 stw r2,164(sp) - 25964: 8c7fe004 addi r17,r17,-128 - 25968: 00380706 br 23988 <___vfprintf_internal_r+0x184> - 2596c: d8c02917 ldw r3,164(sp) - 25970: 18c00084 addi r3,r3,2 - 25974: d8c02e15 stw r3,184(sp) - 25978: 1805883a mov r2,r3 - 2597c: 183d960e bge r3,zero,24fd8 <___vfprintf_internal_r+0x17d4> - 25980: 003fd606 br 258dc <___vfprintf_internal_r+0x20d8> - 25984: 0005883a mov r2,zero - 25988: 003f8e06 br 257c4 <___vfprintf_internal_r+0x1fc0> - 2598c: 9080004c andi r2,r18,1 - 25990: 103f811e bne r2,zero,25798 <___vfprintf_internal_r+0x1f94> - 25994: d8802117 ldw r2,132(sp) - 25998: 1405c83a sub r2,r2,r16 - 2599c: d8803315 stw r2,204(sp) - 259a0: b47ef326 beq r22,r17,25570 <___vfprintf_internal_r+0x1d6c> - 259a4: dd802617 ldw r22,152(sp) - 259a8: 003f1106 br 255f0 <___vfprintf_internal_r+0x1dec> - 259ac: d9c02785 stb r7,158(sp) - 259b0: 00390406 br 23dc4 <___vfprintf_internal_r+0x5c0> - 259b4: d9c02785 stb r7,158(sp) - 259b8: 0038d306 br 23d08 <___vfprintf_internal_r+0x504> - 259bc: d9c02785 stb r7,158(sp) - 259c0: 003a6106 br 24348 <___vfprintf_internal_r+0xb44> - 259c4: d9c02785 stb r7,158(sp) - 259c8: 003af806 br 245ac <___vfprintf_internal_r+0xda8> - 259cc: 0005883a mov r2,zero - 259d0: 003d7e06 br 24fcc <___vfprintf_internal_r+0x17c8> - 259d4: d8802344 addi r2,sp,141 - 259d8: 003f1306 br 25628 <___vfprintf_internal_r+0x1e24> - 259dc: d9c02785 stb r7,158(sp) - 259e0: 00392306 br 23e70 <___vfprintf_internal_r+0x66c> - 259e4: d9c02785 stb r7,158(sp) - 259e8: 003aa906 br 24490 <___vfprintf_internal_r+0xc8c> - 259ec: d9c02785 stb r7,158(sp) - 259f0: 003a3d06 br 242e8 <___vfprintf_internal_r+0xae4> - 259f4: d9c02785 stb r7,158(sp) - 259f8: 003aca06 br 24524 <___vfprintf_internal_r+0xd20> + 24bcc: d8801f15 stw r2,124(sp) + 24bd0: 010001c4 movi r4,7 + 24bd4: 20805c16 blt r4,r2,24d48 <___vfprintf_internal_r+0x1b08> + 24bd8: 42000204 addi r8,r8,8 + 24bdc: 8800041e bne r17,zero,24bf0 <___vfprintf_internal_r+0x19b0> + 24be0: d8803317 ldw r2,204(sp) + 24be4: 1000021e bne r2,zero,24bf0 <___vfprintf_internal_r+0x19b0> + 24be8: 9080004c andi r2,r18,1 + 24bec: 103c0926 beq r2,zero,23c14 <_gp+0xfffe76dc> + 24bf0: d9003717 ldw r4,220(sp) + 24bf4: d8801f17 ldw r2,124(sp) + 24bf8: d9403417 ldw r5,208(sp) + 24bfc: 20c7883a add r3,r4,r3 + 24c00: 10800044 addi r2,r2,1 + 24c04: 41000115 stw r4,4(r8) + 24c08: 41400015 stw r5,0(r8) + 24c0c: d8c02015 stw r3,128(sp) + 24c10: d8801f15 stw r2,124(sp) + 24c14: 010001c4 movi r4,7 + 24c18: 20812116 blt r4,r2,250a0 <___vfprintf_internal_r+0x1e60> + 24c1c: 42000204 addi r8,r8,8 + 24c20: 0463c83a sub r17,zero,r17 + 24c24: 0440730e bge zero,r17,24df4 <___vfprintf_internal_r+0x1bb4> + 24c28: 05800404 movi r22,16 + 24c2c: b440860e bge r22,r17,24e48 <___vfprintf_internal_r+0x1c08> + 24c30: 014000f4 movhi r5,3 + 24c34: 29480c84 addi r5,r5,8242 + 24c38: d9402b15 stw r5,172(sp) + 24c3c: 070001c4 movi fp,7 + 24c40: dcc02c17 ldw r19,176(sp) + 24c44: 00000306 br 24c54 <___vfprintf_internal_r+0x1a14> + 24c48: 42000204 addi r8,r8,8 + 24c4c: 8c7ffc04 addi r17,r17,-16 + 24c50: b440800e bge r22,r17,24e54 <___vfprintf_internal_r+0x1c14> + 24c54: 18c00404 addi r3,r3,16 + 24c58: 10800044 addi r2,r2,1 + 24c5c: 45000015 stw r20,0(r8) + 24c60: 45800115 stw r22,4(r8) + 24c64: d8c02015 stw r3,128(sp) + 24c68: d8801f15 stw r2,124(sp) + 24c6c: e0bff60e bge fp,r2,24c48 <_gp+0xfffe8710> + 24c70: d9801e04 addi r6,sp,120 + 24c74: b80b883a mov r5,r23 + 24c78: 9809883a mov r4,r19 + 24c7c: 002a01c0 call 2a01c <__sprint_r> + 24c80: 103a711e bne r2,zero,23648 <_gp+0xfffe7110> + 24c84: d8c02017 ldw r3,128(sp) + 24c88: d8801f17 ldw r2,124(sp) + 24c8c: da000404 addi r8,sp,16 + 24c90: 003fee06 br 24c4c <_gp+0xfffe8714> + 24c94: 00bfffc4 movi r2,-1 + 24c98: 003a6f06 br 23658 <_gp+0xfffe7120> + 24c9c: 008011c4 movi r2,71 + 24ca0: 1440b816 blt r2,r17,24f84 <___vfprintf_internal_r+0x1d44> + 24ca4: 040000f4 movhi r16,3 + 24ca8: 8407fe04 addi r16,r16,8184 + 24cac: 00c000c4 movi r3,3 + 24cb0: 00bfdfc4 movi r2,-129 + 24cb4: d8c02a15 stw r3,168(sp) + 24cb8: 90a4703a and r18,r18,r2 + 24cbc: df002783 ldbu fp,158(sp) + 24cc0: d8c02e15 stw r3,184(sp) + 24cc4: d8002915 stw zero,164(sp) + 24cc8: d8003215 stw zero,200(sp) + 24ccc: 003b2906 br 23974 <_gp+0xfffe743c> + 24cd0: d9002d17 ldw r4,180(sp) + 24cd4: 24c00017 ldw r19,0(r4) + 24cd8: 21000104 addi r4,r4,4 + 24cdc: d9002d15 stw r4,180(sp) + 24ce0: 982dd7fa srai r22,r19,31 + 24ce4: b005883a mov r2,r22 + 24ce8: 003a9f06 br 23768 <_gp+0xfffe7230> + 24cec: d9402d17 ldw r5,180(sp) + 24cf0: d8c02f17 ldw r3,188(sp) + 24cf4: 28800017 ldw r2,0(r5) + 24cf8: 29400104 addi r5,r5,4 + 24cfc: d9402d15 stw r5,180(sp) + 24d00: 10c00015 stw r3,0(r2) + 24d04: 00398606 br 23320 <_gp+0xfffe6de8> + 24d08: d9402d17 ldw r5,180(sp) + 24d0c: 002d883a mov r22,zero + 24d10: 2cc00017 ldw r19,0(r5) + 24d14: 29400104 addi r5,r5,4 + 24d18: d9402d15 stw r5,180(sp) + 24d1c: 003c2306 br 23dac <_gp+0xfffe7874> + 24d20: d8c02d17 ldw r3,180(sp) + 24d24: d9002917 ldw r4,164(sp) + 24d28: 002d883a mov r22,zero + 24d2c: 18800104 addi r2,r3,4 + 24d30: 1cc0000b ldhu r19,0(r3) + 24d34: 203dc10e bge r4,zero,2443c <_gp+0xfffe7f04> + 24d38: 003f7506 br 24b10 <_gp+0xfffe85d8> + 24d3c: 040000f4 movhi r16,3 + 24d40: 8407fc04 addi r16,r16,8176 + 24d44: 003acc06 br 23878 <_gp+0xfffe7340> + 24d48: d9002c17 ldw r4,176(sp) + 24d4c: d9801e04 addi r6,sp,120 + 24d50: b80b883a mov r5,r23 + 24d54: 002a01c0 call 2a01c <__sprint_r> + 24d58: 103a3b1e bne r2,zero,23648 <_gp+0xfffe7110> + 24d5c: dc402617 ldw r17,152(sp) + 24d60: d8c02017 ldw r3,128(sp) + 24d64: da000404 addi r8,sp,16 + 24d68: 003f9c06 br 24bdc <_gp+0xfffe86a4> + 24d6c: ac400043 ldbu r17,1(r21) + 24d70: 94800814 ori r18,r18,32 + 24d74: ad400044 addi r21,r21,1 + 24d78: 8c403fcc andi r17,r17,255 + 24d7c: 8c40201c xori r17,r17,128 + 24d80: 8c7fe004 addi r17,r17,-128 + 24d84: 00398f06 br 233c4 <_gp+0xfffe6e8c> + 24d88: d8c02d15 stw r3,180(sp) + 24d8c: 0039883a mov fp,zero + 24d90: 003e3506 br 24668 <_gp+0xfffe8130> + 24d94: d9002c17 ldw r4,176(sp) + 24d98: d9801e04 addi r6,sp,120 + 24d9c: b80b883a mov r5,r23 + 24da0: 002a01c0 call 2a01c <__sprint_r> + 24da4: 103a281e bne r2,zero,23648 <_gp+0xfffe7110> + 24da8: d8c02017 ldw r3,128(sp) + 24dac: da000404 addi r8,sp,16 + 24db0: 003cd006 br 240f4 <_gp+0xfffe7bbc> + 24db4: 8009883a mov r4,r16 + 24db8: da003d15 stw r8,244(sp) + 24dbc: 00231a80 call 231a8 + 24dc0: d8802e15 stw r2,184(sp) + 24dc4: da003d17 ldw r8,244(sp) + 24dc8: 103c340e bge r2,zero,23e9c <_gp+0xfffe7964> + 24dcc: 0005883a mov r2,zero + 24dd0: 003c3206 br 23e9c <_gp+0xfffe7964> + 24dd4: d9002c17 ldw r4,176(sp) + 24dd8: d9801e04 addi r6,sp,120 + 24ddc: b80b883a mov r5,r23 + 24de0: 002a01c0 call 2a01c <__sprint_r> + 24de4: 103a181e bne r2,zero,23648 <_gp+0xfffe7110> + 24de8: d8c02017 ldw r3,128(sp) + 24dec: d8801f17 ldw r2,124(sp) + 24df0: da000404 addi r8,sp,16 + 24df4: d9403317 ldw r5,204(sp) + 24df8: 10800044 addi r2,r2,1 + 24dfc: 44000015 stw r16,0(r8) + 24e00: 28c7883a add r3,r5,r3 + 24e04: 003b7d06 br 23bfc <_gp+0xfffe76c4> + 24e08: 010000f4 movhi r4,3 + 24e0c: 21081084 addi r4,r4,8258 + 24e10: d9003515 stw r4,212(sp) + 24e14: 003b1406 br 23a68 <_gp+0xfffe7530> + 24e18: 013fffc4 movi r4,-1 + 24e1c: 003a3506 br 236f4 <_gp+0xfffe71bc> + 24e20: 0023883a mov r17,zero + 24e24: 003d9d06 br 2449c <_gp+0xfffe7f64> + 24e28: d9002c17 ldw r4,176(sp) + 24e2c: d9801e04 addi r6,sp,120 + 24e30: b80b883a mov r5,r23 + 24e34: 002a01c0 call 2a01c <__sprint_r> + 24e38: 103a031e bne r2,zero,23648 <_gp+0xfffe7110> + 24e3c: d8c02017 ldw r3,128(sp) + 24e40: da000404 addi r8,sp,16 + 24e44: 003d9406 br 24498 <_gp+0xfffe7f60> + 24e48: 010000f4 movhi r4,3 + 24e4c: 21080c84 addi r4,r4,8242 + 24e50: d9002b15 stw r4,172(sp) + 24e54: d9002b17 ldw r4,172(sp) + 24e58: 1c47883a add r3,r3,r17 + 24e5c: 10800044 addi r2,r2,1 + 24e60: 41000015 stw r4,0(r8) + 24e64: 44400115 stw r17,4(r8) + 24e68: d8c02015 stw r3,128(sp) + 24e6c: d8801f15 stw r2,124(sp) + 24e70: 010001c4 movi r4,7 + 24e74: 20bfd716 blt r4,r2,24dd4 <_gp+0xfffe889c> + 24e78: 42000204 addi r8,r8,8 + 24e7c: 003fdd06 br 24df4 <_gp+0xfffe88bc> + 24e80: d9002c17 ldw r4,176(sp) + 24e84: d9801e04 addi r6,sp,120 + 24e88: b80b883a mov r5,r23 + 24e8c: 002a01c0 call 2a01c <__sprint_r> + 24e90: 1039ed1e bne r2,zero,23648 <_gp+0xfffe7110> + 24e94: d8802617 ldw r2,152(sp) + 24e98: d8c02017 ldw r3,128(sp) + 24e9c: da000404 addi r8,sp,16 + 24ea0: 003e1006 br 246e4 <_gp+0xfffe81ac> + 24ea4: 00800044 movi r2,1 + 24ea8: 10803fcc andi r2,r2,255 + 24eac: 00c00044 movi r3,1 + 24eb0: 10fa3526 beq r2,r3,23788 <_gp+0xfffe7250> + 24eb4: 00c00084 movi r3,2 + 24eb8: 10fbcb26 beq r2,r3,23de8 <_gp+0xfffe78b0> + 24ebc: 003a8f06 br 238fc <_gp+0xfffe73c4> + 24ec0: 010000f4 movhi r4,3 + 24ec4: 21081084 addi r4,r4,8258 + 24ec8: d9003515 stw r4,212(sp) + 24ecc: 003b7606 br 23ca8 <_gp+0xfffe7770> + 24ed0: d8802917 ldw r2,164(sp) + 24ed4: 00c00184 movi r3,6 + 24ed8: 1880012e bgeu r3,r2,24ee0 <___vfprintf_internal_r+0x1ca0> + 24edc: 1805883a mov r2,r3 + 24ee0: d8802e15 stw r2,184(sp) + 24ee4: 1000ef16 blt r2,zero,252a4 <___vfprintf_internal_r+0x2064> + 24ee8: 040000f4 movhi r16,3 + 24eec: d8802a15 stw r2,168(sp) + 24ef0: dcc02d15 stw r19,180(sp) + 24ef4: d8002915 stw zero,164(sp) + 24ef8: d8003215 stw zero,200(sp) + 24efc: 84080a04 addi r16,r16,8232 + 24f00: 0039883a mov fp,zero + 24f04: 003aa206 br 23990 <_gp+0xfffe7458> + 24f08: 0021883a mov r16,zero + 24f0c: 003e0706 br 2472c <_gp+0xfffe81f4> + 24f10: d9002c17 ldw r4,176(sp) + 24f14: d9801e04 addi r6,sp,120 + 24f18: b80b883a mov r5,r23 + 24f1c: 002a01c0 call 2a01c <__sprint_r> + 24f20: 1039c91e bne r2,zero,23648 <_gp+0xfffe7110> + 24f24: d8802617 ldw r2,152(sp) + 24f28: d9403317 ldw r5,204(sp) + 24f2c: d8c02017 ldw r3,128(sp) + 24f30: da000404 addi r8,sp,16 + 24f34: 2885c83a sub r2,r5,r2 + 24f38: 003dfb06 br 24728 <_gp+0xfffe81f0> + 24f3c: 9080004c andi r2,r18,1 + 24f40: 103e8f1e bne r2,zero,24980 <_gp+0xfffe8448> + 24f44: d8802117 ldw r2,132(sp) + 24f48: 003e9e06 br 249c4 <_gp+0xfffe848c> + 24f4c: 1025883a mov r18,r2 + 24f50: 0039883a mov fp,zero + 24f54: 00800084 movi r2,2 + 24f58: 003fd306 br 24ea8 <_gp+0xfffe8970> + 24f5c: 07000b44 movi fp,45 + 24f60: df002785 stb fp,158(sp) + 24f64: 003a4006 br 23868 <_gp+0xfffe7330> + 24f68: 00c00b44 movi r3,45 + 24f6c: d8c02785 stb r3,158(sp) + 24f70: d8802a15 stw r2,168(sp) + 24f74: dc802b17 ldw r18,172(sp) + 24f78: d8002915 stw zero,164(sp) + 24f7c: 07000b44 movi fp,45 + 24f80: 003a8006 br 23984 <_gp+0xfffe744c> + 24f84: 040000f4 movhi r16,3 + 24f88: 8407ff04 addi r16,r16,8188 + 24f8c: 003f4706 br 24cac <_gp+0xfffe8774> + 24f90: d8c02d17 ldw r3,180(sp) + 24f94: d9002f17 ldw r4,188(sp) + 24f98: 18800017 ldw r2,0(r3) + 24f9c: 18c00104 addi r3,r3,4 + 24fa0: d8c02d15 stw r3,180(sp) + 24fa4: 11000015 stw r4,0(r2) + 24fa8: 0038dd06 br 23320 <_gp+0xfffe6de8> + 24fac: dd802617 ldw r22,152(sp) + 24fb0: 00bfff44 movi r2,-3 + 24fb4: b0801c16 blt r22,r2,25028 <___vfprintf_internal_r+0x1de8> + 24fb8: d9402917 ldw r5,164(sp) + 24fbc: 2d801a16 blt r5,r22,25028 <___vfprintf_internal_r+0x1de8> + 24fc0: dd803215 stw r22,200(sp) + 24fc4: 003e8906 br 249ec <_gp+0xfffe84b4> + 24fc8: 010000f4 movhi r4,3 + 24fcc: 21080c84 addi r4,r4,8242 + 24fd0: d9002b15 stw r4,172(sp) + 24fd4: 003c9106 br 2421c <_gp+0xfffe7ce4> + 24fd8: e005883a mov r2,fp + 24fdc: 003e7906 br 249c4 <_gp+0xfffe848c> + 24fe0: d9402917 ldw r5,164(sp) + 24fe4: df002783 ldbu fp,158(sp) + 24fe8: dcc02d15 stw r19,180(sp) + 24fec: d9402a15 stw r5,168(sp) + 24ff0: d9402e15 stw r5,184(sp) + 24ff4: d8002915 stw zero,164(sp) + 24ff8: d8003215 stw zero,200(sp) + 24ffc: 003a5d06 br 23974 <_gp+0xfffe743c> + 25000: 9080004c andi r2,r18,1 + 25004: 0039883a mov fp,zero + 25008: 10000426 beq r2,zero,2501c <___vfprintf_internal_r+0x1ddc> + 2500c: 00800c04 movi r2,48 + 25010: dc001dc4 addi r16,sp,119 + 25014: d8801dc5 stb r2,119(sp) + 25018: 003b8006 br 23e1c <_gp+0xfffe78e4> + 2501c: d8002e15 stw zero,184(sp) + 25020: dc001e04 addi r16,sp,120 + 25024: 003a4d06 br 2395c <_gp+0xfffe7424> + 25028: 8c7fff84 addi r17,r17,-2 + 2502c: b5bfffc4 addi r22,r22,-1 + 25030: dd802615 stw r22,152(sp) + 25034: dc4022c5 stb r17,139(sp) + 25038: b000bf16 blt r22,zero,25338 <___vfprintf_internal_r+0x20f8> + 2503c: 00800ac4 movi r2,43 + 25040: d8802305 stb r2,140(sp) + 25044: 00800244 movi r2,9 + 25048: 15807016 blt r2,r22,2520c <___vfprintf_internal_r+0x1fcc> + 2504c: 00800c04 movi r2,48 + 25050: b5800c04 addi r22,r22,48 + 25054: d8802345 stb r2,141(sp) + 25058: dd802385 stb r22,142(sp) + 2505c: d88023c4 addi r2,sp,143 + 25060: df0022c4 addi fp,sp,139 + 25064: d8c03317 ldw r3,204(sp) + 25068: 1739c83a sub fp,r2,fp + 2506c: d9003317 ldw r4,204(sp) + 25070: e0c7883a add r3,fp,r3 + 25074: df003a15 stw fp,232(sp) + 25078: d8c02e15 stw r3,184(sp) + 2507c: 00800044 movi r2,1 + 25080: 1100b30e bge r2,r4,25350 <___vfprintf_internal_r+0x2110> + 25084: d8c02e17 ldw r3,184(sp) + 25088: 18c00044 addi r3,r3,1 + 2508c: d8c02e15 stw r3,184(sp) + 25090: 1805883a mov r2,r3 + 25094: 1800ac16 blt r3,zero,25348 <___vfprintf_internal_r+0x2108> + 25098: d8003215 stw zero,200(sp) + 2509c: 003e5d06 br 24a14 <_gp+0xfffe84dc> + 250a0: d9002c17 ldw r4,176(sp) + 250a4: d9801e04 addi r6,sp,120 + 250a8: b80b883a mov r5,r23 + 250ac: 002a01c0 call 2a01c <__sprint_r> + 250b0: 1039651e bne r2,zero,23648 <_gp+0xfffe7110> + 250b4: dc402617 ldw r17,152(sp) + 250b8: d8c02017 ldw r3,128(sp) + 250bc: d8801f17 ldw r2,124(sp) + 250c0: da000404 addi r8,sp,16 + 250c4: 003ed606 br 24c20 <_gp+0xfffe86e8> + 250c8: 582b883a mov r21,r11 + 250cc: d8002915 stw zero,164(sp) + 250d0: 0038bd06 br 233c8 <_gp+0xfffe6e90> + 250d4: d8802917 ldw r2,164(sp) + 250d8: 103e071e bne r2,zero,248f8 <_gp+0xfffe83c0> + 250dc: dc002915 stw r16,164(sp) + 250e0: 003e0506 br 248f8 <_gp+0xfffe83c0> + 250e4: d9002917 ldw r4,164(sp) + 250e8: 20c00044 addi r3,r4,1 + 250ec: 003e0f06 br 2492c <_gp+0xfffe83f4> + 250f0: 01400184 movi r5,6 + 250f4: d9402915 stw r5,164(sp) + 250f8: 003dff06 br 248f8 <_gp+0xfffe83c0> + 250fc: d8802104 addi r2,sp,132 + 25100: d8800315 stw r2,12(sp) + 25104: d8802504 addi r2,sp,148 + 25108: d8800215 stw r2,8(sp) + 2510c: d8802604 addi r2,sp,152 + 25110: d8800115 stw r2,4(sp) + 25114: d8802917 ldw r2,164(sp) + 25118: d9403617 ldw r5,216(sp) + 2511c: d9002c17 ldw r4,176(sp) + 25120: d8800015 stw r2,0(sp) + 25124: 01c000c4 movi r7,3 + 25128: 980d883a mov r6,r19 + 2512c: da003d15 stw r8,244(sp) + 25130: 00258640 call 25864 <_dtoa_r> + 25134: d8c02917 ldw r3,164(sp) + 25138: da003d17 ldw r8,244(sp) + 2513c: 1021883a mov r16,r2 + 25140: 10f9883a add fp,r2,r3 + 25144: 81000007 ldb r4,0(r16) + 25148: 00800c04 movi r2,48 + 2514c: 20805e26 beq r4,r2,252c8 <___vfprintf_internal_r+0x2088> + 25150: d8c02617 ldw r3,152(sp) + 25154: e0f9883a add fp,fp,r3 + 25158: 003e0a06 br 24984 <_gp+0xfffe844c> + 2515c: 00c00b44 movi r3,45 + 25160: 24e0003c xorhi r19,r4,32768 + 25164: d8c02a05 stb r3,168(sp) + 25168: 003de906 br 24910 <_gp+0xfffe83d8> + 2516c: d8c03217 ldw r3,200(sp) + 25170: 00c07a0e bge zero,r3,2535c <___vfprintf_internal_r+0x211c> + 25174: 00800044 movi r2,1 + 25178: d9003317 ldw r4,204(sp) + 2517c: 1105883a add r2,r2,r4 + 25180: d8802e15 stw r2,184(sp) + 25184: 10004e16 blt r2,zero,252c0 <___vfprintf_internal_r+0x2080> + 25188: 044019c4 movi r17,103 + 2518c: 003e2106 br 24a14 <_gp+0xfffe84dc> + 25190: d9002917 ldw r4,164(sp) + 25194: d8802104 addi r2,sp,132 + 25198: d8800315 stw r2,12(sp) + 2519c: d9000015 stw r4,0(sp) + 251a0: d8802504 addi r2,sp,148 + 251a4: d9403617 ldw r5,216(sp) + 251a8: d9002c17 ldw r4,176(sp) + 251ac: d8800215 stw r2,8(sp) + 251b0: d8802604 addi r2,sp,152 + 251b4: d8800115 stw r2,4(sp) + 251b8: 01c000c4 movi r7,3 + 251bc: 980d883a mov r6,r19 + 251c0: da003d15 stw r8,244(sp) + 251c4: 00258640 call 25864 <_dtoa_r> + 251c8: d8c02917 ldw r3,164(sp) + 251cc: da003d17 ldw r8,244(sp) + 251d0: 1021883a mov r16,r2 + 251d4: 00801184 movi r2,70 + 251d8: 80f9883a add fp,r16,r3 + 251dc: 88bfd926 beq r17,r2,25144 <_gp+0xfffe8c0c> + 251e0: 003de806 br 24984 <_gp+0xfffe844c> + 251e4: d9002917 ldw r4,164(sp) + 251e8: 00c04d0e bge zero,r3,25320 <___vfprintf_internal_r+0x20e0> + 251ec: 2000441e bne r4,zero,25300 <___vfprintf_internal_r+0x20c0> + 251f0: 9480004c andi r18,r18,1 + 251f4: 9000421e bne r18,zero,25300 <___vfprintf_internal_r+0x20c0> + 251f8: 1805883a mov r2,r3 + 251fc: 18007016 blt r3,zero,253c0 <___vfprintf_internal_r+0x2180> + 25200: d8c03217 ldw r3,200(sp) + 25204: d8c02e15 stw r3,184(sp) + 25208: 003e0206 br 24a14 <_gp+0xfffe84dc> + 2520c: df0022c4 addi fp,sp,139 + 25210: dc002915 stw r16,164(sp) + 25214: 4027883a mov r19,r8 + 25218: e021883a mov r16,fp + 2521c: b009883a mov r4,r22 + 25220: 01400284 movi r5,10 + 25224: 00225680 call 22568 <__modsi3> + 25228: 10800c04 addi r2,r2,48 + 2522c: 843fffc4 addi r16,r16,-1 + 25230: b009883a mov r4,r22 + 25234: 01400284 movi r5,10 + 25238: 80800005 stb r2,0(r16) + 2523c: 00224e40 call 224e4 <__divsi3> + 25240: 102d883a mov r22,r2 + 25244: 00800244 movi r2,9 + 25248: 15bff416 blt r2,r22,2521c <_gp+0xfffe8ce4> + 2524c: 9811883a mov r8,r19 + 25250: b0800c04 addi r2,r22,48 + 25254: 8027883a mov r19,r16 + 25258: 997fffc4 addi r5,r19,-1 + 2525c: 98bfffc5 stb r2,-1(r19) + 25260: dc002917 ldw r16,164(sp) + 25264: 2f006a2e bgeu r5,fp,25410 <___vfprintf_internal_r+0x21d0> + 25268: d9c02384 addi r7,sp,142 + 2526c: 3ccfc83a sub r7,r7,r19 + 25270: d9002344 addi r4,sp,141 + 25274: e1cf883a add r7,fp,r7 + 25278: 00000106 br 25280 <___vfprintf_internal_r+0x2040> + 2527c: 28800003 ldbu r2,0(r5) + 25280: 20800005 stb r2,0(r4) + 25284: 21000044 addi r4,r4,1 + 25288: 29400044 addi r5,r5,1 + 2528c: 393ffb1e bne r7,r4,2527c <_gp+0xfffe8d44> + 25290: d8802304 addi r2,sp,140 + 25294: 14c5c83a sub r2,r2,r19 + 25298: d8c02344 addi r3,sp,141 + 2529c: 1885883a add r2,r3,r2 + 252a0: 003f7006 br 25064 <_gp+0xfffe8b2c> + 252a4: 0005883a mov r2,zero + 252a8: 003f0f06 br 24ee8 <_gp+0xfffe89b0> + 252ac: d8c03217 ldw r3,200(sp) + 252b0: 18c00044 addi r3,r3,1 + 252b4: d8c02e15 stw r3,184(sp) + 252b8: 1805883a mov r2,r3 + 252bc: 183fb20e bge r3,zero,25188 <_gp+0xfffe8c50> + 252c0: 0005883a mov r2,zero + 252c4: 003fb006 br 25188 <_gp+0xfffe8c50> + 252c8: d9003617 ldw r4,216(sp) + 252cc: 000d883a mov r6,zero + 252d0: 000f883a mov r7,zero + 252d4: 980b883a mov r5,r19 + 252d8: d8c03c15 stw r3,240(sp) + 252dc: da003d15 stw r8,244(sp) + 252e0: 002dae00 call 2dae0 <__eqdf2> + 252e4: d8c03c17 ldw r3,240(sp) + 252e8: da003d17 ldw r8,244(sp) + 252ec: 103f9826 beq r2,zero,25150 <_gp+0xfffe8c18> + 252f0: 00800044 movi r2,1 + 252f4: 10c7c83a sub r3,r2,r3 + 252f8: d8c02615 stw r3,152(sp) + 252fc: 003f9506 br 25154 <_gp+0xfffe8c1c> + 25300: d9002917 ldw r4,164(sp) + 25304: d8c03217 ldw r3,200(sp) + 25308: 20800044 addi r2,r4,1 + 2530c: 1885883a add r2,r3,r2 + 25310: d8802e15 stw r2,184(sp) + 25314: 103dbf0e bge r2,zero,24a14 <_gp+0xfffe84dc> + 25318: 0005883a mov r2,zero + 2531c: 003dbd06 br 24a14 <_gp+0xfffe84dc> + 25320: 2000211e bne r4,zero,253a8 <___vfprintf_internal_r+0x2168> + 25324: 9480004c andi r18,r18,1 + 25328: 90001f1e bne r18,zero,253a8 <___vfprintf_internal_r+0x2168> + 2532c: 00800044 movi r2,1 + 25330: d8802e15 stw r2,184(sp) + 25334: 003db706 br 24a14 <_gp+0xfffe84dc> + 25338: 00800b44 movi r2,45 + 2533c: 05adc83a sub r22,zero,r22 + 25340: d8802305 stb r2,140(sp) + 25344: 003f3f06 br 25044 <_gp+0xfffe8b0c> + 25348: 0005883a mov r2,zero + 2534c: 003f5206 br 25098 <_gp+0xfffe8b60> + 25350: 90a4703a and r18,r18,r2 + 25354: 903f4e26 beq r18,zero,25090 <_gp+0xfffe8b58> + 25358: 003f4a06 br 25084 <_gp+0xfffe8b4c> + 2535c: 00800084 movi r2,2 + 25360: 10c5c83a sub r2,r2,r3 + 25364: 003f8406 br 25178 <_gp+0xfffe8c40> + 25368: d8802d17 ldw r2,180(sp) + 2536c: d9002d17 ldw r4,180(sp) + 25370: ac400043 ldbu r17,1(r21) + 25374: 10800017 ldw r2,0(r2) + 25378: 582b883a mov r21,r11 + 2537c: d8802915 stw r2,164(sp) + 25380: 20800104 addi r2,r4,4 + 25384: d9002917 ldw r4,164(sp) + 25388: d8802d15 stw r2,180(sp) + 2538c: 203e7a0e bge r4,zero,24d78 <_gp+0xfffe8840> + 25390: 8c403fcc andi r17,r17,255 + 25394: 00bfffc4 movi r2,-1 + 25398: 8c40201c xori r17,r17,128 + 2539c: d8802915 stw r2,164(sp) + 253a0: 8c7fe004 addi r17,r17,-128 + 253a4: 00380706 br 233c4 <_gp+0xfffe6e8c> + 253a8: d8c02917 ldw r3,164(sp) + 253ac: 18c00084 addi r3,r3,2 + 253b0: d8c02e15 stw r3,184(sp) + 253b4: 1805883a mov r2,r3 + 253b8: 183d960e bge r3,zero,24a14 <_gp+0xfffe84dc> + 253bc: 003fd606 br 25318 <_gp+0xfffe8de0> + 253c0: 0005883a mov r2,zero + 253c4: 003f8e06 br 25200 <_gp+0xfffe8cc8> + 253c8: 9080004c andi r2,r18,1 + 253cc: 103f811e bne r2,zero,251d4 <_gp+0xfffe8c9c> + 253d0: d8802117 ldw r2,132(sp) + 253d4: 1405c83a sub r2,r2,r16 + 253d8: d8803315 stw r2,204(sp) + 253dc: b47ef326 beq r22,r17,24fac <_gp+0xfffe8a74> + 253e0: dd802617 ldw r22,152(sp) + 253e4: 003f1106 br 2502c <_gp+0xfffe8af4> + 253e8: d9c02785 stb r7,158(sp) + 253ec: 00390406 br 23800 <_gp+0xfffe72c8> + 253f0: d9c02785 stb r7,158(sp) + 253f4: 0038d306 br 23744 <_gp+0xfffe720c> + 253f8: d9c02785 stb r7,158(sp) + 253fc: 003a6106 br 23d84 <_gp+0xfffe784c> + 25400: d9c02785 stb r7,158(sp) + 25404: 003af806 br 23fe8 <_gp+0xfffe7ab0> + 25408: 0005883a mov r2,zero + 2540c: 003d7e06 br 24a08 <_gp+0xfffe84d0> + 25410: d8802344 addi r2,sp,141 + 25414: 003f1306 br 25064 <_gp+0xfffe8b2c> + 25418: d9c02785 stb r7,158(sp) + 2541c: 00392306 br 238ac <_gp+0xfffe7374> + 25420: d9c02785 stb r7,158(sp) + 25424: 003aa906 br 23ecc <_gp+0xfffe7994> + 25428: d9c02785 stb r7,158(sp) + 2542c: 003a3d06 br 23d24 <_gp+0xfffe77ec> + 25430: d9c02785 stb r7,158(sp) + 25434: 003aca06 br 23f60 <_gp+0xfffe7a28> -000259fc <__vfprintf_internal>: - 259fc: 008000f4 movhi r2,3 - 25a00: 10939f04 addi r2,r2,20092 - 25a04: 300f883a mov r7,r6 - 25a08: 280d883a mov r6,r5 - 25a0c: 200b883a mov r5,r4 - 25a10: 11000017 ldw r4,0(r2) - 25a14: 00238041 jmpi 23804 <___vfprintf_internal_r> +00025438 <__vfprintf_internal>: + 25438: 008000f4 movhi r2,3 + 2543c: 10915404 addi r2,r2,17744 + 25440: 300f883a mov r7,r6 + 25444: 280d883a mov r6,r5 + 25448: 200b883a mov r5,r4 + 2544c: 11000017 ldw r4,0(r2) + 25450: 00232401 jmpi 23240 <___vfprintf_internal_r> -00025a18 <__sbprintf>: - 25a18: 2880030b ldhu r2,12(r5) - 25a1c: 2ac01917 ldw r11,100(r5) - 25a20: 2a80038b ldhu r10,14(r5) - 25a24: 2a400717 ldw r9,28(r5) - 25a28: 2a000917 ldw r8,36(r5) - 25a2c: defee204 addi sp,sp,-1144 - 25a30: 00c10004 movi r3,1024 - 25a34: dc011a15 stw r16,1128(sp) - 25a38: 10bfff4c andi r2,r2,65533 - 25a3c: 2821883a mov r16,r5 - 25a40: d8cb883a add r5,sp,r3 - 25a44: dc811c15 stw r18,1136(sp) - 25a48: dc411b15 stw r17,1132(sp) - 25a4c: dfc11d15 stw ra,1140(sp) - 25a50: 2025883a mov r18,r4 - 25a54: d881030d sth r2,1036(sp) - 25a58: dac11915 stw r11,1124(sp) - 25a5c: da81038d sth r10,1038(sp) - 25a60: da410715 stw r9,1052(sp) - 25a64: da010915 stw r8,1060(sp) - 25a68: dec10015 stw sp,1024(sp) - 25a6c: dec10415 stw sp,1040(sp) - 25a70: d8c10215 stw r3,1032(sp) - 25a74: d8c10515 stw r3,1044(sp) - 25a78: d8010615 stw zero,1048(sp) - 25a7c: 00238040 call 23804 <___vfprintf_internal_r> - 25a80: 1023883a mov r17,r2 - 25a84: 10000416 blt r2,zero,25a98 <__sbprintf+0x80> - 25a88: d9410004 addi r5,sp,1024 - 25a8c: 9009883a mov r4,r18 - 25a90: 00276cc0 call 276cc <_fflush_r> - 25a94: 10000d1e bne r2,zero,25acc <__sbprintf+0xb4> - 25a98: d881030b ldhu r2,1036(sp) - 25a9c: 1080100c andi r2,r2,64 - 25aa0: 10000326 beq r2,zero,25ab0 <__sbprintf+0x98> - 25aa4: 8080030b ldhu r2,12(r16) - 25aa8: 10801014 ori r2,r2,64 - 25aac: 8080030d sth r2,12(r16) - 25ab0: 8805883a mov r2,r17 - 25ab4: dfc11d17 ldw ra,1140(sp) - 25ab8: dc811c17 ldw r18,1136(sp) - 25abc: dc411b17 ldw r17,1132(sp) - 25ac0: dc011a17 ldw r16,1128(sp) - 25ac4: dec11e04 addi sp,sp,1144 - 25ac8: f800283a ret - 25acc: 047fffc4 movi r17,-1 - 25ad0: 003ff106 br 25a98 <__sbprintf+0x80> +00025454 <__sbprintf>: + 25454: 2880030b ldhu r2,12(r5) + 25458: 2ac01917 ldw r11,100(r5) + 2545c: 2a80038b ldhu r10,14(r5) + 25460: 2a400717 ldw r9,28(r5) + 25464: 2a000917 ldw r8,36(r5) + 25468: defee204 addi sp,sp,-1144 + 2546c: 00c10004 movi r3,1024 + 25470: dc011a15 stw r16,1128(sp) + 25474: 10bfff4c andi r2,r2,65533 + 25478: 2821883a mov r16,r5 + 2547c: d8cb883a add r5,sp,r3 + 25480: dc811c15 stw r18,1136(sp) + 25484: dc411b15 stw r17,1132(sp) + 25488: dfc11d15 stw ra,1140(sp) + 2548c: 2025883a mov r18,r4 + 25490: d881030d sth r2,1036(sp) + 25494: dac11915 stw r11,1124(sp) + 25498: da81038d sth r10,1038(sp) + 2549c: da410715 stw r9,1052(sp) + 254a0: da010915 stw r8,1060(sp) + 254a4: dec10015 stw sp,1024(sp) + 254a8: dec10415 stw sp,1040(sp) + 254ac: d8c10215 stw r3,1032(sp) + 254b0: d8c10515 stw r3,1044(sp) + 254b4: d8010615 stw zero,1048(sp) + 254b8: 00232400 call 23240 <___vfprintf_internal_r> + 254bc: 1023883a mov r17,r2 + 254c0: 10000416 blt r2,zero,254d4 <__sbprintf+0x80> + 254c4: d9410004 addi r5,sp,1024 + 254c8: 9009883a mov r4,r18 + 254cc: 00271080 call 27108 <_fflush_r> + 254d0: 10000d1e bne r2,zero,25508 <__sbprintf+0xb4> + 254d4: d881030b ldhu r2,1036(sp) + 254d8: 1080100c andi r2,r2,64 + 254dc: 10000326 beq r2,zero,254ec <__sbprintf+0x98> + 254e0: 8080030b ldhu r2,12(r16) + 254e4: 10801014 ori r2,r2,64 + 254e8: 8080030d sth r2,12(r16) + 254ec: 8805883a mov r2,r17 + 254f0: dfc11d17 ldw ra,1140(sp) + 254f4: dc811c17 ldw r18,1136(sp) + 254f8: dc411b17 ldw r17,1132(sp) + 254fc: dc011a17 ldw r16,1128(sp) + 25500: dec11e04 addi sp,sp,1144 + 25504: f800283a ret + 25508: 047fffc4 movi r17,-1 + 2550c: 003ff106 br 254d4 <_gp+0xfffe8f9c> -00025ad4 <__swsetup_r>: - 25ad4: 008000f4 movhi r2,3 - 25ad8: defffd04 addi sp,sp,-12 - 25adc: 10939f04 addi r2,r2,20092 - 25ae0: dc400115 stw r17,4(sp) - 25ae4: 2023883a mov r17,r4 - 25ae8: 11000017 ldw r4,0(r2) - 25aec: dc000015 stw r16,0(sp) - 25af0: dfc00215 stw ra,8(sp) - 25af4: 2821883a mov r16,r5 - 25af8: 20000226 beq r4,zero,25b04 <__swsetup_r+0x30> - 25afc: 20800e17 ldw r2,56(r4) - 25b00: 10003126 beq r2,zero,25bc8 <__swsetup_r+0xf4> - 25b04: 8080030b ldhu r2,12(r16) - 25b08: 10c0020c andi r3,r2,8 - 25b0c: 1009883a mov r4,r2 - 25b10: 18000f26 beq r3,zero,25b50 <__swsetup_r+0x7c> - 25b14: 80c00417 ldw r3,16(r16) - 25b18: 18001526 beq r3,zero,25b70 <__swsetup_r+0x9c> - 25b1c: 1100004c andi r4,r2,1 - 25b20: 20001c1e bne r4,zero,25b94 <__swsetup_r+0xc0> - 25b24: 1080008c andi r2,r2,2 - 25b28: 1000291e bne r2,zero,25bd0 <__swsetup_r+0xfc> - 25b2c: 80800517 ldw r2,20(r16) - 25b30: 80800215 stw r2,8(r16) - 25b34: 18001c26 beq r3,zero,25ba8 <__swsetup_r+0xd4> - 25b38: 0005883a mov r2,zero - 25b3c: dfc00217 ldw ra,8(sp) - 25b40: dc400117 ldw r17,4(sp) - 25b44: dc000017 ldw r16,0(sp) - 25b48: dec00304 addi sp,sp,12 - 25b4c: f800283a ret - 25b50: 2080040c andi r2,r4,16 - 25b54: 10002e26 beq r2,zero,25c10 <__swsetup_r+0x13c> - 25b58: 2080010c andi r2,r4,4 - 25b5c: 10001e1e bne r2,zero,25bd8 <__swsetup_r+0x104> - 25b60: 80c00417 ldw r3,16(r16) - 25b64: 20800214 ori r2,r4,8 - 25b68: 8080030d sth r2,12(r16) - 25b6c: 183feb1e bne r3,zero,25b1c <__swsetup_r+0x48> - 25b70: 1100a00c andi r4,r2,640 - 25b74: 01408004 movi r5,512 - 25b78: 217fe826 beq r4,r5,25b1c <__swsetup_r+0x48> - 25b7c: 800b883a mov r5,r16 - 25b80: 8809883a mov r4,r17 - 25b84: 002864c0 call 2864c <__smakebuf_r> - 25b88: 8080030b ldhu r2,12(r16) - 25b8c: 80c00417 ldw r3,16(r16) - 25b90: 003fe206 br 25b1c <__swsetup_r+0x48> - 25b94: 80800517 ldw r2,20(r16) - 25b98: 80000215 stw zero,8(r16) - 25b9c: 0085c83a sub r2,zero,r2 - 25ba0: 80800615 stw r2,24(r16) - 25ba4: 183fe41e bne r3,zero,25b38 <__swsetup_r+0x64> - 25ba8: 80c0030b ldhu r3,12(r16) - 25bac: 0005883a mov r2,zero - 25bb0: 1900200c andi r4,r3,128 - 25bb4: 203fe126 beq r4,zero,25b3c <__swsetup_r+0x68> - 25bb8: 18c01014 ori r3,r3,64 - 25bbc: 80c0030d sth r3,12(r16) - 25bc0: 00bfffc4 movi r2,-1 - 25bc4: 003fdd06 br 25b3c <__swsetup_r+0x68> - 25bc8: 0027aa80 call 27aa8 <__sinit> - 25bcc: 003fcd06 br 25b04 <__swsetup_r+0x30> - 25bd0: 0005883a mov r2,zero - 25bd4: 003fd606 br 25b30 <__swsetup_r+0x5c> - 25bd8: 81400c17 ldw r5,48(r16) - 25bdc: 28000626 beq r5,zero,25bf8 <__swsetup_r+0x124> - 25be0: 80801004 addi r2,r16,64 - 25be4: 28800326 beq r5,r2,25bf4 <__swsetup_r+0x120> - 25be8: 8809883a mov r4,r17 - 25bec: 0027c1c0 call 27c1c <_free_r> - 25bf0: 8100030b ldhu r4,12(r16) - 25bf4: 80000c15 stw zero,48(r16) - 25bf8: 80c00417 ldw r3,16(r16) - 25bfc: 00bff6c4 movi r2,-37 - 25c00: 1108703a and r4,r2,r4 - 25c04: 80000115 stw zero,4(r16) - 25c08: 80c00015 stw r3,0(r16) - 25c0c: 003fd506 br 25b64 <__swsetup_r+0x90> - 25c10: 00800244 movi r2,9 - 25c14: 88800015 stw r2,0(r17) - 25c18: 20801014 ori r2,r4,64 - 25c1c: 8080030d sth r2,12(r16) - 25c20: 00bfffc4 movi r2,-1 - 25c24: 003fc506 br 25b3c <__swsetup_r+0x68> +00025510 <__swsetup_r>: + 25510: 008000f4 movhi r2,3 + 25514: defffd04 addi sp,sp,-12 + 25518: 10915404 addi r2,r2,17744 + 2551c: dc400115 stw r17,4(sp) + 25520: 2023883a mov r17,r4 + 25524: 11000017 ldw r4,0(r2) + 25528: dc000015 stw r16,0(sp) + 2552c: dfc00215 stw ra,8(sp) + 25530: 2821883a mov r16,r5 + 25534: 20000226 beq r4,zero,25540 <__swsetup_r+0x30> + 25538: 20800e17 ldw r2,56(r4) + 2553c: 10003126 beq r2,zero,25604 <__swsetup_r+0xf4> + 25540: 8080030b ldhu r2,12(r16) + 25544: 10c0020c andi r3,r2,8 + 25548: 1009883a mov r4,r2 + 2554c: 18000f26 beq r3,zero,2558c <__swsetup_r+0x7c> + 25550: 80c00417 ldw r3,16(r16) + 25554: 18001526 beq r3,zero,255ac <__swsetup_r+0x9c> + 25558: 1100004c andi r4,r2,1 + 2555c: 20001c1e bne r4,zero,255d0 <__swsetup_r+0xc0> + 25560: 1080008c andi r2,r2,2 + 25564: 1000291e bne r2,zero,2560c <__swsetup_r+0xfc> + 25568: 80800517 ldw r2,20(r16) + 2556c: 80800215 stw r2,8(r16) + 25570: 18001c26 beq r3,zero,255e4 <__swsetup_r+0xd4> + 25574: 0005883a mov r2,zero + 25578: dfc00217 ldw ra,8(sp) + 2557c: dc400117 ldw r17,4(sp) + 25580: dc000017 ldw r16,0(sp) + 25584: dec00304 addi sp,sp,12 + 25588: f800283a ret + 2558c: 2080040c andi r2,r4,16 + 25590: 10002e26 beq r2,zero,2564c <__swsetup_r+0x13c> + 25594: 2080010c andi r2,r4,4 + 25598: 10001e1e bne r2,zero,25614 <__swsetup_r+0x104> + 2559c: 80c00417 ldw r3,16(r16) + 255a0: 20800214 ori r2,r4,8 + 255a4: 8080030d sth r2,12(r16) + 255a8: 183feb1e bne r3,zero,25558 <_gp+0xfffe9020> + 255ac: 1100a00c andi r4,r2,640 + 255b0: 01408004 movi r5,512 + 255b4: 217fe826 beq r4,r5,25558 <_gp+0xfffe9020> + 255b8: 800b883a mov r5,r16 + 255bc: 8809883a mov r4,r17 + 255c0: 00280880 call 28088 <__smakebuf_r> + 255c4: 8080030b ldhu r2,12(r16) + 255c8: 80c00417 ldw r3,16(r16) + 255cc: 003fe206 br 25558 <_gp+0xfffe9020> + 255d0: 80800517 ldw r2,20(r16) + 255d4: 80000215 stw zero,8(r16) + 255d8: 0085c83a sub r2,zero,r2 + 255dc: 80800615 stw r2,24(r16) + 255e0: 183fe41e bne r3,zero,25574 <_gp+0xfffe903c> + 255e4: 80c0030b ldhu r3,12(r16) + 255e8: 0005883a mov r2,zero + 255ec: 1900200c andi r4,r3,128 + 255f0: 203fe126 beq r4,zero,25578 <_gp+0xfffe9040> + 255f4: 18c01014 ori r3,r3,64 + 255f8: 80c0030d sth r3,12(r16) + 255fc: 00bfffc4 movi r2,-1 + 25600: 003fdd06 br 25578 <_gp+0xfffe9040> + 25604: 00274e40 call 274e4 <__sinit> + 25608: 003fcd06 br 25540 <_gp+0xfffe9008> + 2560c: 0005883a mov r2,zero + 25610: 003fd606 br 2556c <_gp+0xfffe9034> + 25614: 81400c17 ldw r5,48(r16) + 25618: 28000626 beq r5,zero,25634 <__swsetup_r+0x124> + 2561c: 80801004 addi r2,r16,64 + 25620: 28800326 beq r5,r2,25630 <__swsetup_r+0x120> + 25624: 8809883a mov r4,r17 + 25628: 00276580 call 27658 <_free_r> + 2562c: 8100030b ldhu r4,12(r16) + 25630: 80000c15 stw zero,48(r16) + 25634: 80c00417 ldw r3,16(r16) + 25638: 00bff6c4 movi r2,-37 + 2563c: 1108703a and r4,r2,r4 + 25640: 80000115 stw zero,4(r16) + 25644: 80c00015 stw r3,0(r16) + 25648: 003fd506 br 255a0 <_gp+0xfffe9068> + 2564c: 00800244 movi r2,9 + 25650: 88800015 stw r2,0(r17) + 25654: 20801014 ori r2,r4,64 + 25658: 8080030d sth r2,12(r16) + 2565c: 00bfffc4 movi r2,-1 + 25660: 003fc506 br 25578 <_gp+0xfffe9040> -00025c28 : - 25c28: defff704 addi sp,sp,-36 - 25c2c: dc800215 stw r18,8(sp) - 25c30: 20800417 ldw r2,16(r4) - 25c34: 2c800417 ldw r18,16(r5) - 25c38: dfc00815 stw ra,32(sp) - 25c3c: ddc00715 stw r23,28(sp) - 25c40: dd800615 stw r22,24(sp) - 25c44: dd400515 stw r21,20(sp) - 25c48: dd000415 stw r20,16(sp) - 25c4c: dcc00315 stw r19,12(sp) - 25c50: dc400115 stw r17,4(sp) - 25c54: dc000015 stw r16,0(sp) - 25c58: 14807116 blt r2,r18,25e20 - 25c5c: 94bfffc4 addi r18,r18,-1 - 25c60: 94ad883a add r22,r18,r18 - 25c64: b5ad883a add r22,r22,r22 - 25c68: 2c400504 addi r17,r5,20 - 25c6c: 8da9883a add r20,r17,r22 - 25c70: 25400504 addi r21,r4,20 - 25c74: 282f883a mov r23,r5 - 25c78: adad883a add r22,r21,r22 - 25c7c: a1400017 ldw r5,0(r20) - 25c80: 2021883a mov r16,r4 - 25c84: b1000017 ldw r4,0(r22) - 25c88: 29400044 addi r5,r5,1 - 25c8c: 0022a200 call 22a20 <__udivsi3> - 25c90: 1027883a mov r19,r2 - 25c94: 10002c26 beq r2,zero,25d48 - 25c98: a813883a mov r9,r21 - 25c9c: 880b883a mov r5,r17 - 25ca0: 0009883a mov r4,zero - 25ca4: 000d883a mov r6,zero - 25ca8: 2a000017 ldw r8,0(r5) - 25cac: 49c00017 ldw r7,0(r9) - 25cb0: 29400104 addi r5,r5,4 - 25cb4: 40bfffcc andi r2,r8,65535 - 25cb8: 14c5383a mul r2,r2,r19 - 25cbc: 4010d43a srli r8,r8,16 - 25cc0: 38ffffcc andi r3,r7,65535 - 25cc4: 1105883a add r2,r2,r4 - 25cc8: 1008d43a srli r4,r2,16 - 25ccc: 44d1383a mul r8,r8,r19 - 25cd0: 198d883a add r6,r3,r6 - 25cd4: 10ffffcc andi r3,r2,65535 - 25cd8: 30c7c83a sub r3,r6,r3 - 25cdc: 380ed43a srli r7,r7,16 - 25ce0: 4105883a add r2,r8,r4 - 25ce4: 180dd43a srai r6,r3,16 - 25ce8: 113fffcc andi r4,r2,65535 - 25cec: 390fc83a sub r7,r7,r4 - 25cf0: 398d883a add r6,r7,r6 - 25cf4: 300e943a slli r7,r6,16 - 25cf8: 18ffffcc andi r3,r3,65535 - 25cfc: 1008d43a srli r4,r2,16 - 25d00: 38ceb03a or r7,r7,r3 - 25d04: 49c00015 stw r7,0(r9) - 25d08: 300dd43a srai r6,r6,16 - 25d0c: 4a400104 addi r9,r9,4 - 25d10: a17fe52e bgeu r20,r5,25ca8 - 25d14: b0800017 ldw r2,0(r22) - 25d18: 10000b1e bne r2,zero,25d48 - 25d1c: b0bfff04 addi r2,r22,-4 - 25d20: a880082e bgeu r21,r2,25d44 - 25d24: b0ffff17 ldw r3,-4(r22) - 25d28: 18000326 beq r3,zero,25d38 - 25d2c: 00000506 br 25d44 - 25d30: 10c00017 ldw r3,0(r2) - 25d34: 1800031e bne r3,zero,25d44 - 25d38: 10bfff04 addi r2,r2,-4 - 25d3c: 94bfffc4 addi r18,r18,-1 - 25d40: a8bffb36 bltu r21,r2,25d30 - 25d44: 84800415 stw r18,16(r16) - 25d48: b80b883a mov r5,r23 - 25d4c: 8009883a mov r4,r16 - 25d50: 00294580 call 29458 <__mcmp> - 25d54: 10002616 blt r2,zero,25df0 - 25d58: 9cc00044 addi r19,r19,1 - 25d5c: a805883a mov r2,r21 - 25d60: 000b883a mov r5,zero - 25d64: 11000017 ldw r4,0(r2) - 25d68: 89800017 ldw r6,0(r17) - 25d6c: 10800104 addi r2,r2,4 - 25d70: 20ffffcc andi r3,r4,65535 - 25d74: 194b883a add r5,r3,r5 - 25d78: 30ffffcc andi r3,r6,65535 - 25d7c: 28c7c83a sub r3,r5,r3 - 25d80: 300cd43a srli r6,r6,16 - 25d84: 2008d43a srli r4,r4,16 - 25d88: 180bd43a srai r5,r3,16 - 25d8c: 18ffffcc andi r3,r3,65535 - 25d90: 2189c83a sub r4,r4,r6 - 25d94: 2149883a add r4,r4,r5 - 25d98: 200c943a slli r6,r4,16 - 25d9c: 8c400104 addi r17,r17,4 - 25da0: 200bd43a srai r5,r4,16 - 25da4: 30c6b03a or r3,r6,r3 - 25da8: 10ffff15 stw r3,-4(r2) - 25dac: a47fed2e bgeu r20,r17,25d64 - 25db0: 9485883a add r2,r18,r18 - 25db4: 1085883a add r2,r2,r2 - 25db8: a887883a add r3,r21,r2 - 25dbc: 18800017 ldw r2,0(r3) - 25dc0: 10000b1e bne r2,zero,25df0 - 25dc4: 18bfff04 addi r2,r3,-4 - 25dc8: a880082e bgeu r21,r2,25dec - 25dcc: 18ffff17 ldw r3,-4(r3) - 25dd0: 18000326 beq r3,zero,25de0 - 25dd4: 00000506 br 25dec - 25dd8: 10c00017 ldw r3,0(r2) - 25ddc: 1800031e bne r3,zero,25dec - 25de0: 10bfff04 addi r2,r2,-4 - 25de4: 94bfffc4 addi r18,r18,-1 - 25de8: a8bffb36 bltu r21,r2,25dd8 - 25dec: 84800415 stw r18,16(r16) - 25df0: 9805883a mov r2,r19 - 25df4: dfc00817 ldw ra,32(sp) - 25df8: ddc00717 ldw r23,28(sp) - 25dfc: dd800617 ldw r22,24(sp) - 25e00: dd400517 ldw r21,20(sp) - 25e04: dd000417 ldw r20,16(sp) - 25e08: dcc00317 ldw r19,12(sp) - 25e0c: dc800217 ldw r18,8(sp) - 25e10: dc400117 ldw r17,4(sp) - 25e14: dc000017 ldw r16,0(sp) - 25e18: dec00904 addi sp,sp,36 - 25e1c: f800283a ret - 25e20: 0005883a mov r2,zero - 25e24: 003ff306 br 25df4 +00025664 : + 25664: defff704 addi sp,sp,-36 + 25668: dc800215 stw r18,8(sp) + 2566c: 20800417 ldw r2,16(r4) + 25670: 2c800417 ldw r18,16(r5) + 25674: dfc00815 stw ra,32(sp) + 25678: ddc00715 stw r23,28(sp) + 2567c: dd800615 stw r22,24(sp) + 25680: dd400515 stw r21,20(sp) + 25684: dd000415 stw r20,16(sp) + 25688: dcc00315 stw r19,12(sp) + 2568c: dc400115 stw r17,4(sp) + 25690: dc000015 stw r16,0(sp) + 25694: 14807116 blt r2,r18,2585c + 25698: 94bfffc4 addi r18,r18,-1 + 2569c: 94ad883a add r22,r18,r18 + 256a0: b5ad883a add r22,r22,r22 + 256a4: 2c400504 addi r17,r5,20 + 256a8: 8da9883a add r20,r17,r22 + 256ac: 25400504 addi r21,r4,20 + 256b0: 282f883a mov r23,r5 + 256b4: adad883a add r22,r21,r22 + 256b8: a1400017 ldw r5,0(r20) + 256bc: 2021883a mov r16,r4 + 256c0: b1000017 ldw r4,0(r22) + 256c4: 29400044 addi r5,r5,1 + 256c8: 00225dc0 call 225dc <__udivsi3> + 256cc: 1027883a mov r19,r2 + 256d0: 10002c26 beq r2,zero,25784 + 256d4: a813883a mov r9,r21 + 256d8: 880b883a mov r5,r17 + 256dc: 0009883a mov r4,zero + 256e0: 000d883a mov r6,zero + 256e4: 2a000017 ldw r8,0(r5) + 256e8: 49c00017 ldw r7,0(r9) + 256ec: 29400104 addi r5,r5,4 + 256f0: 40bfffcc andi r2,r8,65535 + 256f4: 14c5383a mul r2,r2,r19 + 256f8: 4010d43a srli r8,r8,16 + 256fc: 38ffffcc andi r3,r7,65535 + 25700: 1105883a add r2,r2,r4 + 25704: 1008d43a srli r4,r2,16 + 25708: 44d1383a mul r8,r8,r19 + 2570c: 198d883a add r6,r3,r6 + 25710: 10ffffcc andi r3,r2,65535 + 25714: 30c7c83a sub r3,r6,r3 + 25718: 380ed43a srli r7,r7,16 + 2571c: 4105883a add r2,r8,r4 + 25720: 180dd43a srai r6,r3,16 + 25724: 113fffcc andi r4,r2,65535 + 25728: 390fc83a sub r7,r7,r4 + 2572c: 398d883a add r6,r7,r6 + 25730: 300e943a slli r7,r6,16 + 25734: 18ffffcc andi r3,r3,65535 + 25738: 1008d43a srli r4,r2,16 + 2573c: 38ceb03a or r7,r7,r3 + 25740: 49c00015 stw r7,0(r9) + 25744: 300dd43a srai r6,r6,16 + 25748: 4a400104 addi r9,r9,4 + 2574c: a17fe52e bgeu r20,r5,256e4 <_gp+0xfffe91ac> + 25750: b0800017 ldw r2,0(r22) + 25754: 10000b1e bne r2,zero,25784 + 25758: b0bfff04 addi r2,r22,-4 + 2575c: a880082e bgeu r21,r2,25780 + 25760: b0ffff17 ldw r3,-4(r22) + 25764: 18000326 beq r3,zero,25774 + 25768: 00000506 br 25780 + 2576c: 10c00017 ldw r3,0(r2) + 25770: 1800031e bne r3,zero,25780 + 25774: 10bfff04 addi r2,r2,-4 + 25778: 94bfffc4 addi r18,r18,-1 + 2577c: a8bffb36 bltu r21,r2,2576c <_gp+0xfffe9234> + 25780: 84800415 stw r18,16(r16) + 25784: b80b883a mov r5,r23 + 25788: 8009883a mov r4,r16 + 2578c: 0028e940 call 28e94 <__mcmp> + 25790: 10002616 blt r2,zero,2582c + 25794: 9cc00044 addi r19,r19,1 + 25798: a805883a mov r2,r21 + 2579c: 000b883a mov r5,zero + 257a0: 11000017 ldw r4,0(r2) + 257a4: 89800017 ldw r6,0(r17) + 257a8: 10800104 addi r2,r2,4 + 257ac: 20ffffcc andi r3,r4,65535 + 257b0: 194b883a add r5,r3,r5 + 257b4: 30ffffcc andi r3,r6,65535 + 257b8: 28c7c83a sub r3,r5,r3 + 257bc: 300cd43a srli r6,r6,16 + 257c0: 2008d43a srli r4,r4,16 + 257c4: 180bd43a srai r5,r3,16 + 257c8: 18ffffcc andi r3,r3,65535 + 257cc: 2189c83a sub r4,r4,r6 + 257d0: 2149883a add r4,r4,r5 + 257d4: 200c943a slli r6,r4,16 + 257d8: 8c400104 addi r17,r17,4 + 257dc: 200bd43a srai r5,r4,16 + 257e0: 30c6b03a or r3,r6,r3 + 257e4: 10ffff15 stw r3,-4(r2) + 257e8: a47fed2e bgeu r20,r17,257a0 <_gp+0xfffe9268> + 257ec: 9485883a add r2,r18,r18 + 257f0: 1085883a add r2,r2,r2 + 257f4: a887883a add r3,r21,r2 + 257f8: 18800017 ldw r2,0(r3) + 257fc: 10000b1e bne r2,zero,2582c + 25800: 18bfff04 addi r2,r3,-4 + 25804: a880082e bgeu r21,r2,25828 + 25808: 18ffff17 ldw r3,-4(r3) + 2580c: 18000326 beq r3,zero,2581c + 25810: 00000506 br 25828 + 25814: 10c00017 ldw r3,0(r2) + 25818: 1800031e bne r3,zero,25828 + 2581c: 10bfff04 addi r2,r2,-4 + 25820: 94bfffc4 addi r18,r18,-1 + 25824: a8bffb36 bltu r21,r2,25814 <_gp+0xfffe92dc> + 25828: 84800415 stw r18,16(r16) + 2582c: 9805883a mov r2,r19 + 25830: dfc00817 ldw ra,32(sp) + 25834: ddc00717 ldw r23,28(sp) + 25838: dd800617 ldw r22,24(sp) + 2583c: dd400517 ldw r21,20(sp) + 25840: dd000417 ldw r20,16(sp) + 25844: dcc00317 ldw r19,12(sp) + 25848: dc800217 ldw r18,8(sp) + 2584c: dc400117 ldw r17,4(sp) + 25850: dc000017 ldw r16,0(sp) + 25854: dec00904 addi sp,sp,36 + 25858: f800283a ret + 2585c: 0005883a mov r2,zero + 25860: 003ff306 br 25830 <_gp+0xfffe92f8> -00025e28 <_dtoa_r>: - 25e28: 20801017 ldw r2,64(r4) - 25e2c: deffde04 addi sp,sp,-136 - 25e30: df002015 stw fp,128(sp) - 25e34: dcc01b15 stw r19,108(sp) - 25e38: dc801a15 stw r18,104(sp) - 25e3c: dc401915 stw r17,100(sp) - 25e40: dc001815 stw r16,96(sp) - 25e44: dfc02115 stw ra,132(sp) - 25e48: ddc01f15 stw r23,124(sp) - 25e4c: dd801e15 stw r22,120(sp) - 25e50: dd401d15 stw r21,116(sp) - 25e54: dd001c15 stw r20,112(sp) - 25e58: d9c00315 stw r7,12(sp) - 25e5c: 2039883a mov fp,r4 - 25e60: 3023883a mov r17,r6 - 25e64: 2825883a mov r18,r5 - 25e68: dc002417 ldw r16,144(sp) - 25e6c: 3027883a mov r19,r6 - 25e70: 10000826 beq r2,zero,25e94 <_dtoa_r+0x6c> - 25e74: 21801117 ldw r6,68(r4) - 25e78: 00c00044 movi r3,1 - 25e7c: 100b883a mov r5,r2 - 25e80: 1986983a sll r3,r3,r6 - 25e84: 11800115 stw r6,4(r2) - 25e88: 10c00215 stw r3,8(r2) - 25e8c: 0028c380 call 28c38 <_Bfree> - 25e90: e0001015 stw zero,64(fp) - 25e94: 88002e16 blt r17,zero,25f50 <_dtoa_r+0x128> - 25e98: 80000015 stw zero,0(r16) - 25e9c: 889ffc2c andhi r2,r17,32752 - 25ea0: 00dffc34 movhi r3,32752 - 25ea4: 10c01c26 beq r2,r3,25f18 <_dtoa_r+0xf0> - 25ea8: 000d883a mov r6,zero - 25eac: 000f883a mov r7,zero - 25eb0: 9009883a mov r4,r18 - 25eb4: 980b883a mov r5,r19 - 25eb8: 002e2940 call 2e294 <__eqdf2> - 25ebc: 10002b1e bne r2,zero,25f6c <_dtoa_r+0x144> - 25ec0: d9c02317 ldw r7,140(sp) - 25ec4: 00800044 movi r2,1 - 25ec8: 38800015 stw r2,0(r7) - 25ecc: d8802517 ldw r2,148(sp) - 25ed0: 10019e26 beq r2,zero,2654c <_dtoa_r+0x724> - 25ed4: d8c02517 ldw r3,148(sp) - 25ed8: 008000f4 movhi r2,3 - 25edc: 108a5a44 addi r2,r2,10601 - 25ee0: 18800015 stw r2,0(r3) - 25ee4: 10bfffc4 addi r2,r2,-1 - 25ee8: dfc02117 ldw ra,132(sp) - 25eec: df002017 ldw fp,128(sp) - 25ef0: ddc01f17 ldw r23,124(sp) - 25ef4: dd801e17 ldw r22,120(sp) - 25ef8: dd401d17 ldw r21,116(sp) - 25efc: dd001c17 ldw r20,112(sp) - 25f00: dcc01b17 ldw r19,108(sp) - 25f04: dc801a17 ldw r18,104(sp) - 25f08: dc401917 ldw r17,100(sp) - 25f0c: dc001817 ldw r16,96(sp) - 25f10: dec02204 addi sp,sp,136 - 25f14: f800283a ret - 25f18: d8c02317 ldw r3,140(sp) - 25f1c: 0089c3c4 movi r2,9999 - 25f20: 18800015 stw r2,0(r3) - 25f24: 90017726 beq r18,zero,26504 <_dtoa_r+0x6dc> - 25f28: 008000f4 movhi r2,3 - 25f2c: 108a6604 addi r2,r2,10648 - 25f30: d9002517 ldw r4,148(sp) - 25f34: 203fec26 beq r4,zero,25ee8 <_dtoa_r+0xc0> - 25f38: 10c000c7 ldb r3,3(r2) - 25f3c: 1801781e bne r3,zero,26520 <_dtoa_r+0x6f8> - 25f40: 10c000c4 addi r3,r2,3 - 25f44: d9802517 ldw r6,148(sp) - 25f48: 30c00015 stw r3,0(r6) - 25f4c: 003fe606 br 25ee8 <_dtoa_r+0xc0> - 25f50: 04e00034 movhi r19,32768 - 25f54: 9cffffc4 addi r19,r19,-1 - 25f58: 00800044 movi r2,1 - 25f5c: 8ce6703a and r19,r17,r19 - 25f60: 80800015 stw r2,0(r16) - 25f64: 9823883a mov r17,r19 - 25f68: 003fcc06 br 25e9c <_dtoa_r+0x74> - 25f6c: d8800204 addi r2,sp,8 - 25f70: d8800015 stw r2,0(sp) - 25f74: d9c00104 addi r7,sp,4 - 25f78: 900b883a mov r5,r18 - 25f7c: 980d883a mov r6,r19 - 25f80: e009883a mov r4,fp - 25f84: 8820d53a srli r16,r17,20 - 25f88: 00298240 call 29824 <__d2b> - 25f8c: d8800915 stw r2,36(sp) - 25f90: 8001651e bne r16,zero,26528 <_dtoa_r+0x700> - 25f94: dd800217 ldw r22,8(sp) - 25f98: dc000117 ldw r16,4(sp) - 25f9c: 00800804 movi r2,32 - 25fa0: b421883a add r16,r22,r16 - 25fa4: 80c10c84 addi r3,r16,1074 - 25fa8: 10c2d10e bge r2,r3,26af0 <_dtoa_r+0xcc8> - 25fac: 00801004 movi r2,64 - 25fb0: 81010484 addi r4,r16,1042 - 25fb4: 10c7c83a sub r3,r2,r3 - 25fb8: 9108d83a srl r4,r18,r4 - 25fbc: 88e2983a sll r17,r17,r3 - 25fc0: 2448b03a or r4,r4,r17 - 25fc4: 002f65c0 call 2f65c <__floatunsidf> - 25fc8: 017f8434 movhi r5,65040 - 25fcc: 01800044 movi r6,1 - 25fd0: 1009883a mov r4,r2 - 25fd4: 194b883a add r5,r3,r5 - 25fd8: 843fffc4 addi r16,r16,-1 - 25fdc: d9801115 stw r6,68(sp) - 25fe0: 000d883a mov r6,zero - 25fe4: 01cffe34 movhi r7,16376 - 25fe8: 002ec040 call 2ec04 <__subdf3> - 25fec: 0198dbf4 movhi r6,25455 - 25ff0: 01cff4f4 movhi r7,16339 - 25ff4: 3190d844 addi r6,r6,17249 - 25ff8: 39e1e9c4 addi r7,r7,-30809 - 25ffc: 1009883a mov r4,r2 - 26000: 180b883a mov r5,r3 - 26004: 002e4ec0 call 2e4ec <__muldf3> - 26008: 01a2d874 movhi r6,35681 - 2600c: 01cff1f4 movhi r7,16327 - 26010: 31b22cc4 addi r6,r6,-14157 - 26014: 39e28a04 addi r7,r7,-30168 - 26018: 180b883a mov r5,r3 +00025864 <_dtoa_r>: + 25864: 20801017 ldw r2,64(r4) + 25868: deffde04 addi sp,sp,-136 + 2586c: df002015 stw fp,128(sp) + 25870: dcc01b15 stw r19,108(sp) + 25874: dc801a15 stw r18,104(sp) + 25878: dc401915 stw r17,100(sp) + 2587c: dc001815 stw r16,96(sp) + 25880: dfc02115 stw ra,132(sp) + 25884: ddc01f15 stw r23,124(sp) + 25888: dd801e15 stw r22,120(sp) + 2588c: dd401d15 stw r21,116(sp) + 25890: dd001c15 stw r20,112(sp) + 25894: d9c00315 stw r7,12(sp) + 25898: 2039883a mov fp,r4 + 2589c: 3023883a mov r17,r6 + 258a0: 2825883a mov r18,r5 + 258a4: dc002417 ldw r16,144(sp) + 258a8: 3027883a mov r19,r6 + 258ac: 10000826 beq r2,zero,258d0 <_dtoa_r+0x6c> + 258b0: 21801117 ldw r6,68(r4) + 258b4: 00c00044 movi r3,1 + 258b8: 100b883a mov r5,r2 + 258bc: 1986983a sll r3,r3,r6 + 258c0: 11800115 stw r6,4(r2) + 258c4: 10c00215 stw r3,8(r2) + 258c8: 00286740 call 28674 <_Bfree> + 258cc: e0001015 stw zero,64(fp) + 258d0: 88002e16 blt r17,zero,2598c <_dtoa_r+0x128> + 258d4: 80000015 stw zero,0(r16) + 258d8: 889ffc2c andhi r2,r17,32752 + 258dc: 00dffc34 movhi r3,32752 + 258e0: 10c01c26 beq r2,r3,25954 <_dtoa_r+0xf0> + 258e4: 000d883a mov r6,zero + 258e8: 000f883a mov r7,zero + 258ec: 9009883a mov r4,r18 + 258f0: 980b883a mov r5,r19 + 258f4: 002dae00 call 2dae0 <__eqdf2> + 258f8: 10002b1e bne r2,zero,259a8 <_dtoa_r+0x144> + 258fc: d9c02317 ldw r7,140(sp) + 25900: 00800044 movi r2,1 + 25904: 38800015 stw r2,0(r7) + 25908: d8802517 ldw r2,148(sp) + 2590c: 10019e26 beq r2,zero,25f88 <_dtoa_r+0x724> + 25910: d8c02517 ldw r3,148(sp) + 25914: 008000f4 movhi r2,3 + 25918: 10880c44 addi r2,r2,8241 + 2591c: 18800015 stw r2,0(r3) + 25920: 10bfffc4 addi r2,r2,-1 + 25924: dfc02117 ldw ra,132(sp) + 25928: df002017 ldw fp,128(sp) + 2592c: ddc01f17 ldw r23,124(sp) + 25930: dd801e17 ldw r22,120(sp) + 25934: dd401d17 ldw r21,116(sp) + 25938: dd001c17 ldw r20,112(sp) + 2593c: dcc01b17 ldw r19,108(sp) + 25940: dc801a17 ldw r18,104(sp) + 25944: dc401917 ldw r17,100(sp) + 25948: dc001817 ldw r16,96(sp) + 2594c: dec02204 addi sp,sp,136 + 25950: f800283a ret + 25954: d8c02317 ldw r3,140(sp) + 25958: 0089c3c4 movi r2,9999 + 2595c: 18800015 stw r2,0(r3) + 25960: 90017726 beq r18,zero,25f40 <_dtoa_r+0x6dc> + 25964: 008000f4 movhi r2,3 + 25968: 10881804 addi r2,r2,8288 + 2596c: d9002517 ldw r4,148(sp) + 25970: 203fec26 beq r4,zero,25924 <_gp+0xfffe93ec> + 25974: 10c000c7 ldb r3,3(r2) + 25978: 1801781e bne r3,zero,25f5c <_dtoa_r+0x6f8> + 2597c: 10c000c4 addi r3,r2,3 + 25980: d9802517 ldw r6,148(sp) + 25984: 30c00015 stw r3,0(r6) + 25988: 003fe606 br 25924 <_gp+0xfffe93ec> + 2598c: 04e00034 movhi r19,32768 + 25990: 9cffffc4 addi r19,r19,-1 + 25994: 00800044 movi r2,1 + 25998: 8ce6703a and r19,r17,r19 + 2599c: 80800015 stw r2,0(r16) + 259a0: 9823883a mov r17,r19 + 259a4: 003fcc06 br 258d8 <_gp+0xfffe93a0> + 259a8: d8800204 addi r2,sp,8 + 259ac: d8800015 stw r2,0(sp) + 259b0: d9c00104 addi r7,sp,4 + 259b4: 900b883a mov r5,r18 + 259b8: 980d883a mov r6,r19 + 259bc: e009883a mov r4,fp + 259c0: 8820d53a srli r16,r17,20 + 259c4: 00292600 call 29260 <__d2b> + 259c8: d8800915 stw r2,36(sp) + 259cc: 8001651e bne r16,zero,25f64 <_dtoa_r+0x700> + 259d0: dd800217 ldw r22,8(sp) + 259d4: dc000117 ldw r16,4(sp) + 259d8: 00800804 movi r2,32 + 259dc: b421883a add r16,r22,r16 + 259e0: 80c10c84 addi r3,r16,1074 + 259e4: 10c2d10e bge r2,r3,2652c <_dtoa_r+0xcc8> + 259e8: 00801004 movi r2,64 + 259ec: 81010484 addi r4,r16,1042 + 259f0: 10c7c83a sub r3,r2,r3 + 259f4: 9108d83a srl r4,r18,r4 + 259f8: 88e2983a sll r17,r17,r3 + 259fc: 2448b03a or r4,r4,r17 + 25a00: 002eea80 call 2eea8 <__floatunsidf> + 25a04: 017f8434 movhi r5,65040 + 25a08: 01800044 movi r6,1 + 25a0c: 1009883a mov r4,r2 + 25a10: 194b883a add r5,r3,r5 + 25a14: 843fffc4 addi r16,r16,-1 + 25a18: d9801115 stw r6,68(sp) + 25a1c: 000d883a mov r6,zero + 25a20: 01cffe34 movhi r7,16376 + 25a24: 002e4500 call 2e450 <__subdf3> + 25a28: 0198dbf4 movhi r6,25455 + 25a2c: 01cff4f4 movhi r7,16339 + 25a30: 3190d844 addi r6,r6,17249 + 25a34: 39e1e9c4 addi r7,r7,-30809 + 25a38: 1009883a mov r4,r2 + 25a3c: 180b883a mov r5,r3 + 25a40: 002dd380 call 2dd38 <__muldf3> + 25a44: 01a2d874 movhi r6,35681 + 25a48: 01cff1f4 movhi r7,16327 + 25a4c: 31b22cc4 addi r6,r6,-14157 + 25a50: 39e28a04 addi r7,r7,-30168 + 25a54: 180b883a mov r5,r3 + 25a58: 1009883a mov r4,r2 + 25a5c: 002c94c0 call 2c94c <__adddf3> + 25a60: 8009883a mov r4,r16 + 25a64: 1029883a mov r20,r2 + 25a68: 1823883a mov r17,r3 + 25a6c: 002edcc0 call 2edcc <__floatsidf> + 25a70: 019427f4 movhi r6,20639 + 25a74: 01cff4f4 movhi r7,16339 + 25a78: 319e7ec4 addi r6,r6,31227 + 25a7c: 39d104c4 addi r7,r7,17427 + 25a80: 1009883a mov r4,r2 + 25a84: 180b883a mov r5,r3 + 25a88: 002dd380 call 2dd38 <__muldf3> + 25a8c: 100d883a mov r6,r2 + 25a90: 180f883a mov r7,r3 + 25a94: a009883a mov r4,r20 + 25a98: 880b883a mov r5,r17 + 25a9c: 002c94c0 call 2c94c <__adddf3> + 25aa0: 1009883a mov r4,r2 + 25aa4: 180b883a mov r5,r3 + 25aa8: 1029883a mov r20,r2 + 25aac: 1823883a mov r17,r3 + 25ab0: 002ed4c0 call 2ed4c <__fixdfsi> + 25ab4: 000d883a mov r6,zero + 25ab8: 000f883a mov r7,zero + 25abc: a009883a mov r4,r20 + 25ac0: 880b883a mov r5,r17 + 25ac4: d8800515 stw r2,20(sp) + 25ac8: 002dc440 call 2dc44 <__ledf2> + 25acc: 10028716 blt r2,zero,264ec <_dtoa_r+0xc88> + 25ad0: d8c00517 ldw r3,20(sp) + 25ad4: 00800584 movi r2,22 + 25ad8: 10c27536 bltu r2,r3,264b0 <_dtoa_r+0xc4c> + 25adc: 180490fa slli r2,r3,3 + 25ae0: 00c000f4 movhi r3,3 + 25ae4: 18c83404 addi r3,r3,8400 + 25ae8: 1885883a add r2,r3,r2 + 25aec: 11000017 ldw r4,0(r2) + 25af0: 11400117 ldw r5,4(r2) + 25af4: 900d883a mov r6,r18 + 25af8: 980f883a mov r7,r19 + 25afc: 002db680 call 2db68 <__gedf2> + 25b00: 00828d0e bge zero,r2,26538 <_dtoa_r+0xcd4> + 25b04: d9000517 ldw r4,20(sp) + 25b08: d8000e15 stw zero,56(sp) + 25b0c: 213fffc4 addi r4,r4,-1 + 25b10: d9000515 stw r4,20(sp) + 25b14: b42dc83a sub r22,r22,r16 + 25b18: b5bfffc4 addi r22,r22,-1 + 25b1c: b0026f16 blt r22,zero,264dc <_dtoa_r+0xc78> + 25b20: d8000815 stw zero,32(sp) + 25b24: d9c00517 ldw r7,20(sp) + 25b28: 38026416 blt r7,zero,264bc <_dtoa_r+0xc58> + 25b2c: b1ed883a add r22,r22,r7 + 25b30: d9c00d15 stw r7,52(sp) + 25b34: d8000a15 stw zero,40(sp) + 25b38: d9800317 ldw r6,12(sp) + 25b3c: 00800244 movi r2,9 + 25b40: 11811436 bltu r2,r6,25f94 <_dtoa_r+0x730> + 25b44: 00800144 movi r2,5 + 25b48: 1184e10e bge r2,r6,26ed0 <_dtoa_r+0x166c> + 25b4c: 31bfff04 addi r6,r6,-4 + 25b50: d9800315 stw r6,12(sp) + 25b54: 0023883a mov r17,zero + 25b58: d9800317 ldw r6,12(sp) + 25b5c: 008000c4 movi r2,3 + 25b60: 30836726 beq r6,r2,26900 <_dtoa_r+0x109c> + 25b64: 1183410e bge r2,r6,2686c <_dtoa_r+0x1008> + 25b68: d9c00317 ldw r7,12(sp) + 25b6c: 00800104 movi r2,4 + 25b70: 38827c26 beq r7,r2,26564 <_dtoa_r+0xd00> + 25b74: 00800144 movi r2,5 + 25b78: 3884c41e bne r7,r2,26e8c <_dtoa_r+0x1628> + 25b7c: 00800044 movi r2,1 + 25b80: d8800b15 stw r2,44(sp) + 25b84: d8c00517 ldw r3,20(sp) + 25b88: d9002217 ldw r4,136(sp) + 25b8c: 1907883a add r3,r3,r4 + 25b90: 19800044 addi r6,r3,1 + 25b94: d8c00c15 stw r3,48(sp) + 25b98: d9800615 stw r6,24(sp) + 25b9c: 0183a40e bge zero,r6,26a30 <_dtoa_r+0x11cc> + 25ba0: d9800617 ldw r6,24(sp) + 25ba4: 3021883a mov r16,r6 + 25ba8: e0001115 stw zero,68(fp) + 25bac: 008005c4 movi r2,23 + 25bb0: 1184c92e bgeu r2,r6,26ed8 <_dtoa_r+0x1674> + 25bb4: 00c00044 movi r3,1 + 25bb8: 00800104 movi r2,4 + 25bbc: 1085883a add r2,r2,r2 + 25bc0: 11000504 addi r4,r2,20 + 25bc4: 180b883a mov r5,r3 + 25bc8: 18c00044 addi r3,r3,1 + 25bcc: 313ffb2e bgeu r6,r4,25bbc <_gp+0xfffe9684> + 25bd0: e1401115 stw r5,68(fp) + 25bd4: e009883a mov r4,fp + 25bd8: 00285cc0 call 285cc <_Balloc> + 25bdc: d8800715 stw r2,28(sp) + 25be0: e0801015 stw r2,64(fp) + 25be4: 00800384 movi r2,14 + 25be8: 1400f736 bltu r2,r16,25fc8 <_dtoa_r+0x764> + 25bec: 8800f626 beq r17,zero,25fc8 <_dtoa_r+0x764> + 25bf0: d9c00517 ldw r7,20(sp) + 25bf4: 01c39a0e bge zero,r7,26a60 <_dtoa_r+0x11fc> + 25bf8: 388003cc andi r2,r7,15 + 25bfc: 100490fa slli r2,r2,3 + 25c00: 382bd13a srai r21,r7,4 + 25c04: 00c000f4 movhi r3,3 + 25c08: 18c83404 addi r3,r3,8400 + 25c0c: 1885883a add r2,r3,r2 + 25c10: a8c0040c andi r3,r21,16 + 25c14: 12400017 ldw r9,0(r2) + 25c18: 12000117 ldw r8,4(r2) + 25c1c: 18037926 beq r3,zero,26a04 <_dtoa_r+0x11a0> + 25c20: 008000f4 movhi r2,3 + 25c24: 10882a04 addi r2,r2,8360 + 25c28: 11800817 ldw r6,32(r2) + 25c2c: 11c00917 ldw r7,36(r2) + 25c30: 9009883a mov r4,r18 + 25c34: 980b883a mov r5,r19 + 25c38: da001715 stw r8,92(sp) + 25c3c: da401615 stw r9,88(sp) + 25c40: 002d1f80 call 2d1f8 <__divdf3> + 25c44: da001717 ldw r8,92(sp) + 25c48: da401617 ldw r9,88(sp) + 25c4c: ad4003cc andi r21,r21,15 + 25c50: 040000c4 movi r16,3 + 25c54: 1023883a mov r17,r2 + 25c58: 1829883a mov r20,r3 + 25c5c: a8001126 beq r21,zero,25ca4 <_dtoa_r+0x440> + 25c60: 05c000f4 movhi r23,3 + 25c64: bdc82a04 addi r23,r23,8360 + 25c68: 4805883a mov r2,r9 + 25c6c: 4007883a mov r3,r8 + 25c70: a980004c andi r6,r21,1 + 25c74: 1009883a mov r4,r2 + 25c78: a82bd07a srai r21,r21,1 + 25c7c: 180b883a mov r5,r3 + 25c80: 30000426 beq r6,zero,25c94 <_dtoa_r+0x430> + 25c84: b9800017 ldw r6,0(r23) + 25c88: b9c00117 ldw r7,4(r23) + 25c8c: 84000044 addi r16,r16,1 + 25c90: 002dd380 call 2dd38 <__muldf3> + 25c94: bdc00204 addi r23,r23,8 + 25c98: a83ff51e bne r21,zero,25c70 <_gp+0xfffe9738> + 25c9c: 1013883a mov r9,r2 + 25ca0: 1811883a mov r8,r3 + 25ca4: 480d883a mov r6,r9 + 25ca8: 400f883a mov r7,r8 + 25cac: 8809883a mov r4,r17 + 25cb0: a00b883a mov r5,r20 + 25cb4: 002d1f80 call 2d1f8 <__divdf3> + 25cb8: d8800f15 stw r2,60(sp) + 25cbc: d8c01015 stw r3,64(sp) + 25cc0: d8c00e17 ldw r3,56(sp) + 25cc4: 18000626 beq r3,zero,25ce0 <_dtoa_r+0x47c> + 25cc8: d9000f17 ldw r4,60(sp) + 25ccc: d9401017 ldw r5,64(sp) + 25cd0: 000d883a mov r6,zero + 25cd4: 01cffc34 movhi r7,16368 + 25cd8: 002dc440 call 2dc44 <__ledf2> + 25cdc: 10040b16 blt r2,zero,26d0c <_dtoa_r+0x14a8> + 25ce0: 8009883a mov r4,r16 + 25ce4: 002edcc0 call 2edcc <__floatsidf> + 25ce8: d9800f17 ldw r6,60(sp) + 25cec: d9c01017 ldw r7,64(sp) + 25cf0: 1009883a mov r4,r2 + 25cf4: 180b883a mov r5,r3 + 25cf8: 002dd380 call 2dd38 <__muldf3> + 25cfc: 000d883a mov r6,zero + 25d00: 01d00734 movhi r7,16412 + 25d04: 1009883a mov r4,r2 + 25d08: 180b883a mov r5,r3 + 25d0c: 002c94c0 call 2c94c <__adddf3> + 25d10: 1021883a mov r16,r2 + 25d14: d8800617 ldw r2,24(sp) + 25d18: 047f3034 movhi r17,64704 + 25d1c: 1c63883a add r17,r3,r17 + 25d20: 10031826 beq r2,zero,26984 <_dtoa_r+0x1120> + 25d24: d8c00517 ldw r3,20(sp) + 25d28: db000617 ldw r12,24(sp) + 25d2c: d8c01315 stw r3,76(sp) + 25d30: d9000b17 ldw r4,44(sp) + 25d34: 20038f26 beq r4,zero,26b74 <_dtoa_r+0x1310> + 25d38: 60bfffc4 addi r2,r12,-1 + 25d3c: 100490fa slli r2,r2,3 + 25d40: 00c000f4 movhi r3,3 + 25d44: 18c83404 addi r3,r3,8400 + 25d48: 1885883a add r2,r3,r2 + 25d4c: 11800017 ldw r6,0(r2) + 25d50: 11c00117 ldw r7,4(r2) + 25d54: d8800717 ldw r2,28(sp) + 25d58: 0009883a mov r4,zero + 25d5c: 014ff834 movhi r5,16352 + 25d60: db001615 stw r12,88(sp) + 25d64: 15c00044 addi r23,r2,1 + 25d68: 002d1f80 call 2d1f8 <__divdf3> + 25d6c: 800d883a mov r6,r16 + 25d70: 880f883a mov r7,r17 + 25d74: 1009883a mov r4,r2 + 25d78: 180b883a mov r5,r3 + 25d7c: 002e4500 call 2e450 <__subdf3> + 25d80: d9401017 ldw r5,64(sp) + 25d84: d9000f17 ldw r4,60(sp) + 25d88: 102b883a mov r21,r2 + 25d8c: d8c01215 stw r3,72(sp) + 25d90: 002ed4c0 call 2ed4c <__fixdfsi> + 25d94: 1009883a mov r4,r2 + 25d98: 1029883a mov r20,r2 + 25d9c: 002edcc0 call 2edcc <__floatsidf> + 25da0: d9000f17 ldw r4,60(sp) + 25da4: d9401017 ldw r5,64(sp) + 25da8: 100d883a mov r6,r2 + 25dac: 180f883a mov r7,r3 + 25db0: 002e4500 call 2e450 <__subdf3> + 25db4: 1823883a mov r17,r3 + 25db8: d8c00717 ldw r3,28(sp) + 25dbc: d9401217 ldw r5,72(sp) + 25dc0: a2000c04 addi r8,r20,48 + 25dc4: 1021883a mov r16,r2 + 25dc8: 1a000005 stb r8,0(r3) + 25dcc: 800d883a mov r6,r16 + 25dd0: 880f883a mov r7,r17 + 25dd4: a809883a mov r4,r21 + 25dd8: 4029883a mov r20,r8 + 25ddc: 002db680 call 2db68 <__gedf2> + 25de0: 00841d16 blt zero,r2,26e58 <_dtoa_r+0x15f4> + 25de4: 800d883a mov r6,r16 + 25de8: 880f883a mov r7,r17 + 25dec: 0009883a mov r4,zero + 25df0: 014ffc34 movhi r5,16368 + 25df4: 002e4500 call 2e450 <__subdf3> + 25df8: d9401217 ldw r5,72(sp) + 25dfc: 100d883a mov r6,r2 + 25e00: 180f883a mov r7,r3 + 25e04: a809883a mov r4,r21 + 25e08: 002db680 call 2db68 <__gedf2> + 25e0c: db001617 ldw r12,88(sp) + 25e10: 00840e16 blt zero,r2,26e4c <_dtoa_r+0x15e8> + 25e14: 00800044 movi r2,1 + 25e18: 13006b0e bge r2,r12,25fc8 <_dtoa_r+0x764> + 25e1c: d9000717 ldw r4,28(sp) + 25e20: dd800f15 stw r22,60(sp) + 25e24: dcc01015 stw r19,64(sp) + 25e28: 2319883a add r12,r4,r12 + 25e2c: dcc01217 ldw r19,72(sp) + 25e30: 602d883a mov r22,r12 + 25e34: dc801215 stw r18,72(sp) + 25e38: b825883a mov r18,r23 + 25e3c: 00000906 br 25e64 <_dtoa_r+0x600> + 25e40: 002e4500 call 2e450 <__subdf3> + 25e44: a80d883a mov r6,r21 + 25e48: 980f883a mov r7,r19 + 25e4c: 1009883a mov r4,r2 + 25e50: 180b883a mov r5,r3 + 25e54: 002dc440 call 2dc44 <__ledf2> + 25e58: 1003e816 blt r2,zero,26dfc <_dtoa_r+0x1598> + 25e5c: b825883a mov r18,r23 + 25e60: bd83e926 beq r23,r22,26e08 <_dtoa_r+0x15a4> + 25e64: a809883a mov r4,r21 + 25e68: 980b883a mov r5,r19 + 25e6c: 000d883a mov r6,zero + 25e70: 01d00934 movhi r7,16420 + 25e74: 002dd380 call 2dd38 <__muldf3> + 25e78: 000d883a mov r6,zero + 25e7c: 01d00934 movhi r7,16420 + 25e80: 8009883a mov r4,r16 + 25e84: 880b883a mov r5,r17 + 25e88: 102b883a mov r21,r2 + 25e8c: 1827883a mov r19,r3 + 25e90: 002dd380 call 2dd38 <__muldf3> + 25e94: 180b883a mov r5,r3 + 25e98: 1009883a mov r4,r2 + 25e9c: 1821883a mov r16,r3 + 25ea0: 1023883a mov r17,r2 + 25ea4: 002ed4c0 call 2ed4c <__fixdfsi> + 25ea8: 1009883a mov r4,r2 + 25eac: 1029883a mov r20,r2 + 25eb0: 002edcc0 call 2edcc <__floatsidf> + 25eb4: 8809883a mov r4,r17 + 25eb8: 800b883a mov r5,r16 + 25ebc: 100d883a mov r6,r2 + 25ec0: 180f883a mov r7,r3 + 25ec4: 002e4500 call 2e450 <__subdf3> + 25ec8: a5000c04 addi r20,r20,48 + 25ecc: a80d883a mov r6,r21 + 25ed0: 980f883a mov r7,r19 + 25ed4: 1009883a mov r4,r2 + 25ed8: 180b883a mov r5,r3 + 25edc: 95000005 stb r20,0(r18) + 25ee0: 1021883a mov r16,r2 + 25ee4: 1823883a mov r17,r3 + 25ee8: 002dc440 call 2dc44 <__ledf2> + 25eec: bdc00044 addi r23,r23,1 + 25ef0: 800d883a mov r6,r16 + 25ef4: 880f883a mov r7,r17 + 25ef8: 0009883a mov r4,zero + 25efc: 014ffc34 movhi r5,16368 + 25f00: 103fcf0e bge r2,zero,25e40 <_gp+0xfffe9908> + 25f04: d8c01317 ldw r3,76(sp) + 25f08: d8c00515 stw r3,20(sp) + 25f0c: d9400917 ldw r5,36(sp) + 25f10: e009883a mov r4,fp + 25f14: 00286740 call 28674 <_Bfree> + 25f18: d9000517 ldw r4,20(sp) + 25f1c: d9802317 ldw r6,140(sp) + 25f20: d9c02517 ldw r7,148(sp) + 25f24: b8000005 stb zero,0(r23) + 25f28: 20800044 addi r2,r4,1 + 25f2c: 30800015 stw r2,0(r6) + 25f30: 3802aa26 beq r7,zero,269dc <_dtoa_r+0x1178> + 25f34: 3dc00015 stw r23,0(r7) + 25f38: d8800717 ldw r2,28(sp) + 25f3c: 003e7906 br 25924 <_gp+0xfffe93ec> + 25f40: 00800434 movhi r2,16 + 25f44: 10bfffc4 addi r2,r2,-1 + 25f48: 88a2703a and r17,r17,r2 + 25f4c: 883e851e bne r17,zero,25964 <_gp+0xfffe942c> + 25f50: 008000f4 movhi r2,3 + 25f54: 10881504 addi r2,r2,8276 + 25f58: 003e8406 br 2596c <_gp+0xfffe9434> + 25f5c: 10c00204 addi r3,r2,8 + 25f60: 003e8706 br 25980 <_gp+0xfffe9448> + 25f64: 01400434 movhi r5,16 + 25f68: 297fffc4 addi r5,r5,-1 + 25f6c: 994a703a and r5,r19,r5 + 25f70: 9009883a mov r4,r18 + 25f74: 843f0044 addi r16,r16,-1023 + 25f78: 294ffc34 orhi r5,r5,16368 + 25f7c: dd800217 ldw r22,8(sp) + 25f80: d8001115 stw zero,68(sp) + 25f84: 003ea506 br 25a1c <_gp+0xfffe94e4> + 25f88: 008000f4 movhi r2,3 + 25f8c: 10880c04 addi r2,r2,8240 + 25f90: 003e6406 br 25924 <_gp+0xfffe93ec> + 25f94: e0001115 stw zero,68(fp) + 25f98: 000b883a mov r5,zero + 25f9c: e009883a mov r4,fp + 25fa0: 00285cc0 call 285cc <_Balloc> + 25fa4: 01bfffc4 movi r6,-1 + 25fa8: 01c00044 movi r7,1 + 25fac: d8800715 stw r2,28(sp) + 25fb0: d9800c15 stw r6,48(sp) + 25fb4: e0801015 stw r2,64(fp) + 25fb8: d8000315 stw zero,12(sp) + 25fbc: d9c00b15 stw r7,44(sp) + 25fc0: d9800615 stw r6,24(sp) + 25fc4: d8002215 stw zero,136(sp) + 25fc8: d8800117 ldw r2,4(sp) + 25fcc: 10008916 blt r2,zero,261f4 <_dtoa_r+0x990> + 25fd0: d9000517 ldw r4,20(sp) + 25fd4: 00c00384 movi r3,14 + 25fd8: 19008616 blt r3,r4,261f4 <_dtoa_r+0x990> + 25fdc: 200490fa slli r2,r4,3 + 25fe0: 00c000f4 movhi r3,3 + 25fe4: d9802217 ldw r6,136(sp) + 25fe8: 18c83404 addi r3,r3,8400 + 25fec: 1885883a add r2,r3,r2 + 25ff0: 14000017 ldw r16,0(r2) + 25ff4: 14400117 ldw r17,4(r2) + 25ff8: 30016316 blt r6,zero,26588 <_dtoa_r+0xd24> + 25ffc: 800d883a mov r6,r16 + 26000: 880f883a mov r7,r17 + 26004: 9009883a mov r4,r18 + 26008: 980b883a mov r5,r19 + 2600c: 002d1f80 call 2d1f8 <__divdf3> + 26010: 180b883a mov r5,r3 + 26014: 1009883a mov r4,r2 + 26018: 002ed4c0 call 2ed4c <__fixdfsi> 2601c: 1009883a mov r4,r2 - 26020: 002d1000 call 2d100 <__adddf3> - 26024: 8009883a mov r4,r16 - 26028: 1029883a mov r20,r2 - 2602c: 1823883a mov r17,r3 - 26030: 002f5800 call 2f580 <__floatsidf> - 26034: 019427f4 movhi r6,20639 - 26038: 01cff4f4 movhi r7,16339 - 2603c: 319e7ec4 addi r6,r6,31227 - 26040: 39d104c4 addi r7,r7,17427 - 26044: 1009883a mov r4,r2 - 26048: 180b883a mov r5,r3 - 2604c: 002e4ec0 call 2e4ec <__muldf3> - 26050: 100d883a mov r6,r2 - 26054: 180f883a mov r7,r3 - 26058: a009883a mov r4,r20 - 2605c: 880b883a mov r5,r17 - 26060: 002d1000 call 2d100 <__adddf3> - 26064: 1009883a mov r4,r2 - 26068: 180b883a mov r5,r3 - 2606c: 1029883a mov r20,r2 - 26070: 1823883a mov r17,r3 - 26074: 002f5000 call 2f500 <__fixdfsi> + 26020: 102b883a mov r21,r2 + 26024: 002edcc0 call 2edcc <__floatsidf> + 26028: 800d883a mov r6,r16 + 2602c: 880f883a mov r7,r17 + 26030: 1009883a mov r4,r2 + 26034: 180b883a mov r5,r3 + 26038: 002dd380 call 2dd38 <__muldf3> + 2603c: 100d883a mov r6,r2 + 26040: 180f883a mov r7,r3 + 26044: 9009883a mov r4,r18 + 26048: 980b883a mov r5,r19 + 2604c: 002e4500 call 2e450 <__subdf3> + 26050: d9c00717 ldw r7,28(sp) + 26054: 1009883a mov r4,r2 + 26058: a8800c04 addi r2,r21,48 + 2605c: 38800005 stb r2,0(r7) + 26060: 3dc00044 addi r23,r7,1 + 26064: d9c00617 ldw r7,24(sp) + 26068: 01800044 movi r6,1 + 2606c: 180b883a mov r5,r3 + 26070: 2005883a mov r2,r4 + 26074: 39803826 beq r7,r6,26158 <_dtoa_r+0x8f4> 26078: 000d883a mov r6,zero - 2607c: 000f883a mov r7,zero - 26080: a009883a mov r4,r20 - 26084: 880b883a mov r5,r17 - 26088: d8800515 stw r2,20(sp) - 2608c: 002e3f80 call 2e3f8 <__ledf2> - 26090: 10028716 blt r2,zero,26ab0 <_dtoa_r+0xc88> - 26094: d8c00517 ldw r3,20(sp) - 26098: 00800584 movi r2,22 - 2609c: 10c27536 bltu r2,r3,26a74 <_dtoa_r+0xc4c> - 260a0: 180490fa slli r2,r3,3 - 260a4: 00c000f4 movhi r3,3 - 260a8: 18ca8104 addi r3,r3,10756 - 260ac: 1885883a add r2,r3,r2 - 260b0: 11000017 ldw r4,0(r2) - 260b4: 11400117 ldw r5,4(r2) - 260b8: 900d883a mov r6,r18 - 260bc: 980f883a mov r7,r19 - 260c0: 002e31c0 call 2e31c <__gedf2> - 260c4: 00828d0e bge zero,r2,26afc <_dtoa_r+0xcd4> - 260c8: d9000517 ldw r4,20(sp) - 260cc: d8000e15 stw zero,56(sp) - 260d0: 213fffc4 addi r4,r4,-1 - 260d4: d9000515 stw r4,20(sp) - 260d8: b42dc83a sub r22,r22,r16 - 260dc: b5bfffc4 addi r22,r22,-1 - 260e0: b0026f16 blt r22,zero,26aa0 <_dtoa_r+0xc78> - 260e4: d8000815 stw zero,32(sp) - 260e8: d9c00517 ldw r7,20(sp) - 260ec: 38026416 blt r7,zero,26a80 <_dtoa_r+0xc58> - 260f0: b1ed883a add r22,r22,r7 - 260f4: d9c00d15 stw r7,52(sp) - 260f8: d8000a15 stw zero,40(sp) - 260fc: d9800317 ldw r6,12(sp) - 26100: 00800244 movi r2,9 - 26104: 11811436 bltu r2,r6,26558 <_dtoa_r+0x730> - 26108: 00800144 movi r2,5 - 2610c: 1184e10e bge r2,r6,27494 <_dtoa_r+0x166c> - 26110: 31bfff04 addi r6,r6,-4 - 26114: d9800315 stw r6,12(sp) - 26118: 0023883a mov r17,zero - 2611c: d9800317 ldw r6,12(sp) - 26120: 008000c4 movi r2,3 - 26124: 30836726 beq r6,r2,26ec4 <_dtoa_r+0x109c> - 26128: 1183410e bge r2,r6,26e30 <_dtoa_r+0x1008> - 2612c: d9c00317 ldw r7,12(sp) - 26130: 00800104 movi r2,4 - 26134: 38827c26 beq r7,r2,26b28 <_dtoa_r+0xd00> - 26138: 00800144 movi r2,5 - 2613c: 3884c41e bne r7,r2,27450 <_dtoa_r+0x1628> - 26140: 00800044 movi r2,1 - 26144: d8800b15 stw r2,44(sp) - 26148: d8c00517 ldw r3,20(sp) - 2614c: d9002217 ldw r4,136(sp) - 26150: 1907883a add r3,r3,r4 - 26154: 19800044 addi r6,r3,1 - 26158: d8c00c15 stw r3,48(sp) - 2615c: d9800615 stw r6,24(sp) - 26160: 0183a40e bge zero,r6,26ff4 <_dtoa_r+0x11cc> - 26164: d9800617 ldw r6,24(sp) - 26168: 3021883a mov r16,r6 - 2616c: e0001115 stw zero,68(fp) - 26170: 008005c4 movi r2,23 - 26174: 1184c92e bgeu r2,r6,2749c <_dtoa_r+0x1674> - 26178: 00c00044 movi r3,1 - 2617c: 00800104 movi r2,4 - 26180: 1085883a add r2,r2,r2 - 26184: 11000504 addi r4,r2,20 - 26188: 180b883a mov r5,r3 - 2618c: 18c00044 addi r3,r3,1 - 26190: 313ffb2e bgeu r6,r4,26180 <_dtoa_r+0x358> - 26194: e1401115 stw r5,68(fp) - 26198: e009883a mov r4,fp - 2619c: 0028b900 call 28b90 <_Balloc> - 261a0: d8800715 stw r2,28(sp) - 261a4: e0801015 stw r2,64(fp) - 261a8: 00800384 movi r2,14 - 261ac: 1400f736 bltu r2,r16,2658c <_dtoa_r+0x764> - 261b0: 8800f626 beq r17,zero,2658c <_dtoa_r+0x764> - 261b4: d9c00517 ldw r7,20(sp) - 261b8: 01c39a0e bge zero,r7,27024 <_dtoa_r+0x11fc> - 261bc: 388003cc andi r2,r7,15 - 261c0: 100490fa slli r2,r2,3 - 261c4: 382bd13a srai r21,r7,4 - 261c8: 00c000f4 movhi r3,3 - 261cc: 18ca8104 addi r3,r3,10756 - 261d0: 1885883a add r2,r3,r2 - 261d4: a8c0040c andi r3,r21,16 - 261d8: 12400017 ldw r9,0(r2) - 261dc: 12000117 ldw r8,4(r2) - 261e0: 18037926 beq r3,zero,26fc8 <_dtoa_r+0x11a0> - 261e4: 008000f4 movhi r2,3 - 261e8: 108a7704 addi r2,r2,10716 - 261ec: 11800817 ldw r6,32(r2) - 261f0: 11c00917 ldw r7,36(r2) - 261f4: 9009883a mov r4,r18 - 261f8: 980b883a mov r5,r19 - 261fc: da001715 stw r8,92(sp) - 26200: da401615 stw r9,88(sp) - 26204: 002d9ac0 call 2d9ac <__divdf3> - 26208: da001717 ldw r8,92(sp) - 2620c: da401617 ldw r9,88(sp) - 26210: ad4003cc andi r21,r21,15 - 26214: 040000c4 movi r16,3 - 26218: 1023883a mov r17,r2 - 2621c: 1829883a mov r20,r3 - 26220: a8001126 beq r21,zero,26268 <_dtoa_r+0x440> - 26224: 05c000f4 movhi r23,3 - 26228: bdca7704 addi r23,r23,10716 - 2622c: 4805883a mov r2,r9 - 26230: 4007883a mov r3,r8 - 26234: a980004c andi r6,r21,1 - 26238: 1009883a mov r4,r2 - 2623c: a82bd07a srai r21,r21,1 - 26240: 180b883a mov r5,r3 - 26244: 30000426 beq r6,zero,26258 <_dtoa_r+0x430> - 26248: b9800017 ldw r6,0(r23) - 2624c: b9c00117 ldw r7,4(r23) - 26250: 84000044 addi r16,r16,1 - 26254: 002e4ec0 call 2e4ec <__muldf3> - 26258: bdc00204 addi r23,r23,8 - 2625c: a83ff51e bne r21,zero,26234 <_dtoa_r+0x40c> - 26260: 1013883a mov r9,r2 - 26264: 1811883a mov r8,r3 - 26268: 480d883a mov r6,r9 - 2626c: 400f883a mov r7,r8 - 26270: 8809883a mov r4,r17 - 26274: a00b883a mov r5,r20 - 26278: 002d9ac0 call 2d9ac <__divdf3> - 2627c: d8800f15 stw r2,60(sp) - 26280: d8c01015 stw r3,64(sp) - 26284: d8c00e17 ldw r3,56(sp) - 26288: 18000626 beq r3,zero,262a4 <_dtoa_r+0x47c> - 2628c: d9000f17 ldw r4,60(sp) - 26290: d9401017 ldw r5,64(sp) - 26294: 000d883a mov r6,zero - 26298: 01cffc34 movhi r7,16368 - 2629c: 002e3f80 call 2e3f8 <__ledf2> - 262a0: 10040b16 blt r2,zero,272d0 <_dtoa_r+0x14a8> - 262a4: 8009883a mov r4,r16 - 262a8: 002f5800 call 2f580 <__floatsidf> - 262ac: d9800f17 ldw r6,60(sp) - 262b0: d9c01017 ldw r7,64(sp) - 262b4: 1009883a mov r4,r2 - 262b8: 180b883a mov r5,r3 - 262bc: 002e4ec0 call 2e4ec <__muldf3> - 262c0: 000d883a mov r6,zero - 262c4: 01d00734 movhi r7,16412 - 262c8: 1009883a mov r4,r2 - 262cc: 180b883a mov r5,r3 - 262d0: 002d1000 call 2d100 <__adddf3> - 262d4: 1021883a mov r16,r2 - 262d8: d8800617 ldw r2,24(sp) - 262dc: 047f3034 movhi r17,64704 - 262e0: 1c63883a add r17,r3,r17 - 262e4: 10031826 beq r2,zero,26f48 <_dtoa_r+0x1120> - 262e8: d8c00517 ldw r3,20(sp) - 262ec: db000617 ldw r12,24(sp) - 262f0: d8c01315 stw r3,76(sp) - 262f4: d9000b17 ldw r4,44(sp) - 262f8: 20038f26 beq r4,zero,27138 <_dtoa_r+0x1310> - 262fc: 60bfffc4 addi r2,r12,-1 - 26300: 100490fa slli r2,r2,3 - 26304: 00c000f4 movhi r3,3 - 26308: 18ca8104 addi r3,r3,10756 - 2630c: 1885883a add r2,r3,r2 - 26310: 11800017 ldw r6,0(r2) - 26314: 11c00117 ldw r7,4(r2) - 26318: d8800717 ldw r2,28(sp) - 2631c: 0009883a mov r4,zero - 26320: 014ff834 movhi r5,16352 - 26324: db001615 stw r12,88(sp) - 26328: 15c00044 addi r23,r2,1 - 2632c: 002d9ac0 call 2d9ac <__divdf3> - 26330: 800d883a mov r6,r16 - 26334: 880f883a mov r7,r17 - 26338: 1009883a mov r4,r2 - 2633c: 180b883a mov r5,r3 - 26340: 002ec040 call 2ec04 <__subdf3> - 26344: d9401017 ldw r5,64(sp) - 26348: d9000f17 ldw r4,60(sp) - 2634c: 102b883a mov r21,r2 - 26350: d8c01215 stw r3,72(sp) - 26354: 002f5000 call 2f500 <__fixdfsi> - 26358: 1009883a mov r4,r2 - 2635c: 1029883a mov r20,r2 - 26360: 002f5800 call 2f580 <__floatsidf> - 26364: d9000f17 ldw r4,60(sp) - 26368: d9401017 ldw r5,64(sp) - 2636c: 100d883a mov r6,r2 - 26370: 180f883a mov r7,r3 - 26374: 002ec040 call 2ec04 <__subdf3> - 26378: 1823883a mov r17,r3 - 2637c: d8c00717 ldw r3,28(sp) - 26380: d9401217 ldw r5,72(sp) - 26384: a2000c04 addi r8,r20,48 - 26388: 1021883a mov r16,r2 - 2638c: 1a000005 stb r8,0(r3) - 26390: 800d883a mov r6,r16 - 26394: 880f883a mov r7,r17 - 26398: a809883a mov r4,r21 - 2639c: 4029883a mov r20,r8 - 263a0: 002e31c0 call 2e31c <__gedf2> - 263a4: 00841d16 blt zero,r2,2741c <_dtoa_r+0x15f4> - 263a8: 800d883a mov r6,r16 - 263ac: 880f883a mov r7,r17 - 263b0: 0009883a mov r4,zero - 263b4: 014ffc34 movhi r5,16368 - 263b8: 002ec040 call 2ec04 <__subdf3> - 263bc: d9401217 ldw r5,72(sp) - 263c0: 100d883a mov r6,r2 - 263c4: 180f883a mov r7,r3 - 263c8: a809883a mov r4,r21 - 263cc: 002e31c0 call 2e31c <__gedf2> - 263d0: db001617 ldw r12,88(sp) - 263d4: 00840e16 blt zero,r2,27410 <_dtoa_r+0x15e8> - 263d8: 00800044 movi r2,1 - 263dc: 13006b0e bge r2,r12,2658c <_dtoa_r+0x764> - 263e0: d9000717 ldw r4,28(sp) - 263e4: dd800f15 stw r22,60(sp) - 263e8: dcc01015 stw r19,64(sp) - 263ec: 2319883a add r12,r4,r12 - 263f0: dcc01217 ldw r19,72(sp) - 263f4: 602d883a mov r22,r12 - 263f8: dc801215 stw r18,72(sp) - 263fc: b825883a mov r18,r23 - 26400: 00000906 br 26428 <_dtoa_r+0x600> - 26404: 002ec040 call 2ec04 <__subdf3> - 26408: a80d883a mov r6,r21 - 2640c: 980f883a mov r7,r19 - 26410: 1009883a mov r4,r2 - 26414: 180b883a mov r5,r3 - 26418: 002e3f80 call 2e3f8 <__ledf2> - 2641c: 1003e816 blt r2,zero,273c0 <_dtoa_r+0x1598> - 26420: b825883a mov r18,r23 - 26424: bd83e926 beq r23,r22,273cc <_dtoa_r+0x15a4> - 26428: a809883a mov r4,r21 - 2642c: 980b883a mov r5,r19 - 26430: 000d883a mov r6,zero - 26434: 01d00934 movhi r7,16420 - 26438: 002e4ec0 call 2e4ec <__muldf3> - 2643c: 000d883a mov r6,zero - 26440: 01d00934 movhi r7,16420 - 26444: 8009883a mov r4,r16 - 26448: 880b883a mov r5,r17 - 2644c: 102b883a mov r21,r2 - 26450: 1827883a mov r19,r3 - 26454: 002e4ec0 call 2e4ec <__muldf3> - 26458: 180b883a mov r5,r3 - 2645c: 1009883a mov r4,r2 - 26460: 1821883a mov r16,r3 - 26464: 1023883a mov r17,r2 - 26468: 002f5000 call 2f500 <__fixdfsi> - 2646c: 1009883a mov r4,r2 - 26470: 1029883a mov r20,r2 - 26474: 002f5800 call 2f580 <__floatsidf> - 26478: 8809883a mov r4,r17 - 2647c: 800b883a mov r5,r16 - 26480: 100d883a mov r6,r2 - 26484: 180f883a mov r7,r3 - 26488: 002ec040 call 2ec04 <__subdf3> - 2648c: a5000c04 addi r20,r20,48 - 26490: a80d883a mov r6,r21 - 26494: 980f883a mov r7,r19 - 26498: 1009883a mov r4,r2 - 2649c: 180b883a mov r5,r3 - 264a0: 95000005 stb r20,0(r18) - 264a4: 1021883a mov r16,r2 - 264a8: 1823883a mov r17,r3 - 264ac: 002e3f80 call 2e3f8 <__ledf2> - 264b0: bdc00044 addi r23,r23,1 - 264b4: 800d883a mov r6,r16 - 264b8: 880f883a mov r7,r17 - 264bc: 0009883a mov r4,zero - 264c0: 014ffc34 movhi r5,16368 - 264c4: 103fcf0e bge r2,zero,26404 <_dtoa_r+0x5dc> - 264c8: d8c01317 ldw r3,76(sp) - 264cc: d8c00515 stw r3,20(sp) - 264d0: d9400917 ldw r5,36(sp) - 264d4: e009883a mov r4,fp - 264d8: 0028c380 call 28c38 <_Bfree> - 264dc: d9000517 ldw r4,20(sp) - 264e0: d9802317 ldw r6,140(sp) - 264e4: d9c02517 ldw r7,148(sp) - 264e8: b8000005 stb zero,0(r23) - 264ec: 20800044 addi r2,r4,1 - 264f0: 30800015 stw r2,0(r6) - 264f4: 3802aa26 beq r7,zero,26fa0 <_dtoa_r+0x1178> - 264f8: 3dc00015 stw r23,0(r7) - 264fc: d8800717 ldw r2,28(sp) - 26500: 003e7906 br 25ee8 <_dtoa_r+0xc0> - 26504: 00800434 movhi r2,16 - 26508: 10bfffc4 addi r2,r2,-1 - 2650c: 88a2703a and r17,r17,r2 - 26510: 883e851e bne r17,zero,25f28 <_dtoa_r+0x100> - 26514: 008000f4 movhi r2,3 - 26518: 108a6304 addi r2,r2,10636 - 2651c: 003e8406 br 25f30 <_dtoa_r+0x108> - 26520: 10c00204 addi r3,r2,8 - 26524: 003e8706 br 25f44 <_dtoa_r+0x11c> - 26528: 01400434 movhi r5,16 - 2652c: 297fffc4 addi r5,r5,-1 - 26530: 994a703a and r5,r19,r5 - 26534: 9009883a mov r4,r18 - 26538: 843f0044 addi r16,r16,-1023 - 2653c: 294ffc34 orhi r5,r5,16368 - 26540: dd800217 ldw r22,8(sp) - 26544: d8001115 stw zero,68(sp) - 26548: 003ea506 br 25fe0 <_dtoa_r+0x1b8> - 2654c: 008000f4 movhi r2,3 - 26550: 108a5a04 addi r2,r2,10600 - 26554: 003e6406 br 25ee8 <_dtoa_r+0xc0> - 26558: e0001115 stw zero,68(fp) - 2655c: 000b883a mov r5,zero - 26560: e009883a mov r4,fp - 26564: 0028b900 call 28b90 <_Balloc> - 26568: 01bfffc4 movi r6,-1 - 2656c: 01c00044 movi r7,1 - 26570: d8800715 stw r2,28(sp) - 26574: d9800c15 stw r6,48(sp) - 26578: e0801015 stw r2,64(fp) - 2657c: d8000315 stw zero,12(sp) - 26580: d9c00b15 stw r7,44(sp) - 26584: d9800615 stw r6,24(sp) - 26588: d8002215 stw zero,136(sp) - 2658c: d8800117 ldw r2,4(sp) - 26590: 10008916 blt r2,zero,267b8 <_dtoa_r+0x990> - 26594: d9000517 ldw r4,20(sp) - 26598: 00c00384 movi r3,14 - 2659c: 19008616 blt r3,r4,267b8 <_dtoa_r+0x990> - 265a0: 200490fa slli r2,r4,3 - 265a4: 00c000f4 movhi r3,3 - 265a8: d9802217 ldw r6,136(sp) - 265ac: 18ca8104 addi r3,r3,10756 - 265b0: 1885883a add r2,r3,r2 - 265b4: 14000017 ldw r16,0(r2) - 265b8: 14400117 ldw r17,4(r2) - 265bc: 30016316 blt r6,zero,26b4c <_dtoa_r+0xd24> - 265c0: 800d883a mov r6,r16 - 265c4: 880f883a mov r7,r17 - 265c8: 9009883a mov r4,r18 - 265cc: 980b883a mov r5,r19 - 265d0: 002d9ac0 call 2d9ac <__divdf3> - 265d4: 180b883a mov r5,r3 - 265d8: 1009883a mov r4,r2 - 265dc: 002f5000 call 2f500 <__fixdfsi> - 265e0: 1009883a mov r4,r2 - 265e4: 102b883a mov r21,r2 - 265e8: 002f5800 call 2f580 <__floatsidf> - 265ec: 800d883a mov r6,r16 - 265f0: 880f883a mov r7,r17 - 265f4: 1009883a mov r4,r2 - 265f8: 180b883a mov r5,r3 - 265fc: 002e4ec0 call 2e4ec <__muldf3> - 26600: 100d883a mov r6,r2 - 26604: 180f883a mov r7,r3 - 26608: 9009883a mov r4,r18 - 2660c: 980b883a mov r5,r19 - 26610: 002ec040 call 2ec04 <__subdf3> - 26614: d9c00717 ldw r7,28(sp) - 26618: 1009883a mov r4,r2 - 2661c: a8800c04 addi r2,r21,48 - 26620: 38800005 stb r2,0(r7) - 26624: 3dc00044 addi r23,r7,1 - 26628: d9c00617 ldw r7,24(sp) - 2662c: 01800044 movi r6,1 - 26630: 180b883a mov r5,r3 - 26634: 2005883a mov r2,r4 - 26638: 39803826 beq r7,r6,2671c <_dtoa_r+0x8f4> - 2663c: 000d883a mov r6,zero - 26640: 01d00934 movhi r7,16420 - 26644: 002e4ec0 call 2e4ec <__muldf3> - 26648: 000d883a mov r6,zero - 2664c: 000f883a mov r7,zero - 26650: 1009883a mov r4,r2 - 26654: 180b883a mov r5,r3 - 26658: 1025883a mov r18,r2 - 2665c: 1827883a mov r19,r3 - 26660: 002e2940 call 2e294 <__eqdf2> - 26664: 103f9a26 beq r2,zero,264d0 <_dtoa_r+0x6a8> - 26668: d9c00617 ldw r7,24(sp) - 2666c: d8c00717 ldw r3,28(sp) - 26670: b829883a mov r20,r23 - 26674: 38bfffc4 addi r2,r7,-1 - 26678: 18ad883a add r22,r3,r2 - 2667c: 00000a06 br 266a8 <_dtoa_r+0x880> - 26680: 002e4ec0 call 2e4ec <__muldf3> - 26684: 000d883a mov r6,zero - 26688: 000f883a mov r7,zero - 2668c: 1009883a mov r4,r2 - 26690: 180b883a mov r5,r3 - 26694: 1025883a mov r18,r2 - 26698: 1827883a mov r19,r3 - 2669c: b829883a mov r20,r23 - 266a0: 002e2940 call 2e294 <__eqdf2> - 266a4: 103f8a26 beq r2,zero,264d0 <_dtoa_r+0x6a8> - 266a8: 800d883a mov r6,r16 - 266ac: 880f883a mov r7,r17 - 266b0: 9009883a mov r4,r18 - 266b4: 980b883a mov r5,r19 - 266b8: 002d9ac0 call 2d9ac <__divdf3> - 266bc: 180b883a mov r5,r3 - 266c0: 1009883a mov r4,r2 - 266c4: 002f5000 call 2f500 <__fixdfsi> - 266c8: 1009883a mov r4,r2 - 266cc: 102b883a mov r21,r2 - 266d0: 002f5800 call 2f580 <__floatsidf> - 266d4: 800d883a mov r6,r16 - 266d8: 880f883a mov r7,r17 - 266dc: 1009883a mov r4,r2 - 266e0: 180b883a mov r5,r3 - 266e4: 002e4ec0 call 2e4ec <__muldf3> - 266e8: 100d883a mov r6,r2 - 266ec: 180f883a mov r7,r3 - 266f0: 9009883a mov r4,r18 - 266f4: 980b883a mov r5,r19 - 266f8: 002ec040 call 2ec04 <__subdf3> - 266fc: aa000c04 addi r8,r21,48 - 26700: a2000005 stb r8,0(r20) - 26704: 000d883a mov r6,zero - 26708: 01d00934 movhi r7,16420 - 2670c: 1009883a mov r4,r2 - 26710: 180b883a mov r5,r3 - 26714: a5c00044 addi r23,r20,1 - 26718: b53fd91e bne r22,r20,26680 <_dtoa_r+0x858> - 2671c: 100d883a mov r6,r2 - 26720: 180f883a mov r7,r3 - 26724: 1009883a mov r4,r2 - 26728: 180b883a mov r5,r3 - 2672c: 002d1000 call 2d100 <__adddf3> - 26730: 100d883a mov r6,r2 - 26734: 180f883a mov r7,r3 - 26738: 8009883a mov r4,r16 - 2673c: 880b883a mov r5,r17 - 26740: 1027883a mov r19,r2 - 26744: 1825883a mov r18,r3 - 26748: 002e3f80 call 2e3f8 <__ledf2> - 2674c: 10000816 blt r2,zero,26770 <_dtoa_r+0x948> - 26750: 980d883a mov r6,r19 - 26754: 900f883a mov r7,r18 - 26758: 8009883a mov r4,r16 - 2675c: 880b883a mov r5,r17 - 26760: 002e2940 call 2e294 <__eqdf2> - 26764: 103f5a1e bne r2,zero,264d0 <_dtoa_r+0x6a8> - 26768: ad40004c andi r21,r21,1 - 2676c: a83f5826 beq r21,zero,264d0 <_dtoa_r+0x6a8> - 26770: bd3fffc3 ldbu r20,-1(r23) - 26774: b8bfffc4 addi r2,r23,-1 - 26778: 1007883a mov r3,r2 - 2677c: 01400e44 movi r5,57 - 26780: d9800717 ldw r6,28(sp) - 26784: 00000506 br 2679c <_dtoa_r+0x974> - 26788: 18ffffc4 addi r3,r3,-1 - 2678c: 11824726 beq r2,r6,270ac <_dtoa_r+0x1284> - 26790: 1d000003 ldbu r20,0(r3) - 26794: 102f883a mov r23,r2 - 26798: 10bfffc4 addi r2,r2,-1 - 2679c: a1003fcc andi r4,r20,255 - 267a0: 2100201c xori r4,r4,128 - 267a4: 213fe004 addi r4,r4,-128 - 267a8: 217ff726 beq r4,r5,26788 <_dtoa_r+0x960> - 267ac: a2000044 addi r8,r20,1 - 267b0: 12000005 stb r8,0(r2) - 267b4: 003f4606 br 264d0 <_dtoa_r+0x6a8> - 267b8: d9000b17 ldw r4,44(sp) - 267bc: 2000c826 beq r4,zero,26ae0 <_dtoa_r+0xcb8> - 267c0: d9800317 ldw r6,12(sp) - 267c4: 00c00044 movi r3,1 - 267c8: 1980f90e bge r3,r6,26bb0 <_dtoa_r+0xd88> - 267cc: d8800617 ldw r2,24(sp) - 267d0: d8c00a17 ldw r3,40(sp) - 267d4: 157fffc4 addi r21,r2,-1 - 267d8: 1d41f316 blt r3,r21,26fa8 <_dtoa_r+0x1180> - 267dc: 1d6bc83a sub r21,r3,r21 - 267e0: d9c00617 ldw r7,24(sp) - 267e4: 3802aa16 blt r7,zero,27290 <_dtoa_r+0x1468> - 267e8: dd000817 ldw r20,32(sp) - 267ec: d8800617 ldw r2,24(sp) - 267f0: d8c00817 ldw r3,32(sp) - 267f4: 01400044 movi r5,1 - 267f8: e009883a mov r4,fp - 267fc: 1887883a add r3,r3,r2 - 26800: d8c00815 stw r3,32(sp) - 26804: b0ad883a add r22,r22,r2 - 26808: 0028f9c0 call 28f9c <__i2b> - 2680c: 1023883a mov r17,r2 - 26810: a0000826 beq r20,zero,26834 <_dtoa_r+0xa0c> - 26814: 0580070e bge zero,r22,26834 <_dtoa_r+0xa0c> - 26818: a005883a mov r2,r20 - 2681c: b500b916 blt r22,r20,26b04 <_dtoa_r+0xcdc> - 26820: d9000817 ldw r4,32(sp) - 26824: a0a9c83a sub r20,r20,r2 - 26828: b0adc83a sub r22,r22,r2 - 2682c: 2089c83a sub r4,r4,r2 - 26830: d9000815 stw r4,32(sp) - 26834: d9800a17 ldw r6,40(sp) - 26838: 0181810e bge zero,r6,26e40 <_dtoa_r+0x1018> - 2683c: d9c00b17 ldw r7,44(sp) - 26840: 3800b326 beq r7,zero,26b10 <_dtoa_r+0xce8> - 26844: a800b226 beq r21,zero,26b10 <_dtoa_r+0xce8> - 26848: 880b883a mov r5,r17 - 2684c: a80d883a mov r6,r21 - 26850: e009883a mov r4,fp - 26854: 00291d00 call 291d0 <__pow5mult> - 26858: d9800917 ldw r6,36(sp) - 2685c: 100b883a mov r5,r2 - 26860: e009883a mov r4,fp - 26864: 1023883a mov r17,r2 - 26868: 0028fd80 call 28fd8 <__multiply> - 2686c: 1021883a mov r16,r2 - 26870: d8800a17 ldw r2,40(sp) - 26874: d9400917 ldw r5,36(sp) - 26878: e009883a mov r4,fp - 2687c: 1545c83a sub r2,r2,r21 - 26880: d8800a15 stw r2,40(sp) - 26884: 0028c380 call 28c38 <_Bfree> - 26888: d8c00a17 ldw r3,40(sp) - 2688c: 18009f1e bne r3,zero,26b0c <_dtoa_r+0xce4> - 26890: 05c00044 movi r23,1 - 26894: e009883a mov r4,fp - 26898: b80b883a mov r5,r23 - 2689c: 0028f9c0 call 28f9c <__i2b> - 268a0: d9000d17 ldw r4,52(sp) - 268a4: 102b883a mov r21,r2 - 268a8: 2000ce26 beq r4,zero,26be4 <_dtoa_r+0xdbc> - 268ac: 200d883a mov r6,r4 - 268b0: 100b883a mov r5,r2 - 268b4: e009883a mov r4,fp - 268b8: 00291d00 call 291d0 <__pow5mult> - 268bc: d9800317 ldw r6,12(sp) - 268c0: 102b883a mov r21,r2 - 268c4: b981810e bge r23,r6,26ecc <_dtoa_r+0x10a4> - 268c8: 0027883a mov r19,zero - 268cc: a8800417 ldw r2,16(r21) - 268d0: 05c00804 movi r23,32 - 268d4: 10800104 addi r2,r2,4 - 268d8: 1085883a add r2,r2,r2 - 268dc: 1085883a add r2,r2,r2 - 268e0: a885883a add r2,r21,r2 - 268e4: 11000017 ldw r4,0(r2) - 268e8: 0028e840 call 28e84 <__hi0bits> - 268ec: b885c83a sub r2,r23,r2 - 268f0: 1585883a add r2,r2,r22 - 268f4: 108007cc andi r2,r2,31 - 268f8: 1000b326 beq r2,zero,26bc8 <_dtoa_r+0xda0> - 268fc: 00c00804 movi r3,32 - 26900: 1887c83a sub r3,r3,r2 - 26904: 01000104 movi r4,4 - 26908: 20c2cd0e bge r4,r3,27440 <_dtoa_r+0x1618> - 2690c: 00c00704 movi r3,28 - 26910: 1885c83a sub r2,r3,r2 - 26914: d8c00817 ldw r3,32(sp) - 26918: a0a9883a add r20,r20,r2 - 2691c: b0ad883a add r22,r22,r2 - 26920: 1887883a add r3,r3,r2 - 26924: d8c00815 stw r3,32(sp) - 26928: d9800817 ldw r6,32(sp) - 2692c: 0180040e bge zero,r6,26940 <_dtoa_r+0xb18> - 26930: 800b883a mov r5,r16 - 26934: e009883a mov r4,fp - 26938: 00293100 call 29310 <__lshift> - 2693c: 1021883a mov r16,r2 - 26940: 0580050e bge zero,r22,26958 <_dtoa_r+0xb30> - 26944: a80b883a mov r5,r21 - 26948: b00d883a mov r6,r22 - 2694c: e009883a mov r4,fp - 26950: 00293100 call 29310 <__lshift> - 26954: 102b883a mov r21,r2 - 26958: d9c00e17 ldw r7,56(sp) - 2695c: 3801211e bne r7,zero,26de4 <_dtoa_r+0xfbc> - 26960: d9800617 ldw r6,24(sp) - 26964: 0181380e bge zero,r6,26e48 <_dtoa_r+0x1020> - 26968: d8c00b17 ldw r3,44(sp) - 2696c: 1800ab1e bne r3,zero,26c1c <_dtoa_r+0xdf4> - 26970: dc800717 ldw r18,28(sp) - 26974: dcc00617 ldw r19,24(sp) - 26978: 9029883a mov r20,r18 - 2697c: 00000206 br 26988 <_dtoa_r+0xb60> - 26980: 0028c600 call 28c60 <__multadd> - 26984: 1021883a mov r16,r2 - 26988: a80b883a mov r5,r21 - 2698c: 8009883a mov r4,r16 - 26990: 0025c280 call 25c28 - 26994: 10800c04 addi r2,r2,48 - 26998: 90800005 stb r2,0(r18) - 2699c: 94800044 addi r18,r18,1 - 269a0: 9507c83a sub r3,r18,r20 - 269a4: 000f883a mov r7,zero - 269a8: 01800284 movi r6,10 - 269ac: 800b883a mov r5,r16 - 269b0: e009883a mov r4,fp - 269b4: 1cfff216 blt r3,r19,26980 <_dtoa_r+0xb58> - 269b8: 1011883a mov r8,r2 - 269bc: d8800617 ldw r2,24(sp) - 269c0: 0082370e bge zero,r2,272a0 <_dtoa_r+0x1478> - 269c4: d9000717 ldw r4,28(sp) - 269c8: 0025883a mov r18,zero - 269cc: 20af883a add r23,r4,r2 - 269d0: 01800044 movi r6,1 - 269d4: 800b883a mov r5,r16 - 269d8: e009883a mov r4,fp - 269dc: da001715 stw r8,92(sp) - 269e0: 00293100 call 29310 <__lshift> - 269e4: a80b883a mov r5,r21 - 269e8: 1009883a mov r4,r2 - 269ec: d8800915 stw r2,36(sp) - 269f0: 00294580 call 29458 <__mcmp> - 269f4: da001717 ldw r8,92(sp) - 269f8: 0081800e bge zero,r2,26ffc <_dtoa_r+0x11d4> - 269fc: b93fffc3 ldbu r4,-1(r23) - 26a00: b8bfffc4 addi r2,r23,-1 - 26a04: 1007883a mov r3,r2 - 26a08: 01800e44 movi r6,57 - 26a0c: d9c00717 ldw r7,28(sp) - 26a10: 00000506 br 26a28 <_dtoa_r+0xc00> - 26a14: 18ffffc4 addi r3,r3,-1 - 26a18: 11c12326 beq r2,r7,26ea8 <_dtoa_r+0x1080> - 26a1c: 19000003 ldbu r4,0(r3) - 26a20: 102f883a mov r23,r2 - 26a24: 10bfffc4 addi r2,r2,-1 - 26a28: 21403fcc andi r5,r4,255 - 26a2c: 2940201c xori r5,r5,128 - 26a30: 297fe004 addi r5,r5,-128 - 26a34: 29bff726 beq r5,r6,26a14 <_dtoa_r+0xbec> - 26a38: 21000044 addi r4,r4,1 - 26a3c: 11000005 stb r4,0(r2) - 26a40: a80b883a mov r5,r21 - 26a44: e009883a mov r4,fp - 26a48: 0028c380 call 28c38 <_Bfree> - 26a4c: 883ea026 beq r17,zero,264d0 <_dtoa_r+0x6a8> - 26a50: 90000426 beq r18,zero,26a64 <_dtoa_r+0xc3c> - 26a54: 94400326 beq r18,r17,26a64 <_dtoa_r+0xc3c> - 26a58: 900b883a mov r5,r18 - 26a5c: e009883a mov r4,fp - 26a60: 0028c380 call 28c38 <_Bfree> - 26a64: 880b883a mov r5,r17 - 26a68: e009883a mov r4,fp - 26a6c: 0028c380 call 28c38 <_Bfree> - 26a70: 003e9706 br 264d0 <_dtoa_r+0x6a8> - 26a74: 01800044 movi r6,1 - 26a78: d9800e15 stw r6,56(sp) - 26a7c: 003d9606 br 260d8 <_dtoa_r+0x2b0> - 26a80: d8800817 ldw r2,32(sp) - 26a84: d8c00517 ldw r3,20(sp) - 26a88: d8000d15 stw zero,52(sp) - 26a8c: 10c5c83a sub r2,r2,r3 - 26a90: 00c9c83a sub r4,zero,r3 - 26a94: d8800815 stw r2,32(sp) - 26a98: d9000a15 stw r4,40(sp) - 26a9c: 003d9706 br 260fc <_dtoa_r+0x2d4> - 26aa0: 05adc83a sub r22,zero,r22 - 26aa4: dd800815 stw r22,32(sp) - 26aa8: 002d883a mov r22,zero - 26aac: 003d8e06 br 260e8 <_dtoa_r+0x2c0> - 26ab0: d9000517 ldw r4,20(sp) - 26ab4: 002f5800 call 2f580 <__floatsidf> - 26ab8: 100d883a mov r6,r2 - 26abc: 180f883a mov r7,r3 - 26ac0: a009883a mov r4,r20 - 26ac4: 880b883a mov r5,r17 - 26ac8: 002e2940 call 2e294 <__eqdf2> - 26acc: 103d7126 beq r2,zero,26094 <_dtoa_r+0x26c> - 26ad0: d9c00517 ldw r7,20(sp) - 26ad4: 39ffffc4 addi r7,r7,-1 - 26ad8: d9c00515 stw r7,20(sp) - 26adc: 003d6d06 br 26094 <_dtoa_r+0x26c> - 26ae0: dd400a17 ldw r21,40(sp) - 26ae4: dd000817 ldw r20,32(sp) - 26ae8: 0023883a mov r17,zero - 26aec: 003f4806 br 26810 <_dtoa_r+0x9e8> - 26af0: 10e3c83a sub r17,r2,r3 - 26af4: 9448983a sll r4,r18,r17 - 26af8: 003d3206 br 25fc4 <_dtoa_r+0x19c> - 26afc: d8000e15 stw zero,56(sp) - 26b00: 003d7506 br 260d8 <_dtoa_r+0x2b0> - 26b04: b005883a mov r2,r22 - 26b08: 003f4506 br 26820 <_dtoa_r+0x9f8> - 26b0c: dc000915 stw r16,36(sp) - 26b10: d9800a17 ldw r6,40(sp) - 26b14: d9400917 ldw r5,36(sp) - 26b18: e009883a mov r4,fp - 26b1c: 00291d00 call 291d0 <__pow5mult> - 26b20: 1021883a mov r16,r2 - 26b24: 003f5a06 br 26890 <_dtoa_r+0xa68> - 26b28: 01c00044 movi r7,1 - 26b2c: d9c00b15 stw r7,44(sp) - 26b30: d8802217 ldw r2,136(sp) - 26b34: 0081280e bge zero,r2,26fd8 <_dtoa_r+0x11b0> - 26b38: 100d883a mov r6,r2 - 26b3c: 1021883a mov r16,r2 - 26b40: d8800c15 stw r2,48(sp) - 26b44: d8800615 stw r2,24(sp) - 26b48: 003d8806 br 2616c <_dtoa_r+0x344> - 26b4c: d8800617 ldw r2,24(sp) - 26b50: 00be9b16 blt zero,r2,265c0 <_dtoa_r+0x798> - 26b54: 10010f1e bne r2,zero,26f94 <_dtoa_r+0x116c> - 26b58: 880b883a mov r5,r17 - 26b5c: 000d883a mov r6,zero - 26b60: 01d00534 movhi r7,16404 - 26b64: 8009883a mov r4,r16 - 26b68: 002e4ec0 call 2e4ec <__muldf3> - 26b6c: 900d883a mov r6,r18 - 26b70: 980f883a mov r7,r19 - 26b74: 1009883a mov r4,r2 - 26b78: 180b883a mov r5,r3 - 26b7c: 002e31c0 call 2e31c <__gedf2> - 26b80: 002b883a mov r21,zero - 26b84: 0023883a mov r17,zero - 26b88: 1000bf16 blt r2,zero,26e88 <_dtoa_r+0x1060> - 26b8c: d9802217 ldw r6,136(sp) - 26b90: ddc00717 ldw r23,28(sp) - 26b94: 018c303a nor r6,zero,r6 - 26b98: d9800515 stw r6,20(sp) - 26b9c: a80b883a mov r5,r21 - 26ba0: e009883a mov r4,fp - 26ba4: 0028c380 call 28c38 <_Bfree> - 26ba8: 883e4926 beq r17,zero,264d0 <_dtoa_r+0x6a8> - 26bac: 003fad06 br 26a64 <_dtoa_r+0xc3c> - 26bb0: d9c01117 ldw r7,68(sp) - 26bb4: 3801bc26 beq r7,zero,272a8 <_dtoa_r+0x1480> - 26bb8: 10810cc4 addi r2,r2,1075 - 26bbc: dd400a17 ldw r21,40(sp) - 26bc0: dd000817 ldw r20,32(sp) - 26bc4: 003f0a06 br 267f0 <_dtoa_r+0x9c8> - 26bc8: 00800704 movi r2,28 - 26bcc: d9000817 ldw r4,32(sp) - 26bd0: a0a9883a add r20,r20,r2 - 26bd4: b0ad883a add r22,r22,r2 - 26bd8: 2089883a add r4,r4,r2 - 26bdc: d9000815 stw r4,32(sp) - 26be0: 003f5106 br 26928 <_dtoa_r+0xb00> - 26be4: d8c00317 ldw r3,12(sp) - 26be8: b8c1fc0e bge r23,r3,273dc <_dtoa_r+0x15b4> - 26bec: 0027883a mov r19,zero - 26bf0: b805883a mov r2,r23 - 26bf4: 003f3e06 br 268f0 <_dtoa_r+0xac8> - 26bf8: 880b883a mov r5,r17 - 26bfc: e009883a mov r4,fp - 26c00: 000f883a mov r7,zero - 26c04: 01800284 movi r6,10 - 26c08: 0028c600 call 28c60 <__multadd> - 26c0c: d9000c17 ldw r4,48(sp) - 26c10: 1023883a mov r17,r2 - 26c14: 0102040e bge zero,r4,27428 <_dtoa_r+0x1600> - 26c18: d9000615 stw r4,24(sp) - 26c1c: 0500050e bge zero,r20,26c34 <_dtoa_r+0xe0c> - 26c20: 880b883a mov r5,r17 - 26c24: a00d883a mov r6,r20 - 26c28: e009883a mov r4,fp - 26c2c: 00293100 call 29310 <__lshift> - 26c30: 1023883a mov r17,r2 - 26c34: 9801241e bne r19,zero,270c8 <_dtoa_r+0x12a0> - 26c38: 8829883a mov r20,r17 - 26c3c: d9000617 ldw r4,24(sp) - 26c40: dcc00717 ldw r19,28(sp) - 26c44: 9480004c andi r18,r18,1 - 26c48: 20bfffc4 addi r2,r4,-1 - 26c4c: 9885883a add r2,r19,r2 - 26c50: d8800415 stw r2,16(sp) - 26c54: dc800615 stw r18,24(sp) - 26c58: a80b883a mov r5,r21 - 26c5c: 8009883a mov r4,r16 - 26c60: 0025c280 call 25c28 - 26c64: 880b883a mov r5,r17 - 26c68: 8009883a mov r4,r16 - 26c6c: 102f883a mov r23,r2 - 26c70: 00294580 call 29458 <__mcmp> - 26c74: a80b883a mov r5,r21 - 26c78: a00d883a mov r6,r20 - 26c7c: e009883a mov r4,fp - 26c80: 102d883a mov r22,r2 - 26c84: 00294b80 call 294b8 <__mdiff> - 26c88: 1007883a mov r3,r2 - 26c8c: 10800317 ldw r2,12(r2) - 26c90: bc800c04 addi r18,r23,48 - 26c94: 180b883a mov r5,r3 - 26c98: 10004e1e bne r2,zero,26dd4 <_dtoa_r+0xfac> - 26c9c: 8009883a mov r4,r16 - 26ca0: d8c01615 stw r3,88(sp) - 26ca4: 00294580 call 29458 <__mcmp> - 26ca8: d8c01617 ldw r3,88(sp) - 26cac: e009883a mov r4,fp - 26cb0: d8801615 stw r2,88(sp) - 26cb4: 180b883a mov r5,r3 - 26cb8: 0028c380 call 28c38 <_Bfree> - 26cbc: d8801617 ldw r2,88(sp) - 26cc0: 1000041e bne r2,zero,26cd4 <_dtoa_r+0xeac> - 26cc4: d9800317 ldw r6,12(sp) - 26cc8: 3000021e bne r6,zero,26cd4 <_dtoa_r+0xeac> - 26ccc: d8c00617 ldw r3,24(sp) - 26cd0: 18003726 beq r3,zero,26db0 <_dtoa_r+0xf88> - 26cd4: b0002016 blt r22,zero,26d58 <_dtoa_r+0xf30> - 26cd8: b000041e bne r22,zero,26cec <_dtoa_r+0xec4> - 26cdc: d9000317 ldw r4,12(sp) - 26ce0: 2000021e bne r4,zero,26cec <_dtoa_r+0xec4> - 26ce4: d8c00617 ldw r3,24(sp) - 26ce8: 18001b26 beq r3,zero,26d58 <_dtoa_r+0xf30> - 26cec: 00810716 blt zero,r2,2710c <_dtoa_r+0x12e4> - 26cf0: d8c00417 ldw r3,16(sp) - 26cf4: 9d800044 addi r22,r19,1 - 26cf8: 9c800005 stb r18,0(r19) - 26cfc: b02f883a mov r23,r22 - 26d00: 98c10626 beq r19,r3,2711c <_dtoa_r+0x12f4> - 26d04: 800b883a mov r5,r16 - 26d08: 000f883a mov r7,zero - 26d0c: 01800284 movi r6,10 - 26d10: e009883a mov r4,fp - 26d14: 0028c600 call 28c60 <__multadd> - 26d18: 1021883a mov r16,r2 - 26d1c: 000f883a mov r7,zero - 26d20: 01800284 movi r6,10 - 26d24: 880b883a mov r5,r17 - 26d28: e009883a mov r4,fp - 26d2c: 8d002526 beq r17,r20,26dc4 <_dtoa_r+0xf9c> - 26d30: 0028c600 call 28c60 <__multadd> - 26d34: a00b883a mov r5,r20 - 26d38: 000f883a mov r7,zero - 26d3c: 01800284 movi r6,10 - 26d40: e009883a mov r4,fp - 26d44: 1023883a mov r17,r2 - 26d48: 0028c600 call 28c60 <__multadd> - 26d4c: 1029883a mov r20,r2 - 26d50: b027883a mov r19,r22 - 26d54: 003fc006 br 26c58 <_dtoa_r+0xe30> - 26d58: 9011883a mov r8,r18 - 26d5c: 00800e0e bge zero,r2,26d98 <_dtoa_r+0xf70> - 26d60: 800b883a mov r5,r16 - 26d64: 01800044 movi r6,1 - 26d68: e009883a mov r4,fp - 26d6c: da001715 stw r8,92(sp) - 26d70: 00293100 call 29310 <__lshift> - 26d74: a80b883a mov r5,r21 - 26d78: 1009883a mov r4,r2 - 26d7c: 1021883a mov r16,r2 - 26d80: 00294580 call 29458 <__mcmp> - 26d84: da001717 ldw r8,92(sp) - 26d88: 0081960e bge zero,r2,273e4 <_dtoa_r+0x15bc> - 26d8c: 00800e44 movi r2,57 - 26d90: 40817026 beq r8,r2,27354 <_dtoa_r+0x152c> - 26d94: ba000c44 addi r8,r23,49 - 26d98: 8825883a mov r18,r17 - 26d9c: 9dc00044 addi r23,r19,1 - 26da0: 9a000005 stb r8,0(r19) - 26da4: a023883a mov r17,r20 - 26da8: dc000915 stw r16,36(sp) - 26dac: 003f2406 br 26a40 <_dtoa_r+0xc18> - 26db0: 00800e44 movi r2,57 - 26db4: 9011883a mov r8,r18 - 26db8: 90816626 beq r18,r2,27354 <_dtoa_r+0x152c> - 26dbc: 05bff516 blt zero,r22,26d94 <_dtoa_r+0xf6c> - 26dc0: 003ff506 br 26d98 <_dtoa_r+0xf70> - 26dc4: 0028c600 call 28c60 <__multadd> - 26dc8: 1023883a mov r17,r2 - 26dcc: 1029883a mov r20,r2 - 26dd0: 003fdf06 br 26d50 <_dtoa_r+0xf28> - 26dd4: e009883a mov r4,fp - 26dd8: 0028c380 call 28c38 <_Bfree> - 26ddc: 00800044 movi r2,1 - 26de0: 003fbc06 br 26cd4 <_dtoa_r+0xeac> - 26de4: a80b883a mov r5,r21 - 26de8: 8009883a mov r4,r16 - 26dec: 00294580 call 29458 <__mcmp> - 26df0: 103edb0e bge r2,zero,26960 <_dtoa_r+0xb38> - 26df4: 800b883a mov r5,r16 - 26df8: 000f883a mov r7,zero - 26dfc: 01800284 movi r6,10 - 26e00: e009883a mov r4,fp - 26e04: 0028c600 call 28c60 <__multadd> - 26e08: 1021883a mov r16,r2 - 26e0c: d8800517 ldw r2,20(sp) - 26e10: d8c00b17 ldw r3,44(sp) - 26e14: 10bfffc4 addi r2,r2,-1 - 26e18: d8800515 stw r2,20(sp) - 26e1c: 183f761e bne r3,zero,26bf8 <_dtoa_r+0xdd0> - 26e20: d9000c17 ldw r4,48(sp) - 26e24: 0101730e bge zero,r4,273f4 <_dtoa_r+0x15cc> - 26e28: d9000615 stw r4,24(sp) - 26e2c: 003ed006 br 26970 <_dtoa_r+0xb48> - 26e30: 00800084 movi r2,2 - 26e34: 3081861e bne r6,r2,27450 <_dtoa_r+0x1628> - 26e38: d8000b15 stw zero,44(sp) - 26e3c: 003f3c06 br 26b30 <_dtoa_r+0xd08> - 26e40: dc000917 ldw r16,36(sp) - 26e44: 003e9206 br 26890 <_dtoa_r+0xa68> - 26e48: d9c00317 ldw r7,12(sp) - 26e4c: 00800084 movi r2,2 - 26e50: 11fec50e bge r2,r7,26968 <_dtoa_r+0xb40> - 26e54: d9000617 ldw r4,24(sp) - 26e58: 20013c1e bne r4,zero,2734c <_dtoa_r+0x1524> - 26e5c: a80b883a mov r5,r21 - 26e60: 000f883a mov r7,zero - 26e64: 01800144 movi r6,5 - 26e68: e009883a mov r4,fp - 26e6c: 0028c600 call 28c60 <__multadd> - 26e70: 100b883a mov r5,r2 - 26e74: 8009883a mov r4,r16 - 26e78: 102b883a mov r21,r2 - 26e7c: 00294580 call 29458 <__mcmp> - 26e80: dc000915 stw r16,36(sp) - 26e84: 00bf410e bge zero,r2,26b8c <_dtoa_r+0xd64> - 26e88: d9c00717 ldw r7,28(sp) - 26e8c: 00800c44 movi r2,49 - 26e90: 38800005 stb r2,0(r7) - 26e94: d8800517 ldw r2,20(sp) - 26e98: 3dc00044 addi r23,r7,1 - 26e9c: 10800044 addi r2,r2,1 - 26ea0: d8800515 stw r2,20(sp) - 26ea4: 003f3d06 br 26b9c <_dtoa_r+0xd74> - 26ea8: d9800517 ldw r6,20(sp) - 26eac: d9c00717 ldw r7,28(sp) - 26eb0: 00800c44 movi r2,49 - 26eb4: 31800044 addi r6,r6,1 - 26eb8: d9800515 stw r6,20(sp) - 26ebc: 38800005 stb r2,0(r7) - 26ec0: 003edf06 br 26a40 <_dtoa_r+0xc18> - 26ec4: d8000b15 stw zero,44(sp) - 26ec8: 003c9f06 br 26148 <_dtoa_r+0x320> - 26ecc: 903e7e1e bne r18,zero,268c8 <_dtoa_r+0xaa0> - 26ed0: 00800434 movhi r2,16 - 26ed4: 10bfffc4 addi r2,r2,-1 - 26ed8: 9884703a and r2,r19,r2 - 26edc: 1000ea1e bne r2,zero,27288 <_dtoa_r+0x1460> - 26ee0: 9cdffc2c andhi r19,r19,32752 - 26ee4: 9800e826 beq r19,zero,27288 <_dtoa_r+0x1460> - 26ee8: d9c00817 ldw r7,32(sp) - 26eec: b5800044 addi r22,r22,1 - 26ef0: 04c00044 movi r19,1 - 26ef4: 39c00044 addi r7,r7,1 - 26ef8: d9c00815 stw r7,32(sp) - 26efc: d8800d17 ldw r2,52(sp) - 26f00: 103e721e bne r2,zero,268cc <_dtoa_r+0xaa4> - 26f04: 00800044 movi r2,1 - 26f08: 003e7906 br 268f0 <_dtoa_r+0xac8> - 26f0c: 8009883a mov r4,r16 - 26f10: 002f5800 call 2f580 <__floatsidf> - 26f14: d9800f17 ldw r6,60(sp) - 26f18: d9c01017 ldw r7,64(sp) - 26f1c: 1009883a mov r4,r2 - 26f20: 180b883a mov r5,r3 - 26f24: 002e4ec0 call 2e4ec <__muldf3> - 26f28: 000d883a mov r6,zero - 26f2c: 01d00734 movhi r7,16412 - 26f30: 1009883a mov r4,r2 - 26f34: 180b883a mov r5,r3 - 26f38: 002d1000 call 2d100 <__adddf3> - 26f3c: 047f3034 movhi r17,64704 - 26f40: 1021883a mov r16,r2 - 26f44: 1c63883a add r17,r3,r17 - 26f48: d9000f17 ldw r4,60(sp) - 26f4c: d9401017 ldw r5,64(sp) - 26f50: 000d883a mov r6,zero - 26f54: 01d00534 movhi r7,16404 - 26f58: 002ec040 call 2ec04 <__subdf3> - 26f5c: 800d883a mov r6,r16 - 26f60: 880f883a mov r7,r17 - 26f64: 1009883a mov r4,r2 - 26f68: 180b883a mov r5,r3 - 26f6c: 102b883a mov r21,r2 - 26f70: 1829883a mov r20,r3 - 26f74: 002e31c0 call 2e31c <__gedf2> - 26f78: 00806c16 blt zero,r2,2712c <_dtoa_r+0x1304> - 26f7c: 89e0003c xorhi r7,r17,32768 - 26f80: 800d883a mov r6,r16 - 26f84: a809883a mov r4,r21 - 26f88: a00b883a mov r5,r20 - 26f8c: 002e3f80 call 2e3f8 <__ledf2> - 26f90: 103d7e0e bge r2,zero,2658c <_dtoa_r+0x764> - 26f94: 002b883a mov r21,zero - 26f98: 0023883a mov r17,zero - 26f9c: 003efb06 br 26b8c <_dtoa_r+0xd64> - 26fa0: d8800717 ldw r2,28(sp) - 26fa4: 003bd006 br 25ee8 <_dtoa_r+0xc0> - 26fa8: d9000a17 ldw r4,40(sp) - 26fac: d9800d17 ldw r6,52(sp) - 26fb0: dd400a15 stw r21,40(sp) - 26fb4: a905c83a sub r2,r21,r4 - 26fb8: 308d883a add r6,r6,r2 - 26fbc: d9800d15 stw r6,52(sp) - 26fc0: 002b883a mov r21,zero - 26fc4: 003e0606 br 267e0 <_dtoa_r+0x9b8> - 26fc8: 9023883a mov r17,r18 - 26fcc: 9829883a mov r20,r19 - 26fd0: 04000084 movi r16,2 - 26fd4: 003c9206 br 26220 <_dtoa_r+0x3f8> - 26fd8: 04000044 movi r16,1 - 26fdc: dc000c15 stw r16,48(sp) - 26fe0: dc000615 stw r16,24(sp) - 26fe4: dc002215 stw r16,136(sp) - 26fe8: e0001115 stw zero,68(fp) - 26fec: 000b883a mov r5,zero - 26ff0: 003c6906 br 26198 <_dtoa_r+0x370> - 26ff4: 3021883a mov r16,r6 - 26ff8: 003ffb06 br 26fe8 <_dtoa_r+0x11c0> - 26ffc: 1000021e bne r2,zero,27008 <_dtoa_r+0x11e0> - 27000: 4200004c andi r8,r8,1 - 27004: 403e7d1e bne r8,zero,269fc <_dtoa_r+0xbd4> - 27008: 01000c04 movi r4,48 - 2700c: 00000106 br 27014 <_dtoa_r+0x11ec> - 27010: 102f883a mov r23,r2 - 27014: b8bfffc4 addi r2,r23,-1 - 27018: 10c00007 ldb r3,0(r2) - 2701c: 193ffc26 beq r3,r4,27010 <_dtoa_r+0x11e8> - 27020: 003e8706 br 26a40 <_dtoa_r+0xc18> - 27024: d8800517 ldw r2,20(sp) - 27028: 00a3c83a sub r17,zero,r2 - 2702c: 8800a426 beq r17,zero,272c0 <_dtoa_r+0x1498> - 27030: 888003cc andi r2,r17,15 - 27034: 100490fa slli r2,r2,3 - 27038: 00c000f4 movhi r3,3 - 2703c: 18ca8104 addi r3,r3,10756 - 27040: 1885883a add r2,r3,r2 - 27044: 11800017 ldw r6,0(r2) - 27048: 11c00117 ldw r7,4(r2) - 2704c: 9009883a mov r4,r18 - 27050: 980b883a mov r5,r19 - 27054: 8823d13a srai r17,r17,4 - 27058: 002e4ec0 call 2e4ec <__muldf3> - 2705c: d8800f15 stw r2,60(sp) - 27060: d8c01015 stw r3,64(sp) - 27064: 8800e826 beq r17,zero,27408 <_dtoa_r+0x15e0> - 27068: 050000f4 movhi r20,3 - 2706c: a50a7704 addi r20,r20,10716 - 27070: 04000084 movi r16,2 - 27074: 8980004c andi r6,r17,1 - 27078: 1009883a mov r4,r2 - 2707c: 8823d07a srai r17,r17,1 - 27080: 180b883a mov r5,r3 - 27084: 30000426 beq r6,zero,27098 <_dtoa_r+0x1270> - 27088: a1800017 ldw r6,0(r20) - 2708c: a1c00117 ldw r7,4(r20) - 27090: 84000044 addi r16,r16,1 - 27094: 002e4ec0 call 2e4ec <__muldf3> - 27098: a5000204 addi r20,r20,8 - 2709c: 883ff51e bne r17,zero,27074 <_dtoa_r+0x124c> - 270a0: d8800f15 stw r2,60(sp) - 270a4: d8c01015 stw r3,64(sp) - 270a8: 003c7606 br 26284 <_dtoa_r+0x45c> - 270ac: 00c00c04 movi r3,48 - 270b0: 10c00005 stb r3,0(r2) - 270b4: d8c00517 ldw r3,20(sp) - 270b8: bd3fffc3 ldbu r20,-1(r23) - 270bc: 18c00044 addi r3,r3,1 - 270c0: d8c00515 stw r3,20(sp) - 270c4: 003db906 br 267ac <_dtoa_r+0x984> - 270c8: 89400117 ldw r5,4(r17) - 270cc: e009883a mov r4,fp - 270d0: 0028b900 call 28b90 <_Balloc> - 270d4: 89800417 ldw r6,16(r17) - 270d8: 89400304 addi r5,r17,12 - 270dc: 11000304 addi r4,r2,12 - 270e0: 31800084 addi r6,r6,2 - 270e4: 318d883a add r6,r6,r6 - 270e8: 318d883a add r6,r6,r6 - 270ec: 1027883a mov r19,r2 - 270f0: 00288ec0 call 288ec - 270f4: 01800044 movi r6,1 - 270f8: 980b883a mov r5,r19 - 270fc: e009883a mov r4,fp - 27100: 00293100 call 29310 <__lshift> - 27104: 1029883a mov r20,r2 - 27108: 003ecc06 br 26c3c <_dtoa_r+0xe14> - 2710c: 00800e44 movi r2,57 - 27110: 90809026 beq r18,r2,27354 <_dtoa_r+0x152c> - 27114: 92000044 addi r8,r18,1 - 27118: 003f1f06 br 26d98 <_dtoa_r+0xf70> - 2711c: 9011883a mov r8,r18 - 27120: 8825883a mov r18,r17 - 27124: a023883a mov r17,r20 - 27128: 003e2906 br 269d0 <_dtoa_r+0xba8> - 2712c: 002b883a mov r21,zero - 27130: 0023883a mov r17,zero - 27134: 003f5406 br 26e88 <_dtoa_r+0x1060> - 27138: 61bfffc4 addi r6,r12,-1 - 2713c: 300490fa slli r2,r6,3 - 27140: 00c000f4 movhi r3,3 - 27144: 18ca8104 addi r3,r3,10756 - 27148: 1885883a add r2,r3,r2 - 2714c: 11000017 ldw r4,0(r2) - 27150: 11400117 ldw r5,4(r2) - 27154: d8800717 ldw r2,28(sp) - 27158: 880f883a mov r7,r17 - 2715c: d9801215 stw r6,72(sp) - 27160: 800d883a mov r6,r16 - 27164: db001615 stw r12,88(sp) - 27168: 15c00044 addi r23,r2,1 - 2716c: 002e4ec0 call 2e4ec <__muldf3> - 27170: d9401017 ldw r5,64(sp) - 27174: d9000f17 ldw r4,60(sp) - 27178: d8c01515 stw r3,84(sp) - 2717c: d8801415 stw r2,80(sp) - 27180: 002f5000 call 2f500 <__fixdfsi> - 27184: 1009883a mov r4,r2 - 27188: 1021883a mov r16,r2 - 2718c: 002f5800 call 2f580 <__floatsidf> - 27190: d9000f17 ldw r4,60(sp) - 27194: d9401017 ldw r5,64(sp) - 27198: 100d883a mov r6,r2 - 2719c: 180f883a mov r7,r3 - 271a0: 002ec040 call 2ec04 <__subdf3> - 271a4: 1829883a mov r20,r3 - 271a8: d8c00717 ldw r3,28(sp) - 271ac: 84000c04 addi r16,r16,48 - 271b0: 1023883a mov r17,r2 - 271b4: 1c000005 stb r16,0(r3) - 271b8: db001617 ldw r12,88(sp) - 271bc: 00800044 movi r2,1 - 271c0: 60802226 beq r12,r2,2724c <_dtoa_r+0x1424> - 271c4: d9c00717 ldw r7,28(sp) - 271c8: 8805883a mov r2,r17 - 271cc: b82b883a mov r21,r23 - 271d0: 3b19883a add r12,r7,r12 - 271d4: 6023883a mov r17,r12 - 271d8: a007883a mov r3,r20 - 271dc: dc800f15 stw r18,60(sp) - 271e0: 000d883a mov r6,zero - 271e4: 01d00934 movhi r7,16420 - 271e8: 1009883a mov r4,r2 - 271ec: 180b883a mov r5,r3 - 271f0: 002e4ec0 call 2e4ec <__muldf3> - 271f4: 180b883a mov r5,r3 - 271f8: 1009883a mov r4,r2 - 271fc: 1829883a mov r20,r3 - 27200: 1025883a mov r18,r2 - 27204: 002f5000 call 2f500 <__fixdfsi> - 27208: 1009883a mov r4,r2 - 2720c: 1021883a mov r16,r2 - 27210: 002f5800 call 2f580 <__floatsidf> - 27214: 100d883a mov r6,r2 - 27218: 180f883a mov r7,r3 - 2721c: 9009883a mov r4,r18 - 27220: a00b883a mov r5,r20 - 27224: 84000c04 addi r16,r16,48 - 27228: 002ec040 call 2ec04 <__subdf3> - 2722c: ad400044 addi r21,r21,1 - 27230: ac3fffc5 stb r16,-1(r21) - 27234: ac7fea1e bne r21,r17,271e0 <_dtoa_r+0x13b8> - 27238: 1023883a mov r17,r2 - 2723c: d8801217 ldw r2,72(sp) - 27240: dc800f17 ldw r18,60(sp) - 27244: 1829883a mov r20,r3 - 27248: b8af883a add r23,r23,r2 - 2724c: d9001417 ldw r4,80(sp) - 27250: d9401517 ldw r5,84(sp) - 27254: 000d883a mov r6,zero - 27258: 01cff834 movhi r7,16352 - 2725c: 002d1000 call 2d100 <__adddf3> - 27260: 880d883a mov r6,r17 - 27264: a00f883a mov r7,r20 - 27268: 1009883a mov r4,r2 - 2726c: 180b883a mov r5,r3 - 27270: 002e3f80 call 2e3f8 <__ledf2> - 27274: 10003e0e bge r2,zero,27370 <_dtoa_r+0x1548> - 27278: d9001317 ldw r4,76(sp) - 2727c: bd3fffc3 ldbu r20,-1(r23) - 27280: d9000515 stw r4,20(sp) - 27284: 003d3b06 br 26774 <_dtoa_r+0x94c> - 27288: 0027883a mov r19,zero - 2728c: 003f1b06 br 26efc <_dtoa_r+0x10d4> - 27290: d8800817 ldw r2,32(sp) - 27294: 11e9c83a sub r20,r2,r7 - 27298: 0005883a mov r2,zero - 2729c: 003d5406 br 267f0 <_dtoa_r+0x9c8> - 272a0: 00800044 movi r2,1 - 272a4: 003dc706 br 269c4 <_dtoa_r+0xb9c> - 272a8: d8c00217 ldw r3,8(sp) - 272ac: 00800d84 movi r2,54 - 272b0: dd400a17 ldw r21,40(sp) - 272b4: 10c5c83a sub r2,r2,r3 - 272b8: dd000817 ldw r20,32(sp) - 272bc: 003d4c06 br 267f0 <_dtoa_r+0x9c8> - 272c0: dc800f15 stw r18,60(sp) - 272c4: dcc01015 stw r19,64(sp) - 272c8: 04000084 movi r16,2 - 272cc: 003bed06 br 26284 <_dtoa_r+0x45c> - 272d0: d9000617 ldw r4,24(sp) - 272d4: 203f0d26 beq r4,zero,26f0c <_dtoa_r+0x10e4> - 272d8: d9800c17 ldw r6,48(sp) - 272dc: 01bcab0e bge zero,r6,2658c <_dtoa_r+0x764> - 272e0: d9401017 ldw r5,64(sp) - 272e4: d9000f17 ldw r4,60(sp) - 272e8: 000d883a mov r6,zero - 272ec: 01d00934 movhi r7,16420 - 272f0: 002e4ec0 call 2e4ec <__muldf3> - 272f4: 81000044 addi r4,r16,1 - 272f8: d8800f15 stw r2,60(sp) - 272fc: d8c01015 stw r3,64(sp) - 27300: 002f5800 call 2f580 <__floatsidf> - 27304: d9800f17 ldw r6,60(sp) - 27308: d9c01017 ldw r7,64(sp) - 2730c: 1009883a mov r4,r2 - 27310: 180b883a mov r5,r3 - 27314: 002e4ec0 call 2e4ec <__muldf3> - 27318: 01d00734 movhi r7,16412 - 2731c: 000d883a mov r6,zero - 27320: 1009883a mov r4,r2 - 27324: 180b883a mov r5,r3 - 27328: 002d1000 call 2d100 <__adddf3> - 2732c: d9c00517 ldw r7,20(sp) - 27330: 047f3034 movhi r17,64704 - 27334: 1021883a mov r16,r2 - 27338: 39ffffc4 addi r7,r7,-1 - 2733c: d9c01315 stw r7,76(sp) - 27340: 1c63883a add r17,r3,r17 - 27344: db000c17 ldw r12,48(sp) - 27348: 003bea06 br 262f4 <_dtoa_r+0x4cc> - 2734c: dc000915 stw r16,36(sp) - 27350: 003e0e06 br 26b8c <_dtoa_r+0xd64> - 27354: 01000e44 movi r4,57 - 27358: 8825883a mov r18,r17 - 2735c: 9dc00044 addi r23,r19,1 - 27360: 99000005 stb r4,0(r19) - 27364: a023883a mov r17,r20 - 27368: dc000915 stw r16,36(sp) - 2736c: 003da406 br 26a00 <_dtoa_r+0xbd8> - 27370: d9801417 ldw r6,80(sp) - 27374: d9c01517 ldw r7,84(sp) - 27378: 0009883a mov r4,zero - 2737c: 014ff834 movhi r5,16352 - 27380: 002ec040 call 2ec04 <__subdf3> - 27384: 880d883a mov r6,r17 - 27388: a00f883a mov r7,r20 - 2738c: 1009883a mov r4,r2 - 27390: 180b883a mov r5,r3 - 27394: 002e31c0 call 2e31c <__gedf2> - 27398: 00bc7c0e bge zero,r2,2658c <_dtoa_r+0x764> - 2739c: 01000c04 movi r4,48 - 273a0: 00000106 br 273a8 <_dtoa_r+0x1580> - 273a4: 102f883a mov r23,r2 - 273a8: b8bfffc4 addi r2,r23,-1 - 273ac: 10c00007 ldb r3,0(r2) - 273b0: 193ffc26 beq r3,r4,273a4 <_dtoa_r+0x157c> - 273b4: d9801317 ldw r6,76(sp) - 273b8: d9800515 stw r6,20(sp) - 273bc: 003c4406 br 264d0 <_dtoa_r+0x6a8> - 273c0: d9801317 ldw r6,76(sp) - 273c4: d9800515 stw r6,20(sp) - 273c8: 003cea06 br 26774 <_dtoa_r+0x94c> - 273cc: dd800f17 ldw r22,60(sp) - 273d0: dcc01017 ldw r19,64(sp) - 273d4: dc801217 ldw r18,72(sp) - 273d8: 003c6c06 br 2658c <_dtoa_r+0x764> - 273dc: 903e031e bne r18,zero,26bec <_dtoa_r+0xdc4> - 273e0: 003ebb06 br 26ed0 <_dtoa_r+0x10a8> - 273e4: 103e6c1e bne r2,zero,26d98 <_dtoa_r+0xf70> - 273e8: 4080004c andi r2,r8,1 - 273ec: 103e6a26 beq r2,zero,26d98 <_dtoa_r+0xf70> - 273f0: 003e6606 br 26d8c <_dtoa_r+0xf64> - 273f4: d8c00317 ldw r3,12(sp) - 273f8: 00800084 movi r2,2 - 273fc: 10c02916 blt r2,r3,274a4 <_dtoa_r+0x167c> - 27400: d9000c17 ldw r4,48(sp) - 27404: 003e8806 br 26e28 <_dtoa_r+0x1000> - 27408: 04000084 movi r16,2 - 2740c: 003b9d06 br 26284 <_dtoa_r+0x45c> - 27410: d9001317 ldw r4,76(sp) - 27414: d9000515 stw r4,20(sp) - 27418: 003cd606 br 26774 <_dtoa_r+0x94c> - 2741c: d8801317 ldw r2,76(sp) - 27420: d8800515 stw r2,20(sp) - 27424: 003c2a06 br 264d0 <_dtoa_r+0x6a8> - 27428: d9800317 ldw r6,12(sp) - 2742c: 00800084 movi r2,2 - 27430: 11801516 blt r2,r6,27488 <_dtoa_r+0x1660> - 27434: d9c00c17 ldw r7,48(sp) - 27438: d9c00615 stw r7,24(sp) - 2743c: 003df706 br 26c1c <_dtoa_r+0xdf4> - 27440: 193d3926 beq r3,r4,26928 <_dtoa_r+0xb00> - 27444: 00c00f04 movi r3,60 - 27448: 1885c83a sub r2,r3,r2 - 2744c: 003ddf06 br 26bcc <_dtoa_r+0xda4> - 27450: e009883a mov r4,fp - 27454: e0001115 stw zero,68(fp) - 27458: 000b883a mov r5,zero - 2745c: 0028b900 call 28b90 <_Balloc> - 27460: d8800715 stw r2,28(sp) - 27464: d8c00717 ldw r3,28(sp) - 27468: 00bfffc4 movi r2,-1 - 2746c: 01000044 movi r4,1 - 27470: d8800c15 stw r2,48(sp) - 27474: e0c01015 stw r3,64(fp) - 27478: d9000b15 stw r4,44(sp) - 2747c: d8800615 stw r2,24(sp) - 27480: d8002215 stw zero,136(sp) - 27484: 003c4106 br 2658c <_dtoa_r+0x764> - 27488: d8c00c17 ldw r3,48(sp) - 2748c: d8c00615 stw r3,24(sp) - 27490: 003e7006 br 26e54 <_dtoa_r+0x102c> - 27494: 04400044 movi r17,1 - 27498: 003b2006 br 2611c <_dtoa_r+0x2f4> - 2749c: 000b883a mov r5,zero - 274a0: 003b3d06 br 26198 <_dtoa_r+0x370> - 274a4: d8800c17 ldw r2,48(sp) - 274a8: d8800615 stw r2,24(sp) - 274ac: 003e6906 br 26e54 <_dtoa_r+0x102c> + 2607c: 01d00934 movhi r7,16420 + 26080: 002dd380 call 2dd38 <__muldf3> + 26084: 000d883a mov r6,zero + 26088: 000f883a mov r7,zero + 2608c: 1009883a mov r4,r2 + 26090: 180b883a mov r5,r3 + 26094: 1025883a mov r18,r2 + 26098: 1827883a mov r19,r3 + 2609c: 002dae00 call 2dae0 <__eqdf2> + 260a0: 103f9a26 beq r2,zero,25f0c <_gp+0xfffe99d4> + 260a4: d9c00617 ldw r7,24(sp) + 260a8: d8c00717 ldw r3,28(sp) + 260ac: b829883a mov r20,r23 + 260b0: 38bfffc4 addi r2,r7,-1 + 260b4: 18ad883a add r22,r3,r2 + 260b8: 00000a06 br 260e4 <_dtoa_r+0x880> + 260bc: 002dd380 call 2dd38 <__muldf3> + 260c0: 000d883a mov r6,zero + 260c4: 000f883a mov r7,zero + 260c8: 1009883a mov r4,r2 + 260cc: 180b883a mov r5,r3 + 260d0: 1025883a mov r18,r2 + 260d4: 1827883a mov r19,r3 + 260d8: b829883a mov r20,r23 + 260dc: 002dae00 call 2dae0 <__eqdf2> + 260e0: 103f8a26 beq r2,zero,25f0c <_gp+0xfffe99d4> + 260e4: 800d883a mov r6,r16 + 260e8: 880f883a mov r7,r17 + 260ec: 9009883a mov r4,r18 + 260f0: 980b883a mov r5,r19 + 260f4: 002d1f80 call 2d1f8 <__divdf3> + 260f8: 180b883a mov r5,r3 + 260fc: 1009883a mov r4,r2 + 26100: 002ed4c0 call 2ed4c <__fixdfsi> + 26104: 1009883a mov r4,r2 + 26108: 102b883a mov r21,r2 + 2610c: 002edcc0 call 2edcc <__floatsidf> + 26110: 800d883a mov r6,r16 + 26114: 880f883a mov r7,r17 + 26118: 1009883a mov r4,r2 + 2611c: 180b883a mov r5,r3 + 26120: 002dd380 call 2dd38 <__muldf3> + 26124: 100d883a mov r6,r2 + 26128: 180f883a mov r7,r3 + 2612c: 9009883a mov r4,r18 + 26130: 980b883a mov r5,r19 + 26134: 002e4500 call 2e450 <__subdf3> + 26138: aa000c04 addi r8,r21,48 + 2613c: a2000005 stb r8,0(r20) + 26140: 000d883a mov r6,zero + 26144: 01d00934 movhi r7,16420 + 26148: 1009883a mov r4,r2 + 2614c: 180b883a mov r5,r3 + 26150: a5c00044 addi r23,r20,1 + 26154: b53fd91e bne r22,r20,260bc <_gp+0xfffe9b84> + 26158: 100d883a mov r6,r2 + 2615c: 180f883a mov r7,r3 + 26160: 1009883a mov r4,r2 + 26164: 180b883a mov r5,r3 + 26168: 002c94c0 call 2c94c <__adddf3> + 2616c: 100d883a mov r6,r2 + 26170: 180f883a mov r7,r3 + 26174: 8009883a mov r4,r16 + 26178: 880b883a mov r5,r17 + 2617c: 1027883a mov r19,r2 + 26180: 1825883a mov r18,r3 + 26184: 002dc440 call 2dc44 <__ledf2> + 26188: 10000816 blt r2,zero,261ac <_dtoa_r+0x948> + 2618c: 980d883a mov r6,r19 + 26190: 900f883a mov r7,r18 + 26194: 8009883a mov r4,r16 + 26198: 880b883a mov r5,r17 + 2619c: 002dae00 call 2dae0 <__eqdf2> + 261a0: 103f5a1e bne r2,zero,25f0c <_gp+0xfffe99d4> + 261a4: ad40004c andi r21,r21,1 + 261a8: a83f5826 beq r21,zero,25f0c <_gp+0xfffe99d4> + 261ac: bd3fffc3 ldbu r20,-1(r23) + 261b0: b8bfffc4 addi r2,r23,-1 + 261b4: 1007883a mov r3,r2 + 261b8: 01400e44 movi r5,57 + 261bc: d9800717 ldw r6,28(sp) + 261c0: 00000506 br 261d8 <_dtoa_r+0x974> + 261c4: 18ffffc4 addi r3,r3,-1 + 261c8: 11824726 beq r2,r6,26ae8 <_dtoa_r+0x1284> + 261cc: 1d000003 ldbu r20,0(r3) + 261d0: 102f883a mov r23,r2 + 261d4: 10bfffc4 addi r2,r2,-1 + 261d8: a1003fcc andi r4,r20,255 + 261dc: 2100201c xori r4,r4,128 + 261e0: 213fe004 addi r4,r4,-128 + 261e4: 217ff726 beq r4,r5,261c4 <_gp+0xfffe9c8c> + 261e8: a2000044 addi r8,r20,1 + 261ec: 12000005 stb r8,0(r2) + 261f0: 003f4606 br 25f0c <_gp+0xfffe99d4> + 261f4: d9000b17 ldw r4,44(sp) + 261f8: 2000c826 beq r4,zero,2651c <_dtoa_r+0xcb8> + 261fc: d9800317 ldw r6,12(sp) + 26200: 00c00044 movi r3,1 + 26204: 1980f90e bge r3,r6,265ec <_dtoa_r+0xd88> + 26208: d8800617 ldw r2,24(sp) + 2620c: d8c00a17 ldw r3,40(sp) + 26210: 157fffc4 addi r21,r2,-1 + 26214: 1d41f316 blt r3,r21,269e4 <_dtoa_r+0x1180> + 26218: 1d6bc83a sub r21,r3,r21 + 2621c: d9c00617 ldw r7,24(sp) + 26220: 3802aa16 blt r7,zero,26ccc <_dtoa_r+0x1468> + 26224: dd000817 ldw r20,32(sp) + 26228: d8800617 ldw r2,24(sp) + 2622c: d8c00817 ldw r3,32(sp) + 26230: 01400044 movi r5,1 + 26234: e009883a mov r4,fp + 26238: 1887883a add r3,r3,r2 + 2623c: d8c00815 stw r3,32(sp) + 26240: b0ad883a add r22,r22,r2 + 26244: 00289d80 call 289d8 <__i2b> + 26248: 1023883a mov r17,r2 + 2624c: a0000826 beq r20,zero,26270 <_dtoa_r+0xa0c> + 26250: 0580070e bge zero,r22,26270 <_dtoa_r+0xa0c> + 26254: a005883a mov r2,r20 + 26258: b500b916 blt r22,r20,26540 <_dtoa_r+0xcdc> + 2625c: d9000817 ldw r4,32(sp) + 26260: a0a9c83a sub r20,r20,r2 + 26264: b0adc83a sub r22,r22,r2 + 26268: 2089c83a sub r4,r4,r2 + 2626c: d9000815 stw r4,32(sp) + 26270: d9800a17 ldw r6,40(sp) + 26274: 0181810e bge zero,r6,2687c <_dtoa_r+0x1018> + 26278: d9c00b17 ldw r7,44(sp) + 2627c: 3800b326 beq r7,zero,2654c <_dtoa_r+0xce8> + 26280: a800b226 beq r21,zero,2654c <_dtoa_r+0xce8> + 26284: 880b883a mov r5,r17 + 26288: a80d883a mov r6,r21 + 2628c: e009883a mov r4,fp + 26290: 0028c0c0 call 28c0c <__pow5mult> + 26294: d9800917 ldw r6,36(sp) + 26298: 100b883a mov r5,r2 + 2629c: e009883a mov r4,fp + 262a0: 1023883a mov r17,r2 + 262a4: 0028a140 call 28a14 <__multiply> + 262a8: 1021883a mov r16,r2 + 262ac: d8800a17 ldw r2,40(sp) + 262b0: d9400917 ldw r5,36(sp) + 262b4: e009883a mov r4,fp + 262b8: 1545c83a sub r2,r2,r21 + 262bc: d8800a15 stw r2,40(sp) + 262c0: 00286740 call 28674 <_Bfree> + 262c4: d8c00a17 ldw r3,40(sp) + 262c8: 18009f1e bne r3,zero,26548 <_dtoa_r+0xce4> + 262cc: 05c00044 movi r23,1 + 262d0: e009883a mov r4,fp + 262d4: b80b883a mov r5,r23 + 262d8: 00289d80 call 289d8 <__i2b> + 262dc: d9000d17 ldw r4,52(sp) + 262e0: 102b883a mov r21,r2 + 262e4: 2000ce26 beq r4,zero,26620 <_dtoa_r+0xdbc> + 262e8: 200d883a mov r6,r4 + 262ec: 100b883a mov r5,r2 + 262f0: e009883a mov r4,fp + 262f4: 0028c0c0 call 28c0c <__pow5mult> + 262f8: d9800317 ldw r6,12(sp) + 262fc: 102b883a mov r21,r2 + 26300: b981810e bge r23,r6,26908 <_dtoa_r+0x10a4> + 26304: 0027883a mov r19,zero + 26308: a8800417 ldw r2,16(r21) + 2630c: 05c00804 movi r23,32 + 26310: 10800104 addi r2,r2,4 + 26314: 1085883a add r2,r2,r2 + 26318: 1085883a add r2,r2,r2 + 2631c: a885883a add r2,r21,r2 + 26320: 11000017 ldw r4,0(r2) + 26324: 00288c00 call 288c0 <__hi0bits> + 26328: b885c83a sub r2,r23,r2 + 2632c: 1585883a add r2,r2,r22 + 26330: 108007cc andi r2,r2,31 + 26334: 1000b326 beq r2,zero,26604 <_dtoa_r+0xda0> + 26338: 00c00804 movi r3,32 + 2633c: 1887c83a sub r3,r3,r2 + 26340: 01000104 movi r4,4 + 26344: 20c2cd0e bge r4,r3,26e7c <_dtoa_r+0x1618> + 26348: 00c00704 movi r3,28 + 2634c: 1885c83a sub r2,r3,r2 + 26350: d8c00817 ldw r3,32(sp) + 26354: a0a9883a add r20,r20,r2 + 26358: b0ad883a add r22,r22,r2 + 2635c: 1887883a add r3,r3,r2 + 26360: d8c00815 stw r3,32(sp) + 26364: d9800817 ldw r6,32(sp) + 26368: 0180040e bge zero,r6,2637c <_dtoa_r+0xb18> + 2636c: 800b883a mov r5,r16 + 26370: e009883a mov r4,fp + 26374: 0028d4c0 call 28d4c <__lshift> + 26378: 1021883a mov r16,r2 + 2637c: 0580050e bge zero,r22,26394 <_dtoa_r+0xb30> + 26380: a80b883a mov r5,r21 + 26384: b00d883a mov r6,r22 + 26388: e009883a mov r4,fp + 2638c: 0028d4c0 call 28d4c <__lshift> + 26390: 102b883a mov r21,r2 + 26394: d9c00e17 ldw r7,56(sp) + 26398: 3801211e bne r7,zero,26820 <_dtoa_r+0xfbc> + 2639c: d9800617 ldw r6,24(sp) + 263a0: 0181380e bge zero,r6,26884 <_dtoa_r+0x1020> + 263a4: d8c00b17 ldw r3,44(sp) + 263a8: 1800ab1e bne r3,zero,26658 <_dtoa_r+0xdf4> + 263ac: dc800717 ldw r18,28(sp) + 263b0: dcc00617 ldw r19,24(sp) + 263b4: 9029883a mov r20,r18 + 263b8: 00000206 br 263c4 <_dtoa_r+0xb60> + 263bc: 002869c0 call 2869c <__multadd> + 263c0: 1021883a mov r16,r2 + 263c4: a80b883a mov r5,r21 + 263c8: 8009883a mov r4,r16 + 263cc: 00256640 call 25664 + 263d0: 10800c04 addi r2,r2,48 + 263d4: 90800005 stb r2,0(r18) + 263d8: 94800044 addi r18,r18,1 + 263dc: 9507c83a sub r3,r18,r20 + 263e0: 000f883a mov r7,zero + 263e4: 01800284 movi r6,10 + 263e8: 800b883a mov r5,r16 + 263ec: e009883a mov r4,fp + 263f0: 1cfff216 blt r3,r19,263bc <_gp+0xfffe9e84> + 263f4: 1011883a mov r8,r2 + 263f8: d8800617 ldw r2,24(sp) + 263fc: 0082370e bge zero,r2,26cdc <_dtoa_r+0x1478> + 26400: d9000717 ldw r4,28(sp) + 26404: 0025883a mov r18,zero + 26408: 20af883a add r23,r4,r2 + 2640c: 01800044 movi r6,1 + 26410: 800b883a mov r5,r16 + 26414: e009883a mov r4,fp + 26418: da001715 stw r8,92(sp) + 2641c: 0028d4c0 call 28d4c <__lshift> + 26420: a80b883a mov r5,r21 + 26424: 1009883a mov r4,r2 + 26428: d8800915 stw r2,36(sp) + 2642c: 0028e940 call 28e94 <__mcmp> + 26430: da001717 ldw r8,92(sp) + 26434: 0081800e bge zero,r2,26a38 <_dtoa_r+0x11d4> + 26438: b93fffc3 ldbu r4,-1(r23) + 2643c: b8bfffc4 addi r2,r23,-1 + 26440: 1007883a mov r3,r2 + 26444: 01800e44 movi r6,57 + 26448: d9c00717 ldw r7,28(sp) + 2644c: 00000506 br 26464 <_dtoa_r+0xc00> + 26450: 18ffffc4 addi r3,r3,-1 + 26454: 11c12326 beq r2,r7,268e4 <_dtoa_r+0x1080> + 26458: 19000003 ldbu r4,0(r3) + 2645c: 102f883a mov r23,r2 + 26460: 10bfffc4 addi r2,r2,-1 + 26464: 21403fcc andi r5,r4,255 + 26468: 2940201c xori r5,r5,128 + 2646c: 297fe004 addi r5,r5,-128 + 26470: 29bff726 beq r5,r6,26450 <_gp+0xfffe9f18> + 26474: 21000044 addi r4,r4,1 + 26478: 11000005 stb r4,0(r2) + 2647c: a80b883a mov r5,r21 + 26480: e009883a mov r4,fp + 26484: 00286740 call 28674 <_Bfree> + 26488: 883ea026 beq r17,zero,25f0c <_gp+0xfffe99d4> + 2648c: 90000426 beq r18,zero,264a0 <_dtoa_r+0xc3c> + 26490: 94400326 beq r18,r17,264a0 <_dtoa_r+0xc3c> + 26494: 900b883a mov r5,r18 + 26498: e009883a mov r4,fp + 2649c: 00286740 call 28674 <_Bfree> + 264a0: 880b883a mov r5,r17 + 264a4: e009883a mov r4,fp + 264a8: 00286740 call 28674 <_Bfree> + 264ac: 003e9706 br 25f0c <_gp+0xfffe99d4> + 264b0: 01800044 movi r6,1 + 264b4: d9800e15 stw r6,56(sp) + 264b8: 003d9606 br 25b14 <_gp+0xfffe95dc> + 264bc: d8800817 ldw r2,32(sp) + 264c0: d8c00517 ldw r3,20(sp) + 264c4: d8000d15 stw zero,52(sp) + 264c8: 10c5c83a sub r2,r2,r3 + 264cc: 00c9c83a sub r4,zero,r3 + 264d0: d8800815 stw r2,32(sp) + 264d4: d9000a15 stw r4,40(sp) + 264d8: 003d9706 br 25b38 <_gp+0xfffe9600> + 264dc: 05adc83a sub r22,zero,r22 + 264e0: dd800815 stw r22,32(sp) + 264e4: 002d883a mov r22,zero + 264e8: 003d8e06 br 25b24 <_gp+0xfffe95ec> + 264ec: d9000517 ldw r4,20(sp) + 264f0: 002edcc0 call 2edcc <__floatsidf> + 264f4: 100d883a mov r6,r2 + 264f8: 180f883a mov r7,r3 + 264fc: a009883a mov r4,r20 + 26500: 880b883a mov r5,r17 + 26504: 002dae00 call 2dae0 <__eqdf2> + 26508: 103d7126 beq r2,zero,25ad0 <_gp+0xfffe9598> + 2650c: d9c00517 ldw r7,20(sp) + 26510: 39ffffc4 addi r7,r7,-1 + 26514: d9c00515 stw r7,20(sp) + 26518: 003d6d06 br 25ad0 <_gp+0xfffe9598> + 2651c: dd400a17 ldw r21,40(sp) + 26520: dd000817 ldw r20,32(sp) + 26524: 0023883a mov r17,zero + 26528: 003f4806 br 2624c <_gp+0xfffe9d14> + 2652c: 10e3c83a sub r17,r2,r3 + 26530: 9448983a sll r4,r18,r17 + 26534: 003d3206 br 25a00 <_gp+0xfffe94c8> + 26538: d8000e15 stw zero,56(sp) + 2653c: 003d7506 br 25b14 <_gp+0xfffe95dc> + 26540: b005883a mov r2,r22 + 26544: 003f4506 br 2625c <_gp+0xfffe9d24> + 26548: dc000915 stw r16,36(sp) + 2654c: d9800a17 ldw r6,40(sp) + 26550: d9400917 ldw r5,36(sp) + 26554: e009883a mov r4,fp + 26558: 0028c0c0 call 28c0c <__pow5mult> + 2655c: 1021883a mov r16,r2 + 26560: 003f5a06 br 262cc <_gp+0xfffe9d94> + 26564: 01c00044 movi r7,1 + 26568: d9c00b15 stw r7,44(sp) + 2656c: d8802217 ldw r2,136(sp) + 26570: 0081280e bge zero,r2,26a14 <_dtoa_r+0x11b0> + 26574: 100d883a mov r6,r2 + 26578: 1021883a mov r16,r2 + 2657c: d8800c15 stw r2,48(sp) + 26580: d8800615 stw r2,24(sp) + 26584: 003d8806 br 25ba8 <_gp+0xfffe9670> + 26588: d8800617 ldw r2,24(sp) + 2658c: 00be9b16 blt zero,r2,25ffc <_gp+0xfffe9ac4> + 26590: 10010f1e bne r2,zero,269d0 <_dtoa_r+0x116c> + 26594: 880b883a mov r5,r17 + 26598: 000d883a mov r6,zero + 2659c: 01d00534 movhi r7,16404 + 265a0: 8009883a mov r4,r16 + 265a4: 002dd380 call 2dd38 <__muldf3> + 265a8: 900d883a mov r6,r18 + 265ac: 980f883a mov r7,r19 + 265b0: 1009883a mov r4,r2 + 265b4: 180b883a mov r5,r3 + 265b8: 002db680 call 2db68 <__gedf2> + 265bc: 002b883a mov r21,zero + 265c0: 0023883a mov r17,zero + 265c4: 1000bf16 blt r2,zero,268c4 <_dtoa_r+0x1060> + 265c8: d9802217 ldw r6,136(sp) + 265cc: ddc00717 ldw r23,28(sp) + 265d0: 018c303a nor r6,zero,r6 + 265d4: d9800515 stw r6,20(sp) + 265d8: a80b883a mov r5,r21 + 265dc: e009883a mov r4,fp + 265e0: 00286740 call 28674 <_Bfree> + 265e4: 883e4926 beq r17,zero,25f0c <_gp+0xfffe99d4> + 265e8: 003fad06 br 264a0 <_gp+0xfffe9f68> + 265ec: d9c01117 ldw r7,68(sp) + 265f0: 3801bc26 beq r7,zero,26ce4 <_dtoa_r+0x1480> + 265f4: 10810cc4 addi r2,r2,1075 + 265f8: dd400a17 ldw r21,40(sp) + 265fc: dd000817 ldw r20,32(sp) + 26600: 003f0a06 br 2622c <_gp+0xfffe9cf4> + 26604: 00800704 movi r2,28 + 26608: d9000817 ldw r4,32(sp) + 2660c: a0a9883a add r20,r20,r2 + 26610: b0ad883a add r22,r22,r2 + 26614: 2089883a add r4,r4,r2 + 26618: d9000815 stw r4,32(sp) + 2661c: 003f5106 br 26364 <_gp+0xfffe9e2c> + 26620: d8c00317 ldw r3,12(sp) + 26624: b8c1fc0e bge r23,r3,26e18 <_dtoa_r+0x15b4> + 26628: 0027883a mov r19,zero + 2662c: b805883a mov r2,r23 + 26630: 003f3e06 br 2632c <_gp+0xfffe9df4> + 26634: 880b883a mov r5,r17 + 26638: e009883a mov r4,fp + 2663c: 000f883a mov r7,zero + 26640: 01800284 movi r6,10 + 26644: 002869c0 call 2869c <__multadd> + 26648: d9000c17 ldw r4,48(sp) + 2664c: 1023883a mov r17,r2 + 26650: 0102040e bge zero,r4,26e64 <_dtoa_r+0x1600> + 26654: d9000615 stw r4,24(sp) + 26658: 0500050e bge zero,r20,26670 <_dtoa_r+0xe0c> + 2665c: 880b883a mov r5,r17 + 26660: a00d883a mov r6,r20 + 26664: e009883a mov r4,fp + 26668: 0028d4c0 call 28d4c <__lshift> + 2666c: 1023883a mov r17,r2 + 26670: 9801241e bne r19,zero,26b04 <_dtoa_r+0x12a0> + 26674: 8829883a mov r20,r17 + 26678: d9000617 ldw r4,24(sp) + 2667c: dcc00717 ldw r19,28(sp) + 26680: 9480004c andi r18,r18,1 + 26684: 20bfffc4 addi r2,r4,-1 + 26688: 9885883a add r2,r19,r2 + 2668c: d8800415 stw r2,16(sp) + 26690: dc800615 stw r18,24(sp) + 26694: a80b883a mov r5,r21 + 26698: 8009883a mov r4,r16 + 2669c: 00256640 call 25664 + 266a0: 880b883a mov r5,r17 + 266a4: 8009883a mov r4,r16 + 266a8: 102f883a mov r23,r2 + 266ac: 0028e940 call 28e94 <__mcmp> + 266b0: a80b883a mov r5,r21 + 266b4: a00d883a mov r6,r20 + 266b8: e009883a mov r4,fp + 266bc: 102d883a mov r22,r2 + 266c0: 0028ef40 call 28ef4 <__mdiff> + 266c4: 1007883a mov r3,r2 + 266c8: 10800317 ldw r2,12(r2) + 266cc: bc800c04 addi r18,r23,48 + 266d0: 180b883a mov r5,r3 + 266d4: 10004e1e bne r2,zero,26810 <_dtoa_r+0xfac> + 266d8: 8009883a mov r4,r16 + 266dc: d8c01615 stw r3,88(sp) + 266e0: 0028e940 call 28e94 <__mcmp> + 266e4: d8c01617 ldw r3,88(sp) + 266e8: e009883a mov r4,fp + 266ec: d8801615 stw r2,88(sp) + 266f0: 180b883a mov r5,r3 + 266f4: 00286740 call 28674 <_Bfree> + 266f8: d8801617 ldw r2,88(sp) + 266fc: 1000041e bne r2,zero,26710 <_dtoa_r+0xeac> + 26700: d9800317 ldw r6,12(sp) + 26704: 3000021e bne r6,zero,26710 <_dtoa_r+0xeac> + 26708: d8c00617 ldw r3,24(sp) + 2670c: 18003726 beq r3,zero,267ec <_dtoa_r+0xf88> + 26710: b0002016 blt r22,zero,26794 <_dtoa_r+0xf30> + 26714: b000041e bne r22,zero,26728 <_dtoa_r+0xec4> + 26718: d9000317 ldw r4,12(sp) + 2671c: 2000021e bne r4,zero,26728 <_dtoa_r+0xec4> + 26720: d8c00617 ldw r3,24(sp) + 26724: 18001b26 beq r3,zero,26794 <_dtoa_r+0xf30> + 26728: 00810716 blt zero,r2,26b48 <_dtoa_r+0x12e4> + 2672c: d8c00417 ldw r3,16(sp) + 26730: 9d800044 addi r22,r19,1 + 26734: 9c800005 stb r18,0(r19) + 26738: b02f883a mov r23,r22 + 2673c: 98c10626 beq r19,r3,26b58 <_dtoa_r+0x12f4> + 26740: 800b883a mov r5,r16 + 26744: 000f883a mov r7,zero + 26748: 01800284 movi r6,10 + 2674c: e009883a mov r4,fp + 26750: 002869c0 call 2869c <__multadd> + 26754: 1021883a mov r16,r2 + 26758: 000f883a mov r7,zero + 2675c: 01800284 movi r6,10 + 26760: 880b883a mov r5,r17 + 26764: e009883a mov r4,fp + 26768: 8d002526 beq r17,r20,26800 <_dtoa_r+0xf9c> + 2676c: 002869c0 call 2869c <__multadd> + 26770: a00b883a mov r5,r20 + 26774: 000f883a mov r7,zero + 26778: 01800284 movi r6,10 + 2677c: e009883a mov r4,fp + 26780: 1023883a mov r17,r2 + 26784: 002869c0 call 2869c <__multadd> + 26788: 1029883a mov r20,r2 + 2678c: b027883a mov r19,r22 + 26790: 003fc006 br 26694 <_gp+0xfffea15c> + 26794: 9011883a mov r8,r18 + 26798: 00800e0e bge zero,r2,267d4 <_dtoa_r+0xf70> + 2679c: 800b883a mov r5,r16 + 267a0: 01800044 movi r6,1 + 267a4: e009883a mov r4,fp + 267a8: da001715 stw r8,92(sp) + 267ac: 0028d4c0 call 28d4c <__lshift> + 267b0: a80b883a mov r5,r21 + 267b4: 1009883a mov r4,r2 + 267b8: 1021883a mov r16,r2 + 267bc: 0028e940 call 28e94 <__mcmp> + 267c0: da001717 ldw r8,92(sp) + 267c4: 0081960e bge zero,r2,26e20 <_dtoa_r+0x15bc> + 267c8: 00800e44 movi r2,57 + 267cc: 40817026 beq r8,r2,26d90 <_dtoa_r+0x152c> + 267d0: ba000c44 addi r8,r23,49 + 267d4: 8825883a mov r18,r17 + 267d8: 9dc00044 addi r23,r19,1 + 267dc: 9a000005 stb r8,0(r19) + 267e0: a023883a mov r17,r20 + 267e4: dc000915 stw r16,36(sp) + 267e8: 003f2406 br 2647c <_gp+0xfffe9f44> + 267ec: 00800e44 movi r2,57 + 267f0: 9011883a mov r8,r18 + 267f4: 90816626 beq r18,r2,26d90 <_dtoa_r+0x152c> + 267f8: 05bff516 blt zero,r22,267d0 <_gp+0xfffea298> + 267fc: 003ff506 br 267d4 <_gp+0xfffea29c> + 26800: 002869c0 call 2869c <__multadd> + 26804: 1023883a mov r17,r2 + 26808: 1029883a mov r20,r2 + 2680c: 003fdf06 br 2678c <_gp+0xfffea254> + 26810: e009883a mov r4,fp + 26814: 00286740 call 28674 <_Bfree> + 26818: 00800044 movi r2,1 + 2681c: 003fbc06 br 26710 <_gp+0xfffea1d8> + 26820: a80b883a mov r5,r21 + 26824: 8009883a mov r4,r16 + 26828: 0028e940 call 28e94 <__mcmp> + 2682c: 103edb0e bge r2,zero,2639c <_gp+0xfffe9e64> + 26830: 800b883a mov r5,r16 + 26834: 000f883a mov r7,zero + 26838: 01800284 movi r6,10 + 2683c: e009883a mov r4,fp + 26840: 002869c0 call 2869c <__multadd> + 26844: 1021883a mov r16,r2 + 26848: d8800517 ldw r2,20(sp) + 2684c: d8c00b17 ldw r3,44(sp) + 26850: 10bfffc4 addi r2,r2,-1 + 26854: d8800515 stw r2,20(sp) + 26858: 183f761e bne r3,zero,26634 <_gp+0xfffea0fc> + 2685c: d9000c17 ldw r4,48(sp) + 26860: 0101730e bge zero,r4,26e30 <_dtoa_r+0x15cc> + 26864: d9000615 stw r4,24(sp) + 26868: 003ed006 br 263ac <_gp+0xfffe9e74> + 2686c: 00800084 movi r2,2 + 26870: 3081861e bne r6,r2,26e8c <_dtoa_r+0x1628> + 26874: d8000b15 stw zero,44(sp) + 26878: 003f3c06 br 2656c <_gp+0xfffea034> + 2687c: dc000917 ldw r16,36(sp) + 26880: 003e9206 br 262cc <_gp+0xfffe9d94> + 26884: d9c00317 ldw r7,12(sp) + 26888: 00800084 movi r2,2 + 2688c: 11fec50e bge r2,r7,263a4 <_gp+0xfffe9e6c> + 26890: d9000617 ldw r4,24(sp) + 26894: 20013c1e bne r4,zero,26d88 <_dtoa_r+0x1524> + 26898: a80b883a mov r5,r21 + 2689c: 000f883a mov r7,zero + 268a0: 01800144 movi r6,5 + 268a4: e009883a mov r4,fp + 268a8: 002869c0 call 2869c <__multadd> + 268ac: 100b883a mov r5,r2 + 268b0: 8009883a mov r4,r16 + 268b4: 102b883a mov r21,r2 + 268b8: 0028e940 call 28e94 <__mcmp> + 268bc: dc000915 stw r16,36(sp) + 268c0: 00bf410e bge zero,r2,265c8 <_gp+0xfffea090> + 268c4: d9c00717 ldw r7,28(sp) + 268c8: 00800c44 movi r2,49 + 268cc: 38800005 stb r2,0(r7) + 268d0: d8800517 ldw r2,20(sp) + 268d4: 3dc00044 addi r23,r7,1 + 268d8: 10800044 addi r2,r2,1 + 268dc: d8800515 stw r2,20(sp) + 268e0: 003f3d06 br 265d8 <_gp+0xfffea0a0> + 268e4: d9800517 ldw r6,20(sp) + 268e8: d9c00717 ldw r7,28(sp) + 268ec: 00800c44 movi r2,49 + 268f0: 31800044 addi r6,r6,1 + 268f4: d9800515 stw r6,20(sp) + 268f8: 38800005 stb r2,0(r7) + 268fc: 003edf06 br 2647c <_gp+0xfffe9f44> + 26900: d8000b15 stw zero,44(sp) + 26904: 003c9f06 br 25b84 <_gp+0xfffe964c> + 26908: 903e7e1e bne r18,zero,26304 <_gp+0xfffe9dcc> + 2690c: 00800434 movhi r2,16 + 26910: 10bfffc4 addi r2,r2,-1 + 26914: 9884703a and r2,r19,r2 + 26918: 1000ea1e bne r2,zero,26cc4 <_dtoa_r+0x1460> + 2691c: 9cdffc2c andhi r19,r19,32752 + 26920: 9800e826 beq r19,zero,26cc4 <_dtoa_r+0x1460> + 26924: d9c00817 ldw r7,32(sp) + 26928: b5800044 addi r22,r22,1 + 2692c: 04c00044 movi r19,1 + 26930: 39c00044 addi r7,r7,1 + 26934: d9c00815 stw r7,32(sp) + 26938: d8800d17 ldw r2,52(sp) + 2693c: 103e721e bne r2,zero,26308 <_gp+0xfffe9dd0> + 26940: 00800044 movi r2,1 + 26944: 003e7906 br 2632c <_gp+0xfffe9df4> + 26948: 8009883a mov r4,r16 + 2694c: 002edcc0 call 2edcc <__floatsidf> + 26950: d9800f17 ldw r6,60(sp) + 26954: d9c01017 ldw r7,64(sp) + 26958: 1009883a mov r4,r2 + 2695c: 180b883a mov r5,r3 + 26960: 002dd380 call 2dd38 <__muldf3> + 26964: 000d883a mov r6,zero + 26968: 01d00734 movhi r7,16412 + 2696c: 1009883a mov r4,r2 + 26970: 180b883a mov r5,r3 + 26974: 002c94c0 call 2c94c <__adddf3> + 26978: 047f3034 movhi r17,64704 + 2697c: 1021883a mov r16,r2 + 26980: 1c63883a add r17,r3,r17 + 26984: d9000f17 ldw r4,60(sp) + 26988: d9401017 ldw r5,64(sp) + 2698c: 000d883a mov r6,zero + 26990: 01d00534 movhi r7,16404 + 26994: 002e4500 call 2e450 <__subdf3> + 26998: 800d883a mov r6,r16 + 2699c: 880f883a mov r7,r17 + 269a0: 1009883a mov r4,r2 + 269a4: 180b883a mov r5,r3 + 269a8: 102b883a mov r21,r2 + 269ac: 1829883a mov r20,r3 + 269b0: 002db680 call 2db68 <__gedf2> + 269b4: 00806c16 blt zero,r2,26b68 <_dtoa_r+0x1304> + 269b8: 89e0003c xorhi r7,r17,32768 + 269bc: 800d883a mov r6,r16 + 269c0: a809883a mov r4,r21 + 269c4: a00b883a mov r5,r20 + 269c8: 002dc440 call 2dc44 <__ledf2> + 269cc: 103d7e0e bge r2,zero,25fc8 <_gp+0xfffe9a90> + 269d0: 002b883a mov r21,zero + 269d4: 0023883a mov r17,zero + 269d8: 003efb06 br 265c8 <_gp+0xfffea090> + 269dc: d8800717 ldw r2,28(sp) + 269e0: 003bd006 br 25924 <_gp+0xfffe93ec> + 269e4: d9000a17 ldw r4,40(sp) + 269e8: d9800d17 ldw r6,52(sp) + 269ec: dd400a15 stw r21,40(sp) + 269f0: a905c83a sub r2,r21,r4 + 269f4: 308d883a add r6,r6,r2 + 269f8: d9800d15 stw r6,52(sp) + 269fc: 002b883a mov r21,zero + 26a00: 003e0606 br 2621c <_gp+0xfffe9ce4> + 26a04: 9023883a mov r17,r18 + 26a08: 9829883a mov r20,r19 + 26a0c: 04000084 movi r16,2 + 26a10: 003c9206 br 25c5c <_gp+0xfffe9724> + 26a14: 04000044 movi r16,1 + 26a18: dc000c15 stw r16,48(sp) + 26a1c: dc000615 stw r16,24(sp) + 26a20: dc002215 stw r16,136(sp) + 26a24: e0001115 stw zero,68(fp) + 26a28: 000b883a mov r5,zero + 26a2c: 003c6906 br 25bd4 <_gp+0xfffe969c> + 26a30: 3021883a mov r16,r6 + 26a34: 003ffb06 br 26a24 <_gp+0xfffea4ec> + 26a38: 1000021e bne r2,zero,26a44 <_dtoa_r+0x11e0> + 26a3c: 4200004c andi r8,r8,1 + 26a40: 403e7d1e bne r8,zero,26438 <_gp+0xfffe9f00> + 26a44: 01000c04 movi r4,48 + 26a48: 00000106 br 26a50 <_dtoa_r+0x11ec> + 26a4c: 102f883a mov r23,r2 + 26a50: b8bfffc4 addi r2,r23,-1 + 26a54: 10c00007 ldb r3,0(r2) + 26a58: 193ffc26 beq r3,r4,26a4c <_gp+0xfffea514> + 26a5c: 003e8706 br 2647c <_gp+0xfffe9f44> + 26a60: d8800517 ldw r2,20(sp) + 26a64: 00a3c83a sub r17,zero,r2 + 26a68: 8800a426 beq r17,zero,26cfc <_dtoa_r+0x1498> + 26a6c: 888003cc andi r2,r17,15 + 26a70: 100490fa slli r2,r2,3 + 26a74: 00c000f4 movhi r3,3 + 26a78: 18c83404 addi r3,r3,8400 + 26a7c: 1885883a add r2,r3,r2 + 26a80: 11800017 ldw r6,0(r2) + 26a84: 11c00117 ldw r7,4(r2) + 26a88: 9009883a mov r4,r18 + 26a8c: 980b883a mov r5,r19 + 26a90: 8823d13a srai r17,r17,4 + 26a94: 002dd380 call 2dd38 <__muldf3> + 26a98: d8800f15 stw r2,60(sp) + 26a9c: d8c01015 stw r3,64(sp) + 26aa0: 8800e826 beq r17,zero,26e44 <_dtoa_r+0x15e0> + 26aa4: 050000f4 movhi r20,3 + 26aa8: a5082a04 addi r20,r20,8360 + 26aac: 04000084 movi r16,2 + 26ab0: 8980004c andi r6,r17,1 + 26ab4: 1009883a mov r4,r2 + 26ab8: 8823d07a srai r17,r17,1 + 26abc: 180b883a mov r5,r3 + 26ac0: 30000426 beq r6,zero,26ad4 <_dtoa_r+0x1270> + 26ac4: a1800017 ldw r6,0(r20) + 26ac8: a1c00117 ldw r7,4(r20) + 26acc: 84000044 addi r16,r16,1 + 26ad0: 002dd380 call 2dd38 <__muldf3> + 26ad4: a5000204 addi r20,r20,8 + 26ad8: 883ff51e bne r17,zero,26ab0 <_gp+0xfffea578> + 26adc: d8800f15 stw r2,60(sp) + 26ae0: d8c01015 stw r3,64(sp) + 26ae4: 003c7606 br 25cc0 <_gp+0xfffe9788> + 26ae8: 00c00c04 movi r3,48 + 26aec: 10c00005 stb r3,0(r2) + 26af0: d8c00517 ldw r3,20(sp) + 26af4: bd3fffc3 ldbu r20,-1(r23) + 26af8: 18c00044 addi r3,r3,1 + 26afc: d8c00515 stw r3,20(sp) + 26b00: 003db906 br 261e8 <_gp+0xfffe9cb0> + 26b04: 89400117 ldw r5,4(r17) + 26b08: e009883a mov r4,fp + 26b0c: 00285cc0 call 285cc <_Balloc> + 26b10: 89800417 ldw r6,16(r17) + 26b14: 89400304 addi r5,r17,12 + 26b18: 11000304 addi r4,r2,12 + 26b1c: 31800084 addi r6,r6,2 + 26b20: 318d883a add r6,r6,r6 + 26b24: 318d883a add r6,r6,r6 + 26b28: 1027883a mov r19,r2 + 26b2c: 00283280 call 28328 + 26b30: 01800044 movi r6,1 + 26b34: 980b883a mov r5,r19 + 26b38: e009883a mov r4,fp + 26b3c: 0028d4c0 call 28d4c <__lshift> + 26b40: 1029883a mov r20,r2 + 26b44: 003ecc06 br 26678 <_gp+0xfffea140> + 26b48: 00800e44 movi r2,57 + 26b4c: 90809026 beq r18,r2,26d90 <_dtoa_r+0x152c> + 26b50: 92000044 addi r8,r18,1 + 26b54: 003f1f06 br 267d4 <_gp+0xfffea29c> + 26b58: 9011883a mov r8,r18 + 26b5c: 8825883a mov r18,r17 + 26b60: a023883a mov r17,r20 + 26b64: 003e2906 br 2640c <_gp+0xfffe9ed4> + 26b68: 002b883a mov r21,zero + 26b6c: 0023883a mov r17,zero + 26b70: 003f5406 br 268c4 <_gp+0xfffea38c> + 26b74: 61bfffc4 addi r6,r12,-1 + 26b78: 300490fa slli r2,r6,3 + 26b7c: 00c000f4 movhi r3,3 + 26b80: 18c83404 addi r3,r3,8400 + 26b84: 1885883a add r2,r3,r2 + 26b88: 11000017 ldw r4,0(r2) + 26b8c: 11400117 ldw r5,4(r2) + 26b90: d8800717 ldw r2,28(sp) + 26b94: 880f883a mov r7,r17 + 26b98: d9801215 stw r6,72(sp) + 26b9c: 800d883a mov r6,r16 + 26ba0: db001615 stw r12,88(sp) + 26ba4: 15c00044 addi r23,r2,1 + 26ba8: 002dd380 call 2dd38 <__muldf3> + 26bac: d9401017 ldw r5,64(sp) + 26bb0: d9000f17 ldw r4,60(sp) + 26bb4: d8c01515 stw r3,84(sp) + 26bb8: d8801415 stw r2,80(sp) + 26bbc: 002ed4c0 call 2ed4c <__fixdfsi> + 26bc0: 1009883a mov r4,r2 + 26bc4: 1021883a mov r16,r2 + 26bc8: 002edcc0 call 2edcc <__floatsidf> + 26bcc: d9000f17 ldw r4,60(sp) + 26bd0: d9401017 ldw r5,64(sp) + 26bd4: 100d883a mov r6,r2 + 26bd8: 180f883a mov r7,r3 + 26bdc: 002e4500 call 2e450 <__subdf3> + 26be0: 1829883a mov r20,r3 + 26be4: d8c00717 ldw r3,28(sp) + 26be8: 84000c04 addi r16,r16,48 + 26bec: 1023883a mov r17,r2 + 26bf0: 1c000005 stb r16,0(r3) + 26bf4: db001617 ldw r12,88(sp) + 26bf8: 00800044 movi r2,1 + 26bfc: 60802226 beq r12,r2,26c88 <_dtoa_r+0x1424> + 26c00: d9c00717 ldw r7,28(sp) + 26c04: 8805883a mov r2,r17 + 26c08: b82b883a mov r21,r23 + 26c0c: 3b19883a add r12,r7,r12 + 26c10: 6023883a mov r17,r12 + 26c14: a007883a mov r3,r20 + 26c18: dc800f15 stw r18,60(sp) + 26c1c: 000d883a mov r6,zero + 26c20: 01d00934 movhi r7,16420 + 26c24: 1009883a mov r4,r2 + 26c28: 180b883a mov r5,r3 + 26c2c: 002dd380 call 2dd38 <__muldf3> + 26c30: 180b883a mov r5,r3 + 26c34: 1009883a mov r4,r2 + 26c38: 1829883a mov r20,r3 + 26c3c: 1025883a mov r18,r2 + 26c40: 002ed4c0 call 2ed4c <__fixdfsi> + 26c44: 1009883a mov r4,r2 + 26c48: 1021883a mov r16,r2 + 26c4c: 002edcc0 call 2edcc <__floatsidf> + 26c50: 100d883a mov r6,r2 + 26c54: 180f883a mov r7,r3 + 26c58: 9009883a mov r4,r18 + 26c5c: a00b883a mov r5,r20 + 26c60: 84000c04 addi r16,r16,48 + 26c64: 002e4500 call 2e450 <__subdf3> + 26c68: ad400044 addi r21,r21,1 + 26c6c: ac3fffc5 stb r16,-1(r21) + 26c70: ac7fea1e bne r21,r17,26c1c <_gp+0xfffea6e4> + 26c74: 1023883a mov r17,r2 + 26c78: d8801217 ldw r2,72(sp) + 26c7c: dc800f17 ldw r18,60(sp) + 26c80: 1829883a mov r20,r3 + 26c84: b8af883a add r23,r23,r2 + 26c88: d9001417 ldw r4,80(sp) + 26c8c: d9401517 ldw r5,84(sp) + 26c90: 000d883a mov r6,zero + 26c94: 01cff834 movhi r7,16352 + 26c98: 002c94c0 call 2c94c <__adddf3> + 26c9c: 880d883a mov r6,r17 + 26ca0: a00f883a mov r7,r20 + 26ca4: 1009883a mov r4,r2 + 26ca8: 180b883a mov r5,r3 + 26cac: 002dc440 call 2dc44 <__ledf2> + 26cb0: 10003e0e bge r2,zero,26dac <_dtoa_r+0x1548> + 26cb4: d9001317 ldw r4,76(sp) + 26cb8: bd3fffc3 ldbu r20,-1(r23) + 26cbc: d9000515 stw r4,20(sp) + 26cc0: 003d3b06 br 261b0 <_gp+0xfffe9c78> + 26cc4: 0027883a mov r19,zero + 26cc8: 003f1b06 br 26938 <_gp+0xfffea400> + 26ccc: d8800817 ldw r2,32(sp) + 26cd0: 11e9c83a sub r20,r2,r7 + 26cd4: 0005883a mov r2,zero + 26cd8: 003d5406 br 2622c <_gp+0xfffe9cf4> + 26cdc: 00800044 movi r2,1 + 26ce0: 003dc706 br 26400 <_gp+0xfffe9ec8> + 26ce4: d8c00217 ldw r3,8(sp) + 26ce8: 00800d84 movi r2,54 + 26cec: dd400a17 ldw r21,40(sp) + 26cf0: 10c5c83a sub r2,r2,r3 + 26cf4: dd000817 ldw r20,32(sp) + 26cf8: 003d4c06 br 2622c <_gp+0xfffe9cf4> + 26cfc: dc800f15 stw r18,60(sp) + 26d00: dcc01015 stw r19,64(sp) + 26d04: 04000084 movi r16,2 + 26d08: 003bed06 br 25cc0 <_gp+0xfffe9788> + 26d0c: d9000617 ldw r4,24(sp) + 26d10: 203f0d26 beq r4,zero,26948 <_gp+0xfffea410> + 26d14: d9800c17 ldw r6,48(sp) + 26d18: 01bcab0e bge zero,r6,25fc8 <_gp+0xfffe9a90> + 26d1c: d9401017 ldw r5,64(sp) + 26d20: d9000f17 ldw r4,60(sp) + 26d24: 000d883a mov r6,zero + 26d28: 01d00934 movhi r7,16420 + 26d2c: 002dd380 call 2dd38 <__muldf3> + 26d30: 81000044 addi r4,r16,1 + 26d34: d8800f15 stw r2,60(sp) + 26d38: d8c01015 stw r3,64(sp) + 26d3c: 002edcc0 call 2edcc <__floatsidf> + 26d40: d9800f17 ldw r6,60(sp) + 26d44: d9c01017 ldw r7,64(sp) + 26d48: 1009883a mov r4,r2 + 26d4c: 180b883a mov r5,r3 + 26d50: 002dd380 call 2dd38 <__muldf3> + 26d54: 01d00734 movhi r7,16412 + 26d58: 000d883a mov r6,zero + 26d5c: 1009883a mov r4,r2 + 26d60: 180b883a mov r5,r3 + 26d64: 002c94c0 call 2c94c <__adddf3> + 26d68: d9c00517 ldw r7,20(sp) + 26d6c: 047f3034 movhi r17,64704 + 26d70: 1021883a mov r16,r2 + 26d74: 39ffffc4 addi r7,r7,-1 + 26d78: d9c01315 stw r7,76(sp) + 26d7c: 1c63883a add r17,r3,r17 + 26d80: db000c17 ldw r12,48(sp) + 26d84: 003bea06 br 25d30 <_gp+0xfffe97f8> + 26d88: dc000915 stw r16,36(sp) + 26d8c: 003e0e06 br 265c8 <_gp+0xfffea090> + 26d90: 01000e44 movi r4,57 + 26d94: 8825883a mov r18,r17 + 26d98: 9dc00044 addi r23,r19,1 + 26d9c: 99000005 stb r4,0(r19) + 26da0: a023883a mov r17,r20 + 26da4: dc000915 stw r16,36(sp) + 26da8: 003da406 br 2643c <_gp+0xfffe9f04> + 26dac: d9801417 ldw r6,80(sp) + 26db0: d9c01517 ldw r7,84(sp) + 26db4: 0009883a mov r4,zero + 26db8: 014ff834 movhi r5,16352 + 26dbc: 002e4500 call 2e450 <__subdf3> + 26dc0: 880d883a mov r6,r17 + 26dc4: a00f883a mov r7,r20 + 26dc8: 1009883a mov r4,r2 + 26dcc: 180b883a mov r5,r3 + 26dd0: 002db680 call 2db68 <__gedf2> + 26dd4: 00bc7c0e bge zero,r2,25fc8 <_gp+0xfffe9a90> + 26dd8: 01000c04 movi r4,48 + 26ddc: 00000106 br 26de4 <_dtoa_r+0x1580> + 26de0: 102f883a mov r23,r2 + 26de4: b8bfffc4 addi r2,r23,-1 + 26de8: 10c00007 ldb r3,0(r2) + 26dec: 193ffc26 beq r3,r4,26de0 <_gp+0xfffea8a8> + 26df0: d9801317 ldw r6,76(sp) + 26df4: d9800515 stw r6,20(sp) + 26df8: 003c4406 br 25f0c <_gp+0xfffe99d4> + 26dfc: d9801317 ldw r6,76(sp) + 26e00: d9800515 stw r6,20(sp) + 26e04: 003cea06 br 261b0 <_gp+0xfffe9c78> + 26e08: dd800f17 ldw r22,60(sp) + 26e0c: dcc01017 ldw r19,64(sp) + 26e10: dc801217 ldw r18,72(sp) + 26e14: 003c6c06 br 25fc8 <_gp+0xfffe9a90> + 26e18: 903e031e bne r18,zero,26628 <_gp+0xfffea0f0> + 26e1c: 003ebb06 br 2690c <_gp+0xfffea3d4> + 26e20: 103e6c1e bne r2,zero,267d4 <_gp+0xfffea29c> + 26e24: 4080004c andi r2,r8,1 + 26e28: 103e6a26 beq r2,zero,267d4 <_gp+0xfffea29c> + 26e2c: 003e6606 br 267c8 <_gp+0xfffea290> + 26e30: d8c00317 ldw r3,12(sp) + 26e34: 00800084 movi r2,2 + 26e38: 10c02916 blt r2,r3,26ee0 <_dtoa_r+0x167c> + 26e3c: d9000c17 ldw r4,48(sp) + 26e40: 003e8806 br 26864 <_gp+0xfffea32c> + 26e44: 04000084 movi r16,2 + 26e48: 003b9d06 br 25cc0 <_gp+0xfffe9788> + 26e4c: d9001317 ldw r4,76(sp) + 26e50: d9000515 stw r4,20(sp) + 26e54: 003cd606 br 261b0 <_gp+0xfffe9c78> + 26e58: d8801317 ldw r2,76(sp) + 26e5c: d8800515 stw r2,20(sp) + 26e60: 003c2a06 br 25f0c <_gp+0xfffe99d4> + 26e64: d9800317 ldw r6,12(sp) + 26e68: 00800084 movi r2,2 + 26e6c: 11801516 blt r2,r6,26ec4 <_dtoa_r+0x1660> + 26e70: d9c00c17 ldw r7,48(sp) + 26e74: d9c00615 stw r7,24(sp) + 26e78: 003df706 br 26658 <_gp+0xfffea120> + 26e7c: 193d3926 beq r3,r4,26364 <_gp+0xfffe9e2c> + 26e80: 00c00f04 movi r3,60 + 26e84: 1885c83a sub r2,r3,r2 + 26e88: 003ddf06 br 26608 <_gp+0xfffea0d0> + 26e8c: e009883a mov r4,fp + 26e90: e0001115 stw zero,68(fp) + 26e94: 000b883a mov r5,zero + 26e98: 00285cc0 call 285cc <_Balloc> + 26e9c: d8800715 stw r2,28(sp) + 26ea0: d8c00717 ldw r3,28(sp) + 26ea4: 00bfffc4 movi r2,-1 + 26ea8: 01000044 movi r4,1 + 26eac: d8800c15 stw r2,48(sp) + 26eb0: e0c01015 stw r3,64(fp) + 26eb4: d9000b15 stw r4,44(sp) + 26eb8: d8800615 stw r2,24(sp) + 26ebc: d8002215 stw zero,136(sp) + 26ec0: 003c4106 br 25fc8 <_gp+0xfffe9a90> + 26ec4: d8c00c17 ldw r3,48(sp) + 26ec8: d8c00615 stw r3,24(sp) + 26ecc: 003e7006 br 26890 <_gp+0xfffea358> + 26ed0: 04400044 movi r17,1 + 26ed4: 003b2006 br 25b58 <_gp+0xfffe9620> + 26ed8: 000b883a mov r5,zero + 26edc: 003b3d06 br 25bd4 <_gp+0xfffe969c> + 26ee0: d8800c17 ldw r2,48(sp) + 26ee4: d8800615 stw r2,24(sp) + 26ee8: 003e6906 br 26890 <_gp+0xfffea358> -000274b0 <__sflush_r>: - 274b0: 2880030b ldhu r2,12(r5) - 274b4: defffb04 addi sp,sp,-20 - 274b8: dcc00315 stw r19,12(sp) - 274bc: dc400115 stw r17,4(sp) - 274c0: dfc00415 stw ra,16(sp) - 274c4: dc800215 stw r18,8(sp) - 274c8: dc000015 stw r16,0(sp) - 274cc: 10c0020c andi r3,r2,8 - 274d0: 2823883a mov r17,r5 - 274d4: 2027883a mov r19,r4 - 274d8: 1800311e bne r3,zero,275a0 <__sflush_r+0xf0> - 274dc: 28c00117 ldw r3,4(r5) - 274e0: 10820014 ori r2,r2,2048 - 274e4: 2880030d sth r2,12(r5) - 274e8: 00c04b0e bge zero,r3,27618 <__sflush_r+0x168> - 274ec: 8a000a17 ldw r8,40(r17) - 274f0: 40002326 beq r8,zero,27580 <__sflush_r+0xd0> - 274f4: 9c000017 ldw r16,0(r19) - 274f8: 10c4000c andi r3,r2,4096 - 274fc: 98000015 stw zero,0(r19) - 27500: 18004826 beq r3,zero,27624 <__sflush_r+0x174> - 27504: 89801417 ldw r6,80(r17) - 27508: 10c0010c andi r3,r2,4 - 2750c: 18000626 beq r3,zero,27528 <__sflush_r+0x78> - 27510: 88c00117 ldw r3,4(r17) - 27514: 88800c17 ldw r2,48(r17) - 27518: 30cdc83a sub r6,r6,r3 - 2751c: 10000226 beq r2,zero,27528 <__sflush_r+0x78> - 27520: 88800f17 ldw r2,60(r17) - 27524: 308dc83a sub r6,r6,r2 - 27528: 89400717 ldw r5,28(r17) - 2752c: 000f883a mov r7,zero - 27530: 9809883a mov r4,r19 - 27534: 403ee83a callr r8 - 27538: 00ffffc4 movi r3,-1 - 2753c: 10c04426 beq r2,r3,27650 <__sflush_r+0x1a0> - 27540: 88c0030b ldhu r3,12(r17) - 27544: 89000417 ldw r4,16(r17) - 27548: 88000115 stw zero,4(r17) - 2754c: 197dffcc andi r5,r3,63487 - 27550: 8940030d sth r5,12(r17) - 27554: 89000015 stw r4,0(r17) - 27558: 18c4000c andi r3,r3,4096 - 2755c: 18002c1e bne r3,zero,27610 <__sflush_r+0x160> - 27560: 89400c17 ldw r5,48(r17) - 27564: 9c000015 stw r16,0(r19) - 27568: 28000526 beq r5,zero,27580 <__sflush_r+0xd0> - 2756c: 88801004 addi r2,r17,64 - 27570: 28800226 beq r5,r2,2757c <__sflush_r+0xcc> - 27574: 9809883a mov r4,r19 - 27578: 0027c1c0 call 27c1c <_free_r> - 2757c: 88000c15 stw zero,48(r17) - 27580: 0005883a mov r2,zero - 27584: dfc00417 ldw ra,16(sp) - 27588: dcc00317 ldw r19,12(sp) - 2758c: dc800217 ldw r18,8(sp) - 27590: dc400117 ldw r17,4(sp) - 27594: dc000017 ldw r16,0(sp) - 27598: dec00504 addi sp,sp,20 - 2759c: f800283a ret - 275a0: 2c800417 ldw r18,16(r5) - 275a4: 903ff626 beq r18,zero,27580 <__sflush_r+0xd0> - 275a8: 2c000017 ldw r16,0(r5) - 275ac: 108000cc andi r2,r2,3 - 275b0: 2c800015 stw r18,0(r5) - 275b4: 84a1c83a sub r16,r16,r18 - 275b8: 1000131e bne r2,zero,27608 <__sflush_r+0x158> - 275bc: 28800517 ldw r2,20(r5) - 275c0: 88800215 stw r2,8(r17) - 275c4: 04000316 blt zero,r16,275d4 <__sflush_r+0x124> - 275c8: 003fed06 br 27580 <__sflush_r+0xd0> - 275cc: 90a5883a add r18,r18,r2 - 275d0: 043feb0e bge zero,r16,27580 <__sflush_r+0xd0> - 275d4: 88800917 ldw r2,36(r17) - 275d8: 89400717 ldw r5,28(r17) - 275dc: 800f883a mov r7,r16 - 275e0: 900d883a mov r6,r18 - 275e4: 9809883a mov r4,r19 - 275e8: 103ee83a callr r2 - 275ec: 80a1c83a sub r16,r16,r2 - 275f0: 00bff616 blt zero,r2,275cc <__sflush_r+0x11c> - 275f4: 88c0030b ldhu r3,12(r17) - 275f8: 00bfffc4 movi r2,-1 - 275fc: 18c01014 ori r3,r3,64 - 27600: 88c0030d sth r3,12(r17) - 27604: 003fdf06 br 27584 <__sflush_r+0xd4> - 27608: 0005883a mov r2,zero - 2760c: 003fec06 br 275c0 <__sflush_r+0x110> - 27610: 88801415 stw r2,80(r17) - 27614: 003fd206 br 27560 <__sflush_r+0xb0> - 27618: 28c00f17 ldw r3,60(r5) - 2761c: 00ffb316 blt zero,r3,274ec <__sflush_r+0x3c> - 27620: 003fd706 br 27580 <__sflush_r+0xd0> - 27624: 89400717 ldw r5,28(r17) - 27628: 000d883a mov r6,zero - 2762c: 01c00044 movi r7,1 - 27630: 9809883a mov r4,r19 - 27634: 403ee83a callr r8 - 27638: 100d883a mov r6,r2 - 2763c: 00bfffc4 movi r2,-1 - 27640: 30801426 beq r6,r2,27694 <__sflush_r+0x1e4> - 27644: 8880030b ldhu r2,12(r17) - 27648: 8a000a17 ldw r8,40(r17) - 2764c: 003fae06 br 27508 <__sflush_r+0x58> - 27650: 98c00017 ldw r3,0(r19) - 27654: 183fba26 beq r3,zero,27540 <__sflush_r+0x90> - 27658: 01000744 movi r4,29 - 2765c: 19000626 beq r3,r4,27678 <__sflush_r+0x1c8> - 27660: 01000584 movi r4,22 - 27664: 19000426 beq r3,r4,27678 <__sflush_r+0x1c8> - 27668: 88c0030b ldhu r3,12(r17) - 2766c: 18c01014 ori r3,r3,64 - 27670: 88c0030d sth r3,12(r17) - 27674: 003fc306 br 27584 <__sflush_r+0xd4> - 27678: 8880030b ldhu r2,12(r17) - 2767c: 88c00417 ldw r3,16(r17) - 27680: 88000115 stw zero,4(r17) - 27684: 10bdffcc andi r2,r2,63487 - 27688: 8880030d sth r2,12(r17) - 2768c: 88c00015 stw r3,0(r17) - 27690: 003fb306 br 27560 <__sflush_r+0xb0> - 27694: 98800017 ldw r2,0(r19) - 27698: 103fea26 beq r2,zero,27644 <__sflush_r+0x194> - 2769c: 00c00744 movi r3,29 - 276a0: 10c00226 beq r2,r3,276ac <__sflush_r+0x1fc> - 276a4: 00c00584 movi r3,22 - 276a8: 10c0031e bne r2,r3,276b8 <__sflush_r+0x208> - 276ac: 9c000015 stw r16,0(r19) - 276b0: 0005883a mov r2,zero - 276b4: 003fb306 br 27584 <__sflush_r+0xd4> - 276b8: 88c0030b ldhu r3,12(r17) - 276bc: 3005883a mov r2,r6 - 276c0: 18c01014 ori r3,r3,64 - 276c4: 88c0030d sth r3,12(r17) - 276c8: 003fae06 br 27584 <__sflush_r+0xd4> +00026eec <__sflush_r>: + 26eec: 2880030b ldhu r2,12(r5) + 26ef0: defffb04 addi sp,sp,-20 + 26ef4: dcc00315 stw r19,12(sp) + 26ef8: dc400115 stw r17,4(sp) + 26efc: dfc00415 stw ra,16(sp) + 26f00: dc800215 stw r18,8(sp) + 26f04: dc000015 stw r16,0(sp) + 26f08: 10c0020c andi r3,r2,8 + 26f0c: 2823883a mov r17,r5 + 26f10: 2027883a mov r19,r4 + 26f14: 1800311e bne r3,zero,26fdc <__sflush_r+0xf0> + 26f18: 28c00117 ldw r3,4(r5) + 26f1c: 10820014 ori r2,r2,2048 + 26f20: 2880030d sth r2,12(r5) + 26f24: 00c04b0e bge zero,r3,27054 <__sflush_r+0x168> + 26f28: 8a000a17 ldw r8,40(r17) + 26f2c: 40002326 beq r8,zero,26fbc <__sflush_r+0xd0> + 26f30: 9c000017 ldw r16,0(r19) + 26f34: 10c4000c andi r3,r2,4096 + 26f38: 98000015 stw zero,0(r19) + 26f3c: 18004826 beq r3,zero,27060 <__sflush_r+0x174> + 26f40: 89801417 ldw r6,80(r17) + 26f44: 10c0010c andi r3,r2,4 + 26f48: 18000626 beq r3,zero,26f64 <__sflush_r+0x78> + 26f4c: 88c00117 ldw r3,4(r17) + 26f50: 88800c17 ldw r2,48(r17) + 26f54: 30cdc83a sub r6,r6,r3 + 26f58: 10000226 beq r2,zero,26f64 <__sflush_r+0x78> + 26f5c: 88800f17 ldw r2,60(r17) + 26f60: 308dc83a sub r6,r6,r2 + 26f64: 89400717 ldw r5,28(r17) + 26f68: 000f883a mov r7,zero + 26f6c: 9809883a mov r4,r19 + 26f70: 403ee83a callr r8 + 26f74: 00ffffc4 movi r3,-1 + 26f78: 10c04426 beq r2,r3,2708c <__sflush_r+0x1a0> + 26f7c: 88c0030b ldhu r3,12(r17) + 26f80: 89000417 ldw r4,16(r17) + 26f84: 88000115 stw zero,4(r17) + 26f88: 197dffcc andi r5,r3,63487 + 26f8c: 8940030d sth r5,12(r17) + 26f90: 89000015 stw r4,0(r17) + 26f94: 18c4000c andi r3,r3,4096 + 26f98: 18002c1e bne r3,zero,2704c <__sflush_r+0x160> + 26f9c: 89400c17 ldw r5,48(r17) + 26fa0: 9c000015 stw r16,0(r19) + 26fa4: 28000526 beq r5,zero,26fbc <__sflush_r+0xd0> + 26fa8: 88801004 addi r2,r17,64 + 26fac: 28800226 beq r5,r2,26fb8 <__sflush_r+0xcc> + 26fb0: 9809883a mov r4,r19 + 26fb4: 00276580 call 27658 <_free_r> + 26fb8: 88000c15 stw zero,48(r17) + 26fbc: 0005883a mov r2,zero + 26fc0: dfc00417 ldw ra,16(sp) + 26fc4: dcc00317 ldw r19,12(sp) + 26fc8: dc800217 ldw r18,8(sp) + 26fcc: dc400117 ldw r17,4(sp) + 26fd0: dc000017 ldw r16,0(sp) + 26fd4: dec00504 addi sp,sp,20 + 26fd8: f800283a ret + 26fdc: 2c800417 ldw r18,16(r5) + 26fe0: 903ff626 beq r18,zero,26fbc <_gp+0xfffeaa84> + 26fe4: 2c000017 ldw r16,0(r5) + 26fe8: 108000cc andi r2,r2,3 + 26fec: 2c800015 stw r18,0(r5) + 26ff0: 84a1c83a sub r16,r16,r18 + 26ff4: 1000131e bne r2,zero,27044 <__sflush_r+0x158> + 26ff8: 28800517 ldw r2,20(r5) + 26ffc: 88800215 stw r2,8(r17) + 27000: 04000316 blt zero,r16,27010 <__sflush_r+0x124> + 27004: 003fed06 br 26fbc <_gp+0xfffeaa84> + 27008: 90a5883a add r18,r18,r2 + 2700c: 043feb0e bge zero,r16,26fbc <_gp+0xfffeaa84> + 27010: 88800917 ldw r2,36(r17) + 27014: 89400717 ldw r5,28(r17) + 27018: 800f883a mov r7,r16 + 2701c: 900d883a mov r6,r18 + 27020: 9809883a mov r4,r19 + 27024: 103ee83a callr r2 + 27028: 80a1c83a sub r16,r16,r2 + 2702c: 00bff616 blt zero,r2,27008 <_gp+0xfffeaad0> + 27030: 88c0030b ldhu r3,12(r17) + 27034: 00bfffc4 movi r2,-1 + 27038: 18c01014 ori r3,r3,64 + 2703c: 88c0030d sth r3,12(r17) + 27040: 003fdf06 br 26fc0 <_gp+0xfffeaa88> + 27044: 0005883a mov r2,zero + 27048: 003fec06 br 26ffc <_gp+0xfffeaac4> + 2704c: 88801415 stw r2,80(r17) + 27050: 003fd206 br 26f9c <_gp+0xfffeaa64> + 27054: 28c00f17 ldw r3,60(r5) + 27058: 00ffb316 blt zero,r3,26f28 <_gp+0xfffea9f0> + 2705c: 003fd706 br 26fbc <_gp+0xfffeaa84> + 27060: 89400717 ldw r5,28(r17) + 27064: 000d883a mov r6,zero + 27068: 01c00044 movi r7,1 + 2706c: 9809883a mov r4,r19 + 27070: 403ee83a callr r8 + 27074: 100d883a mov r6,r2 + 27078: 00bfffc4 movi r2,-1 + 2707c: 30801426 beq r6,r2,270d0 <__sflush_r+0x1e4> + 27080: 8880030b ldhu r2,12(r17) + 27084: 8a000a17 ldw r8,40(r17) + 27088: 003fae06 br 26f44 <_gp+0xfffeaa0c> + 2708c: 98c00017 ldw r3,0(r19) + 27090: 183fba26 beq r3,zero,26f7c <_gp+0xfffeaa44> + 27094: 01000744 movi r4,29 + 27098: 19000626 beq r3,r4,270b4 <__sflush_r+0x1c8> + 2709c: 01000584 movi r4,22 + 270a0: 19000426 beq r3,r4,270b4 <__sflush_r+0x1c8> + 270a4: 88c0030b ldhu r3,12(r17) + 270a8: 18c01014 ori r3,r3,64 + 270ac: 88c0030d sth r3,12(r17) + 270b0: 003fc306 br 26fc0 <_gp+0xfffeaa88> + 270b4: 8880030b ldhu r2,12(r17) + 270b8: 88c00417 ldw r3,16(r17) + 270bc: 88000115 stw zero,4(r17) + 270c0: 10bdffcc andi r2,r2,63487 + 270c4: 8880030d sth r2,12(r17) + 270c8: 88c00015 stw r3,0(r17) + 270cc: 003fb306 br 26f9c <_gp+0xfffeaa64> + 270d0: 98800017 ldw r2,0(r19) + 270d4: 103fea26 beq r2,zero,27080 <_gp+0xfffeab48> + 270d8: 00c00744 movi r3,29 + 270dc: 10c00226 beq r2,r3,270e8 <__sflush_r+0x1fc> + 270e0: 00c00584 movi r3,22 + 270e4: 10c0031e bne r2,r3,270f4 <__sflush_r+0x208> + 270e8: 9c000015 stw r16,0(r19) + 270ec: 0005883a mov r2,zero + 270f0: 003fb306 br 26fc0 <_gp+0xfffeaa88> + 270f4: 88c0030b ldhu r3,12(r17) + 270f8: 3005883a mov r2,r6 + 270fc: 18c01014 ori r3,r3,64 + 27100: 88c0030d sth r3,12(r17) + 27104: 003fae06 br 26fc0 <_gp+0xfffeaa88> -000276cc <_fflush_r>: - 276cc: defffd04 addi sp,sp,-12 - 276d0: dc000115 stw r16,4(sp) - 276d4: dfc00215 stw ra,8(sp) - 276d8: 2021883a mov r16,r4 - 276dc: 20000226 beq r4,zero,276e8 <_fflush_r+0x1c> - 276e0: 20800e17 ldw r2,56(r4) - 276e4: 10000c26 beq r2,zero,27718 <_fflush_r+0x4c> - 276e8: 2880030f ldh r2,12(r5) - 276ec: 1000051e bne r2,zero,27704 <_fflush_r+0x38> - 276f0: 0005883a mov r2,zero - 276f4: dfc00217 ldw ra,8(sp) - 276f8: dc000117 ldw r16,4(sp) - 276fc: dec00304 addi sp,sp,12 - 27700: f800283a ret - 27704: 8009883a mov r4,r16 - 27708: dfc00217 ldw ra,8(sp) - 2770c: dc000117 ldw r16,4(sp) - 27710: dec00304 addi sp,sp,12 - 27714: 00274b01 jmpi 274b0 <__sflush_r> - 27718: d9400015 stw r5,0(sp) - 2771c: 0027aa80 call 27aa8 <__sinit> - 27720: d9400017 ldw r5,0(sp) - 27724: 003ff006 br 276e8 <_fflush_r+0x1c> +00027108 <_fflush_r>: + 27108: defffd04 addi sp,sp,-12 + 2710c: dc000115 stw r16,4(sp) + 27110: dfc00215 stw ra,8(sp) + 27114: 2021883a mov r16,r4 + 27118: 20000226 beq r4,zero,27124 <_fflush_r+0x1c> + 2711c: 20800e17 ldw r2,56(r4) + 27120: 10000c26 beq r2,zero,27154 <_fflush_r+0x4c> + 27124: 2880030f ldh r2,12(r5) + 27128: 1000051e bne r2,zero,27140 <_fflush_r+0x38> + 2712c: 0005883a mov r2,zero + 27130: dfc00217 ldw ra,8(sp) + 27134: dc000117 ldw r16,4(sp) + 27138: dec00304 addi sp,sp,12 + 2713c: f800283a ret + 27140: 8009883a mov r4,r16 + 27144: dfc00217 ldw ra,8(sp) + 27148: dc000117 ldw r16,4(sp) + 2714c: dec00304 addi sp,sp,12 + 27150: 0026eec1 jmpi 26eec <__sflush_r> + 27154: d9400015 stw r5,0(sp) + 27158: 00274e40 call 274e4 <__sinit> + 2715c: d9400017 ldw r5,0(sp) + 27160: 003ff006 br 27124 <_gp+0xfffeabec> -00027728 : - 27728: 20000526 beq r4,zero,27740 - 2772c: 008000f4 movhi r2,3 - 27730: 10939f04 addi r2,r2,20092 - 27734: 200b883a mov r5,r4 - 27738: 11000017 ldw r4,0(r2) - 2773c: 00276cc1 jmpi 276cc <_fflush_r> - 27740: 008000f4 movhi r2,3 - 27744: 10939e04 addi r2,r2,20088 - 27748: 11000017 ldw r4,0(r2) - 2774c: 014000b4 movhi r5,2 - 27750: 295db304 addi r5,r5,30412 - 27754: 00284ac1 jmpi 284ac <_fwalk_reent> +00027164 : + 27164: 20000526 beq r4,zero,2717c + 27168: 008000f4 movhi r2,3 + 2716c: 10915404 addi r2,r2,17744 + 27170: 200b883a mov r5,r4 + 27174: 11000017 ldw r4,0(r2) + 27178: 00271081 jmpi 27108 <_fflush_r> + 2717c: 008000f4 movhi r2,3 + 27180: 10915304 addi r2,r2,17740 + 27184: 11000017 ldw r4,0(r2) + 27188: 014000b4 movhi r5,2 + 2718c: 295c4204 addi r5,r5,28936 + 27190: 0027ee81 jmpi 27ee8 <_fwalk_reent> -00027758 <__fp_unlock>: - 27758: 0005883a mov r2,zero - 2775c: f800283a ret +00027194 <__fp_unlock>: + 27194: 0005883a mov r2,zero + 27198: f800283a ret -00027760 <_cleanup_r>: - 27760: 014000f4 movhi r5,3 - 27764: 296ffb04 addi r5,r5,-16404 - 27768: 00284ac1 jmpi 284ac <_fwalk_reent> +0002719c <_cleanup_r>: + 2719c: 014000f4 movhi r5,3 + 271a0: 296e0e04 addi r5,r5,-18376 + 271a4: 0027ee81 jmpi 27ee8 <_fwalk_reent> -0002776c <__sinit.part.1>: - 2776c: defff704 addi sp,sp,-36 - 27770: 00c000b4 movhi r3,2 - 27774: dfc00815 stw ra,32(sp) - 27778: ddc00715 stw r23,28(sp) - 2777c: dd800615 stw r22,24(sp) - 27780: dd400515 stw r21,20(sp) - 27784: dd000415 stw r20,16(sp) - 27788: dcc00315 stw r19,12(sp) - 2778c: dc800215 stw r18,8(sp) - 27790: dc400115 stw r17,4(sp) - 27794: dc000015 stw r16,0(sp) - 27798: 18ddd804 addi r3,r3,30560 - 2779c: 24000117 ldw r16,4(r4) - 277a0: 20c00f15 stw r3,60(r4) - 277a4: 2080bb04 addi r2,r4,748 - 277a8: 00c000c4 movi r3,3 - 277ac: 20c0b915 stw r3,740(r4) - 277b0: 2080ba15 stw r2,744(r4) - 277b4: 2000b815 stw zero,736(r4) - 277b8: 05c00204 movi r23,8 - 277bc: 00800104 movi r2,4 - 277c0: 2025883a mov r18,r4 - 277c4: b80d883a mov r6,r23 - 277c8: 81001704 addi r4,r16,92 - 277cc: 000b883a mov r5,zero - 277d0: 80000015 stw zero,0(r16) - 277d4: 80000115 stw zero,4(r16) - 277d8: 80000215 stw zero,8(r16) - 277dc: 8080030d sth r2,12(r16) - 277e0: 80001915 stw zero,100(r16) - 277e4: 8000038d sth zero,14(r16) - 277e8: 80000415 stw zero,16(r16) - 277ec: 80000515 stw zero,20(r16) - 277f0: 80000615 stw zero,24(r16) - 277f4: 00234080 call 23408 - 277f8: 058000f4 movhi r22,3 - 277fc: 94400217 ldw r17,8(r18) - 27800: 054000f4 movhi r21,3 - 27804: 050000f4 movhi r20,3 - 27808: 04c000f4 movhi r19,3 - 2780c: b5a92f04 addi r22,r22,-23364 - 27810: ad694604 addi r21,r21,-23272 - 27814: a5296504 addi r20,r20,-23148 - 27818: 9ce97c04 addi r19,r19,-23056 - 2781c: 85800815 stw r22,32(r16) - 27820: 85400915 stw r21,36(r16) - 27824: 85000a15 stw r20,40(r16) - 27828: 84c00b15 stw r19,44(r16) - 2782c: 84000715 stw r16,28(r16) - 27830: 00800284 movi r2,10 - 27834: 8880030d sth r2,12(r17) - 27838: 00800044 movi r2,1 - 2783c: b80d883a mov r6,r23 - 27840: 89001704 addi r4,r17,92 - 27844: 000b883a mov r5,zero - 27848: 88000015 stw zero,0(r17) - 2784c: 88000115 stw zero,4(r17) - 27850: 88000215 stw zero,8(r17) - 27854: 88001915 stw zero,100(r17) - 27858: 8880038d sth r2,14(r17) - 2785c: 88000415 stw zero,16(r17) - 27860: 88000515 stw zero,20(r17) - 27864: 88000615 stw zero,24(r17) - 27868: 00234080 call 23408 - 2786c: 94000317 ldw r16,12(r18) - 27870: 00800484 movi r2,18 - 27874: 8c400715 stw r17,28(r17) - 27878: 8d800815 stw r22,32(r17) - 2787c: 8d400915 stw r21,36(r17) - 27880: 8d000a15 stw r20,40(r17) - 27884: 8cc00b15 stw r19,44(r17) - 27888: 8080030d sth r2,12(r16) - 2788c: 00800084 movi r2,2 - 27890: 80000015 stw zero,0(r16) - 27894: 80000115 stw zero,4(r16) - 27898: 80000215 stw zero,8(r16) - 2789c: 80001915 stw zero,100(r16) - 278a0: 8080038d sth r2,14(r16) - 278a4: 80000415 stw zero,16(r16) - 278a8: 80000515 stw zero,20(r16) - 278ac: 80000615 stw zero,24(r16) - 278b0: b80d883a mov r6,r23 - 278b4: 000b883a mov r5,zero - 278b8: 81001704 addi r4,r16,92 - 278bc: 00234080 call 23408 - 278c0: 00800044 movi r2,1 - 278c4: 84000715 stw r16,28(r16) - 278c8: 85800815 stw r22,32(r16) - 278cc: 85400915 stw r21,36(r16) - 278d0: 85000a15 stw r20,40(r16) - 278d4: 84c00b15 stw r19,44(r16) - 278d8: 90800e15 stw r2,56(r18) - 278dc: dfc00817 ldw ra,32(sp) - 278e0: ddc00717 ldw r23,28(sp) - 278e4: dd800617 ldw r22,24(sp) - 278e8: dd400517 ldw r21,20(sp) - 278ec: dd000417 ldw r20,16(sp) - 278f0: dcc00317 ldw r19,12(sp) - 278f4: dc800217 ldw r18,8(sp) - 278f8: dc400117 ldw r17,4(sp) - 278fc: dc000017 ldw r16,0(sp) - 27900: dec00904 addi sp,sp,36 - 27904: f800283a ret +000271a8 <__sinit.part.1>: + 271a8: defff704 addi sp,sp,-36 + 271ac: 00c000b4 movhi r3,2 + 271b0: dfc00815 stw ra,32(sp) + 271b4: ddc00715 stw r23,28(sp) + 271b8: dd800615 stw r22,24(sp) + 271bc: dd400515 stw r21,20(sp) + 271c0: dd000415 stw r20,16(sp) + 271c4: dcc00315 stw r19,12(sp) + 271c8: dc800215 stw r18,8(sp) + 271cc: dc400115 stw r17,4(sp) + 271d0: dc000015 stw r16,0(sp) + 271d4: 18dc6704 addi r3,r3,29084 + 271d8: 24000117 ldw r16,4(r4) + 271dc: 20c00f15 stw r3,60(r4) + 271e0: 2080bb04 addi r2,r4,748 + 271e4: 00c000c4 movi r3,3 + 271e8: 20c0b915 stw r3,740(r4) + 271ec: 2080ba15 stw r2,744(r4) + 271f0: 2000b815 stw zero,736(r4) + 271f4: 05c00204 movi r23,8 + 271f8: 00800104 movi r2,4 + 271fc: 2025883a mov r18,r4 + 27200: b80d883a mov r6,r23 + 27204: 81001704 addi r4,r16,92 + 27208: 000b883a mov r5,zero + 2720c: 80000015 stw zero,0(r16) + 27210: 80000115 stw zero,4(r16) + 27214: 80000215 stw zero,8(r16) + 27218: 8080030d sth r2,12(r16) + 2721c: 80001915 stw zero,100(r16) + 27220: 8000038d sth zero,14(r16) + 27224: 80000415 stw zero,16(r16) + 27228: 80000515 stw zero,20(r16) + 2722c: 80000615 stw zero,24(r16) + 27230: 0022ecc0 call 22ecc + 27234: 058000f4 movhi r22,3 + 27238: 94400217 ldw r17,8(r18) + 2723c: 054000f4 movhi r21,3 + 27240: 050000f4 movhi r20,3 + 27244: 04c000f4 movhi r19,3 + 27248: b5a74204 addi r22,r22,-25336 + 2724c: ad675904 addi r21,r21,-25244 + 27250: a5277804 addi r20,r20,-25120 + 27254: 9ce78f04 addi r19,r19,-25028 + 27258: 85800815 stw r22,32(r16) + 2725c: 85400915 stw r21,36(r16) + 27260: 85000a15 stw r20,40(r16) + 27264: 84c00b15 stw r19,44(r16) + 27268: 84000715 stw r16,28(r16) + 2726c: 00800284 movi r2,10 + 27270: 8880030d sth r2,12(r17) + 27274: 00800044 movi r2,1 + 27278: b80d883a mov r6,r23 + 2727c: 89001704 addi r4,r17,92 + 27280: 000b883a mov r5,zero + 27284: 88000015 stw zero,0(r17) + 27288: 88000115 stw zero,4(r17) + 2728c: 88000215 stw zero,8(r17) + 27290: 88001915 stw zero,100(r17) + 27294: 8880038d sth r2,14(r17) + 27298: 88000415 stw zero,16(r17) + 2729c: 88000515 stw zero,20(r17) + 272a0: 88000615 stw zero,24(r17) + 272a4: 0022ecc0 call 22ecc + 272a8: 94000317 ldw r16,12(r18) + 272ac: 00800484 movi r2,18 + 272b0: 8c400715 stw r17,28(r17) + 272b4: 8d800815 stw r22,32(r17) + 272b8: 8d400915 stw r21,36(r17) + 272bc: 8d000a15 stw r20,40(r17) + 272c0: 8cc00b15 stw r19,44(r17) + 272c4: 8080030d sth r2,12(r16) + 272c8: 00800084 movi r2,2 + 272cc: 80000015 stw zero,0(r16) + 272d0: 80000115 stw zero,4(r16) + 272d4: 80000215 stw zero,8(r16) + 272d8: 80001915 stw zero,100(r16) + 272dc: 8080038d sth r2,14(r16) + 272e0: 80000415 stw zero,16(r16) + 272e4: 80000515 stw zero,20(r16) + 272e8: 80000615 stw zero,24(r16) + 272ec: b80d883a mov r6,r23 + 272f0: 000b883a mov r5,zero + 272f4: 81001704 addi r4,r16,92 + 272f8: 0022ecc0 call 22ecc + 272fc: 00800044 movi r2,1 + 27300: 84000715 stw r16,28(r16) + 27304: 85800815 stw r22,32(r16) + 27308: 85400915 stw r21,36(r16) + 2730c: 85000a15 stw r20,40(r16) + 27310: 84c00b15 stw r19,44(r16) + 27314: 90800e15 stw r2,56(r18) + 27318: dfc00817 ldw ra,32(sp) + 2731c: ddc00717 ldw r23,28(sp) + 27320: dd800617 ldw r22,24(sp) + 27324: dd400517 ldw r21,20(sp) + 27328: dd000417 ldw r20,16(sp) + 2732c: dcc00317 ldw r19,12(sp) + 27330: dc800217 ldw r18,8(sp) + 27334: dc400117 ldw r17,4(sp) + 27338: dc000017 ldw r16,0(sp) + 2733c: dec00904 addi sp,sp,36 + 27340: f800283a ret -00027908 <__fp_lock>: - 27908: 0005883a mov r2,zero - 2790c: f800283a ret +00027344 <__fp_lock>: + 27344: 0005883a mov r2,zero + 27348: f800283a ret -00027910 <__sfmoreglue>: - 27910: defffc04 addi sp,sp,-16 - 27914: dc400115 stw r17,4(sp) - 27918: 2c7fffc4 addi r17,r5,-1 - 2791c: 8c401a24 muli r17,r17,104 - 27920: dc800215 stw r18,8(sp) - 27924: 2825883a mov r18,r5 - 27928: 89401d04 addi r5,r17,116 - 2792c: dc000015 stw r16,0(sp) - 27930: dfc00315 stw ra,12(sp) - 27934: 0022bfc0 call 22bfc <_malloc_r> - 27938: 1021883a mov r16,r2 - 2793c: 10000726 beq r2,zero,2795c <__sfmoreglue+0x4c> - 27940: 11000304 addi r4,r2,12 - 27944: 10000015 stw zero,0(r2) - 27948: 14800115 stw r18,4(r2) - 2794c: 11000215 stw r4,8(r2) - 27950: 89801a04 addi r6,r17,104 - 27954: 000b883a mov r5,zero - 27958: 00234080 call 23408 - 2795c: 8005883a mov r2,r16 - 27960: dfc00317 ldw ra,12(sp) - 27964: dc800217 ldw r18,8(sp) - 27968: dc400117 ldw r17,4(sp) - 2796c: dc000017 ldw r16,0(sp) - 27970: dec00404 addi sp,sp,16 - 27974: f800283a ret +0002734c <__sfmoreglue>: + 2734c: defffc04 addi sp,sp,-16 + 27350: dc400115 stw r17,4(sp) + 27354: 2c7fffc4 addi r17,r5,-1 + 27358: 8c401a24 muli r17,r17,104 + 2735c: dc800215 stw r18,8(sp) + 27360: 2825883a mov r18,r5 + 27364: 89401d04 addi r5,r17,116 + 27368: dc000015 stw r16,0(sp) + 2736c: dfc00315 stw ra,12(sp) + 27370: 00226c00 call 226c0 <_malloc_r> + 27374: 1021883a mov r16,r2 + 27378: 10000726 beq r2,zero,27398 <__sfmoreglue+0x4c> + 2737c: 11000304 addi r4,r2,12 + 27380: 10000015 stw zero,0(r2) + 27384: 14800115 stw r18,4(r2) + 27388: 11000215 stw r4,8(r2) + 2738c: 89801a04 addi r6,r17,104 + 27390: 000b883a mov r5,zero + 27394: 0022ecc0 call 22ecc + 27398: 8005883a mov r2,r16 + 2739c: dfc00317 ldw ra,12(sp) + 273a0: dc800217 ldw r18,8(sp) + 273a4: dc400117 ldw r17,4(sp) + 273a8: dc000017 ldw r16,0(sp) + 273ac: dec00404 addi sp,sp,16 + 273b0: f800283a ret -00027978 <__sfp>: - 27978: defffb04 addi sp,sp,-20 - 2797c: dc000015 stw r16,0(sp) - 27980: 040000f4 movhi r16,3 - 27984: 84139e04 addi r16,r16,20088 - 27988: dcc00315 stw r19,12(sp) - 2798c: 2027883a mov r19,r4 - 27990: 81000017 ldw r4,0(r16) - 27994: dfc00415 stw ra,16(sp) - 27998: dc800215 stw r18,8(sp) - 2799c: 20800e17 ldw r2,56(r4) - 279a0: dc400115 stw r17,4(sp) - 279a4: 1000021e bne r2,zero,279b0 <__sfp+0x38> - 279a8: 002776c0 call 2776c <__sinit.part.1> - 279ac: 81000017 ldw r4,0(r16) - 279b0: 2480b804 addi r18,r4,736 - 279b4: 047fffc4 movi r17,-1 - 279b8: 91000117 ldw r4,4(r18) - 279bc: 94000217 ldw r16,8(r18) - 279c0: 213fffc4 addi r4,r4,-1 - 279c4: 20000a16 blt r4,zero,279f0 <__sfp+0x78> - 279c8: 8080030f ldh r2,12(r16) - 279cc: 10000c26 beq r2,zero,27a00 <__sfp+0x88> - 279d0: 80c01d04 addi r3,r16,116 - 279d4: 00000206 br 279e0 <__sfp+0x68> - 279d8: 18bfe60f ldh r2,-104(r3) - 279dc: 10000826 beq r2,zero,27a00 <__sfp+0x88> - 279e0: 213fffc4 addi r4,r4,-1 - 279e4: 1c3ffd04 addi r16,r3,-12 - 279e8: 18c01a04 addi r3,r3,104 - 279ec: 247ffa1e bne r4,r17,279d8 <__sfp+0x60> - 279f0: 90800017 ldw r2,0(r18) - 279f4: 10001d26 beq r2,zero,27a6c <__sfp+0xf4> - 279f8: 1025883a mov r18,r2 - 279fc: 003fee06 br 279b8 <__sfp+0x40> - 27a00: 00bfffc4 movi r2,-1 - 27a04: 8080038d sth r2,14(r16) - 27a08: 00800044 movi r2,1 - 27a0c: 8080030d sth r2,12(r16) - 27a10: 80001915 stw zero,100(r16) - 27a14: 80000015 stw zero,0(r16) - 27a18: 80000215 stw zero,8(r16) - 27a1c: 80000115 stw zero,4(r16) - 27a20: 80000415 stw zero,16(r16) - 27a24: 80000515 stw zero,20(r16) - 27a28: 80000615 stw zero,24(r16) - 27a2c: 01800204 movi r6,8 - 27a30: 000b883a mov r5,zero - 27a34: 81001704 addi r4,r16,92 - 27a38: 00234080 call 23408 - 27a3c: 8005883a mov r2,r16 - 27a40: 80000c15 stw zero,48(r16) - 27a44: 80000d15 stw zero,52(r16) - 27a48: 80001115 stw zero,68(r16) - 27a4c: 80001215 stw zero,72(r16) - 27a50: dfc00417 ldw ra,16(sp) - 27a54: dcc00317 ldw r19,12(sp) - 27a58: dc800217 ldw r18,8(sp) - 27a5c: dc400117 ldw r17,4(sp) - 27a60: dc000017 ldw r16,0(sp) - 27a64: dec00504 addi sp,sp,20 - 27a68: f800283a ret - 27a6c: 01400104 movi r5,4 - 27a70: 9809883a mov r4,r19 - 27a74: 00279100 call 27910 <__sfmoreglue> - 27a78: 90800015 stw r2,0(r18) - 27a7c: 103fde1e bne r2,zero,279f8 <__sfp+0x80> - 27a80: 00800304 movi r2,12 - 27a84: 98800015 stw r2,0(r19) - 27a88: 0005883a mov r2,zero - 27a8c: 003ff006 br 27a50 <__sfp+0xd8> +000273b4 <__sfp>: + 273b4: defffb04 addi sp,sp,-20 + 273b8: dc000015 stw r16,0(sp) + 273bc: 040000f4 movhi r16,3 + 273c0: 84115304 addi r16,r16,17740 + 273c4: dcc00315 stw r19,12(sp) + 273c8: 2027883a mov r19,r4 + 273cc: 81000017 ldw r4,0(r16) + 273d0: dfc00415 stw ra,16(sp) + 273d4: dc800215 stw r18,8(sp) + 273d8: 20800e17 ldw r2,56(r4) + 273dc: dc400115 stw r17,4(sp) + 273e0: 1000021e bne r2,zero,273ec <__sfp+0x38> + 273e4: 00271a80 call 271a8 <__sinit.part.1> + 273e8: 81000017 ldw r4,0(r16) + 273ec: 2480b804 addi r18,r4,736 + 273f0: 047fffc4 movi r17,-1 + 273f4: 91000117 ldw r4,4(r18) + 273f8: 94000217 ldw r16,8(r18) + 273fc: 213fffc4 addi r4,r4,-1 + 27400: 20000a16 blt r4,zero,2742c <__sfp+0x78> + 27404: 8080030f ldh r2,12(r16) + 27408: 10000c26 beq r2,zero,2743c <__sfp+0x88> + 2740c: 80c01d04 addi r3,r16,116 + 27410: 00000206 br 2741c <__sfp+0x68> + 27414: 18bfe60f ldh r2,-104(r3) + 27418: 10000826 beq r2,zero,2743c <__sfp+0x88> + 2741c: 213fffc4 addi r4,r4,-1 + 27420: 1c3ffd04 addi r16,r3,-12 + 27424: 18c01a04 addi r3,r3,104 + 27428: 247ffa1e bne r4,r17,27414 <_gp+0xfffeaedc> + 2742c: 90800017 ldw r2,0(r18) + 27430: 10001d26 beq r2,zero,274a8 <__sfp+0xf4> + 27434: 1025883a mov r18,r2 + 27438: 003fee06 br 273f4 <_gp+0xfffeaebc> + 2743c: 00bfffc4 movi r2,-1 + 27440: 8080038d sth r2,14(r16) + 27444: 00800044 movi r2,1 + 27448: 8080030d sth r2,12(r16) + 2744c: 80001915 stw zero,100(r16) + 27450: 80000015 stw zero,0(r16) + 27454: 80000215 stw zero,8(r16) + 27458: 80000115 stw zero,4(r16) + 2745c: 80000415 stw zero,16(r16) + 27460: 80000515 stw zero,20(r16) + 27464: 80000615 stw zero,24(r16) + 27468: 01800204 movi r6,8 + 2746c: 000b883a mov r5,zero + 27470: 81001704 addi r4,r16,92 + 27474: 0022ecc0 call 22ecc + 27478: 8005883a mov r2,r16 + 2747c: 80000c15 stw zero,48(r16) + 27480: 80000d15 stw zero,52(r16) + 27484: 80001115 stw zero,68(r16) + 27488: 80001215 stw zero,72(r16) + 2748c: dfc00417 ldw ra,16(sp) + 27490: dcc00317 ldw r19,12(sp) + 27494: dc800217 ldw r18,8(sp) + 27498: dc400117 ldw r17,4(sp) + 2749c: dc000017 ldw r16,0(sp) + 274a0: dec00504 addi sp,sp,20 + 274a4: f800283a ret + 274a8: 01400104 movi r5,4 + 274ac: 9809883a mov r4,r19 + 274b0: 002734c0 call 2734c <__sfmoreglue> + 274b4: 90800015 stw r2,0(r18) + 274b8: 103fde1e bne r2,zero,27434 <_gp+0xfffeaefc> + 274bc: 00800304 movi r2,12 + 274c0: 98800015 stw r2,0(r19) + 274c4: 0005883a mov r2,zero + 274c8: 003ff006 br 2748c <_gp+0xfffeaf54> -00027a90 <_cleanup>: - 27a90: 008000f4 movhi r2,3 - 27a94: 10939e04 addi r2,r2,20088 - 27a98: 11000017 ldw r4,0(r2) - 27a9c: 014000f4 movhi r5,3 - 27aa0: 296ffb04 addi r5,r5,-16404 - 27aa4: 00284ac1 jmpi 284ac <_fwalk_reent> +000274cc <_cleanup>: + 274cc: 008000f4 movhi r2,3 + 274d0: 10915304 addi r2,r2,17740 + 274d4: 11000017 ldw r4,0(r2) + 274d8: 014000f4 movhi r5,3 + 274dc: 296e0e04 addi r5,r5,-18376 + 274e0: 0027ee81 jmpi 27ee8 <_fwalk_reent> -00027aa8 <__sinit>: - 27aa8: 20800e17 ldw r2,56(r4) - 27aac: 10000126 beq r2,zero,27ab4 <__sinit+0xc> - 27ab0: f800283a ret - 27ab4: 002776c1 jmpi 2776c <__sinit.part.1> +000274e4 <__sinit>: + 274e4: 20800e17 ldw r2,56(r4) + 274e8: 10000126 beq r2,zero,274f0 <__sinit+0xc> + 274ec: f800283a ret + 274f0: 00271a81 jmpi 271a8 <__sinit.part.1> -00027ab8 <__sfp_lock_acquire>: - 27ab8: f800283a ret +000274f4 <__sfp_lock_acquire>: + 274f4: f800283a ret -00027abc <__sfp_lock_release>: - 27abc: f800283a ret +000274f8 <__sfp_lock_release>: + 274f8: f800283a ret -00027ac0 <__sinit_lock_acquire>: - 27ac0: f800283a ret +000274fc <__sinit_lock_acquire>: + 274fc: f800283a ret -00027ac4 <__sinit_lock_release>: - 27ac4: f800283a ret +00027500 <__sinit_lock_release>: + 27500: f800283a ret -00027ac8 <__fp_lock_all>: - 27ac8: 008000f4 movhi r2,3 - 27acc: 10939f04 addi r2,r2,20092 - 27ad0: 11000017 ldw r4,0(r2) - 27ad4: 014000b4 movhi r5,2 - 27ad8: 295e4204 addi r5,r5,30984 - 27adc: 00283e81 jmpi 283e8 <_fwalk> +00027504 <__fp_lock_all>: + 27504: 008000f4 movhi r2,3 + 27508: 10915404 addi r2,r2,17744 + 2750c: 11000017 ldw r4,0(r2) + 27510: 014000b4 movhi r5,2 + 27514: 295cd104 addi r5,r5,29508 + 27518: 0027e241 jmpi 27e24 <_fwalk> -00027ae0 <__fp_unlock_all>: - 27ae0: 008000f4 movhi r2,3 - 27ae4: 10939f04 addi r2,r2,20092 - 27ae8: 11000017 ldw r4,0(r2) - 27aec: 014000b4 movhi r5,2 - 27af0: 295dd604 addi r5,r5,30552 - 27af4: 00283e81 jmpi 283e8 <_fwalk> +0002751c <__fp_unlock_all>: + 2751c: 008000f4 movhi r2,3 + 27520: 10915404 addi r2,r2,17744 + 27524: 11000017 ldw r4,0(r2) + 27528: 014000b4 movhi r5,2 + 2752c: 295c6504 addi r5,r5,29076 + 27530: 0027e241 jmpi 27e24 <_fwalk> -00027af8 <_malloc_trim_r>: - 27af8: defffb04 addi sp,sp,-20 - 27afc: dcc00315 stw r19,12(sp) - 27b00: 04c000f4 movhi r19,3 - 27b04: dc800215 stw r18,8(sp) - 27b08: dc400115 stw r17,4(sp) - 27b0c: dc000015 stw r16,0(sp) - 27b10: dfc00415 stw ra,16(sp) - 27b14: 2821883a mov r16,r5 - 27b18: 9ccdf904 addi r19,r19,14308 - 27b1c: 2025883a mov r18,r4 - 27b20: 002fea40 call 2fea4 <__malloc_lock> - 27b24: 98800217 ldw r2,8(r19) - 27b28: 14400117 ldw r17,4(r2) - 27b2c: 00bfff04 movi r2,-4 - 27b30: 88a2703a and r17,r17,r2 - 27b34: 8c21c83a sub r16,r17,r16 - 27b38: 8403fbc4 addi r16,r16,4079 - 27b3c: 8020d33a srli r16,r16,12 - 27b40: 0083ffc4 movi r2,4095 - 27b44: 843fffc4 addi r16,r16,-1 - 27b48: 8020933a slli r16,r16,12 - 27b4c: 1400060e bge r2,r16,27b68 <_malloc_trim_r+0x70> - 27b50: 000b883a mov r5,zero - 27b54: 9009883a mov r4,r18 - 27b58: 00237180 call 23718 <_sbrk_r> - 27b5c: 98c00217 ldw r3,8(r19) - 27b60: 1c47883a add r3,r3,r17 - 27b64: 10c00a26 beq r2,r3,27b90 <_malloc_trim_r+0x98> - 27b68: 9009883a mov r4,r18 - 27b6c: 002fec80 call 2fec8 <__malloc_unlock> - 27b70: 0005883a mov r2,zero - 27b74: dfc00417 ldw ra,16(sp) - 27b78: dcc00317 ldw r19,12(sp) - 27b7c: dc800217 ldw r18,8(sp) - 27b80: dc400117 ldw r17,4(sp) - 27b84: dc000017 ldw r16,0(sp) - 27b88: dec00504 addi sp,sp,20 - 27b8c: f800283a ret - 27b90: 040bc83a sub r5,zero,r16 - 27b94: 9009883a mov r4,r18 - 27b98: 00237180 call 23718 <_sbrk_r> - 27b9c: 00ffffc4 movi r3,-1 - 27ba0: 10c00d26 beq r2,r3,27bd8 <_malloc_trim_r+0xe0> - 27ba4: 00c000f4 movhi r3,3 - 27ba8: 18dc6404 addi r3,r3,29072 - 27bac: 18800017 ldw r2,0(r3) - 27bb0: 99000217 ldw r4,8(r19) - 27bb4: 8c23c83a sub r17,r17,r16 - 27bb8: 8c400054 ori r17,r17,1 - 27bbc: 1421c83a sub r16,r2,r16 - 27bc0: 24400115 stw r17,4(r4) - 27bc4: 9009883a mov r4,r18 - 27bc8: 1c000015 stw r16,0(r3) - 27bcc: 002fec80 call 2fec8 <__malloc_unlock> - 27bd0: 00800044 movi r2,1 - 27bd4: 003fe706 br 27b74 <_malloc_trim_r+0x7c> - 27bd8: 000b883a mov r5,zero - 27bdc: 9009883a mov r4,r18 - 27be0: 00237180 call 23718 <_sbrk_r> - 27be4: 99000217 ldw r4,8(r19) - 27be8: 014003c4 movi r5,15 - 27bec: 1107c83a sub r3,r2,r4 - 27bf0: 28ffdd0e bge r5,r3,27b68 <_malloc_trim_r+0x70> - 27bf4: 014000f4 movhi r5,3 - 27bf8: 2953a004 addi r5,r5,20096 - 27bfc: 29400017 ldw r5,0(r5) - 27c00: 18c00054 ori r3,r3,1 - 27c04: 20c00115 stw r3,4(r4) - 27c08: 00c000f4 movhi r3,3 - 27c0c: 1145c83a sub r2,r2,r5 - 27c10: 18dc6404 addi r3,r3,29072 - 27c14: 18800015 stw r2,0(r3) - 27c18: 003fd306 br 27b68 <_malloc_trim_r+0x70> +00027534 <_malloc_trim_r>: + 27534: defffb04 addi sp,sp,-20 + 27538: dcc00315 stw r19,12(sp) + 2753c: 04c000f4 movhi r19,3 + 27540: dc800215 stw r18,8(sp) + 27544: dc400115 stw r17,4(sp) + 27548: dc000015 stw r16,0(sp) + 2754c: dfc00415 stw ra,16(sp) + 27550: 2821883a mov r16,r5 + 27554: 9ccaa304 addi r19,r19,10892 + 27558: 2025883a mov r18,r4 + 2755c: 002f5800 call 2f580 <__malloc_lock> + 27560: 98800217 ldw r2,8(r19) + 27564: 14400117 ldw r17,4(r2) + 27568: 00bfff04 movi r2,-4 + 2756c: 88a2703a and r17,r17,r2 + 27570: 8c21c83a sub r16,r17,r16 + 27574: 8403fbc4 addi r16,r16,4079 + 27578: 8020d33a srli r16,r16,12 + 2757c: 0083ffc4 movi r2,4095 + 27580: 843fffc4 addi r16,r16,-1 + 27584: 8020933a slli r16,r16,12 + 27588: 1400060e bge r2,r16,275a4 <_malloc_trim_r+0x70> + 2758c: 000b883a mov r5,zero + 27590: 9009883a mov r4,r18 + 27594: 00231540 call 23154 <_sbrk_r> + 27598: 98c00217 ldw r3,8(r19) + 2759c: 1c47883a add r3,r3,r17 + 275a0: 10c00a26 beq r2,r3,275cc <_malloc_trim_r+0x98> + 275a4: 9009883a mov r4,r18 + 275a8: 002f5a40 call 2f5a4 <__malloc_unlock> + 275ac: 0005883a mov r2,zero + 275b0: dfc00417 ldw ra,16(sp) + 275b4: dcc00317 ldw r19,12(sp) + 275b8: dc800217 ldw r18,8(sp) + 275bc: dc400117 ldw r17,4(sp) + 275c0: dc000017 ldw r16,0(sp) + 275c4: dec00504 addi sp,sp,20 + 275c8: f800283a ret + 275cc: 040bc83a sub r5,zero,r16 + 275d0: 9009883a mov r4,r18 + 275d4: 00231540 call 23154 <_sbrk_r> + 275d8: 00ffffc4 movi r3,-1 + 275dc: 10c00d26 beq r2,r3,27614 <_malloc_trim_r+0xe0> + 275e0: 00c000f4 movhi r3,3 + 275e4: 18da1704 addi r3,r3,26716 + 275e8: 18800017 ldw r2,0(r3) + 275ec: 99000217 ldw r4,8(r19) + 275f0: 8c23c83a sub r17,r17,r16 + 275f4: 8c400054 ori r17,r17,1 + 275f8: 1421c83a sub r16,r2,r16 + 275fc: 24400115 stw r17,4(r4) + 27600: 9009883a mov r4,r18 + 27604: 1c000015 stw r16,0(r3) + 27608: 002f5a40 call 2f5a4 <__malloc_unlock> + 2760c: 00800044 movi r2,1 + 27610: 003fe706 br 275b0 <_gp+0xfffeb078> + 27614: 000b883a mov r5,zero + 27618: 9009883a mov r4,r18 + 2761c: 00231540 call 23154 <_sbrk_r> + 27620: 99000217 ldw r4,8(r19) + 27624: 014003c4 movi r5,15 + 27628: 1107c83a sub r3,r2,r4 + 2762c: 28ffdd0e bge r5,r3,275a4 <_gp+0xfffeb06c> + 27630: 014000f4 movhi r5,3 + 27634: 29515104 addi r5,r5,17732 + 27638: 29400017 ldw r5,0(r5) + 2763c: 18c00054 ori r3,r3,1 + 27640: 20c00115 stw r3,4(r4) + 27644: 00c000f4 movhi r3,3 + 27648: 1145c83a sub r2,r2,r5 + 2764c: 18da1704 addi r3,r3,26716 + 27650: 18800015 stw r2,0(r3) + 27654: 003fd306 br 275a4 <_gp+0xfffeb06c> -00027c1c <_free_r>: - 27c1c: 28004126 beq r5,zero,27d24 <_free_r+0x108> - 27c20: defffd04 addi sp,sp,-12 - 27c24: dc400115 stw r17,4(sp) - 27c28: dc000015 stw r16,0(sp) - 27c2c: 2023883a mov r17,r4 - 27c30: 2821883a mov r16,r5 - 27c34: dfc00215 stw ra,8(sp) - 27c38: 002fea40 call 2fea4 <__malloc_lock> - 27c3c: 81ffff17 ldw r7,-4(r16) - 27c40: 00bfff84 movi r2,-2 - 27c44: 010000f4 movhi r4,3 - 27c48: 81bffe04 addi r6,r16,-8 - 27c4c: 3884703a and r2,r7,r2 - 27c50: 210df904 addi r4,r4,14308 - 27c54: 308b883a add r5,r6,r2 - 27c58: 2a400117 ldw r9,4(r5) - 27c5c: 22000217 ldw r8,8(r4) - 27c60: 00ffff04 movi r3,-4 - 27c64: 48c6703a and r3,r9,r3 - 27c68: 2a005726 beq r5,r8,27dc8 <_free_r+0x1ac> - 27c6c: 28c00115 stw r3,4(r5) - 27c70: 39c0004c andi r7,r7,1 - 27c74: 3800091e bne r7,zero,27c9c <_free_r+0x80> - 27c78: 823ffe17 ldw r8,-8(r16) - 27c7c: 22400204 addi r9,r4,8 - 27c80: 320dc83a sub r6,r6,r8 - 27c84: 31c00217 ldw r7,8(r6) - 27c88: 1205883a add r2,r2,r8 - 27c8c: 3a406526 beq r7,r9,27e24 <_free_r+0x208> - 27c90: 32000317 ldw r8,12(r6) - 27c94: 3a000315 stw r8,12(r7) - 27c98: 41c00215 stw r7,8(r8) - 27c9c: 28cf883a add r7,r5,r3 - 27ca0: 39c00117 ldw r7,4(r7) - 27ca4: 39c0004c andi r7,r7,1 - 27ca8: 38003a26 beq r7,zero,27d94 <_free_r+0x178> - 27cac: 10c00054 ori r3,r2,1 - 27cb0: 30c00115 stw r3,4(r6) - 27cb4: 3087883a add r3,r6,r2 - 27cb8: 18800015 stw r2,0(r3) - 27cbc: 00c07fc4 movi r3,511 - 27cc0: 18801936 bltu r3,r2,27d28 <_free_r+0x10c> - 27cc4: 1004d0fa srli r2,r2,3 - 27cc8: 01c00044 movi r7,1 - 27ccc: 21400117 ldw r5,4(r4) - 27cd0: 10c00044 addi r3,r2,1 - 27cd4: 18c7883a add r3,r3,r3 - 27cd8: 1005d0ba srai r2,r2,2 - 27cdc: 18c7883a add r3,r3,r3 - 27ce0: 18c7883a add r3,r3,r3 - 27ce4: 1907883a add r3,r3,r4 - 27ce8: 3884983a sll r2,r7,r2 - 27cec: 19c00017 ldw r7,0(r3) - 27cf0: 1a3ffe04 addi r8,r3,-8 - 27cf4: 1144b03a or r2,r2,r5 - 27cf8: 32000315 stw r8,12(r6) - 27cfc: 31c00215 stw r7,8(r6) - 27d00: 20800115 stw r2,4(r4) - 27d04: 19800015 stw r6,0(r3) - 27d08: 39800315 stw r6,12(r7) - 27d0c: 8809883a mov r4,r17 - 27d10: dfc00217 ldw ra,8(sp) - 27d14: dc400117 ldw r17,4(sp) - 27d18: dc000017 ldw r16,0(sp) - 27d1c: dec00304 addi sp,sp,12 - 27d20: 002fec81 jmpi 2fec8 <__malloc_unlock> - 27d24: f800283a ret - 27d28: 100ad27a srli r5,r2,9 - 27d2c: 00c00104 movi r3,4 - 27d30: 19404a36 bltu r3,r5,27e5c <_free_r+0x240> - 27d34: 100ad1ba srli r5,r2,6 - 27d38: 28c00e44 addi r3,r5,57 - 27d3c: 18c7883a add r3,r3,r3 - 27d40: 29400e04 addi r5,r5,56 - 27d44: 18c7883a add r3,r3,r3 - 27d48: 18c7883a add r3,r3,r3 - 27d4c: 1909883a add r4,r3,r4 - 27d50: 20c00017 ldw r3,0(r4) - 27d54: 01c000f4 movhi r7,3 - 27d58: 213ffe04 addi r4,r4,-8 - 27d5c: 39cdf904 addi r7,r7,14308 - 27d60: 20c04426 beq r4,r3,27e74 <_free_r+0x258> - 27d64: 01ffff04 movi r7,-4 - 27d68: 19400117 ldw r5,4(r3) - 27d6c: 29ca703a and r5,r5,r7 - 27d70: 1140022e bgeu r2,r5,27d7c <_free_r+0x160> - 27d74: 18c00217 ldw r3,8(r3) - 27d78: 20fffb1e bne r4,r3,27d68 <_free_r+0x14c> - 27d7c: 19000317 ldw r4,12(r3) - 27d80: 31000315 stw r4,12(r6) - 27d84: 30c00215 stw r3,8(r6) - 27d88: 21800215 stw r6,8(r4) - 27d8c: 19800315 stw r6,12(r3) - 27d90: 003fde06 br 27d0c <_free_r+0xf0> - 27d94: 29c00217 ldw r7,8(r5) - 27d98: 10c5883a add r2,r2,r3 - 27d9c: 00c000f4 movhi r3,3 - 27da0: 18cdfb04 addi r3,r3,14316 - 27da4: 38c03b26 beq r7,r3,27e94 <_free_r+0x278> - 27da8: 2a000317 ldw r8,12(r5) - 27dac: 11400054 ori r5,r2,1 - 27db0: 3087883a add r3,r6,r2 - 27db4: 3a000315 stw r8,12(r7) - 27db8: 41c00215 stw r7,8(r8) - 27dbc: 31400115 stw r5,4(r6) - 27dc0: 18800015 stw r2,0(r3) - 27dc4: 003fbd06 br 27cbc <_free_r+0xa0> - 27dc8: 39c0004c andi r7,r7,1 - 27dcc: 10c5883a add r2,r2,r3 - 27dd0: 3800071e bne r7,zero,27df0 <_free_r+0x1d4> - 27dd4: 81fffe17 ldw r7,-8(r16) - 27dd8: 31cdc83a sub r6,r6,r7 - 27ddc: 30c00317 ldw r3,12(r6) - 27de0: 31400217 ldw r5,8(r6) - 27de4: 11c5883a add r2,r2,r7 - 27de8: 28c00315 stw r3,12(r5) - 27dec: 19400215 stw r5,8(r3) - 27df0: 10c00054 ori r3,r2,1 - 27df4: 30c00115 stw r3,4(r6) - 27df8: 00c000f4 movhi r3,3 - 27dfc: 18d3a104 addi r3,r3,20100 - 27e00: 18c00017 ldw r3,0(r3) - 27e04: 21800215 stw r6,8(r4) - 27e08: 10ffc036 bltu r2,r3,27d0c <_free_r+0xf0> - 27e0c: 008000f4 movhi r2,3 - 27e10: 109c5804 addi r2,r2,29024 - 27e14: 11400017 ldw r5,0(r2) - 27e18: 8809883a mov r4,r17 - 27e1c: 0027af80 call 27af8 <_malloc_trim_r> - 27e20: 003fba06 br 27d0c <_free_r+0xf0> - 27e24: 28c9883a add r4,r5,r3 - 27e28: 21000117 ldw r4,4(r4) - 27e2c: 2100004c andi r4,r4,1 - 27e30: 2000391e bne r4,zero,27f18 <_free_r+0x2fc> - 27e34: 29c00217 ldw r7,8(r5) - 27e38: 29000317 ldw r4,12(r5) - 27e3c: 1885883a add r2,r3,r2 - 27e40: 10c00054 ori r3,r2,1 - 27e44: 39000315 stw r4,12(r7) - 27e48: 21c00215 stw r7,8(r4) - 27e4c: 30c00115 stw r3,4(r6) - 27e50: 308d883a add r6,r6,r2 - 27e54: 30800015 stw r2,0(r6) - 27e58: 003fac06 br 27d0c <_free_r+0xf0> - 27e5c: 00c00504 movi r3,20 - 27e60: 19401536 bltu r3,r5,27eb8 <_free_r+0x29c> - 27e64: 28c01704 addi r3,r5,92 - 27e68: 18c7883a add r3,r3,r3 - 27e6c: 294016c4 addi r5,r5,91 - 27e70: 003fb406 br 27d44 <_free_r+0x128> - 27e74: 280bd0ba srai r5,r5,2 - 27e78: 00c00044 movi r3,1 - 27e7c: 38800117 ldw r2,4(r7) - 27e80: 194a983a sll r5,r3,r5 - 27e84: 2007883a mov r3,r4 - 27e88: 2884b03a or r2,r5,r2 - 27e8c: 38800115 stw r2,4(r7) - 27e90: 003fbb06 br 27d80 <_free_r+0x164> - 27e94: 21800515 stw r6,20(r4) - 27e98: 21800415 stw r6,16(r4) - 27e9c: 10c00054 ori r3,r2,1 - 27ea0: 31c00315 stw r7,12(r6) - 27ea4: 31c00215 stw r7,8(r6) - 27ea8: 30c00115 stw r3,4(r6) - 27eac: 308d883a add r6,r6,r2 - 27eb0: 30800015 stw r2,0(r6) - 27eb4: 003f9506 br 27d0c <_free_r+0xf0> - 27eb8: 00c01504 movi r3,84 - 27ebc: 19400536 bltu r3,r5,27ed4 <_free_r+0x2b8> - 27ec0: 100ad33a srli r5,r2,12 - 27ec4: 28c01bc4 addi r3,r5,111 - 27ec8: 18c7883a add r3,r3,r3 - 27ecc: 29401b84 addi r5,r5,110 - 27ed0: 003f9c06 br 27d44 <_free_r+0x128> - 27ed4: 00c05504 movi r3,340 - 27ed8: 19400536 bltu r3,r5,27ef0 <_free_r+0x2d4> - 27edc: 100ad3fa srli r5,r2,15 - 27ee0: 28c01e04 addi r3,r5,120 - 27ee4: 18c7883a add r3,r3,r3 - 27ee8: 29401dc4 addi r5,r5,119 - 27eec: 003f9506 br 27d44 <_free_r+0x128> - 27ef0: 00c15504 movi r3,1364 - 27ef4: 19400536 bltu r3,r5,27f0c <_free_r+0x2f0> - 27ef8: 100ad4ba srli r5,r2,18 - 27efc: 28c01f44 addi r3,r5,125 - 27f00: 18c7883a add r3,r3,r3 - 27f04: 29401f04 addi r5,r5,124 - 27f08: 003f8e06 br 27d44 <_free_r+0x128> - 27f0c: 00c03f84 movi r3,254 - 27f10: 01401f84 movi r5,126 - 27f14: 003f8b06 br 27d44 <_free_r+0x128> - 27f18: 10c00054 ori r3,r2,1 - 27f1c: 30c00115 stw r3,4(r6) - 27f20: 308d883a add r6,r6,r2 - 27f24: 30800015 stw r2,0(r6) - 27f28: 003f7806 br 27d0c <_free_r+0xf0> +00027658 <_free_r>: + 27658: 28004126 beq r5,zero,27760 <_free_r+0x108> + 2765c: defffd04 addi sp,sp,-12 + 27660: dc400115 stw r17,4(sp) + 27664: dc000015 stw r16,0(sp) + 27668: 2023883a mov r17,r4 + 2766c: 2821883a mov r16,r5 + 27670: dfc00215 stw ra,8(sp) + 27674: 002f5800 call 2f580 <__malloc_lock> + 27678: 81ffff17 ldw r7,-4(r16) + 2767c: 00bfff84 movi r2,-2 + 27680: 010000f4 movhi r4,3 + 27684: 81bffe04 addi r6,r16,-8 + 27688: 3884703a and r2,r7,r2 + 2768c: 210aa304 addi r4,r4,10892 + 27690: 308b883a add r5,r6,r2 + 27694: 2a400117 ldw r9,4(r5) + 27698: 22000217 ldw r8,8(r4) + 2769c: 00ffff04 movi r3,-4 + 276a0: 48c6703a and r3,r9,r3 + 276a4: 2a005726 beq r5,r8,27804 <_free_r+0x1ac> + 276a8: 28c00115 stw r3,4(r5) + 276ac: 39c0004c andi r7,r7,1 + 276b0: 3800091e bne r7,zero,276d8 <_free_r+0x80> + 276b4: 823ffe17 ldw r8,-8(r16) + 276b8: 22400204 addi r9,r4,8 + 276bc: 320dc83a sub r6,r6,r8 + 276c0: 31c00217 ldw r7,8(r6) + 276c4: 1205883a add r2,r2,r8 + 276c8: 3a406526 beq r7,r9,27860 <_free_r+0x208> + 276cc: 32000317 ldw r8,12(r6) + 276d0: 3a000315 stw r8,12(r7) + 276d4: 41c00215 stw r7,8(r8) + 276d8: 28cf883a add r7,r5,r3 + 276dc: 39c00117 ldw r7,4(r7) + 276e0: 39c0004c andi r7,r7,1 + 276e4: 38003a26 beq r7,zero,277d0 <_free_r+0x178> + 276e8: 10c00054 ori r3,r2,1 + 276ec: 30c00115 stw r3,4(r6) + 276f0: 3087883a add r3,r6,r2 + 276f4: 18800015 stw r2,0(r3) + 276f8: 00c07fc4 movi r3,511 + 276fc: 18801936 bltu r3,r2,27764 <_free_r+0x10c> + 27700: 1004d0fa srli r2,r2,3 + 27704: 01c00044 movi r7,1 + 27708: 21400117 ldw r5,4(r4) + 2770c: 10c00044 addi r3,r2,1 + 27710: 18c7883a add r3,r3,r3 + 27714: 1005d0ba srai r2,r2,2 + 27718: 18c7883a add r3,r3,r3 + 2771c: 18c7883a add r3,r3,r3 + 27720: 1907883a add r3,r3,r4 + 27724: 3884983a sll r2,r7,r2 + 27728: 19c00017 ldw r7,0(r3) + 2772c: 1a3ffe04 addi r8,r3,-8 + 27730: 1144b03a or r2,r2,r5 + 27734: 32000315 stw r8,12(r6) + 27738: 31c00215 stw r7,8(r6) + 2773c: 20800115 stw r2,4(r4) + 27740: 19800015 stw r6,0(r3) + 27744: 39800315 stw r6,12(r7) + 27748: 8809883a mov r4,r17 + 2774c: dfc00217 ldw ra,8(sp) + 27750: dc400117 ldw r17,4(sp) + 27754: dc000017 ldw r16,0(sp) + 27758: dec00304 addi sp,sp,12 + 2775c: 002f5a41 jmpi 2f5a4 <__malloc_unlock> + 27760: f800283a ret + 27764: 100ad27a srli r5,r2,9 + 27768: 00c00104 movi r3,4 + 2776c: 19404a36 bltu r3,r5,27898 <_free_r+0x240> + 27770: 100ad1ba srli r5,r2,6 + 27774: 28c00e44 addi r3,r5,57 + 27778: 18c7883a add r3,r3,r3 + 2777c: 29400e04 addi r5,r5,56 + 27780: 18c7883a add r3,r3,r3 + 27784: 18c7883a add r3,r3,r3 + 27788: 1909883a add r4,r3,r4 + 2778c: 20c00017 ldw r3,0(r4) + 27790: 01c000f4 movhi r7,3 + 27794: 213ffe04 addi r4,r4,-8 + 27798: 39caa304 addi r7,r7,10892 + 2779c: 20c04426 beq r4,r3,278b0 <_free_r+0x258> + 277a0: 01ffff04 movi r7,-4 + 277a4: 19400117 ldw r5,4(r3) + 277a8: 29ca703a and r5,r5,r7 + 277ac: 1140022e bgeu r2,r5,277b8 <_free_r+0x160> + 277b0: 18c00217 ldw r3,8(r3) + 277b4: 20fffb1e bne r4,r3,277a4 <_gp+0xfffeb26c> + 277b8: 19000317 ldw r4,12(r3) + 277bc: 31000315 stw r4,12(r6) + 277c0: 30c00215 stw r3,8(r6) + 277c4: 21800215 stw r6,8(r4) + 277c8: 19800315 stw r6,12(r3) + 277cc: 003fde06 br 27748 <_gp+0xfffeb210> + 277d0: 29c00217 ldw r7,8(r5) + 277d4: 10c5883a add r2,r2,r3 + 277d8: 00c000f4 movhi r3,3 + 277dc: 18caa504 addi r3,r3,10900 + 277e0: 38c03b26 beq r7,r3,278d0 <_free_r+0x278> + 277e4: 2a000317 ldw r8,12(r5) + 277e8: 11400054 ori r5,r2,1 + 277ec: 3087883a add r3,r6,r2 + 277f0: 3a000315 stw r8,12(r7) + 277f4: 41c00215 stw r7,8(r8) + 277f8: 31400115 stw r5,4(r6) + 277fc: 18800015 stw r2,0(r3) + 27800: 003fbd06 br 276f8 <_gp+0xfffeb1c0> + 27804: 39c0004c andi r7,r7,1 + 27808: 10c5883a add r2,r2,r3 + 2780c: 3800071e bne r7,zero,2782c <_free_r+0x1d4> + 27810: 81fffe17 ldw r7,-8(r16) + 27814: 31cdc83a sub r6,r6,r7 + 27818: 30c00317 ldw r3,12(r6) + 2781c: 31400217 ldw r5,8(r6) + 27820: 11c5883a add r2,r2,r7 + 27824: 28c00315 stw r3,12(r5) + 27828: 19400215 stw r5,8(r3) + 2782c: 10c00054 ori r3,r2,1 + 27830: 30c00115 stw r3,4(r6) + 27834: 00c000f4 movhi r3,3 + 27838: 18d15204 addi r3,r3,17736 + 2783c: 18c00017 ldw r3,0(r3) + 27840: 21800215 stw r6,8(r4) + 27844: 10ffc036 bltu r2,r3,27748 <_gp+0xfffeb210> + 27848: 008000f4 movhi r2,3 + 2784c: 109a0b04 addi r2,r2,26668 + 27850: 11400017 ldw r5,0(r2) + 27854: 8809883a mov r4,r17 + 27858: 00275340 call 27534 <_malloc_trim_r> + 2785c: 003fba06 br 27748 <_gp+0xfffeb210> + 27860: 28c9883a add r4,r5,r3 + 27864: 21000117 ldw r4,4(r4) + 27868: 2100004c andi r4,r4,1 + 2786c: 2000391e bne r4,zero,27954 <_free_r+0x2fc> + 27870: 29c00217 ldw r7,8(r5) + 27874: 29000317 ldw r4,12(r5) + 27878: 1885883a add r2,r3,r2 + 2787c: 10c00054 ori r3,r2,1 + 27880: 39000315 stw r4,12(r7) + 27884: 21c00215 stw r7,8(r4) + 27888: 30c00115 stw r3,4(r6) + 2788c: 308d883a add r6,r6,r2 + 27890: 30800015 stw r2,0(r6) + 27894: 003fac06 br 27748 <_gp+0xfffeb210> + 27898: 00c00504 movi r3,20 + 2789c: 19401536 bltu r3,r5,278f4 <_free_r+0x29c> + 278a0: 28c01704 addi r3,r5,92 + 278a4: 18c7883a add r3,r3,r3 + 278a8: 294016c4 addi r5,r5,91 + 278ac: 003fb406 br 27780 <_gp+0xfffeb248> + 278b0: 280bd0ba srai r5,r5,2 + 278b4: 00c00044 movi r3,1 + 278b8: 38800117 ldw r2,4(r7) + 278bc: 194a983a sll r5,r3,r5 + 278c0: 2007883a mov r3,r4 + 278c4: 2884b03a or r2,r5,r2 + 278c8: 38800115 stw r2,4(r7) + 278cc: 003fbb06 br 277bc <_gp+0xfffeb284> + 278d0: 21800515 stw r6,20(r4) + 278d4: 21800415 stw r6,16(r4) + 278d8: 10c00054 ori r3,r2,1 + 278dc: 31c00315 stw r7,12(r6) + 278e0: 31c00215 stw r7,8(r6) + 278e4: 30c00115 stw r3,4(r6) + 278e8: 308d883a add r6,r6,r2 + 278ec: 30800015 stw r2,0(r6) + 278f0: 003f9506 br 27748 <_gp+0xfffeb210> + 278f4: 00c01504 movi r3,84 + 278f8: 19400536 bltu r3,r5,27910 <_free_r+0x2b8> + 278fc: 100ad33a srli r5,r2,12 + 27900: 28c01bc4 addi r3,r5,111 + 27904: 18c7883a add r3,r3,r3 + 27908: 29401b84 addi r5,r5,110 + 2790c: 003f9c06 br 27780 <_gp+0xfffeb248> + 27910: 00c05504 movi r3,340 + 27914: 19400536 bltu r3,r5,2792c <_free_r+0x2d4> + 27918: 100ad3fa srli r5,r2,15 + 2791c: 28c01e04 addi r3,r5,120 + 27920: 18c7883a add r3,r3,r3 + 27924: 29401dc4 addi r5,r5,119 + 27928: 003f9506 br 27780 <_gp+0xfffeb248> + 2792c: 00c15504 movi r3,1364 + 27930: 19400536 bltu r3,r5,27948 <_free_r+0x2f0> + 27934: 100ad4ba srli r5,r2,18 + 27938: 28c01f44 addi r3,r5,125 + 2793c: 18c7883a add r3,r3,r3 + 27940: 29401f04 addi r5,r5,124 + 27944: 003f8e06 br 27780 <_gp+0xfffeb248> + 27948: 00c03f84 movi r3,254 + 2794c: 01401f84 movi r5,126 + 27950: 003f8b06 br 27780 <_gp+0xfffeb248> + 27954: 10c00054 ori r3,r2,1 + 27958: 30c00115 stw r3,4(r6) + 2795c: 308d883a add r6,r6,r2 + 27960: 30800015 stw r2,0(r6) + 27964: 003f7806 br 27748 <_gp+0xfffeb210> -00027f2c <__sfvwrite_r>: - 27f2c: 30800217 ldw r2,8(r6) - 27f30: 10006726 beq r2,zero,280d0 <__sfvwrite_r+0x1a4> - 27f34: 28c0030b ldhu r3,12(r5) - 27f38: defff404 addi sp,sp,-48 - 27f3c: dd400715 stw r21,28(sp) - 27f40: dd000615 stw r20,24(sp) - 27f44: dc000215 stw r16,8(sp) - 27f48: dfc00b15 stw ra,44(sp) - 27f4c: df000a15 stw fp,40(sp) - 27f50: ddc00915 stw r23,36(sp) - 27f54: dd800815 stw r22,32(sp) - 27f58: dcc00515 stw r19,20(sp) - 27f5c: dc800415 stw r18,16(sp) - 27f60: dc400315 stw r17,12(sp) - 27f64: 1880020c andi r2,r3,8 - 27f68: 2821883a mov r16,r5 - 27f6c: 202b883a mov r21,r4 - 27f70: 3029883a mov r20,r6 - 27f74: 10002726 beq r2,zero,28014 <__sfvwrite_r+0xe8> - 27f78: 28800417 ldw r2,16(r5) - 27f7c: 10002526 beq r2,zero,28014 <__sfvwrite_r+0xe8> - 27f80: 1880008c andi r2,r3,2 - 27f84: a4400017 ldw r17,0(r20) - 27f88: 10002a26 beq r2,zero,28034 <__sfvwrite_r+0x108> - 27f8c: 05a00034 movhi r22,32768 - 27f90: 0027883a mov r19,zero - 27f94: 0025883a mov r18,zero - 27f98: b5bf0004 addi r22,r22,-1024 - 27f9c: 980d883a mov r6,r19 - 27fa0: a809883a mov r4,r21 - 27fa4: 90004626 beq r18,zero,280c0 <__sfvwrite_r+0x194> - 27fa8: 900f883a mov r7,r18 - 27fac: b480022e bgeu r22,r18,27fb8 <__sfvwrite_r+0x8c> - 27fb0: 01e00034 movhi r7,32768 - 27fb4: 39ff0004 addi r7,r7,-1024 - 27fb8: 80800917 ldw r2,36(r16) - 27fbc: 81400717 ldw r5,28(r16) - 27fc0: 103ee83a callr r2 - 27fc4: 0080570e bge zero,r2,28124 <__sfvwrite_r+0x1f8> - 27fc8: a0c00217 ldw r3,8(r20) - 27fcc: 98a7883a add r19,r19,r2 - 27fd0: 90a5c83a sub r18,r18,r2 - 27fd4: 1885c83a sub r2,r3,r2 - 27fd8: a0800215 stw r2,8(r20) - 27fdc: 103fef1e bne r2,zero,27f9c <__sfvwrite_r+0x70> - 27fe0: 0005883a mov r2,zero - 27fe4: dfc00b17 ldw ra,44(sp) - 27fe8: df000a17 ldw fp,40(sp) - 27fec: ddc00917 ldw r23,36(sp) - 27ff0: dd800817 ldw r22,32(sp) - 27ff4: dd400717 ldw r21,28(sp) - 27ff8: dd000617 ldw r20,24(sp) - 27ffc: dcc00517 ldw r19,20(sp) - 28000: dc800417 ldw r18,16(sp) - 28004: dc400317 ldw r17,12(sp) - 28008: dc000217 ldw r16,8(sp) - 2800c: dec00c04 addi sp,sp,48 - 28010: f800283a ret - 28014: 800b883a mov r5,r16 - 28018: a809883a mov r4,r21 - 2801c: 0025ad40 call 25ad4 <__swsetup_r> - 28020: 1000eb1e bne r2,zero,283d0 <__sfvwrite_r+0x4a4> - 28024: 80c0030b ldhu r3,12(r16) - 28028: a4400017 ldw r17,0(r20) - 2802c: 1880008c andi r2,r3,2 - 28030: 103fd61e bne r2,zero,27f8c <__sfvwrite_r+0x60> - 28034: 1880004c andi r2,r3,1 - 28038: 10003f1e bne r2,zero,28138 <__sfvwrite_r+0x20c> - 2803c: 0039883a mov fp,zero - 28040: 0025883a mov r18,zero - 28044: 90001a26 beq r18,zero,280b0 <__sfvwrite_r+0x184> - 28048: 1880800c andi r2,r3,512 - 2804c: 84c00217 ldw r19,8(r16) - 28050: 10002126 beq r2,zero,280d8 <__sfvwrite_r+0x1ac> - 28054: 982f883a mov r23,r19 - 28058: 94c09336 bltu r18,r19,282a8 <__sfvwrite_r+0x37c> - 2805c: 1881200c andi r2,r3,1152 - 28060: 10009e1e bne r2,zero,282dc <__sfvwrite_r+0x3b0> - 28064: 81000017 ldw r4,0(r16) - 28068: b80d883a mov r6,r23 - 2806c: e00b883a mov r5,fp - 28070: 0028a340 call 28a34 - 28074: 80c00217 ldw r3,8(r16) - 28078: 81000017 ldw r4,0(r16) - 2807c: 9005883a mov r2,r18 - 28080: 1ce7c83a sub r19,r3,r19 - 28084: 25cf883a add r7,r4,r23 - 28088: 84c00215 stw r19,8(r16) - 2808c: 81c00015 stw r7,0(r16) - 28090: a0c00217 ldw r3,8(r20) - 28094: e0b9883a add fp,fp,r2 - 28098: 90a5c83a sub r18,r18,r2 - 2809c: 18a7c83a sub r19,r3,r2 - 280a0: a4c00215 stw r19,8(r20) - 280a4: 983fce26 beq r19,zero,27fe0 <__sfvwrite_r+0xb4> - 280a8: 80c0030b ldhu r3,12(r16) - 280ac: 903fe61e bne r18,zero,28048 <__sfvwrite_r+0x11c> - 280b0: 8f000017 ldw fp,0(r17) - 280b4: 8c800117 ldw r18,4(r17) - 280b8: 8c400204 addi r17,r17,8 - 280bc: 003fe106 br 28044 <__sfvwrite_r+0x118> - 280c0: 8cc00017 ldw r19,0(r17) - 280c4: 8c800117 ldw r18,4(r17) - 280c8: 8c400204 addi r17,r17,8 - 280cc: 003fb306 br 27f9c <__sfvwrite_r+0x70> - 280d0: 0005883a mov r2,zero - 280d4: f800283a ret - 280d8: 81000017 ldw r4,0(r16) - 280dc: 80800417 ldw r2,16(r16) - 280e0: 11005736 bltu r2,r4,28240 <__sfvwrite_r+0x314> - 280e4: 85c00517 ldw r23,20(r16) - 280e8: 95c05536 bltu r18,r23,28240 <__sfvwrite_r+0x314> - 280ec: 00a00034 movhi r2,32768 - 280f0: 10bfffc4 addi r2,r2,-1 - 280f4: 9009883a mov r4,r18 - 280f8: 1480012e bgeu r2,r18,28100 <__sfvwrite_r+0x1d4> - 280fc: 1009883a mov r4,r2 - 28100: b80b883a mov r5,r23 - 28104: 00229280 call 22928 <__divsi3> - 28108: 15cf383a mul r7,r2,r23 - 2810c: 81400717 ldw r5,28(r16) - 28110: 80800917 ldw r2,36(r16) - 28114: e00d883a mov r6,fp - 28118: a809883a mov r4,r21 - 2811c: 103ee83a callr r2 - 28120: 00bfdb16 blt zero,r2,28090 <__sfvwrite_r+0x164> - 28124: 8080030b ldhu r2,12(r16) - 28128: 10801014 ori r2,r2,64 - 2812c: 8080030d sth r2,12(r16) - 28130: 00bfffc4 movi r2,-1 - 28134: 003fab06 br 27fe4 <__sfvwrite_r+0xb8> - 28138: 0027883a mov r19,zero - 2813c: 0011883a mov r8,zero - 28140: 0039883a mov fp,zero - 28144: 0025883a mov r18,zero - 28148: 90001f26 beq r18,zero,281c8 <__sfvwrite_r+0x29c> - 2814c: 40005a26 beq r8,zero,282b8 <__sfvwrite_r+0x38c> - 28150: 982d883a mov r22,r19 - 28154: 94c0012e bgeu r18,r19,2815c <__sfvwrite_r+0x230> - 28158: 902d883a mov r22,r18 - 2815c: 81000017 ldw r4,0(r16) - 28160: 80800417 ldw r2,16(r16) - 28164: b02f883a mov r23,r22 - 28168: 81c00517 ldw r7,20(r16) - 2816c: 1100032e bgeu r2,r4,2817c <__sfvwrite_r+0x250> - 28170: 80c00217 ldw r3,8(r16) - 28174: 38c7883a add r3,r7,r3 - 28178: 1d801816 blt r3,r22,281dc <__sfvwrite_r+0x2b0> - 2817c: b1c03e16 blt r22,r7,28278 <__sfvwrite_r+0x34c> - 28180: 80800917 ldw r2,36(r16) - 28184: 81400717 ldw r5,28(r16) - 28188: e00d883a mov r6,fp - 2818c: da000115 stw r8,4(sp) - 28190: a809883a mov r4,r21 - 28194: 103ee83a callr r2 - 28198: 102f883a mov r23,r2 - 2819c: da000117 ldw r8,4(sp) - 281a0: 00bfe00e bge zero,r2,28124 <__sfvwrite_r+0x1f8> - 281a4: 9de7c83a sub r19,r19,r23 - 281a8: 98001f26 beq r19,zero,28228 <__sfvwrite_r+0x2fc> - 281ac: a0800217 ldw r2,8(r20) - 281b0: e5f9883a add fp,fp,r23 - 281b4: 95e5c83a sub r18,r18,r23 - 281b8: 15efc83a sub r23,r2,r23 - 281bc: a5c00215 stw r23,8(r20) - 281c0: b83f8726 beq r23,zero,27fe0 <__sfvwrite_r+0xb4> - 281c4: 903fe11e bne r18,zero,2814c <__sfvwrite_r+0x220> - 281c8: 8f000017 ldw fp,0(r17) - 281cc: 8c800117 ldw r18,4(r17) - 281d0: 0011883a mov r8,zero - 281d4: 8c400204 addi r17,r17,8 - 281d8: 003fdb06 br 28148 <__sfvwrite_r+0x21c> - 281dc: 180d883a mov r6,r3 - 281e0: e00b883a mov r5,fp - 281e4: da000115 stw r8,4(sp) - 281e8: d8c00015 stw r3,0(sp) - 281ec: 0028a340 call 28a34 - 281f0: d8c00017 ldw r3,0(sp) - 281f4: 80800017 ldw r2,0(r16) - 281f8: 800b883a mov r5,r16 - 281fc: a809883a mov r4,r21 - 28200: 10c5883a add r2,r2,r3 - 28204: 80800015 stw r2,0(r16) - 28208: d8c00015 stw r3,0(sp) - 2820c: 00276cc0 call 276cc <_fflush_r> - 28210: d8c00017 ldw r3,0(sp) - 28214: da000117 ldw r8,4(sp) - 28218: 103fc21e bne r2,zero,28124 <__sfvwrite_r+0x1f8> - 2821c: 182f883a mov r23,r3 - 28220: 9de7c83a sub r19,r19,r23 - 28224: 983fe11e bne r19,zero,281ac <__sfvwrite_r+0x280> - 28228: 800b883a mov r5,r16 - 2822c: a809883a mov r4,r21 - 28230: 00276cc0 call 276cc <_fflush_r> - 28234: 103fbb1e bne r2,zero,28124 <__sfvwrite_r+0x1f8> - 28238: 0011883a mov r8,zero - 2823c: 003fdb06 br 281ac <__sfvwrite_r+0x280> - 28240: 94c0012e bgeu r18,r19,28248 <__sfvwrite_r+0x31c> - 28244: 9027883a mov r19,r18 - 28248: 980d883a mov r6,r19 - 2824c: e00b883a mov r5,fp - 28250: 0028a340 call 28a34 - 28254: 80800217 ldw r2,8(r16) - 28258: 80c00017 ldw r3,0(r16) - 2825c: 14c5c83a sub r2,r2,r19 - 28260: 1cc7883a add r3,r3,r19 - 28264: 80800215 stw r2,8(r16) - 28268: 80c00015 stw r3,0(r16) - 2826c: 10004326 beq r2,zero,2837c <__sfvwrite_r+0x450> - 28270: 9805883a mov r2,r19 - 28274: 003f8606 br 28090 <__sfvwrite_r+0x164> - 28278: b00d883a mov r6,r22 - 2827c: e00b883a mov r5,fp - 28280: da000115 stw r8,4(sp) - 28284: 0028a340 call 28a34 - 28288: 80800217 ldw r2,8(r16) - 2828c: 80c00017 ldw r3,0(r16) - 28290: da000117 ldw r8,4(sp) - 28294: 1585c83a sub r2,r2,r22 - 28298: 1dad883a add r22,r3,r22 - 2829c: 80800215 stw r2,8(r16) - 282a0: 85800015 stw r22,0(r16) - 282a4: 003fbf06 br 281a4 <__sfvwrite_r+0x278> - 282a8: 81000017 ldw r4,0(r16) - 282ac: 9027883a mov r19,r18 - 282b0: 902f883a mov r23,r18 - 282b4: 003f6c06 br 28068 <__sfvwrite_r+0x13c> - 282b8: 900d883a mov r6,r18 - 282bc: 01400284 movi r5,10 - 282c0: e009883a mov r4,fp - 282c4: 00288080 call 28808 - 282c8: 10003e26 beq r2,zero,283c4 <__sfvwrite_r+0x498> - 282cc: 10800044 addi r2,r2,1 - 282d0: 1727c83a sub r19,r2,fp - 282d4: 02000044 movi r8,1 - 282d8: 003f9d06 br 28150 <__sfvwrite_r+0x224> - 282dc: 80800517 ldw r2,20(r16) - 282e0: 81400417 ldw r5,16(r16) - 282e4: 81c00017 ldw r7,0(r16) - 282e8: 10a7883a add r19,r2,r2 - 282ec: 9885883a add r2,r19,r2 - 282f0: 1026d7fa srli r19,r2,31 - 282f4: 396dc83a sub r22,r7,r5 - 282f8: b1000044 addi r4,r22,1 - 282fc: 9885883a add r2,r19,r2 - 28300: 1027d07a srai r19,r2,1 - 28304: 2485883a add r2,r4,r18 - 28308: 980d883a mov r6,r19 - 2830c: 9880022e bgeu r19,r2,28318 <__sfvwrite_r+0x3ec> - 28310: 1027883a mov r19,r2 - 28314: 100d883a mov r6,r2 - 28318: 18c1000c andi r3,r3,1024 - 2831c: 18001c26 beq r3,zero,28390 <__sfvwrite_r+0x464> - 28320: 300b883a mov r5,r6 - 28324: a809883a mov r4,r21 - 28328: 0022bfc0 call 22bfc <_malloc_r> - 2832c: 102f883a mov r23,r2 - 28330: 10002926 beq r2,zero,283d8 <__sfvwrite_r+0x4ac> - 28334: 81400417 ldw r5,16(r16) - 28338: b00d883a mov r6,r22 - 2833c: 1009883a mov r4,r2 - 28340: 00288ec0 call 288ec - 28344: 8080030b ldhu r2,12(r16) - 28348: 00fedfc4 movi r3,-1153 - 2834c: 10c4703a and r2,r2,r3 - 28350: 10802014 ori r2,r2,128 - 28354: 8080030d sth r2,12(r16) - 28358: bd89883a add r4,r23,r22 - 2835c: 9d8fc83a sub r7,r19,r22 - 28360: 85c00415 stw r23,16(r16) - 28364: 84c00515 stw r19,20(r16) - 28368: 81000015 stw r4,0(r16) - 2836c: 9027883a mov r19,r18 - 28370: 81c00215 stw r7,8(r16) - 28374: 902f883a mov r23,r18 - 28378: 003f3b06 br 28068 <__sfvwrite_r+0x13c> - 2837c: 800b883a mov r5,r16 - 28380: a809883a mov r4,r21 - 28384: 00276cc0 call 276cc <_fflush_r> - 28388: 103fb926 beq r2,zero,28270 <__sfvwrite_r+0x344> - 2838c: 003f6506 br 28124 <__sfvwrite_r+0x1f8> - 28390: a809883a mov r4,r21 - 28394: 0029cf40 call 29cf4 <_realloc_r> - 28398: 102f883a mov r23,r2 - 2839c: 103fee1e bne r2,zero,28358 <__sfvwrite_r+0x42c> - 283a0: 81400417 ldw r5,16(r16) - 283a4: a809883a mov r4,r21 - 283a8: 0027c1c0 call 27c1c <_free_r> - 283ac: 8080030b ldhu r2,12(r16) - 283b0: 00ffdfc4 movi r3,-129 - 283b4: 1884703a and r2,r3,r2 - 283b8: 00c00304 movi r3,12 - 283bc: a8c00015 stw r3,0(r21) - 283c0: 003f5906 br 28128 <__sfvwrite_r+0x1fc> - 283c4: 94c00044 addi r19,r18,1 - 283c8: 02000044 movi r8,1 - 283cc: 003f6006 br 28150 <__sfvwrite_r+0x224> - 283d0: 00bfffc4 movi r2,-1 - 283d4: 003f0306 br 27fe4 <__sfvwrite_r+0xb8> - 283d8: 00800304 movi r2,12 - 283dc: a8800015 stw r2,0(r21) - 283e0: 8080030b ldhu r2,12(r16) - 283e4: 003f5006 br 28128 <__sfvwrite_r+0x1fc> +00027968 <__sfvwrite_r>: + 27968: 30800217 ldw r2,8(r6) + 2796c: 10006726 beq r2,zero,27b0c <__sfvwrite_r+0x1a4> + 27970: 28c0030b ldhu r3,12(r5) + 27974: defff404 addi sp,sp,-48 + 27978: dd400715 stw r21,28(sp) + 2797c: dd000615 stw r20,24(sp) + 27980: dc000215 stw r16,8(sp) + 27984: dfc00b15 stw ra,44(sp) + 27988: df000a15 stw fp,40(sp) + 2798c: ddc00915 stw r23,36(sp) + 27990: dd800815 stw r22,32(sp) + 27994: dcc00515 stw r19,20(sp) + 27998: dc800415 stw r18,16(sp) + 2799c: dc400315 stw r17,12(sp) + 279a0: 1880020c andi r2,r3,8 + 279a4: 2821883a mov r16,r5 + 279a8: 202b883a mov r21,r4 + 279ac: 3029883a mov r20,r6 + 279b0: 10002726 beq r2,zero,27a50 <__sfvwrite_r+0xe8> + 279b4: 28800417 ldw r2,16(r5) + 279b8: 10002526 beq r2,zero,27a50 <__sfvwrite_r+0xe8> + 279bc: 1880008c andi r2,r3,2 + 279c0: a4400017 ldw r17,0(r20) + 279c4: 10002a26 beq r2,zero,27a70 <__sfvwrite_r+0x108> + 279c8: 05a00034 movhi r22,32768 + 279cc: 0027883a mov r19,zero + 279d0: 0025883a mov r18,zero + 279d4: b5bf0004 addi r22,r22,-1024 + 279d8: 980d883a mov r6,r19 + 279dc: a809883a mov r4,r21 + 279e0: 90004626 beq r18,zero,27afc <__sfvwrite_r+0x194> + 279e4: 900f883a mov r7,r18 + 279e8: b480022e bgeu r22,r18,279f4 <__sfvwrite_r+0x8c> + 279ec: 01e00034 movhi r7,32768 + 279f0: 39ff0004 addi r7,r7,-1024 + 279f4: 80800917 ldw r2,36(r16) + 279f8: 81400717 ldw r5,28(r16) + 279fc: 103ee83a callr r2 + 27a00: 0080570e bge zero,r2,27b60 <__sfvwrite_r+0x1f8> + 27a04: a0c00217 ldw r3,8(r20) + 27a08: 98a7883a add r19,r19,r2 + 27a0c: 90a5c83a sub r18,r18,r2 + 27a10: 1885c83a sub r2,r3,r2 + 27a14: a0800215 stw r2,8(r20) + 27a18: 103fef1e bne r2,zero,279d8 <_gp+0xfffeb4a0> + 27a1c: 0005883a mov r2,zero + 27a20: dfc00b17 ldw ra,44(sp) + 27a24: df000a17 ldw fp,40(sp) + 27a28: ddc00917 ldw r23,36(sp) + 27a2c: dd800817 ldw r22,32(sp) + 27a30: dd400717 ldw r21,28(sp) + 27a34: dd000617 ldw r20,24(sp) + 27a38: dcc00517 ldw r19,20(sp) + 27a3c: dc800417 ldw r18,16(sp) + 27a40: dc400317 ldw r17,12(sp) + 27a44: dc000217 ldw r16,8(sp) + 27a48: dec00c04 addi sp,sp,48 + 27a4c: f800283a ret + 27a50: 800b883a mov r5,r16 + 27a54: a809883a mov r4,r21 + 27a58: 00255100 call 25510 <__swsetup_r> + 27a5c: 1000eb1e bne r2,zero,27e0c <__sfvwrite_r+0x4a4> + 27a60: 80c0030b ldhu r3,12(r16) + 27a64: a4400017 ldw r17,0(r20) + 27a68: 1880008c andi r2,r3,2 + 27a6c: 103fd61e bne r2,zero,279c8 <_gp+0xfffeb490> + 27a70: 1880004c andi r2,r3,1 + 27a74: 10003f1e bne r2,zero,27b74 <__sfvwrite_r+0x20c> + 27a78: 0039883a mov fp,zero + 27a7c: 0025883a mov r18,zero + 27a80: 90001a26 beq r18,zero,27aec <__sfvwrite_r+0x184> + 27a84: 1880800c andi r2,r3,512 + 27a88: 84c00217 ldw r19,8(r16) + 27a8c: 10002126 beq r2,zero,27b14 <__sfvwrite_r+0x1ac> + 27a90: 982f883a mov r23,r19 + 27a94: 94c09336 bltu r18,r19,27ce4 <__sfvwrite_r+0x37c> + 27a98: 1881200c andi r2,r3,1152 + 27a9c: 10009e1e bne r2,zero,27d18 <__sfvwrite_r+0x3b0> + 27aa0: 81000017 ldw r4,0(r16) + 27aa4: b80d883a mov r6,r23 + 27aa8: e00b883a mov r5,fp + 27aac: 00284700 call 28470 + 27ab0: 80c00217 ldw r3,8(r16) + 27ab4: 81000017 ldw r4,0(r16) + 27ab8: 9005883a mov r2,r18 + 27abc: 1ce7c83a sub r19,r3,r19 + 27ac0: 25cf883a add r7,r4,r23 + 27ac4: 84c00215 stw r19,8(r16) + 27ac8: 81c00015 stw r7,0(r16) + 27acc: a0c00217 ldw r3,8(r20) + 27ad0: e0b9883a add fp,fp,r2 + 27ad4: 90a5c83a sub r18,r18,r2 + 27ad8: 18a7c83a sub r19,r3,r2 + 27adc: a4c00215 stw r19,8(r20) + 27ae0: 983fce26 beq r19,zero,27a1c <_gp+0xfffeb4e4> + 27ae4: 80c0030b ldhu r3,12(r16) + 27ae8: 903fe61e bne r18,zero,27a84 <_gp+0xfffeb54c> + 27aec: 8f000017 ldw fp,0(r17) + 27af0: 8c800117 ldw r18,4(r17) + 27af4: 8c400204 addi r17,r17,8 + 27af8: 003fe106 br 27a80 <_gp+0xfffeb548> + 27afc: 8cc00017 ldw r19,0(r17) + 27b00: 8c800117 ldw r18,4(r17) + 27b04: 8c400204 addi r17,r17,8 + 27b08: 003fb306 br 279d8 <_gp+0xfffeb4a0> + 27b0c: 0005883a mov r2,zero + 27b10: f800283a ret + 27b14: 81000017 ldw r4,0(r16) + 27b18: 80800417 ldw r2,16(r16) + 27b1c: 11005736 bltu r2,r4,27c7c <__sfvwrite_r+0x314> + 27b20: 85c00517 ldw r23,20(r16) + 27b24: 95c05536 bltu r18,r23,27c7c <__sfvwrite_r+0x314> + 27b28: 00a00034 movhi r2,32768 + 27b2c: 10bfffc4 addi r2,r2,-1 + 27b30: 9009883a mov r4,r18 + 27b34: 1480012e bgeu r2,r18,27b3c <__sfvwrite_r+0x1d4> + 27b38: 1009883a mov r4,r2 + 27b3c: b80b883a mov r5,r23 + 27b40: 00224e40 call 224e4 <__divsi3> + 27b44: 15cf383a mul r7,r2,r23 + 27b48: 81400717 ldw r5,28(r16) + 27b4c: 80800917 ldw r2,36(r16) + 27b50: e00d883a mov r6,fp + 27b54: a809883a mov r4,r21 + 27b58: 103ee83a callr r2 + 27b5c: 00bfdb16 blt zero,r2,27acc <_gp+0xfffeb594> + 27b60: 8080030b ldhu r2,12(r16) + 27b64: 10801014 ori r2,r2,64 + 27b68: 8080030d sth r2,12(r16) + 27b6c: 00bfffc4 movi r2,-1 + 27b70: 003fab06 br 27a20 <_gp+0xfffeb4e8> + 27b74: 0027883a mov r19,zero + 27b78: 0011883a mov r8,zero + 27b7c: 0039883a mov fp,zero + 27b80: 0025883a mov r18,zero + 27b84: 90001f26 beq r18,zero,27c04 <__sfvwrite_r+0x29c> + 27b88: 40005a26 beq r8,zero,27cf4 <__sfvwrite_r+0x38c> + 27b8c: 982d883a mov r22,r19 + 27b90: 94c0012e bgeu r18,r19,27b98 <__sfvwrite_r+0x230> + 27b94: 902d883a mov r22,r18 + 27b98: 81000017 ldw r4,0(r16) + 27b9c: 80800417 ldw r2,16(r16) + 27ba0: b02f883a mov r23,r22 + 27ba4: 81c00517 ldw r7,20(r16) + 27ba8: 1100032e bgeu r2,r4,27bb8 <__sfvwrite_r+0x250> + 27bac: 80c00217 ldw r3,8(r16) + 27bb0: 38c7883a add r3,r7,r3 + 27bb4: 1d801816 blt r3,r22,27c18 <__sfvwrite_r+0x2b0> + 27bb8: b1c03e16 blt r22,r7,27cb4 <__sfvwrite_r+0x34c> + 27bbc: 80800917 ldw r2,36(r16) + 27bc0: 81400717 ldw r5,28(r16) + 27bc4: e00d883a mov r6,fp + 27bc8: da000115 stw r8,4(sp) + 27bcc: a809883a mov r4,r21 + 27bd0: 103ee83a callr r2 + 27bd4: 102f883a mov r23,r2 + 27bd8: da000117 ldw r8,4(sp) + 27bdc: 00bfe00e bge zero,r2,27b60 <_gp+0xfffeb628> + 27be0: 9de7c83a sub r19,r19,r23 + 27be4: 98001f26 beq r19,zero,27c64 <__sfvwrite_r+0x2fc> + 27be8: a0800217 ldw r2,8(r20) + 27bec: e5f9883a add fp,fp,r23 + 27bf0: 95e5c83a sub r18,r18,r23 + 27bf4: 15efc83a sub r23,r2,r23 + 27bf8: a5c00215 stw r23,8(r20) + 27bfc: b83f8726 beq r23,zero,27a1c <_gp+0xfffeb4e4> + 27c00: 903fe11e bne r18,zero,27b88 <_gp+0xfffeb650> + 27c04: 8f000017 ldw fp,0(r17) + 27c08: 8c800117 ldw r18,4(r17) + 27c0c: 0011883a mov r8,zero + 27c10: 8c400204 addi r17,r17,8 + 27c14: 003fdb06 br 27b84 <_gp+0xfffeb64c> + 27c18: 180d883a mov r6,r3 + 27c1c: e00b883a mov r5,fp + 27c20: da000115 stw r8,4(sp) + 27c24: d8c00015 stw r3,0(sp) + 27c28: 00284700 call 28470 + 27c2c: d8c00017 ldw r3,0(sp) + 27c30: 80800017 ldw r2,0(r16) + 27c34: 800b883a mov r5,r16 + 27c38: a809883a mov r4,r21 + 27c3c: 10c5883a add r2,r2,r3 + 27c40: 80800015 stw r2,0(r16) + 27c44: d8c00015 stw r3,0(sp) + 27c48: 00271080 call 27108 <_fflush_r> + 27c4c: d8c00017 ldw r3,0(sp) + 27c50: da000117 ldw r8,4(sp) + 27c54: 103fc21e bne r2,zero,27b60 <_gp+0xfffeb628> + 27c58: 182f883a mov r23,r3 + 27c5c: 9de7c83a sub r19,r19,r23 + 27c60: 983fe11e bne r19,zero,27be8 <_gp+0xfffeb6b0> + 27c64: 800b883a mov r5,r16 + 27c68: a809883a mov r4,r21 + 27c6c: 00271080 call 27108 <_fflush_r> + 27c70: 103fbb1e bne r2,zero,27b60 <_gp+0xfffeb628> + 27c74: 0011883a mov r8,zero + 27c78: 003fdb06 br 27be8 <_gp+0xfffeb6b0> + 27c7c: 94c0012e bgeu r18,r19,27c84 <__sfvwrite_r+0x31c> + 27c80: 9027883a mov r19,r18 + 27c84: 980d883a mov r6,r19 + 27c88: e00b883a mov r5,fp + 27c8c: 00284700 call 28470 + 27c90: 80800217 ldw r2,8(r16) + 27c94: 80c00017 ldw r3,0(r16) + 27c98: 14c5c83a sub r2,r2,r19 + 27c9c: 1cc7883a add r3,r3,r19 + 27ca0: 80800215 stw r2,8(r16) + 27ca4: 80c00015 stw r3,0(r16) + 27ca8: 10004326 beq r2,zero,27db8 <__sfvwrite_r+0x450> + 27cac: 9805883a mov r2,r19 + 27cb0: 003f8606 br 27acc <_gp+0xfffeb594> + 27cb4: b00d883a mov r6,r22 + 27cb8: e00b883a mov r5,fp + 27cbc: da000115 stw r8,4(sp) + 27cc0: 00284700 call 28470 + 27cc4: 80800217 ldw r2,8(r16) + 27cc8: 80c00017 ldw r3,0(r16) + 27ccc: da000117 ldw r8,4(sp) + 27cd0: 1585c83a sub r2,r2,r22 + 27cd4: 1dad883a add r22,r3,r22 + 27cd8: 80800215 stw r2,8(r16) + 27cdc: 85800015 stw r22,0(r16) + 27ce0: 003fbf06 br 27be0 <_gp+0xfffeb6a8> + 27ce4: 81000017 ldw r4,0(r16) + 27ce8: 9027883a mov r19,r18 + 27cec: 902f883a mov r23,r18 + 27cf0: 003f6c06 br 27aa4 <_gp+0xfffeb56c> + 27cf4: 900d883a mov r6,r18 + 27cf8: 01400284 movi r5,10 + 27cfc: e009883a mov r4,fp + 27d00: 00282440 call 28244 + 27d04: 10003e26 beq r2,zero,27e00 <__sfvwrite_r+0x498> + 27d08: 10800044 addi r2,r2,1 + 27d0c: 1727c83a sub r19,r2,fp + 27d10: 02000044 movi r8,1 + 27d14: 003f9d06 br 27b8c <_gp+0xfffeb654> + 27d18: 80800517 ldw r2,20(r16) + 27d1c: 81400417 ldw r5,16(r16) + 27d20: 81c00017 ldw r7,0(r16) + 27d24: 10a7883a add r19,r2,r2 + 27d28: 9885883a add r2,r19,r2 + 27d2c: 1026d7fa srli r19,r2,31 + 27d30: 396dc83a sub r22,r7,r5 + 27d34: b1000044 addi r4,r22,1 + 27d38: 9885883a add r2,r19,r2 + 27d3c: 1027d07a srai r19,r2,1 + 27d40: 2485883a add r2,r4,r18 + 27d44: 980d883a mov r6,r19 + 27d48: 9880022e bgeu r19,r2,27d54 <__sfvwrite_r+0x3ec> + 27d4c: 1027883a mov r19,r2 + 27d50: 100d883a mov r6,r2 + 27d54: 18c1000c andi r3,r3,1024 + 27d58: 18001c26 beq r3,zero,27dcc <__sfvwrite_r+0x464> + 27d5c: 300b883a mov r5,r6 + 27d60: a809883a mov r4,r21 + 27d64: 00226c00 call 226c0 <_malloc_r> + 27d68: 102f883a mov r23,r2 + 27d6c: 10002926 beq r2,zero,27e14 <__sfvwrite_r+0x4ac> + 27d70: 81400417 ldw r5,16(r16) + 27d74: b00d883a mov r6,r22 + 27d78: 1009883a mov r4,r2 + 27d7c: 00283280 call 28328 + 27d80: 8080030b ldhu r2,12(r16) + 27d84: 00fedfc4 movi r3,-1153 + 27d88: 10c4703a and r2,r2,r3 + 27d8c: 10802014 ori r2,r2,128 + 27d90: 8080030d sth r2,12(r16) + 27d94: bd89883a add r4,r23,r22 + 27d98: 9d8fc83a sub r7,r19,r22 + 27d9c: 85c00415 stw r23,16(r16) + 27da0: 84c00515 stw r19,20(r16) + 27da4: 81000015 stw r4,0(r16) + 27da8: 9027883a mov r19,r18 + 27dac: 81c00215 stw r7,8(r16) + 27db0: 902f883a mov r23,r18 + 27db4: 003f3b06 br 27aa4 <_gp+0xfffeb56c> + 27db8: 800b883a mov r5,r16 + 27dbc: a809883a mov r4,r21 + 27dc0: 00271080 call 27108 <_fflush_r> + 27dc4: 103fb926 beq r2,zero,27cac <_gp+0xfffeb774> + 27dc8: 003f6506 br 27b60 <_gp+0xfffeb628> + 27dcc: a809883a mov r4,r21 + 27dd0: 00297300 call 29730 <_realloc_r> + 27dd4: 102f883a mov r23,r2 + 27dd8: 103fee1e bne r2,zero,27d94 <_gp+0xfffeb85c> + 27ddc: 81400417 ldw r5,16(r16) + 27de0: a809883a mov r4,r21 + 27de4: 00276580 call 27658 <_free_r> + 27de8: 8080030b ldhu r2,12(r16) + 27dec: 00ffdfc4 movi r3,-129 + 27df0: 1884703a and r2,r3,r2 + 27df4: 00c00304 movi r3,12 + 27df8: a8c00015 stw r3,0(r21) + 27dfc: 003f5906 br 27b64 <_gp+0xfffeb62c> + 27e00: 94c00044 addi r19,r18,1 + 27e04: 02000044 movi r8,1 + 27e08: 003f6006 br 27b8c <_gp+0xfffeb654> + 27e0c: 00bfffc4 movi r2,-1 + 27e10: 003f0306 br 27a20 <_gp+0xfffeb4e8> + 27e14: 00800304 movi r2,12 + 27e18: a8800015 stw r2,0(r21) + 27e1c: 8080030b ldhu r2,12(r16) + 27e20: 003f5006 br 27b64 <_gp+0xfffeb62c> -000283e8 <_fwalk>: - 283e8: defff704 addi sp,sp,-36 - 283ec: dd000415 stw r20,16(sp) - 283f0: dfc00815 stw ra,32(sp) - 283f4: ddc00715 stw r23,28(sp) - 283f8: dd800615 stw r22,24(sp) - 283fc: dd400515 stw r21,20(sp) - 28400: dcc00315 stw r19,12(sp) - 28404: dc800215 stw r18,8(sp) - 28408: dc400115 stw r17,4(sp) - 2840c: dc000015 stw r16,0(sp) - 28410: 2500b804 addi r20,r4,736 - 28414: a0002326 beq r20,zero,284a4 <_fwalk+0xbc> - 28418: 282b883a mov r21,r5 - 2841c: 002f883a mov r23,zero - 28420: 05800044 movi r22,1 - 28424: 04ffffc4 movi r19,-1 - 28428: a4400117 ldw r17,4(r20) - 2842c: a4800217 ldw r18,8(r20) - 28430: 8c7fffc4 addi r17,r17,-1 - 28434: 88000d16 blt r17,zero,2846c <_fwalk+0x84> - 28438: 94000304 addi r16,r18,12 - 2843c: 94800384 addi r18,r18,14 - 28440: 8080000b ldhu r2,0(r16) - 28444: 8c7fffc4 addi r17,r17,-1 - 28448: 813ffd04 addi r4,r16,-12 - 2844c: b080042e bgeu r22,r2,28460 <_fwalk+0x78> - 28450: 9080000f ldh r2,0(r18) - 28454: 14c00226 beq r2,r19,28460 <_fwalk+0x78> - 28458: a83ee83a callr r21 - 2845c: b8aeb03a or r23,r23,r2 - 28460: 84001a04 addi r16,r16,104 - 28464: 94801a04 addi r18,r18,104 - 28468: 8cfff51e bne r17,r19,28440 <_fwalk+0x58> - 2846c: a5000017 ldw r20,0(r20) - 28470: a03fed1e bne r20,zero,28428 <_fwalk+0x40> - 28474: b805883a mov r2,r23 - 28478: dfc00817 ldw ra,32(sp) - 2847c: ddc00717 ldw r23,28(sp) - 28480: dd800617 ldw r22,24(sp) - 28484: dd400517 ldw r21,20(sp) - 28488: dd000417 ldw r20,16(sp) - 2848c: dcc00317 ldw r19,12(sp) - 28490: dc800217 ldw r18,8(sp) - 28494: dc400117 ldw r17,4(sp) - 28498: dc000017 ldw r16,0(sp) - 2849c: dec00904 addi sp,sp,36 +00027e24 <_fwalk>: + 27e24: defff704 addi sp,sp,-36 + 27e28: dd000415 stw r20,16(sp) + 27e2c: dfc00815 stw ra,32(sp) + 27e30: ddc00715 stw r23,28(sp) + 27e34: dd800615 stw r22,24(sp) + 27e38: dd400515 stw r21,20(sp) + 27e3c: dcc00315 stw r19,12(sp) + 27e40: dc800215 stw r18,8(sp) + 27e44: dc400115 stw r17,4(sp) + 27e48: dc000015 stw r16,0(sp) + 27e4c: 2500b804 addi r20,r4,736 + 27e50: a0002326 beq r20,zero,27ee0 <_fwalk+0xbc> + 27e54: 282b883a mov r21,r5 + 27e58: 002f883a mov r23,zero + 27e5c: 05800044 movi r22,1 + 27e60: 04ffffc4 movi r19,-1 + 27e64: a4400117 ldw r17,4(r20) + 27e68: a4800217 ldw r18,8(r20) + 27e6c: 8c7fffc4 addi r17,r17,-1 + 27e70: 88000d16 blt r17,zero,27ea8 <_fwalk+0x84> + 27e74: 94000304 addi r16,r18,12 + 27e78: 94800384 addi r18,r18,14 + 27e7c: 8080000b ldhu r2,0(r16) + 27e80: 8c7fffc4 addi r17,r17,-1 + 27e84: 813ffd04 addi r4,r16,-12 + 27e88: b080042e bgeu r22,r2,27e9c <_fwalk+0x78> + 27e8c: 9080000f ldh r2,0(r18) + 27e90: 14c00226 beq r2,r19,27e9c <_fwalk+0x78> + 27e94: a83ee83a callr r21 + 27e98: b8aeb03a or r23,r23,r2 + 27e9c: 84001a04 addi r16,r16,104 + 27ea0: 94801a04 addi r18,r18,104 + 27ea4: 8cfff51e bne r17,r19,27e7c <_gp+0xfffeb944> + 27ea8: a5000017 ldw r20,0(r20) + 27eac: a03fed1e bne r20,zero,27e64 <_gp+0xfffeb92c> + 27eb0: b805883a mov r2,r23 + 27eb4: dfc00817 ldw ra,32(sp) + 27eb8: ddc00717 ldw r23,28(sp) + 27ebc: dd800617 ldw r22,24(sp) + 27ec0: dd400517 ldw r21,20(sp) + 27ec4: dd000417 ldw r20,16(sp) + 27ec8: dcc00317 ldw r19,12(sp) + 27ecc: dc800217 ldw r18,8(sp) + 27ed0: dc400117 ldw r17,4(sp) + 27ed4: dc000017 ldw r16,0(sp) + 27ed8: dec00904 addi sp,sp,36 + 27edc: f800283a ret + 27ee0: 002f883a mov r23,zero + 27ee4: 003ff206 br 27eb0 <_gp+0xfffeb978> + +00027ee8 <_fwalk_reent>: + 27ee8: defff704 addi sp,sp,-36 + 27eec: dd000415 stw r20,16(sp) + 27ef0: dfc00815 stw ra,32(sp) + 27ef4: ddc00715 stw r23,28(sp) + 27ef8: dd800615 stw r22,24(sp) + 27efc: dd400515 stw r21,20(sp) + 27f00: dcc00315 stw r19,12(sp) + 27f04: dc800215 stw r18,8(sp) + 27f08: dc400115 stw r17,4(sp) + 27f0c: dc000015 stw r16,0(sp) + 27f10: 2500b804 addi r20,r4,736 + 27f14: a0002326 beq r20,zero,27fa4 <_fwalk_reent+0xbc> + 27f18: 282b883a mov r21,r5 + 27f1c: 2027883a mov r19,r4 + 27f20: 002f883a mov r23,zero + 27f24: 05800044 movi r22,1 + 27f28: 04bfffc4 movi r18,-1 + 27f2c: a4400117 ldw r17,4(r20) + 27f30: a4000217 ldw r16,8(r20) + 27f34: 8c7fffc4 addi r17,r17,-1 + 27f38: 88000c16 blt r17,zero,27f6c <_fwalk_reent+0x84> + 27f3c: 84000304 addi r16,r16,12 + 27f40: 8080000b ldhu r2,0(r16) + 27f44: 8c7fffc4 addi r17,r17,-1 + 27f48: 817ffd04 addi r5,r16,-12 + 27f4c: b080052e bgeu r22,r2,27f64 <_fwalk_reent+0x7c> + 27f50: 8080008f ldh r2,2(r16) + 27f54: 9809883a mov r4,r19 + 27f58: 14800226 beq r2,r18,27f64 <_fwalk_reent+0x7c> + 27f5c: a83ee83a callr r21 + 27f60: b8aeb03a or r23,r23,r2 + 27f64: 84001a04 addi r16,r16,104 + 27f68: 8cbff51e bne r17,r18,27f40 <_gp+0xfffeba08> + 27f6c: a5000017 ldw r20,0(r20) + 27f70: a03fee1e bne r20,zero,27f2c <_gp+0xfffeb9f4> + 27f74: b805883a mov r2,r23 + 27f78: dfc00817 ldw ra,32(sp) + 27f7c: ddc00717 ldw r23,28(sp) + 27f80: dd800617 ldw r22,24(sp) + 27f84: dd400517 ldw r21,20(sp) + 27f88: dd000417 ldw r20,16(sp) + 27f8c: dcc00317 ldw r19,12(sp) + 27f90: dc800217 ldw r18,8(sp) + 27f94: dc400117 ldw r17,4(sp) + 27f98: dc000017 ldw r16,0(sp) + 27f9c: dec00904 addi sp,sp,36 + 27fa0: f800283a ret + 27fa4: 002f883a mov r23,zero + 27fa8: 003ff206 br 27f74 <_gp+0xfffeba3c> + +00027fac <_setlocale_r>: + 27fac: 30001b26 beq r6,zero,2801c <_setlocale_r+0x70> + 27fb0: 014000f4 movhi r5,3 + 27fb4: defffe04 addi sp,sp,-8 + 27fb8: 29481a04 addi r5,r5,8296 + 27fbc: 3009883a mov r4,r6 + 27fc0: dc000015 stw r16,0(sp) + 27fc4: dfc00115 stw ra,4(sp) + 27fc8: 3021883a mov r16,r6 + 27fcc: 0029e440 call 29e44 + 27fd0: 1000061e bne r2,zero,27fec <_setlocale_r+0x40> + 27fd4: 008000f4 movhi r2,3 + 27fd8: 10881904 addi r2,r2,8292 + 27fdc: dfc00117 ldw ra,4(sp) + 27fe0: dc000017 ldw r16,0(sp) + 27fe4: dec00204 addi sp,sp,8 + 27fe8: f800283a ret + 27fec: 014000f4 movhi r5,3 + 27ff0: 29481904 addi r5,r5,8292 + 27ff4: 8009883a mov r4,r16 + 27ff8: 0029e440 call 29e44 + 27ffc: 103ff526 beq r2,zero,27fd4 <_gp+0xfffeba9c> + 28000: 014000f4 movhi r5,3 + 28004: 29480404 addi r5,r5,8208 + 28008: 8009883a mov r4,r16 + 2800c: 0029e440 call 29e44 + 28010: 103ff026 beq r2,zero,27fd4 <_gp+0xfffeba9c> + 28014: 0005883a mov r2,zero + 28018: 003ff006 br 27fdc <_gp+0xfffebaa4> + 2801c: 008000f4 movhi r2,3 + 28020: 10881904 addi r2,r2,8292 + 28024: f800283a ret + +00028028 <__locale_charset>: + 28028: 008000f4 movhi r2,3 + 2802c: 108cb604 addi r2,r2,13016 + 28030: f800283a ret + +00028034 <__locale_mb_cur_max>: + 28034: 008000f4 movhi r2,3 + 28038: 10915504 addi r2,r2,17748 + 2803c: 10800017 ldw r2,0(r2) + 28040: f800283a ret + +00028044 <__locale_msgcharset>: + 28044: 008000f4 movhi r2,3 + 28048: 108cae04 addi r2,r2,12984 + 2804c: f800283a ret + +00028050 <__locale_cjk_lang>: + 28050: 0005883a mov r2,zero + 28054: f800283a ret + +00028058 <_localeconv_r>: + 28058: 008000f4 movhi r2,3 + 2805c: 108cbe04 addi r2,r2,13048 + 28060: f800283a ret + +00028064 : + 28064: 008000f4 movhi r2,3 + 28068: 10915404 addi r2,r2,17744 + 2806c: 280d883a mov r6,r5 + 28070: 200b883a mov r5,r4 + 28074: 11000017 ldw r4,0(r2) + 28078: 0027fac1 jmpi 27fac <_setlocale_r> + +0002807c : + 2807c: 008000f4 movhi r2,3 + 28080: 108cbe04 addi r2,r2,13048 + 28084: f800283a ret + +00028088 <__smakebuf_r>: + 28088: 2880030b ldhu r2,12(r5) + 2808c: 10c0008c andi r3,r2,2 + 28090: 1800411e bne r3,zero,28198 <__smakebuf_r+0x110> + 28094: deffec04 addi sp,sp,-80 + 28098: dc000f15 stw r16,60(sp) + 2809c: 2821883a mov r16,r5 + 280a0: 2940038f ldh r5,14(r5) + 280a4: dc401015 stw r17,64(sp) + 280a8: dfc01315 stw ra,76(sp) + 280ac: dcc01215 stw r19,72(sp) + 280b0: dc801115 stw r18,68(sp) + 280b4: 2023883a mov r17,r4 + 280b8: 28001c16 blt r5,zero,2812c <__smakebuf_r+0xa4> + 280bc: d80d883a mov r6,sp + 280c0: 002bb440 call 2bb44 <_fstat_r> + 280c4: 10001816 blt r2,zero,28128 <__smakebuf_r+0xa0> + 280c8: d8800117 ldw r2,4(sp) + 280cc: 00e00014 movui r3,32768 + 280d0: 10bc000c andi r2,r2,61440 + 280d4: 14c80020 cmpeqi r19,r2,8192 + 280d8: 10c03726 beq r2,r3,281b8 <__smakebuf_r+0x130> + 280dc: 80c0030b ldhu r3,12(r16) + 280e0: 18c20014 ori r3,r3,2048 + 280e4: 80c0030d sth r3,12(r16) + 280e8: 00c80004 movi r3,8192 + 280ec: 10c0521e bne r2,r3,28238 <__smakebuf_r+0x1b0> + 280f0: 8140038f ldh r5,14(r16) + 280f4: 8809883a mov r4,r17 + 280f8: 002bba00 call 2bba0 <_isatty_r> + 280fc: 10004c26 beq r2,zero,28230 <__smakebuf_r+0x1a8> + 28100: 8080030b ldhu r2,12(r16) + 28104: 80c010c4 addi r3,r16,67 + 28108: 80c00015 stw r3,0(r16) + 2810c: 10800054 ori r2,r2,1 + 28110: 8080030d sth r2,12(r16) + 28114: 00800044 movi r2,1 + 28118: 80c00415 stw r3,16(r16) + 2811c: 80800515 stw r2,20(r16) + 28120: 04810004 movi r18,1024 + 28124: 00000706 br 28144 <__smakebuf_r+0xbc> + 28128: 8080030b ldhu r2,12(r16) + 2812c: 10c0200c andi r3,r2,128 + 28130: 18001f1e bne r3,zero,281b0 <__smakebuf_r+0x128> + 28134: 04810004 movi r18,1024 + 28138: 10820014 ori r2,r2,2048 + 2813c: 8080030d sth r2,12(r16) + 28140: 0027883a mov r19,zero + 28144: 900b883a mov r5,r18 + 28148: 8809883a mov r4,r17 + 2814c: 00226c00 call 226c0 <_malloc_r> + 28150: 10002c26 beq r2,zero,28204 <__smakebuf_r+0x17c> + 28154: 80c0030b ldhu r3,12(r16) + 28158: 010000b4 movhi r4,2 + 2815c: 211c6704 addi r4,r4,29084 + 28160: 89000f15 stw r4,60(r17) + 28164: 18c02014 ori r3,r3,128 + 28168: 80c0030d sth r3,12(r16) + 2816c: 80800015 stw r2,0(r16) + 28170: 80800415 stw r2,16(r16) + 28174: 84800515 stw r18,20(r16) + 28178: 98001a1e bne r19,zero,281e4 <__smakebuf_r+0x15c> + 2817c: dfc01317 ldw ra,76(sp) + 28180: dcc01217 ldw r19,72(sp) + 28184: dc801117 ldw r18,68(sp) + 28188: dc401017 ldw r17,64(sp) + 2818c: dc000f17 ldw r16,60(sp) + 28190: dec01404 addi sp,sp,80 + 28194: f800283a ret + 28198: 288010c4 addi r2,r5,67 + 2819c: 28800015 stw r2,0(r5) + 281a0: 28800415 stw r2,16(r5) + 281a4: 00800044 movi r2,1 + 281a8: 28800515 stw r2,20(r5) + 281ac: f800283a ret + 281b0: 04801004 movi r18,64 + 281b4: 003fe006 br 28138 <_gp+0xfffebc00> + 281b8: 81000a17 ldw r4,40(r16) + 281bc: 00c000f4 movhi r3,3 + 281c0: 18e77804 addi r3,r3,-25120 + 281c4: 20ffc51e bne r4,r3,280dc <_gp+0xfffebba4> + 281c8: 8080030b ldhu r2,12(r16) + 281cc: 04810004 movi r18,1024 + 281d0: 84801315 stw r18,76(r16) + 281d4: 1484b03a or r2,r2,r18 + 281d8: 8080030d sth r2,12(r16) + 281dc: 0027883a mov r19,zero + 281e0: 003fd806 br 28144 <_gp+0xfffebc0c> + 281e4: 8140038f ldh r5,14(r16) + 281e8: 8809883a mov r4,r17 + 281ec: 002bba00 call 2bba0 <_isatty_r> + 281f0: 103fe226 beq r2,zero,2817c <_gp+0xfffebc44> + 281f4: 8080030b ldhu r2,12(r16) + 281f8: 10800054 ori r2,r2,1 + 281fc: 8080030d sth r2,12(r16) + 28200: 003fde06 br 2817c <_gp+0xfffebc44> + 28204: 8080030b ldhu r2,12(r16) + 28208: 10c0800c andi r3,r2,512 + 2820c: 183fdb1e bne r3,zero,2817c <_gp+0xfffebc44> + 28210: 10800094 ori r2,r2,2 + 28214: 80c010c4 addi r3,r16,67 + 28218: 8080030d sth r2,12(r16) + 2821c: 00800044 movi r2,1 + 28220: 80c00015 stw r3,0(r16) + 28224: 80c00415 stw r3,16(r16) + 28228: 80800515 stw r2,20(r16) + 2822c: 003fd306 br 2817c <_gp+0xfffebc44> + 28230: 04810004 movi r18,1024 + 28234: 003fc306 br 28144 <_gp+0xfffebc0c> + 28238: 0027883a mov r19,zero + 2823c: 04810004 movi r18,1024 + 28240: 003fc006 br 28144 <_gp+0xfffebc0c> + +00028244 : + 28244: 208000cc andi r2,r4,3 + 28248: 280f883a mov r7,r5 + 2824c: 10003426 beq r2,zero,28320 + 28250: 30bfffc4 addi r2,r6,-1 + 28254: 30001a26 beq r6,zero,282c0 + 28258: 20c00003 ldbu r3,0(r4) + 2825c: 29803fcc andi r6,r5,255 + 28260: 30c0051e bne r6,r3,28278 + 28264: 00001806 br 282c8 + 28268: 10001526 beq r2,zero,282c0 + 2826c: 20c00003 ldbu r3,0(r4) + 28270: 10bfffc4 addi r2,r2,-1 + 28274: 30c01426 beq r6,r3,282c8 + 28278: 21000044 addi r4,r4,1 + 2827c: 20c000cc andi r3,r4,3 + 28280: 183ff91e bne r3,zero,28268 <_gp+0xfffebd30> + 28284: 020000c4 movi r8,3 + 28288: 40801136 bltu r8,r2,282d0 + 2828c: 10000c26 beq r2,zero,282c0 + 28290: 20c00003 ldbu r3,0(r4) + 28294: 29403fcc andi r5,r5,255 + 28298: 28c00b26 beq r5,r3,282c8 + 2829c: 20c00044 addi r3,r4,1 + 282a0: 39803fcc andi r6,r7,255 + 282a4: 2089883a add r4,r4,r2 + 282a8: 00000306 br 282b8 + 282ac: 18c00044 addi r3,r3,1 + 282b0: 197fffc3 ldbu r5,-1(r3) + 282b4: 31400526 beq r6,r5,282cc + 282b8: 1805883a mov r2,r3 + 282bc: 20fffb1e bne r4,r3,282ac <_gp+0xfffebd74> + 282c0: 0005883a mov r2,zero + 282c4: f800283a ret + 282c8: 2005883a mov r2,r4 + 282cc: f800283a ret + 282d0: 28c03fcc andi r3,r5,255 + 282d4: 1812923a slli r9,r3,8 + 282d8: 02ffbff4 movhi r11,65279 + 282dc: 02a02074 movhi r10,32897 + 282e0: 48d2b03a or r9,r9,r3 + 282e4: 4806943a slli r3,r9,16 + 282e8: 5affbfc4 addi r11,r11,-257 + 282ec: 52a02004 addi r10,r10,-32640 + 282f0: 48d2b03a or r9,r9,r3 + 282f4: 20c00017 ldw r3,0(r4) + 282f8: 48c6f03a xor r3,r9,r3 + 282fc: 1acd883a add r6,r3,r11 + 28300: 00c6303a nor r3,zero,r3 + 28304: 30c6703a and r3,r6,r3 + 28308: 1a86703a and r3,r3,r10 + 2830c: 183fe01e bne r3,zero,28290 <_gp+0xfffebd58> + 28310: 10bfff04 addi r2,r2,-4 + 28314: 21000104 addi r4,r4,4 + 28318: 40bff636 bltu r8,r2,282f4 <_gp+0xfffebdbc> + 2831c: 003fdb06 br 2828c <_gp+0xfffebd54> + 28320: 3005883a mov r2,r6 + 28324: 003fd706 br 28284 <_gp+0xfffebd4c> + +00028328 : + 28328: defffd04 addi sp,sp,-12 + 2832c: dfc00215 stw ra,8(sp) + 28330: dc400115 stw r17,4(sp) + 28334: dc000015 stw r16,0(sp) + 28338: 00c003c4 movi r3,15 + 2833c: 2005883a mov r2,r4 + 28340: 1980452e bgeu r3,r6,28458 + 28344: 2906b03a or r3,r5,r4 + 28348: 18c000cc andi r3,r3,3 + 2834c: 1800441e bne r3,zero,28460 + 28350: 347ffc04 addi r17,r6,-16 + 28354: 8822d13a srli r17,r17,4 + 28358: 28c00104 addi r3,r5,4 + 2835c: 23400104 addi r13,r4,4 + 28360: 8820913a slli r16,r17,4 + 28364: 2b000204 addi r12,r5,8 + 28368: 22c00204 addi r11,r4,8 + 2836c: 84000504 addi r16,r16,20 + 28370: 2a800304 addi r10,r5,12 + 28374: 22400304 addi r9,r4,12 + 28378: 2c21883a add r16,r5,r16 + 2837c: 2811883a mov r8,r5 + 28380: 200f883a mov r7,r4 + 28384: 41000017 ldw r4,0(r8) + 28388: 1fc00017 ldw ra,0(r3) + 2838c: 63c00017 ldw r15,0(r12) + 28390: 39000015 stw r4,0(r7) + 28394: 53800017 ldw r14,0(r10) + 28398: 6fc00015 stw ra,0(r13) + 2839c: 5bc00015 stw r15,0(r11) + 283a0: 4b800015 stw r14,0(r9) + 283a4: 18c00404 addi r3,r3,16 + 283a8: 39c00404 addi r7,r7,16 + 283ac: 42000404 addi r8,r8,16 + 283b0: 6b400404 addi r13,r13,16 + 283b4: 63000404 addi r12,r12,16 + 283b8: 5ac00404 addi r11,r11,16 + 283bc: 52800404 addi r10,r10,16 + 283c0: 4a400404 addi r9,r9,16 + 283c4: 1c3fef1e bne r3,r16,28384 <_gp+0xfffebe4c> + 283c8: 89c00044 addi r7,r17,1 + 283cc: 380e913a slli r7,r7,4 + 283d0: 310003cc andi r4,r6,15 + 283d4: 02c000c4 movi r11,3 + 283d8: 11c7883a add r3,r2,r7 + 283dc: 29cb883a add r5,r5,r7 + 283e0: 5900212e bgeu r11,r4,28468 + 283e4: 1813883a mov r9,r3 + 283e8: 2811883a mov r8,r5 + 283ec: 200f883a mov r7,r4 + 283f0: 42800017 ldw r10,0(r8) + 283f4: 4a400104 addi r9,r9,4 + 283f8: 39ffff04 addi r7,r7,-4 + 283fc: 4abfff15 stw r10,-4(r9) + 28400: 42000104 addi r8,r8,4 + 28404: 59fffa36 bltu r11,r7,283f0 <_gp+0xfffebeb8> + 28408: 213fff04 addi r4,r4,-4 + 2840c: 2008d0ba srli r4,r4,2 + 28410: 318000cc andi r6,r6,3 + 28414: 21000044 addi r4,r4,1 + 28418: 2109883a add r4,r4,r4 + 2841c: 2109883a add r4,r4,r4 + 28420: 1907883a add r3,r3,r4 + 28424: 290b883a add r5,r5,r4 + 28428: 30000626 beq r6,zero,28444 + 2842c: 198d883a add r6,r3,r6 + 28430: 29c00003 ldbu r7,0(r5) + 28434: 18c00044 addi r3,r3,1 + 28438: 29400044 addi r5,r5,1 + 2843c: 19ffffc5 stb r7,-1(r3) + 28440: 19bffb1e bne r3,r6,28430 <_gp+0xfffebef8> + 28444: dfc00217 ldw ra,8(sp) + 28448: dc400117 ldw r17,4(sp) + 2844c: dc000017 ldw r16,0(sp) + 28450: dec00304 addi sp,sp,12 + 28454: f800283a ret + 28458: 2007883a mov r3,r4 + 2845c: 003ff206 br 28428 <_gp+0xfffebef0> + 28460: 2007883a mov r3,r4 + 28464: 003ff106 br 2842c <_gp+0xfffebef4> + 28468: 200d883a mov r6,r4 + 2846c: 003fee06 br 28428 <_gp+0xfffebef0> + +00028470 : + 28470: 2005883a mov r2,r4 + 28474: 29000b2e bgeu r5,r4,284a4 + 28478: 298f883a add r7,r5,r6 + 2847c: 21c0092e bgeu r4,r7,284a4 + 28480: 2187883a add r3,r4,r6 + 28484: 198bc83a sub r5,r3,r6 + 28488: 30004826 beq r6,zero,285ac + 2848c: 39ffffc4 addi r7,r7,-1 + 28490: 39000003 ldbu r4,0(r7) + 28494: 18ffffc4 addi r3,r3,-1 + 28498: 19000005 stb r4,0(r3) + 2849c: 28fffb1e bne r5,r3,2848c <_gp+0xfffebf54> 284a0: f800283a ret - 284a4: 002f883a mov r23,zero - 284a8: 003ff206 br 28474 <_fwalk+0x8c> - -000284ac <_fwalk_reent>: - 284ac: defff704 addi sp,sp,-36 - 284b0: dd000415 stw r20,16(sp) - 284b4: dfc00815 stw ra,32(sp) - 284b8: ddc00715 stw r23,28(sp) - 284bc: dd800615 stw r22,24(sp) - 284c0: dd400515 stw r21,20(sp) - 284c4: dcc00315 stw r19,12(sp) - 284c8: dc800215 stw r18,8(sp) - 284cc: dc400115 stw r17,4(sp) - 284d0: dc000015 stw r16,0(sp) - 284d4: 2500b804 addi r20,r4,736 - 284d8: a0002326 beq r20,zero,28568 <_fwalk_reent+0xbc> - 284dc: 282b883a mov r21,r5 - 284e0: 2027883a mov r19,r4 - 284e4: 002f883a mov r23,zero - 284e8: 05800044 movi r22,1 - 284ec: 04bfffc4 movi r18,-1 - 284f0: a4400117 ldw r17,4(r20) - 284f4: a4000217 ldw r16,8(r20) - 284f8: 8c7fffc4 addi r17,r17,-1 - 284fc: 88000c16 blt r17,zero,28530 <_fwalk_reent+0x84> - 28500: 84000304 addi r16,r16,12 - 28504: 8080000b ldhu r2,0(r16) - 28508: 8c7fffc4 addi r17,r17,-1 - 2850c: 817ffd04 addi r5,r16,-12 - 28510: b080052e bgeu r22,r2,28528 <_fwalk_reent+0x7c> - 28514: 8080008f ldh r2,2(r16) - 28518: 9809883a mov r4,r19 - 2851c: 14800226 beq r2,r18,28528 <_fwalk_reent+0x7c> - 28520: a83ee83a callr r21 - 28524: b8aeb03a or r23,r23,r2 - 28528: 84001a04 addi r16,r16,104 - 2852c: 8cbff51e bne r17,r18,28504 <_fwalk_reent+0x58> - 28530: a5000017 ldw r20,0(r20) - 28534: a03fee1e bne r20,zero,284f0 <_fwalk_reent+0x44> - 28538: b805883a mov r2,r23 - 2853c: dfc00817 ldw ra,32(sp) - 28540: ddc00717 ldw r23,28(sp) - 28544: dd800617 ldw r22,24(sp) - 28548: dd400517 ldw r21,20(sp) - 2854c: dd000417 ldw r20,16(sp) - 28550: dcc00317 ldw r19,12(sp) - 28554: dc800217 ldw r18,8(sp) - 28558: dc400117 ldw r17,4(sp) - 2855c: dc000017 ldw r16,0(sp) - 28560: dec00904 addi sp,sp,36 - 28564: f800283a ret - 28568: 002f883a mov r23,zero - 2856c: 003ff206 br 28538 <_fwalk_reent+0x8c> - -00028570 <_setlocale_r>: - 28570: 30001b26 beq r6,zero,285e0 <_setlocale_r+0x70> - 28574: 014000f4 movhi r5,3 - 28578: defffe04 addi sp,sp,-8 - 2857c: 294a6704 addi r5,r5,10652 - 28580: 3009883a mov r4,r6 - 28584: dc000015 stw r16,0(sp) - 28588: dfc00115 stw ra,4(sp) - 2858c: 3021883a mov r16,r6 - 28590: 002a5f80 call 2a5f8 - 28594: 1000061e bne r2,zero,285b0 <_setlocale_r+0x40> - 28598: 008000f4 movhi r2,3 - 2859c: 108a4804 addi r2,r2,10528 - 285a0: dfc00117 ldw ra,4(sp) - 285a4: dc000017 ldw r16,0(sp) - 285a8: dec00204 addi sp,sp,8 + 284a4: 00c003c4 movi r3,15 + 284a8: 1980412e bgeu r3,r6,285b0 + 284ac: 2886b03a or r3,r5,r2 + 284b0: 18c000cc andi r3,r3,3 + 284b4: 1800401e bne r3,zero,285b8 + 284b8: 33fffc04 addi r15,r6,-16 + 284bc: 781ed13a srli r15,r15,4 + 284c0: 28c00104 addi r3,r5,4 + 284c4: 13400104 addi r13,r2,4 + 284c8: 781c913a slli r14,r15,4 + 284cc: 2b000204 addi r12,r5,8 + 284d0: 12c00204 addi r11,r2,8 + 284d4: 73800504 addi r14,r14,20 + 284d8: 2a800304 addi r10,r5,12 + 284dc: 12400304 addi r9,r2,12 + 284e0: 2b9d883a add r14,r5,r14 + 284e4: 2811883a mov r8,r5 + 284e8: 100f883a mov r7,r2 + 284ec: 41000017 ldw r4,0(r8) + 284f0: 39c00404 addi r7,r7,16 + 284f4: 18c00404 addi r3,r3,16 + 284f8: 393ffc15 stw r4,-16(r7) + 284fc: 193ffc17 ldw r4,-16(r3) + 28500: 6b400404 addi r13,r13,16 + 28504: 5ac00404 addi r11,r11,16 + 28508: 693ffc15 stw r4,-16(r13) + 2850c: 61000017 ldw r4,0(r12) + 28510: 4a400404 addi r9,r9,16 + 28514: 42000404 addi r8,r8,16 + 28518: 593ffc15 stw r4,-16(r11) + 2851c: 51000017 ldw r4,0(r10) + 28520: 63000404 addi r12,r12,16 + 28524: 52800404 addi r10,r10,16 + 28528: 493ffc15 stw r4,-16(r9) + 2852c: 1bbfef1e bne r3,r14,284ec <_gp+0xfffebfb4> + 28530: 79000044 addi r4,r15,1 + 28534: 2008913a slli r4,r4,4 + 28538: 328003cc andi r10,r6,15 + 2853c: 02c000c4 movi r11,3 + 28540: 1107883a add r3,r2,r4 + 28544: 290b883a add r5,r5,r4 + 28548: 5a801e2e bgeu r11,r10,285c4 + 2854c: 1813883a mov r9,r3 + 28550: 2811883a mov r8,r5 + 28554: 500f883a mov r7,r10 + 28558: 41000017 ldw r4,0(r8) + 2855c: 4a400104 addi r9,r9,4 + 28560: 39ffff04 addi r7,r7,-4 + 28564: 493fff15 stw r4,-4(r9) + 28568: 42000104 addi r8,r8,4 + 2856c: 59fffa36 bltu r11,r7,28558 <_gp+0xfffec020> + 28570: 513fff04 addi r4,r10,-4 + 28574: 2008d0ba srli r4,r4,2 + 28578: 318000cc andi r6,r6,3 + 2857c: 21000044 addi r4,r4,1 + 28580: 2109883a add r4,r4,r4 + 28584: 2109883a add r4,r4,r4 + 28588: 1907883a add r3,r3,r4 + 2858c: 290b883a add r5,r5,r4 + 28590: 30000b26 beq r6,zero,285c0 + 28594: 198d883a add r6,r3,r6 + 28598: 29c00003 ldbu r7,0(r5) + 2859c: 18c00044 addi r3,r3,1 + 285a0: 29400044 addi r5,r5,1 + 285a4: 19ffffc5 stb r7,-1(r3) + 285a8: 19bffb1e bne r3,r6,28598 <_gp+0xfffec060> 285ac: f800283a ret - 285b0: 014000f4 movhi r5,3 - 285b4: 294a4804 addi r5,r5,10528 - 285b8: 8009883a mov r4,r16 - 285bc: 002a5f80 call 2a5f8 - 285c0: 103ff526 beq r2,zero,28598 <_setlocale_r+0x28> - 285c4: 014000f4 movhi r5,3 - 285c8: 294a5204 addi r5,r5,10568 - 285cc: 8009883a mov r4,r16 - 285d0: 002a5f80 call 2a5f8 - 285d4: 103ff026 beq r2,zero,28598 <_setlocale_r+0x28> - 285d8: 0005883a mov r2,zero - 285dc: 003ff006 br 285a0 <_setlocale_r+0x30> - 285e0: 008000f4 movhi r2,3 - 285e4: 108a4804 addi r2,r2,10528 - 285e8: f800283a ret + 285b0: 1007883a mov r3,r2 + 285b4: 003ff606 br 28590 <_gp+0xfffec058> + 285b8: 1007883a mov r3,r2 + 285bc: 003ff506 br 28594 <_gp+0xfffec05c> + 285c0: f800283a ret + 285c4: 500d883a mov r6,r10 + 285c8: 003ff106 br 28590 <_gp+0xfffec058> -000285ec <__locale_charset>: - 285ec: 008000f4 movhi r2,3 - 285f0: 108f0304 addi r2,r2,15372 - 285f4: f800283a ret +000285cc <_Balloc>: + 285cc: 20801317 ldw r2,76(r4) + 285d0: defffc04 addi sp,sp,-16 + 285d4: dc400115 stw r17,4(sp) + 285d8: dc000015 stw r16,0(sp) + 285dc: dfc00315 stw ra,12(sp) + 285e0: dc800215 stw r18,8(sp) + 285e4: 2023883a mov r17,r4 + 285e8: 2821883a mov r16,r5 + 285ec: 10000f26 beq r2,zero,2862c <_Balloc+0x60> + 285f0: 8407883a add r3,r16,r16 + 285f4: 18c7883a add r3,r3,r3 + 285f8: 10c7883a add r3,r2,r3 + 285fc: 18800017 ldw r2,0(r3) + 28600: 10001126 beq r2,zero,28648 <_Balloc+0x7c> + 28604: 11000017 ldw r4,0(r2) + 28608: 19000015 stw r4,0(r3) + 2860c: 10000415 stw zero,16(r2) + 28610: 10000315 stw zero,12(r2) + 28614: dfc00317 ldw ra,12(sp) + 28618: dc800217 ldw r18,8(sp) + 2861c: dc400117 ldw r17,4(sp) + 28620: dc000017 ldw r16,0(sp) + 28624: dec00404 addi sp,sp,16 + 28628: f800283a ret + 2862c: 01800844 movi r6,33 + 28630: 01400104 movi r5,4 + 28634: 002b7740 call 2b774 <_calloc_r> + 28638: 88801315 stw r2,76(r17) + 2863c: 103fec1e bne r2,zero,285f0 <_gp+0xfffec0b8> + 28640: 0005883a mov r2,zero + 28644: 003ff306 br 28614 <_gp+0xfffec0dc> + 28648: 01400044 movi r5,1 + 2864c: 2c24983a sll r18,r5,r16 + 28650: 8809883a mov r4,r17 + 28654: 91800144 addi r6,r18,5 + 28658: 318d883a add r6,r6,r6 + 2865c: 318d883a add r6,r6,r6 + 28660: 002b7740 call 2b774 <_calloc_r> + 28664: 103ff626 beq r2,zero,28640 <_gp+0xfffec108> + 28668: 14000115 stw r16,4(r2) + 2866c: 14800215 stw r18,8(r2) + 28670: 003fe606 br 2860c <_gp+0xfffec0d4> -000285f8 <__locale_mb_cur_max>: - 285f8: 008000f4 movhi r2,3 - 285fc: 1093a204 addi r2,r2,20104 - 28600: 10800017 ldw r2,0(r2) - 28604: f800283a ret +00028674 <_Bfree>: + 28674: 28000826 beq r5,zero,28698 <_Bfree+0x24> + 28678: 28c00117 ldw r3,4(r5) + 2867c: 20801317 ldw r2,76(r4) + 28680: 18c7883a add r3,r3,r3 + 28684: 18c7883a add r3,r3,r3 + 28688: 10c5883a add r2,r2,r3 + 2868c: 10c00017 ldw r3,0(r2) + 28690: 28c00015 stw r3,0(r5) + 28694: 11400015 stw r5,0(r2) + 28698: f800283a ret -00028608 <__locale_msgcharset>: - 28608: 008000f4 movhi r2,3 - 2860c: 108efb04 addi r2,r2,15340 - 28610: f800283a ret +0002869c <__multadd>: + 2869c: defffa04 addi sp,sp,-24 + 286a0: dc800315 stw r18,12(sp) + 286a4: dc400215 stw r17,8(sp) + 286a8: dc000115 stw r16,4(sp) + 286ac: 2823883a mov r17,r5 + 286b0: 2c000417 ldw r16,16(r5) + 286b4: dfc00515 stw ra,20(sp) + 286b8: dcc00415 stw r19,16(sp) + 286bc: 2025883a mov r18,r4 + 286c0: 29400504 addi r5,r5,20 + 286c4: 0011883a mov r8,zero + 286c8: 28c00017 ldw r3,0(r5) + 286cc: 29400104 addi r5,r5,4 + 286d0: 42000044 addi r8,r8,1 + 286d4: 18bfffcc andi r2,r3,65535 + 286d8: 1185383a mul r2,r2,r6 + 286dc: 1806d43a srli r3,r3,16 + 286e0: 11cf883a add r7,r2,r7 + 286e4: 3808d43a srli r4,r7,16 + 286e8: 1987383a mul r3,r3,r6 + 286ec: 38bfffcc andi r2,r7,65535 + 286f0: 1907883a add r3,r3,r4 + 286f4: 1808943a slli r4,r3,16 + 286f8: 180ed43a srli r7,r3,16 + 286fc: 2085883a add r2,r4,r2 + 28700: 28bfff15 stw r2,-4(r5) + 28704: 443ff016 blt r8,r16,286c8 <_gp+0xfffec190> + 28708: 38000926 beq r7,zero,28730 <__multadd+0x94> + 2870c: 88800217 ldw r2,8(r17) + 28710: 80800f0e bge r16,r2,28750 <__multadd+0xb4> + 28714: 80800144 addi r2,r16,5 + 28718: 1085883a add r2,r2,r2 + 2871c: 1085883a add r2,r2,r2 + 28720: 8885883a add r2,r17,r2 + 28724: 11c00015 stw r7,0(r2) + 28728: 84000044 addi r16,r16,1 + 2872c: 8c000415 stw r16,16(r17) + 28730: 8805883a mov r2,r17 + 28734: dfc00517 ldw ra,20(sp) + 28738: dcc00417 ldw r19,16(sp) + 2873c: dc800317 ldw r18,12(sp) + 28740: dc400217 ldw r17,8(sp) + 28744: dc000117 ldw r16,4(sp) + 28748: dec00604 addi sp,sp,24 + 2874c: f800283a ret + 28750: 89400117 ldw r5,4(r17) + 28754: 9009883a mov r4,r18 + 28758: d9c00015 stw r7,0(sp) + 2875c: 29400044 addi r5,r5,1 + 28760: 00285cc0 call 285cc <_Balloc> + 28764: 89800417 ldw r6,16(r17) + 28768: 89400304 addi r5,r17,12 + 2876c: 11000304 addi r4,r2,12 + 28770: 31800084 addi r6,r6,2 + 28774: 318d883a add r6,r6,r6 + 28778: 318d883a add r6,r6,r6 + 2877c: 1027883a mov r19,r2 + 28780: 00283280 call 28328 + 28784: d9c00017 ldw r7,0(sp) + 28788: 88000a26 beq r17,zero,287b4 <__multadd+0x118> + 2878c: 88c00117 ldw r3,4(r17) + 28790: 90801317 ldw r2,76(r18) + 28794: 18c7883a add r3,r3,r3 + 28798: 18c7883a add r3,r3,r3 + 2879c: 10c5883a add r2,r2,r3 + 287a0: 10c00017 ldw r3,0(r2) + 287a4: 88c00015 stw r3,0(r17) + 287a8: 14400015 stw r17,0(r2) + 287ac: 9823883a mov r17,r19 + 287b0: 003fd806 br 28714 <_gp+0xfffec1dc> + 287b4: 9823883a mov r17,r19 + 287b8: 003fd606 br 28714 <_gp+0xfffec1dc> -00028614 <__locale_cjk_lang>: - 28614: 0005883a mov r2,zero - 28618: f800283a ret +000287bc <__s2b>: + 287bc: defff904 addi sp,sp,-28 + 287c0: dc400115 stw r17,4(sp) + 287c4: dc000015 stw r16,0(sp) + 287c8: 2023883a mov r17,r4 + 287cc: 2821883a mov r16,r5 + 287d0: 39000204 addi r4,r7,8 + 287d4: 01400244 movi r5,9 + 287d8: dcc00315 stw r19,12(sp) + 287dc: dc800215 stw r18,8(sp) + 287e0: dfc00615 stw ra,24(sp) + 287e4: dd400515 stw r21,20(sp) + 287e8: dd000415 stw r20,16(sp) + 287ec: 3825883a mov r18,r7 + 287f0: 3027883a mov r19,r6 + 287f4: 00224e40 call 224e4 <__divsi3> + 287f8: 00c00044 movi r3,1 + 287fc: 000b883a mov r5,zero + 28800: 1880030e bge r3,r2,28810 <__s2b+0x54> + 28804: 18c7883a add r3,r3,r3 + 28808: 29400044 addi r5,r5,1 + 2880c: 18bffd16 blt r3,r2,28804 <_gp+0xfffec2cc> + 28810: 8809883a mov r4,r17 + 28814: 00285cc0 call 285cc <_Balloc> + 28818: d8c00717 ldw r3,28(sp) + 2881c: 10c00515 stw r3,20(r2) + 28820: 00c00044 movi r3,1 + 28824: 10c00415 stw r3,16(r2) + 28828: 00c00244 movi r3,9 + 2882c: 1cc0210e bge r3,r19,288b4 <__s2b+0xf8> + 28830: 80eb883a add r21,r16,r3 + 28834: a829883a mov r20,r21 + 28838: 84e1883a add r16,r16,r19 + 2883c: a1c00007 ldb r7,0(r20) + 28840: 01800284 movi r6,10 + 28844: a5000044 addi r20,r20,1 + 28848: 100b883a mov r5,r2 + 2884c: 39fff404 addi r7,r7,-48 + 28850: 8809883a mov r4,r17 + 28854: 002869c0 call 2869c <__multadd> + 28858: a43ff81e bne r20,r16,2883c <_gp+0xfffec304> + 2885c: ace1883a add r16,r21,r19 + 28860: 843ffe04 addi r16,r16,-8 + 28864: 9c800a0e bge r19,r18,28890 <__s2b+0xd4> + 28868: 94e5c83a sub r18,r18,r19 + 2886c: 84a5883a add r18,r16,r18 + 28870: 81c00007 ldb r7,0(r16) + 28874: 01800284 movi r6,10 + 28878: 84000044 addi r16,r16,1 + 2887c: 100b883a mov r5,r2 + 28880: 39fff404 addi r7,r7,-48 + 28884: 8809883a mov r4,r17 + 28888: 002869c0 call 2869c <__multadd> + 2888c: 84bff81e bne r16,r18,28870 <_gp+0xfffec338> + 28890: dfc00617 ldw ra,24(sp) + 28894: dd400517 ldw r21,20(sp) + 28898: dd000417 ldw r20,16(sp) + 2889c: dcc00317 ldw r19,12(sp) + 288a0: dc800217 ldw r18,8(sp) + 288a4: dc400117 ldw r17,4(sp) + 288a8: dc000017 ldw r16,0(sp) + 288ac: dec00704 addi sp,sp,28 + 288b0: f800283a ret + 288b4: 84000284 addi r16,r16,10 + 288b8: 1827883a mov r19,r3 + 288bc: 003fe906 br 28864 <_gp+0xfffec32c> -0002861c <_localeconv_r>: - 2861c: 008000f4 movhi r2,3 - 28620: 108f0b04 addi r2,r2,15404 - 28624: f800283a ret +000288c0 <__hi0bits>: + 288c0: 20bfffec andhi r2,r4,65535 + 288c4: 1000141e bne r2,zero,28918 <__hi0bits+0x58> + 288c8: 2008943a slli r4,r4,16 + 288cc: 00800404 movi r2,16 + 288d0: 20ffc02c andhi r3,r4,65280 + 288d4: 1800021e bne r3,zero,288e0 <__hi0bits+0x20> + 288d8: 2008923a slli r4,r4,8 + 288dc: 10800204 addi r2,r2,8 + 288e0: 20fc002c andhi r3,r4,61440 + 288e4: 1800021e bne r3,zero,288f0 <__hi0bits+0x30> + 288e8: 2008913a slli r4,r4,4 + 288ec: 10800104 addi r2,r2,4 + 288f0: 20f0002c andhi r3,r4,49152 + 288f4: 1800031e bne r3,zero,28904 <__hi0bits+0x44> + 288f8: 2109883a add r4,r4,r4 + 288fc: 10800084 addi r2,r2,2 + 28900: 2109883a add r4,r4,r4 + 28904: 20000316 blt r4,zero,28914 <__hi0bits+0x54> + 28908: 2110002c andhi r4,r4,16384 + 2890c: 2000041e bne r4,zero,28920 <__hi0bits+0x60> + 28910: 00800804 movi r2,32 + 28914: f800283a ret + 28918: 0005883a mov r2,zero + 2891c: 003fec06 br 288d0 <_gp+0xfffec398> + 28920: 10800044 addi r2,r2,1 + 28924: f800283a ret -00028628 : - 28628: 008000f4 movhi r2,3 - 2862c: 10939f04 addi r2,r2,20092 - 28630: 280d883a mov r6,r5 - 28634: 200b883a mov r5,r4 - 28638: 11000017 ldw r4,0(r2) - 2863c: 00285701 jmpi 28570 <_setlocale_r> +00028928 <__lo0bits>: + 28928: 20c00017 ldw r3,0(r4) + 2892c: 188001cc andi r2,r3,7 + 28930: 10000826 beq r2,zero,28954 <__lo0bits+0x2c> + 28934: 1880004c andi r2,r3,1 + 28938: 1000211e bne r2,zero,289c0 <__lo0bits+0x98> + 2893c: 1880008c andi r2,r3,2 + 28940: 1000211e bne r2,zero,289c8 <__lo0bits+0xa0> + 28944: 1806d0ba srli r3,r3,2 + 28948: 00800084 movi r2,2 + 2894c: 20c00015 stw r3,0(r4) + 28950: f800283a ret + 28954: 18bfffcc andi r2,r3,65535 + 28958: 10001326 beq r2,zero,289a8 <__lo0bits+0x80> + 2895c: 0005883a mov r2,zero + 28960: 19403fcc andi r5,r3,255 + 28964: 2800021e bne r5,zero,28970 <__lo0bits+0x48> + 28968: 1806d23a srli r3,r3,8 + 2896c: 10800204 addi r2,r2,8 + 28970: 194003cc andi r5,r3,15 + 28974: 2800021e bne r5,zero,28980 <__lo0bits+0x58> + 28978: 1806d13a srli r3,r3,4 + 2897c: 10800104 addi r2,r2,4 + 28980: 194000cc andi r5,r3,3 + 28984: 2800021e bne r5,zero,28990 <__lo0bits+0x68> + 28988: 1806d0ba srli r3,r3,2 + 2898c: 10800084 addi r2,r2,2 + 28990: 1940004c andi r5,r3,1 + 28994: 2800081e bne r5,zero,289b8 <__lo0bits+0x90> + 28998: 1806d07a srli r3,r3,1 + 2899c: 1800051e bne r3,zero,289b4 <__lo0bits+0x8c> + 289a0: 00800804 movi r2,32 + 289a4: f800283a ret + 289a8: 1806d43a srli r3,r3,16 + 289ac: 00800404 movi r2,16 + 289b0: 003feb06 br 28960 <_gp+0xfffec428> + 289b4: 10800044 addi r2,r2,1 + 289b8: 20c00015 stw r3,0(r4) + 289bc: f800283a ret + 289c0: 0005883a mov r2,zero + 289c4: f800283a ret + 289c8: 1806d07a srli r3,r3,1 + 289cc: 00800044 movi r2,1 + 289d0: 20c00015 stw r3,0(r4) + 289d4: f800283a ret -00028640 : - 28640: 008000f4 movhi r2,3 - 28644: 108f0b04 addi r2,r2,15404 - 28648: f800283a ret +000289d8 <__i2b>: + 289d8: defffd04 addi sp,sp,-12 + 289dc: dc000015 stw r16,0(sp) + 289e0: 04000044 movi r16,1 + 289e4: dc400115 stw r17,4(sp) + 289e8: 2823883a mov r17,r5 + 289ec: 800b883a mov r5,r16 + 289f0: dfc00215 stw ra,8(sp) + 289f4: 00285cc0 call 285cc <_Balloc> + 289f8: 14400515 stw r17,20(r2) + 289fc: 14000415 stw r16,16(r2) + 28a00: dfc00217 ldw ra,8(sp) + 28a04: dc400117 ldw r17,4(sp) + 28a08: dc000017 ldw r16,0(sp) + 28a0c: dec00304 addi sp,sp,12 + 28a10: f800283a ret -0002864c <__smakebuf_r>: - 2864c: 2880030b ldhu r2,12(r5) - 28650: 10c0008c andi r3,r2,2 - 28654: 1800411e bne r3,zero,2875c <__smakebuf_r+0x110> - 28658: deffec04 addi sp,sp,-80 - 2865c: dc000f15 stw r16,60(sp) - 28660: 2821883a mov r16,r5 - 28664: 2940038f ldh r5,14(r5) - 28668: dc401015 stw r17,64(sp) - 2866c: dfc01315 stw ra,76(sp) - 28670: dcc01215 stw r19,72(sp) - 28674: dc801115 stw r18,68(sp) - 28678: 2023883a mov r17,r4 - 2867c: 28001c16 blt r5,zero,286f0 <__smakebuf_r+0xa4> - 28680: d80d883a mov r6,sp - 28684: 002c2f80 call 2c2f8 <_fstat_r> - 28688: 10001816 blt r2,zero,286ec <__smakebuf_r+0xa0> - 2868c: d8800117 ldw r2,4(sp) - 28690: 00e00014 movui r3,32768 - 28694: 10bc000c andi r2,r2,61440 - 28698: 14c80020 cmpeqi r19,r2,8192 - 2869c: 10c03726 beq r2,r3,2877c <__smakebuf_r+0x130> - 286a0: 80c0030b ldhu r3,12(r16) - 286a4: 18c20014 ori r3,r3,2048 - 286a8: 80c0030d sth r3,12(r16) - 286ac: 00c80004 movi r3,8192 - 286b0: 10c0521e bne r2,r3,287fc <__smakebuf_r+0x1b0> - 286b4: 8140038f ldh r5,14(r16) - 286b8: 8809883a mov r4,r17 - 286bc: 002c3540 call 2c354 <_isatty_r> - 286c0: 10004c26 beq r2,zero,287f4 <__smakebuf_r+0x1a8> - 286c4: 8080030b ldhu r2,12(r16) - 286c8: 80c010c4 addi r3,r16,67 - 286cc: 80c00015 stw r3,0(r16) - 286d0: 10800054 ori r2,r2,1 - 286d4: 8080030d sth r2,12(r16) - 286d8: 00800044 movi r2,1 - 286dc: 80c00415 stw r3,16(r16) - 286e0: 80800515 stw r2,20(r16) - 286e4: 04810004 movi r18,1024 - 286e8: 00000706 br 28708 <__smakebuf_r+0xbc> - 286ec: 8080030b ldhu r2,12(r16) - 286f0: 10c0200c andi r3,r2,128 - 286f4: 18001f1e bne r3,zero,28774 <__smakebuf_r+0x128> - 286f8: 04810004 movi r18,1024 - 286fc: 10820014 ori r2,r2,2048 - 28700: 8080030d sth r2,12(r16) - 28704: 0027883a mov r19,zero - 28708: 900b883a mov r5,r18 - 2870c: 8809883a mov r4,r17 - 28710: 0022bfc0 call 22bfc <_malloc_r> - 28714: 10002c26 beq r2,zero,287c8 <__smakebuf_r+0x17c> - 28718: 80c0030b ldhu r3,12(r16) - 2871c: 010000b4 movhi r4,2 - 28720: 211dd804 addi r4,r4,30560 - 28724: 89000f15 stw r4,60(r17) - 28728: 18c02014 ori r3,r3,128 - 2872c: 80c0030d sth r3,12(r16) - 28730: 80800015 stw r2,0(r16) - 28734: 80800415 stw r2,16(r16) - 28738: 84800515 stw r18,20(r16) - 2873c: 98001a1e bne r19,zero,287a8 <__smakebuf_r+0x15c> - 28740: dfc01317 ldw ra,76(sp) - 28744: dcc01217 ldw r19,72(sp) - 28748: dc801117 ldw r18,68(sp) - 2874c: dc401017 ldw r17,64(sp) - 28750: dc000f17 ldw r16,60(sp) - 28754: dec01404 addi sp,sp,80 - 28758: f800283a ret - 2875c: 288010c4 addi r2,r5,67 - 28760: 28800015 stw r2,0(r5) - 28764: 28800415 stw r2,16(r5) - 28768: 00800044 movi r2,1 - 2876c: 28800515 stw r2,20(r5) - 28770: f800283a ret - 28774: 04801004 movi r18,64 - 28778: 003fe006 br 286fc <__smakebuf_r+0xb0> - 2877c: 81000a17 ldw r4,40(r16) - 28780: 00c000f4 movhi r3,3 - 28784: 18e96504 addi r3,r3,-23148 - 28788: 20ffc51e bne r4,r3,286a0 <__smakebuf_r+0x54> - 2878c: 8080030b ldhu r2,12(r16) - 28790: 04810004 movi r18,1024 - 28794: 84801315 stw r18,76(r16) - 28798: 1484b03a or r2,r2,r18 - 2879c: 8080030d sth r2,12(r16) - 287a0: 0027883a mov r19,zero - 287a4: 003fd806 br 28708 <__smakebuf_r+0xbc> - 287a8: 8140038f ldh r5,14(r16) - 287ac: 8809883a mov r4,r17 - 287b0: 002c3540 call 2c354 <_isatty_r> - 287b4: 103fe226 beq r2,zero,28740 <__smakebuf_r+0xf4> - 287b8: 8080030b ldhu r2,12(r16) - 287bc: 10800054 ori r2,r2,1 - 287c0: 8080030d sth r2,12(r16) - 287c4: 003fde06 br 28740 <__smakebuf_r+0xf4> - 287c8: 8080030b ldhu r2,12(r16) - 287cc: 10c0800c andi r3,r2,512 - 287d0: 183fdb1e bne r3,zero,28740 <__smakebuf_r+0xf4> - 287d4: 10800094 ori r2,r2,2 - 287d8: 80c010c4 addi r3,r16,67 - 287dc: 8080030d sth r2,12(r16) - 287e0: 00800044 movi r2,1 - 287e4: 80c00015 stw r3,0(r16) - 287e8: 80c00415 stw r3,16(r16) - 287ec: 80800515 stw r2,20(r16) - 287f0: 003fd306 br 28740 <__smakebuf_r+0xf4> - 287f4: 04810004 movi r18,1024 - 287f8: 003fc306 br 28708 <__smakebuf_r+0xbc> - 287fc: 0027883a mov r19,zero - 28800: 04810004 movi r18,1024 - 28804: 003fc006 br 28708 <__smakebuf_r+0xbc> +00028a14 <__multiply>: + 28a14: defffa04 addi sp,sp,-24 + 28a18: dcc00315 stw r19,12(sp) + 28a1c: dc800215 stw r18,8(sp) + 28a20: 34c00417 ldw r19,16(r6) + 28a24: 2c800417 ldw r18,16(r5) + 28a28: dd000415 stw r20,16(sp) + 28a2c: dc400115 stw r17,4(sp) + 28a30: dfc00515 stw ra,20(sp) + 28a34: dc000015 stw r16,0(sp) + 28a38: 2829883a mov r20,r5 + 28a3c: 3023883a mov r17,r6 + 28a40: 94c0050e bge r18,r19,28a58 <__multiply+0x44> + 28a44: 9007883a mov r3,r18 + 28a48: 3029883a mov r20,r6 + 28a4c: 9825883a mov r18,r19 + 28a50: 2823883a mov r17,r5 + 28a54: 1827883a mov r19,r3 + 28a58: a0800217 ldw r2,8(r20) + 28a5c: 94e1883a add r16,r18,r19 + 28a60: a1400117 ldw r5,4(r20) + 28a64: 1400010e bge r2,r16,28a6c <__multiply+0x58> + 28a68: 29400044 addi r5,r5,1 + 28a6c: 00285cc0 call 285cc <_Balloc> + 28a70: 8415883a add r10,r16,r16 + 28a74: 12c00504 addi r11,r2,20 + 28a78: 5295883a add r10,r10,r10 + 28a7c: 5a95883a add r10,r11,r10 + 28a80: 5807883a mov r3,r11 + 28a84: 5a80032e bgeu r11,r10,28a94 <__multiply+0x80> + 28a88: 18000015 stw zero,0(r3) + 28a8c: 18c00104 addi r3,r3,4 + 28a90: 1abffd36 bltu r3,r10,28a88 <_gp+0xfffec550> + 28a94: 9ce7883a add r19,r19,r19 + 28a98: 94a5883a add r18,r18,r18 + 28a9c: 89800504 addi r6,r17,20 + 28aa0: 9ce7883a add r19,r19,r19 + 28aa4: a3400504 addi r13,r20,20 + 28aa8: 94a5883a add r18,r18,r18 + 28aac: 34d9883a add r12,r6,r19 + 28ab0: 6c93883a add r9,r13,r18 + 28ab4: 3300422e bgeu r6,r12,28bc0 <__multiply+0x1ac> + 28ab8: 37c00017 ldw ra,0(r6) + 28abc: fbffffcc andi r15,ra,65535 + 28ac0: 78001b26 beq r15,zero,28b30 <__multiply+0x11c> + 28ac4: 5811883a mov r8,r11 + 28ac8: 681d883a mov r14,r13 + 28acc: 000f883a mov r7,zero + 28ad0: 71000017 ldw r4,0(r14) + 28ad4: 40c00017 ldw r3,0(r8) + 28ad8: 73800104 addi r14,r14,4 + 28adc: 217fffcc andi r5,r4,65535 + 28ae0: 2bcb383a mul r5,r5,r15 + 28ae4: 2008d43a srli r4,r4,16 + 28ae8: 1c7fffcc andi r17,r3,65535 + 28aec: 2c4b883a add r5,r5,r17 + 28af0: 29cb883a add r5,r5,r7 + 28af4: 23c9383a mul r4,r4,r15 + 28af8: 1806d43a srli r3,r3,16 + 28afc: 280ed43a srli r7,r5,16 + 28b00: 297fffcc andi r5,r5,65535 + 28b04: 20c7883a add r3,r4,r3 + 28b08: 19c7883a add r3,r3,r7 + 28b0c: 1808943a slli r4,r3,16 + 28b10: 4023883a mov r17,r8 + 28b14: 180ed43a srli r7,r3,16 + 28b18: 214ab03a or r5,r4,r5 + 28b1c: 41400015 stw r5,0(r8) + 28b20: 42000104 addi r8,r8,4 + 28b24: 727fea36 bltu r14,r9,28ad0 <_gp+0xfffec598> + 28b28: 89c00115 stw r7,4(r17) + 28b2c: 37c00017 ldw ra,0(r6) + 28b30: f83ed43a srli ra,ra,16 + 28b34: f8001f26 beq ra,zero,28bb4 <__multiply+0x1a0> + 28b38: 58c00017 ldw r3,0(r11) + 28b3c: 681d883a mov r14,r13 + 28b40: 581f883a mov r15,r11 + 28b44: 1811883a mov r8,r3 + 28b48: 5825883a mov r18,r11 + 28b4c: 000f883a mov r7,zero + 28b50: 00000106 br 28b58 <__multiply+0x144> + 28b54: 8825883a mov r18,r17 + 28b58: 7140000b ldhu r5,0(r14) + 28b5c: 4010d43a srli r8,r8,16 + 28b60: 193fffcc andi r4,r3,65535 + 28b64: 2fcb383a mul r5,r5,ra + 28b68: 7bc00104 addi r15,r15,4 + 28b6c: 73800104 addi r14,r14,4 + 28b70: 2a0b883a add r5,r5,r8 + 28b74: 29cb883a add r5,r5,r7 + 28b78: 2806943a slli r3,r5,16 + 28b7c: 94400104 addi r17,r18,4 + 28b80: 280ad43a srli r5,r5,16 + 28b84: 1908b03a or r4,r3,r4 + 28b88: 793fff15 stw r4,-4(r15) + 28b8c: 70ffff17 ldw r3,-4(r14) + 28b90: 8a000017 ldw r8,0(r17) + 28b94: 1806d43a srli r3,r3,16 + 28b98: 413fffcc andi r4,r8,65535 + 28b9c: 1fc7383a mul r3,r3,ra + 28ba0: 1907883a add r3,r3,r4 + 28ba4: 1947883a add r3,r3,r5 + 28ba8: 180ed43a srli r7,r3,16 + 28bac: 727fe936 bltu r14,r9,28b54 <_gp+0xfffec61c> + 28bb0: 90c00115 stw r3,4(r18) + 28bb4: 31800104 addi r6,r6,4 + 28bb8: 5ac00104 addi r11,r11,4 + 28bbc: 333fbe36 bltu r6,r12,28ab8 <_gp+0xfffec580> + 28bc0: 0400090e bge zero,r16,28be8 <__multiply+0x1d4> + 28bc4: 50ffff17 ldw r3,-4(r10) + 28bc8: 52bfff04 addi r10,r10,-4 + 28bcc: 18000326 beq r3,zero,28bdc <__multiply+0x1c8> + 28bd0: 00000506 br 28be8 <__multiply+0x1d4> + 28bd4: 50c00017 ldw r3,0(r10) + 28bd8: 1800031e bne r3,zero,28be8 <__multiply+0x1d4> + 28bdc: 843fffc4 addi r16,r16,-1 + 28be0: 52bfff04 addi r10,r10,-4 + 28be4: 803ffb1e bne r16,zero,28bd4 <_gp+0xfffec69c> + 28be8: 14000415 stw r16,16(r2) + 28bec: dfc00517 ldw ra,20(sp) + 28bf0: dd000417 ldw r20,16(sp) + 28bf4: dcc00317 ldw r19,12(sp) + 28bf8: dc800217 ldw r18,8(sp) + 28bfc: dc400117 ldw r17,4(sp) + 28c00: dc000017 ldw r16,0(sp) + 28c04: dec00604 addi sp,sp,24 + 28c08: f800283a ret -00028808 : - 28808: 208000cc andi r2,r4,3 - 2880c: 280f883a mov r7,r5 - 28810: 10003426 beq r2,zero,288e4 - 28814: 30bfffc4 addi r2,r6,-1 - 28818: 30001a26 beq r6,zero,28884 - 2881c: 20c00003 ldbu r3,0(r4) - 28820: 29803fcc andi r6,r5,255 - 28824: 30c0051e bne r6,r3,2883c - 28828: 00001806 br 2888c - 2882c: 10001526 beq r2,zero,28884 - 28830: 20c00003 ldbu r3,0(r4) - 28834: 10bfffc4 addi r2,r2,-1 - 28838: 30c01426 beq r6,r3,2888c - 2883c: 21000044 addi r4,r4,1 - 28840: 20c000cc andi r3,r4,3 - 28844: 183ff91e bne r3,zero,2882c - 28848: 020000c4 movi r8,3 - 2884c: 40801136 bltu r8,r2,28894 - 28850: 10000c26 beq r2,zero,28884 - 28854: 20c00003 ldbu r3,0(r4) - 28858: 29403fcc andi r5,r5,255 - 2885c: 28c00b26 beq r5,r3,2888c - 28860: 20c00044 addi r3,r4,1 - 28864: 39803fcc andi r6,r7,255 - 28868: 2089883a add r4,r4,r2 - 2886c: 00000306 br 2887c - 28870: 18c00044 addi r3,r3,1 - 28874: 197fffc3 ldbu r5,-1(r3) - 28878: 31400526 beq r6,r5,28890 - 2887c: 1805883a mov r2,r3 - 28880: 20fffb1e bne r4,r3,28870 - 28884: 0005883a mov r2,zero - 28888: f800283a ret - 2888c: 2005883a mov r2,r4 - 28890: f800283a ret - 28894: 28c03fcc andi r3,r5,255 - 28898: 1812923a slli r9,r3,8 - 2889c: 02ffbff4 movhi r11,65279 - 288a0: 02a02074 movhi r10,32897 - 288a4: 48d2b03a or r9,r9,r3 - 288a8: 4806943a slli r3,r9,16 - 288ac: 5affbfc4 addi r11,r11,-257 - 288b0: 52a02004 addi r10,r10,-32640 - 288b4: 48d2b03a or r9,r9,r3 - 288b8: 20c00017 ldw r3,0(r4) - 288bc: 48c6f03a xor r3,r9,r3 - 288c0: 1acd883a add r6,r3,r11 - 288c4: 00c6303a nor r3,zero,r3 - 288c8: 30c6703a and r3,r6,r3 - 288cc: 1a86703a and r3,r3,r10 - 288d0: 183fe01e bne r3,zero,28854 - 288d4: 10bfff04 addi r2,r2,-4 - 288d8: 21000104 addi r4,r4,4 - 288dc: 40bff636 bltu r8,r2,288b8 - 288e0: 003fdb06 br 28850 - 288e4: 3005883a mov r2,r6 - 288e8: 003fd706 br 28848 +00028c0c <__pow5mult>: + 28c0c: defffa04 addi sp,sp,-24 + 28c10: dcc00315 stw r19,12(sp) + 28c14: dc000015 stw r16,0(sp) + 28c18: dfc00515 stw ra,20(sp) + 28c1c: dd000415 stw r20,16(sp) + 28c20: dc800215 stw r18,8(sp) + 28c24: dc400115 stw r17,4(sp) + 28c28: 308000cc andi r2,r6,3 + 28c2c: 3021883a mov r16,r6 + 28c30: 2027883a mov r19,r4 + 28c34: 10002f1e bne r2,zero,28cf4 <__pow5mult+0xe8> + 28c38: 2825883a mov r18,r5 + 28c3c: 8021d0ba srai r16,r16,2 + 28c40: 80001a26 beq r16,zero,28cac <__pow5mult+0xa0> + 28c44: 9c401217 ldw r17,72(r19) + 28c48: 8800061e bne r17,zero,28c64 <__pow5mult+0x58> + 28c4c: 00003406 br 28d20 <__pow5mult+0x114> + 28c50: 8021d07a srai r16,r16,1 + 28c54: 80001526 beq r16,zero,28cac <__pow5mult+0xa0> + 28c58: 88800017 ldw r2,0(r17) + 28c5c: 10001c26 beq r2,zero,28cd0 <__pow5mult+0xc4> + 28c60: 1023883a mov r17,r2 + 28c64: 8080004c andi r2,r16,1 + 28c68: 103ff926 beq r2,zero,28c50 <_gp+0xfffec718> + 28c6c: 880d883a mov r6,r17 + 28c70: 900b883a mov r5,r18 + 28c74: 9809883a mov r4,r19 + 28c78: 0028a140 call 28a14 <__multiply> + 28c7c: 90001b26 beq r18,zero,28cec <__pow5mult+0xe0> + 28c80: 91000117 ldw r4,4(r18) + 28c84: 98c01317 ldw r3,76(r19) + 28c88: 8021d07a srai r16,r16,1 + 28c8c: 2109883a add r4,r4,r4 + 28c90: 2109883a add r4,r4,r4 + 28c94: 1907883a add r3,r3,r4 + 28c98: 19000017 ldw r4,0(r3) + 28c9c: 91000015 stw r4,0(r18) + 28ca0: 1c800015 stw r18,0(r3) + 28ca4: 1025883a mov r18,r2 + 28ca8: 803feb1e bne r16,zero,28c58 <_gp+0xfffec720> + 28cac: 9005883a mov r2,r18 + 28cb0: dfc00517 ldw ra,20(sp) + 28cb4: dd000417 ldw r20,16(sp) + 28cb8: dcc00317 ldw r19,12(sp) + 28cbc: dc800217 ldw r18,8(sp) + 28cc0: dc400117 ldw r17,4(sp) + 28cc4: dc000017 ldw r16,0(sp) + 28cc8: dec00604 addi sp,sp,24 + 28ccc: f800283a ret + 28cd0: 880d883a mov r6,r17 + 28cd4: 880b883a mov r5,r17 + 28cd8: 9809883a mov r4,r19 + 28cdc: 0028a140 call 28a14 <__multiply> + 28ce0: 88800015 stw r2,0(r17) + 28ce4: 10000015 stw zero,0(r2) + 28ce8: 003fdd06 br 28c60 <_gp+0xfffec728> + 28cec: 1025883a mov r18,r2 + 28cf0: 003fd706 br 28c50 <_gp+0xfffec718> + 28cf4: 10bfffc4 addi r2,r2,-1 + 28cf8: 1085883a add r2,r2,r2 + 28cfc: 00c000f4 movhi r3,3 + 28d00: 18c81d04 addi r3,r3,8308 + 28d04: 1085883a add r2,r2,r2 + 28d08: 1885883a add r2,r3,r2 + 28d0c: 11800017 ldw r6,0(r2) + 28d10: 000f883a mov r7,zero + 28d14: 002869c0 call 2869c <__multadd> + 28d18: 1025883a mov r18,r2 + 28d1c: 003fc706 br 28c3c <_gp+0xfffec704> + 28d20: 05000044 movi r20,1 + 28d24: a00b883a mov r5,r20 + 28d28: 9809883a mov r4,r19 + 28d2c: 00285cc0 call 285cc <_Balloc> + 28d30: 1023883a mov r17,r2 + 28d34: 00809c44 movi r2,625 + 28d38: 88800515 stw r2,20(r17) + 28d3c: 8d000415 stw r20,16(r17) + 28d40: 9c401215 stw r17,72(r19) + 28d44: 88000015 stw zero,0(r17) + 28d48: 003fc606 br 28c64 <_gp+0xfffec72c> -000288ec : - 288ec: defffd04 addi sp,sp,-12 - 288f0: dfc00215 stw ra,8(sp) - 288f4: dc400115 stw r17,4(sp) - 288f8: dc000015 stw r16,0(sp) - 288fc: 00c003c4 movi r3,15 - 28900: 2005883a mov r2,r4 - 28904: 1980452e bgeu r3,r6,28a1c - 28908: 2906b03a or r3,r5,r4 - 2890c: 18c000cc andi r3,r3,3 - 28910: 1800441e bne r3,zero,28a24 - 28914: 347ffc04 addi r17,r6,-16 - 28918: 8822d13a srli r17,r17,4 - 2891c: 28c00104 addi r3,r5,4 - 28920: 23400104 addi r13,r4,4 - 28924: 8820913a slli r16,r17,4 - 28928: 2b000204 addi r12,r5,8 - 2892c: 22c00204 addi r11,r4,8 - 28930: 84000504 addi r16,r16,20 - 28934: 2a800304 addi r10,r5,12 - 28938: 22400304 addi r9,r4,12 - 2893c: 2c21883a add r16,r5,r16 - 28940: 2811883a mov r8,r5 - 28944: 200f883a mov r7,r4 - 28948: 41000017 ldw r4,0(r8) - 2894c: 1fc00017 ldw ra,0(r3) - 28950: 63c00017 ldw r15,0(r12) - 28954: 39000015 stw r4,0(r7) - 28958: 53800017 ldw r14,0(r10) - 2895c: 6fc00015 stw ra,0(r13) - 28960: 5bc00015 stw r15,0(r11) - 28964: 4b800015 stw r14,0(r9) - 28968: 18c00404 addi r3,r3,16 - 2896c: 39c00404 addi r7,r7,16 - 28970: 42000404 addi r8,r8,16 - 28974: 6b400404 addi r13,r13,16 - 28978: 63000404 addi r12,r12,16 - 2897c: 5ac00404 addi r11,r11,16 - 28980: 52800404 addi r10,r10,16 - 28984: 4a400404 addi r9,r9,16 - 28988: 1c3fef1e bne r3,r16,28948 - 2898c: 89c00044 addi r7,r17,1 - 28990: 380e913a slli r7,r7,4 - 28994: 310003cc andi r4,r6,15 - 28998: 02c000c4 movi r11,3 - 2899c: 11c7883a add r3,r2,r7 - 289a0: 29cb883a add r5,r5,r7 - 289a4: 5900212e bgeu r11,r4,28a2c - 289a8: 1813883a mov r9,r3 - 289ac: 2811883a mov r8,r5 - 289b0: 200f883a mov r7,r4 - 289b4: 42800017 ldw r10,0(r8) - 289b8: 4a400104 addi r9,r9,4 - 289bc: 39ffff04 addi r7,r7,-4 - 289c0: 4abfff15 stw r10,-4(r9) - 289c4: 42000104 addi r8,r8,4 - 289c8: 59fffa36 bltu r11,r7,289b4 - 289cc: 213fff04 addi r4,r4,-4 - 289d0: 2008d0ba srli r4,r4,2 - 289d4: 318000cc andi r6,r6,3 - 289d8: 21000044 addi r4,r4,1 - 289dc: 2109883a add r4,r4,r4 - 289e0: 2109883a add r4,r4,r4 - 289e4: 1907883a add r3,r3,r4 - 289e8: 290b883a add r5,r5,r4 - 289ec: 30000626 beq r6,zero,28a08 - 289f0: 198d883a add r6,r3,r6 - 289f4: 29c00003 ldbu r7,0(r5) - 289f8: 18c00044 addi r3,r3,1 - 289fc: 29400044 addi r5,r5,1 - 28a00: 19ffffc5 stb r7,-1(r3) - 28a04: 19bffb1e bne r3,r6,289f4 - 28a08: dfc00217 ldw ra,8(sp) - 28a0c: dc400117 ldw r17,4(sp) - 28a10: dc000017 ldw r16,0(sp) - 28a14: dec00304 addi sp,sp,12 - 28a18: f800283a ret - 28a1c: 2007883a mov r3,r4 - 28a20: 003ff206 br 289ec - 28a24: 2007883a mov r3,r4 - 28a28: 003ff106 br 289f0 - 28a2c: 200d883a mov r6,r4 - 28a30: 003fee06 br 289ec +00028d4c <__lshift>: + 28d4c: defff904 addi sp,sp,-28 + 28d50: dd400515 stw r21,20(sp) + 28d54: dcc00315 stw r19,12(sp) + 28d58: 302bd17a srai r21,r6,5 + 28d5c: 2cc00417 ldw r19,16(r5) + 28d60: 28800217 ldw r2,8(r5) + 28d64: dd000415 stw r20,16(sp) + 28d68: ace7883a add r19,r21,r19 + 28d6c: dc800215 stw r18,8(sp) + 28d70: dc400115 stw r17,4(sp) + 28d74: dc000015 stw r16,0(sp) + 28d78: dfc00615 stw ra,24(sp) + 28d7c: 9c000044 addi r16,r19,1 + 28d80: 2823883a mov r17,r5 + 28d84: 3029883a mov r20,r6 + 28d88: 2025883a mov r18,r4 + 28d8c: 29400117 ldw r5,4(r5) + 28d90: 1400030e bge r2,r16,28da0 <__lshift+0x54> + 28d94: 1085883a add r2,r2,r2 + 28d98: 29400044 addi r5,r5,1 + 28d9c: 143ffd16 blt r2,r16,28d94 <_gp+0xfffec85c> + 28da0: 9009883a mov r4,r18 + 28da4: 00285cc0 call 285cc <_Balloc> + 28da8: 10c00504 addi r3,r2,20 + 28dac: 0540070e bge zero,r21,28dcc <__lshift+0x80> + 28db0: ad6b883a add r21,r21,r21 + 28db4: ad6b883a add r21,r21,r21 + 28db8: 1809883a mov r4,r3 + 28dbc: 1d47883a add r3,r3,r21 + 28dc0: 20000015 stw zero,0(r4) + 28dc4: 21000104 addi r4,r4,4 + 28dc8: 193ffd1e bne r3,r4,28dc0 <_gp+0xfffec888> + 28dcc: 8a000417 ldw r8,16(r17) + 28dd0: 89000504 addi r4,r17,20 + 28dd4: a18007cc andi r6,r20,31 + 28dd8: 4211883a add r8,r8,r8 + 28ddc: 4211883a add r8,r8,r8 + 28de0: 2211883a add r8,r4,r8 + 28de4: 30002326 beq r6,zero,28e74 <__lshift+0x128> + 28de8: 02400804 movi r9,32 + 28dec: 4993c83a sub r9,r9,r6 + 28df0: 000b883a mov r5,zero + 28df4: 21c00017 ldw r7,0(r4) + 28df8: 1815883a mov r10,r3 + 28dfc: 18c00104 addi r3,r3,4 + 28e00: 398e983a sll r7,r7,r6 + 28e04: 21000104 addi r4,r4,4 + 28e08: 394ab03a or r5,r7,r5 + 28e0c: 197fff15 stw r5,-4(r3) + 28e10: 217fff17 ldw r5,-4(r4) + 28e14: 2a4ad83a srl r5,r5,r9 + 28e18: 223ff636 bltu r4,r8,28df4 <_gp+0xfffec8bc> + 28e1c: 51400115 stw r5,4(r10) + 28e20: 28001a1e bne r5,zero,28e8c <__lshift+0x140> + 28e24: 843fffc4 addi r16,r16,-1 + 28e28: 14000415 stw r16,16(r2) + 28e2c: 88000826 beq r17,zero,28e50 <__lshift+0x104> + 28e30: 89000117 ldw r4,4(r17) + 28e34: 90c01317 ldw r3,76(r18) + 28e38: 2109883a add r4,r4,r4 + 28e3c: 2109883a add r4,r4,r4 + 28e40: 1907883a add r3,r3,r4 + 28e44: 19000017 ldw r4,0(r3) + 28e48: 89000015 stw r4,0(r17) + 28e4c: 1c400015 stw r17,0(r3) + 28e50: dfc00617 ldw ra,24(sp) + 28e54: dd400517 ldw r21,20(sp) + 28e58: dd000417 ldw r20,16(sp) + 28e5c: dcc00317 ldw r19,12(sp) + 28e60: dc800217 ldw r18,8(sp) + 28e64: dc400117 ldw r17,4(sp) + 28e68: dc000017 ldw r16,0(sp) + 28e6c: dec00704 addi sp,sp,28 + 28e70: f800283a ret + 28e74: 21400017 ldw r5,0(r4) + 28e78: 18c00104 addi r3,r3,4 + 28e7c: 21000104 addi r4,r4,4 + 28e80: 197fff15 stw r5,-4(r3) + 28e84: 223ffb36 bltu r4,r8,28e74 <_gp+0xfffec93c> + 28e88: 003fe606 br 28e24 <_gp+0xfffec8ec> + 28e8c: 9c000084 addi r16,r19,2 + 28e90: 003fe406 br 28e24 <_gp+0xfffec8ec> -00028a34 : - 28a34: 2005883a mov r2,r4 - 28a38: 29000b2e bgeu r5,r4,28a68 - 28a3c: 298f883a add r7,r5,r6 - 28a40: 21c0092e bgeu r4,r7,28a68 - 28a44: 2187883a add r3,r4,r6 - 28a48: 198bc83a sub r5,r3,r6 - 28a4c: 30004826 beq r6,zero,28b70 - 28a50: 39ffffc4 addi r7,r7,-1 - 28a54: 39000003 ldbu r4,0(r7) - 28a58: 18ffffc4 addi r3,r3,-1 - 28a5c: 19000005 stb r4,0(r3) - 28a60: 28fffb1e bne r5,r3,28a50 - 28a64: f800283a ret - 28a68: 00c003c4 movi r3,15 - 28a6c: 1980412e bgeu r3,r6,28b74 - 28a70: 2886b03a or r3,r5,r2 - 28a74: 18c000cc andi r3,r3,3 - 28a78: 1800401e bne r3,zero,28b7c - 28a7c: 33fffc04 addi r15,r6,-16 - 28a80: 781ed13a srli r15,r15,4 - 28a84: 28c00104 addi r3,r5,4 - 28a88: 13400104 addi r13,r2,4 - 28a8c: 781c913a slli r14,r15,4 - 28a90: 2b000204 addi r12,r5,8 - 28a94: 12c00204 addi r11,r2,8 - 28a98: 73800504 addi r14,r14,20 - 28a9c: 2a800304 addi r10,r5,12 - 28aa0: 12400304 addi r9,r2,12 - 28aa4: 2b9d883a add r14,r5,r14 - 28aa8: 2811883a mov r8,r5 - 28aac: 100f883a mov r7,r2 - 28ab0: 41000017 ldw r4,0(r8) - 28ab4: 39c00404 addi r7,r7,16 - 28ab8: 18c00404 addi r3,r3,16 - 28abc: 393ffc15 stw r4,-16(r7) - 28ac0: 193ffc17 ldw r4,-16(r3) - 28ac4: 6b400404 addi r13,r13,16 - 28ac8: 5ac00404 addi r11,r11,16 - 28acc: 693ffc15 stw r4,-16(r13) - 28ad0: 61000017 ldw r4,0(r12) - 28ad4: 4a400404 addi r9,r9,16 - 28ad8: 42000404 addi r8,r8,16 - 28adc: 593ffc15 stw r4,-16(r11) - 28ae0: 51000017 ldw r4,0(r10) - 28ae4: 63000404 addi r12,r12,16 - 28ae8: 52800404 addi r10,r10,16 - 28aec: 493ffc15 stw r4,-16(r9) - 28af0: 1bbfef1e bne r3,r14,28ab0 - 28af4: 79000044 addi r4,r15,1 - 28af8: 2008913a slli r4,r4,4 - 28afc: 328003cc andi r10,r6,15 - 28b00: 02c000c4 movi r11,3 - 28b04: 1107883a add r3,r2,r4 - 28b08: 290b883a add r5,r5,r4 - 28b0c: 5a801e2e bgeu r11,r10,28b88 - 28b10: 1813883a mov r9,r3 - 28b14: 2811883a mov r8,r5 - 28b18: 500f883a mov r7,r10 - 28b1c: 41000017 ldw r4,0(r8) - 28b20: 4a400104 addi r9,r9,4 - 28b24: 39ffff04 addi r7,r7,-4 - 28b28: 493fff15 stw r4,-4(r9) - 28b2c: 42000104 addi r8,r8,4 - 28b30: 59fffa36 bltu r11,r7,28b1c - 28b34: 513fff04 addi r4,r10,-4 - 28b38: 2008d0ba srli r4,r4,2 - 28b3c: 318000cc andi r6,r6,3 - 28b40: 21000044 addi r4,r4,1 - 28b44: 2109883a add r4,r4,r4 - 28b48: 2109883a add r4,r4,r4 - 28b4c: 1907883a add r3,r3,r4 - 28b50: 290b883a add r5,r5,r4 - 28b54: 30000b26 beq r6,zero,28b84 - 28b58: 198d883a add r6,r3,r6 - 28b5c: 29c00003 ldbu r7,0(r5) - 28b60: 18c00044 addi r3,r3,1 - 28b64: 29400044 addi r5,r5,1 - 28b68: 19ffffc5 stb r7,-1(r3) - 28b6c: 19bffb1e bne r3,r6,28b5c - 28b70: f800283a ret - 28b74: 1007883a mov r3,r2 - 28b78: 003ff606 br 28b54 - 28b7c: 1007883a mov r3,r2 - 28b80: 003ff506 br 28b58 - 28b84: f800283a ret - 28b88: 500d883a mov r6,r10 - 28b8c: 003ff106 br 28b54 - -00028b90 <_Balloc>: - 28b90: 20801317 ldw r2,76(r4) - 28b94: defffc04 addi sp,sp,-16 - 28b98: dc400115 stw r17,4(sp) - 28b9c: dc000015 stw r16,0(sp) - 28ba0: dfc00315 stw ra,12(sp) - 28ba4: dc800215 stw r18,8(sp) - 28ba8: 2023883a mov r17,r4 - 28bac: 2821883a mov r16,r5 - 28bb0: 10000f26 beq r2,zero,28bf0 <_Balloc+0x60> - 28bb4: 8407883a add r3,r16,r16 - 28bb8: 18c7883a add r3,r3,r3 - 28bbc: 10c7883a add r3,r2,r3 - 28bc0: 18800017 ldw r2,0(r3) - 28bc4: 10001126 beq r2,zero,28c0c <_Balloc+0x7c> - 28bc8: 11000017 ldw r4,0(r2) - 28bcc: 19000015 stw r4,0(r3) - 28bd0: 10000415 stw zero,16(r2) - 28bd4: 10000315 stw zero,12(r2) - 28bd8: dfc00317 ldw ra,12(sp) - 28bdc: dc800217 ldw r18,8(sp) - 28be0: dc400117 ldw r17,4(sp) - 28be4: dc000017 ldw r16,0(sp) - 28be8: dec00404 addi sp,sp,16 - 28bec: f800283a ret - 28bf0: 01800844 movi r6,33 - 28bf4: 01400104 movi r5,4 - 28bf8: 002bf280 call 2bf28 <_calloc_r> - 28bfc: 88801315 stw r2,76(r17) - 28c00: 103fec1e bne r2,zero,28bb4 <_Balloc+0x24> - 28c04: 0005883a mov r2,zero - 28c08: 003ff306 br 28bd8 <_Balloc+0x48> - 28c0c: 01400044 movi r5,1 - 28c10: 2c24983a sll r18,r5,r16 - 28c14: 8809883a mov r4,r17 - 28c18: 91800144 addi r6,r18,5 - 28c1c: 318d883a add r6,r6,r6 - 28c20: 318d883a add r6,r6,r6 - 28c24: 002bf280 call 2bf28 <_calloc_r> - 28c28: 103ff626 beq r2,zero,28c04 <_Balloc+0x74> - 28c2c: 14000115 stw r16,4(r2) - 28c30: 14800215 stw r18,8(r2) - 28c34: 003fe606 br 28bd0 <_Balloc+0x40> - -00028c38 <_Bfree>: - 28c38: 28000826 beq r5,zero,28c5c <_Bfree+0x24> - 28c3c: 28c00117 ldw r3,4(r5) - 28c40: 20801317 ldw r2,76(r4) - 28c44: 18c7883a add r3,r3,r3 - 28c48: 18c7883a add r3,r3,r3 - 28c4c: 10c5883a add r2,r2,r3 - 28c50: 10c00017 ldw r3,0(r2) - 28c54: 28c00015 stw r3,0(r5) - 28c58: 11400015 stw r5,0(r2) - 28c5c: f800283a ret - -00028c60 <__multadd>: - 28c60: defffa04 addi sp,sp,-24 - 28c64: dc800315 stw r18,12(sp) - 28c68: dc400215 stw r17,8(sp) - 28c6c: dc000115 stw r16,4(sp) - 28c70: 2823883a mov r17,r5 - 28c74: 2c000417 ldw r16,16(r5) - 28c78: dfc00515 stw ra,20(sp) - 28c7c: dcc00415 stw r19,16(sp) - 28c80: 2025883a mov r18,r4 - 28c84: 29400504 addi r5,r5,20 - 28c88: 0011883a mov r8,zero - 28c8c: 28c00017 ldw r3,0(r5) - 28c90: 29400104 addi r5,r5,4 - 28c94: 42000044 addi r8,r8,1 - 28c98: 18bfffcc andi r2,r3,65535 - 28c9c: 1185383a mul r2,r2,r6 - 28ca0: 1806d43a srli r3,r3,16 - 28ca4: 11cf883a add r7,r2,r7 - 28ca8: 3808d43a srli r4,r7,16 - 28cac: 1987383a mul r3,r3,r6 - 28cb0: 38bfffcc andi r2,r7,65535 - 28cb4: 1907883a add r3,r3,r4 - 28cb8: 1808943a slli r4,r3,16 - 28cbc: 180ed43a srli r7,r3,16 - 28cc0: 2085883a add r2,r4,r2 - 28cc4: 28bfff15 stw r2,-4(r5) - 28cc8: 443ff016 blt r8,r16,28c8c <__multadd+0x2c> - 28ccc: 38000926 beq r7,zero,28cf4 <__multadd+0x94> - 28cd0: 88800217 ldw r2,8(r17) - 28cd4: 80800f0e bge r16,r2,28d14 <__multadd+0xb4> - 28cd8: 80800144 addi r2,r16,5 - 28cdc: 1085883a add r2,r2,r2 - 28ce0: 1085883a add r2,r2,r2 - 28ce4: 8885883a add r2,r17,r2 - 28ce8: 11c00015 stw r7,0(r2) - 28cec: 84000044 addi r16,r16,1 - 28cf0: 8c000415 stw r16,16(r17) - 28cf4: 8805883a mov r2,r17 - 28cf8: dfc00517 ldw ra,20(sp) - 28cfc: dcc00417 ldw r19,16(sp) - 28d00: dc800317 ldw r18,12(sp) - 28d04: dc400217 ldw r17,8(sp) - 28d08: dc000117 ldw r16,4(sp) - 28d0c: dec00604 addi sp,sp,24 - 28d10: f800283a ret - 28d14: 89400117 ldw r5,4(r17) - 28d18: 9009883a mov r4,r18 - 28d1c: d9c00015 stw r7,0(sp) - 28d20: 29400044 addi r5,r5,1 - 28d24: 0028b900 call 28b90 <_Balloc> - 28d28: 89800417 ldw r6,16(r17) - 28d2c: 89400304 addi r5,r17,12 - 28d30: 11000304 addi r4,r2,12 - 28d34: 31800084 addi r6,r6,2 - 28d38: 318d883a add r6,r6,r6 - 28d3c: 318d883a add r6,r6,r6 - 28d40: 1027883a mov r19,r2 - 28d44: 00288ec0 call 288ec - 28d48: d9c00017 ldw r7,0(sp) - 28d4c: 88000a26 beq r17,zero,28d78 <__multadd+0x118> - 28d50: 88c00117 ldw r3,4(r17) - 28d54: 90801317 ldw r2,76(r18) - 28d58: 18c7883a add r3,r3,r3 - 28d5c: 18c7883a add r3,r3,r3 - 28d60: 10c5883a add r2,r2,r3 - 28d64: 10c00017 ldw r3,0(r2) - 28d68: 88c00015 stw r3,0(r17) - 28d6c: 14400015 stw r17,0(r2) - 28d70: 9823883a mov r17,r19 - 28d74: 003fd806 br 28cd8 <__multadd+0x78> - 28d78: 9823883a mov r17,r19 - 28d7c: 003fd606 br 28cd8 <__multadd+0x78> - -00028d80 <__s2b>: - 28d80: defff904 addi sp,sp,-28 - 28d84: dc400115 stw r17,4(sp) - 28d88: dc000015 stw r16,0(sp) - 28d8c: 2023883a mov r17,r4 - 28d90: 2821883a mov r16,r5 - 28d94: 39000204 addi r4,r7,8 - 28d98: 01400244 movi r5,9 - 28d9c: dcc00315 stw r19,12(sp) - 28da0: dc800215 stw r18,8(sp) - 28da4: dfc00615 stw ra,24(sp) - 28da8: dd400515 stw r21,20(sp) - 28dac: dd000415 stw r20,16(sp) - 28db0: 3825883a mov r18,r7 - 28db4: 3027883a mov r19,r6 - 28db8: 00229280 call 22928 <__divsi3> - 28dbc: 00c00044 movi r3,1 - 28dc0: 000b883a mov r5,zero - 28dc4: 1880030e bge r3,r2,28dd4 <__s2b+0x54> - 28dc8: 18c7883a add r3,r3,r3 - 28dcc: 29400044 addi r5,r5,1 - 28dd0: 18bffd16 blt r3,r2,28dc8 <__s2b+0x48> - 28dd4: 8809883a mov r4,r17 - 28dd8: 0028b900 call 28b90 <_Balloc> - 28ddc: d8c00717 ldw r3,28(sp) - 28de0: 10c00515 stw r3,20(r2) - 28de4: 00c00044 movi r3,1 - 28de8: 10c00415 stw r3,16(r2) - 28dec: 00c00244 movi r3,9 - 28df0: 1cc0210e bge r3,r19,28e78 <__s2b+0xf8> - 28df4: 80eb883a add r21,r16,r3 - 28df8: a829883a mov r20,r21 - 28dfc: 84e1883a add r16,r16,r19 - 28e00: a1c00007 ldb r7,0(r20) - 28e04: 01800284 movi r6,10 - 28e08: a5000044 addi r20,r20,1 - 28e0c: 100b883a mov r5,r2 - 28e10: 39fff404 addi r7,r7,-48 - 28e14: 8809883a mov r4,r17 - 28e18: 0028c600 call 28c60 <__multadd> - 28e1c: a43ff81e bne r20,r16,28e00 <__s2b+0x80> - 28e20: ace1883a add r16,r21,r19 - 28e24: 843ffe04 addi r16,r16,-8 - 28e28: 9c800a0e bge r19,r18,28e54 <__s2b+0xd4> - 28e2c: 94e5c83a sub r18,r18,r19 - 28e30: 84a5883a add r18,r16,r18 - 28e34: 81c00007 ldb r7,0(r16) - 28e38: 01800284 movi r6,10 - 28e3c: 84000044 addi r16,r16,1 - 28e40: 100b883a mov r5,r2 - 28e44: 39fff404 addi r7,r7,-48 - 28e48: 8809883a mov r4,r17 - 28e4c: 0028c600 call 28c60 <__multadd> - 28e50: 84bff81e bne r16,r18,28e34 <__s2b+0xb4> - 28e54: dfc00617 ldw ra,24(sp) - 28e58: dd400517 ldw r21,20(sp) - 28e5c: dd000417 ldw r20,16(sp) - 28e60: dcc00317 ldw r19,12(sp) - 28e64: dc800217 ldw r18,8(sp) - 28e68: dc400117 ldw r17,4(sp) - 28e6c: dc000017 ldw r16,0(sp) - 28e70: dec00704 addi sp,sp,28 - 28e74: f800283a ret - 28e78: 84000284 addi r16,r16,10 - 28e7c: 1827883a mov r19,r3 - 28e80: 003fe906 br 28e28 <__s2b+0xa8> - -00028e84 <__hi0bits>: - 28e84: 20bfffec andhi r2,r4,65535 - 28e88: 1000141e bne r2,zero,28edc <__hi0bits+0x58> - 28e8c: 2008943a slli r4,r4,16 - 28e90: 00800404 movi r2,16 - 28e94: 20ffc02c andhi r3,r4,65280 - 28e98: 1800021e bne r3,zero,28ea4 <__hi0bits+0x20> - 28e9c: 2008923a slli r4,r4,8 - 28ea0: 10800204 addi r2,r2,8 - 28ea4: 20fc002c andhi r3,r4,61440 - 28ea8: 1800021e bne r3,zero,28eb4 <__hi0bits+0x30> - 28eac: 2008913a slli r4,r4,4 - 28eb0: 10800104 addi r2,r2,4 - 28eb4: 20f0002c andhi r3,r4,49152 - 28eb8: 1800031e bne r3,zero,28ec8 <__hi0bits+0x44> - 28ebc: 2109883a add r4,r4,r4 - 28ec0: 10800084 addi r2,r2,2 - 28ec4: 2109883a add r4,r4,r4 - 28ec8: 20000316 blt r4,zero,28ed8 <__hi0bits+0x54> - 28ecc: 2110002c andhi r4,r4,16384 - 28ed0: 2000041e bne r4,zero,28ee4 <__hi0bits+0x60> - 28ed4: 00800804 movi r2,32 - 28ed8: f800283a ret - 28edc: 0005883a mov r2,zero - 28ee0: 003fec06 br 28e94 <__hi0bits+0x10> - 28ee4: 10800044 addi r2,r2,1 +00028e94 <__mcmp>: + 28e94: 20800417 ldw r2,16(r4) + 28e98: 28c00417 ldw r3,16(r5) + 28e9c: 10c5c83a sub r2,r2,r3 + 28ea0: 1000111e bne r2,zero,28ee8 <__mcmp+0x54> + 28ea4: 18c7883a add r3,r3,r3 + 28ea8: 18c7883a add r3,r3,r3 + 28eac: 21000504 addi r4,r4,20 + 28eb0: 29400504 addi r5,r5,20 + 28eb4: 20c5883a add r2,r4,r3 + 28eb8: 28cb883a add r5,r5,r3 + 28ebc: 00000106 br 28ec4 <__mcmp+0x30> + 28ec0: 20800a2e bgeu r4,r2,28eec <__mcmp+0x58> + 28ec4: 10bfff04 addi r2,r2,-4 + 28ec8: 297fff04 addi r5,r5,-4 + 28ecc: 11800017 ldw r6,0(r2) + 28ed0: 28c00017 ldw r3,0(r5) + 28ed4: 30fffa26 beq r6,r3,28ec0 <_gp+0xfffec988> + 28ed8: 30c00236 bltu r6,r3,28ee4 <__mcmp+0x50> + 28edc: 00800044 movi r2,1 + 28ee0: f800283a ret + 28ee4: 00bfffc4 movi r2,-1 28ee8: f800283a ret + 28eec: 0005883a mov r2,zero + 28ef0: f800283a ret -00028eec <__lo0bits>: - 28eec: 20c00017 ldw r3,0(r4) - 28ef0: 188001cc andi r2,r3,7 - 28ef4: 10000826 beq r2,zero,28f18 <__lo0bits+0x2c> - 28ef8: 1880004c andi r2,r3,1 - 28efc: 1000211e bne r2,zero,28f84 <__lo0bits+0x98> - 28f00: 1880008c andi r2,r3,2 - 28f04: 1000211e bne r2,zero,28f8c <__lo0bits+0xa0> - 28f08: 1806d0ba srli r3,r3,2 - 28f0c: 00800084 movi r2,2 - 28f10: 20c00015 stw r3,0(r4) - 28f14: f800283a ret - 28f18: 18bfffcc andi r2,r3,65535 - 28f1c: 10001326 beq r2,zero,28f6c <__lo0bits+0x80> - 28f20: 0005883a mov r2,zero - 28f24: 19403fcc andi r5,r3,255 - 28f28: 2800021e bne r5,zero,28f34 <__lo0bits+0x48> - 28f2c: 1806d23a srli r3,r3,8 - 28f30: 10800204 addi r2,r2,8 - 28f34: 194003cc andi r5,r3,15 - 28f38: 2800021e bne r5,zero,28f44 <__lo0bits+0x58> - 28f3c: 1806d13a srli r3,r3,4 - 28f40: 10800104 addi r2,r2,4 - 28f44: 194000cc andi r5,r3,3 - 28f48: 2800021e bne r5,zero,28f54 <__lo0bits+0x68> - 28f4c: 1806d0ba srli r3,r3,2 - 28f50: 10800084 addi r2,r2,2 - 28f54: 1940004c andi r5,r3,1 - 28f58: 2800081e bne r5,zero,28f7c <__lo0bits+0x90> - 28f5c: 1806d07a srli r3,r3,1 - 28f60: 1800051e bne r3,zero,28f78 <__lo0bits+0x8c> - 28f64: 00800804 movi r2,32 - 28f68: f800283a ret - 28f6c: 1806d43a srli r3,r3,16 - 28f70: 00800404 movi r2,16 - 28f74: 003feb06 br 28f24 <__lo0bits+0x38> - 28f78: 10800044 addi r2,r2,1 - 28f7c: 20c00015 stw r3,0(r4) - 28f80: f800283a ret - 28f84: 0005883a mov r2,zero - 28f88: f800283a ret - 28f8c: 1806d07a srli r3,r3,1 - 28f90: 00800044 movi r2,1 - 28f94: 20c00015 stw r3,0(r4) - 28f98: f800283a ret +00028ef4 <__mdiff>: + 28ef4: 28c00417 ldw r3,16(r5) + 28ef8: 30800417 ldw r2,16(r6) + 28efc: defffa04 addi sp,sp,-24 + 28f00: dcc00315 stw r19,12(sp) + 28f04: dc800215 stw r18,8(sp) + 28f08: dfc00515 stw ra,20(sp) + 28f0c: dd000415 stw r20,16(sp) + 28f10: dc400115 stw r17,4(sp) + 28f14: dc000015 stw r16,0(sp) + 28f18: 1887c83a sub r3,r3,r2 + 28f1c: 2825883a mov r18,r5 + 28f20: 3027883a mov r19,r6 + 28f24: 1800141e bne r3,zero,28f78 <__mdiff+0x84> + 28f28: 1085883a add r2,r2,r2 + 28f2c: 1085883a add r2,r2,r2 + 28f30: 2a000504 addi r8,r5,20 + 28f34: 34000504 addi r16,r6,20 + 28f38: 4087883a add r3,r8,r2 + 28f3c: 8085883a add r2,r16,r2 + 28f40: 00000106 br 28f48 <__mdiff+0x54> + 28f44: 40c0592e bgeu r8,r3,290ac <__mdiff+0x1b8> + 28f48: 18ffff04 addi r3,r3,-4 + 28f4c: 10bfff04 addi r2,r2,-4 + 28f50: 19c00017 ldw r7,0(r3) + 28f54: 11400017 ldw r5,0(r2) + 28f58: 397ffa26 beq r7,r5,28f44 <_gp+0xfffeca0c> + 28f5c: 3940592e bgeu r7,r5,290c4 <__mdiff+0x1d0> + 28f60: 9005883a mov r2,r18 + 28f64: 4023883a mov r17,r8 + 28f68: 9825883a mov r18,r19 + 28f6c: 05000044 movi r20,1 + 28f70: 1027883a mov r19,r2 + 28f74: 00000406 br 28f88 <__mdiff+0x94> + 28f78: 18005616 blt r3,zero,290d4 <__mdiff+0x1e0> + 28f7c: 34400504 addi r17,r6,20 + 28f80: 2c000504 addi r16,r5,20 + 28f84: 0029883a mov r20,zero + 28f88: 91400117 ldw r5,4(r18) + 28f8c: 00285cc0 call 285cc <_Balloc> + 28f90: 92400417 ldw r9,16(r18) + 28f94: 9b000417 ldw r12,16(r19) + 28f98: 12c00504 addi r11,r2,20 + 28f9c: 4a51883a add r8,r9,r9 + 28fa0: 6319883a add r12,r12,r12 + 28fa4: 4211883a add r8,r8,r8 + 28fa8: 6319883a add r12,r12,r12 + 28fac: 15000315 stw r20,12(r2) + 28fb0: 8211883a add r8,r16,r8 + 28fb4: 8b19883a add r12,r17,r12 + 28fb8: 0007883a mov r3,zero + 28fbc: 81400017 ldw r5,0(r16) + 28fc0: 89c00017 ldw r7,0(r17) + 28fc4: 59800104 addi r6,r11,4 + 28fc8: 293fffcc andi r4,r5,65535 + 28fcc: 20c7883a add r3,r4,r3 + 28fd0: 393fffcc andi r4,r7,65535 + 28fd4: 1909c83a sub r4,r3,r4 + 28fd8: 280ad43a srli r5,r5,16 + 28fdc: 380ed43a srli r7,r7,16 + 28fe0: 2007d43a srai r3,r4,16 + 28fe4: 213fffcc andi r4,r4,65535 + 28fe8: 29cbc83a sub r5,r5,r7 + 28fec: 28c7883a add r3,r5,r3 + 28ff0: 180a943a slli r5,r3,16 + 28ff4: 8c400104 addi r17,r17,4 + 28ff8: 84000104 addi r16,r16,4 + 28ffc: 2908b03a or r4,r5,r4 + 29000: 59000015 stw r4,0(r11) + 29004: 1807d43a srai r3,r3,16 + 29008: 3015883a mov r10,r6 + 2900c: 3017883a mov r11,r6 + 29010: 8b3fea36 bltu r17,r12,28fbc <_gp+0xfffeca84> + 29014: 8200162e bgeu r16,r8,29070 <__mdiff+0x17c> + 29018: 8017883a mov r11,r16 + 2901c: 59400017 ldw r5,0(r11) + 29020: 31800104 addi r6,r6,4 + 29024: 5ac00104 addi r11,r11,4 + 29028: 293fffcc andi r4,r5,65535 + 2902c: 20c7883a add r3,r4,r3 + 29030: 280ed43a srli r7,r5,16 + 29034: 180bd43a srai r5,r3,16 + 29038: 193fffcc andi r4,r3,65535 + 2903c: 3947883a add r3,r7,r5 + 29040: 180a943a slli r5,r3,16 + 29044: 1807d43a srai r3,r3,16 + 29048: 2908b03a or r4,r5,r4 + 2904c: 313fff15 stw r4,-4(r6) + 29050: 5a3ff236 bltu r11,r8,2901c <_gp+0xfffecae4> + 29054: 0406303a nor r3,zero,r16 + 29058: 1a07883a add r3,r3,r8 + 2905c: 1806d0ba srli r3,r3,2 + 29060: 18c00044 addi r3,r3,1 + 29064: 18c7883a add r3,r3,r3 + 29068: 18c7883a add r3,r3,r3 + 2906c: 50d5883a add r10,r10,r3 + 29070: 50ffff04 addi r3,r10,-4 + 29074: 2000041e bne r4,zero,29088 <__mdiff+0x194> + 29078: 18ffff04 addi r3,r3,-4 + 2907c: 19000017 ldw r4,0(r3) + 29080: 4a7fffc4 addi r9,r9,-1 + 29084: 203ffc26 beq r4,zero,29078 <_gp+0xfffecb40> + 29088: 12400415 stw r9,16(r2) + 2908c: dfc00517 ldw ra,20(sp) + 29090: dd000417 ldw r20,16(sp) + 29094: dcc00317 ldw r19,12(sp) + 29098: dc800217 ldw r18,8(sp) + 2909c: dc400117 ldw r17,4(sp) + 290a0: dc000017 ldw r16,0(sp) + 290a4: dec00604 addi sp,sp,24 + 290a8: f800283a ret + 290ac: 000b883a mov r5,zero + 290b0: 00285cc0 call 285cc <_Balloc> + 290b4: 00c00044 movi r3,1 + 290b8: 10c00415 stw r3,16(r2) + 290bc: 10000515 stw zero,20(r2) + 290c0: 003ff206 br 2908c <_gp+0xfffecb54> + 290c4: 8023883a mov r17,r16 + 290c8: 0029883a mov r20,zero + 290cc: 4021883a mov r16,r8 + 290d0: 003fad06 br 28f88 <_gp+0xfffeca50> + 290d4: 9005883a mov r2,r18 + 290d8: 94400504 addi r17,r18,20 + 290dc: 9c000504 addi r16,r19,20 + 290e0: 9825883a mov r18,r19 + 290e4: 05000044 movi r20,1 + 290e8: 1027883a mov r19,r2 + 290ec: 003fa606 br 28f88 <_gp+0xfffeca50> -00028f9c <__i2b>: - 28f9c: defffd04 addi sp,sp,-12 - 28fa0: dc000015 stw r16,0(sp) - 28fa4: 04000044 movi r16,1 - 28fa8: dc400115 stw r17,4(sp) - 28fac: 2823883a mov r17,r5 - 28fb0: 800b883a mov r5,r16 - 28fb4: dfc00215 stw ra,8(sp) - 28fb8: 0028b900 call 28b90 <_Balloc> - 28fbc: 14400515 stw r17,20(r2) - 28fc0: 14000415 stw r16,16(r2) - 28fc4: dfc00217 ldw ra,8(sp) - 28fc8: dc400117 ldw r17,4(sp) - 28fcc: dc000017 ldw r16,0(sp) - 28fd0: dec00304 addi sp,sp,12 - 28fd4: f800283a ret +000290f0 <__ulp>: + 290f0: 295ffc2c andhi r5,r5,32752 + 290f4: 00bf3034 movhi r2,64704 + 290f8: 2887883a add r3,r5,r2 + 290fc: 00c0020e bge zero,r3,29108 <__ulp+0x18> + 29100: 0005883a mov r2,zero + 29104: f800283a ret + 29108: 00c7c83a sub r3,zero,r3 + 2910c: 1807d53a srai r3,r3,20 + 29110: 008004c4 movi r2,19 + 29114: 10c00b0e bge r2,r3,29144 <__ulp+0x54> + 29118: 18bffb04 addi r2,r3,-20 + 2911c: 01000784 movi r4,30 + 29120: 0007883a mov r3,zero + 29124: 20800516 blt r4,r2,2913c <__ulp+0x4c> + 29128: 010007c4 movi r4,31 + 2912c: 2089c83a sub r4,r4,r2 + 29130: 00800044 movi r2,1 + 29134: 1104983a sll r2,r2,r4 + 29138: f800283a ret + 2913c: 00800044 movi r2,1 + 29140: f800283a ret + 29144: 01400234 movhi r5,8 + 29148: 28c7d83a sra r3,r5,r3 + 2914c: 0005883a mov r2,zero + 29150: f800283a ret -00028fd8 <__multiply>: - 28fd8: defffa04 addi sp,sp,-24 - 28fdc: dcc00315 stw r19,12(sp) - 28fe0: dc800215 stw r18,8(sp) - 28fe4: 34c00417 ldw r19,16(r6) - 28fe8: 2c800417 ldw r18,16(r5) - 28fec: dd000415 stw r20,16(sp) - 28ff0: dc400115 stw r17,4(sp) - 28ff4: dfc00515 stw ra,20(sp) - 28ff8: dc000015 stw r16,0(sp) - 28ffc: 2829883a mov r20,r5 - 29000: 3023883a mov r17,r6 - 29004: 94c0050e bge r18,r19,2901c <__multiply+0x44> - 29008: 9007883a mov r3,r18 - 2900c: 3029883a mov r20,r6 - 29010: 9825883a mov r18,r19 - 29014: 2823883a mov r17,r5 - 29018: 1827883a mov r19,r3 - 2901c: a0800217 ldw r2,8(r20) - 29020: 94e1883a add r16,r18,r19 - 29024: a1400117 ldw r5,4(r20) - 29028: 1400010e bge r2,r16,29030 <__multiply+0x58> - 2902c: 29400044 addi r5,r5,1 - 29030: 0028b900 call 28b90 <_Balloc> - 29034: 8415883a add r10,r16,r16 - 29038: 12c00504 addi r11,r2,20 - 2903c: 5295883a add r10,r10,r10 - 29040: 5a95883a add r10,r11,r10 - 29044: 5807883a mov r3,r11 - 29048: 5a80032e bgeu r11,r10,29058 <__multiply+0x80> - 2904c: 18000015 stw zero,0(r3) - 29050: 18c00104 addi r3,r3,4 - 29054: 1abffd36 bltu r3,r10,2904c <__multiply+0x74> - 29058: 9ce7883a add r19,r19,r19 - 2905c: 94a5883a add r18,r18,r18 - 29060: 89800504 addi r6,r17,20 - 29064: 9ce7883a add r19,r19,r19 - 29068: a3400504 addi r13,r20,20 - 2906c: 94a5883a add r18,r18,r18 - 29070: 34d9883a add r12,r6,r19 - 29074: 6c93883a add r9,r13,r18 - 29078: 3300422e bgeu r6,r12,29184 <__multiply+0x1ac> - 2907c: 37c00017 ldw ra,0(r6) - 29080: fbffffcc andi r15,ra,65535 - 29084: 78001b26 beq r15,zero,290f4 <__multiply+0x11c> - 29088: 5811883a mov r8,r11 - 2908c: 681d883a mov r14,r13 - 29090: 000f883a mov r7,zero - 29094: 71000017 ldw r4,0(r14) - 29098: 40c00017 ldw r3,0(r8) - 2909c: 73800104 addi r14,r14,4 - 290a0: 217fffcc andi r5,r4,65535 - 290a4: 2bcb383a mul r5,r5,r15 - 290a8: 2008d43a srli r4,r4,16 - 290ac: 1c7fffcc andi r17,r3,65535 - 290b0: 2c4b883a add r5,r5,r17 - 290b4: 29cb883a add r5,r5,r7 - 290b8: 23c9383a mul r4,r4,r15 - 290bc: 1806d43a srli r3,r3,16 - 290c0: 280ed43a srli r7,r5,16 - 290c4: 297fffcc andi r5,r5,65535 - 290c8: 20c7883a add r3,r4,r3 - 290cc: 19c7883a add r3,r3,r7 - 290d0: 1808943a slli r4,r3,16 - 290d4: 4023883a mov r17,r8 - 290d8: 180ed43a srli r7,r3,16 - 290dc: 214ab03a or r5,r4,r5 - 290e0: 41400015 stw r5,0(r8) - 290e4: 42000104 addi r8,r8,4 - 290e8: 727fea36 bltu r14,r9,29094 <__multiply+0xbc> - 290ec: 89c00115 stw r7,4(r17) - 290f0: 37c00017 ldw ra,0(r6) - 290f4: f83ed43a srli ra,ra,16 - 290f8: f8001f26 beq ra,zero,29178 <__multiply+0x1a0> - 290fc: 58c00017 ldw r3,0(r11) - 29100: 681d883a mov r14,r13 - 29104: 581f883a mov r15,r11 - 29108: 1811883a mov r8,r3 - 2910c: 5825883a mov r18,r11 - 29110: 000f883a mov r7,zero - 29114: 00000106 br 2911c <__multiply+0x144> - 29118: 8825883a mov r18,r17 - 2911c: 7140000b ldhu r5,0(r14) - 29120: 4010d43a srli r8,r8,16 - 29124: 193fffcc andi r4,r3,65535 - 29128: 2fcb383a mul r5,r5,ra - 2912c: 7bc00104 addi r15,r15,4 - 29130: 73800104 addi r14,r14,4 - 29134: 2a0b883a add r5,r5,r8 - 29138: 29cb883a add r5,r5,r7 - 2913c: 2806943a slli r3,r5,16 - 29140: 94400104 addi r17,r18,4 - 29144: 280ad43a srli r5,r5,16 - 29148: 1908b03a or r4,r3,r4 - 2914c: 793fff15 stw r4,-4(r15) - 29150: 70ffff17 ldw r3,-4(r14) - 29154: 8a000017 ldw r8,0(r17) - 29158: 1806d43a srli r3,r3,16 - 2915c: 413fffcc andi r4,r8,65535 - 29160: 1fc7383a mul r3,r3,ra - 29164: 1907883a add r3,r3,r4 - 29168: 1947883a add r3,r3,r5 - 2916c: 180ed43a srli r7,r3,16 - 29170: 727fe936 bltu r14,r9,29118 <__multiply+0x140> - 29174: 90c00115 stw r3,4(r18) - 29178: 31800104 addi r6,r6,4 - 2917c: 5ac00104 addi r11,r11,4 - 29180: 333fbe36 bltu r6,r12,2907c <__multiply+0xa4> - 29184: 0400090e bge zero,r16,291ac <__multiply+0x1d4> - 29188: 50ffff17 ldw r3,-4(r10) - 2918c: 52bfff04 addi r10,r10,-4 - 29190: 18000326 beq r3,zero,291a0 <__multiply+0x1c8> - 29194: 00000506 br 291ac <__multiply+0x1d4> - 29198: 50c00017 ldw r3,0(r10) - 2919c: 1800031e bne r3,zero,291ac <__multiply+0x1d4> - 291a0: 843fffc4 addi r16,r16,-1 - 291a4: 52bfff04 addi r10,r10,-4 - 291a8: 803ffb1e bne r16,zero,29198 <__multiply+0x1c0> - 291ac: 14000415 stw r16,16(r2) - 291b0: dfc00517 ldw ra,20(sp) - 291b4: dd000417 ldw r20,16(sp) - 291b8: dcc00317 ldw r19,12(sp) - 291bc: dc800217 ldw r18,8(sp) - 291c0: dc400117 ldw r17,4(sp) - 291c4: dc000017 ldw r16,0(sp) - 291c8: dec00604 addi sp,sp,24 - 291cc: f800283a ret +00029154 <__b2d>: + 29154: defffa04 addi sp,sp,-24 + 29158: dc000015 stw r16,0(sp) + 2915c: 24000417 ldw r16,16(r4) + 29160: dc400115 stw r17,4(sp) + 29164: 24400504 addi r17,r4,20 + 29168: 8421883a add r16,r16,r16 + 2916c: 8421883a add r16,r16,r16 + 29170: 8c21883a add r16,r17,r16 + 29174: dc800215 stw r18,8(sp) + 29178: 84bfff17 ldw r18,-4(r16) + 2917c: dd000415 stw r20,16(sp) + 29180: dcc00315 stw r19,12(sp) + 29184: 9009883a mov r4,r18 + 29188: 2829883a mov r20,r5 + 2918c: dfc00515 stw ra,20(sp) + 29190: 00288c00 call 288c0 <__hi0bits> + 29194: 00c00804 movi r3,32 + 29198: 1889c83a sub r4,r3,r2 + 2919c: a1000015 stw r4,0(r20) + 291a0: 01000284 movi r4,10 + 291a4: 84ffff04 addi r19,r16,-4 + 291a8: 20801216 blt r4,r2,291f4 <__b2d+0xa0> + 291ac: 018002c4 movi r6,11 + 291b0: 308dc83a sub r6,r6,r2 + 291b4: 9186d83a srl r3,r18,r6 + 291b8: 18cffc34 orhi r3,r3,16368 + 291bc: 8cc0212e bgeu r17,r19,29244 <__b2d+0xf0> + 291c0: 813ffe17 ldw r4,-8(r16) + 291c4: 218cd83a srl r6,r4,r6 + 291c8: 10800544 addi r2,r2,21 + 291cc: 9084983a sll r2,r18,r2 + 291d0: 1184b03a or r2,r2,r6 + 291d4: dfc00517 ldw ra,20(sp) + 291d8: dd000417 ldw r20,16(sp) + 291dc: dcc00317 ldw r19,12(sp) + 291e0: dc800217 ldw r18,8(sp) + 291e4: dc400117 ldw r17,4(sp) + 291e8: dc000017 ldw r16,0(sp) + 291ec: dec00604 addi sp,sp,24 + 291f0: f800283a ret + 291f4: 8cc00f2e bgeu r17,r19,29234 <__b2d+0xe0> + 291f8: 117ffd44 addi r5,r2,-11 + 291fc: 80bffe17 ldw r2,-8(r16) + 29200: 28000e26 beq r5,zero,2923c <__b2d+0xe8> + 29204: 1949c83a sub r4,r3,r5 + 29208: 9164983a sll r18,r18,r5 + 2920c: 1106d83a srl r3,r2,r4 + 29210: 81bffe04 addi r6,r16,-8 + 29214: 948ffc34 orhi r18,r18,16368 + 29218: 90c6b03a or r3,r18,r3 + 2921c: 89800e2e bgeu r17,r6,29258 <__b2d+0x104> + 29220: 81bffd17 ldw r6,-12(r16) + 29224: 1144983a sll r2,r2,r5 + 29228: 310ad83a srl r5,r6,r4 + 2922c: 2884b03a or r2,r5,r2 + 29230: 003fe806 br 291d4 <_gp+0xfffecc9c> + 29234: 10bffd44 addi r2,r2,-11 + 29238: 1000041e bne r2,zero,2924c <__b2d+0xf8> + 2923c: 90cffc34 orhi r3,r18,16368 + 29240: 003fe406 br 291d4 <_gp+0xfffecc9c> + 29244: 000d883a mov r6,zero + 29248: 003fdf06 br 291c8 <_gp+0xfffecc90> + 2924c: 90a4983a sll r18,r18,r2 + 29250: 0005883a mov r2,zero + 29254: 003ff906 br 2923c <_gp+0xfffecd04> + 29258: 1144983a sll r2,r2,r5 + 2925c: 003fdd06 br 291d4 <_gp+0xfffecc9c> -000291d0 <__pow5mult>: - 291d0: defffa04 addi sp,sp,-24 - 291d4: dcc00315 stw r19,12(sp) - 291d8: dc000015 stw r16,0(sp) - 291dc: dfc00515 stw ra,20(sp) - 291e0: dd000415 stw r20,16(sp) - 291e4: dc800215 stw r18,8(sp) - 291e8: dc400115 stw r17,4(sp) - 291ec: 308000cc andi r2,r6,3 - 291f0: 3021883a mov r16,r6 - 291f4: 2027883a mov r19,r4 - 291f8: 10002f1e bne r2,zero,292b8 <__pow5mult+0xe8> - 291fc: 2825883a mov r18,r5 - 29200: 8021d0ba srai r16,r16,2 - 29204: 80001a26 beq r16,zero,29270 <__pow5mult+0xa0> - 29208: 9c401217 ldw r17,72(r19) - 2920c: 8800061e bne r17,zero,29228 <__pow5mult+0x58> - 29210: 00003406 br 292e4 <__pow5mult+0x114> - 29214: 8021d07a srai r16,r16,1 - 29218: 80001526 beq r16,zero,29270 <__pow5mult+0xa0> - 2921c: 88800017 ldw r2,0(r17) - 29220: 10001c26 beq r2,zero,29294 <__pow5mult+0xc4> - 29224: 1023883a mov r17,r2 - 29228: 8080004c andi r2,r16,1 - 2922c: 103ff926 beq r2,zero,29214 <__pow5mult+0x44> - 29230: 880d883a mov r6,r17 - 29234: 900b883a mov r5,r18 - 29238: 9809883a mov r4,r19 - 2923c: 0028fd80 call 28fd8 <__multiply> - 29240: 90001b26 beq r18,zero,292b0 <__pow5mult+0xe0> - 29244: 91000117 ldw r4,4(r18) - 29248: 98c01317 ldw r3,76(r19) - 2924c: 8021d07a srai r16,r16,1 - 29250: 2109883a add r4,r4,r4 - 29254: 2109883a add r4,r4,r4 - 29258: 1907883a add r3,r3,r4 - 2925c: 19000017 ldw r4,0(r3) - 29260: 91000015 stw r4,0(r18) - 29264: 1c800015 stw r18,0(r3) - 29268: 1025883a mov r18,r2 - 2926c: 803feb1e bne r16,zero,2921c <__pow5mult+0x4c> - 29270: 9005883a mov r2,r18 - 29274: dfc00517 ldw ra,20(sp) - 29278: dd000417 ldw r20,16(sp) - 2927c: dcc00317 ldw r19,12(sp) - 29280: dc800217 ldw r18,8(sp) - 29284: dc400117 ldw r17,4(sp) - 29288: dc000017 ldw r16,0(sp) - 2928c: dec00604 addi sp,sp,24 - 29290: f800283a ret - 29294: 880d883a mov r6,r17 - 29298: 880b883a mov r5,r17 - 2929c: 9809883a mov r4,r19 - 292a0: 0028fd80 call 28fd8 <__multiply> - 292a4: 88800015 stw r2,0(r17) - 292a8: 10000015 stw zero,0(r2) - 292ac: 003fdd06 br 29224 <__pow5mult+0x54> - 292b0: 1025883a mov r18,r2 - 292b4: 003fd706 br 29214 <__pow5mult+0x44> - 292b8: 10bfffc4 addi r2,r2,-1 - 292bc: 1085883a add r2,r2,r2 - 292c0: 00c000f4 movhi r3,3 - 292c4: 18ca6a04 addi r3,r3,10664 - 292c8: 1085883a add r2,r2,r2 - 292cc: 1885883a add r2,r3,r2 - 292d0: 11800017 ldw r6,0(r2) - 292d4: 000f883a mov r7,zero - 292d8: 0028c600 call 28c60 <__multadd> - 292dc: 1025883a mov r18,r2 - 292e0: 003fc706 br 29200 <__pow5mult+0x30> - 292e4: 05000044 movi r20,1 - 292e8: a00b883a mov r5,r20 - 292ec: 9809883a mov r4,r19 - 292f0: 0028b900 call 28b90 <_Balloc> - 292f4: 1023883a mov r17,r2 - 292f8: 00809c44 movi r2,625 - 292fc: 88800515 stw r2,20(r17) - 29300: 8d000415 stw r20,16(r17) - 29304: 9c401215 stw r17,72(r19) - 29308: 88000015 stw zero,0(r17) - 2930c: 003fc606 br 29228 <__pow5mult+0x58> +00029260 <__d2b>: + 29260: defff804 addi sp,sp,-32 + 29264: dc000215 stw r16,8(sp) + 29268: 3021883a mov r16,r6 + 2926c: dc400315 stw r17,12(sp) + 29270: 8022907a slli r17,r16,1 + 29274: dd000615 stw r20,24(sp) + 29278: 2829883a mov r20,r5 + 2927c: 01400044 movi r5,1 + 29280: dcc00515 stw r19,20(sp) + 29284: dc800415 stw r18,16(sp) + 29288: dfc00715 stw ra,28(sp) + 2928c: 3825883a mov r18,r7 + 29290: 8822d57a srli r17,r17,21 + 29294: 00285cc0 call 285cc <_Balloc> + 29298: 1027883a mov r19,r2 + 2929c: 00800434 movhi r2,16 + 292a0: 10bfffc4 addi r2,r2,-1 + 292a4: 808c703a and r6,r16,r2 + 292a8: 88000126 beq r17,zero,292b0 <__d2b+0x50> + 292ac: 31800434 orhi r6,r6,16 + 292b0: d9800015 stw r6,0(sp) + 292b4: a0002426 beq r20,zero,29348 <__d2b+0xe8> + 292b8: d9000104 addi r4,sp,4 + 292bc: dd000115 stw r20,4(sp) + 292c0: 00289280 call 28928 <__lo0bits> + 292c4: d8c00017 ldw r3,0(sp) + 292c8: 10002f1e bne r2,zero,29388 <__d2b+0x128> + 292cc: d9000117 ldw r4,4(sp) + 292d0: 99000515 stw r4,20(r19) + 292d4: 1821003a cmpeq r16,r3,zero + 292d8: 01000084 movi r4,2 + 292dc: 2421c83a sub r16,r4,r16 + 292e0: 98c00615 stw r3,24(r19) + 292e4: 9c000415 stw r16,16(r19) + 292e8: 88001f1e bne r17,zero,29368 <__d2b+0x108> + 292ec: 10bef384 addi r2,r2,-1074 + 292f0: 90800015 stw r2,0(r18) + 292f4: 00900034 movhi r2,16384 + 292f8: 10bfffc4 addi r2,r2,-1 + 292fc: 8085883a add r2,r16,r2 + 29300: 1085883a add r2,r2,r2 + 29304: 1085883a add r2,r2,r2 + 29308: 9885883a add r2,r19,r2 + 2930c: 11000517 ldw r4,20(r2) + 29310: 8020917a slli r16,r16,5 + 29314: 00288c00 call 288c0 <__hi0bits> + 29318: d8c00817 ldw r3,32(sp) + 2931c: 8085c83a sub r2,r16,r2 + 29320: 18800015 stw r2,0(r3) + 29324: 9805883a mov r2,r19 + 29328: dfc00717 ldw ra,28(sp) + 2932c: dd000617 ldw r20,24(sp) + 29330: dcc00517 ldw r19,20(sp) + 29334: dc800417 ldw r18,16(sp) + 29338: dc400317 ldw r17,12(sp) + 2933c: dc000217 ldw r16,8(sp) + 29340: dec00804 addi sp,sp,32 + 29344: f800283a ret + 29348: d809883a mov r4,sp + 2934c: 00289280 call 28928 <__lo0bits> + 29350: d8c00017 ldw r3,0(sp) + 29354: 04000044 movi r16,1 + 29358: 9c000415 stw r16,16(r19) + 2935c: 98c00515 stw r3,20(r19) + 29360: 10800804 addi r2,r2,32 + 29364: 883fe126 beq r17,zero,292ec <_gp+0xfffecdb4> + 29368: 00c00d44 movi r3,53 + 2936c: 8c7ef344 addi r17,r17,-1075 + 29370: 88a3883a add r17,r17,r2 + 29374: 1885c83a sub r2,r3,r2 + 29378: d8c00817 ldw r3,32(sp) + 2937c: 94400015 stw r17,0(r18) + 29380: 18800015 stw r2,0(r3) + 29384: 003fe706 br 29324 <_gp+0xfffecdec> + 29388: 01000804 movi r4,32 + 2938c: 2089c83a sub r4,r4,r2 + 29390: 1908983a sll r4,r3,r4 + 29394: d9400117 ldw r5,4(sp) + 29398: 1886d83a srl r3,r3,r2 + 2939c: 2148b03a or r4,r4,r5 + 293a0: 99000515 stw r4,20(r19) + 293a4: d8c00015 stw r3,0(sp) + 293a8: 003fca06 br 292d4 <_gp+0xfffecd9c> -00029310 <__lshift>: - 29310: defff904 addi sp,sp,-28 - 29314: dd400515 stw r21,20(sp) - 29318: dcc00315 stw r19,12(sp) - 2931c: 302bd17a srai r21,r6,5 - 29320: 2cc00417 ldw r19,16(r5) - 29324: 28800217 ldw r2,8(r5) - 29328: dd000415 stw r20,16(sp) - 2932c: ace7883a add r19,r21,r19 - 29330: dc800215 stw r18,8(sp) - 29334: dc400115 stw r17,4(sp) - 29338: dc000015 stw r16,0(sp) - 2933c: dfc00615 stw ra,24(sp) - 29340: 9c000044 addi r16,r19,1 - 29344: 2823883a mov r17,r5 - 29348: 3029883a mov r20,r6 - 2934c: 2025883a mov r18,r4 - 29350: 29400117 ldw r5,4(r5) - 29354: 1400030e bge r2,r16,29364 <__lshift+0x54> - 29358: 1085883a add r2,r2,r2 - 2935c: 29400044 addi r5,r5,1 - 29360: 143ffd16 blt r2,r16,29358 <__lshift+0x48> - 29364: 9009883a mov r4,r18 - 29368: 0028b900 call 28b90 <_Balloc> - 2936c: 10c00504 addi r3,r2,20 - 29370: 0540070e bge zero,r21,29390 <__lshift+0x80> - 29374: ad6b883a add r21,r21,r21 - 29378: ad6b883a add r21,r21,r21 - 2937c: 1809883a mov r4,r3 - 29380: 1d47883a add r3,r3,r21 - 29384: 20000015 stw zero,0(r4) - 29388: 21000104 addi r4,r4,4 - 2938c: 193ffd1e bne r3,r4,29384 <__lshift+0x74> - 29390: 8a000417 ldw r8,16(r17) - 29394: 89000504 addi r4,r17,20 - 29398: a18007cc andi r6,r20,31 - 2939c: 4211883a add r8,r8,r8 - 293a0: 4211883a add r8,r8,r8 - 293a4: 2211883a add r8,r4,r8 - 293a8: 30002326 beq r6,zero,29438 <__lshift+0x128> - 293ac: 02400804 movi r9,32 - 293b0: 4993c83a sub r9,r9,r6 - 293b4: 000b883a mov r5,zero - 293b8: 21c00017 ldw r7,0(r4) - 293bc: 1815883a mov r10,r3 - 293c0: 18c00104 addi r3,r3,4 - 293c4: 398e983a sll r7,r7,r6 - 293c8: 21000104 addi r4,r4,4 - 293cc: 394ab03a or r5,r7,r5 - 293d0: 197fff15 stw r5,-4(r3) - 293d4: 217fff17 ldw r5,-4(r4) - 293d8: 2a4ad83a srl r5,r5,r9 - 293dc: 223ff636 bltu r4,r8,293b8 <__lshift+0xa8> - 293e0: 51400115 stw r5,4(r10) - 293e4: 28001a1e bne r5,zero,29450 <__lshift+0x140> - 293e8: 843fffc4 addi r16,r16,-1 - 293ec: 14000415 stw r16,16(r2) - 293f0: 88000826 beq r17,zero,29414 <__lshift+0x104> - 293f4: 89000117 ldw r4,4(r17) - 293f8: 90c01317 ldw r3,76(r18) - 293fc: 2109883a add r4,r4,r4 - 29400: 2109883a add r4,r4,r4 - 29404: 1907883a add r3,r3,r4 - 29408: 19000017 ldw r4,0(r3) - 2940c: 89000015 stw r4,0(r17) - 29410: 1c400015 stw r17,0(r3) - 29414: dfc00617 ldw ra,24(sp) - 29418: dd400517 ldw r21,20(sp) - 2941c: dd000417 ldw r20,16(sp) - 29420: dcc00317 ldw r19,12(sp) - 29424: dc800217 ldw r18,8(sp) - 29428: dc400117 ldw r17,4(sp) - 2942c: dc000017 ldw r16,0(sp) - 29430: dec00704 addi sp,sp,28 - 29434: f800283a ret - 29438: 21400017 ldw r5,0(r4) - 2943c: 18c00104 addi r3,r3,4 - 29440: 21000104 addi r4,r4,4 - 29444: 197fff15 stw r5,-4(r3) - 29448: 223ffb36 bltu r4,r8,29438 <__lshift+0x128> - 2944c: 003fe606 br 293e8 <__lshift+0xd8> - 29450: 9c000084 addi r16,r19,2 - 29454: 003fe406 br 293e8 <__lshift+0xd8> +000293ac <__ratio>: + 293ac: defff904 addi sp,sp,-28 + 293b0: dc400315 stw r17,12(sp) + 293b4: 2823883a mov r17,r5 + 293b8: d9400104 addi r5,sp,4 + 293bc: dfc00615 stw ra,24(sp) + 293c0: dcc00515 stw r19,20(sp) + 293c4: dc800415 stw r18,16(sp) + 293c8: 2027883a mov r19,r4 + 293cc: dc000215 stw r16,8(sp) + 293d0: 00291540 call 29154 <__b2d> + 293d4: d80b883a mov r5,sp + 293d8: 8809883a mov r4,r17 + 293dc: 1025883a mov r18,r2 + 293e0: 1821883a mov r16,r3 + 293e4: 00291540 call 29154 <__b2d> + 293e8: 8a000417 ldw r8,16(r17) + 293ec: 99000417 ldw r4,16(r19) + 293f0: d9400117 ldw r5,4(sp) + 293f4: 2209c83a sub r4,r4,r8 + 293f8: 2010917a slli r8,r4,5 + 293fc: d9000017 ldw r4,0(sp) + 29400: 2909c83a sub r4,r5,r4 + 29404: 4109883a add r4,r8,r4 + 29408: 01000e0e bge zero,r4,29444 <__ratio+0x98> + 2940c: 2008953a slli r4,r4,20 + 29410: 2421883a add r16,r4,r16 + 29414: 100d883a mov r6,r2 + 29418: 180f883a mov r7,r3 + 2941c: 9009883a mov r4,r18 + 29420: 800b883a mov r5,r16 + 29424: 002d1f80 call 2d1f8 <__divdf3> + 29428: dfc00617 ldw ra,24(sp) + 2942c: dcc00517 ldw r19,20(sp) + 29430: dc800417 ldw r18,16(sp) + 29434: dc400317 ldw r17,12(sp) + 29438: dc000217 ldw r16,8(sp) + 2943c: dec00704 addi sp,sp,28 + 29440: f800283a ret + 29444: 2008953a slli r4,r4,20 + 29448: 1907c83a sub r3,r3,r4 + 2944c: 003ff106 br 29414 <_gp+0xfffecedc> -00029458 <__mcmp>: - 29458: 20800417 ldw r2,16(r4) - 2945c: 28c00417 ldw r3,16(r5) - 29460: 10c5c83a sub r2,r2,r3 - 29464: 1000111e bne r2,zero,294ac <__mcmp+0x54> - 29468: 18c7883a add r3,r3,r3 - 2946c: 18c7883a add r3,r3,r3 - 29470: 21000504 addi r4,r4,20 - 29474: 29400504 addi r5,r5,20 - 29478: 20c5883a add r2,r4,r3 - 2947c: 28cb883a add r5,r5,r3 - 29480: 00000106 br 29488 <__mcmp+0x30> - 29484: 20800a2e bgeu r4,r2,294b0 <__mcmp+0x58> - 29488: 10bfff04 addi r2,r2,-4 - 2948c: 297fff04 addi r5,r5,-4 - 29490: 11800017 ldw r6,0(r2) - 29494: 28c00017 ldw r3,0(r5) - 29498: 30fffa26 beq r6,r3,29484 <__mcmp+0x2c> - 2949c: 30c00236 bltu r6,r3,294a8 <__mcmp+0x50> - 294a0: 00800044 movi r2,1 - 294a4: f800283a ret - 294a8: 00bfffc4 movi r2,-1 - 294ac: f800283a ret - 294b0: 0005883a mov r2,zero - 294b4: f800283a ret +00029450 <_mprec_log10>: + 29450: defffe04 addi sp,sp,-8 + 29454: dc000015 stw r16,0(sp) + 29458: dfc00115 stw ra,4(sp) + 2945c: 008005c4 movi r2,23 + 29460: 2021883a mov r16,r4 + 29464: 11000d0e bge r2,r4,2949c <_mprec_log10+0x4c> + 29468: 0005883a mov r2,zero + 2946c: 00cffc34 movhi r3,16368 + 29470: 843fffc4 addi r16,r16,-1 + 29474: 000d883a mov r6,zero + 29478: 01d00934 movhi r7,16420 + 2947c: 1009883a mov r4,r2 + 29480: 180b883a mov r5,r3 + 29484: 002dd380 call 2dd38 <__muldf3> + 29488: 803ff91e bne r16,zero,29470 <_gp+0xfffecf38> + 2948c: dfc00117 ldw ra,4(sp) + 29490: dc000017 ldw r16,0(sp) + 29494: dec00204 addi sp,sp,8 + 29498: f800283a ret + 2949c: 202090fa slli r16,r4,3 + 294a0: 008000f4 movhi r2,3 + 294a4: 10883404 addi r2,r2,8400 + 294a8: 1421883a add r16,r2,r16 + 294ac: 80800017 ldw r2,0(r16) + 294b0: 80c00117 ldw r3,4(r16) + 294b4: dfc00117 ldw ra,4(sp) + 294b8: dc000017 ldw r16,0(sp) + 294bc: dec00204 addi sp,sp,8 + 294c0: f800283a ret -000294b8 <__mdiff>: - 294b8: 28c00417 ldw r3,16(r5) - 294bc: 30800417 ldw r2,16(r6) - 294c0: defffa04 addi sp,sp,-24 - 294c4: dcc00315 stw r19,12(sp) - 294c8: dc800215 stw r18,8(sp) - 294cc: dfc00515 stw ra,20(sp) - 294d0: dd000415 stw r20,16(sp) - 294d4: dc400115 stw r17,4(sp) - 294d8: dc000015 stw r16,0(sp) - 294dc: 1887c83a sub r3,r3,r2 - 294e0: 2825883a mov r18,r5 - 294e4: 3027883a mov r19,r6 - 294e8: 1800141e bne r3,zero,2953c <__mdiff+0x84> - 294ec: 1085883a add r2,r2,r2 - 294f0: 1085883a add r2,r2,r2 - 294f4: 2a000504 addi r8,r5,20 - 294f8: 34000504 addi r16,r6,20 - 294fc: 4087883a add r3,r8,r2 - 29500: 8085883a add r2,r16,r2 - 29504: 00000106 br 2950c <__mdiff+0x54> - 29508: 40c0592e bgeu r8,r3,29670 <__mdiff+0x1b8> - 2950c: 18ffff04 addi r3,r3,-4 - 29510: 10bfff04 addi r2,r2,-4 - 29514: 19c00017 ldw r7,0(r3) - 29518: 11400017 ldw r5,0(r2) - 2951c: 397ffa26 beq r7,r5,29508 <__mdiff+0x50> - 29520: 3940592e bgeu r7,r5,29688 <__mdiff+0x1d0> - 29524: 9005883a mov r2,r18 - 29528: 4023883a mov r17,r8 - 2952c: 9825883a mov r18,r19 - 29530: 05000044 movi r20,1 - 29534: 1027883a mov r19,r2 - 29538: 00000406 br 2954c <__mdiff+0x94> - 2953c: 18005616 blt r3,zero,29698 <__mdiff+0x1e0> - 29540: 34400504 addi r17,r6,20 - 29544: 2c000504 addi r16,r5,20 - 29548: 0029883a mov r20,zero - 2954c: 91400117 ldw r5,4(r18) - 29550: 0028b900 call 28b90 <_Balloc> - 29554: 92400417 ldw r9,16(r18) - 29558: 9b000417 ldw r12,16(r19) - 2955c: 12c00504 addi r11,r2,20 - 29560: 4a51883a add r8,r9,r9 - 29564: 6319883a add r12,r12,r12 - 29568: 4211883a add r8,r8,r8 - 2956c: 6319883a add r12,r12,r12 - 29570: 15000315 stw r20,12(r2) - 29574: 8211883a add r8,r16,r8 - 29578: 8b19883a add r12,r17,r12 - 2957c: 0007883a mov r3,zero - 29580: 81400017 ldw r5,0(r16) - 29584: 89c00017 ldw r7,0(r17) - 29588: 59800104 addi r6,r11,4 - 2958c: 293fffcc andi r4,r5,65535 - 29590: 20c7883a add r3,r4,r3 - 29594: 393fffcc andi r4,r7,65535 - 29598: 1909c83a sub r4,r3,r4 - 2959c: 280ad43a srli r5,r5,16 - 295a0: 380ed43a srli r7,r7,16 - 295a4: 2007d43a srai r3,r4,16 - 295a8: 213fffcc andi r4,r4,65535 - 295ac: 29cbc83a sub r5,r5,r7 - 295b0: 28c7883a add r3,r5,r3 - 295b4: 180a943a slli r5,r3,16 - 295b8: 8c400104 addi r17,r17,4 - 295bc: 84000104 addi r16,r16,4 - 295c0: 2908b03a or r4,r5,r4 - 295c4: 59000015 stw r4,0(r11) - 295c8: 1807d43a srai r3,r3,16 - 295cc: 3015883a mov r10,r6 - 295d0: 3017883a mov r11,r6 - 295d4: 8b3fea36 bltu r17,r12,29580 <__mdiff+0xc8> - 295d8: 8200162e bgeu r16,r8,29634 <__mdiff+0x17c> - 295dc: 8017883a mov r11,r16 - 295e0: 59400017 ldw r5,0(r11) - 295e4: 31800104 addi r6,r6,4 - 295e8: 5ac00104 addi r11,r11,4 - 295ec: 293fffcc andi r4,r5,65535 - 295f0: 20c7883a add r3,r4,r3 - 295f4: 280ed43a srli r7,r5,16 - 295f8: 180bd43a srai r5,r3,16 - 295fc: 193fffcc andi r4,r3,65535 - 29600: 3947883a add r3,r7,r5 - 29604: 180a943a slli r5,r3,16 - 29608: 1807d43a srai r3,r3,16 - 2960c: 2908b03a or r4,r5,r4 - 29610: 313fff15 stw r4,-4(r6) - 29614: 5a3ff236 bltu r11,r8,295e0 <__mdiff+0x128> - 29618: 0406303a nor r3,zero,r16 - 2961c: 1a07883a add r3,r3,r8 - 29620: 1806d0ba srli r3,r3,2 - 29624: 18c00044 addi r3,r3,1 - 29628: 18c7883a add r3,r3,r3 - 2962c: 18c7883a add r3,r3,r3 - 29630: 50d5883a add r10,r10,r3 - 29634: 50ffff04 addi r3,r10,-4 - 29638: 2000041e bne r4,zero,2964c <__mdiff+0x194> - 2963c: 18ffff04 addi r3,r3,-4 - 29640: 19000017 ldw r4,0(r3) - 29644: 4a7fffc4 addi r9,r9,-1 - 29648: 203ffc26 beq r4,zero,2963c <__mdiff+0x184> - 2964c: 12400415 stw r9,16(r2) - 29650: dfc00517 ldw ra,20(sp) - 29654: dd000417 ldw r20,16(sp) - 29658: dcc00317 ldw r19,12(sp) - 2965c: dc800217 ldw r18,8(sp) - 29660: dc400117 ldw r17,4(sp) - 29664: dc000017 ldw r16,0(sp) - 29668: dec00604 addi sp,sp,24 - 2966c: f800283a ret - 29670: 000b883a mov r5,zero - 29674: 0028b900 call 28b90 <_Balloc> - 29678: 00c00044 movi r3,1 - 2967c: 10c00415 stw r3,16(r2) - 29680: 10000515 stw zero,20(r2) - 29684: 003ff206 br 29650 <__mdiff+0x198> - 29688: 8023883a mov r17,r16 - 2968c: 0029883a mov r20,zero - 29690: 4021883a mov r16,r8 - 29694: 003fad06 br 2954c <__mdiff+0x94> - 29698: 9005883a mov r2,r18 - 2969c: 94400504 addi r17,r18,20 - 296a0: 9c000504 addi r16,r19,20 - 296a4: 9825883a mov r18,r19 - 296a8: 05000044 movi r20,1 - 296ac: 1027883a mov r19,r2 - 296b0: 003fa606 br 2954c <__mdiff+0x94> +000294c4 <__copybits>: + 294c4: 297fffc4 addi r5,r5,-1 + 294c8: 280fd17a srai r7,r5,5 + 294cc: 30c00417 ldw r3,16(r6) + 294d0: 30800504 addi r2,r6,20 + 294d4: 39c00044 addi r7,r7,1 + 294d8: 18c7883a add r3,r3,r3 + 294dc: 39cf883a add r7,r7,r7 + 294e0: 18c7883a add r3,r3,r3 + 294e4: 39cf883a add r7,r7,r7 + 294e8: 10c7883a add r3,r2,r3 + 294ec: 21cf883a add r7,r4,r7 + 294f0: 10c00d2e bgeu r2,r3,29528 <__copybits+0x64> + 294f4: 200b883a mov r5,r4 + 294f8: 12000017 ldw r8,0(r2) + 294fc: 29400104 addi r5,r5,4 + 29500: 10800104 addi r2,r2,4 + 29504: 2a3fff15 stw r8,-4(r5) + 29508: 10fffb36 bltu r2,r3,294f8 <_gp+0xfffecfc0> + 2950c: 1985c83a sub r2,r3,r6 + 29510: 10bffac4 addi r2,r2,-21 + 29514: 1004d0ba srli r2,r2,2 + 29518: 10800044 addi r2,r2,1 + 2951c: 1085883a add r2,r2,r2 + 29520: 1085883a add r2,r2,r2 + 29524: 2089883a add r4,r4,r2 + 29528: 21c0032e bgeu r4,r7,29538 <__copybits+0x74> + 2952c: 20000015 stw zero,0(r4) + 29530: 21000104 addi r4,r4,4 + 29534: 21fffd36 bltu r4,r7,2952c <_gp+0xfffecff4> + 29538: f800283a ret -000296b4 <__ulp>: - 296b4: 295ffc2c andhi r5,r5,32752 - 296b8: 00bf3034 movhi r2,64704 - 296bc: 2887883a add r3,r5,r2 - 296c0: 00c0020e bge zero,r3,296cc <__ulp+0x18> - 296c4: 0005883a mov r2,zero - 296c8: f800283a ret - 296cc: 00c7c83a sub r3,zero,r3 - 296d0: 1807d53a srai r3,r3,20 - 296d4: 008004c4 movi r2,19 - 296d8: 10c00b0e bge r2,r3,29708 <__ulp+0x54> - 296dc: 18bffb04 addi r2,r3,-20 - 296e0: 01000784 movi r4,30 - 296e4: 0007883a mov r3,zero - 296e8: 20800516 blt r4,r2,29700 <__ulp+0x4c> - 296ec: 010007c4 movi r4,31 - 296f0: 2089c83a sub r4,r4,r2 - 296f4: 00800044 movi r2,1 - 296f8: 1104983a sll r2,r2,r4 - 296fc: f800283a ret - 29700: 00800044 movi r2,1 - 29704: f800283a ret - 29708: 01400234 movhi r5,8 - 2970c: 28c7d83a sra r3,r5,r3 - 29710: 0005883a mov r2,zero - 29714: f800283a ret +0002953c <__any_on>: + 2953c: 20c00417 ldw r3,16(r4) + 29540: 2805d17a srai r2,r5,5 + 29544: 21000504 addi r4,r4,20 + 29548: 18800d0e bge r3,r2,29580 <__any_on+0x44> + 2954c: 18c7883a add r3,r3,r3 + 29550: 18c7883a add r3,r3,r3 + 29554: 20c7883a add r3,r4,r3 + 29558: 20c0192e bgeu r4,r3,295c0 <__any_on+0x84> + 2955c: 18bfff17 ldw r2,-4(r3) + 29560: 18ffff04 addi r3,r3,-4 + 29564: 1000041e bne r2,zero,29578 <__any_on+0x3c> + 29568: 20c0142e bgeu r4,r3,295bc <__any_on+0x80> + 2956c: 18ffff04 addi r3,r3,-4 + 29570: 19400017 ldw r5,0(r3) + 29574: 283ffc26 beq r5,zero,29568 <_gp+0xfffed030> + 29578: 00800044 movi r2,1 + 2957c: f800283a ret + 29580: 10c00a0e bge r2,r3,295ac <__any_on+0x70> + 29584: 1085883a add r2,r2,r2 + 29588: 1085883a add r2,r2,r2 + 2958c: 294007cc andi r5,r5,31 + 29590: 2087883a add r3,r4,r2 + 29594: 283ff026 beq r5,zero,29558 <_gp+0xfffed020> + 29598: 19800017 ldw r6,0(r3) + 2959c: 3144d83a srl r2,r6,r5 + 295a0: 114a983a sll r5,r2,r5 + 295a4: 317ff41e bne r6,r5,29578 <_gp+0xfffed040> + 295a8: 003feb06 br 29558 <_gp+0xfffed020> + 295ac: 1085883a add r2,r2,r2 + 295b0: 1085883a add r2,r2,r2 + 295b4: 2087883a add r3,r4,r2 + 295b8: 003fe706 br 29558 <_gp+0xfffed020> + 295bc: f800283a ret + 295c0: 0005883a mov r2,zero + 295c4: f800283a ret -00029718 <__b2d>: - 29718: defffa04 addi sp,sp,-24 - 2971c: dc000015 stw r16,0(sp) - 29720: 24000417 ldw r16,16(r4) - 29724: dc400115 stw r17,4(sp) - 29728: 24400504 addi r17,r4,20 - 2972c: 8421883a add r16,r16,r16 - 29730: 8421883a add r16,r16,r16 - 29734: 8c21883a add r16,r17,r16 - 29738: dc800215 stw r18,8(sp) - 2973c: 84bfff17 ldw r18,-4(r16) - 29740: dd000415 stw r20,16(sp) - 29744: dcc00315 stw r19,12(sp) - 29748: 9009883a mov r4,r18 - 2974c: 2829883a mov r20,r5 - 29750: dfc00515 stw ra,20(sp) - 29754: 0028e840 call 28e84 <__hi0bits> - 29758: 00c00804 movi r3,32 - 2975c: 1889c83a sub r4,r3,r2 - 29760: a1000015 stw r4,0(r20) - 29764: 01000284 movi r4,10 - 29768: 84ffff04 addi r19,r16,-4 - 2976c: 20801216 blt r4,r2,297b8 <__b2d+0xa0> - 29770: 018002c4 movi r6,11 - 29774: 308dc83a sub r6,r6,r2 - 29778: 9186d83a srl r3,r18,r6 - 2977c: 18cffc34 orhi r3,r3,16368 - 29780: 8cc0212e bgeu r17,r19,29808 <__b2d+0xf0> - 29784: 813ffe17 ldw r4,-8(r16) - 29788: 218cd83a srl r6,r4,r6 - 2978c: 10800544 addi r2,r2,21 - 29790: 9084983a sll r2,r18,r2 - 29794: 1184b03a or r2,r2,r6 - 29798: dfc00517 ldw ra,20(sp) - 2979c: dd000417 ldw r20,16(sp) - 297a0: dcc00317 ldw r19,12(sp) - 297a4: dc800217 ldw r18,8(sp) - 297a8: dc400117 ldw r17,4(sp) - 297ac: dc000017 ldw r16,0(sp) - 297b0: dec00604 addi sp,sp,24 - 297b4: f800283a ret - 297b8: 8cc00f2e bgeu r17,r19,297f8 <__b2d+0xe0> - 297bc: 117ffd44 addi r5,r2,-11 - 297c0: 80bffe17 ldw r2,-8(r16) - 297c4: 28000e26 beq r5,zero,29800 <__b2d+0xe8> - 297c8: 1949c83a sub r4,r3,r5 - 297cc: 9164983a sll r18,r18,r5 - 297d0: 1106d83a srl r3,r2,r4 - 297d4: 81bffe04 addi r6,r16,-8 - 297d8: 948ffc34 orhi r18,r18,16368 - 297dc: 90c6b03a or r3,r18,r3 - 297e0: 89800e2e bgeu r17,r6,2981c <__b2d+0x104> - 297e4: 81bffd17 ldw r6,-12(r16) - 297e8: 1144983a sll r2,r2,r5 - 297ec: 310ad83a srl r5,r6,r4 - 297f0: 2884b03a or r2,r5,r2 - 297f4: 003fe806 br 29798 <__b2d+0x80> - 297f8: 10bffd44 addi r2,r2,-11 - 297fc: 1000041e bne r2,zero,29810 <__b2d+0xf8> - 29800: 90cffc34 orhi r3,r18,16368 - 29804: 003fe406 br 29798 <__b2d+0x80> - 29808: 000d883a mov r6,zero - 2980c: 003fdf06 br 2978c <__b2d+0x74> - 29810: 90a4983a sll r18,r18,r2 - 29814: 0005883a mov r2,zero - 29818: 003ff906 br 29800 <__b2d+0xe8> - 2981c: 1144983a sll r2,r2,r5 - 29820: 003fdd06 br 29798 <__b2d+0x80> +000295c8 <_putc_r>: + 295c8: defffc04 addi sp,sp,-16 + 295cc: dc000215 stw r16,8(sp) + 295d0: dfc00315 stw ra,12(sp) + 295d4: 2021883a mov r16,r4 + 295d8: 20000226 beq r4,zero,295e4 <_putc_r+0x1c> + 295dc: 20800e17 ldw r2,56(r4) + 295e0: 10001b26 beq r2,zero,29650 <_putc_r+0x88> + 295e4: 30800217 ldw r2,8(r6) + 295e8: 10bfffc4 addi r2,r2,-1 + 295ec: 30800215 stw r2,8(r6) + 295f0: 10000a16 blt r2,zero,2961c <_putc_r+0x54> + 295f4: 30800017 ldw r2,0(r6) + 295f8: 11400005 stb r5,0(r2) + 295fc: 30800017 ldw r2,0(r6) + 29600: 10c00044 addi r3,r2,1 + 29604: 30c00015 stw r3,0(r6) + 29608: 10800003 ldbu r2,0(r2) + 2960c: dfc00317 ldw ra,12(sp) + 29610: dc000217 ldw r16,8(sp) + 29614: dec00404 addi sp,sp,16 + 29618: f800283a ret + 2961c: 30c00617 ldw r3,24(r6) + 29620: 10c00616 blt r2,r3,2963c <_putc_r+0x74> + 29624: 30800017 ldw r2,0(r6) + 29628: 00c00284 movi r3,10 + 2962c: 11400005 stb r5,0(r2) + 29630: 30800017 ldw r2,0(r6) + 29634: 11400003 ldbu r5,0(r2) + 29638: 28fff11e bne r5,r3,29600 <_gp+0xfffed0c8> + 2963c: 8009883a mov r4,r16 + 29640: dfc00317 ldw ra,12(sp) + 29644: dc000217 ldw r16,8(sp) + 29648: dec00404 addi sp,sp,16 + 2964c: 002b5681 jmpi 2b568 <__swbuf_r> + 29650: d9400015 stw r5,0(sp) + 29654: d9800115 stw r6,4(sp) + 29658: 00274e40 call 274e4 <__sinit> + 2965c: d9800117 ldw r6,4(sp) + 29660: d9400017 ldw r5,0(sp) + 29664: 003fdf06 br 295e4 <_gp+0xfffed0ac> -00029824 <__d2b>: - 29824: defff804 addi sp,sp,-32 - 29828: dc000215 stw r16,8(sp) - 2982c: 3021883a mov r16,r6 - 29830: dc400315 stw r17,12(sp) - 29834: 8022907a slli r17,r16,1 - 29838: dd000615 stw r20,24(sp) - 2983c: 2829883a mov r20,r5 - 29840: 01400044 movi r5,1 - 29844: dcc00515 stw r19,20(sp) - 29848: dc800415 stw r18,16(sp) - 2984c: dfc00715 stw ra,28(sp) - 29850: 3825883a mov r18,r7 - 29854: 8822d57a srli r17,r17,21 - 29858: 0028b900 call 28b90 <_Balloc> - 2985c: 1027883a mov r19,r2 - 29860: 00800434 movhi r2,16 - 29864: 10bfffc4 addi r2,r2,-1 - 29868: 808c703a and r6,r16,r2 - 2986c: 88000126 beq r17,zero,29874 <__d2b+0x50> - 29870: 31800434 orhi r6,r6,16 - 29874: d9800015 stw r6,0(sp) - 29878: a0002426 beq r20,zero,2990c <__d2b+0xe8> - 2987c: d9000104 addi r4,sp,4 - 29880: dd000115 stw r20,4(sp) - 29884: 0028eec0 call 28eec <__lo0bits> - 29888: d8c00017 ldw r3,0(sp) - 2988c: 10002f1e bne r2,zero,2994c <__d2b+0x128> - 29890: d9000117 ldw r4,4(sp) - 29894: 99000515 stw r4,20(r19) - 29898: 1821003a cmpeq r16,r3,zero - 2989c: 01000084 movi r4,2 - 298a0: 2421c83a sub r16,r4,r16 - 298a4: 98c00615 stw r3,24(r19) - 298a8: 9c000415 stw r16,16(r19) - 298ac: 88001f1e bne r17,zero,2992c <__d2b+0x108> - 298b0: 10bef384 addi r2,r2,-1074 - 298b4: 90800015 stw r2,0(r18) - 298b8: 00900034 movhi r2,16384 - 298bc: 10bfffc4 addi r2,r2,-1 - 298c0: 8085883a add r2,r16,r2 - 298c4: 1085883a add r2,r2,r2 - 298c8: 1085883a add r2,r2,r2 - 298cc: 9885883a add r2,r19,r2 - 298d0: 11000517 ldw r4,20(r2) - 298d4: 8020917a slli r16,r16,5 - 298d8: 0028e840 call 28e84 <__hi0bits> - 298dc: d8c00817 ldw r3,32(sp) - 298e0: 8085c83a sub r2,r16,r2 - 298e4: 18800015 stw r2,0(r3) - 298e8: 9805883a mov r2,r19 - 298ec: dfc00717 ldw ra,28(sp) - 298f0: dd000617 ldw r20,24(sp) - 298f4: dcc00517 ldw r19,20(sp) - 298f8: dc800417 ldw r18,16(sp) - 298fc: dc400317 ldw r17,12(sp) - 29900: dc000217 ldw r16,8(sp) - 29904: dec00804 addi sp,sp,32 - 29908: f800283a ret - 2990c: d809883a mov r4,sp - 29910: 0028eec0 call 28eec <__lo0bits> - 29914: d8c00017 ldw r3,0(sp) - 29918: 04000044 movi r16,1 - 2991c: 9c000415 stw r16,16(r19) - 29920: 98c00515 stw r3,20(r19) - 29924: 10800804 addi r2,r2,32 - 29928: 883fe126 beq r17,zero,298b0 <__d2b+0x8c> - 2992c: 00c00d44 movi r3,53 - 29930: 8c7ef344 addi r17,r17,-1075 - 29934: 88a3883a add r17,r17,r2 - 29938: 1885c83a sub r2,r3,r2 - 2993c: d8c00817 ldw r3,32(sp) - 29940: 94400015 stw r17,0(r18) - 29944: 18800015 stw r2,0(r3) - 29948: 003fe706 br 298e8 <__d2b+0xc4> - 2994c: 01000804 movi r4,32 - 29950: 2089c83a sub r4,r4,r2 - 29954: 1908983a sll r4,r3,r4 - 29958: d9400117 ldw r5,4(sp) - 2995c: 1886d83a srl r3,r3,r2 - 29960: 2148b03a or r4,r4,r5 - 29964: 99000515 stw r4,20(r19) - 29968: d8c00015 stw r3,0(sp) - 2996c: 003fca06 br 29898 <__d2b+0x74> +00029668 : + 29668: 008000f4 movhi r2,3 + 2966c: defffc04 addi sp,sp,-16 + 29670: 10915404 addi r2,r2,17744 + 29674: dc000115 stw r16,4(sp) + 29678: 14000017 ldw r16,0(r2) + 2967c: dc400215 stw r17,8(sp) + 29680: dfc00315 stw ra,12(sp) + 29684: 2023883a mov r17,r4 + 29688: 80000226 beq r16,zero,29694 + 2968c: 80800e17 ldw r2,56(r16) + 29690: 10001a26 beq r2,zero,296fc + 29694: 28800217 ldw r2,8(r5) + 29698: 10bfffc4 addi r2,r2,-1 + 2969c: 28800215 stw r2,8(r5) + 296a0: 10000b16 blt r2,zero,296d0 + 296a4: 28800017 ldw r2,0(r5) + 296a8: 14400005 stb r17,0(r2) + 296ac: 28800017 ldw r2,0(r5) + 296b0: 10c00044 addi r3,r2,1 + 296b4: 28c00015 stw r3,0(r5) + 296b8: 10800003 ldbu r2,0(r2) + 296bc: dfc00317 ldw ra,12(sp) + 296c0: dc400217 ldw r17,8(sp) + 296c4: dc000117 ldw r16,4(sp) + 296c8: dec00404 addi sp,sp,16 + 296cc: f800283a ret + 296d0: 28c00617 ldw r3,24(r5) + 296d4: 10c00e16 blt r2,r3,29710 + 296d8: 28800017 ldw r2,0(r5) + 296dc: 01000284 movi r4,10 + 296e0: 14400005 stb r17,0(r2) + 296e4: 28800017 ldw r2,0(r5) + 296e8: 10c00003 ldbu r3,0(r2) + 296ec: 193ff01e bne r3,r4,296b0 <_gp+0xfffed178> + 296f0: 280d883a mov r6,r5 + 296f4: 180b883a mov r5,r3 + 296f8: 00000706 br 29718 + 296fc: 8009883a mov r4,r16 + 29700: d9400015 stw r5,0(sp) + 29704: 00274e40 call 274e4 <__sinit> + 29708: d9400017 ldw r5,0(sp) + 2970c: 003fe106 br 29694 <_gp+0xfffed15c> + 29710: 280d883a mov r6,r5 + 29714: 880b883a mov r5,r17 + 29718: 8009883a mov r4,r16 + 2971c: dfc00317 ldw ra,12(sp) + 29720: dc400217 ldw r17,8(sp) + 29724: dc000117 ldw r16,4(sp) + 29728: dec00404 addi sp,sp,16 + 2972c: 002b5681 jmpi 2b568 <__swbuf_r> -00029970 <__ratio>: - 29970: defff904 addi sp,sp,-28 - 29974: dc400315 stw r17,12(sp) - 29978: 2823883a mov r17,r5 - 2997c: d9400104 addi r5,sp,4 - 29980: dfc00615 stw ra,24(sp) - 29984: dcc00515 stw r19,20(sp) - 29988: dc800415 stw r18,16(sp) - 2998c: 2027883a mov r19,r4 - 29990: dc000215 stw r16,8(sp) - 29994: 00297180 call 29718 <__b2d> - 29998: d80b883a mov r5,sp - 2999c: 8809883a mov r4,r17 - 299a0: 1025883a mov r18,r2 - 299a4: 1821883a mov r16,r3 - 299a8: 00297180 call 29718 <__b2d> - 299ac: 8a000417 ldw r8,16(r17) - 299b0: 99000417 ldw r4,16(r19) - 299b4: d9400117 ldw r5,4(sp) - 299b8: 2209c83a sub r4,r4,r8 - 299bc: 2010917a slli r8,r4,5 - 299c0: d9000017 ldw r4,0(sp) - 299c4: 2909c83a sub r4,r5,r4 - 299c8: 4109883a add r4,r8,r4 - 299cc: 01000e0e bge zero,r4,29a08 <__ratio+0x98> - 299d0: 2008953a slli r4,r4,20 - 299d4: 2421883a add r16,r4,r16 - 299d8: 100d883a mov r6,r2 - 299dc: 180f883a mov r7,r3 - 299e0: 9009883a mov r4,r18 - 299e4: 800b883a mov r5,r16 - 299e8: 002d9ac0 call 2d9ac <__divdf3> - 299ec: dfc00617 ldw ra,24(sp) - 299f0: dcc00517 ldw r19,20(sp) - 299f4: dc800417 ldw r18,16(sp) - 299f8: dc400317 ldw r17,12(sp) - 299fc: dc000217 ldw r16,8(sp) - 29a00: dec00704 addi sp,sp,28 - 29a04: f800283a ret - 29a08: 2008953a slli r4,r4,20 - 29a0c: 1907c83a sub r3,r3,r4 - 29a10: 003ff106 br 299d8 <__ratio+0x68> +00029730 <_realloc_r>: + 29730: defff604 addi sp,sp,-40 + 29734: dc800215 stw r18,8(sp) + 29738: dfc00915 stw ra,36(sp) + 2973c: df000815 stw fp,32(sp) + 29740: ddc00715 stw r23,28(sp) + 29744: dd800615 stw r22,24(sp) + 29748: dd400515 stw r21,20(sp) + 2974c: dd000415 stw r20,16(sp) + 29750: dcc00315 stw r19,12(sp) + 29754: dc400115 stw r17,4(sp) + 29758: dc000015 stw r16,0(sp) + 2975c: 3025883a mov r18,r6 + 29760: 2800b726 beq r5,zero,29a40 <_realloc_r+0x310> + 29764: 282b883a mov r21,r5 + 29768: 2029883a mov r20,r4 + 2976c: 002f5800 call 2f580 <__malloc_lock> + 29770: a8bfff17 ldw r2,-4(r21) + 29774: 043fff04 movi r16,-4 + 29778: 90c002c4 addi r3,r18,11 + 2977c: 01000584 movi r4,22 + 29780: acfffe04 addi r19,r21,-8 + 29784: 1420703a and r16,r2,r16 + 29788: 20c0332e bgeu r4,r3,29858 <_realloc_r+0x128> + 2978c: 047ffe04 movi r17,-8 + 29790: 1c62703a and r17,r3,r17 + 29794: 8807883a mov r3,r17 + 29798: 88005816 blt r17,zero,298fc <_realloc_r+0x1cc> + 2979c: 8c805736 bltu r17,r18,298fc <_realloc_r+0x1cc> + 297a0: 80c0300e bge r16,r3,29864 <_realloc_r+0x134> + 297a4: 070000f4 movhi fp,3 + 297a8: e70aa304 addi fp,fp,10892 + 297ac: e1c00217 ldw r7,8(fp) + 297b0: 9c09883a add r4,r19,r16 + 297b4: 22000117 ldw r8,4(r4) + 297b8: 21c06326 beq r4,r7,29948 <_realloc_r+0x218> + 297bc: 017fff84 movi r5,-2 + 297c0: 414a703a and r5,r8,r5 + 297c4: 214b883a add r5,r4,r5 + 297c8: 29800117 ldw r6,4(r5) + 297cc: 3180004c andi r6,r6,1 + 297d0: 30003f26 beq r6,zero,298d0 <_realloc_r+0x1a0> + 297d4: 1080004c andi r2,r2,1 + 297d8: 10008326 beq r2,zero,299e8 <_realloc_r+0x2b8> + 297dc: 900b883a mov r5,r18 + 297e0: a009883a mov r4,r20 + 297e4: 00226c00 call 226c0 <_malloc_r> + 297e8: 1025883a mov r18,r2 + 297ec: 10011e26 beq r2,zero,29c68 <_realloc_r+0x538> + 297f0: a93fff17 ldw r4,-4(r21) + 297f4: 10fffe04 addi r3,r2,-8 + 297f8: 00bfff84 movi r2,-2 + 297fc: 2084703a and r2,r4,r2 + 29800: 9885883a add r2,r19,r2 + 29804: 1880ee26 beq r3,r2,29bc0 <_realloc_r+0x490> + 29808: 81bfff04 addi r6,r16,-4 + 2980c: 00800904 movi r2,36 + 29810: 1180b836 bltu r2,r6,29af4 <_realloc_r+0x3c4> + 29814: 00c004c4 movi r3,19 + 29818: 19809636 bltu r3,r6,29a74 <_realloc_r+0x344> + 2981c: 9005883a mov r2,r18 + 29820: a807883a mov r3,r21 + 29824: 19000017 ldw r4,0(r3) + 29828: 11000015 stw r4,0(r2) + 2982c: 19000117 ldw r4,4(r3) + 29830: 11000115 stw r4,4(r2) + 29834: 18c00217 ldw r3,8(r3) + 29838: 10c00215 stw r3,8(r2) + 2983c: a80b883a mov r5,r21 + 29840: a009883a mov r4,r20 + 29844: 00276580 call 27658 <_free_r> + 29848: a009883a mov r4,r20 + 2984c: 002f5a40 call 2f5a4 <__malloc_unlock> + 29850: 9005883a mov r2,r18 + 29854: 00001206 br 298a0 <_realloc_r+0x170> + 29858: 00c00404 movi r3,16 + 2985c: 1823883a mov r17,r3 + 29860: 003fce06 br 2979c <_gp+0xfffed264> + 29864: a825883a mov r18,r21 + 29868: 8445c83a sub r2,r16,r17 + 2986c: 00c003c4 movi r3,15 + 29870: 18802636 bltu r3,r2,2990c <_realloc_r+0x1dc> + 29874: 99800117 ldw r6,4(r19) + 29878: 9c07883a add r3,r19,r16 + 2987c: 3180004c andi r6,r6,1 + 29880: 3420b03a or r16,r6,r16 + 29884: 9c000115 stw r16,4(r19) + 29888: 18800117 ldw r2,4(r3) + 2988c: 10800054 ori r2,r2,1 + 29890: 18800115 stw r2,4(r3) + 29894: a009883a mov r4,r20 + 29898: 002f5a40 call 2f5a4 <__malloc_unlock> + 2989c: 9005883a mov r2,r18 + 298a0: dfc00917 ldw ra,36(sp) + 298a4: df000817 ldw fp,32(sp) + 298a8: ddc00717 ldw r23,28(sp) + 298ac: dd800617 ldw r22,24(sp) + 298b0: dd400517 ldw r21,20(sp) + 298b4: dd000417 ldw r20,16(sp) + 298b8: dcc00317 ldw r19,12(sp) + 298bc: dc800217 ldw r18,8(sp) + 298c0: dc400117 ldw r17,4(sp) + 298c4: dc000017 ldw r16,0(sp) + 298c8: dec00a04 addi sp,sp,40 + 298cc: f800283a ret + 298d0: 017fff04 movi r5,-4 + 298d4: 414a703a and r5,r8,r5 + 298d8: 814d883a add r6,r16,r5 + 298dc: 30c01f16 blt r6,r3,2995c <_realloc_r+0x22c> + 298e0: 20800317 ldw r2,12(r4) + 298e4: 20c00217 ldw r3,8(r4) + 298e8: a825883a mov r18,r21 + 298ec: 3021883a mov r16,r6 + 298f0: 18800315 stw r2,12(r3) + 298f4: 10c00215 stw r3,8(r2) + 298f8: 003fdb06 br 29868 <_gp+0xfffed330> + 298fc: 00800304 movi r2,12 + 29900: a0800015 stw r2,0(r20) + 29904: 0005883a mov r2,zero + 29908: 003fe506 br 298a0 <_gp+0xfffed368> + 2990c: 98c00117 ldw r3,4(r19) + 29910: 9c4b883a add r5,r19,r17 + 29914: 11000054 ori r4,r2,1 + 29918: 18c0004c andi r3,r3,1 + 2991c: 1c62b03a or r17,r3,r17 + 29920: 9c400115 stw r17,4(r19) + 29924: 29000115 stw r4,4(r5) + 29928: 2885883a add r2,r5,r2 + 2992c: 10c00117 ldw r3,4(r2) + 29930: 29400204 addi r5,r5,8 + 29934: a009883a mov r4,r20 + 29938: 18c00054 ori r3,r3,1 + 2993c: 10c00115 stw r3,4(r2) + 29940: 00276580 call 27658 <_free_r> + 29944: 003fd306 br 29894 <_gp+0xfffed35c> + 29948: 017fff04 movi r5,-4 + 2994c: 414a703a and r5,r8,r5 + 29950: 89800404 addi r6,r17,16 + 29954: 8151883a add r8,r16,r5 + 29958: 4180590e bge r8,r6,29ac0 <_realloc_r+0x390> + 2995c: 1080004c andi r2,r2,1 + 29960: 103f9e1e bne r2,zero,297dc <_gp+0xfffed2a4> + 29964: adbffe17 ldw r22,-8(r21) + 29968: 00bfff04 movi r2,-4 + 2996c: 9dadc83a sub r22,r19,r22 + 29970: b1800117 ldw r6,4(r22) + 29974: 3084703a and r2,r6,r2 + 29978: 20002026 beq r4,zero,299fc <_realloc_r+0x2cc> + 2997c: 80af883a add r23,r16,r2 + 29980: b96f883a add r23,r23,r5 + 29984: 21c05f26 beq r4,r7,29b04 <_realloc_r+0x3d4> + 29988: b8c01c16 blt r23,r3,299fc <_realloc_r+0x2cc> + 2998c: 20800317 ldw r2,12(r4) + 29990: 20c00217 ldw r3,8(r4) + 29994: 81bfff04 addi r6,r16,-4 + 29998: 01000904 movi r4,36 + 2999c: 18800315 stw r2,12(r3) + 299a0: 10c00215 stw r3,8(r2) + 299a4: b0c00217 ldw r3,8(r22) + 299a8: b0800317 ldw r2,12(r22) + 299ac: b4800204 addi r18,r22,8 + 299b0: 18800315 stw r2,12(r3) + 299b4: 10c00215 stw r3,8(r2) + 299b8: 21801b36 bltu r4,r6,29a28 <_realloc_r+0x2f8> + 299bc: 008004c4 movi r2,19 + 299c0: 1180352e bgeu r2,r6,29a98 <_realloc_r+0x368> + 299c4: a8800017 ldw r2,0(r21) + 299c8: b0800215 stw r2,8(r22) + 299cc: a8800117 ldw r2,4(r21) + 299d0: b0800315 stw r2,12(r22) + 299d4: 008006c4 movi r2,27 + 299d8: 11807f36 bltu r2,r6,29bd8 <_realloc_r+0x4a8> + 299dc: b0800404 addi r2,r22,16 + 299e0: ad400204 addi r21,r21,8 + 299e4: 00002d06 br 29a9c <_realloc_r+0x36c> + 299e8: adbffe17 ldw r22,-8(r21) + 299ec: 00bfff04 movi r2,-4 + 299f0: 9dadc83a sub r22,r19,r22 + 299f4: b1000117 ldw r4,4(r22) + 299f8: 2084703a and r2,r4,r2 + 299fc: b03f7726 beq r22,zero,297dc <_gp+0xfffed2a4> + 29a00: 80af883a add r23,r16,r2 + 29a04: b8ff7516 blt r23,r3,297dc <_gp+0xfffed2a4> + 29a08: b0800317 ldw r2,12(r22) + 29a0c: b0c00217 ldw r3,8(r22) + 29a10: 81bfff04 addi r6,r16,-4 + 29a14: 01000904 movi r4,36 + 29a18: 18800315 stw r2,12(r3) + 29a1c: 10c00215 stw r3,8(r2) + 29a20: b4800204 addi r18,r22,8 + 29a24: 21bfe52e bgeu r4,r6,299bc <_gp+0xfffed484> + 29a28: a80b883a mov r5,r21 + 29a2c: 9009883a mov r4,r18 + 29a30: 00284700 call 28470 + 29a34: b821883a mov r16,r23 + 29a38: b027883a mov r19,r22 + 29a3c: 003f8a06 br 29868 <_gp+0xfffed330> + 29a40: 300b883a mov r5,r6 + 29a44: dfc00917 ldw ra,36(sp) + 29a48: df000817 ldw fp,32(sp) + 29a4c: ddc00717 ldw r23,28(sp) + 29a50: dd800617 ldw r22,24(sp) + 29a54: dd400517 ldw r21,20(sp) + 29a58: dd000417 ldw r20,16(sp) + 29a5c: dcc00317 ldw r19,12(sp) + 29a60: dc800217 ldw r18,8(sp) + 29a64: dc400117 ldw r17,4(sp) + 29a68: dc000017 ldw r16,0(sp) + 29a6c: dec00a04 addi sp,sp,40 + 29a70: 00226c01 jmpi 226c0 <_malloc_r> + 29a74: a8c00017 ldw r3,0(r21) + 29a78: 90c00015 stw r3,0(r18) + 29a7c: a8c00117 ldw r3,4(r21) + 29a80: 90c00115 stw r3,4(r18) + 29a84: 00c006c4 movi r3,27 + 29a88: 19804536 bltu r3,r6,29ba0 <_realloc_r+0x470> + 29a8c: 90800204 addi r2,r18,8 + 29a90: a8c00204 addi r3,r21,8 + 29a94: 003f6306 br 29824 <_gp+0xfffed2ec> + 29a98: 9005883a mov r2,r18 + 29a9c: a8c00017 ldw r3,0(r21) + 29aa0: b821883a mov r16,r23 + 29aa4: b027883a mov r19,r22 + 29aa8: 10c00015 stw r3,0(r2) + 29aac: a8c00117 ldw r3,4(r21) + 29ab0: 10c00115 stw r3,4(r2) + 29ab4: a8c00217 ldw r3,8(r21) + 29ab8: 10c00215 stw r3,8(r2) + 29abc: 003f6a06 br 29868 <_gp+0xfffed330> + 29ac0: 9c67883a add r19,r19,r17 + 29ac4: 4445c83a sub r2,r8,r17 + 29ac8: e4c00215 stw r19,8(fp) + 29acc: 10800054 ori r2,r2,1 + 29ad0: 98800115 stw r2,4(r19) + 29ad4: a8bfff17 ldw r2,-4(r21) + 29ad8: a009883a mov r4,r20 + 29adc: 1080004c andi r2,r2,1 + 29ae0: 1462b03a or r17,r2,r17 + 29ae4: ac7fff15 stw r17,-4(r21) + 29ae8: 002f5a40 call 2f5a4 <__malloc_unlock> + 29aec: a805883a mov r2,r21 + 29af0: 003f6b06 br 298a0 <_gp+0xfffed368> + 29af4: a80b883a mov r5,r21 + 29af8: 9009883a mov r4,r18 + 29afc: 00284700 call 28470 + 29b00: 003f4e06 br 2983c <_gp+0xfffed304> + 29b04: 89000404 addi r4,r17,16 + 29b08: b93fbc16 blt r23,r4,299fc <_gp+0xfffed4c4> + 29b0c: b0800317 ldw r2,12(r22) + 29b10: b0c00217 ldw r3,8(r22) + 29b14: 81bfff04 addi r6,r16,-4 + 29b18: 01000904 movi r4,36 + 29b1c: 18800315 stw r2,12(r3) + 29b20: 10c00215 stw r3,8(r2) + 29b24: b4800204 addi r18,r22,8 + 29b28: 21804336 bltu r4,r6,29c38 <_realloc_r+0x508> + 29b2c: 008004c4 movi r2,19 + 29b30: 11803f2e bgeu r2,r6,29c30 <_realloc_r+0x500> + 29b34: a8800017 ldw r2,0(r21) + 29b38: b0800215 stw r2,8(r22) + 29b3c: a8800117 ldw r2,4(r21) + 29b40: b0800315 stw r2,12(r22) + 29b44: 008006c4 movi r2,27 + 29b48: 11803f36 bltu r2,r6,29c48 <_realloc_r+0x518> + 29b4c: b0800404 addi r2,r22,16 + 29b50: ad400204 addi r21,r21,8 + 29b54: a8c00017 ldw r3,0(r21) + 29b58: 10c00015 stw r3,0(r2) + 29b5c: a8c00117 ldw r3,4(r21) + 29b60: 10c00115 stw r3,4(r2) + 29b64: a8c00217 ldw r3,8(r21) + 29b68: 10c00215 stw r3,8(r2) + 29b6c: b447883a add r3,r22,r17 + 29b70: bc45c83a sub r2,r23,r17 + 29b74: e0c00215 stw r3,8(fp) + 29b78: 10800054 ori r2,r2,1 + 29b7c: 18800115 stw r2,4(r3) + 29b80: b0800117 ldw r2,4(r22) + 29b84: a009883a mov r4,r20 + 29b88: 1080004c andi r2,r2,1 + 29b8c: 1462b03a or r17,r2,r17 + 29b90: b4400115 stw r17,4(r22) + 29b94: 002f5a40 call 2f5a4 <__malloc_unlock> + 29b98: 9005883a mov r2,r18 + 29b9c: 003f4006 br 298a0 <_gp+0xfffed368> + 29ba0: a8c00217 ldw r3,8(r21) + 29ba4: 90c00215 stw r3,8(r18) + 29ba8: a8c00317 ldw r3,12(r21) + 29bac: 90c00315 stw r3,12(r18) + 29bb0: 30801126 beq r6,r2,29bf8 <_realloc_r+0x4c8> + 29bb4: 90800404 addi r2,r18,16 + 29bb8: a8c00404 addi r3,r21,16 + 29bbc: 003f1906 br 29824 <_gp+0xfffed2ec> + 29bc0: 90ffff17 ldw r3,-4(r18) + 29bc4: 00bfff04 movi r2,-4 + 29bc8: a825883a mov r18,r21 + 29bcc: 1884703a and r2,r3,r2 + 29bd0: 80a1883a add r16,r16,r2 + 29bd4: 003f2406 br 29868 <_gp+0xfffed330> + 29bd8: a8800217 ldw r2,8(r21) + 29bdc: b0800415 stw r2,16(r22) + 29be0: a8800317 ldw r2,12(r21) + 29be4: b0800515 stw r2,20(r22) + 29be8: 31000a26 beq r6,r4,29c14 <_realloc_r+0x4e4> + 29bec: b0800604 addi r2,r22,24 + 29bf0: ad400404 addi r21,r21,16 + 29bf4: 003fa906 br 29a9c <_gp+0xfffed564> + 29bf8: a9000417 ldw r4,16(r21) + 29bfc: 90800604 addi r2,r18,24 + 29c00: a8c00604 addi r3,r21,24 + 29c04: 91000415 stw r4,16(r18) + 29c08: a9000517 ldw r4,20(r21) + 29c0c: 91000515 stw r4,20(r18) + 29c10: 003f0406 br 29824 <_gp+0xfffed2ec> + 29c14: a8c00417 ldw r3,16(r21) + 29c18: ad400604 addi r21,r21,24 + 29c1c: b0800804 addi r2,r22,32 + 29c20: b0c00615 stw r3,24(r22) + 29c24: a8ffff17 ldw r3,-4(r21) + 29c28: b0c00715 stw r3,28(r22) + 29c2c: 003f9b06 br 29a9c <_gp+0xfffed564> + 29c30: 9005883a mov r2,r18 + 29c34: 003fc706 br 29b54 <_gp+0xfffed61c> + 29c38: a80b883a mov r5,r21 + 29c3c: 9009883a mov r4,r18 + 29c40: 00284700 call 28470 + 29c44: 003fc906 br 29b6c <_gp+0xfffed634> + 29c48: a8800217 ldw r2,8(r21) + 29c4c: b0800415 stw r2,16(r22) + 29c50: a8800317 ldw r2,12(r21) + 29c54: b0800515 stw r2,20(r22) + 29c58: 31000726 beq r6,r4,29c78 <_realloc_r+0x548> + 29c5c: b0800604 addi r2,r22,24 + 29c60: ad400404 addi r21,r21,16 + 29c64: 003fbb06 br 29b54 <_gp+0xfffed61c> + 29c68: a009883a mov r4,r20 + 29c6c: 002f5a40 call 2f5a4 <__malloc_unlock> + 29c70: 0005883a mov r2,zero + 29c74: 003f0a06 br 298a0 <_gp+0xfffed368> + 29c78: a8c00417 ldw r3,16(r21) + 29c7c: ad400604 addi r21,r21,24 + 29c80: b0800804 addi r2,r22,32 + 29c84: b0c00615 stw r3,24(r22) + 29c88: a8ffff17 ldw r3,-4(r21) + 29c8c: b0c00715 stw r3,28(r22) + 29c90: 003fb006 br 29b54 <_gp+0xfffed61c> -00029a14 <_mprec_log10>: - 29a14: defffe04 addi sp,sp,-8 - 29a18: dc000015 stw r16,0(sp) - 29a1c: dfc00115 stw ra,4(sp) - 29a20: 008005c4 movi r2,23 - 29a24: 2021883a mov r16,r4 - 29a28: 11000d0e bge r2,r4,29a60 <_mprec_log10+0x4c> - 29a2c: 0005883a mov r2,zero - 29a30: 00cffc34 movhi r3,16368 - 29a34: 843fffc4 addi r16,r16,-1 - 29a38: 000d883a mov r6,zero - 29a3c: 01d00934 movhi r7,16420 - 29a40: 1009883a mov r4,r2 - 29a44: 180b883a mov r5,r3 - 29a48: 002e4ec0 call 2e4ec <__muldf3> - 29a4c: 803ff91e bne r16,zero,29a34 <_mprec_log10+0x20> - 29a50: dfc00117 ldw ra,4(sp) - 29a54: dc000017 ldw r16,0(sp) - 29a58: dec00204 addi sp,sp,8 - 29a5c: f800283a ret - 29a60: 202090fa slli r16,r4,3 - 29a64: 008000f4 movhi r2,3 - 29a68: 108a8104 addi r2,r2,10756 - 29a6c: 1421883a add r16,r2,r16 - 29a70: 80800017 ldw r2,0(r16) - 29a74: 80c00117 ldw r3,4(r16) - 29a78: dfc00117 ldw ra,4(sp) - 29a7c: dc000017 ldw r16,0(sp) - 29a80: dec00204 addi sp,sp,8 - 29a84: f800283a ret +00029c94 <__fpclassifyd>: + 29c94: 00a00034 movhi r2,32768 + 29c98: 10bfffc4 addi r2,r2,-1 + 29c9c: 2884703a and r2,r5,r2 + 29ca0: 10000726 beq r2,zero,29cc0 <__fpclassifyd+0x2c> + 29ca4: 00fffc34 movhi r3,65520 + 29ca8: 019ff834 movhi r6,32736 + 29cac: 28c7883a add r3,r5,r3 + 29cb0: 31bfffc4 addi r6,r6,-1 + 29cb4: 30c00536 bltu r6,r3,29ccc <__fpclassifyd+0x38> + 29cb8: 00800104 movi r2,4 + 29cbc: f800283a ret + 29cc0: 2000021e bne r4,zero,29ccc <__fpclassifyd+0x38> + 29cc4: 00800084 movi r2,2 + 29cc8: f800283a ret + 29ccc: 00dffc34 movhi r3,32752 + 29cd0: 019ff834 movhi r6,32736 + 29cd4: 28cb883a add r5,r5,r3 + 29cd8: 31bfffc4 addi r6,r6,-1 + 29cdc: 317ff62e bgeu r6,r5,29cb8 <_gp+0xfffed780> + 29ce0: 01400434 movhi r5,16 + 29ce4: 297fffc4 addi r5,r5,-1 + 29ce8: 28800236 bltu r5,r2,29cf4 <__fpclassifyd+0x60> + 29cec: 008000c4 movi r2,3 + 29cf0: f800283a ret + 29cf4: 10c00226 beq r2,r3,29d00 <__fpclassifyd+0x6c> + 29cf8: 0005883a mov r2,zero + 29cfc: f800283a ret + 29d00: 2005003a cmpeq r2,r4,zero + 29d04: f800283a ret -00029a88 <__copybits>: - 29a88: 297fffc4 addi r5,r5,-1 - 29a8c: 280fd17a srai r7,r5,5 - 29a90: 30c00417 ldw r3,16(r6) - 29a94: 30800504 addi r2,r6,20 - 29a98: 39c00044 addi r7,r7,1 - 29a9c: 18c7883a add r3,r3,r3 - 29aa0: 39cf883a add r7,r7,r7 - 29aa4: 18c7883a add r3,r3,r3 - 29aa8: 39cf883a add r7,r7,r7 - 29aac: 10c7883a add r3,r2,r3 - 29ab0: 21cf883a add r7,r4,r7 - 29ab4: 10c00d2e bgeu r2,r3,29aec <__copybits+0x64> - 29ab8: 200b883a mov r5,r4 - 29abc: 12000017 ldw r8,0(r2) - 29ac0: 29400104 addi r5,r5,4 - 29ac4: 10800104 addi r2,r2,4 - 29ac8: 2a3fff15 stw r8,-4(r5) - 29acc: 10fffb36 bltu r2,r3,29abc <__copybits+0x34> - 29ad0: 1985c83a sub r2,r3,r6 - 29ad4: 10bffac4 addi r2,r2,-21 - 29ad8: 1004d0ba srli r2,r2,2 - 29adc: 10800044 addi r2,r2,1 - 29ae0: 1085883a add r2,r2,r2 - 29ae4: 1085883a add r2,r2,r2 - 29ae8: 2089883a add r4,r4,r2 - 29aec: 21c0032e bgeu r4,r7,29afc <__copybits+0x74> - 29af0: 20000015 stw zero,0(r4) - 29af4: 21000104 addi r4,r4,4 - 29af8: 21fffd36 bltu r4,r7,29af0 <__copybits+0x68> - 29afc: f800283a ret +00029d08 <__sread>: + 29d08: defffe04 addi sp,sp,-8 + 29d0c: dc000015 stw r16,0(sp) + 29d10: 2821883a mov r16,r5 + 29d14: 2940038f ldh r5,14(r5) + 29d18: dfc00115 stw ra,4(sp) + 29d1c: 002bc540 call 2bc54 <_read_r> + 29d20: 10000716 blt r2,zero,29d40 <__sread+0x38> + 29d24: 80c01417 ldw r3,80(r16) + 29d28: 1887883a add r3,r3,r2 + 29d2c: 80c01415 stw r3,80(r16) + 29d30: dfc00117 ldw ra,4(sp) + 29d34: dc000017 ldw r16,0(sp) + 29d38: dec00204 addi sp,sp,8 + 29d3c: f800283a ret + 29d40: 80c0030b ldhu r3,12(r16) + 29d44: 18fbffcc andi r3,r3,61439 + 29d48: 80c0030d sth r3,12(r16) + 29d4c: dfc00117 ldw ra,4(sp) + 29d50: dc000017 ldw r16,0(sp) + 29d54: dec00204 addi sp,sp,8 + 29d58: f800283a ret -00029b00 <__any_on>: - 29b00: 20c00417 ldw r3,16(r4) - 29b04: 2805d17a srai r2,r5,5 - 29b08: 21000504 addi r4,r4,20 - 29b0c: 18800d0e bge r3,r2,29b44 <__any_on+0x44> - 29b10: 18c7883a add r3,r3,r3 - 29b14: 18c7883a add r3,r3,r3 - 29b18: 20c7883a add r3,r4,r3 - 29b1c: 20c0192e bgeu r4,r3,29b84 <__any_on+0x84> - 29b20: 18bfff17 ldw r2,-4(r3) - 29b24: 18ffff04 addi r3,r3,-4 - 29b28: 1000041e bne r2,zero,29b3c <__any_on+0x3c> - 29b2c: 20c0142e bgeu r4,r3,29b80 <__any_on+0x80> - 29b30: 18ffff04 addi r3,r3,-4 - 29b34: 19400017 ldw r5,0(r3) - 29b38: 283ffc26 beq r5,zero,29b2c <__any_on+0x2c> - 29b3c: 00800044 movi r2,1 - 29b40: f800283a ret - 29b44: 10c00a0e bge r2,r3,29b70 <__any_on+0x70> - 29b48: 1085883a add r2,r2,r2 - 29b4c: 1085883a add r2,r2,r2 - 29b50: 294007cc andi r5,r5,31 - 29b54: 2087883a add r3,r4,r2 - 29b58: 283ff026 beq r5,zero,29b1c <__any_on+0x1c> - 29b5c: 19800017 ldw r6,0(r3) - 29b60: 3144d83a srl r2,r6,r5 - 29b64: 114a983a sll r5,r2,r5 - 29b68: 317ff41e bne r6,r5,29b3c <__any_on+0x3c> - 29b6c: 003feb06 br 29b1c <__any_on+0x1c> - 29b70: 1085883a add r2,r2,r2 - 29b74: 1085883a add r2,r2,r2 - 29b78: 2087883a add r3,r4,r2 - 29b7c: 003fe706 br 29b1c <__any_on+0x1c> - 29b80: f800283a ret - 29b84: 0005883a mov r2,zero - 29b88: f800283a ret +00029d5c <__seofread>: + 29d5c: 0005883a mov r2,zero + 29d60: f800283a ret -00029b8c <_putc_r>: - 29b8c: defffc04 addi sp,sp,-16 - 29b90: dc000215 stw r16,8(sp) - 29b94: dfc00315 stw ra,12(sp) - 29b98: 2021883a mov r16,r4 - 29b9c: 20000226 beq r4,zero,29ba8 <_putc_r+0x1c> - 29ba0: 20800e17 ldw r2,56(r4) - 29ba4: 10001b26 beq r2,zero,29c14 <_putc_r+0x88> - 29ba8: 30800217 ldw r2,8(r6) - 29bac: 10bfffc4 addi r2,r2,-1 - 29bb0: 30800215 stw r2,8(r6) - 29bb4: 10000a16 blt r2,zero,29be0 <_putc_r+0x54> - 29bb8: 30800017 ldw r2,0(r6) - 29bbc: 11400005 stb r5,0(r2) - 29bc0: 30800017 ldw r2,0(r6) - 29bc4: 10c00044 addi r3,r2,1 - 29bc8: 30c00015 stw r3,0(r6) - 29bcc: 10800003 ldbu r2,0(r2) - 29bd0: dfc00317 ldw ra,12(sp) - 29bd4: dc000217 ldw r16,8(sp) - 29bd8: dec00404 addi sp,sp,16 - 29bdc: f800283a ret - 29be0: 30c00617 ldw r3,24(r6) - 29be4: 10c00616 blt r2,r3,29c00 <_putc_r+0x74> - 29be8: 30800017 ldw r2,0(r6) - 29bec: 00c00284 movi r3,10 - 29bf0: 11400005 stb r5,0(r2) - 29bf4: 30800017 ldw r2,0(r6) - 29bf8: 11400003 ldbu r5,0(r2) - 29bfc: 28fff11e bne r5,r3,29bc4 <_putc_r+0x38> - 29c00: 8009883a mov r4,r16 - 29c04: dfc00317 ldw ra,12(sp) - 29c08: dc000217 ldw r16,8(sp) - 29c0c: dec00404 addi sp,sp,16 - 29c10: 002bd1c1 jmpi 2bd1c <__swbuf_r> - 29c14: d9400015 stw r5,0(sp) - 29c18: d9800115 stw r6,4(sp) - 29c1c: 0027aa80 call 27aa8 <__sinit> - 29c20: d9800117 ldw r6,4(sp) - 29c24: d9400017 ldw r5,0(sp) - 29c28: 003fdf06 br 29ba8 <_putc_r+0x1c> +00029d64 <__swrite>: + 29d64: 2880030b ldhu r2,12(r5) + 29d68: defffb04 addi sp,sp,-20 + 29d6c: dcc00315 stw r19,12(sp) + 29d70: dc800215 stw r18,8(sp) + 29d74: dc400115 stw r17,4(sp) + 29d78: dc000015 stw r16,0(sp) + 29d7c: dfc00415 stw ra,16(sp) + 29d80: 10c0400c andi r3,r2,256 + 29d84: 2821883a mov r16,r5 + 29d88: 2023883a mov r17,r4 + 29d8c: 3025883a mov r18,r6 + 29d90: 3827883a mov r19,r7 + 29d94: 18000526 beq r3,zero,29dac <__swrite+0x48> + 29d98: 2940038f ldh r5,14(r5) + 29d9c: 01c00084 movi r7,2 + 29da0: 000d883a mov r6,zero + 29da4: 002bbf40 call 2bbf4 <_lseek_r> + 29da8: 8080030b ldhu r2,12(r16) + 29dac: 8140038f ldh r5,14(r16) + 29db0: 10bbffcc andi r2,r2,61439 + 29db4: 980f883a mov r7,r19 + 29db8: 900d883a mov r6,r18 + 29dbc: 8809883a mov r4,r17 + 29dc0: 8080030d sth r2,12(r16) + 29dc4: dfc00417 ldw ra,16(sp) + 29dc8: dcc00317 ldw r19,12(sp) + 29dcc: dc800217 ldw r18,8(sp) + 29dd0: dc400117 ldw r17,4(sp) + 29dd4: dc000017 ldw r16,0(sp) + 29dd8: dec00504 addi sp,sp,20 + 29ddc: 002b6c01 jmpi 2b6c0 <_write_r> -00029c2c : - 29c2c: 008000f4 movhi r2,3 - 29c30: defffc04 addi sp,sp,-16 - 29c34: 10939f04 addi r2,r2,20092 - 29c38: dc000115 stw r16,4(sp) - 29c3c: 14000017 ldw r16,0(r2) - 29c40: dc400215 stw r17,8(sp) - 29c44: dfc00315 stw ra,12(sp) - 29c48: 2023883a mov r17,r4 - 29c4c: 80000226 beq r16,zero,29c58 - 29c50: 80800e17 ldw r2,56(r16) - 29c54: 10001a26 beq r2,zero,29cc0 - 29c58: 28800217 ldw r2,8(r5) - 29c5c: 10bfffc4 addi r2,r2,-1 - 29c60: 28800215 stw r2,8(r5) - 29c64: 10000b16 blt r2,zero,29c94 - 29c68: 28800017 ldw r2,0(r5) - 29c6c: 14400005 stb r17,0(r2) - 29c70: 28800017 ldw r2,0(r5) - 29c74: 10c00044 addi r3,r2,1 - 29c78: 28c00015 stw r3,0(r5) - 29c7c: 10800003 ldbu r2,0(r2) - 29c80: dfc00317 ldw ra,12(sp) - 29c84: dc400217 ldw r17,8(sp) - 29c88: dc000117 ldw r16,4(sp) - 29c8c: dec00404 addi sp,sp,16 - 29c90: f800283a ret - 29c94: 28c00617 ldw r3,24(r5) - 29c98: 10c00e16 blt r2,r3,29cd4 - 29c9c: 28800017 ldw r2,0(r5) - 29ca0: 01000284 movi r4,10 - 29ca4: 14400005 stb r17,0(r2) - 29ca8: 28800017 ldw r2,0(r5) - 29cac: 10c00003 ldbu r3,0(r2) - 29cb0: 193ff01e bne r3,r4,29c74 - 29cb4: 280d883a mov r6,r5 - 29cb8: 180b883a mov r5,r3 - 29cbc: 00000706 br 29cdc - 29cc0: 8009883a mov r4,r16 - 29cc4: d9400015 stw r5,0(sp) - 29cc8: 0027aa80 call 27aa8 <__sinit> - 29ccc: d9400017 ldw r5,0(sp) - 29cd0: 003fe106 br 29c58 - 29cd4: 280d883a mov r6,r5 - 29cd8: 880b883a mov r5,r17 - 29cdc: 8009883a mov r4,r16 - 29ce0: dfc00317 ldw ra,12(sp) - 29ce4: dc400217 ldw r17,8(sp) - 29ce8: dc000117 ldw r16,4(sp) - 29cec: dec00404 addi sp,sp,16 - 29cf0: 002bd1c1 jmpi 2bd1c <__swbuf_r> +00029de0 <__sseek>: + 29de0: defffe04 addi sp,sp,-8 + 29de4: dc000015 stw r16,0(sp) + 29de8: 2821883a mov r16,r5 + 29dec: 2940038f ldh r5,14(r5) + 29df0: dfc00115 stw ra,4(sp) + 29df4: 002bbf40 call 2bbf4 <_lseek_r> + 29df8: 00ffffc4 movi r3,-1 + 29dfc: 10c00826 beq r2,r3,29e20 <__sseek+0x40> + 29e00: 80c0030b ldhu r3,12(r16) + 29e04: 80801415 stw r2,80(r16) + 29e08: 18c40014 ori r3,r3,4096 + 29e0c: 80c0030d sth r3,12(r16) + 29e10: dfc00117 ldw ra,4(sp) + 29e14: dc000017 ldw r16,0(sp) + 29e18: dec00204 addi sp,sp,8 + 29e1c: f800283a ret + 29e20: 80c0030b ldhu r3,12(r16) + 29e24: 18fbffcc andi r3,r3,61439 + 29e28: 80c0030d sth r3,12(r16) + 29e2c: dfc00117 ldw ra,4(sp) + 29e30: dc000017 ldw r16,0(sp) + 29e34: dec00204 addi sp,sp,8 + 29e38: f800283a ret -00029cf4 <_realloc_r>: - 29cf4: defff604 addi sp,sp,-40 - 29cf8: dc400115 stw r17,4(sp) - 29cfc: dfc00915 stw ra,36(sp) - 29d00: df000815 stw fp,32(sp) - 29d04: ddc00715 stw r23,28(sp) - 29d08: dd800615 stw r22,24(sp) - 29d0c: dd400515 stw r21,20(sp) - 29d10: dd000415 stw r20,16(sp) - 29d14: dcc00315 stw r19,12(sp) - 29d18: dc800215 stw r18,8(sp) - 29d1c: dc000015 stw r16,0(sp) - 29d20: 3023883a mov r17,r6 - 29d24: 2800b626 beq r5,zero,2a000 <_realloc_r+0x30c> - 29d28: 2829883a mov r20,r5 - 29d2c: 2025883a mov r18,r4 - 29d30: 002fea40 call 2fea4 <__malloc_lock> - 29d34: a0ffff17 ldw r3,-4(r20) - 29d38: 043fff04 movi r16,-4 - 29d3c: 888002c4 addi r2,r17,11 - 29d40: 01000584 movi r4,22 - 29d44: a57ffe04 addi r21,r20,-8 - 29d48: 1c20703a and r16,r3,r16 - 29d4c: 2080332e bgeu r4,r2,29e1c <_realloc_r+0x128> - 29d50: 05bffe04 movi r22,-8 - 29d54: 15ac703a and r22,r2,r22 - 29d58: b005883a mov r2,r22 - 29d5c: b0005716 blt r22,zero,29ebc <_realloc_r+0x1c8> - 29d60: b4405636 bltu r22,r17,29ebc <_realloc_r+0x1c8> - 29d64: 8080300e bge r16,r2,29e28 <_realloc_r+0x134> - 29d68: 070000f4 movhi fp,3 - 29d6c: e70df904 addi fp,fp,14308 - 29d70: e2000217 ldw r8,8(fp) - 29d74: ac09883a add r4,r21,r16 - 29d78: 22006126 beq r4,r8,29f00 <_realloc_r+0x20c> - 29d7c: 22400117 ldw r9,4(r4) - 29d80: 01ffff84 movi r7,-2 - 29d84: 49ce703a and r7,r9,r7 - 29d88: 21cf883a add r7,r4,r7 - 29d8c: 39800117 ldw r6,4(r7) - 29d90: 3180004c andi r6,r6,1 - 29d94: 30003e26 beq r6,zero,29e90 <_realloc_r+0x19c> - 29d98: 18c0004c andi r3,r3,1 - 29d9c: 18008126 beq r3,zero,29fa4 <_realloc_r+0x2b0> - 29da0: 880b883a mov r5,r17 - 29da4: 9009883a mov r4,r18 - 29da8: 0022bfc0 call 22bfc <_malloc_r> - 29dac: 1023883a mov r17,r2 - 29db0: 10011e26 beq r2,zero,2a22c <_realloc_r+0x538> - 29db4: a0ffff17 ldw r3,-4(r20) - 29db8: 113ffe04 addi r4,r2,-8 - 29dbc: 00bfff84 movi r2,-2 - 29dc0: 1884703a and r2,r3,r2 - 29dc4: a885883a add r2,r21,r2 - 29dc8: 2080ee26 beq r4,r2,2a184 <_realloc_r+0x490> - 29dcc: 81bfff04 addi r6,r16,-4 - 29dd0: 00800904 movi r2,36 - 29dd4: 1180b836 bltu r2,r6,2a0b8 <_realloc_r+0x3c4> - 29dd8: 00c004c4 movi r3,19 - 29ddc: 19809536 bltu r3,r6,2a034 <_realloc_r+0x340> - 29de0: 8805883a mov r2,r17 - 29de4: a007883a mov r3,r20 - 29de8: 19000017 ldw r4,0(r3) - 29dec: 11000015 stw r4,0(r2) - 29df0: 19000117 ldw r4,4(r3) - 29df4: 11000115 stw r4,4(r2) - 29df8: 18c00217 ldw r3,8(r3) - 29dfc: 10c00215 stw r3,8(r2) - 29e00: a00b883a mov r5,r20 - 29e04: 9009883a mov r4,r18 - 29e08: 0027c1c0 call 27c1c <_free_r> - 29e0c: 9009883a mov r4,r18 - 29e10: 002fec80 call 2fec8 <__malloc_unlock> - 29e14: 8805883a mov r2,r17 - 29e18: 00001106 br 29e60 <_realloc_r+0x16c> - 29e1c: 00800404 movi r2,16 - 29e20: 102d883a mov r22,r2 - 29e24: 003fce06 br 29d60 <_realloc_r+0x6c> - 29e28: a023883a mov r17,r20 - 29e2c: 858fc83a sub r7,r16,r22 - 29e30: 008003c4 movi r2,15 - 29e34: 18c0004c andi r3,r3,1 - 29e38: 11c02436 bltu r2,r7,29ecc <_realloc_r+0x1d8> - 29e3c: 1c06b03a or r3,r3,r16 - 29e40: a8c00115 stw r3,4(r21) - 29e44: ac21883a add r16,r21,r16 - 29e48: 80800117 ldw r2,4(r16) - 29e4c: 10800054 ori r2,r2,1 - 29e50: 80800115 stw r2,4(r16) - 29e54: 9009883a mov r4,r18 - 29e58: 002fec80 call 2fec8 <__malloc_unlock> - 29e5c: 8805883a mov r2,r17 - 29e60: dfc00917 ldw ra,36(sp) - 29e64: df000817 ldw fp,32(sp) - 29e68: ddc00717 ldw r23,28(sp) - 29e6c: dd800617 ldw r22,24(sp) - 29e70: dd400517 ldw r21,20(sp) - 29e74: dd000417 ldw r20,16(sp) - 29e78: dcc00317 ldw r19,12(sp) - 29e7c: dc800217 ldw r18,8(sp) - 29e80: dc400117 ldw r17,4(sp) - 29e84: dc000017 ldw r16,0(sp) - 29e88: dec00a04 addi sp,sp,40 - 29e8c: f800283a ret - 29e90: 017fff04 movi r5,-4 - 29e94: 494a703a and r5,r9,r5 - 29e98: 814d883a add r6,r16,r5 - 29e9c: 30801e16 blt r6,r2,29f18 <_realloc_r+0x224> - 29ea0: 20800317 ldw r2,12(r4) - 29ea4: 21000217 ldw r4,8(r4) - 29ea8: a023883a mov r17,r20 - 29eac: 3021883a mov r16,r6 - 29eb0: 20800315 stw r2,12(r4) - 29eb4: 11000215 stw r4,8(r2) - 29eb8: 003fdc06 br 29e2c <_realloc_r+0x138> - 29ebc: 00800304 movi r2,12 - 29ec0: 90800015 stw r2,0(r18) - 29ec4: 0005883a mov r2,zero - 29ec8: 003fe506 br 29e60 <_realloc_r+0x16c> - 29ecc: 1d86b03a or r3,r3,r22 - 29ed0: a8c00115 stw r3,4(r21) - 29ed4: ad8b883a add r5,r21,r22 - 29ed8: 38c00054 ori r3,r7,1 - 29edc: 28c00115 stw r3,4(r5) - 29ee0: 29cf883a add r7,r5,r7 - 29ee4: 38c00117 ldw r3,4(r7) - 29ee8: 29400204 addi r5,r5,8 - 29eec: 9009883a mov r4,r18 - 29ef0: 18800054 ori r2,r3,1 - 29ef4: 38800115 stw r2,4(r7) - 29ef8: 0027c1c0 call 27c1c <_free_r> - 29efc: 003fd506 br 29e54 <_realloc_r+0x160> - 29f00: 21c00117 ldw r7,4(r4) - 29f04: 017fff04 movi r5,-4 - 29f08: b1800404 addi r6,r22,16 - 29f0c: 394a703a and r5,r7,r5 - 29f10: 814f883a add r7,r16,r5 - 29f14: 39805b0e bge r7,r6,2a084 <_realloc_r+0x390> - 29f18: 18c0004c andi r3,r3,1 - 29f1c: 183fa01e bne r3,zero,29da0 <_realloc_r+0xac> - 29f20: a4fffe17 ldw r19,-8(r20) - 29f24: 00ffff04 movi r3,-4 - 29f28: ace7c83a sub r19,r21,r19 - 29f2c: 99800117 ldw r6,4(r19) - 29f30: 30c6703a and r3,r6,r3 - 29f34: 20002026 beq r4,zero,29fb8 <_realloc_r+0x2c4> - 29f38: 80ef883a add r23,r16,r3 - 29f3c: b96f883a add r23,r23,r5 - 29f40: 22006126 beq r4,r8,2a0c8 <_realloc_r+0x3d4> - 29f44: b8801c16 blt r23,r2,29fb8 <_realloc_r+0x2c4> - 29f48: 20800317 ldw r2,12(r4) - 29f4c: 20c00217 ldw r3,8(r4) - 29f50: 81bfff04 addi r6,r16,-4 - 29f54: 01000904 movi r4,36 - 29f58: 18800315 stw r2,12(r3) - 29f5c: 10c00215 stw r3,8(r2) - 29f60: 98c00217 ldw r3,8(r19) - 29f64: 98800317 ldw r2,12(r19) - 29f68: 9c400204 addi r17,r19,8 - 29f6c: 18800315 stw r2,12(r3) - 29f70: 10c00215 stw r3,8(r2) - 29f74: 21801b36 bltu r4,r6,29fe4 <_realloc_r+0x2f0> - 29f78: 008004c4 movi r2,19 - 29f7c: 1180362e bgeu r2,r6,2a058 <_realloc_r+0x364> - 29f80: a0800017 ldw r2,0(r20) - 29f84: 98800215 stw r2,8(r19) - 29f88: a0800117 ldw r2,4(r20) - 29f8c: 98800315 stw r2,12(r19) - 29f90: 008006c4 movi r2,27 - 29f94: 11808136 bltu r2,r6,2a19c <_realloc_r+0x4a8> - 29f98: 98800404 addi r2,r19,16 - 29f9c: a5000204 addi r20,r20,8 - 29fa0: 00002e06 br 2a05c <_realloc_r+0x368> - 29fa4: a4fffe17 ldw r19,-8(r20) - 29fa8: 00ffff04 movi r3,-4 - 29fac: ace7c83a sub r19,r21,r19 - 29fb0: 99000117 ldw r4,4(r19) - 29fb4: 20c6703a and r3,r4,r3 - 29fb8: 983f7926 beq r19,zero,29da0 <_realloc_r+0xac> - 29fbc: 80ef883a add r23,r16,r3 - 29fc0: b8bf7716 blt r23,r2,29da0 <_realloc_r+0xac> - 29fc4: 98800317 ldw r2,12(r19) - 29fc8: 98c00217 ldw r3,8(r19) - 29fcc: 81bfff04 addi r6,r16,-4 - 29fd0: 01000904 movi r4,36 - 29fd4: 18800315 stw r2,12(r3) - 29fd8: 10c00215 stw r3,8(r2) - 29fdc: 9c400204 addi r17,r19,8 - 29fe0: 21bfe52e bgeu r4,r6,29f78 <_realloc_r+0x284> - 29fe4: a00b883a mov r5,r20 - 29fe8: 8809883a mov r4,r17 - 29fec: 0028a340 call 28a34 - 29ff0: 98c00117 ldw r3,4(r19) - 29ff4: b821883a mov r16,r23 - 29ff8: 982b883a mov r21,r19 - 29ffc: 003f8b06 br 29e2c <_realloc_r+0x138> - 2a000: 300b883a mov r5,r6 - 2a004: dfc00917 ldw ra,36(sp) - 2a008: df000817 ldw fp,32(sp) - 2a00c: ddc00717 ldw r23,28(sp) - 2a010: dd800617 ldw r22,24(sp) - 2a014: dd400517 ldw r21,20(sp) - 2a018: dd000417 ldw r20,16(sp) - 2a01c: dcc00317 ldw r19,12(sp) - 2a020: dc800217 ldw r18,8(sp) - 2a024: dc400117 ldw r17,4(sp) - 2a028: dc000017 ldw r16,0(sp) - 2a02c: dec00a04 addi sp,sp,40 - 2a030: 0022bfc1 jmpi 22bfc <_malloc_r> - 2a034: a0c00017 ldw r3,0(r20) - 2a038: 88c00015 stw r3,0(r17) - 2a03c: a0c00117 ldw r3,4(r20) - 2a040: 88c00115 stw r3,4(r17) - 2a044: 00c006c4 movi r3,27 - 2a048: 19804636 bltu r3,r6,2a164 <_realloc_r+0x470> - 2a04c: 88800204 addi r2,r17,8 - 2a050: a0c00204 addi r3,r20,8 - 2a054: 003f6406 br 29de8 <_realloc_r+0xf4> - 2a058: 8805883a mov r2,r17 - 2a05c: a0c00017 ldw r3,0(r20) - 2a060: b821883a mov r16,r23 - 2a064: 982b883a mov r21,r19 - 2a068: 10c00015 stw r3,0(r2) - 2a06c: a0c00117 ldw r3,4(r20) - 2a070: 10c00115 stw r3,4(r2) - 2a074: a0c00217 ldw r3,8(r20) - 2a078: 10c00215 stw r3,8(r2) - 2a07c: 98c00117 ldw r3,4(r19) - 2a080: 003f6a06 br 29e2c <_realloc_r+0x138> - 2a084: adab883a add r21,r21,r22 - 2a088: 3d85c83a sub r2,r7,r22 - 2a08c: e5400215 stw r21,8(fp) - 2a090: 10800054 ori r2,r2,1 - 2a094: a8800115 stw r2,4(r21) - 2a098: a0bfff17 ldw r2,-4(r20) - 2a09c: 9009883a mov r4,r18 - 2a0a0: 1080004c andi r2,r2,1 - 2a0a4: 1584b03a or r2,r2,r22 - 2a0a8: a0bfff15 stw r2,-4(r20) - 2a0ac: 002fec80 call 2fec8 <__malloc_unlock> - 2a0b0: a005883a mov r2,r20 - 2a0b4: 003f6a06 br 29e60 <_realloc_r+0x16c> - 2a0b8: a00b883a mov r5,r20 - 2a0bc: 8809883a mov r4,r17 - 2a0c0: 0028a340 call 28a34 - 2a0c4: 003f4e06 br 29e00 <_realloc_r+0x10c> - 2a0c8: b1000404 addi r4,r22,16 - 2a0cc: b93fba16 blt r23,r4,29fb8 <_realloc_r+0x2c4> - 2a0d0: 98800317 ldw r2,12(r19) - 2a0d4: 98c00217 ldw r3,8(r19) - 2a0d8: 81bfff04 addi r6,r16,-4 - 2a0dc: 01000904 movi r4,36 - 2a0e0: 18800315 stw r2,12(r3) - 2a0e4: 10c00215 stw r3,8(r2) - 2a0e8: 9c400204 addi r17,r19,8 - 2a0ec: 21804336 bltu r4,r6,2a1fc <_realloc_r+0x508> - 2a0f0: 008004c4 movi r2,19 - 2a0f4: 11803f2e bgeu r2,r6,2a1f4 <_realloc_r+0x500> - 2a0f8: a0800017 ldw r2,0(r20) - 2a0fc: 98800215 stw r2,8(r19) - 2a100: a0800117 ldw r2,4(r20) - 2a104: 98800315 stw r2,12(r19) - 2a108: 008006c4 movi r2,27 - 2a10c: 11803f36 bltu r2,r6,2a20c <_realloc_r+0x518> - 2a110: 98800404 addi r2,r19,16 - 2a114: a5000204 addi r20,r20,8 - 2a118: a0c00017 ldw r3,0(r20) - 2a11c: 10c00015 stw r3,0(r2) - 2a120: a0c00117 ldw r3,4(r20) - 2a124: 10c00115 stw r3,4(r2) - 2a128: a0c00217 ldw r3,8(r20) - 2a12c: 10c00215 stw r3,8(r2) - 2a130: 9d87883a add r3,r19,r22 - 2a134: bd85c83a sub r2,r23,r22 - 2a138: e0c00215 stw r3,8(fp) - 2a13c: 10800054 ori r2,r2,1 - 2a140: 18800115 stw r2,4(r3) - 2a144: 98800117 ldw r2,4(r19) - 2a148: 9009883a mov r4,r18 - 2a14c: 1080004c andi r2,r2,1 - 2a150: 1584b03a or r2,r2,r22 - 2a154: 98800115 stw r2,4(r19) - 2a158: 002fec80 call 2fec8 <__malloc_unlock> - 2a15c: 8805883a mov r2,r17 - 2a160: 003f3f06 br 29e60 <_realloc_r+0x16c> - 2a164: a0c00217 ldw r3,8(r20) - 2a168: 88c00215 stw r3,8(r17) - 2a16c: a0c00317 ldw r3,12(r20) - 2a170: 88c00315 stw r3,12(r17) - 2a174: 30801126 beq r6,r2,2a1bc <_realloc_r+0x4c8> - 2a178: 88800404 addi r2,r17,16 - 2a17c: a0c00404 addi r3,r20,16 - 2a180: 003f1906 br 29de8 <_realloc_r+0xf4> - 2a184: 893fff17 ldw r4,-4(r17) - 2a188: 00bfff04 movi r2,-4 - 2a18c: a023883a mov r17,r20 - 2a190: 2084703a and r2,r4,r2 - 2a194: 80a1883a add r16,r16,r2 - 2a198: 003f2406 br 29e2c <_realloc_r+0x138> - 2a19c: a0800217 ldw r2,8(r20) - 2a1a0: 98800415 stw r2,16(r19) - 2a1a4: a0800317 ldw r2,12(r20) - 2a1a8: 98800515 stw r2,20(r19) - 2a1ac: 31000a26 beq r6,r4,2a1d8 <_realloc_r+0x4e4> - 2a1b0: 98800604 addi r2,r19,24 - 2a1b4: a5000404 addi r20,r20,16 - 2a1b8: 003fa806 br 2a05c <_realloc_r+0x368> - 2a1bc: a1000417 ldw r4,16(r20) - 2a1c0: 88800604 addi r2,r17,24 - 2a1c4: a0c00604 addi r3,r20,24 - 2a1c8: 89000415 stw r4,16(r17) - 2a1cc: a1000517 ldw r4,20(r20) - 2a1d0: 89000515 stw r4,20(r17) - 2a1d4: 003f0406 br 29de8 <_realloc_r+0xf4> - 2a1d8: a0c00417 ldw r3,16(r20) - 2a1dc: a5000604 addi r20,r20,24 - 2a1e0: 98800804 addi r2,r19,32 - 2a1e4: 98c00615 stw r3,24(r19) - 2a1e8: a0ffff17 ldw r3,-4(r20) - 2a1ec: 98c00715 stw r3,28(r19) - 2a1f0: 003f9a06 br 2a05c <_realloc_r+0x368> - 2a1f4: 8805883a mov r2,r17 - 2a1f8: 003fc706 br 2a118 <_realloc_r+0x424> - 2a1fc: a00b883a mov r5,r20 - 2a200: 8809883a mov r4,r17 - 2a204: 0028a340 call 28a34 - 2a208: 003fc906 br 2a130 <_realloc_r+0x43c> - 2a20c: a0800217 ldw r2,8(r20) - 2a210: 98800415 stw r2,16(r19) - 2a214: a0800317 ldw r2,12(r20) - 2a218: 98800515 stw r2,20(r19) - 2a21c: 31000726 beq r6,r4,2a23c <_realloc_r+0x548> - 2a220: 98800604 addi r2,r19,24 - 2a224: a5000404 addi r20,r20,16 - 2a228: 003fbb06 br 2a118 <_realloc_r+0x424> - 2a22c: 9009883a mov r4,r18 - 2a230: 002fec80 call 2fec8 <__malloc_unlock> - 2a234: 0005883a mov r2,zero - 2a238: 003f0906 br 29e60 <_realloc_r+0x16c> - 2a23c: a0c00417 ldw r3,16(r20) - 2a240: a5000604 addi r20,r20,24 - 2a244: 98800804 addi r2,r19,32 - 2a248: 98c00615 stw r3,24(r19) - 2a24c: a0ffff17 ldw r3,-4(r20) - 2a250: 98c00715 stw r3,28(r19) - 2a254: 003fb006 br 2a118 <_realloc_r+0x424> +00029e3c <__sclose>: + 29e3c: 2940038f ldh r5,14(r5) + 29e40: 002b7201 jmpi 2b720 <_close_r> -0002a258 : - 2a258: 2080030b ldhu r2,12(r4) - 2a25c: 00c00244 movi r3,9 - 2a260: 1080024c andi r2,r2,9 - 2a264: 10c00226 beq r2,r3,2a270 - 2a268: 0005883a mov r2,zero - 2a26c: f800283a ret - 2a270: 00277281 jmpi 27728 +00029e44 : + 29e44: 2144b03a or r2,r4,r5 + 29e48: 108000cc andi r2,r2,3 + 29e4c: 1000171e bne r2,zero,29eac + 29e50: 20800017 ldw r2,0(r4) + 29e54: 28c00017 ldw r3,0(r5) + 29e58: 10c0141e bne r2,r3,29eac + 29e5c: 027fbff4 movhi r9,65279 + 29e60: 4a7fbfc4 addi r9,r9,-257 + 29e64: 0086303a nor r3,zero,r2 + 29e68: 02202074 movhi r8,32897 + 29e6c: 1245883a add r2,r2,r9 + 29e70: 42202004 addi r8,r8,-32640 + 29e74: 10c4703a and r2,r2,r3 + 29e78: 1204703a and r2,r2,r8 + 29e7c: 10000226 beq r2,zero,29e88 + 29e80: 00002306 br 29f10 + 29e84: 1000221e bne r2,zero,29f10 + 29e88: 21000104 addi r4,r4,4 + 29e8c: 20c00017 ldw r3,0(r4) + 29e90: 29400104 addi r5,r5,4 + 29e94: 29800017 ldw r6,0(r5) + 29e98: 1a4f883a add r7,r3,r9 + 29e9c: 00c4303a nor r2,zero,r3 + 29ea0: 3884703a and r2,r7,r2 + 29ea4: 1204703a and r2,r2,r8 + 29ea8: 19bff626 beq r3,r6,29e84 <_gp+0xfffed94c> + 29eac: 20800003 ldbu r2,0(r4) + 29eb0: 10c03fcc andi r3,r2,255 + 29eb4: 18c0201c xori r3,r3,128 + 29eb8: 18ffe004 addi r3,r3,-128 + 29ebc: 18000c26 beq r3,zero,29ef0 + 29ec0: 29800007 ldb r6,0(r5) + 29ec4: 19800326 beq r3,r6,29ed4 + 29ec8: 00001306 br 29f18 + 29ecc: 29800007 ldb r6,0(r5) + 29ed0: 11800b1e bne r2,r6,29f00 + 29ed4: 21000044 addi r4,r4,1 + 29ed8: 20c00003 ldbu r3,0(r4) + 29edc: 29400044 addi r5,r5,1 + 29ee0: 18803fcc andi r2,r3,255 + 29ee4: 1080201c xori r2,r2,128 + 29ee8: 10bfe004 addi r2,r2,-128 + 29eec: 103ff71e bne r2,zero,29ecc <_gp+0xfffed994> + 29ef0: 0007883a mov r3,zero + 29ef4: 28800003 ldbu r2,0(r5) + 29ef8: 1885c83a sub r2,r3,r2 + 29efc: f800283a ret + 29f00: 28800003 ldbu r2,0(r5) + 29f04: 18c03fcc andi r3,r3,255 + 29f08: 1885c83a sub r2,r3,r2 + 29f0c: f800283a ret + 29f10: 0005883a mov r2,zero + 29f14: f800283a ret + 29f18: 10c03fcc andi r3,r2,255 + 29f1c: 003ff506 br 29ef4 <_gp+0xfffed9bc> -0002a274 <__srefill_r>: - 2a274: defffc04 addi sp,sp,-16 - 2a278: dc400115 stw r17,4(sp) - 2a27c: dc000015 stw r16,0(sp) - 2a280: dfc00315 stw ra,12(sp) - 2a284: dc800215 stw r18,8(sp) - 2a288: 2023883a mov r17,r4 - 2a28c: 2821883a mov r16,r5 - 2a290: 20000226 beq r4,zero,2a29c <__srefill_r+0x28> - 2a294: 20800e17 ldw r2,56(r4) - 2a298: 10003c26 beq r2,zero,2a38c <__srefill_r+0x118> - 2a29c: 80c0030b ldhu r3,12(r16) - 2a2a0: 1908000c andi r4,r3,8192 - 2a2a4: 1805883a mov r2,r3 - 2a2a8: 2000071e bne r4,zero,2a2c8 <__srefill_r+0x54> - 2a2ac: 81001917 ldw r4,100(r16) - 2a2b0: 18880014 ori r2,r3,8192 - 2a2b4: 00f7ffc4 movi r3,-8193 - 2a2b8: 20c8703a and r4,r4,r3 - 2a2bc: 8080030d sth r2,12(r16) - 2a2c0: 1007883a mov r3,r2 - 2a2c4: 81001915 stw r4,100(r16) - 2a2c8: 80000115 stw zero,4(r16) - 2a2cc: 1100080c andi r4,r2,32 - 2a2d0: 2000571e bne r4,zero,2a430 <__srefill_r+0x1bc> - 2a2d4: 1100010c andi r4,r2,4 - 2a2d8: 20001f26 beq r4,zero,2a358 <__srefill_r+0xe4> - 2a2dc: 81400c17 ldw r5,48(r16) - 2a2e0: 28000826 beq r5,zero,2a304 <__srefill_r+0x90> - 2a2e4: 80801004 addi r2,r16,64 - 2a2e8: 28800226 beq r5,r2,2a2f4 <__srefill_r+0x80> - 2a2ec: 8809883a mov r4,r17 - 2a2f0: 0027c1c0 call 27c1c <_free_r> - 2a2f4: 80800f17 ldw r2,60(r16) - 2a2f8: 80000c15 stw zero,48(r16) - 2a2fc: 80800115 stw r2,4(r16) - 2a300: 1000391e bne r2,zero,2a3e8 <__srefill_r+0x174> - 2a304: 80800417 ldw r2,16(r16) - 2a308: 10004b26 beq r2,zero,2a438 <__srefill_r+0x1c4> - 2a30c: 8480030b ldhu r18,12(r16) - 2a310: 908000cc andi r2,r18,3 - 2a314: 10001f1e bne r2,zero,2a394 <__srefill_r+0x120> - 2a318: 81800417 ldw r6,16(r16) - 2a31c: 80800817 ldw r2,32(r16) - 2a320: 81c00517 ldw r7,20(r16) - 2a324: 81400717 ldw r5,28(r16) - 2a328: 81800015 stw r6,0(r16) - 2a32c: 8809883a mov r4,r17 - 2a330: 103ee83a callr r2 - 2a334: 80800115 stw r2,4(r16) - 2a338: 00800e0e bge zero,r2,2a374 <__srefill_r+0x100> - 2a33c: 0005883a mov r2,zero - 2a340: dfc00317 ldw ra,12(sp) - 2a344: dc800217 ldw r18,8(sp) - 2a348: dc400117 ldw r17,4(sp) - 2a34c: dc000017 ldw r16,0(sp) - 2a350: dec00404 addi sp,sp,16 - 2a354: f800283a ret - 2a358: 1100040c andi r4,r2,16 - 2a35c: 20003026 beq r4,zero,2a420 <__srefill_r+0x1ac> - 2a360: 1080020c andi r2,r2,8 - 2a364: 1000241e bne r2,zero,2a3f8 <__srefill_r+0x184> - 2a368: 18c00114 ori r3,r3,4 - 2a36c: 80c0030d sth r3,12(r16) - 2a370: 003fe406 br 2a304 <__srefill_r+0x90> - 2a374: 80c0030b ldhu r3,12(r16) - 2a378: 1000161e bne r2,zero,2a3d4 <__srefill_r+0x160> - 2a37c: 18c00814 ori r3,r3,32 - 2a380: 00bfffc4 movi r2,-1 - 2a384: 80c0030d sth r3,12(r16) - 2a388: 003fed06 br 2a340 <__srefill_r+0xcc> - 2a38c: 0027aa80 call 27aa8 <__sinit> - 2a390: 003fc206 br 2a29c <__srefill_r+0x28> - 2a394: 008000f4 movhi r2,3 - 2a398: 10939e04 addi r2,r2,20088 - 2a39c: 11000017 ldw r4,0(r2) - 2a3a0: 014000f4 movhi r5,3 - 2a3a4: 00800044 movi r2,1 - 2a3a8: 29689604 addi r5,r5,-23976 - 2a3ac: 8080030d sth r2,12(r16) - 2a3b0: 00283e80 call 283e8 <_fwalk> - 2a3b4: 00800244 movi r2,9 - 2a3b8: 8480030d sth r18,12(r16) - 2a3bc: 9480024c andi r18,r18,9 - 2a3c0: 90bfd51e bne r18,r2,2a318 <__srefill_r+0xa4> - 2a3c4: 800b883a mov r5,r16 - 2a3c8: 8809883a mov r4,r17 - 2a3cc: 00274b00 call 274b0 <__sflush_r> - 2a3d0: 003fd106 br 2a318 <__srefill_r+0xa4> - 2a3d4: 18c01014 ori r3,r3,64 - 2a3d8: 80000115 stw zero,4(r16) - 2a3dc: 00bfffc4 movi r2,-1 - 2a3e0: 80c0030d sth r3,12(r16) - 2a3e4: 003fd606 br 2a340 <__srefill_r+0xcc> - 2a3e8: 80c00e17 ldw r3,56(r16) - 2a3ec: 0005883a mov r2,zero - 2a3f0: 80c00015 stw r3,0(r16) - 2a3f4: 003fd206 br 2a340 <__srefill_r+0xcc> - 2a3f8: 800b883a mov r5,r16 - 2a3fc: 8809883a mov r4,r17 - 2a400: 00276cc0 call 276cc <_fflush_r> - 2a404: 10000a1e bne r2,zero,2a430 <__srefill_r+0x1bc> - 2a408: 8080030b ldhu r2,12(r16) - 2a40c: 00fffdc4 movi r3,-9 - 2a410: 80000215 stw zero,8(r16) - 2a414: 1886703a and r3,r3,r2 - 2a418: 80000615 stw zero,24(r16) - 2a41c: 003fd206 br 2a368 <__srefill_r+0xf4> - 2a420: 00800244 movi r2,9 - 2a424: 88800015 stw r2,0(r17) - 2a428: 18c01014 ori r3,r3,64 - 2a42c: 80c0030d sth r3,12(r16) - 2a430: 00bfffc4 movi r2,-1 - 2a434: 003fc206 br 2a340 <__srefill_r+0xcc> - 2a438: 800b883a mov r5,r16 - 2a43c: 8809883a mov r4,r17 - 2a440: 002864c0 call 2864c <__smakebuf_r> - 2a444: 003fb106 br 2a30c <__srefill_r+0x98> +00029f20 <__sprint_r.part.0>: + 29f20: 28801917 ldw r2,100(r5) + 29f24: defff604 addi sp,sp,-40 + 29f28: dd400515 stw r21,20(sp) + 29f2c: dfc00915 stw ra,36(sp) + 29f30: df000815 stw fp,32(sp) + 29f34: ddc00715 stw r23,28(sp) + 29f38: dd800615 stw r22,24(sp) + 29f3c: dd000415 stw r20,16(sp) + 29f40: dcc00315 stw r19,12(sp) + 29f44: dc800215 stw r18,8(sp) + 29f48: dc400115 stw r17,4(sp) + 29f4c: dc000015 stw r16,0(sp) + 29f50: 1088000c andi r2,r2,8192 + 29f54: 302b883a mov r21,r6 + 29f58: 10002e26 beq r2,zero,2a014 <__sprint_r.part.0+0xf4> + 29f5c: 30800217 ldw r2,8(r6) + 29f60: 35800017 ldw r22,0(r6) + 29f64: 10002926 beq r2,zero,2a00c <__sprint_r.part.0+0xec> + 29f68: 2827883a mov r19,r5 + 29f6c: 2029883a mov r20,r4 + 29f70: b5c00104 addi r23,r22,4 + 29f74: 04bfffc4 movi r18,-1 + 29f78: bc400017 ldw r17,0(r23) + 29f7c: b4000017 ldw r16,0(r22) + 29f80: 0039883a mov fp,zero + 29f84: 8822d0ba srli r17,r17,2 + 29f88: 8800031e bne r17,zero,29f98 <__sprint_r.part.0+0x78> + 29f8c: 00001806 br 29ff0 <__sprint_r.part.0+0xd0> + 29f90: 84000104 addi r16,r16,4 + 29f94: 8f001526 beq r17,fp,29fec <__sprint_r.part.0+0xcc> + 29f98: 81400017 ldw r5,0(r16) + 29f9c: 980d883a mov r6,r19 + 29fa0: a009883a mov r4,r20 + 29fa4: 002baa00 call 2baa0 <_fputwc_r> + 29fa8: e7000044 addi fp,fp,1 + 29fac: 14bff81e bne r2,r18,29f90 <_gp+0xfffeda58> + 29fb0: 9005883a mov r2,r18 + 29fb4: a8000215 stw zero,8(r21) + 29fb8: a8000115 stw zero,4(r21) + 29fbc: dfc00917 ldw ra,36(sp) + 29fc0: df000817 ldw fp,32(sp) + 29fc4: ddc00717 ldw r23,28(sp) + 29fc8: dd800617 ldw r22,24(sp) + 29fcc: dd400517 ldw r21,20(sp) + 29fd0: dd000417 ldw r20,16(sp) + 29fd4: dcc00317 ldw r19,12(sp) + 29fd8: dc800217 ldw r18,8(sp) + 29fdc: dc400117 ldw r17,4(sp) + 29fe0: dc000017 ldw r16,0(sp) + 29fe4: dec00a04 addi sp,sp,40 + 29fe8: f800283a ret + 29fec: a8800217 ldw r2,8(r21) + 29ff0: 8c63883a add r17,r17,r17 + 29ff4: 8c63883a add r17,r17,r17 + 29ff8: 1445c83a sub r2,r2,r17 + 29ffc: a8800215 stw r2,8(r21) + 2a000: b5800204 addi r22,r22,8 + 2a004: bdc00204 addi r23,r23,8 + 2a008: 103fdb1e bne r2,zero,29f78 <_gp+0xfffeda40> + 2a00c: 0005883a mov r2,zero + 2a010: 003fe806 br 29fb4 <_gp+0xfffeda7c> + 2a014: 00279680 call 27968 <__sfvwrite_r> + 2a018: 003fe606 br 29fb4 <_gp+0xfffeda7c> -0002a448 <__fpclassifyd>: - 2a448: 00a00034 movhi r2,32768 - 2a44c: 10bfffc4 addi r2,r2,-1 - 2a450: 2884703a and r2,r5,r2 - 2a454: 10000726 beq r2,zero,2a474 <__fpclassifyd+0x2c> - 2a458: 00fffc34 movhi r3,65520 - 2a45c: 019ff834 movhi r6,32736 - 2a460: 28c7883a add r3,r5,r3 - 2a464: 31bfffc4 addi r6,r6,-1 - 2a468: 30c00536 bltu r6,r3,2a480 <__fpclassifyd+0x38> - 2a46c: 00800104 movi r2,4 - 2a470: f800283a ret - 2a474: 2000021e bne r4,zero,2a480 <__fpclassifyd+0x38> - 2a478: 00800084 movi r2,2 - 2a47c: f800283a ret - 2a480: 00dffc34 movhi r3,32752 - 2a484: 019ff834 movhi r6,32736 - 2a488: 28cb883a add r5,r5,r3 - 2a48c: 31bfffc4 addi r6,r6,-1 - 2a490: 317ff62e bgeu r6,r5,2a46c <__fpclassifyd+0x24> - 2a494: 01400434 movhi r5,16 - 2a498: 297fffc4 addi r5,r5,-1 - 2a49c: 28800236 bltu r5,r2,2a4a8 <__fpclassifyd+0x60> - 2a4a0: 008000c4 movi r2,3 - 2a4a4: f800283a ret - 2a4a8: 10c00226 beq r2,r3,2a4b4 <__fpclassifyd+0x6c> - 2a4ac: 0005883a mov r2,zero - 2a4b0: f800283a ret - 2a4b4: 2005003a cmpeq r2,r4,zero - 2a4b8: f800283a ret +0002a01c <__sprint_r>: + 2a01c: 30c00217 ldw r3,8(r6) + 2a020: 18000126 beq r3,zero,2a028 <__sprint_r+0xc> + 2a024: 0029f201 jmpi 29f20 <__sprint_r.part.0> + 2a028: 30000115 stw zero,4(r6) + 2a02c: 0005883a mov r2,zero + 2a030: f800283a ret -0002a4bc <__sread>: - 2a4bc: defffe04 addi sp,sp,-8 - 2a4c0: dc000015 stw r16,0(sp) - 2a4c4: 2821883a mov r16,r5 - 2a4c8: 2940038f ldh r5,14(r5) - 2a4cc: dfc00115 stw ra,4(sp) - 2a4d0: 002c4080 call 2c408 <_read_r> - 2a4d4: 10000716 blt r2,zero,2a4f4 <__sread+0x38> - 2a4d8: 80c01417 ldw r3,80(r16) - 2a4dc: 1887883a add r3,r3,r2 - 2a4e0: 80c01415 stw r3,80(r16) - 2a4e4: dfc00117 ldw ra,4(sp) - 2a4e8: dc000017 ldw r16,0(sp) - 2a4ec: dec00204 addi sp,sp,8 - 2a4f0: f800283a ret - 2a4f4: 80c0030b ldhu r3,12(r16) - 2a4f8: 18fbffcc andi r3,r3,61439 - 2a4fc: 80c0030d sth r3,12(r16) - 2a500: dfc00117 ldw ra,4(sp) - 2a504: dc000017 ldw r16,0(sp) - 2a508: dec00204 addi sp,sp,8 - 2a50c: f800283a ret - -0002a510 <__seofread>: - 2a510: 0005883a mov r2,zero - 2a514: f800283a ret - -0002a518 <__swrite>: - 2a518: 2880030b ldhu r2,12(r5) - 2a51c: defffb04 addi sp,sp,-20 - 2a520: dcc00315 stw r19,12(sp) - 2a524: dc800215 stw r18,8(sp) - 2a528: dc400115 stw r17,4(sp) - 2a52c: dc000015 stw r16,0(sp) - 2a530: dfc00415 stw ra,16(sp) - 2a534: 10c0400c andi r3,r2,256 - 2a538: 2821883a mov r16,r5 - 2a53c: 2023883a mov r17,r4 - 2a540: 3025883a mov r18,r6 - 2a544: 3827883a mov r19,r7 - 2a548: 18000526 beq r3,zero,2a560 <__swrite+0x48> - 2a54c: 2940038f ldh r5,14(r5) - 2a550: 01c00084 movi r7,2 - 2a554: 000d883a mov r6,zero - 2a558: 002c3a80 call 2c3a8 <_lseek_r> - 2a55c: 8080030b ldhu r2,12(r16) - 2a560: 8140038f ldh r5,14(r16) - 2a564: 10bbffcc andi r2,r2,61439 - 2a568: 980f883a mov r7,r19 - 2a56c: 900d883a mov r6,r18 - 2a570: 8809883a mov r4,r17 - 2a574: 8080030d sth r2,12(r16) - 2a578: dfc00417 ldw ra,16(sp) - 2a57c: dcc00317 ldw r19,12(sp) - 2a580: dc800217 ldw r18,8(sp) - 2a584: dc400117 ldw r17,4(sp) - 2a588: dc000017 ldw r16,0(sp) - 2a58c: dec00504 addi sp,sp,20 - 2a590: 002be741 jmpi 2be74 <_write_r> - -0002a594 <__sseek>: - 2a594: defffe04 addi sp,sp,-8 - 2a598: dc000015 stw r16,0(sp) - 2a59c: 2821883a mov r16,r5 - 2a5a0: 2940038f ldh r5,14(r5) - 2a5a4: dfc00115 stw ra,4(sp) - 2a5a8: 002c3a80 call 2c3a8 <_lseek_r> - 2a5ac: 00ffffc4 movi r3,-1 - 2a5b0: 10c00826 beq r2,r3,2a5d4 <__sseek+0x40> - 2a5b4: 80c0030b ldhu r3,12(r16) - 2a5b8: 80801415 stw r2,80(r16) - 2a5bc: 18c40014 ori r3,r3,4096 - 2a5c0: 80c0030d sth r3,12(r16) - 2a5c4: dfc00117 ldw ra,4(sp) - 2a5c8: dc000017 ldw r16,0(sp) - 2a5cc: dec00204 addi sp,sp,8 - 2a5d0: f800283a ret - 2a5d4: 80c0030b ldhu r3,12(r16) - 2a5d8: 18fbffcc andi r3,r3,61439 - 2a5dc: 80c0030d sth r3,12(r16) - 2a5e0: dfc00117 ldw ra,4(sp) - 2a5e4: dc000017 ldw r16,0(sp) - 2a5e8: dec00204 addi sp,sp,8 - 2a5ec: f800283a ret - -0002a5f0 <__sclose>: - 2a5f0: 2940038f ldh r5,14(r5) - 2a5f4: 002bed41 jmpi 2bed4 <_close_r> - -0002a5f8 : - 2a5f8: 2144b03a or r2,r4,r5 - 2a5fc: 108000cc andi r2,r2,3 - 2a600: 1000171e bne r2,zero,2a660 - 2a604: 20800017 ldw r2,0(r4) - 2a608: 28c00017 ldw r3,0(r5) - 2a60c: 10c0141e bne r2,r3,2a660 - 2a610: 027fbff4 movhi r9,65279 - 2a614: 4a7fbfc4 addi r9,r9,-257 - 2a618: 0086303a nor r3,zero,r2 - 2a61c: 02202074 movhi r8,32897 - 2a620: 1245883a add r2,r2,r9 - 2a624: 42202004 addi r8,r8,-32640 - 2a628: 10c4703a and r2,r2,r3 - 2a62c: 1204703a and r2,r2,r8 - 2a630: 10000226 beq r2,zero,2a63c - 2a634: 00002306 br 2a6c4 - 2a638: 1000221e bne r2,zero,2a6c4 - 2a63c: 21000104 addi r4,r4,4 - 2a640: 20c00017 ldw r3,0(r4) - 2a644: 29400104 addi r5,r5,4 - 2a648: 29800017 ldw r6,0(r5) - 2a64c: 1a4f883a add r7,r3,r9 - 2a650: 00c4303a nor r2,zero,r3 - 2a654: 3884703a and r2,r7,r2 - 2a658: 1204703a and r2,r2,r8 - 2a65c: 19bff626 beq r3,r6,2a638 - 2a660: 20800003 ldbu r2,0(r4) - 2a664: 10c03fcc andi r3,r2,255 - 2a668: 18c0201c xori r3,r3,128 - 2a66c: 18ffe004 addi r3,r3,-128 - 2a670: 18000c26 beq r3,zero,2a6a4 - 2a674: 29800007 ldb r6,0(r5) - 2a678: 19800326 beq r3,r6,2a688 - 2a67c: 00001306 br 2a6cc - 2a680: 29800007 ldb r6,0(r5) - 2a684: 11800b1e bne r2,r6,2a6b4 - 2a688: 21000044 addi r4,r4,1 - 2a68c: 20c00003 ldbu r3,0(r4) - 2a690: 29400044 addi r5,r5,1 - 2a694: 18803fcc andi r2,r3,255 - 2a698: 1080201c xori r2,r2,128 - 2a69c: 10bfe004 addi r2,r2,-128 - 2a6a0: 103ff71e bne r2,zero,2a680 - 2a6a4: 0007883a mov r3,zero - 2a6a8: 28800003 ldbu r2,0(r5) - 2a6ac: 1885c83a sub r2,r3,r2 - 2a6b0: f800283a ret - 2a6b4: 28800003 ldbu r2,0(r5) - 2a6b8: 18c03fcc andi r3,r3,255 - 2a6bc: 1885c83a sub r2,r3,r2 - 2a6c0: f800283a ret - 2a6c4: 0005883a mov r2,zero - 2a6c8: f800283a ret - 2a6cc: 10c03fcc andi r3,r2,255 - 2a6d0: 003ff506 br 2a6a8 - -0002a6d4 <__sprint_r.part.0>: - 2a6d4: 28801917 ldw r2,100(r5) - 2a6d8: defff604 addi sp,sp,-40 - 2a6dc: dd400515 stw r21,20(sp) - 2a6e0: dfc00915 stw ra,36(sp) - 2a6e4: df000815 stw fp,32(sp) - 2a6e8: ddc00715 stw r23,28(sp) - 2a6ec: dd800615 stw r22,24(sp) - 2a6f0: dd000415 stw r20,16(sp) - 2a6f4: dcc00315 stw r19,12(sp) - 2a6f8: dc800215 stw r18,8(sp) - 2a6fc: dc400115 stw r17,4(sp) - 2a700: dc000015 stw r16,0(sp) - 2a704: 1088000c andi r2,r2,8192 - 2a708: 302b883a mov r21,r6 - 2a70c: 10002e26 beq r2,zero,2a7c8 <__sprint_r.part.0+0xf4> - 2a710: 30800217 ldw r2,8(r6) - 2a714: 35800017 ldw r22,0(r6) - 2a718: 10002926 beq r2,zero,2a7c0 <__sprint_r.part.0+0xec> - 2a71c: 2827883a mov r19,r5 - 2a720: 2029883a mov r20,r4 - 2a724: b5c00104 addi r23,r22,4 - 2a728: 04bfffc4 movi r18,-1 - 2a72c: bc400017 ldw r17,0(r23) - 2a730: b4000017 ldw r16,0(r22) - 2a734: 0039883a mov fp,zero - 2a738: 8822d0ba srli r17,r17,2 - 2a73c: 8800031e bne r17,zero,2a74c <__sprint_r.part.0+0x78> - 2a740: 00001806 br 2a7a4 <__sprint_r.part.0+0xd0> - 2a744: 84000104 addi r16,r16,4 - 2a748: 8f001526 beq r17,fp,2a7a0 <__sprint_r.part.0+0xcc> - 2a74c: 81400017 ldw r5,0(r16) - 2a750: 980d883a mov r6,r19 - 2a754: a009883a mov r4,r20 - 2a758: 002c2540 call 2c254 <_fputwc_r> - 2a75c: e7000044 addi fp,fp,1 - 2a760: 14bff81e bne r2,r18,2a744 <__sprint_r.part.0+0x70> - 2a764: 9005883a mov r2,r18 - 2a768: a8000215 stw zero,8(r21) - 2a76c: a8000115 stw zero,4(r21) - 2a770: dfc00917 ldw ra,36(sp) - 2a774: df000817 ldw fp,32(sp) - 2a778: ddc00717 ldw r23,28(sp) - 2a77c: dd800617 ldw r22,24(sp) - 2a780: dd400517 ldw r21,20(sp) - 2a784: dd000417 ldw r20,16(sp) - 2a788: dcc00317 ldw r19,12(sp) - 2a78c: dc800217 ldw r18,8(sp) - 2a790: dc400117 ldw r17,4(sp) - 2a794: dc000017 ldw r16,0(sp) - 2a798: dec00a04 addi sp,sp,40 - 2a79c: f800283a ret - 2a7a0: a8800217 ldw r2,8(r21) - 2a7a4: 8c63883a add r17,r17,r17 - 2a7a8: 8c63883a add r17,r17,r17 - 2a7ac: 1445c83a sub r2,r2,r17 - 2a7b0: a8800215 stw r2,8(r21) - 2a7b4: b5800204 addi r22,r22,8 - 2a7b8: bdc00204 addi r23,r23,8 - 2a7bc: 103fdb1e bne r2,zero,2a72c <__sprint_r.part.0+0x58> - 2a7c0: 0005883a mov r2,zero - 2a7c4: 003fe806 br 2a768 <__sprint_r.part.0+0x94> - 2a7c8: 0027f2c0 call 27f2c <__sfvwrite_r> - 2a7cc: 003fe606 br 2a768 <__sprint_r.part.0+0x94> - -0002a7d0 <__sprint_r>: - 2a7d0: 30c00217 ldw r3,8(r6) - 2a7d4: 18000126 beq r3,zero,2a7dc <__sprint_r+0xc> - 2a7d8: 002a6d41 jmpi 2a6d4 <__sprint_r.part.0> - 2a7dc: 30000115 stw zero,4(r6) - 2a7e0: 0005883a mov r2,zero - 2a7e4: f800283a ret - -0002a7e8 <___vfiprintf_internal_r>: - 2a7e8: deffc904 addi sp,sp,-220 - 2a7ec: df003515 stw fp,212(sp) - 2a7f0: dd003115 stw r20,196(sp) - 2a7f4: dfc03615 stw ra,216(sp) - 2a7f8: ddc03415 stw r23,208(sp) - 2a7fc: dd803315 stw r22,204(sp) - 2a800: dd403215 stw r21,200(sp) - 2a804: dcc03015 stw r19,192(sp) - 2a808: dc802f15 stw r18,188(sp) - 2a80c: dc402e15 stw r17,184(sp) - 2a810: dc002d15 stw r16,180(sp) - 2a814: d9002015 stw r4,128(sp) - 2a818: d9c02215 stw r7,136(sp) - 2a81c: 2829883a mov r20,r5 - 2a820: 3039883a mov fp,r6 - 2a824: 20000226 beq r4,zero,2a830 <___vfiprintf_internal_r+0x48> - 2a828: 20800e17 ldw r2,56(r4) - 2a82c: 1000cf26 beq r2,zero,2ab6c <___vfiprintf_internal_r+0x384> - 2a830: a080030b ldhu r2,12(r20) - 2a834: 10c8000c andi r3,r2,8192 - 2a838: 1800061e bne r3,zero,2a854 <___vfiprintf_internal_r+0x6c> - 2a83c: a1001917 ldw r4,100(r20) - 2a840: 00f7ffc4 movi r3,-8193 - 2a844: 10880014 ori r2,r2,8192 - 2a848: 20c6703a and r3,r4,r3 - 2a84c: a080030d sth r2,12(r20) - 2a850: a0c01915 stw r3,100(r20) - 2a854: 10c0020c andi r3,r2,8 - 2a858: 1800a926 beq r3,zero,2ab00 <___vfiprintf_internal_r+0x318> - 2a85c: a0c00417 ldw r3,16(r20) - 2a860: 1800a726 beq r3,zero,2ab00 <___vfiprintf_internal_r+0x318> - 2a864: 1080068c andi r2,r2,26 - 2a868: 00c00284 movi r3,10 - 2a86c: 10c0ac26 beq r2,r3,2ab20 <___vfiprintf_internal_r+0x338> - 2a870: da801a04 addi r10,sp,104 - 2a874: da801e15 stw r10,120(sp) - 2a878: d8801e17 ldw r2,120(sp) - 2a87c: da8019c4 addi r10,sp,103 - 2a880: 058000f4 movhi r22,3 - 2a884: 05c000f4 movhi r23,3 - 2a888: da801f15 stw r10,124(sp) - 2a88c: 1295c83a sub r10,r2,r10 - 2a890: b58ab704 addi r22,r22,10972 - 2a894: bdcab304 addi r23,r23,10956 - 2a898: dec01a15 stw sp,104(sp) - 2a89c: d8001c15 stw zero,112(sp) - 2a8a0: d8001b15 stw zero,108(sp) - 2a8a4: d8002615 stw zero,152(sp) - 2a8a8: d8002315 stw zero,140(sp) - 2a8ac: da802715 stw r10,156(sp) - 2a8b0: d811883a mov r8,sp - 2a8b4: dd002115 stw r20,132(sp) - 2a8b8: e021883a mov r16,fp - 2a8bc: 80800007 ldb r2,0(r16) - 2a8c0: 1003ea26 beq r2,zero,2b86c <___vfiprintf_internal_r+0x1084> - 2a8c4: 00c00944 movi r3,37 - 2a8c8: 8025883a mov r18,r16 - 2a8cc: 10c0021e bne r2,r3,2a8d8 <___vfiprintf_internal_r+0xf0> - 2a8d0: 00001606 br 2a92c <___vfiprintf_internal_r+0x144> - 2a8d4: 10c00326 beq r2,r3,2a8e4 <___vfiprintf_internal_r+0xfc> - 2a8d8: 94800044 addi r18,r18,1 - 2a8dc: 90800007 ldb r2,0(r18) - 2a8e0: 103ffc1e bne r2,zero,2a8d4 <___vfiprintf_internal_r+0xec> - 2a8e4: 9423c83a sub r17,r18,r16 - 2a8e8: 88001026 beq r17,zero,2a92c <___vfiprintf_internal_r+0x144> - 2a8ec: d8c01c17 ldw r3,112(sp) - 2a8f0: d8801b17 ldw r2,108(sp) - 2a8f4: 44000015 stw r16,0(r8) - 2a8f8: 88c7883a add r3,r17,r3 - 2a8fc: 10800044 addi r2,r2,1 - 2a900: 44400115 stw r17,4(r8) - 2a904: d8c01c15 stw r3,112(sp) - 2a908: d8801b15 stw r2,108(sp) - 2a90c: 010001c4 movi r4,7 - 2a910: 2080760e bge r4,r2,2aaec <___vfiprintf_internal_r+0x304> - 2a914: 1803821e bne r3,zero,2b720 <___vfiprintf_internal_r+0xf38> - 2a918: da802317 ldw r10,140(sp) - 2a91c: d8001b15 stw zero,108(sp) - 2a920: d811883a mov r8,sp - 2a924: 5455883a add r10,r10,r17 - 2a928: da802315 stw r10,140(sp) - 2a92c: 90800007 ldb r2,0(r18) - 2a930: 10044626 beq r2,zero,2ba4c <___vfiprintf_internal_r+0x1264> - 2a934: 90c00047 ldb r3,1(r18) - 2a938: 94000044 addi r16,r18,1 - 2a93c: d8001d85 stb zero,118(sp) - 2a940: 0009883a mov r4,zero - 2a944: 000f883a mov r7,zero - 2a948: 027fffc4 movi r9,-1 - 2a94c: 0023883a mov r17,zero - 2a950: 0029883a mov r20,zero - 2a954: 01401604 movi r5,88 - 2a958: 01800244 movi r6,9 - 2a95c: 03400a84 movi r13,42 - 2a960: 03001b04 movi r12,108 - 2a964: 84000044 addi r16,r16,1 - 2a968: 18bff804 addi r2,r3,-32 - 2a96c: 28827336 bltu r5,r2,2b33c <___vfiprintf_internal_r+0xb54> - 2a970: 100490ba slli r2,r2,2 - 2a974: 028000f4 movhi r10,3 - 2a978: 52aa6204 addi r10,r10,-22136 - 2a97c: 1285883a add r2,r2,r10 - 2a980: 10800017 ldw r2,0(r2) - 2a984: 1000683a jmp r2 - 2a988: 0002b070 cmpltui zero,zero,2753 - 2a98c: 0002b33c xorhi zero,zero,2764 - 2a990: 0002b33c xorhi zero,zero,2764 - 2a994: 0002b090 cmplti zero,zero,2754 - 2a998: 0002b33c xorhi zero,zero,2764 - 2a99c: 0002b33c xorhi zero,zero,2764 - 2a9a0: 0002b33c xorhi zero,zero,2764 - 2a9a4: 0002b33c xorhi zero,zero,2764 - 2a9a8: 0002b33c xorhi zero,zero,2764 - 2a9ac: 0002b33c xorhi zero,zero,2764 - 2a9b0: 0002b278 rdprs zero,zero,2761 - 2a9b4: 0002b294 movui zero,2762 - 2a9b8: 0002b33c xorhi zero,zero,2764 - 2a9bc: 0002ab7c xorhi zero,zero,2733 - 2a9c0: 0002b2a4 muli zero,zero,2762 - 2a9c4: 0002b33c xorhi zero,zero,2764 - 2a9c8: 0002b09c xori zero,zero,2754 - 2a9cc: 0002b0a8 cmpgeui zero,zero,2754 - 2a9d0: 0002b0a8 cmpgeui zero,zero,2754 - 2a9d4: 0002b0a8 cmpgeui zero,zero,2754 - 2a9d8: 0002b0a8 cmpgeui zero,zero,2754 - 2a9dc: 0002b0a8 cmpgeui zero,zero,2754 - 2a9e0: 0002b0a8 cmpgeui zero,zero,2754 - 2a9e4: 0002b0a8 cmpgeui zero,zero,2754 - 2a9e8: 0002b0a8 cmpgeui zero,zero,2754 - 2a9ec: 0002b0a8 cmpgeui zero,zero,2754 - 2a9f0: 0002b33c xorhi zero,zero,2764 - 2a9f4: 0002b33c xorhi zero,zero,2764 - 2a9f8: 0002b33c xorhi zero,zero,2764 - 2a9fc: 0002b33c xorhi zero,zero,2764 - 2aa00: 0002b33c xorhi zero,zero,2764 - 2aa04: 0002b33c xorhi zero,zero,2764 - 2aa08: 0002b33c xorhi zero,zero,2764 - 2aa0c: 0002b33c xorhi zero,zero,2764 - 2aa10: 0002b33c xorhi zero,zero,2764 - 2aa14: 0002b33c xorhi zero,zero,2764 - 2aa18: 0002b0d4 movui zero,2755 - 2aa1c: 0002b33c xorhi zero,zero,2764 - 2aa20: 0002b33c xorhi zero,zero,2764 - 2aa24: 0002b33c xorhi zero,zero,2764 - 2aa28: 0002b33c xorhi zero,zero,2764 - 2aa2c: 0002b33c xorhi zero,zero,2764 - 2aa30: 0002b33c xorhi zero,zero,2764 - 2aa34: 0002b33c xorhi zero,zero,2764 - 2aa38: 0002b33c xorhi zero,zero,2764 - 2aa3c: 0002b33c xorhi zero,zero,2764 - 2aa40: 0002b33c xorhi zero,zero,2764 - 2aa44: 0002b10c andi zero,zero,2756 - 2aa48: 0002b33c xorhi zero,zero,2764 - 2aa4c: 0002b33c xorhi zero,zero,2764 - 2aa50: 0002b33c xorhi zero,zero,2764 - 2aa54: 0002b33c xorhi zero,zero,2764 - 2aa58: 0002b33c xorhi zero,zero,2764 - 2aa5c: 0002b164 muli zero,zero,2757 - 2aa60: 0002b33c xorhi zero,zero,2764 - 2aa64: 0002b33c xorhi zero,zero,2764 - 2aa68: 0002b1d4 movui zero,2759 - 2aa6c: 0002b33c xorhi zero,zero,2764 - 2aa70: 0002b33c xorhi zero,zero,2764 - 2aa74: 0002b33c xorhi zero,zero,2764 - 2aa78: 0002b33c xorhi zero,zero,2764 - 2aa7c: 0002b33c xorhi zero,zero,2764 - 2aa80: 0002b33c xorhi zero,zero,2764 - 2aa84: 0002b33c xorhi zero,zero,2764 - 2aa88: 0002b33c xorhi zero,zero,2764 - 2aa8c: 0002b33c xorhi zero,zero,2764 - 2aa90: 0002b33c xorhi zero,zero,2764 - 2aa94: 0002af80 call 2af8 <__alt_mem_onchip_memory2_0-0x1d508> - 2aa98: 0002afac andhi zero,zero,2750 - 2aa9c: 0002b33c xorhi zero,zero,2764 - 2aaa0: 0002b33c xorhi zero,zero,2764 - 2aaa4: 0002b33c xorhi zero,zero,2764 - 2aaa8: 0002b2e4 muli zero,zero,2763 - 2aaac: 0002afac andhi zero,zero,2750 - 2aab0: 0002b33c xorhi zero,zero,2764 - 2aab4: 0002b33c xorhi zero,zero,2764 - 2aab8: 0002ae40 call 2ae4 <__alt_mem_onchip_memory2_0-0x1d51c> - 2aabc: 0002b33c xorhi zero,zero,2764 - 2aac0: 0002ae50 cmplti zero,zero,2745 - 2aac4: 0002ae8c andi zero,zero,2746 - 2aac8: 0002ab88 cmpgei zero,zero,2734 - 2aacc: 0002ae34 movhi zero,2744 - 2aad0: 0002b33c xorhi zero,zero,2764 - 2aad4: 0002b210 cmplti zero,zero,2760 - 2aad8: 0002b33c xorhi zero,zero,2764 - 2aadc: 0002b268 cmpgeui zero,zero,2761 - 2aae0: 0002b33c xorhi zero,zero,2764 - 2aae4: 0002b33c xorhi zero,zero,2764 - 2aae8: 0002af2c andhi zero,zero,2748 - 2aaec: 42000204 addi r8,r8,8 - 2aaf0: da802317 ldw r10,140(sp) - 2aaf4: 5455883a add r10,r10,r17 - 2aaf8: da802315 stw r10,140(sp) - 2aafc: 003f8b06 br 2a92c <___vfiprintf_internal_r+0x144> - 2ab00: d9002017 ldw r4,128(sp) - 2ab04: a00b883a mov r5,r20 - 2ab08: 0025ad40 call 25ad4 <__swsetup_r> - 2ab0c: 1003b11e bne r2,zero,2b9d4 <___vfiprintf_internal_r+0x11ec> - 2ab10: a080030b ldhu r2,12(r20) - 2ab14: 00c00284 movi r3,10 - 2ab18: 1080068c andi r2,r2,26 - 2ab1c: 10ff541e bne r2,r3,2a870 <___vfiprintf_internal_r+0x88> - 2ab20: a080038f ldh r2,14(r20) - 2ab24: 103f5216 blt r2,zero,2a870 <___vfiprintf_internal_r+0x88> - 2ab28: d9c02217 ldw r7,136(sp) - 2ab2c: d9002017 ldw r4,128(sp) - 2ab30: e00d883a mov r6,fp - 2ab34: a00b883a mov r5,r20 - 2ab38: 002bc600 call 2bc60 <__sbprintf> - 2ab3c: dfc03617 ldw ra,216(sp) - 2ab40: df003517 ldw fp,212(sp) - 2ab44: ddc03417 ldw r23,208(sp) - 2ab48: dd803317 ldw r22,204(sp) - 2ab4c: dd403217 ldw r21,200(sp) - 2ab50: dd003117 ldw r20,196(sp) - 2ab54: dcc03017 ldw r19,192(sp) - 2ab58: dc802f17 ldw r18,188(sp) - 2ab5c: dc402e17 ldw r17,184(sp) - 2ab60: dc002d17 ldw r16,180(sp) - 2ab64: dec03704 addi sp,sp,220 - 2ab68: f800283a ret - 2ab6c: 0027aa80 call 27aa8 <__sinit> - 2ab70: 003f2f06 br 2a830 <___vfiprintf_internal_r+0x48> - 2ab74: 0463c83a sub r17,zero,r17 - 2ab78: d8802215 stw r2,136(sp) - 2ab7c: a5000114 ori r20,r20,4 - 2ab80: 80c00007 ldb r3,0(r16) - 2ab84: 003f7706 br 2a964 <___vfiprintf_internal_r+0x17c> - 2ab88: 00800c04 movi r2,48 - 2ab8c: da802217 ldw r10,136(sp) - 2ab90: d8801d05 stb r2,116(sp) - 2ab94: 00801e04 movi r2,120 - 2ab98: d8801d45 stb r2,117(sp) +0002a034 <___vfiprintf_internal_r>: + 2a034: deffc904 addi sp,sp,-220 + 2a038: df003515 stw fp,212(sp) + 2a03c: dd003115 stw r20,196(sp) + 2a040: dfc03615 stw ra,216(sp) + 2a044: ddc03415 stw r23,208(sp) + 2a048: dd803315 stw r22,204(sp) + 2a04c: dd403215 stw r21,200(sp) + 2a050: dcc03015 stw r19,192(sp) + 2a054: dc802f15 stw r18,188(sp) + 2a058: dc402e15 stw r17,184(sp) + 2a05c: dc002d15 stw r16,180(sp) + 2a060: d9002015 stw r4,128(sp) + 2a064: d9c02215 stw r7,136(sp) + 2a068: 2829883a mov r20,r5 + 2a06c: 3039883a mov fp,r6 + 2a070: 20000226 beq r4,zero,2a07c <___vfiprintf_internal_r+0x48> + 2a074: 20800e17 ldw r2,56(r4) + 2a078: 1000cf26 beq r2,zero,2a3b8 <___vfiprintf_internal_r+0x384> + 2a07c: a080030b ldhu r2,12(r20) + 2a080: 10c8000c andi r3,r2,8192 + 2a084: 1800061e bne r3,zero,2a0a0 <___vfiprintf_internal_r+0x6c> + 2a088: a1001917 ldw r4,100(r20) + 2a08c: 00f7ffc4 movi r3,-8193 + 2a090: 10880014 ori r2,r2,8192 + 2a094: 20c6703a and r3,r4,r3 + 2a098: a080030d sth r2,12(r20) + 2a09c: a0c01915 stw r3,100(r20) + 2a0a0: 10c0020c andi r3,r2,8 + 2a0a4: 1800a926 beq r3,zero,2a34c <___vfiprintf_internal_r+0x318> + 2a0a8: a0c00417 ldw r3,16(r20) + 2a0ac: 1800a726 beq r3,zero,2a34c <___vfiprintf_internal_r+0x318> + 2a0b0: 1080068c andi r2,r2,26 + 2a0b4: 00c00284 movi r3,10 + 2a0b8: 10c0ac26 beq r2,r3,2a36c <___vfiprintf_internal_r+0x338> + 2a0bc: da801a04 addi r10,sp,104 + 2a0c0: da801e15 stw r10,120(sp) + 2a0c4: d8801e17 ldw r2,120(sp) + 2a0c8: da8019c4 addi r10,sp,103 + 2a0cc: 058000f4 movhi r22,3 + 2a0d0: 05c000f4 movhi r23,3 + 2a0d4: da801f15 stw r10,124(sp) + 2a0d8: 1295c83a sub r10,r2,r10 + 2a0dc: b5886a04 addi r22,r22,8616 + 2a0e0: bdc86604 addi r23,r23,8600 + 2a0e4: dec01a15 stw sp,104(sp) + 2a0e8: d8001c15 stw zero,112(sp) + 2a0ec: d8001b15 stw zero,108(sp) + 2a0f0: d8002615 stw zero,152(sp) + 2a0f4: d8002315 stw zero,140(sp) + 2a0f8: da802715 stw r10,156(sp) + 2a0fc: d811883a mov r8,sp + 2a100: dd002115 stw r20,132(sp) + 2a104: e021883a mov r16,fp + 2a108: 80800007 ldb r2,0(r16) + 2a10c: 1003ea26 beq r2,zero,2b0b8 <___vfiprintf_internal_r+0x1084> + 2a110: 00c00944 movi r3,37 + 2a114: 8025883a mov r18,r16 + 2a118: 10c0021e bne r2,r3,2a124 <___vfiprintf_internal_r+0xf0> + 2a11c: 00001606 br 2a178 <___vfiprintf_internal_r+0x144> + 2a120: 10c00326 beq r2,r3,2a130 <___vfiprintf_internal_r+0xfc> + 2a124: 94800044 addi r18,r18,1 + 2a128: 90800007 ldb r2,0(r18) + 2a12c: 103ffc1e bne r2,zero,2a120 <_gp+0xfffedbe8> + 2a130: 9423c83a sub r17,r18,r16 + 2a134: 88001026 beq r17,zero,2a178 <___vfiprintf_internal_r+0x144> + 2a138: d8c01c17 ldw r3,112(sp) + 2a13c: d8801b17 ldw r2,108(sp) + 2a140: 44000015 stw r16,0(r8) + 2a144: 88c7883a add r3,r17,r3 + 2a148: 10800044 addi r2,r2,1 + 2a14c: 44400115 stw r17,4(r8) + 2a150: d8c01c15 stw r3,112(sp) + 2a154: d8801b15 stw r2,108(sp) + 2a158: 010001c4 movi r4,7 + 2a15c: 2080760e bge r4,r2,2a338 <___vfiprintf_internal_r+0x304> + 2a160: 1803821e bne r3,zero,2af6c <___vfiprintf_internal_r+0xf38> + 2a164: da802317 ldw r10,140(sp) + 2a168: d8001b15 stw zero,108(sp) + 2a16c: d811883a mov r8,sp + 2a170: 5455883a add r10,r10,r17 + 2a174: da802315 stw r10,140(sp) + 2a178: 90800007 ldb r2,0(r18) + 2a17c: 10044626 beq r2,zero,2b298 <___vfiprintf_internal_r+0x1264> + 2a180: 90c00047 ldb r3,1(r18) + 2a184: 94000044 addi r16,r18,1 + 2a188: d8001d85 stb zero,118(sp) + 2a18c: 0009883a mov r4,zero + 2a190: 000f883a mov r7,zero + 2a194: 027fffc4 movi r9,-1 + 2a198: 0023883a mov r17,zero + 2a19c: 0029883a mov r20,zero + 2a1a0: 01401604 movi r5,88 + 2a1a4: 01800244 movi r6,9 + 2a1a8: 03400a84 movi r13,42 + 2a1ac: 03001b04 movi r12,108 + 2a1b0: 84000044 addi r16,r16,1 + 2a1b4: 18bff804 addi r2,r3,-32 + 2a1b8: 28827336 bltu r5,r2,2ab88 <___vfiprintf_internal_r+0xb54> + 2a1bc: 100490ba slli r2,r2,2 + 2a1c0: 028000f4 movhi r10,3 + 2a1c4: 52a87504 addi r10,r10,-24108 + 2a1c8: 1285883a add r2,r2,r10 + 2a1cc: 10800017 ldw r2,0(r2) + 2a1d0: 1000683a jmp r2 + 2a1d4: 0002a8bc xorhi zero,zero,2722 + 2a1d8: 0002ab88 cmpgei zero,zero,2734 + 2a1dc: 0002ab88 cmpgei zero,zero,2734 + 2a1e0: 0002a8dc xori zero,zero,2723 + 2a1e4: 0002ab88 cmpgei zero,zero,2734 + 2a1e8: 0002ab88 cmpgei zero,zero,2734 + 2a1ec: 0002ab88 cmpgei zero,zero,2734 + 2a1f0: 0002ab88 cmpgei zero,zero,2734 + 2a1f4: 0002ab88 cmpgei zero,zero,2734 + 2a1f8: 0002ab88 cmpgei zero,zero,2734 + 2a1fc: 0002aac4 movi zero,2731 + 2a200: 0002aae0 cmpeqi zero,zero,2731 + 2a204: 0002ab88 cmpgei zero,zero,2734 + 2a208: 0002a3c8 cmpgei zero,zero,2703 + 2a20c: 0002aaf0 cmpltui zero,zero,2731 + 2a210: 0002ab88 cmpgei zero,zero,2734 + 2a214: 0002a8e8 cmpgeui zero,zero,2723 + 2a218: 0002a8f4 movhi zero,2723 + 2a21c: 0002a8f4 movhi zero,2723 + 2a220: 0002a8f4 movhi zero,2723 + 2a224: 0002a8f4 movhi zero,2723 + 2a228: 0002a8f4 movhi zero,2723 + 2a22c: 0002a8f4 movhi zero,2723 + 2a230: 0002a8f4 movhi zero,2723 + 2a234: 0002a8f4 movhi zero,2723 + 2a238: 0002a8f4 movhi zero,2723 + 2a23c: 0002ab88 cmpgei zero,zero,2734 + 2a240: 0002ab88 cmpgei zero,zero,2734 + 2a244: 0002ab88 cmpgei zero,zero,2734 + 2a248: 0002ab88 cmpgei zero,zero,2734 + 2a24c: 0002ab88 cmpgei zero,zero,2734 + 2a250: 0002ab88 cmpgei zero,zero,2734 + 2a254: 0002ab88 cmpgei zero,zero,2734 + 2a258: 0002ab88 cmpgei zero,zero,2734 + 2a25c: 0002ab88 cmpgei zero,zero,2734 + 2a260: 0002ab88 cmpgei zero,zero,2734 + 2a264: 0002a920 cmpeqi zero,zero,2724 + 2a268: 0002ab88 cmpgei zero,zero,2734 + 2a26c: 0002ab88 cmpgei zero,zero,2734 + 2a270: 0002ab88 cmpgei zero,zero,2734 + 2a274: 0002ab88 cmpgei zero,zero,2734 + 2a278: 0002ab88 cmpgei zero,zero,2734 + 2a27c: 0002ab88 cmpgei zero,zero,2734 + 2a280: 0002ab88 cmpgei zero,zero,2734 + 2a284: 0002ab88 cmpgei zero,zero,2734 + 2a288: 0002ab88 cmpgei zero,zero,2734 + 2a28c: 0002ab88 cmpgei zero,zero,2734 + 2a290: 0002a958 cmpnei zero,zero,2725 + 2a294: 0002ab88 cmpgei zero,zero,2734 + 2a298: 0002ab88 cmpgei zero,zero,2734 + 2a29c: 0002ab88 cmpgei zero,zero,2734 + 2a2a0: 0002ab88 cmpgei zero,zero,2734 + 2a2a4: 0002ab88 cmpgei zero,zero,2734 + 2a2a8: 0002a9b0 cmpltui zero,zero,2726 + 2a2ac: 0002ab88 cmpgei zero,zero,2734 + 2a2b0: 0002ab88 cmpgei zero,zero,2734 + 2a2b4: 0002aa20 cmpeqi zero,zero,2728 + 2a2b8: 0002ab88 cmpgei zero,zero,2734 + 2a2bc: 0002ab88 cmpgei zero,zero,2734 + 2a2c0: 0002ab88 cmpgei zero,zero,2734 + 2a2c4: 0002ab88 cmpgei zero,zero,2734 + 2a2c8: 0002ab88 cmpgei zero,zero,2734 + 2a2cc: 0002ab88 cmpgei zero,zero,2734 + 2a2d0: 0002ab88 cmpgei zero,zero,2734 + 2a2d4: 0002ab88 cmpgei zero,zero,2734 + 2a2d8: 0002ab88 cmpgei zero,zero,2734 + 2a2dc: 0002ab88 cmpgei zero,zero,2734 + 2a2e0: 0002a7cc andi zero,zero,2719 + 2a2e4: 0002a7f8 rdprs zero,zero,2719 + 2a2e8: 0002ab88 cmpgei zero,zero,2734 + 2a2ec: 0002ab88 cmpgei zero,zero,2734 + 2a2f0: 0002ab88 cmpgei zero,zero,2734 + 2a2f4: 0002ab30 cmpltui zero,zero,2732 + 2a2f8: 0002a7f8 rdprs zero,zero,2719 + 2a2fc: 0002ab88 cmpgei zero,zero,2734 + 2a300: 0002ab88 cmpgei zero,zero,2734 + 2a304: 0002a68c andi zero,zero,2714 + 2a308: 0002ab88 cmpgei zero,zero,2734 + 2a30c: 0002a69c xori zero,zero,2714 + 2a310: 0002a6d8 cmpnei zero,zero,2715 + 2a314: 0002a3d4 movui zero,2703 + 2a318: 0002a680 call 2a68 <__alt_mem_onchip_memory2_0-0x1d598> + 2a31c: 0002ab88 cmpgei zero,zero,2734 + 2a320: 0002aa5c xori zero,zero,2729 + 2a324: 0002ab88 cmpgei zero,zero,2734 + 2a328: 0002aab4 movhi zero,2730 + 2a32c: 0002ab88 cmpgei zero,zero,2734 + 2a330: 0002ab88 cmpgei zero,zero,2734 + 2a334: 0002a778 rdprs zero,zero,2717 + 2a338: 42000204 addi r8,r8,8 + 2a33c: da802317 ldw r10,140(sp) + 2a340: 5455883a add r10,r10,r17 + 2a344: da802315 stw r10,140(sp) + 2a348: 003f8b06 br 2a178 <_gp+0xfffedc40> + 2a34c: d9002017 ldw r4,128(sp) + 2a350: a00b883a mov r5,r20 + 2a354: 00255100 call 25510 <__swsetup_r> + 2a358: 1003b11e bne r2,zero,2b220 <___vfiprintf_internal_r+0x11ec> + 2a35c: a080030b ldhu r2,12(r20) + 2a360: 00c00284 movi r3,10 + 2a364: 1080068c andi r2,r2,26 + 2a368: 10ff541e bne r2,r3,2a0bc <_gp+0xfffedb84> + 2a36c: a080038f ldh r2,14(r20) + 2a370: 103f5216 blt r2,zero,2a0bc <_gp+0xfffedb84> + 2a374: d9c02217 ldw r7,136(sp) + 2a378: d9002017 ldw r4,128(sp) + 2a37c: e00d883a mov r6,fp + 2a380: a00b883a mov r5,r20 + 2a384: 002b4ac0 call 2b4ac <__sbprintf> + 2a388: dfc03617 ldw ra,216(sp) + 2a38c: df003517 ldw fp,212(sp) + 2a390: ddc03417 ldw r23,208(sp) + 2a394: dd803317 ldw r22,204(sp) + 2a398: dd403217 ldw r21,200(sp) + 2a39c: dd003117 ldw r20,196(sp) + 2a3a0: dcc03017 ldw r19,192(sp) + 2a3a4: dc802f17 ldw r18,188(sp) + 2a3a8: dc402e17 ldw r17,184(sp) + 2a3ac: dc002d17 ldw r16,180(sp) + 2a3b0: dec03704 addi sp,sp,220 + 2a3b4: f800283a ret + 2a3b8: 00274e40 call 274e4 <__sinit> + 2a3bc: 003f2f06 br 2a07c <_gp+0xfffedb44> + 2a3c0: 0463c83a sub r17,zero,r17 + 2a3c4: d8802215 stw r2,136(sp) + 2a3c8: a5000114 ori r20,r20,4 + 2a3cc: 80c00007 ldb r3,0(r16) + 2a3d0: 003f7706 br 2a1b0 <_gp+0xfffedc78> + 2a3d4: 00800c04 movi r2,48 + 2a3d8: da802217 ldw r10,136(sp) + 2a3dc: d8801d05 stb r2,116(sp) + 2a3e0: 00801e04 movi r2,120 + 2a3e4: d8801d45 stb r2,117(sp) + 2a3e8: d8001d85 stb zero,118(sp) + 2a3ec: 50c00104 addi r3,r10,4 + 2a3f0: 54800017 ldw r18,0(r10) + 2a3f4: 0027883a mov r19,zero + 2a3f8: a0800094 ori r2,r20,2 + 2a3fc: 48030b16 blt r9,zero,2b02c <___vfiprintf_internal_r+0xff8> + 2a400: 00bfdfc4 movi r2,-129 + 2a404: a096703a and r11,r20,r2 + 2a408: d8c02215 stw r3,136(sp) + 2a40c: 5d000094 ori r20,r11,2 + 2a410: 90032b1e bne r18,zero,2b0c0 <___vfiprintf_internal_r+0x108c> + 2a414: 008000f4 movhi r2,3 + 2a418: 10880504 addi r2,r2,8212 + 2a41c: d8802615 stw r2,152(sp) + 2a420: 0039883a mov fp,zero + 2a424: 48017b1e bne r9,zero,2aa14 <___vfiprintf_internal_r+0x9e0> + 2a428: 0013883a mov r9,zero + 2a42c: 0027883a mov r19,zero + 2a430: dd401a04 addi r21,sp,104 + 2a434: 4825883a mov r18,r9 + 2a438: 4cc0010e bge r9,r19,2a440 <___vfiprintf_internal_r+0x40c> + 2a43c: 9825883a mov r18,r19 + 2a440: e7003fcc andi fp,fp,255 + 2a444: e700201c xori fp,fp,128 + 2a448: e73fe004 addi fp,fp,-128 + 2a44c: e0000126 beq fp,zero,2a454 <___vfiprintf_internal_r+0x420> + 2a450: 94800044 addi r18,r18,1 + 2a454: a380008c andi r14,r20,2 + 2a458: 70000126 beq r14,zero,2a460 <___vfiprintf_internal_r+0x42c> + 2a45c: 94800084 addi r18,r18,2 + 2a460: a700210c andi fp,r20,132 + 2a464: e001df1e bne fp,zero,2abe4 <___vfiprintf_internal_r+0xbb0> + 2a468: 8c87c83a sub r3,r17,r18 + 2a46c: 00c1dd0e bge zero,r3,2abe4 <___vfiprintf_internal_r+0xbb0> + 2a470: 01c00404 movi r7,16 + 2a474: d8801c17 ldw r2,112(sp) + 2a478: 38c3ad0e bge r7,r3,2b330 <___vfiprintf_internal_r+0x12fc> + 2a47c: 028000f4 movhi r10,3 + 2a480: 52886a04 addi r10,r10,8616 + 2a484: dc002915 stw r16,164(sp) + 2a488: d9801b17 ldw r6,108(sp) + 2a48c: da802415 stw r10,144(sp) + 2a490: 03c001c4 movi r15,7 + 2a494: da402515 stw r9,148(sp) + 2a498: db802815 stw r14,160(sp) + 2a49c: 1821883a mov r16,r3 + 2a4a0: 00000506 br 2a4b8 <___vfiprintf_internal_r+0x484> + 2a4a4: 31400084 addi r5,r6,2 + 2a4a8: 42000204 addi r8,r8,8 + 2a4ac: 200d883a mov r6,r4 + 2a4b0: 843ffc04 addi r16,r16,-16 + 2a4b4: 3c000d0e bge r7,r16,2a4ec <___vfiprintf_internal_r+0x4b8> + 2a4b8: 10800404 addi r2,r2,16 + 2a4bc: 31000044 addi r4,r6,1 + 2a4c0: 45800015 stw r22,0(r8) + 2a4c4: 41c00115 stw r7,4(r8) + 2a4c8: d8801c15 stw r2,112(sp) + 2a4cc: d9001b15 stw r4,108(sp) + 2a4d0: 793ff40e bge r15,r4,2a4a4 <_gp+0xfffedf6c> + 2a4d4: 1001b51e bne r2,zero,2abac <___vfiprintf_internal_r+0xb78> + 2a4d8: 843ffc04 addi r16,r16,-16 + 2a4dc: 000d883a mov r6,zero + 2a4e0: 01400044 movi r5,1 + 2a4e4: d811883a mov r8,sp + 2a4e8: 3c3ff316 blt r7,r16,2a4b8 <_gp+0xfffedf80> + 2a4ec: 8007883a mov r3,r16 + 2a4f0: da402517 ldw r9,148(sp) + 2a4f4: db802817 ldw r14,160(sp) + 2a4f8: dc002917 ldw r16,164(sp) + 2a4fc: da802417 ldw r10,144(sp) + 2a500: 1885883a add r2,r3,r2 + 2a504: 40c00115 stw r3,4(r8) + 2a508: 42800015 stw r10,0(r8) + 2a50c: d8801c15 stw r2,112(sp) + 2a510: d9401b15 stw r5,108(sp) + 2a514: 00c001c4 movi r3,7 + 2a518: 19426016 blt r3,r5,2ae9c <___vfiprintf_internal_r+0xe68> + 2a51c: d8c01d87 ldb r3,118(sp) + 2a520: 42000204 addi r8,r8,8 + 2a524: 29000044 addi r4,r5,1 + 2a528: 1801b31e bne r3,zero,2abf8 <___vfiprintf_internal_r+0xbc4> + 2a52c: 7001c026 beq r14,zero,2ac30 <___vfiprintf_internal_r+0xbfc> + 2a530: d8c01d04 addi r3,sp,116 + 2a534: 10800084 addi r2,r2,2 + 2a538: 40c00015 stw r3,0(r8) + 2a53c: 00c00084 movi r3,2 + 2a540: 40c00115 stw r3,4(r8) + 2a544: d8801c15 stw r2,112(sp) + 2a548: d9001b15 stw r4,108(sp) + 2a54c: 00c001c4 movi r3,7 + 2a550: 1902650e bge r3,r4,2aee8 <___vfiprintf_internal_r+0xeb4> + 2a554: 10029a1e bne r2,zero,2afc0 <___vfiprintf_internal_r+0xf8c> + 2a558: 00c02004 movi r3,128 + 2a55c: 01000044 movi r4,1 + 2a560: 000b883a mov r5,zero + 2a564: d811883a mov r8,sp + 2a568: e0c1b31e bne fp,r3,2ac38 <___vfiprintf_internal_r+0xc04> + 2a56c: 8cb9c83a sub fp,r17,r18 + 2a570: 0701b10e bge zero,fp,2ac38 <___vfiprintf_internal_r+0xc04> + 2a574: 01c00404 movi r7,16 + 2a578: 3f03890e bge r7,fp,2b3a0 <___vfiprintf_internal_r+0x136c> + 2a57c: 00c000f4 movhi r3,3 + 2a580: 18c86604 addi r3,r3,8600 + 2a584: d8c02415 stw r3,144(sp) + 2a588: 8007883a mov r3,r16 + 2a58c: 034001c4 movi r13,7 + 2a590: e021883a mov r16,fp + 2a594: da402515 stw r9,148(sp) + 2a598: 1839883a mov fp,r3 + 2a59c: 00000506 br 2a5b4 <___vfiprintf_internal_r+0x580> + 2a5a0: 29800084 addi r6,r5,2 + 2a5a4: 42000204 addi r8,r8,8 + 2a5a8: 180b883a mov r5,r3 + 2a5ac: 843ffc04 addi r16,r16,-16 + 2a5b0: 3c000d0e bge r7,r16,2a5e8 <___vfiprintf_internal_r+0x5b4> + 2a5b4: 10800404 addi r2,r2,16 + 2a5b8: 28c00044 addi r3,r5,1 + 2a5bc: 45c00015 stw r23,0(r8) + 2a5c0: 41c00115 stw r7,4(r8) + 2a5c4: d8801c15 stw r2,112(sp) + 2a5c8: d8c01b15 stw r3,108(sp) + 2a5cc: 68fff40e bge r13,r3,2a5a0 <_gp+0xfffee068> + 2a5d0: 1002241e bne r2,zero,2ae64 <___vfiprintf_internal_r+0xe30> + 2a5d4: 843ffc04 addi r16,r16,-16 + 2a5d8: 01800044 movi r6,1 + 2a5dc: 000b883a mov r5,zero + 2a5e0: d811883a mov r8,sp + 2a5e4: 3c3ff316 blt r7,r16,2a5b4 <_gp+0xfffee07c> + 2a5e8: da402517 ldw r9,148(sp) + 2a5ec: e007883a mov r3,fp + 2a5f0: 8039883a mov fp,r16 + 2a5f4: 1821883a mov r16,r3 + 2a5f8: d8c02417 ldw r3,144(sp) + 2a5fc: 1705883a add r2,r2,fp + 2a600: 47000115 stw fp,4(r8) + 2a604: 40c00015 stw r3,0(r8) + 2a608: d8801c15 stw r2,112(sp) + 2a60c: d9801b15 stw r6,108(sp) + 2a610: 00c001c4 movi r3,7 + 2a614: 19827616 blt r3,r6,2aff0 <___vfiprintf_internal_r+0xfbc> + 2a618: 4cf9c83a sub fp,r9,r19 + 2a61c: 42000204 addi r8,r8,8 + 2a620: 31000044 addi r4,r6,1 + 2a624: 300b883a mov r5,r6 + 2a628: 07018516 blt zero,fp,2ac40 <___vfiprintf_internal_r+0xc0c> + 2a62c: 9885883a add r2,r19,r2 + 2a630: 45400015 stw r21,0(r8) + 2a634: 44c00115 stw r19,4(r8) + 2a638: d8801c15 stw r2,112(sp) + 2a63c: d9001b15 stw r4,108(sp) + 2a640: 00c001c4 movi r3,7 + 2a644: 1901dd0e bge r3,r4,2adbc <___vfiprintf_internal_r+0xd88> + 2a648: 1002401e bne r2,zero,2af4c <___vfiprintf_internal_r+0xf18> + 2a64c: d8001b15 stw zero,108(sp) + 2a650: a2c0010c andi r11,r20,4 + 2a654: 58000226 beq r11,zero,2a660 <___vfiprintf_internal_r+0x62c> + 2a658: 8ca7c83a sub r19,r17,r18 + 2a65c: 04c2f216 blt zero,r19,2b228 <___vfiprintf_internal_r+0x11f4> + 2a660: 8c80010e bge r17,r18,2a668 <___vfiprintf_internal_r+0x634> + 2a664: 9023883a mov r17,r18 + 2a668: da802317 ldw r10,140(sp) + 2a66c: 5455883a add r10,r10,r17 + 2a670: da802315 stw r10,140(sp) + 2a674: d8001b15 stw zero,108(sp) + 2a678: d811883a mov r8,sp + 2a67c: 003ea206 br 2a108 <_gp+0xfffedbd0> + 2a680: a5000814 ori r20,r20,32 + 2a684: 80c00007 ldb r3,0(r16) + 2a688: 003ec906 br 2a1b0 <_gp+0xfffedc78> + 2a68c: 80c00007 ldb r3,0(r16) + 2a690: 1b030926 beq r3,r12,2b2b8 <___vfiprintf_internal_r+0x1284> + 2a694: a5000414 ori r20,r20,16 + 2a698: 003ec506 br 2a1b0 <_gp+0xfffedc78> + 2a69c: 21003fcc andi r4,r4,255 + 2a6a0: 20035e1e bne r4,zero,2b41c <___vfiprintf_internal_r+0x13e8> + 2a6a4: a080080c andi r2,r20,32 + 2a6a8: 1002a526 beq r2,zero,2b140 <___vfiprintf_internal_r+0x110c> + 2a6ac: da802217 ldw r10,136(sp) + 2a6b0: 50800017 ldw r2,0(r10) + 2a6b4: da802317 ldw r10,140(sp) + 2a6b8: 5007d7fa srai r3,r10,31 + 2a6bc: da802217 ldw r10,136(sp) + 2a6c0: 10c00115 stw r3,4(r2) + 2a6c4: 52800104 addi r10,r10,4 + 2a6c8: da802215 stw r10,136(sp) + 2a6cc: da802317 ldw r10,140(sp) + 2a6d0: 12800015 stw r10,0(r2) + 2a6d4: 003e8c06 br 2a108 <_gp+0xfffedbd0> + 2a6d8: 21003fcc andi r4,r4,255 + 2a6dc: 2003511e bne r4,zero,2b424 <___vfiprintf_internal_r+0x13f0> + 2a6e0: a080080c andi r2,r20,32 + 2a6e4: 1000a126 beq r2,zero,2a96c <___vfiprintf_internal_r+0x938> + 2a6e8: da802217 ldw r10,136(sp) + 2a6ec: d8001d85 stb zero,118(sp) + 2a6f0: 50800204 addi r2,r10,8 + 2a6f4: 54800017 ldw r18,0(r10) + 2a6f8: 54c00117 ldw r19,4(r10) + 2a6fc: 4802b416 blt r9,zero,2b1d0 <___vfiprintf_internal_r+0x119c> + 2a700: 013fdfc4 movi r4,-129 + 2a704: 94c6b03a or r3,r18,r19 + 2a708: d8802215 stw r2,136(sp) + 2a70c: a128703a and r20,r20,r4 + 2a710: 1800a226 beq r3,zero,2a99c <___vfiprintf_internal_r+0x968> + 2a714: 0039883a mov fp,zero + 2a718: dd401a04 addi r21,sp,104 + 2a71c: 9006d0fa srli r3,r18,3 + 2a720: 9808977a slli r4,r19,29 + 2a724: 9826d0fa srli r19,r19,3 + 2a728: 948001cc andi r18,r18,7 + 2a72c: 90800c04 addi r2,r18,48 + 2a730: ad7fffc4 addi r21,r21,-1 + 2a734: 20e4b03a or r18,r4,r3 + 2a738: a8800005 stb r2,0(r21) + 2a73c: 94c6b03a or r3,r18,r19 + 2a740: 183ff61e bne r3,zero,2a71c <_gp+0xfffee1e4> + 2a744: a0c0004c andi r3,r20,1 + 2a748: 18005926 beq r3,zero,2a8b0 <___vfiprintf_internal_r+0x87c> + 2a74c: 10803fcc andi r2,r2,255 + 2a750: 1080201c xori r2,r2,128 + 2a754: 10bfe004 addi r2,r2,-128 + 2a758: 00c00c04 movi r3,48 + 2a75c: 10c05426 beq r2,r3,2a8b0 <___vfiprintf_internal_r+0x87c> + 2a760: da801e17 ldw r10,120(sp) + 2a764: a8bfffc4 addi r2,r21,-1 + 2a768: a8ffffc5 stb r3,-1(r21) + 2a76c: 50a7c83a sub r19,r10,r2 + 2a770: 102b883a mov r21,r2 + 2a774: 003f2f06 br 2a434 <_gp+0xfffedefc> + 2a778: 21003fcc andi r4,r4,255 + 2a77c: 2003421e bne r4,zero,2b488 <___vfiprintf_internal_r+0x1454> + 2a780: 008000f4 movhi r2,3 + 2a784: 10880504 addi r2,r2,8212 + 2a788: d8802615 stw r2,152(sp) + 2a78c: a080080c andi r2,r20,32 + 2a790: 1000aa26 beq r2,zero,2aa3c <___vfiprintf_internal_r+0xa08> + 2a794: da802217 ldw r10,136(sp) + 2a798: 54800017 ldw r18,0(r10) + 2a79c: 54c00117 ldw r19,4(r10) + 2a7a0: 52800204 addi r10,r10,8 + 2a7a4: da802215 stw r10,136(sp) + 2a7a8: a080004c andi r2,r20,1 + 2a7ac: 1001d226 beq r2,zero,2aef8 <___vfiprintf_internal_r+0xec4> + 2a7b0: 94c4b03a or r2,r18,r19 + 2a7b4: 1002351e bne r2,zero,2b08c <___vfiprintf_internal_r+0x1058> + 2a7b8: d8001d85 stb zero,118(sp) + 2a7bc: 48022216 blt r9,zero,2b048 <___vfiprintf_internal_r+0x1014> + 2a7c0: 00bfdfc4 movi r2,-129 + 2a7c4: a0a8703a and r20,r20,r2 + 2a7c8: 003f1506 br 2a420 <_gp+0xfffedee8> + 2a7cc: da802217 ldw r10,136(sp) + 2a7d0: 04800044 movi r18,1 + 2a7d4: d8001d85 stb zero,118(sp) + 2a7d8: 50800017 ldw r2,0(r10) + 2a7dc: 52800104 addi r10,r10,4 + 2a7e0: da802215 stw r10,136(sp) + 2a7e4: d8801005 stb r2,64(sp) + 2a7e8: 9027883a mov r19,r18 + 2a7ec: dd401004 addi r21,sp,64 + 2a7f0: 0013883a mov r9,zero + 2a7f4: 003f1706 br 2a454 <_gp+0xfffedf1c> + 2a7f8: 21003fcc andi r4,r4,255 + 2a7fc: 2003201e bne r4,zero,2b480 <___vfiprintf_internal_r+0x144c> + 2a800: a080080c andi r2,r20,32 + 2a804: 10004b26 beq r2,zero,2a934 <___vfiprintf_internal_r+0x900> + 2a808: da802217 ldw r10,136(sp) + 2a80c: 50800117 ldw r2,4(r10) + 2a810: 54800017 ldw r18,0(r10) + 2a814: 52800204 addi r10,r10,8 + 2a818: da802215 stw r10,136(sp) + 2a81c: 1027883a mov r19,r2 + 2a820: 10022c16 blt r2,zero,2b0d4 <___vfiprintf_internal_r+0x10a0> + 2a824: df001d83 ldbu fp,118(sp) + 2a828: 48007216 blt r9,zero,2a9f4 <___vfiprintf_internal_r+0x9c0> + 2a82c: 00ffdfc4 movi r3,-129 + 2a830: 94c4b03a or r2,r18,r19 + 2a834: a0e8703a and r20,r20,r3 + 2a838: 1000cc26 beq r2,zero,2ab6c <___vfiprintf_internal_r+0xb38> + 2a83c: 98021026 beq r19,zero,2b080 <___vfiprintf_internal_r+0x104c> + 2a840: dc402415 stw r17,144(sp) + 2a844: dc002515 stw r16,148(sp) + 2a848: 9823883a mov r17,r19 + 2a84c: 9021883a mov r16,r18 + 2a850: dd401a04 addi r21,sp,104 + 2a854: 4825883a mov r18,r9 + 2a858: 4027883a mov r19,r8 + 2a85c: 8009883a mov r4,r16 + 2a860: 880b883a mov r5,r17 + 2a864: 01800284 movi r6,10 + 2a868: 000f883a mov r7,zero + 2a86c: 002c4140 call 2c414 <__umoddi3> + 2a870: 10800c04 addi r2,r2,48 + 2a874: ad7fffc4 addi r21,r21,-1 + 2a878: 8009883a mov r4,r16 + 2a87c: 880b883a mov r5,r17 + 2a880: a8800005 stb r2,0(r21) + 2a884: 01800284 movi r6,10 + 2a888: 000f883a mov r7,zero + 2a88c: 002be9c0 call 2be9c <__udivdi3> + 2a890: 1021883a mov r16,r2 + 2a894: 10c4b03a or r2,r2,r3 + 2a898: 1823883a mov r17,r3 + 2a89c: 103fef1e bne r2,zero,2a85c <_gp+0xfffee324> + 2a8a0: dc402417 ldw r17,144(sp) + 2a8a4: dc002517 ldw r16,148(sp) + 2a8a8: 9013883a mov r9,r18 + 2a8ac: 9811883a mov r8,r19 + 2a8b0: da801e17 ldw r10,120(sp) + 2a8b4: 5567c83a sub r19,r10,r21 + 2a8b8: 003ede06 br 2a434 <_gp+0xfffedefc> + 2a8bc: 38803fcc andi r2,r7,255 + 2a8c0: 1080201c xori r2,r2,128 + 2a8c4: 10bfe004 addi r2,r2,-128 + 2a8c8: 1002371e bne r2,zero,2b1a8 <___vfiprintf_internal_r+0x1174> + 2a8cc: 01000044 movi r4,1 + 2a8d0: 01c00804 movi r7,32 + 2a8d4: 80c00007 ldb r3,0(r16) + 2a8d8: 003e3506 br 2a1b0 <_gp+0xfffedc78> + 2a8dc: a5000054 ori r20,r20,1 + 2a8e0: 80c00007 ldb r3,0(r16) + 2a8e4: 003e3206 br 2a1b0 <_gp+0xfffedc78> + 2a8e8: a5002014 ori r20,r20,128 + 2a8ec: 80c00007 ldb r3,0(r16) + 2a8f0: 003e2f06 br 2a1b0 <_gp+0xfffedc78> + 2a8f4: 8015883a mov r10,r16 + 2a8f8: 0023883a mov r17,zero + 2a8fc: 18bff404 addi r2,r3,-48 + 2a900: 50c00007 ldb r3,0(r10) + 2a904: 8c4002a4 muli r17,r17,10 + 2a908: 84000044 addi r16,r16,1 + 2a90c: 8015883a mov r10,r16 + 2a910: 1463883a add r17,r2,r17 + 2a914: 18bff404 addi r2,r3,-48 + 2a918: 30bff92e bgeu r6,r2,2a900 <_gp+0xfffee3c8> + 2a91c: 003e2506 br 2a1b4 <_gp+0xfffedc7c> + 2a920: 21003fcc andi r4,r4,255 + 2a924: 2002d41e bne r4,zero,2b478 <___vfiprintf_internal_r+0x1444> + 2a928: a5000414 ori r20,r20,16 + 2a92c: a080080c andi r2,r20,32 + 2a930: 103fb51e bne r2,zero,2a808 <_gp+0xfffee2d0> + 2a934: a080040c andi r2,r20,16 + 2a938: 1001f826 beq r2,zero,2b11c <___vfiprintf_internal_r+0x10e8> + 2a93c: da802217 ldw r10,136(sp) + 2a940: 54800017 ldw r18,0(r10) + 2a944: 52800104 addi r10,r10,4 + 2a948: da802215 stw r10,136(sp) + 2a94c: 9027d7fa srai r19,r18,31 + 2a950: 9805883a mov r2,r19 + 2a954: 003fb206 br 2a820 <_gp+0xfffee2e8> + 2a958: 21003fcc andi r4,r4,255 + 2a95c: 2002c41e bne r4,zero,2b470 <___vfiprintf_internal_r+0x143c> + 2a960: a5000414 ori r20,r20,16 + 2a964: a080080c andi r2,r20,32 + 2a968: 103f5f1e bne r2,zero,2a6e8 <_gp+0xfffee1b0> + 2a96c: a080040c andi r2,r20,16 + 2a970: 10020f26 beq r2,zero,2b1b0 <___vfiprintf_internal_r+0x117c> + 2a974: da802217 ldw r10,136(sp) + 2a978: d8001d85 stb zero,118(sp) + 2a97c: 0027883a mov r19,zero + 2a980: 50800104 addi r2,r10,4 + 2a984: 54800017 ldw r18,0(r10) + 2a988: 48021116 blt r9,zero,2b1d0 <___vfiprintf_internal_r+0x119c> + 2a98c: 00ffdfc4 movi r3,-129 + 2a990: d8802215 stw r2,136(sp) + 2a994: a0e8703a and r20,r20,r3 + 2a998: 903f5e1e bne r18,zero,2a714 <_gp+0xfffee1dc> + 2a99c: 0039883a mov fp,zero + 2a9a0: 4802a626 beq r9,zero,2b43c <___vfiprintf_internal_r+0x1408> + 2a9a4: 0025883a mov r18,zero + 2a9a8: 0027883a mov r19,zero + 2a9ac: 003f5a06 br 2a718 <_gp+0xfffee1e0> + 2a9b0: 21003fcc andi r4,r4,255 + 2a9b4: 20029f1e bne r4,zero,2b434 <___vfiprintf_internal_r+0x1400> + 2a9b8: a5000414 ori r20,r20,16 + 2a9bc: a080080c andi r2,r20,32 + 2a9c0: 10005e1e bne r2,zero,2ab3c <___vfiprintf_internal_r+0xb08> + 2a9c4: a080040c andi r2,r20,16 + 2a9c8: 1001a21e bne r2,zero,2b054 <___vfiprintf_internal_r+0x1020> + 2a9cc: a080100c andi r2,r20,64 + 2a9d0: d8001d85 stb zero,118(sp) + 2a9d4: da802217 ldw r10,136(sp) + 2a9d8: 1002231e bne r2,zero,2b268 <___vfiprintf_internal_r+0x1234> + 2a9dc: 50800104 addi r2,r10,4 + 2a9e0: 54800017 ldw r18,0(r10) + 2a9e4: 0027883a mov r19,zero + 2a9e8: 4801a00e bge r9,zero,2b06c <___vfiprintf_internal_r+0x1038> + 2a9ec: d8802215 stw r2,136(sp) + 2a9f0: 0039883a mov fp,zero + 2a9f4: 94c4b03a or r2,r18,r19 + 2a9f8: 103f901e bne r2,zero,2a83c <_gp+0xfffee304> + 2a9fc: 00800044 movi r2,1 + 2aa00: 10803fcc andi r2,r2,255 + 2aa04: 00c00044 movi r3,1 + 2aa08: 10c05926 beq r2,r3,2ab70 <___vfiprintf_internal_r+0xb3c> + 2aa0c: 00c00084 movi r3,2 + 2aa10: 10ffe41e bne r2,r3,2a9a4 <_gp+0xfffee46c> + 2aa14: 0025883a mov r18,zero + 2aa18: 0027883a mov r19,zero + 2aa1c: 00013d06 br 2af14 <___vfiprintf_internal_r+0xee0> + 2aa20: 21003fcc andi r4,r4,255 + 2aa24: 2002811e bne r4,zero,2b42c <___vfiprintf_internal_r+0x13f8> + 2aa28: 008000f4 movhi r2,3 + 2aa2c: 10880004 addi r2,r2,8192 + 2aa30: d8802615 stw r2,152(sp) + 2aa34: a080080c andi r2,r20,32 + 2aa38: 103f561e bne r2,zero,2a794 <_gp+0xfffee25c> + 2aa3c: a080040c andi r2,r20,16 + 2aa40: 1001d126 beq r2,zero,2b188 <___vfiprintf_internal_r+0x1154> + 2aa44: da802217 ldw r10,136(sp) + 2aa48: 0027883a mov r19,zero + 2aa4c: 54800017 ldw r18,0(r10) + 2aa50: 52800104 addi r10,r10,4 + 2aa54: da802215 stw r10,136(sp) + 2aa58: 003f5306 br 2a7a8 <_gp+0xfffee270> + 2aa5c: da802217 ldw r10,136(sp) + 2aa60: d8001d85 stb zero,118(sp) + 2aa64: 55400017 ldw r21,0(r10) + 2aa68: 50c00104 addi r3,r10,4 + 2aa6c: a8024226 beq r21,zero,2b378 <___vfiprintf_internal_r+0x1344> + 2aa70: 48021816 blt r9,zero,2b2d4 <___vfiprintf_internal_r+0x12a0> + 2aa74: 480d883a mov r6,r9 + 2aa78: 000b883a mov r5,zero + 2aa7c: a809883a mov r4,r21 + 2aa80: d8c02a15 stw r3,168(sp) + 2aa84: da002b15 stw r8,172(sp) + 2aa88: da402c15 stw r9,176(sp) + 2aa8c: 00282440 call 28244 + 2aa90: d8c02a17 ldw r3,168(sp) + 2aa94: da002b17 ldw r8,172(sp) + 2aa98: da402c17 ldw r9,176(sp) + 2aa9c: 10024826 beq r2,zero,2b3c0 <___vfiprintf_internal_r+0x138c> + 2aaa0: 1567c83a sub r19,r2,r21 + 2aaa4: df001d83 ldbu fp,118(sp) + 2aaa8: d8c02215 stw r3,136(sp) + 2aaac: 0013883a mov r9,zero + 2aab0: 003e6006 br 2a434 <_gp+0xfffedefc> + 2aab4: 21003fcc andi r4,r4,255 + 2aab8: 203fc026 beq r4,zero,2a9bc <_gp+0xfffee484> + 2aabc: d9c01d85 stb r7,118(sp) + 2aac0: 003fbe06 br 2a9bc <_gp+0xfffee484> + 2aac4: da802217 ldw r10,136(sp) + 2aac8: 54400017 ldw r17,0(r10) + 2aacc: 50800104 addi r2,r10,4 + 2aad0: 883e3b16 blt r17,zero,2a3c0 <_gp+0xfffede88> + 2aad4: d8802215 stw r2,136(sp) + 2aad8: 80c00007 ldb r3,0(r16) + 2aadc: 003db406 br 2a1b0 <_gp+0xfffedc78> + 2aae0: 01000044 movi r4,1 + 2aae4: 01c00ac4 movi r7,43 + 2aae8: 80c00007 ldb r3,0(r16) + 2aaec: 003db006 br 2a1b0 <_gp+0xfffedc78> + 2aaf0: 80c00007 ldb r3,0(r16) + 2aaf4: 82800044 addi r10,r16,1 + 2aaf8: 1b423c26 beq r3,r13,2b3ec <___vfiprintf_internal_r+0x13b8> + 2aafc: 18bff404 addi r2,r3,-48 + 2ab00: 0013883a mov r9,zero + 2ab04: 30822b36 bltu r6,r2,2b3b4 <___vfiprintf_internal_r+0x1380> + 2ab08: 50c00007 ldb r3,0(r10) + 2ab0c: 4a4002a4 muli r9,r9,10 + 2ab10: 54000044 addi r16,r10,1 + 2ab14: 8015883a mov r10,r16 + 2ab18: 4893883a add r9,r9,r2 + 2ab1c: 18bff404 addi r2,r3,-48 + 2ab20: 30bff92e bgeu r6,r2,2ab08 <_gp+0xfffee5d0> + 2ab24: 483da30e bge r9,zero,2a1b4 <_gp+0xfffedc7c> + 2ab28: 027fffc4 movi r9,-1 + 2ab2c: 003da106 br 2a1b4 <_gp+0xfffedc7c> + 2ab30: a5001014 ori r20,r20,64 + 2ab34: 80c00007 ldb r3,0(r16) + 2ab38: 003d9d06 br 2a1b0 <_gp+0xfffedc78> + 2ab3c: da802217 ldw r10,136(sp) + 2ab40: d8001d85 stb zero,118(sp) + 2ab44: 50c00204 addi r3,r10,8 + 2ab48: 54800017 ldw r18,0(r10) + 2ab4c: 54c00117 ldw r19,4(r10) + 2ab50: 4801ca16 blt r9,zero,2b27c <___vfiprintf_internal_r+0x1248> + 2ab54: 013fdfc4 movi r4,-129 + 2ab58: 94c4b03a or r2,r18,r19 + 2ab5c: d8c02215 stw r3,136(sp) + 2ab60: a128703a and r20,r20,r4 + 2ab64: 0039883a mov fp,zero + 2ab68: 103f341e bne r2,zero,2a83c <_gp+0xfffee304> + 2ab6c: 483e2e26 beq r9,zero,2a428 <_gp+0xfffedef0> + 2ab70: 0025883a mov r18,zero + 2ab74: 94800c04 addi r18,r18,48 + 2ab78: dc8019c5 stb r18,103(sp) + 2ab7c: dcc02717 ldw r19,156(sp) + 2ab80: dd4019c4 addi r21,sp,103 + 2ab84: 003e2b06 br 2a434 <_gp+0xfffedefc> + 2ab88: 21003fcc andi r4,r4,255 + 2ab8c: 2002361e bne r4,zero,2b468 <___vfiprintf_internal_r+0x1434> + 2ab90: 1801c126 beq r3,zero,2b298 <___vfiprintf_internal_r+0x1264> + 2ab94: 04800044 movi r18,1 + 2ab98: d8c01005 stb r3,64(sp) 2ab9c: d8001d85 stb zero,118(sp) - 2aba0: 50c00104 addi r3,r10,4 - 2aba4: 54800017 ldw r18,0(r10) - 2aba8: 0027883a mov r19,zero - 2abac: a0800094 ori r2,r20,2 - 2abb0: 48030b16 blt r9,zero,2b7e0 <___vfiprintf_internal_r+0xff8> - 2abb4: 00bfdfc4 movi r2,-129 - 2abb8: a096703a and r11,r20,r2 - 2abbc: d8c02215 stw r3,136(sp) - 2abc0: 5d000094 ori r20,r11,2 - 2abc4: 90032b1e bne r18,zero,2b874 <___vfiprintf_internal_r+0x108c> - 2abc8: 008000f4 movhi r2,3 - 2abcc: 108a5304 addi r2,r2,10572 - 2abd0: d8802615 stw r2,152(sp) - 2abd4: 0039883a mov fp,zero - 2abd8: 48017b1e bne r9,zero,2b1c8 <___vfiprintf_internal_r+0x9e0> - 2abdc: 0013883a mov r9,zero - 2abe0: 0027883a mov r19,zero - 2abe4: dd401a04 addi r21,sp,104 - 2abe8: 4825883a mov r18,r9 - 2abec: 4cc0010e bge r9,r19,2abf4 <___vfiprintf_internal_r+0x40c> - 2abf0: 9825883a mov r18,r19 - 2abf4: e7003fcc andi fp,fp,255 - 2abf8: e700201c xori fp,fp,128 - 2abfc: e73fe004 addi fp,fp,-128 - 2ac00: e0000126 beq fp,zero,2ac08 <___vfiprintf_internal_r+0x420> - 2ac04: 94800044 addi r18,r18,1 - 2ac08: a380008c andi r14,r20,2 - 2ac0c: 70000126 beq r14,zero,2ac14 <___vfiprintf_internal_r+0x42c> - 2ac10: 94800084 addi r18,r18,2 - 2ac14: a700210c andi fp,r20,132 - 2ac18: e001df1e bne fp,zero,2b398 <___vfiprintf_internal_r+0xbb0> - 2ac1c: 8c87c83a sub r3,r17,r18 - 2ac20: 00c1dd0e bge zero,r3,2b398 <___vfiprintf_internal_r+0xbb0> - 2ac24: 01c00404 movi r7,16 - 2ac28: d8801c17 ldw r2,112(sp) - 2ac2c: 38c3ad0e bge r7,r3,2bae4 <___vfiprintf_internal_r+0x12fc> - 2ac30: 028000f4 movhi r10,3 - 2ac34: 528ab704 addi r10,r10,10972 - 2ac38: dc002915 stw r16,164(sp) - 2ac3c: d9801b17 ldw r6,108(sp) - 2ac40: da802415 stw r10,144(sp) - 2ac44: 03c001c4 movi r15,7 - 2ac48: da402515 stw r9,148(sp) - 2ac4c: db802815 stw r14,160(sp) - 2ac50: 1821883a mov r16,r3 - 2ac54: 00000506 br 2ac6c <___vfiprintf_internal_r+0x484> - 2ac58: 31400084 addi r5,r6,2 - 2ac5c: 42000204 addi r8,r8,8 - 2ac60: 200d883a mov r6,r4 - 2ac64: 843ffc04 addi r16,r16,-16 - 2ac68: 3c000d0e bge r7,r16,2aca0 <___vfiprintf_internal_r+0x4b8> - 2ac6c: 10800404 addi r2,r2,16 - 2ac70: 31000044 addi r4,r6,1 - 2ac74: 45800015 stw r22,0(r8) - 2ac78: 41c00115 stw r7,4(r8) - 2ac7c: d8801c15 stw r2,112(sp) - 2ac80: d9001b15 stw r4,108(sp) - 2ac84: 793ff40e bge r15,r4,2ac58 <___vfiprintf_internal_r+0x470> - 2ac88: 1001b51e bne r2,zero,2b360 <___vfiprintf_internal_r+0xb78> - 2ac8c: 843ffc04 addi r16,r16,-16 - 2ac90: 000d883a mov r6,zero - 2ac94: 01400044 movi r5,1 - 2ac98: d811883a mov r8,sp - 2ac9c: 3c3ff316 blt r7,r16,2ac6c <___vfiprintf_internal_r+0x484> - 2aca0: 8007883a mov r3,r16 - 2aca4: da402517 ldw r9,148(sp) - 2aca8: db802817 ldw r14,160(sp) - 2acac: dc002917 ldw r16,164(sp) - 2acb0: da802417 ldw r10,144(sp) - 2acb4: 1885883a add r2,r3,r2 - 2acb8: 40c00115 stw r3,4(r8) - 2acbc: 42800015 stw r10,0(r8) - 2acc0: d8801c15 stw r2,112(sp) - 2acc4: d9401b15 stw r5,108(sp) - 2acc8: 00c001c4 movi r3,7 - 2accc: 19426016 blt r3,r5,2b650 <___vfiprintf_internal_r+0xe68> - 2acd0: d8c01d87 ldb r3,118(sp) - 2acd4: 42000204 addi r8,r8,8 - 2acd8: 29000044 addi r4,r5,1 - 2acdc: 1801b31e bne r3,zero,2b3ac <___vfiprintf_internal_r+0xbc4> - 2ace0: 7001c026 beq r14,zero,2b3e4 <___vfiprintf_internal_r+0xbfc> - 2ace4: d8c01d04 addi r3,sp,116 - 2ace8: 10800084 addi r2,r2,2 - 2acec: 40c00015 stw r3,0(r8) - 2acf0: 00c00084 movi r3,2 - 2acf4: 40c00115 stw r3,4(r8) - 2acf8: d8801c15 stw r2,112(sp) - 2acfc: d9001b15 stw r4,108(sp) - 2ad00: 00c001c4 movi r3,7 - 2ad04: 1902650e bge r3,r4,2b69c <___vfiprintf_internal_r+0xeb4> - 2ad08: 10029a1e bne r2,zero,2b774 <___vfiprintf_internal_r+0xf8c> - 2ad0c: 00c02004 movi r3,128 - 2ad10: 01000044 movi r4,1 - 2ad14: 000b883a mov r5,zero - 2ad18: d811883a mov r8,sp - 2ad1c: e0c1b31e bne fp,r3,2b3ec <___vfiprintf_internal_r+0xc04> - 2ad20: 8cb9c83a sub fp,r17,r18 - 2ad24: 0701b10e bge zero,fp,2b3ec <___vfiprintf_internal_r+0xc04> - 2ad28: 01c00404 movi r7,16 - 2ad2c: 3f03890e bge r7,fp,2bb54 <___vfiprintf_internal_r+0x136c> - 2ad30: 00c000f4 movhi r3,3 - 2ad34: 18cab304 addi r3,r3,10956 - 2ad38: d8c02415 stw r3,144(sp) - 2ad3c: 8007883a mov r3,r16 - 2ad40: 034001c4 movi r13,7 - 2ad44: e021883a mov r16,fp - 2ad48: da402515 stw r9,148(sp) - 2ad4c: 1839883a mov fp,r3 - 2ad50: 00000506 br 2ad68 <___vfiprintf_internal_r+0x580> - 2ad54: 29800084 addi r6,r5,2 - 2ad58: 42000204 addi r8,r8,8 - 2ad5c: 180b883a mov r5,r3 - 2ad60: 843ffc04 addi r16,r16,-16 - 2ad64: 3c000d0e bge r7,r16,2ad9c <___vfiprintf_internal_r+0x5b4> - 2ad68: 10800404 addi r2,r2,16 - 2ad6c: 28c00044 addi r3,r5,1 - 2ad70: 45c00015 stw r23,0(r8) - 2ad74: 41c00115 stw r7,4(r8) - 2ad78: d8801c15 stw r2,112(sp) - 2ad7c: d8c01b15 stw r3,108(sp) - 2ad80: 68fff40e bge r13,r3,2ad54 <___vfiprintf_internal_r+0x56c> - 2ad84: 1002241e bne r2,zero,2b618 <___vfiprintf_internal_r+0xe30> - 2ad88: 843ffc04 addi r16,r16,-16 - 2ad8c: 01800044 movi r6,1 - 2ad90: 000b883a mov r5,zero - 2ad94: d811883a mov r8,sp - 2ad98: 3c3ff316 blt r7,r16,2ad68 <___vfiprintf_internal_r+0x580> - 2ad9c: da402517 ldw r9,148(sp) - 2ada0: e007883a mov r3,fp - 2ada4: 8039883a mov fp,r16 - 2ada8: 1821883a mov r16,r3 - 2adac: d8c02417 ldw r3,144(sp) - 2adb0: 1705883a add r2,r2,fp - 2adb4: 47000115 stw fp,4(r8) - 2adb8: 40c00015 stw r3,0(r8) - 2adbc: d8801c15 stw r2,112(sp) - 2adc0: d9801b15 stw r6,108(sp) - 2adc4: 00c001c4 movi r3,7 - 2adc8: 19827616 blt r3,r6,2b7a4 <___vfiprintf_internal_r+0xfbc> - 2adcc: 4cf9c83a sub fp,r9,r19 - 2add0: 42000204 addi r8,r8,8 - 2add4: 31000044 addi r4,r6,1 - 2add8: 300b883a mov r5,r6 - 2addc: 07018516 blt zero,fp,2b3f4 <___vfiprintf_internal_r+0xc0c> - 2ade0: 9885883a add r2,r19,r2 - 2ade4: 45400015 stw r21,0(r8) - 2ade8: 44c00115 stw r19,4(r8) - 2adec: d8801c15 stw r2,112(sp) - 2adf0: d9001b15 stw r4,108(sp) - 2adf4: 00c001c4 movi r3,7 - 2adf8: 1901dd0e bge r3,r4,2b570 <___vfiprintf_internal_r+0xd88> - 2adfc: 1002401e bne r2,zero,2b700 <___vfiprintf_internal_r+0xf18> - 2ae00: d8001b15 stw zero,108(sp) - 2ae04: a2c0010c andi r11,r20,4 - 2ae08: 58000226 beq r11,zero,2ae14 <___vfiprintf_internal_r+0x62c> - 2ae0c: 8ca7c83a sub r19,r17,r18 - 2ae10: 04c2f216 blt zero,r19,2b9dc <___vfiprintf_internal_r+0x11f4> - 2ae14: 8c80010e bge r17,r18,2ae1c <___vfiprintf_internal_r+0x634> - 2ae18: 9023883a mov r17,r18 - 2ae1c: da802317 ldw r10,140(sp) - 2ae20: 5455883a add r10,r10,r17 - 2ae24: da802315 stw r10,140(sp) - 2ae28: d8001b15 stw zero,108(sp) - 2ae2c: d811883a mov r8,sp - 2ae30: 003ea206 br 2a8bc <___vfiprintf_internal_r+0xd4> - 2ae34: a5000814 ori r20,r20,32 - 2ae38: 80c00007 ldb r3,0(r16) - 2ae3c: 003ec906 br 2a964 <___vfiprintf_internal_r+0x17c> - 2ae40: 80c00007 ldb r3,0(r16) - 2ae44: 1b030926 beq r3,r12,2ba6c <___vfiprintf_internal_r+0x1284> - 2ae48: a5000414 ori r20,r20,16 - 2ae4c: 003ec506 br 2a964 <___vfiprintf_internal_r+0x17c> - 2ae50: 21003fcc andi r4,r4,255 - 2ae54: 20035e1e bne r4,zero,2bbd0 <___vfiprintf_internal_r+0x13e8> - 2ae58: a080080c andi r2,r20,32 - 2ae5c: 1002a526 beq r2,zero,2b8f4 <___vfiprintf_internal_r+0x110c> - 2ae60: da802217 ldw r10,136(sp) - 2ae64: 50800017 ldw r2,0(r10) - 2ae68: da802317 ldw r10,140(sp) - 2ae6c: 5007d7fa srai r3,r10,31 - 2ae70: da802217 ldw r10,136(sp) - 2ae74: 10c00115 stw r3,4(r2) - 2ae78: 52800104 addi r10,r10,4 - 2ae7c: da802215 stw r10,136(sp) - 2ae80: da802317 ldw r10,140(sp) - 2ae84: 12800015 stw r10,0(r2) - 2ae88: 003e8c06 br 2a8bc <___vfiprintf_internal_r+0xd4> - 2ae8c: 21003fcc andi r4,r4,255 - 2ae90: 2003511e bne r4,zero,2bbd8 <___vfiprintf_internal_r+0x13f0> - 2ae94: a080080c andi r2,r20,32 - 2ae98: 1000a126 beq r2,zero,2b120 <___vfiprintf_internal_r+0x938> - 2ae9c: da802217 ldw r10,136(sp) - 2aea0: d8001d85 stb zero,118(sp) - 2aea4: 50800204 addi r2,r10,8 - 2aea8: 54800017 ldw r18,0(r10) - 2aeac: 54c00117 ldw r19,4(r10) - 2aeb0: 4802b416 blt r9,zero,2b984 <___vfiprintf_internal_r+0x119c> - 2aeb4: 013fdfc4 movi r4,-129 - 2aeb8: 94c6b03a or r3,r18,r19 - 2aebc: d8802215 stw r2,136(sp) - 2aec0: a128703a and r20,r20,r4 - 2aec4: 1800a226 beq r3,zero,2b150 <___vfiprintf_internal_r+0x968> - 2aec8: 0039883a mov fp,zero - 2aecc: dd401a04 addi r21,sp,104 - 2aed0: 9006d0fa srli r3,r18,3 - 2aed4: 9808977a slli r4,r19,29 - 2aed8: 9826d0fa srli r19,r19,3 - 2aedc: 948001cc andi r18,r18,7 - 2aee0: 90800c04 addi r2,r18,48 - 2aee4: ad7fffc4 addi r21,r21,-1 - 2aee8: 20e4b03a or r18,r4,r3 - 2aeec: a8800005 stb r2,0(r21) - 2aef0: 94c6b03a or r3,r18,r19 - 2aef4: 183ff61e bne r3,zero,2aed0 <___vfiprintf_internal_r+0x6e8> - 2aef8: a0c0004c andi r3,r20,1 - 2aefc: 18005926 beq r3,zero,2b064 <___vfiprintf_internal_r+0x87c> - 2af00: 10803fcc andi r2,r2,255 - 2af04: 1080201c xori r2,r2,128 - 2af08: 10bfe004 addi r2,r2,-128 - 2af0c: 00c00c04 movi r3,48 - 2af10: 10c05426 beq r2,r3,2b064 <___vfiprintf_internal_r+0x87c> - 2af14: da801e17 ldw r10,120(sp) - 2af18: a8bfffc4 addi r2,r21,-1 - 2af1c: a8ffffc5 stb r3,-1(r21) - 2af20: 50a7c83a sub r19,r10,r2 - 2af24: 102b883a mov r21,r2 - 2af28: 003f2f06 br 2abe8 <___vfiprintf_internal_r+0x400> - 2af2c: 21003fcc andi r4,r4,255 - 2af30: 2003421e bne r4,zero,2bc3c <___vfiprintf_internal_r+0x1454> - 2af34: 008000f4 movhi r2,3 - 2af38: 108a5304 addi r2,r2,10572 - 2af3c: d8802615 stw r2,152(sp) - 2af40: a080080c andi r2,r20,32 - 2af44: 1000aa26 beq r2,zero,2b1f0 <___vfiprintf_internal_r+0xa08> - 2af48: da802217 ldw r10,136(sp) - 2af4c: 54800017 ldw r18,0(r10) - 2af50: 54c00117 ldw r19,4(r10) - 2af54: 52800204 addi r10,r10,8 - 2af58: da802215 stw r10,136(sp) - 2af5c: a080004c andi r2,r20,1 - 2af60: 1001d226 beq r2,zero,2b6ac <___vfiprintf_internal_r+0xec4> - 2af64: 94c4b03a or r2,r18,r19 - 2af68: 1002351e bne r2,zero,2b840 <___vfiprintf_internal_r+0x1058> - 2af6c: d8001d85 stb zero,118(sp) - 2af70: 48022216 blt r9,zero,2b7fc <___vfiprintf_internal_r+0x1014> - 2af74: 00bfdfc4 movi r2,-129 - 2af78: a0a8703a and r20,r20,r2 - 2af7c: 003f1506 br 2abd4 <___vfiprintf_internal_r+0x3ec> - 2af80: da802217 ldw r10,136(sp) - 2af84: 04800044 movi r18,1 - 2af88: d8001d85 stb zero,118(sp) - 2af8c: 50800017 ldw r2,0(r10) - 2af90: 52800104 addi r10,r10,4 - 2af94: da802215 stw r10,136(sp) - 2af98: d8801005 stb r2,64(sp) - 2af9c: 9027883a mov r19,r18 - 2afa0: dd401004 addi r21,sp,64 - 2afa4: 0013883a mov r9,zero - 2afa8: 003f1706 br 2ac08 <___vfiprintf_internal_r+0x420> - 2afac: 21003fcc andi r4,r4,255 - 2afb0: 2003201e bne r4,zero,2bc34 <___vfiprintf_internal_r+0x144c> - 2afb4: a080080c andi r2,r20,32 - 2afb8: 10004b26 beq r2,zero,2b0e8 <___vfiprintf_internal_r+0x900> - 2afbc: da802217 ldw r10,136(sp) - 2afc0: 50800117 ldw r2,4(r10) - 2afc4: 54800017 ldw r18,0(r10) - 2afc8: 52800204 addi r10,r10,8 - 2afcc: da802215 stw r10,136(sp) - 2afd0: 1027883a mov r19,r2 - 2afd4: 10022c16 blt r2,zero,2b888 <___vfiprintf_internal_r+0x10a0> - 2afd8: df001d83 ldbu fp,118(sp) - 2afdc: 48007216 blt r9,zero,2b1a8 <___vfiprintf_internal_r+0x9c0> - 2afe0: 00ffdfc4 movi r3,-129 - 2afe4: 94c4b03a or r2,r18,r19 - 2afe8: a0e8703a and r20,r20,r3 - 2afec: 1000cc26 beq r2,zero,2b320 <___vfiprintf_internal_r+0xb38> - 2aff0: 98021026 beq r19,zero,2b834 <___vfiprintf_internal_r+0x104c> - 2aff4: dc402415 stw r17,144(sp) - 2aff8: dc002515 stw r16,148(sp) - 2affc: 9823883a mov r17,r19 - 2b000: 9021883a mov r16,r18 - 2b004: dd401a04 addi r21,sp,104 - 2b008: 4825883a mov r18,r9 - 2b00c: 4027883a mov r19,r8 - 2b010: 8009883a mov r4,r16 - 2b014: 880b883a mov r5,r17 - 2b018: 01800284 movi r6,10 - 2b01c: 000f883a mov r7,zero - 2b020: 002cbc80 call 2cbc8 <__umoddi3> - 2b024: 10800c04 addi r2,r2,48 - 2b028: ad7fffc4 addi r21,r21,-1 - 2b02c: 8009883a mov r4,r16 - 2b030: 880b883a mov r5,r17 - 2b034: a8800005 stb r2,0(r21) - 2b038: 01800284 movi r6,10 - 2b03c: 000f883a mov r7,zero - 2b040: 002c6500 call 2c650 <__udivdi3> - 2b044: 1021883a mov r16,r2 - 2b048: 10c4b03a or r2,r2,r3 - 2b04c: 1823883a mov r17,r3 - 2b050: 103fef1e bne r2,zero,2b010 <___vfiprintf_internal_r+0x828> - 2b054: dc402417 ldw r17,144(sp) - 2b058: dc002517 ldw r16,148(sp) - 2b05c: 9013883a mov r9,r18 - 2b060: 9811883a mov r8,r19 - 2b064: da801e17 ldw r10,120(sp) - 2b068: 5567c83a sub r19,r10,r21 - 2b06c: 003ede06 br 2abe8 <___vfiprintf_internal_r+0x400> - 2b070: 38803fcc andi r2,r7,255 - 2b074: 1080201c xori r2,r2,128 - 2b078: 10bfe004 addi r2,r2,-128 - 2b07c: 1002371e bne r2,zero,2b95c <___vfiprintf_internal_r+0x1174> - 2b080: 01000044 movi r4,1 - 2b084: 01c00804 movi r7,32 - 2b088: 80c00007 ldb r3,0(r16) - 2b08c: 003e3506 br 2a964 <___vfiprintf_internal_r+0x17c> - 2b090: a5000054 ori r20,r20,1 - 2b094: 80c00007 ldb r3,0(r16) - 2b098: 003e3206 br 2a964 <___vfiprintf_internal_r+0x17c> - 2b09c: a5002014 ori r20,r20,128 - 2b0a0: 80c00007 ldb r3,0(r16) - 2b0a4: 003e2f06 br 2a964 <___vfiprintf_internal_r+0x17c> - 2b0a8: 8015883a mov r10,r16 - 2b0ac: 0023883a mov r17,zero - 2b0b0: 18bff404 addi r2,r3,-48 - 2b0b4: 50c00007 ldb r3,0(r10) - 2b0b8: 8c4002a4 muli r17,r17,10 - 2b0bc: 84000044 addi r16,r16,1 - 2b0c0: 8015883a mov r10,r16 - 2b0c4: 1463883a add r17,r2,r17 - 2b0c8: 18bff404 addi r2,r3,-48 - 2b0cc: 30bff92e bgeu r6,r2,2b0b4 <___vfiprintf_internal_r+0x8cc> - 2b0d0: 003e2506 br 2a968 <___vfiprintf_internal_r+0x180> - 2b0d4: 21003fcc andi r4,r4,255 - 2b0d8: 2002d41e bne r4,zero,2bc2c <___vfiprintf_internal_r+0x1444> - 2b0dc: a5000414 ori r20,r20,16 - 2b0e0: a080080c andi r2,r20,32 - 2b0e4: 103fb51e bne r2,zero,2afbc <___vfiprintf_internal_r+0x7d4> - 2b0e8: a080040c andi r2,r20,16 - 2b0ec: 1001f826 beq r2,zero,2b8d0 <___vfiprintf_internal_r+0x10e8> - 2b0f0: da802217 ldw r10,136(sp) - 2b0f4: 54800017 ldw r18,0(r10) - 2b0f8: 52800104 addi r10,r10,4 - 2b0fc: da802215 stw r10,136(sp) - 2b100: 9027d7fa srai r19,r18,31 - 2b104: 9805883a mov r2,r19 - 2b108: 003fb206 br 2afd4 <___vfiprintf_internal_r+0x7ec> - 2b10c: 21003fcc andi r4,r4,255 - 2b110: 2002c41e bne r4,zero,2bc24 <___vfiprintf_internal_r+0x143c> - 2b114: a5000414 ori r20,r20,16 - 2b118: a080080c andi r2,r20,32 - 2b11c: 103f5f1e bne r2,zero,2ae9c <___vfiprintf_internal_r+0x6b4> - 2b120: a080040c andi r2,r20,16 - 2b124: 10020f26 beq r2,zero,2b964 <___vfiprintf_internal_r+0x117c> - 2b128: da802217 ldw r10,136(sp) - 2b12c: d8001d85 stb zero,118(sp) - 2b130: 0027883a mov r19,zero - 2b134: 50800104 addi r2,r10,4 - 2b138: 54800017 ldw r18,0(r10) - 2b13c: 48021116 blt r9,zero,2b984 <___vfiprintf_internal_r+0x119c> - 2b140: 00ffdfc4 movi r3,-129 - 2b144: d8802215 stw r2,136(sp) - 2b148: a0e8703a and r20,r20,r3 - 2b14c: 903f5e1e bne r18,zero,2aec8 <___vfiprintf_internal_r+0x6e0> - 2b150: 0039883a mov fp,zero - 2b154: 4802a626 beq r9,zero,2bbf0 <___vfiprintf_internal_r+0x1408> - 2b158: 0025883a mov r18,zero - 2b15c: 0027883a mov r19,zero - 2b160: 003f5a06 br 2aecc <___vfiprintf_internal_r+0x6e4> - 2b164: 21003fcc andi r4,r4,255 - 2b168: 20029f1e bne r4,zero,2bbe8 <___vfiprintf_internal_r+0x1400> - 2b16c: a5000414 ori r20,r20,16 - 2b170: a080080c andi r2,r20,32 - 2b174: 10005e1e bne r2,zero,2b2f0 <___vfiprintf_internal_r+0xb08> - 2b178: a080040c andi r2,r20,16 - 2b17c: 1001a21e bne r2,zero,2b808 <___vfiprintf_internal_r+0x1020> - 2b180: a080100c andi r2,r20,64 - 2b184: d8001d85 stb zero,118(sp) - 2b188: da802217 ldw r10,136(sp) - 2b18c: 1002231e bne r2,zero,2ba1c <___vfiprintf_internal_r+0x1234> - 2b190: 50800104 addi r2,r10,4 - 2b194: 54800017 ldw r18,0(r10) - 2b198: 0027883a mov r19,zero - 2b19c: 4801a00e bge r9,zero,2b820 <___vfiprintf_internal_r+0x1038> - 2b1a0: d8802215 stw r2,136(sp) - 2b1a4: 0039883a mov fp,zero - 2b1a8: 94c4b03a or r2,r18,r19 - 2b1ac: 103f901e bne r2,zero,2aff0 <___vfiprintf_internal_r+0x808> - 2b1b0: 00800044 movi r2,1 - 2b1b4: 10803fcc andi r2,r2,255 - 2b1b8: 00c00044 movi r3,1 - 2b1bc: 10c05926 beq r2,r3,2b324 <___vfiprintf_internal_r+0xb3c> - 2b1c0: 00c00084 movi r3,2 - 2b1c4: 10ffe41e bne r2,r3,2b158 <___vfiprintf_internal_r+0x970> - 2b1c8: 0025883a mov r18,zero - 2b1cc: 0027883a mov r19,zero - 2b1d0: 00013d06 br 2b6c8 <___vfiprintf_internal_r+0xee0> - 2b1d4: 21003fcc andi r4,r4,255 - 2b1d8: 2002811e bne r4,zero,2bbe0 <___vfiprintf_internal_r+0x13f8> - 2b1dc: 008000f4 movhi r2,3 - 2b1e0: 108a4e04 addi r2,r2,10552 - 2b1e4: d8802615 stw r2,152(sp) - 2b1e8: a080080c andi r2,r20,32 - 2b1ec: 103f561e bne r2,zero,2af48 <___vfiprintf_internal_r+0x760> - 2b1f0: a080040c andi r2,r20,16 - 2b1f4: 1001d126 beq r2,zero,2b93c <___vfiprintf_internal_r+0x1154> - 2b1f8: da802217 ldw r10,136(sp) - 2b1fc: 0027883a mov r19,zero - 2b200: 54800017 ldw r18,0(r10) - 2b204: 52800104 addi r10,r10,4 - 2b208: da802215 stw r10,136(sp) - 2b20c: 003f5306 br 2af5c <___vfiprintf_internal_r+0x774> - 2b210: da802217 ldw r10,136(sp) - 2b214: d8001d85 stb zero,118(sp) - 2b218: 55400017 ldw r21,0(r10) - 2b21c: 50c00104 addi r3,r10,4 - 2b220: a8024226 beq r21,zero,2bb2c <___vfiprintf_internal_r+0x1344> - 2b224: 48021816 blt r9,zero,2ba88 <___vfiprintf_internal_r+0x12a0> - 2b228: 480d883a mov r6,r9 - 2b22c: 000b883a mov r5,zero - 2b230: a809883a mov r4,r21 - 2b234: d8c02a15 stw r3,168(sp) - 2b238: da002b15 stw r8,172(sp) - 2b23c: da402c15 stw r9,176(sp) - 2b240: 00288080 call 28808 - 2b244: d8c02a17 ldw r3,168(sp) - 2b248: da002b17 ldw r8,172(sp) - 2b24c: da402c17 ldw r9,176(sp) - 2b250: 10024826 beq r2,zero,2bb74 <___vfiprintf_internal_r+0x138c> - 2b254: 1567c83a sub r19,r2,r21 - 2b258: df001d83 ldbu fp,118(sp) - 2b25c: d8c02215 stw r3,136(sp) - 2b260: 0013883a mov r9,zero - 2b264: 003e6006 br 2abe8 <___vfiprintf_internal_r+0x400> - 2b268: 21003fcc andi r4,r4,255 - 2b26c: 203fc026 beq r4,zero,2b170 <___vfiprintf_internal_r+0x988> - 2b270: d9c01d85 stb r7,118(sp) - 2b274: 003fbe06 br 2b170 <___vfiprintf_internal_r+0x988> - 2b278: da802217 ldw r10,136(sp) - 2b27c: 54400017 ldw r17,0(r10) - 2b280: 50800104 addi r2,r10,4 - 2b284: 883e3b16 blt r17,zero,2ab74 <___vfiprintf_internal_r+0x38c> - 2b288: d8802215 stw r2,136(sp) - 2b28c: 80c00007 ldb r3,0(r16) - 2b290: 003db406 br 2a964 <___vfiprintf_internal_r+0x17c> - 2b294: 01000044 movi r4,1 - 2b298: 01c00ac4 movi r7,43 - 2b29c: 80c00007 ldb r3,0(r16) - 2b2a0: 003db006 br 2a964 <___vfiprintf_internal_r+0x17c> - 2b2a4: 80c00007 ldb r3,0(r16) - 2b2a8: 82800044 addi r10,r16,1 - 2b2ac: 1b423c26 beq r3,r13,2bba0 <___vfiprintf_internal_r+0x13b8> - 2b2b0: 18bff404 addi r2,r3,-48 - 2b2b4: 0013883a mov r9,zero - 2b2b8: 30822b36 bltu r6,r2,2bb68 <___vfiprintf_internal_r+0x1380> - 2b2bc: 50c00007 ldb r3,0(r10) - 2b2c0: 4a4002a4 muli r9,r9,10 - 2b2c4: 54000044 addi r16,r10,1 - 2b2c8: 8015883a mov r10,r16 - 2b2cc: 4893883a add r9,r9,r2 - 2b2d0: 18bff404 addi r2,r3,-48 - 2b2d4: 30bff92e bgeu r6,r2,2b2bc <___vfiprintf_internal_r+0xad4> - 2b2d8: 483da30e bge r9,zero,2a968 <___vfiprintf_internal_r+0x180> - 2b2dc: 027fffc4 movi r9,-1 - 2b2e0: 003da106 br 2a968 <___vfiprintf_internal_r+0x180> - 2b2e4: a5001014 ori r20,r20,64 - 2b2e8: 80c00007 ldb r3,0(r16) - 2b2ec: 003d9d06 br 2a964 <___vfiprintf_internal_r+0x17c> - 2b2f0: da802217 ldw r10,136(sp) - 2b2f4: d8001d85 stb zero,118(sp) - 2b2f8: 50c00204 addi r3,r10,8 - 2b2fc: 54800017 ldw r18,0(r10) - 2b300: 54c00117 ldw r19,4(r10) - 2b304: 4801ca16 blt r9,zero,2ba30 <___vfiprintf_internal_r+0x1248> - 2b308: 013fdfc4 movi r4,-129 - 2b30c: 94c4b03a or r2,r18,r19 - 2b310: d8c02215 stw r3,136(sp) - 2b314: a128703a and r20,r20,r4 - 2b318: 0039883a mov fp,zero - 2b31c: 103f341e bne r2,zero,2aff0 <___vfiprintf_internal_r+0x808> - 2b320: 483e2e26 beq r9,zero,2abdc <___vfiprintf_internal_r+0x3f4> - 2b324: 0025883a mov r18,zero - 2b328: 94800c04 addi r18,r18,48 - 2b32c: dc8019c5 stb r18,103(sp) - 2b330: dcc02717 ldw r19,156(sp) - 2b334: dd4019c4 addi r21,sp,103 - 2b338: 003e2b06 br 2abe8 <___vfiprintf_internal_r+0x400> - 2b33c: 21003fcc andi r4,r4,255 - 2b340: 2002361e bne r4,zero,2bc1c <___vfiprintf_internal_r+0x1434> - 2b344: 1801c126 beq r3,zero,2ba4c <___vfiprintf_internal_r+0x1264> - 2b348: 04800044 movi r18,1 - 2b34c: d8c01005 stb r3,64(sp) - 2b350: d8001d85 stb zero,118(sp) - 2b354: 9027883a mov r19,r18 - 2b358: dd401004 addi r21,sp,64 - 2b35c: 003f1106 br 2afa4 <___vfiprintf_internal_r+0x7bc> - 2b360: d9402117 ldw r5,132(sp) - 2b364: d9002017 ldw r4,128(sp) - 2b368: d9801a04 addi r6,sp,104 - 2b36c: d9c02b15 stw r7,172(sp) - 2b370: dbc02a15 stw r15,168(sp) - 2b374: 002a6d40 call 2a6d4 <__sprint_r.part.0> - 2b378: d9c02b17 ldw r7,172(sp) - 2b37c: dbc02a17 ldw r15,168(sp) - 2b380: 10006d1e bne r2,zero,2b538 <___vfiprintf_internal_r+0xd50> - 2b384: d9801b17 ldw r6,108(sp) - 2b388: d8801c17 ldw r2,112(sp) - 2b38c: d811883a mov r8,sp - 2b390: 31400044 addi r5,r6,1 - 2b394: 003e3306 br 2ac64 <___vfiprintf_internal_r+0x47c> - 2b398: d9401b17 ldw r5,108(sp) - 2b39c: d8801c17 ldw r2,112(sp) - 2b3a0: 29000044 addi r4,r5,1 - 2b3a4: d8c01d87 ldb r3,118(sp) - 2b3a8: 183e4d26 beq r3,zero,2ace0 <___vfiprintf_internal_r+0x4f8> - 2b3ac: 00c00044 movi r3,1 - 2b3b0: d9401d84 addi r5,sp,118 - 2b3b4: 10c5883a add r2,r2,r3 - 2b3b8: 41400015 stw r5,0(r8) - 2b3bc: 40c00115 stw r3,4(r8) - 2b3c0: d8801c15 stw r2,112(sp) - 2b3c4: d9001b15 stw r4,108(sp) - 2b3c8: 014001c4 movi r5,7 - 2b3cc: 2900a90e bge r5,r4,2b674 <___vfiprintf_internal_r+0xe8c> - 2b3d0: 1000da1e bne r2,zero,2b73c <___vfiprintf_internal_r+0xf54> - 2b3d4: 7000ab1e bne r14,zero,2b684 <___vfiprintf_internal_r+0xe9c> - 2b3d8: 000b883a mov r5,zero - 2b3dc: 1809883a mov r4,r3 - 2b3e0: d811883a mov r8,sp - 2b3e4: 00c02004 movi r3,128 - 2b3e8: e0fe4d26 beq fp,r3,2ad20 <___vfiprintf_internal_r+0x538> - 2b3ec: 4cf9c83a sub fp,r9,r19 - 2b3f0: 073e7b0e bge zero,fp,2ade0 <___vfiprintf_internal_r+0x5f8> - 2b3f4: 01c00404 movi r7,16 - 2b3f8: 3f01900e bge r7,fp,2ba3c <___vfiprintf_internal_r+0x1254> - 2b3fc: 00c000f4 movhi r3,3 - 2b400: 18cab304 addi r3,r3,10956 - 2b404: d8c02415 stw r3,144(sp) - 2b408: 034001c4 movi r13,7 - 2b40c: 00000506 br 2b424 <___vfiprintf_internal_r+0xc3c> - 2b410: 29000084 addi r4,r5,2 - 2b414: 42000204 addi r8,r8,8 - 2b418: 180b883a mov r5,r3 - 2b41c: e73ffc04 addi fp,fp,-16 - 2b420: 3f000d0e bge r7,fp,2b458 <___vfiprintf_internal_r+0xc70> - 2b424: 10800404 addi r2,r2,16 - 2b428: 28c00044 addi r3,r5,1 - 2b42c: 45c00015 stw r23,0(r8) - 2b430: 41c00115 stw r7,4(r8) - 2b434: d8801c15 stw r2,112(sp) - 2b438: d8c01b15 stw r3,108(sp) - 2b43c: 68fff40e bge r13,r3,2b410 <___vfiprintf_internal_r+0xc28> - 2b440: 1000101e bne r2,zero,2b484 <___vfiprintf_internal_r+0xc9c> - 2b444: e73ffc04 addi fp,fp,-16 - 2b448: 01000044 movi r4,1 - 2b44c: 000b883a mov r5,zero - 2b450: d811883a mov r8,sp - 2b454: 3f3ff316 blt r7,fp,2b424 <___vfiprintf_internal_r+0xc3c> - 2b458: da802417 ldw r10,144(sp) - 2b45c: 1705883a add r2,r2,fp - 2b460: 47000115 stw fp,4(r8) - 2b464: 42800015 stw r10,0(r8) - 2b468: d8801c15 stw r2,112(sp) - 2b46c: d9001b15 stw r4,108(sp) - 2b470: 00c001c4 movi r3,7 - 2b474: 19003616 blt r3,r4,2b550 <___vfiprintf_internal_r+0xd68> - 2b478: 42000204 addi r8,r8,8 - 2b47c: 21000044 addi r4,r4,1 - 2b480: 003e5706 br 2ade0 <___vfiprintf_internal_r+0x5f8> - 2b484: d9402117 ldw r5,132(sp) - 2b488: d9002017 ldw r4,128(sp) - 2b48c: d9801a04 addi r6,sp,104 - 2b490: d9c02b15 stw r7,172(sp) - 2b494: db402a15 stw r13,168(sp) - 2b498: 002a6d40 call 2a6d4 <__sprint_r.part.0> - 2b49c: d9c02b17 ldw r7,172(sp) - 2b4a0: db402a17 ldw r13,168(sp) - 2b4a4: 1000241e bne r2,zero,2b538 <___vfiprintf_internal_r+0xd50> - 2b4a8: d9401b17 ldw r5,108(sp) - 2b4ac: d8801c17 ldw r2,112(sp) - 2b4b0: d811883a mov r8,sp - 2b4b4: 29000044 addi r4,r5,1 - 2b4b8: 003fd806 br 2b41c <___vfiprintf_internal_r+0xc34> - 2b4bc: d9401b17 ldw r5,108(sp) - 2b4c0: 00c000f4 movhi r3,3 - 2b4c4: 18cab704 addi r3,r3,10972 - 2b4c8: d8c02415 stw r3,144(sp) - 2b4cc: 29400044 addi r5,r5,1 - 2b4d0: d8c02417 ldw r3,144(sp) - 2b4d4: 14c5883a add r2,r2,r19 - 2b4d8: 44c00115 stw r19,4(r8) - 2b4dc: 40c00015 stw r3,0(r8) - 2b4e0: d8801c15 stw r2,112(sp) - 2b4e4: d9401b15 stw r5,108(sp) - 2b4e8: 00c001c4 movi r3,7 - 2b4ec: 1940070e bge r3,r5,2b50c <___vfiprintf_internal_r+0xd24> - 2b4f0: 103e4826 beq r2,zero,2ae14 <___vfiprintf_internal_r+0x62c> - 2b4f4: d9402117 ldw r5,132(sp) - 2b4f8: d9002017 ldw r4,128(sp) - 2b4fc: d9801a04 addi r6,sp,104 - 2b500: 002a6d40 call 2a6d4 <__sprint_r.part.0> - 2b504: 10000c1e bne r2,zero,2b538 <___vfiprintf_internal_r+0xd50> - 2b508: d8801c17 ldw r2,112(sp) - 2b50c: 8c80010e bge r17,r18,2b514 <___vfiprintf_internal_r+0xd2c> - 2b510: 9023883a mov r17,r18 - 2b514: da802317 ldw r10,140(sp) - 2b518: 5455883a add r10,r10,r17 - 2b51c: da802315 stw r10,140(sp) - 2b520: 103e4126 beq r2,zero,2ae28 <___vfiprintf_internal_r+0x640> - 2b524: d9402117 ldw r5,132(sp) - 2b528: d9002017 ldw r4,128(sp) - 2b52c: d9801a04 addi r6,sp,104 - 2b530: 002a6d40 call 2a6d4 <__sprint_r.part.0> - 2b534: 103e3c26 beq r2,zero,2ae28 <___vfiprintf_internal_r+0x640> - 2b538: dd002117 ldw r20,132(sp) - 2b53c: a080030b ldhu r2,12(r20) - 2b540: 1080100c andi r2,r2,64 - 2b544: 1001231e bne r2,zero,2b9d4 <___vfiprintf_internal_r+0x11ec> - 2b548: d8802317 ldw r2,140(sp) - 2b54c: 003d7b06 br 2ab3c <___vfiprintf_internal_r+0x354> - 2b550: 1000991e bne r2,zero,2b7b8 <___vfiprintf_internal_r+0xfd0> - 2b554: 00c00044 movi r3,1 - 2b558: 9805883a mov r2,r19 - 2b55c: dd400015 stw r21,0(sp) - 2b560: dcc00115 stw r19,4(sp) - 2b564: dcc01c15 stw r19,112(sp) - 2b568: d8c01b15 stw r3,108(sp) - 2b56c: d811883a mov r8,sp - 2b570: 42000204 addi r8,r8,8 - 2b574: a2c0010c andi r11,r20,4 - 2b578: 583fe426 beq r11,zero,2b50c <___vfiprintf_internal_r+0xd24> - 2b57c: 8ca7c83a sub r19,r17,r18 - 2b580: 04ffe20e bge zero,r19,2b50c <___vfiprintf_internal_r+0xd24> - 2b584: 01c00404 movi r7,16 - 2b588: 3cffcc0e bge r7,r19,2b4bc <___vfiprintf_internal_r+0xcd4> - 2b58c: 028000f4 movhi r10,3 - 2b590: 528ab704 addi r10,r10,10972 - 2b594: d9001b17 ldw r4,108(sp) - 2b598: da802415 stw r10,144(sp) - 2b59c: 382b883a mov r21,r7 - 2b5a0: 050001c4 movi r20,7 - 2b5a4: df002017 ldw fp,128(sp) - 2b5a8: 00000506 br 2b5c0 <___vfiprintf_internal_r+0xdd8> - 2b5ac: 21400084 addi r5,r4,2 - 2b5b0: 42000204 addi r8,r8,8 - 2b5b4: 1809883a mov r4,r3 - 2b5b8: 9cfffc04 addi r19,r19,-16 - 2b5bc: acffc40e bge r21,r19,2b4d0 <___vfiprintf_internal_r+0xce8> - 2b5c0: 10800404 addi r2,r2,16 - 2b5c4: 20c00044 addi r3,r4,1 - 2b5c8: 45800015 stw r22,0(r8) - 2b5cc: 45400115 stw r21,4(r8) - 2b5d0: d8801c15 stw r2,112(sp) - 2b5d4: d8c01b15 stw r3,108(sp) - 2b5d8: a0fff40e bge r20,r3,2b5ac <___vfiprintf_internal_r+0xdc4> - 2b5dc: 1000041e bne r2,zero,2b5f0 <___vfiprintf_internal_r+0xe08> - 2b5e0: 01400044 movi r5,1 - 2b5e4: 0009883a mov r4,zero - 2b5e8: d811883a mov r8,sp - 2b5ec: 003ff206 br 2b5b8 <___vfiprintf_internal_r+0xdd0> - 2b5f0: d9402117 ldw r5,132(sp) - 2b5f4: d9801a04 addi r6,sp,104 - 2b5f8: e009883a mov r4,fp - 2b5fc: 002a6d40 call 2a6d4 <__sprint_r.part.0> - 2b600: 103fcd1e bne r2,zero,2b538 <___vfiprintf_internal_r+0xd50> - 2b604: d9001b17 ldw r4,108(sp) - 2b608: d8801c17 ldw r2,112(sp) - 2b60c: d811883a mov r8,sp - 2b610: 21400044 addi r5,r4,1 - 2b614: 003fe806 br 2b5b8 <___vfiprintf_internal_r+0xdd0> - 2b618: d9402117 ldw r5,132(sp) - 2b61c: d9002017 ldw r4,128(sp) - 2b620: d9801a04 addi r6,sp,104 - 2b624: d9c02b15 stw r7,172(sp) - 2b628: db402a15 stw r13,168(sp) - 2b62c: 002a6d40 call 2a6d4 <__sprint_r.part.0> - 2b630: d9c02b17 ldw r7,172(sp) - 2b634: db402a17 ldw r13,168(sp) - 2b638: 103fbf1e bne r2,zero,2b538 <___vfiprintf_internal_r+0xd50> - 2b63c: d9401b17 ldw r5,108(sp) - 2b640: d8801c17 ldw r2,112(sp) - 2b644: d811883a mov r8,sp - 2b648: 29800044 addi r6,r5,1 - 2b64c: 003dc406 br 2ad60 <___vfiprintf_internal_r+0x578> - 2b650: 1000d21e bne r2,zero,2b99c <___vfiprintf_internal_r+0x11b4> - 2b654: d8c01d87 ldb r3,118(sp) - 2b658: 18009526 beq r3,zero,2b8b0 <___vfiprintf_internal_r+0x10c8> - 2b65c: 00800044 movi r2,1 - 2b660: d8c01d84 addi r3,sp,118 - 2b664: 1009883a mov r4,r2 - 2b668: d8c00015 stw r3,0(sp) - 2b66c: d8800115 stw r2,4(sp) - 2b670: d811883a mov r8,sp - 2b674: 200b883a mov r5,r4 - 2b678: 42000204 addi r8,r8,8 - 2b67c: 21000044 addi r4,r4,1 - 2b680: 003d9706 br 2ace0 <___vfiprintf_internal_r+0x4f8> - 2b684: d9001d04 addi r4,sp,116 - 2b688: 00800084 movi r2,2 - 2b68c: d9000015 stw r4,0(sp) - 2b690: d8800115 stw r2,4(sp) - 2b694: 1809883a mov r4,r3 - 2b698: d811883a mov r8,sp - 2b69c: 200b883a mov r5,r4 - 2b6a0: 42000204 addi r8,r8,8 - 2b6a4: 21000044 addi r4,r4,1 - 2b6a8: 003f4e06 br 2b3e4 <___vfiprintf_internal_r+0xbfc> - 2b6ac: d8001d85 stb zero,118(sp) - 2b6b0: 48005016 blt r9,zero,2b7f4 <___vfiprintf_internal_r+0x100c> - 2b6b4: 00ffdfc4 movi r3,-129 - 2b6b8: 94c4b03a or r2,r18,r19 - 2b6bc: a0e8703a and r20,r20,r3 - 2b6c0: 103d4426 beq r2,zero,2abd4 <___vfiprintf_internal_r+0x3ec> - 2b6c4: 0039883a mov fp,zero - 2b6c8: d9002617 ldw r4,152(sp) - 2b6cc: dd401a04 addi r21,sp,104 - 2b6d0: 908003cc andi r2,r18,15 - 2b6d4: 9806973a slli r3,r19,28 - 2b6d8: 2085883a add r2,r4,r2 - 2b6dc: 9024d13a srli r18,r18,4 - 2b6e0: 10800003 ldbu r2,0(r2) - 2b6e4: 9826d13a srli r19,r19,4 - 2b6e8: ad7fffc4 addi r21,r21,-1 - 2b6ec: 1ca4b03a or r18,r3,r18 - 2b6f0: a8800005 stb r2,0(r21) - 2b6f4: 94c4b03a or r2,r18,r19 - 2b6f8: 103ff51e bne r2,zero,2b6d0 <___vfiprintf_internal_r+0xee8> - 2b6fc: 003e5906 br 2b064 <___vfiprintf_internal_r+0x87c> - 2b700: d9402117 ldw r5,132(sp) - 2b704: d9002017 ldw r4,128(sp) - 2b708: d9801a04 addi r6,sp,104 - 2b70c: 002a6d40 call 2a6d4 <__sprint_r.part.0> - 2b710: 103f891e bne r2,zero,2b538 <___vfiprintf_internal_r+0xd50> - 2b714: d8801c17 ldw r2,112(sp) - 2b718: d811883a mov r8,sp - 2b71c: 003f9506 br 2b574 <___vfiprintf_internal_r+0xd8c> - 2b720: d9402117 ldw r5,132(sp) - 2b724: d9002017 ldw r4,128(sp) - 2b728: d9801a04 addi r6,sp,104 - 2b72c: 002a6d40 call 2a6d4 <__sprint_r.part.0> - 2b730: 103f811e bne r2,zero,2b538 <___vfiprintf_internal_r+0xd50> - 2b734: d811883a mov r8,sp - 2b738: 003ced06 br 2aaf0 <___vfiprintf_internal_r+0x308> - 2b73c: d9402117 ldw r5,132(sp) - 2b740: d9002017 ldw r4,128(sp) - 2b744: d9801a04 addi r6,sp,104 - 2b748: da402c15 stw r9,176(sp) - 2b74c: db802a15 stw r14,168(sp) - 2b750: 002a6d40 call 2a6d4 <__sprint_r.part.0> - 2b754: da402c17 ldw r9,176(sp) - 2b758: db802a17 ldw r14,168(sp) - 2b75c: 103f761e bne r2,zero,2b538 <___vfiprintf_internal_r+0xd50> - 2b760: d9401b17 ldw r5,108(sp) - 2b764: d8801c17 ldw r2,112(sp) - 2b768: d811883a mov r8,sp - 2b76c: 29000044 addi r4,r5,1 - 2b770: 003d5b06 br 2ace0 <___vfiprintf_internal_r+0x4f8> - 2b774: d9402117 ldw r5,132(sp) - 2b778: d9002017 ldw r4,128(sp) - 2b77c: d9801a04 addi r6,sp,104 - 2b780: da402c15 stw r9,176(sp) - 2b784: 002a6d40 call 2a6d4 <__sprint_r.part.0> - 2b788: da402c17 ldw r9,176(sp) - 2b78c: 103f6a1e bne r2,zero,2b538 <___vfiprintf_internal_r+0xd50> - 2b790: d9401b17 ldw r5,108(sp) - 2b794: d8801c17 ldw r2,112(sp) - 2b798: d811883a mov r8,sp - 2b79c: 29000044 addi r4,r5,1 - 2b7a0: 003f1006 br 2b3e4 <___vfiprintf_internal_r+0xbfc> - 2b7a4: 1000c31e bne r2,zero,2bab4 <___vfiprintf_internal_r+0x12cc> - 2b7a8: 01000044 movi r4,1 - 2b7ac: 000b883a mov r5,zero - 2b7b0: d811883a mov r8,sp - 2b7b4: 003f0d06 br 2b3ec <___vfiprintf_internal_r+0xc04> - 2b7b8: d9402117 ldw r5,132(sp) - 2b7bc: d9002017 ldw r4,128(sp) - 2b7c0: d9801a04 addi r6,sp,104 - 2b7c4: 002a6d40 call 2a6d4 <__sprint_r.part.0> - 2b7c8: 103f5b1e bne r2,zero,2b538 <___vfiprintf_internal_r+0xd50> - 2b7cc: d9001b17 ldw r4,108(sp) - 2b7d0: d8801c17 ldw r2,112(sp) - 2b7d4: d811883a mov r8,sp - 2b7d8: 21000044 addi r4,r4,1 - 2b7dc: 003d8006 br 2ade0 <___vfiprintf_internal_r+0x5f8> - 2b7e0: 010000f4 movhi r4,3 - 2b7e4: 210a5304 addi r4,r4,10572 - 2b7e8: d9002615 stw r4,152(sp) - 2b7ec: d8c02215 stw r3,136(sp) - 2b7f0: 1029883a mov r20,r2 - 2b7f4: 94c4b03a or r2,r18,r19 - 2b7f8: 103fb21e bne r2,zero,2b6c4 <___vfiprintf_internal_r+0xedc> - 2b7fc: 0039883a mov fp,zero - 2b800: 00800084 movi r2,2 - 2b804: 003e6b06 br 2b1b4 <___vfiprintf_internal_r+0x9cc> - 2b808: da802217 ldw r10,136(sp) - 2b80c: d8001d85 stb zero,118(sp) - 2b810: 0027883a mov r19,zero - 2b814: 50800104 addi r2,r10,4 - 2b818: 54800017 ldw r18,0(r10) - 2b81c: 483e6016 blt r9,zero,2b1a0 <___vfiprintf_internal_r+0x9b8> - 2b820: 00ffdfc4 movi r3,-129 - 2b824: d8802215 stw r2,136(sp) - 2b828: a0e8703a and r20,r20,r3 - 2b82c: 0039883a mov fp,zero - 2b830: 903ebb26 beq r18,zero,2b320 <___vfiprintf_internal_r+0xb38> - 2b834: 00800244 movi r2,9 - 2b838: 14bdee36 bltu r2,r18,2aff4 <___vfiprintf_internal_r+0x80c> - 2b83c: 003eba06 br 2b328 <___vfiprintf_internal_r+0xb40> - 2b840: 00800c04 movi r2,48 - 2b844: d8c01d45 stb r3,117(sp) - 2b848: d8801d05 stb r2,116(sp) - 2b84c: d8001d85 stb zero,118(sp) - 2b850: a0c00094 ori r3,r20,2 - 2b854: 4800a916 blt r9,zero,2bafc <___vfiprintf_internal_r+0x1314> - 2b858: 00bfdfc4 movi r2,-129 - 2b85c: a096703a and r11,r20,r2 - 2b860: 5d000094 ori r20,r11,2 - 2b864: 0039883a mov fp,zero - 2b868: 003f9706 br 2b6c8 <___vfiprintf_internal_r+0xee0> - 2b86c: 8025883a mov r18,r16 - 2b870: 003c2e06 br 2a92c <___vfiprintf_internal_r+0x144> - 2b874: 008000f4 movhi r2,3 - 2b878: 108a5304 addi r2,r2,10572 - 2b87c: 0039883a mov fp,zero - 2b880: d8802615 stw r2,152(sp) - 2b884: 003f9006 br 2b6c8 <___vfiprintf_internal_r+0xee0> - 2b888: 04a5c83a sub r18,zero,r18 - 2b88c: 07000b44 movi fp,45 - 2b890: 9004c03a cmpne r2,r18,zero - 2b894: 04e7c83a sub r19,zero,r19 - 2b898: df001d85 stb fp,118(sp) - 2b89c: 98a7c83a sub r19,r19,r2 - 2b8a0: 48009f16 blt r9,zero,2bb20 <___vfiprintf_internal_r+0x1338> - 2b8a4: 00bfdfc4 movi r2,-129 - 2b8a8: a0a8703a and r20,r20,r2 - 2b8ac: 003dd006 br 2aff0 <___vfiprintf_internal_r+0x808> - 2b8b0: 70004c26 beq r14,zero,2b9e4 <___vfiprintf_internal_r+0x11fc> - 2b8b4: 00800084 movi r2,2 - 2b8b8: d8c01d04 addi r3,sp,116 - 2b8bc: d8c00015 stw r3,0(sp) - 2b8c0: d8800115 stw r2,4(sp) - 2b8c4: 01000044 movi r4,1 - 2b8c8: d811883a mov r8,sp - 2b8cc: 003f7306 br 2b69c <___vfiprintf_internal_r+0xeb4> - 2b8d0: a080100c andi r2,r20,64 - 2b8d4: da802217 ldw r10,136(sp) - 2b8d8: 103e0626 beq r2,zero,2b0f4 <___vfiprintf_internal_r+0x90c> - 2b8dc: 5480000f ldh r18,0(r10) - 2b8e0: 52800104 addi r10,r10,4 - 2b8e4: da802215 stw r10,136(sp) - 2b8e8: 9027d7fa srai r19,r18,31 - 2b8ec: 9805883a mov r2,r19 - 2b8f0: 003db806 br 2afd4 <___vfiprintf_internal_r+0x7ec> - 2b8f4: a080040c andi r2,r20,16 - 2b8f8: 1000091e bne r2,zero,2b920 <___vfiprintf_internal_r+0x1138> - 2b8fc: a2c0100c andi r11,r20,64 - 2b900: 58000726 beq r11,zero,2b920 <___vfiprintf_internal_r+0x1138> - 2b904: da802217 ldw r10,136(sp) - 2b908: 50800017 ldw r2,0(r10) - 2b90c: 52800104 addi r10,r10,4 - 2b910: da802215 stw r10,136(sp) - 2b914: da802317 ldw r10,140(sp) - 2b918: 1280000d sth r10,0(r2) - 2b91c: 003be706 br 2a8bc <___vfiprintf_internal_r+0xd4> - 2b920: da802217 ldw r10,136(sp) - 2b924: 50800017 ldw r2,0(r10) - 2b928: 52800104 addi r10,r10,4 - 2b92c: da802215 stw r10,136(sp) - 2b930: da802317 ldw r10,140(sp) - 2b934: 12800015 stw r10,0(r2) - 2b938: 003be006 br 2a8bc <___vfiprintf_internal_r+0xd4> - 2b93c: a080100c andi r2,r20,64 - 2b940: da802217 ldw r10,136(sp) - 2b944: 10003026 beq r2,zero,2ba08 <___vfiprintf_internal_r+0x1220> - 2b948: 5480000b ldhu r18,0(r10) - 2b94c: 52800104 addi r10,r10,4 - 2b950: 0027883a mov r19,zero - 2b954: da802215 stw r10,136(sp) - 2b958: 003d8006 br 2af5c <___vfiprintf_internal_r+0x774> - 2b95c: 80c00007 ldb r3,0(r16) - 2b960: 003c0006 br 2a964 <___vfiprintf_internal_r+0x17c> - 2b964: a080100c andi r2,r20,64 - 2b968: d8001d85 stb zero,118(sp) - 2b96c: da802217 ldw r10,136(sp) - 2b970: 1000201e bne r2,zero,2b9f4 <___vfiprintf_internal_r+0x120c> - 2b974: 50800104 addi r2,r10,4 - 2b978: 54800017 ldw r18,0(r10) - 2b97c: 0027883a mov r19,zero - 2b980: 483def0e bge r9,zero,2b140 <___vfiprintf_internal_r+0x958> - 2b984: 94c6b03a or r3,r18,r19 - 2b988: d8802215 stw r2,136(sp) - 2b98c: 183d4e1e bne r3,zero,2aec8 <___vfiprintf_internal_r+0x6e0> - 2b990: 0039883a mov fp,zero - 2b994: 0005883a mov r2,zero - 2b998: 003e0606 br 2b1b4 <___vfiprintf_internal_r+0x9cc> - 2b99c: d9402117 ldw r5,132(sp) - 2b9a0: d9002017 ldw r4,128(sp) - 2b9a4: d9801a04 addi r6,sp,104 - 2b9a8: da402c15 stw r9,176(sp) - 2b9ac: db802a15 stw r14,168(sp) - 2b9b0: 002a6d40 call 2a6d4 <__sprint_r.part.0> - 2b9b4: da402c17 ldw r9,176(sp) - 2b9b8: db802a17 ldw r14,168(sp) - 2b9bc: 103ede1e bne r2,zero,2b538 <___vfiprintf_internal_r+0xd50> - 2b9c0: d9401b17 ldw r5,108(sp) - 2b9c4: d8801c17 ldw r2,112(sp) - 2b9c8: d811883a mov r8,sp - 2b9cc: 29000044 addi r4,r5,1 - 2b9d0: 003e7406 br 2b3a4 <___vfiprintf_internal_r+0xbbc> - 2b9d4: 00bfffc4 movi r2,-1 - 2b9d8: 003c5806 br 2ab3c <___vfiprintf_internal_r+0x354> - 2b9dc: d811883a mov r8,sp - 2b9e0: 003ee806 br 2b584 <___vfiprintf_internal_r+0xd9c> - 2b9e4: 000b883a mov r5,zero - 2b9e8: 01000044 movi r4,1 - 2b9ec: d811883a mov r8,sp - 2b9f0: 003e7c06 br 2b3e4 <___vfiprintf_internal_r+0xbfc> - 2b9f4: 50800104 addi r2,r10,4 - 2b9f8: 5480000b ldhu r18,0(r10) - 2b9fc: 0027883a mov r19,zero - 2ba00: 483dcf0e bge r9,zero,2b140 <___vfiprintf_internal_r+0x958> - 2ba04: 003fdf06 br 2b984 <___vfiprintf_internal_r+0x119c> - 2ba08: 54800017 ldw r18,0(r10) - 2ba0c: 52800104 addi r10,r10,4 - 2ba10: 0027883a mov r19,zero - 2ba14: da802215 stw r10,136(sp) - 2ba18: 003d5006 br 2af5c <___vfiprintf_internal_r+0x774> - 2ba1c: 50800104 addi r2,r10,4 - 2ba20: 5480000b ldhu r18,0(r10) - 2ba24: 0027883a mov r19,zero - 2ba28: 483f7d0e bge r9,zero,2b820 <___vfiprintf_internal_r+0x1038> - 2ba2c: 003ddc06 br 2b1a0 <___vfiprintf_internal_r+0x9b8> - 2ba30: d8c02215 stw r3,136(sp) - 2ba34: 0039883a mov fp,zero - 2ba38: 003ddb06 br 2b1a8 <___vfiprintf_internal_r+0x9c0> - 2ba3c: 028000f4 movhi r10,3 - 2ba40: 528ab304 addi r10,r10,10956 - 2ba44: da802415 stw r10,144(sp) - 2ba48: 003e8306 br 2b458 <___vfiprintf_internal_r+0xc70> - 2ba4c: d8801c17 ldw r2,112(sp) - 2ba50: dd002117 ldw r20,132(sp) - 2ba54: 103eb926 beq r2,zero,2b53c <___vfiprintf_internal_r+0xd54> - 2ba58: d9002017 ldw r4,128(sp) - 2ba5c: d9801a04 addi r6,sp,104 - 2ba60: a00b883a mov r5,r20 - 2ba64: 002a6d40 call 2a6d4 <__sprint_r.part.0> - 2ba68: 003eb406 br 2b53c <___vfiprintf_internal_r+0xd54> - 2ba6c: 80c00043 ldbu r3,1(r16) - 2ba70: a5000814 ori r20,r20,32 - 2ba74: 84000044 addi r16,r16,1 - 2ba78: 18c03fcc andi r3,r3,255 - 2ba7c: 18c0201c xori r3,r3,128 - 2ba80: 18ffe004 addi r3,r3,-128 - 2ba84: 003bb706 br 2a964 <___vfiprintf_internal_r+0x17c> - 2ba88: a809883a mov r4,r21 - 2ba8c: d8c02a15 stw r3,168(sp) - 2ba90: da002b15 stw r8,172(sp) - 2ba94: 002376c0 call 2376c - 2ba98: d8c02a17 ldw r3,168(sp) - 2ba9c: 1027883a mov r19,r2 - 2baa0: df001d83 ldbu fp,118(sp) - 2baa4: d8c02215 stw r3,136(sp) - 2baa8: 0013883a mov r9,zero - 2baac: da002b17 ldw r8,172(sp) - 2bab0: 003c4d06 br 2abe8 <___vfiprintf_internal_r+0x400> - 2bab4: d9402117 ldw r5,132(sp) - 2bab8: d9002017 ldw r4,128(sp) - 2babc: d9801a04 addi r6,sp,104 - 2bac0: da402c15 stw r9,176(sp) - 2bac4: 002a6d40 call 2a6d4 <__sprint_r.part.0> - 2bac8: da402c17 ldw r9,176(sp) - 2bacc: 103e9a1e bne r2,zero,2b538 <___vfiprintf_internal_r+0xd50> - 2bad0: d9401b17 ldw r5,108(sp) - 2bad4: d8801c17 ldw r2,112(sp) - 2bad8: d811883a mov r8,sp - 2badc: 29000044 addi r4,r5,1 - 2bae0: 003e4206 br 2b3ec <___vfiprintf_internal_r+0xc04> - 2bae4: d9401b17 ldw r5,108(sp) - 2bae8: 010000f4 movhi r4,3 - 2baec: 210ab704 addi r4,r4,10972 - 2baf0: d9002415 stw r4,144(sp) - 2baf4: 29400044 addi r5,r5,1 - 2baf8: 003c6d06 br 2acb0 <___vfiprintf_internal_r+0x4c8> - 2bafc: 0039883a mov fp,zero - 2bb00: 00800084 movi r2,2 - 2bb04: 10803fcc andi r2,r2,255 - 2bb08: 01000044 movi r4,1 - 2bb0c: 11001e26 beq r2,r4,2bb88 <___vfiprintf_internal_r+0x13a0> - 2bb10: 01000084 movi r4,2 - 2bb14: 11001e1e bne r2,r4,2bb90 <___vfiprintf_internal_r+0x13a8> - 2bb18: 1829883a mov r20,r3 - 2bb1c: 003eea06 br 2b6c8 <___vfiprintf_internal_r+0xee0> - 2bb20: a007883a mov r3,r20 - 2bb24: 00800044 movi r2,1 - 2bb28: 003ff606 br 2bb04 <___vfiprintf_internal_r+0x131c> - 2bb2c: 00800184 movi r2,6 - 2bb30: 1240012e bgeu r2,r9,2bb38 <___vfiprintf_internal_r+0x1350> - 2bb34: 1013883a mov r9,r2 - 2bb38: 4827883a mov r19,r9 - 2bb3c: 4825883a mov r18,r9 - 2bb40: 48001516 blt r9,zero,2bb98 <___vfiprintf_internal_r+0x13b0> - 2bb44: 054000f4 movhi r21,3 - 2bb48: d8c02215 stw r3,136(sp) - 2bb4c: ad4a5804 addi r21,r21,10592 - 2bb50: 003d1406 br 2afa4 <___vfiprintf_internal_r+0x7bc> - 2bb54: 028000f4 movhi r10,3 - 2bb58: 528ab304 addi r10,r10,10956 - 2bb5c: da802415 stw r10,144(sp) - 2bb60: 200d883a mov r6,r4 - 2bb64: 003c9106 br 2adac <___vfiprintf_internal_r+0x5c4> - 2bb68: 5021883a mov r16,r10 - 2bb6c: 0013883a mov r9,zero - 2bb70: 003b7d06 br 2a968 <___vfiprintf_internal_r+0x180> - 2bb74: 4827883a mov r19,r9 - 2bb78: df001d83 ldbu fp,118(sp) - 2bb7c: d8c02215 stw r3,136(sp) - 2bb80: 0013883a mov r9,zero - 2bb84: 003c1806 br 2abe8 <___vfiprintf_internal_r+0x400> - 2bb88: 1829883a mov r20,r3 - 2bb8c: 003d1806 br 2aff0 <___vfiprintf_internal_r+0x808> - 2bb90: 1829883a mov r20,r3 - 2bb94: 003ccd06 br 2aecc <___vfiprintf_internal_r+0x6e4> - 2bb98: 0025883a mov r18,zero - 2bb9c: 003fe906 br 2bb44 <___vfiprintf_internal_r+0x135c> - 2bba0: d8802217 ldw r2,136(sp) - 2bba4: 80c00043 ldbu r3,1(r16) - 2bba8: 5021883a mov r16,r10 - 2bbac: 12400017 ldw r9,0(r2) - 2bbb0: 10800104 addi r2,r2,4 - 2bbb4: d8802215 stw r2,136(sp) - 2bbb8: 483faf0e bge r9,zero,2ba78 <___vfiprintf_internal_r+0x1290> - 2bbbc: 18c03fcc andi r3,r3,255 - 2bbc0: 18c0201c xori r3,r3,128 - 2bbc4: 027fffc4 movi r9,-1 - 2bbc8: 18ffe004 addi r3,r3,-128 - 2bbcc: 003b6506 br 2a964 <___vfiprintf_internal_r+0x17c> - 2bbd0: d9c01d85 stb r7,118(sp) - 2bbd4: 003ca006 br 2ae58 <___vfiprintf_internal_r+0x670> - 2bbd8: d9c01d85 stb r7,118(sp) - 2bbdc: 003cad06 br 2ae94 <___vfiprintf_internal_r+0x6ac> - 2bbe0: d9c01d85 stb r7,118(sp) - 2bbe4: 003d7d06 br 2b1dc <___vfiprintf_internal_r+0x9f4> - 2bbe8: d9c01d85 stb r7,118(sp) - 2bbec: 003d5f06 br 2b16c <___vfiprintf_internal_r+0x984> - 2bbf0: a080004c andi r2,r20,1 - 2bbf4: 0039883a mov fp,zero - 2bbf8: 10000526 beq r2,zero,2bc10 <___vfiprintf_internal_r+0x1428> - 2bbfc: 00800c04 movi r2,48 - 2bc00: d88019c5 stb r2,103(sp) - 2bc04: dcc02717 ldw r19,156(sp) - 2bc08: dd4019c4 addi r21,sp,103 - 2bc0c: 003bf606 br 2abe8 <___vfiprintf_internal_r+0x400> - 2bc10: 0027883a mov r19,zero - 2bc14: dd401a04 addi r21,sp,104 - 2bc18: 003bf306 br 2abe8 <___vfiprintf_internal_r+0x400> - 2bc1c: d9c01d85 stb r7,118(sp) - 2bc20: 003dc806 br 2b344 <___vfiprintf_internal_r+0xb5c> - 2bc24: d9c01d85 stb r7,118(sp) - 2bc28: 003d3a06 br 2b114 <___vfiprintf_internal_r+0x92c> - 2bc2c: d9c01d85 stb r7,118(sp) - 2bc30: 003d2a06 br 2b0dc <___vfiprintf_internal_r+0x8f4> - 2bc34: d9c01d85 stb r7,118(sp) - 2bc38: 003cde06 br 2afb4 <___vfiprintf_internal_r+0x7cc> - 2bc3c: d9c01d85 stb r7,118(sp) - 2bc40: 003cbc06 br 2af34 <___vfiprintf_internal_r+0x74c> + 2aba0: 9027883a mov r19,r18 + 2aba4: dd401004 addi r21,sp,64 + 2aba8: 003f1106 br 2a7f0 <_gp+0xfffee2b8> + 2abac: d9402117 ldw r5,132(sp) + 2abb0: d9002017 ldw r4,128(sp) + 2abb4: d9801a04 addi r6,sp,104 + 2abb8: d9c02b15 stw r7,172(sp) + 2abbc: dbc02a15 stw r15,168(sp) + 2abc0: 0029f200 call 29f20 <__sprint_r.part.0> + 2abc4: d9c02b17 ldw r7,172(sp) + 2abc8: dbc02a17 ldw r15,168(sp) + 2abcc: 10006d1e bne r2,zero,2ad84 <___vfiprintf_internal_r+0xd50> + 2abd0: d9801b17 ldw r6,108(sp) + 2abd4: d8801c17 ldw r2,112(sp) + 2abd8: d811883a mov r8,sp + 2abdc: 31400044 addi r5,r6,1 + 2abe0: 003e3306 br 2a4b0 <_gp+0xfffedf78> + 2abe4: d9401b17 ldw r5,108(sp) + 2abe8: d8801c17 ldw r2,112(sp) + 2abec: 29000044 addi r4,r5,1 + 2abf0: d8c01d87 ldb r3,118(sp) + 2abf4: 183e4d26 beq r3,zero,2a52c <_gp+0xfffedff4> + 2abf8: 00c00044 movi r3,1 + 2abfc: d9401d84 addi r5,sp,118 + 2ac00: 10c5883a add r2,r2,r3 + 2ac04: 41400015 stw r5,0(r8) + 2ac08: 40c00115 stw r3,4(r8) + 2ac0c: d8801c15 stw r2,112(sp) + 2ac10: d9001b15 stw r4,108(sp) + 2ac14: 014001c4 movi r5,7 + 2ac18: 2900a90e bge r5,r4,2aec0 <___vfiprintf_internal_r+0xe8c> + 2ac1c: 1000da1e bne r2,zero,2af88 <___vfiprintf_internal_r+0xf54> + 2ac20: 7000ab1e bne r14,zero,2aed0 <___vfiprintf_internal_r+0xe9c> + 2ac24: 000b883a mov r5,zero + 2ac28: 1809883a mov r4,r3 + 2ac2c: d811883a mov r8,sp + 2ac30: 00c02004 movi r3,128 + 2ac34: e0fe4d26 beq fp,r3,2a56c <_gp+0xfffee034> + 2ac38: 4cf9c83a sub fp,r9,r19 + 2ac3c: 073e7b0e bge zero,fp,2a62c <_gp+0xfffee0f4> + 2ac40: 01c00404 movi r7,16 + 2ac44: 3f01900e bge r7,fp,2b288 <___vfiprintf_internal_r+0x1254> + 2ac48: 00c000f4 movhi r3,3 + 2ac4c: 18c86604 addi r3,r3,8600 + 2ac50: d8c02415 stw r3,144(sp) + 2ac54: 034001c4 movi r13,7 + 2ac58: 00000506 br 2ac70 <___vfiprintf_internal_r+0xc3c> + 2ac5c: 29000084 addi r4,r5,2 + 2ac60: 42000204 addi r8,r8,8 + 2ac64: 180b883a mov r5,r3 + 2ac68: e73ffc04 addi fp,fp,-16 + 2ac6c: 3f000d0e bge r7,fp,2aca4 <___vfiprintf_internal_r+0xc70> + 2ac70: 10800404 addi r2,r2,16 + 2ac74: 28c00044 addi r3,r5,1 + 2ac78: 45c00015 stw r23,0(r8) + 2ac7c: 41c00115 stw r7,4(r8) + 2ac80: d8801c15 stw r2,112(sp) + 2ac84: d8c01b15 stw r3,108(sp) + 2ac88: 68fff40e bge r13,r3,2ac5c <_gp+0xfffee724> + 2ac8c: 1000101e bne r2,zero,2acd0 <___vfiprintf_internal_r+0xc9c> + 2ac90: e73ffc04 addi fp,fp,-16 + 2ac94: 01000044 movi r4,1 + 2ac98: 000b883a mov r5,zero + 2ac9c: d811883a mov r8,sp + 2aca0: 3f3ff316 blt r7,fp,2ac70 <_gp+0xfffee738> + 2aca4: da802417 ldw r10,144(sp) + 2aca8: 1705883a add r2,r2,fp + 2acac: 47000115 stw fp,4(r8) + 2acb0: 42800015 stw r10,0(r8) + 2acb4: d8801c15 stw r2,112(sp) + 2acb8: d9001b15 stw r4,108(sp) + 2acbc: 00c001c4 movi r3,7 + 2acc0: 19003616 blt r3,r4,2ad9c <___vfiprintf_internal_r+0xd68> + 2acc4: 42000204 addi r8,r8,8 + 2acc8: 21000044 addi r4,r4,1 + 2accc: 003e5706 br 2a62c <_gp+0xfffee0f4> + 2acd0: d9402117 ldw r5,132(sp) + 2acd4: d9002017 ldw r4,128(sp) + 2acd8: d9801a04 addi r6,sp,104 + 2acdc: d9c02b15 stw r7,172(sp) + 2ace0: db402a15 stw r13,168(sp) + 2ace4: 0029f200 call 29f20 <__sprint_r.part.0> + 2ace8: d9c02b17 ldw r7,172(sp) + 2acec: db402a17 ldw r13,168(sp) + 2acf0: 1000241e bne r2,zero,2ad84 <___vfiprintf_internal_r+0xd50> + 2acf4: d9401b17 ldw r5,108(sp) + 2acf8: d8801c17 ldw r2,112(sp) + 2acfc: d811883a mov r8,sp + 2ad00: 29000044 addi r4,r5,1 + 2ad04: 003fd806 br 2ac68 <_gp+0xfffee730> + 2ad08: d9401b17 ldw r5,108(sp) + 2ad0c: 00c000f4 movhi r3,3 + 2ad10: 18c86a04 addi r3,r3,8616 + 2ad14: d8c02415 stw r3,144(sp) + 2ad18: 29400044 addi r5,r5,1 + 2ad1c: d8c02417 ldw r3,144(sp) + 2ad20: 14c5883a add r2,r2,r19 + 2ad24: 44c00115 stw r19,4(r8) + 2ad28: 40c00015 stw r3,0(r8) + 2ad2c: d8801c15 stw r2,112(sp) + 2ad30: d9401b15 stw r5,108(sp) + 2ad34: 00c001c4 movi r3,7 + 2ad38: 1940070e bge r3,r5,2ad58 <___vfiprintf_internal_r+0xd24> + 2ad3c: 103e4826 beq r2,zero,2a660 <_gp+0xfffee128> + 2ad40: d9402117 ldw r5,132(sp) + 2ad44: d9002017 ldw r4,128(sp) + 2ad48: d9801a04 addi r6,sp,104 + 2ad4c: 0029f200 call 29f20 <__sprint_r.part.0> + 2ad50: 10000c1e bne r2,zero,2ad84 <___vfiprintf_internal_r+0xd50> + 2ad54: d8801c17 ldw r2,112(sp) + 2ad58: 8c80010e bge r17,r18,2ad60 <___vfiprintf_internal_r+0xd2c> + 2ad5c: 9023883a mov r17,r18 + 2ad60: da802317 ldw r10,140(sp) + 2ad64: 5455883a add r10,r10,r17 + 2ad68: da802315 stw r10,140(sp) + 2ad6c: 103e4126 beq r2,zero,2a674 <_gp+0xfffee13c> + 2ad70: d9402117 ldw r5,132(sp) + 2ad74: d9002017 ldw r4,128(sp) + 2ad78: d9801a04 addi r6,sp,104 + 2ad7c: 0029f200 call 29f20 <__sprint_r.part.0> + 2ad80: 103e3c26 beq r2,zero,2a674 <_gp+0xfffee13c> + 2ad84: dd002117 ldw r20,132(sp) + 2ad88: a080030b ldhu r2,12(r20) + 2ad8c: 1080100c andi r2,r2,64 + 2ad90: 1001231e bne r2,zero,2b220 <___vfiprintf_internal_r+0x11ec> + 2ad94: d8802317 ldw r2,140(sp) + 2ad98: 003d7b06 br 2a388 <_gp+0xfffede50> + 2ad9c: 1000991e bne r2,zero,2b004 <___vfiprintf_internal_r+0xfd0> + 2ada0: 00c00044 movi r3,1 + 2ada4: 9805883a mov r2,r19 + 2ada8: dd400015 stw r21,0(sp) + 2adac: dcc00115 stw r19,4(sp) + 2adb0: dcc01c15 stw r19,112(sp) + 2adb4: d8c01b15 stw r3,108(sp) + 2adb8: d811883a mov r8,sp + 2adbc: 42000204 addi r8,r8,8 + 2adc0: a2c0010c andi r11,r20,4 + 2adc4: 583fe426 beq r11,zero,2ad58 <_gp+0xfffee820> + 2adc8: 8ca7c83a sub r19,r17,r18 + 2adcc: 04ffe20e bge zero,r19,2ad58 <_gp+0xfffee820> + 2add0: 01c00404 movi r7,16 + 2add4: 3cffcc0e bge r7,r19,2ad08 <_gp+0xfffee7d0> + 2add8: 028000f4 movhi r10,3 + 2addc: 52886a04 addi r10,r10,8616 + 2ade0: d9001b17 ldw r4,108(sp) + 2ade4: da802415 stw r10,144(sp) + 2ade8: 382b883a mov r21,r7 + 2adec: 050001c4 movi r20,7 + 2adf0: df002017 ldw fp,128(sp) + 2adf4: 00000506 br 2ae0c <___vfiprintf_internal_r+0xdd8> + 2adf8: 21400084 addi r5,r4,2 + 2adfc: 42000204 addi r8,r8,8 + 2ae00: 1809883a mov r4,r3 + 2ae04: 9cfffc04 addi r19,r19,-16 + 2ae08: acffc40e bge r21,r19,2ad1c <_gp+0xfffee7e4> + 2ae0c: 10800404 addi r2,r2,16 + 2ae10: 20c00044 addi r3,r4,1 + 2ae14: 45800015 stw r22,0(r8) + 2ae18: 45400115 stw r21,4(r8) + 2ae1c: d8801c15 stw r2,112(sp) + 2ae20: d8c01b15 stw r3,108(sp) + 2ae24: a0fff40e bge r20,r3,2adf8 <_gp+0xfffee8c0> + 2ae28: 1000041e bne r2,zero,2ae3c <___vfiprintf_internal_r+0xe08> + 2ae2c: 01400044 movi r5,1 + 2ae30: 0009883a mov r4,zero + 2ae34: d811883a mov r8,sp + 2ae38: 003ff206 br 2ae04 <_gp+0xfffee8cc> + 2ae3c: d9402117 ldw r5,132(sp) + 2ae40: d9801a04 addi r6,sp,104 + 2ae44: e009883a mov r4,fp + 2ae48: 0029f200 call 29f20 <__sprint_r.part.0> + 2ae4c: 103fcd1e bne r2,zero,2ad84 <_gp+0xfffee84c> + 2ae50: d9001b17 ldw r4,108(sp) + 2ae54: d8801c17 ldw r2,112(sp) + 2ae58: d811883a mov r8,sp + 2ae5c: 21400044 addi r5,r4,1 + 2ae60: 003fe806 br 2ae04 <_gp+0xfffee8cc> + 2ae64: d9402117 ldw r5,132(sp) + 2ae68: d9002017 ldw r4,128(sp) + 2ae6c: d9801a04 addi r6,sp,104 + 2ae70: d9c02b15 stw r7,172(sp) + 2ae74: db402a15 stw r13,168(sp) + 2ae78: 0029f200 call 29f20 <__sprint_r.part.0> + 2ae7c: d9c02b17 ldw r7,172(sp) + 2ae80: db402a17 ldw r13,168(sp) + 2ae84: 103fbf1e bne r2,zero,2ad84 <_gp+0xfffee84c> + 2ae88: d9401b17 ldw r5,108(sp) + 2ae8c: d8801c17 ldw r2,112(sp) + 2ae90: d811883a mov r8,sp + 2ae94: 29800044 addi r6,r5,1 + 2ae98: 003dc406 br 2a5ac <_gp+0xfffee074> + 2ae9c: 1000d21e bne r2,zero,2b1e8 <___vfiprintf_internal_r+0x11b4> + 2aea0: d8c01d87 ldb r3,118(sp) + 2aea4: 18009526 beq r3,zero,2b0fc <___vfiprintf_internal_r+0x10c8> + 2aea8: 00800044 movi r2,1 + 2aeac: d8c01d84 addi r3,sp,118 + 2aeb0: 1009883a mov r4,r2 + 2aeb4: d8c00015 stw r3,0(sp) + 2aeb8: d8800115 stw r2,4(sp) + 2aebc: d811883a mov r8,sp + 2aec0: 200b883a mov r5,r4 + 2aec4: 42000204 addi r8,r8,8 + 2aec8: 21000044 addi r4,r4,1 + 2aecc: 003d9706 br 2a52c <_gp+0xfffedff4> + 2aed0: d9001d04 addi r4,sp,116 + 2aed4: 00800084 movi r2,2 + 2aed8: d9000015 stw r4,0(sp) + 2aedc: d8800115 stw r2,4(sp) + 2aee0: 1809883a mov r4,r3 + 2aee4: d811883a mov r8,sp + 2aee8: 200b883a mov r5,r4 + 2aeec: 42000204 addi r8,r8,8 + 2aef0: 21000044 addi r4,r4,1 + 2aef4: 003f4e06 br 2ac30 <_gp+0xfffee6f8> + 2aef8: d8001d85 stb zero,118(sp) + 2aefc: 48005016 blt r9,zero,2b040 <___vfiprintf_internal_r+0x100c> + 2af00: 00ffdfc4 movi r3,-129 + 2af04: 94c4b03a or r2,r18,r19 + 2af08: a0e8703a and r20,r20,r3 + 2af0c: 103d4426 beq r2,zero,2a420 <_gp+0xfffedee8> + 2af10: 0039883a mov fp,zero + 2af14: d9002617 ldw r4,152(sp) + 2af18: dd401a04 addi r21,sp,104 + 2af1c: 908003cc andi r2,r18,15 + 2af20: 9806973a slli r3,r19,28 + 2af24: 2085883a add r2,r4,r2 + 2af28: 9024d13a srli r18,r18,4 + 2af2c: 10800003 ldbu r2,0(r2) + 2af30: 9826d13a srli r19,r19,4 + 2af34: ad7fffc4 addi r21,r21,-1 + 2af38: 1ca4b03a or r18,r3,r18 + 2af3c: a8800005 stb r2,0(r21) + 2af40: 94c4b03a or r2,r18,r19 + 2af44: 103ff51e bne r2,zero,2af1c <_gp+0xfffee9e4> + 2af48: 003e5906 br 2a8b0 <_gp+0xfffee378> + 2af4c: d9402117 ldw r5,132(sp) + 2af50: d9002017 ldw r4,128(sp) + 2af54: d9801a04 addi r6,sp,104 + 2af58: 0029f200 call 29f20 <__sprint_r.part.0> + 2af5c: 103f891e bne r2,zero,2ad84 <_gp+0xfffee84c> + 2af60: d8801c17 ldw r2,112(sp) + 2af64: d811883a mov r8,sp + 2af68: 003f9506 br 2adc0 <_gp+0xfffee888> + 2af6c: d9402117 ldw r5,132(sp) + 2af70: d9002017 ldw r4,128(sp) + 2af74: d9801a04 addi r6,sp,104 + 2af78: 0029f200 call 29f20 <__sprint_r.part.0> + 2af7c: 103f811e bne r2,zero,2ad84 <_gp+0xfffee84c> + 2af80: d811883a mov r8,sp + 2af84: 003ced06 br 2a33c <_gp+0xfffede04> + 2af88: d9402117 ldw r5,132(sp) + 2af8c: d9002017 ldw r4,128(sp) + 2af90: d9801a04 addi r6,sp,104 + 2af94: da402c15 stw r9,176(sp) + 2af98: db802a15 stw r14,168(sp) + 2af9c: 0029f200 call 29f20 <__sprint_r.part.0> + 2afa0: da402c17 ldw r9,176(sp) + 2afa4: db802a17 ldw r14,168(sp) + 2afa8: 103f761e bne r2,zero,2ad84 <_gp+0xfffee84c> + 2afac: d9401b17 ldw r5,108(sp) + 2afb0: d8801c17 ldw r2,112(sp) + 2afb4: d811883a mov r8,sp + 2afb8: 29000044 addi r4,r5,1 + 2afbc: 003d5b06 br 2a52c <_gp+0xfffedff4> + 2afc0: d9402117 ldw r5,132(sp) + 2afc4: d9002017 ldw r4,128(sp) + 2afc8: d9801a04 addi r6,sp,104 + 2afcc: da402c15 stw r9,176(sp) + 2afd0: 0029f200 call 29f20 <__sprint_r.part.0> + 2afd4: da402c17 ldw r9,176(sp) + 2afd8: 103f6a1e bne r2,zero,2ad84 <_gp+0xfffee84c> + 2afdc: d9401b17 ldw r5,108(sp) + 2afe0: d8801c17 ldw r2,112(sp) + 2afe4: d811883a mov r8,sp + 2afe8: 29000044 addi r4,r5,1 + 2afec: 003f1006 br 2ac30 <_gp+0xfffee6f8> + 2aff0: 1000c31e bne r2,zero,2b300 <___vfiprintf_internal_r+0x12cc> + 2aff4: 01000044 movi r4,1 + 2aff8: 000b883a mov r5,zero + 2affc: d811883a mov r8,sp + 2b000: 003f0d06 br 2ac38 <_gp+0xfffee700> + 2b004: d9402117 ldw r5,132(sp) + 2b008: d9002017 ldw r4,128(sp) + 2b00c: d9801a04 addi r6,sp,104 + 2b010: 0029f200 call 29f20 <__sprint_r.part.0> + 2b014: 103f5b1e bne r2,zero,2ad84 <_gp+0xfffee84c> + 2b018: d9001b17 ldw r4,108(sp) + 2b01c: d8801c17 ldw r2,112(sp) + 2b020: d811883a mov r8,sp + 2b024: 21000044 addi r4,r4,1 + 2b028: 003d8006 br 2a62c <_gp+0xfffee0f4> + 2b02c: 010000f4 movhi r4,3 + 2b030: 21080504 addi r4,r4,8212 + 2b034: d9002615 stw r4,152(sp) + 2b038: d8c02215 stw r3,136(sp) + 2b03c: 1029883a mov r20,r2 + 2b040: 94c4b03a or r2,r18,r19 + 2b044: 103fb21e bne r2,zero,2af10 <_gp+0xfffee9d8> + 2b048: 0039883a mov fp,zero + 2b04c: 00800084 movi r2,2 + 2b050: 003e6b06 br 2aa00 <_gp+0xfffee4c8> + 2b054: da802217 ldw r10,136(sp) + 2b058: d8001d85 stb zero,118(sp) + 2b05c: 0027883a mov r19,zero + 2b060: 50800104 addi r2,r10,4 + 2b064: 54800017 ldw r18,0(r10) + 2b068: 483e6016 blt r9,zero,2a9ec <_gp+0xfffee4b4> + 2b06c: 00ffdfc4 movi r3,-129 + 2b070: d8802215 stw r2,136(sp) + 2b074: a0e8703a and r20,r20,r3 + 2b078: 0039883a mov fp,zero + 2b07c: 903ebb26 beq r18,zero,2ab6c <_gp+0xfffee634> + 2b080: 00800244 movi r2,9 + 2b084: 14bdee36 bltu r2,r18,2a840 <_gp+0xfffee308> + 2b088: 003eba06 br 2ab74 <_gp+0xfffee63c> + 2b08c: 00800c04 movi r2,48 + 2b090: d8c01d45 stb r3,117(sp) + 2b094: d8801d05 stb r2,116(sp) + 2b098: d8001d85 stb zero,118(sp) + 2b09c: a0c00094 ori r3,r20,2 + 2b0a0: 4800a916 blt r9,zero,2b348 <___vfiprintf_internal_r+0x1314> + 2b0a4: 00bfdfc4 movi r2,-129 + 2b0a8: a096703a and r11,r20,r2 + 2b0ac: 5d000094 ori r20,r11,2 + 2b0b0: 0039883a mov fp,zero + 2b0b4: 003f9706 br 2af14 <_gp+0xfffee9dc> + 2b0b8: 8025883a mov r18,r16 + 2b0bc: 003c2e06 br 2a178 <_gp+0xfffedc40> + 2b0c0: 008000f4 movhi r2,3 + 2b0c4: 10880504 addi r2,r2,8212 + 2b0c8: 0039883a mov fp,zero + 2b0cc: d8802615 stw r2,152(sp) + 2b0d0: 003f9006 br 2af14 <_gp+0xfffee9dc> + 2b0d4: 04a5c83a sub r18,zero,r18 + 2b0d8: 07000b44 movi fp,45 + 2b0dc: 9004c03a cmpne r2,r18,zero + 2b0e0: 04e7c83a sub r19,zero,r19 + 2b0e4: df001d85 stb fp,118(sp) + 2b0e8: 98a7c83a sub r19,r19,r2 + 2b0ec: 48009f16 blt r9,zero,2b36c <___vfiprintf_internal_r+0x1338> + 2b0f0: 00bfdfc4 movi r2,-129 + 2b0f4: a0a8703a and r20,r20,r2 + 2b0f8: 003dd006 br 2a83c <_gp+0xfffee304> + 2b0fc: 70004c26 beq r14,zero,2b230 <___vfiprintf_internal_r+0x11fc> + 2b100: 00800084 movi r2,2 + 2b104: d8c01d04 addi r3,sp,116 + 2b108: d8c00015 stw r3,0(sp) + 2b10c: d8800115 stw r2,4(sp) + 2b110: 01000044 movi r4,1 + 2b114: d811883a mov r8,sp + 2b118: 003f7306 br 2aee8 <_gp+0xfffee9b0> + 2b11c: a080100c andi r2,r20,64 + 2b120: da802217 ldw r10,136(sp) + 2b124: 103e0626 beq r2,zero,2a940 <_gp+0xfffee408> + 2b128: 5480000f ldh r18,0(r10) + 2b12c: 52800104 addi r10,r10,4 + 2b130: da802215 stw r10,136(sp) + 2b134: 9027d7fa srai r19,r18,31 + 2b138: 9805883a mov r2,r19 + 2b13c: 003db806 br 2a820 <_gp+0xfffee2e8> + 2b140: a080040c andi r2,r20,16 + 2b144: 1000091e bne r2,zero,2b16c <___vfiprintf_internal_r+0x1138> + 2b148: a2c0100c andi r11,r20,64 + 2b14c: 58000726 beq r11,zero,2b16c <___vfiprintf_internal_r+0x1138> + 2b150: da802217 ldw r10,136(sp) + 2b154: 50800017 ldw r2,0(r10) + 2b158: 52800104 addi r10,r10,4 + 2b15c: da802215 stw r10,136(sp) + 2b160: da802317 ldw r10,140(sp) + 2b164: 1280000d sth r10,0(r2) + 2b168: 003be706 br 2a108 <_gp+0xfffedbd0> + 2b16c: da802217 ldw r10,136(sp) + 2b170: 50800017 ldw r2,0(r10) + 2b174: 52800104 addi r10,r10,4 + 2b178: da802215 stw r10,136(sp) + 2b17c: da802317 ldw r10,140(sp) + 2b180: 12800015 stw r10,0(r2) + 2b184: 003be006 br 2a108 <_gp+0xfffedbd0> + 2b188: a080100c andi r2,r20,64 + 2b18c: da802217 ldw r10,136(sp) + 2b190: 10003026 beq r2,zero,2b254 <___vfiprintf_internal_r+0x1220> + 2b194: 5480000b ldhu r18,0(r10) + 2b198: 52800104 addi r10,r10,4 + 2b19c: 0027883a mov r19,zero + 2b1a0: da802215 stw r10,136(sp) + 2b1a4: 003d8006 br 2a7a8 <_gp+0xfffee270> + 2b1a8: 80c00007 ldb r3,0(r16) + 2b1ac: 003c0006 br 2a1b0 <_gp+0xfffedc78> + 2b1b0: a080100c andi r2,r20,64 + 2b1b4: d8001d85 stb zero,118(sp) + 2b1b8: da802217 ldw r10,136(sp) + 2b1bc: 1000201e bne r2,zero,2b240 <___vfiprintf_internal_r+0x120c> + 2b1c0: 50800104 addi r2,r10,4 + 2b1c4: 54800017 ldw r18,0(r10) + 2b1c8: 0027883a mov r19,zero + 2b1cc: 483def0e bge r9,zero,2a98c <_gp+0xfffee454> + 2b1d0: 94c6b03a or r3,r18,r19 + 2b1d4: d8802215 stw r2,136(sp) + 2b1d8: 183d4e1e bne r3,zero,2a714 <_gp+0xfffee1dc> + 2b1dc: 0039883a mov fp,zero + 2b1e0: 0005883a mov r2,zero + 2b1e4: 003e0606 br 2aa00 <_gp+0xfffee4c8> + 2b1e8: d9402117 ldw r5,132(sp) + 2b1ec: d9002017 ldw r4,128(sp) + 2b1f0: d9801a04 addi r6,sp,104 + 2b1f4: da402c15 stw r9,176(sp) + 2b1f8: db802a15 stw r14,168(sp) + 2b1fc: 0029f200 call 29f20 <__sprint_r.part.0> + 2b200: da402c17 ldw r9,176(sp) + 2b204: db802a17 ldw r14,168(sp) + 2b208: 103ede1e bne r2,zero,2ad84 <_gp+0xfffee84c> + 2b20c: d9401b17 ldw r5,108(sp) + 2b210: d8801c17 ldw r2,112(sp) + 2b214: d811883a mov r8,sp + 2b218: 29000044 addi r4,r5,1 + 2b21c: 003e7406 br 2abf0 <_gp+0xfffee6b8> + 2b220: 00bfffc4 movi r2,-1 + 2b224: 003c5806 br 2a388 <_gp+0xfffede50> + 2b228: d811883a mov r8,sp + 2b22c: 003ee806 br 2add0 <_gp+0xfffee898> + 2b230: 000b883a mov r5,zero + 2b234: 01000044 movi r4,1 + 2b238: d811883a mov r8,sp + 2b23c: 003e7c06 br 2ac30 <_gp+0xfffee6f8> + 2b240: 50800104 addi r2,r10,4 + 2b244: 5480000b ldhu r18,0(r10) + 2b248: 0027883a mov r19,zero + 2b24c: 483dcf0e bge r9,zero,2a98c <_gp+0xfffee454> + 2b250: 003fdf06 br 2b1d0 <_gp+0xfffeec98> + 2b254: 54800017 ldw r18,0(r10) + 2b258: 52800104 addi r10,r10,4 + 2b25c: 0027883a mov r19,zero + 2b260: da802215 stw r10,136(sp) + 2b264: 003d5006 br 2a7a8 <_gp+0xfffee270> + 2b268: 50800104 addi r2,r10,4 + 2b26c: 5480000b ldhu r18,0(r10) + 2b270: 0027883a mov r19,zero + 2b274: 483f7d0e bge r9,zero,2b06c <_gp+0xfffeeb34> + 2b278: 003ddc06 br 2a9ec <_gp+0xfffee4b4> + 2b27c: d8c02215 stw r3,136(sp) + 2b280: 0039883a mov fp,zero + 2b284: 003ddb06 br 2a9f4 <_gp+0xfffee4bc> + 2b288: 028000f4 movhi r10,3 + 2b28c: 52886604 addi r10,r10,8600 + 2b290: da802415 stw r10,144(sp) + 2b294: 003e8306 br 2aca4 <_gp+0xfffee76c> + 2b298: d8801c17 ldw r2,112(sp) + 2b29c: dd002117 ldw r20,132(sp) + 2b2a0: 103eb926 beq r2,zero,2ad88 <_gp+0xfffee850> + 2b2a4: d9002017 ldw r4,128(sp) + 2b2a8: d9801a04 addi r6,sp,104 + 2b2ac: a00b883a mov r5,r20 + 2b2b0: 0029f200 call 29f20 <__sprint_r.part.0> + 2b2b4: 003eb406 br 2ad88 <_gp+0xfffee850> + 2b2b8: 80c00043 ldbu r3,1(r16) + 2b2bc: a5000814 ori r20,r20,32 + 2b2c0: 84000044 addi r16,r16,1 + 2b2c4: 18c03fcc andi r3,r3,255 + 2b2c8: 18c0201c xori r3,r3,128 + 2b2cc: 18ffe004 addi r3,r3,-128 + 2b2d0: 003bb706 br 2a1b0 <_gp+0xfffedc78> + 2b2d4: a809883a mov r4,r21 + 2b2d8: d8c02a15 stw r3,168(sp) + 2b2dc: da002b15 stw r8,172(sp) + 2b2e0: 00231a80 call 231a8 + 2b2e4: d8c02a17 ldw r3,168(sp) + 2b2e8: 1027883a mov r19,r2 + 2b2ec: df001d83 ldbu fp,118(sp) + 2b2f0: d8c02215 stw r3,136(sp) + 2b2f4: 0013883a mov r9,zero + 2b2f8: da002b17 ldw r8,172(sp) + 2b2fc: 003c4d06 br 2a434 <_gp+0xfffedefc> + 2b300: d9402117 ldw r5,132(sp) + 2b304: d9002017 ldw r4,128(sp) + 2b308: d9801a04 addi r6,sp,104 + 2b30c: da402c15 stw r9,176(sp) + 2b310: 0029f200 call 29f20 <__sprint_r.part.0> + 2b314: da402c17 ldw r9,176(sp) + 2b318: 103e9a1e bne r2,zero,2ad84 <_gp+0xfffee84c> + 2b31c: d9401b17 ldw r5,108(sp) + 2b320: d8801c17 ldw r2,112(sp) + 2b324: d811883a mov r8,sp + 2b328: 29000044 addi r4,r5,1 + 2b32c: 003e4206 br 2ac38 <_gp+0xfffee700> + 2b330: d9401b17 ldw r5,108(sp) + 2b334: 010000f4 movhi r4,3 + 2b338: 21086a04 addi r4,r4,8616 + 2b33c: d9002415 stw r4,144(sp) + 2b340: 29400044 addi r5,r5,1 + 2b344: 003c6d06 br 2a4fc <_gp+0xfffedfc4> + 2b348: 0039883a mov fp,zero + 2b34c: 00800084 movi r2,2 + 2b350: 10803fcc andi r2,r2,255 + 2b354: 01000044 movi r4,1 + 2b358: 11001e26 beq r2,r4,2b3d4 <___vfiprintf_internal_r+0x13a0> + 2b35c: 01000084 movi r4,2 + 2b360: 11001e1e bne r2,r4,2b3dc <___vfiprintf_internal_r+0x13a8> + 2b364: 1829883a mov r20,r3 + 2b368: 003eea06 br 2af14 <_gp+0xfffee9dc> + 2b36c: a007883a mov r3,r20 + 2b370: 00800044 movi r2,1 + 2b374: 003ff606 br 2b350 <_gp+0xfffeee18> + 2b378: 00800184 movi r2,6 + 2b37c: 1240012e bgeu r2,r9,2b384 <___vfiprintf_internal_r+0x1350> + 2b380: 1013883a mov r9,r2 + 2b384: 4827883a mov r19,r9 + 2b388: 4825883a mov r18,r9 + 2b38c: 48001516 blt r9,zero,2b3e4 <___vfiprintf_internal_r+0x13b0> + 2b390: 054000f4 movhi r21,3 + 2b394: d8c02215 stw r3,136(sp) + 2b398: ad480a04 addi r21,r21,8232 + 2b39c: 003d1406 br 2a7f0 <_gp+0xfffee2b8> + 2b3a0: 028000f4 movhi r10,3 + 2b3a4: 52886604 addi r10,r10,8600 + 2b3a8: da802415 stw r10,144(sp) + 2b3ac: 200d883a mov r6,r4 + 2b3b0: 003c9106 br 2a5f8 <_gp+0xfffee0c0> + 2b3b4: 5021883a mov r16,r10 + 2b3b8: 0013883a mov r9,zero + 2b3bc: 003b7d06 br 2a1b4 <_gp+0xfffedc7c> + 2b3c0: 4827883a mov r19,r9 + 2b3c4: df001d83 ldbu fp,118(sp) + 2b3c8: d8c02215 stw r3,136(sp) + 2b3cc: 0013883a mov r9,zero + 2b3d0: 003c1806 br 2a434 <_gp+0xfffedefc> + 2b3d4: 1829883a mov r20,r3 + 2b3d8: 003d1806 br 2a83c <_gp+0xfffee304> + 2b3dc: 1829883a mov r20,r3 + 2b3e0: 003ccd06 br 2a718 <_gp+0xfffee1e0> + 2b3e4: 0025883a mov r18,zero + 2b3e8: 003fe906 br 2b390 <_gp+0xfffeee58> + 2b3ec: d8802217 ldw r2,136(sp) + 2b3f0: 80c00043 ldbu r3,1(r16) + 2b3f4: 5021883a mov r16,r10 + 2b3f8: 12400017 ldw r9,0(r2) + 2b3fc: 10800104 addi r2,r2,4 + 2b400: d8802215 stw r2,136(sp) + 2b404: 483faf0e bge r9,zero,2b2c4 <_gp+0xfffeed8c> + 2b408: 18c03fcc andi r3,r3,255 + 2b40c: 18c0201c xori r3,r3,128 + 2b410: 027fffc4 movi r9,-1 + 2b414: 18ffe004 addi r3,r3,-128 + 2b418: 003b6506 br 2a1b0 <_gp+0xfffedc78> + 2b41c: d9c01d85 stb r7,118(sp) + 2b420: 003ca006 br 2a6a4 <_gp+0xfffee16c> + 2b424: d9c01d85 stb r7,118(sp) + 2b428: 003cad06 br 2a6e0 <_gp+0xfffee1a8> + 2b42c: d9c01d85 stb r7,118(sp) + 2b430: 003d7d06 br 2aa28 <_gp+0xfffee4f0> + 2b434: d9c01d85 stb r7,118(sp) + 2b438: 003d5f06 br 2a9b8 <_gp+0xfffee480> + 2b43c: a080004c andi r2,r20,1 + 2b440: 0039883a mov fp,zero + 2b444: 10000526 beq r2,zero,2b45c <___vfiprintf_internal_r+0x1428> + 2b448: 00800c04 movi r2,48 + 2b44c: d88019c5 stb r2,103(sp) + 2b450: dcc02717 ldw r19,156(sp) + 2b454: dd4019c4 addi r21,sp,103 + 2b458: 003bf606 br 2a434 <_gp+0xfffedefc> + 2b45c: 0027883a mov r19,zero + 2b460: dd401a04 addi r21,sp,104 + 2b464: 003bf306 br 2a434 <_gp+0xfffedefc> + 2b468: d9c01d85 stb r7,118(sp) + 2b46c: 003dc806 br 2ab90 <_gp+0xfffee658> + 2b470: d9c01d85 stb r7,118(sp) + 2b474: 003d3a06 br 2a960 <_gp+0xfffee428> + 2b478: d9c01d85 stb r7,118(sp) + 2b47c: 003d2a06 br 2a928 <_gp+0xfffee3f0> + 2b480: d9c01d85 stb r7,118(sp) + 2b484: 003cde06 br 2a800 <_gp+0xfffee2c8> + 2b488: d9c01d85 stb r7,118(sp) + 2b48c: 003cbc06 br 2a780 <_gp+0xfffee248> -0002bc44 <__vfiprintf_internal>: - 2bc44: 008000f4 movhi r2,3 - 2bc48: 10939f04 addi r2,r2,20092 - 2bc4c: 300f883a mov r7,r6 - 2bc50: 280d883a mov r6,r5 - 2bc54: 200b883a mov r5,r4 - 2bc58: 11000017 ldw r4,0(r2) - 2bc5c: 002a7e81 jmpi 2a7e8 <___vfiprintf_internal_r> +0002b490 <__vfiprintf_internal>: + 2b490: 008000f4 movhi r2,3 + 2b494: 10915404 addi r2,r2,17744 + 2b498: 300f883a mov r7,r6 + 2b49c: 280d883a mov r6,r5 + 2b4a0: 200b883a mov r5,r4 + 2b4a4: 11000017 ldw r4,0(r2) + 2b4a8: 002a0341 jmpi 2a034 <___vfiprintf_internal_r> -0002bc60 <__sbprintf>: - 2bc60: 2880030b ldhu r2,12(r5) - 2bc64: 2ac01917 ldw r11,100(r5) - 2bc68: 2a80038b ldhu r10,14(r5) - 2bc6c: 2a400717 ldw r9,28(r5) - 2bc70: 2a000917 ldw r8,36(r5) - 2bc74: defee204 addi sp,sp,-1144 - 2bc78: 00c10004 movi r3,1024 - 2bc7c: dc011a15 stw r16,1128(sp) - 2bc80: 10bfff4c andi r2,r2,65533 - 2bc84: 2821883a mov r16,r5 - 2bc88: d8cb883a add r5,sp,r3 - 2bc8c: dc811c15 stw r18,1136(sp) - 2bc90: dc411b15 stw r17,1132(sp) - 2bc94: dfc11d15 stw ra,1140(sp) - 2bc98: 2025883a mov r18,r4 - 2bc9c: d881030d sth r2,1036(sp) - 2bca0: dac11915 stw r11,1124(sp) - 2bca4: da81038d sth r10,1038(sp) - 2bca8: da410715 stw r9,1052(sp) - 2bcac: da010915 stw r8,1060(sp) - 2bcb0: dec10015 stw sp,1024(sp) - 2bcb4: dec10415 stw sp,1040(sp) - 2bcb8: d8c10215 stw r3,1032(sp) - 2bcbc: d8c10515 stw r3,1044(sp) - 2bcc0: d8010615 stw zero,1048(sp) - 2bcc4: 002a7e80 call 2a7e8 <___vfiprintf_internal_r> - 2bcc8: 1023883a mov r17,r2 - 2bccc: 10000416 blt r2,zero,2bce0 <__sbprintf+0x80> - 2bcd0: d9410004 addi r5,sp,1024 - 2bcd4: 9009883a mov r4,r18 - 2bcd8: 00276cc0 call 276cc <_fflush_r> - 2bcdc: 10000d1e bne r2,zero,2bd14 <__sbprintf+0xb4> - 2bce0: d881030b ldhu r2,1036(sp) - 2bce4: 1080100c andi r2,r2,64 - 2bce8: 10000326 beq r2,zero,2bcf8 <__sbprintf+0x98> - 2bcec: 8080030b ldhu r2,12(r16) - 2bcf0: 10801014 ori r2,r2,64 - 2bcf4: 8080030d sth r2,12(r16) - 2bcf8: 8805883a mov r2,r17 - 2bcfc: dfc11d17 ldw ra,1140(sp) - 2bd00: dc811c17 ldw r18,1136(sp) - 2bd04: dc411b17 ldw r17,1132(sp) - 2bd08: dc011a17 ldw r16,1128(sp) - 2bd0c: dec11e04 addi sp,sp,1144 - 2bd10: f800283a ret - 2bd14: 047fffc4 movi r17,-1 - 2bd18: 003ff106 br 2bce0 <__sbprintf+0x80> +0002b4ac <__sbprintf>: + 2b4ac: 2880030b ldhu r2,12(r5) + 2b4b0: 2ac01917 ldw r11,100(r5) + 2b4b4: 2a80038b ldhu r10,14(r5) + 2b4b8: 2a400717 ldw r9,28(r5) + 2b4bc: 2a000917 ldw r8,36(r5) + 2b4c0: defee204 addi sp,sp,-1144 + 2b4c4: 00c10004 movi r3,1024 + 2b4c8: dc011a15 stw r16,1128(sp) + 2b4cc: 10bfff4c andi r2,r2,65533 + 2b4d0: 2821883a mov r16,r5 + 2b4d4: d8cb883a add r5,sp,r3 + 2b4d8: dc811c15 stw r18,1136(sp) + 2b4dc: dc411b15 stw r17,1132(sp) + 2b4e0: dfc11d15 stw ra,1140(sp) + 2b4e4: 2025883a mov r18,r4 + 2b4e8: d881030d sth r2,1036(sp) + 2b4ec: dac11915 stw r11,1124(sp) + 2b4f0: da81038d sth r10,1038(sp) + 2b4f4: da410715 stw r9,1052(sp) + 2b4f8: da010915 stw r8,1060(sp) + 2b4fc: dec10015 stw sp,1024(sp) + 2b500: dec10415 stw sp,1040(sp) + 2b504: d8c10215 stw r3,1032(sp) + 2b508: d8c10515 stw r3,1044(sp) + 2b50c: d8010615 stw zero,1048(sp) + 2b510: 002a0340 call 2a034 <___vfiprintf_internal_r> + 2b514: 1023883a mov r17,r2 + 2b518: 10000416 blt r2,zero,2b52c <__sbprintf+0x80> + 2b51c: d9410004 addi r5,sp,1024 + 2b520: 9009883a mov r4,r18 + 2b524: 00271080 call 27108 <_fflush_r> + 2b528: 10000d1e bne r2,zero,2b560 <__sbprintf+0xb4> + 2b52c: d881030b ldhu r2,1036(sp) + 2b530: 1080100c andi r2,r2,64 + 2b534: 10000326 beq r2,zero,2b544 <__sbprintf+0x98> + 2b538: 8080030b ldhu r2,12(r16) + 2b53c: 10801014 ori r2,r2,64 + 2b540: 8080030d sth r2,12(r16) + 2b544: 8805883a mov r2,r17 + 2b548: dfc11d17 ldw ra,1140(sp) + 2b54c: dc811c17 ldw r18,1136(sp) + 2b550: dc411b17 ldw r17,1132(sp) + 2b554: dc011a17 ldw r16,1128(sp) + 2b558: dec11e04 addi sp,sp,1144 + 2b55c: f800283a ret + 2b560: 047fffc4 movi r17,-1 + 2b564: 003ff106 br 2b52c <_gp+0xfffeeff4> -0002bd1c <__swbuf_r>: - 2bd1c: defffb04 addi sp,sp,-20 - 2bd20: dcc00315 stw r19,12(sp) - 2bd24: dc800215 stw r18,8(sp) - 2bd28: dc000015 stw r16,0(sp) - 2bd2c: dfc00415 stw ra,16(sp) - 2bd30: dc400115 stw r17,4(sp) - 2bd34: 2025883a mov r18,r4 - 2bd38: 2827883a mov r19,r5 - 2bd3c: 3021883a mov r16,r6 - 2bd40: 20000226 beq r4,zero,2bd4c <__swbuf_r+0x30> - 2bd44: 20800e17 ldw r2,56(r4) - 2bd48: 10004226 beq r2,zero,2be54 <__swbuf_r+0x138> - 2bd4c: 80800617 ldw r2,24(r16) - 2bd50: 8100030b ldhu r4,12(r16) - 2bd54: 80800215 stw r2,8(r16) - 2bd58: 2080020c andi r2,r4,8 - 2bd5c: 10003626 beq r2,zero,2be38 <__swbuf_r+0x11c> - 2bd60: 80c00417 ldw r3,16(r16) - 2bd64: 18003426 beq r3,zero,2be38 <__swbuf_r+0x11c> - 2bd68: 2088000c andi r2,r4,8192 - 2bd6c: 9c403fcc andi r17,r19,255 - 2bd70: 10001a26 beq r2,zero,2bddc <__swbuf_r+0xc0> - 2bd74: 80800017 ldw r2,0(r16) - 2bd78: 81000517 ldw r4,20(r16) - 2bd7c: 10c7c83a sub r3,r2,r3 - 2bd80: 1900200e bge r3,r4,2be04 <__swbuf_r+0xe8> - 2bd84: 18c00044 addi r3,r3,1 - 2bd88: 81000217 ldw r4,8(r16) - 2bd8c: 11400044 addi r5,r2,1 - 2bd90: 81400015 stw r5,0(r16) - 2bd94: 213fffc4 addi r4,r4,-1 - 2bd98: 81000215 stw r4,8(r16) - 2bd9c: 14c00005 stb r19,0(r2) - 2bda0: 80800517 ldw r2,20(r16) - 2bda4: 10c01e26 beq r2,r3,2be20 <__swbuf_r+0x104> - 2bda8: 8080030b ldhu r2,12(r16) - 2bdac: 1080004c andi r2,r2,1 - 2bdb0: 10000226 beq r2,zero,2bdbc <__swbuf_r+0xa0> - 2bdb4: 00800284 movi r2,10 - 2bdb8: 88801926 beq r17,r2,2be20 <__swbuf_r+0x104> - 2bdbc: 8805883a mov r2,r17 - 2bdc0: dfc00417 ldw ra,16(sp) - 2bdc4: dcc00317 ldw r19,12(sp) - 2bdc8: dc800217 ldw r18,8(sp) - 2bdcc: dc400117 ldw r17,4(sp) - 2bdd0: dc000017 ldw r16,0(sp) - 2bdd4: dec00504 addi sp,sp,20 - 2bdd8: f800283a ret - 2bddc: 81401917 ldw r5,100(r16) - 2bde0: 00b7ffc4 movi r2,-8193 - 2bde4: 21080014 ori r4,r4,8192 - 2bde8: 2884703a and r2,r5,r2 - 2bdec: 80801915 stw r2,100(r16) - 2bdf0: 80800017 ldw r2,0(r16) - 2bdf4: 8100030d sth r4,12(r16) - 2bdf8: 81000517 ldw r4,20(r16) - 2bdfc: 10c7c83a sub r3,r2,r3 - 2be00: 193fe016 blt r3,r4,2bd84 <__swbuf_r+0x68> - 2be04: 800b883a mov r5,r16 - 2be08: 9009883a mov r4,r18 - 2be0c: 00276cc0 call 276cc <_fflush_r> - 2be10: 1000071e bne r2,zero,2be30 <__swbuf_r+0x114> - 2be14: 80800017 ldw r2,0(r16) - 2be18: 00c00044 movi r3,1 - 2be1c: 003fda06 br 2bd88 <__swbuf_r+0x6c> - 2be20: 800b883a mov r5,r16 - 2be24: 9009883a mov r4,r18 - 2be28: 00276cc0 call 276cc <_fflush_r> - 2be2c: 103fe326 beq r2,zero,2bdbc <__swbuf_r+0xa0> - 2be30: 00bfffc4 movi r2,-1 - 2be34: 003fe206 br 2bdc0 <__swbuf_r+0xa4> - 2be38: 800b883a mov r5,r16 - 2be3c: 9009883a mov r4,r18 - 2be40: 0025ad40 call 25ad4 <__swsetup_r> - 2be44: 103ffa1e bne r2,zero,2be30 <__swbuf_r+0x114> - 2be48: 8100030b ldhu r4,12(r16) - 2be4c: 80c00417 ldw r3,16(r16) - 2be50: 003fc506 br 2bd68 <__swbuf_r+0x4c> - 2be54: 0027aa80 call 27aa8 <__sinit> - 2be58: 003fbc06 br 2bd4c <__swbuf_r+0x30> +0002b568 <__swbuf_r>: + 2b568: defffb04 addi sp,sp,-20 + 2b56c: dcc00315 stw r19,12(sp) + 2b570: dc800215 stw r18,8(sp) + 2b574: dc000015 stw r16,0(sp) + 2b578: dfc00415 stw ra,16(sp) + 2b57c: dc400115 stw r17,4(sp) + 2b580: 2025883a mov r18,r4 + 2b584: 2827883a mov r19,r5 + 2b588: 3021883a mov r16,r6 + 2b58c: 20000226 beq r4,zero,2b598 <__swbuf_r+0x30> + 2b590: 20800e17 ldw r2,56(r4) + 2b594: 10004226 beq r2,zero,2b6a0 <__swbuf_r+0x138> + 2b598: 80800617 ldw r2,24(r16) + 2b59c: 8100030b ldhu r4,12(r16) + 2b5a0: 80800215 stw r2,8(r16) + 2b5a4: 2080020c andi r2,r4,8 + 2b5a8: 10003626 beq r2,zero,2b684 <__swbuf_r+0x11c> + 2b5ac: 80c00417 ldw r3,16(r16) + 2b5b0: 18003426 beq r3,zero,2b684 <__swbuf_r+0x11c> + 2b5b4: 2088000c andi r2,r4,8192 + 2b5b8: 9c403fcc andi r17,r19,255 + 2b5bc: 10001a26 beq r2,zero,2b628 <__swbuf_r+0xc0> + 2b5c0: 80800017 ldw r2,0(r16) + 2b5c4: 81000517 ldw r4,20(r16) + 2b5c8: 10c7c83a sub r3,r2,r3 + 2b5cc: 1900200e bge r3,r4,2b650 <__swbuf_r+0xe8> + 2b5d0: 18c00044 addi r3,r3,1 + 2b5d4: 81000217 ldw r4,8(r16) + 2b5d8: 11400044 addi r5,r2,1 + 2b5dc: 81400015 stw r5,0(r16) + 2b5e0: 213fffc4 addi r4,r4,-1 + 2b5e4: 81000215 stw r4,8(r16) + 2b5e8: 14c00005 stb r19,0(r2) + 2b5ec: 80800517 ldw r2,20(r16) + 2b5f0: 10c01e26 beq r2,r3,2b66c <__swbuf_r+0x104> + 2b5f4: 8080030b ldhu r2,12(r16) + 2b5f8: 1080004c andi r2,r2,1 + 2b5fc: 10000226 beq r2,zero,2b608 <__swbuf_r+0xa0> + 2b600: 00800284 movi r2,10 + 2b604: 88801926 beq r17,r2,2b66c <__swbuf_r+0x104> + 2b608: 8805883a mov r2,r17 + 2b60c: dfc00417 ldw ra,16(sp) + 2b610: dcc00317 ldw r19,12(sp) + 2b614: dc800217 ldw r18,8(sp) + 2b618: dc400117 ldw r17,4(sp) + 2b61c: dc000017 ldw r16,0(sp) + 2b620: dec00504 addi sp,sp,20 + 2b624: f800283a ret + 2b628: 81401917 ldw r5,100(r16) + 2b62c: 00b7ffc4 movi r2,-8193 + 2b630: 21080014 ori r4,r4,8192 + 2b634: 2884703a and r2,r5,r2 + 2b638: 80801915 stw r2,100(r16) + 2b63c: 80800017 ldw r2,0(r16) + 2b640: 8100030d sth r4,12(r16) + 2b644: 81000517 ldw r4,20(r16) + 2b648: 10c7c83a sub r3,r2,r3 + 2b64c: 193fe016 blt r3,r4,2b5d0 <_gp+0xfffef098> + 2b650: 800b883a mov r5,r16 + 2b654: 9009883a mov r4,r18 + 2b658: 00271080 call 27108 <_fflush_r> + 2b65c: 1000071e bne r2,zero,2b67c <__swbuf_r+0x114> + 2b660: 80800017 ldw r2,0(r16) + 2b664: 00c00044 movi r3,1 + 2b668: 003fda06 br 2b5d4 <_gp+0xfffef09c> + 2b66c: 800b883a mov r5,r16 + 2b670: 9009883a mov r4,r18 + 2b674: 00271080 call 27108 <_fflush_r> + 2b678: 103fe326 beq r2,zero,2b608 <_gp+0xfffef0d0> + 2b67c: 00bfffc4 movi r2,-1 + 2b680: 003fe206 br 2b60c <_gp+0xfffef0d4> + 2b684: 800b883a mov r5,r16 + 2b688: 9009883a mov r4,r18 + 2b68c: 00255100 call 25510 <__swsetup_r> + 2b690: 103ffa1e bne r2,zero,2b67c <_gp+0xfffef144> + 2b694: 8100030b ldhu r4,12(r16) + 2b698: 80c00417 ldw r3,16(r16) + 2b69c: 003fc506 br 2b5b4 <_gp+0xfffef07c> + 2b6a0: 00274e40 call 274e4 <__sinit> + 2b6a4: 003fbc06 br 2b598 <_gp+0xfffef060> -0002be5c <__swbuf>: - 2be5c: 008000f4 movhi r2,3 - 2be60: 10939f04 addi r2,r2,20092 - 2be64: 280d883a mov r6,r5 - 2be68: 200b883a mov r5,r4 - 2be6c: 11000017 ldw r4,0(r2) - 2be70: 002bd1c1 jmpi 2bd1c <__swbuf_r> +0002b6a8 <__swbuf>: + 2b6a8: 008000f4 movhi r2,3 + 2b6ac: 10915404 addi r2,r2,17744 + 2b6b0: 280d883a mov r6,r5 + 2b6b4: 200b883a mov r5,r4 + 2b6b8: 11000017 ldw r4,0(r2) + 2b6bc: 002b5681 jmpi 2b568 <__swbuf_r> -0002be74 <_write_r>: - 2be74: defffd04 addi sp,sp,-12 - 2be78: 2805883a mov r2,r5 - 2be7c: dc000015 stw r16,0(sp) - 2be80: 040000f4 movhi r16,3 - 2be84: dc400115 stw r17,4(sp) - 2be88: 300b883a mov r5,r6 - 2be8c: 841c5904 addi r16,r16,29028 - 2be90: 2023883a mov r17,r4 - 2be94: 380d883a mov r6,r7 - 2be98: 1009883a mov r4,r2 - 2be9c: dfc00215 stw ra,8(sp) - 2bea0: 80000015 stw zero,0(r16) - 2bea4: 00303700 call 30370 - 2bea8: 00ffffc4 movi r3,-1 - 2beac: 10c00526 beq r2,r3,2bec4 <_write_r+0x50> - 2beb0: dfc00217 ldw ra,8(sp) - 2beb4: dc400117 ldw r17,4(sp) - 2beb8: dc000017 ldw r16,0(sp) - 2bebc: dec00304 addi sp,sp,12 - 2bec0: f800283a ret - 2bec4: 80c00017 ldw r3,0(r16) - 2bec8: 183ff926 beq r3,zero,2beb0 <_write_r+0x3c> - 2becc: 88c00015 stw r3,0(r17) - 2bed0: 003ff706 br 2beb0 <_write_r+0x3c> +0002b6c0 <_write_r>: + 2b6c0: defffd04 addi sp,sp,-12 + 2b6c4: 2805883a mov r2,r5 + 2b6c8: dc000015 stw r16,0(sp) + 2b6cc: 040000f4 movhi r16,3 + 2b6d0: dc400115 stw r17,4(sp) + 2b6d4: 300b883a mov r5,r6 + 2b6d8: 841a0c04 addi r16,r16,26672 + 2b6dc: 2023883a mov r17,r4 + 2b6e0: 380d883a mov r6,r7 + 2b6e4: 1009883a mov r4,r2 + 2b6e8: dfc00215 stw ra,8(sp) + 2b6ec: 80000015 stw zero,0(r16) + 2b6f0: 002fa4c0 call 2fa4c + 2b6f4: 00ffffc4 movi r3,-1 + 2b6f8: 10c00526 beq r2,r3,2b710 <_write_r+0x50> + 2b6fc: dfc00217 ldw ra,8(sp) + 2b700: dc400117 ldw r17,4(sp) + 2b704: dc000017 ldw r16,0(sp) + 2b708: dec00304 addi sp,sp,12 + 2b70c: f800283a ret + 2b710: 80c00017 ldw r3,0(r16) + 2b714: 183ff926 beq r3,zero,2b6fc <_gp+0xfffef1c4> + 2b718: 88c00015 stw r3,0(r17) + 2b71c: 003ff706 br 2b6fc <_gp+0xfffef1c4> -0002bed4 <_close_r>: - 2bed4: defffd04 addi sp,sp,-12 - 2bed8: dc000015 stw r16,0(sp) - 2bedc: 040000f4 movhi r16,3 - 2bee0: dc400115 stw r17,4(sp) - 2bee4: 841c5904 addi r16,r16,29028 - 2bee8: 2023883a mov r17,r4 - 2beec: 2809883a mov r4,r5 - 2bef0: dfc00215 stw ra,8(sp) - 2bef4: 80000015 stw zero,0(r16) - 2bef8: 002f7b80 call 2f7b8 - 2befc: 00ffffc4 movi r3,-1 - 2bf00: 10c00526 beq r2,r3,2bf18 <_close_r+0x44> - 2bf04: dfc00217 ldw ra,8(sp) - 2bf08: dc400117 ldw r17,4(sp) - 2bf0c: dc000017 ldw r16,0(sp) - 2bf10: dec00304 addi sp,sp,12 - 2bf14: f800283a ret - 2bf18: 80c00017 ldw r3,0(r16) - 2bf1c: 183ff926 beq r3,zero,2bf04 <_close_r+0x30> - 2bf20: 88c00015 stw r3,0(r17) - 2bf24: 003ff706 br 2bf04 <_close_r+0x30> +0002b720 <_close_r>: + 2b720: defffd04 addi sp,sp,-12 + 2b724: dc000015 stw r16,0(sp) + 2b728: 040000f4 movhi r16,3 + 2b72c: dc400115 stw r17,4(sp) + 2b730: 841a0c04 addi r16,r16,26672 + 2b734: 2023883a mov r17,r4 + 2b738: 2809883a mov r4,r5 + 2b73c: dfc00215 stw ra,8(sp) + 2b740: 80000015 stw zero,0(r16) + 2b744: 002f0040 call 2f004 + 2b748: 00ffffc4 movi r3,-1 + 2b74c: 10c00526 beq r2,r3,2b764 <_close_r+0x44> + 2b750: dfc00217 ldw ra,8(sp) + 2b754: dc400117 ldw r17,4(sp) + 2b758: dc000017 ldw r16,0(sp) + 2b75c: dec00304 addi sp,sp,12 + 2b760: f800283a ret + 2b764: 80c00017 ldw r3,0(r16) + 2b768: 183ff926 beq r3,zero,2b750 <_gp+0xfffef218> + 2b76c: 88c00015 stw r3,0(r17) + 2b770: 003ff706 br 2b750 <_gp+0xfffef218> -0002bf28 <_calloc_r>: - 2bf28: 298b383a mul r5,r5,r6 - 2bf2c: defffe04 addi sp,sp,-8 - 2bf30: dfc00115 stw ra,4(sp) - 2bf34: dc000015 stw r16,0(sp) - 2bf38: 0022bfc0 call 22bfc <_malloc_r> - 2bf3c: 10002926 beq r2,zero,2bfe4 <_calloc_r+0xbc> - 2bf40: 11bfff17 ldw r6,-4(r2) - 2bf44: 1021883a mov r16,r2 - 2bf48: 00bfff04 movi r2,-4 - 2bf4c: 308c703a and r6,r6,r2 - 2bf50: 00c00904 movi r3,36 - 2bf54: 308d883a add r6,r6,r2 - 2bf58: 19801636 bltu r3,r6,2bfb4 <_calloc_r+0x8c> - 2bf5c: 008004c4 movi r2,19 - 2bf60: 11800b2e bgeu r2,r6,2bf90 <_calloc_r+0x68> - 2bf64: 80000015 stw zero,0(r16) - 2bf68: 80000115 stw zero,4(r16) - 2bf6c: 008006c4 movi r2,27 - 2bf70: 11801a2e bgeu r2,r6,2bfdc <_calloc_r+0xb4> - 2bf74: 80000215 stw zero,8(r16) - 2bf78: 80000315 stw zero,12(r16) - 2bf7c: 30c0151e bne r6,r3,2bfd4 <_calloc_r+0xac> - 2bf80: 80000415 stw zero,16(r16) - 2bf84: 80800604 addi r2,r16,24 - 2bf88: 80000515 stw zero,20(r16) - 2bf8c: 00000106 br 2bf94 <_calloc_r+0x6c> - 2bf90: 8005883a mov r2,r16 - 2bf94: 10000015 stw zero,0(r2) - 2bf98: 10000115 stw zero,4(r2) - 2bf9c: 10000215 stw zero,8(r2) - 2bfa0: 8005883a mov r2,r16 - 2bfa4: dfc00117 ldw ra,4(sp) - 2bfa8: dc000017 ldw r16,0(sp) - 2bfac: dec00204 addi sp,sp,8 - 2bfb0: f800283a ret - 2bfb4: 000b883a mov r5,zero - 2bfb8: 8009883a mov r4,r16 - 2bfbc: 00234080 call 23408 - 2bfc0: 8005883a mov r2,r16 - 2bfc4: dfc00117 ldw ra,4(sp) - 2bfc8: dc000017 ldw r16,0(sp) - 2bfcc: dec00204 addi sp,sp,8 - 2bfd0: f800283a ret - 2bfd4: 80800404 addi r2,r16,16 - 2bfd8: 003fee06 br 2bf94 <_calloc_r+0x6c> - 2bfdc: 80800204 addi r2,r16,8 - 2bfe0: 003fec06 br 2bf94 <_calloc_r+0x6c> - 2bfe4: 0005883a mov r2,zero - 2bfe8: 003fee06 br 2bfa4 <_calloc_r+0x7c> +0002b774 <_calloc_r>: + 2b774: 298b383a mul r5,r5,r6 + 2b778: defffe04 addi sp,sp,-8 + 2b77c: dfc00115 stw ra,4(sp) + 2b780: dc000015 stw r16,0(sp) + 2b784: 00226c00 call 226c0 <_malloc_r> + 2b788: 10002926 beq r2,zero,2b830 <_calloc_r+0xbc> + 2b78c: 11bfff17 ldw r6,-4(r2) + 2b790: 1021883a mov r16,r2 + 2b794: 00bfff04 movi r2,-4 + 2b798: 308c703a and r6,r6,r2 + 2b79c: 00c00904 movi r3,36 + 2b7a0: 308d883a add r6,r6,r2 + 2b7a4: 19801636 bltu r3,r6,2b800 <_calloc_r+0x8c> + 2b7a8: 008004c4 movi r2,19 + 2b7ac: 11800b2e bgeu r2,r6,2b7dc <_calloc_r+0x68> + 2b7b0: 80000015 stw zero,0(r16) + 2b7b4: 80000115 stw zero,4(r16) + 2b7b8: 008006c4 movi r2,27 + 2b7bc: 11801a2e bgeu r2,r6,2b828 <_calloc_r+0xb4> + 2b7c0: 80000215 stw zero,8(r16) + 2b7c4: 80000315 stw zero,12(r16) + 2b7c8: 30c0151e bne r6,r3,2b820 <_calloc_r+0xac> + 2b7cc: 80000415 stw zero,16(r16) + 2b7d0: 80800604 addi r2,r16,24 + 2b7d4: 80000515 stw zero,20(r16) + 2b7d8: 00000106 br 2b7e0 <_calloc_r+0x6c> + 2b7dc: 8005883a mov r2,r16 + 2b7e0: 10000015 stw zero,0(r2) + 2b7e4: 10000115 stw zero,4(r2) + 2b7e8: 10000215 stw zero,8(r2) + 2b7ec: 8005883a mov r2,r16 + 2b7f0: dfc00117 ldw ra,4(sp) + 2b7f4: dc000017 ldw r16,0(sp) + 2b7f8: dec00204 addi sp,sp,8 + 2b7fc: f800283a ret + 2b800: 000b883a mov r5,zero + 2b804: 8009883a mov r4,r16 + 2b808: 0022ecc0 call 22ecc + 2b80c: 8005883a mov r2,r16 + 2b810: dfc00117 ldw ra,4(sp) + 2b814: dc000017 ldw r16,0(sp) + 2b818: dec00204 addi sp,sp,8 + 2b81c: f800283a ret + 2b820: 80800404 addi r2,r16,16 + 2b824: 003fee06 br 2b7e0 <_gp+0xfffef2a8> + 2b828: 80800204 addi r2,r16,8 + 2b82c: 003fec06 br 2b7e0 <_gp+0xfffef2a8> + 2b830: 0005883a mov r2,zero + 2b834: 003fee06 br 2b7f0 <_gp+0xfffef2b8> -0002bfec <_fclose_r>: - 2bfec: 28003926 beq r5,zero,2c0d4 <_fclose_r+0xe8> - 2bff0: defffc04 addi sp,sp,-16 - 2bff4: dc400115 stw r17,4(sp) - 2bff8: dc000015 stw r16,0(sp) - 2bffc: dfc00315 stw ra,12(sp) - 2c000: dc800215 stw r18,8(sp) - 2c004: 2023883a mov r17,r4 - 2c008: 2821883a mov r16,r5 - 2c00c: 20000226 beq r4,zero,2c018 <_fclose_r+0x2c> - 2c010: 20800e17 ldw r2,56(r4) - 2c014: 10002726 beq r2,zero,2c0b4 <_fclose_r+0xc8> - 2c018: 8080030f ldh r2,12(r16) - 2c01c: 1000071e bne r2,zero,2c03c <_fclose_r+0x50> - 2c020: 0005883a mov r2,zero - 2c024: dfc00317 ldw ra,12(sp) - 2c028: dc800217 ldw r18,8(sp) - 2c02c: dc400117 ldw r17,4(sp) - 2c030: dc000017 ldw r16,0(sp) - 2c034: dec00404 addi sp,sp,16 - 2c038: f800283a ret - 2c03c: 800b883a mov r5,r16 - 2c040: 8809883a mov r4,r17 - 2c044: 00274b00 call 274b0 <__sflush_r> - 2c048: 1025883a mov r18,r2 - 2c04c: 80800b17 ldw r2,44(r16) - 2c050: 10000426 beq r2,zero,2c064 <_fclose_r+0x78> - 2c054: 81400717 ldw r5,28(r16) - 2c058: 8809883a mov r4,r17 - 2c05c: 103ee83a callr r2 - 2c060: 10001616 blt r2,zero,2c0bc <_fclose_r+0xd0> - 2c064: 8080030b ldhu r2,12(r16) - 2c068: 1080200c andi r2,r2,128 - 2c06c: 1000151e bne r2,zero,2c0c4 <_fclose_r+0xd8> - 2c070: 81400c17 ldw r5,48(r16) - 2c074: 28000526 beq r5,zero,2c08c <_fclose_r+0xa0> - 2c078: 80801004 addi r2,r16,64 - 2c07c: 28800226 beq r5,r2,2c088 <_fclose_r+0x9c> - 2c080: 8809883a mov r4,r17 - 2c084: 0027c1c0 call 27c1c <_free_r> - 2c088: 80000c15 stw zero,48(r16) - 2c08c: 81401117 ldw r5,68(r16) - 2c090: 28000326 beq r5,zero,2c0a0 <_fclose_r+0xb4> - 2c094: 8809883a mov r4,r17 - 2c098: 0027c1c0 call 27c1c <_free_r> - 2c09c: 80001115 stw zero,68(r16) - 2c0a0: 0027ab80 call 27ab8 <__sfp_lock_acquire> - 2c0a4: 8000030d sth zero,12(r16) - 2c0a8: 0027abc0 call 27abc <__sfp_lock_release> - 2c0ac: 9005883a mov r2,r18 - 2c0b0: 003fdc06 br 2c024 <_fclose_r+0x38> - 2c0b4: 0027aa80 call 27aa8 <__sinit> - 2c0b8: 003fd706 br 2c018 <_fclose_r+0x2c> - 2c0bc: 04bfffc4 movi r18,-1 - 2c0c0: 003fe806 br 2c064 <_fclose_r+0x78> - 2c0c4: 81400417 ldw r5,16(r16) - 2c0c8: 8809883a mov r4,r17 - 2c0cc: 0027c1c0 call 27c1c <_free_r> - 2c0d0: 003fe706 br 2c070 <_fclose_r+0x84> - 2c0d4: 0005883a mov r2,zero - 2c0d8: f800283a ret +0002b838 <_fclose_r>: + 2b838: 28003926 beq r5,zero,2b920 <_fclose_r+0xe8> + 2b83c: defffc04 addi sp,sp,-16 + 2b840: dc400115 stw r17,4(sp) + 2b844: dc000015 stw r16,0(sp) + 2b848: dfc00315 stw ra,12(sp) + 2b84c: dc800215 stw r18,8(sp) + 2b850: 2023883a mov r17,r4 + 2b854: 2821883a mov r16,r5 + 2b858: 20000226 beq r4,zero,2b864 <_fclose_r+0x2c> + 2b85c: 20800e17 ldw r2,56(r4) + 2b860: 10002726 beq r2,zero,2b900 <_fclose_r+0xc8> + 2b864: 8080030f ldh r2,12(r16) + 2b868: 1000071e bne r2,zero,2b888 <_fclose_r+0x50> + 2b86c: 0005883a mov r2,zero + 2b870: dfc00317 ldw ra,12(sp) + 2b874: dc800217 ldw r18,8(sp) + 2b878: dc400117 ldw r17,4(sp) + 2b87c: dc000017 ldw r16,0(sp) + 2b880: dec00404 addi sp,sp,16 + 2b884: f800283a ret + 2b888: 800b883a mov r5,r16 + 2b88c: 8809883a mov r4,r17 + 2b890: 0026eec0 call 26eec <__sflush_r> + 2b894: 1025883a mov r18,r2 + 2b898: 80800b17 ldw r2,44(r16) + 2b89c: 10000426 beq r2,zero,2b8b0 <_fclose_r+0x78> + 2b8a0: 81400717 ldw r5,28(r16) + 2b8a4: 8809883a mov r4,r17 + 2b8a8: 103ee83a callr r2 + 2b8ac: 10001616 blt r2,zero,2b908 <_fclose_r+0xd0> + 2b8b0: 8080030b ldhu r2,12(r16) + 2b8b4: 1080200c andi r2,r2,128 + 2b8b8: 1000151e bne r2,zero,2b910 <_fclose_r+0xd8> + 2b8bc: 81400c17 ldw r5,48(r16) + 2b8c0: 28000526 beq r5,zero,2b8d8 <_fclose_r+0xa0> + 2b8c4: 80801004 addi r2,r16,64 + 2b8c8: 28800226 beq r5,r2,2b8d4 <_fclose_r+0x9c> + 2b8cc: 8809883a mov r4,r17 + 2b8d0: 00276580 call 27658 <_free_r> + 2b8d4: 80000c15 stw zero,48(r16) + 2b8d8: 81401117 ldw r5,68(r16) + 2b8dc: 28000326 beq r5,zero,2b8ec <_fclose_r+0xb4> + 2b8e0: 8809883a mov r4,r17 + 2b8e4: 00276580 call 27658 <_free_r> + 2b8e8: 80001115 stw zero,68(r16) + 2b8ec: 00274f40 call 274f4 <__sfp_lock_acquire> + 2b8f0: 8000030d sth zero,12(r16) + 2b8f4: 00274f80 call 274f8 <__sfp_lock_release> + 2b8f8: 9005883a mov r2,r18 + 2b8fc: 003fdc06 br 2b870 <_gp+0xfffef338> + 2b900: 00274e40 call 274e4 <__sinit> + 2b904: 003fd706 br 2b864 <_gp+0xfffef32c> + 2b908: 04bfffc4 movi r18,-1 + 2b90c: 003fe806 br 2b8b0 <_gp+0xfffef378> + 2b910: 81400417 ldw r5,16(r16) + 2b914: 8809883a mov r4,r17 + 2b918: 00276580 call 27658 <_free_r> + 2b91c: 003fe706 br 2b8bc <_gp+0xfffef384> + 2b920: 0005883a mov r2,zero + 2b924: f800283a ret -0002c0dc : - 2c0dc: 008000f4 movhi r2,3 - 2c0e0: 10939f04 addi r2,r2,20092 - 2c0e4: 200b883a mov r5,r4 - 2c0e8: 11000017 ldw r4,0(r2) - 2c0ec: 002bfec1 jmpi 2bfec <_fclose_r> +0002b928 : + 2b928: 008000f4 movhi r2,3 + 2b92c: 10915404 addi r2,r2,17744 + 2b930: 200b883a mov r5,r4 + 2b934: 11000017 ldw r4,0(r2) + 2b938: 002b8381 jmpi 2b838 <_fclose_r> -0002c0f0 <__fputwc>: - 2c0f0: defff804 addi sp,sp,-32 - 2c0f4: dcc00415 stw r19,16(sp) - 2c0f8: dc800315 stw r18,12(sp) - 2c0fc: dc000115 stw r16,4(sp) - 2c100: dfc00715 stw ra,28(sp) - 2c104: dd400615 stw r21,24(sp) - 2c108: dd000515 stw r20,20(sp) - 2c10c: dc400215 stw r17,8(sp) - 2c110: 2027883a mov r19,r4 - 2c114: 2825883a mov r18,r5 - 2c118: 3021883a mov r16,r6 - 2c11c: 00285f80 call 285f8 <__locale_mb_cur_max> - 2c120: 00c00044 movi r3,1 - 2c124: 10c03e26 beq r2,r3,2c220 <__fputwc+0x130> - 2c128: 81c01704 addi r7,r16,92 - 2c12c: 900d883a mov r6,r18 - 2c130: d80b883a mov r5,sp - 2c134: 9809883a mov r4,r19 - 2c138: 002c4680 call 2c468 <_wcrtomb_r> - 2c13c: 1029883a mov r20,r2 - 2c140: 00bfffc4 movi r2,-1 - 2c144: a0802026 beq r20,r2,2c1c8 <__fputwc+0xd8> - 2c148: d9400003 ldbu r5,0(sp) - 2c14c: a0001c26 beq r20,zero,2c1c0 <__fputwc+0xd0> - 2c150: 0023883a mov r17,zero - 2c154: 05400284 movi r21,10 - 2c158: 00000906 br 2c180 <__fputwc+0x90> - 2c15c: 80800017 ldw r2,0(r16) - 2c160: 11400005 stb r5,0(r2) - 2c164: 80c00017 ldw r3,0(r16) - 2c168: 18c00044 addi r3,r3,1 - 2c16c: 80c00015 stw r3,0(r16) - 2c170: 8c400044 addi r17,r17,1 - 2c174: dc45883a add r2,sp,r17 - 2c178: 8d00112e bgeu r17,r20,2c1c0 <__fputwc+0xd0> - 2c17c: 11400003 ldbu r5,0(r2) - 2c180: 80c00217 ldw r3,8(r16) - 2c184: 18ffffc4 addi r3,r3,-1 - 2c188: 80c00215 stw r3,8(r16) - 2c18c: 183ff30e bge r3,zero,2c15c <__fputwc+0x6c> - 2c190: 80800617 ldw r2,24(r16) - 2c194: 18801916 blt r3,r2,2c1fc <__fputwc+0x10c> - 2c198: 80800017 ldw r2,0(r16) - 2c19c: 11400005 stb r5,0(r2) - 2c1a0: 80800017 ldw r2,0(r16) - 2c1a4: 10c00003 ldbu r3,0(r2) - 2c1a8: 10800044 addi r2,r2,1 - 2c1ac: 1d402326 beq r3,r21,2c23c <__fputwc+0x14c> - 2c1b0: 80800015 stw r2,0(r16) - 2c1b4: 8c400044 addi r17,r17,1 - 2c1b8: dc45883a add r2,sp,r17 - 2c1bc: 8d3fef36 bltu r17,r20,2c17c <__fputwc+0x8c> - 2c1c0: 9005883a mov r2,r18 - 2c1c4: 00000406 br 2c1d8 <__fputwc+0xe8> - 2c1c8: 80c0030b ldhu r3,12(r16) - 2c1cc: a005883a mov r2,r20 - 2c1d0: 18c01014 ori r3,r3,64 - 2c1d4: 80c0030d sth r3,12(r16) - 2c1d8: dfc00717 ldw ra,28(sp) - 2c1dc: dd400617 ldw r21,24(sp) - 2c1e0: dd000517 ldw r20,20(sp) - 2c1e4: dcc00417 ldw r19,16(sp) - 2c1e8: dc800317 ldw r18,12(sp) - 2c1ec: dc400217 ldw r17,8(sp) - 2c1f0: dc000117 ldw r16,4(sp) - 2c1f4: dec00804 addi sp,sp,32 - 2c1f8: f800283a ret - 2c1fc: 800d883a mov r6,r16 - 2c200: 29403fcc andi r5,r5,255 - 2c204: 9809883a mov r4,r19 - 2c208: 002bd1c0 call 2bd1c <__swbuf_r> - 2c20c: 10bfffe0 cmpeqi r2,r2,-1 - 2c210: 10803fcc andi r2,r2,255 - 2c214: 103fd626 beq r2,zero,2c170 <__fputwc+0x80> - 2c218: 00bfffc4 movi r2,-1 - 2c21c: 003fee06 br 2c1d8 <__fputwc+0xe8> - 2c220: 90ffffc4 addi r3,r18,-1 - 2c224: 01003f84 movi r4,254 - 2c228: 20ffbf36 bltu r4,r3,2c128 <__fputwc+0x38> - 2c22c: 900b883a mov r5,r18 - 2c230: dc800005 stb r18,0(sp) - 2c234: 1029883a mov r20,r2 - 2c238: 003fc506 br 2c150 <__fputwc+0x60> - 2c23c: 800d883a mov r6,r16 - 2c240: a80b883a mov r5,r21 - 2c244: 9809883a mov r4,r19 - 2c248: 002bd1c0 call 2bd1c <__swbuf_r> - 2c24c: 10bfffe0 cmpeqi r2,r2,-1 - 2c250: 003fef06 br 2c210 <__fputwc+0x120> +0002b93c <__fputwc>: + 2b93c: defff804 addi sp,sp,-32 + 2b940: dcc00415 stw r19,16(sp) + 2b944: dc800315 stw r18,12(sp) + 2b948: dc000115 stw r16,4(sp) + 2b94c: dfc00715 stw ra,28(sp) + 2b950: dd400615 stw r21,24(sp) + 2b954: dd000515 stw r20,20(sp) + 2b958: dc400215 stw r17,8(sp) + 2b95c: 2027883a mov r19,r4 + 2b960: 2825883a mov r18,r5 + 2b964: 3021883a mov r16,r6 + 2b968: 00280340 call 28034 <__locale_mb_cur_max> + 2b96c: 00c00044 movi r3,1 + 2b970: 10c03e26 beq r2,r3,2ba6c <__fputwc+0x130> + 2b974: 81c01704 addi r7,r16,92 + 2b978: 900d883a mov r6,r18 + 2b97c: d80b883a mov r5,sp + 2b980: 9809883a mov r4,r19 + 2b984: 002bcb40 call 2bcb4 <_wcrtomb_r> + 2b988: 1029883a mov r20,r2 + 2b98c: 00bfffc4 movi r2,-1 + 2b990: a0802026 beq r20,r2,2ba14 <__fputwc+0xd8> + 2b994: d9400003 ldbu r5,0(sp) + 2b998: a0001c26 beq r20,zero,2ba0c <__fputwc+0xd0> + 2b99c: 0023883a mov r17,zero + 2b9a0: 05400284 movi r21,10 + 2b9a4: 00000906 br 2b9cc <__fputwc+0x90> + 2b9a8: 80800017 ldw r2,0(r16) + 2b9ac: 11400005 stb r5,0(r2) + 2b9b0: 80c00017 ldw r3,0(r16) + 2b9b4: 18c00044 addi r3,r3,1 + 2b9b8: 80c00015 stw r3,0(r16) + 2b9bc: 8c400044 addi r17,r17,1 + 2b9c0: dc45883a add r2,sp,r17 + 2b9c4: 8d00112e bgeu r17,r20,2ba0c <__fputwc+0xd0> + 2b9c8: 11400003 ldbu r5,0(r2) + 2b9cc: 80c00217 ldw r3,8(r16) + 2b9d0: 18ffffc4 addi r3,r3,-1 + 2b9d4: 80c00215 stw r3,8(r16) + 2b9d8: 183ff30e bge r3,zero,2b9a8 <_gp+0xfffef470> + 2b9dc: 80800617 ldw r2,24(r16) + 2b9e0: 18801916 blt r3,r2,2ba48 <__fputwc+0x10c> + 2b9e4: 80800017 ldw r2,0(r16) + 2b9e8: 11400005 stb r5,0(r2) + 2b9ec: 80800017 ldw r2,0(r16) + 2b9f0: 10c00003 ldbu r3,0(r2) + 2b9f4: 10800044 addi r2,r2,1 + 2b9f8: 1d402326 beq r3,r21,2ba88 <__fputwc+0x14c> + 2b9fc: 80800015 stw r2,0(r16) + 2ba00: 8c400044 addi r17,r17,1 + 2ba04: dc45883a add r2,sp,r17 + 2ba08: 8d3fef36 bltu r17,r20,2b9c8 <_gp+0xfffef490> + 2ba0c: 9005883a mov r2,r18 + 2ba10: 00000406 br 2ba24 <__fputwc+0xe8> + 2ba14: 80c0030b ldhu r3,12(r16) + 2ba18: a005883a mov r2,r20 + 2ba1c: 18c01014 ori r3,r3,64 + 2ba20: 80c0030d sth r3,12(r16) + 2ba24: dfc00717 ldw ra,28(sp) + 2ba28: dd400617 ldw r21,24(sp) + 2ba2c: dd000517 ldw r20,20(sp) + 2ba30: dcc00417 ldw r19,16(sp) + 2ba34: dc800317 ldw r18,12(sp) + 2ba38: dc400217 ldw r17,8(sp) + 2ba3c: dc000117 ldw r16,4(sp) + 2ba40: dec00804 addi sp,sp,32 + 2ba44: f800283a ret + 2ba48: 800d883a mov r6,r16 + 2ba4c: 29403fcc andi r5,r5,255 + 2ba50: 9809883a mov r4,r19 + 2ba54: 002b5680 call 2b568 <__swbuf_r> + 2ba58: 10bfffe0 cmpeqi r2,r2,-1 + 2ba5c: 10803fcc andi r2,r2,255 + 2ba60: 103fd626 beq r2,zero,2b9bc <_gp+0xfffef484> + 2ba64: 00bfffc4 movi r2,-1 + 2ba68: 003fee06 br 2ba24 <_gp+0xfffef4ec> + 2ba6c: 90ffffc4 addi r3,r18,-1 + 2ba70: 01003f84 movi r4,254 + 2ba74: 20ffbf36 bltu r4,r3,2b974 <_gp+0xfffef43c> + 2ba78: 900b883a mov r5,r18 + 2ba7c: dc800005 stb r18,0(sp) + 2ba80: 1029883a mov r20,r2 + 2ba84: 003fc506 br 2b99c <_gp+0xfffef464> + 2ba88: 800d883a mov r6,r16 + 2ba8c: a80b883a mov r5,r21 + 2ba90: 9809883a mov r4,r19 + 2ba94: 002b5680 call 2b568 <__swbuf_r> + 2ba98: 10bfffe0 cmpeqi r2,r2,-1 + 2ba9c: 003fef06 br 2ba5c <_gp+0xfffef524> -0002c254 <_fputwc_r>: - 2c254: 3080030b ldhu r2,12(r6) - 2c258: 10c8000c andi r3,r2,8192 - 2c25c: 1800051e bne r3,zero,2c274 <_fputwc_r+0x20> - 2c260: 30c01917 ldw r3,100(r6) - 2c264: 10880014 ori r2,r2,8192 - 2c268: 3080030d sth r2,12(r6) - 2c26c: 18880014 ori r2,r3,8192 - 2c270: 30801915 stw r2,100(r6) - 2c274: 002c0f01 jmpi 2c0f0 <__fputwc> +0002baa0 <_fputwc_r>: + 2baa0: 3080030b ldhu r2,12(r6) + 2baa4: 10c8000c andi r3,r2,8192 + 2baa8: 1800051e bne r3,zero,2bac0 <_fputwc_r+0x20> + 2baac: 30c01917 ldw r3,100(r6) + 2bab0: 10880014 ori r2,r2,8192 + 2bab4: 3080030d sth r2,12(r6) + 2bab8: 18880014 ori r2,r3,8192 + 2babc: 30801915 stw r2,100(r6) + 2bac0: 002b93c1 jmpi 2b93c <__fputwc> -0002c278 : - 2c278: 008000f4 movhi r2,3 - 2c27c: defffc04 addi sp,sp,-16 - 2c280: 10939f04 addi r2,r2,20092 - 2c284: dc000115 stw r16,4(sp) - 2c288: 14000017 ldw r16,0(r2) - 2c28c: dc400215 stw r17,8(sp) - 2c290: dfc00315 stw ra,12(sp) - 2c294: 2023883a mov r17,r4 - 2c298: 80000226 beq r16,zero,2c2a4 - 2c29c: 80800e17 ldw r2,56(r16) - 2c2a0: 10001026 beq r2,zero,2c2e4 - 2c2a4: 2880030b ldhu r2,12(r5) - 2c2a8: 10c8000c andi r3,r2,8192 - 2c2ac: 1800051e bne r3,zero,2c2c4 - 2c2b0: 28c01917 ldw r3,100(r5) - 2c2b4: 10880014 ori r2,r2,8192 - 2c2b8: 2880030d sth r2,12(r5) - 2c2bc: 18880014 ori r2,r3,8192 - 2c2c0: 28801915 stw r2,100(r5) - 2c2c4: 280d883a mov r6,r5 - 2c2c8: 8009883a mov r4,r16 - 2c2cc: 880b883a mov r5,r17 - 2c2d0: dfc00317 ldw ra,12(sp) - 2c2d4: dc400217 ldw r17,8(sp) - 2c2d8: dc000117 ldw r16,4(sp) - 2c2dc: dec00404 addi sp,sp,16 - 2c2e0: 002c0f01 jmpi 2c0f0 <__fputwc> - 2c2e4: 8009883a mov r4,r16 - 2c2e8: d9400015 stw r5,0(sp) - 2c2ec: 0027aa80 call 27aa8 <__sinit> - 2c2f0: d9400017 ldw r5,0(sp) - 2c2f4: 003feb06 br 2c2a4 +0002bac4 : + 2bac4: 008000f4 movhi r2,3 + 2bac8: defffc04 addi sp,sp,-16 + 2bacc: 10915404 addi r2,r2,17744 + 2bad0: dc000115 stw r16,4(sp) + 2bad4: 14000017 ldw r16,0(r2) + 2bad8: dc400215 stw r17,8(sp) + 2badc: dfc00315 stw ra,12(sp) + 2bae0: 2023883a mov r17,r4 + 2bae4: 80000226 beq r16,zero,2baf0 + 2bae8: 80800e17 ldw r2,56(r16) + 2baec: 10001026 beq r2,zero,2bb30 + 2baf0: 2880030b ldhu r2,12(r5) + 2baf4: 10c8000c andi r3,r2,8192 + 2baf8: 1800051e bne r3,zero,2bb10 + 2bafc: 28c01917 ldw r3,100(r5) + 2bb00: 10880014 ori r2,r2,8192 + 2bb04: 2880030d sth r2,12(r5) + 2bb08: 18880014 ori r2,r3,8192 + 2bb0c: 28801915 stw r2,100(r5) + 2bb10: 280d883a mov r6,r5 + 2bb14: 8009883a mov r4,r16 + 2bb18: 880b883a mov r5,r17 + 2bb1c: dfc00317 ldw ra,12(sp) + 2bb20: dc400217 ldw r17,8(sp) + 2bb24: dc000117 ldw r16,4(sp) + 2bb28: dec00404 addi sp,sp,16 + 2bb2c: 002b93c1 jmpi 2b93c <__fputwc> + 2bb30: 8009883a mov r4,r16 + 2bb34: d9400015 stw r5,0(sp) + 2bb38: 00274e40 call 274e4 <__sinit> + 2bb3c: d9400017 ldw r5,0(sp) + 2bb40: 003feb06 br 2baf0 <_gp+0xfffef5b8> -0002c2f8 <_fstat_r>: - 2c2f8: defffd04 addi sp,sp,-12 - 2c2fc: 2805883a mov r2,r5 - 2c300: dc000015 stw r16,0(sp) - 2c304: 040000f4 movhi r16,3 - 2c308: dc400115 stw r17,4(sp) - 2c30c: 841c5904 addi r16,r16,29028 - 2c310: 2023883a mov r17,r4 - 2c314: 300b883a mov r5,r6 - 2c318: 1009883a mov r4,r2 - 2c31c: dfc00215 stw ra,8(sp) - 2c320: 80000015 stw zero,0(r16) - 2c324: 002fa740 call 2fa74 - 2c328: 00ffffc4 movi r3,-1 - 2c32c: 10c00526 beq r2,r3,2c344 <_fstat_r+0x4c> - 2c330: dfc00217 ldw ra,8(sp) - 2c334: dc400117 ldw r17,4(sp) - 2c338: dc000017 ldw r16,0(sp) - 2c33c: dec00304 addi sp,sp,12 - 2c340: f800283a ret - 2c344: 80c00017 ldw r3,0(r16) - 2c348: 183ff926 beq r3,zero,2c330 <_fstat_r+0x38> - 2c34c: 88c00015 stw r3,0(r17) - 2c350: 003ff706 br 2c330 <_fstat_r+0x38> +0002bb44 <_fstat_r>: + 2bb44: defffd04 addi sp,sp,-12 + 2bb48: 2805883a mov r2,r5 + 2bb4c: dc000015 stw r16,0(sp) + 2bb50: 040000f4 movhi r16,3 + 2bb54: dc400115 stw r17,4(sp) + 2bb58: 841a0c04 addi r16,r16,26672 + 2bb5c: 2023883a mov r17,r4 + 2bb60: 300b883a mov r5,r6 + 2bb64: 1009883a mov r4,r2 + 2bb68: dfc00215 stw ra,8(sp) + 2bb6c: 80000015 stw zero,0(r16) + 2bb70: 002f1500 call 2f150 + 2bb74: 00ffffc4 movi r3,-1 + 2bb78: 10c00526 beq r2,r3,2bb90 <_fstat_r+0x4c> + 2bb7c: dfc00217 ldw ra,8(sp) + 2bb80: dc400117 ldw r17,4(sp) + 2bb84: dc000017 ldw r16,0(sp) + 2bb88: dec00304 addi sp,sp,12 + 2bb8c: f800283a ret + 2bb90: 80c00017 ldw r3,0(r16) + 2bb94: 183ff926 beq r3,zero,2bb7c <_gp+0xfffef644> + 2bb98: 88c00015 stw r3,0(r17) + 2bb9c: 003ff706 br 2bb7c <_gp+0xfffef644> -0002c354 <_isatty_r>: - 2c354: defffd04 addi sp,sp,-12 - 2c358: dc000015 stw r16,0(sp) - 2c35c: 040000f4 movhi r16,3 - 2c360: dc400115 stw r17,4(sp) - 2c364: 841c5904 addi r16,r16,29028 - 2c368: 2023883a mov r17,r4 - 2c36c: 2809883a mov r4,r5 - 2c370: dfc00215 stw ra,8(sp) - 2c374: 80000015 stw zero,0(r16) - 2c378: 002fb740 call 2fb74 - 2c37c: 00ffffc4 movi r3,-1 - 2c380: 10c00526 beq r2,r3,2c398 <_isatty_r+0x44> - 2c384: dfc00217 ldw ra,8(sp) - 2c388: dc400117 ldw r17,4(sp) - 2c38c: dc000017 ldw r16,0(sp) - 2c390: dec00304 addi sp,sp,12 - 2c394: f800283a ret - 2c398: 80c00017 ldw r3,0(r16) - 2c39c: 183ff926 beq r3,zero,2c384 <_isatty_r+0x30> - 2c3a0: 88c00015 stw r3,0(r17) - 2c3a4: 003ff706 br 2c384 <_isatty_r+0x30> +0002bba0 <_isatty_r>: + 2bba0: defffd04 addi sp,sp,-12 + 2bba4: dc000015 stw r16,0(sp) + 2bba8: 040000f4 movhi r16,3 + 2bbac: dc400115 stw r17,4(sp) + 2bbb0: 841a0c04 addi r16,r16,26672 + 2bbb4: 2023883a mov r17,r4 + 2bbb8: 2809883a mov r4,r5 + 2bbbc: dfc00215 stw ra,8(sp) + 2bbc0: 80000015 stw zero,0(r16) + 2bbc4: 002f2500 call 2f250 + 2bbc8: 00ffffc4 movi r3,-1 + 2bbcc: 10c00526 beq r2,r3,2bbe4 <_isatty_r+0x44> + 2bbd0: dfc00217 ldw ra,8(sp) + 2bbd4: dc400117 ldw r17,4(sp) + 2bbd8: dc000017 ldw r16,0(sp) + 2bbdc: dec00304 addi sp,sp,12 + 2bbe0: f800283a ret + 2bbe4: 80c00017 ldw r3,0(r16) + 2bbe8: 183ff926 beq r3,zero,2bbd0 <_gp+0xfffef698> + 2bbec: 88c00015 stw r3,0(r17) + 2bbf0: 003ff706 br 2bbd0 <_gp+0xfffef698> -0002c3a8 <_lseek_r>: - 2c3a8: defffd04 addi sp,sp,-12 - 2c3ac: 2805883a mov r2,r5 - 2c3b0: dc000015 stw r16,0(sp) - 2c3b4: 040000f4 movhi r16,3 - 2c3b8: dc400115 stw r17,4(sp) - 2c3bc: 300b883a mov r5,r6 - 2c3c0: 841c5904 addi r16,r16,29028 - 2c3c4: 2023883a mov r17,r4 - 2c3c8: 380d883a mov r6,r7 - 2c3cc: 1009883a mov r4,r2 - 2c3d0: dfc00215 stw ra,8(sp) - 2c3d4: 80000015 stw zero,0(r16) - 2c3d8: 002fd540 call 2fd54 - 2c3dc: 00ffffc4 movi r3,-1 - 2c3e0: 10c00526 beq r2,r3,2c3f8 <_lseek_r+0x50> - 2c3e4: dfc00217 ldw ra,8(sp) - 2c3e8: dc400117 ldw r17,4(sp) - 2c3ec: dc000017 ldw r16,0(sp) - 2c3f0: dec00304 addi sp,sp,12 - 2c3f4: f800283a ret - 2c3f8: 80c00017 ldw r3,0(r16) - 2c3fc: 183ff926 beq r3,zero,2c3e4 <_lseek_r+0x3c> - 2c400: 88c00015 stw r3,0(r17) - 2c404: 003ff706 br 2c3e4 <_lseek_r+0x3c> +0002bbf4 <_lseek_r>: + 2bbf4: defffd04 addi sp,sp,-12 + 2bbf8: 2805883a mov r2,r5 + 2bbfc: dc000015 stw r16,0(sp) + 2bc00: 040000f4 movhi r16,3 + 2bc04: dc400115 stw r17,4(sp) + 2bc08: 300b883a mov r5,r6 + 2bc0c: 841a0c04 addi r16,r16,26672 + 2bc10: 2023883a mov r17,r4 + 2bc14: 380d883a mov r6,r7 + 2bc18: 1009883a mov r4,r2 + 2bc1c: dfc00215 stw ra,8(sp) + 2bc20: 80000015 stw zero,0(r16) + 2bc24: 002f4300 call 2f430 + 2bc28: 00ffffc4 movi r3,-1 + 2bc2c: 10c00526 beq r2,r3,2bc44 <_lseek_r+0x50> + 2bc30: dfc00217 ldw ra,8(sp) + 2bc34: dc400117 ldw r17,4(sp) + 2bc38: dc000017 ldw r16,0(sp) + 2bc3c: dec00304 addi sp,sp,12 + 2bc40: f800283a ret + 2bc44: 80c00017 ldw r3,0(r16) + 2bc48: 183ff926 beq r3,zero,2bc30 <_gp+0xfffef6f8> + 2bc4c: 88c00015 stw r3,0(r17) + 2bc50: 003ff706 br 2bc30 <_gp+0xfffef6f8> -0002c408 <_read_r>: - 2c408: defffd04 addi sp,sp,-12 - 2c40c: 2805883a mov r2,r5 - 2c410: dc000015 stw r16,0(sp) - 2c414: 040000f4 movhi r16,3 - 2c418: dc400115 stw r17,4(sp) - 2c41c: 300b883a mov r5,r6 - 2c420: 841c5904 addi r16,r16,29028 - 2c424: 2023883a mov r17,r4 - 2c428: 380d883a mov r6,r7 - 2c42c: 1009883a mov r4,r2 - 2c430: dfc00215 stw ra,8(sp) - 2c434: 80000015 stw zero,0(r16) - 2c438: 002ff3c0 call 2ff3c - 2c43c: 00ffffc4 movi r3,-1 - 2c440: 10c00526 beq r2,r3,2c458 <_read_r+0x50> - 2c444: dfc00217 ldw ra,8(sp) - 2c448: dc400117 ldw r17,4(sp) - 2c44c: dc000017 ldw r16,0(sp) - 2c450: dec00304 addi sp,sp,12 - 2c454: f800283a ret - 2c458: 80c00017 ldw r3,0(r16) - 2c45c: 183ff926 beq r3,zero,2c444 <_read_r+0x3c> - 2c460: 88c00015 stw r3,0(r17) - 2c464: 003ff706 br 2c444 <_read_r+0x3c> +0002bc54 <_read_r>: + 2bc54: defffd04 addi sp,sp,-12 + 2bc58: 2805883a mov r2,r5 + 2bc5c: dc000015 stw r16,0(sp) + 2bc60: 040000f4 movhi r16,3 + 2bc64: dc400115 stw r17,4(sp) + 2bc68: 300b883a mov r5,r6 + 2bc6c: 841a0c04 addi r16,r16,26672 + 2bc70: 2023883a mov r17,r4 + 2bc74: 380d883a mov r6,r7 + 2bc78: 1009883a mov r4,r2 + 2bc7c: dfc00215 stw ra,8(sp) + 2bc80: 80000015 stw zero,0(r16) + 2bc84: 002f6180 call 2f618 + 2bc88: 00ffffc4 movi r3,-1 + 2bc8c: 10c00526 beq r2,r3,2bca4 <_read_r+0x50> + 2bc90: dfc00217 ldw ra,8(sp) + 2bc94: dc400117 ldw r17,4(sp) + 2bc98: dc000017 ldw r16,0(sp) + 2bc9c: dec00304 addi sp,sp,12 + 2bca0: f800283a ret + 2bca4: 80c00017 ldw r3,0(r16) + 2bca8: 183ff926 beq r3,zero,2bc90 <_gp+0xfffef758> + 2bcac: 88c00015 stw r3,0(r17) + 2bcb0: 003ff706 br 2bc90 <_gp+0xfffef758> -0002c468 <_wcrtomb_r>: - 2c468: defff604 addi sp,sp,-40 - 2c46c: 008000f4 movhi r2,3 - 2c470: dc800815 stw r18,32(sp) - 2c474: dc400715 stw r17,28(sp) - 2c478: dc000615 stw r16,24(sp) - 2c47c: 1093a304 addi r2,r2,20108 - 2c480: dfc00915 stw ra,36(sp) - 2c484: 2021883a mov r16,r4 - 2c488: 3823883a mov r17,r7 - 2c48c: 14800017 ldw r18,0(r2) - 2c490: 28001426 beq r5,zero,2c4e4 <_wcrtomb_r+0x7c> - 2c494: d9400415 stw r5,16(sp) - 2c498: d9800515 stw r6,20(sp) - 2c49c: 00285ec0 call 285ec <__locale_charset> - 2c4a0: d9800517 ldw r6,20(sp) - 2c4a4: d9400417 ldw r5,16(sp) - 2c4a8: 100f883a mov r7,r2 - 2c4ac: dc400015 stw r17,0(sp) - 2c4b0: 8009883a mov r4,r16 - 2c4b4: 903ee83a callr r18 - 2c4b8: 00ffffc4 movi r3,-1 - 2c4bc: 10c0031e bne r2,r3,2c4cc <_wcrtomb_r+0x64> - 2c4c0: 88000015 stw zero,0(r17) - 2c4c4: 00c02284 movi r3,138 - 2c4c8: 80c00015 stw r3,0(r16) - 2c4cc: dfc00917 ldw ra,36(sp) - 2c4d0: dc800817 ldw r18,32(sp) - 2c4d4: dc400717 ldw r17,28(sp) - 2c4d8: dc000617 ldw r16,24(sp) - 2c4dc: dec00a04 addi sp,sp,40 - 2c4e0: f800283a ret - 2c4e4: 00285ec0 call 285ec <__locale_charset> - 2c4e8: 100f883a mov r7,r2 - 2c4ec: dc400015 stw r17,0(sp) - 2c4f0: 000d883a mov r6,zero - 2c4f4: d9400104 addi r5,sp,4 - 2c4f8: 8009883a mov r4,r16 - 2c4fc: 903ee83a callr r18 - 2c500: 003fed06 br 2c4b8 <_wcrtomb_r+0x50> +0002bcb4 <_wcrtomb_r>: + 2bcb4: defff604 addi sp,sp,-40 + 2bcb8: 008000f4 movhi r2,3 + 2bcbc: dc800815 stw r18,32(sp) + 2bcc0: dc400715 stw r17,28(sp) + 2bcc4: dc000615 stw r16,24(sp) + 2bcc8: 10915604 addi r2,r2,17752 + 2bccc: dfc00915 stw ra,36(sp) + 2bcd0: 2021883a mov r16,r4 + 2bcd4: 3823883a mov r17,r7 + 2bcd8: 14800017 ldw r18,0(r2) + 2bcdc: 28001426 beq r5,zero,2bd30 <_wcrtomb_r+0x7c> + 2bce0: d9400415 stw r5,16(sp) + 2bce4: d9800515 stw r6,20(sp) + 2bce8: 00280280 call 28028 <__locale_charset> + 2bcec: d9800517 ldw r6,20(sp) + 2bcf0: d9400417 ldw r5,16(sp) + 2bcf4: 100f883a mov r7,r2 + 2bcf8: dc400015 stw r17,0(sp) + 2bcfc: 8009883a mov r4,r16 + 2bd00: 903ee83a callr r18 + 2bd04: 00ffffc4 movi r3,-1 + 2bd08: 10c0031e bne r2,r3,2bd18 <_wcrtomb_r+0x64> + 2bd0c: 88000015 stw zero,0(r17) + 2bd10: 00c02284 movi r3,138 + 2bd14: 80c00015 stw r3,0(r16) + 2bd18: dfc00917 ldw ra,36(sp) + 2bd1c: dc800817 ldw r18,32(sp) + 2bd20: dc400717 ldw r17,28(sp) + 2bd24: dc000617 ldw r16,24(sp) + 2bd28: dec00a04 addi sp,sp,40 + 2bd2c: f800283a ret + 2bd30: 00280280 call 28028 <__locale_charset> + 2bd34: 100f883a mov r7,r2 + 2bd38: dc400015 stw r17,0(sp) + 2bd3c: 000d883a mov r6,zero + 2bd40: d9400104 addi r5,sp,4 + 2bd44: 8009883a mov r4,r16 + 2bd48: 903ee83a callr r18 + 2bd4c: 003fed06 br 2bd04 <_gp+0xfffef7cc> -0002c504 : - 2c504: defff604 addi sp,sp,-40 - 2c508: 008000f4 movhi r2,3 - 2c50c: dc800615 stw r18,24(sp) - 2c510: dc400515 stw r17,20(sp) - 2c514: 10939f04 addi r2,r2,20092 - 2c518: dfc00915 stw ra,36(sp) - 2c51c: dd000815 stw r20,32(sp) - 2c520: dcc00715 stw r19,28(sp) - 2c524: dc000415 stw r16,16(sp) - 2c528: 3025883a mov r18,r6 - 2c52c: 14400017 ldw r17,0(r2) - 2c530: 20001926 beq r4,zero,2c598 - 2c534: 008000f4 movhi r2,3 - 2c538: 1093a304 addi r2,r2,20108 - 2c53c: 15000017 ldw r20,0(r2) - 2c540: 2021883a mov r16,r4 - 2c544: 2827883a mov r19,r5 - 2c548: 00285ec0 call 285ec <__locale_charset> - 2c54c: 100f883a mov r7,r2 - 2c550: dc800015 stw r18,0(sp) - 2c554: 980d883a mov r6,r19 - 2c558: 800b883a mov r5,r16 - 2c55c: 8809883a mov r4,r17 - 2c560: a03ee83a callr r20 - 2c564: 00ffffc4 movi r3,-1 - 2c568: 10c0031e bne r2,r3,2c578 - 2c56c: 90000015 stw zero,0(r18) - 2c570: 00c02284 movi r3,138 - 2c574: 88c00015 stw r3,0(r17) - 2c578: dfc00917 ldw ra,36(sp) - 2c57c: dd000817 ldw r20,32(sp) - 2c580: dcc00717 ldw r19,28(sp) - 2c584: dc800617 ldw r18,24(sp) - 2c588: dc400517 ldw r17,20(sp) - 2c58c: dc000417 ldw r16,16(sp) - 2c590: dec00a04 addi sp,sp,40 - 2c594: f800283a ret - 2c598: 008000f4 movhi r2,3 - 2c59c: 1093a304 addi r2,r2,20108 - 2c5a0: 14000017 ldw r16,0(r2) - 2c5a4: 00285ec0 call 285ec <__locale_charset> - 2c5a8: 100f883a mov r7,r2 - 2c5ac: dc800015 stw r18,0(sp) - 2c5b0: 000d883a mov r6,zero - 2c5b4: d9400104 addi r5,sp,4 - 2c5b8: 8809883a mov r4,r17 - 2c5bc: 803ee83a callr r16 - 2c5c0: 003fe806 br 2c564 +0002bd50 : + 2bd50: defff604 addi sp,sp,-40 + 2bd54: 008000f4 movhi r2,3 + 2bd58: dc800615 stw r18,24(sp) + 2bd5c: dc400515 stw r17,20(sp) + 2bd60: 10915404 addi r2,r2,17744 + 2bd64: dfc00915 stw ra,36(sp) + 2bd68: dd000815 stw r20,32(sp) + 2bd6c: dcc00715 stw r19,28(sp) + 2bd70: dc000415 stw r16,16(sp) + 2bd74: 3025883a mov r18,r6 + 2bd78: 14400017 ldw r17,0(r2) + 2bd7c: 20001926 beq r4,zero,2bde4 + 2bd80: 008000f4 movhi r2,3 + 2bd84: 10915604 addi r2,r2,17752 + 2bd88: 15000017 ldw r20,0(r2) + 2bd8c: 2021883a mov r16,r4 + 2bd90: 2827883a mov r19,r5 + 2bd94: 00280280 call 28028 <__locale_charset> + 2bd98: 100f883a mov r7,r2 + 2bd9c: dc800015 stw r18,0(sp) + 2bda0: 980d883a mov r6,r19 + 2bda4: 800b883a mov r5,r16 + 2bda8: 8809883a mov r4,r17 + 2bdac: a03ee83a callr r20 + 2bdb0: 00ffffc4 movi r3,-1 + 2bdb4: 10c0031e bne r2,r3,2bdc4 + 2bdb8: 90000015 stw zero,0(r18) + 2bdbc: 00c02284 movi r3,138 + 2bdc0: 88c00015 stw r3,0(r17) + 2bdc4: dfc00917 ldw ra,36(sp) + 2bdc8: dd000817 ldw r20,32(sp) + 2bdcc: dcc00717 ldw r19,28(sp) + 2bdd0: dc800617 ldw r18,24(sp) + 2bdd4: dc400517 ldw r17,20(sp) + 2bdd8: dc000417 ldw r16,16(sp) + 2bddc: dec00a04 addi sp,sp,40 + 2bde0: f800283a ret + 2bde4: 008000f4 movhi r2,3 + 2bde8: 10915604 addi r2,r2,17752 + 2bdec: 14000017 ldw r16,0(r2) + 2bdf0: 00280280 call 28028 <__locale_charset> + 2bdf4: 100f883a mov r7,r2 + 2bdf8: dc800015 stw r18,0(sp) + 2bdfc: 000d883a mov r6,zero + 2be00: d9400104 addi r5,sp,4 + 2be04: 8809883a mov r4,r17 + 2be08: 803ee83a callr r16 + 2be0c: 003fe806 br 2bdb0 <_gp+0xfffef878> -0002c5c4 <__ascii_wctomb>: - 2c5c4: 28000526 beq r5,zero,2c5dc <__ascii_wctomb+0x18> - 2c5c8: 00803fc4 movi r2,255 - 2c5cc: 11800536 bltu r2,r6,2c5e4 <__ascii_wctomb+0x20> - 2c5d0: 29800005 stb r6,0(r5) - 2c5d4: 00800044 movi r2,1 - 2c5d8: f800283a ret - 2c5dc: 0005883a mov r2,zero - 2c5e0: f800283a ret - 2c5e4: 00802284 movi r2,138 - 2c5e8: 20800015 stw r2,0(r4) - 2c5ec: 00bfffc4 movi r2,-1 - 2c5f0: f800283a ret +0002be10 <__ascii_wctomb>: + 2be10: 28000526 beq r5,zero,2be28 <__ascii_wctomb+0x18> + 2be14: 00803fc4 movi r2,255 + 2be18: 11800536 bltu r2,r6,2be30 <__ascii_wctomb+0x20> + 2be1c: 29800005 stb r6,0(r5) + 2be20: 00800044 movi r2,1 + 2be24: f800283a ret + 2be28: 0005883a mov r2,zero + 2be2c: f800283a ret + 2be30: 00802284 movi r2,138 + 2be34: 20800015 stw r2,0(r4) + 2be38: 00bfffc4 movi r2,-1 + 2be3c: f800283a ret -0002c5f4 <_wctomb_r>: - 2c5f4: 008000f4 movhi r2,3 - 2c5f8: defff904 addi sp,sp,-28 - 2c5fc: 1093a304 addi r2,r2,20108 - 2c600: dfc00615 stw ra,24(sp) - 2c604: dc400515 stw r17,20(sp) - 2c608: dc000415 stw r16,16(sp) - 2c60c: 3823883a mov r17,r7 - 2c610: 14000017 ldw r16,0(r2) - 2c614: d9000115 stw r4,4(sp) - 2c618: d9400215 stw r5,8(sp) - 2c61c: d9800315 stw r6,12(sp) - 2c620: 00285ec0 call 285ec <__locale_charset> - 2c624: d9800317 ldw r6,12(sp) - 2c628: d9400217 ldw r5,8(sp) - 2c62c: d9000117 ldw r4,4(sp) - 2c630: 100f883a mov r7,r2 - 2c634: dc400015 stw r17,0(sp) - 2c638: 803ee83a callr r16 - 2c63c: dfc00617 ldw ra,24(sp) - 2c640: dc400517 ldw r17,20(sp) - 2c644: dc000417 ldw r16,16(sp) - 2c648: dec00704 addi sp,sp,28 - 2c64c: f800283a ret +0002be40 <_wctomb_r>: + 2be40: 008000f4 movhi r2,3 + 2be44: defff904 addi sp,sp,-28 + 2be48: 10915604 addi r2,r2,17752 + 2be4c: dfc00615 stw ra,24(sp) + 2be50: dc400515 stw r17,20(sp) + 2be54: dc000415 stw r16,16(sp) + 2be58: 3823883a mov r17,r7 + 2be5c: 14000017 ldw r16,0(r2) + 2be60: d9000115 stw r4,4(sp) + 2be64: d9400215 stw r5,8(sp) + 2be68: d9800315 stw r6,12(sp) + 2be6c: 00280280 call 28028 <__locale_charset> + 2be70: d9800317 ldw r6,12(sp) + 2be74: d9400217 ldw r5,8(sp) + 2be78: d9000117 ldw r4,4(sp) + 2be7c: 100f883a mov r7,r2 + 2be80: dc400015 stw r17,0(sp) + 2be84: 803ee83a callr r16 + 2be88: dfc00617 ldw ra,24(sp) + 2be8c: dc400517 ldw r17,20(sp) + 2be90: dc000417 ldw r16,16(sp) + 2be94: dec00704 addi sp,sp,28 + 2be98: f800283a ret -0002c650 <__udivdi3>: - 2c650: defff504 addi sp,sp,-44 - 2c654: dcc00415 stw r19,16(sp) - 2c658: dc000115 stw r16,4(sp) - 2c65c: dfc00a15 stw ra,40(sp) - 2c660: df000915 stw fp,36(sp) - 2c664: ddc00815 stw r23,32(sp) - 2c668: dd800715 stw r22,28(sp) - 2c66c: dd400615 stw r21,24(sp) - 2c670: dd000515 stw r20,20(sp) - 2c674: dc800315 stw r18,12(sp) - 2c678: dc400215 stw r17,8(sp) - 2c67c: 2027883a mov r19,r4 - 2c680: 2821883a mov r16,r5 - 2c684: 3800411e bne r7,zero,2c78c <__udivdi3+0x13c> - 2c688: 3023883a mov r17,r6 - 2c68c: 2025883a mov r18,r4 - 2c690: 2980522e bgeu r5,r6,2c7dc <__udivdi3+0x18c> - 2c694: 00bfffd4 movui r2,65535 - 2c698: 282d883a mov r22,r5 - 2c69c: 1180a836 bltu r2,r6,2c940 <__udivdi3+0x2f0> - 2c6a0: 00803fc4 movi r2,255 - 2c6a4: 1185803a cmpltu r2,r2,r6 - 2c6a8: 100490fa slli r2,r2,3 - 2c6ac: 3086d83a srl r3,r6,r2 - 2c6b0: 010000f4 movhi r4,3 - 2c6b4: 210abb04 addi r4,r4,10988 - 2c6b8: 20c7883a add r3,r4,r3 - 2c6bc: 18c00003 ldbu r3,0(r3) - 2c6c0: 1885883a add r2,r3,r2 - 2c6c4: 00c00804 movi r3,32 - 2c6c8: 1887c83a sub r3,r3,r2 - 2c6cc: 18000526 beq r3,zero,2c6e4 <__udivdi3+0x94> - 2c6d0: 80e0983a sll r16,r16,r3 - 2c6d4: 9884d83a srl r2,r19,r2 - 2c6d8: 30e2983a sll r17,r6,r3 - 2c6dc: 98e4983a sll r18,r19,r3 - 2c6e0: 142cb03a or r22,r2,r16 - 2c6e4: 882ad43a srli r21,r17,16 - 2c6e8: b009883a mov r4,r22 - 2c6ec: 8d3fffcc andi r20,r17,65535 - 2c6f0: a80b883a mov r5,r21 - 2c6f4: 0022a840 call 22a84 <__umodsi3> - 2c6f8: b009883a mov r4,r22 - 2c6fc: a80b883a mov r5,r21 - 2c700: 1027883a mov r19,r2 - 2c704: 0022a200 call 22a20 <__udivsi3> - 2c708: 102d883a mov r22,r2 - 2c70c: 9826943a slli r19,r19,16 - 2c710: 9004d43a srli r2,r18,16 - 2c714: a5a1383a mul r16,r20,r22 - 2c718: 14c4b03a or r2,r2,r19 - 2c71c: 1400052e bgeu r2,r16,2c734 <__udivdi3+0xe4> - 2c720: 1445883a add r2,r2,r17 - 2c724: b0ffffc4 addi r3,r22,-1 - 2c728: 14400136 bltu r2,r17,2c730 <__udivdi3+0xe0> - 2c72c: 14012336 bltu r2,r16,2cbbc <__udivdi3+0x56c> - 2c730: 182d883a mov r22,r3 - 2c734: 1421c83a sub r16,r2,r16 - 2c738: a80b883a mov r5,r21 - 2c73c: 8009883a mov r4,r16 - 2c740: 0022a840 call 22a84 <__umodsi3> - 2c744: 1027883a mov r19,r2 - 2c748: a80b883a mov r5,r21 - 2c74c: 8009883a mov r4,r16 - 2c750: 0022a200 call 22a20 <__udivsi3> - 2c754: 9826943a slli r19,r19,16 - 2c758: a0a9383a mul r20,r20,r2 - 2c75c: 94bfffcc andi r18,r18,65535 - 2c760: 94e4b03a or r18,r18,r19 - 2c764: 9500052e bgeu r18,r20,2c77c <__udivdi3+0x12c> - 2c768: 8ca5883a add r18,r17,r18 - 2c76c: 10ffffc4 addi r3,r2,-1 - 2c770: 9440f136 bltu r18,r17,2cb38 <__udivdi3+0x4e8> - 2c774: 9500f02e bgeu r18,r20,2cb38 <__udivdi3+0x4e8> - 2c778: 10bfff84 addi r2,r2,-2 - 2c77c: b00c943a slli r6,r22,16 - 2c780: 0007883a mov r3,zero - 2c784: 3084b03a or r2,r6,r2 - 2c788: 00005906 br 2c8f0 <__udivdi3+0x2a0> - 2c78c: 29c05636 bltu r5,r7,2c8e8 <__udivdi3+0x298> - 2c790: 00bfffd4 movui r2,65535 - 2c794: 11c0622e bgeu r2,r7,2c920 <__udivdi3+0x2d0> - 2c798: 00804034 movhi r2,256 +0002be9c <__udivdi3>: + 2be9c: defff504 addi sp,sp,-44 + 2bea0: dcc00415 stw r19,16(sp) + 2bea4: dc000115 stw r16,4(sp) + 2bea8: dfc00a15 stw ra,40(sp) + 2beac: df000915 stw fp,36(sp) + 2beb0: ddc00815 stw r23,32(sp) + 2beb4: dd800715 stw r22,28(sp) + 2beb8: dd400615 stw r21,24(sp) + 2bebc: dd000515 stw r20,20(sp) + 2bec0: dc800315 stw r18,12(sp) + 2bec4: dc400215 stw r17,8(sp) + 2bec8: 2027883a mov r19,r4 + 2becc: 2821883a mov r16,r5 + 2bed0: 3800411e bne r7,zero,2bfd8 <__udivdi3+0x13c> + 2bed4: 3023883a mov r17,r6 + 2bed8: 2025883a mov r18,r4 + 2bedc: 2980522e bgeu r5,r6,2c028 <__udivdi3+0x18c> + 2bee0: 00bfffd4 movui r2,65535 + 2bee4: 282d883a mov r22,r5 + 2bee8: 1180a836 bltu r2,r6,2c18c <__udivdi3+0x2f0> + 2beec: 00803fc4 movi r2,255 + 2bef0: 1185803a cmpltu r2,r2,r6 + 2bef4: 100490fa slli r2,r2,3 + 2bef8: 3086d83a srl r3,r6,r2 + 2befc: 010000f4 movhi r4,3 + 2bf00: 21086e04 addi r4,r4,8632 + 2bf04: 20c7883a add r3,r4,r3 + 2bf08: 18c00003 ldbu r3,0(r3) + 2bf0c: 1885883a add r2,r3,r2 + 2bf10: 00c00804 movi r3,32 + 2bf14: 1887c83a sub r3,r3,r2 + 2bf18: 18000526 beq r3,zero,2bf30 <__udivdi3+0x94> + 2bf1c: 80e0983a sll r16,r16,r3 + 2bf20: 9884d83a srl r2,r19,r2 + 2bf24: 30e2983a sll r17,r6,r3 + 2bf28: 98e4983a sll r18,r19,r3 + 2bf2c: 142cb03a or r22,r2,r16 + 2bf30: 882ad43a srli r21,r17,16 + 2bf34: b009883a mov r4,r22 + 2bf38: 8d3fffcc andi r20,r17,65535 + 2bf3c: a80b883a mov r5,r21 + 2bf40: 00226400 call 22640 <__umodsi3> + 2bf44: b009883a mov r4,r22 + 2bf48: a80b883a mov r5,r21 + 2bf4c: 1027883a mov r19,r2 + 2bf50: 00225dc0 call 225dc <__udivsi3> + 2bf54: 102d883a mov r22,r2 + 2bf58: 9826943a slli r19,r19,16 + 2bf5c: 9004d43a srli r2,r18,16 + 2bf60: a5a1383a mul r16,r20,r22 + 2bf64: 14c4b03a or r2,r2,r19 + 2bf68: 1400052e bgeu r2,r16,2bf80 <__udivdi3+0xe4> + 2bf6c: 1445883a add r2,r2,r17 + 2bf70: b0ffffc4 addi r3,r22,-1 + 2bf74: 14400136 bltu r2,r17,2bf7c <__udivdi3+0xe0> + 2bf78: 14012336 bltu r2,r16,2c408 <__udivdi3+0x56c> + 2bf7c: 182d883a mov r22,r3 + 2bf80: 1421c83a sub r16,r2,r16 + 2bf84: a80b883a mov r5,r21 + 2bf88: 8009883a mov r4,r16 + 2bf8c: 00226400 call 22640 <__umodsi3> + 2bf90: 1027883a mov r19,r2 + 2bf94: a80b883a mov r5,r21 + 2bf98: 8009883a mov r4,r16 + 2bf9c: 00225dc0 call 225dc <__udivsi3> + 2bfa0: 9826943a slli r19,r19,16 + 2bfa4: a0a9383a mul r20,r20,r2 + 2bfa8: 94bfffcc andi r18,r18,65535 + 2bfac: 94e4b03a or r18,r18,r19 + 2bfb0: 9500052e bgeu r18,r20,2bfc8 <__udivdi3+0x12c> + 2bfb4: 8ca5883a add r18,r17,r18 + 2bfb8: 10ffffc4 addi r3,r2,-1 + 2bfbc: 9440f136 bltu r18,r17,2c384 <__udivdi3+0x4e8> + 2bfc0: 9500f02e bgeu r18,r20,2c384 <__udivdi3+0x4e8> + 2bfc4: 10bfff84 addi r2,r2,-2 + 2bfc8: b00c943a slli r6,r22,16 + 2bfcc: 0007883a mov r3,zero + 2bfd0: 3084b03a or r2,r6,r2 + 2bfd4: 00005906 br 2c13c <__udivdi3+0x2a0> + 2bfd8: 29c05636 bltu r5,r7,2c134 <__udivdi3+0x298> + 2bfdc: 00bfffd4 movui r2,65535 + 2bfe0: 11c0622e bgeu r2,r7,2c16c <__udivdi3+0x2d0> + 2bfe4: 00804034 movhi r2,256 + 2bfe8: 10bfffc4 addi r2,r2,-1 + 2bfec: 11c0ee36 bltu r2,r7,2c3a8 <__udivdi3+0x50c> + 2bff0: 00800404 movi r2,16 + 2bff4: 3886d83a srl r3,r7,r2 + 2bff8: 010000f4 movhi r4,3 + 2bffc: 21086e04 addi r4,r4,8632 + 2c000: 20c7883a add r3,r4,r3 + 2c004: 18c00003 ldbu r3,0(r3) + 2c008: 05400804 movi r21,32 + 2c00c: 1885883a add r2,r3,r2 + 2c010: a8abc83a sub r21,r21,r2 + 2c014: a800621e bne r21,zero,2c1a0 <__udivdi3+0x304> + 2c018: 3c00e936 bltu r7,r16,2c3c0 <__udivdi3+0x524> + 2c01c: 9985403a cmpgeu r2,r19,r6 + 2c020: 0007883a mov r3,zero + 2c024: 00004506 br 2c13c <__udivdi3+0x2a0> + 2c028: 3000041e bne r6,zero,2c03c <__udivdi3+0x1a0> + 2c02c: 000b883a mov r5,zero + 2c030: 01000044 movi r4,1 + 2c034: 00225dc0 call 225dc <__udivsi3> + 2c038: 1023883a mov r17,r2 + 2c03c: 00bfffd4 movui r2,65535 + 2c040: 14404e2e bgeu r2,r17,2c17c <__udivdi3+0x2e0> + 2c044: 00804034 movhi r2,256 + 2c048: 10bfffc4 addi r2,r2,-1 + 2c04c: 1440d836 bltu r2,r17,2c3b0 <__udivdi3+0x514> + 2c050: 00800404 movi r2,16 + 2c054: 8886d83a srl r3,r17,r2 + 2c058: 010000f4 movhi r4,3 + 2c05c: 21086e04 addi r4,r4,8632 + 2c060: 20c7883a add r3,r4,r3 + 2c064: 18c00003 ldbu r3,0(r3) + 2c068: 1885883a add r2,r3,r2 + 2c06c: 00c00804 movi r3,32 + 2c070: 1887c83a sub r3,r3,r2 + 2c074: 18008f1e bne r3,zero,2c2b4 <__udivdi3+0x418> + 2c078: 882ad43a srli r21,r17,16 + 2c07c: 8461c83a sub r16,r16,r17 + 2c080: 8d3fffcc andi r20,r17,65535 + 2c084: 00c00044 movi r3,1 + 2c088: 8009883a mov r4,r16 + 2c08c: a80b883a mov r5,r21 + 2c090: d8c00015 stw r3,0(sp) + 2c094: 00226400 call 22640 <__umodsi3> + 2c098: 8009883a mov r4,r16 + 2c09c: a80b883a mov r5,r21 + 2c0a0: 1027883a mov r19,r2 + 2c0a4: 00225dc0 call 225dc <__udivsi3> + 2c0a8: 9826943a slli r19,r19,16 + 2c0ac: 9008d43a srli r4,r18,16 + 2c0b0: 1521383a mul r16,r2,r20 + 2c0b4: 102d883a mov r22,r2 + 2c0b8: 24c8b03a or r4,r4,r19 + 2c0bc: d8c00017 ldw r3,0(sp) + 2c0c0: 2400052e bgeu r4,r16,2c0d8 <__udivdi3+0x23c> + 2c0c4: 2449883a add r4,r4,r17 + 2c0c8: b0bfffc4 addi r2,r22,-1 + 2c0cc: 24400136 bltu r4,r17,2c0d4 <__udivdi3+0x238> + 2c0d0: 2400ca36 bltu r4,r16,2c3fc <__udivdi3+0x560> + 2c0d4: 102d883a mov r22,r2 + 2c0d8: 2421c83a sub r16,r4,r16 + 2c0dc: a80b883a mov r5,r21 + 2c0e0: 8009883a mov r4,r16 + 2c0e4: d8c00015 stw r3,0(sp) + 2c0e8: 00226400 call 22640 <__umodsi3> + 2c0ec: 1027883a mov r19,r2 + 2c0f0: a80b883a mov r5,r21 + 2c0f4: 8009883a mov r4,r16 + 2c0f8: 00225dc0 call 225dc <__udivsi3> + 2c0fc: 9826943a slli r19,r19,16 + 2c100: 1529383a mul r20,r2,r20 + 2c104: 94bfffcc andi r18,r18,65535 + 2c108: 94e4b03a or r18,r18,r19 + 2c10c: d8c00017 ldw r3,0(sp) + 2c110: 9500052e bgeu r18,r20,2c128 <__udivdi3+0x28c> + 2c114: 8ca5883a add r18,r17,r18 + 2c118: 113fffc4 addi r4,r2,-1 + 2c11c: 94409736 bltu r18,r17,2c37c <__udivdi3+0x4e0> + 2c120: 9500962e bgeu r18,r20,2c37c <__udivdi3+0x4e0> + 2c124: 10bfff84 addi r2,r2,-2 + 2c128: b00c943a slli r6,r22,16 + 2c12c: 3084b03a or r2,r6,r2 + 2c130: 00000206 br 2c13c <__udivdi3+0x2a0> + 2c134: 0007883a mov r3,zero + 2c138: 0005883a mov r2,zero + 2c13c: dfc00a17 ldw ra,40(sp) + 2c140: df000917 ldw fp,36(sp) + 2c144: ddc00817 ldw r23,32(sp) + 2c148: dd800717 ldw r22,28(sp) + 2c14c: dd400617 ldw r21,24(sp) + 2c150: dd000517 ldw r20,20(sp) + 2c154: dcc00417 ldw r19,16(sp) + 2c158: dc800317 ldw r18,12(sp) + 2c15c: dc400217 ldw r17,8(sp) + 2c160: dc000117 ldw r16,4(sp) + 2c164: dec00b04 addi sp,sp,44 + 2c168: f800283a ret + 2c16c: 00803fc4 movi r2,255 + 2c170: 11c5803a cmpltu r2,r2,r7 + 2c174: 100490fa slli r2,r2,3 + 2c178: 003f9e06 br 2bff4 <_gp+0xfffefabc> + 2c17c: 00803fc4 movi r2,255 + 2c180: 1445803a cmpltu r2,r2,r17 + 2c184: 100490fa slli r2,r2,3 + 2c188: 003fb206 br 2c054 <_gp+0xfffefb1c> + 2c18c: 00804034 movhi r2,256 + 2c190: 10bfffc4 addi r2,r2,-1 + 2c194: 11808836 bltu r2,r6,2c3b8 <__udivdi3+0x51c> + 2c198: 00800404 movi r2,16 + 2c19c: 003f5606 br 2bef8 <_gp+0xfffef9c0> + 2c1a0: 30aed83a srl r23,r6,r2 + 2c1a4: 3d4e983a sll r7,r7,r21 + 2c1a8: 80acd83a srl r22,r16,r2 + 2c1ac: 9884d83a srl r2,r19,r2 + 2c1b0: 3deeb03a or r23,r7,r23 + 2c1b4: b824d43a srli r18,r23,16 + 2c1b8: 8560983a sll r16,r16,r21 + 2c1bc: b009883a mov r4,r22 + 2c1c0: 900b883a mov r5,r18 + 2c1c4: 3568983a sll r20,r6,r21 + 2c1c8: 1420b03a or r16,r2,r16 + 2c1cc: 00226400 call 22640 <__umodsi3> + 2c1d0: b009883a mov r4,r22 + 2c1d4: 900b883a mov r5,r18 + 2c1d8: 1023883a mov r17,r2 + 2c1dc: 00225dc0 call 225dc <__udivsi3> + 2c1e0: 8808943a slli r4,r17,16 + 2c1e4: bf3fffcc andi fp,r23,65535 + 2c1e8: 8006d43a srli r3,r16,16 + 2c1ec: e0a3383a mul r17,fp,r2 + 2c1f0: 100d883a mov r6,r2 + 2c1f4: 1906b03a or r3,r3,r4 + 2c1f8: 1c40042e bgeu r3,r17,2c20c <__udivdi3+0x370> + 2c1fc: 1dc7883a add r3,r3,r23 + 2c200: 10bfffc4 addi r2,r2,-1 + 2c204: 1dc0752e bgeu r3,r23,2c3dc <__udivdi3+0x540> + 2c208: 100d883a mov r6,r2 + 2c20c: 1c63c83a sub r17,r3,r17 + 2c210: 900b883a mov r5,r18 + 2c214: 8809883a mov r4,r17 + 2c218: d9800015 stw r6,0(sp) + 2c21c: 00226400 call 22640 <__umodsi3> + 2c220: 102d883a mov r22,r2 + 2c224: 8809883a mov r4,r17 + 2c228: 900b883a mov r5,r18 + 2c22c: 00225dc0 call 225dc <__udivsi3> + 2c230: b02c943a slli r22,r22,16 + 2c234: e089383a mul r4,fp,r2 + 2c238: 843fffcc andi r16,r16,65535 + 2c23c: 85a0b03a or r16,r16,r22 + 2c240: d9800017 ldw r6,0(sp) + 2c244: 8100042e bgeu r16,r4,2c258 <__udivdi3+0x3bc> + 2c248: 85e1883a add r16,r16,r23 + 2c24c: 10ffffc4 addi r3,r2,-1 + 2c250: 85c05e2e bgeu r16,r23,2c3cc <__udivdi3+0x530> + 2c254: 1805883a mov r2,r3 + 2c258: 300c943a slli r6,r6,16 + 2c25c: a17fffcc andi r5,r20,65535 + 2c260: a028d43a srli r20,r20,16 + 2c264: 3084b03a or r2,r6,r2 + 2c268: 10ffffcc andi r3,r2,65535 + 2c26c: 100cd43a srli r6,r2,16 + 2c270: 194f383a mul r7,r3,r5 + 2c274: 1d07383a mul r3,r3,r20 + 2c278: 314b383a mul r5,r6,r5 + 2c27c: 3810d43a srli r8,r7,16 + 2c280: 8121c83a sub r16,r16,r4 + 2c284: 1947883a add r3,r3,r5 + 2c288: 40c7883a add r3,r8,r3 + 2c28c: 350d383a mul r6,r6,r20 + 2c290: 1940022e bgeu r3,r5,2c29c <__udivdi3+0x400> + 2c294: 01000074 movhi r4,1 + 2c298: 310d883a add r6,r6,r4 + 2c29c: 1828d43a srli r20,r3,16 + 2c2a0: a18d883a add r6,r20,r6 + 2c2a4: 81803e36 bltu r16,r6,2c3a0 <__udivdi3+0x504> + 2c2a8: 81803826 beq r16,r6,2c38c <__udivdi3+0x4f0> + 2c2ac: 0007883a mov r3,zero + 2c2b0: 003fa206 br 2c13c <_gp+0xfffefc04> + 2c2b4: 88e2983a sll r17,r17,r3 + 2c2b8: 80a8d83a srl r20,r16,r2 + 2c2bc: 80e0983a sll r16,r16,r3 + 2c2c0: 882ad43a srli r21,r17,16 + 2c2c4: 9884d83a srl r2,r19,r2 + 2c2c8: a009883a mov r4,r20 + 2c2cc: a80b883a mov r5,r21 + 2c2d0: 142eb03a or r23,r2,r16 + 2c2d4: 98e4983a sll r18,r19,r3 + 2c2d8: 00226400 call 22640 <__umodsi3> + 2c2dc: a009883a mov r4,r20 + 2c2e0: a80b883a mov r5,r21 + 2c2e4: 1021883a mov r16,r2 + 2c2e8: 00225dc0 call 225dc <__udivsi3> + 2c2ec: 1039883a mov fp,r2 + 2c2f0: 8d3fffcc andi r20,r17,65535 + 2c2f4: 8020943a slli r16,r16,16 + 2c2f8: b804d43a srli r2,r23,16 + 2c2fc: a72d383a mul r22,r20,fp + 2c300: 1404b03a or r2,r2,r16 + 2c304: 1580062e bgeu r2,r22,2c320 <__udivdi3+0x484> + 2c308: 1445883a add r2,r2,r17 + 2c30c: e0ffffc4 addi r3,fp,-1 + 2c310: 14403836 bltu r2,r17,2c3f4 <__udivdi3+0x558> + 2c314: 1580372e bgeu r2,r22,2c3f4 <__udivdi3+0x558> + 2c318: e73fff84 addi fp,fp,-2 + 2c31c: 1445883a add r2,r2,r17 + 2c320: 15adc83a sub r22,r2,r22 + 2c324: a80b883a mov r5,r21 + 2c328: b009883a mov r4,r22 + 2c32c: 00226400 call 22640 <__umodsi3> + 2c330: 1027883a mov r19,r2 + 2c334: b009883a mov r4,r22 + 2c338: a80b883a mov r5,r21 + 2c33c: 00225dc0 call 225dc <__udivsi3> + 2c340: 9826943a slli r19,r19,16 + 2c344: a0a1383a mul r16,r20,r2 + 2c348: b93fffcc andi r4,r23,65535 + 2c34c: 24c8b03a or r4,r4,r19 + 2c350: 2400062e bgeu r4,r16,2c36c <__udivdi3+0x4d0> + 2c354: 2449883a add r4,r4,r17 + 2c358: 10ffffc4 addi r3,r2,-1 + 2c35c: 24402336 bltu r4,r17,2c3ec <__udivdi3+0x550> + 2c360: 2400222e bgeu r4,r16,2c3ec <__udivdi3+0x550> + 2c364: 10bfff84 addi r2,r2,-2 + 2c368: 2449883a add r4,r4,r17 + 2c36c: e038943a slli fp,fp,16 + 2c370: 2421c83a sub r16,r4,r16 + 2c374: e086b03a or r3,fp,r2 + 2c378: 003f4306 br 2c088 <_gp+0xfffefb50> + 2c37c: 2005883a mov r2,r4 + 2c380: 003f6906 br 2c128 <_gp+0xfffefbf0> + 2c384: 1805883a mov r2,r3 + 2c388: 003f0f06 br 2bfc8 <_gp+0xfffefa90> + 2c38c: 1806943a slli r3,r3,16 + 2c390: 9d66983a sll r19,r19,r21 + 2c394: 39ffffcc andi r7,r7,65535 + 2c398: 19c7883a add r3,r3,r7 + 2c39c: 98ffc32e bgeu r19,r3,2c2ac <_gp+0xfffefd74> + 2c3a0: 10bfffc4 addi r2,r2,-1 + 2c3a4: 003fc106 br 2c2ac <_gp+0xfffefd74> + 2c3a8: 00800604 movi r2,24 + 2c3ac: 003f1106 br 2bff4 <_gp+0xfffefabc> + 2c3b0: 00800604 movi r2,24 + 2c3b4: 003f2706 br 2c054 <_gp+0xfffefb1c> + 2c3b8: 00800604 movi r2,24 + 2c3bc: 003ece06 br 2bef8 <_gp+0xfffef9c0> + 2c3c0: 0007883a mov r3,zero + 2c3c4: 00800044 movi r2,1 + 2c3c8: 003f5c06 br 2c13c <_gp+0xfffefc04> + 2c3cc: 813fa12e bgeu r16,r4,2c254 <_gp+0xfffefd1c> + 2c3d0: 10bfff84 addi r2,r2,-2 + 2c3d4: 85e1883a add r16,r16,r23 + 2c3d8: 003f9f06 br 2c258 <_gp+0xfffefd20> + 2c3dc: 1c7f8a2e bgeu r3,r17,2c208 <_gp+0xfffefcd0> + 2c3e0: 31bfff84 addi r6,r6,-2 + 2c3e4: 1dc7883a add r3,r3,r23 + 2c3e8: 003f8806 br 2c20c <_gp+0xfffefcd4> + 2c3ec: 1805883a mov r2,r3 + 2c3f0: 003fde06 br 2c36c <_gp+0xfffefe34> + 2c3f4: 1839883a mov fp,r3 + 2c3f8: 003fc906 br 2c320 <_gp+0xfffefde8> + 2c3fc: b5bfff84 addi r22,r22,-2 + 2c400: 2449883a add r4,r4,r17 + 2c404: 003f3406 br 2c0d8 <_gp+0xfffefba0> + 2c408: b5bfff84 addi r22,r22,-2 + 2c40c: 1445883a add r2,r2,r17 + 2c410: 003edb06 br 2bf80 <_gp+0xfffefa48> + +0002c414 <__umoddi3>: + 2c414: defff404 addi sp,sp,-48 + 2c418: df000a15 stw fp,40(sp) + 2c41c: dc400315 stw r17,12(sp) + 2c420: dc000215 stw r16,8(sp) + 2c424: dfc00b15 stw ra,44(sp) + 2c428: ddc00915 stw r23,36(sp) + 2c42c: dd800815 stw r22,32(sp) + 2c430: dd400715 stw r21,28(sp) + 2c434: dd000615 stw r20,24(sp) + 2c438: dcc00515 stw r19,20(sp) + 2c43c: dc800415 stw r18,16(sp) + 2c440: 2021883a mov r16,r4 + 2c444: 2823883a mov r17,r5 + 2c448: 2839883a mov fp,r5 + 2c44c: 38003c1e bne r7,zero,2c540 <__umoddi3+0x12c> + 2c450: 3027883a mov r19,r6 + 2c454: 2029883a mov r20,r4 + 2c458: 2980512e bgeu r5,r6,2c5a0 <__umoddi3+0x18c> + 2c45c: 00bfffd4 movui r2,65535 + 2c460: 11809a36 bltu r2,r6,2c6cc <__umoddi3+0x2b8> + 2c464: 01003fc4 movi r4,255 + 2c468: 2189803a cmpltu r4,r4,r6 + 2c46c: 200890fa slli r4,r4,3 + 2c470: 3104d83a srl r2,r6,r4 + 2c474: 00c000f4 movhi r3,3 + 2c478: 18c86e04 addi r3,r3,8632 + 2c47c: 1885883a add r2,r3,r2 + 2c480: 10c00003 ldbu r3,0(r2) + 2c484: 00800804 movi r2,32 + 2c488: 1909883a add r4,r3,r4 + 2c48c: 1125c83a sub r18,r2,r4 + 2c490: 90000526 beq r18,zero,2c4a8 <__umoddi3+0x94> + 2c494: 8ca2983a sll r17,r17,r18 + 2c498: 8108d83a srl r4,r16,r4 + 2c49c: 34a6983a sll r19,r6,r18 + 2c4a0: 84a8983a sll r20,r16,r18 + 2c4a4: 2478b03a or fp,r4,r17 + 2c4a8: 982ed43a srli r23,r19,16 + 2c4ac: e009883a mov r4,fp + 2c4b0: 9dbfffcc andi r22,r19,65535 + 2c4b4: b80b883a mov r5,r23 + 2c4b8: 00226400 call 22640 <__umodsi3> + 2c4bc: e009883a mov r4,fp + 2c4c0: b80b883a mov r5,r23 + 2c4c4: 102b883a mov r21,r2 + 2c4c8: 00225dc0 call 225dc <__udivsi3> + 2c4cc: a806943a slli r3,r21,16 + 2c4d0: a008d43a srli r4,r20,16 + 2c4d4: b085383a mul r2,r22,r2 + 2c4d8: 20c8b03a or r4,r4,r3 + 2c4dc: 2080032e bgeu r4,r2,2c4ec <__umoddi3+0xd8> + 2c4e0: 24c9883a add r4,r4,r19 + 2c4e4: 24c00136 bltu r4,r19,2c4ec <__umoddi3+0xd8> + 2c4e8: 20811036 bltu r4,r2,2c92c <__umoddi3+0x518> + 2c4ec: 20abc83a sub r21,r4,r2 + 2c4f0: b80b883a mov r5,r23 + 2c4f4: a809883a mov r4,r21 + 2c4f8: 00226400 call 22640 <__umodsi3> + 2c4fc: 1023883a mov r17,r2 + 2c500: b80b883a mov r5,r23 + 2c504: a809883a mov r4,r21 + 2c508: 00225dc0 call 225dc <__udivsi3> + 2c50c: 8822943a slli r17,r17,16 + 2c510: b085383a mul r2,r22,r2 + 2c514: a0ffffcc andi r3,r20,65535 + 2c518: 1c46b03a or r3,r3,r17 + 2c51c: 1880042e bgeu r3,r2,2c530 <__umoddi3+0x11c> + 2c520: 1cc7883a add r3,r3,r19 + 2c524: 1cc00236 bltu r3,r19,2c530 <__umoddi3+0x11c> + 2c528: 1880012e bgeu r3,r2,2c530 <__umoddi3+0x11c> + 2c52c: 1cc7883a add r3,r3,r19 + 2c530: 1885c83a sub r2,r3,r2 + 2c534: 1484d83a srl r2,r2,r18 + 2c538: 0007883a mov r3,zero + 2c53c: 00004f06 br 2c67c <__umoddi3+0x268> + 2c540: 29c04c36 bltu r5,r7,2c674 <__umoddi3+0x260> + 2c544: 00bfffd4 movui r2,65535 + 2c548: 11c0582e bgeu r2,r7,2c6ac <__umoddi3+0x298> + 2c54c: 00804034 movhi r2,256 + 2c550: 10bfffc4 addi r2,r2,-1 + 2c554: 11c0e736 bltu r2,r7,2c8f4 <__umoddi3+0x4e0> + 2c558: 01000404 movi r4,16 + 2c55c: 3904d83a srl r2,r7,r4 + 2c560: 00c000f4 movhi r3,3 + 2c564: 18c86e04 addi r3,r3,8632 + 2c568: 1885883a add r2,r3,r2 + 2c56c: 14c00003 ldbu r19,0(r2) + 2c570: 00c00804 movi r3,32 + 2c574: 9927883a add r19,r19,r4 + 2c578: 1ce9c83a sub r20,r3,r19 + 2c57c: a000581e bne r20,zero,2c6e0 <__umoddi3+0x2cc> + 2c580: 3c400136 bltu r7,r17,2c588 <__umoddi3+0x174> + 2c584: 8180eb36 bltu r16,r6,2c934 <__umoddi3+0x520> + 2c588: 8185c83a sub r2,r16,r6 + 2c58c: 89e3c83a sub r17,r17,r7 + 2c590: 8089803a cmpltu r4,r16,r2 + 2c594: 8939c83a sub fp,r17,r4 + 2c598: e007883a mov r3,fp + 2c59c: 00003706 br 2c67c <__umoddi3+0x268> + 2c5a0: 3000041e bne r6,zero,2c5b4 <__umoddi3+0x1a0> + 2c5a4: 000b883a mov r5,zero + 2c5a8: 01000044 movi r4,1 + 2c5ac: 00225dc0 call 225dc <__udivsi3> + 2c5b0: 1027883a mov r19,r2 + 2c5b4: 00bfffd4 movui r2,65535 + 2c5b8: 14c0402e bgeu r2,r19,2c6bc <__umoddi3+0x2a8> + 2c5bc: 00804034 movhi r2,256 + 2c5c0: 10bfffc4 addi r2,r2,-1 + 2c5c4: 14c0cd36 bltu r2,r19,2c8fc <__umoddi3+0x4e8> + 2c5c8: 00800404 movi r2,16 + 2c5cc: 9886d83a srl r3,r19,r2 + 2c5d0: 010000f4 movhi r4,3 + 2c5d4: 21086e04 addi r4,r4,8632 + 2c5d8: 20c7883a add r3,r4,r3 + 2c5dc: 18c00003 ldbu r3,0(r3) + 2c5e0: 1887883a add r3,r3,r2 + 2c5e4: 00800804 movi r2,32 + 2c5e8: 10e5c83a sub r18,r2,r3 + 2c5ec: 9000901e bne r18,zero,2c830 <__umoddi3+0x41c> + 2c5f0: 982cd43a srli r22,r19,16 + 2c5f4: 8ce3c83a sub r17,r17,r19 + 2c5f8: 9d7fffcc andi r21,r19,65535 + 2c5fc: b00b883a mov r5,r22 + 2c600: 8809883a mov r4,r17 + 2c604: 00226400 call 22640 <__umodsi3> + 2c608: 8809883a mov r4,r17 + 2c60c: b00b883a mov r5,r22 + 2c610: 1021883a mov r16,r2 + 2c614: 00225dc0 call 225dc <__udivsi3> + 2c618: 8006943a slli r3,r16,16 + 2c61c: a008d43a srli r4,r20,16 + 2c620: 1545383a mul r2,r2,r21 + 2c624: 20c8b03a or r4,r4,r3 + 2c628: 2080042e bgeu r4,r2,2c63c <__umoddi3+0x228> + 2c62c: 24c9883a add r4,r4,r19 + 2c630: 24c00236 bltu r4,r19,2c63c <__umoddi3+0x228> + 2c634: 2080012e bgeu r4,r2,2c63c <__umoddi3+0x228> + 2c638: 24c9883a add r4,r4,r19 + 2c63c: 20a1c83a sub r16,r4,r2 + 2c640: b00b883a mov r5,r22 + 2c644: 8009883a mov r4,r16 + 2c648: 00226400 call 22640 <__umodsi3> + 2c64c: 1023883a mov r17,r2 + 2c650: b00b883a mov r5,r22 + 2c654: 8009883a mov r4,r16 + 2c658: 00225dc0 call 225dc <__udivsi3> + 2c65c: 8822943a slli r17,r17,16 + 2c660: 1545383a mul r2,r2,r21 + 2c664: a53fffcc andi r20,r20,65535 + 2c668: a446b03a or r3,r20,r17 + 2c66c: 18bfb02e bgeu r3,r2,2c530 <_gp+0xfffefff8> + 2c670: 003fab06 br 2c520 <_gp+0xfffeffe8> + 2c674: 2005883a mov r2,r4 + 2c678: 2807883a mov r3,r5 + 2c67c: dfc00b17 ldw ra,44(sp) + 2c680: df000a17 ldw fp,40(sp) + 2c684: ddc00917 ldw r23,36(sp) + 2c688: dd800817 ldw r22,32(sp) + 2c68c: dd400717 ldw r21,28(sp) + 2c690: dd000617 ldw r20,24(sp) + 2c694: dcc00517 ldw r19,20(sp) + 2c698: dc800417 ldw r18,16(sp) + 2c69c: dc400317 ldw r17,12(sp) + 2c6a0: dc000217 ldw r16,8(sp) + 2c6a4: dec00c04 addi sp,sp,48 + 2c6a8: f800283a ret + 2c6ac: 04c03fc4 movi r19,255 + 2c6b0: 99c9803a cmpltu r4,r19,r7 + 2c6b4: 200890fa slli r4,r4,3 + 2c6b8: 003fa806 br 2c55c <_gp+0xffff0024> + 2c6bc: 00803fc4 movi r2,255 + 2c6c0: 14c5803a cmpltu r2,r2,r19 + 2c6c4: 100490fa slli r2,r2,3 + 2c6c8: 003fc006 br 2c5cc <_gp+0xffff0094> + 2c6cc: 00804034 movhi r2,256 + 2c6d0: 10bfffc4 addi r2,r2,-1 + 2c6d4: 11808b36 bltu r2,r6,2c904 <__umoddi3+0x4f0> + 2c6d8: 01000404 movi r4,16 + 2c6dc: 003f6406 br 2c470 <_gp+0xfffeff38> + 2c6e0: 34c4d83a srl r2,r6,r19 + 2c6e4: 3d0e983a sll r7,r7,r20 + 2c6e8: 8cf8d83a srl fp,r17,r19 + 2c6ec: 8d10983a sll r8,r17,r20 + 2c6f0: 38aab03a or r21,r7,r2 + 2c6f4: a82cd43a srli r22,r21,16 + 2c6f8: 84e2d83a srl r17,r16,r19 + 2c6fc: e009883a mov r4,fp + 2c700: b00b883a mov r5,r22 + 2c704: 8a22b03a or r17,r17,r8 + 2c708: 3524983a sll r18,r6,r20 + 2c70c: 00226400 call 22640 <__umodsi3> + 2c710: e009883a mov r4,fp + 2c714: b00b883a mov r5,r22 + 2c718: 102f883a mov r23,r2 + 2c71c: 00225dc0 call 225dc <__udivsi3> + 2c720: 100d883a mov r6,r2 + 2c724: b808943a slli r4,r23,16 + 2c728: aa3fffcc andi r8,r21,65535 + 2c72c: 8804d43a srli r2,r17,16 + 2c730: 41af383a mul r23,r8,r6 + 2c734: 8520983a sll r16,r16,r20 + 2c738: 1104b03a or r2,r2,r4 + 2c73c: 15c0042e bgeu r2,r23,2c750 <__umoddi3+0x33c> + 2c740: 1545883a add r2,r2,r21 + 2c744: 30ffffc4 addi r3,r6,-1 + 2c748: 1540742e bgeu r2,r21,2c91c <__umoddi3+0x508> + 2c74c: 180d883a mov r6,r3 + 2c750: 15efc83a sub r23,r2,r23 + 2c754: b00b883a mov r5,r22 + 2c758: b809883a mov r4,r23 + 2c75c: d9800115 stw r6,4(sp) + 2c760: da000015 stw r8,0(sp) + 2c764: 00226400 call 22640 <__umodsi3> + 2c768: b00b883a mov r5,r22 + 2c76c: b809883a mov r4,r23 + 2c770: 1039883a mov fp,r2 + 2c774: 00225dc0 call 225dc <__udivsi3> + 2c778: da000017 ldw r8,0(sp) + 2c77c: e038943a slli fp,fp,16 + 2c780: 100b883a mov r5,r2 + 2c784: 4089383a mul r4,r8,r2 + 2c788: 8a3fffcc andi r8,r17,65535 + 2c78c: 4710b03a or r8,r8,fp + 2c790: d9800117 ldw r6,4(sp) + 2c794: 4100042e bgeu r8,r4,2c7a8 <__umoddi3+0x394> + 2c798: 4551883a add r8,r8,r21 2c79c: 10bfffc4 addi r2,r2,-1 - 2c7a0: 11c0ee36 bltu r2,r7,2cb5c <__udivdi3+0x50c> - 2c7a4: 00800404 movi r2,16 - 2c7a8: 3886d83a srl r3,r7,r2 - 2c7ac: 010000f4 movhi r4,3 - 2c7b0: 210abb04 addi r4,r4,10988 - 2c7b4: 20c7883a add r3,r4,r3 - 2c7b8: 18c00003 ldbu r3,0(r3) - 2c7bc: 05400804 movi r21,32 - 2c7c0: 1885883a add r2,r3,r2 - 2c7c4: a8abc83a sub r21,r21,r2 - 2c7c8: a800621e bne r21,zero,2c954 <__udivdi3+0x304> - 2c7cc: 3c00e936 bltu r7,r16,2cb74 <__udivdi3+0x524> - 2c7d0: 9985403a cmpgeu r2,r19,r6 - 2c7d4: 0007883a mov r3,zero - 2c7d8: 00004506 br 2c8f0 <__udivdi3+0x2a0> - 2c7dc: 3000041e bne r6,zero,2c7f0 <__udivdi3+0x1a0> - 2c7e0: 000b883a mov r5,zero - 2c7e4: 01000044 movi r4,1 - 2c7e8: 0022a200 call 22a20 <__udivsi3> - 2c7ec: 1023883a mov r17,r2 - 2c7f0: 00bfffd4 movui r2,65535 - 2c7f4: 14404e2e bgeu r2,r17,2c930 <__udivdi3+0x2e0> - 2c7f8: 00804034 movhi r2,256 - 2c7fc: 10bfffc4 addi r2,r2,-1 - 2c800: 1440d836 bltu r2,r17,2cb64 <__udivdi3+0x514> - 2c804: 00800404 movi r2,16 - 2c808: 8886d83a srl r3,r17,r2 - 2c80c: 010000f4 movhi r4,3 - 2c810: 210abb04 addi r4,r4,10988 - 2c814: 20c7883a add r3,r4,r3 - 2c818: 18c00003 ldbu r3,0(r3) - 2c81c: 1885883a add r2,r3,r2 - 2c820: 00c00804 movi r3,32 - 2c824: 1887c83a sub r3,r3,r2 - 2c828: 18008f1e bne r3,zero,2ca68 <__udivdi3+0x418> - 2c82c: 882ad43a srli r21,r17,16 - 2c830: 8461c83a sub r16,r16,r17 - 2c834: 8d3fffcc andi r20,r17,65535 - 2c838: 00c00044 movi r3,1 - 2c83c: 8009883a mov r4,r16 - 2c840: a80b883a mov r5,r21 - 2c844: d8c00015 stw r3,0(sp) - 2c848: 0022a840 call 22a84 <__umodsi3> - 2c84c: 8009883a mov r4,r16 - 2c850: a80b883a mov r5,r21 - 2c854: 1027883a mov r19,r2 - 2c858: 0022a200 call 22a20 <__udivsi3> - 2c85c: 9826943a slli r19,r19,16 - 2c860: 9008d43a srli r4,r18,16 - 2c864: 1521383a mul r16,r2,r20 - 2c868: 102d883a mov r22,r2 - 2c86c: 24c8b03a or r4,r4,r19 - 2c870: d8c00017 ldw r3,0(sp) - 2c874: 2400052e bgeu r4,r16,2c88c <__udivdi3+0x23c> - 2c878: 2449883a add r4,r4,r17 - 2c87c: b0bfffc4 addi r2,r22,-1 - 2c880: 24400136 bltu r4,r17,2c888 <__udivdi3+0x238> - 2c884: 2400ca36 bltu r4,r16,2cbb0 <__udivdi3+0x560> - 2c888: 102d883a mov r22,r2 - 2c88c: 2421c83a sub r16,r4,r16 - 2c890: a80b883a mov r5,r21 - 2c894: 8009883a mov r4,r16 - 2c898: d8c00015 stw r3,0(sp) - 2c89c: 0022a840 call 22a84 <__umodsi3> - 2c8a0: 1027883a mov r19,r2 - 2c8a4: a80b883a mov r5,r21 - 2c8a8: 8009883a mov r4,r16 - 2c8ac: 0022a200 call 22a20 <__udivsi3> - 2c8b0: 9826943a slli r19,r19,16 - 2c8b4: 1529383a mul r20,r2,r20 - 2c8b8: 94bfffcc andi r18,r18,65535 - 2c8bc: 94e4b03a or r18,r18,r19 - 2c8c0: d8c00017 ldw r3,0(sp) - 2c8c4: 9500052e bgeu r18,r20,2c8dc <__udivdi3+0x28c> - 2c8c8: 8ca5883a add r18,r17,r18 - 2c8cc: 113fffc4 addi r4,r2,-1 - 2c8d0: 94409736 bltu r18,r17,2cb30 <__udivdi3+0x4e0> - 2c8d4: 9500962e bgeu r18,r20,2cb30 <__udivdi3+0x4e0> - 2c8d8: 10bfff84 addi r2,r2,-2 - 2c8dc: b00c943a slli r6,r22,16 - 2c8e0: 3084b03a or r2,r6,r2 - 2c8e4: 00000206 br 2c8f0 <__udivdi3+0x2a0> - 2c8e8: 0007883a mov r3,zero - 2c8ec: 0005883a mov r2,zero - 2c8f0: dfc00a17 ldw ra,40(sp) - 2c8f4: df000917 ldw fp,36(sp) - 2c8f8: ddc00817 ldw r23,32(sp) - 2c8fc: dd800717 ldw r22,28(sp) - 2c900: dd400617 ldw r21,24(sp) - 2c904: dd000517 ldw r20,20(sp) - 2c908: dcc00417 ldw r19,16(sp) - 2c90c: dc800317 ldw r18,12(sp) - 2c910: dc400217 ldw r17,8(sp) - 2c914: dc000117 ldw r16,4(sp) - 2c918: dec00b04 addi sp,sp,44 - 2c91c: f800283a ret - 2c920: 00803fc4 movi r2,255 - 2c924: 11c5803a cmpltu r2,r2,r7 - 2c928: 100490fa slli r2,r2,3 - 2c92c: 003f9e06 br 2c7a8 <__udivdi3+0x158> - 2c930: 00803fc4 movi r2,255 - 2c934: 1445803a cmpltu r2,r2,r17 - 2c938: 100490fa slli r2,r2,3 - 2c93c: 003fb206 br 2c808 <__udivdi3+0x1b8> - 2c940: 00804034 movhi r2,256 - 2c944: 10bfffc4 addi r2,r2,-1 - 2c948: 11808836 bltu r2,r6,2cb6c <__udivdi3+0x51c> - 2c94c: 00800404 movi r2,16 - 2c950: 003f5606 br 2c6ac <__udivdi3+0x5c> - 2c954: 30aed83a srl r23,r6,r2 - 2c958: 3d4e983a sll r7,r7,r21 - 2c95c: 80acd83a srl r22,r16,r2 - 2c960: 9884d83a srl r2,r19,r2 - 2c964: 3deeb03a or r23,r7,r23 - 2c968: b824d43a srli r18,r23,16 - 2c96c: 8560983a sll r16,r16,r21 - 2c970: b009883a mov r4,r22 - 2c974: 900b883a mov r5,r18 - 2c978: 3568983a sll r20,r6,r21 - 2c97c: 1420b03a or r16,r2,r16 - 2c980: 0022a840 call 22a84 <__umodsi3> - 2c984: b009883a mov r4,r22 - 2c988: 900b883a mov r5,r18 - 2c98c: 1023883a mov r17,r2 - 2c990: 0022a200 call 22a20 <__udivsi3> - 2c994: 8808943a slli r4,r17,16 - 2c998: bf3fffcc andi fp,r23,65535 - 2c99c: 8006d43a srli r3,r16,16 - 2c9a0: e0a3383a mul r17,fp,r2 - 2c9a4: 100d883a mov r6,r2 - 2c9a8: 1906b03a or r3,r3,r4 - 2c9ac: 1c40042e bgeu r3,r17,2c9c0 <__udivdi3+0x370> - 2c9b0: 1dc7883a add r3,r3,r23 - 2c9b4: 10bfffc4 addi r2,r2,-1 - 2c9b8: 1dc0752e bgeu r3,r23,2cb90 <__udivdi3+0x540> - 2c9bc: 100d883a mov r6,r2 - 2c9c0: 1c63c83a sub r17,r3,r17 - 2c9c4: 900b883a mov r5,r18 - 2c9c8: 8809883a mov r4,r17 - 2c9cc: d9800015 stw r6,0(sp) - 2c9d0: 0022a840 call 22a84 <__umodsi3> - 2c9d4: 102d883a mov r22,r2 - 2c9d8: 8809883a mov r4,r17 - 2c9dc: 900b883a mov r5,r18 - 2c9e0: 0022a200 call 22a20 <__udivsi3> - 2c9e4: b02c943a slli r22,r22,16 - 2c9e8: e089383a mul r4,fp,r2 - 2c9ec: 843fffcc andi r16,r16,65535 - 2c9f0: 85a0b03a or r16,r16,r22 - 2c9f4: d9800017 ldw r6,0(sp) - 2c9f8: 8100042e bgeu r16,r4,2ca0c <__udivdi3+0x3bc> - 2c9fc: 85e1883a add r16,r16,r23 - 2ca00: 10ffffc4 addi r3,r2,-1 - 2ca04: 85c05e2e bgeu r16,r23,2cb80 <__udivdi3+0x530> - 2ca08: 1805883a mov r2,r3 - 2ca0c: 300c943a slli r6,r6,16 - 2ca10: a17fffcc andi r5,r20,65535 - 2ca14: a028d43a srli r20,r20,16 - 2ca18: 3084b03a or r2,r6,r2 - 2ca1c: 10ffffcc andi r3,r2,65535 - 2ca20: 100cd43a srli r6,r2,16 - 2ca24: 194f383a mul r7,r3,r5 - 2ca28: 1d07383a mul r3,r3,r20 - 2ca2c: 314b383a mul r5,r6,r5 - 2ca30: 3810d43a srli r8,r7,16 - 2ca34: 8121c83a sub r16,r16,r4 - 2ca38: 1947883a add r3,r3,r5 - 2ca3c: 40c7883a add r3,r8,r3 - 2ca40: 350d383a mul r6,r6,r20 - 2ca44: 1940022e bgeu r3,r5,2ca50 <__udivdi3+0x400> - 2ca48: 01000074 movhi r4,1 - 2ca4c: 310d883a add r6,r6,r4 - 2ca50: 1828d43a srli r20,r3,16 - 2ca54: a18d883a add r6,r20,r6 - 2ca58: 81803e36 bltu r16,r6,2cb54 <__udivdi3+0x504> - 2ca5c: 81803826 beq r16,r6,2cb40 <__udivdi3+0x4f0> - 2ca60: 0007883a mov r3,zero - 2ca64: 003fa206 br 2c8f0 <__udivdi3+0x2a0> - 2ca68: 88e2983a sll r17,r17,r3 - 2ca6c: 80a8d83a srl r20,r16,r2 - 2ca70: 80e0983a sll r16,r16,r3 - 2ca74: 882ad43a srli r21,r17,16 - 2ca78: 9884d83a srl r2,r19,r2 - 2ca7c: a009883a mov r4,r20 - 2ca80: a80b883a mov r5,r21 - 2ca84: 142eb03a or r23,r2,r16 - 2ca88: 98e4983a sll r18,r19,r3 - 2ca8c: 0022a840 call 22a84 <__umodsi3> - 2ca90: a009883a mov r4,r20 - 2ca94: a80b883a mov r5,r21 - 2ca98: 1021883a mov r16,r2 - 2ca9c: 0022a200 call 22a20 <__udivsi3> - 2caa0: 1039883a mov fp,r2 - 2caa4: 8d3fffcc andi r20,r17,65535 - 2caa8: 8020943a slli r16,r16,16 - 2caac: b804d43a srli r2,r23,16 - 2cab0: a72d383a mul r22,r20,fp - 2cab4: 1404b03a or r2,r2,r16 - 2cab8: 1580062e bgeu r2,r22,2cad4 <__udivdi3+0x484> - 2cabc: 1445883a add r2,r2,r17 - 2cac0: e0ffffc4 addi r3,fp,-1 - 2cac4: 14403836 bltu r2,r17,2cba8 <__udivdi3+0x558> - 2cac8: 1580372e bgeu r2,r22,2cba8 <__udivdi3+0x558> - 2cacc: e73fff84 addi fp,fp,-2 - 2cad0: 1445883a add r2,r2,r17 - 2cad4: 15adc83a sub r22,r2,r22 - 2cad8: a80b883a mov r5,r21 - 2cadc: b009883a mov r4,r22 - 2cae0: 0022a840 call 22a84 <__umodsi3> - 2cae4: 1027883a mov r19,r2 - 2cae8: b009883a mov r4,r22 - 2caec: a80b883a mov r5,r21 - 2caf0: 0022a200 call 22a20 <__udivsi3> - 2caf4: 9826943a slli r19,r19,16 - 2caf8: a0a1383a mul r16,r20,r2 - 2cafc: b93fffcc andi r4,r23,65535 - 2cb00: 24c8b03a or r4,r4,r19 - 2cb04: 2400062e bgeu r4,r16,2cb20 <__udivdi3+0x4d0> - 2cb08: 2449883a add r4,r4,r17 - 2cb0c: 10ffffc4 addi r3,r2,-1 - 2cb10: 24402336 bltu r4,r17,2cba0 <__udivdi3+0x550> - 2cb14: 2400222e bgeu r4,r16,2cba0 <__udivdi3+0x550> - 2cb18: 10bfff84 addi r2,r2,-2 - 2cb1c: 2449883a add r4,r4,r17 - 2cb20: e038943a slli fp,fp,16 - 2cb24: 2421c83a sub r16,r4,r16 - 2cb28: e086b03a or r3,fp,r2 - 2cb2c: 003f4306 br 2c83c <__udivdi3+0x1ec> - 2cb30: 2005883a mov r2,r4 - 2cb34: 003f6906 br 2c8dc <__udivdi3+0x28c> - 2cb38: 1805883a mov r2,r3 - 2cb3c: 003f0f06 br 2c77c <__udivdi3+0x12c> - 2cb40: 1806943a slli r3,r3,16 - 2cb44: 9d66983a sll r19,r19,r21 - 2cb48: 39ffffcc andi r7,r7,65535 - 2cb4c: 19c7883a add r3,r3,r7 - 2cb50: 98ffc32e bgeu r19,r3,2ca60 <__udivdi3+0x410> - 2cb54: 10bfffc4 addi r2,r2,-1 - 2cb58: 003fc106 br 2ca60 <__udivdi3+0x410> - 2cb5c: 00800604 movi r2,24 - 2cb60: 003f1106 br 2c7a8 <__udivdi3+0x158> - 2cb64: 00800604 movi r2,24 - 2cb68: 003f2706 br 2c808 <__udivdi3+0x1b8> - 2cb6c: 00800604 movi r2,24 - 2cb70: 003ece06 br 2c6ac <__udivdi3+0x5c> - 2cb74: 0007883a mov r3,zero - 2cb78: 00800044 movi r2,1 - 2cb7c: 003f5c06 br 2c8f0 <__udivdi3+0x2a0> - 2cb80: 813fa12e bgeu r16,r4,2ca08 <__udivdi3+0x3b8> - 2cb84: 10bfff84 addi r2,r2,-2 - 2cb88: 85e1883a add r16,r16,r23 - 2cb8c: 003f9f06 br 2ca0c <__udivdi3+0x3bc> - 2cb90: 1c7f8a2e bgeu r3,r17,2c9bc <__udivdi3+0x36c> - 2cb94: 31bfff84 addi r6,r6,-2 - 2cb98: 1dc7883a add r3,r3,r23 - 2cb9c: 003f8806 br 2c9c0 <__udivdi3+0x370> - 2cba0: 1805883a mov r2,r3 - 2cba4: 003fde06 br 2cb20 <__udivdi3+0x4d0> - 2cba8: 1839883a mov fp,r3 - 2cbac: 003fc906 br 2cad4 <__udivdi3+0x484> - 2cbb0: b5bfff84 addi r22,r22,-2 - 2cbb4: 2449883a add r4,r4,r17 - 2cbb8: 003f3406 br 2c88c <__udivdi3+0x23c> - 2cbbc: b5bfff84 addi r22,r22,-2 - 2cbc0: 1445883a add r2,r2,r17 - 2cbc4: 003edb06 br 2c734 <__udivdi3+0xe4> + 2c7a0: 45405a2e bgeu r8,r21,2c90c <__umoddi3+0x4f8> + 2c7a4: 100b883a mov r5,r2 + 2c7a8: 300c943a slli r6,r6,16 + 2c7ac: 91ffffcc andi r7,r18,65535 + 2c7b0: 9004d43a srli r2,r18,16 + 2c7b4: 314cb03a or r6,r6,r5 + 2c7b8: 317fffcc andi r5,r6,65535 + 2c7bc: 300cd43a srli r6,r6,16 + 2c7c0: 29d3383a mul r9,r5,r7 + 2c7c4: 288b383a mul r5,r5,r2 + 2c7c8: 31cf383a mul r7,r6,r7 + 2c7cc: 4806d43a srli r3,r9,16 + 2c7d0: 4111c83a sub r8,r8,r4 + 2c7d4: 29cb883a add r5,r5,r7 + 2c7d8: 194b883a add r5,r3,r5 + 2c7dc: 3085383a mul r2,r6,r2 + 2c7e0: 29c0022e bgeu r5,r7,2c7ec <__umoddi3+0x3d8> + 2c7e4: 00c00074 movhi r3,1 + 2c7e8: 10c5883a add r2,r2,r3 + 2c7ec: 2808d43a srli r4,r5,16 + 2c7f0: 280a943a slli r5,r5,16 + 2c7f4: 4a7fffcc andi r9,r9,65535 + 2c7f8: 2085883a add r2,r4,r2 + 2c7fc: 2a4b883a add r5,r5,r9 + 2c800: 40803636 bltu r8,r2,2c8dc <__umoddi3+0x4c8> + 2c804: 40804d26 beq r8,r2,2c93c <__umoddi3+0x528> + 2c808: 4089c83a sub r4,r8,r2 + 2c80c: 280f883a mov r7,r5 + 2c810: 81cfc83a sub r7,r16,r7 + 2c814: 81c7803a cmpltu r3,r16,r7 + 2c818: 20c7c83a sub r3,r4,r3 + 2c81c: 1cc4983a sll r2,r3,r19 + 2c820: 3d0ed83a srl r7,r7,r20 + 2c824: 1d06d83a srl r3,r3,r20 + 2c828: 11c4b03a or r2,r2,r7 + 2c82c: 003f9306 br 2c67c <_gp+0xffff0144> + 2c830: 9ca6983a sll r19,r19,r18 + 2c834: 88e8d83a srl r20,r17,r3 + 2c838: 80c4d83a srl r2,r16,r3 + 2c83c: 982cd43a srli r22,r19,16 + 2c840: 8ca2983a sll r17,r17,r18 + 2c844: a009883a mov r4,r20 + 2c848: b00b883a mov r5,r22 + 2c84c: 1478b03a or fp,r2,r17 + 2c850: 00226400 call 22640 <__umodsi3> + 2c854: a009883a mov r4,r20 + 2c858: b00b883a mov r5,r22 + 2c85c: 1023883a mov r17,r2 + 2c860: 00225dc0 call 225dc <__udivsi3> + 2c864: 9d7fffcc andi r21,r19,65535 + 2c868: 880a943a slli r5,r17,16 + 2c86c: e008d43a srli r4,fp,16 + 2c870: a885383a mul r2,r21,r2 + 2c874: 84a8983a sll r20,r16,r18 + 2c878: 2148b03a or r4,r4,r5 + 2c87c: 2080042e bgeu r4,r2,2c890 <__umoddi3+0x47c> + 2c880: 24c9883a add r4,r4,r19 + 2c884: 24c00236 bltu r4,r19,2c890 <__umoddi3+0x47c> + 2c888: 2080012e bgeu r4,r2,2c890 <__umoddi3+0x47c> + 2c88c: 24c9883a add r4,r4,r19 + 2c890: 20a3c83a sub r17,r4,r2 + 2c894: b00b883a mov r5,r22 + 2c898: 8809883a mov r4,r17 + 2c89c: 00226400 call 22640 <__umodsi3> + 2c8a0: 102f883a mov r23,r2 + 2c8a4: 8809883a mov r4,r17 + 2c8a8: b00b883a mov r5,r22 + 2c8ac: 00225dc0 call 225dc <__udivsi3> + 2c8b0: b82e943a slli r23,r23,16 + 2c8b4: a885383a mul r2,r21,r2 + 2c8b8: e13fffcc andi r4,fp,65535 + 2c8bc: 25c8b03a or r4,r4,r23 + 2c8c0: 2080042e bgeu r4,r2,2c8d4 <__umoddi3+0x4c0> + 2c8c4: 24c9883a add r4,r4,r19 + 2c8c8: 24c00236 bltu r4,r19,2c8d4 <__umoddi3+0x4c0> + 2c8cc: 2080012e bgeu r4,r2,2c8d4 <__umoddi3+0x4c0> + 2c8d0: 24c9883a add r4,r4,r19 + 2c8d4: 20a3c83a sub r17,r4,r2 + 2c8d8: 003f4806 br 2c5fc <_gp+0xffff00c4> + 2c8dc: 2c8fc83a sub r7,r5,r18 + 2c8e0: 1545c83a sub r2,r2,r21 + 2c8e4: 29cb803a cmpltu r5,r5,r7 + 2c8e8: 1145c83a sub r2,r2,r5 + 2c8ec: 4089c83a sub r4,r8,r2 + 2c8f0: 003fc706 br 2c810 <_gp+0xffff02d8> + 2c8f4: 01000604 movi r4,24 + 2c8f8: 003f1806 br 2c55c <_gp+0xffff0024> + 2c8fc: 00800604 movi r2,24 + 2c900: 003f3206 br 2c5cc <_gp+0xffff0094> + 2c904: 01000604 movi r4,24 + 2c908: 003ed906 br 2c470 <_gp+0xfffeff38> + 2c90c: 413fa52e bgeu r8,r4,2c7a4 <_gp+0xffff026c> + 2c910: 297fff84 addi r5,r5,-2 + 2c914: 4551883a add r8,r8,r21 + 2c918: 003fa306 br 2c7a8 <_gp+0xffff0270> + 2c91c: 15ff8b2e bgeu r2,r23,2c74c <_gp+0xffff0214> + 2c920: 31bfff84 addi r6,r6,-2 + 2c924: 1545883a add r2,r2,r21 + 2c928: 003f8906 br 2c750 <_gp+0xffff0218> + 2c92c: 24c9883a add r4,r4,r19 + 2c930: 003eee06 br 2c4ec <_gp+0xfffeffb4> + 2c934: 8005883a mov r2,r16 + 2c938: 003f1706 br 2c598 <_gp+0xffff0060> + 2c93c: 817fe736 bltu r16,r5,2c8dc <_gp+0xffff03a4> + 2c940: 280f883a mov r7,r5 + 2c944: 0009883a mov r4,zero + 2c948: 003fb106 br 2c810 <_gp+0xffff02d8> -0002cbc8 <__umoddi3>: - 2cbc8: defff404 addi sp,sp,-48 - 2cbcc: df000a15 stw fp,40(sp) - 2cbd0: dc400315 stw r17,12(sp) - 2cbd4: dc000215 stw r16,8(sp) - 2cbd8: dfc00b15 stw ra,44(sp) - 2cbdc: ddc00915 stw r23,36(sp) - 2cbe0: dd800815 stw r22,32(sp) - 2cbe4: dd400715 stw r21,28(sp) - 2cbe8: dd000615 stw r20,24(sp) - 2cbec: dcc00515 stw r19,20(sp) - 2cbf0: dc800415 stw r18,16(sp) - 2cbf4: 2021883a mov r16,r4 - 2cbf8: 2823883a mov r17,r5 - 2cbfc: 2839883a mov fp,r5 - 2cc00: 38003c1e bne r7,zero,2ccf4 <__umoddi3+0x12c> - 2cc04: 3027883a mov r19,r6 - 2cc08: 2029883a mov r20,r4 - 2cc0c: 2980512e bgeu r5,r6,2cd54 <__umoddi3+0x18c> - 2cc10: 00bfffd4 movui r2,65535 - 2cc14: 11809a36 bltu r2,r6,2ce80 <__umoddi3+0x2b8> - 2cc18: 01003fc4 movi r4,255 - 2cc1c: 2189803a cmpltu r4,r4,r6 - 2cc20: 200890fa slli r4,r4,3 - 2cc24: 3104d83a srl r2,r6,r4 - 2cc28: 00c000f4 movhi r3,3 - 2cc2c: 18cabb04 addi r3,r3,10988 - 2cc30: 1885883a add r2,r3,r2 - 2cc34: 10c00003 ldbu r3,0(r2) - 2cc38: 00800804 movi r2,32 - 2cc3c: 1909883a add r4,r3,r4 - 2cc40: 1125c83a sub r18,r2,r4 - 2cc44: 90000526 beq r18,zero,2cc5c <__umoddi3+0x94> - 2cc48: 8ca2983a sll r17,r17,r18 - 2cc4c: 8108d83a srl r4,r16,r4 - 2cc50: 34a6983a sll r19,r6,r18 - 2cc54: 84a8983a sll r20,r16,r18 - 2cc58: 2478b03a or fp,r4,r17 - 2cc5c: 982ed43a srli r23,r19,16 - 2cc60: e009883a mov r4,fp - 2cc64: 9dbfffcc andi r22,r19,65535 - 2cc68: b80b883a mov r5,r23 - 2cc6c: 0022a840 call 22a84 <__umodsi3> - 2cc70: e009883a mov r4,fp - 2cc74: b80b883a mov r5,r23 - 2cc78: 102b883a mov r21,r2 - 2cc7c: 0022a200 call 22a20 <__udivsi3> - 2cc80: a806943a slli r3,r21,16 - 2cc84: a008d43a srli r4,r20,16 - 2cc88: b085383a mul r2,r22,r2 - 2cc8c: 20c8b03a or r4,r4,r3 - 2cc90: 2080032e bgeu r4,r2,2cca0 <__umoddi3+0xd8> - 2cc94: 24c9883a add r4,r4,r19 - 2cc98: 24c00136 bltu r4,r19,2cca0 <__umoddi3+0xd8> - 2cc9c: 20811036 bltu r4,r2,2d0e0 <__umoddi3+0x518> - 2cca0: 20abc83a sub r21,r4,r2 - 2cca4: b80b883a mov r5,r23 - 2cca8: a809883a mov r4,r21 - 2ccac: 0022a840 call 22a84 <__umodsi3> - 2ccb0: 1023883a mov r17,r2 - 2ccb4: b80b883a mov r5,r23 - 2ccb8: a809883a mov r4,r21 - 2ccbc: 0022a200 call 22a20 <__udivsi3> - 2ccc0: 8822943a slli r17,r17,16 - 2ccc4: b085383a mul r2,r22,r2 - 2ccc8: a0ffffcc andi r3,r20,65535 - 2cccc: 1c46b03a or r3,r3,r17 - 2ccd0: 1880042e bgeu r3,r2,2cce4 <__umoddi3+0x11c> - 2ccd4: 1cc7883a add r3,r3,r19 - 2ccd8: 1cc00236 bltu r3,r19,2cce4 <__umoddi3+0x11c> - 2ccdc: 1880012e bgeu r3,r2,2cce4 <__umoddi3+0x11c> - 2cce0: 1cc7883a add r3,r3,r19 - 2cce4: 1885c83a sub r2,r3,r2 - 2cce8: 1484d83a srl r2,r2,r18 - 2ccec: 0007883a mov r3,zero - 2ccf0: 00004f06 br 2ce30 <__umoddi3+0x268> - 2ccf4: 29c04c36 bltu r5,r7,2ce28 <__umoddi3+0x260> - 2ccf8: 00bfffd4 movui r2,65535 - 2ccfc: 11c0582e bgeu r2,r7,2ce60 <__umoddi3+0x298> - 2cd00: 00804034 movhi r2,256 - 2cd04: 10bfffc4 addi r2,r2,-1 - 2cd08: 11c0e736 bltu r2,r7,2d0a8 <__umoddi3+0x4e0> - 2cd0c: 01000404 movi r4,16 - 2cd10: 3904d83a srl r2,r7,r4 - 2cd14: 00c000f4 movhi r3,3 - 2cd18: 18cabb04 addi r3,r3,10988 - 2cd1c: 1885883a add r2,r3,r2 - 2cd20: 14c00003 ldbu r19,0(r2) - 2cd24: 00c00804 movi r3,32 - 2cd28: 9927883a add r19,r19,r4 - 2cd2c: 1ce9c83a sub r20,r3,r19 - 2cd30: a000581e bne r20,zero,2ce94 <__umoddi3+0x2cc> - 2cd34: 3c400136 bltu r7,r17,2cd3c <__umoddi3+0x174> - 2cd38: 8180eb36 bltu r16,r6,2d0e8 <__umoddi3+0x520> - 2cd3c: 8185c83a sub r2,r16,r6 - 2cd40: 89e3c83a sub r17,r17,r7 - 2cd44: 8089803a cmpltu r4,r16,r2 - 2cd48: 8939c83a sub fp,r17,r4 - 2cd4c: e007883a mov r3,fp - 2cd50: 00003706 br 2ce30 <__umoddi3+0x268> - 2cd54: 3000041e bne r6,zero,2cd68 <__umoddi3+0x1a0> - 2cd58: 000b883a mov r5,zero - 2cd5c: 01000044 movi r4,1 - 2cd60: 0022a200 call 22a20 <__udivsi3> - 2cd64: 1027883a mov r19,r2 - 2cd68: 00bfffd4 movui r2,65535 - 2cd6c: 14c0402e bgeu r2,r19,2ce70 <__umoddi3+0x2a8> - 2cd70: 00804034 movhi r2,256 - 2cd74: 10bfffc4 addi r2,r2,-1 - 2cd78: 14c0cd36 bltu r2,r19,2d0b0 <__umoddi3+0x4e8> - 2cd7c: 00800404 movi r2,16 - 2cd80: 9886d83a srl r3,r19,r2 - 2cd84: 010000f4 movhi r4,3 - 2cd88: 210abb04 addi r4,r4,10988 - 2cd8c: 20c7883a add r3,r4,r3 - 2cd90: 18c00003 ldbu r3,0(r3) - 2cd94: 1887883a add r3,r3,r2 - 2cd98: 00800804 movi r2,32 - 2cd9c: 10e5c83a sub r18,r2,r3 - 2cda0: 9000901e bne r18,zero,2cfe4 <__umoddi3+0x41c> - 2cda4: 982cd43a srli r22,r19,16 - 2cda8: 8ce3c83a sub r17,r17,r19 - 2cdac: 9d7fffcc andi r21,r19,65535 - 2cdb0: b00b883a mov r5,r22 - 2cdb4: 8809883a mov r4,r17 - 2cdb8: 0022a840 call 22a84 <__umodsi3> - 2cdbc: 8809883a mov r4,r17 - 2cdc0: b00b883a mov r5,r22 - 2cdc4: 1021883a mov r16,r2 - 2cdc8: 0022a200 call 22a20 <__udivsi3> - 2cdcc: 8006943a slli r3,r16,16 - 2cdd0: a008d43a srli r4,r20,16 - 2cdd4: 1545383a mul r2,r2,r21 - 2cdd8: 20c8b03a or r4,r4,r3 - 2cddc: 2080042e bgeu r4,r2,2cdf0 <__umoddi3+0x228> - 2cde0: 24c9883a add r4,r4,r19 - 2cde4: 24c00236 bltu r4,r19,2cdf0 <__umoddi3+0x228> - 2cde8: 2080012e bgeu r4,r2,2cdf0 <__umoddi3+0x228> - 2cdec: 24c9883a add r4,r4,r19 - 2cdf0: 20a1c83a sub r16,r4,r2 - 2cdf4: b00b883a mov r5,r22 - 2cdf8: 8009883a mov r4,r16 - 2cdfc: 0022a840 call 22a84 <__umodsi3> - 2ce00: 1023883a mov r17,r2 - 2ce04: b00b883a mov r5,r22 - 2ce08: 8009883a mov r4,r16 - 2ce0c: 0022a200 call 22a20 <__udivsi3> - 2ce10: 8822943a slli r17,r17,16 - 2ce14: 1545383a mul r2,r2,r21 - 2ce18: a53fffcc andi r20,r20,65535 - 2ce1c: a446b03a or r3,r20,r17 - 2ce20: 18bfb02e bgeu r3,r2,2cce4 <__umoddi3+0x11c> - 2ce24: 003fab06 br 2ccd4 <__umoddi3+0x10c> - 2ce28: 2005883a mov r2,r4 - 2ce2c: 2807883a mov r3,r5 - 2ce30: dfc00b17 ldw ra,44(sp) - 2ce34: df000a17 ldw fp,40(sp) - 2ce38: ddc00917 ldw r23,36(sp) - 2ce3c: dd800817 ldw r22,32(sp) - 2ce40: dd400717 ldw r21,28(sp) - 2ce44: dd000617 ldw r20,24(sp) - 2ce48: dcc00517 ldw r19,20(sp) - 2ce4c: dc800417 ldw r18,16(sp) - 2ce50: dc400317 ldw r17,12(sp) - 2ce54: dc000217 ldw r16,8(sp) - 2ce58: dec00c04 addi sp,sp,48 - 2ce5c: f800283a ret - 2ce60: 04c03fc4 movi r19,255 - 2ce64: 99c9803a cmpltu r4,r19,r7 - 2ce68: 200890fa slli r4,r4,3 - 2ce6c: 003fa806 br 2cd10 <__umoddi3+0x148> - 2ce70: 00803fc4 movi r2,255 - 2ce74: 14c5803a cmpltu r2,r2,r19 - 2ce78: 100490fa slli r2,r2,3 - 2ce7c: 003fc006 br 2cd80 <__umoddi3+0x1b8> - 2ce80: 00804034 movhi r2,256 - 2ce84: 10bfffc4 addi r2,r2,-1 - 2ce88: 11808b36 bltu r2,r6,2d0b8 <__umoddi3+0x4f0> - 2ce8c: 01000404 movi r4,16 - 2ce90: 003f6406 br 2cc24 <__umoddi3+0x5c> - 2ce94: 34c4d83a srl r2,r6,r19 - 2ce98: 3d0e983a sll r7,r7,r20 - 2ce9c: 8cf8d83a srl fp,r17,r19 - 2cea0: 8d10983a sll r8,r17,r20 - 2cea4: 38aab03a or r21,r7,r2 - 2cea8: a82cd43a srli r22,r21,16 - 2ceac: 84e2d83a srl r17,r16,r19 - 2ceb0: e009883a mov r4,fp - 2ceb4: b00b883a mov r5,r22 - 2ceb8: 8a22b03a or r17,r17,r8 - 2cebc: 3524983a sll r18,r6,r20 - 2cec0: 0022a840 call 22a84 <__umodsi3> - 2cec4: e009883a mov r4,fp - 2cec8: b00b883a mov r5,r22 - 2cecc: 102f883a mov r23,r2 - 2ced0: 0022a200 call 22a20 <__udivsi3> - 2ced4: 100d883a mov r6,r2 - 2ced8: b808943a slli r4,r23,16 - 2cedc: aa3fffcc andi r8,r21,65535 - 2cee0: 8804d43a srli r2,r17,16 - 2cee4: 41af383a mul r23,r8,r6 - 2cee8: 8520983a sll r16,r16,r20 - 2ceec: 1104b03a or r2,r2,r4 - 2cef0: 15c0042e bgeu r2,r23,2cf04 <__umoddi3+0x33c> - 2cef4: 1545883a add r2,r2,r21 - 2cef8: 30ffffc4 addi r3,r6,-1 - 2cefc: 1540742e bgeu r2,r21,2d0d0 <__umoddi3+0x508> - 2cf00: 180d883a mov r6,r3 - 2cf04: 15efc83a sub r23,r2,r23 - 2cf08: b00b883a mov r5,r22 - 2cf0c: b809883a mov r4,r23 - 2cf10: d9800115 stw r6,4(sp) - 2cf14: da000015 stw r8,0(sp) - 2cf18: 0022a840 call 22a84 <__umodsi3> - 2cf1c: b00b883a mov r5,r22 - 2cf20: b809883a mov r4,r23 - 2cf24: 1039883a mov fp,r2 - 2cf28: 0022a200 call 22a20 <__udivsi3> - 2cf2c: da000017 ldw r8,0(sp) - 2cf30: e038943a slli fp,fp,16 - 2cf34: 100b883a mov r5,r2 - 2cf38: 4089383a mul r4,r8,r2 - 2cf3c: 8a3fffcc andi r8,r17,65535 - 2cf40: 4710b03a or r8,r8,fp - 2cf44: d9800117 ldw r6,4(sp) - 2cf48: 4100042e bgeu r8,r4,2cf5c <__umoddi3+0x394> - 2cf4c: 4551883a add r8,r8,r21 - 2cf50: 10bfffc4 addi r2,r2,-1 - 2cf54: 45405a2e bgeu r8,r21,2d0c0 <__umoddi3+0x4f8> - 2cf58: 100b883a mov r5,r2 - 2cf5c: 300c943a slli r6,r6,16 - 2cf60: 91ffffcc andi r7,r18,65535 - 2cf64: 9004d43a srli r2,r18,16 - 2cf68: 314cb03a or r6,r6,r5 - 2cf6c: 317fffcc andi r5,r6,65535 - 2cf70: 300cd43a srli r6,r6,16 - 2cf74: 29d3383a mul r9,r5,r7 - 2cf78: 288b383a mul r5,r5,r2 - 2cf7c: 31cf383a mul r7,r6,r7 - 2cf80: 4806d43a srli r3,r9,16 - 2cf84: 4111c83a sub r8,r8,r4 - 2cf88: 29cb883a add r5,r5,r7 - 2cf8c: 194b883a add r5,r3,r5 - 2cf90: 3085383a mul r2,r6,r2 - 2cf94: 29c0022e bgeu r5,r7,2cfa0 <__umoddi3+0x3d8> - 2cf98: 00c00074 movhi r3,1 - 2cf9c: 10c5883a add r2,r2,r3 - 2cfa0: 2808d43a srli r4,r5,16 - 2cfa4: 280a943a slli r5,r5,16 - 2cfa8: 4a7fffcc andi r9,r9,65535 - 2cfac: 2085883a add r2,r4,r2 - 2cfb0: 2a4b883a add r5,r5,r9 - 2cfb4: 40803636 bltu r8,r2,2d090 <__umoddi3+0x4c8> - 2cfb8: 40804d26 beq r8,r2,2d0f0 <__umoddi3+0x528> - 2cfbc: 4089c83a sub r4,r8,r2 - 2cfc0: 280f883a mov r7,r5 - 2cfc4: 81cfc83a sub r7,r16,r7 - 2cfc8: 81c7803a cmpltu r3,r16,r7 - 2cfcc: 20c7c83a sub r3,r4,r3 - 2cfd0: 1cc4983a sll r2,r3,r19 - 2cfd4: 3d0ed83a srl r7,r7,r20 - 2cfd8: 1d06d83a srl r3,r3,r20 - 2cfdc: 11c4b03a or r2,r2,r7 - 2cfe0: 003f9306 br 2ce30 <__umoddi3+0x268> - 2cfe4: 9ca6983a sll r19,r19,r18 - 2cfe8: 88e8d83a srl r20,r17,r3 - 2cfec: 80c4d83a srl r2,r16,r3 - 2cff0: 982cd43a srli r22,r19,16 - 2cff4: 8ca2983a sll r17,r17,r18 - 2cff8: a009883a mov r4,r20 - 2cffc: b00b883a mov r5,r22 - 2d000: 1478b03a or fp,r2,r17 - 2d004: 0022a840 call 22a84 <__umodsi3> - 2d008: a009883a mov r4,r20 - 2d00c: b00b883a mov r5,r22 - 2d010: 1023883a mov r17,r2 - 2d014: 0022a200 call 22a20 <__udivsi3> - 2d018: 9d7fffcc andi r21,r19,65535 - 2d01c: 880a943a slli r5,r17,16 - 2d020: e008d43a srli r4,fp,16 - 2d024: a885383a mul r2,r21,r2 - 2d028: 84a8983a sll r20,r16,r18 - 2d02c: 2148b03a or r4,r4,r5 - 2d030: 2080042e bgeu r4,r2,2d044 <__umoddi3+0x47c> - 2d034: 24c9883a add r4,r4,r19 - 2d038: 24c00236 bltu r4,r19,2d044 <__umoddi3+0x47c> - 2d03c: 2080012e bgeu r4,r2,2d044 <__umoddi3+0x47c> - 2d040: 24c9883a add r4,r4,r19 - 2d044: 20a3c83a sub r17,r4,r2 - 2d048: b00b883a mov r5,r22 - 2d04c: 8809883a mov r4,r17 - 2d050: 0022a840 call 22a84 <__umodsi3> - 2d054: 102f883a mov r23,r2 - 2d058: 8809883a mov r4,r17 - 2d05c: b00b883a mov r5,r22 - 2d060: 0022a200 call 22a20 <__udivsi3> - 2d064: b82e943a slli r23,r23,16 - 2d068: a885383a mul r2,r21,r2 - 2d06c: e13fffcc andi r4,fp,65535 - 2d070: 25c8b03a or r4,r4,r23 - 2d074: 2080042e bgeu r4,r2,2d088 <__umoddi3+0x4c0> - 2d078: 24c9883a add r4,r4,r19 - 2d07c: 24c00236 bltu r4,r19,2d088 <__umoddi3+0x4c0> - 2d080: 2080012e bgeu r4,r2,2d088 <__umoddi3+0x4c0> - 2d084: 24c9883a add r4,r4,r19 - 2d088: 20a3c83a sub r17,r4,r2 - 2d08c: 003f4806 br 2cdb0 <__umoddi3+0x1e8> - 2d090: 2c8fc83a sub r7,r5,r18 - 2d094: 1545c83a sub r2,r2,r21 - 2d098: 29cb803a cmpltu r5,r5,r7 - 2d09c: 1145c83a sub r2,r2,r5 - 2d0a0: 4089c83a sub r4,r8,r2 - 2d0a4: 003fc706 br 2cfc4 <__umoddi3+0x3fc> - 2d0a8: 01000604 movi r4,24 - 2d0ac: 003f1806 br 2cd10 <__umoddi3+0x148> - 2d0b0: 00800604 movi r2,24 - 2d0b4: 003f3206 br 2cd80 <__umoddi3+0x1b8> - 2d0b8: 01000604 movi r4,24 - 2d0bc: 003ed906 br 2cc24 <__umoddi3+0x5c> - 2d0c0: 413fa52e bgeu r8,r4,2cf58 <__umoddi3+0x390> - 2d0c4: 297fff84 addi r5,r5,-2 - 2d0c8: 4551883a add r8,r8,r21 - 2d0cc: 003fa306 br 2cf5c <__umoddi3+0x394> - 2d0d0: 15ff8b2e bgeu r2,r23,2cf00 <__umoddi3+0x338> - 2d0d4: 31bfff84 addi r6,r6,-2 - 2d0d8: 1545883a add r2,r2,r21 - 2d0dc: 003f8906 br 2cf04 <__umoddi3+0x33c> - 2d0e0: 24c9883a add r4,r4,r19 - 2d0e4: 003eee06 br 2cca0 <__umoddi3+0xd8> - 2d0e8: 8005883a mov r2,r16 - 2d0ec: 003f1706 br 2cd4c <__umoddi3+0x184> - 2d0f0: 817fe736 bltu r16,r5,2d090 <__umoddi3+0x4c8> - 2d0f4: 280f883a mov r7,r5 - 2d0f8: 0009883a mov r4,zero - 2d0fc: 003fb106 br 2cfc4 <__umoddi3+0x3fc> +0002c94c <__adddf3>: + 2c94c: 02c00434 movhi r11,16 + 2c950: 5affffc4 addi r11,r11,-1 + 2c954: 2806d7fa srli r3,r5,31 + 2c958: 2ad4703a and r10,r5,r11 + 2c95c: 3ad2703a and r9,r7,r11 + 2c960: 3804d53a srli r2,r7,20 + 2c964: 3018d77a srli r12,r6,29 + 2c968: 280ad53a srli r5,r5,20 + 2c96c: 501490fa slli r10,r10,3 + 2c970: 2010d77a srli r8,r4,29 + 2c974: 481290fa slli r9,r9,3 + 2c978: 380ed7fa srli r7,r7,31 + 2c97c: defffb04 addi sp,sp,-20 + 2c980: dc800215 stw r18,8(sp) + 2c984: dc400115 stw r17,4(sp) + 2c988: dc000015 stw r16,0(sp) + 2c98c: dfc00415 stw ra,16(sp) + 2c990: dcc00315 stw r19,12(sp) + 2c994: 1c803fcc andi r18,r3,255 + 2c998: 2c01ffcc andi r16,r5,2047 + 2c99c: 5210b03a or r8,r10,r8 + 2c9a0: 202290fa slli r17,r4,3 + 2c9a4: 1081ffcc andi r2,r2,2047 + 2c9a8: 4b12b03a or r9,r9,r12 + 2c9ac: 300c90fa slli r6,r6,3 + 2c9b0: 91c07526 beq r18,r7,2cb88 <__adddf3+0x23c> + 2c9b4: 8087c83a sub r3,r16,r2 + 2c9b8: 00c0ab0e bge zero,r3,2cc68 <__adddf3+0x31c> + 2c9bc: 10002a1e bne r2,zero,2ca68 <__adddf3+0x11c> + 2c9c0: 4984b03a or r2,r9,r6 + 2c9c4: 1000961e bne r2,zero,2cc20 <__adddf3+0x2d4> + 2c9c8: 888001cc andi r2,r17,7 + 2c9cc: 10000726 beq r2,zero,2c9ec <__adddf3+0xa0> + 2c9d0: 888003cc andi r2,r17,15 + 2c9d4: 00c00104 movi r3,4 + 2c9d8: 10c00426 beq r2,r3,2c9ec <__adddf3+0xa0> + 2c9dc: 88c7883a add r3,r17,r3 + 2c9e0: 1c63803a cmpltu r17,r3,r17 + 2c9e4: 4451883a add r8,r8,r17 + 2c9e8: 1823883a mov r17,r3 + 2c9ec: 4080202c andhi r2,r8,128 + 2c9f0: 10005926 beq r2,zero,2cb58 <__adddf3+0x20c> + 2c9f4: 84000044 addi r16,r16,1 + 2c9f8: 0081ffc4 movi r2,2047 + 2c9fc: 8080ba26 beq r16,r2,2cce8 <__adddf3+0x39c> + 2ca00: 00bfe034 movhi r2,65408 + 2ca04: 10bfffc4 addi r2,r2,-1 + 2ca08: 4090703a and r8,r8,r2 + 2ca0c: 4004977a slli r2,r8,29 + 2ca10: 4010927a slli r8,r8,9 + 2ca14: 8822d0fa srli r17,r17,3 + 2ca18: 8401ffcc andi r16,r16,2047 + 2ca1c: 4010d33a srli r8,r8,12 + 2ca20: 9007883a mov r3,r18 + 2ca24: 1444b03a or r2,r2,r17 + 2ca28: 8401ffcc andi r16,r16,2047 + 2ca2c: 8020953a slli r16,r16,20 + 2ca30: 18c03fcc andi r3,r3,255 + 2ca34: 01000434 movhi r4,16 + 2ca38: 213fffc4 addi r4,r4,-1 + 2ca3c: 180697fa slli r3,r3,31 + 2ca40: 4110703a and r8,r8,r4 + 2ca44: 4410b03a or r8,r8,r16 + 2ca48: 40c6b03a or r3,r8,r3 + 2ca4c: dfc00417 ldw ra,16(sp) + 2ca50: dcc00317 ldw r19,12(sp) + 2ca54: dc800217 ldw r18,8(sp) + 2ca58: dc400117 ldw r17,4(sp) + 2ca5c: dc000017 ldw r16,0(sp) + 2ca60: dec00504 addi sp,sp,20 + 2ca64: f800283a ret + 2ca68: 0081ffc4 movi r2,2047 + 2ca6c: 80bfd626 beq r16,r2,2c9c8 <_gp+0xffff0490> + 2ca70: 4a402034 orhi r9,r9,128 + 2ca74: 00800e04 movi r2,56 + 2ca78: 10c09f16 blt r2,r3,2ccf8 <__adddf3+0x3ac> + 2ca7c: 008007c4 movi r2,31 + 2ca80: 10c0c216 blt r2,r3,2cd8c <__adddf3+0x440> + 2ca84: 00800804 movi r2,32 + 2ca88: 10c5c83a sub r2,r2,r3 + 2ca8c: 488a983a sll r5,r9,r2 + 2ca90: 30c8d83a srl r4,r6,r3 + 2ca94: 3084983a sll r2,r6,r2 + 2ca98: 48c6d83a srl r3,r9,r3 + 2ca9c: 290cb03a or r6,r5,r4 + 2caa0: 1004c03a cmpne r2,r2,zero + 2caa4: 308cb03a or r6,r6,r2 + 2caa8: 898dc83a sub r6,r17,r6 + 2caac: 89a3803a cmpltu r17,r17,r6 + 2cab0: 40d1c83a sub r8,r8,r3 + 2cab4: 4451c83a sub r8,r8,r17 + 2cab8: 3023883a mov r17,r6 + 2cabc: 4080202c andhi r2,r8,128 + 2cac0: 10002326 beq r2,zero,2cb50 <__adddf3+0x204> + 2cac4: 04c02034 movhi r19,128 + 2cac8: 9cffffc4 addi r19,r19,-1 + 2cacc: 44e6703a and r19,r8,r19 + 2cad0: 98007626 beq r19,zero,2ccac <__adddf3+0x360> + 2cad4: 9809883a mov r4,r19 + 2cad8: 002ef500 call 2ef50 <__clzsi2> + 2cadc: 10fffe04 addi r3,r2,-8 + 2cae0: 010007c4 movi r4,31 + 2cae4: 20c07716 blt r4,r3,2ccc4 <__adddf3+0x378> + 2cae8: 00800804 movi r2,32 + 2caec: 10c5c83a sub r2,r2,r3 + 2caf0: 8884d83a srl r2,r17,r2 + 2caf4: 98d0983a sll r8,r19,r3 + 2caf8: 88e2983a sll r17,r17,r3 + 2cafc: 1204b03a or r2,r2,r8 + 2cb00: 1c007416 blt r3,r16,2ccd4 <__adddf3+0x388> + 2cb04: 1c21c83a sub r16,r3,r16 + 2cb08: 82000044 addi r8,r16,1 + 2cb0c: 00c007c4 movi r3,31 + 2cb10: 1a009116 blt r3,r8,2cd58 <__adddf3+0x40c> + 2cb14: 00c00804 movi r3,32 + 2cb18: 1a07c83a sub r3,r3,r8 + 2cb1c: 8a08d83a srl r4,r17,r8 + 2cb20: 88e2983a sll r17,r17,r3 + 2cb24: 10c6983a sll r3,r2,r3 + 2cb28: 1210d83a srl r8,r2,r8 + 2cb2c: 8804c03a cmpne r2,r17,zero + 2cb30: 1906b03a or r3,r3,r4 + 2cb34: 18a2b03a or r17,r3,r2 + 2cb38: 0021883a mov r16,zero + 2cb3c: 003fa206 br 2c9c8 <_gp+0xffff0490> + 2cb40: 1890b03a or r8,r3,r2 + 2cb44: 40017d26 beq r8,zero,2d13c <__adddf3+0x7f0> + 2cb48: 1011883a mov r8,r2 + 2cb4c: 1823883a mov r17,r3 + 2cb50: 888001cc andi r2,r17,7 + 2cb54: 103f9e1e bne r2,zero,2c9d0 <_gp+0xffff0498> + 2cb58: 4004977a slli r2,r8,29 + 2cb5c: 8822d0fa srli r17,r17,3 + 2cb60: 4010d0fa srli r8,r8,3 + 2cb64: 9007883a mov r3,r18 + 2cb68: 1444b03a or r2,r2,r17 + 2cb6c: 0101ffc4 movi r4,2047 + 2cb70: 81002426 beq r16,r4,2cc04 <__adddf3+0x2b8> + 2cb74: 8120703a and r16,r16,r4 + 2cb78: 01000434 movhi r4,16 + 2cb7c: 213fffc4 addi r4,r4,-1 + 2cb80: 4110703a and r8,r8,r4 + 2cb84: 003fa806 br 2ca28 <_gp+0xffff04f0> + 2cb88: 8089c83a sub r4,r16,r2 + 2cb8c: 01005e0e bge zero,r4,2cd08 <__adddf3+0x3bc> + 2cb90: 10002b26 beq r2,zero,2cc40 <__adddf3+0x2f4> + 2cb94: 0081ffc4 movi r2,2047 + 2cb98: 80bf8b26 beq r16,r2,2c9c8 <_gp+0xffff0490> + 2cb9c: 4a402034 orhi r9,r9,128 + 2cba0: 00800e04 movi r2,56 + 2cba4: 1100a40e bge r2,r4,2ce38 <__adddf3+0x4ec> + 2cba8: 498cb03a or r6,r9,r6 + 2cbac: 300ac03a cmpne r5,r6,zero + 2cbb0: 0013883a mov r9,zero + 2cbb4: 2c4b883a add r5,r5,r17 + 2cbb8: 2c63803a cmpltu r17,r5,r17 + 2cbbc: 4a11883a add r8,r9,r8 + 2cbc0: 8a11883a add r8,r17,r8 + 2cbc4: 2823883a mov r17,r5 + 2cbc8: 4080202c andhi r2,r8,128 + 2cbcc: 103fe026 beq r2,zero,2cb50 <_gp+0xffff0618> + 2cbd0: 84000044 addi r16,r16,1 + 2cbd4: 0081ffc4 movi r2,2047 + 2cbd8: 8080d226 beq r16,r2,2cf24 <__adddf3+0x5d8> + 2cbdc: 00bfe034 movhi r2,65408 + 2cbe0: 10bfffc4 addi r2,r2,-1 + 2cbe4: 4090703a and r8,r8,r2 + 2cbe8: 880ad07a srli r5,r17,1 + 2cbec: 400897fa slli r4,r8,31 + 2cbf0: 88c0004c andi r3,r17,1 + 2cbf4: 28e2b03a or r17,r5,r3 + 2cbf8: 4010d07a srli r8,r8,1 + 2cbfc: 2462b03a or r17,r4,r17 + 2cc00: 003f7106 br 2c9c8 <_gp+0xffff0490> + 2cc04: 4088b03a or r4,r8,r2 + 2cc08: 20014526 beq r4,zero,2d120 <__adddf3+0x7d4> + 2cc0c: 01000434 movhi r4,16 + 2cc10: 42000234 orhi r8,r8,8 + 2cc14: 213fffc4 addi r4,r4,-1 + 2cc18: 4110703a and r8,r8,r4 + 2cc1c: 003f8206 br 2ca28 <_gp+0xffff04f0> + 2cc20: 18ffffc4 addi r3,r3,-1 + 2cc24: 1800491e bne r3,zero,2cd4c <__adddf3+0x400> + 2cc28: 898bc83a sub r5,r17,r6 + 2cc2c: 8963803a cmpltu r17,r17,r5 + 2cc30: 4251c83a sub r8,r8,r9 + 2cc34: 4451c83a sub r8,r8,r17 + 2cc38: 2823883a mov r17,r5 + 2cc3c: 003f9f06 br 2cabc <_gp+0xffff0584> + 2cc40: 4984b03a or r2,r9,r6 + 2cc44: 103f6026 beq r2,zero,2c9c8 <_gp+0xffff0490> + 2cc48: 213fffc4 addi r4,r4,-1 + 2cc4c: 2000931e bne r4,zero,2ce9c <__adddf3+0x550> + 2cc50: 898d883a add r6,r17,r6 + 2cc54: 3463803a cmpltu r17,r6,r17 + 2cc58: 4251883a add r8,r8,r9 + 2cc5c: 8a11883a add r8,r17,r8 + 2cc60: 3023883a mov r17,r6 + 2cc64: 003fd806 br 2cbc8 <_gp+0xffff0690> + 2cc68: 1800541e bne r3,zero,2cdbc <__adddf3+0x470> + 2cc6c: 80800044 addi r2,r16,1 + 2cc70: 1081ffcc andi r2,r2,2047 + 2cc74: 00c00044 movi r3,1 + 2cc78: 1880a00e bge r3,r2,2cefc <__adddf3+0x5b0> + 2cc7c: 8989c83a sub r4,r17,r6 + 2cc80: 8905803a cmpltu r2,r17,r4 + 2cc84: 4267c83a sub r19,r8,r9 + 2cc88: 98a7c83a sub r19,r19,r2 + 2cc8c: 9880202c andhi r2,r19,128 + 2cc90: 10006326 beq r2,zero,2ce20 <__adddf3+0x4d4> + 2cc94: 3463c83a sub r17,r6,r17 + 2cc98: 4a07c83a sub r3,r9,r8 + 2cc9c: 344d803a cmpltu r6,r6,r17 + 2cca0: 19a7c83a sub r19,r3,r6 + 2cca4: 3825883a mov r18,r7 + 2cca8: 983f8a1e bne r19,zero,2cad4 <_gp+0xffff059c> + 2ccac: 8809883a mov r4,r17 + 2ccb0: 002ef500 call 2ef50 <__clzsi2> + 2ccb4: 10800804 addi r2,r2,32 + 2ccb8: 10fffe04 addi r3,r2,-8 + 2ccbc: 010007c4 movi r4,31 + 2ccc0: 20ff890e bge r4,r3,2cae8 <_gp+0xffff05b0> + 2ccc4: 10bff604 addi r2,r2,-40 + 2ccc8: 8884983a sll r2,r17,r2 + 2cccc: 0023883a mov r17,zero + 2ccd0: 1c3f8c0e bge r3,r16,2cb04 <_gp+0xffff05cc> + 2ccd4: 023fe034 movhi r8,65408 + 2ccd8: 423fffc4 addi r8,r8,-1 + 2ccdc: 80e1c83a sub r16,r16,r3 + 2cce0: 1210703a and r8,r2,r8 + 2cce4: 003f3806 br 2c9c8 <_gp+0xffff0490> + 2cce8: 9007883a mov r3,r18 + 2ccec: 0011883a mov r8,zero + 2ccf0: 0005883a mov r2,zero + 2ccf4: 003f4c06 br 2ca28 <_gp+0xffff04f0> + 2ccf8: 498cb03a or r6,r9,r6 + 2ccfc: 300cc03a cmpne r6,r6,zero + 2cd00: 0007883a mov r3,zero + 2cd04: 003f6806 br 2caa8 <_gp+0xffff0570> + 2cd08: 20009c1e bne r4,zero,2cf7c <__adddf3+0x630> + 2cd0c: 80800044 addi r2,r16,1 + 2cd10: 1141ffcc andi r5,r2,2047 + 2cd14: 01000044 movi r4,1 + 2cd18: 2140670e bge r4,r5,2ceb8 <__adddf3+0x56c> + 2cd1c: 0101ffc4 movi r4,2047 + 2cd20: 11007f26 beq r2,r4,2cf20 <__adddf3+0x5d4> + 2cd24: 898d883a add r6,r17,r6 + 2cd28: 4247883a add r3,r8,r9 + 2cd2c: 3451803a cmpltu r8,r6,r17 + 2cd30: 40d1883a add r8,r8,r3 + 2cd34: 402297fa slli r17,r8,31 + 2cd38: 300cd07a srli r6,r6,1 + 2cd3c: 4010d07a srli r8,r8,1 + 2cd40: 1021883a mov r16,r2 + 2cd44: 89a2b03a or r17,r17,r6 + 2cd48: 003f1f06 br 2c9c8 <_gp+0xffff0490> + 2cd4c: 0081ffc4 movi r2,2047 + 2cd50: 80bf481e bne r16,r2,2ca74 <_gp+0xffff053c> + 2cd54: 003f1c06 br 2c9c8 <_gp+0xffff0490> + 2cd58: 843ff844 addi r16,r16,-31 + 2cd5c: 01000804 movi r4,32 + 2cd60: 1406d83a srl r3,r2,r16 + 2cd64: 41005026 beq r8,r4,2cea8 <__adddf3+0x55c> + 2cd68: 01001004 movi r4,64 + 2cd6c: 2211c83a sub r8,r4,r8 + 2cd70: 1204983a sll r2,r2,r8 + 2cd74: 88a2b03a or r17,r17,r2 + 2cd78: 8822c03a cmpne r17,r17,zero + 2cd7c: 1c62b03a or r17,r3,r17 + 2cd80: 0011883a mov r8,zero + 2cd84: 0021883a mov r16,zero + 2cd88: 003f7106 br 2cb50 <_gp+0xffff0618> + 2cd8c: 193ff804 addi r4,r3,-32 + 2cd90: 00800804 movi r2,32 + 2cd94: 4908d83a srl r4,r9,r4 + 2cd98: 18804526 beq r3,r2,2ceb0 <__adddf3+0x564> + 2cd9c: 00801004 movi r2,64 + 2cda0: 10c5c83a sub r2,r2,r3 + 2cda4: 4886983a sll r3,r9,r2 + 2cda8: 198cb03a or r6,r3,r6 + 2cdac: 300cc03a cmpne r6,r6,zero + 2cdb0: 218cb03a or r6,r4,r6 + 2cdb4: 0007883a mov r3,zero + 2cdb8: 003f3b06 br 2caa8 <_gp+0xffff0570> + 2cdbc: 80002a26 beq r16,zero,2ce68 <__adddf3+0x51c> + 2cdc0: 0101ffc4 movi r4,2047 + 2cdc4: 11006826 beq r2,r4,2cf68 <__adddf3+0x61c> + 2cdc8: 00c7c83a sub r3,zero,r3 + 2cdcc: 42002034 orhi r8,r8,128 + 2cdd0: 01000e04 movi r4,56 + 2cdd4: 20c07c16 blt r4,r3,2cfc8 <__adddf3+0x67c> + 2cdd8: 010007c4 movi r4,31 + 2cddc: 20c0da16 blt r4,r3,2d148 <__adddf3+0x7fc> + 2cde0: 01000804 movi r4,32 + 2cde4: 20c9c83a sub r4,r4,r3 + 2cde8: 4114983a sll r10,r8,r4 + 2cdec: 88cad83a srl r5,r17,r3 + 2cdf0: 8908983a sll r4,r17,r4 + 2cdf4: 40c6d83a srl r3,r8,r3 + 2cdf8: 5162b03a or r17,r10,r5 + 2cdfc: 2008c03a cmpne r4,r4,zero + 2ce00: 8922b03a or r17,r17,r4 + 2ce04: 3463c83a sub r17,r6,r17 + 2ce08: 48c7c83a sub r3,r9,r3 + 2ce0c: 344d803a cmpltu r6,r6,r17 + 2ce10: 1991c83a sub r8,r3,r6 + 2ce14: 1021883a mov r16,r2 + 2ce18: 3825883a mov r18,r7 + 2ce1c: 003f2706 br 2cabc <_gp+0xffff0584> + 2ce20: 24d0b03a or r8,r4,r19 + 2ce24: 40001b1e bne r8,zero,2ce94 <__adddf3+0x548> + 2ce28: 0005883a mov r2,zero + 2ce2c: 0007883a mov r3,zero + 2ce30: 0021883a mov r16,zero + 2ce34: 003f4d06 br 2cb6c <_gp+0xffff0634> + 2ce38: 008007c4 movi r2,31 + 2ce3c: 11003c16 blt r2,r4,2cf30 <__adddf3+0x5e4> + 2ce40: 00800804 movi r2,32 + 2ce44: 1105c83a sub r2,r2,r4 + 2ce48: 488e983a sll r7,r9,r2 + 2ce4c: 310ad83a srl r5,r6,r4 + 2ce50: 3084983a sll r2,r6,r2 + 2ce54: 4912d83a srl r9,r9,r4 + 2ce58: 394ab03a or r5,r7,r5 + 2ce5c: 1004c03a cmpne r2,r2,zero + 2ce60: 288ab03a or r5,r5,r2 + 2ce64: 003f5306 br 2cbb4 <_gp+0xffff067c> + 2ce68: 4448b03a or r4,r8,r17 + 2ce6c: 20003e26 beq r4,zero,2cf68 <__adddf3+0x61c> + 2ce70: 00c6303a nor r3,zero,r3 + 2ce74: 18003a1e bne r3,zero,2cf60 <__adddf3+0x614> + 2ce78: 3463c83a sub r17,r6,r17 + 2ce7c: 4a07c83a sub r3,r9,r8 + 2ce80: 344d803a cmpltu r6,r6,r17 + 2ce84: 1991c83a sub r8,r3,r6 + 2ce88: 1021883a mov r16,r2 + 2ce8c: 3825883a mov r18,r7 + 2ce90: 003f0a06 br 2cabc <_gp+0xffff0584> + 2ce94: 2023883a mov r17,r4 + 2ce98: 003f0d06 br 2cad0 <_gp+0xffff0598> + 2ce9c: 0081ffc4 movi r2,2047 + 2cea0: 80bf3f1e bne r16,r2,2cba0 <_gp+0xffff0668> + 2cea4: 003ec806 br 2c9c8 <_gp+0xffff0490> + 2cea8: 0005883a mov r2,zero + 2ceac: 003fb106 br 2cd74 <_gp+0xffff083c> + 2ceb0: 0007883a mov r3,zero + 2ceb4: 003fbc06 br 2cda8 <_gp+0xffff0870> + 2ceb8: 4444b03a or r2,r8,r17 + 2cebc: 8000871e bne r16,zero,2d0dc <__adddf3+0x790> + 2cec0: 1000ba26 beq r2,zero,2d1ac <__adddf3+0x860> + 2cec4: 4984b03a or r2,r9,r6 + 2cec8: 103ebf26 beq r2,zero,2c9c8 <_gp+0xffff0490> + 2cecc: 8985883a add r2,r17,r6 + 2ced0: 4247883a add r3,r8,r9 + 2ced4: 1451803a cmpltu r8,r2,r17 + 2ced8: 40d1883a add r8,r8,r3 + 2cedc: 40c0202c andhi r3,r8,128 + 2cee0: 1023883a mov r17,r2 + 2cee4: 183f1a26 beq r3,zero,2cb50 <_gp+0xffff0618> + 2cee8: 00bfe034 movhi r2,65408 + 2ceec: 10bfffc4 addi r2,r2,-1 + 2cef0: 2021883a mov r16,r4 + 2cef4: 4090703a and r8,r8,r2 + 2cef8: 003eb306 br 2c9c8 <_gp+0xffff0490> + 2cefc: 4444b03a or r2,r8,r17 + 2cf00: 8000291e bne r16,zero,2cfa8 <__adddf3+0x65c> + 2cf04: 10004b1e bne r2,zero,2d034 <__adddf3+0x6e8> + 2cf08: 4990b03a or r8,r9,r6 + 2cf0c: 40008b26 beq r8,zero,2d13c <__adddf3+0x7f0> + 2cf10: 4811883a mov r8,r9 + 2cf14: 3023883a mov r17,r6 + 2cf18: 3825883a mov r18,r7 + 2cf1c: 003eaa06 br 2c9c8 <_gp+0xffff0490> + 2cf20: 1021883a mov r16,r2 + 2cf24: 0011883a mov r8,zero + 2cf28: 0005883a mov r2,zero + 2cf2c: 003f0f06 br 2cb6c <_gp+0xffff0634> + 2cf30: 217ff804 addi r5,r4,-32 + 2cf34: 00800804 movi r2,32 + 2cf38: 494ad83a srl r5,r9,r5 + 2cf3c: 20807d26 beq r4,r2,2d134 <__adddf3+0x7e8> + 2cf40: 00801004 movi r2,64 + 2cf44: 1109c83a sub r4,r2,r4 + 2cf48: 4912983a sll r9,r9,r4 + 2cf4c: 498cb03a or r6,r9,r6 + 2cf50: 300cc03a cmpne r6,r6,zero + 2cf54: 298ab03a or r5,r5,r6 + 2cf58: 0013883a mov r9,zero + 2cf5c: 003f1506 br 2cbb4 <_gp+0xffff067c> + 2cf60: 0101ffc4 movi r4,2047 + 2cf64: 113f9a1e bne r2,r4,2cdd0 <_gp+0xffff0898> + 2cf68: 4811883a mov r8,r9 + 2cf6c: 3023883a mov r17,r6 + 2cf70: 1021883a mov r16,r2 + 2cf74: 3825883a mov r18,r7 + 2cf78: 003e9306 br 2c9c8 <_gp+0xffff0490> + 2cf7c: 8000161e bne r16,zero,2cfd8 <__adddf3+0x68c> + 2cf80: 444ab03a or r5,r8,r17 + 2cf84: 28005126 beq r5,zero,2d0cc <__adddf3+0x780> + 2cf88: 0108303a nor r4,zero,r4 + 2cf8c: 20004d1e bne r4,zero,2d0c4 <__adddf3+0x778> + 2cf90: 89a3883a add r17,r17,r6 + 2cf94: 4253883a add r9,r8,r9 + 2cf98: 898d803a cmpltu r6,r17,r6 + 2cf9c: 3251883a add r8,r6,r9 + 2cfa0: 1021883a mov r16,r2 + 2cfa4: 003f0806 br 2cbc8 <_gp+0xffff0690> + 2cfa8: 1000301e bne r2,zero,2d06c <__adddf3+0x720> + 2cfac: 4984b03a or r2,r9,r6 + 2cfb0: 10007126 beq r2,zero,2d178 <__adddf3+0x82c> + 2cfb4: 4811883a mov r8,r9 + 2cfb8: 3023883a mov r17,r6 + 2cfbc: 3825883a mov r18,r7 + 2cfc0: 0401ffc4 movi r16,2047 + 2cfc4: 003e8006 br 2c9c8 <_gp+0xffff0490> + 2cfc8: 4462b03a or r17,r8,r17 + 2cfcc: 8822c03a cmpne r17,r17,zero + 2cfd0: 0007883a mov r3,zero + 2cfd4: 003f8b06 br 2ce04 <_gp+0xffff08cc> + 2cfd8: 0141ffc4 movi r5,2047 + 2cfdc: 11403b26 beq r2,r5,2d0cc <__adddf3+0x780> + 2cfe0: 0109c83a sub r4,zero,r4 + 2cfe4: 42002034 orhi r8,r8,128 + 2cfe8: 01400e04 movi r5,56 + 2cfec: 29006716 blt r5,r4,2d18c <__adddf3+0x840> + 2cff0: 014007c4 movi r5,31 + 2cff4: 29007016 blt r5,r4,2d1b8 <__adddf3+0x86c> + 2cff8: 01400804 movi r5,32 + 2cffc: 290bc83a sub r5,r5,r4 + 2d000: 4154983a sll r10,r8,r5 + 2d004: 890ed83a srl r7,r17,r4 + 2d008: 894a983a sll r5,r17,r5 + 2d00c: 4108d83a srl r4,r8,r4 + 2d010: 51e2b03a or r17,r10,r7 + 2d014: 280ac03a cmpne r5,r5,zero + 2d018: 8962b03a or r17,r17,r5 + 2d01c: 89a3883a add r17,r17,r6 + 2d020: 2253883a add r9,r4,r9 + 2d024: 898d803a cmpltu r6,r17,r6 + 2d028: 3251883a add r8,r6,r9 + 2d02c: 1021883a mov r16,r2 + 2d030: 003ee506 br 2cbc8 <_gp+0xffff0690> + 2d034: 4984b03a or r2,r9,r6 + 2d038: 103e6326 beq r2,zero,2c9c8 <_gp+0xffff0490> + 2d03c: 8987c83a sub r3,r17,r6 + 2d040: 88c9803a cmpltu r4,r17,r3 + 2d044: 4245c83a sub r2,r8,r9 + 2d048: 1105c83a sub r2,r2,r4 + 2d04c: 1100202c andhi r4,r2,128 + 2d050: 203ebb26 beq r4,zero,2cb40 <_gp+0xffff0608> + 2d054: 3463c83a sub r17,r6,r17 + 2d058: 4a07c83a sub r3,r9,r8 + 2d05c: 344d803a cmpltu r6,r6,r17 + 2d060: 1991c83a sub r8,r3,r6 + 2d064: 3825883a mov r18,r7 + 2d068: 003e5706 br 2c9c8 <_gp+0xffff0490> + 2d06c: 4984b03a or r2,r9,r6 + 2d070: 10002e26 beq r2,zero,2d12c <__adddf3+0x7e0> + 2d074: 4004d0fa srli r2,r8,3 + 2d078: 8822d0fa srli r17,r17,3 + 2d07c: 4010977a slli r8,r8,29 + 2d080: 10c0022c andhi r3,r2,8 + 2d084: 4462b03a or r17,r8,r17 + 2d088: 18000826 beq r3,zero,2d0ac <__adddf3+0x760> + 2d08c: 4808d0fa srli r4,r9,3 + 2d090: 20c0022c andhi r3,r4,8 + 2d094: 1800051e bne r3,zero,2d0ac <__adddf3+0x760> + 2d098: 300cd0fa srli r6,r6,3 + 2d09c: 4806977a slli r3,r9,29 + 2d0a0: 2005883a mov r2,r4 + 2d0a4: 3825883a mov r18,r7 + 2d0a8: 19a2b03a or r17,r3,r6 + 2d0ac: 8810d77a srli r8,r17,29 + 2d0b0: 100490fa slli r2,r2,3 + 2d0b4: 882290fa slli r17,r17,3 + 2d0b8: 0401ffc4 movi r16,2047 + 2d0bc: 4090b03a or r8,r8,r2 + 2d0c0: 003e4106 br 2c9c8 <_gp+0xffff0490> + 2d0c4: 0141ffc4 movi r5,2047 + 2d0c8: 117fc71e bne r2,r5,2cfe8 <_gp+0xffff0ab0> + 2d0cc: 4811883a mov r8,r9 + 2d0d0: 3023883a mov r17,r6 + 2d0d4: 1021883a mov r16,r2 + 2d0d8: 003e3b06 br 2c9c8 <_gp+0xffff0490> + 2d0dc: 10002f26 beq r2,zero,2d19c <__adddf3+0x850> + 2d0e0: 4984b03a or r2,r9,r6 + 2d0e4: 10001126 beq r2,zero,2d12c <__adddf3+0x7e0> + 2d0e8: 4004d0fa srli r2,r8,3 + 2d0ec: 8822d0fa srli r17,r17,3 + 2d0f0: 4010977a slli r8,r8,29 + 2d0f4: 10c0022c andhi r3,r2,8 + 2d0f8: 4462b03a or r17,r8,r17 + 2d0fc: 183feb26 beq r3,zero,2d0ac <_gp+0xffff0b74> + 2d100: 4808d0fa srli r4,r9,3 + 2d104: 20c0022c andhi r3,r4,8 + 2d108: 183fe81e bne r3,zero,2d0ac <_gp+0xffff0b74> + 2d10c: 300cd0fa srli r6,r6,3 + 2d110: 4806977a slli r3,r9,29 + 2d114: 2005883a mov r2,r4 + 2d118: 19a2b03a or r17,r3,r6 + 2d11c: 003fe306 br 2d0ac <_gp+0xffff0b74> + 2d120: 0011883a mov r8,zero + 2d124: 0005883a mov r2,zero + 2d128: 003e3f06 br 2ca28 <_gp+0xffff04f0> + 2d12c: 0401ffc4 movi r16,2047 + 2d130: 003e2506 br 2c9c8 <_gp+0xffff0490> + 2d134: 0013883a mov r9,zero + 2d138: 003f8406 br 2cf4c <_gp+0xffff0a14> + 2d13c: 0005883a mov r2,zero + 2d140: 0007883a mov r3,zero + 2d144: 003e8906 br 2cb6c <_gp+0xffff0634> + 2d148: 197ff804 addi r5,r3,-32 + 2d14c: 01000804 movi r4,32 + 2d150: 414ad83a srl r5,r8,r5 + 2d154: 19002426 beq r3,r4,2d1e8 <__adddf3+0x89c> + 2d158: 01001004 movi r4,64 + 2d15c: 20c7c83a sub r3,r4,r3 + 2d160: 40c6983a sll r3,r8,r3 + 2d164: 1c46b03a or r3,r3,r17 + 2d168: 1806c03a cmpne r3,r3,zero + 2d16c: 28e2b03a or r17,r5,r3 + 2d170: 0007883a mov r3,zero + 2d174: 003f2306 br 2ce04 <_gp+0xffff08cc> + 2d178: 0007883a mov r3,zero + 2d17c: 5811883a mov r8,r11 + 2d180: 00bfffc4 movi r2,-1 + 2d184: 0401ffc4 movi r16,2047 + 2d188: 003e7806 br 2cb6c <_gp+0xffff0634> + 2d18c: 4462b03a or r17,r8,r17 + 2d190: 8822c03a cmpne r17,r17,zero + 2d194: 0009883a mov r4,zero + 2d198: 003fa006 br 2d01c <_gp+0xffff0ae4> + 2d19c: 4811883a mov r8,r9 + 2d1a0: 3023883a mov r17,r6 + 2d1a4: 0401ffc4 movi r16,2047 + 2d1a8: 003e0706 br 2c9c8 <_gp+0xffff0490> + 2d1ac: 4811883a mov r8,r9 + 2d1b0: 3023883a mov r17,r6 + 2d1b4: 003e0406 br 2c9c8 <_gp+0xffff0490> + 2d1b8: 21fff804 addi r7,r4,-32 + 2d1bc: 01400804 movi r5,32 + 2d1c0: 41ced83a srl r7,r8,r7 + 2d1c4: 21400a26 beq r4,r5,2d1f0 <__adddf3+0x8a4> + 2d1c8: 01401004 movi r5,64 + 2d1cc: 2909c83a sub r4,r5,r4 + 2d1d0: 4108983a sll r4,r8,r4 + 2d1d4: 2448b03a or r4,r4,r17 + 2d1d8: 2008c03a cmpne r4,r4,zero + 2d1dc: 3922b03a or r17,r7,r4 + 2d1e0: 0009883a mov r4,zero + 2d1e4: 003f8d06 br 2d01c <_gp+0xffff0ae4> + 2d1e8: 0007883a mov r3,zero + 2d1ec: 003fdd06 br 2d164 <_gp+0xffff0c2c> + 2d1f0: 0009883a mov r4,zero + 2d1f4: 003ff706 br 2d1d4 <_gp+0xffff0c9c> -0002d100 <__adddf3>: - 2d100: 02c00434 movhi r11,16 - 2d104: 5affffc4 addi r11,r11,-1 - 2d108: 2806d7fa srli r3,r5,31 - 2d10c: 2ad4703a and r10,r5,r11 - 2d110: 3ad2703a and r9,r7,r11 - 2d114: 3804d53a srli r2,r7,20 - 2d118: 3018d77a srli r12,r6,29 - 2d11c: 280ad53a srli r5,r5,20 - 2d120: 501490fa slli r10,r10,3 - 2d124: 2010d77a srli r8,r4,29 - 2d128: 481290fa slli r9,r9,3 - 2d12c: 380ed7fa srli r7,r7,31 - 2d130: defffb04 addi sp,sp,-20 - 2d134: dc800215 stw r18,8(sp) - 2d138: dc400115 stw r17,4(sp) - 2d13c: dc000015 stw r16,0(sp) - 2d140: dfc00415 stw ra,16(sp) - 2d144: dcc00315 stw r19,12(sp) - 2d148: 1c803fcc andi r18,r3,255 - 2d14c: 2c01ffcc andi r16,r5,2047 - 2d150: 5210b03a or r8,r10,r8 - 2d154: 202290fa slli r17,r4,3 - 2d158: 1081ffcc andi r2,r2,2047 - 2d15c: 4b12b03a or r9,r9,r12 - 2d160: 300c90fa slli r6,r6,3 - 2d164: 91c07526 beq r18,r7,2d33c <__adddf3+0x23c> - 2d168: 8087c83a sub r3,r16,r2 - 2d16c: 00c0ab0e bge zero,r3,2d41c <__adddf3+0x31c> - 2d170: 10002a1e bne r2,zero,2d21c <__adddf3+0x11c> - 2d174: 4984b03a or r2,r9,r6 - 2d178: 1000961e bne r2,zero,2d3d4 <__adddf3+0x2d4> - 2d17c: 888001cc andi r2,r17,7 - 2d180: 10000726 beq r2,zero,2d1a0 <__adddf3+0xa0> - 2d184: 888003cc andi r2,r17,15 - 2d188: 00c00104 movi r3,4 - 2d18c: 10c00426 beq r2,r3,2d1a0 <__adddf3+0xa0> - 2d190: 88c7883a add r3,r17,r3 - 2d194: 1c63803a cmpltu r17,r3,r17 - 2d198: 4451883a add r8,r8,r17 - 2d19c: 1823883a mov r17,r3 - 2d1a0: 4080202c andhi r2,r8,128 - 2d1a4: 10005926 beq r2,zero,2d30c <__adddf3+0x20c> - 2d1a8: 84000044 addi r16,r16,1 - 2d1ac: 0081ffc4 movi r2,2047 - 2d1b0: 8080ba26 beq r16,r2,2d49c <__adddf3+0x39c> - 2d1b4: 00bfe034 movhi r2,65408 - 2d1b8: 10bfffc4 addi r2,r2,-1 - 2d1bc: 4090703a and r8,r8,r2 - 2d1c0: 4004977a slli r2,r8,29 - 2d1c4: 4010927a slli r8,r8,9 - 2d1c8: 8822d0fa srli r17,r17,3 - 2d1cc: 8401ffcc andi r16,r16,2047 - 2d1d0: 4010d33a srli r8,r8,12 - 2d1d4: 9007883a mov r3,r18 - 2d1d8: 1444b03a or r2,r2,r17 - 2d1dc: 8401ffcc andi r16,r16,2047 - 2d1e0: 8020953a slli r16,r16,20 - 2d1e4: 18c03fcc andi r3,r3,255 - 2d1e8: 01000434 movhi r4,16 - 2d1ec: 213fffc4 addi r4,r4,-1 - 2d1f0: 180697fa slli r3,r3,31 - 2d1f4: 4110703a and r8,r8,r4 - 2d1f8: 4410b03a or r8,r8,r16 - 2d1fc: 40c6b03a or r3,r8,r3 - 2d200: dfc00417 ldw ra,16(sp) - 2d204: dcc00317 ldw r19,12(sp) - 2d208: dc800217 ldw r18,8(sp) - 2d20c: dc400117 ldw r17,4(sp) - 2d210: dc000017 ldw r16,0(sp) - 2d214: dec00504 addi sp,sp,20 - 2d218: f800283a ret - 2d21c: 0081ffc4 movi r2,2047 - 2d220: 80bfd626 beq r16,r2,2d17c <__adddf3+0x7c> - 2d224: 4a402034 orhi r9,r9,128 - 2d228: 00800e04 movi r2,56 - 2d22c: 10c09f16 blt r2,r3,2d4ac <__adddf3+0x3ac> - 2d230: 008007c4 movi r2,31 - 2d234: 10c0c216 blt r2,r3,2d540 <__adddf3+0x440> - 2d238: 00800804 movi r2,32 - 2d23c: 10c5c83a sub r2,r2,r3 - 2d240: 488a983a sll r5,r9,r2 - 2d244: 30c8d83a srl r4,r6,r3 - 2d248: 3084983a sll r2,r6,r2 - 2d24c: 48c6d83a srl r3,r9,r3 - 2d250: 290cb03a or r6,r5,r4 - 2d254: 1004c03a cmpne r2,r2,zero - 2d258: 308cb03a or r6,r6,r2 - 2d25c: 898dc83a sub r6,r17,r6 - 2d260: 89a3803a cmpltu r17,r17,r6 - 2d264: 40d1c83a sub r8,r8,r3 - 2d268: 4451c83a sub r8,r8,r17 - 2d26c: 3023883a mov r17,r6 - 2d270: 4080202c andhi r2,r8,128 - 2d274: 10002326 beq r2,zero,2d304 <__adddf3+0x204> - 2d278: 04c02034 movhi r19,128 - 2d27c: 9cffffc4 addi r19,r19,-1 - 2d280: 44e6703a and r19,r8,r19 - 2d284: 98007626 beq r19,zero,2d460 <__adddf3+0x360> - 2d288: 9809883a mov r4,r19 - 2d28c: 002f7040 call 2f704 <__clzsi2> - 2d290: 10fffe04 addi r3,r2,-8 - 2d294: 010007c4 movi r4,31 - 2d298: 20c07716 blt r4,r3,2d478 <__adddf3+0x378> - 2d29c: 00800804 movi r2,32 - 2d2a0: 10c5c83a sub r2,r2,r3 - 2d2a4: 8884d83a srl r2,r17,r2 - 2d2a8: 98d0983a sll r8,r19,r3 - 2d2ac: 88e2983a sll r17,r17,r3 - 2d2b0: 1204b03a or r2,r2,r8 - 2d2b4: 1c007416 blt r3,r16,2d488 <__adddf3+0x388> - 2d2b8: 1c21c83a sub r16,r3,r16 - 2d2bc: 82000044 addi r8,r16,1 - 2d2c0: 00c007c4 movi r3,31 - 2d2c4: 1a009116 blt r3,r8,2d50c <__adddf3+0x40c> - 2d2c8: 00c00804 movi r3,32 - 2d2cc: 1a07c83a sub r3,r3,r8 - 2d2d0: 8a08d83a srl r4,r17,r8 - 2d2d4: 88e2983a sll r17,r17,r3 - 2d2d8: 10c6983a sll r3,r2,r3 - 2d2dc: 1210d83a srl r8,r2,r8 - 2d2e0: 8804c03a cmpne r2,r17,zero - 2d2e4: 1906b03a or r3,r3,r4 - 2d2e8: 18a2b03a or r17,r3,r2 - 2d2ec: 0021883a mov r16,zero - 2d2f0: 003fa206 br 2d17c <__adddf3+0x7c> - 2d2f4: 1890b03a or r8,r3,r2 - 2d2f8: 40017d26 beq r8,zero,2d8f0 <__adddf3+0x7f0> - 2d2fc: 1011883a mov r8,r2 - 2d300: 1823883a mov r17,r3 - 2d304: 888001cc andi r2,r17,7 - 2d308: 103f9e1e bne r2,zero,2d184 <__adddf3+0x84> - 2d30c: 4004977a slli r2,r8,29 - 2d310: 8822d0fa srli r17,r17,3 - 2d314: 4010d0fa srli r8,r8,3 - 2d318: 9007883a mov r3,r18 - 2d31c: 1444b03a or r2,r2,r17 - 2d320: 0101ffc4 movi r4,2047 - 2d324: 81002426 beq r16,r4,2d3b8 <__adddf3+0x2b8> - 2d328: 8120703a and r16,r16,r4 - 2d32c: 01000434 movhi r4,16 - 2d330: 213fffc4 addi r4,r4,-1 - 2d334: 4110703a and r8,r8,r4 - 2d338: 003fa806 br 2d1dc <__adddf3+0xdc> - 2d33c: 8089c83a sub r4,r16,r2 - 2d340: 01005e0e bge zero,r4,2d4bc <__adddf3+0x3bc> - 2d344: 10002b26 beq r2,zero,2d3f4 <__adddf3+0x2f4> - 2d348: 0081ffc4 movi r2,2047 - 2d34c: 80bf8b26 beq r16,r2,2d17c <__adddf3+0x7c> - 2d350: 4a402034 orhi r9,r9,128 - 2d354: 00800e04 movi r2,56 - 2d358: 1100a40e bge r2,r4,2d5ec <__adddf3+0x4ec> - 2d35c: 498cb03a or r6,r9,r6 - 2d360: 300ac03a cmpne r5,r6,zero - 2d364: 0013883a mov r9,zero - 2d368: 2c4b883a add r5,r5,r17 - 2d36c: 2c63803a cmpltu r17,r5,r17 - 2d370: 4a11883a add r8,r9,r8 - 2d374: 8a11883a add r8,r17,r8 - 2d378: 2823883a mov r17,r5 - 2d37c: 4080202c andhi r2,r8,128 - 2d380: 103fe026 beq r2,zero,2d304 <__adddf3+0x204> - 2d384: 84000044 addi r16,r16,1 - 2d388: 0081ffc4 movi r2,2047 - 2d38c: 8080d226 beq r16,r2,2d6d8 <__adddf3+0x5d8> - 2d390: 00bfe034 movhi r2,65408 - 2d394: 10bfffc4 addi r2,r2,-1 - 2d398: 4090703a and r8,r8,r2 - 2d39c: 880ad07a srli r5,r17,1 - 2d3a0: 400897fa slli r4,r8,31 - 2d3a4: 88c0004c andi r3,r17,1 - 2d3a8: 28e2b03a or r17,r5,r3 - 2d3ac: 4010d07a srli r8,r8,1 - 2d3b0: 2462b03a or r17,r4,r17 - 2d3b4: 003f7106 br 2d17c <__adddf3+0x7c> - 2d3b8: 4088b03a or r4,r8,r2 - 2d3bc: 20014526 beq r4,zero,2d8d4 <__adddf3+0x7d4> - 2d3c0: 01000434 movhi r4,16 - 2d3c4: 42000234 orhi r8,r8,8 - 2d3c8: 213fffc4 addi r4,r4,-1 - 2d3cc: 4110703a and r8,r8,r4 - 2d3d0: 003f8206 br 2d1dc <__adddf3+0xdc> - 2d3d4: 18ffffc4 addi r3,r3,-1 - 2d3d8: 1800491e bne r3,zero,2d500 <__adddf3+0x400> - 2d3dc: 898bc83a sub r5,r17,r6 - 2d3e0: 8963803a cmpltu r17,r17,r5 - 2d3e4: 4251c83a sub r8,r8,r9 - 2d3e8: 4451c83a sub r8,r8,r17 - 2d3ec: 2823883a mov r17,r5 - 2d3f0: 003f9f06 br 2d270 <__adddf3+0x170> - 2d3f4: 4984b03a or r2,r9,r6 - 2d3f8: 103f6026 beq r2,zero,2d17c <__adddf3+0x7c> - 2d3fc: 213fffc4 addi r4,r4,-1 - 2d400: 2000931e bne r4,zero,2d650 <__adddf3+0x550> - 2d404: 898d883a add r6,r17,r6 - 2d408: 3463803a cmpltu r17,r6,r17 - 2d40c: 4251883a add r8,r8,r9 - 2d410: 8a11883a add r8,r17,r8 - 2d414: 3023883a mov r17,r6 - 2d418: 003fd806 br 2d37c <__adddf3+0x27c> - 2d41c: 1800541e bne r3,zero,2d570 <__adddf3+0x470> - 2d420: 80800044 addi r2,r16,1 - 2d424: 1081ffcc andi r2,r2,2047 - 2d428: 00c00044 movi r3,1 - 2d42c: 1880a00e bge r3,r2,2d6b0 <__adddf3+0x5b0> - 2d430: 8989c83a sub r4,r17,r6 - 2d434: 8905803a cmpltu r2,r17,r4 - 2d438: 4267c83a sub r19,r8,r9 - 2d43c: 98a7c83a sub r19,r19,r2 - 2d440: 9880202c andhi r2,r19,128 - 2d444: 10006326 beq r2,zero,2d5d4 <__adddf3+0x4d4> - 2d448: 3463c83a sub r17,r6,r17 - 2d44c: 4a07c83a sub r3,r9,r8 - 2d450: 344d803a cmpltu r6,r6,r17 - 2d454: 19a7c83a sub r19,r3,r6 - 2d458: 3825883a mov r18,r7 - 2d45c: 983f8a1e bne r19,zero,2d288 <__adddf3+0x188> - 2d460: 8809883a mov r4,r17 - 2d464: 002f7040 call 2f704 <__clzsi2> - 2d468: 10800804 addi r2,r2,32 - 2d46c: 10fffe04 addi r3,r2,-8 - 2d470: 010007c4 movi r4,31 - 2d474: 20ff890e bge r4,r3,2d29c <__adddf3+0x19c> - 2d478: 10bff604 addi r2,r2,-40 - 2d47c: 8884983a sll r2,r17,r2 - 2d480: 0023883a mov r17,zero - 2d484: 1c3f8c0e bge r3,r16,2d2b8 <__adddf3+0x1b8> - 2d488: 023fe034 movhi r8,65408 - 2d48c: 423fffc4 addi r8,r8,-1 - 2d490: 80e1c83a sub r16,r16,r3 - 2d494: 1210703a and r8,r2,r8 - 2d498: 003f3806 br 2d17c <__adddf3+0x7c> - 2d49c: 9007883a mov r3,r18 - 2d4a0: 0011883a mov r8,zero - 2d4a4: 0005883a mov r2,zero - 2d4a8: 003f4c06 br 2d1dc <__adddf3+0xdc> - 2d4ac: 498cb03a or r6,r9,r6 - 2d4b0: 300cc03a cmpne r6,r6,zero - 2d4b4: 0007883a mov r3,zero - 2d4b8: 003f6806 br 2d25c <__adddf3+0x15c> - 2d4bc: 20009c1e bne r4,zero,2d730 <__adddf3+0x630> - 2d4c0: 80800044 addi r2,r16,1 - 2d4c4: 1141ffcc andi r5,r2,2047 - 2d4c8: 01000044 movi r4,1 - 2d4cc: 2140670e bge r4,r5,2d66c <__adddf3+0x56c> - 2d4d0: 0101ffc4 movi r4,2047 - 2d4d4: 11007f26 beq r2,r4,2d6d4 <__adddf3+0x5d4> - 2d4d8: 898d883a add r6,r17,r6 - 2d4dc: 4247883a add r3,r8,r9 - 2d4e0: 3451803a cmpltu r8,r6,r17 - 2d4e4: 40d1883a add r8,r8,r3 - 2d4e8: 402297fa slli r17,r8,31 - 2d4ec: 300cd07a srli r6,r6,1 - 2d4f0: 4010d07a srli r8,r8,1 - 2d4f4: 1021883a mov r16,r2 - 2d4f8: 89a2b03a or r17,r17,r6 - 2d4fc: 003f1f06 br 2d17c <__adddf3+0x7c> - 2d500: 0081ffc4 movi r2,2047 - 2d504: 80bf481e bne r16,r2,2d228 <__adddf3+0x128> - 2d508: 003f1c06 br 2d17c <__adddf3+0x7c> - 2d50c: 843ff844 addi r16,r16,-31 - 2d510: 01000804 movi r4,32 - 2d514: 1406d83a srl r3,r2,r16 - 2d518: 41005026 beq r8,r4,2d65c <__adddf3+0x55c> - 2d51c: 01001004 movi r4,64 - 2d520: 2211c83a sub r8,r4,r8 - 2d524: 1204983a sll r2,r2,r8 - 2d528: 88a2b03a or r17,r17,r2 - 2d52c: 8822c03a cmpne r17,r17,zero - 2d530: 1c62b03a or r17,r3,r17 - 2d534: 0011883a mov r8,zero - 2d538: 0021883a mov r16,zero - 2d53c: 003f7106 br 2d304 <__adddf3+0x204> - 2d540: 193ff804 addi r4,r3,-32 - 2d544: 00800804 movi r2,32 - 2d548: 4908d83a srl r4,r9,r4 - 2d54c: 18804526 beq r3,r2,2d664 <__adddf3+0x564> - 2d550: 00801004 movi r2,64 - 2d554: 10c5c83a sub r2,r2,r3 - 2d558: 4886983a sll r3,r9,r2 - 2d55c: 198cb03a or r6,r3,r6 - 2d560: 300cc03a cmpne r6,r6,zero - 2d564: 218cb03a or r6,r4,r6 - 2d568: 0007883a mov r3,zero - 2d56c: 003f3b06 br 2d25c <__adddf3+0x15c> - 2d570: 80002a26 beq r16,zero,2d61c <__adddf3+0x51c> - 2d574: 0101ffc4 movi r4,2047 - 2d578: 11006826 beq r2,r4,2d71c <__adddf3+0x61c> - 2d57c: 00c7c83a sub r3,zero,r3 - 2d580: 42002034 orhi r8,r8,128 - 2d584: 01000e04 movi r4,56 - 2d588: 20c07c16 blt r4,r3,2d77c <__adddf3+0x67c> - 2d58c: 010007c4 movi r4,31 - 2d590: 20c0da16 blt r4,r3,2d8fc <__adddf3+0x7fc> - 2d594: 01000804 movi r4,32 - 2d598: 20c9c83a sub r4,r4,r3 - 2d59c: 4114983a sll r10,r8,r4 - 2d5a0: 88cad83a srl r5,r17,r3 - 2d5a4: 8908983a sll r4,r17,r4 - 2d5a8: 40c6d83a srl r3,r8,r3 - 2d5ac: 5162b03a or r17,r10,r5 - 2d5b0: 2008c03a cmpne r4,r4,zero - 2d5b4: 8922b03a or r17,r17,r4 - 2d5b8: 3463c83a sub r17,r6,r17 - 2d5bc: 48c7c83a sub r3,r9,r3 - 2d5c0: 344d803a cmpltu r6,r6,r17 - 2d5c4: 1991c83a sub r8,r3,r6 - 2d5c8: 1021883a mov r16,r2 - 2d5cc: 3825883a mov r18,r7 - 2d5d0: 003f2706 br 2d270 <__adddf3+0x170> - 2d5d4: 24d0b03a or r8,r4,r19 - 2d5d8: 40001b1e bne r8,zero,2d648 <__adddf3+0x548> - 2d5dc: 0005883a mov r2,zero - 2d5e0: 0007883a mov r3,zero - 2d5e4: 0021883a mov r16,zero - 2d5e8: 003f4d06 br 2d320 <__adddf3+0x220> - 2d5ec: 008007c4 movi r2,31 - 2d5f0: 11003c16 blt r2,r4,2d6e4 <__adddf3+0x5e4> - 2d5f4: 00800804 movi r2,32 - 2d5f8: 1105c83a sub r2,r2,r4 - 2d5fc: 488e983a sll r7,r9,r2 - 2d600: 310ad83a srl r5,r6,r4 - 2d604: 3084983a sll r2,r6,r2 - 2d608: 4912d83a srl r9,r9,r4 - 2d60c: 394ab03a or r5,r7,r5 - 2d610: 1004c03a cmpne r2,r2,zero - 2d614: 288ab03a or r5,r5,r2 - 2d618: 003f5306 br 2d368 <__adddf3+0x268> - 2d61c: 4448b03a or r4,r8,r17 - 2d620: 20003e26 beq r4,zero,2d71c <__adddf3+0x61c> - 2d624: 00c6303a nor r3,zero,r3 - 2d628: 18003a1e bne r3,zero,2d714 <__adddf3+0x614> - 2d62c: 3463c83a sub r17,r6,r17 - 2d630: 4a07c83a sub r3,r9,r8 - 2d634: 344d803a cmpltu r6,r6,r17 - 2d638: 1991c83a sub r8,r3,r6 - 2d63c: 1021883a mov r16,r2 - 2d640: 3825883a mov r18,r7 - 2d644: 003f0a06 br 2d270 <__adddf3+0x170> - 2d648: 2023883a mov r17,r4 - 2d64c: 003f0d06 br 2d284 <__adddf3+0x184> - 2d650: 0081ffc4 movi r2,2047 - 2d654: 80bf3f1e bne r16,r2,2d354 <__adddf3+0x254> - 2d658: 003ec806 br 2d17c <__adddf3+0x7c> - 2d65c: 0005883a mov r2,zero - 2d660: 003fb106 br 2d528 <__adddf3+0x428> - 2d664: 0007883a mov r3,zero - 2d668: 003fbc06 br 2d55c <__adddf3+0x45c> - 2d66c: 4444b03a or r2,r8,r17 - 2d670: 8000871e bne r16,zero,2d890 <__adddf3+0x790> - 2d674: 1000ba26 beq r2,zero,2d960 <__adddf3+0x860> - 2d678: 4984b03a or r2,r9,r6 - 2d67c: 103ebf26 beq r2,zero,2d17c <__adddf3+0x7c> - 2d680: 8985883a add r2,r17,r6 - 2d684: 4247883a add r3,r8,r9 - 2d688: 1451803a cmpltu r8,r2,r17 - 2d68c: 40d1883a add r8,r8,r3 - 2d690: 40c0202c andhi r3,r8,128 - 2d694: 1023883a mov r17,r2 - 2d698: 183f1a26 beq r3,zero,2d304 <__adddf3+0x204> - 2d69c: 00bfe034 movhi r2,65408 - 2d6a0: 10bfffc4 addi r2,r2,-1 - 2d6a4: 2021883a mov r16,r4 - 2d6a8: 4090703a and r8,r8,r2 - 2d6ac: 003eb306 br 2d17c <__adddf3+0x7c> - 2d6b0: 4444b03a or r2,r8,r17 - 2d6b4: 8000291e bne r16,zero,2d75c <__adddf3+0x65c> - 2d6b8: 10004b1e bne r2,zero,2d7e8 <__adddf3+0x6e8> - 2d6bc: 4990b03a or r8,r9,r6 - 2d6c0: 40008b26 beq r8,zero,2d8f0 <__adddf3+0x7f0> - 2d6c4: 4811883a mov r8,r9 - 2d6c8: 3023883a mov r17,r6 - 2d6cc: 3825883a mov r18,r7 - 2d6d0: 003eaa06 br 2d17c <__adddf3+0x7c> - 2d6d4: 1021883a mov r16,r2 - 2d6d8: 0011883a mov r8,zero - 2d6dc: 0005883a mov r2,zero - 2d6e0: 003f0f06 br 2d320 <__adddf3+0x220> - 2d6e4: 217ff804 addi r5,r4,-32 - 2d6e8: 00800804 movi r2,32 - 2d6ec: 494ad83a srl r5,r9,r5 - 2d6f0: 20807d26 beq r4,r2,2d8e8 <__adddf3+0x7e8> - 2d6f4: 00801004 movi r2,64 - 2d6f8: 1109c83a sub r4,r2,r4 - 2d6fc: 4912983a sll r9,r9,r4 - 2d700: 498cb03a or r6,r9,r6 - 2d704: 300cc03a cmpne r6,r6,zero - 2d708: 298ab03a or r5,r5,r6 - 2d70c: 0013883a mov r9,zero - 2d710: 003f1506 br 2d368 <__adddf3+0x268> - 2d714: 0101ffc4 movi r4,2047 - 2d718: 113f9a1e bne r2,r4,2d584 <__adddf3+0x484> - 2d71c: 4811883a mov r8,r9 - 2d720: 3023883a mov r17,r6 - 2d724: 1021883a mov r16,r2 - 2d728: 3825883a mov r18,r7 - 2d72c: 003e9306 br 2d17c <__adddf3+0x7c> - 2d730: 8000161e bne r16,zero,2d78c <__adddf3+0x68c> - 2d734: 444ab03a or r5,r8,r17 - 2d738: 28005126 beq r5,zero,2d880 <__adddf3+0x780> - 2d73c: 0108303a nor r4,zero,r4 - 2d740: 20004d1e bne r4,zero,2d878 <__adddf3+0x778> - 2d744: 89a3883a add r17,r17,r6 - 2d748: 4253883a add r9,r8,r9 - 2d74c: 898d803a cmpltu r6,r17,r6 - 2d750: 3251883a add r8,r6,r9 - 2d754: 1021883a mov r16,r2 - 2d758: 003f0806 br 2d37c <__adddf3+0x27c> - 2d75c: 1000301e bne r2,zero,2d820 <__adddf3+0x720> - 2d760: 4984b03a or r2,r9,r6 - 2d764: 10007126 beq r2,zero,2d92c <__adddf3+0x82c> - 2d768: 4811883a mov r8,r9 - 2d76c: 3023883a mov r17,r6 - 2d770: 3825883a mov r18,r7 - 2d774: 0401ffc4 movi r16,2047 - 2d778: 003e8006 br 2d17c <__adddf3+0x7c> - 2d77c: 4462b03a or r17,r8,r17 - 2d780: 8822c03a cmpne r17,r17,zero - 2d784: 0007883a mov r3,zero - 2d788: 003f8b06 br 2d5b8 <__adddf3+0x4b8> - 2d78c: 0141ffc4 movi r5,2047 - 2d790: 11403b26 beq r2,r5,2d880 <__adddf3+0x780> - 2d794: 0109c83a sub r4,zero,r4 - 2d798: 42002034 orhi r8,r8,128 - 2d79c: 01400e04 movi r5,56 - 2d7a0: 29006716 blt r5,r4,2d940 <__adddf3+0x840> - 2d7a4: 014007c4 movi r5,31 - 2d7a8: 29007016 blt r5,r4,2d96c <__adddf3+0x86c> - 2d7ac: 01400804 movi r5,32 - 2d7b0: 290bc83a sub r5,r5,r4 - 2d7b4: 4154983a sll r10,r8,r5 - 2d7b8: 890ed83a srl r7,r17,r4 - 2d7bc: 894a983a sll r5,r17,r5 - 2d7c0: 4108d83a srl r4,r8,r4 - 2d7c4: 51e2b03a or r17,r10,r7 - 2d7c8: 280ac03a cmpne r5,r5,zero - 2d7cc: 8962b03a or r17,r17,r5 - 2d7d0: 89a3883a add r17,r17,r6 - 2d7d4: 2253883a add r9,r4,r9 - 2d7d8: 898d803a cmpltu r6,r17,r6 - 2d7dc: 3251883a add r8,r6,r9 - 2d7e0: 1021883a mov r16,r2 - 2d7e4: 003ee506 br 2d37c <__adddf3+0x27c> - 2d7e8: 4984b03a or r2,r9,r6 - 2d7ec: 103e6326 beq r2,zero,2d17c <__adddf3+0x7c> - 2d7f0: 8987c83a sub r3,r17,r6 - 2d7f4: 88c9803a cmpltu r4,r17,r3 - 2d7f8: 4245c83a sub r2,r8,r9 - 2d7fc: 1105c83a sub r2,r2,r4 - 2d800: 1100202c andhi r4,r2,128 - 2d804: 203ebb26 beq r4,zero,2d2f4 <__adddf3+0x1f4> - 2d808: 3463c83a sub r17,r6,r17 - 2d80c: 4a07c83a sub r3,r9,r8 - 2d810: 344d803a cmpltu r6,r6,r17 - 2d814: 1991c83a sub r8,r3,r6 - 2d818: 3825883a mov r18,r7 - 2d81c: 003e5706 br 2d17c <__adddf3+0x7c> - 2d820: 4984b03a or r2,r9,r6 - 2d824: 10002e26 beq r2,zero,2d8e0 <__adddf3+0x7e0> - 2d828: 4004d0fa srli r2,r8,3 - 2d82c: 8822d0fa srli r17,r17,3 - 2d830: 4010977a slli r8,r8,29 - 2d834: 10c0022c andhi r3,r2,8 - 2d838: 4462b03a or r17,r8,r17 - 2d83c: 18000826 beq r3,zero,2d860 <__adddf3+0x760> - 2d840: 4808d0fa srli r4,r9,3 - 2d844: 20c0022c andhi r3,r4,8 - 2d848: 1800051e bne r3,zero,2d860 <__adddf3+0x760> - 2d84c: 300cd0fa srli r6,r6,3 - 2d850: 4806977a slli r3,r9,29 - 2d854: 2005883a mov r2,r4 - 2d858: 3825883a mov r18,r7 - 2d85c: 19a2b03a or r17,r3,r6 - 2d860: 8810d77a srli r8,r17,29 - 2d864: 100490fa slli r2,r2,3 - 2d868: 882290fa slli r17,r17,3 - 2d86c: 0401ffc4 movi r16,2047 - 2d870: 4090b03a or r8,r8,r2 - 2d874: 003e4106 br 2d17c <__adddf3+0x7c> - 2d878: 0141ffc4 movi r5,2047 - 2d87c: 117fc71e bne r2,r5,2d79c <__adddf3+0x69c> - 2d880: 4811883a mov r8,r9 - 2d884: 3023883a mov r17,r6 - 2d888: 1021883a mov r16,r2 - 2d88c: 003e3b06 br 2d17c <__adddf3+0x7c> - 2d890: 10002f26 beq r2,zero,2d950 <__adddf3+0x850> - 2d894: 4984b03a or r2,r9,r6 - 2d898: 10001126 beq r2,zero,2d8e0 <__adddf3+0x7e0> - 2d89c: 4004d0fa srli r2,r8,3 - 2d8a0: 8822d0fa srli r17,r17,3 - 2d8a4: 4010977a slli r8,r8,29 - 2d8a8: 10c0022c andhi r3,r2,8 - 2d8ac: 4462b03a or r17,r8,r17 - 2d8b0: 183feb26 beq r3,zero,2d860 <__adddf3+0x760> - 2d8b4: 4808d0fa srli r4,r9,3 - 2d8b8: 20c0022c andhi r3,r4,8 - 2d8bc: 183fe81e bne r3,zero,2d860 <__adddf3+0x760> - 2d8c0: 300cd0fa srli r6,r6,3 - 2d8c4: 4806977a slli r3,r9,29 - 2d8c8: 2005883a mov r2,r4 - 2d8cc: 19a2b03a or r17,r3,r6 - 2d8d0: 003fe306 br 2d860 <__adddf3+0x760> - 2d8d4: 0011883a mov r8,zero - 2d8d8: 0005883a mov r2,zero - 2d8dc: 003e3f06 br 2d1dc <__adddf3+0xdc> - 2d8e0: 0401ffc4 movi r16,2047 - 2d8e4: 003e2506 br 2d17c <__adddf3+0x7c> - 2d8e8: 0013883a mov r9,zero - 2d8ec: 003f8406 br 2d700 <__adddf3+0x600> - 2d8f0: 0005883a mov r2,zero - 2d8f4: 0007883a mov r3,zero - 2d8f8: 003e8906 br 2d320 <__adddf3+0x220> - 2d8fc: 197ff804 addi r5,r3,-32 - 2d900: 01000804 movi r4,32 - 2d904: 414ad83a srl r5,r8,r5 - 2d908: 19002426 beq r3,r4,2d99c <__adddf3+0x89c> - 2d90c: 01001004 movi r4,64 - 2d910: 20c7c83a sub r3,r4,r3 - 2d914: 40c6983a sll r3,r8,r3 - 2d918: 1c46b03a or r3,r3,r17 - 2d91c: 1806c03a cmpne r3,r3,zero - 2d920: 28e2b03a or r17,r5,r3 - 2d924: 0007883a mov r3,zero - 2d928: 003f2306 br 2d5b8 <__adddf3+0x4b8> - 2d92c: 0007883a mov r3,zero - 2d930: 5811883a mov r8,r11 - 2d934: 00bfffc4 movi r2,-1 - 2d938: 0401ffc4 movi r16,2047 - 2d93c: 003e7806 br 2d320 <__adddf3+0x220> - 2d940: 4462b03a or r17,r8,r17 - 2d944: 8822c03a cmpne r17,r17,zero - 2d948: 0009883a mov r4,zero - 2d94c: 003fa006 br 2d7d0 <__adddf3+0x6d0> - 2d950: 4811883a mov r8,r9 - 2d954: 3023883a mov r17,r6 - 2d958: 0401ffc4 movi r16,2047 - 2d95c: 003e0706 br 2d17c <__adddf3+0x7c> - 2d960: 4811883a mov r8,r9 - 2d964: 3023883a mov r17,r6 - 2d968: 003e0406 br 2d17c <__adddf3+0x7c> - 2d96c: 21fff804 addi r7,r4,-32 - 2d970: 01400804 movi r5,32 - 2d974: 41ced83a srl r7,r8,r7 - 2d978: 21400a26 beq r4,r5,2d9a4 <__adddf3+0x8a4> - 2d97c: 01401004 movi r5,64 - 2d980: 2909c83a sub r4,r5,r4 - 2d984: 4108983a sll r4,r8,r4 - 2d988: 2448b03a or r4,r4,r17 - 2d98c: 2008c03a cmpne r4,r4,zero - 2d990: 3922b03a or r17,r7,r4 - 2d994: 0009883a mov r4,zero - 2d998: 003f8d06 br 2d7d0 <__adddf3+0x6d0> - 2d99c: 0007883a mov r3,zero - 2d9a0: 003fdd06 br 2d918 <__adddf3+0x818> - 2d9a4: 0009883a mov r4,zero - 2d9a8: 003ff706 br 2d988 <__adddf3+0x888> +0002d1f8 <__divdf3>: + 2d1f8: defff204 addi sp,sp,-56 + 2d1fc: dd400915 stw r21,36(sp) + 2d200: 282ad53a srli r21,r5,20 + 2d204: dd000815 stw r20,32(sp) + 2d208: 2828d7fa srli r20,r5,31 + 2d20c: dc000415 stw r16,16(sp) + 2d210: 04000434 movhi r16,16 + 2d214: df000c15 stw fp,48(sp) + 2d218: 843fffc4 addi r16,r16,-1 + 2d21c: dfc00d15 stw ra,52(sp) + 2d220: ddc00b15 stw r23,44(sp) + 2d224: dd800a15 stw r22,40(sp) + 2d228: dcc00715 stw r19,28(sp) + 2d22c: dc800615 stw r18,24(sp) + 2d230: dc400515 stw r17,20(sp) + 2d234: ad41ffcc andi r21,r21,2047 + 2d238: 2c20703a and r16,r5,r16 + 2d23c: a7003fcc andi fp,r20,255 + 2d240: a8006126 beq r21,zero,2d3c8 <__divdf3+0x1d0> + 2d244: 0081ffc4 movi r2,2047 + 2d248: 2025883a mov r18,r4 + 2d24c: a8803726 beq r21,r2,2d32c <__divdf3+0x134> + 2d250: 80800434 orhi r2,r16,16 + 2d254: 100490fa slli r2,r2,3 + 2d258: 2020d77a srli r16,r4,29 + 2d25c: 202490fa slli r18,r4,3 + 2d260: ad7f0044 addi r21,r21,-1023 + 2d264: 80a0b03a or r16,r16,r2 + 2d268: 0027883a mov r19,zero + 2d26c: 0013883a mov r9,zero + 2d270: 3804d53a srli r2,r7,20 + 2d274: 382cd7fa srli r22,r7,31 + 2d278: 04400434 movhi r17,16 + 2d27c: 8c7fffc4 addi r17,r17,-1 + 2d280: 1081ffcc andi r2,r2,2047 + 2d284: 3011883a mov r8,r6 + 2d288: 3c62703a and r17,r7,r17 + 2d28c: b5c03fcc andi r23,r22,255 + 2d290: 10006c26 beq r2,zero,2d444 <__divdf3+0x24c> + 2d294: 00c1ffc4 movi r3,2047 + 2d298: 10c06426 beq r2,r3,2d42c <__divdf3+0x234> + 2d29c: 88c00434 orhi r3,r17,16 + 2d2a0: 180690fa slli r3,r3,3 + 2d2a4: 3022d77a srli r17,r6,29 + 2d2a8: 301090fa slli r8,r6,3 + 2d2ac: 10bf0044 addi r2,r2,-1023 + 2d2b0: 88e2b03a or r17,r17,r3 + 2d2b4: 000f883a mov r7,zero + 2d2b8: a58cf03a xor r6,r20,r22 + 2d2bc: 3cc8b03a or r4,r7,r19 + 2d2c0: a8abc83a sub r21,r21,r2 + 2d2c4: 008003c4 movi r2,15 + 2d2c8: 3007883a mov r3,r6 + 2d2cc: 34c03fcc andi r19,r6,255 + 2d2d0: 11009036 bltu r2,r4,2d514 <__divdf3+0x31c> + 2d2d4: 200890ba slli r4,r4,2 + 2d2d8: 008000f4 movhi r2,3 + 2d2dc: 10b4bb04 addi r2,r2,-11540 + 2d2e0: 2089883a add r4,r4,r2 + 2d2e4: 20800017 ldw r2,0(r4) + 2d2e8: 1000683a jmp r2 + 2d2ec: 0002d514 movui zero,2900 + 2d2f0: 0002d364 muli zero,zero,2893 + 2d2f4: 0002d504 movi zero,2900 + 2d2f8: 0002d358 cmpnei zero,zero,2893 + 2d2fc: 0002d504 movi zero,2900 + 2d300: 0002d4d8 cmpnei zero,zero,2899 + 2d304: 0002d504 movi zero,2900 + 2d308: 0002d358 cmpnei zero,zero,2893 + 2d30c: 0002d364 muli zero,zero,2893 + 2d310: 0002d364 muli zero,zero,2893 + 2d314: 0002d4d8 cmpnei zero,zero,2899 + 2d318: 0002d358 cmpnei zero,zero,2893 + 2d31c: 0002d348 cmpgei zero,zero,2893 + 2d320: 0002d348 cmpgei zero,zero,2893 + 2d324: 0002d348 cmpgei zero,zero,2893 + 2d328: 0002d7f8 rdprs zero,zero,2911 + 2d32c: 2404b03a or r2,r4,r16 + 2d330: 1000661e bne r2,zero,2d4cc <__divdf3+0x2d4> + 2d334: 04c00204 movi r19,8 + 2d338: 0021883a mov r16,zero + 2d33c: 0025883a mov r18,zero + 2d340: 02400084 movi r9,2 + 2d344: 003fca06 br 2d270 <_gp+0xffff0d38> + 2d348: 8023883a mov r17,r16 + 2d34c: 9011883a mov r8,r18 + 2d350: e02f883a mov r23,fp + 2d354: 480f883a mov r7,r9 + 2d358: 00800084 movi r2,2 + 2d35c: 3881311e bne r7,r2,2d824 <__divdf3+0x62c> + 2d360: b827883a mov r19,r23 + 2d364: 98c0004c andi r3,r19,1 + 2d368: 0081ffc4 movi r2,2047 + 2d36c: 000b883a mov r5,zero + 2d370: 0025883a mov r18,zero + 2d374: 1004953a slli r2,r2,20 + 2d378: 18c03fcc andi r3,r3,255 + 2d37c: 04400434 movhi r17,16 + 2d380: 8c7fffc4 addi r17,r17,-1 + 2d384: 180697fa slli r3,r3,31 + 2d388: 2c4a703a and r5,r5,r17 + 2d38c: 288ab03a or r5,r5,r2 + 2d390: 28c6b03a or r3,r5,r3 + 2d394: 9005883a mov r2,r18 + 2d398: dfc00d17 ldw ra,52(sp) + 2d39c: df000c17 ldw fp,48(sp) + 2d3a0: ddc00b17 ldw r23,44(sp) + 2d3a4: dd800a17 ldw r22,40(sp) + 2d3a8: dd400917 ldw r21,36(sp) + 2d3ac: dd000817 ldw r20,32(sp) + 2d3b0: dcc00717 ldw r19,28(sp) + 2d3b4: dc800617 ldw r18,24(sp) + 2d3b8: dc400517 ldw r17,20(sp) + 2d3bc: dc000417 ldw r16,16(sp) + 2d3c0: dec00e04 addi sp,sp,56 + 2d3c4: f800283a ret + 2d3c8: 2404b03a or r2,r4,r16 + 2d3cc: 2027883a mov r19,r4 + 2d3d0: 10003926 beq r2,zero,2d4b8 <__divdf3+0x2c0> + 2d3d4: 80012e26 beq r16,zero,2d890 <__divdf3+0x698> + 2d3d8: 8009883a mov r4,r16 + 2d3dc: d9800315 stw r6,12(sp) + 2d3e0: d9c00215 stw r7,8(sp) + 2d3e4: 002ef500 call 2ef50 <__clzsi2> + 2d3e8: d9800317 ldw r6,12(sp) + 2d3ec: d9c00217 ldw r7,8(sp) + 2d3f0: 113ffd44 addi r4,r2,-11 + 2d3f4: 00c00704 movi r3,28 + 2d3f8: 19012116 blt r3,r4,2d880 <__divdf3+0x688> + 2d3fc: 00c00744 movi r3,29 + 2d400: 147ffe04 addi r17,r2,-8 + 2d404: 1907c83a sub r3,r3,r4 + 2d408: 8460983a sll r16,r16,r17 + 2d40c: 98c6d83a srl r3,r19,r3 + 2d410: 9c64983a sll r18,r19,r17 + 2d414: 1c20b03a or r16,r3,r16 + 2d418: 1080fcc4 addi r2,r2,1011 + 2d41c: 00abc83a sub r21,zero,r2 + 2d420: 0027883a mov r19,zero + 2d424: 0013883a mov r9,zero + 2d428: 003f9106 br 2d270 <_gp+0xffff0d38> + 2d42c: 3446b03a or r3,r6,r17 + 2d430: 18001f1e bne r3,zero,2d4b0 <__divdf3+0x2b8> + 2d434: 0023883a mov r17,zero + 2d438: 0011883a mov r8,zero + 2d43c: 01c00084 movi r7,2 + 2d440: 003f9d06 br 2d2b8 <_gp+0xffff0d80> + 2d444: 3446b03a or r3,r6,r17 + 2d448: 18001526 beq r3,zero,2d4a0 <__divdf3+0x2a8> + 2d44c: 88011b26 beq r17,zero,2d8bc <__divdf3+0x6c4> + 2d450: 8809883a mov r4,r17 + 2d454: d9800315 stw r6,12(sp) + 2d458: da400115 stw r9,4(sp) + 2d45c: 002ef500 call 2ef50 <__clzsi2> + 2d460: d9800317 ldw r6,12(sp) + 2d464: da400117 ldw r9,4(sp) + 2d468: 113ffd44 addi r4,r2,-11 + 2d46c: 00c00704 movi r3,28 + 2d470: 19010e16 blt r3,r4,2d8ac <__divdf3+0x6b4> + 2d474: 00c00744 movi r3,29 + 2d478: 123ffe04 addi r8,r2,-8 + 2d47c: 1907c83a sub r3,r3,r4 + 2d480: 8a22983a sll r17,r17,r8 + 2d484: 30c6d83a srl r3,r6,r3 + 2d488: 3210983a sll r8,r6,r8 + 2d48c: 1c62b03a or r17,r3,r17 + 2d490: 1080fcc4 addi r2,r2,1011 + 2d494: 0085c83a sub r2,zero,r2 + 2d498: 000f883a mov r7,zero + 2d49c: 003f8606 br 2d2b8 <_gp+0xffff0d80> + 2d4a0: 0023883a mov r17,zero + 2d4a4: 0011883a mov r8,zero + 2d4a8: 01c00044 movi r7,1 + 2d4ac: 003f8206 br 2d2b8 <_gp+0xffff0d80> + 2d4b0: 01c000c4 movi r7,3 + 2d4b4: 003f8006 br 2d2b8 <_gp+0xffff0d80> + 2d4b8: 04c00104 movi r19,4 + 2d4bc: 0021883a mov r16,zero + 2d4c0: 0025883a mov r18,zero + 2d4c4: 02400044 movi r9,1 + 2d4c8: 003f6906 br 2d270 <_gp+0xffff0d38> + 2d4cc: 04c00304 movi r19,12 + 2d4d0: 024000c4 movi r9,3 + 2d4d4: 003f6606 br 2d270 <_gp+0xffff0d38> + 2d4d8: 01400434 movhi r5,16 + 2d4dc: 0007883a mov r3,zero + 2d4e0: 297fffc4 addi r5,r5,-1 + 2d4e4: 04bfffc4 movi r18,-1 + 2d4e8: 0081ffc4 movi r2,2047 + 2d4ec: 003fa106 br 2d374 <_gp+0xffff0e3c> + 2d4f0: 00c00044 movi r3,1 + 2d4f4: 1887c83a sub r3,r3,r2 + 2d4f8: 01000e04 movi r4,56 + 2d4fc: 20c1210e bge r4,r3,2d984 <__divdf3+0x78c> + 2d500: 98c0004c andi r3,r19,1 + 2d504: 0005883a mov r2,zero + 2d508: 000b883a mov r5,zero + 2d50c: 0025883a mov r18,zero + 2d510: 003f9806 br 2d374 <_gp+0xffff0e3c> + 2d514: 8c00fd36 bltu r17,r16,2d90c <__divdf3+0x714> + 2d518: 8440fb26 beq r16,r17,2d908 <__divdf3+0x710> + 2d51c: 8007883a mov r3,r16 + 2d520: ad7fffc4 addi r21,r21,-1 + 2d524: 0021883a mov r16,zero + 2d528: 4004d63a srli r2,r8,24 + 2d52c: 8822923a slli r17,r17,8 + 2d530: 1809883a mov r4,r3 + 2d534: 402c923a slli r22,r8,8 + 2d538: 88b8b03a or fp,r17,r2 + 2d53c: e028d43a srli r20,fp,16 + 2d540: d8c00015 stw r3,0(sp) + 2d544: e5ffffcc andi r23,fp,65535 + 2d548: a00b883a mov r5,r20 + 2d54c: 00225dc0 call 225dc <__udivsi3> + 2d550: d8c00017 ldw r3,0(sp) + 2d554: a00b883a mov r5,r20 + 2d558: d8800315 stw r2,12(sp) + 2d55c: 1809883a mov r4,r3 + 2d560: 00226400 call 22640 <__umodsi3> + 2d564: d9800317 ldw r6,12(sp) + 2d568: 1006943a slli r3,r2,16 + 2d56c: 9004d43a srli r2,r18,16 + 2d570: b9a3383a mul r17,r23,r6 + 2d574: 10c4b03a or r2,r2,r3 + 2d578: 1440062e bgeu r2,r17,2d594 <__divdf3+0x39c> + 2d57c: 1705883a add r2,r2,fp + 2d580: 30ffffc4 addi r3,r6,-1 + 2d584: 1700ee36 bltu r2,fp,2d940 <__divdf3+0x748> + 2d588: 1440ed2e bgeu r2,r17,2d940 <__divdf3+0x748> + 2d58c: 31bfff84 addi r6,r6,-2 + 2d590: 1705883a add r2,r2,fp + 2d594: 1463c83a sub r17,r2,r17 + 2d598: a00b883a mov r5,r20 + 2d59c: 8809883a mov r4,r17 + 2d5a0: d9800315 stw r6,12(sp) + 2d5a4: 00225dc0 call 225dc <__udivsi3> + 2d5a8: a00b883a mov r5,r20 + 2d5ac: 8809883a mov r4,r17 + 2d5b0: d8800215 stw r2,8(sp) + 2d5b4: 00226400 call 22640 <__umodsi3> + 2d5b8: d9c00217 ldw r7,8(sp) + 2d5bc: 1004943a slli r2,r2,16 + 2d5c0: 94bfffcc andi r18,r18,65535 + 2d5c4: b9d1383a mul r8,r23,r7 + 2d5c8: 90a4b03a or r18,r18,r2 + 2d5cc: d9800317 ldw r6,12(sp) + 2d5d0: 9200062e bgeu r18,r8,2d5ec <__divdf3+0x3f4> + 2d5d4: 9725883a add r18,r18,fp + 2d5d8: 38bfffc4 addi r2,r7,-1 + 2d5dc: 9700d636 bltu r18,fp,2d938 <__divdf3+0x740> + 2d5e0: 9200d52e bgeu r18,r8,2d938 <__divdf3+0x740> + 2d5e4: 39ffff84 addi r7,r7,-2 + 2d5e8: 9725883a add r18,r18,fp + 2d5ec: 3004943a slli r2,r6,16 + 2d5f0: b012d43a srli r9,r22,16 + 2d5f4: b1bfffcc andi r6,r22,65535 + 2d5f8: 11e2b03a or r17,r2,r7 + 2d5fc: 8806d43a srli r3,r17,16 + 2d600: 893fffcc andi r4,r17,65535 + 2d604: 218b383a mul r5,r4,r6 + 2d608: 30c5383a mul r2,r6,r3 + 2d60c: 2249383a mul r4,r4,r9 + 2d610: 280ed43a srli r7,r5,16 + 2d614: 9225c83a sub r18,r18,r8 + 2d618: 2089883a add r4,r4,r2 + 2d61c: 3909883a add r4,r7,r4 + 2d620: 1a47383a mul r3,r3,r9 + 2d624: 2080022e bgeu r4,r2,2d630 <__divdf3+0x438> + 2d628: 00800074 movhi r2,1 + 2d62c: 1887883a add r3,r3,r2 + 2d630: 2004d43a srli r2,r4,16 + 2d634: 2008943a slli r4,r4,16 + 2d638: 297fffcc andi r5,r5,65535 + 2d63c: 10c7883a add r3,r2,r3 + 2d640: 2149883a add r4,r4,r5 + 2d644: 90c0a536 bltu r18,r3,2d8dc <__divdf3+0x6e4> + 2d648: 90c0bf26 beq r18,r3,2d948 <__divdf3+0x750> + 2d64c: 90c7c83a sub r3,r18,r3 + 2d650: 810fc83a sub r7,r16,r4 + 2d654: 81e5803a cmpltu r18,r16,r7 + 2d658: 1ca5c83a sub r18,r3,r18 + 2d65c: e480c126 beq fp,r18,2d964 <__divdf3+0x76c> + 2d660: a00b883a mov r5,r20 + 2d664: 9009883a mov r4,r18 + 2d668: d9800315 stw r6,12(sp) + 2d66c: d9c00215 stw r7,8(sp) + 2d670: da400115 stw r9,4(sp) + 2d674: 00225dc0 call 225dc <__udivsi3> + 2d678: a00b883a mov r5,r20 + 2d67c: 9009883a mov r4,r18 + 2d680: d8800015 stw r2,0(sp) + 2d684: 00226400 call 22640 <__umodsi3> + 2d688: d9c00217 ldw r7,8(sp) + 2d68c: da000017 ldw r8,0(sp) + 2d690: 1006943a slli r3,r2,16 + 2d694: 3804d43a srli r2,r7,16 + 2d698: ba21383a mul r16,r23,r8 + 2d69c: d9800317 ldw r6,12(sp) + 2d6a0: 10c4b03a or r2,r2,r3 + 2d6a4: da400117 ldw r9,4(sp) + 2d6a8: 1400062e bgeu r2,r16,2d6c4 <__divdf3+0x4cc> + 2d6ac: 1705883a add r2,r2,fp + 2d6b0: 40ffffc4 addi r3,r8,-1 + 2d6b4: 1700ad36 bltu r2,fp,2d96c <__divdf3+0x774> + 2d6b8: 1400ac2e bgeu r2,r16,2d96c <__divdf3+0x774> + 2d6bc: 423fff84 addi r8,r8,-2 + 2d6c0: 1705883a add r2,r2,fp + 2d6c4: 1421c83a sub r16,r2,r16 + 2d6c8: a00b883a mov r5,r20 + 2d6cc: 8009883a mov r4,r16 + 2d6d0: d9800315 stw r6,12(sp) + 2d6d4: d9c00215 stw r7,8(sp) + 2d6d8: da000015 stw r8,0(sp) + 2d6dc: da400115 stw r9,4(sp) + 2d6e0: 00225dc0 call 225dc <__udivsi3> + 2d6e4: 8009883a mov r4,r16 + 2d6e8: a00b883a mov r5,r20 + 2d6ec: 1025883a mov r18,r2 + 2d6f0: 00226400 call 22640 <__umodsi3> + 2d6f4: d9c00217 ldw r7,8(sp) + 2d6f8: 1004943a slli r2,r2,16 + 2d6fc: bcaf383a mul r23,r23,r18 + 2d700: 393fffcc andi r4,r7,65535 + 2d704: 2088b03a or r4,r4,r2 + 2d708: d9800317 ldw r6,12(sp) + 2d70c: da000017 ldw r8,0(sp) + 2d710: da400117 ldw r9,4(sp) + 2d714: 25c0062e bgeu r4,r23,2d730 <__divdf3+0x538> + 2d718: 2709883a add r4,r4,fp + 2d71c: 90bfffc4 addi r2,r18,-1 + 2d720: 27009436 bltu r4,fp,2d974 <__divdf3+0x77c> + 2d724: 25c0932e bgeu r4,r23,2d974 <__divdf3+0x77c> + 2d728: 94bfff84 addi r18,r18,-2 + 2d72c: 2709883a add r4,r4,fp + 2d730: 4004943a slli r2,r8,16 + 2d734: 25efc83a sub r23,r4,r23 + 2d738: 1490b03a or r8,r2,r18 + 2d73c: 4008d43a srli r4,r8,16 + 2d740: 40ffffcc andi r3,r8,65535 + 2d744: 30c5383a mul r2,r6,r3 + 2d748: 1a47383a mul r3,r3,r9 + 2d74c: 310d383a mul r6,r6,r4 + 2d750: 100ad43a srli r5,r2,16 + 2d754: 4913383a mul r9,r9,r4 + 2d758: 1987883a add r3,r3,r6 + 2d75c: 28c7883a add r3,r5,r3 + 2d760: 1980022e bgeu r3,r6,2d76c <__divdf3+0x574> + 2d764: 01000074 movhi r4,1 + 2d768: 4913883a add r9,r9,r4 + 2d76c: 1808d43a srli r4,r3,16 + 2d770: 1806943a slli r3,r3,16 + 2d774: 10bfffcc andi r2,r2,65535 + 2d778: 2253883a add r9,r4,r9 + 2d77c: 1887883a add r3,r3,r2 + 2d780: ba403836 bltu r23,r9,2d864 <__divdf3+0x66c> + 2d784: ba403626 beq r23,r9,2d860 <__divdf3+0x668> + 2d788: 42000054 ori r8,r8,1 + 2d78c: a880ffc4 addi r2,r21,1023 + 2d790: 00bf570e bge zero,r2,2d4f0 <_gp+0xffff0fb8> + 2d794: 40c001cc andi r3,r8,7 + 2d798: 18000726 beq r3,zero,2d7b8 <__divdf3+0x5c0> + 2d79c: 40c003cc andi r3,r8,15 + 2d7a0: 01000104 movi r4,4 + 2d7a4: 19000426 beq r3,r4,2d7b8 <__divdf3+0x5c0> + 2d7a8: 4107883a add r3,r8,r4 + 2d7ac: 1a11803a cmpltu r8,r3,r8 + 2d7b0: 8a23883a add r17,r17,r8 + 2d7b4: 1811883a mov r8,r3 + 2d7b8: 88c0402c andhi r3,r17,256 + 2d7bc: 18000426 beq r3,zero,2d7d0 <__divdf3+0x5d8> + 2d7c0: 00ffc034 movhi r3,65280 + 2d7c4: 18ffffc4 addi r3,r3,-1 + 2d7c8: a8810004 addi r2,r21,1024 + 2d7cc: 88e2703a and r17,r17,r3 + 2d7d0: 00c1ff84 movi r3,2046 + 2d7d4: 18bee316 blt r3,r2,2d364 <_gp+0xffff0e2c> + 2d7d8: 8824977a slli r18,r17,29 + 2d7dc: 4010d0fa srli r8,r8,3 + 2d7e0: 8822927a slli r17,r17,9 + 2d7e4: 1081ffcc andi r2,r2,2047 + 2d7e8: 9224b03a or r18,r18,r8 + 2d7ec: 880ad33a srli r5,r17,12 + 2d7f0: 98c0004c andi r3,r19,1 + 2d7f4: 003edf06 br 2d374 <_gp+0xffff0e3c> + 2d7f8: 8080022c andhi r2,r16,8 + 2d7fc: 10001226 beq r2,zero,2d848 <__divdf3+0x650> + 2d800: 8880022c andhi r2,r17,8 + 2d804: 1000101e bne r2,zero,2d848 <__divdf3+0x650> + 2d808: 00800434 movhi r2,16 + 2d80c: 89400234 orhi r5,r17,8 + 2d810: 10bfffc4 addi r2,r2,-1 + 2d814: b007883a mov r3,r22 + 2d818: 288a703a and r5,r5,r2 + 2d81c: 4025883a mov r18,r8 + 2d820: 003f3106 br 2d4e8 <_gp+0xffff0fb0> + 2d824: 008000c4 movi r2,3 + 2d828: 3880a626 beq r7,r2,2dac4 <__divdf3+0x8cc> + 2d82c: 00800044 movi r2,1 + 2d830: 3880521e bne r7,r2,2d97c <__divdf3+0x784> + 2d834: b807883a mov r3,r23 + 2d838: 0005883a mov r2,zero + 2d83c: 000b883a mov r5,zero + 2d840: 0025883a mov r18,zero + 2d844: 003ecb06 br 2d374 <_gp+0xffff0e3c> + 2d848: 00800434 movhi r2,16 + 2d84c: 81400234 orhi r5,r16,8 + 2d850: 10bfffc4 addi r2,r2,-1 + 2d854: a007883a mov r3,r20 + 2d858: 288a703a and r5,r5,r2 + 2d85c: 003f2206 br 2d4e8 <_gp+0xffff0fb0> + 2d860: 183fca26 beq r3,zero,2d78c <_gp+0xffff1254> + 2d864: e5ef883a add r23,fp,r23 + 2d868: 40bfffc4 addi r2,r8,-1 + 2d86c: bf00392e bgeu r23,fp,2d954 <__divdf3+0x75c> + 2d870: 1011883a mov r8,r2 + 2d874: ba7fc41e bne r23,r9,2d788 <_gp+0xffff1250> + 2d878: b0ffc31e bne r22,r3,2d788 <_gp+0xffff1250> + 2d87c: 003fc306 br 2d78c <_gp+0xffff1254> + 2d880: 143ff604 addi r16,r2,-40 + 2d884: 9c20983a sll r16,r19,r16 + 2d888: 0025883a mov r18,zero + 2d88c: 003ee206 br 2d418 <_gp+0xffff0ee0> + 2d890: d9800315 stw r6,12(sp) + 2d894: d9c00215 stw r7,8(sp) + 2d898: 002ef500 call 2ef50 <__clzsi2> + 2d89c: 10800804 addi r2,r2,32 + 2d8a0: d9c00217 ldw r7,8(sp) + 2d8a4: d9800317 ldw r6,12(sp) + 2d8a8: 003ed106 br 2d3f0 <_gp+0xffff0eb8> + 2d8ac: 147ff604 addi r17,r2,-40 + 2d8b0: 3462983a sll r17,r6,r17 + 2d8b4: 0011883a mov r8,zero + 2d8b8: 003ef506 br 2d490 <_gp+0xffff0f58> + 2d8bc: 3009883a mov r4,r6 + 2d8c0: d9800315 stw r6,12(sp) + 2d8c4: da400115 stw r9,4(sp) + 2d8c8: 002ef500 call 2ef50 <__clzsi2> + 2d8cc: 10800804 addi r2,r2,32 + 2d8d0: da400117 ldw r9,4(sp) + 2d8d4: d9800317 ldw r6,12(sp) + 2d8d8: 003ee306 br 2d468 <_gp+0xffff0f30> + 2d8dc: 85a1883a add r16,r16,r22 + 2d8e0: 8585803a cmpltu r2,r16,r22 + 2d8e4: 1705883a add r2,r2,fp + 2d8e8: 14a5883a add r18,r2,r18 + 2d8ec: 88bfffc4 addi r2,r17,-1 + 2d8f0: e4800c2e bgeu fp,r18,2d924 <__divdf3+0x72c> + 2d8f4: 90c03e36 bltu r18,r3,2d9f0 <__divdf3+0x7f8> + 2d8f8: 1c806926 beq r3,r18,2daa0 <__divdf3+0x8a8> + 2d8fc: 90c7c83a sub r3,r18,r3 + 2d900: 1023883a mov r17,r2 + 2d904: 003f5206 br 2d650 <_gp+0xffff1118> + 2d908: 923f0436 bltu r18,r8,2d51c <_gp+0xffff0fe4> + 2d90c: 800897fa slli r4,r16,31 + 2d910: 9004d07a srli r2,r18,1 + 2d914: 8006d07a srli r3,r16,1 + 2d918: 902097fa slli r16,r18,31 + 2d91c: 20a4b03a or r18,r4,r2 + 2d920: 003f0106 br 2d528 <_gp+0xffff0ff0> + 2d924: e4bff51e bne fp,r18,2d8fc <_gp+0xffff13c4> + 2d928: 85bff22e bgeu r16,r22,2d8f4 <_gp+0xffff13bc> + 2d92c: e0c7c83a sub r3,fp,r3 + 2d930: 1023883a mov r17,r2 + 2d934: 003f4606 br 2d650 <_gp+0xffff1118> + 2d938: 100f883a mov r7,r2 + 2d93c: 003f2b06 br 2d5ec <_gp+0xffff10b4> + 2d940: 180d883a mov r6,r3 + 2d944: 003f1306 br 2d594 <_gp+0xffff105c> + 2d948: 813fe436 bltu r16,r4,2d8dc <_gp+0xffff13a4> + 2d94c: 0007883a mov r3,zero + 2d950: 003f3f06 br 2d650 <_gp+0xffff1118> + 2d954: ba402c36 bltu r23,r9,2da08 <__divdf3+0x810> + 2d958: 4dc05426 beq r9,r23,2daac <__divdf3+0x8b4> + 2d95c: 1011883a mov r8,r2 + 2d960: 003f8906 br 2d788 <_gp+0xffff1250> + 2d964: 023fffc4 movi r8,-1 + 2d968: 003f8806 br 2d78c <_gp+0xffff1254> + 2d96c: 1811883a mov r8,r3 + 2d970: 003f5406 br 2d6c4 <_gp+0xffff118c> + 2d974: 1025883a mov r18,r2 + 2d978: 003f6d06 br 2d730 <_gp+0xffff11f8> + 2d97c: b827883a mov r19,r23 + 2d980: 003f8206 br 2d78c <_gp+0xffff1254> + 2d984: 010007c4 movi r4,31 + 2d988: 20c02616 blt r4,r3,2da24 <__divdf3+0x82c> + 2d98c: 00800804 movi r2,32 + 2d990: 10c5c83a sub r2,r2,r3 + 2d994: 888a983a sll r5,r17,r2 + 2d998: 40c8d83a srl r4,r8,r3 + 2d99c: 4084983a sll r2,r8,r2 + 2d9a0: 88e2d83a srl r17,r17,r3 + 2d9a4: 2906b03a or r3,r5,r4 + 2d9a8: 1004c03a cmpne r2,r2,zero + 2d9ac: 1886b03a or r3,r3,r2 + 2d9b0: 188001cc andi r2,r3,7 + 2d9b4: 10000726 beq r2,zero,2d9d4 <__divdf3+0x7dc> + 2d9b8: 188003cc andi r2,r3,15 + 2d9bc: 01000104 movi r4,4 + 2d9c0: 11000426 beq r2,r4,2d9d4 <__divdf3+0x7dc> + 2d9c4: 1805883a mov r2,r3 + 2d9c8: 10c00104 addi r3,r2,4 + 2d9cc: 1885803a cmpltu r2,r3,r2 + 2d9d0: 88a3883a add r17,r17,r2 + 2d9d4: 8880202c andhi r2,r17,128 + 2d9d8: 10002726 beq r2,zero,2da78 <__divdf3+0x880> + 2d9dc: 98c0004c andi r3,r19,1 + 2d9e0: 00800044 movi r2,1 + 2d9e4: 000b883a mov r5,zero + 2d9e8: 0025883a mov r18,zero + 2d9ec: 003e6106 br 2d374 <_gp+0xffff0e3c> + 2d9f0: 85a1883a add r16,r16,r22 + 2d9f4: 8585803a cmpltu r2,r16,r22 + 2d9f8: 1705883a add r2,r2,fp + 2d9fc: 14a5883a add r18,r2,r18 + 2da00: 8c7fff84 addi r17,r17,-2 + 2da04: 003f1106 br 2d64c <_gp+0xffff1114> + 2da08: b589883a add r4,r22,r22 + 2da0c: 25ad803a cmpltu r22,r4,r22 + 2da10: b739883a add fp,r22,fp + 2da14: 40bfff84 addi r2,r8,-2 + 2da18: bf2f883a add r23,r23,fp + 2da1c: 202d883a mov r22,r4 + 2da20: 003f9306 br 2d870 <_gp+0xffff1338> + 2da24: 013ff844 movi r4,-31 + 2da28: 2085c83a sub r2,r4,r2 + 2da2c: 8888d83a srl r4,r17,r2 + 2da30: 00800804 movi r2,32 + 2da34: 18802126 beq r3,r2,2dabc <__divdf3+0x8c4> + 2da38: 00801004 movi r2,64 + 2da3c: 10c5c83a sub r2,r2,r3 + 2da40: 8884983a sll r2,r17,r2 + 2da44: 1204b03a or r2,r2,r8 + 2da48: 1004c03a cmpne r2,r2,zero + 2da4c: 2084b03a or r2,r4,r2 + 2da50: 144001cc andi r17,r2,7 + 2da54: 88000d1e bne r17,zero,2da8c <__divdf3+0x894> + 2da58: 000b883a mov r5,zero + 2da5c: 1024d0fa srli r18,r2,3 + 2da60: 98c0004c andi r3,r19,1 + 2da64: 0005883a mov r2,zero + 2da68: 9464b03a or r18,r18,r17 + 2da6c: 003e4106 br 2d374 <_gp+0xffff0e3c> + 2da70: 1007883a mov r3,r2 + 2da74: 0023883a mov r17,zero + 2da78: 880a927a slli r5,r17,9 + 2da7c: 1805883a mov r2,r3 + 2da80: 8822977a slli r17,r17,29 + 2da84: 280ad33a srli r5,r5,12 + 2da88: 003ff406 br 2da5c <_gp+0xffff1524> + 2da8c: 10c003cc andi r3,r2,15 + 2da90: 01000104 movi r4,4 + 2da94: 193ff626 beq r3,r4,2da70 <_gp+0xffff1538> + 2da98: 0023883a mov r17,zero + 2da9c: 003fca06 br 2d9c8 <_gp+0xffff1490> + 2daa0: 813fd336 bltu r16,r4,2d9f0 <_gp+0xffff14b8> + 2daa4: 1023883a mov r17,r2 + 2daa8: 003fa806 br 2d94c <_gp+0xffff1414> + 2daac: b0ffd636 bltu r22,r3,2da08 <_gp+0xffff14d0> + 2dab0: 1011883a mov r8,r2 + 2dab4: b0ff341e bne r22,r3,2d788 <_gp+0xffff1250> + 2dab8: 003f3406 br 2d78c <_gp+0xffff1254> + 2dabc: 0005883a mov r2,zero + 2dac0: 003fe006 br 2da44 <_gp+0xffff150c> + 2dac4: 00800434 movhi r2,16 + 2dac8: 89400234 orhi r5,r17,8 + 2dacc: 10bfffc4 addi r2,r2,-1 + 2dad0: b807883a mov r3,r23 + 2dad4: 288a703a and r5,r5,r2 + 2dad8: 4025883a mov r18,r8 + 2dadc: 003e8206 br 2d4e8 <_gp+0xffff0fb0> -0002d9ac <__divdf3>: - 2d9ac: defff204 addi sp,sp,-56 - 2d9b0: dd400915 stw r21,36(sp) - 2d9b4: 282ad53a srli r21,r5,20 - 2d9b8: dd000815 stw r20,32(sp) - 2d9bc: 2828d7fa srli r20,r5,31 - 2d9c0: dc000415 stw r16,16(sp) - 2d9c4: 04000434 movhi r16,16 - 2d9c8: df000c15 stw fp,48(sp) - 2d9cc: 843fffc4 addi r16,r16,-1 - 2d9d0: dfc00d15 stw ra,52(sp) - 2d9d4: ddc00b15 stw r23,44(sp) - 2d9d8: dd800a15 stw r22,40(sp) - 2d9dc: dcc00715 stw r19,28(sp) - 2d9e0: dc800615 stw r18,24(sp) - 2d9e4: dc400515 stw r17,20(sp) - 2d9e8: ad41ffcc andi r21,r21,2047 - 2d9ec: 2c20703a and r16,r5,r16 - 2d9f0: a7003fcc andi fp,r20,255 - 2d9f4: a8006126 beq r21,zero,2db7c <__divdf3+0x1d0> - 2d9f8: 0081ffc4 movi r2,2047 - 2d9fc: 2025883a mov r18,r4 - 2da00: a8803726 beq r21,r2,2dae0 <__divdf3+0x134> - 2da04: 80c00434 orhi r3,r16,16 - 2da08: 180690fa slli r3,r3,3 - 2da0c: 2020d77a srli r16,r4,29 - 2da10: 202490fa slli r18,r4,3 - 2da14: ad7f0044 addi r21,r21,-1023 - 2da18: 80e0b03a or r16,r16,r3 - 2da1c: 0027883a mov r19,zero - 2da20: 0013883a mov r9,zero - 2da24: 3808d53a srli r4,r7,20 - 2da28: 382cd7fa srli r22,r7,31 - 2da2c: 04400434 movhi r17,16 - 2da30: 8c7fffc4 addi r17,r17,-1 - 2da34: 2101ffcc andi r4,r4,2047 - 2da38: 3011883a mov r8,r6 - 2da3c: 3c62703a and r17,r7,r17 - 2da40: b5c03fcc andi r23,r22,255 - 2da44: 20006c26 beq r4,zero,2dbf8 <__divdf3+0x24c> - 2da48: 0081ffc4 movi r2,2047 - 2da4c: 20806426 beq r4,r2,2dbe0 <__divdf3+0x234> - 2da50: 88c00434 orhi r3,r17,16 - 2da54: 180690fa slli r3,r3,3 - 2da58: 3022d77a srli r17,r6,29 - 2da5c: 301090fa slli r8,r6,3 - 2da60: 213f0044 addi r4,r4,-1023 - 2da64: 88e2b03a or r17,r17,r3 - 2da68: 000d883a mov r6,zero - 2da6c: a584f03a xor r2,r20,r22 - 2da70: 34cab03a or r5,r6,r19 - 2da74: 1007883a mov r3,r2 - 2da78: 14c03fcc andi r19,r2,255 - 2da7c: 008003c4 movi r2,15 - 2da80: a92bc83a sub r21,r21,r4 - 2da84: 11409036 bltu r2,r5,2dcc8 <__divdf3+0x31c> - 2da88: 280a90ba slli r5,r5,2 - 2da8c: 008000f4 movhi r2,3 - 2da90: 10b6a804 addi r2,r2,-9568 - 2da94: 288b883a add r5,r5,r2 - 2da98: 28800017 ldw r2,0(r5) - 2da9c: 1000683a jmp r2 - 2daa0: 0002dcc8 cmpgei zero,zero,2931 - 2daa4: 0002db18 cmpnei zero,zero,2924 - 2daa8: 0002dcb8 rdprs zero,zero,2930 - 2daac: 0002db0c andi zero,zero,2924 - 2dab0: 0002dcb8 rdprs zero,zero,2930 - 2dab4: 0002dc8c andi zero,zero,2930 - 2dab8: 0002dcb8 rdprs zero,zero,2930 - 2dabc: 0002db0c andi zero,zero,2924 - 2dac0: 0002db18 cmpnei zero,zero,2924 - 2dac4: 0002db18 cmpnei zero,zero,2924 - 2dac8: 0002dc8c andi zero,zero,2930 - 2dacc: 0002db0c andi zero,zero,2924 - 2dad0: 0002dafc xorhi zero,zero,2923 - 2dad4: 0002dafc xorhi zero,zero,2923 - 2dad8: 0002dafc xorhi zero,zero,2923 - 2dadc: 0002dfac andhi zero,zero,2942 - 2dae0: 2404b03a or r2,r4,r16 - 2dae4: 1000661e bne r2,zero,2dc80 <__divdf3+0x2d4> - 2dae8: 04c00204 movi r19,8 - 2daec: 0021883a mov r16,zero - 2daf0: 0025883a mov r18,zero - 2daf4: 02400084 movi r9,2 - 2daf8: 003fca06 br 2da24 <__divdf3+0x78> - 2dafc: 8023883a mov r17,r16 - 2db00: 9011883a mov r8,r18 - 2db04: e02f883a mov r23,fp - 2db08: 480d883a mov r6,r9 - 2db0c: 00800084 movi r2,2 - 2db10: 3081311e bne r6,r2,2dfd8 <__divdf3+0x62c> - 2db14: b827883a mov r19,r23 - 2db18: 98c0004c andi r3,r19,1 - 2db1c: 0081ffc4 movi r2,2047 - 2db20: 000b883a mov r5,zero - 2db24: 0025883a mov r18,zero - 2db28: 1004953a slli r2,r2,20 - 2db2c: 18c03fcc andi r3,r3,255 - 2db30: 04400434 movhi r17,16 - 2db34: 8c7fffc4 addi r17,r17,-1 - 2db38: 180697fa slli r3,r3,31 - 2db3c: 2c4a703a and r5,r5,r17 - 2db40: 288ab03a or r5,r5,r2 - 2db44: 28c6b03a or r3,r5,r3 - 2db48: 9005883a mov r2,r18 - 2db4c: dfc00d17 ldw ra,52(sp) - 2db50: df000c17 ldw fp,48(sp) - 2db54: ddc00b17 ldw r23,44(sp) - 2db58: dd800a17 ldw r22,40(sp) - 2db5c: dd400917 ldw r21,36(sp) - 2db60: dd000817 ldw r20,32(sp) - 2db64: dcc00717 ldw r19,28(sp) - 2db68: dc800617 ldw r18,24(sp) - 2db6c: dc400517 ldw r17,20(sp) - 2db70: dc000417 ldw r16,16(sp) - 2db74: dec00e04 addi sp,sp,56 - 2db78: f800283a ret - 2db7c: 2404b03a or r2,r4,r16 - 2db80: 2027883a mov r19,r4 - 2db84: 10003926 beq r2,zero,2dc6c <__divdf3+0x2c0> - 2db88: 80012e26 beq r16,zero,2e044 <__divdf3+0x698> - 2db8c: 8009883a mov r4,r16 - 2db90: d9800315 stw r6,12(sp) - 2db94: d9c00215 stw r7,8(sp) - 2db98: 002f7040 call 2f704 <__clzsi2> - 2db9c: d9800317 ldw r6,12(sp) - 2dba0: d9c00217 ldw r7,8(sp) - 2dba4: 10fffd44 addi r3,r2,-11 - 2dba8: 01000704 movi r4,28 - 2dbac: 20c12116 blt r4,r3,2e034 <__divdf3+0x688> - 2dbb0: 01000744 movi r4,29 - 2dbb4: 147ffe04 addi r17,r2,-8 - 2dbb8: 20c9c83a sub r4,r4,r3 - 2dbbc: 8460983a sll r16,r16,r17 - 2dbc0: 9908d83a srl r4,r19,r4 - 2dbc4: 9c64983a sll r18,r19,r17 - 2dbc8: 2420b03a or r16,r4,r16 - 2dbcc: 057f0084 movi r21,-1022 - 2dbd0: a8ebc83a sub r21,r21,r3 - 2dbd4: 0027883a mov r19,zero - 2dbd8: 0013883a mov r9,zero - 2dbdc: 003f9106 br 2da24 <__divdf3+0x78> - 2dbe0: 3444b03a or r2,r6,r17 - 2dbe4: 10001f1e bne r2,zero,2dc64 <__divdf3+0x2b8> - 2dbe8: 0023883a mov r17,zero - 2dbec: 0011883a mov r8,zero - 2dbf0: 01800084 movi r6,2 - 2dbf4: 003f9d06 br 2da6c <__divdf3+0xc0> - 2dbf8: 3444b03a or r2,r6,r17 - 2dbfc: 10001526 beq r2,zero,2dc54 <__divdf3+0x2a8> - 2dc00: 88011b26 beq r17,zero,2e070 <__divdf3+0x6c4> - 2dc04: 8809883a mov r4,r17 - 2dc08: d9800315 stw r6,12(sp) - 2dc0c: da400115 stw r9,4(sp) - 2dc10: 002f7040 call 2f704 <__clzsi2> - 2dc14: d9800317 ldw r6,12(sp) - 2dc18: da400117 ldw r9,4(sp) - 2dc1c: 10fffd44 addi r3,r2,-11 - 2dc20: 01000704 movi r4,28 - 2dc24: 20c10e16 blt r4,r3,2e060 <__divdf3+0x6b4> - 2dc28: 01000744 movi r4,29 - 2dc2c: 123ffe04 addi r8,r2,-8 - 2dc30: 20c9c83a sub r4,r4,r3 - 2dc34: 8a22983a sll r17,r17,r8 - 2dc38: 3108d83a srl r4,r6,r4 - 2dc3c: 3210983a sll r8,r6,r8 - 2dc40: 2462b03a or r17,r4,r17 - 2dc44: 013f0084 movi r4,-1022 - 2dc48: 20c9c83a sub r4,r4,r3 - 2dc4c: 000d883a mov r6,zero - 2dc50: 003f8606 br 2da6c <__divdf3+0xc0> - 2dc54: 0023883a mov r17,zero - 2dc58: 0011883a mov r8,zero - 2dc5c: 01800044 movi r6,1 - 2dc60: 003f8206 br 2da6c <__divdf3+0xc0> - 2dc64: 018000c4 movi r6,3 - 2dc68: 003f8006 br 2da6c <__divdf3+0xc0> - 2dc6c: 04c00104 movi r19,4 - 2dc70: 0021883a mov r16,zero - 2dc74: 0025883a mov r18,zero - 2dc78: 02400044 movi r9,1 - 2dc7c: 003f6906 br 2da24 <__divdf3+0x78> - 2dc80: 04c00304 movi r19,12 - 2dc84: 024000c4 movi r9,3 - 2dc88: 003f6606 br 2da24 <__divdf3+0x78> - 2dc8c: 01400434 movhi r5,16 - 2dc90: 0007883a mov r3,zero - 2dc94: 297fffc4 addi r5,r5,-1 - 2dc98: 04bfffc4 movi r18,-1 - 2dc9c: 0081ffc4 movi r2,2047 - 2dca0: 003fa106 br 2db28 <__divdf3+0x17c> - 2dca4: 00c00044 movi r3,1 - 2dca8: 1887c83a sub r3,r3,r2 - 2dcac: 01000e04 movi r4,56 - 2dcb0: 20c1210e bge r4,r3,2e138 <__divdf3+0x78c> - 2dcb4: 98c0004c andi r3,r19,1 - 2dcb8: 0005883a mov r2,zero - 2dcbc: 000b883a mov r5,zero - 2dcc0: 0025883a mov r18,zero - 2dcc4: 003f9806 br 2db28 <__divdf3+0x17c> - 2dcc8: 8c00fd36 bltu r17,r16,2e0c0 <__divdf3+0x714> - 2dccc: 8440fb26 beq r16,r17,2e0bc <__divdf3+0x710> - 2dcd0: 8007883a mov r3,r16 - 2dcd4: ad7fffc4 addi r21,r21,-1 - 2dcd8: 0021883a mov r16,zero - 2dcdc: 400ad63a srli r5,r8,24 - 2dce0: 8822923a slli r17,r17,8 - 2dce4: 1809883a mov r4,r3 - 2dce8: 402c923a slli r22,r8,8 - 2dcec: 8978b03a or fp,r17,r5 - 2dcf0: e028d43a srli r20,fp,16 - 2dcf4: d8c00015 stw r3,0(sp) - 2dcf8: e5ffffcc andi r23,fp,65535 - 2dcfc: a00b883a mov r5,r20 - 2dd00: 0022a200 call 22a20 <__udivsi3> - 2dd04: d8c00017 ldw r3,0(sp) - 2dd08: a00b883a mov r5,r20 - 2dd0c: d8800315 stw r2,12(sp) - 2dd10: 1809883a mov r4,r3 - 2dd14: 0022a840 call 22a84 <__umodsi3> - 2dd18: d9800317 ldw r6,12(sp) - 2dd1c: 1006943a slli r3,r2,16 - 2dd20: 9004d43a srli r2,r18,16 - 2dd24: b9a3383a mul r17,r23,r6 - 2dd28: 10c4b03a or r2,r2,r3 - 2dd2c: 1440062e bgeu r2,r17,2dd48 <__divdf3+0x39c> - 2dd30: 1705883a add r2,r2,fp - 2dd34: 30ffffc4 addi r3,r6,-1 - 2dd38: 1700ee36 bltu r2,fp,2e0f4 <__divdf3+0x748> - 2dd3c: 1440ed2e bgeu r2,r17,2e0f4 <__divdf3+0x748> - 2dd40: 31bfff84 addi r6,r6,-2 - 2dd44: 1705883a add r2,r2,fp - 2dd48: 1463c83a sub r17,r2,r17 - 2dd4c: a00b883a mov r5,r20 - 2dd50: 8809883a mov r4,r17 - 2dd54: d9800315 stw r6,12(sp) - 2dd58: 0022a200 call 22a20 <__udivsi3> - 2dd5c: a00b883a mov r5,r20 - 2dd60: 8809883a mov r4,r17 - 2dd64: d8800215 stw r2,8(sp) - 2dd68: 0022a840 call 22a84 <__umodsi3> - 2dd6c: d9c00217 ldw r7,8(sp) - 2dd70: 1004943a slli r2,r2,16 - 2dd74: 94bfffcc andi r18,r18,65535 - 2dd78: b9d1383a mul r8,r23,r7 - 2dd7c: 90a4b03a or r18,r18,r2 - 2dd80: d9800317 ldw r6,12(sp) - 2dd84: 9200062e bgeu r18,r8,2dda0 <__divdf3+0x3f4> - 2dd88: 9725883a add r18,r18,fp - 2dd8c: 38bfffc4 addi r2,r7,-1 - 2dd90: 9700d636 bltu r18,fp,2e0ec <__divdf3+0x740> - 2dd94: 9200d52e bgeu r18,r8,2e0ec <__divdf3+0x740> - 2dd98: 39ffff84 addi r7,r7,-2 - 2dd9c: 9725883a add r18,r18,fp - 2dda0: 3004943a slli r2,r6,16 - 2dda4: b012d43a srli r9,r22,16 - 2dda8: b1bfffcc andi r6,r22,65535 - 2ddac: 11e2b03a or r17,r2,r7 - 2ddb0: 8806d43a srli r3,r17,16 - 2ddb4: 893fffcc andi r4,r17,65535 - 2ddb8: 218b383a mul r5,r4,r6 - 2ddbc: 30c5383a mul r2,r6,r3 - 2ddc0: 2249383a mul r4,r4,r9 - 2ddc4: 280ed43a srli r7,r5,16 - 2ddc8: 9225c83a sub r18,r18,r8 - 2ddcc: 2089883a add r4,r4,r2 - 2ddd0: 3909883a add r4,r7,r4 - 2ddd4: 1a47383a mul r3,r3,r9 - 2ddd8: 2080022e bgeu r4,r2,2dde4 <__divdf3+0x438> - 2dddc: 00800074 movhi r2,1 - 2dde0: 1887883a add r3,r3,r2 - 2dde4: 2004d43a srli r2,r4,16 - 2dde8: 2008943a slli r4,r4,16 - 2ddec: 297fffcc andi r5,r5,65535 - 2ddf0: 10c7883a add r3,r2,r3 - 2ddf4: 2149883a add r4,r4,r5 - 2ddf8: 90c0a536 bltu r18,r3,2e090 <__divdf3+0x6e4> - 2ddfc: 90c0bf26 beq r18,r3,2e0fc <__divdf3+0x750> - 2de00: 90c7c83a sub r3,r18,r3 - 2de04: 810fc83a sub r7,r16,r4 - 2de08: 81e5803a cmpltu r18,r16,r7 - 2de0c: 1ca5c83a sub r18,r3,r18 - 2de10: e480c126 beq fp,r18,2e118 <__divdf3+0x76c> - 2de14: a00b883a mov r5,r20 - 2de18: 9009883a mov r4,r18 - 2de1c: d9800315 stw r6,12(sp) - 2de20: d9c00215 stw r7,8(sp) - 2de24: da400115 stw r9,4(sp) - 2de28: 0022a200 call 22a20 <__udivsi3> - 2de2c: a00b883a mov r5,r20 - 2de30: 9009883a mov r4,r18 - 2de34: d8800015 stw r2,0(sp) - 2de38: 0022a840 call 22a84 <__umodsi3> - 2de3c: d9c00217 ldw r7,8(sp) - 2de40: da000017 ldw r8,0(sp) - 2de44: 1006943a slli r3,r2,16 - 2de48: 3804d43a srli r2,r7,16 - 2de4c: ba21383a mul r16,r23,r8 - 2de50: d9800317 ldw r6,12(sp) - 2de54: 10c4b03a or r2,r2,r3 - 2de58: da400117 ldw r9,4(sp) - 2de5c: 1400062e bgeu r2,r16,2de78 <__divdf3+0x4cc> - 2de60: 1705883a add r2,r2,fp - 2de64: 40ffffc4 addi r3,r8,-1 - 2de68: 1700ad36 bltu r2,fp,2e120 <__divdf3+0x774> - 2de6c: 1400ac2e bgeu r2,r16,2e120 <__divdf3+0x774> - 2de70: 423fff84 addi r8,r8,-2 - 2de74: 1705883a add r2,r2,fp - 2de78: 1421c83a sub r16,r2,r16 - 2de7c: a00b883a mov r5,r20 - 2de80: 8009883a mov r4,r16 - 2de84: d9800315 stw r6,12(sp) - 2de88: d9c00215 stw r7,8(sp) - 2de8c: da000015 stw r8,0(sp) - 2de90: da400115 stw r9,4(sp) - 2de94: 0022a200 call 22a20 <__udivsi3> - 2de98: 8009883a mov r4,r16 - 2de9c: a00b883a mov r5,r20 - 2dea0: 1025883a mov r18,r2 - 2dea4: 0022a840 call 22a84 <__umodsi3> - 2dea8: d9c00217 ldw r7,8(sp) - 2deac: 1004943a slli r2,r2,16 - 2deb0: bcaf383a mul r23,r23,r18 - 2deb4: 393fffcc andi r4,r7,65535 - 2deb8: 2088b03a or r4,r4,r2 - 2debc: d9800317 ldw r6,12(sp) - 2dec0: da000017 ldw r8,0(sp) - 2dec4: da400117 ldw r9,4(sp) - 2dec8: 25c0062e bgeu r4,r23,2dee4 <__divdf3+0x538> - 2decc: 2709883a add r4,r4,fp - 2ded0: 90bfffc4 addi r2,r18,-1 - 2ded4: 27009436 bltu r4,fp,2e128 <__divdf3+0x77c> - 2ded8: 25c0932e bgeu r4,r23,2e128 <__divdf3+0x77c> - 2dedc: 94bfff84 addi r18,r18,-2 - 2dee0: 2709883a add r4,r4,fp - 2dee4: 4004943a slli r2,r8,16 - 2dee8: 25efc83a sub r23,r4,r23 - 2deec: 1490b03a or r8,r2,r18 - 2def0: 4008d43a srli r4,r8,16 - 2def4: 40ffffcc andi r3,r8,65535 - 2def8: 30c5383a mul r2,r6,r3 - 2defc: 1a47383a mul r3,r3,r9 - 2df00: 310d383a mul r6,r6,r4 - 2df04: 100ad43a srli r5,r2,16 - 2df08: 4913383a mul r9,r9,r4 - 2df0c: 1987883a add r3,r3,r6 - 2df10: 28c7883a add r3,r5,r3 - 2df14: 1980022e bgeu r3,r6,2df20 <__divdf3+0x574> - 2df18: 01000074 movhi r4,1 - 2df1c: 4913883a add r9,r9,r4 - 2df20: 1808d43a srli r4,r3,16 - 2df24: 1806943a slli r3,r3,16 - 2df28: 10bfffcc andi r2,r2,65535 - 2df2c: 2253883a add r9,r4,r9 - 2df30: 1887883a add r3,r3,r2 - 2df34: ba403836 bltu r23,r9,2e018 <__divdf3+0x66c> - 2df38: ba403626 beq r23,r9,2e014 <__divdf3+0x668> - 2df3c: 42000054 ori r8,r8,1 - 2df40: a880ffc4 addi r2,r21,1023 - 2df44: 00bf570e bge zero,r2,2dca4 <__divdf3+0x2f8> - 2df48: 40c001cc andi r3,r8,7 - 2df4c: 18000726 beq r3,zero,2df6c <__divdf3+0x5c0> - 2df50: 40c003cc andi r3,r8,15 - 2df54: 01000104 movi r4,4 - 2df58: 19000426 beq r3,r4,2df6c <__divdf3+0x5c0> - 2df5c: 4107883a add r3,r8,r4 - 2df60: 1a11803a cmpltu r8,r3,r8 - 2df64: 8a23883a add r17,r17,r8 - 2df68: 1811883a mov r8,r3 - 2df6c: 88c0402c andhi r3,r17,256 - 2df70: 18000426 beq r3,zero,2df84 <__divdf3+0x5d8> - 2df74: 00ffc034 movhi r3,65280 - 2df78: 18ffffc4 addi r3,r3,-1 - 2df7c: a8810004 addi r2,r21,1024 - 2df80: 88e2703a and r17,r17,r3 - 2df84: 00c1ff84 movi r3,2046 - 2df88: 18bee316 blt r3,r2,2db18 <__divdf3+0x16c> - 2df8c: 8824977a slli r18,r17,29 - 2df90: 4010d0fa srli r8,r8,3 - 2df94: 8822927a slli r17,r17,9 - 2df98: 1081ffcc andi r2,r2,2047 - 2df9c: 9224b03a or r18,r18,r8 - 2dfa0: 880ad33a srli r5,r17,12 - 2dfa4: 98c0004c andi r3,r19,1 - 2dfa8: 003edf06 br 2db28 <__divdf3+0x17c> - 2dfac: 8080022c andhi r2,r16,8 - 2dfb0: 10001226 beq r2,zero,2dffc <__divdf3+0x650> - 2dfb4: 8880022c andhi r2,r17,8 - 2dfb8: 1000101e bne r2,zero,2dffc <__divdf3+0x650> - 2dfbc: 00800434 movhi r2,16 - 2dfc0: 89400234 orhi r5,r17,8 - 2dfc4: 10bfffc4 addi r2,r2,-1 - 2dfc8: b007883a mov r3,r22 - 2dfcc: 288a703a and r5,r5,r2 - 2dfd0: 4025883a mov r18,r8 - 2dfd4: 003f3106 br 2dc9c <__divdf3+0x2f0> - 2dfd8: 008000c4 movi r2,3 - 2dfdc: 3080a626 beq r6,r2,2e278 <__divdf3+0x8cc> - 2dfe0: 00800044 movi r2,1 - 2dfe4: 3080521e bne r6,r2,2e130 <__divdf3+0x784> - 2dfe8: b807883a mov r3,r23 - 2dfec: 0005883a mov r2,zero - 2dff0: 000b883a mov r5,zero - 2dff4: 0025883a mov r18,zero - 2dff8: 003ecb06 br 2db28 <__divdf3+0x17c> - 2dffc: 00800434 movhi r2,16 - 2e000: 81400234 orhi r5,r16,8 - 2e004: 10bfffc4 addi r2,r2,-1 - 2e008: a007883a mov r3,r20 - 2e00c: 288a703a and r5,r5,r2 - 2e010: 003f2206 br 2dc9c <__divdf3+0x2f0> - 2e014: 183fca26 beq r3,zero,2df40 <__divdf3+0x594> - 2e018: e5ef883a add r23,fp,r23 - 2e01c: 40bfffc4 addi r2,r8,-1 - 2e020: bf00392e bgeu r23,fp,2e108 <__divdf3+0x75c> - 2e024: 1011883a mov r8,r2 - 2e028: ba7fc41e bne r23,r9,2df3c <__divdf3+0x590> - 2e02c: b0ffc31e bne r22,r3,2df3c <__divdf3+0x590> - 2e030: 003fc306 br 2df40 <__divdf3+0x594> - 2e034: 10bff604 addi r2,r2,-40 - 2e038: 98a0983a sll r16,r19,r2 - 2e03c: 0025883a mov r18,zero - 2e040: 003ee206 br 2dbcc <__divdf3+0x220> - 2e044: d9800315 stw r6,12(sp) - 2e048: d9c00215 stw r7,8(sp) - 2e04c: 002f7040 call 2f704 <__clzsi2> - 2e050: 10800804 addi r2,r2,32 - 2e054: d9c00217 ldw r7,8(sp) - 2e058: d9800317 ldw r6,12(sp) - 2e05c: 003ed106 br 2dba4 <__divdf3+0x1f8> - 2e060: 10bff604 addi r2,r2,-40 - 2e064: 30a2983a sll r17,r6,r2 - 2e068: 0011883a mov r8,zero - 2e06c: 003ef506 br 2dc44 <__divdf3+0x298> - 2e070: 3009883a mov r4,r6 - 2e074: d9800315 stw r6,12(sp) - 2e078: da400115 stw r9,4(sp) - 2e07c: 002f7040 call 2f704 <__clzsi2> - 2e080: 10800804 addi r2,r2,32 - 2e084: da400117 ldw r9,4(sp) - 2e088: d9800317 ldw r6,12(sp) - 2e08c: 003ee306 br 2dc1c <__divdf3+0x270> - 2e090: 85a1883a add r16,r16,r22 - 2e094: 8585803a cmpltu r2,r16,r22 - 2e098: 1705883a add r2,r2,fp - 2e09c: 14a5883a add r18,r2,r18 - 2e0a0: 88bfffc4 addi r2,r17,-1 - 2e0a4: e4800c2e bgeu fp,r18,2e0d8 <__divdf3+0x72c> - 2e0a8: 90c03e36 bltu r18,r3,2e1a4 <__divdf3+0x7f8> - 2e0ac: 1c806926 beq r3,r18,2e254 <__divdf3+0x8a8> - 2e0b0: 90c7c83a sub r3,r18,r3 - 2e0b4: 1023883a mov r17,r2 - 2e0b8: 003f5206 br 2de04 <__divdf3+0x458> - 2e0bc: 923f0436 bltu r18,r8,2dcd0 <__divdf3+0x324> - 2e0c0: 800897fa slli r4,r16,31 - 2e0c4: 9004d07a srli r2,r18,1 - 2e0c8: 8006d07a srli r3,r16,1 - 2e0cc: 902097fa slli r16,r18,31 - 2e0d0: 20a4b03a or r18,r4,r2 - 2e0d4: 003f0106 br 2dcdc <__divdf3+0x330> - 2e0d8: e4bff51e bne fp,r18,2e0b0 <__divdf3+0x704> - 2e0dc: 85bff22e bgeu r16,r22,2e0a8 <__divdf3+0x6fc> - 2e0e0: e0c7c83a sub r3,fp,r3 - 2e0e4: 1023883a mov r17,r2 - 2e0e8: 003f4606 br 2de04 <__divdf3+0x458> - 2e0ec: 100f883a mov r7,r2 - 2e0f0: 003f2b06 br 2dda0 <__divdf3+0x3f4> - 2e0f4: 180d883a mov r6,r3 - 2e0f8: 003f1306 br 2dd48 <__divdf3+0x39c> - 2e0fc: 813fe436 bltu r16,r4,2e090 <__divdf3+0x6e4> - 2e100: 0007883a mov r3,zero - 2e104: 003f3f06 br 2de04 <__divdf3+0x458> - 2e108: ba402c36 bltu r23,r9,2e1bc <__divdf3+0x810> - 2e10c: 4dc05426 beq r9,r23,2e260 <__divdf3+0x8b4> - 2e110: 1011883a mov r8,r2 - 2e114: 003f8906 br 2df3c <__divdf3+0x590> - 2e118: 023fffc4 movi r8,-1 - 2e11c: 003f8806 br 2df40 <__divdf3+0x594> - 2e120: 1811883a mov r8,r3 - 2e124: 003f5406 br 2de78 <__divdf3+0x4cc> - 2e128: 1025883a mov r18,r2 - 2e12c: 003f6d06 br 2dee4 <__divdf3+0x538> - 2e130: b827883a mov r19,r23 - 2e134: 003f8206 br 2df40 <__divdf3+0x594> - 2e138: 010007c4 movi r4,31 - 2e13c: 20c02616 blt r4,r3,2e1d8 <__divdf3+0x82c> - 2e140: 00800804 movi r2,32 - 2e144: 10c5c83a sub r2,r2,r3 - 2e148: 888a983a sll r5,r17,r2 - 2e14c: 40c8d83a srl r4,r8,r3 - 2e150: 4084983a sll r2,r8,r2 - 2e154: 88e2d83a srl r17,r17,r3 - 2e158: 2906b03a or r3,r5,r4 - 2e15c: 1004c03a cmpne r2,r2,zero - 2e160: 1886b03a or r3,r3,r2 - 2e164: 188001cc andi r2,r3,7 - 2e168: 10000726 beq r2,zero,2e188 <__divdf3+0x7dc> - 2e16c: 188003cc andi r2,r3,15 - 2e170: 01000104 movi r4,4 - 2e174: 11000426 beq r2,r4,2e188 <__divdf3+0x7dc> - 2e178: 1805883a mov r2,r3 - 2e17c: 10c00104 addi r3,r2,4 - 2e180: 1885803a cmpltu r2,r3,r2 - 2e184: 88a3883a add r17,r17,r2 - 2e188: 8880202c andhi r2,r17,128 - 2e18c: 10002726 beq r2,zero,2e22c <__divdf3+0x880> - 2e190: 98c0004c andi r3,r19,1 - 2e194: 00800044 movi r2,1 - 2e198: 000b883a mov r5,zero - 2e19c: 0025883a mov r18,zero - 2e1a0: 003e6106 br 2db28 <__divdf3+0x17c> - 2e1a4: 85a1883a add r16,r16,r22 - 2e1a8: 8585803a cmpltu r2,r16,r22 - 2e1ac: 1705883a add r2,r2,fp - 2e1b0: 14a5883a add r18,r2,r18 - 2e1b4: 8c7fff84 addi r17,r17,-2 - 2e1b8: 003f1106 br 2de00 <__divdf3+0x454> - 2e1bc: b589883a add r4,r22,r22 - 2e1c0: 25ad803a cmpltu r22,r4,r22 - 2e1c4: b739883a add fp,r22,fp - 2e1c8: 40bfff84 addi r2,r8,-2 - 2e1cc: bf2f883a add r23,r23,fp - 2e1d0: 202d883a mov r22,r4 - 2e1d4: 003f9306 br 2e024 <__divdf3+0x678> - 2e1d8: 013ff844 movi r4,-31 - 2e1dc: 2085c83a sub r2,r4,r2 - 2e1e0: 8888d83a srl r4,r17,r2 - 2e1e4: 00800804 movi r2,32 - 2e1e8: 18802126 beq r3,r2,2e270 <__divdf3+0x8c4> - 2e1ec: 00801004 movi r2,64 - 2e1f0: 10c5c83a sub r2,r2,r3 - 2e1f4: 8884983a sll r2,r17,r2 - 2e1f8: 1204b03a or r2,r2,r8 - 2e1fc: 1004c03a cmpne r2,r2,zero - 2e200: 2084b03a or r2,r4,r2 - 2e204: 144001cc andi r17,r2,7 - 2e208: 88000d1e bne r17,zero,2e240 <__divdf3+0x894> - 2e20c: 000b883a mov r5,zero - 2e210: 1024d0fa srli r18,r2,3 - 2e214: 98c0004c andi r3,r19,1 - 2e218: 0005883a mov r2,zero - 2e21c: 9464b03a or r18,r18,r17 - 2e220: 003e4106 br 2db28 <__divdf3+0x17c> - 2e224: 1007883a mov r3,r2 - 2e228: 0023883a mov r17,zero - 2e22c: 880a927a slli r5,r17,9 - 2e230: 1805883a mov r2,r3 - 2e234: 8822977a slli r17,r17,29 - 2e238: 280ad33a srli r5,r5,12 - 2e23c: 003ff406 br 2e210 <__divdf3+0x864> - 2e240: 10c003cc andi r3,r2,15 - 2e244: 01000104 movi r4,4 - 2e248: 193ff626 beq r3,r4,2e224 <__divdf3+0x878> - 2e24c: 0023883a mov r17,zero - 2e250: 003fca06 br 2e17c <__divdf3+0x7d0> - 2e254: 813fd336 bltu r16,r4,2e1a4 <__divdf3+0x7f8> - 2e258: 1023883a mov r17,r2 - 2e25c: 003fa806 br 2e100 <__divdf3+0x754> - 2e260: b0ffd636 bltu r22,r3,2e1bc <__divdf3+0x810> - 2e264: 1011883a mov r8,r2 - 2e268: b0ff341e bne r22,r3,2df3c <__divdf3+0x590> - 2e26c: 003f3406 br 2df40 <__divdf3+0x594> - 2e270: 0005883a mov r2,zero - 2e274: 003fe006 br 2e1f8 <__divdf3+0x84c> - 2e278: 00800434 movhi r2,16 - 2e27c: 89400234 orhi r5,r17,8 - 2e280: 10bfffc4 addi r2,r2,-1 - 2e284: b807883a mov r3,r23 - 2e288: 288a703a and r5,r5,r2 - 2e28c: 4025883a mov r18,r8 - 2e290: 003e8206 br 2dc9c <__divdf3+0x2f0> +0002dae0 <__eqdf2>: + 2dae0: 2804d53a srli r2,r5,20 + 2dae4: 3806d53a srli r3,r7,20 + 2dae8: 02000434 movhi r8,16 + 2daec: 423fffc4 addi r8,r8,-1 + 2daf0: 1081ffcc andi r2,r2,2047 + 2daf4: 0281ffc4 movi r10,2047 + 2daf8: 2a12703a and r9,r5,r8 + 2dafc: 18c1ffcc andi r3,r3,2047 + 2db00: 3a10703a and r8,r7,r8 + 2db04: 280ad7fa srli r5,r5,31 + 2db08: 380ed7fa srli r7,r7,31 + 2db0c: 12801026 beq r2,r10,2db50 <__eqdf2+0x70> + 2db10: 0281ffc4 movi r10,2047 + 2db14: 1a800a26 beq r3,r10,2db40 <__eqdf2+0x60> + 2db18: 10c00226 beq r2,r3,2db24 <__eqdf2+0x44> + 2db1c: 00800044 movi r2,1 + 2db20: f800283a ret + 2db24: 4a3ffd1e bne r9,r8,2db1c <_gp+0xffff15e4> + 2db28: 21bffc1e bne r4,r6,2db1c <_gp+0xffff15e4> + 2db2c: 29c00c26 beq r5,r7,2db60 <__eqdf2+0x80> + 2db30: 103ffa1e bne r2,zero,2db1c <_gp+0xffff15e4> + 2db34: 2244b03a or r2,r4,r9 + 2db38: 1004c03a cmpne r2,r2,zero + 2db3c: f800283a ret + 2db40: 3214b03a or r10,r6,r8 + 2db44: 503ff426 beq r10,zero,2db18 <_gp+0xffff15e0> + 2db48: 00800044 movi r2,1 + 2db4c: f800283a ret + 2db50: 2254b03a or r10,r4,r9 + 2db54: 503fee26 beq r10,zero,2db10 <_gp+0xffff15d8> + 2db58: 00800044 movi r2,1 + 2db5c: f800283a ret + 2db60: 0005883a mov r2,zero + 2db64: f800283a ret -0002e294 <__eqdf2>: - 2e294: 2804d53a srli r2,r5,20 - 2e298: 3806d53a srli r3,r7,20 - 2e29c: 02000434 movhi r8,16 - 2e2a0: 423fffc4 addi r8,r8,-1 - 2e2a4: 1081ffcc andi r2,r2,2047 - 2e2a8: 0281ffc4 movi r10,2047 - 2e2ac: 2a12703a and r9,r5,r8 - 2e2b0: 18c1ffcc andi r3,r3,2047 - 2e2b4: 3a10703a and r8,r7,r8 - 2e2b8: 280ad7fa srli r5,r5,31 - 2e2bc: 380ed7fa srli r7,r7,31 - 2e2c0: 12801026 beq r2,r10,2e304 <__eqdf2+0x70> - 2e2c4: 0281ffc4 movi r10,2047 - 2e2c8: 1a800a26 beq r3,r10,2e2f4 <__eqdf2+0x60> - 2e2cc: 10c00226 beq r2,r3,2e2d8 <__eqdf2+0x44> - 2e2d0: 00800044 movi r2,1 - 2e2d4: f800283a ret - 2e2d8: 4a3ffd1e bne r9,r8,2e2d0 <__eqdf2+0x3c> - 2e2dc: 21bffc1e bne r4,r6,2e2d0 <__eqdf2+0x3c> - 2e2e0: 29c00c26 beq r5,r7,2e314 <__eqdf2+0x80> - 2e2e4: 103ffa1e bne r2,zero,2e2d0 <__eqdf2+0x3c> - 2e2e8: 2244b03a or r2,r4,r9 - 2e2ec: 1004c03a cmpne r2,r2,zero - 2e2f0: f800283a ret - 2e2f4: 3214b03a or r10,r6,r8 - 2e2f8: 503ff426 beq r10,zero,2e2cc <__eqdf2+0x38> - 2e2fc: 00800044 movi r2,1 - 2e300: f800283a ret - 2e304: 2254b03a or r10,r4,r9 - 2e308: 503fee26 beq r10,zero,2e2c4 <__eqdf2+0x30> - 2e30c: 00800044 movi r2,1 - 2e310: f800283a ret - 2e314: 0005883a mov r2,zero - 2e318: f800283a ret +0002db68 <__gedf2>: + 2db68: 2804d53a srli r2,r5,20 + 2db6c: 3806d53a srli r3,r7,20 + 2db70: 02000434 movhi r8,16 + 2db74: 423fffc4 addi r8,r8,-1 + 2db78: 1081ffcc andi r2,r2,2047 + 2db7c: 0241ffc4 movi r9,2047 + 2db80: 2a14703a and r10,r5,r8 + 2db84: 18c1ffcc andi r3,r3,2047 + 2db88: 3a10703a and r8,r7,r8 + 2db8c: 280ad7fa srli r5,r5,31 + 2db90: 380ed7fa srli r7,r7,31 + 2db94: 12401d26 beq r2,r9,2dc0c <__gedf2+0xa4> + 2db98: 0241ffc4 movi r9,2047 + 2db9c: 1a401226 beq r3,r9,2dbe8 <__gedf2+0x80> + 2dba0: 1000081e bne r2,zero,2dbc4 <__gedf2+0x5c> + 2dba4: 2296b03a or r11,r4,r10 + 2dba8: 5813003a cmpeq r9,r11,zero + 2dbac: 1800091e bne r3,zero,2dbd4 <__gedf2+0x6c> + 2dbb0: 3218b03a or r12,r6,r8 + 2dbb4: 6000071e bne r12,zero,2dbd4 <__gedf2+0x6c> + 2dbb8: 0005883a mov r2,zero + 2dbbc: 5800101e bne r11,zero,2dc00 <__gedf2+0x98> + 2dbc0: f800283a ret + 2dbc4: 18000c1e bne r3,zero,2dbf8 <__gedf2+0x90> + 2dbc8: 3212b03a or r9,r6,r8 + 2dbcc: 48000c26 beq r9,zero,2dc00 <__gedf2+0x98> + 2dbd0: 0013883a mov r9,zero + 2dbd4: 39c03fcc andi r7,r7,255 + 2dbd8: 48000826 beq r9,zero,2dbfc <__gedf2+0x94> + 2dbdc: 38000926 beq r7,zero,2dc04 <__gedf2+0x9c> + 2dbe0: 00800044 movi r2,1 + 2dbe4: f800283a ret + 2dbe8: 3212b03a or r9,r6,r8 + 2dbec: 483fec26 beq r9,zero,2dba0 <_gp+0xffff1668> + 2dbf0: 00bfff84 movi r2,-2 + 2dbf4: f800283a ret + 2dbf8: 39c03fcc andi r7,r7,255 + 2dbfc: 29c00626 beq r5,r7,2dc18 <__gedf2+0xb0> + 2dc00: 283ff726 beq r5,zero,2dbe0 <_gp+0xffff16a8> + 2dc04: 00bfffc4 movi r2,-1 + 2dc08: f800283a ret + 2dc0c: 2292b03a or r9,r4,r10 + 2dc10: 483fe126 beq r9,zero,2db98 <_gp+0xffff1660> + 2dc14: 003ff606 br 2dbf0 <_gp+0xffff16b8> + 2dc18: 18bff916 blt r3,r2,2dc00 <_gp+0xffff16c8> + 2dc1c: 10c00316 blt r2,r3,2dc2c <__gedf2+0xc4> + 2dc20: 42bff736 bltu r8,r10,2dc00 <_gp+0xffff16c8> + 2dc24: 52000326 beq r10,r8,2dc34 <__gedf2+0xcc> + 2dc28: 5200042e bgeu r10,r8,2dc3c <__gedf2+0xd4> + 2dc2c: 283fec1e bne r5,zero,2dbe0 <_gp+0xffff16a8> + 2dc30: 003ff406 br 2dc04 <_gp+0xffff16cc> + 2dc34: 313ff236 bltu r6,r4,2dc00 <_gp+0xffff16c8> + 2dc38: 21bffc36 bltu r4,r6,2dc2c <_gp+0xffff16f4> + 2dc3c: 0005883a mov r2,zero + 2dc40: f800283a ret -0002e31c <__gedf2>: - 2e31c: 2804d53a srli r2,r5,20 - 2e320: 3806d53a srli r3,r7,20 - 2e324: 02000434 movhi r8,16 - 2e328: 423fffc4 addi r8,r8,-1 - 2e32c: 1081ffcc andi r2,r2,2047 - 2e330: 0241ffc4 movi r9,2047 - 2e334: 2a14703a and r10,r5,r8 - 2e338: 18c1ffcc andi r3,r3,2047 - 2e33c: 3a10703a and r8,r7,r8 - 2e340: 280ad7fa srli r5,r5,31 - 2e344: 380ed7fa srli r7,r7,31 - 2e348: 12401d26 beq r2,r9,2e3c0 <__gedf2+0xa4> - 2e34c: 0241ffc4 movi r9,2047 - 2e350: 1a401226 beq r3,r9,2e39c <__gedf2+0x80> - 2e354: 1000081e bne r2,zero,2e378 <__gedf2+0x5c> - 2e358: 2296b03a or r11,r4,r10 - 2e35c: 5813003a cmpeq r9,r11,zero - 2e360: 1800091e bne r3,zero,2e388 <__gedf2+0x6c> - 2e364: 3218b03a or r12,r6,r8 - 2e368: 6000071e bne r12,zero,2e388 <__gedf2+0x6c> - 2e36c: 0005883a mov r2,zero - 2e370: 5800101e bne r11,zero,2e3b4 <__gedf2+0x98> - 2e374: f800283a ret - 2e378: 18000c1e bne r3,zero,2e3ac <__gedf2+0x90> - 2e37c: 3212b03a or r9,r6,r8 - 2e380: 48000c26 beq r9,zero,2e3b4 <__gedf2+0x98> - 2e384: 0013883a mov r9,zero - 2e388: 39c03fcc andi r7,r7,255 - 2e38c: 48000826 beq r9,zero,2e3b0 <__gedf2+0x94> - 2e390: 38000926 beq r7,zero,2e3b8 <__gedf2+0x9c> - 2e394: 00800044 movi r2,1 - 2e398: f800283a ret - 2e39c: 3212b03a or r9,r6,r8 - 2e3a0: 483fec26 beq r9,zero,2e354 <__gedf2+0x38> - 2e3a4: 00bfff84 movi r2,-2 - 2e3a8: f800283a ret - 2e3ac: 39c03fcc andi r7,r7,255 - 2e3b0: 29c00626 beq r5,r7,2e3cc <__gedf2+0xb0> - 2e3b4: 283ff726 beq r5,zero,2e394 <__gedf2+0x78> - 2e3b8: 00bfffc4 movi r2,-1 - 2e3bc: f800283a ret - 2e3c0: 2292b03a or r9,r4,r10 - 2e3c4: 483fe126 beq r9,zero,2e34c <__gedf2+0x30> - 2e3c8: 003ff606 br 2e3a4 <__gedf2+0x88> - 2e3cc: 18bff916 blt r3,r2,2e3b4 <__gedf2+0x98> - 2e3d0: 10c00316 blt r2,r3,2e3e0 <__gedf2+0xc4> - 2e3d4: 42bff736 bltu r8,r10,2e3b4 <__gedf2+0x98> - 2e3d8: 52000326 beq r10,r8,2e3e8 <__gedf2+0xcc> - 2e3dc: 5200042e bgeu r10,r8,2e3f0 <__gedf2+0xd4> - 2e3e0: 283fec1e bne r5,zero,2e394 <__gedf2+0x78> - 2e3e4: 003ff406 br 2e3b8 <__gedf2+0x9c> - 2e3e8: 313ff236 bltu r6,r4,2e3b4 <__gedf2+0x98> - 2e3ec: 21bffc36 bltu r4,r6,2e3e0 <__gedf2+0xc4> +0002dc44 <__ledf2>: + 2dc44: 2804d53a srli r2,r5,20 + 2dc48: 3810d53a srli r8,r7,20 + 2dc4c: 00c00434 movhi r3,16 + 2dc50: 18ffffc4 addi r3,r3,-1 + 2dc54: 1081ffcc andi r2,r2,2047 + 2dc58: 0241ffc4 movi r9,2047 + 2dc5c: 28d4703a and r10,r5,r3 + 2dc60: 4201ffcc andi r8,r8,2047 + 2dc64: 38c6703a and r3,r7,r3 + 2dc68: 280ad7fa srli r5,r5,31 + 2dc6c: 380ed7fa srli r7,r7,31 + 2dc70: 12401f26 beq r2,r9,2dcf0 <__ledf2+0xac> + 2dc74: 0241ffc4 movi r9,2047 + 2dc78: 42401426 beq r8,r9,2dccc <__ledf2+0x88> + 2dc7c: 1000091e bne r2,zero,2dca4 <__ledf2+0x60> + 2dc80: 2296b03a or r11,r4,r10 + 2dc84: 5813003a cmpeq r9,r11,zero + 2dc88: 29403fcc andi r5,r5,255 + 2dc8c: 40000a1e bne r8,zero,2dcb8 <__ledf2+0x74> + 2dc90: 30d8b03a or r12,r6,r3 + 2dc94: 6000081e bne r12,zero,2dcb8 <__ledf2+0x74> + 2dc98: 0005883a mov r2,zero + 2dc9c: 5800111e bne r11,zero,2dce4 <__ledf2+0xa0> + 2dca0: f800283a ret + 2dca4: 29403fcc andi r5,r5,255 + 2dca8: 40000c1e bne r8,zero,2dcdc <__ledf2+0x98> + 2dcac: 30d2b03a or r9,r6,r3 + 2dcb0: 48000c26 beq r9,zero,2dce4 <__ledf2+0xa0> + 2dcb4: 0013883a mov r9,zero + 2dcb8: 39c03fcc andi r7,r7,255 + 2dcbc: 48000826 beq r9,zero,2dce0 <__ledf2+0x9c> + 2dcc0: 38001126 beq r7,zero,2dd08 <__ledf2+0xc4> + 2dcc4: 00800044 movi r2,1 + 2dcc8: f800283a ret + 2dccc: 30d2b03a or r9,r6,r3 + 2dcd0: 483fea26 beq r9,zero,2dc7c <_gp+0xffff1744> + 2dcd4: 00800084 movi r2,2 + 2dcd8: f800283a ret + 2dcdc: 39c03fcc andi r7,r7,255 + 2dce0: 39400726 beq r7,r5,2dd00 <__ledf2+0xbc> + 2dce4: 2800081e bne r5,zero,2dd08 <__ledf2+0xc4> + 2dce8: 00800044 movi r2,1 + 2dcec: f800283a ret + 2dcf0: 2292b03a or r9,r4,r10 + 2dcf4: 483fdf26 beq r9,zero,2dc74 <_gp+0xffff173c> + 2dcf8: 00800084 movi r2,2 + 2dcfc: f800283a ret + 2dd00: 4080030e bge r8,r2,2dd10 <__ledf2+0xcc> + 2dd04: 383fef26 beq r7,zero,2dcc4 <_gp+0xffff178c> + 2dd08: 00bfffc4 movi r2,-1 + 2dd0c: f800283a ret + 2dd10: 123feb16 blt r2,r8,2dcc0 <_gp+0xffff1788> + 2dd14: 1abff336 bltu r3,r10,2dce4 <_gp+0xffff17ac> + 2dd18: 50c00326 beq r10,r3,2dd28 <__ledf2+0xe4> + 2dd1c: 50c0042e bgeu r10,r3,2dd30 <__ledf2+0xec> + 2dd20: 283fe81e bne r5,zero,2dcc4 <_gp+0xffff178c> + 2dd24: 003ff806 br 2dd08 <_gp+0xffff17d0> + 2dd28: 313fee36 bltu r6,r4,2dce4 <_gp+0xffff17ac> + 2dd2c: 21bffc36 bltu r4,r6,2dd20 <_gp+0xffff17e8> + 2dd30: 0005883a mov r2,zero + 2dd34: f800283a ret + +0002dd38 <__muldf3>: + 2dd38: defff304 addi sp,sp,-52 + 2dd3c: 2804d53a srli r2,r5,20 + 2dd40: dd800915 stw r22,36(sp) + 2dd44: 282cd7fa srli r22,r5,31 + 2dd48: dc000315 stw r16,12(sp) + 2dd4c: 04000434 movhi r16,16 + 2dd50: dd400815 stw r21,32(sp) + 2dd54: dc800515 stw r18,20(sp) + 2dd58: 843fffc4 addi r16,r16,-1 + 2dd5c: dfc00c15 stw ra,48(sp) + 2dd60: df000b15 stw fp,44(sp) + 2dd64: ddc00a15 stw r23,40(sp) + 2dd68: dd000715 stw r20,28(sp) + 2dd6c: dcc00615 stw r19,24(sp) + 2dd70: dc400415 stw r17,16(sp) + 2dd74: 1481ffcc andi r18,r2,2047 + 2dd78: 2c20703a and r16,r5,r16 + 2dd7c: b02b883a mov r21,r22 + 2dd80: b2403fcc andi r9,r22,255 + 2dd84: 90006026 beq r18,zero,2df08 <__muldf3+0x1d0> + 2dd88: 0081ffc4 movi r2,2047 + 2dd8c: 2029883a mov r20,r4 + 2dd90: 90803626 beq r18,r2,2de6c <__muldf3+0x134> + 2dd94: 80800434 orhi r2,r16,16 + 2dd98: 100490fa slli r2,r2,3 + 2dd9c: 2020d77a srli r16,r4,29 + 2dda0: 202890fa slli r20,r4,3 + 2dda4: 94bf0044 addi r18,r18,-1023 + 2dda8: 80a0b03a or r16,r16,r2 + 2ddac: 0027883a mov r19,zero + 2ddb0: 0039883a mov fp,zero + 2ddb4: 3804d53a srli r2,r7,20 + 2ddb8: 382ed7fa srli r23,r7,31 + 2ddbc: 04400434 movhi r17,16 + 2ddc0: 8c7fffc4 addi r17,r17,-1 + 2ddc4: 1081ffcc andi r2,r2,2047 + 2ddc8: 3011883a mov r8,r6 + 2ddcc: 3c62703a and r17,r7,r17 + 2ddd0: ba803fcc andi r10,r23,255 + 2ddd4: 10006d26 beq r2,zero,2df8c <__muldf3+0x254> + 2ddd8: 00c1ffc4 movi r3,2047 + 2dddc: 10c06526 beq r2,r3,2df74 <__muldf3+0x23c> + 2dde0: 88c00434 orhi r3,r17,16 + 2dde4: 180690fa slli r3,r3,3 + 2dde8: 3022d77a srli r17,r6,29 + 2ddec: 301090fa slli r8,r6,3 + 2ddf0: 10bf0044 addi r2,r2,-1023 + 2ddf4: 88e2b03a or r17,r17,r3 + 2ddf8: 000b883a mov r5,zero + 2ddfc: 9085883a add r2,r18,r2 + 2de00: 2cc8b03a or r4,r5,r19 + 2de04: 00c003c4 movi r3,15 + 2de08: bdacf03a xor r22,r23,r22 + 2de0c: 12c00044 addi r11,r2,1 + 2de10: 19009936 bltu r3,r4,2e078 <__muldf3+0x340> + 2de14: 200890ba slli r4,r4,2 + 2de18: 00c000f4 movhi r3,3 + 2de1c: 18f78b04 addi r3,r3,-8660 + 2de20: 20c9883a add r4,r4,r3 + 2de24: 20c00017 ldw r3,0(r4) + 2de28: 1800683a jmp r3 + 2de2c: 0002e078 rdprs zero,zero,2945 + 2de30: 0002de8c andi zero,zero,2938 + 2de34: 0002de8c andi zero,zero,2938 + 2de38: 0002de88 cmpgei zero,zero,2938 + 2de3c: 0002e054 movui zero,2945 + 2de40: 0002e054 movui zero,2945 + 2de44: 0002e03c xorhi zero,zero,2944 + 2de48: 0002de88 cmpgei zero,zero,2938 + 2de4c: 0002e054 movui zero,2945 + 2de50: 0002e03c xorhi zero,zero,2944 + 2de54: 0002e054 movui zero,2945 + 2de58: 0002de88 cmpgei zero,zero,2938 + 2de5c: 0002e064 muli zero,zero,2945 + 2de60: 0002e064 muli zero,zero,2945 + 2de64: 0002e064 muli zero,zero,2945 + 2de68: 0002e280 call 2e28 <__alt_mem_onchip_memory2_0-0x1d1d8> + 2de6c: 2404b03a or r2,r4,r16 + 2de70: 10006f1e bne r2,zero,2e030 <__muldf3+0x2f8> + 2de74: 04c00204 movi r19,8 + 2de78: 0021883a mov r16,zero + 2de7c: 0029883a mov r20,zero + 2de80: 07000084 movi fp,2 + 2de84: 003fcb06 br 2ddb4 <_gp+0xffff187c> + 2de88: 502d883a mov r22,r10 + 2de8c: 00800084 movi r2,2 + 2de90: 28805726 beq r5,r2,2dff0 <__muldf3+0x2b8> + 2de94: 008000c4 movi r2,3 + 2de98: 28816626 beq r5,r2,2e434 <__muldf3+0x6fc> + 2de9c: 00800044 movi r2,1 + 2dea0: 2881411e bne r5,r2,2e3a8 <__muldf3+0x670> + 2dea4: b02b883a mov r21,r22 + 2dea8: 0005883a mov r2,zero + 2deac: 000b883a mov r5,zero + 2deb0: 0029883a mov r20,zero + 2deb4: 1004953a slli r2,r2,20 + 2deb8: a8c03fcc andi r3,r21,255 + 2debc: 04400434 movhi r17,16 + 2dec0: 8c7fffc4 addi r17,r17,-1 + 2dec4: 180697fa slli r3,r3,31 + 2dec8: 2c4a703a and r5,r5,r17 + 2decc: 288ab03a or r5,r5,r2 + 2ded0: 28c6b03a or r3,r5,r3 + 2ded4: a005883a mov r2,r20 + 2ded8: dfc00c17 ldw ra,48(sp) + 2dedc: df000b17 ldw fp,44(sp) + 2dee0: ddc00a17 ldw r23,40(sp) + 2dee4: dd800917 ldw r22,36(sp) + 2dee8: dd400817 ldw r21,32(sp) + 2deec: dd000717 ldw r20,28(sp) + 2def0: dcc00617 ldw r19,24(sp) + 2def4: dc800517 ldw r18,20(sp) + 2def8: dc400417 ldw r17,16(sp) + 2defc: dc000317 ldw r16,12(sp) + 2df00: dec00d04 addi sp,sp,52 + 2df04: f800283a ret + 2df08: 2404b03a or r2,r4,r16 + 2df0c: 2027883a mov r19,r4 + 2df10: 10004226 beq r2,zero,2e01c <__muldf3+0x2e4> + 2df14: 8000fc26 beq r16,zero,2e308 <__muldf3+0x5d0> + 2df18: 8009883a mov r4,r16 + 2df1c: d9800215 stw r6,8(sp) + 2df20: d9c00015 stw r7,0(sp) + 2df24: da400115 stw r9,4(sp) + 2df28: 002ef500 call 2ef50 <__clzsi2> + 2df2c: d9800217 ldw r6,8(sp) + 2df30: d9c00017 ldw r7,0(sp) + 2df34: da400117 ldw r9,4(sp) + 2df38: 113ffd44 addi r4,r2,-11 + 2df3c: 00c00704 movi r3,28 + 2df40: 1900ed16 blt r3,r4,2e2f8 <__muldf3+0x5c0> + 2df44: 00c00744 movi r3,29 + 2df48: 147ffe04 addi r17,r2,-8 + 2df4c: 1907c83a sub r3,r3,r4 + 2df50: 8460983a sll r16,r16,r17 + 2df54: 98c6d83a srl r3,r19,r3 + 2df58: 9c68983a sll r20,r19,r17 + 2df5c: 1c20b03a or r16,r3,r16 + 2df60: 1080fcc4 addi r2,r2,1011 + 2df64: 00a5c83a sub r18,zero,r2 + 2df68: 0027883a mov r19,zero + 2df6c: 0039883a mov fp,zero + 2df70: 003f9006 br 2ddb4 <_gp+0xffff187c> + 2df74: 3446b03a or r3,r6,r17 + 2df78: 1800261e bne r3,zero,2e014 <__muldf3+0x2dc> + 2df7c: 0023883a mov r17,zero + 2df80: 0011883a mov r8,zero + 2df84: 01400084 movi r5,2 + 2df88: 003f9c06 br 2ddfc <_gp+0xffff18c4> + 2df8c: 3446b03a or r3,r6,r17 + 2df90: 18001c26 beq r3,zero,2e004 <__muldf3+0x2cc> + 2df94: 8800ce26 beq r17,zero,2e2d0 <__muldf3+0x598> + 2df98: 8809883a mov r4,r17 + 2df9c: d9800215 stw r6,8(sp) + 2dfa0: da400115 stw r9,4(sp) + 2dfa4: da800015 stw r10,0(sp) + 2dfa8: 002ef500 call 2ef50 <__clzsi2> + 2dfac: d9800217 ldw r6,8(sp) + 2dfb0: da400117 ldw r9,4(sp) + 2dfb4: da800017 ldw r10,0(sp) + 2dfb8: 113ffd44 addi r4,r2,-11 + 2dfbc: 00c00704 movi r3,28 + 2dfc0: 1900bf16 blt r3,r4,2e2c0 <__muldf3+0x588> + 2dfc4: 00c00744 movi r3,29 + 2dfc8: 123ffe04 addi r8,r2,-8 + 2dfcc: 1907c83a sub r3,r3,r4 + 2dfd0: 8a22983a sll r17,r17,r8 + 2dfd4: 30c6d83a srl r3,r6,r3 + 2dfd8: 3210983a sll r8,r6,r8 + 2dfdc: 1c62b03a or r17,r3,r17 + 2dfe0: 1080fcc4 addi r2,r2,1011 + 2dfe4: 0085c83a sub r2,zero,r2 + 2dfe8: 000b883a mov r5,zero + 2dfec: 003f8306 br 2ddfc <_gp+0xffff18c4> + 2dff0: b02b883a mov r21,r22 + 2dff4: 0081ffc4 movi r2,2047 + 2dff8: 000b883a mov r5,zero + 2dffc: 0029883a mov r20,zero + 2e000: 003fac06 br 2deb4 <_gp+0xffff197c> + 2e004: 0023883a mov r17,zero + 2e008: 0011883a mov r8,zero + 2e00c: 01400044 movi r5,1 + 2e010: 003f7a06 br 2ddfc <_gp+0xffff18c4> + 2e014: 014000c4 movi r5,3 + 2e018: 003f7806 br 2ddfc <_gp+0xffff18c4> + 2e01c: 04c00104 movi r19,4 + 2e020: 0021883a mov r16,zero + 2e024: 0029883a mov r20,zero + 2e028: 07000044 movi fp,1 + 2e02c: 003f6106 br 2ddb4 <_gp+0xffff187c> + 2e030: 04c00304 movi r19,12 + 2e034: 070000c4 movi fp,3 + 2e038: 003f5e06 br 2ddb4 <_gp+0xffff187c> + 2e03c: 01400434 movhi r5,16 + 2e040: 002b883a mov r21,zero + 2e044: 297fffc4 addi r5,r5,-1 + 2e048: 053fffc4 movi r20,-1 + 2e04c: 0081ffc4 movi r2,2047 + 2e050: 003f9806 br 2deb4 <_gp+0xffff197c> + 2e054: 8023883a mov r17,r16 + 2e058: a011883a mov r8,r20 + 2e05c: e00b883a mov r5,fp + 2e060: 003f8a06 br 2de8c <_gp+0xffff1954> + 2e064: 8023883a mov r17,r16 + 2e068: a011883a mov r8,r20 + 2e06c: 482d883a mov r22,r9 + 2e070: e00b883a mov r5,fp + 2e074: 003f8506 br 2de8c <_gp+0xffff1954> + 2e078: a00ad43a srli r5,r20,16 + 2e07c: 401ad43a srli r13,r8,16 + 2e080: a53fffcc andi r20,r20,65535 + 2e084: 423fffcc andi r8,r8,65535 + 2e088: 4519383a mul r12,r8,r20 + 2e08c: 4147383a mul r3,r8,r5 + 2e090: 6d09383a mul r4,r13,r20 + 2e094: 600cd43a srli r6,r12,16 + 2e098: 2b5d383a mul r14,r5,r13 + 2e09c: 20c9883a add r4,r4,r3 + 2e0a0: 310d883a add r6,r6,r4 + 2e0a4: 30c0022e bgeu r6,r3,2e0b0 <__muldf3+0x378> + 2e0a8: 00c00074 movhi r3,1 + 2e0ac: 70dd883a add r14,r14,r3 + 2e0b0: 8826d43a srli r19,r17,16 + 2e0b4: 8bffffcc andi r15,r17,65535 + 2e0b8: 7d23383a mul r17,r15,r20 + 2e0bc: 7949383a mul r4,r15,r5 + 2e0c0: 9d29383a mul r20,r19,r20 + 2e0c4: 8814d43a srli r10,r17,16 + 2e0c8: 3012943a slli r9,r6,16 + 2e0cc: a129883a add r20,r20,r4 + 2e0d0: 633fffcc andi r12,r12,65535 + 2e0d4: 5515883a add r10,r10,r20 + 2e0d8: 3006d43a srli r3,r6,16 + 2e0dc: 4b13883a add r9,r9,r12 + 2e0e0: 2ccb383a mul r5,r5,r19 + 2e0e4: 5100022e bgeu r10,r4,2e0f0 <__muldf3+0x3b8> + 2e0e8: 01000074 movhi r4,1 + 2e0ec: 290b883a add r5,r5,r4 + 2e0f0: 802ad43a srli r21,r16,16 + 2e0f4: 843fffcc andi r16,r16,65535 + 2e0f8: 440d383a mul r6,r8,r16 + 2e0fc: 4565383a mul r18,r8,r21 + 2e100: 8349383a mul r4,r16,r13 + 2e104: 500e943a slli r7,r10,16 + 2e108: 3010d43a srli r8,r6,16 + 2e10c: 5028d43a srli r20,r10,16 + 2e110: 2489883a add r4,r4,r18 + 2e114: 8abfffcc andi r10,r17,65535 + 2e118: 3a95883a add r10,r7,r10 + 2e11c: 4119883a add r12,r8,r4 + 2e120: a169883a add r20,r20,r5 + 2e124: 1a87883a add r3,r3,r10 + 2e128: 6d5b383a mul r13,r13,r21 + 2e12c: 6480022e bgeu r12,r18,2e138 <__muldf3+0x400> + 2e130: 01000074 movhi r4,1 + 2e134: 691b883a add r13,r13,r4 + 2e138: 7c25383a mul r18,r15,r16 + 2e13c: 7d4b383a mul r5,r15,r21 + 2e140: 84cf383a mul r7,r16,r19 + 2e144: 901ed43a srli r15,r18,16 + 2e148: 6008d43a srli r4,r12,16 + 2e14c: 6010943a slli r8,r12,16 + 2e150: 394f883a add r7,r7,r5 + 2e154: 333fffcc andi r12,r6,65535 + 2e158: 79df883a add r15,r15,r7 + 2e15c: 235b883a add r13,r4,r13 + 2e160: 9d63383a mul r17,r19,r21 + 2e164: 4309883a add r4,r8,r12 + 2e168: 7940022e bgeu r15,r5,2e174 <__muldf3+0x43c> + 2e16c: 01400074 movhi r5,1 + 2e170: 8963883a add r17,r17,r5 + 2e174: 780a943a slli r5,r15,16 + 2e178: 91bfffcc andi r6,r18,65535 + 2e17c: 70c7883a add r3,r14,r3 + 2e180: 298d883a add r6,r5,r6 + 2e184: 1a8f803a cmpltu r7,r3,r10 + 2e188: 350b883a add r5,r6,r20 + 2e18c: 20c7883a add r3,r4,r3 + 2e190: 3955883a add r10,r7,r5 + 2e194: 1909803a cmpltu r4,r3,r4 + 2e198: 6a91883a add r8,r13,r10 + 2e19c: 780cd43a srli r6,r15,16 + 2e1a0: 2219883a add r12,r4,r8 + 2e1a4: 2d0b803a cmpltu r5,r5,r20 + 2e1a8: 51cf803a cmpltu r7,r10,r7 + 2e1ac: 29ceb03a or r7,r5,r7 + 2e1b0: 4351803a cmpltu r8,r8,r13 + 2e1b4: 610b803a cmpltu r5,r12,r4 + 2e1b8: 4148b03a or r4,r8,r5 + 2e1bc: 398f883a add r7,r7,r6 + 2e1c0: 3909883a add r4,r7,r4 + 2e1c4: 1810927a slli r8,r3,9 + 2e1c8: 2449883a add r4,r4,r17 + 2e1cc: 2008927a slli r4,r4,9 + 2e1d0: 6022d5fa srli r17,r12,23 + 2e1d4: 1806d5fa srli r3,r3,23 + 2e1d8: 4252b03a or r9,r8,r9 + 2e1dc: 600a927a slli r5,r12,9 + 2e1e0: 4810c03a cmpne r8,r9,zero + 2e1e4: 2462b03a or r17,r4,r17 + 2e1e8: 40c6b03a or r3,r8,r3 + 2e1ec: 8900402c andhi r4,r17,256 + 2e1f0: 1950b03a or r8,r3,r5 + 2e1f4: 20000726 beq r4,zero,2e214 <__muldf3+0x4dc> + 2e1f8: 4006d07a srli r3,r8,1 + 2e1fc: 880497fa slli r2,r17,31 + 2e200: 4200004c andi r8,r8,1 + 2e204: 8822d07a srli r17,r17,1 + 2e208: 1a10b03a or r8,r3,r8 + 2e20c: 1210b03a or r8,r2,r8 + 2e210: 5805883a mov r2,r11 + 2e214: 1140ffc4 addi r5,r2,1023 + 2e218: 0140440e bge zero,r5,2e32c <__muldf3+0x5f4> + 2e21c: 40c001cc andi r3,r8,7 + 2e220: 18000726 beq r3,zero,2e240 <__muldf3+0x508> + 2e224: 40c003cc andi r3,r8,15 + 2e228: 01000104 movi r4,4 + 2e22c: 19000426 beq r3,r4,2e240 <__muldf3+0x508> + 2e230: 4107883a add r3,r8,r4 + 2e234: 1a11803a cmpltu r8,r3,r8 + 2e238: 8a23883a add r17,r17,r8 + 2e23c: 1811883a mov r8,r3 + 2e240: 88c0402c andhi r3,r17,256 + 2e244: 18000426 beq r3,zero,2e258 <__muldf3+0x520> + 2e248: 11410004 addi r5,r2,1024 + 2e24c: 00bfc034 movhi r2,65280 + 2e250: 10bfffc4 addi r2,r2,-1 + 2e254: 88a2703a and r17,r17,r2 + 2e258: 0081ff84 movi r2,2046 + 2e25c: 117f6416 blt r2,r5,2dff0 <_gp+0xffff1ab8> + 2e260: 8828977a slli r20,r17,29 + 2e264: 4010d0fa srli r8,r8,3 + 2e268: 8822927a slli r17,r17,9 + 2e26c: 2881ffcc andi r2,r5,2047 + 2e270: a228b03a or r20,r20,r8 + 2e274: 880ad33a srli r5,r17,12 + 2e278: b02b883a mov r21,r22 + 2e27c: 003f0d06 br 2deb4 <_gp+0xffff197c> + 2e280: 8080022c andhi r2,r16,8 + 2e284: 10000926 beq r2,zero,2e2ac <__muldf3+0x574> + 2e288: 8880022c andhi r2,r17,8 + 2e28c: 1000071e bne r2,zero,2e2ac <__muldf3+0x574> + 2e290: 00800434 movhi r2,16 + 2e294: 89400234 orhi r5,r17,8 + 2e298: 10bfffc4 addi r2,r2,-1 + 2e29c: b82b883a mov r21,r23 + 2e2a0: 288a703a and r5,r5,r2 + 2e2a4: 4029883a mov r20,r8 + 2e2a8: 003f6806 br 2e04c <_gp+0xffff1b14> + 2e2ac: 00800434 movhi r2,16 + 2e2b0: 81400234 orhi r5,r16,8 + 2e2b4: 10bfffc4 addi r2,r2,-1 + 2e2b8: 288a703a and r5,r5,r2 + 2e2bc: 003f6306 br 2e04c <_gp+0xffff1b14> + 2e2c0: 147ff604 addi r17,r2,-40 + 2e2c4: 3462983a sll r17,r6,r17 + 2e2c8: 0011883a mov r8,zero + 2e2cc: 003f4406 br 2dfe0 <_gp+0xffff1aa8> + 2e2d0: 3009883a mov r4,r6 + 2e2d4: d9800215 stw r6,8(sp) + 2e2d8: da400115 stw r9,4(sp) + 2e2dc: da800015 stw r10,0(sp) + 2e2e0: 002ef500 call 2ef50 <__clzsi2> + 2e2e4: 10800804 addi r2,r2,32 + 2e2e8: da800017 ldw r10,0(sp) + 2e2ec: da400117 ldw r9,4(sp) + 2e2f0: d9800217 ldw r6,8(sp) + 2e2f4: 003f3006 br 2dfb8 <_gp+0xffff1a80> + 2e2f8: 143ff604 addi r16,r2,-40 + 2e2fc: 9c20983a sll r16,r19,r16 + 2e300: 0029883a mov r20,zero + 2e304: 003f1606 br 2df60 <_gp+0xffff1a28> + 2e308: d9800215 stw r6,8(sp) + 2e30c: d9c00015 stw r7,0(sp) + 2e310: da400115 stw r9,4(sp) + 2e314: 002ef500 call 2ef50 <__clzsi2> + 2e318: 10800804 addi r2,r2,32 + 2e31c: da400117 ldw r9,4(sp) + 2e320: d9c00017 ldw r7,0(sp) + 2e324: d9800217 ldw r6,8(sp) + 2e328: 003f0306 br 2df38 <_gp+0xffff1a00> + 2e32c: 00c00044 movi r3,1 + 2e330: 1947c83a sub r3,r3,r5 + 2e334: 00800e04 movi r2,56 + 2e338: 10feda16 blt r2,r3,2dea4 <_gp+0xffff196c> + 2e33c: 008007c4 movi r2,31 + 2e340: 10c01b16 blt r2,r3,2e3b0 <__muldf3+0x678> + 2e344: 00800804 movi r2,32 + 2e348: 10c5c83a sub r2,r2,r3 + 2e34c: 888a983a sll r5,r17,r2 + 2e350: 40c8d83a srl r4,r8,r3 + 2e354: 4084983a sll r2,r8,r2 + 2e358: 88e2d83a srl r17,r17,r3 + 2e35c: 2906b03a or r3,r5,r4 + 2e360: 1004c03a cmpne r2,r2,zero + 2e364: 1886b03a or r3,r3,r2 + 2e368: 188001cc andi r2,r3,7 + 2e36c: 10000726 beq r2,zero,2e38c <__muldf3+0x654> + 2e370: 188003cc andi r2,r3,15 + 2e374: 01000104 movi r4,4 + 2e378: 11000426 beq r2,r4,2e38c <__muldf3+0x654> + 2e37c: 1805883a mov r2,r3 + 2e380: 10c00104 addi r3,r2,4 + 2e384: 1885803a cmpltu r2,r3,r2 + 2e388: 88a3883a add r17,r17,r2 + 2e38c: 8880202c andhi r2,r17,128 + 2e390: 10001c26 beq r2,zero,2e404 <__muldf3+0x6cc> + 2e394: b02b883a mov r21,r22 + 2e398: 00800044 movi r2,1 + 2e39c: 000b883a mov r5,zero + 2e3a0: 0029883a mov r20,zero + 2e3a4: 003ec306 br 2deb4 <_gp+0xffff197c> + 2e3a8: 5805883a mov r2,r11 + 2e3ac: 003f9906 br 2e214 <_gp+0xffff1cdc> + 2e3b0: 00bff844 movi r2,-31 + 2e3b4: 1145c83a sub r2,r2,r5 + 2e3b8: 8888d83a srl r4,r17,r2 + 2e3bc: 00800804 movi r2,32 + 2e3c0: 18801a26 beq r3,r2,2e42c <__muldf3+0x6f4> + 2e3c4: 00801004 movi r2,64 + 2e3c8: 10c5c83a sub r2,r2,r3 + 2e3cc: 8884983a sll r2,r17,r2 + 2e3d0: 1204b03a or r2,r2,r8 + 2e3d4: 1004c03a cmpne r2,r2,zero + 2e3d8: 2084b03a or r2,r4,r2 + 2e3dc: 144001cc andi r17,r2,7 + 2e3e0: 88000d1e bne r17,zero,2e418 <__muldf3+0x6e0> + 2e3e4: 000b883a mov r5,zero + 2e3e8: 1028d0fa srli r20,r2,3 + 2e3ec: b02b883a mov r21,r22 2e3f0: 0005883a mov r2,zero - 2e3f4: f800283a ret + 2e3f4: a468b03a or r20,r20,r17 + 2e3f8: 003eae06 br 2deb4 <_gp+0xffff197c> + 2e3fc: 1007883a mov r3,r2 + 2e400: 0023883a mov r17,zero + 2e404: 880a927a slli r5,r17,9 + 2e408: 1805883a mov r2,r3 + 2e40c: 8822977a slli r17,r17,29 + 2e410: 280ad33a srli r5,r5,12 + 2e414: 003ff406 br 2e3e8 <_gp+0xffff1eb0> + 2e418: 10c003cc andi r3,r2,15 + 2e41c: 01000104 movi r4,4 + 2e420: 193ff626 beq r3,r4,2e3fc <_gp+0xffff1ec4> + 2e424: 0023883a mov r17,zero + 2e428: 003fd506 br 2e380 <_gp+0xffff1e48> + 2e42c: 0005883a mov r2,zero + 2e430: 003fe706 br 2e3d0 <_gp+0xffff1e98> + 2e434: 00800434 movhi r2,16 + 2e438: 89400234 orhi r5,r17,8 + 2e43c: 10bfffc4 addi r2,r2,-1 + 2e440: b02b883a mov r21,r22 + 2e444: 288a703a and r5,r5,r2 + 2e448: 4029883a mov r20,r8 + 2e44c: 003eff06 br 2e04c <_gp+0xffff1b14> -0002e3f8 <__ledf2>: - 2e3f8: 2804d53a srli r2,r5,20 - 2e3fc: 3810d53a srli r8,r7,20 - 2e400: 00c00434 movhi r3,16 - 2e404: 18ffffc4 addi r3,r3,-1 - 2e408: 1081ffcc andi r2,r2,2047 - 2e40c: 0241ffc4 movi r9,2047 - 2e410: 28d4703a and r10,r5,r3 - 2e414: 4201ffcc andi r8,r8,2047 - 2e418: 38c6703a and r3,r7,r3 - 2e41c: 280ad7fa srli r5,r5,31 - 2e420: 380ed7fa srli r7,r7,31 - 2e424: 12401f26 beq r2,r9,2e4a4 <__ledf2+0xac> - 2e428: 0241ffc4 movi r9,2047 - 2e42c: 42401426 beq r8,r9,2e480 <__ledf2+0x88> - 2e430: 1000091e bne r2,zero,2e458 <__ledf2+0x60> - 2e434: 2296b03a or r11,r4,r10 - 2e438: 5813003a cmpeq r9,r11,zero - 2e43c: 29403fcc andi r5,r5,255 - 2e440: 40000a1e bne r8,zero,2e46c <__ledf2+0x74> - 2e444: 30d8b03a or r12,r6,r3 - 2e448: 6000081e bne r12,zero,2e46c <__ledf2+0x74> - 2e44c: 0005883a mov r2,zero - 2e450: 5800111e bne r11,zero,2e498 <__ledf2+0xa0> - 2e454: f800283a ret - 2e458: 29403fcc andi r5,r5,255 - 2e45c: 40000c1e bne r8,zero,2e490 <__ledf2+0x98> - 2e460: 30d2b03a or r9,r6,r3 - 2e464: 48000c26 beq r9,zero,2e498 <__ledf2+0xa0> - 2e468: 0013883a mov r9,zero - 2e46c: 39c03fcc andi r7,r7,255 - 2e470: 48000826 beq r9,zero,2e494 <__ledf2+0x9c> - 2e474: 38001126 beq r7,zero,2e4bc <__ledf2+0xc4> - 2e478: 00800044 movi r2,1 - 2e47c: f800283a ret - 2e480: 30d2b03a or r9,r6,r3 - 2e484: 483fea26 beq r9,zero,2e430 <__ledf2+0x38> - 2e488: 00800084 movi r2,2 - 2e48c: f800283a ret - 2e490: 39c03fcc andi r7,r7,255 - 2e494: 39400726 beq r7,r5,2e4b4 <__ledf2+0xbc> - 2e498: 2800081e bne r5,zero,2e4bc <__ledf2+0xc4> - 2e49c: 00800044 movi r2,1 - 2e4a0: f800283a ret - 2e4a4: 2292b03a or r9,r4,r10 - 2e4a8: 483fdf26 beq r9,zero,2e428 <__ledf2+0x30> - 2e4ac: 00800084 movi r2,2 - 2e4b0: f800283a ret - 2e4b4: 4080030e bge r8,r2,2e4c4 <__ledf2+0xcc> - 2e4b8: 383fef26 beq r7,zero,2e478 <__ledf2+0x80> - 2e4bc: 00bfffc4 movi r2,-1 - 2e4c0: f800283a ret - 2e4c4: 123feb16 blt r2,r8,2e474 <__ledf2+0x7c> - 2e4c8: 1abff336 bltu r3,r10,2e498 <__ledf2+0xa0> - 2e4cc: 50c00326 beq r10,r3,2e4dc <__ledf2+0xe4> - 2e4d0: 50c0042e bgeu r10,r3,2e4e4 <__ledf2+0xec> - 2e4d4: 283fe81e bne r5,zero,2e478 <__ledf2+0x80> - 2e4d8: 003ff806 br 2e4bc <__ledf2+0xc4> - 2e4dc: 313fee36 bltu r6,r4,2e498 <__ledf2+0xa0> - 2e4e0: 21bffc36 bltu r4,r6,2e4d4 <__ledf2+0xdc> - 2e4e4: 0005883a mov r2,zero - 2e4e8: f800283a ret +0002e450 <__subdf3>: + 2e450: 02000434 movhi r8,16 + 2e454: 423fffc4 addi r8,r8,-1 + 2e458: defffb04 addi sp,sp,-20 + 2e45c: 2a14703a and r10,r5,r8 + 2e460: 3812d53a srli r9,r7,20 + 2e464: 3a10703a and r8,r7,r8 + 2e468: 2006d77a srli r3,r4,29 + 2e46c: 3004d77a srli r2,r6,29 + 2e470: dc000015 stw r16,0(sp) + 2e474: 501490fa slli r10,r10,3 + 2e478: 2820d53a srli r16,r5,20 + 2e47c: 401090fa slli r8,r8,3 + 2e480: dc800215 stw r18,8(sp) + 2e484: dc400115 stw r17,4(sp) + 2e488: dfc00415 stw ra,16(sp) + 2e48c: 202290fa slli r17,r4,3 + 2e490: dcc00315 stw r19,12(sp) + 2e494: 4a41ffcc andi r9,r9,2047 + 2e498: 0101ffc4 movi r4,2047 + 2e49c: 2824d7fa srli r18,r5,31 + 2e4a0: 8401ffcc andi r16,r16,2047 + 2e4a4: 50c6b03a or r3,r10,r3 + 2e4a8: 380ed7fa srli r7,r7,31 + 2e4ac: 408ab03a or r5,r8,r2 + 2e4b0: 300c90fa slli r6,r6,3 + 2e4b4: 49009626 beq r9,r4,2e710 <__subdf3+0x2c0> + 2e4b8: 39c0005c xori r7,r7,1 + 2e4bc: 8245c83a sub r2,r16,r9 + 2e4c0: 3c807426 beq r7,r18,2e694 <__subdf3+0x244> + 2e4c4: 0080af0e bge zero,r2,2e784 <__subdf3+0x334> + 2e4c8: 48002a1e bne r9,zero,2e574 <__subdf3+0x124> + 2e4cc: 2988b03a or r4,r5,r6 + 2e4d0: 20009a1e bne r4,zero,2e73c <__subdf3+0x2ec> + 2e4d4: 888001cc andi r2,r17,7 + 2e4d8: 10000726 beq r2,zero,2e4f8 <__subdf3+0xa8> + 2e4dc: 888003cc andi r2,r17,15 + 2e4e0: 01000104 movi r4,4 + 2e4e4: 11000426 beq r2,r4,2e4f8 <__subdf3+0xa8> + 2e4e8: 890b883a add r5,r17,r4 + 2e4ec: 2c63803a cmpltu r17,r5,r17 + 2e4f0: 1c47883a add r3,r3,r17 + 2e4f4: 2823883a mov r17,r5 + 2e4f8: 1880202c andhi r2,r3,128 + 2e4fc: 10005926 beq r2,zero,2e664 <__subdf3+0x214> + 2e500: 84000044 addi r16,r16,1 + 2e504: 0081ffc4 movi r2,2047 + 2e508: 8080be26 beq r16,r2,2e804 <__subdf3+0x3b4> + 2e50c: 017fe034 movhi r5,65408 + 2e510: 297fffc4 addi r5,r5,-1 + 2e514: 1946703a and r3,r3,r5 + 2e518: 1804977a slli r2,r3,29 + 2e51c: 1806927a slli r3,r3,9 + 2e520: 8822d0fa srli r17,r17,3 + 2e524: 8401ffcc andi r16,r16,2047 + 2e528: 180ad33a srli r5,r3,12 + 2e52c: 9100004c andi r4,r18,1 + 2e530: 1444b03a or r2,r2,r17 + 2e534: 80c1ffcc andi r3,r16,2047 + 2e538: 1820953a slli r16,r3,20 + 2e53c: 20c03fcc andi r3,r4,255 + 2e540: 180897fa slli r4,r3,31 + 2e544: 00c00434 movhi r3,16 + 2e548: 18ffffc4 addi r3,r3,-1 + 2e54c: 28c6703a and r3,r5,r3 + 2e550: 1c06b03a or r3,r3,r16 + 2e554: 1906b03a or r3,r3,r4 + 2e558: dfc00417 ldw ra,16(sp) + 2e55c: dcc00317 ldw r19,12(sp) + 2e560: dc800217 ldw r18,8(sp) + 2e564: dc400117 ldw r17,4(sp) + 2e568: dc000017 ldw r16,0(sp) + 2e56c: dec00504 addi sp,sp,20 + 2e570: f800283a ret + 2e574: 0101ffc4 movi r4,2047 + 2e578: 813fd626 beq r16,r4,2e4d4 <_gp+0xffff1f9c> + 2e57c: 29402034 orhi r5,r5,128 + 2e580: 01000e04 movi r4,56 + 2e584: 2080a316 blt r4,r2,2e814 <__subdf3+0x3c4> + 2e588: 010007c4 movi r4,31 + 2e58c: 2080c616 blt r4,r2,2e8a8 <__subdf3+0x458> + 2e590: 01000804 movi r4,32 + 2e594: 2089c83a sub r4,r4,r2 + 2e598: 2910983a sll r8,r5,r4 + 2e59c: 308ed83a srl r7,r6,r2 + 2e5a0: 3108983a sll r4,r6,r4 + 2e5a4: 2884d83a srl r2,r5,r2 + 2e5a8: 41ccb03a or r6,r8,r7 + 2e5ac: 2008c03a cmpne r4,r4,zero + 2e5b0: 310cb03a or r6,r6,r4 + 2e5b4: 898dc83a sub r6,r17,r6 + 2e5b8: 89a3803a cmpltu r17,r17,r6 + 2e5bc: 1887c83a sub r3,r3,r2 + 2e5c0: 1c47c83a sub r3,r3,r17 + 2e5c4: 3023883a mov r17,r6 + 2e5c8: 1880202c andhi r2,r3,128 + 2e5cc: 10002326 beq r2,zero,2e65c <__subdf3+0x20c> + 2e5d0: 04c02034 movhi r19,128 + 2e5d4: 9cffffc4 addi r19,r19,-1 + 2e5d8: 1ce6703a and r19,r3,r19 + 2e5dc: 98007a26 beq r19,zero,2e7c8 <__subdf3+0x378> + 2e5e0: 9809883a mov r4,r19 + 2e5e4: 002ef500 call 2ef50 <__clzsi2> + 2e5e8: 113ffe04 addi r4,r2,-8 + 2e5ec: 00c007c4 movi r3,31 + 2e5f0: 19007b16 blt r3,r4,2e7e0 <__subdf3+0x390> + 2e5f4: 00800804 movi r2,32 + 2e5f8: 1105c83a sub r2,r2,r4 + 2e5fc: 8884d83a srl r2,r17,r2 + 2e600: 9906983a sll r3,r19,r4 + 2e604: 8922983a sll r17,r17,r4 + 2e608: 10c4b03a or r2,r2,r3 + 2e60c: 24007816 blt r4,r16,2e7f0 <__subdf3+0x3a0> + 2e610: 2421c83a sub r16,r4,r16 + 2e614: 80c00044 addi r3,r16,1 + 2e618: 010007c4 movi r4,31 + 2e61c: 20c09516 blt r4,r3,2e874 <__subdf3+0x424> + 2e620: 01400804 movi r5,32 + 2e624: 28cbc83a sub r5,r5,r3 + 2e628: 88c8d83a srl r4,r17,r3 + 2e62c: 8962983a sll r17,r17,r5 + 2e630: 114a983a sll r5,r2,r5 + 2e634: 10c6d83a srl r3,r2,r3 + 2e638: 8804c03a cmpne r2,r17,zero + 2e63c: 290ab03a or r5,r5,r4 + 2e640: 28a2b03a or r17,r5,r2 + 2e644: 0021883a mov r16,zero + 2e648: 003fa206 br 2e4d4 <_gp+0xffff1f9c> + 2e64c: 2090b03a or r8,r4,r2 + 2e650: 40018e26 beq r8,zero,2ec8c <__subdf3+0x83c> + 2e654: 1007883a mov r3,r2 + 2e658: 2023883a mov r17,r4 + 2e65c: 888001cc andi r2,r17,7 + 2e660: 103f9e1e bne r2,zero,2e4dc <_gp+0xffff1fa4> + 2e664: 1804977a slli r2,r3,29 + 2e668: 8822d0fa srli r17,r17,3 + 2e66c: 1810d0fa srli r8,r3,3 + 2e670: 9100004c andi r4,r18,1 + 2e674: 1444b03a or r2,r2,r17 + 2e678: 00c1ffc4 movi r3,2047 + 2e67c: 80c02826 beq r16,r3,2e720 <__subdf3+0x2d0> + 2e680: 01400434 movhi r5,16 + 2e684: 297fffc4 addi r5,r5,-1 + 2e688: 80e0703a and r16,r16,r3 + 2e68c: 414a703a and r5,r8,r5 + 2e690: 003fa806 br 2e534 <_gp+0xffff1ffc> + 2e694: 0080630e bge zero,r2,2e824 <__subdf3+0x3d4> + 2e698: 48003026 beq r9,zero,2e75c <__subdf3+0x30c> + 2e69c: 0101ffc4 movi r4,2047 + 2e6a0: 813f8c26 beq r16,r4,2e4d4 <_gp+0xffff1f9c> + 2e6a4: 29402034 orhi r5,r5,128 + 2e6a8: 01000e04 movi r4,56 + 2e6ac: 2080a90e bge r4,r2,2e954 <__subdf3+0x504> + 2e6b0: 298cb03a or r6,r5,r6 + 2e6b4: 3012c03a cmpne r9,r6,zero + 2e6b8: 0005883a mov r2,zero + 2e6bc: 4c53883a add r9,r9,r17 + 2e6c0: 4c63803a cmpltu r17,r9,r17 + 2e6c4: 10c7883a add r3,r2,r3 + 2e6c8: 88c7883a add r3,r17,r3 + 2e6cc: 4823883a mov r17,r9 + 2e6d0: 1880202c andhi r2,r3,128 + 2e6d4: 1000d026 beq r2,zero,2ea18 <__subdf3+0x5c8> + 2e6d8: 84000044 addi r16,r16,1 + 2e6dc: 0081ffc4 movi r2,2047 + 2e6e0: 8080fe26 beq r16,r2,2eadc <__subdf3+0x68c> + 2e6e4: 00bfe034 movhi r2,65408 + 2e6e8: 10bfffc4 addi r2,r2,-1 + 2e6ec: 1886703a and r3,r3,r2 + 2e6f0: 880ad07a srli r5,r17,1 + 2e6f4: 180497fa slli r2,r3,31 + 2e6f8: 8900004c andi r4,r17,1 + 2e6fc: 2922b03a or r17,r5,r4 + 2e700: 1806d07a srli r3,r3,1 + 2e704: 1462b03a or r17,r2,r17 + 2e708: 3825883a mov r18,r7 + 2e70c: 003f7106 br 2e4d4 <_gp+0xffff1f9c> + 2e710: 2984b03a or r2,r5,r6 + 2e714: 103f6826 beq r2,zero,2e4b8 <_gp+0xffff1f80> + 2e718: 39c03fcc andi r7,r7,255 + 2e71c: 003f6706 br 2e4bc <_gp+0xffff1f84> + 2e720: 4086b03a or r3,r8,r2 + 2e724: 18015226 beq r3,zero,2ec70 <__subdf3+0x820> + 2e728: 00c00434 movhi r3,16 + 2e72c: 41400234 orhi r5,r8,8 + 2e730: 18ffffc4 addi r3,r3,-1 + 2e734: 28ca703a and r5,r5,r3 + 2e738: 003f7e06 br 2e534 <_gp+0xffff1ffc> + 2e73c: 10bfffc4 addi r2,r2,-1 + 2e740: 1000491e bne r2,zero,2e868 <__subdf3+0x418> + 2e744: 898fc83a sub r7,r17,r6 + 2e748: 89e3803a cmpltu r17,r17,r7 + 2e74c: 1947c83a sub r3,r3,r5 + 2e750: 1c47c83a sub r3,r3,r17 + 2e754: 3823883a mov r17,r7 + 2e758: 003f9b06 br 2e5c8 <_gp+0xffff2090> + 2e75c: 2988b03a or r4,r5,r6 + 2e760: 203f5c26 beq r4,zero,2e4d4 <_gp+0xffff1f9c> + 2e764: 10bfffc4 addi r2,r2,-1 + 2e768: 1000931e bne r2,zero,2e9b8 <__subdf3+0x568> + 2e76c: 898d883a add r6,r17,r6 + 2e770: 3463803a cmpltu r17,r6,r17 + 2e774: 1947883a add r3,r3,r5 + 2e778: 88c7883a add r3,r17,r3 + 2e77c: 3023883a mov r17,r6 + 2e780: 003fd306 br 2e6d0 <_gp+0xffff2198> + 2e784: 1000541e bne r2,zero,2e8d8 <__subdf3+0x488> + 2e788: 80800044 addi r2,r16,1 + 2e78c: 1081ffcc andi r2,r2,2047 + 2e790: 01000044 movi r4,1 + 2e794: 2080a20e bge r4,r2,2ea20 <__subdf3+0x5d0> + 2e798: 8989c83a sub r4,r17,r6 + 2e79c: 8905803a cmpltu r2,r17,r4 + 2e7a0: 1967c83a sub r19,r3,r5 + 2e7a4: 98a7c83a sub r19,r19,r2 + 2e7a8: 9880202c andhi r2,r19,128 + 2e7ac: 10006326 beq r2,zero,2e93c <__subdf3+0x4ec> + 2e7b0: 3463c83a sub r17,r6,r17 + 2e7b4: 28c7c83a sub r3,r5,r3 + 2e7b8: 344d803a cmpltu r6,r6,r17 + 2e7bc: 19a7c83a sub r19,r3,r6 + 2e7c0: 3825883a mov r18,r7 + 2e7c4: 983f861e bne r19,zero,2e5e0 <_gp+0xffff20a8> + 2e7c8: 8809883a mov r4,r17 + 2e7cc: 002ef500 call 2ef50 <__clzsi2> + 2e7d0: 10800804 addi r2,r2,32 + 2e7d4: 113ffe04 addi r4,r2,-8 + 2e7d8: 00c007c4 movi r3,31 + 2e7dc: 193f850e bge r3,r4,2e5f4 <_gp+0xffff20bc> + 2e7e0: 10bff604 addi r2,r2,-40 + 2e7e4: 8884983a sll r2,r17,r2 + 2e7e8: 0023883a mov r17,zero + 2e7ec: 243f880e bge r4,r16,2e610 <_gp+0xffff20d8> + 2e7f0: 00ffe034 movhi r3,65408 + 2e7f4: 18ffffc4 addi r3,r3,-1 + 2e7f8: 8121c83a sub r16,r16,r4 + 2e7fc: 10c6703a and r3,r2,r3 + 2e800: 003f3406 br 2e4d4 <_gp+0xffff1f9c> + 2e804: 9100004c andi r4,r18,1 + 2e808: 000b883a mov r5,zero + 2e80c: 0005883a mov r2,zero + 2e810: 003f4806 br 2e534 <_gp+0xffff1ffc> + 2e814: 298cb03a or r6,r5,r6 + 2e818: 300cc03a cmpne r6,r6,zero + 2e81c: 0005883a mov r2,zero + 2e820: 003f6406 br 2e5b4 <_gp+0xffff207c> + 2e824: 10009a1e bne r2,zero,2ea90 <__subdf3+0x640> + 2e828: 82400044 addi r9,r16,1 + 2e82c: 4881ffcc andi r2,r9,2047 + 2e830: 02800044 movi r10,1 + 2e834: 5080670e bge r10,r2,2e9d4 <__subdf3+0x584> + 2e838: 0081ffc4 movi r2,2047 + 2e83c: 4880af26 beq r9,r2,2eafc <__subdf3+0x6ac> + 2e840: 898d883a add r6,r17,r6 + 2e844: 1945883a add r2,r3,r5 + 2e848: 3447803a cmpltu r3,r6,r17 + 2e84c: 1887883a add r3,r3,r2 + 2e850: 182297fa slli r17,r3,31 + 2e854: 300cd07a srli r6,r6,1 + 2e858: 1806d07a srli r3,r3,1 + 2e85c: 4821883a mov r16,r9 + 2e860: 89a2b03a or r17,r17,r6 + 2e864: 003f1b06 br 2e4d4 <_gp+0xffff1f9c> + 2e868: 0101ffc4 movi r4,2047 + 2e86c: 813f441e bne r16,r4,2e580 <_gp+0xffff2048> + 2e870: 003f1806 br 2e4d4 <_gp+0xffff1f9c> + 2e874: 843ff844 addi r16,r16,-31 + 2e878: 01400804 movi r5,32 + 2e87c: 1408d83a srl r4,r2,r16 + 2e880: 19405026 beq r3,r5,2e9c4 <__subdf3+0x574> + 2e884: 01401004 movi r5,64 + 2e888: 28c7c83a sub r3,r5,r3 + 2e88c: 10c4983a sll r2,r2,r3 + 2e890: 88a2b03a or r17,r17,r2 + 2e894: 8822c03a cmpne r17,r17,zero + 2e898: 2462b03a or r17,r4,r17 + 2e89c: 0007883a mov r3,zero + 2e8a0: 0021883a mov r16,zero + 2e8a4: 003f6d06 br 2e65c <_gp+0xffff2124> + 2e8a8: 11fff804 addi r7,r2,-32 + 2e8ac: 01000804 movi r4,32 + 2e8b0: 29ced83a srl r7,r5,r7 + 2e8b4: 11004526 beq r2,r4,2e9cc <__subdf3+0x57c> + 2e8b8: 01001004 movi r4,64 + 2e8bc: 2089c83a sub r4,r4,r2 + 2e8c0: 2904983a sll r2,r5,r4 + 2e8c4: 118cb03a or r6,r2,r6 + 2e8c8: 300cc03a cmpne r6,r6,zero + 2e8cc: 398cb03a or r6,r7,r6 + 2e8d0: 0005883a mov r2,zero + 2e8d4: 003f3706 br 2e5b4 <_gp+0xffff207c> + 2e8d8: 80002a26 beq r16,zero,2e984 <__subdf3+0x534> + 2e8dc: 0101ffc4 movi r4,2047 + 2e8e0: 49006626 beq r9,r4,2ea7c <__subdf3+0x62c> + 2e8e4: 0085c83a sub r2,zero,r2 + 2e8e8: 18c02034 orhi r3,r3,128 + 2e8ec: 01000e04 movi r4,56 + 2e8f0: 20807e16 blt r4,r2,2eaec <__subdf3+0x69c> + 2e8f4: 010007c4 movi r4,31 + 2e8f8: 2080e716 blt r4,r2,2ec98 <__subdf3+0x848> + 2e8fc: 01000804 movi r4,32 + 2e900: 2089c83a sub r4,r4,r2 + 2e904: 1914983a sll r10,r3,r4 + 2e908: 8890d83a srl r8,r17,r2 + 2e90c: 8908983a sll r4,r17,r4 + 2e910: 1884d83a srl r2,r3,r2 + 2e914: 5222b03a or r17,r10,r8 + 2e918: 2006c03a cmpne r3,r4,zero + 2e91c: 88e2b03a or r17,r17,r3 + 2e920: 3463c83a sub r17,r6,r17 + 2e924: 2885c83a sub r2,r5,r2 + 2e928: 344d803a cmpltu r6,r6,r17 + 2e92c: 1187c83a sub r3,r2,r6 + 2e930: 4821883a mov r16,r9 + 2e934: 3825883a mov r18,r7 + 2e938: 003f2306 br 2e5c8 <_gp+0xffff2090> + 2e93c: 24d0b03a or r8,r4,r19 + 2e940: 40001b1e bne r8,zero,2e9b0 <__subdf3+0x560> + 2e944: 0005883a mov r2,zero + 2e948: 0009883a mov r4,zero + 2e94c: 0021883a mov r16,zero + 2e950: 003f4906 br 2e678 <_gp+0xffff2140> + 2e954: 010007c4 movi r4,31 + 2e958: 20803a16 blt r4,r2,2ea44 <__subdf3+0x5f4> + 2e95c: 01000804 movi r4,32 + 2e960: 2089c83a sub r4,r4,r2 + 2e964: 2912983a sll r9,r5,r4 + 2e968: 3090d83a srl r8,r6,r2 + 2e96c: 3108983a sll r4,r6,r4 + 2e970: 2884d83a srl r2,r5,r2 + 2e974: 4a12b03a or r9,r9,r8 + 2e978: 2008c03a cmpne r4,r4,zero + 2e97c: 4912b03a or r9,r9,r4 + 2e980: 003f4e06 br 2e6bc <_gp+0xffff2184> + 2e984: 1c48b03a or r4,r3,r17 + 2e988: 20003c26 beq r4,zero,2ea7c <__subdf3+0x62c> + 2e98c: 0084303a nor r2,zero,r2 + 2e990: 1000381e bne r2,zero,2ea74 <__subdf3+0x624> + 2e994: 3463c83a sub r17,r6,r17 + 2e998: 28c5c83a sub r2,r5,r3 + 2e99c: 344d803a cmpltu r6,r6,r17 + 2e9a0: 1187c83a sub r3,r2,r6 + 2e9a4: 4821883a mov r16,r9 + 2e9a8: 3825883a mov r18,r7 + 2e9ac: 003f0606 br 2e5c8 <_gp+0xffff2090> + 2e9b0: 2023883a mov r17,r4 + 2e9b4: 003f0906 br 2e5dc <_gp+0xffff20a4> + 2e9b8: 0101ffc4 movi r4,2047 + 2e9bc: 813f3a1e bne r16,r4,2e6a8 <_gp+0xffff2170> + 2e9c0: 003ec406 br 2e4d4 <_gp+0xffff1f9c> + 2e9c4: 0005883a mov r2,zero + 2e9c8: 003fb106 br 2e890 <_gp+0xffff2358> + 2e9cc: 0005883a mov r2,zero + 2e9d0: 003fbc06 br 2e8c4 <_gp+0xffff238c> + 2e9d4: 1c44b03a or r2,r3,r17 + 2e9d8: 80008e1e bne r16,zero,2ec14 <__subdf3+0x7c4> + 2e9dc: 1000c826 beq r2,zero,2ed00 <__subdf3+0x8b0> + 2e9e0: 2984b03a or r2,r5,r6 + 2e9e4: 103ebb26 beq r2,zero,2e4d4 <_gp+0xffff1f9c> + 2e9e8: 8989883a add r4,r17,r6 + 2e9ec: 1945883a add r2,r3,r5 + 2e9f0: 2447803a cmpltu r3,r4,r17 + 2e9f4: 1887883a add r3,r3,r2 + 2e9f8: 1880202c andhi r2,r3,128 + 2e9fc: 2023883a mov r17,r4 + 2ea00: 103f1626 beq r2,zero,2e65c <_gp+0xffff2124> + 2ea04: 00bfe034 movhi r2,65408 + 2ea08: 10bfffc4 addi r2,r2,-1 + 2ea0c: 5021883a mov r16,r10 + 2ea10: 1886703a and r3,r3,r2 + 2ea14: 003eaf06 br 2e4d4 <_gp+0xffff1f9c> + 2ea18: 3825883a mov r18,r7 + 2ea1c: 003f0f06 br 2e65c <_gp+0xffff2124> + 2ea20: 1c44b03a or r2,r3,r17 + 2ea24: 8000251e bne r16,zero,2eabc <__subdf3+0x66c> + 2ea28: 1000661e bne r2,zero,2ebc4 <__subdf3+0x774> + 2ea2c: 2990b03a or r8,r5,r6 + 2ea30: 40009626 beq r8,zero,2ec8c <__subdf3+0x83c> + 2ea34: 2807883a mov r3,r5 + 2ea38: 3023883a mov r17,r6 + 2ea3c: 3825883a mov r18,r7 + 2ea40: 003ea406 br 2e4d4 <_gp+0xffff1f9c> + 2ea44: 127ff804 addi r9,r2,-32 + 2ea48: 01000804 movi r4,32 + 2ea4c: 2a52d83a srl r9,r5,r9 + 2ea50: 11008c26 beq r2,r4,2ec84 <__subdf3+0x834> + 2ea54: 01001004 movi r4,64 + 2ea58: 2085c83a sub r2,r4,r2 + 2ea5c: 2884983a sll r2,r5,r2 + 2ea60: 118cb03a or r6,r2,r6 + 2ea64: 300cc03a cmpne r6,r6,zero + 2ea68: 4992b03a or r9,r9,r6 + 2ea6c: 0005883a mov r2,zero + 2ea70: 003f1206 br 2e6bc <_gp+0xffff2184> + 2ea74: 0101ffc4 movi r4,2047 + 2ea78: 493f9c1e bne r9,r4,2e8ec <_gp+0xffff23b4> + 2ea7c: 2807883a mov r3,r5 + 2ea80: 3023883a mov r17,r6 + 2ea84: 4821883a mov r16,r9 + 2ea88: 3825883a mov r18,r7 + 2ea8c: 003e9106 br 2e4d4 <_gp+0xffff1f9c> + 2ea90: 80001f1e bne r16,zero,2eb10 <__subdf3+0x6c0> + 2ea94: 1c48b03a or r4,r3,r17 + 2ea98: 20005a26 beq r4,zero,2ec04 <__subdf3+0x7b4> + 2ea9c: 0084303a nor r2,zero,r2 + 2eaa0: 1000561e bne r2,zero,2ebfc <__subdf3+0x7ac> + 2eaa4: 89a3883a add r17,r17,r6 + 2eaa8: 1945883a add r2,r3,r5 + 2eaac: 898d803a cmpltu r6,r17,r6 + 2eab0: 3087883a add r3,r6,r2 + 2eab4: 4821883a mov r16,r9 + 2eab8: 003f0506 br 2e6d0 <_gp+0xffff2198> + 2eabc: 10002b1e bne r2,zero,2eb6c <__subdf3+0x71c> + 2eac0: 2984b03a or r2,r5,r6 + 2eac4: 10008026 beq r2,zero,2ecc8 <__subdf3+0x878> + 2eac8: 2807883a mov r3,r5 + 2eacc: 3023883a mov r17,r6 + 2ead0: 3825883a mov r18,r7 + 2ead4: 0401ffc4 movi r16,2047 + 2ead8: 003e7e06 br 2e4d4 <_gp+0xffff1f9c> + 2eadc: 3809883a mov r4,r7 + 2eae0: 0011883a mov r8,zero + 2eae4: 0005883a mov r2,zero + 2eae8: 003ee306 br 2e678 <_gp+0xffff2140> + 2eaec: 1c62b03a or r17,r3,r17 + 2eaf0: 8822c03a cmpne r17,r17,zero + 2eaf4: 0005883a mov r2,zero + 2eaf8: 003f8906 br 2e920 <_gp+0xffff23e8> + 2eafc: 3809883a mov r4,r7 + 2eb00: 4821883a mov r16,r9 + 2eb04: 0011883a mov r8,zero + 2eb08: 0005883a mov r2,zero + 2eb0c: 003eda06 br 2e678 <_gp+0xffff2140> + 2eb10: 0101ffc4 movi r4,2047 + 2eb14: 49003b26 beq r9,r4,2ec04 <__subdf3+0x7b4> + 2eb18: 0085c83a sub r2,zero,r2 + 2eb1c: 18c02034 orhi r3,r3,128 + 2eb20: 01000e04 movi r4,56 + 2eb24: 20806e16 blt r4,r2,2ece0 <__subdf3+0x890> + 2eb28: 010007c4 movi r4,31 + 2eb2c: 20807716 blt r4,r2,2ed0c <__subdf3+0x8bc> + 2eb30: 01000804 movi r4,32 + 2eb34: 2089c83a sub r4,r4,r2 + 2eb38: 1914983a sll r10,r3,r4 + 2eb3c: 8890d83a srl r8,r17,r2 + 2eb40: 8908983a sll r4,r17,r4 + 2eb44: 1884d83a srl r2,r3,r2 + 2eb48: 5222b03a or r17,r10,r8 + 2eb4c: 2006c03a cmpne r3,r4,zero + 2eb50: 88e2b03a or r17,r17,r3 + 2eb54: 89a3883a add r17,r17,r6 + 2eb58: 1145883a add r2,r2,r5 + 2eb5c: 898d803a cmpltu r6,r17,r6 + 2eb60: 3087883a add r3,r6,r2 + 2eb64: 4821883a mov r16,r9 + 2eb68: 003ed906 br 2e6d0 <_gp+0xffff2198> + 2eb6c: 2984b03a or r2,r5,r6 + 2eb70: 10004226 beq r2,zero,2ec7c <__subdf3+0x82c> + 2eb74: 1808d0fa srli r4,r3,3 + 2eb78: 8822d0fa srli r17,r17,3 + 2eb7c: 1806977a slli r3,r3,29 + 2eb80: 2080022c andhi r2,r4,8 + 2eb84: 1c62b03a or r17,r3,r17 + 2eb88: 10000826 beq r2,zero,2ebac <__subdf3+0x75c> + 2eb8c: 2812d0fa srli r9,r5,3 + 2eb90: 4880022c andhi r2,r9,8 + 2eb94: 1000051e bne r2,zero,2ebac <__subdf3+0x75c> + 2eb98: 300cd0fa srli r6,r6,3 + 2eb9c: 2804977a slli r2,r5,29 + 2eba0: 4809883a mov r4,r9 + 2eba4: 3825883a mov r18,r7 + 2eba8: 11a2b03a or r17,r2,r6 + 2ebac: 8806d77a srli r3,r17,29 + 2ebb0: 200890fa slli r4,r4,3 + 2ebb4: 882290fa slli r17,r17,3 + 2ebb8: 0401ffc4 movi r16,2047 + 2ebbc: 1906b03a or r3,r3,r4 + 2ebc0: 003e4406 br 2e4d4 <_gp+0xffff1f9c> + 2ebc4: 2984b03a or r2,r5,r6 + 2ebc8: 103e4226 beq r2,zero,2e4d4 <_gp+0xffff1f9c> + 2ebcc: 8989c83a sub r4,r17,r6 + 2ebd0: 8911803a cmpltu r8,r17,r4 + 2ebd4: 1945c83a sub r2,r3,r5 + 2ebd8: 1205c83a sub r2,r2,r8 + 2ebdc: 1200202c andhi r8,r2,128 + 2ebe0: 403e9a26 beq r8,zero,2e64c <_gp+0xffff2114> + 2ebe4: 3463c83a sub r17,r6,r17 + 2ebe8: 28c5c83a sub r2,r5,r3 + 2ebec: 344d803a cmpltu r6,r6,r17 + 2ebf0: 1187c83a sub r3,r2,r6 + 2ebf4: 3825883a mov r18,r7 + 2ebf8: 003e3606 br 2e4d4 <_gp+0xffff1f9c> + 2ebfc: 0101ffc4 movi r4,2047 + 2ec00: 493fc71e bne r9,r4,2eb20 <_gp+0xffff25e8> + 2ec04: 2807883a mov r3,r5 + 2ec08: 3023883a mov r17,r6 + 2ec0c: 4821883a mov r16,r9 + 2ec10: 003e3006 br 2e4d4 <_gp+0xffff1f9c> + 2ec14: 10003626 beq r2,zero,2ecf0 <__subdf3+0x8a0> + 2ec18: 2984b03a or r2,r5,r6 + 2ec1c: 10001726 beq r2,zero,2ec7c <__subdf3+0x82c> + 2ec20: 1808d0fa srli r4,r3,3 + 2ec24: 8822d0fa srli r17,r17,3 + 2ec28: 1806977a slli r3,r3,29 + 2ec2c: 2080022c andhi r2,r4,8 + 2ec30: 1c62b03a or r17,r3,r17 + 2ec34: 10000726 beq r2,zero,2ec54 <__subdf3+0x804> + 2ec38: 2812d0fa srli r9,r5,3 + 2ec3c: 4880022c andhi r2,r9,8 + 2ec40: 1000041e bne r2,zero,2ec54 <__subdf3+0x804> + 2ec44: 300cd0fa srli r6,r6,3 + 2ec48: 2804977a slli r2,r5,29 + 2ec4c: 4809883a mov r4,r9 + 2ec50: 11a2b03a or r17,r2,r6 + 2ec54: 8806d77a srli r3,r17,29 + 2ec58: 200890fa slli r4,r4,3 + 2ec5c: 882290fa slli r17,r17,3 + 2ec60: 3825883a mov r18,r7 + 2ec64: 1906b03a or r3,r3,r4 + 2ec68: 0401ffc4 movi r16,2047 + 2ec6c: 003e1906 br 2e4d4 <_gp+0xffff1f9c> + 2ec70: 000b883a mov r5,zero + 2ec74: 0005883a mov r2,zero + 2ec78: 003e2e06 br 2e534 <_gp+0xffff1ffc> + 2ec7c: 0401ffc4 movi r16,2047 + 2ec80: 003e1406 br 2e4d4 <_gp+0xffff1f9c> + 2ec84: 0005883a mov r2,zero + 2ec88: 003f7506 br 2ea60 <_gp+0xffff2528> + 2ec8c: 0005883a mov r2,zero + 2ec90: 0009883a mov r4,zero + 2ec94: 003e7806 br 2e678 <_gp+0xffff2140> + 2ec98: 123ff804 addi r8,r2,-32 + 2ec9c: 01000804 movi r4,32 + 2eca0: 1a10d83a srl r8,r3,r8 + 2eca4: 11002526 beq r2,r4,2ed3c <__subdf3+0x8ec> + 2eca8: 01001004 movi r4,64 + 2ecac: 2085c83a sub r2,r4,r2 + 2ecb0: 1884983a sll r2,r3,r2 + 2ecb4: 1444b03a or r2,r2,r17 + 2ecb8: 1004c03a cmpne r2,r2,zero + 2ecbc: 40a2b03a or r17,r8,r2 + 2ecc0: 0005883a mov r2,zero + 2ecc4: 003f1606 br 2e920 <_gp+0xffff23e8> + 2ecc8: 02000434 movhi r8,16 + 2eccc: 0009883a mov r4,zero + 2ecd0: 423fffc4 addi r8,r8,-1 + 2ecd4: 00bfffc4 movi r2,-1 + 2ecd8: 0401ffc4 movi r16,2047 + 2ecdc: 003e6606 br 2e678 <_gp+0xffff2140> + 2ece0: 1c62b03a or r17,r3,r17 + 2ece4: 8822c03a cmpne r17,r17,zero + 2ece8: 0005883a mov r2,zero + 2ecec: 003f9906 br 2eb54 <_gp+0xffff261c> + 2ecf0: 2807883a mov r3,r5 + 2ecf4: 3023883a mov r17,r6 + 2ecf8: 0401ffc4 movi r16,2047 + 2ecfc: 003df506 br 2e4d4 <_gp+0xffff1f9c> + 2ed00: 2807883a mov r3,r5 + 2ed04: 3023883a mov r17,r6 + 2ed08: 003df206 br 2e4d4 <_gp+0xffff1f9c> + 2ed0c: 123ff804 addi r8,r2,-32 + 2ed10: 01000804 movi r4,32 + 2ed14: 1a10d83a srl r8,r3,r8 + 2ed18: 11000a26 beq r2,r4,2ed44 <__subdf3+0x8f4> + 2ed1c: 01001004 movi r4,64 + 2ed20: 2085c83a sub r2,r4,r2 + 2ed24: 1884983a sll r2,r3,r2 + 2ed28: 1444b03a or r2,r2,r17 + 2ed2c: 1004c03a cmpne r2,r2,zero + 2ed30: 40a2b03a or r17,r8,r2 + 2ed34: 0005883a mov r2,zero + 2ed38: 003f8606 br 2eb54 <_gp+0xffff261c> + 2ed3c: 0005883a mov r2,zero + 2ed40: 003fdc06 br 2ecb4 <_gp+0xffff277c> + 2ed44: 0005883a mov r2,zero + 2ed48: 003ff706 br 2ed28 <_gp+0xffff27f0> -0002e4ec <__muldf3>: - 2e4ec: defff304 addi sp,sp,-52 - 2e4f0: dd400815 stw r21,32(sp) - 2e4f4: 282ad53a srli r21,r5,20 - 2e4f8: dd800915 stw r22,36(sp) - 2e4fc: 282cd7fa srli r22,r5,31 - 2e500: dc000315 stw r16,12(sp) - 2e504: 04000434 movhi r16,16 - 2e508: dd000715 stw r20,28(sp) - 2e50c: 843fffc4 addi r16,r16,-1 - 2e510: dfc00c15 stw ra,48(sp) - 2e514: df000b15 stw fp,44(sp) - 2e518: ddc00a15 stw r23,40(sp) - 2e51c: dcc00615 stw r19,24(sp) - 2e520: dc800515 stw r18,20(sp) - 2e524: dc400415 stw r17,16(sp) - 2e528: ad41ffcc andi r21,r21,2047 - 2e52c: 2c20703a and r16,r5,r16 - 2e530: b029883a mov r20,r22 - 2e534: b2403fcc andi r9,r22,255 - 2e538: a8006026 beq r21,zero,2e6bc <__muldf3+0x1d0> - 2e53c: 0081ffc4 movi r2,2047 - 2e540: 2027883a mov r19,r4 - 2e544: a8803626 beq r21,r2,2e620 <__muldf3+0x134> - 2e548: 80c00434 orhi r3,r16,16 - 2e54c: 180690fa slli r3,r3,3 - 2e550: 2020d77a srli r16,r4,29 - 2e554: 202690fa slli r19,r4,3 - 2e558: ad7f0044 addi r21,r21,-1023 - 2e55c: 80e0b03a or r16,r16,r3 - 2e560: 0025883a mov r18,zero - 2e564: 0039883a mov fp,zero - 2e568: 3808d53a srli r4,r7,20 - 2e56c: 382ed7fa srli r23,r7,31 - 2e570: 04400434 movhi r17,16 - 2e574: 8c7fffc4 addi r17,r17,-1 - 2e578: 2101ffcc andi r4,r4,2047 - 2e57c: 3011883a mov r8,r6 - 2e580: 3c62703a and r17,r7,r17 - 2e584: ba803fcc andi r10,r23,255 - 2e588: 20006d26 beq r4,zero,2e740 <__muldf3+0x254> - 2e58c: 0081ffc4 movi r2,2047 - 2e590: 20806526 beq r4,r2,2e728 <__muldf3+0x23c> - 2e594: 88c00434 orhi r3,r17,16 - 2e598: 180690fa slli r3,r3,3 - 2e59c: 3022d77a srli r17,r6,29 - 2e5a0: 301090fa slli r8,r6,3 - 2e5a4: 213f0044 addi r4,r4,-1023 - 2e5a8: 88e2b03a or r17,r17,r3 - 2e5ac: 000b883a mov r5,zero - 2e5b0: a909883a add r4,r21,r4 - 2e5b4: 2c84b03a or r2,r5,r18 - 2e5b8: 00c003c4 movi r3,15 - 2e5bc: bdacf03a xor r22,r23,r22 - 2e5c0: 22c00044 addi r11,r4,1 - 2e5c4: 18809936 bltu r3,r2,2e82c <__muldf3+0x340> - 2e5c8: 100490ba slli r2,r2,2 - 2e5cc: 00c000f4 movhi r3,3 - 2e5d0: 18f97804 addi r3,r3,-6688 - 2e5d4: 10c5883a add r2,r2,r3 - 2e5d8: 10800017 ldw r2,0(r2) - 2e5dc: 1000683a jmp r2 - 2e5e0: 0002e82c andhi zero,zero,2976 - 2e5e4: 0002e640 call 2e64 <__alt_mem_onchip_memory2_0-0x1d19c> - 2e5e8: 0002e640 call 2e64 <__alt_mem_onchip_memory2_0-0x1d19c> - 2e5ec: 0002e63c xorhi zero,zero,2968 - 2e5f0: 0002e808 cmpgei zero,zero,2976 - 2e5f4: 0002e808 cmpgei zero,zero,2976 - 2e5f8: 0002e7f0 cmpltui zero,zero,2975 - 2e5fc: 0002e63c xorhi zero,zero,2968 - 2e600: 0002e808 cmpgei zero,zero,2976 - 2e604: 0002e7f0 cmpltui zero,zero,2975 - 2e608: 0002e808 cmpgei zero,zero,2976 - 2e60c: 0002e63c xorhi zero,zero,2968 - 2e610: 0002e818 cmpnei zero,zero,2976 - 2e614: 0002e818 cmpnei zero,zero,2976 - 2e618: 0002e818 cmpnei zero,zero,2976 - 2e61c: 0002ea34 movhi zero,2984 - 2e620: 2404b03a or r2,r4,r16 - 2e624: 10006f1e bne r2,zero,2e7e4 <__muldf3+0x2f8> - 2e628: 04800204 movi r18,8 - 2e62c: 0021883a mov r16,zero - 2e630: 0027883a mov r19,zero - 2e634: 07000084 movi fp,2 - 2e638: 003fcb06 br 2e568 <__muldf3+0x7c> - 2e63c: 502d883a mov r22,r10 - 2e640: 00800084 movi r2,2 - 2e644: 28805726 beq r5,r2,2e7a4 <__muldf3+0x2b8> - 2e648: 008000c4 movi r2,3 - 2e64c: 28816626 beq r5,r2,2ebe8 <__muldf3+0x6fc> - 2e650: 00800044 movi r2,1 - 2e654: 2881411e bne r5,r2,2eb5c <__muldf3+0x670> - 2e658: b029883a mov r20,r22 - 2e65c: 0005883a mov r2,zero - 2e660: 000b883a mov r5,zero - 2e664: 0027883a mov r19,zero - 2e668: 1004953a slli r2,r2,20 - 2e66c: a0c03fcc andi r3,r20,255 - 2e670: 04400434 movhi r17,16 - 2e674: 8c7fffc4 addi r17,r17,-1 - 2e678: 180697fa slli r3,r3,31 - 2e67c: 2c4a703a and r5,r5,r17 - 2e680: 288ab03a or r5,r5,r2 - 2e684: 28c6b03a or r3,r5,r3 - 2e688: 9805883a mov r2,r19 - 2e68c: dfc00c17 ldw ra,48(sp) - 2e690: df000b17 ldw fp,44(sp) - 2e694: ddc00a17 ldw r23,40(sp) - 2e698: dd800917 ldw r22,36(sp) - 2e69c: dd400817 ldw r21,32(sp) - 2e6a0: dd000717 ldw r20,28(sp) - 2e6a4: dcc00617 ldw r19,24(sp) - 2e6a8: dc800517 ldw r18,20(sp) - 2e6ac: dc400417 ldw r17,16(sp) - 2e6b0: dc000317 ldw r16,12(sp) - 2e6b4: dec00d04 addi sp,sp,52 - 2e6b8: f800283a ret - 2e6bc: 2404b03a or r2,r4,r16 - 2e6c0: 2025883a mov r18,r4 - 2e6c4: 10004226 beq r2,zero,2e7d0 <__muldf3+0x2e4> - 2e6c8: 8000fc26 beq r16,zero,2eabc <__muldf3+0x5d0> - 2e6cc: 8009883a mov r4,r16 - 2e6d0: d9800215 stw r6,8(sp) - 2e6d4: d9c00015 stw r7,0(sp) - 2e6d8: da400115 stw r9,4(sp) - 2e6dc: 002f7040 call 2f704 <__clzsi2> - 2e6e0: d9800217 ldw r6,8(sp) - 2e6e4: d9c00017 ldw r7,0(sp) - 2e6e8: da400117 ldw r9,4(sp) - 2e6ec: 10fffd44 addi r3,r2,-11 - 2e6f0: 01000704 movi r4,28 - 2e6f4: 20c0ed16 blt r4,r3,2eaac <__muldf3+0x5c0> - 2e6f8: 01000744 movi r4,29 - 2e6fc: 147ffe04 addi r17,r2,-8 - 2e700: 20c9c83a sub r4,r4,r3 - 2e704: 8460983a sll r16,r16,r17 - 2e708: 9108d83a srl r4,r18,r4 - 2e70c: 9466983a sll r19,r18,r17 - 2e710: 2420b03a or r16,r4,r16 - 2e714: 013f0084 movi r4,-1022 - 2e718: 20ebc83a sub r21,r4,r3 - 2e71c: 0025883a mov r18,zero - 2e720: 0039883a mov fp,zero - 2e724: 003f9006 br 2e568 <__muldf3+0x7c> - 2e728: 3444b03a or r2,r6,r17 - 2e72c: 1000261e bne r2,zero,2e7c8 <__muldf3+0x2dc> - 2e730: 0023883a mov r17,zero - 2e734: 0011883a mov r8,zero - 2e738: 01400084 movi r5,2 - 2e73c: 003f9c06 br 2e5b0 <__muldf3+0xc4> - 2e740: 3444b03a or r2,r6,r17 - 2e744: 10001c26 beq r2,zero,2e7b8 <__muldf3+0x2cc> - 2e748: 8800ce26 beq r17,zero,2ea84 <__muldf3+0x598> - 2e74c: 8809883a mov r4,r17 - 2e750: d9800215 stw r6,8(sp) - 2e754: da400115 stw r9,4(sp) - 2e758: da800015 stw r10,0(sp) - 2e75c: 002f7040 call 2f704 <__clzsi2> - 2e760: d9800217 ldw r6,8(sp) - 2e764: da400117 ldw r9,4(sp) - 2e768: da800017 ldw r10,0(sp) - 2e76c: 113ffd44 addi r4,r2,-11 - 2e770: 00c00704 movi r3,28 - 2e774: 1900bf16 blt r3,r4,2ea74 <__muldf3+0x588> - 2e778: 00c00744 movi r3,29 - 2e77c: 123ffe04 addi r8,r2,-8 - 2e780: 1907c83a sub r3,r3,r4 - 2e784: 8a22983a sll r17,r17,r8 - 2e788: 30c6d83a srl r3,r6,r3 - 2e78c: 3210983a sll r8,r6,r8 - 2e790: 1c62b03a or r17,r3,r17 - 2e794: 017f0084 movi r5,-1022 - 2e798: 2909c83a sub r4,r5,r4 - 2e79c: 000b883a mov r5,zero - 2e7a0: 003f8306 br 2e5b0 <__muldf3+0xc4> - 2e7a4: b029883a mov r20,r22 - 2e7a8: 0081ffc4 movi r2,2047 - 2e7ac: 000b883a mov r5,zero - 2e7b0: 0027883a mov r19,zero - 2e7b4: 003fac06 br 2e668 <__muldf3+0x17c> - 2e7b8: 0023883a mov r17,zero - 2e7bc: 0011883a mov r8,zero - 2e7c0: 01400044 movi r5,1 - 2e7c4: 003f7a06 br 2e5b0 <__muldf3+0xc4> - 2e7c8: 014000c4 movi r5,3 - 2e7cc: 003f7806 br 2e5b0 <__muldf3+0xc4> - 2e7d0: 04800104 movi r18,4 - 2e7d4: 0021883a mov r16,zero - 2e7d8: 0027883a mov r19,zero - 2e7dc: 07000044 movi fp,1 - 2e7e0: 003f6106 br 2e568 <__muldf3+0x7c> - 2e7e4: 04800304 movi r18,12 - 2e7e8: 070000c4 movi fp,3 - 2e7ec: 003f5e06 br 2e568 <__muldf3+0x7c> - 2e7f0: 01400434 movhi r5,16 - 2e7f4: 0029883a mov r20,zero - 2e7f8: 297fffc4 addi r5,r5,-1 - 2e7fc: 04ffffc4 movi r19,-1 - 2e800: 0081ffc4 movi r2,2047 - 2e804: 003f9806 br 2e668 <__muldf3+0x17c> - 2e808: 8023883a mov r17,r16 - 2e80c: 9811883a mov r8,r19 - 2e810: e00b883a mov r5,fp - 2e814: 003f8a06 br 2e640 <__muldf3+0x154> - 2e818: 8023883a mov r17,r16 - 2e81c: 9811883a mov r8,r19 - 2e820: 482d883a mov r22,r9 - 2e824: e00b883a mov r5,fp - 2e828: 003f8506 br 2e640 <__muldf3+0x154> - 2e82c: 980ad43a srli r5,r19,16 - 2e830: 401ad43a srli r13,r8,16 - 2e834: 9cffffcc andi r19,r19,65535 - 2e838: 423fffcc andi r8,r8,65535 - 2e83c: 44d9383a mul r12,r8,r19 - 2e840: 4145383a mul r2,r8,r5 - 2e844: 6ccd383a mul r6,r13,r19 - 2e848: 6006d43a srli r3,r12,16 - 2e84c: 2b5d383a mul r14,r5,r13 - 2e850: 308d883a add r6,r6,r2 - 2e854: 198d883a add r6,r3,r6 - 2e858: 3080022e bgeu r6,r2,2e864 <__muldf3+0x378> - 2e85c: 00800074 movhi r2,1 - 2e860: 709d883a add r14,r14,r2 - 2e864: 8828d43a srli r20,r17,16 - 2e868: 8bffffcc andi r15,r17,65535 - 2e86c: 7ce3383a mul r17,r15,r19 - 2e870: 7945383a mul r2,r15,r5 - 2e874: a4e7383a mul r19,r20,r19 - 2e878: 8814d43a srli r10,r17,16 - 2e87c: 3012943a slli r9,r6,16 - 2e880: 98a7883a add r19,r19,r2 - 2e884: 633fffcc andi r12,r12,65535 - 2e888: 54d5883a add r10,r10,r19 - 2e88c: 3006d43a srli r3,r6,16 - 2e890: 4b13883a add r9,r9,r12 - 2e894: 2d0b383a mul r5,r5,r20 - 2e898: 5080022e bgeu r10,r2,2e8a4 <__muldf3+0x3b8> - 2e89c: 00800074 movhi r2,1 - 2e8a0: 288b883a add r5,r5,r2 - 2e8a4: 802ad43a srli r21,r16,16 - 2e8a8: 843fffcc andi r16,r16,65535 - 2e8ac: 440d383a mul r6,r8,r16 - 2e8b0: 4565383a mul r18,r8,r21 - 2e8b4: 8359383a mul r12,r16,r13 - 2e8b8: 500e943a slli r7,r10,16 - 2e8bc: 3010d43a srli r8,r6,16 - 2e8c0: 5026d43a srli r19,r10,16 - 2e8c4: 6499883a add r12,r12,r18 - 2e8c8: 8abfffcc andi r10,r17,65535 - 2e8cc: 3a95883a add r10,r7,r10 - 2e8d0: 4319883a add r12,r8,r12 - 2e8d4: 9967883a add r19,r19,r5 - 2e8d8: 1a87883a add r3,r3,r10 - 2e8dc: 6d5b383a mul r13,r13,r21 - 2e8e0: 6480022e bgeu r12,r18,2e8ec <__muldf3+0x400> - 2e8e4: 00800074 movhi r2,1 - 2e8e8: 689b883a add r13,r13,r2 - 2e8ec: 7c25383a mul r18,r15,r16 - 2e8f0: 7d4b383a mul r5,r15,r21 - 2e8f4: 850f383a mul r7,r16,r20 - 2e8f8: 901ed43a srli r15,r18,16 - 2e8fc: 6004d43a srli r2,r12,16 - 2e900: 6010943a slli r8,r12,16 - 2e904: 394f883a add r7,r7,r5 - 2e908: 333fffcc andi r12,r6,65535 - 2e90c: 79df883a add r15,r15,r7 - 2e910: 135b883a add r13,r2,r13 - 2e914: a563383a mul r17,r20,r21 - 2e918: 4305883a add r2,r8,r12 - 2e91c: 7940022e bgeu r15,r5,2e928 <__muldf3+0x43c> - 2e920: 01400074 movhi r5,1 - 2e924: 8963883a add r17,r17,r5 - 2e928: 780a943a slli r5,r15,16 - 2e92c: 91bfffcc andi r6,r18,65535 - 2e930: 70c7883a add r3,r14,r3 - 2e934: 298d883a add r6,r5,r6 - 2e938: 1a8f803a cmpltu r7,r3,r10 - 2e93c: 34cb883a add r5,r6,r19 - 2e940: 10c7883a add r3,r2,r3 - 2e944: 3955883a add r10,r7,r5 - 2e948: 1885803a cmpltu r2,r3,r2 - 2e94c: 6a91883a add r8,r13,r10 - 2e950: 780cd43a srli r6,r15,16 - 2e954: 1219883a add r12,r2,r8 - 2e958: 2ccb803a cmpltu r5,r5,r19 - 2e95c: 51cf803a cmpltu r7,r10,r7 - 2e960: 29ceb03a or r7,r5,r7 - 2e964: 4351803a cmpltu r8,r8,r13 - 2e968: 608b803a cmpltu r5,r12,r2 - 2e96c: 4144b03a or r2,r8,r5 - 2e970: 398f883a add r7,r7,r6 - 2e974: 3885883a add r2,r7,r2 - 2e978: 1810927a slli r8,r3,9 - 2e97c: 1445883a add r2,r2,r17 - 2e980: 1004927a slli r2,r2,9 - 2e984: 6022d5fa srli r17,r12,23 - 2e988: 1806d5fa srli r3,r3,23 - 2e98c: 4252b03a or r9,r8,r9 - 2e990: 600a927a slli r5,r12,9 - 2e994: 4810c03a cmpne r8,r9,zero - 2e998: 1462b03a or r17,r2,r17 - 2e99c: 40c6b03a or r3,r8,r3 - 2e9a0: 8880402c andhi r2,r17,256 - 2e9a4: 1950b03a or r8,r3,r5 - 2e9a8: 10000726 beq r2,zero,2e9c8 <__muldf3+0x4dc> - 2e9ac: 4006d07a srli r3,r8,1 - 2e9b0: 880497fa slli r2,r17,31 - 2e9b4: 4200004c andi r8,r8,1 - 2e9b8: 8822d07a srli r17,r17,1 - 2e9bc: 1a10b03a or r8,r3,r8 - 2e9c0: 1210b03a or r8,r2,r8 - 2e9c4: 5809883a mov r4,r11 - 2e9c8: 2080ffc4 addi r2,r4,1023 - 2e9cc: 0080440e bge zero,r2,2eae0 <__muldf3+0x5f4> - 2e9d0: 40c001cc andi r3,r8,7 - 2e9d4: 18000726 beq r3,zero,2e9f4 <__muldf3+0x508> - 2e9d8: 40c003cc andi r3,r8,15 - 2e9dc: 01400104 movi r5,4 - 2e9e0: 19400426 beq r3,r5,2e9f4 <__muldf3+0x508> - 2e9e4: 4147883a add r3,r8,r5 - 2e9e8: 1a11803a cmpltu r8,r3,r8 - 2e9ec: 8a23883a add r17,r17,r8 - 2e9f0: 1811883a mov r8,r3 - 2e9f4: 88c0402c andhi r3,r17,256 - 2e9f8: 18000426 beq r3,zero,2ea0c <__muldf3+0x520> - 2e9fc: 00ffc034 movhi r3,65280 - 2ea00: 18ffffc4 addi r3,r3,-1 - 2ea04: 20810004 addi r2,r4,1024 - 2ea08: 88e2703a and r17,r17,r3 - 2ea0c: 00c1ff84 movi r3,2046 - 2ea10: 18bf6416 blt r3,r2,2e7a4 <__muldf3+0x2b8> - 2ea14: 8826977a slli r19,r17,29 - 2ea18: 4010d0fa srli r8,r8,3 - 2ea1c: 8822927a slli r17,r17,9 - 2ea20: 1081ffcc andi r2,r2,2047 - 2ea24: 9a26b03a or r19,r19,r8 - 2ea28: 880ad33a srli r5,r17,12 - 2ea2c: b029883a mov r20,r22 - 2ea30: 003f0d06 br 2e668 <__muldf3+0x17c> - 2ea34: 8080022c andhi r2,r16,8 - 2ea38: 10000926 beq r2,zero,2ea60 <__muldf3+0x574> - 2ea3c: 8880022c andhi r2,r17,8 - 2ea40: 1000071e bne r2,zero,2ea60 <__muldf3+0x574> - 2ea44: 00800434 movhi r2,16 - 2ea48: 89400234 orhi r5,r17,8 - 2ea4c: 10bfffc4 addi r2,r2,-1 - 2ea50: b829883a mov r20,r23 - 2ea54: 288a703a and r5,r5,r2 - 2ea58: 4027883a mov r19,r8 - 2ea5c: 003f6806 br 2e800 <__muldf3+0x314> - 2ea60: 00800434 movhi r2,16 - 2ea64: 81400234 orhi r5,r16,8 - 2ea68: 10bfffc4 addi r2,r2,-1 - 2ea6c: 288a703a and r5,r5,r2 - 2ea70: 003f6306 br 2e800 <__muldf3+0x314> - 2ea74: 10bff604 addi r2,r2,-40 - 2ea78: 30a2983a sll r17,r6,r2 - 2ea7c: 0011883a mov r8,zero - 2ea80: 003f4406 br 2e794 <__muldf3+0x2a8> - 2ea84: 3009883a mov r4,r6 - 2ea88: d9800215 stw r6,8(sp) - 2ea8c: da400115 stw r9,4(sp) - 2ea90: da800015 stw r10,0(sp) - 2ea94: 002f7040 call 2f704 <__clzsi2> - 2ea98: 10800804 addi r2,r2,32 - 2ea9c: da800017 ldw r10,0(sp) - 2eaa0: da400117 ldw r9,4(sp) - 2eaa4: d9800217 ldw r6,8(sp) - 2eaa8: 003f3006 br 2e76c <__muldf3+0x280> - 2eaac: 10bff604 addi r2,r2,-40 - 2eab0: 90a0983a sll r16,r18,r2 - 2eab4: 0027883a mov r19,zero - 2eab8: 003f1606 br 2e714 <__muldf3+0x228> - 2eabc: d9800215 stw r6,8(sp) - 2eac0: d9c00015 stw r7,0(sp) - 2eac4: da400115 stw r9,4(sp) - 2eac8: 002f7040 call 2f704 <__clzsi2> - 2eacc: 10800804 addi r2,r2,32 - 2ead0: da400117 ldw r9,4(sp) - 2ead4: d9c00017 ldw r7,0(sp) - 2ead8: d9800217 ldw r6,8(sp) - 2eadc: 003f0306 br 2e6ec <__muldf3+0x200> - 2eae0: 00c00044 movi r3,1 - 2eae4: 1887c83a sub r3,r3,r2 - 2eae8: 01000e04 movi r4,56 - 2eaec: 20feda16 blt r4,r3,2e658 <__muldf3+0x16c> - 2eaf0: 010007c4 movi r4,31 - 2eaf4: 20c01b16 blt r4,r3,2eb64 <__muldf3+0x678> - 2eaf8: 00800804 movi r2,32 - 2eafc: 10c5c83a sub r2,r2,r3 - 2eb00: 888a983a sll r5,r17,r2 - 2eb04: 40c8d83a srl r4,r8,r3 - 2eb08: 4084983a sll r2,r8,r2 - 2eb0c: 88e2d83a srl r17,r17,r3 - 2eb10: 2906b03a or r3,r5,r4 - 2eb14: 1004c03a cmpne r2,r2,zero - 2eb18: 1886b03a or r3,r3,r2 - 2eb1c: 188001cc andi r2,r3,7 - 2eb20: 10000726 beq r2,zero,2eb40 <__muldf3+0x654> - 2eb24: 188003cc andi r2,r3,15 - 2eb28: 01000104 movi r4,4 - 2eb2c: 11000426 beq r2,r4,2eb40 <__muldf3+0x654> - 2eb30: 1805883a mov r2,r3 - 2eb34: 10c00104 addi r3,r2,4 - 2eb38: 1885803a cmpltu r2,r3,r2 - 2eb3c: 88a3883a add r17,r17,r2 - 2eb40: 8880202c andhi r2,r17,128 - 2eb44: 10001c26 beq r2,zero,2ebb8 <__muldf3+0x6cc> - 2eb48: b029883a mov r20,r22 - 2eb4c: 00800044 movi r2,1 - 2eb50: 000b883a mov r5,zero - 2eb54: 0027883a mov r19,zero - 2eb58: 003ec306 br 2e668 <__muldf3+0x17c> - 2eb5c: 5809883a mov r4,r11 - 2eb60: 003f9906 br 2e9c8 <__muldf3+0x4dc> - 2eb64: 013ff844 movi r4,-31 - 2eb68: 2085c83a sub r2,r4,r2 - 2eb6c: 8888d83a srl r4,r17,r2 - 2eb70: 00800804 movi r2,32 - 2eb74: 18801a26 beq r3,r2,2ebe0 <__muldf3+0x6f4> - 2eb78: 00801004 movi r2,64 - 2eb7c: 10c5c83a sub r2,r2,r3 - 2eb80: 8884983a sll r2,r17,r2 - 2eb84: 1204b03a or r2,r2,r8 - 2eb88: 1004c03a cmpne r2,r2,zero - 2eb8c: 2084b03a or r2,r4,r2 - 2eb90: 144001cc andi r17,r2,7 - 2eb94: 88000d1e bne r17,zero,2ebcc <__muldf3+0x6e0> - 2eb98: 000b883a mov r5,zero - 2eb9c: 1026d0fa srli r19,r2,3 - 2eba0: b029883a mov r20,r22 - 2eba4: 0005883a mov r2,zero - 2eba8: 9c66b03a or r19,r19,r17 - 2ebac: 003eae06 br 2e668 <__muldf3+0x17c> - 2ebb0: 1007883a mov r3,r2 - 2ebb4: 0023883a mov r17,zero - 2ebb8: 880a927a slli r5,r17,9 - 2ebbc: 1805883a mov r2,r3 - 2ebc0: 8822977a slli r17,r17,29 - 2ebc4: 280ad33a srli r5,r5,12 - 2ebc8: 003ff406 br 2eb9c <__muldf3+0x6b0> - 2ebcc: 10c003cc andi r3,r2,15 - 2ebd0: 01000104 movi r4,4 - 2ebd4: 193ff626 beq r3,r4,2ebb0 <__muldf3+0x6c4> - 2ebd8: 0023883a mov r17,zero - 2ebdc: 003fd506 br 2eb34 <__muldf3+0x648> - 2ebe0: 0005883a mov r2,zero - 2ebe4: 003fe706 br 2eb84 <__muldf3+0x698> - 2ebe8: 00800434 movhi r2,16 - 2ebec: 89400234 orhi r5,r17,8 - 2ebf0: 10bfffc4 addi r2,r2,-1 - 2ebf4: b029883a mov r20,r22 - 2ebf8: 288a703a and r5,r5,r2 - 2ebfc: 4027883a mov r19,r8 - 2ec00: 003eff06 br 2e800 <__muldf3+0x314> +0002ed4c <__fixdfsi>: + 2ed4c: 280cd53a srli r6,r5,20 + 2ed50: 00c00434 movhi r3,16 + 2ed54: 18ffffc4 addi r3,r3,-1 + 2ed58: 3181ffcc andi r6,r6,2047 + 2ed5c: 01c0ff84 movi r7,1022 + 2ed60: 28c6703a and r3,r5,r3 + 2ed64: 280ad7fa srli r5,r5,31 + 2ed68: 3980120e bge r7,r6,2edb4 <__fixdfsi+0x68> + 2ed6c: 00810744 movi r2,1053 + 2ed70: 11800c16 blt r2,r6,2eda4 <__fixdfsi+0x58> + 2ed74: 00810cc4 movi r2,1075 + 2ed78: 1185c83a sub r2,r2,r6 + 2ed7c: 01c007c4 movi r7,31 + 2ed80: 18c00434 orhi r3,r3,16 + 2ed84: 38800d16 blt r7,r2,2edbc <__fixdfsi+0x70> + 2ed88: 31befb44 addi r6,r6,-1043 + 2ed8c: 2084d83a srl r2,r4,r2 + 2ed90: 1986983a sll r3,r3,r6 + 2ed94: 1884b03a or r2,r3,r2 + 2ed98: 28000726 beq r5,zero,2edb8 <__fixdfsi+0x6c> + 2ed9c: 0085c83a sub r2,zero,r2 + 2eda0: f800283a ret + 2eda4: 00a00034 movhi r2,32768 + 2eda8: 10bfffc4 addi r2,r2,-1 + 2edac: 2885883a add r2,r5,r2 + 2edb0: f800283a ret + 2edb4: 0005883a mov r2,zero + 2edb8: f800283a ret + 2edbc: 008104c4 movi r2,1043 + 2edc0: 1185c83a sub r2,r2,r6 + 2edc4: 1884d83a srl r2,r3,r2 + 2edc8: 003ff306 br 2ed98 <_gp+0xffff2860> -0002ec04 <__subdf3>: - 2ec04: 02000434 movhi r8,16 - 2ec08: 423fffc4 addi r8,r8,-1 - 2ec0c: defffb04 addi sp,sp,-20 - 2ec10: 2a14703a and r10,r5,r8 - 2ec14: 3812d53a srli r9,r7,20 - 2ec18: 3a10703a and r8,r7,r8 - 2ec1c: 2006d77a srli r3,r4,29 - 2ec20: 3004d77a srli r2,r6,29 - 2ec24: dc000015 stw r16,0(sp) - 2ec28: 501490fa slli r10,r10,3 - 2ec2c: 2820d53a srli r16,r5,20 - 2ec30: 401090fa slli r8,r8,3 - 2ec34: dc800215 stw r18,8(sp) - 2ec38: dc400115 stw r17,4(sp) - 2ec3c: dfc00415 stw ra,16(sp) - 2ec40: 202290fa slli r17,r4,3 - 2ec44: dcc00315 stw r19,12(sp) - 2ec48: 4a41ffcc andi r9,r9,2047 - 2ec4c: 0101ffc4 movi r4,2047 - 2ec50: 2824d7fa srli r18,r5,31 - 2ec54: 8401ffcc andi r16,r16,2047 - 2ec58: 50c6b03a or r3,r10,r3 - 2ec5c: 380ed7fa srli r7,r7,31 - 2ec60: 408ab03a or r5,r8,r2 - 2ec64: 300c90fa slli r6,r6,3 - 2ec68: 49009626 beq r9,r4,2eec4 <__subdf3+0x2c0> - 2ec6c: 39c0005c xori r7,r7,1 - 2ec70: 8245c83a sub r2,r16,r9 - 2ec74: 3c807426 beq r7,r18,2ee48 <__subdf3+0x244> - 2ec78: 0080af0e bge zero,r2,2ef38 <__subdf3+0x334> - 2ec7c: 48002a1e bne r9,zero,2ed28 <__subdf3+0x124> - 2ec80: 2988b03a or r4,r5,r6 - 2ec84: 20009a1e bne r4,zero,2eef0 <__subdf3+0x2ec> - 2ec88: 888001cc andi r2,r17,7 - 2ec8c: 10000726 beq r2,zero,2ecac <__subdf3+0xa8> - 2ec90: 888003cc andi r2,r17,15 - 2ec94: 01000104 movi r4,4 - 2ec98: 11000426 beq r2,r4,2ecac <__subdf3+0xa8> - 2ec9c: 890b883a add r5,r17,r4 - 2eca0: 2c63803a cmpltu r17,r5,r17 - 2eca4: 1c47883a add r3,r3,r17 - 2eca8: 2823883a mov r17,r5 - 2ecac: 1880202c andhi r2,r3,128 - 2ecb0: 10005926 beq r2,zero,2ee18 <__subdf3+0x214> - 2ecb4: 84000044 addi r16,r16,1 - 2ecb8: 0081ffc4 movi r2,2047 - 2ecbc: 8080be26 beq r16,r2,2efb8 <__subdf3+0x3b4> - 2ecc0: 017fe034 movhi r5,65408 - 2ecc4: 297fffc4 addi r5,r5,-1 - 2ecc8: 1946703a and r3,r3,r5 - 2eccc: 1804977a slli r2,r3,29 - 2ecd0: 1806927a slli r3,r3,9 - 2ecd4: 8822d0fa srli r17,r17,3 - 2ecd8: 8401ffcc andi r16,r16,2047 - 2ecdc: 180ad33a srli r5,r3,12 - 2ece0: 9100004c andi r4,r18,1 - 2ece4: 1444b03a or r2,r2,r17 - 2ece8: 80c1ffcc andi r3,r16,2047 - 2ecec: 1820953a slli r16,r3,20 - 2ecf0: 20c03fcc andi r3,r4,255 - 2ecf4: 180897fa slli r4,r3,31 - 2ecf8: 00c00434 movhi r3,16 - 2ecfc: 18ffffc4 addi r3,r3,-1 - 2ed00: 28c6703a and r3,r5,r3 - 2ed04: 1c06b03a or r3,r3,r16 - 2ed08: 1906b03a or r3,r3,r4 - 2ed0c: dfc00417 ldw ra,16(sp) - 2ed10: dcc00317 ldw r19,12(sp) - 2ed14: dc800217 ldw r18,8(sp) - 2ed18: dc400117 ldw r17,4(sp) - 2ed1c: dc000017 ldw r16,0(sp) - 2ed20: dec00504 addi sp,sp,20 - 2ed24: f800283a ret - 2ed28: 0101ffc4 movi r4,2047 - 2ed2c: 813fd626 beq r16,r4,2ec88 <__subdf3+0x84> - 2ed30: 29402034 orhi r5,r5,128 - 2ed34: 01000e04 movi r4,56 - 2ed38: 2080a316 blt r4,r2,2efc8 <__subdf3+0x3c4> - 2ed3c: 010007c4 movi r4,31 - 2ed40: 2080c616 blt r4,r2,2f05c <__subdf3+0x458> - 2ed44: 01000804 movi r4,32 - 2ed48: 2089c83a sub r4,r4,r2 - 2ed4c: 2910983a sll r8,r5,r4 - 2ed50: 308ed83a srl r7,r6,r2 - 2ed54: 3108983a sll r4,r6,r4 - 2ed58: 2884d83a srl r2,r5,r2 - 2ed5c: 41ccb03a or r6,r8,r7 - 2ed60: 2008c03a cmpne r4,r4,zero - 2ed64: 310cb03a or r6,r6,r4 - 2ed68: 898dc83a sub r6,r17,r6 - 2ed6c: 89a3803a cmpltu r17,r17,r6 - 2ed70: 1887c83a sub r3,r3,r2 - 2ed74: 1c47c83a sub r3,r3,r17 - 2ed78: 3023883a mov r17,r6 - 2ed7c: 1880202c andhi r2,r3,128 - 2ed80: 10002326 beq r2,zero,2ee10 <__subdf3+0x20c> - 2ed84: 04c02034 movhi r19,128 - 2ed88: 9cffffc4 addi r19,r19,-1 - 2ed8c: 1ce6703a and r19,r3,r19 - 2ed90: 98007a26 beq r19,zero,2ef7c <__subdf3+0x378> - 2ed94: 9809883a mov r4,r19 - 2ed98: 002f7040 call 2f704 <__clzsi2> - 2ed9c: 113ffe04 addi r4,r2,-8 - 2eda0: 00c007c4 movi r3,31 - 2eda4: 19007b16 blt r3,r4,2ef94 <__subdf3+0x390> - 2eda8: 00800804 movi r2,32 - 2edac: 1105c83a sub r2,r2,r4 - 2edb0: 8884d83a srl r2,r17,r2 - 2edb4: 9906983a sll r3,r19,r4 - 2edb8: 8922983a sll r17,r17,r4 - 2edbc: 10c4b03a or r2,r2,r3 - 2edc0: 24007816 blt r4,r16,2efa4 <__subdf3+0x3a0> - 2edc4: 2421c83a sub r16,r4,r16 - 2edc8: 80c00044 addi r3,r16,1 - 2edcc: 010007c4 movi r4,31 - 2edd0: 20c09516 blt r4,r3,2f028 <__subdf3+0x424> - 2edd4: 01400804 movi r5,32 - 2edd8: 28cbc83a sub r5,r5,r3 - 2eddc: 88c8d83a srl r4,r17,r3 - 2ede0: 8962983a sll r17,r17,r5 - 2ede4: 114a983a sll r5,r2,r5 - 2ede8: 10c6d83a srl r3,r2,r3 - 2edec: 8804c03a cmpne r2,r17,zero - 2edf0: 290ab03a or r5,r5,r4 - 2edf4: 28a2b03a or r17,r5,r2 - 2edf8: 0021883a mov r16,zero - 2edfc: 003fa206 br 2ec88 <__subdf3+0x84> - 2ee00: 2090b03a or r8,r4,r2 - 2ee04: 40018e26 beq r8,zero,2f440 <__subdf3+0x83c> - 2ee08: 1007883a mov r3,r2 - 2ee0c: 2023883a mov r17,r4 - 2ee10: 888001cc andi r2,r17,7 - 2ee14: 103f9e1e bne r2,zero,2ec90 <__subdf3+0x8c> - 2ee18: 1804977a slli r2,r3,29 - 2ee1c: 8822d0fa srli r17,r17,3 - 2ee20: 1810d0fa srli r8,r3,3 - 2ee24: 9100004c andi r4,r18,1 - 2ee28: 1444b03a or r2,r2,r17 - 2ee2c: 00c1ffc4 movi r3,2047 - 2ee30: 80c02826 beq r16,r3,2eed4 <__subdf3+0x2d0> - 2ee34: 01400434 movhi r5,16 - 2ee38: 297fffc4 addi r5,r5,-1 - 2ee3c: 80e0703a and r16,r16,r3 - 2ee40: 414a703a and r5,r8,r5 - 2ee44: 003fa806 br 2ece8 <__subdf3+0xe4> - 2ee48: 0080630e bge zero,r2,2efd8 <__subdf3+0x3d4> - 2ee4c: 48003026 beq r9,zero,2ef10 <__subdf3+0x30c> - 2ee50: 0101ffc4 movi r4,2047 - 2ee54: 813f8c26 beq r16,r4,2ec88 <__subdf3+0x84> - 2ee58: 29402034 orhi r5,r5,128 - 2ee5c: 01000e04 movi r4,56 - 2ee60: 2080a90e bge r4,r2,2f108 <__subdf3+0x504> - 2ee64: 298cb03a or r6,r5,r6 - 2ee68: 3012c03a cmpne r9,r6,zero - 2ee6c: 0005883a mov r2,zero - 2ee70: 4c53883a add r9,r9,r17 - 2ee74: 4c63803a cmpltu r17,r9,r17 - 2ee78: 10c7883a add r3,r2,r3 - 2ee7c: 88c7883a add r3,r17,r3 - 2ee80: 4823883a mov r17,r9 - 2ee84: 1880202c andhi r2,r3,128 - 2ee88: 1000d026 beq r2,zero,2f1cc <__subdf3+0x5c8> - 2ee8c: 84000044 addi r16,r16,1 - 2ee90: 0081ffc4 movi r2,2047 - 2ee94: 8080fe26 beq r16,r2,2f290 <__subdf3+0x68c> - 2ee98: 00bfe034 movhi r2,65408 - 2ee9c: 10bfffc4 addi r2,r2,-1 - 2eea0: 1886703a and r3,r3,r2 - 2eea4: 880ad07a srli r5,r17,1 - 2eea8: 180497fa slli r2,r3,31 - 2eeac: 8900004c andi r4,r17,1 - 2eeb0: 2922b03a or r17,r5,r4 - 2eeb4: 1806d07a srli r3,r3,1 - 2eeb8: 1462b03a or r17,r2,r17 - 2eebc: 3825883a mov r18,r7 - 2eec0: 003f7106 br 2ec88 <__subdf3+0x84> - 2eec4: 2984b03a or r2,r5,r6 - 2eec8: 103f6826 beq r2,zero,2ec6c <__subdf3+0x68> - 2eecc: 39c03fcc andi r7,r7,255 - 2eed0: 003f6706 br 2ec70 <__subdf3+0x6c> - 2eed4: 4086b03a or r3,r8,r2 - 2eed8: 18015226 beq r3,zero,2f424 <__subdf3+0x820> - 2eedc: 00c00434 movhi r3,16 - 2eee0: 41400234 orhi r5,r8,8 - 2eee4: 18ffffc4 addi r3,r3,-1 - 2eee8: 28ca703a and r5,r5,r3 - 2eeec: 003f7e06 br 2ece8 <__subdf3+0xe4> - 2eef0: 10bfffc4 addi r2,r2,-1 - 2eef4: 1000491e bne r2,zero,2f01c <__subdf3+0x418> - 2eef8: 898fc83a sub r7,r17,r6 - 2eefc: 89e3803a cmpltu r17,r17,r7 - 2ef00: 1947c83a sub r3,r3,r5 - 2ef04: 1c47c83a sub r3,r3,r17 - 2ef08: 3823883a mov r17,r7 - 2ef0c: 003f9b06 br 2ed7c <__subdf3+0x178> - 2ef10: 2988b03a or r4,r5,r6 - 2ef14: 203f5c26 beq r4,zero,2ec88 <__subdf3+0x84> - 2ef18: 10bfffc4 addi r2,r2,-1 - 2ef1c: 1000931e bne r2,zero,2f16c <__subdf3+0x568> - 2ef20: 898d883a add r6,r17,r6 - 2ef24: 3463803a cmpltu r17,r6,r17 - 2ef28: 1947883a add r3,r3,r5 - 2ef2c: 88c7883a add r3,r17,r3 - 2ef30: 3023883a mov r17,r6 - 2ef34: 003fd306 br 2ee84 <__subdf3+0x280> - 2ef38: 1000541e bne r2,zero,2f08c <__subdf3+0x488> - 2ef3c: 80800044 addi r2,r16,1 - 2ef40: 1081ffcc andi r2,r2,2047 - 2ef44: 01000044 movi r4,1 - 2ef48: 2080a20e bge r4,r2,2f1d4 <__subdf3+0x5d0> - 2ef4c: 8989c83a sub r4,r17,r6 - 2ef50: 8905803a cmpltu r2,r17,r4 - 2ef54: 1967c83a sub r19,r3,r5 - 2ef58: 98a7c83a sub r19,r19,r2 - 2ef5c: 9880202c andhi r2,r19,128 - 2ef60: 10006326 beq r2,zero,2f0f0 <__subdf3+0x4ec> - 2ef64: 3463c83a sub r17,r6,r17 - 2ef68: 28c7c83a sub r3,r5,r3 - 2ef6c: 344d803a cmpltu r6,r6,r17 - 2ef70: 19a7c83a sub r19,r3,r6 - 2ef74: 3825883a mov r18,r7 - 2ef78: 983f861e bne r19,zero,2ed94 <__subdf3+0x190> - 2ef7c: 8809883a mov r4,r17 - 2ef80: 002f7040 call 2f704 <__clzsi2> - 2ef84: 10800804 addi r2,r2,32 - 2ef88: 113ffe04 addi r4,r2,-8 - 2ef8c: 00c007c4 movi r3,31 - 2ef90: 193f850e bge r3,r4,2eda8 <__subdf3+0x1a4> - 2ef94: 10bff604 addi r2,r2,-40 - 2ef98: 8884983a sll r2,r17,r2 - 2ef9c: 0023883a mov r17,zero - 2efa0: 243f880e bge r4,r16,2edc4 <__subdf3+0x1c0> - 2efa4: 00ffe034 movhi r3,65408 - 2efa8: 18ffffc4 addi r3,r3,-1 - 2efac: 8121c83a sub r16,r16,r4 - 2efb0: 10c6703a and r3,r2,r3 - 2efb4: 003f3406 br 2ec88 <__subdf3+0x84> - 2efb8: 9100004c andi r4,r18,1 - 2efbc: 000b883a mov r5,zero - 2efc0: 0005883a mov r2,zero - 2efc4: 003f4806 br 2ece8 <__subdf3+0xe4> - 2efc8: 298cb03a or r6,r5,r6 - 2efcc: 300cc03a cmpne r6,r6,zero - 2efd0: 0005883a mov r2,zero - 2efd4: 003f6406 br 2ed68 <__subdf3+0x164> - 2efd8: 10009a1e bne r2,zero,2f244 <__subdf3+0x640> - 2efdc: 82400044 addi r9,r16,1 - 2efe0: 4881ffcc andi r2,r9,2047 - 2efe4: 02800044 movi r10,1 - 2efe8: 5080670e bge r10,r2,2f188 <__subdf3+0x584> - 2efec: 0081ffc4 movi r2,2047 - 2eff0: 4880af26 beq r9,r2,2f2b0 <__subdf3+0x6ac> - 2eff4: 898d883a add r6,r17,r6 - 2eff8: 1945883a add r2,r3,r5 - 2effc: 3447803a cmpltu r3,r6,r17 - 2f000: 1887883a add r3,r3,r2 - 2f004: 182297fa slli r17,r3,31 - 2f008: 300cd07a srli r6,r6,1 - 2f00c: 1806d07a srli r3,r3,1 - 2f010: 4821883a mov r16,r9 - 2f014: 89a2b03a or r17,r17,r6 - 2f018: 003f1b06 br 2ec88 <__subdf3+0x84> - 2f01c: 0101ffc4 movi r4,2047 - 2f020: 813f441e bne r16,r4,2ed34 <__subdf3+0x130> - 2f024: 003f1806 br 2ec88 <__subdf3+0x84> - 2f028: 843ff844 addi r16,r16,-31 - 2f02c: 01400804 movi r5,32 - 2f030: 1408d83a srl r4,r2,r16 - 2f034: 19405026 beq r3,r5,2f178 <__subdf3+0x574> - 2f038: 01401004 movi r5,64 - 2f03c: 28c7c83a sub r3,r5,r3 - 2f040: 10c4983a sll r2,r2,r3 - 2f044: 88a2b03a or r17,r17,r2 - 2f048: 8822c03a cmpne r17,r17,zero - 2f04c: 2462b03a or r17,r4,r17 - 2f050: 0007883a mov r3,zero - 2f054: 0021883a mov r16,zero - 2f058: 003f6d06 br 2ee10 <__subdf3+0x20c> - 2f05c: 11fff804 addi r7,r2,-32 - 2f060: 01000804 movi r4,32 - 2f064: 29ced83a srl r7,r5,r7 - 2f068: 11004526 beq r2,r4,2f180 <__subdf3+0x57c> - 2f06c: 01001004 movi r4,64 - 2f070: 2089c83a sub r4,r4,r2 - 2f074: 2904983a sll r2,r5,r4 - 2f078: 118cb03a or r6,r2,r6 - 2f07c: 300cc03a cmpne r6,r6,zero - 2f080: 398cb03a or r6,r7,r6 - 2f084: 0005883a mov r2,zero - 2f088: 003f3706 br 2ed68 <__subdf3+0x164> - 2f08c: 80002a26 beq r16,zero,2f138 <__subdf3+0x534> - 2f090: 0101ffc4 movi r4,2047 - 2f094: 49006626 beq r9,r4,2f230 <__subdf3+0x62c> - 2f098: 0085c83a sub r2,zero,r2 - 2f09c: 18c02034 orhi r3,r3,128 - 2f0a0: 01000e04 movi r4,56 - 2f0a4: 20807e16 blt r4,r2,2f2a0 <__subdf3+0x69c> - 2f0a8: 010007c4 movi r4,31 - 2f0ac: 2080e716 blt r4,r2,2f44c <__subdf3+0x848> - 2f0b0: 01000804 movi r4,32 - 2f0b4: 2089c83a sub r4,r4,r2 - 2f0b8: 1914983a sll r10,r3,r4 - 2f0bc: 8890d83a srl r8,r17,r2 - 2f0c0: 8908983a sll r4,r17,r4 - 2f0c4: 1884d83a srl r2,r3,r2 - 2f0c8: 5222b03a or r17,r10,r8 - 2f0cc: 2006c03a cmpne r3,r4,zero - 2f0d0: 88e2b03a or r17,r17,r3 - 2f0d4: 3463c83a sub r17,r6,r17 - 2f0d8: 2885c83a sub r2,r5,r2 - 2f0dc: 344d803a cmpltu r6,r6,r17 - 2f0e0: 1187c83a sub r3,r2,r6 - 2f0e4: 4821883a mov r16,r9 - 2f0e8: 3825883a mov r18,r7 - 2f0ec: 003f2306 br 2ed7c <__subdf3+0x178> - 2f0f0: 24d0b03a or r8,r4,r19 - 2f0f4: 40001b1e bne r8,zero,2f164 <__subdf3+0x560> - 2f0f8: 0005883a mov r2,zero - 2f0fc: 0009883a mov r4,zero - 2f100: 0021883a mov r16,zero - 2f104: 003f4906 br 2ee2c <__subdf3+0x228> - 2f108: 010007c4 movi r4,31 - 2f10c: 20803a16 blt r4,r2,2f1f8 <__subdf3+0x5f4> - 2f110: 01000804 movi r4,32 - 2f114: 2089c83a sub r4,r4,r2 - 2f118: 2912983a sll r9,r5,r4 - 2f11c: 3090d83a srl r8,r6,r2 - 2f120: 3108983a sll r4,r6,r4 - 2f124: 2884d83a srl r2,r5,r2 - 2f128: 4a12b03a or r9,r9,r8 - 2f12c: 2008c03a cmpne r4,r4,zero - 2f130: 4912b03a or r9,r9,r4 - 2f134: 003f4e06 br 2ee70 <__subdf3+0x26c> - 2f138: 1c48b03a or r4,r3,r17 - 2f13c: 20003c26 beq r4,zero,2f230 <__subdf3+0x62c> - 2f140: 0084303a nor r2,zero,r2 - 2f144: 1000381e bne r2,zero,2f228 <__subdf3+0x624> - 2f148: 3463c83a sub r17,r6,r17 - 2f14c: 28c5c83a sub r2,r5,r3 - 2f150: 344d803a cmpltu r6,r6,r17 - 2f154: 1187c83a sub r3,r2,r6 - 2f158: 4821883a mov r16,r9 - 2f15c: 3825883a mov r18,r7 - 2f160: 003f0606 br 2ed7c <__subdf3+0x178> - 2f164: 2023883a mov r17,r4 - 2f168: 003f0906 br 2ed90 <__subdf3+0x18c> - 2f16c: 0101ffc4 movi r4,2047 - 2f170: 813f3a1e bne r16,r4,2ee5c <__subdf3+0x258> - 2f174: 003ec406 br 2ec88 <__subdf3+0x84> - 2f178: 0005883a mov r2,zero - 2f17c: 003fb106 br 2f044 <__subdf3+0x440> - 2f180: 0005883a mov r2,zero - 2f184: 003fbc06 br 2f078 <__subdf3+0x474> - 2f188: 1c44b03a or r2,r3,r17 - 2f18c: 80008e1e bne r16,zero,2f3c8 <__subdf3+0x7c4> - 2f190: 1000c826 beq r2,zero,2f4b4 <__subdf3+0x8b0> - 2f194: 2984b03a or r2,r5,r6 - 2f198: 103ebb26 beq r2,zero,2ec88 <__subdf3+0x84> - 2f19c: 8989883a add r4,r17,r6 - 2f1a0: 1945883a add r2,r3,r5 - 2f1a4: 2447803a cmpltu r3,r4,r17 - 2f1a8: 1887883a add r3,r3,r2 - 2f1ac: 1880202c andhi r2,r3,128 - 2f1b0: 2023883a mov r17,r4 - 2f1b4: 103f1626 beq r2,zero,2ee10 <__subdf3+0x20c> - 2f1b8: 00bfe034 movhi r2,65408 - 2f1bc: 10bfffc4 addi r2,r2,-1 - 2f1c0: 5021883a mov r16,r10 - 2f1c4: 1886703a and r3,r3,r2 - 2f1c8: 003eaf06 br 2ec88 <__subdf3+0x84> - 2f1cc: 3825883a mov r18,r7 - 2f1d0: 003f0f06 br 2ee10 <__subdf3+0x20c> - 2f1d4: 1c44b03a or r2,r3,r17 - 2f1d8: 8000251e bne r16,zero,2f270 <__subdf3+0x66c> - 2f1dc: 1000661e bne r2,zero,2f378 <__subdf3+0x774> - 2f1e0: 2990b03a or r8,r5,r6 - 2f1e4: 40009626 beq r8,zero,2f440 <__subdf3+0x83c> - 2f1e8: 2807883a mov r3,r5 - 2f1ec: 3023883a mov r17,r6 - 2f1f0: 3825883a mov r18,r7 - 2f1f4: 003ea406 br 2ec88 <__subdf3+0x84> - 2f1f8: 127ff804 addi r9,r2,-32 - 2f1fc: 01000804 movi r4,32 - 2f200: 2a52d83a srl r9,r5,r9 - 2f204: 11008c26 beq r2,r4,2f438 <__subdf3+0x834> - 2f208: 01001004 movi r4,64 - 2f20c: 2085c83a sub r2,r4,r2 - 2f210: 2884983a sll r2,r5,r2 - 2f214: 118cb03a or r6,r2,r6 - 2f218: 300cc03a cmpne r6,r6,zero - 2f21c: 4992b03a or r9,r9,r6 - 2f220: 0005883a mov r2,zero - 2f224: 003f1206 br 2ee70 <__subdf3+0x26c> - 2f228: 0101ffc4 movi r4,2047 - 2f22c: 493f9c1e bne r9,r4,2f0a0 <__subdf3+0x49c> - 2f230: 2807883a mov r3,r5 - 2f234: 3023883a mov r17,r6 - 2f238: 4821883a mov r16,r9 - 2f23c: 3825883a mov r18,r7 - 2f240: 003e9106 br 2ec88 <__subdf3+0x84> - 2f244: 80001f1e bne r16,zero,2f2c4 <__subdf3+0x6c0> - 2f248: 1c48b03a or r4,r3,r17 - 2f24c: 20005a26 beq r4,zero,2f3b8 <__subdf3+0x7b4> - 2f250: 0084303a nor r2,zero,r2 - 2f254: 1000561e bne r2,zero,2f3b0 <__subdf3+0x7ac> - 2f258: 89a3883a add r17,r17,r6 - 2f25c: 1945883a add r2,r3,r5 - 2f260: 898d803a cmpltu r6,r17,r6 - 2f264: 3087883a add r3,r6,r2 - 2f268: 4821883a mov r16,r9 - 2f26c: 003f0506 br 2ee84 <__subdf3+0x280> - 2f270: 10002b1e bne r2,zero,2f320 <__subdf3+0x71c> - 2f274: 2984b03a or r2,r5,r6 - 2f278: 10008026 beq r2,zero,2f47c <__subdf3+0x878> - 2f27c: 2807883a mov r3,r5 - 2f280: 3023883a mov r17,r6 - 2f284: 3825883a mov r18,r7 - 2f288: 0401ffc4 movi r16,2047 - 2f28c: 003e7e06 br 2ec88 <__subdf3+0x84> - 2f290: 3809883a mov r4,r7 - 2f294: 0011883a mov r8,zero - 2f298: 0005883a mov r2,zero - 2f29c: 003ee306 br 2ee2c <__subdf3+0x228> - 2f2a0: 1c62b03a or r17,r3,r17 - 2f2a4: 8822c03a cmpne r17,r17,zero - 2f2a8: 0005883a mov r2,zero - 2f2ac: 003f8906 br 2f0d4 <__subdf3+0x4d0> - 2f2b0: 3809883a mov r4,r7 - 2f2b4: 4821883a mov r16,r9 - 2f2b8: 0011883a mov r8,zero - 2f2bc: 0005883a mov r2,zero - 2f2c0: 003eda06 br 2ee2c <__subdf3+0x228> - 2f2c4: 0101ffc4 movi r4,2047 - 2f2c8: 49003b26 beq r9,r4,2f3b8 <__subdf3+0x7b4> - 2f2cc: 0085c83a sub r2,zero,r2 - 2f2d0: 18c02034 orhi r3,r3,128 - 2f2d4: 01000e04 movi r4,56 - 2f2d8: 20806e16 blt r4,r2,2f494 <__subdf3+0x890> - 2f2dc: 010007c4 movi r4,31 - 2f2e0: 20807716 blt r4,r2,2f4c0 <__subdf3+0x8bc> - 2f2e4: 01000804 movi r4,32 - 2f2e8: 2089c83a sub r4,r4,r2 - 2f2ec: 1914983a sll r10,r3,r4 - 2f2f0: 8890d83a srl r8,r17,r2 - 2f2f4: 8908983a sll r4,r17,r4 - 2f2f8: 1884d83a srl r2,r3,r2 - 2f2fc: 5222b03a or r17,r10,r8 - 2f300: 2006c03a cmpne r3,r4,zero - 2f304: 88e2b03a or r17,r17,r3 - 2f308: 89a3883a add r17,r17,r6 - 2f30c: 1145883a add r2,r2,r5 - 2f310: 898d803a cmpltu r6,r17,r6 - 2f314: 3087883a add r3,r6,r2 - 2f318: 4821883a mov r16,r9 - 2f31c: 003ed906 br 2ee84 <__subdf3+0x280> - 2f320: 2984b03a or r2,r5,r6 - 2f324: 10004226 beq r2,zero,2f430 <__subdf3+0x82c> - 2f328: 1808d0fa srli r4,r3,3 - 2f32c: 8822d0fa srli r17,r17,3 - 2f330: 1806977a slli r3,r3,29 - 2f334: 2080022c andhi r2,r4,8 - 2f338: 1c62b03a or r17,r3,r17 - 2f33c: 10000826 beq r2,zero,2f360 <__subdf3+0x75c> - 2f340: 2812d0fa srli r9,r5,3 - 2f344: 4880022c andhi r2,r9,8 - 2f348: 1000051e bne r2,zero,2f360 <__subdf3+0x75c> - 2f34c: 300cd0fa srli r6,r6,3 - 2f350: 2804977a slli r2,r5,29 - 2f354: 4809883a mov r4,r9 - 2f358: 3825883a mov r18,r7 - 2f35c: 11a2b03a or r17,r2,r6 - 2f360: 8806d77a srli r3,r17,29 - 2f364: 200890fa slli r4,r4,3 - 2f368: 882290fa slli r17,r17,3 - 2f36c: 0401ffc4 movi r16,2047 - 2f370: 1906b03a or r3,r3,r4 - 2f374: 003e4406 br 2ec88 <__subdf3+0x84> - 2f378: 2984b03a or r2,r5,r6 - 2f37c: 103e4226 beq r2,zero,2ec88 <__subdf3+0x84> - 2f380: 8989c83a sub r4,r17,r6 - 2f384: 8911803a cmpltu r8,r17,r4 - 2f388: 1945c83a sub r2,r3,r5 - 2f38c: 1205c83a sub r2,r2,r8 - 2f390: 1200202c andhi r8,r2,128 - 2f394: 403e9a26 beq r8,zero,2ee00 <__subdf3+0x1fc> - 2f398: 3463c83a sub r17,r6,r17 - 2f39c: 28c5c83a sub r2,r5,r3 - 2f3a0: 344d803a cmpltu r6,r6,r17 - 2f3a4: 1187c83a sub r3,r2,r6 - 2f3a8: 3825883a mov r18,r7 - 2f3ac: 003e3606 br 2ec88 <__subdf3+0x84> - 2f3b0: 0101ffc4 movi r4,2047 - 2f3b4: 493fc71e bne r9,r4,2f2d4 <__subdf3+0x6d0> - 2f3b8: 2807883a mov r3,r5 - 2f3bc: 3023883a mov r17,r6 - 2f3c0: 4821883a mov r16,r9 - 2f3c4: 003e3006 br 2ec88 <__subdf3+0x84> - 2f3c8: 10003626 beq r2,zero,2f4a4 <__subdf3+0x8a0> - 2f3cc: 2984b03a or r2,r5,r6 - 2f3d0: 10001726 beq r2,zero,2f430 <__subdf3+0x82c> - 2f3d4: 1808d0fa srli r4,r3,3 - 2f3d8: 8822d0fa srli r17,r17,3 - 2f3dc: 1806977a slli r3,r3,29 - 2f3e0: 2080022c andhi r2,r4,8 - 2f3e4: 1c62b03a or r17,r3,r17 - 2f3e8: 10000726 beq r2,zero,2f408 <__subdf3+0x804> - 2f3ec: 2812d0fa srli r9,r5,3 - 2f3f0: 4880022c andhi r2,r9,8 - 2f3f4: 1000041e bne r2,zero,2f408 <__subdf3+0x804> - 2f3f8: 300cd0fa srli r6,r6,3 - 2f3fc: 2804977a slli r2,r5,29 - 2f400: 4809883a mov r4,r9 - 2f404: 11a2b03a or r17,r2,r6 - 2f408: 8806d77a srli r3,r17,29 - 2f40c: 200890fa slli r4,r4,3 - 2f410: 882290fa slli r17,r17,3 - 2f414: 3825883a mov r18,r7 - 2f418: 1906b03a or r3,r3,r4 - 2f41c: 0401ffc4 movi r16,2047 - 2f420: 003e1906 br 2ec88 <__subdf3+0x84> - 2f424: 000b883a mov r5,zero - 2f428: 0005883a mov r2,zero - 2f42c: 003e2e06 br 2ece8 <__subdf3+0xe4> - 2f430: 0401ffc4 movi r16,2047 - 2f434: 003e1406 br 2ec88 <__subdf3+0x84> - 2f438: 0005883a mov r2,zero - 2f43c: 003f7506 br 2f214 <__subdf3+0x610> - 2f440: 0005883a mov r2,zero - 2f444: 0009883a mov r4,zero - 2f448: 003e7806 br 2ee2c <__subdf3+0x228> - 2f44c: 123ff804 addi r8,r2,-32 - 2f450: 01000804 movi r4,32 - 2f454: 1a10d83a srl r8,r3,r8 - 2f458: 11002526 beq r2,r4,2f4f0 <__subdf3+0x8ec> - 2f45c: 01001004 movi r4,64 - 2f460: 2085c83a sub r2,r4,r2 - 2f464: 1884983a sll r2,r3,r2 - 2f468: 1444b03a or r2,r2,r17 - 2f46c: 1004c03a cmpne r2,r2,zero - 2f470: 40a2b03a or r17,r8,r2 - 2f474: 0005883a mov r2,zero - 2f478: 003f1606 br 2f0d4 <__subdf3+0x4d0> - 2f47c: 02000434 movhi r8,16 - 2f480: 0009883a mov r4,zero - 2f484: 423fffc4 addi r8,r8,-1 - 2f488: 00bfffc4 movi r2,-1 - 2f48c: 0401ffc4 movi r16,2047 - 2f490: 003e6606 br 2ee2c <__subdf3+0x228> - 2f494: 1c62b03a or r17,r3,r17 - 2f498: 8822c03a cmpne r17,r17,zero - 2f49c: 0005883a mov r2,zero - 2f4a0: 003f9906 br 2f308 <__subdf3+0x704> - 2f4a4: 2807883a mov r3,r5 - 2f4a8: 3023883a mov r17,r6 - 2f4ac: 0401ffc4 movi r16,2047 - 2f4b0: 003df506 br 2ec88 <__subdf3+0x84> - 2f4b4: 2807883a mov r3,r5 - 2f4b8: 3023883a mov r17,r6 - 2f4bc: 003df206 br 2ec88 <__subdf3+0x84> - 2f4c0: 123ff804 addi r8,r2,-32 - 2f4c4: 01000804 movi r4,32 - 2f4c8: 1a10d83a srl r8,r3,r8 - 2f4cc: 11000a26 beq r2,r4,2f4f8 <__subdf3+0x8f4> - 2f4d0: 01001004 movi r4,64 - 2f4d4: 2085c83a sub r2,r4,r2 - 2f4d8: 1884983a sll r2,r3,r2 - 2f4dc: 1444b03a or r2,r2,r17 - 2f4e0: 1004c03a cmpne r2,r2,zero - 2f4e4: 40a2b03a or r17,r8,r2 - 2f4e8: 0005883a mov r2,zero - 2f4ec: 003f8606 br 2f308 <__subdf3+0x704> - 2f4f0: 0005883a mov r2,zero - 2f4f4: 003fdc06 br 2f468 <__subdf3+0x864> - 2f4f8: 0005883a mov r2,zero - 2f4fc: 003ff706 br 2f4dc <__subdf3+0x8d8> +0002edcc <__floatsidf>: + 2edcc: defffd04 addi sp,sp,-12 + 2edd0: dfc00215 stw ra,8(sp) + 2edd4: dc400115 stw r17,4(sp) + 2edd8: dc000015 stw r16,0(sp) + 2eddc: 20002b26 beq r4,zero,2ee8c <__floatsidf+0xc0> + 2ede0: 2023883a mov r17,r4 + 2ede4: 2020d7fa srli r16,r4,31 + 2ede8: 20002d16 blt r4,zero,2eea0 <__floatsidf+0xd4> + 2edec: 8809883a mov r4,r17 + 2edf0: 002ef500 call 2ef50 <__clzsi2> + 2edf4: 01410784 movi r5,1054 + 2edf8: 288bc83a sub r5,r5,r2 + 2edfc: 01010cc4 movi r4,1075 + 2ee00: 2149c83a sub r4,r4,r5 + 2ee04: 00c007c4 movi r3,31 + 2ee08: 1900160e bge r3,r4,2ee64 <__floatsidf+0x98> + 2ee0c: 00c104c4 movi r3,1043 + 2ee10: 1947c83a sub r3,r3,r5 + 2ee14: 88c6983a sll r3,r17,r3 + 2ee18: 00800434 movhi r2,16 + 2ee1c: 10bfffc4 addi r2,r2,-1 + 2ee20: 1886703a and r3,r3,r2 + 2ee24: 2941ffcc andi r5,r5,2047 + 2ee28: 800d883a mov r6,r16 + 2ee2c: 0005883a mov r2,zero + 2ee30: 280a953a slli r5,r5,20 + 2ee34: 31803fcc andi r6,r6,255 + 2ee38: 01000434 movhi r4,16 + 2ee3c: 300c97fa slli r6,r6,31 + 2ee40: 213fffc4 addi r4,r4,-1 + 2ee44: 1906703a and r3,r3,r4 + 2ee48: 1946b03a or r3,r3,r5 + 2ee4c: 1986b03a or r3,r3,r6 + 2ee50: dfc00217 ldw ra,8(sp) + 2ee54: dc400117 ldw r17,4(sp) + 2ee58: dc000017 ldw r16,0(sp) + 2ee5c: dec00304 addi sp,sp,12 + 2ee60: f800283a ret + 2ee64: 00c002c4 movi r3,11 + 2ee68: 1887c83a sub r3,r3,r2 + 2ee6c: 88c6d83a srl r3,r17,r3 + 2ee70: 8904983a sll r2,r17,r4 + 2ee74: 01000434 movhi r4,16 + 2ee78: 213fffc4 addi r4,r4,-1 + 2ee7c: 2941ffcc andi r5,r5,2047 + 2ee80: 1906703a and r3,r3,r4 + 2ee84: 800d883a mov r6,r16 + 2ee88: 003fe906 br 2ee30 <_gp+0xffff28f8> + 2ee8c: 000d883a mov r6,zero + 2ee90: 000b883a mov r5,zero + 2ee94: 0007883a mov r3,zero + 2ee98: 0005883a mov r2,zero + 2ee9c: 003fe406 br 2ee30 <_gp+0xffff28f8> + 2eea0: 0123c83a sub r17,zero,r4 + 2eea4: 003fd106 br 2edec <_gp+0xffff28b4> -0002f500 <__fixdfsi>: - 2f500: 280cd53a srli r6,r5,20 - 2f504: 00c00434 movhi r3,16 - 2f508: 18ffffc4 addi r3,r3,-1 - 2f50c: 3181ffcc andi r6,r6,2047 - 2f510: 01c0ff84 movi r7,1022 - 2f514: 28c6703a and r3,r5,r3 - 2f518: 280ad7fa srli r5,r5,31 - 2f51c: 3980120e bge r7,r6,2f568 <__fixdfsi+0x68> - 2f520: 00810744 movi r2,1053 - 2f524: 11800c16 blt r2,r6,2f558 <__fixdfsi+0x58> - 2f528: 00810cc4 movi r2,1075 - 2f52c: 1185c83a sub r2,r2,r6 - 2f530: 01c007c4 movi r7,31 - 2f534: 18c00434 orhi r3,r3,16 - 2f538: 38800d16 blt r7,r2,2f570 <__fixdfsi+0x70> - 2f53c: 31befb44 addi r6,r6,-1043 - 2f540: 2084d83a srl r2,r4,r2 - 2f544: 1986983a sll r3,r3,r6 - 2f548: 1884b03a or r2,r3,r2 - 2f54c: 28000726 beq r5,zero,2f56c <__fixdfsi+0x6c> - 2f550: 0085c83a sub r2,zero,r2 - 2f554: f800283a ret - 2f558: 00a00034 movhi r2,32768 - 2f55c: 10bfffc4 addi r2,r2,-1 - 2f560: 2885883a add r2,r5,r2 - 2f564: f800283a ret - 2f568: 0005883a mov r2,zero - 2f56c: f800283a ret - 2f570: 008104c4 movi r2,1043 - 2f574: 1185c83a sub r2,r2,r6 - 2f578: 1884d83a srl r2,r3,r2 - 2f57c: 003ff306 br 2f54c <__fixdfsi+0x4c> +0002eea8 <__floatunsidf>: + 2eea8: defffe04 addi sp,sp,-8 + 2eeac: dc000015 stw r16,0(sp) + 2eeb0: dfc00115 stw ra,4(sp) + 2eeb4: 2021883a mov r16,r4 + 2eeb8: 20002226 beq r4,zero,2ef44 <__floatunsidf+0x9c> + 2eebc: 002ef500 call 2ef50 <__clzsi2> + 2eec0: 01010784 movi r4,1054 + 2eec4: 2089c83a sub r4,r4,r2 + 2eec8: 01810cc4 movi r6,1075 + 2eecc: 310dc83a sub r6,r6,r4 + 2eed0: 00c007c4 movi r3,31 + 2eed4: 1980120e bge r3,r6,2ef20 <__floatunsidf+0x78> + 2eed8: 00c104c4 movi r3,1043 + 2eedc: 1907c83a sub r3,r3,r4 + 2eee0: 80ca983a sll r5,r16,r3 + 2eee4: 00800434 movhi r2,16 + 2eee8: 10bfffc4 addi r2,r2,-1 + 2eeec: 2101ffcc andi r4,r4,2047 + 2eef0: 0021883a mov r16,zero + 2eef4: 288a703a and r5,r5,r2 + 2eef8: 2008953a slli r4,r4,20 + 2eefc: 00c00434 movhi r3,16 + 2ef00: 18ffffc4 addi r3,r3,-1 + 2ef04: 28c6703a and r3,r5,r3 + 2ef08: 8005883a mov r2,r16 + 2ef0c: 1906b03a or r3,r3,r4 + 2ef10: dfc00117 ldw ra,4(sp) + 2ef14: dc000017 ldw r16,0(sp) + 2ef18: dec00204 addi sp,sp,8 + 2ef1c: f800283a ret + 2ef20: 00c002c4 movi r3,11 + 2ef24: 188bc83a sub r5,r3,r2 + 2ef28: 814ad83a srl r5,r16,r5 + 2ef2c: 00c00434 movhi r3,16 + 2ef30: 18ffffc4 addi r3,r3,-1 + 2ef34: 81a0983a sll r16,r16,r6 + 2ef38: 2101ffcc andi r4,r4,2047 + 2ef3c: 28ca703a and r5,r5,r3 + 2ef40: 003fed06 br 2eef8 <_gp+0xffff29c0> + 2ef44: 0009883a mov r4,zero + 2ef48: 000b883a mov r5,zero + 2ef4c: 003fea06 br 2eef8 <_gp+0xffff29c0> -0002f580 <__floatsidf>: - 2f580: defffd04 addi sp,sp,-12 - 2f584: dfc00215 stw ra,8(sp) - 2f588: dc400115 stw r17,4(sp) - 2f58c: dc000015 stw r16,0(sp) - 2f590: 20002b26 beq r4,zero,2f640 <__floatsidf+0xc0> - 2f594: 2023883a mov r17,r4 - 2f598: 2020d7fa srli r16,r4,31 - 2f59c: 20002d16 blt r4,zero,2f654 <__floatsidf+0xd4> - 2f5a0: 8809883a mov r4,r17 - 2f5a4: 002f7040 call 2f704 <__clzsi2> - 2f5a8: 01410784 movi r5,1054 - 2f5ac: 288bc83a sub r5,r5,r2 - 2f5b0: 01010cc4 movi r4,1075 - 2f5b4: 2149c83a sub r4,r4,r5 - 2f5b8: 00c007c4 movi r3,31 - 2f5bc: 1900160e bge r3,r4,2f618 <__floatsidf+0x98> - 2f5c0: 00c104c4 movi r3,1043 - 2f5c4: 1947c83a sub r3,r3,r5 - 2f5c8: 88c6983a sll r3,r17,r3 - 2f5cc: 00800434 movhi r2,16 - 2f5d0: 10bfffc4 addi r2,r2,-1 - 2f5d4: 1886703a and r3,r3,r2 - 2f5d8: 2941ffcc andi r5,r5,2047 - 2f5dc: 800d883a mov r6,r16 - 2f5e0: 0005883a mov r2,zero - 2f5e4: 280a953a slli r5,r5,20 - 2f5e8: 31803fcc andi r6,r6,255 - 2f5ec: 01000434 movhi r4,16 - 2f5f0: 300c97fa slli r6,r6,31 - 2f5f4: 213fffc4 addi r4,r4,-1 - 2f5f8: 1906703a and r3,r3,r4 - 2f5fc: 1946b03a or r3,r3,r5 - 2f600: 1986b03a or r3,r3,r6 - 2f604: dfc00217 ldw ra,8(sp) - 2f608: dc400117 ldw r17,4(sp) - 2f60c: dc000017 ldw r16,0(sp) - 2f610: dec00304 addi sp,sp,12 - 2f614: f800283a ret - 2f618: 00c002c4 movi r3,11 - 2f61c: 1887c83a sub r3,r3,r2 - 2f620: 88c6d83a srl r3,r17,r3 - 2f624: 8904983a sll r2,r17,r4 - 2f628: 01000434 movhi r4,16 - 2f62c: 213fffc4 addi r4,r4,-1 - 2f630: 2941ffcc andi r5,r5,2047 - 2f634: 1906703a and r3,r3,r4 - 2f638: 800d883a mov r6,r16 - 2f63c: 003fe906 br 2f5e4 <__floatsidf+0x64> - 2f640: 000d883a mov r6,zero - 2f644: 000b883a mov r5,zero - 2f648: 0007883a mov r3,zero - 2f64c: 0005883a mov r2,zero - 2f650: 003fe406 br 2f5e4 <__floatsidf+0x64> - 2f654: 0123c83a sub r17,zero,r4 - 2f658: 003fd106 br 2f5a0 <__floatsidf+0x20> +0002ef50 <__clzsi2>: + 2ef50: 00bfffd4 movui r2,65535 + 2ef54: 11000536 bltu r2,r4,2ef6c <__clzsi2+0x1c> + 2ef58: 00803fc4 movi r2,255 + 2ef5c: 11000f36 bltu r2,r4,2ef9c <__clzsi2+0x4c> + 2ef60: 00800804 movi r2,32 + 2ef64: 0007883a mov r3,zero + 2ef68: 00000506 br 2ef80 <__clzsi2+0x30> + 2ef6c: 00804034 movhi r2,256 + 2ef70: 10bfffc4 addi r2,r2,-1 + 2ef74: 11000c2e bgeu r2,r4,2efa8 <__clzsi2+0x58> + 2ef78: 00800204 movi r2,8 + 2ef7c: 00c00604 movi r3,24 + 2ef80: 20c8d83a srl r4,r4,r3 + 2ef84: 00c000f4 movhi r3,3 + 2ef88: 18c86e04 addi r3,r3,8632 + 2ef8c: 1909883a add r4,r3,r4 + 2ef90: 20c00003 ldbu r3,0(r4) + 2ef94: 10c5c83a sub r2,r2,r3 + 2ef98: f800283a ret + 2ef9c: 00800604 movi r2,24 + 2efa0: 00c00204 movi r3,8 + 2efa4: 003ff606 br 2ef80 <_gp+0xffff2a48> + 2efa8: 00800404 movi r2,16 + 2efac: 1007883a mov r3,r2 + 2efb0: 003ff306 br 2ef80 <_gp+0xffff2a48> -0002f65c <__floatunsidf>: - 2f65c: defffe04 addi sp,sp,-8 - 2f660: dc000015 stw r16,0(sp) - 2f664: dfc00115 stw ra,4(sp) - 2f668: 2021883a mov r16,r4 - 2f66c: 20002226 beq r4,zero,2f6f8 <__floatunsidf+0x9c> - 2f670: 002f7040 call 2f704 <__clzsi2> - 2f674: 01010784 movi r4,1054 - 2f678: 2089c83a sub r4,r4,r2 - 2f67c: 01810cc4 movi r6,1075 - 2f680: 310dc83a sub r6,r6,r4 - 2f684: 00c007c4 movi r3,31 - 2f688: 1980120e bge r3,r6,2f6d4 <__floatunsidf+0x78> - 2f68c: 00c104c4 movi r3,1043 - 2f690: 1907c83a sub r3,r3,r4 - 2f694: 80ca983a sll r5,r16,r3 - 2f698: 00800434 movhi r2,16 - 2f69c: 10bfffc4 addi r2,r2,-1 - 2f6a0: 2101ffcc andi r4,r4,2047 - 2f6a4: 0021883a mov r16,zero - 2f6a8: 288a703a and r5,r5,r2 - 2f6ac: 2008953a slli r4,r4,20 - 2f6b0: 00c00434 movhi r3,16 - 2f6b4: 18ffffc4 addi r3,r3,-1 - 2f6b8: 28c6703a and r3,r5,r3 - 2f6bc: 8005883a mov r2,r16 - 2f6c0: 1906b03a or r3,r3,r4 - 2f6c4: dfc00117 ldw ra,4(sp) - 2f6c8: dc000017 ldw r16,0(sp) - 2f6cc: dec00204 addi sp,sp,8 - 2f6d0: f800283a ret - 2f6d4: 00c002c4 movi r3,11 - 2f6d8: 188bc83a sub r5,r3,r2 - 2f6dc: 814ad83a srl r5,r16,r5 - 2f6e0: 00c00434 movhi r3,16 - 2f6e4: 18ffffc4 addi r3,r3,-1 - 2f6e8: 81a0983a sll r16,r16,r6 - 2f6ec: 2101ffcc andi r4,r4,2047 - 2f6f0: 28ca703a and r5,r5,r3 - 2f6f4: 003fed06 br 2f6ac <__floatunsidf+0x50> - 2f6f8: 0009883a mov r4,zero - 2f6fc: 000b883a mov r5,zero - 2f700: 003fea06 br 2f6ac <__floatunsidf+0x50> - -0002f704 <__clzsi2>: - 2f704: 00bfffd4 movui r2,65535 - 2f708: 11000536 bltu r2,r4,2f720 <__clzsi2+0x1c> - 2f70c: 00803fc4 movi r2,255 - 2f710: 11000f36 bltu r2,r4,2f750 <__clzsi2+0x4c> - 2f714: 00800804 movi r2,32 - 2f718: 0007883a mov r3,zero - 2f71c: 00000506 br 2f734 <__clzsi2+0x30> - 2f720: 00804034 movhi r2,256 - 2f724: 10bfffc4 addi r2,r2,-1 - 2f728: 11000c2e bgeu r2,r4,2f75c <__clzsi2+0x58> - 2f72c: 00800204 movi r2,8 - 2f730: 00c00604 movi r3,24 - 2f734: 20c8d83a srl r4,r4,r3 - 2f738: 00c000f4 movhi r3,3 - 2f73c: 18cabb04 addi r3,r3,10988 - 2f740: 1909883a add r4,r3,r4 - 2f744: 20c00003 ldbu r3,0(r4) - 2f748: 10c5c83a sub r2,r2,r3 - 2f74c: f800283a ret - 2f750: 00800604 movi r2,24 - 2f754: 00c00204 movi r3,8 - 2f758: 003ff606 br 2f734 <__clzsi2+0x30> - 2f75c: 00800404 movi r2,16 - 2f760: 1007883a mov r3,r2 - 2f764: 003ff306 br 2f734 <__clzsi2+0x30> - -0002f768 : +0002efb4 : #undef errno extern int errno; static ALT_INLINE int* alt_get_errno(void) { - 2f768: defffe04 addi sp,sp,-8 - 2f76c: dfc00115 stw ra,4(sp) - 2f770: df000015 stw fp,0(sp) - 2f774: d839883a mov fp,sp + 2efb4: defffe04 addi sp,sp,-8 + 2efb8: dfc00115 stw ra,4(sp) + 2efbc: df000015 stw fp,0(sp) + 2efc0: d839883a mov fp,sp return ((alt_errno) ? alt_errno() : &errno); - 2f778: 008000f4 movhi r2,3 - 2f77c: 1093a904 addi r2,r2,20132 - 2f780: 10800017 ldw r2,0(r2) - 2f784: 10000526 beq r2,zero,2f79c - 2f788: 008000f4 movhi r2,3 - 2f78c: 1093a904 addi r2,r2,20132 - 2f790: 10800017 ldw r2,0(r2) - 2f794: 103ee83a callr r2 - 2f798: 00000206 br 2f7a4 - 2f79c: 008000f4 movhi r2,3 - 2f7a0: 109c5904 addi r2,r2,29028 + 2efc4: 008000f4 movhi r2,3 + 2efc8: 10915c04 addi r2,r2,17776 + 2efcc: 10800017 ldw r2,0(r2) + 2efd0: 10000526 beq r2,zero,2efe8 + 2efd4: 008000f4 movhi r2,3 + 2efd8: 10915c04 addi r2,r2,17776 + 2efdc: 10800017 ldw r2,0(r2) + 2efe0: 103ee83a callr r2 + 2efe4: 00000206 br 2eff0 + 2efe8: 008000f4 movhi r2,3 + 2efec: 109a0c04 addi r2,r2,26672 } - 2f7a4: e037883a mov sp,fp - 2f7a8: dfc00117 ldw ra,4(sp) - 2f7ac: df000017 ldw fp,0(sp) - 2f7b0: dec00204 addi sp,sp,8 - 2f7b4: f800283a ret + 2eff0: e037883a mov sp,fp + 2eff4: dfc00117 ldw ra,4(sp) + 2eff8: df000017 ldw fp,0(sp) + 2effc: dec00204 addi sp,sp,8 + 2f000: f800283a ret -0002f7b8 : +0002f004 : * * ALT_CLOSE is mapped onto the close() system call in alt_syscall.h */ int ALT_CLOSE (int fildes) { - 2f7b8: defffb04 addi sp,sp,-20 - 2f7bc: dfc00415 stw ra,16(sp) - 2f7c0: df000315 stw fp,12(sp) - 2f7c4: df000304 addi fp,sp,12 - 2f7c8: e13fff15 stw r4,-4(fp) + 2f004: defffb04 addi sp,sp,-20 + 2f008: dfc00415 stw ra,16(sp) + 2f00c: df000315 stw fp,12(sp) + 2f010: df000304 addi fp,sp,12 + 2f014: e13fff15 stw r4,-4(fp) * A common error case is that when the file descriptor was created, the call * to open() failed resulting in a negative file descriptor. This is trapped * below so that we don't try and process an invalid file descriptor. */ fd = (fildes < 0) ? NULL : &alt_fd_list[fildes]; - 2f7cc: e0bfff17 ldw r2,-4(fp) - 2f7d0: 10000616 blt r2,zero,2f7ec - 2f7d4: e0bfff17 ldw r2,-4(fp) - 2f7d8: 10c00324 muli r3,r2,12 - 2f7dc: 008000f4 movhi r2,3 - 2f7e0: 108f2304 addi r2,r2,15500 - 2f7e4: 1885883a add r2,r3,r2 - 2f7e8: 00000106 br 2f7f0 - 2f7ec: 0005883a mov r2,zero - 2f7f0: e0bffd15 stw r2,-12(fp) + 2f018: e0bfff17 ldw r2,-4(fp) + 2f01c: 10000616 blt r2,zero,2f038 + 2f020: e0bfff17 ldw r2,-4(fp) + 2f024: 10c00324 muli r3,r2,12 + 2f028: 008000f4 movhi r2,3 + 2f02c: 108cd604 addi r2,r2,13144 + 2f030: 1885883a add r2,r3,r2 + 2f034: 00000106 br 2f03c + 2f038: 0005883a mov r2,zero + 2f03c: e0bffd15 stw r2,-12(fp) if (fd) - 2f7f4: e0bffd17 ldw r2,-12(fp) - 2f7f8: 10001926 beq r2,zero,2f860 + 2f040: e0bffd17 ldw r2,-12(fp) + 2f044: 10001926 beq r2,zero,2f0ac /* * If the associated file system/device has a close function, call it so * that any necessary cleanup code can run. */ rval = (fd->dev->close) ? fd->dev->close(fd) : 0; - 2f7fc: e0bffd17 ldw r2,-12(fp) - 2f800: 10800017 ldw r2,0(r2) - 2f804: 10800417 ldw r2,16(r2) - 2f808: 10000626 beq r2,zero,2f824 - 2f80c: e0bffd17 ldw r2,-12(fp) - 2f810: 10800017 ldw r2,0(r2) - 2f814: 10800417 ldw r2,16(r2) - 2f818: e13ffd17 ldw r4,-12(fp) - 2f81c: 103ee83a callr r2 - 2f820: 00000106 br 2f828 - 2f824: 0005883a mov r2,zero - 2f828: e0bffe15 stw r2,-8(fp) + 2f048: e0bffd17 ldw r2,-12(fp) + 2f04c: 10800017 ldw r2,0(r2) + 2f050: 10800417 ldw r2,16(r2) + 2f054: 10000626 beq r2,zero,2f070 + 2f058: e0bffd17 ldw r2,-12(fp) + 2f05c: 10800017 ldw r2,0(r2) + 2f060: 10800417 ldw r2,16(r2) + 2f064: e13ffd17 ldw r4,-12(fp) + 2f068: 103ee83a callr r2 + 2f06c: 00000106 br 2f074 + 2f070: 0005883a mov r2,zero + 2f074: e0bffe15 stw r2,-8(fp) /* Free the file descriptor structure and return. */ alt_release_fd (fildes); - 2f82c: e13fff17 ldw r4,-4(fp) - 2f830: 00300380 call 30038 + 2f078: e13fff17 ldw r4,-4(fp) + 2f07c: 002f7140 call 2f714 if (rval < 0) - 2f834: e0bffe17 ldw r2,-8(fp) - 2f838: 1000070e bge r2,zero,2f858 + 2f080: e0bffe17 ldw r2,-8(fp) + 2f084: 1000070e bge r2,zero,2f0a4 { ALT_ERRNO = -rval; - 2f83c: 002f7680 call 2f768 - 2f840: 1007883a mov r3,r2 - 2f844: e0bffe17 ldw r2,-8(fp) - 2f848: 0085c83a sub r2,zero,r2 - 2f84c: 18800015 stw r2,0(r3) + 2f088: 002efb40 call 2efb4 + 2f08c: 1007883a mov r3,r2 + 2f090: e0bffe17 ldw r2,-8(fp) + 2f094: 0085c83a sub r2,zero,r2 + 2f098: 18800015 stw r2,0(r3) return -1; - 2f850: 00bfffc4 movi r2,-1 - 2f854: 00000706 br 2f874 + 2f09c: 00bfffc4 movi r2,-1 + 2f0a0: 00000706 br 2f0c0 } return 0; - 2f858: 0005883a mov r2,zero - 2f85c: 00000506 br 2f874 + 2f0a4: 0005883a mov r2,zero + 2f0a8: 00000506 br 2f0c0 } else { ALT_ERRNO = EBADFD; - 2f860: 002f7680 call 2f768 - 2f864: 1007883a mov r3,r2 - 2f868: 00801444 movi r2,81 - 2f86c: 18800015 stw r2,0(r3) + 2f0ac: 002efb40 call 2efb4 + 2f0b0: 1007883a mov r3,r2 + 2f0b4: 00801444 movi r2,81 + 2f0b8: 18800015 stw r2,0(r3) return -1; - 2f870: 00bfffc4 movi r2,-1 + 2f0bc: 00bfffc4 movi r2,-1 } } - 2f874: e037883a mov sp,fp - 2f878: dfc00117 ldw ra,4(sp) - 2f87c: df000017 ldw fp,0(sp) - 2f880: dec00204 addi sp,sp,8 - 2f884: f800283a ret + 2f0c0: e037883a mov sp,fp + 2f0c4: dfc00117 ldw ra,4(sp) + 2f0c8: df000017 ldw fp,0(sp) + 2f0cc: dec00204 addi sp,sp,8 + 2f0d0: f800283a ret -0002f888 : +0002f0d4 : * by the alt_dev_null device. It simple discards all data passed to it, and * indicates that the data has been successfully transmitted. */ static int alt_dev_null_write (alt_fd* fd, const char* ptr, int len) { - 2f888: defffc04 addi sp,sp,-16 - 2f88c: df000315 stw fp,12(sp) - 2f890: df000304 addi fp,sp,12 - 2f894: e13ffd15 stw r4,-12(fp) - 2f898: e17ffe15 stw r5,-8(fp) - 2f89c: e1bfff15 stw r6,-4(fp) + 2f0d4: defffc04 addi sp,sp,-16 + 2f0d8: df000315 stw fp,12(sp) + 2f0dc: df000304 addi fp,sp,12 + 2f0e0: e13ffd15 stw r4,-12(fp) + 2f0e4: e17ffe15 stw r5,-8(fp) + 2f0e8: e1bfff15 stw r6,-4(fp) return len; - 2f8a0: e0bfff17 ldw r2,-4(fp) + 2f0ec: e0bfff17 ldw r2,-4(fp) } - 2f8a4: e037883a mov sp,fp - 2f8a8: df000017 ldw fp,0(sp) - 2f8ac: dec00104 addi sp,sp,4 - 2f8b0: f800283a ret + 2f0f0: e037883a mov sp,fp + 2f0f4: df000017 ldw fp,0(sp) + 2f0f8: dec00104 addi sp,sp,4 + 2f0fc: f800283a ret -0002f8b4 : +0002f100 : #undef errno extern int errno; static ALT_INLINE int* alt_get_errno(void) { - 2f8b4: defffe04 addi sp,sp,-8 - 2f8b8: dfc00115 stw ra,4(sp) - 2f8bc: df000015 stw fp,0(sp) - 2f8c0: d839883a mov fp,sp + 2f100: defffe04 addi sp,sp,-8 + 2f104: dfc00115 stw ra,4(sp) + 2f108: df000015 stw fp,0(sp) + 2f10c: d839883a mov fp,sp return ((alt_errno) ? alt_errno() : &errno); - 2f8c4: 008000f4 movhi r2,3 - 2f8c8: 1093a904 addi r2,r2,20132 - 2f8cc: 10800017 ldw r2,0(r2) - 2f8d0: 10000526 beq r2,zero,2f8e8 - 2f8d4: 008000f4 movhi r2,3 - 2f8d8: 1093a904 addi r2,r2,20132 - 2f8dc: 10800017 ldw r2,0(r2) - 2f8e0: 103ee83a callr r2 - 2f8e4: 00000206 br 2f8f0 - 2f8e8: 008000f4 movhi r2,3 - 2f8ec: 109c5904 addi r2,r2,29028 + 2f110: 008000f4 movhi r2,3 + 2f114: 10915c04 addi r2,r2,17776 + 2f118: 10800017 ldw r2,0(r2) + 2f11c: 10000526 beq r2,zero,2f134 + 2f120: 008000f4 movhi r2,3 + 2f124: 10915c04 addi r2,r2,17776 + 2f128: 10800017 ldw r2,0(r2) + 2f12c: 103ee83a callr r2 + 2f130: 00000206 br 2f13c + 2f134: 008000f4 movhi r2,3 + 2f138: 109a0c04 addi r2,r2,26672 } - 2f8f0: e037883a mov sp,fp - 2f8f4: dfc00117 ldw ra,4(sp) - 2f8f8: df000017 ldw fp,0(sp) - 2f8fc: dec00204 addi sp,sp,8 - 2f900: f800283a ret + 2f13c: e037883a mov sp,fp + 2f140: dfc00117 ldw ra,4(sp) + 2f144: df000017 ldw fp,0(sp) + 2f148: dec00204 addi sp,sp,8 + 2f14c: f800283a ret -0002f904 : - * - * ALT_FCNTL is mapped onto the fcntl() system call in alt_syscall.h - */ - -int ALT_FCNTL (int file, int cmd, ...) -{ - 2f904: defff704 addi sp,sp,-36 - 2f908: dfc00615 stw ra,24(sp) - 2f90c: df000515 stw fp,20(sp) - 2f910: df000504 addi fp,sp,20 - 2f914: e13ffe15 stw r4,-8(fp) - 2f918: e17fff15 stw r5,-4(fp) - 2f91c: e1800215 stw r6,8(fp) - 2f920: e1c00315 stw r7,12(fp) - * A common error case is that when the file descriptor was created, the call - * to open() failed resulting in a negative file descriptor. This is trapped - * below so that we don't try and process an invalid file descriptor. - */ - - fd = (file < 0) ? NULL : &alt_fd_list[file]; - 2f924: e0bffe17 ldw r2,-8(fp) - 2f928: 10000616 blt r2,zero,2f944 - 2f92c: e0bffe17 ldw r2,-8(fp) - 2f930: 10c00324 muli r3,r2,12 - 2f934: 008000f4 movhi r2,3 - 2f938: 108f2304 addi r2,r2,15500 - 2f93c: 1885883a add r2,r3,r2 - 2f940: 00000106 br 2f948 - 2f944: 0005883a mov r2,zero - 2f948: e0bffb15 stw r2,-20(fp) - - if (fd) - 2f94c: e0bffb17 ldw r2,-20(fp) - 2f950: 10002a26 beq r2,zero,2f9fc - { - switch (cmd) - 2f954: e0bfff17 ldw r2,-4(fp) - 2f958: 10c000e0 cmpeqi r3,r2,3 - 2f95c: 1800031e bne r3,zero,2f96c - 2f960: 10800120 cmpeqi r2,r2,4 - 2f964: 1000071e bne r2,zero,2f984 - 2f968: 00001e06 br 2f9e4 - { - case F_GETFL: - return fd->fd_flags & ~((alt_u32) ALT_FD_FLAGS_MASK); - 2f96c: e0bffb17 ldw r2,-20(fp) - 2f970: 10c00217 ldw r3,8(r2) - 2f974: 00900034 movhi r2,16384 - 2f978: 10bfffc4 addi r2,r2,-1 - 2f97c: 1884703a and r2,r3,r2 - 2f980: 00002306 br 2fa10 - case F_SETFL: - va_start(argp, cmd); - 2f984: e0800204 addi r2,fp,8 - 2f988: e0bffd15 stw r2,-12(fp) - flags = va_arg(argp, long); - 2f98c: e0bffd17 ldw r2,-12(fp) - 2f990: 10c00104 addi r3,r2,4 - 2f994: e0fffd15 stw r3,-12(fp) - 2f998: 10800017 ldw r2,0(r2) - 2f99c: e0bffc15 stw r2,-16(fp) - fd->fd_flags &= ~ALT_FCNTL_FLAGS_MASK; - 2f9a0: e0bffb17 ldw r2,-20(fp) - 2f9a4: 10c00217 ldw r3,8(r2) - 2f9a8: 00affdc4 movi r2,-16393 - 2f9ac: 1886703a and r3,r3,r2 - 2f9b0: e0bffb17 ldw r2,-20(fp) - 2f9b4: 10c00215 stw r3,8(r2) - fd->fd_flags |= (flags & ALT_FCNTL_FLAGS_MASK); - 2f9b8: e0bffb17 ldw r2,-20(fp) - 2f9bc: 10800217 ldw r2,8(r2) - 2f9c0: 1007883a mov r3,r2 - 2f9c4: e0bffc17 ldw r2,-16(fp) - 2f9c8: 1090020c andi r2,r2,16392 - 2f9cc: 1884b03a or r2,r3,r2 - 2f9d0: 1007883a mov r3,r2 - 2f9d4: e0bffb17 ldw r2,-20(fp) - 2f9d8: 10c00215 stw r3,8(r2) - va_end(argp); - return 0; - 2f9dc: 0005883a mov r2,zero - 2f9e0: 00000b06 br 2fa10 - default: - ALT_ERRNO = EINVAL; - 2f9e4: 002f8b40 call 2f8b4 - 2f9e8: 1007883a mov r3,r2 - 2f9ec: 00800584 movi r2,22 - 2f9f0: 18800015 stw r2,0(r3) - return -1; - 2f9f4: 00bfffc4 movi r2,-1 - 2f9f8: 00000506 br 2fa10 - } - } - - ALT_ERRNO = EBADFD; - 2f9fc: 002f8b40 call 2f8b4 - 2fa00: 1007883a mov r3,r2 - 2fa04: 00801444 movi r2,81 - 2fa08: 18800015 stw r2,0(r3) - return -1; - 2fa0c: 00bfffc4 movi r2,-1 -} - 2fa10: e037883a mov sp,fp - 2fa14: dfc00117 ldw ra,4(sp) - 2fa18: df000017 ldw fp,0(sp) - 2fa1c: dec00404 addi sp,sp,16 - 2fa20: f800283a ret - -0002fa24 : -#undef errno - -extern int errno; - -static ALT_INLINE int* alt_get_errno(void) -{ - 2fa24: defffe04 addi sp,sp,-8 - 2fa28: dfc00115 stw ra,4(sp) - 2fa2c: df000015 stw fp,0(sp) - 2fa30: d839883a mov fp,sp - return ((alt_errno) ? alt_errno() : &errno); - 2fa34: 008000f4 movhi r2,3 - 2fa38: 1093a904 addi r2,r2,20132 - 2fa3c: 10800017 ldw r2,0(r2) - 2fa40: 10000526 beq r2,zero,2fa58 - 2fa44: 008000f4 movhi r2,3 - 2fa48: 1093a904 addi r2,r2,20132 - 2fa4c: 10800017 ldw r2,0(r2) - 2fa50: 103ee83a callr r2 - 2fa54: 00000206 br 2fa60 - 2fa58: 008000f4 movhi r2,3 - 2fa5c: 109c5904 addi r2,r2,29028 -} - 2fa60: e037883a mov sp,fp - 2fa64: dfc00117 ldw ra,4(sp) - 2fa68: df000017 ldw fp,0(sp) - 2fa6c: dec00204 addi sp,sp,8 - 2fa70: f800283a ret - -0002fa74 : +0002f150 : } #else /* !ALT_USE_DIRECT_DRIVERS */ int ALT_FSTAT (int file, struct stat *st) { - 2fa74: defffb04 addi sp,sp,-20 - 2fa78: dfc00415 stw ra,16(sp) - 2fa7c: df000315 stw fp,12(sp) - 2fa80: df000304 addi fp,sp,12 - 2fa84: e13ffe15 stw r4,-8(fp) - 2fa88: e17fff15 stw r5,-4(fp) + 2f150: defffb04 addi sp,sp,-20 + 2f154: dfc00415 stw ra,16(sp) + 2f158: df000315 stw fp,12(sp) + 2f15c: df000304 addi fp,sp,12 + 2f160: e13ffe15 stw r4,-8(fp) + 2f164: e17fff15 stw r5,-4(fp) * A common error case is that when the file descriptor was created, the call * to open() failed resulting in a negative file descriptor. This is trapped * below so that we don't try and process an invalid file descriptor. */ fd = (file < 0) ? NULL : &alt_fd_list[file]; - 2fa8c: e0bffe17 ldw r2,-8(fp) - 2fa90: 10000616 blt r2,zero,2faac - 2fa94: e0bffe17 ldw r2,-8(fp) - 2fa98: 10c00324 muli r3,r2,12 - 2fa9c: 008000f4 movhi r2,3 - 2faa0: 108f2304 addi r2,r2,15500 - 2faa4: 1885883a add r2,r3,r2 - 2faa8: 00000106 br 2fab0 - 2faac: 0005883a mov r2,zero - 2fab0: e0bffd15 stw r2,-12(fp) + 2f168: e0bffe17 ldw r2,-8(fp) + 2f16c: 10000616 blt r2,zero,2f188 + 2f170: e0bffe17 ldw r2,-8(fp) + 2f174: 10c00324 muli r3,r2,12 + 2f178: 008000f4 movhi r2,3 + 2f17c: 108cd604 addi r2,r2,13144 + 2f180: 1885883a add r2,r3,r2 + 2f184: 00000106 br 2f18c + 2f188: 0005883a mov r2,zero + 2f18c: e0bffd15 stw r2,-12(fp) if (fd) - 2fab4: e0bffd17 ldw r2,-12(fp) - 2fab8: 10001026 beq r2,zero,2fafc + 2f190: e0bffd17 ldw r2,-12(fp) + 2f194: 10001026 beq r2,zero,2f1d8 { /* Call the drivers fstat() function to fill out the "st" structure. */ if (fd->dev->fstat) - 2fabc: e0bffd17 ldw r2,-12(fp) - 2fac0: 10800017 ldw r2,0(r2) - 2fac4: 10800817 ldw r2,32(r2) - 2fac8: 10000726 beq r2,zero,2fae8 + 2f198: e0bffd17 ldw r2,-12(fp) + 2f19c: 10800017 ldw r2,0(r2) + 2f1a0: 10800817 ldw r2,32(r2) + 2f1a4: 10000726 beq r2,zero,2f1c4 { return fd->dev->fstat(fd, st); - 2facc: e0bffd17 ldw r2,-12(fp) - 2fad0: 10800017 ldw r2,0(r2) - 2fad4: 10800817 ldw r2,32(r2) - 2fad8: e17fff17 ldw r5,-4(fp) - 2fadc: e13ffd17 ldw r4,-12(fp) - 2fae0: 103ee83a callr r2 - 2fae4: 00000a06 br 2fb10 + 2f1a8: e0bffd17 ldw r2,-12(fp) + 2f1ac: 10800017 ldw r2,0(r2) + 2f1b0: 10800817 ldw r2,32(r2) + 2f1b4: e17fff17 ldw r5,-4(fp) + 2f1b8: e13ffd17 ldw r4,-12(fp) + 2f1bc: 103ee83a callr r2 + 2f1c0: 00000a06 br 2f1ec * device. */ else { st->st_mode = _IFCHR; - 2fae8: e0bfff17 ldw r2,-4(fp) - 2faec: 00c80004 movi r3,8192 - 2faf0: 10c00115 stw r3,4(r2) + 2f1c4: e0bfff17 ldw r2,-4(fp) + 2f1c8: 00c80004 movi r3,8192 + 2f1cc: 10c00115 stw r3,4(r2) return 0; - 2faf4: 0005883a mov r2,zero - 2faf8: 00000506 br 2fb10 + 2f1d0: 0005883a mov r2,zero + 2f1d4: 00000506 br 2f1ec } } else { ALT_ERRNO = EBADFD; - 2fafc: 002fa240 call 2fa24 - 2fb00: 1007883a mov r3,r2 - 2fb04: 00801444 movi r2,81 - 2fb08: 18800015 stw r2,0(r3) + 2f1d8: 002f1000 call 2f100 + 2f1dc: 1007883a mov r3,r2 + 2f1e0: 00801444 movi r2,81 + 2f1e4: 18800015 stw r2,0(r3) return -1; - 2fb0c: 00bfffc4 movi r2,-1 + 2f1e8: 00bfffc4 movi r2,-1 } } - 2fb10: e037883a mov sp,fp - 2fb14: dfc00117 ldw ra,4(sp) - 2fb18: df000017 ldw fp,0(sp) - 2fb1c: dec00204 addi sp,sp,8 - 2fb20: f800283a ret + 2f1ec: e037883a mov sp,fp + 2f1f0: dfc00117 ldw ra,4(sp) + 2f1f4: df000017 ldw fp,0(sp) + 2f1f8: dec00204 addi sp,sp,8 + 2f1fc: f800283a ret -0002fb24 : +0002f200 : #undef errno extern int errno; static ALT_INLINE int* alt_get_errno(void) { - 2fb24: defffe04 addi sp,sp,-8 - 2fb28: dfc00115 stw ra,4(sp) - 2fb2c: df000015 stw fp,0(sp) - 2fb30: d839883a mov fp,sp + 2f200: defffe04 addi sp,sp,-8 + 2f204: dfc00115 stw ra,4(sp) + 2f208: df000015 stw fp,0(sp) + 2f20c: d839883a mov fp,sp return ((alt_errno) ? alt_errno() : &errno); - 2fb34: 008000f4 movhi r2,3 - 2fb38: 1093a904 addi r2,r2,20132 - 2fb3c: 10800017 ldw r2,0(r2) - 2fb40: 10000526 beq r2,zero,2fb58 - 2fb44: 008000f4 movhi r2,3 - 2fb48: 1093a904 addi r2,r2,20132 - 2fb4c: 10800017 ldw r2,0(r2) - 2fb50: 103ee83a callr r2 - 2fb54: 00000206 br 2fb60 - 2fb58: 008000f4 movhi r2,3 - 2fb5c: 109c5904 addi r2,r2,29028 + 2f210: 008000f4 movhi r2,3 + 2f214: 10915c04 addi r2,r2,17776 + 2f218: 10800017 ldw r2,0(r2) + 2f21c: 10000526 beq r2,zero,2f234 + 2f220: 008000f4 movhi r2,3 + 2f224: 10915c04 addi r2,r2,17776 + 2f228: 10800017 ldw r2,0(r2) + 2f22c: 103ee83a callr r2 + 2f230: 00000206 br 2f23c + 2f234: 008000f4 movhi r2,3 + 2f238: 109a0c04 addi r2,r2,26672 } - 2fb60: e037883a mov sp,fp - 2fb64: dfc00117 ldw ra,4(sp) - 2fb68: df000017 ldw fp,0(sp) - 2fb6c: dec00204 addi sp,sp,8 - 2fb70: f800283a ret + 2f23c: e037883a mov sp,fp + 2f240: dfc00117 ldw ra,4(sp) + 2f244: df000017 ldw fp,0(sp) + 2f248: dec00204 addi sp,sp,8 + 2f24c: f800283a ret -0002fb74 : +0002f250 : * * ALT_ISATTY is mapped onto the isatty() system call in alt_syscall.h */ int ALT_ISATTY (int file) { - 2fb74: deffed04 addi sp,sp,-76 - 2fb78: dfc01215 stw ra,72(sp) - 2fb7c: df001115 stw fp,68(sp) - 2fb80: df001104 addi fp,sp,68 - 2fb84: e13fff15 stw r4,-4(fp) + 2f250: deffed04 addi sp,sp,-76 + 2f254: dfc01215 stw ra,72(sp) + 2f258: df001115 stw fp,68(sp) + 2f25c: df001104 addi fp,sp,68 + 2f260: e13fff15 stw r4,-4(fp) * A common error case is that when the file descriptor was created, the call * to open() failed resulting in a negative file descriptor. This is trapped * below so that we don't try and process an invalid file descriptor. */ fd = (file < 0) ? NULL : &alt_fd_list[file]; - 2fb88: e0bfff17 ldw r2,-4(fp) - 2fb8c: 10000616 blt r2,zero,2fba8 - 2fb90: e0bfff17 ldw r2,-4(fp) - 2fb94: 10c00324 muli r3,r2,12 - 2fb98: 008000f4 movhi r2,3 - 2fb9c: 108f2304 addi r2,r2,15500 - 2fba0: 1885883a add r2,r3,r2 - 2fba4: 00000106 br 2fbac - 2fba8: 0005883a mov r2,zero - 2fbac: e0bfef15 stw r2,-68(fp) + 2f264: e0bfff17 ldw r2,-4(fp) + 2f268: 10000616 blt r2,zero,2f284 + 2f26c: e0bfff17 ldw r2,-4(fp) + 2f270: 10c00324 muli r3,r2,12 + 2f274: 008000f4 movhi r2,3 + 2f278: 108cd604 addi r2,r2,13144 + 2f27c: 1885883a add r2,r3,r2 + 2f280: 00000106 br 2f288 + 2f284: 0005883a mov r2,zero + 2f288: e0bfef15 stw r2,-68(fp) if (fd) - 2fbb0: e0bfef17 ldw r2,-68(fp) - 2fbb4: 10000e26 beq r2,zero,2fbf0 + 2f28c: e0bfef17 ldw r2,-68(fp) + 2f290: 10000e26 beq r2,zero,2f2cc /* * If a device driver does not provide an fstat() function, then it is * treated as a terminal device by default. */ if (!fd->dev->fstat) - 2fbb8: e0bfef17 ldw r2,-68(fp) - 2fbbc: 10800017 ldw r2,0(r2) - 2fbc0: 10800817 ldw r2,32(r2) - 2fbc4: 1000021e bne r2,zero,2fbd0 + 2f294: e0bfef17 ldw r2,-68(fp) + 2f298: 10800017 ldw r2,0(r2) + 2f29c: 10800817 ldw r2,32(r2) + 2f2a0: 1000021e bne r2,zero,2f2ac { return 1; - 2fbc8: 00800044 movi r2,1 - 2fbcc: 00000d06 br 2fc04 + 2f2a4: 00800044 movi r2,1 + 2f2a8: 00000d06 br 2f2e0 * this is called so that the device can identify itself. */ else { fstat (file, &stat); - 2fbd0: e0bff004 addi r2,fp,-64 - 2fbd4: 100b883a mov r5,r2 - 2fbd8: e13fff17 ldw r4,-4(fp) - 2fbdc: 002fa740 call 2fa74 + 2f2ac: e0bff004 addi r2,fp,-64 + 2f2b0: 100b883a mov r5,r2 + 2f2b4: e13fff17 ldw r4,-4(fp) + 2f2b8: 002f1500 call 2f150 return (stat.st_mode == _IFCHR) ? 1 : 0; - 2fbe0: e0bff117 ldw r2,-60(fp) - 2fbe4: 10880020 cmpeqi r2,r2,8192 - 2fbe8: 10803fcc andi r2,r2,255 - 2fbec: 00000506 br 2fc04 + 2f2bc: e0bff117 ldw r2,-60(fp) + 2f2c0: 10880020 cmpeqi r2,r2,8192 + 2f2c4: 10803fcc andi r2,r2,255 + 2f2c8: 00000506 br 2f2e0 } } else { ALT_ERRNO = EBADFD; - 2fbf0: 002fb240 call 2fb24 - 2fbf4: 1007883a mov r3,r2 - 2fbf8: 00801444 movi r2,81 - 2fbfc: 18800015 stw r2,0(r3) + 2f2cc: 002f2000 call 2f200 + 2f2d0: 1007883a mov r3,r2 + 2f2d4: 00801444 movi r2,81 + 2f2d8: 18800015 stw r2,0(r3) return 0; - 2fc00: 0005883a mov r2,zero + 2f2dc: 0005883a mov r2,zero } } - 2fc04: e037883a mov sp,fp - 2fc08: dfc00117 ldw ra,4(sp) - 2fc0c: df000017 ldw fp,0(sp) - 2fc10: dec00204 addi sp,sp,8 - 2fc14: f800283a ret + 2f2e0: e037883a mov sp,fp + 2f2e4: dfc00117 ldw ra,4(sp) + 2f2e8: df000017 ldw fp,0(sp) + 2f2ec: dec00204 addi sp,sp,8 + 2f2f0: f800283a ret -0002fc18 : +0002f2f4 : */ static void ALT_INLINE alt_load_section (alt_u32* from, alt_u32* to, alt_u32* end) { - 2fc18: defffc04 addi sp,sp,-16 - 2fc1c: df000315 stw fp,12(sp) - 2fc20: df000304 addi fp,sp,12 - 2fc24: e13ffd15 stw r4,-12(fp) - 2fc28: e17ffe15 stw r5,-8(fp) - 2fc2c: e1bfff15 stw r6,-4(fp) + 2f2f4: defffc04 addi sp,sp,-16 + 2f2f8: df000315 stw fp,12(sp) + 2f2fc: df000304 addi fp,sp,12 + 2f300: e13ffd15 stw r4,-12(fp) + 2f304: e17ffe15 stw r5,-8(fp) + 2f308: e1bfff15 stw r6,-4(fp) if (to != from) - 2fc30: e0fffe17 ldw r3,-8(fp) - 2fc34: e0bffd17 ldw r2,-12(fp) - 2fc38: 18800c26 beq r3,r2,2fc6c + 2f30c: e0fffe17 ldw r3,-8(fp) + 2f310: e0bffd17 ldw r2,-12(fp) + 2f314: 18800c26 beq r3,r2,2f348 { while( to != end ) - 2fc3c: 00000806 br 2fc60 + 2f318: 00000806 br 2f33c { *to++ = *from++; - 2fc40: e0bffe17 ldw r2,-8(fp) - 2fc44: 10c00104 addi r3,r2,4 - 2fc48: e0fffe15 stw r3,-8(fp) - 2fc4c: e0fffd17 ldw r3,-12(fp) - 2fc50: 19000104 addi r4,r3,4 - 2fc54: e13ffd15 stw r4,-12(fp) - 2fc58: 18c00017 ldw r3,0(r3) - 2fc5c: 10c00015 stw r3,0(r2) + 2f31c: e0bffe17 ldw r2,-8(fp) + 2f320: 10c00104 addi r3,r2,4 + 2f324: e0fffe15 stw r3,-8(fp) + 2f328: e0fffd17 ldw r3,-12(fp) + 2f32c: 19000104 addi r4,r3,4 + 2f330: e13ffd15 stw r4,-12(fp) + 2f334: 18c00017 ldw r3,0(r3) + 2f338: 10c00015 stw r3,0(r2) alt_u32* to, alt_u32* end) { if (to != from) { while( to != end ) - 2fc60: e0fffe17 ldw r3,-8(fp) - 2fc64: e0bfff17 ldw r2,-4(fp) - 2fc68: 18bff51e bne r3,r2,2fc40 + 2f33c: e0fffe17 ldw r3,-8(fp) + 2f340: e0bfff17 ldw r2,-4(fp) + 2f344: 18bff51e bne r3,r2,2f31c <_gp+0xffff2de4> { *to++ = *from++; } } } - 2fc6c: 0001883a nop - 2fc70: e037883a mov sp,fp - 2fc74: df000017 ldw fp,0(sp) - 2fc78: dec00104 addi sp,sp,4 - 2fc7c: f800283a ret + 2f348: 0001883a nop + 2f34c: e037883a mov sp,fp + 2f350: df000017 ldw fp,0(sp) + 2f354: dec00104 addi sp,sp,4 + 2f358: f800283a ret -0002fc80 : +0002f35c : * there is no bootloader, so this application is responsible for loading to * RAM any sections that are required. */ void alt_load (void) { - 2fc80: defffe04 addi sp,sp,-8 - 2fc84: dfc00115 stw ra,4(sp) - 2fc88: df000015 stw fp,0(sp) - 2fc8c: d839883a mov fp,sp + 2f35c: defffe04 addi sp,sp,-8 + 2f360: dfc00115 stw ra,4(sp) + 2f364: df000015 stw fp,0(sp) + 2f368: d839883a mov fp,sp /* * Copy the .rwdata section. */ alt_load_section (&__flash_rwdata_start, - 2fc90: 018000f4 movhi r6,3 - 2fc94: 3193ae04 addi r6,r6,20152 - 2fc98: 014000f4 movhi r5,3 - 2fc9c: 294b0604 addi r5,r5,11288 - 2fca0: 010000f4 movhi r4,3 - 2fca4: 2113ae04 addi r4,r4,20152 - 2fca8: 002fc180 call 2fc18 + 2f36c: 018000f4 movhi r6,3 + 2f370: 31916104 addi r6,r6,17796 + 2f374: 014000f4 movhi r5,3 + 2f378: 2948b904 addi r5,r5,8932 + 2f37c: 010000f4 movhi r4,3 + 2f380: 21116104 addi r4,r4,17796 + 2f384: 002f2f40 call 2f2f4 /* * Copy the exception handler. */ alt_load_section (&__flash_exceptions_start, - 2fcac: 018000b4 movhi r6,2 - 2fcb0: 31809104 addi r6,r6,580 - 2fcb4: 014000b4 movhi r5,2 - 2fcb8: 29400804 addi r5,r5,32 - 2fcbc: 010000b4 movhi r4,2 - 2fcc0: 21000804 addi r4,r4,32 - 2fcc4: 002fc180 call 2fc18 + 2f388: 018000b4 movhi r6,2 + 2f38c: 31809104 addi r6,r6,580 + 2f390: 014000b4 movhi r5,2 + 2f394: 29400804 addi r5,r5,32 + 2f398: 010000b4 movhi r4,2 + 2f39c: 21000804 addi r4,r4,32 + 2f3a0: 002f2f40 call 2f2f4 /* * Copy the .rodata section. */ alt_load_section (&__flash_rodata_start, - 2fcc8: 018000f4 movhi r6,3 - 2fccc: 318b0604 addi r6,r6,11288 - 2fcd0: 014000f4 movhi r5,3 - 2fcd4: 2948d004 addi r5,r5,9024 - 2fcd8: 010000f4 movhi r4,3 - 2fcdc: 2108d004 addi r4,r4,9024 - 2fce0: 002fc180 call 2fc18 + 2f3a4: 018000f4 movhi r6,3 + 2f3a8: 3188b904 addi r6,r6,8932 + 2f3ac: 014000f4 movhi r5,3 + 2f3b0: 29468704 addi r5,r5,6684 + 2f3b4: 010000f4 movhi r4,3 + 2f3b8: 21068704 addi r4,r4,6684 + 2f3bc: 002f2f40 call 2f2f4 /* * Now ensure that the caches are in synch. */ alt_dcache_flush_all(); - 2fce4: 00313500 call 31350 + 2f3c0: 0030a2c0 call 30a2c alt_icache_flush_all(); - 2fce8: 003154c0 call 3154c + 2f3c4: 0030c280 call 30c28 } - 2fcec: 0001883a nop - 2fcf0: e037883a mov sp,fp - 2fcf4: dfc00117 ldw ra,4(sp) - 2fcf8: df000017 ldw fp,0(sp) - 2fcfc: dec00204 addi sp,sp,8 - 2fd00: f800283a ret + 2f3c8: 0001883a nop + 2f3cc: e037883a mov sp,fp + 2f3d0: dfc00117 ldw ra,4(sp) + 2f3d4: df000017 ldw fp,0(sp) + 2f3d8: dec00204 addi sp,sp,8 + 2f3dc: f800283a ret -0002fd04 : +0002f3e0 : #undef errno extern int errno; static ALT_INLINE int* alt_get_errno(void) { - 2fd04: defffe04 addi sp,sp,-8 - 2fd08: dfc00115 stw ra,4(sp) - 2fd0c: df000015 stw fp,0(sp) - 2fd10: d839883a mov fp,sp + 2f3e0: defffe04 addi sp,sp,-8 + 2f3e4: dfc00115 stw ra,4(sp) + 2f3e8: df000015 stw fp,0(sp) + 2f3ec: d839883a mov fp,sp return ((alt_errno) ? alt_errno() : &errno); - 2fd14: 008000f4 movhi r2,3 - 2fd18: 1093a904 addi r2,r2,20132 - 2fd1c: 10800017 ldw r2,0(r2) - 2fd20: 10000526 beq r2,zero,2fd38 - 2fd24: 008000f4 movhi r2,3 - 2fd28: 1093a904 addi r2,r2,20132 - 2fd2c: 10800017 ldw r2,0(r2) - 2fd30: 103ee83a callr r2 - 2fd34: 00000206 br 2fd40 - 2fd38: 008000f4 movhi r2,3 - 2fd3c: 109c5904 addi r2,r2,29028 + 2f3f0: 008000f4 movhi r2,3 + 2f3f4: 10915c04 addi r2,r2,17776 + 2f3f8: 10800017 ldw r2,0(r2) + 2f3fc: 10000526 beq r2,zero,2f414 + 2f400: 008000f4 movhi r2,3 + 2f404: 10915c04 addi r2,r2,17776 + 2f408: 10800017 ldw r2,0(r2) + 2f40c: 103ee83a callr r2 + 2f410: 00000206 br 2f41c + 2f414: 008000f4 movhi r2,3 + 2f418: 109a0c04 addi r2,r2,26672 } - 2fd40: e037883a mov sp,fp - 2fd44: dfc00117 ldw ra,4(sp) - 2fd48: df000017 ldw fp,0(sp) - 2fd4c: dec00204 addi sp,sp,8 - 2fd50: f800283a ret + 2f41c: e037883a mov sp,fp + 2f420: dfc00117 ldw ra,4(sp) + 2f424: df000017 ldw fp,0(sp) + 2f428: dec00204 addi sp,sp,8 + 2f42c: f800283a ret -0002fd54 : +0002f430 : * ALT_LSEEK is mapped onto the lseek() system call in alt_syscall.h * */ off_t ALT_LSEEK (int file, off_t ptr, int dir) { - 2fd54: defff904 addi sp,sp,-28 - 2fd58: dfc00615 stw ra,24(sp) - 2fd5c: df000515 stw fp,20(sp) - 2fd60: df000504 addi fp,sp,20 - 2fd64: e13ffd15 stw r4,-12(fp) - 2fd68: e17ffe15 stw r5,-8(fp) - 2fd6c: e1bfff15 stw r6,-4(fp) + 2f430: defff904 addi sp,sp,-28 + 2f434: dfc00615 stw ra,24(sp) + 2f438: df000515 stw fp,20(sp) + 2f43c: df000504 addi fp,sp,20 + 2f440: e13ffd15 stw r4,-12(fp) + 2f444: e17ffe15 stw r5,-8(fp) + 2f448: e1bfff15 stw r6,-4(fp) alt_fd* fd; off_t rc = 0; - 2fd70: e03ffb15 stw zero,-20(fp) + 2f44c: e03ffb15 stw zero,-20(fp) * A common error case is that when the file descriptor was created, the call * to open() failed resulting in a negative file descriptor. This is trapped * below so that we don't try and process an invalid file descriptor. */ fd = (file < 0) ? NULL : &alt_fd_list[file]; - 2fd74: e0bffd17 ldw r2,-12(fp) - 2fd78: 10000616 blt r2,zero,2fd94 - 2fd7c: e0bffd17 ldw r2,-12(fp) - 2fd80: 10c00324 muli r3,r2,12 - 2fd84: 008000f4 movhi r2,3 - 2fd88: 108f2304 addi r2,r2,15500 - 2fd8c: 1885883a add r2,r3,r2 - 2fd90: 00000106 br 2fd98 - 2fd94: 0005883a mov r2,zero - 2fd98: e0bffc15 stw r2,-16(fp) + 2f450: e0bffd17 ldw r2,-12(fp) + 2f454: 10000616 blt r2,zero,2f470 + 2f458: e0bffd17 ldw r2,-12(fp) + 2f45c: 10c00324 muli r3,r2,12 + 2f460: 008000f4 movhi r2,3 + 2f464: 108cd604 addi r2,r2,13144 + 2f468: 1885883a add r2,r3,r2 + 2f46c: 00000106 br 2f474 + 2f470: 0005883a mov r2,zero + 2f474: e0bffc15 stw r2,-16(fp) if (fd) - 2fd9c: e0bffc17 ldw r2,-16(fp) - 2fda0: 10001026 beq r2,zero,2fde4 + 2f478: e0bffc17 ldw r2,-16(fp) + 2f47c: 10001026 beq r2,zero,2f4c0 /* * If the device driver provides an implementation of the lseek() function, * then call that to process the request. */ if (fd->dev->lseek) - 2fda4: e0bffc17 ldw r2,-16(fp) - 2fda8: 10800017 ldw r2,0(r2) - 2fdac: 10800717 ldw r2,28(r2) - 2fdb0: 10000926 beq r2,zero,2fdd8 + 2f480: e0bffc17 ldw r2,-16(fp) + 2f484: 10800017 ldw r2,0(r2) + 2f488: 10800717 ldw r2,28(r2) + 2f48c: 10000926 beq r2,zero,2f4b4 { rc = fd->dev->lseek(fd, ptr, dir); - 2fdb4: e0bffc17 ldw r2,-16(fp) - 2fdb8: 10800017 ldw r2,0(r2) - 2fdbc: 10800717 ldw r2,28(r2) - 2fdc0: e1bfff17 ldw r6,-4(fp) - 2fdc4: e17ffe17 ldw r5,-8(fp) - 2fdc8: e13ffc17 ldw r4,-16(fp) - 2fdcc: 103ee83a callr r2 - 2fdd0: e0bffb15 stw r2,-20(fp) - 2fdd4: 00000506 br 2fdec + 2f490: e0bffc17 ldw r2,-16(fp) + 2f494: 10800017 ldw r2,0(r2) + 2f498: 10800717 ldw r2,28(r2) + 2f49c: e1bfff17 ldw r6,-4(fp) + 2f4a0: e17ffe17 ldw r5,-8(fp) + 2f4a4: e13ffc17 ldw r4,-16(fp) + 2f4a8: 103ee83a callr r2 + 2f4ac: e0bffb15 stw r2,-20(fp) + 2f4b0: 00000506 br 2f4c8 * Otherwise return an error. */ else { rc = -ENOTSUP; - 2fdd8: 00bfde84 movi r2,-134 - 2fddc: e0bffb15 stw r2,-20(fp) - 2fde0: 00000206 br 2fdec + 2f4b4: 00bfde84 movi r2,-134 + 2f4b8: e0bffb15 stw r2,-20(fp) + 2f4bc: 00000206 br 2f4c8 } } else { rc = -EBADFD; - 2fde4: 00bfebc4 movi r2,-81 - 2fde8: e0bffb15 stw r2,-20(fp) + 2f4c0: 00bfebc4 movi r2,-81 + 2f4c4: e0bffb15 stw r2,-20(fp) } if (rc < 0) - 2fdec: e0bffb17 ldw r2,-20(fp) - 2fdf0: 1000070e bge r2,zero,2fe10 + 2f4c8: e0bffb17 ldw r2,-20(fp) + 2f4cc: 1000070e bge r2,zero,2f4ec { ALT_ERRNO = -rc; - 2fdf4: 002fd040 call 2fd04 - 2fdf8: 1007883a mov r3,r2 - 2fdfc: e0bffb17 ldw r2,-20(fp) - 2fe00: 0085c83a sub r2,zero,r2 - 2fe04: 18800015 stw r2,0(r3) + 2f4d0: 002f3e00 call 2f3e0 + 2f4d4: 1007883a mov r3,r2 + 2f4d8: e0bffb17 ldw r2,-20(fp) + 2f4dc: 0085c83a sub r2,zero,r2 + 2f4e0: 18800015 stw r2,0(r3) rc = -1; - 2fe08: 00bfffc4 movi r2,-1 - 2fe0c: e0bffb15 stw r2,-20(fp) + 2f4e4: 00bfffc4 movi r2,-1 + 2f4e8: e0bffb15 stw r2,-20(fp) } return rc; - 2fe10: e0bffb17 ldw r2,-20(fp) + 2f4ec: e0bffb17 ldw r2,-20(fp) } - 2fe14: e037883a mov sp,fp - 2fe18: dfc00117 ldw ra,4(sp) - 2fe1c: df000017 ldw fp,0(sp) - 2fe20: dec00204 addi sp,sp,8 - 2fe24: f800283a ret + 2f4f0: e037883a mov sp,fp + 2f4f4: dfc00117 ldw ra,4(sp) + 2f4f8: df000017 ldw fp,0(sp) + 2f4fc: dec00204 addi sp,sp,8 + 2f500: f800283a ret -0002fe28 : +0002f504 : * devices/filesystems/components in the system; and call the entry point for * the users application, i.e. main(). */ void alt_main (void) { - 2fe28: defffd04 addi sp,sp,-12 - 2fe2c: dfc00215 stw ra,8(sp) - 2fe30: df000115 stw fp,4(sp) - 2fe34: df000104 addi fp,sp,4 + 2f504: defffd04 addi sp,sp,-12 + 2f508: dfc00215 stw ra,8(sp) + 2f50c: df000115 stw fp,4(sp) + 2f510: df000104 addi fp,sp,4 #endif /* ALT LOG - please see HAL/sys/alt_log_printf.h for details */ ALT_LOG_PRINT_BOOT("[alt_main.c] Entering alt_main, calling alt_irq_init.\r\n"); /* Initialize the interrupt controller. */ alt_irq_init (NULL); - 2fe38: 0009883a mov r4,zero - 2fe3c: 00304a00 call 304a0 + 2f514: 0009883a mov r4,zero + 2f518: 002fb7c0 call 2fb7c /* Initialize the operating system */ ALT_LOG_PRINT_BOOT("[alt_main.c] Done alt_irq_init, calling alt_os_init.\r\n"); ALT_OS_INIT(); - 2fe40: 0001883a nop + 2f51c: 0001883a nop ALT_LOG_PRINT_BOOT("[alt_main.c] Done OS Init, calling alt_sem_create.\r\n"); ALT_SEM_CREATE (&alt_fd_list_lock, 1); /* Initialize the device drivers/software components. */ ALT_LOG_PRINT_BOOT("[alt_main.c] Calling alt_sys_init.\r\n"); alt_sys_init(); - 2fe44: 00304d80 call 304d8 + 2f520: 002fbb40 call 2fbb4 * devices be present (not equal to /dev/null) and if direct drivers * aren't being used. */ ALT_LOG_PRINT_BOOT("[alt_main.c] Redirecting IO.\r\n"); alt_io_redirect(ALT_STDOUT, ALT_STDIN, ALT_STDERR); - 2fe48: 018000f4 movhi r6,3 - 2fe4c: 318afe04 addi r6,r6,11256 - 2fe50: 014000f4 movhi r5,3 - 2fe54: 294afe04 addi r5,r5,11256 - 2fe58: 010000f4 movhi r4,3 - 2fe5c: 210afe04 addi r4,r4,11256 - 2fe60: 00319140 call 31914 + 2f524: 018000f4 movhi r6,3 + 2f528: 3188b104 addi r6,r6,8900 + 2f52c: 014000f4 movhi r5,3 + 2f530: 2948b104 addi r5,r5,8900 + 2f534: 010000f4 movhi r4,3 + 2f538: 2108b104 addi r4,r4,8900 + 2f53c: 0030ff00 call 30ff0 /* * Call the C++ constructors */ ALT_LOG_PRINT_BOOT("[alt_main.c] Calling C++ constructors.\r\n"); _do_ctors (); - 2fe64: 003148c0 call 3148c <_do_ctors> + 2f540: 0030b680 call 30b68 <_do_ctors> * redefined as _exit()). This is in the interest of reducing code footprint, * in that the atexit() overhead is removed when it's not needed. */ ALT_LOG_PRINT_BOOT("[alt_main.c] Calling atexit.\r\n"); atexit (_do_dtors); - 2fe68: 010000f4 movhi r4,3 - 2fe6c: 21053b04 addi r4,r4,5356 - 2fe70: 0031fac0 call 31fac + 2f544: 010000f4 movhi r4,3 + 2f548: 2102f204 addi r4,r4,3016 + 2f54c: 00316880 call 31688 ALT_LOG_PRINT_BOOT("[alt_main.c] Calling main.\r\n"); #ifdef ALT_NO_EXIT main (alt_argc, alt_argv, alt_envp); #else result = main (alt_argc, alt_argv, alt_envp); - 2fe74: d0a8c217 ldw r2,-23800(gp) - 2fe78: d0e8c317 ldw r3,-23796(gp) - 2fe7c: d128c417 ldw r4,-23792(gp) - 2fe80: 200d883a mov r6,r4 - 2fe84: 180b883a mov r5,r3 - 2fe88: 1009883a mov r4,r2 - 2fe8c: 00217440 call 21744
      - 2fe90: e0bfff15 stw r2,-4(fp) + 2f550: d0a8c217 ldw r2,-23800(gp) + 2f554: d0e8c317 ldw r3,-23796(gp) + 2f558: d128c417 ldw r4,-23792(gp) + 2f55c: 200d883a mov r6,r4 + 2f560: 180b883a mov r5,r3 + 2f564: 1009883a mov r4,r2 + 2f568: 00217440 call 21744
      + 2f56c: e0bfff15 stw r2,-4(fp) close(STDOUT_FILENO); - 2fe94: 01000044 movi r4,1 - 2fe98: 002f7b80 call 2f7b8 + 2f570: 01000044 movi r4,1 + 2f574: 002f0040 call 2f004 exit (result); - 2fe9c: e13fff17 ldw r4,-4(fp) - 2fea0: 0031fc00 call 31fc0 + 2f578: e13fff17 ldw r4,-4(fp) + 2f57c: 003169c0 call 3169c -0002fea4 <__malloc_lock>: +0002f580 <__malloc_lock>: * configuration is single threaded, so there is nothing to do here. Note that * this requires that malloc is never called by an interrupt service routine. */ void __malloc_lock ( struct _reent *_r ) { - 2fea4: defffe04 addi sp,sp,-8 - 2fea8: df000115 stw fp,4(sp) - 2feac: df000104 addi fp,sp,4 - 2feb0: e13fff15 stw r4,-4(fp) + 2f580: defffe04 addi sp,sp,-8 + 2f584: df000115 stw fp,4(sp) + 2f588: df000104 addi fp,sp,4 + 2f58c: e13fff15 stw r4,-4(fp) } - 2feb4: 0001883a nop - 2feb8: e037883a mov sp,fp - 2febc: df000017 ldw fp,0(sp) - 2fec0: dec00104 addi sp,sp,4 - 2fec4: f800283a ret + 2f590: 0001883a nop + 2f594: e037883a mov sp,fp + 2f598: df000017 ldw fp,0(sp) + 2f59c: dec00104 addi sp,sp,4 + 2f5a0: f800283a ret -0002fec8 <__malloc_unlock>: +0002f5a4 <__malloc_unlock>: /* * */ void __malloc_unlock ( struct _reent *_r ) { - 2fec8: defffe04 addi sp,sp,-8 - 2fecc: df000115 stw fp,4(sp) - 2fed0: df000104 addi fp,sp,4 - 2fed4: e13fff15 stw r4,-4(fp) + 2f5a4: defffe04 addi sp,sp,-8 + 2f5a8: df000115 stw fp,4(sp) + 2f5ac: df000104 addi fp,sp,4 + 2f5b0: e13fff15 stw r4,-4(fp) } - 2fed8: 0001883a nop - 2fedc: e037883a mov sp,fp - 2fee0: df000017 ldw fp,0(sp) - 2fee4: dec00104 addi sp,sp,4 - 2fee8: f800283a ret + 2f5b4: 0001883a nop + 2f5b8: e037883a mov sp,fp + 2f5bc: df000017 ldw fp,0(sp) + 2f5c0: dec00104 addi sp,sp,4 + 2f5c4: f800283a ret -0002feec : +0002f5c8 : #undef errno extern int errno; static ALT_INLINE int* alt_get_errno(void) { - 2feec: defffe04 addi sp,sp,-8 - 2fef0: dfc00115 stw ra,4(sp) - 2fef4: df000015 stw fp,0(sp) - 2fef8: d839883a mov fp,sp + 2f5c8: defffe04 addi sp,sp,-8 + 2f5cc: dfc00115 stw ra,4(sp) + 2f5d0: df000015 stw fp,0(sp) + 2f5d4: d839883a mov fp,sp return ((alt_errno) ? alt_errno() : &errno); - 2fefc: 008000f4 movhi r2,3 - 2ff00: 1093a904 addi r2,r2,20132 - 2ff04: 10800017 ldw r2,0(r2) - 2ff08: 10000526 beq r2,zero,2ff20 - 2ff0c: 008000f4 movhi r2,3 - 2ff10: 1093a904 addi r2,r2,20132 - 2ff14: 10800017 ldw r2,0(r2) - 2ff18: 103ee83a callr r2 - 2ff1c: 00000206 br 2ff28 - 2ff20: 008000f4 movhi r2,3 - 2ff24: 109c5904 addi r2,r2,29028 + 2f5d8: 008000f4 movhi r2,3 + 2f5dc: 10915c04 addi r2,r2,17776 + 2f5e0: 10800017 ldw r2,0(r2) + 2f5e4: 10000526 beq r2,zero,2f5fc + 2f5e8: 008000f4 movhi r2,3 + 2f5ec: 10915c04 addi r2,r2,17776 + 2f5f0: 10800017 ldw r2,0(r2) + 2f5f4: 103ee83a callr r2 + 2f5f8: 00000206 br 2f604 + 2f5fc: 008000f4 movhi r2,3 + 2f600: 109a0c04 addi r2,r2,26672 } - 2ff28: e037883a mov sp,fp - 2ff2c: dfc00117 ldw ra,4(sp) - 2ff30: df000017 ldw fp,0(sp) - 2ff34: dec00204 addi sp,sp,8 - 2ff38: f800283a ret + 2f604: e037883a mov sp,fp + 2f608: dfc00117 ldw ra,4(sp) + 2f60c: df000017 ldw fp,0(sp) + 2f610: dec00204 addi sp,sp,8 + 2f614: f800283a ret -0002ff3c : +0002f618 : } #else /* !ALT_USE_DIRECT_DRIVERS */ int ALT_READ (int file, void *ptr, size_t len) { - 2ff3c: defff904 addi sp,sp,-28 - 2ff40: dfc00615 stw ra,24(sp) - 2ff44: df000515 stw fp,20(sp) - 2ff48: df000504 addi fp,sp,20 - 2ff4c: e13ffd15 stw r4,-12(fp) - 2ff50: e17ffe15 stw r5,-8(fp) - 2ff54: e1bfff15 stw r6,-4(fp) + 2f618: defff904 addi sp,sp,-28 + 2f61c: dfc00615 stw ra,24(sp) + 2f620: df000515 stw fp,20(sp) + 2f624: df000504 addi fp,sp,20 + 2f628: e13ffd15 stw r4,-12(fp) + 2f62c: e17ffe15 stw r5,-8(fp) + 2f630: e1bfff15 stw r6,-4(fp) * A common error case is that when the file descriptor was created, the call * to open() failed resulting in a negative file descriptor. This is trapped * below so that we don't try and process an invalid file descriptor. */ fd = (file < 0) ? NULL : &alt_fd_list[file]; - 2ff58: e0bffd17 ldw r2,-12(fp) - 2ff5c: 10000616 blt r2,zero,2ff78 - 2ff60: e0bffd17 ldw r2,-12(fp) - 2ff64: 10c00324 muli r3,r2,12 - 2ff68: 008000f4 movhi r2,3 - 2ff6c: 108f2304 addi r2,r2,15500 - 2ff70: 1885883a add r2,r3,r2 - 2ff74: 00000106 br 2ff7c - 2ff78: 0005883a mov r2,zero - 2ff7c: e0bffb15 stw r2,-20(fp) + 2f634: e0bffd17 ldw r2,-12(fp) + 2f638: 10000616 blt r2,zero,2f654 + 2f63c: e0bffd17 ldw r2,-12(fp) + 2f640: 10c00324 muli r3,r2,12 + 2f644: 008000f4 movhi r2,3 + 2f648: 108cd604 addi r2,r2,13144 + 2f64c: 1885883a add r2,r3,r2 + 2f650: 00000106 br 2f658 + 2f654: 0005883a mov r2,zero + 2f658: e0bffb15 stw r2,-20(fp) if (fd) - 2ff80: e0bffb17 ldw r2,-20(fp) - 2ff84: 10002226 beq r2,zero,30010 + 2f65c: e0bffb17 ldw r2,-20(fp) + 2f660: 10002226 beq r2,zero,2f6ec * If the file has not been opened with read access, or if the driver does * not provide an implementation of read(), generate an error. Otherwise * call the drivers read() function to process the request. */ if (((fd->fd_flags & O_ACCMODE) != O_WRONLY) && - 2ff88: e0bffb17 ldw r2,-20(fp) - 2ff8c: 10800217 ldw r2,8(r2) - 2ff90: 108000cc andi r2,r2,3 - 2ff94: 10800060 cmpeqi r2,r2,1 - 2ff98: 1000181e bne r2,zero,2fffc + 2f664: e0bffb17 ldw r2,-20(fp) + 2f668: 10800217 ldw r2,8(r2) + 2f66c: 108000cc andi r2,r2,3 + 2f670: 10800060 cmpeqi r2,r2,1 + 2f674: 1000181e bne r2,zero,2f6d8 (fd->dev->read)) - 2ff9c: e0bffb17 ldw r2,-20(fp) - 2ffa0: 10800017 ldw r2,0(r2) - 2ffa4: 10800517 ldw r2,20(r2) + 2f678: e0bffb17 ldw r2,-20(fp) + 2f67c: 10800017 ldw r2,0(r2) + 2f680: 10800517 ldw r2,20(r2) * If the file has not been opened with read access, or if the driver does * not provide an implementation of read(), generate an error. Otherwise * call the drivers read() function to process the request. */ if (((fd->fd_flags & O_ACCMODE) != O_WRONLY) && - 2ffa8: 10001426 beq r2,zero,2fffc + 2f684: 10001426 beq r2,zero,2f6d8 (fd->dev->read)) { if ((rval = fd->dev->read(fd, ptr, len)) < 0) - 2ffac: e0bffb17 ldw r2,-20(fp) - 2ffb0: 10800017 ldw r2,0(r2) - 2ffb4: 10800517 ldw r2,20(r2) - 2ffb8: e0ffff17 ldw r3,-4(fp) - 2ffbc: 180d883a mov r6,r3 - 2ffc0: e17ffe17 ldw r5,-8(fp) - 2ffc4: e13ffb17 ldw r4,-20(fp) - 2ffc8: 103ee83a callr r2 - 2ffcc: e0bffc15 stw r2,-16(fp) - 2ffd0: e0bffc17 ldw r2,-16(fp) - 2ffd4: 1000070e bge r2,zero,2fff4 + 2f688: e0bffb17 ldw r2,-20(fp) + 2f68c: 10800017 ldw r2,0(r2) + 2f690: 10800517 ldw r2,20(r2) + 2f694: e0ffff17 ldw r3,-4(fp) + 2f698: 180d883a mov r6,r3 + 2f69c: e17ffe17 ldw r5,-8(fp) + 2f6a0: e13ffb17 ldw r4,-20(fp) + 2f6a4: 103ee83a callr r2 + 2f6a8: e0bffc15 stw r2,-16(fp) + 2f6ac: e0bffc17 ldw r2,-16(fp) + 2f6b0: 1000070e bge r2,zero,2f6d0 { ALT_ERRNO = -rval; - 2ffd8: 002feec0 call 2feec - 2ffdc: 1007883a mov r3,r2 - 2ffe0: e0bffc17 ldw r2,-16(fp) - 2ffe4: 0085c83a sub r2,zero,r2 - 2ffe8: 18800015 stw r2,0(r3) + 2f6b4: 002f5c80 call 2f5c8 + 2f6b8: 1007883a mov r3,r2 + 2f6bc: e0bffc17 ldw r2,-16(fp) + 2f6c0: 0085c83a sub r2,zero,r2 + 2f6c4: 18800015 stw r2,0(r3) return -1; - 2ffec: 00bfffc4 movi r2,-1 - 2fff0: 00000c06 br 30024 + 2f6c8: 00bfffc4 movi r2,-1 + 2f6cc: 00000c06 br 2f700 } return rval; - 2fff4: e0bffc17 ldw r2,-16(fp) - 2fff8: 00000a06 br 30024 + 2f6d0: e0bffc17 ldw r2,-16(fp) + 2f6d4: 00000a06 br 2f700 } else { ALT_ERRNO = EACCES; - 2fffc: 002feec0 call 2feec - 30000: 1007883a mov r3,r2 - 30004: 00800344 movi r2,13 - 30008: 18800015 stw r2,0(r3) - 3000c: 00000406 br 30020 + 2f6d8: 002f5c80 call 2f5c8 + 2f6dc: 1007883a mov r3,r2 + 2f6e0: 00800344 movi r2,13 + 2f6e4: 18800015 stw r2,0(r3) + 2f6e8: 00000406 br 2f6fc } } else { ALT_ERRNO = EBADFD; - 30010: 002feec0 call 2feec - 30014: 1007883a mov r3,r2 - 30018: 00801444 movi r2,81 - 3001c: 18800015 stw r2,0(r3) + 2f6ec: 002f5c80 call 2f5c8 + 2f6f0: 1007883a mov r3,r2 + 2f6f4: 00801444 movi r2,81 + 2f6f8: 18800015 stw r2,0(r3) } return -1; - 30020: 00bfffc4 movi r2,-1 + 2f6fc: 00bfffc4 movi r2,-1 } - 30024: e037883a mov sp,fp - 30028: dfc00117 ldw ra,4(sp) - 3002c: df000017 ldw fp,0(sp) - 30030: dec00204 addi sp,sp,8 - 30034: f800283a ret + 2f700: e037883a mov sp,fp + 2f704: dfc00117 ldw ra,4(sp) + 2f708: df000017 ldw fp,0(sp) + 2f70c: dec00204 addi sp,sp,8 + 2f710: f800283a ret -00030038 : +0002f714 : * File descriptors correcponding to standard in, standard out and standard * error cannont be released backed to the pool. They are always reserved. */ void alt_release_fd (int fd) { - 30038: defffe04 addi sp,sp,-8 - 3003c: df000115 stw fp,4(sp) - 30040: df000104 addi fp,sp,4 - 30044: e13fff15 stw r4,-4(fp) + 2f714: defffe04 addi sp,sp,-8 + 2f718: df000115 stw fp,4(sp) + 2f71c: df000104 addi fp,sp,4 + 2f720: e13fff15 stw r4,-4(fp) if (fd > 2) - 30048: e0bfff17 ldw r2,-4(fp) - 3004c: 108000d0 cmplti r2,r2,3 - 30050: 10000d1e bne r2,zero,30088 + 2f724: e0bfff17 ldw r2,-4(fp) + 2f728: 108000d0 cmplti r2,r2,3 + 2f72c: 10000d1e bne r2,zero,2f764 { alt_fd_list[fd].fd_flags = 0; - 30054: 008000f4 movhi r2,3 - 30058: 108f2304 addi r2,r2,15500 - 3005c: e0ffff17 ldw r3,-4(fp) - 30060: 18c00324 muli r3,r3,12 - 30064: 10c5883a add r2,r2,r3 - 30068: 10800204 addi r2,r2,8 - 3006c: 10000015 stw zero,0(r2) + 2f730: 008000f4 movhi r2,3 + 2f734: 108cd604 addi r2,r2,13144 + 2f738: e0ffff17 ldw r3,-4(fp) + 2f73c: 18c00324 muli r3,r3,12 + 2f740: 10c5883a add r2,r2,r3 + 2f744: 10800204 addi r2,r2,8 + 2f748: 10000015 stw zero,0(r2) alt_fd_list[fd].dev = 0; - 30070: 008000f4 movhi r2,3 - 30074: 108f2304 addi r2,r2,15500 - 30078: e0ffff17 ldw r3,-4(fp) - 3007c: 18c00324 muli r3,r3,12 - 30080: 10c5883a add r2,r2,r3 - 30084: 10000015 stw zero,0(r2) + 2f74c: 008000f4 movhi r2,3 + 2f750: 108cd604 addi r2,r2,13144 + 2f754: e0ffff17 ldw r3,-4(fp) + 2f758: 18c00324 muli r3,r3,12 + 2f75c: 10c5883a add r2,r2,r3 + 2f760: 10000015 stw zero,0(r2) } } - 30088: 0001883a nop - 3008c: e037883a mov sp,fp - 30090: df000017 ldw fp,0(sp) - 30094: dec00104 addi sp,sp,4 - 30098: f800283a ret + 2f764: 0001883a nop + 2f768: e037883a mov sp,fp + 2f76c: df000017 ldw fp,0(sp) + 2f770: dec00104 addi sp,sp,4 + 2f774: f800283a ret -0003009c : +0002f778 : #endif caddr_t ALT_SBRK (int incr) __attribute__ ((no_instrument_function )); caddr_t ALT_SBRK (int incr) { - 3009c: defff904 addi sp,sp,-28 - 300a0: df000615 stw fp,24(sp) - 300a4: df000604 addi fp,sp,24 - 300a8: e13fff15 stw r4,-4(fp) + 2f778: defff904 addi sp,sp,-28 + 2f77c: df000615 stw fp,24(sp) + 2f780: df000604 addi fp,sp,24 + 2f784: e13fff15 stw r4,-4(fp) static ALT_INLINE alt_irq_context ALT_ALWAYS_INLINE alt_irq_disable_all (void) { alt_irq_context context; NIOS2_READ_STATUS (context); - 300ac: 0005303a rdctl r2,status - 300b0: e0bffe15 stw r2,-8(fp) + 2f788: 0005303a rdctl r2,status + 2f78c: e0bffe15 stw r2,-8(fp) NIOS2_WRITE_STATUS (context & ~NIOS2_STATUS_PIE_MSK); - 300b4: e0fffe17 ldw r3,-8(fp) - 300b8: 00bfff84 movi r2,-2 - 300bc: 1884703a and r2,r3,r2 - 300c0: 1001703a wrctl status,r2 + 2f790: e0fffe17 ldw r3,-8(fp) + 2f794: 00bfff84 movi r2,-2 + 2f798: 1884703a and r2,r3,r2 + 2f79c: 1001703a wrctl status,r2 return context; - 300c4: e0bffe17 ldw r2,-8(fp) + 2f7a0: e0bffe17 ldw r2,-8(fp) alt_irq_context context; char *prev_heap_end; context = alt_irq_disable_all(); - 300c8: e0bffb15 stw r2,-20(fp) + 2f7a4: e0bffb15 stw r2,-20(fp) /* Always return data aligned on a word boundary */ heap_end = (char *)(((unsigned int)heap_end + 3) & ~3); - 300cc: d0a00f17 ldw r2,-32708(gp) - 300d0: 10c000c4 addi r3,r2,3 - 300d4: 00bfff04 movi r2,-4 - 300d8: 1884703a and r2,r3,r2 - 300dc: d0a00f15 stw r2,-32708(gp) + 2f7a8: d0a00f17 ldw r2,-32708(gp) + 2f7ac: 10c000c4 addi r3,r2,3 + 2f7b0: 00bfff04 movi r2,-4 + 2f7b4: 1884703a and r2,r3,r2 + 2f7b8: d0a00f15 stw r2,-32708(gp) if (((heap_end + incr) - __alt_heap_start) > ALT_MAX_HEAP_BYTES) { alt_irq_enable_all(context); return (caddr_t)-1; } #else if ((heap_end + incr) > __alt_heap_limit) { - 300e0: d0e00f17 ldw r3,-32708(gp) - 300e4: e0bfff17 ldw r2,-4(fp) - 300e8: 1887883a add r3,r3,r2 - 300ec: 00800134 movhi r2,4 - 300f0: 10a1a804 addi r2,r2,-31072 - 300f4: 10c0062e bgeu r2,r3,30110 - 300f8: e0bffb17 ldw r2,-20(fp) - 300fc: e0bffa15 stw r2,-24(fp) + 2f7bc: d0e00f17 ldw r3,-32708(gp) + 2f7c0: e0bfff17 ldw r2,-4(fp) + 2f7c4: 1887883a add r3,r3,r2 + 2f7c8: 00800134 movhi r2,4 + 2f7cc: 10a1a804 addi r2,r2,-31072 + 2f7d0: 10c0062e bgeu r2,r3,2f7ec + 2f7d4: e0bffb17 ldw r2,-20(fp) + 2f7d8: e0bffa15 stw r2,-24(fp) status &= ~NIOS2_STATUS_PIE_MSK; status |= (context & NIOS2_STATUS_PIE_MSK); NIOS2_WRITE_STATUS (status); #else NIOS2_WRITE_STATUS (context); - 30100: e0bffa17 ldw r2,-24(fp) - 30104: 1001703a wrctl status,r2 + 2f7dc: e0bffa17 ldw r2,-24(fp) + 2f7e0: 1001703a wrctl status,r2 alt_irq_enable_all(context); return (caddr_t)-1; - 30108: 00bfffc4 movi r2,-1 - 3010c: 00000b06 br 3013c + 2f7e4: 00bfffc4 movi r2,-1 + 2f7e8: 00000b06 br 2f818 } #endif prev_heap_end = heap_end; - 30110: d0a00f17 ldw r2,-32708(gp) - 30114: e0bffd15 stw r2,-12(fp) + 2f7ec: d0a00f17 ldw r2,-32708(gp) + 2f7f0: e0bffd15 stw r2,-12(fp) heap_end += incr; - 30118: d0e00f17 ldw r3,-32708(gp) - 3011c: e0bfff17 ldw r2,-4(fp) - 30120: 1885883a add r2,r3,r2 - 30124: d0a00f15 stw r2,-32708(gp) - 30128: e0bffb17 ldw r2,-20(fp) - 3012c: e0bffc15 stw r2,-16(fp) - 30130: e0bffc17 ldw r2,-16(fp) - 30134: 1001703a wrctl status,r2 + 2f7f4: d0e00f17 ldw r3,-32708(gp) + 2f7f8: e0bfff17 ldw r2,-4(fp) + 2f7fc: 1885883a add r2,r3,r2 + 2f800: d0a00f15 stw r2,-32708(gp) + 2f804: e0bffb17 ldw r2,-20(fp) + 2f808: e0bffc15 stw r2,-16(fp) + 2f80c: e0bffc17 ldw r2,-16(fp) + 2f810: 1001703a wrctl status,r2 #endif alt_irq_enable_all(context); return (caddr_t) prev_heap_end; - 30138: e0bffd17 ldw r2,-12(fp) + 2f814: e0bffd17 ldw r2,-12(fp) } - 3013c: e037883a mov sp,fp - 30140: df000017 ldw fp,0(sp) - 30144: dec00104 addi sp,sp,4 - 30148: f800283a ret + 2f818: e037883a mov sp,fp + 2f81c: df000017 ldw fp,0(sp) + 2f820: dec00104 addi sp,sp,4 + 2f824: f800283a ret -0003014c : +0002f828 : * alarms. Alternatively an alarm can unregister itself by returning zero when * the alarm executes. */ void alt_alarm_stop (alt_alarm* alarm) { - 3014c: defffa04 addi sp,sp,-24 - 30150: df000515 stw fp,20(sp) - 30154: df000504 addi fp,sp,20 - 30158: e13fff15 stw r4,-4(fp) + 2f828: defffa04 addi sp,sp,-24 + 2f82c: df000515 stw fp,20(sp) + 2f830: df000504 addi fp,sp,20 + 2f834: e13fff15 stw r4,-4(fp) static ALT_INLINE alt_irq_context ALT_ALWAYS_INLINE alt_irq_disable_all (void) { alt_irq_context context; NIOS2_READ_STATUS (context); - 3015c: 0005303a rdctl r2,status - 30160: e0bffc15 stw r2,-16(fp) + 2f838: 0005303a rdctl r2,status + 2f83c: e0bffc15 stw r2,-16(fp) NIOS2_WRITE_STATUS (context & ~NIOS2_STATUS_PIE_MSK); - 30164: e0fffc17 ldw r3,-16(fp) - 30168: 00bfff84 movi r2,-2 - 3016c: 1884703a and r2,r3,r2 - 30170: 1001703a wrctl status,r2 + 2f840: e0fffc17 ldw r3,-16(fp) + 2f844: 00bfff84 movi r2,-2 + 2f848: 1884703a and r2,r3,r2 + 2f84c: 1001703a wrctl status,r2 return context; - 30174: e0bffc17 ldw r2,-16(fp) + 2f850: e0bffc17 ldw r2,-16(fp) alt_irq_context irq_context; irq_context = alt_irq_disable_all(); - 30178: e0bffb15 stw r2,-20(fp) + 2f854: e0bffb15 stw r2,-20(fp) alt_llist_remove (&alarm->llist); - 3017c: e0bfff17 ldw r2,-4(fp) - 30180: e0bffd15 stw r2,-12(fp) + 2f858: e0bfff17 ldw r2,-4(fp) + 2f85c: e0bffd15 stw r2,-12(fp) * input argument is the element to remove. */ static ALT_INLINE void ALT_ALWAYS_INLINE alt_llist_remove(alt_llist* entry) { entry->next->previous = entry->previous; - 30184: e0bffd17 ldw r2,-12(fp) - 30188: 10800017 ldw r2,0(r2) - 3018c: e0fffd17 ldw r3,-12(fp) - 30190: 18c00117 ldw r3,4(r3) - 30194: 10c00115 stw r3,4(r2) + 2f860: e0bffd17 ldw r2,-12(fp) + 2f864: 10800017 ldw r2,0(r2) + 2f868: e0fffd17 ldw r3,-12(fp) + 2f86c: 18c00117 ldw r3,4(r3) + 2f870: 10c00115 stw r3,4(r2) entry->previous->next = entry->next; - 30198: e0bffd17 ldw r2,-12(fp) - 3019c: 10800117 ldw r2,4(r2) - 301a0: e0fffd17 ldw r3,-12(fp) - 301a4: 18c00017 ldw r3,0(r3) - 301a8: 10c00015 stw r3,0(r2) + 2f874: e0bffd17 ldw r2,-12(fp) + 2f878: 10800117 ldw r2,4(r2) + 2f87c: e0fffd17 ldw r3,-12(fp) + 2f880: 18c00017 ldw r3,0(r3) + 2f884: 10c00015 stw r3,0(r2) /* * Set the entry to point to itself, so that any further calls to * alt_llist_remove() are harmless. */ entry->previous = entry; - 301ac: e0bffd17 ldw r2,-12(fp) - 301b0: e0fffd17 ldw r3,-12(fp) - 301b4: 10c00115 stw r3,4(r2) + 2f888: e0bffd17 ldw r2,-12(fp) + 2f88c: e0fffd17 ldw r3,-12(fp) + 2f890: 10c00115 stw r3,4(r2) entry->next = entry; - 301b8: e0bffd17 ldw r2,-12(fp) - 301bc: e0fffd17 ldw r3,-12(fp) - 301c0: 10c00015 stw r3,0(r2) - 301c4: e0bffb17 ldw r2,-20(fp) - 301c8: e0bffe15 stw r2,-8(fp) + 2f894: e0bffd17 ldw r2,-12(fp) + 2f898: e0fffd17 ldw r3,-12(fp) + 2f89c: 10c00015 stw r3,0(r2) + 2f8a0: e0bffb17 ldw r2,-20(fp) + 2f8a4: e0bffe15 stw r2,-8(fp) status &= ~NIOS2_STATUS_PIE_MSK; status |= (context & NIOS2_STATUS_PIE_MSK); NIOS2_WRITE_STATUS (status); #else NIOS2_WRITE_STATUS (context); - 301cc: e0bffe17 ldw r2,-8(fp) - 301d0: 1001703a wrctl status,r2 + 2f8a8: e0bffe17 ldw r2,-8(fp) + 2f8ac: 1001703a wrctl status,r2 alt_irq_enable_all (irq_context); } - 301d4: 0001883a nop - 301d8: e037883a mov sp,fp - 301dc: df000017 ldw fp,0(sp) - 301e0: dec00104 addi sp,sp,4 - 301e4: f800283a ret + 2f8b0: 0001883a nop + 2f8b4: e037883a mov sp,fp + 2f8b8: df000017 ldw fp,0(sp) + 2f8bc: dec00104 addi sp,sp,4 + 2f8c0: f800283a ret -000301e8 : +0002f8c4 : * * alt_tick() is expected to run at interrupt level. */ void alt_tick (void) { - 301e8: defffb04 addi sp,sp,-20 - 301ec: dfc00415 stw ra,16(sp) - 301f0: df000315 stw fp,12(sp) - 301f4: df000304 addi fp,sp,12 + 2f8c4: defffb04 addi sp,sp,-20 + 2f8c8: dfc00415 stw ra,16(sp) + 2f8cc: df000315 stw fp,12(sp) + 2f8d0: df000304 addi fp,sp,12 alt_alarm* next; alt_alarm* alarm = (alt_alarm*) alt_alarm_list.next; - 301f8: d0a01017 ldw r2,-32704(gp) - 301fc: e0bffd15 stw r2,-12(fp) + 2f8d4: d0a01017 ldw r2,-32704(gp) + 2f8d8: e0bffd15 stw r2,-12(fp) alt_u32 next_callback; /* update the tick counter */ _alt_nticks++; - 30200: d0a8c617 ldw r2,-23784(gp) - 30204: 10800044 addi r2,r2,1 - 30208: d0a8c615 stw r2,-23784(gp) + 2f8dc: d0a8c617 ldw r2,-23784(gp) + 2f8e0: 10800044 addi r2,r2,1 + 2f8e4: d0a8c615 stw r2,-23784(gp) /* process the registered callbacks */ while (alarm != (alt_alarm*) &alt_alarm_list) - 3020c: 00002e06 br 302c8 + 2f8e8: 00002e06 br 2f9a4 { next = (alt_alarm*) alarm->llist.next; - 30210: e0bffd17 ldw r2,-12(fp) - 30214: 10800017 ldw r2,0(r2) - 30218: e0bffe15 stw r2,-8(fp) + 2f8ec: e0bffd17 ldw r2,-12(fp) + 2f8f0: 10800017 ldw r2,0(r2) + 2f8f4: e0bffe15 stw r2,-8(fp) /* * Upon the tick-counter rolling over it is safe to clear the * roll-over flag; once the flag is cleared this (or subsequnt) * tick events are enabled to generate an alarm event. */ if ((alarm->rollover) && (_alt_nticks == 0)) - 3021c: e0bffd17 ldw r2,-12(fp) - 30220: 10800403 ldbu r2,16(r2) - 30224: 10803fcc andi r2,r2,255 - 30228: 10000426 beq r2,zero,3023c - 3022c: d0a8c617 ldw r2,-23784(gp) - 30230: 1000021e bne r2,zero,3023c + 2f8f8: e0bffd17 ldw r2,-12(fp) + 2f8fc: 10800403 ldbu r2,16(r2) + 2f900: 10803fcc andi r2,r2,255 + 2f904: 10000426 beq r2,zero,2f918 + 2f908: d0a8c617 ldw r2,-23784(gp) + 2f90c: 1000021e bne r2,zero,2f918 { alarm->rollover = 0; - 30234: e0bffd17 ldw r2,-12(fp) - 30238: 10000405 stb zero,16(r2) + 2f910: e0bffd17 ldw r2,-12(fp) + 2f914: 10000405 stb zero,16(r2) } /* if the alarm period has expired, make the callback */ if ((alarm->time <= _alt_nticks) && (alarm->rollover == 0)) - 3023c: e0bffd17 ldw r2,-12(fp) - 30240: 10800217 ldw r2,8(r2) - 30244: d0e8c617 ldw r3,-23784(gp) - 30248: 18801d36 bltu r3,r2,302c0 - 3024c: e0bffd17 ldw r2,-12(fp) - 30250: 10800403 ldbu r2,16(r2) - 30254: 10803fcc andi r2,r2,255 - 30258: 1000191e bne r2,zero,302c0 + 2f918: e0bffd17 ldw r2,-12(fp) + 2f91c: 10800217 ldw r2,8(r2) + 2f920: d0e8c617 ldw r3,-23784(gp) + 2f924: 18801d36 bltu r3,r2,2f99c + 2f928: e0bffd17 ldw r2,-12(fp) + 2f92c: 10800403 ldbu r2,16(r2) + 2f930: 10803fcc andi r2,r2,255 + 2f934: 1000191e bne r2,zero,2f99c { next_callback = alarm->callback (alarm->context); - 3025c: e0bffd17 ldw r2,-12(fp) - 30260: 10800317 ldw r2,12(r2) - 30264: e0fffd17 ldw r3,-12(fp) - 30268: 18c00517 ldw r3,20(r3) - 3026c: 1809883a mov r4,r3 - 30270: 103ee83a callr r2 - 30274: e0bfff15 stw r2,-4(fp) + 2f938: e0bffd17 ldw r2,-12(fp) + 2f93c: 10800317 ldw r2,12(r2) + 2f940: e0fffd17 ldw r3,-12(fp) + 2f944: 18c00517 ldw r3,20(r3) + 2f948: 1809883a mov r4,r3 + 2f94c: 103ee83a callr r2 + 2f950: e0bfff15 stw r2,-4(fp) /* deactivate the alarm if the return value is zero */ if (next_callback == 0) - 30278: e0bfff17 ldw r2,-4(fp) - 3027c: 1000031e bne r2,zero,3028c + 2f954: e0bfff17 ldw r2,-4(fp) + 2f958: 1000031e bne r2,zero,2f968 { alt_alarm_stop (alarm); - 30280: e13ffd17 ldw r4,-12(fp) - 30284: 003014c0 call 3014c - 30288: 00000d06 br 302c0 + 2f95c: e13ffd17 ldw r4,-12(fp) + 2f960: 002f8280 call 2f828 + 2f964: 00000d06 br 2f99c } else { alarm->time += next_callback; - 3028c: e0bffd17 ldw r2,-12(fp) - 30290: 10c00217 ldw r3,8(r2) - 30294: e0bfff17 ldw r2,-4(fp) - 30298: 1887883a add r3,r3,r2 - 3029c: e0bffd17 ldw r2,-12(fp) - 302a0: 10c00215 stw r3,8(r2) + 2f968: e0bffd17 ldw r2,-12(fp) + 2f96c: 10c00217 ldw r3,8(r2) + 2f970: e0bfff17 ldw r2,-4(fp) + 2f974: 1887883a add r3,r3,r2 + 2f978: e0bffd17 ldw r2,-12(fp) + 2f97c: 10c00215 stw r3,8(r2) /* * If the desired alarm time causes a roll-over, set the rollover * flag. This will prevent the subsequent tick event from causing * an alarm too early. */ if(alarm->time < _alt_nticks) - 302a4: e0bffd17 ldw r2,-12(fp) - 302a8: 10c00217 ldw r3,8(r2) - 302ac: d0a8c617 ldw r2,-23784(gp) - 302b0: 1880032e bgeu r3,r2,302c0 + 2f980: e0bffd17 ldw r2,-12(fp) + 2f984: 10c00217 ldw r3,8(r2) + 2f988: d0a8c617 ldw r2,-23784(gp) + 2f98c: 1880032e bgeu r3,r2,2f99c { alarm->rollover = 1; - 302b4: e0bffd17 ldw r2,-12(fp) - 302b8: 00c00044 movi r3,1 - 302bc: 10c00405 stb r3,16(r2) + 2f990: e0bffd17 ldw r2,-12(fp) + 2f994: 00c00044 movi r3,1 + 2f998: 10c00405 stb r3,16(r2) } } } alarm = next; - 302c0: e0bffe17 ldw r2,-8(fp) - 302c4: e0bffd15 stw r2,-12(fp) + 2f99c: e0bffe17 ldw r2,-8(fp) + 2f9a0: e0bffd15 stw r2,-12(fp) _alt_nticks++; /* process the registered callbacks */ while (alarm != (alt_alarm*) &alt_alarm_list) - 302c8: e0fffd17 ldw r3,-12(fp) - 302cc: d0a01004 addi r2,gp,-32704 - 302d0: 18bfcf1e bne r3,r2,30210 + 2f9a4: e0fffd17 ldw r3,-12(fp) + 2f9a8: d0a01004 addi r2,gp,-32704 + 2f9ac: 18bfcf1e bne r3,r2,2f8ec <_gp+0xffff33b4> /* * Update the operating system specific timer facilities. */ ALT_OS_TIME_TICK(); - 302d4: 0001883a nop + 2f9b0: 0001883a nop } - 302d8: 0001883a nop - 302dc: e037883a mov sp,fp - 302e0: dfc00117 ldw ra,4(sp) - 302e4: df000017 ldw fp,0(sp) - 302e8: dec00204 addi sp,sp,8 - 302ec: f800283a ret + 2f9b4: 0001883a nop + 2f9b8: e037883a mov sp,fp + 2f9bc: dfc00117 ldw ra,4(sp) + 2f9c0: df000017 ldw fp,0(sp) + 2f9c4: dec00204 addi sp,sp,8 + 2f9c8: f800283a ret -000302f0 : +0002f9cc : #if defined (__GNUC__) && __GNUC__ >= 4 int ALT_USLEEP (useconds_t us) #else unsigned int ALT_USLEEP (unsigned int us) #endif { - 302f0: defffd04 addi sp,sp,-12 - 302f4: dfc00215 stw ra,8(sp) - 302f8: df000115 stw fp,4(sp) - 302fc: df000104 addi fp,sp,4 - 30300: e13fff15 stw r4,-4(fp) + 2f9cc: defffd04 addi sp,sp,-12 + 2f9d0: dfc00215 stw ra,8(sp) + 2f9d4: df000115 stw fp,4(sp) + 2f9d8: df000104 addi fp,sp,4 + 2f9dc: e13fff15 stw r4,-4(fp) return alt_busy_sleep(us); - 30304: e13fff17 ldw r4,-4(fp) - 30308: 00311f80 call 311f8 + 2f9e0: e13fff17 ldw r4,-4(fp) + 2f9e4: 00308d40 call 308d4 } - 3030c: e037883a mov sp,fp - 30310: dfc00117 ldw ra,4(sp) - 30314: df000017 ldw fp,0(sp) - 30318: dec00204 addi sp,sp,8 - 3031c: f800283a ret + 2f9e8: e037883a mov sp,fp + 2f9ec: dfc00117 ldw ra,4(sp) + 2f9f0: df000017 ldw fp,0(sp) + 2f9f4: dec00204 addi sp,sp,8 + 2f9f8: f800283a ret -00030320 : +0002f9fc : #undef errno extern int errno; static ALT_INLINE int* alt_get_errno(void) { - 30320: defffe04 addi sp,sp,-8 - 30324: dfc00115 stw ra,4(sp) - 30328: df000015 stw fp,0(sp) - 3032c: d839883a mov fp,sp + 2f9fc: defffe04 addi sp,sp,-8 + 2fa00: dfc00115 stw ra,4(sp) + 2fa04: df000015 stw fp,0(sp) + 2fa08: d839883a mov fp,sp return ((alt_errno) ? alt_errno() : &errno); - 30330: 008000f4 movhi r2,3 - 30334: 1093a904 addi r2,r2,20132 - 30338: 10800017 ldw r2,0(r2) - 3033c: 10000526 beq r2,zero,30354 - 30340: 008000f4 movhi r2,3 - 30344: 1093a904 addi r2,r2,20132 - 30348: 10800017 ldw r2,0(r2) - 3034c: 103ee83a callr r2 - 30350: 00000206 br 3035c - 30354: 008000f4 movhi r2,3 - 30358: 109c5904 addi r2,r2,29028 + 2fa0c: 008000f4 movhi r2,3 + 2fa10: 10915c04 addi r2,r2,17776 + 2fa14: 10800017 ldw r2,0(r2) + 2fa18: 10000526 beq r2,zero,2fa30 + 2fa1c: 008000f4 movhi r2,3 + 2fa20: 10915c04 addi r2,r2,17776 + 2fa24: 10800017 ldw r2,0(r2) + 2fa28: 103ee83a callr r2 + 2fa2c: 00000206 br 2fa38 + 2fa30: 008000f4 movhi r2,3 + 2fa34: 109a0c04 addi r2,r2,26672 } - 3035c: e037883a mov sp,fp - 30360: dfc00117 ldw ra,4(sp) - 30364: df000017 ldw fp,0(sp) - 30368: dec00204 addi sp,sp,8 - 3036c: f800283a ret + 2fa38: e037883a mov sp,fp + 2fa3c: dfc00117 ldw ra,4(sp) + 2fa40: df000017 ldw fp,0(sp) + 2fa44: dec00204 addi sp,sp,8 + 2fa48: f800283a ret -00030370 : +0002fa4c : } #else /* !ALT_USE_DIRECT_DRIVERS */ int ALT_WRITE (int file, const void *ptr, size_t len) { - 30370: defff904 addi sp,sp,-28 - 30374: dfc00615 stw ra,24(sp) - 30378: df000515 stw fp,20(sp) - 3037c: df000504 addi fp,sp,20 - 30380: e13ffd15 stw r4,-12(fp) - 30384: e17ffe15 stw r5,-8(fp) - 30388: e1bfff15 stw r6,-4(fp) + 2fa4c: defff904 addi sp,sp,-28 + 2fa50: dfc00615 stw ra,24(sp) + 2fa54: df000515 stw fp,20(sp) + 2fa58: df000504 addi fp,sp,20 + 2fa5c: e13ffd15 stw r4,-12(fp) + 2fa60: e17ffe15 stw r5,-8(fp) + 2fa64: e1bfff15 stw r6,-4(fp) * A common error case is that when the file descriptor was created, the call * to open() failed resulting in a negative file descriptor. This is trapped * below so that we don't try and process an invalid file descriptor. */ fd = (file < 0) ? NULL : &alt_fd_list[file]; - 3038c: e0bffd17 ldw r2,-12(fp) - 30390: 10000616 blt r2,zero,303ac - 30394: e0bffd17 ldw r2,-12(fp) - 30398: 10c00324 muli r3,r2,12 - 3039c: 008000f4 movhi r2,3 - 303a0: 108f2304 addi r2,r2,15500 - 303a4: 1885883a add r2,r3,r2 - 303a8: 00000106 br 303b0 - 303ac: 0005883a mov r2,zero - 303b0: e0bffb15 stw r2,-20(fp) + 2fa68: e0bffd17 ldw r2,-12(fp) + 2fa6c: 10000616 blt r2,zero,2fa88 + 2fa70: e0bffd17 ldw r2,-12(fp) + 2fa74: 10c00324 muli r3,r2,12 + 2fa78: 008000f4 movhi r2,3 + 2fa7c: 108cd604 addi r2,r2,13144 + 2fa80: 1885883a add r2,r3,r2 + 2fa84: 00000106 br 2fa8c + 2fa88: 0005883a mov r2,zero + 2fa8c: e0bffb15 stw r2,-20(fp) if (fd) - 303b4: e0bffb17 ldw r2,-20(fp) - 303b8: 10002126 beq r2,zero,30440 + 2fa90: e0bffb17 ldw r2,-20(fp) + 2fa94: 10002126 beq r2,zero,2fb1c * If the file has not been opened with write access, or if the driver does * not provide an implementation of write(), generate an error. Otherwise * call the drivers write() function to process the request. */ if (((fd->fd_flags & O_ACCMODE) != O_RDONLY) && fd->dev->write) - 303bc: e0bffb17 ldw r2,-20(fp) - 303c0: 10800217 ldw r2,8(r2) - 303c4: 108000cc andi r2,r2,3 - 303c8: 10001826 beq r2,zero,3042c - 303cc: e0bffb17 ldw r2,-20(fp) - 303d0: 10800017 ldw r2,0(r2) - 303d4: 10800617 ldw r2,24(r2) - 303d8: 10001426 beq r2,zero,3042c + 2fa98: e0bffb17 ldw r2,-20(fp) + 2fa9c: 10800217 ldw r2,8(r2) + 2faa0: 108000cc andi r2,r2,3 + 2faa4: 10001826 beq r2,zero,2fb08 + 2faa8: e0bffb17 ldw r2,-20(fp) + 2faac: 10800017 ldw r2,0(r2) + 2fab0: 10800617 ldw r2,24(r2) + 2fab4: 10001426 beq r2,zero,2fb08 { /* ALT_LOG - see altera_hal/HAL/inc/sys/alt_log_printf.h */ ALT_LOG_WRITE_FUNCTION(ptr,len); if ((rval = fd->dev->write(fd, ptr, len)) < 0) - 303dc: e0bffb17 ldw r2,-20(fp) - 303e0: 10800017 ldw r2,0(r2) - 303e4: 10800617 ldw r2,24(r2) - 303e8: e0ffff17 ldw r3,-4(fp) - 303ec: 180d883a mov r6,r3 - 303f0: e17ffe17 ldw r5,-8(fp) - 303f4: e13ffb17 ldw r4,-20(fp) - 303f8: 103ee83a callr r2 - 303fc: e0bffc15 stw r2,-16(fp) - 30400: e0bffc17 ldw r2,-16(fp) - 30404: 1000070e bge r2,zero,30424 + 2fab8: e0bffb17 ldw r2,-20(fp) + 2fabc: 10800017 ldw r2,0(r2) + 2fac0: 10800617 ldw r2,24(r2) + 2fac4: e0ffff17 ldw r3,-4(fp) + 2fac8: 180d883a mov r6,r3 + 2facc: e17ffe17 ldw r5,-8(fp) + 2fad0: e13ffb17 ldw r4,-20(fp) + 2fad4: 103ee83a callr r2 + 2fad8: e0bffc15 stw r2,-16(fp) + 2fadc: e0bffc17 ldw r2,-16(fp) + 2fae0: 1000070e bge r2,zero,2fb00 { ALT_ERRNO = -rval; - 30408: 00303200 call 30320 - 3040c: 1007883a mov r3,r2 - 30410: e0bffc17 ldw r2,-16(fp) - 30414: 0085c83a sub r2,zero,r2 - 30418: 18800015 stw r2,0(r3) + 2fae4: 002f9fc0 call 2f9fc + 2fae8: 1007883a mov r3,r2 + 2faec: e0bffc17 ldw r2,-16(fp) + 2faf0: 0085c83a sub r2,zero,r2 + 2faf4: 18800015 stw r2,0(r3) return -1; - 3041c: 00bfffc4 movi r2,-1 - 30420: 00000c06 br 30454 + 2faf8: 00bfffc4 movi r2,-1 + 2fafc: 00000c06 br 2fb30 } return rval; - 30424: e0bffc17 ldw r2,-16(fp) - 30428: 00000a06 br 30454 + 2fb00: e0bffc17 ldw r2,-16(fp) + 2fb04: 00000a06 br 2fb30 } else { ALT_ERRNO = EACCES; - 3042c: 00303200 call 30320 - 30430: 1007883a mov r3,r2 - 30434: 00800344 movi r2,13 - 30438: 18800015 stw r2,0(r3) - 3043c: 00000406 br 30450 + 2fb08: 002f9fc0 call 2f9fc + 2fb0c: 1007883a mov r3,r2 + 2fb10: 00800344 movi r2,13 + 2fb14: 18800015 stw r2,0(r3) + 2fb18: 00000406 br 2fb2c } } else { ALT_ERRNO = EBADFD; - 30440: 00303200 call 30320 - 30444: 1007883a mov r3,r2 - 30448: 00801444 movi r2,81 - 3044c: 18800015 stw r2,0(r3) + 2fb1c: 002f9fc0 call 2f9fc + 2fb20: 1007883a mov r3,r2 + 2fb24: 00801444 movi r2,81 + 2fb28: 18800015 stw r2,0(r3) } return -1; - 30450: 00bfffc4 movi r2,-1 + 2fb2c: 00bfffc4 movi r2,-1 } - 30454: e037883a mov sp,fp - 30458: dfc00117 ldw ra,4(sp) - 3045c: df000017 ldw fp,0(sp) - 30460: dec00204 addi sp,sp,8 - 30464: f800283a ret + 2fb30: e037883a mov sp,fp + 2fb34: dfc00117 ldw ra,4(sp) + 2fb38: df000017 ldw fp,0(sp) + 2fb3c: dec00204 addi sp,sp,8 + 2fb40: f800283a ret -00030468 : +0002fb44 : */ extern int alt_fs_reg (alt_dev* dev); static ALT_INLINE int alt_dev_reg (alt_dev* dev) { - 30468: defffd04 addi sp,sp,-12 - 3046c: dfc00215 stw ra,8(sp) - 30470: df000115 stw fp,4(sp) - 30474: df000104 addi fp,sp,4 - 30478: e13fff15 stw r4,-4(fp) + 2fb44: defffd04 addi sp,sp,-12 + 2fb48: dfc00215 stw ra,8(sp) + 2fb4c: df000115 stw fp,4(sp) + 2fb50: df000104 addi fp,sp,4 + 2fb54: e13fff15 stw r4,-4(fp) extern alt_llist alt_dev_list; return alt_dev_llist_insert ((alt_dev_llist*) dev, &alt_dev_list); - 3047c: 014000f4 movhi r5,3 - 30480: 2953a604 addi r5,r5,20120 - 30484: e13fff17 ldw r4,-4(fp) - 30488: 00313e80 call 313e8 + 2fb58: 014000f4 movhi r5,3 + 2fb5c: 29515904 addi r5,r5,17764 + 2fb60: e13fff17 ldw r4,-4(fp) + 2fb64: 0030ac40 call 30ac4 } - 3048c: e037883a mov sp,fp - 30490: dfc00117 ldw ra,4(sp) - 30494: df000017 ldw fp,0(sp) - 30498: dec00204 addi sp,sp,8 - 3049c: f800283a ret + 2fb68: e037883a mov sp,fp + 2fb6c: dfc00117 ldw ra,4(sp) + 2fb70: df000017 ldw fp,0(sp) + 2fb74: dec00204 addi sp,sp,8 + 2fb78: f800283a ret -000304a0 : +0002fb7c : * The "base" parameter is ignored and only * present for backwards-compatibility. */ void alt_irq_init ( const void* base ) { - 304a0: defffd04 addi sp,sp,-12 - 304a4: dfc00215 stw ra,8(sp) - 304a8: df000115 stw fp,4(sp) - 304ac: df000104 addi fp,sp,4 - 304b0: e13fff15 stw r4,-4(fp) + 2fb7c: defffd04 addi sp,sp,-12 + 2fb80: dfc00215 stw ra,8(sp) + 2fb84: df000115 stw fp,4(sp) + 2fb88: df000104 addi fp,sp,4 + 2fb8c: e13fff15 stw r4,-4(fp) ALTERA_NIOS2_GEN2_IRQ_INIT ( NIOS2_GEN2, nios2_gen2); - 304b4: 0031c040 call 31c04 + 2fb90: 00312e00 call 312e0 * alt_irq_cpu_enable_interrupts() enables the CPU to start taking interrupts. */ static ALT_INLINE void ALT_ALWAYS_INLINE alt_irq_cpu_enable_interrupts (void) { NIOS2_WRITE_STATUS(NIOS2_STATUS_PIE_MSK - 304b8: 00800044 movi r2,1 - 304bc: 1001703a wrctl status,r2 + 2fb94: 00800044 movi r2,1 + 2fb98: 1001703a wrctl status,r2 alt_irq_cpu_enable_interrupts(); } - 304c0: 0001883a nop - 304c4: e037883a mov sp,fp - 304c8: dfc00117 ldw ra,4(sp) - 304cc: df000017 ldw fp,0(sp) - 304d0: dec00204 addi sp,sp,8 - 304d4: f800283a ret + 2fb9c: 0001883a nop + 2fba0: e037883a mov sp,fp + 2fba4: dfc00117 ldw ra,4(sp) + 2fba8: df000017 ldw fp,0(sp) + 2fbac: dec00204 addi sp,sp,8 + 2fbb0: f800283a ret -000304d8 : +0002fbb4 : * Initialize the non-interrupt controller devices. * Called after alt_irq_init(). */ void alt_sys_init( void ) { - 304d8: defffe04 addi sp,sp,-8 - 304dc: dfc00115 stw ra,4(sp) - 304e0: df000015 stw fp,0(sp) - 304e4: d839883a mov fp,sp + 2fbb4: defffe04 addi sp,sp,-8 + 2fbb8: dfc00115 stw ra,4(sp) + 2fbbc: df000015 stw fp,0(sp) + 2fbc0: d839883a mov fp,sp ALTERA_AVALON_TIMER_INIT ( TIMER, timer); - 304e8: 01c0fa04 movi r7,1000 - 304ec: 018000c4 movi r6,3 - 304f0: 000b883a mov r5,zero - 304f4: 01000134 movhi r4,4 - 304f8: 21040004 addi r4,r4,4096 - 304fc: 003102c0 call 3102c + 2fbc4: 01c0fa04 movi r7,1000 + 2fbc8: 018000c4 movi r6,3 + 2fbcc: 000b883a mov r5,zero + 2fbd0: 01000134 movhi r4,4 + 2fbd4: 21040004 addi r4,r4,4096 + 2fbd8: 00307080 call 30708 ALTERA_AVALON_JTAG_UART_INIT ( JTAG_UART, jtag_uart); - 30500: 01800084 movi r6,2 - 30504: 000b883a mov r5,zero - 30508: 010000f4 movhi r4,3 - 3050c: 210f8d04 addi r4,r4,15924 - 30510: 00306a00 call 306a0 - 30514: 010000f4 movhi r4,3 - 30518: 210f8304 addi r4,r4,15884 - 3051c: 00304680 call 30468 + 2fbdc: 01800084 movi r6,2 + 2fbe0: 000b883a mov r5,zero + 2fbe4: 010000f4 movhi r4,3 + 2fbe8: 210d4004 addi r4,r4,13568 + 2fbec: 002fd7c0 call 2fd7c + 2fbf0: 010000f4 movhi r4,3 + 2fbf4: 210d3604 addi r4,r4,13528 + 2fbf8: 002fb440 call 2fb44 ALTERA_AVALON_SYSID_QSYS_INIT ( SYSID_QSYS, sysid_qsys); - 30520: 0001883a nop + 2fbfc: 0001883a nop } - 30524: 0001883a nop - 30528: e037883a mov sp,fp - 3052c: dfc00117 ldw ra,4(sp) - 30530: df000017 ldw fp,0(sp) - 30534: dec00204 addi sp,sp,8 - 30538: f800283a ret + 2fc00: 0001883a nop + 2fc04: e037883a mov sp,fp + 2fc08: dfc00117 ldw ra,4(sp) + 2fc0c: df000017 ldw fp,0(sp) + 2fc10: dec00204 addi sp,sp,8 + 2fc14: f800283a ret -0003053c : +0002fc18 : * */ int altera_avalon_jtag_uart_read_fd(alt_fd* fd, char* buffer, int space) { - 3053c: defffa04 addi sp,sp,-24 - 30540: dfc00515 stw ra,20(sp) - 30544: df000415 stw fp,16(sp) - 30548: df000404 addi fp,sp,16 - 3054c: e13ffd15 stw r4,-12(fp) - 30550: e17ffe15 stw r5,-8(fp) - 30554: e1bfff15 stw r6,-4(fp) + 2fc18: defffa04 addi sp,sp,-24 + 2fc1c: dfc00515 stw ra,20(sp) + 2fc20: df000415 stw fp,16(sp) + 2fc24: df000404 addi fp,sp,16 + 2fc28: e13ffd15 stw r4,-12(fp) + 2fc2c: e17ffe15 stw r5,-8(fp) + 2fc30: e1bfff15 stw r6,-4(fp) altera_avalon_jtag_uart_dev* dev = (altera_avalon_jtag_uart_dev*) fd->dev; - 30558: e0bffd17 ldw r2,-12(fp) - 3055c: 10800017 ldw r2,0(r2) - 30560: e0bffc15 stw r2,-16(fp) + 2fc34: e0bffd17 ldw r2,-12(fp) + 2fc38: 10800017 ldw r2,0(r2) + 2fc3c: e0bffc15 stw r2,-16(fp) return altera_avalon_jtag_uart_read(&dev->state, buffer, space, - 30564: e0bffc17 ldw r2,-16(fp) - 30568: 10c00a04 addi r3,r2,40 - 3056c: e0bffd17 ldw r2,-12(fp) - 30570: 10800217 ldw r2,8(r2) - 30574: 100f883a mov r7,r2 - 30578: e1bfff17 ldw r6,-4(fp) - 3057c: e17ffe17 ldw r5,-8(fp) - 30580: 1809883a mov r4,r3 - 30584: 0030b740 call 30b74 + 2fc40: e0bffc17 ldw r2,-16(fp) + 2fc44: 10c00a04 addi r3,r2,40 + 2fc48: e0bffd17 ldw r2,-12(fp) + 2fc4c: 10800217 ldw r2,8(r2) + 2fc50: 100f883a mov r7,r2 + 2fc54: e1bfff17 ldw r6,-4(fp) + 2fc58: e17ffe17 ldw r5,-8(fp) + 2fc5c: 1809883a mov r4,r3 + 2fc60: 00302500 call 30250 fd->fd_flags); } - 30588: e037883a mov sp,fp - 3058c: dfc00117 ldw ra,4(sp) - 30590: df000017 ldw fp,0(sp) - 30594: dec00204 addi sp,sp,8 - 30598: f800283a ret + 2fc64: e037883a mov sp,fp + 2fc68: dfc00117 ldw ra,4(sp) + 2fc6c: df000017 ldw fp,0(sp) + 2fc70: dec00204 addi sp,sp,8 + 2fc74: f800283a ret -0003059c : +0002fc78 : int altera_avalon_jtag_uart_write_fd(alt_fd* fd, const char* buffer, int space) { - 3059c: defffa04 addi sp,sp,-24 - 305a0: dfc00515 stw ra,20(sp) - 305a4: df000415 stw fp,16(sp) - 305a8: df000404 addi fp,sp,16 - 305ac: e13ffd15 stw r4,-12(fp) - 305b0: e17ffe15 stw r5,-8(fp) - 305b4: e1bfff15 stw r6,-4(fp) + 2fc78: defffa04 addi sp,sp,-24 + 2fc7c: dfc00515 stw ra,20(sp) + 2fc80: df000415 stw fp,16(sp) + 2fc84: df000404 addi fp,sp,16 + 2fc88: e13ffd15 stw r4,-12(fp) + 2fc8c: e17ffe15 stw r5,-8(fp) + 2fc90: e1bfff15 stw r6,-4(fp) altera_avalon_jtag_uart_dev* dev = (altera_avalon_jtag_uart_dev*) fd->dev; - 305b8: e0bffd17 ldw r2,-12(fp) - 305bc: 10800017 ldw r2,0(r2) - 305c0: e0bffc15 stw r2,-16(fp) + 2fc94: e0bffd17 ldw r2,-12(fp) + 2fc98: 10800017 ldw r2,0(r2) + 2fc9c: e0bffc15 stw r2,-16(fp) return altera_avalon_jtag_uart_write(&dev->state, buffer, space, - 305c4: e0bffc17 ldw r2,-16(fp) - 305c8: 10c00a04 addi r3,r2,40 - 305cc: e0bffd17 ldw r2,-12(fp) - 305d0: 10800217 ldw r2,8(r2) - 305d4: 100f883a mov r7,r2 - 305d8: e1bfff17 ldw r6,-4(fp) - 305dc: e17ffe17 ldw r5,-8(fp) - 305e0: 1809883a mov r4,r3 - 305e4: 0030d900 call 30d90 + 2fca0: e0bffc17 ldw r2,-16(fp) + 2fca4: 10c00a04 addi r3,r2,40 + 2fca8: e0bffd17 ldw r2,-12(fp) + 2fcac: 10800217 ldw r2,8(r2) + 2fcb0: 100f883a mov r7,r2 + 2fcb4: e1bfff17 ldw r6,-4(fp) + 2fcb8: e17ffe17 ldw r5,-8(fp) + 2fcbc: 1809883a mov r4,r3 + 2fcc0: 003046c0 call 3046c fd->fd_flags); } - 305e8: e037883a mov sp,fp - 305ec: dfc00117 ldw ra,4(sp) - 305f0: df000017 ldw fp,0(sp) - 305f4: dec00204 addi sp,sp,8 - 305f8: f800283a ret + 2fcc4: e037883a mov sp,fp + 2fcc8: dfc00117 ldw ra,4(sp) + 2fccc: df000017 ldw fp,0(sp) + 2fcd0: dec00204 addi sp,sp,8 + 2fcd4: f800283a ret -000305fc : +0002fcd8 : #ifndef ALTERA_AVALON_JTAG_UART_SMALL int altera_avalon_jtag_uart_close_fd(alt_fd* fd) { - 305fc: defffc04 addi sp,sp,-16 - 30600: dfc00315 stw ra,12(sp) - 30604: df000215 stw fp,8(sp) - 30608: df000204 addi fp,sp,8 - 3060c: e13fff15 stw r4,-4(fp) + 2fcd8: defffc04 addi sp,sp,-16 + 2fcdc: dfc00315 stw ra,12(sp) + 2fce0: df000215 stw fp,8(sp) + 2fce4: df000204 addi fp,sp,8 + 2fce8: e13fff15 stw r4,-4(fp) altera_avalon_jtag_uart_dev* dev = (altera_avalon_jtag_uart_dev*) fd->dev; - 30610: e0bfff17 ldw r2,-4(fp) - 30614: 10800017 ldw r2,0(r2) - 30618: e0bffe15 stw r2,-8(fp) + 2fcec: e0bfff17 ldw r2,-4(fp) + 2fcf0: 10800017 ldw r2,0(r2) + 2fcf4: e0bffe15 stw r2,-8(fp) return altera_avalon_jtag_uart_close(&dev->state, fd->fd_flags); - 3061c: e0bffe17 ldw r2,-8(fp) - 30620: 10c00a04 addi r3,r2,40 - 30624: e0bfff17 ldw r2,-4(fp) - 30628: 10800217 ldw r2,8(r2) - 3062c: 100b883a mov r5,r2 - 30630: 1809883a mov r4,r3 - 30634: 0030a1c0 call 30a1c + 2fcf8: e0bffe17 ldw r2,-8(fp) + 2fcfc: 10c00a04 addi r3,r2,40 + 2fd00: e0bfff17 ldw r2,-4(fp) + 2fd04: 10800217 ldw r2,8(r2) + 2fd08: 100b883a mov r5,r2 + 2fd0c: 1809883a mov r4,r3 + 2fd10: 00300f80 call 300f8 } - 30638: e037883a mov sp,fp - 3063c: dfc00117 ldw ra,4(sp) - 30640: df000017 ldw fp,0(sp) - 30644: dec00204 addi sp,sp,8 - 30648: f800283a ret + 2fd14: e037883a mov sp,fp + 2fd18: dfc00117 ldw ra,4(sp) + 2fd1c: df000017 ldw fp,0(sp) + 2fd20: dec00204 addi sp,sp,8 + 2fd24: f800283a ret -0003064c : +0002fd28 : int altera_avalon_jtag_uart_ioctl_fd(alt_fd* fd, int req, void* arg) { - 3064c: defffa04 addi sp,sp,-24 - 30650: dfc00515 stw ra,20(sp) - 30654: df000415 stw fp,16(sp) - 30658: df000404 addi fp,sp,16 - 3065c: e13ffd15 stw r4,-12(fp) - 30660: e17ffe15 stw r5,-8(fp) - 30664: e1bfff15 stw r6,-4(fp) + 2fd28: defffa04 addi sp,sp,-24 + 2fd2c: dfc00515 stw ra,20(sp) + 2fd30: df000415 stw fp,16(sp) + 2fd34: df000404 addi fp,sp,16 + 2fd38: e13ffd15 stw r4,-12(fp) + 2fd3c: e17ffe15 stw r5,-8(fp) + 2fd40: e1bfff15 stw r6,-4(fp) altera_avalon_jtag_uart_dev* dev = (altera_avalon_jtag_uart_dev*) fd->dev; - 30668: e0bffd17 ldw r2,-12(fp) - 3066c: 10800017 ldw r2,0(r2) - 30670: e0bffc15 stw r2,-16(fp) + 2fd44: e0bffd17 ldw r2,-12(fp) + 2fd48: 10800017 ldw r2,0(r2) + 2fd4c: e0bffc15 stw r2,-16(fp) return altera_avalon_jtag_uart_ioctl(&dev->state, req, arg); - 30674: e0bffc17 ldw r2,-16(fp) - 30678: 10800a04 addi r2,r2,40 - 3067c: e1bfff17 ldw r6,-4(fp) - 30680: e17ffe17 ldw r5,-8(fp) - 30684: 1009883a mov r4,r2 - 30688: 0030a840 call 30a84 + 2fd50: e0bffc17 ldw r2,-16(fp) + 2fd54: 10800a04 addi r2,r2,40 + 2fd58: e1bfff17 ldw r6,-4(fp) + 2fd5c: e17ffe17 ldw r5,-8(fp) + 2fd60: 1009883a mov r4,r2 + 2fd64: 00301600 call 30160 } - 3068c: e037883a mov sp,fp - 30690: dfc00117 ldw ra,4(sp) - 30694: df000017 ldw fp,0(sp) - 30698: dec00204 addi sp,sp,8 - 3069c: f800283a ret + 2fd68: e037883a mov sp,fp + 2fd6c: dfc00117 ldw ra,4(sp) + 2fd70: df000017 ldw fp,0(sp) + 2fd74: dec00204 addi sp,sp,8 + 2fd78: f800283a ret -000306a0 : +0002fd7c : * Return 1 on sucessful IRQ register and 0 on failure. */ void altera_avalon_jtag_uart_init(altera_avalon_jtag_uart_state* sp, int irq_controller_id, int irq) { - 306a0: defffa04 addi sp,sp,-24 - 306a4: dfc00515 stw ra,20(sp) - 306a8: df000415 stw fp,16(sp) - 306ac: df000404 addi fp,sp,16 - 306b0: e13ffd15 stw r4,-12(fp) - 306b4: e17ffe15 stw r5,-8(fp) - 306b8: e1bfff15 stw r6,-4(fp) + 2fd7c: defffa04 addi sp,sp,-24 + 2fd80: dfc00515 stw ra,20(sp) + 2fd84: df000415 stw fp,16(sp) + 2fd88: df000404 addi fp,sp,16 + 2fd8c: e13ffd15 stw r4,-12(fp) + 2fd90: e17ffe15 stw r5,-8(fp) + 2fd94: e1bfff15 stw r6,-4(fp) ALT_FLAG_CREATE(&sp->events, 0); ALT_SEM_CREATE(&sp->read_lock, 1); ALT_SEM_CREATE(&sp->write_lock, 1); /* enable read interrupts at the device */ sp->irq_enable = ALTERA_AVALON_JTAG_UART_CONTROL_RE_MSK; - 306bc: e0bffd17 ldw r2,-12(fp) - 306c0: 00c00044 movi r3,1 - 306c4: 10c00815 stw r3,32(r2) + 2fd98: e0bffd17 ldw r2,-12(fp) + 2fd9c: 00c00044 movi r3,1 + 2fda0: 10c00815 stw r3,32(r2) IOWR_ALTERA_AVALON_JTAG_UART_CONTROL(sp->base, sp->irq_enable); - 306c8: e0bffd17 ldw r2,-12(fp) - 306cc: 10800017 ldw r2,0(r2) - 306d0: 10800104 addi r2,r2,4 - 306d4: 1007883a mov r3,r2 - 306d8: e0bffd17 ldw r2,-12(fp) - 306dc: 10800817 ldw r2,32(r2) - 306e0: 18800035 stwio r2,0(r3) + 2fda4: e0bffd17 ldw r2,-12(fp) + 2fda8: 10800017 ldw r2,0(r2) + 2fdac: 10800104 addi r2,r2,4 + 2fdb0: 1007883a mov r3,r2 + 2fdb4: e0bffd17 ldw r2,-12(fp) + 2fdb8: 10800817 ldw r2,32(r2) + 2fdbc: 18800035 stwio r2,0(r3) /* register the interrupt handler */ #ifdef ALT_ENHANCED_INTERRUPT_API_PRESENT alt_ic_isr_register(irq_controller_id, irq, altera_avalon_jtag_uart_irq, - 306e4: e0bffe17 ldw r2,-8(fp) - 306e8: e0ffff17 ldw r3,-4(fp) - 306ec: d8000015 stw zero,0(sp) - 306f0: e1fffd17 ldw r7,-12(fp) - 306f4: 018000f4 movhi r6,3 - 306f8: 3181da04 addi r6,r6,1896 - 306fc: 180b883a mov r5,r3 - 30700: 1009883a mov r4,r2 - 30704: 00315800 call 31580 + 2fdc0: e0bffe17 ldw r2,-8(fp) + 2fdc4: e0ffff17 ldw r3,-4(fp) + 2fdc8: d8000015 stw zero,0(sp) + 2fdcc: e1fffd17 ldw r7,-12(fp) + 2fdd0: 018000f4 movhi r6,3 + 2fdd4: 31bf9104 addi r6,r6,-444 + 2fdd8: 180b883a mov r5,r3 + 2fddc: 1009883a mov r4,r2 + 2fde0: 0030c5c0 call 30c5c #else alt_irq_register(irq, sp, altera_avalon_jtag_uart_irq); #endif /* Register an alarm to go off every second to check for presence of host */ sp->host_inactive = 0; - 30708: e0bffd17 ldw r2,-12(fp) - 3070c: 10000915 stw zero,36(r2) + 2fde4: e0bffd17 ldw r2,-12(fp) + 2fde8: 10000915 stw zero,36(r2) if (alt_alarm_start(&sp->alarm, alt_ticks_per_second(), - 30710: e0bffd17 ldw r2,-12(fp) - 30714: 10c00204 addi r3,r2,8 + 2fdec: e0bffd17 ldw r2,-12(fp) + 2fdf0: 10c00204 addi r3,r2,8 * Obtain the system clock rate in ticks/s. */ static ALT_INLINE alt_u32 ALT_ALWAYS_INLINE alt_ticks_per_second (void) { return _alt_tick_rate; - 30718: 008000f4 movhi r2,3 - 3071c: 109c6004 addi r2,r2,29056 - 30720: 10800017 ldw r2,0(r2) - 30724: e1fffd17 ldw r7,-12(fp) - 30728: 018000f4 movhi r6,3 - 3072c: 31825d04 addi r6,r6,2420 - 30730: 100b883a mov r5,r2 - 30734: 1809883a mov r4,r3 - 30738: 00310b80 call 310b8 - 3073c: 1000040e bge r2,zero,30750 + 2fdf4: 008000f4 movhi r2,3 + 2fdf8: 109a1304 addi r2,r2,26700 + 2fdfc: 10800017 ldw r2,0(r2) + 2fe00: e1fffd17 ldw r7,-12(fp) + 2fe04: 018000f4 movhi r6,3 + 2fe08: 31801404 addi r6,r6,80 + 2fe0c: 100b883a mov r5,r2 + 2fe10: 1809883a mov r4,r3 + 2fe14: 00307940 call 30794 + 2fe18: 1000040e bge r2,zero,2fe2c &altera_avalon_jtag_uart_timeout, sp) < 0) { /* If we can't set the alarm then record "don't know if host present" * and behave as though the host is present. */ sp->timeout = INT_MAX; - 30740: e0fffd17 ldw r3,-12(fp) - 30744: 00a00034 movhi r2,32768 - 30748: 10bfffc4 addi r2,r2,-1 - 3074c: 18800115 stw r2,4(r3) + 2fe1c: e0fffd17 ldw r3,-12(fp) + 2fe20: 00a00034 movhi r2,32768 + 2fe24: 10bfffc4 addi r2,r2,-1 + 2fe28: 18800115 stw r2,4(r3) } /* ALT_LOG - see altera_hal/HAL/inc/sys/alt_log_printf.h */ ALT_LOG_JTAG_UART_ALARM_REGISTER(sp, sp->base); } - 30750: 0001883a nop - 30754: e037883a mov sp,fp - 30758: dfc00117 ldw ra,4(sp) - 3075c: df000017 ldw fp,0(sp) - 30760: dec00204 addi sp,sp,8 - 30764: f800283a ret + 2fe2c: 0001883a nop + 2fe30: e037883a mov sp,fp + 2fe34: dfc00117 ldw ra,4(sp) + 2fe38: df000017 ldw fp,0(sp) + 2fe3c: dec00204 addi sp,sp,8 + 2fe40: f800283a ret -00030768 : +0002fe44 : #ifdef ALT_ENHANCED_INTERRUPT_API_PRESENT static void altera_avalon_jtag_uart_irq(void* context) #else static void altera_avalon_jtag_uart_irq(void* context, alt_u32 id) #endif { - 30768: defff804 addi sp,sp,-32 - 3076c: df000715 stw fp,28(sp) - 30770: df000704 addi fp,sp,28 - 30774: e13fff15 stw r4,-4(fp) + 2fe44: defff804 addi sp,sp,-32 + 2fe48: df000715 stw fp,28(sp) + 2fe4c: df000704 addi fp,sp,28 + 2fe50: e13fff15 stw r4,-4(fp) altera_avalon_jtag_uart_state* sp = (altera_avalon_jtag_uart_state*) context; - 30778: e0bfff17 ldw r2,-4(fp) - 3077c: e0bffb15 stw r2,-20(fp) + 2fe54: e0bfff17 ldw r2,-4(fp) + 2fe58: e0bffb15 stw r2,-20(fp) unsigned int base = sp->base; - 30780: e0bffb17 ldw r2,-20(fp) - 30784: 10800017 ldw r2,0(r2) - 30788: e0bffc15 stw r2,-16(fp) + 2fe5c: e0bffb17 ldw r2,-20(fp) + 2fe60: 10800017 ldw r2,0(r2) + 2fe64: e0bffc15 stw r2,-16(fp) /* ALT_LOG - see altera_hal/HAL/inc/sys/alt_log_printf.h */ ALT_LOG_JTAG_UART_ISR_FUNCTION(base, sp); for ( ; ; ) { unsigned int control = IORD_ALTERA_AVALON_JTAG_UART_CONTROL(base); - 3078c: e0bffc17 ldw r2,-16(fp) - 30790: 10800104 addi r2,r2,4 - 30794: 10800037 ldwio r2,0(r2) - 30798: e0bffd15 stw r2,-12(fp) + 2fe68: e0bffc17 ldw r2,-16(fp) + 2fe6c: 10800104 addi r2,r2,4 + 2fe70: 10800037 ldwio r2,0(r2) + 2fe74: e0bffd15 stw r2,-12(fp) /* Return once nothing more to do */ if ((control & (ALTERA_AVALON_JTAG_UART_CONTROL_RI_MSK | ALTERA_AVALON_JTAG_UART_CONTROL_WI_MSK)) == 0) - 3079c: e0bffd17 ldw r2,-12(fp) - 307a0: 1080c00c andi r2,r2,768 - 307a4: 10006d26 beq r2,zero,3095c + 2fe78: e0bffd17 ldw r2,-12(fp) + 2fe7c: 1080c00c andi r2,r2,768 + 2fe80: 10006d26 beq r2,zero,30038 break; if (control & ALTERA_AVALON_JTAG_UART_CONTROL_RI_MSK) - 307a8: e0bffd17 ldw r2,-12(fp) - 307ac: 1080400c andi r2,r2,256 - 307b0: 10003526 beq r2,zero,30888 + 2fe84: e0bffd17 ldw r2,-12(fp) + 2fe88: 1080400c andi r2,r2,256 + 2fe8c: 10003526 beq r2,zero,2ff64 { /* process a read irq. Start by assuming that there is data in the * receive FIFO (otherwise why would we have been interrupted?) */ unsigned int data = 1 << ALTERA_AVALON_JTAG_UART_DATA_RAVAIL_OFST; - 307b4: 00800074 movhi r2,1 - 307b8: e0bff915 stw r2,-28(fp) + 2fe90: 00800074 movhi r2,1 + 2fe94: e0bff915 stw r2,-28(fp) for ( ; ; ) { /* Check whether there is space in the buffer. If not then we must not * read any characters from the buffer as they will be lost. */ unsigned int next = (sp->rx_in + 1) % ALTERA_AVALON_JTAG_UART_BUF_LEN; - 307bc: e0bffb17 ldw r2,-20(fp) - 307c0: 10800a17 ldw r2,40(r2) - 307c4: 10800044 addi r2,r2,1 - 307c8: 1081ffcc andi r2,r2,2047 - 307cc: e0bffe15 stw r2,-8(fp) + 2fe98: e0bffb17 ldw r2,-20(fp) + 2fe9c: 10800a17 ldw r2,40(r2) + 2fea0: 10800044 addi r2,r2,1 + 2fea4: 1081ffcc andi r2,r2,2047 + 2fea8: e0bffe15 stw r2,-8(fp) if (next == sp->rx_out) - 307d0: e0bffb17 ldw r2,-20(fp) - 307d4: 10c00b17 ldw r3,44(r2) - 307d8: e0bffe17 ldw r2,-8(fp) - 307dc: 18801526 beq r3,r2,30834 + 2feac: e0bffb17 ldw r2,-20(fp) + 2feb0: 10c00b17 ldw r3,44(r2) + 2feb4: e0bffe17 ldw r2,-8(fp) + 2feb8: 18801526 beq r3,r2,2ff10 break; /* Try to remove a character from the FIFO and find out whether there * are any more characters remaining. */ data = IORD_ALTERA_AVALON_JTAG_UART_DATA(base); - 307e0: e0bffc17 ldw r2,-16(fp) - 307e4: 10800037 ldwio r2,0(r2) - 307e8: e0bff915 stw r2,-28(fp) + 2febc: e0bffc17 ldw r2,-16(fp) + 2fec0: 10800037 ldwio r2,0(r2) + 2fec4: e0bff915 stw r2,-28(fp) if ((data & ALTERA_AVALON_JTAG_UART_DATA_RVALID_MSK) == 0) - 307ec: e0bff917 ldw r2,-28(fp) - 307f0: 10a0000c andi r2,r2,32768 - 307f4: 10001126 beq r2,zero,3083c + 2fec8: e0bff917 ldw r2,-28(fp) + 2fecc: 10a0000c andi r2,r2,32768 + 2fed0: 10001126 beq r2,zero,2ff18 break; sp->rx_buf[sp->rx_in] = (data & ALTERA_AVALON_JTAG_UART_DATA_DATA_MSK) >> ALTERA_AVALON_JTAG_UART_DATA_DATA_OFST; - 307f8: e0bffb17 ldw r2,-20(fp) - 307fc: 10800a17 ldw r2,40(r2) - 30800: e0fff917 ldw r3,-28(fp) - 30804: 1809883a mov r4,r3 - 30808: e0fffb17 ldw r3,-20(fp) - 3080c: 1885883a add r2,r3,r2 - 30810: 10800e04 addi r2,r2,56 - 30814: 11000005 stb r4,0(r2) + 2fed4: e0bffb17 ldw r2,-20(fp) + 2fed8: 10800a17 ldw r2,40(r2) + 2fedc: e0fff917 ldw r3,-28(fp) + 2fee0: 1809883a mov r4,r3 + 2fee4: e0fffb17 ldw r3,-20(fp) + 2fee8: 1885883a add r2,r3,r2 + 2feec: 10800e04 addi r2,r2,56 + 2fef0: 11000005 stb r4,0(r2) sp->rx_in = (sp->rx_in + 1) % ALTERA_AVALON_JTAG_UART_BUF_LEN; - 30818: e0bffb17 ldw r2,-20(fp) - 3081c: 10800a17 ldw r2,40(r2) - 30820: 10800044 addi r2,r2,1 - 30824: 10c1ffcc andi r3,r2,2047 - 30828: e0bffb17 ldw r2,-20(fp) - 3082c: 10c00a15 stw r3,40(r2) + 2fef4: e0bffb17 ldw r2,-20(fp) + 2fef8: 10800a17 ldw r2,40(r2) + 2fefc: 10800044 addi r2,r2,1 + 2ff00: 10c1ffcc andi r3,r2,2047 + 2ff04: e0bffb17 ldw r2,-20(fp) + 2ff08: 10c00a15 stw r3,40(r2) /* Post an event to notify jtag_uart_read that a character has been read */ ALT_FLAG_POST (sp->events, ALT_JTAG_UART_READ_RDY, OS_FLAG_SET); } - 30830: 003fe206 br 307bc + 2ff0c: 003fe206 br 2fe98 <_gp+0xffff3960> /* Check whether there is space in the buffer. If not then we must not * read any characters from the buffer as they will be lost. */ unsigned int next = (sp->rx_in + 1) % ALTERA_AVALON_JTAG_UART_BUF_LEN; if (next == sp->rx_out) break; - 30834: 0001883a nop - 30838: 00000106 br 30840 + 2ff10: 0001883a nop + 2ff14: 00000106 br 2ff1c * are any more characters remaining. */ data = IORD_ALTERA_AVALON_JTAG_UART_DATA(base); if ((data & ALTERA_AVALON_JTAG_UART_DATA_RVALID_MSK) == 0) break; - 3083c: 0001883a nop + 2ff18: 0001883a nop /* Post an event to notify jtag_uart_read that a character has been read */ ALT_FLAG_POST (sp->events, ALT_JTAG_UART_READ_RDY, OS_FLAG_SET); } if (data & ALTERA_AVALON_JTAG_UART_DATA_RAVAIL_MSK) - 30840: e0bff917 ldw r2,-28(fp) - 30844: 10bfffec andhi r2,r2,65535 - 30848: 10000f26 beq r2,zero,30888 + 2ff1c: e0bff917 ldw r2,-28(fp) + 2ff20: 10bfffec andhi r2,r2,65535 + 2ff24: 10000f26 beq r2,zero,2ff64 { /* If there is still data available here then the buffer is full * so turn off receive interrupts until some space becomes available. */ sp->irq_enable &= ~ALTERA_AVALON_JTAG_UART_CONTROL_RE_MSK; - 3084c: e0bffb17 ldw r2,-20(fp) - 30850: 10c00817 ldw r3,32(r2) - 30854: 00bfff84 movi r2,-2 - 30858: 1886703a and r3,r3,r2 - 3085c: e0bffb17 ldw r2,-20(fp) - 30860: 10c00815 stw r3,32(r2) + 2ff28: e0bffb17 ldw r2,-20(fp) + 2ff2c: 10c00817 ldw r3,32(r2) + 2ff30: 00bfff84 movi r2,-2 + 2ff34: 1886703a and r3,r3,r2 + 2ff38: e0bffb17 ldw r2,-20(fp) + 2ff3c: 10c00815 stw r3,32(r2) IOWR_ALTERA_AVALON_JTAG_UART_CONTROL(base, sp->irq_enable); - 30864: e0bffc17 ldw r2,-16(fp) - 30868: 10800104 addi r2,r2,4 - 3086c: 1007883a mov r3,r2 - 30870: e0bffb17 ldw r2,-20(fp) - 30874: 10800817 ldw r2,32(r2) - 30878: 18800035 stwio r2,0(r3) + 2ff40: e0bffc17 ldw r2,-16(fp) + 2ff44: 10800104 addi r2,r2,4 + 2ff48: 1007883a mov r3,r2 + 2ff4c: e0bffb17 ldw r2,-20(fp) + 2ff50: 10800817 ldw r2,32(r2) + 2ff54: 18800035 stwio r2,0(r3) /* Dummy read to ensure IRQ is cleared prior to ISR completion */ IORD_ALTERA_AVALON_JTAG_UART_CONTROL(base); - 3087c: e0bffc17 ldw r2,-16(fp) - 30880: 10800104 addi r2,r2,4 - 30884: 10800037 ldwio r2,0(r2) + 2ff58: e0bffc17 ldw r2,-16(fp) + 2ff5c: 10800104 addi r2,r2,4 + 2ff60: 10800037 ldwio r2,0(r2) } } if (control & ALTERA_AVALON_JTAG_UART_CONTROL_WI_MSK) - 30888: e0bffd17 ldw r2,-12(fp) - 3088c: 1080800c andi r2,r2,512 - 30890: 103fbe26 beq r2,zero,3078c + 2ff64: e0bffd17 ldw r2,-12(fp) + 2ff68: 1080800c andi r2,r2,512 + 2ff6c: 103fbe26 beq r2,zero,2fe68 <_gp+0xffff3930> { /* process a write irq */ unsigned int space = (control & ALTERA_AVALON_JTAG_UART_CONTROL_WSPACE_MSK) >> ALTERA_AVALON_JTAG_UART_CONTROL_WSPACE_OFST; - 30894: e0bffd17 ldw r2,-12(fp) - 30898: 1004d43a srli r2,r2,16 - 3089c: e0bffa15 stw r2,-24(fp) + 2ff70: e0bffd17 ldw r2,-12(fp) + 2ff74: 1004d43a srli r2,r2,16 + 2ff78: e0bffa15 stw r2,-24(fp) while (space > 0 && sp->tx_out != sp->tx_in) - 308a0: 00001406 br 308f4 + 2ff7c: 00001406 br 2ffd0 { IOWR_ALTERA_AVALON_JTAG_UART_DATA(base, sp->tx_buf[sp->tx_out]); - 308a4: e0bffc17 ldw r2,-16(fp) - 308a8: e0fffb17 ldw r3,-20(fp) - 308ac: 18c00d17 ldw r3,52(r3) - 308b0: e13ffb17 ldw r4,-20(fp) - 308b4: 20c7883a add r3,r4,r3 - 308b8: 18c20e04 addi r3,r3,2104 - 308bc: 18c00003 ldbu r3,0(r3) - 308c0: 18c03fcc andi r3,r3,255 - 308c4: 18c0201c xori r3,r3,128 - 308c8: 18ffe004 addi r3,r3,-128 - 308cc: 10c00035 stwio r3,0(r2) + 2ff80: e0bffc17 ldw r2,-16(fp) + 2ff84: e0fffb17 ldw r3,-20(fp) + 2ff88: 18c00d17 ldw r3,52(r3) + 2ff8c: e13ffb17 ldw r4,-20(fp) + 2ff90: 20c7883a add r3,r4,r3 + 2ff94: 18c20e04 addi r3,r3,2104 + 2ff98: 18c00003 ldbu r3,0(r3) + 2ff9c: 18c03fcc andi r3,r3,255 + 2ffa0: 18c0201c xori r3,r3,128 + 2ffa4: 18ffe004 addi r3,r3,-128 + 2ffa8: 10c00035 stwio r3,0(r2) sp->tx_out = (sp->tx_out + 1) % ALTERA_AVALON_JTAG_UART_BUF_LEN; - 308d0: e0bffb17 ldw r2,-20(fp) - 308d4: 10800d17 ldw r2,52(r2) - 308d8: 10800044 addi r2,r2,1 - 308dc: 10c1ffcc andi r3,r2,2047 - 308e0: e0bffb17 ldw r2,-20(fp) - 308e4: 10c00d15 stw r3,52(r2) + 2ffac: e0bffb17 ldw r2,-20(fp) + 2ffb0: 10800d17 ldw r2,52(r2) + 2ffb4: 10800044 addi r2,r2,1 + 2ffb8: 10c1ffcc andi r3,r2,2047 + 2ffbc: e0bffb17 ldw r2,-20(fp) + 2ffc0: 10c00d15 stw r3,52(r2) /* Post an event to notify jtag_uart_write that a character has been written */ ALT_FLAG_POST (sp->events, ALT_JTAG_UART_WRITE_RDY, OS_FLAG_SET); space--; - 308e8: e0bffa17 ldw r2,-24(fp) - 308ec: 10bfffc4 addi r2,r2,-1 - 308f0: e0bffa15 stw r2,-24(fp) + 2ffc4: e0bffa17 ldw r2,-24(fp) + 2ffc8: 10bfffc4 addi r2,r2,-1 + 2ffcc: e0bffa15 stw r2,-24(fp) if (control & ALTERA_AVALON_JTAG_UART_CONTROL_WI_MSK) { /* process a write irq */ unsigned int space = (control & ALTERA_AVALON_JTAG_UART_CONTROL_WSPACE_MSK) >> ALTERA_AVALON_JTAG_UART_CONTROL_WSPACE_OFST; while (space > 0 && sp->tx_out != sp->tx_in) - 308f4: e0bffa17 ldw r2,-24(fp) - 308f8: 10000526 beq r2,zero,30910 - 308fc: e0bffb17 ldw r2,-20(fp) - 30900: 10c00d17 ldw r3,52(r2) - 30904: e0bffb17 ldw r2,-20(fp) - 30908: 10800c17 ldw r2,48(r2) - 3090c: 18bfe51e bne r3,r2,308a4 + 2ffd0: e0bffa17 ldw r2,-24(fp) + 2ffd4: 10000526 beq r2,zero,2ffec + 2ffd8: e0bffb17 ldw r2,-20(fp) + 2ffdc: 10c00d17 ldw r3,52(r2) + 2ffe0: e0bffb17 ldw r2,-20(fp) + 2ffe4: 10800c17 ldw r2,48(r2) + 2ffe8: 18bfe51e bne r3,r2,2ff80 <_gp+0xffff3a48> ALT_FLAG_POST (sp->events, ALT_JTAG_UART_WRITE_RDY, OS_FLAG_SET); space--; } if (space > 0) - 30910: e0bffa17 ldw r2,-24(fp) - 30914: 103f9d26 beq r2,zero,3078c + 2ffec: e0bffa17 ldw r2,-24(fp) + 2fff0: 103f9d26 beq r2,zero,2fe68 <_gp+0xffff3930> { /* If we don't have any more data available then turn off the TX interrupt */ sp->irq_enable &= ~ALTERA_AVALON_JTAG_UART_CONTROL_WE_MSK; - 30918: e0bffb17 ldw r2,-20(fp) - 3091c: 10c00817 ldw r3,32(r2) - 30920: 00bfff44 movi r2,-3 - 30924: 1886703a and r3,r3,r2 - 30928: e0bffb17 ldw r2,-20(fp) - 3092c: 10c00815 stw r3,32(r2) + 2fff4: e0bffb17 ldw r2,-20(fp) + 2fff8: 10c00817 ldw r3,32(r2) + 2fffc: 00bfff44 movi r2,-3 + 30000: 1886703a and r3,r3,r2 + 30004: e0bffb17 ldw r2,-20(fp) + 30008: 10c00815 stw r3,32(r2) IOWR_ALTERA_AVALON_JTAG_UART_CONTROL(sp->base, sp->irq_enable); - 30930: e0bffb17 ldw r2,-20(fp) - 30934: 10800017 ldw r2,0(r2) - 30938: 10800104 addi r2,r2,4 - 3093c: 1007883a mov r3,r2 - 30940: e0bffb17 ldw r2,-20(fp) - 30944: 10800817 ldw r2,32(r2) - 30948: 18800035 stwio r2,0(r3) + 3000c: e0bffb17 ldw r2,-20(fp) + 30010: 10800017 ldw r2,0(r2) + 30014: 10800104 addi r2,r2,4 + 30018: 1007883a mov r3,r2 + 3001c: e0bffb17 ldw r2,-20(fp) + 30020: 10800817 ldw r2,32(r2) + 30024: 18800035 stwio r2,0(r3) /* Dummy read to ensure IRQ is cleared prior to ISR completion */ IORD_ALTERA_AVALON_JTAG_UART_CONTROL(base); - 3094c: e0bffc17 ldw r2,-16(fp) - 30950: 10800104 addi r2,r2,4 - 30954: 10800037 ldwio r2,0(r2) + 30028: e0bffc17 ldw r2,-16(fp) + 3002c: 10800104 addi r2,r2,4 + 30030: 10800037 ldwio r2,0(r2) } } } - 30958: 003f8c06 br 3078c + 30034: 003f8c06 br 2fe68 <_gp+0xffff3930> { unsigned int control = IORD_ALTERA_AVALON_JTAG_UART_CONTROL(base); /* Return once nothing more to do */ if ((control & (ALTERA_AVALON_JTAG_UART_CONTROL_RI_MSK | ALTERA_AVALON_JTAG_UART_CONTROL_WI_MSK)) == 0) break; - 3095c: 0001883a nop + 30038: 0001883a nop /* Dummy read to ensure IRQ is cleared prior to ISR completion */ IORD_ALTERA_AVALON_JTAG_UART_CONTROL(base); } } } } - 30960: 0001883a nop - 30964: e037883a mov sp,fp - 30968: df000017 ldw fp,0(sp) - 3096c: dec00104 addi sp,sp,4 - 30970: f800283a ret + 3003c: 0001883a nop + 30040: e037883a mov sp,fp + 30044: df000017 ldw fp,0(sp) + 30048: dec00104 addi sp,sp,4 + 3004c: f800283a ret -00030974 : +00030050 : * Timeout routine is called every second */ static alt_u32 altera_avalon_jtag_uart_timeout(void* context) { - 30974: defff804 addi sp,sp,-32 - 30978: df000715 stw fp,28(sp) - 3097c: df000704 addi fp,sp,28 - 30980: e13ffb15 stw r4,-20(fp) + 30050: defff804 addi sp,sp,-32 + 30054: df000715 stw fp,28(sp) + 30058: df000704 addi fp,sp,28 + 3005c: e13ffb15 stw r4,-20(fp) altera_avalon_jtag_uart_state* sp = (altera_avalon_jtag_uart_state *) context; - 30984: e0bffb17 ldw r2,-20(fp) - 30988: e0bff915 stw r2,-28(fp) + 30060: e0bffb17 ldw r2,-20(fp) + 30064: e0bff915 stw r2,-28(fp) unsigned int control = IORD_ALTERA_AVALON_JTAG_UART_CONTROL(sp->base); - 3098c: e0bff917 ldw r2,-28(fp) - 30990: 10800017 ldw r2,0(r2) - 30994: 10800104 addi r2,r2,4 - 30998: 10800037 ldwio r2,0(r2) - 3099c: e0bffa15 stw r2,-24(fp) + 30068: e0bff917 ldw r2,-28(fp) + 3006c: 10800017 ldw r2,0(r2) + 30070: 10800104 addi r2,r2,4 + 30074: 10800037 ldwio r2,0(r2) + 30078: e0bffa15 stw r2,-24(fp) if (control & ALTERA_AVALON_JTAG_UART_CONTROL_AC_MSK) - 309a0: e0bffa17 ldw r2,-24(fp) - 309a4: 1081000c andi r2,r2,1024 - 309a8: 10000b26 beq r2,zero,309d8 + 3007c: e0bffa17 ldw r2,-24(fp) + 30080: 1081000c andi r2,r2,1024 + 30084: 10000b26 beq r2,zero,300b4 { IOWR_ALTERA_AVALON_JTAG_UART_CONTROL(sp->base, sp->irq_enable | ALTERA_AVALON_JTAG_UART_CONTROL_AC_MSK); - 309ac: e0bff917 ldw r2,-28(fp) - 309b0: 10800017 ldw r2,0(r2) - 309b4: 10800104 addi r2,r2,4 - 309b8: 1007883a mov r3,r2 - 309bc: e0bff917 ldw r2,-28(fp) - 309c0: 10800817 ldw r2,32(r2) - 309c4: 10810014 ori r2,r2,1024 - 309c8: 18800035 stwio r2,0(r3) + 30088: e0bff917 ldw r2,-28(fp) + 3008c: 10800017 ldw r2,0(r2) + 30090: 10800104 addi r2,r2,4 + 30094: 1007883a mov r3,r2 + 30098: e0bff917 ldw r2,-28(fp) + 3009c: 10800817 ldw r2,32(r2) + 300a0: 10810014 ori r2,r2,1024 + 300a4: 18800035 stwio r2,0(r3) sp->host_inactive = 0; - 309cc: e0bff917 ldw r2,-28(fp) - 309d0: 10000915 stw zero,36(r2) - 309d4: 00000a06 br 30a00 + 300a8: e0bff917 ldw r2,-28(fp) + 300ac: 10000915 stw zero,36(r2) + 300b0: 00000a06 br 300dc } else if (sp->host_inactive < INT_MAX - 2) { - 309d8: e0bff917 ldw r2,-28(fp) - 309dc: 10c00917 ldw r3,36(r2) - 309e0: 00a00034 movhi r2,32768 - 309e4: 10bfff04 addi r2,r2,-4 - 309e8: 10c00536 bltu r2,r3,30a00 + 300b4: e0bff917 ldw r2,-28(fp) + 300b8: 10c00917 ldw r3,36(r2) + 300bc: 00a00034 movhi r2,32768 + 300c0: 10bfff04 addi r2,r2,-4 + 300c4: 10c00536 bltu r2,r3,300dc sp->host_inactive++; - 309ec: e0bff917 ldw r2,-28(fp) - 309f0: 10800917 ldw r2,36(r2) - 309f4: 10c00044 addi r3,r2,1 - 309f8: e0bff917 ldw r2,-28(fp) - 309fc: 10c00915 stw r3,36(r2) - 30a00: 008000f4 movhi r2,3 - 30a04: 109c6004 addi r2,r2,29056 - 30a08: 10800017 ldw r2,0(r2) + 300c8: e0bff917 ldw r2,-28(fp) + 300cc: 10800917 ldw r2,36(r2) + 300d0: 10c00044 addi r3,r2,1 + 300d4: e0bff917 ldw r2,-28(fp) + 300d8: 10c00915 stw r3,36(r2) + 300dc: 008000f4 movhi r2,3 + 300e0: 109a1304 addi r2,r2,26700 + 300e4: 10800017 ldw r2,0(r2) ALT_FLAG_POST (sp->events, ALT_JTAG_UART_TIMEOUT, OS_FLAG_SET); } } return alt_ticks_per_second(); } - 30a0c: e037883a mov sp,fp - 30a10: df000017 ldw fp,0(sp) - 30a14: dec00104 addi sp,sp,4 - 30a18: f800283a ret + 300e8: e037883a mov sp,fp + 300ec: df000017 ldw fp,0(sp) + 300f0: dec00104 addi sp,sp,4 + 300f4: f800283a ret -00030a1c : +000300f8 : * The close routine is not implemented for the small driver; instead it will * map to null. This is because the small driver simply waits while characters * are transmitted; there is no interrupt-serviced buffer to empty */ int altera_avalon_jtag_uart_close(altera_avalon_jtag_uart_state* sp, int flags) { - 30a1c: defffd04 addi sp,sp,-12 - 30a20: df000215 stw fp,8(sp) - 30a24: df000204 addi fp,sp,8 - 30a28: e13ffe15 stw r4,-8(fp) - 30a2c: e17fff15 stw r5,-4(fp) + 300f8: defffd04 addi sp,sp,-12 + 300fc: df000215 stw fp,8(sp) + 30100: df000204 addi fp,sp,8 + 30104: e13ffe15 stw r4,-8(fp) + 30108: e17fff15 stw r5,-4(fp) /* * Wait for all transmit data to be emptied by the JTAG UART ISR, or * for a host-inactivity timeout, in which case transmit data will be lost */ while ( (sp->tx_out != sp->tx_in) && (sp->host_inactive < sp->timeout) ) { - 30a30: 00000506 br 30a48 + 3010c: 00000506 br 30124 if (flags & O_NONBLOCK) { - 30a34: e0bfff17 ldw r2,-4(fp) - 30a38: 1090000c andi r2,r2,16384 - 30a3c: 10000226 beq r2,zero,30a48 + 30110: e0bfff17 ldw r2,-4(fp) + 30114: 1090000c andi r2,r2,16384 + 30118: 10000226 beq r2,zero,30124 return -EWOULDBLOCK; - 30a40: 00bffd44 movi r2,-11 - 30a44: 00000b06 br 30a74 + 3011c: 00bffd44 movi r2,-11 + 30120: 00000b06 br 30150 { /* * Wait for all transmit data to be emptied by the JTAG UART ISR, or * for a host-inactivity timeout, in which case transmit data will be lost */ while ( (sp->tx_out != sp->tx_in) && (sp->host_inactive < sp->timeout) ) { - 30a48: e0bffe17 ldw r2,-8(fp) - 30a4c: 10c00d17 ldw r3,52(r2) - 30a50: e0bffe17 ldw r2,-8(fp) - 30a54: 10800c17 ldw r2,48(r2) - 30a58: 18800526 beq r3,r2,30a70 - 30a5c: e0bffe17 ldw r2,-8(fp) - 30a60: 10c00917 ldw r3,36(r2) - 30a64: e0bffe17 ldw r2,-8(fp) - 30a68: 10800117 ldw r2,4(r2) - 30a6c: 18bff136 bltu r3,r2,30a34 + 30124: e0bffe17 ldw r2,-8(fp) + 30128: 10c00d17 ldw r3,52(r2) + 3012c: e0bffe17 ldw r2,-8(fp) + 30130: 10800c17 ldw r2,48(r2) + 30134: 18800526 beq r3,r2,3014c + 30138: e0bffe17 ldw r2,-8(fp) + 3013c: 10c00917 ldw r3,36(r2) + 30140: e0bffe17 ldw r2,-8(fp) + 30144: 10800117 ldw r2,4(r2) + 30148: 18bff136 bltu r3,r2,30110 <_gp+0xffff3bd8> if (flags & O_NONBLOCK) { return -EWOULDBLOCK; } } return 0; - 30a70: 0005883a mov r2,zero + 3014c: 0005883a mov r2,zero } - 30a74: e037883a mov sp,fp - 30a78: df000017 ldw fp,0(sp) - 30a7c: dec00104 addi sp,sp,4 - 30a80: f800283a ret + 30150: e037883a mov sp,fp + 30154: df000017 ldw fp,0(sp) + 30158: dec00104 addi sp,sp,4 + 3015c: f800283a ret -00030a84 : +00030160 : /* ----------------------------------------------------------- */ int altera_avalon_jtag_uart_ioctl(altera_avalon_jtag_uart_state* sp, int req, void* arg) { - 30a84: defffa04 addi sp,sp,-24 - 30a88: df000515 stw fp,20(sp) - 30a8c: df000504 addi fp,sp,20 - 30a90: e13ffd15 stw r4,-12(fp) - 30a94: e17ffe15 stw r5,-8(fp) - 30a98: e1bfff15 stw r6,-4(fp) + 30160: defffa04 addi sp,sp,-24 + 30164: df000515 stw fp,20(sp) + 30168: df000504 addi fp,sp,20 + 3016c: e13ffd15 stw r4,-12(fp) + 30170: e17ffe15 stw r5,-8(fp) + 30174: e1bfff15 stw r6,-4(fp) int rc = -ENOTTY; - 30a9c: 00bff9c4 movi r2,-25 - 30aa0: e0bffb15 stw r2,-20(fp) + 30178: 00bff9c4 movi r2,-25 + 3017c: e0bffb15 stw r2,-20(fp) switch (req) - 30aa4: e0bffe17 ldw r2,-8(fp) - 30aa8: 10da8060 cmpeqi r3,r2,27137 - 30aac: 1800031e bne r3,zero,30abc - 30ab0: 109a80a0 cmpeqi r2,r2,27138 - 30ab4: 1000181e bne r2,zero,30b18 + 30180: e0bffe17 ldw r2,-8(fp) + 30184: 10da8060 cmpeqi r3,r2,27137 + 30188: 1800031e bne r3,zero,30198 + 3018c: 109a80a0 cmpeqi r2,r2,27138 + 30190: 1000181e bne r2,zero,301f4 rc = 0; } break; default: break; - 30ab8: 00002906 br 30b60 + 30194: 00002906 br 3023c switch (req) { case TIOCSTIMEOUT: /* Set the time to wait until assuming host is not connected */ if (sp->timeout != INT_MAX) - 30abc: e0bffd17 ldw r2,-12(fp) - 30ac0: 10c00117 ldw r3,4(r2) - 30ac4: 00a00034 movhi r2,32768 - 30ac8: 10bfffc4 addi r2,r2,-1 - 30acc: 18802126 beq r3,r2,30b54 + 30198: e0bffd17 ldw r2,-12(fp) + 3019c: 10c00117 ldw r3,4(r2) + 301a0: 00a00034 movhi r2,32768 + 301a4: 10bfffc4 addi r2,r2,-1 + 301a8: 18802126 beq r3,r2,30230 { int timeout = *((int *)arg); - 30ad0: e0bfff17 ldw r2,-4(fp) - 30ad4: 10800017 ldw r2,0(r2) - 30ad8: e0bffc15 stw r2,-16(fp) + 301ac: e0bfff17 ldw r2,-4(fp) + 301b0: 10800017 ldw r2,0(r2) + 301b4: e0bffc15 stw r2,-16(fp) sp->timeout = (timeout >= 2 && timeout < INT_MAX) ? timeout : INT_MAX - 1; - 30adc: e0bffc17 ldw r2,-16(fp) - 30ae0: 10800090 cmplti r2,r2,2 - 30ae4: 1000061e bne r2,zero,30b00 - 30ae8: e0fffc17 ldw r3,-16(fp) - 30aec: 00a00034 movhi r2,32768 - 30af0: 10bfffc4 addi r2,r2,-1 - 30af4: 18800226 beq r3,r2,30b00 - 30af8: e0bffc17 ldw r2,-16(fp) - 30afc: 00000206 br 30b08 - 30b00: 00a00034 movhi r2,32768 - 30b04: 10bfff84 addi r2,r2,-2 - 30b08: e0fffd17 ldw r3,-12(fp) - 30b0c: 18800115 stw r2,4(r3) + 301b8: e0bffc17 ldw r2,-16(fp) + 301bc: 10800090 cmplti r2,r2,2 + 301c0: 1000061e bne r2,zero,301dc + 301c4: e0fffc17 ldw r3,-16(fp) + 301c8: 00a00034 movhi r2,32768 + 301cc: 10bfffc4 addi r2,r2,-1 + 301d0: 18800226 beq r3,r2,301dc + 301d4: e0bffc17 ldw r2,-16(fp) + 301d8: 00000206 br 301e4 + 301dc: 00a00034 movhi r2,32768 + 301e0: 10bfff84 addi r2,r2,-2 + 301e4: e0fffd17 ldw r3,-12(fp) + 301e8: 18800115 stw r2,4(r3) rc = 0; - 30b10: e03ffb15 stw zero,-20(fp) + 301ec: e03ffb15 stw zero,-20(fp) } break; - 30b14: 00000f06 br 30b54 + 301f0: 00000f06 br 30230 case TIOCGCONNECTED: /* Find out whether host is connected */ if (sp->timeout != INT_MAX) - 30b18: e0bffd17 ldw r2,-12(fp) - 30b1c: 10c00117 ldw r3,4(r2) - 30b20: 00a00034 movhi r2,32768 - 30b24: 10bfffc4 addi r2,r2,-1 - 30b28: 18800c26 beq r3,r2,30b5c + 301f4: e0bffd17 ldw r2,-12(fp) + 301f8: 10c00117 ldw r3,4(r2) + 301fc: 00a00034 movhi r2,32768 + 30200: 10bfffc4 addi r2,r2,-1 + 30204: 18800c26 beq r3,r2,30238 { *((int *)arg) = (sp->host_inactive < sp->timeout) ? 1 : 0; - 30b2c: e0bffd17 ldw r2,-12(fp) - 30b30: 10c00917 ldw r3,36(r2) - 30b34: e0bffd17 ldw r2,-12(fp) - 30b38: 10800117 ldw r2,4(r2) - 30b3c: 1885803a cmpltu r2,r3,r2 - 30b40: 10c03fcc andi r3,r2,255 - 30b44: e0bfff17 ldw r2,-4(fp) - 30b48: 10c00015 stw r3,0(r2) + 30208: e0bffd17 ldw r2,-12(fp) + 3020c: 10c00917 ldw r3,36(r2) + 30210: e0bffd17 ldw r2,-12(fp) + 30214: 10800117 ldw r2,4(r2) + 30218: 1885803a cmpltu r2,r3,r2 + 3021c: 10c03fcc andi r3,r2,255 + 30220: e0bfff17 ldw r2,-4(fp) + 30224: 10c00015 stw r3,0(r2) rc = 0; - 30b4c: e03ffb15 stw zero,-20(fp) + 30228: e03ffb15 stw zero,-20(fp) } break; - 30b50: 00000206 br 30b5c + 3022c: 00000206 br 30238 { int timeout = *((int *)arg); sp->timeout = (timeout >= 2 && timeout < INT_MAX) ? timeout : INT_MAX - 1; rc = 0; } break; - 30b54: 0001883a nop - 30b58: 00000106 br 30b60 + 30230: 0001883a nop + 30234: 00000106 br 3023c if (sp->timeout != INT_MAX) { *((int *)arg) = (sp->host_inactive < sp->timeout) ? 1 : 0; rc = 0; } break; - 30b5c: 0001883a nop + 30238: 0001883a nop default: break; } return rc; - 30b60: e0bffb17 ldw r2,-20(fp) + 3023c: e0bffb17 ldw r2,-20(fp) } - 30b64: e037883a mov sp,fp - 30b68: df000017 ldw fp,0(sp) - 30b6c: dec00104 addi sp,sp,4 - 30b70: f800283a ret + 30240: e037883a mov sp,fp + 30244: df000017 ldw fp,0(sp) + 30248: dec00104 addi sp,sp,4 + 3024c: f800283a ret -00030b74 : +00030250 : /* ----------------------------------------------------------- */ int altera_avalon_jtag_uart_read(altera_avalon_jtag_uart_state* sp, char * buffer, int space, int flags) { - 30b74: defff304 addi sp,sp,-52 - 30b78: dfc00c15 stw ra,48(sp) - 30b7c: df000b15 stw fp,44(sp) - 30b80: df000b04 addi fp,sp,44 - 30b84: e13ffc15 stw r4,-16(fp) - 30b88: e17ffd15 stw r5,-12(fp) - 30b8c: e1bffe15 stw r6,-8(fp) - 30b90: e1ffff15 stw r7,-4(fp) + 30250: defff304 addi sp,sp,-52 + 30254: dfc00c15 stw ra,48(sp) + 30258: df000b15 stw fp,44(sp) + 3025c: df000b04 addi fp,sp,44 + 30260: e13ffc15 stw r4,-16(fp) + 30264: e17ffd15 stw r5,-12(fp) + 30268: e1bffe15 stw r6,-8(fp) + 3026c: e1ffff15 stw r7,-4(fp) char * ptr = buffer; - 30b94: e0bffd17 ldw r2,-12(fp) - 30b98: e0bff515 stw r2,-44(fp) + 30270: e0bffd17 ldw r2,-12(fp) + 30274: e0bff515 stw r2,-44(fp) * When running in a multi threaded environment, obtain the "read_lock" * semaphore. This ensures that reading from the device is thread-safe. */ ALT_SEM_PEND (sp->read_lock, 0); while (space > 0) - 30b9c: 00004706 br 30cbc + 30278: 00004706 br 30398 unsigned int in, out; /* Read as much data as possible */ do { in = sp->rx_in; - 30ba0: e0bffc17 ldw r2,-16(fp) - 30ba4: 10800a17 ldw r2,40(r2) - 30ba8: e0bff715 stw r2,-36(fp) + 3027c: e0bffc17 ldw r2,-16(fp) + 30280: 10800a17 ldw r2,40(r2) + 30284: e0bff715 stw r2,-36(fp) out = sp->rx_out; - 30bac: e0bffc17 ldw r2,-16(fp) - 30bb0: 10800b17 ldw r2,44(r2) - 30bb4: e0bff815 stw r2,-32(fp) + 30288: e0bffc17 ldw r2,-16(fp) + 3028c: 10800b17 ldw r2,44(r2) + 30290: e0bff815 stw r2,-32(fp) if (in >= out) - 30bb8: e0fff717 ldw r3,-36(fp) - 30bbc: e0bff817 ldw r2,-32(fp) - 30bc0: 18800536 bltu r3,r2,30bd8 + 30294: e0fff717 ldw r3,-36(fp) + 30298: e0bff817 ldw r2,-32(fp) + 3029c: 18800536 bltu r3,r2,302b4 n = in - out; - 30bc4: e0fff717 ldw r3,-36(fp) - 30bc8: e0bff817 ldw r2,-32(fp) - 30bcc: 1885c83a sub r2,r3,r2 - 30bd0: e0bff615 stw r2,-40(fp) - 30bd4: 00000406 br 30be8 + 302a0: e0fff717 ldw r3,-36(fp) + 302a4: e0bff817 ldw r2,-32(fp) + 302a8: 1885c83a sub r2,r3,r2 + 302ac: e0bff615 stw r2,-40(fp) + 302b0: 00000406 br 302c4 else n = ALTERA_AVALON_JTAG_UART_BUF_LEN - out; - 30bd8: 00c20004 movi r3,2048 - 30bdc: e0bff817 ldw r2,-32(fp) - 30be0: 1885c83a sub r2,r3,r2 - 30be4: e0bff615 stw r2,-40(fp) + 302b4: 00c20004 movi r3,2048 + 302b8: e0bff817 ldw r2,-32(fp) + 302bc: 1885c83a sub r2,r3,r2 + 302c0: e0bff615 stw r2,-40(fp) if (n == 0) - 30be8: e0bff617 ldw r2,-40(fp) - 30bec: 10001e26 beq r2,zero,30c68 + 302c4: e0bff617 ldw r2,-40(fp) + 302c8: 10001e26 beq r2,zero,30344 break; /* No more data available */ if (n > space) - 30bf0: e0fffe17 ldw r3,-8(fp) - 30bf4: e0bff617 ldw r2,-40(fp) - 30bf8: 1880022e bgeu r3,r2,30c04 + 302cc: e0fffe17 ldw r3,-8(fp) + 302d0: e0bff617 ldw r2,-40(fp) + 302d4: 1880022e bgeu r3,r2,302e0 n = space; - 30bfc: e0bffe17 ldw r2,-8(fp) - 30c00: e0bff615 stw r2,-40(fp) + 302d8: e0bffe17 ldw r2,-8(fp) + 302dc: e0bff615 stw r2,-40(fp) memcpy(ptr, sp->rx_buf + out, n); - 30c04: e0bffc17 ldw r2,-16(fp) - 30c08: 10c00e04 addi r3,r2,56 - 30c0c: e0bff817 ldw r2,-32(fp) - 30c10: 1885883a add r2,r3,r2 - 30c14: e1bff617 ldw r6,-40(fp) - 30c18: 100b883a mov r5,r2 - 30c1c: e13ff517 ldw r4,-44(fp) - 30c20: 00288ec0 call 288ec + 302e0: e0bffc17 ldw r2,-16(fp) + 302e4: 10c00e04 addi r3,r2,56 + 302e8: e0bff817 ldw r2,-32(fp) + 302ec: 1885883a add r2,r3,r2 + 302f0: e1bff617 ldw r6,-40(fp) + 302f4: 100b883a mov r5,r2 + 302f8: e13ff517 ldw r4,-44(fp) + 302fc: 00283280 call 28328 ptr += n; - 30c24: e0fff517 ldw r3,-44(fp) - 30c28: e0bff617 ldw r2,-40(fp) - 30c2c: 1885883a add r2,r3,r2 - 30c30: e0bff515 stw r2,-44(fp) + 30300: e0fff517 ldw r3,-44(fp) + 30304: e0bff617 ldw r2,-40(fp) + 30308: 1885883a add r2,r3,r2 + 3030c: e0bff515 stw r2,-44(fp) space -= n; - 30c34: e0fffe17 ldw r3,-8(fp) - 30c38: e0bff617 ldw r2,-40(fp) - 30c3c: 1885c83a sub r2,r3,r2 - 30c40: e0bffe15 stw r2,-8(fp) + 30310: e0fffe17 ldw r3,-8(fp) + 30314: e0bff617 ldw r2,-40(fp) + 30318: 1885c83a sub r2,r3,r2 + 3031c: e0bffe15 stw r2,-8(fp) sp->rx_out = (out + n) % ALTERA_AVALON_JTAG_UART_BUF_LEN; - 30c44: e0fff817 ldw r3,-32(fp) - 30c48: e0bff617 ldw r2,-40(fp) - 30c4c: 1885883a add r2,r3,r2 - 30c50: 10c1ffcc andi r3,r2,2047 - 30c54: e0bffc17 ldw r2,-16(fp) - 30c58: 10c00b15 stw r3,44(r2) + 30320: e0fff817 ldw r3,-32(fp) + 30324: e0bff617 ldw r2,-40(fp) + 30328: 1885883a add r2,r3,r2 + 3032c: 10c1ffcc andi r3,r2,2047 + 30330: e0bffc17 ldw r2,-16(fp) + 30334: 10c00b15 stw r3,44(r2) } while (space > 0); - 30c5c: e0bffe17 ldw r2,-8(fp) - 30c60: 00bfcf16 blt zero,r2,30ba0 - 30c64: 00000106 br 30c6c + 30338: e0bffe17 ldw r2,-8(fp) + 3033c: 00bfcf16 blt zero,r2,3027c <_gp+0xffff3d44> + 30340: 00000106 br 30348 n = in - out; else n = ALTERA_AVALON_JTAG_UART_BUF_LEN - out; if (n == 0) break; /* No more data available */ - 30c68: 0001883a nop + 30344: 0001883a nop sp->rx_out = (out + n) % ALTERA_AVALON_JTAG_UART_BUF_LEN; } while (space > 0); /* If we read any data then return it */ if (ptr != buffer) - 30c6c: e0fff517 ldw r3,-44(fp) - 30c70: e0bffd17 ldw r2,-12(fp) - 30c74: 1880141e bne r3,r2,30cc8 + 30348: e0fff517 ldw r3,-44(fp) + 3034c: e0bffd17 ldw r2,-12(fp) + 30350: 1880141e bne r3,r2,303a4 break; /* If in non-blocking mode then return error */ if (flags & O_NONBLOCK) - 30c78: e0bfff17 ldw r2,-4(fp) - 30c7c: 1090000c andi r2,r2,16384 - 30c80: 1000131e bne r2,zero,30cd0 + 30354: e0bfff17 ldw r2,-4(fp) + 30358: 1090000c andi r2,r2,16384 + 3035c: 1000131e bne r2,zero,303ac while (in == sp->rx_in && sp->host_inactive < sp->timeout) ; } #else /* No OS: Always spin */ while (in == sp->rx_in && sp->host_inactive < sp->timeout) - 30c84: 0001883a nop - 30c88: e0bffc17 ldw r2,-16(fp) - 30c8c: 10c00a17 ldw r3,40(r2) - 30c90: e0bff717 ldw r2,-36(fp) - 30c94: 1880051e bne r3,r2,30cac - 30c98: e0bffc17 ldw r2,-16(fp) - 30c9c: 10c00917 ldw r3,36(r2) - 30ca0: e0bffc17 ldw r2,-16(fp) - 30ca4: 10800117 ldw r2,4(r2) - 30ca8: 18bff736 bltu r3,r2,30c88 + 30360: 0001883a nop + 30364: e0bffc17 ldw r2,-16(fp) + 30368: 10c00a17 ldw r3,40(r2) + 3036c: e0bff717 ldw r2,-36(fp) + 30370: 1880051e bne r3,r2,30388 + 30374: e0bffc17 ldw r2,-16(fp) + 30378: 10c00917 ldw r3,36(r2) + 3037c: e0bffc17 ldw r2,-16(fp) + 30380: 10800117 ldw r2,4(r2) + 30384: 18bff736 bltu r3,r2,30364 <_gp+0xffff3e2c> ; #endif /* __ucosii__ */ if (in == sp->rx_in) - 30cac: e0bffc17 ldw r2,-16(fp) - 30cb0: 10c00a17 ldw r3,40(r2) - 30cb4: e0bff717 ldw r2,-36(fp) - 30cb8: 18800726 beq r3,r2,30cd8 + 30388: e0bffc17 ldw r2,-16(fp) + 3038c: 10c00a17 ldw r3,40(r2) + 30390: e0bff717 ldw r2,-36(fp) + 30394: 18800726 beq r3,r2,303b4 * When running in a multi threaded environment, obtain the "read_lock" * semaphore. This ensures that reading from the device is thread-safe. */ ALT_SEM_PEND (sp->read_lock, 0); while (space > 0) - 30cbc: e0bffe17 ldw r2,-8(fp) - 30cc0: 00bfb716 blt zero,r2,30ba0 - 30cc4: 00000506 br 30cdc + 30398: e0bffe17 ldw r2,-8(fp) + 3039c: 00bfb716 blt zero,r2,3027c <_gp+0xffff3d44> + 303a0: 00000506 br 303b8 } while (space > 0); /* If we read any data then return it */ if (ptr != buffer) break; - 30cc8: 0001883a nop - 30ccc: 00000306 br 30cdc + 303a4: 0001883a nop + 303a8: 00000306 br 303b8 /* If in non-blocking mode then return error */ if (flags & O_NONBLOCK) break; - 30cd0: 0001883a nop - 30cd4: 00000106 br 30cdc + 303ac: 0001883a nop + 303b0: 00000106 br 303b8 while (in == sp->rx_in && sp->host_inactive < sp->timeout) ; #endif /* __ucosii__ */ if (in == sp->rx_in) break; - 30cd8: 0001883a nop + 303b4: 0001883a nop * semaphore so that other threads can access the buffer. */ ALT_SEM_POST (sp->read_lock); if (ptr != buffer) - 30cdc: e0fff517 ldw r3,-44(fp) - 30ce0: e0bffd17 ldw r2,-12(fp) - 30ce4: 18801826 beq r3,r2,30d48 + 303b8: e0fff517 ldw r3,-44(fp) + 303bc: e0bffd17 ldw r2,-12(fp) + 303c0: 18801826 beq r3,r2,30424 static ALT_INLINE alt_irq_context ALT_ALWAYS_INLINE alt_irq_disable_all (void) { alt_irq_context context; NIOS2_READ_STATUS (context); - 30ce8: 0005303a rdctl r2,status - 30cec: e0bffb15 stw r2,-20(fp) + 303c4: 0005303a rdctl r2,status + 303c8: e0bffb15 stw r2,-20(fp) NIOS2_WRITE_STATUS (context & ~NIOS2_STATUS_PIE_MSK); - 30cf0: e0fffb17 ldw r3,-20(fp) - 30cf4: 00bfff84 movi r2,-2 - 30cf8: 1884703a and r2,r3,r2 - 30cfc: 1001703a wrctl status,r2 + 303cc: e0fffb17 ldw r3,-20(fp) + 303d0: 00bfff84 movi r2,-2 + 303d4: 1884703a and r2,r3,r2 + 303d8: 1001703a wrctl status,r2 return context; - 30d00: e0bffb17 ldw r2,-20(fp) + 303dc: e0bffb17 ldw r2,-20(fp) { /* If we read any data then there is space in the buffer so enable interrupts */ context = alt_irq_disable_all(); - 30d04: e0bffa15 stw r2,-24(fp) + 303e0: e0bffa15 stw r2,-24(fp) sp->irq_enable |= ALTERA_AVALON_JTAG_UART_CONTROL_RE_MSK; - 30d08: e0bffc17 ldw r2,-16(fp) - 30d0c: 10800817 ldw r2,32(r2) - 30d10: 10c00054 ori r3,r2,1 - 30d14: e0bffc17 ldw r2,-16(fp) - 30d18: 10c00815 stw r3,32(r2) + 303e4: e0bffc17 ldw r2,-16(fp) + 303e8: 10800817 ldw r2,32(r2) + 303ec: 10c00054 ori r3,r2,1 + 303f0: e0bffc17 ldw r2,-16(fp) + 303f4: 10c00815 stw r3,32(r2) IOWR_ALTERA_AVALON_JTAG_UART_CONTROL(sp->base, sp->irq_enable); - 30d1c: e0bffc17 ldw r2,-16(fp) - 30d20: 10800017 ldw r2,0(r2) - 30d24: 10800104 addi r2,r2,4 - 30d28: 1007883a mov r3,r2 - 30d2c: e0bffc17 ldw r2,-16(fp) - 30d30: 10800817 ldw r2,32(r2) - 30d34: 18800035 stwio r2,0(r3) - 30d38: e0bffa17 ldw r2,-24(fp) - 30d3c: e0bff915 stw r2,-28(fp) + 303f8: e0bffc17 ldw r2,-16(fp) + 303fc: 10800017 ldw r2,0(r2) + 30400: 10800104 addi r2,r2,4 + 30404: 1007883a mov r3,r2 + 30408: e0bffc17 ldw r2,-16(fp) + 3040c: 10800817 ldw r2,32(r2) + 30410: 18800035 stwio r2,0(r3) + 30414: e0bffa17 ldw r2,-24(fp) + 30418: e0bff915 stw r2,-28(fp) status &= ~NIOS2_STATUS_PIE_MSK; status |= (context & NIOS2_STATUS_PIE_MSK); NIOS2_WRITE_STATUS (status); #else NIOS2_WRITE_STATUS (context); - 30d40: e0bff917 ldw r2,-28(fp) - 30d44: 1001703a wrctl status,r2 + 3041c: e0bff917 ldw r2,-28(fp) + 30420: 1001703a wrctl status,r2 alt_irq_enable_all(context); } if (ptr != buffer) - 30d48: e0fff517 ldw r3,-44(fp) - 30d4c: e0bffd17 ldw r2,-12(fp) - 30d50: 18800426 beq r3,r2,30d64 + 30424: e0fff517 ldw r3,-44(fp) + 30428: e0bffd17 ldw r2,-12(fp) + 3042c: 18800426 beq r3,r2,30440 return ptr - buffer; - 30d54: e0fff517 ldw r3,-44(fp) - 30d58: e0bffd17 ldw r2,-12(fp) - 30d5c: 1885c83a sub r2,r3,r2 - 30d60: 00000606 br 30d7c + 30430: e0fff517 ldw r3,-44(fp) + 30434: e0bffd17 ldw r2,-12(fp) + 30438: 1885c83a sub r2,r3,r2 + 3043c: 00000606 br 30458 else if (flags & O_NONBLOCK) - 30d64: e0bfff17 ldw r2,-4(fp) - 30d68: 1090000c andi r2,r2,16384 - 30d6c: 10000226 beq r2,zero,30d78 + 30440: e0bfff17 ldw r2,-4(fp) + 30444: 1090000c andi r2,r2,16384 + 30448: 10000226 beq r2,zero,30454 return -EWOULDBLOCK; - 30d70: 00bffd44 movi r2,-11 - 30d74: 00000106 br 30d7c + 3044c: 00bffd44 movi r2,-11 + 30450: 00000106 br 30458 else return -EIO; - 30d78: 00bffec4 movi r2,-5 + 30454: 00bffec4 movi r2,-5 } - 30d7c: e037883a mov sp,fp - 30d80: dfc00117 ldw ra,4(sp) - 30d84: df000017 ldw fp,0(sp) - 30d88: dec00204 addi sp,sp,8 - 30d8c: f800283a ret + 30458: e037883a mov sp,fp + 3045c: dfc00117 ldw ra,4(sp) + 30460: df000017 ldw fp,0(sp) + 30464: dec00204 addi sp,sp,8 + 30468: f800283a ret -00030d90 : +0003046c : /* ----------------------------------------------------------- */ int altera_avalon_jtag_uart_write(altera_avalon_jtag_uart_state* sp, const char * ptr, int count, int flags) { - 30d90: defff304 addi sp,sp,-52 - 30d94: dfc00c15 stw ra,48(sp) - 30d98: df000b15 stw fp,44(sp) - 30d9c: df000b04 addi fp,sp,44 - 30da0: e13ffc15 stw r4,-16(fp) - 30da4: e17ffd15 stw r5,-12(fp) - 30da8: e1bffe15 stw r6,-8(fp) - 30dac: e1ffff15 stw r7,-4(fp) + 3046c: defff304 addi sp,sp,-52 + 30470: dfc00c15 stw ra,48(sp) + 30474: df000b15 stw fp,44(sp) + 30478: df000b04 addi fp,sp,44 + 3047c: e13ffc15 stw r4,-16(fp) + 30480: e17ffd15 stw r5,-12(fp) + 30484: e1bffe15 stw r6,-8(fp) + 30488: e1ffff15 stw r7,-4(fp) /* Remove warning at optimisation level 03 by seting out to 0 */ unsigned int in, out=0; - 30db0: e03ff515 stw zero,-44(fp) + 3048c: e03ff515 stw zero,-44(fp) unsigned int n; alt_irq_context context; const char * start = ptr; - 30db4: e0bffd17 ldw r2,-12(fp) - 30db8: e0bff715 stw r2,-36(fp) + 30490: e0bffd17 ldw r2,-12(fp) + 30494: e0bff715 stw r2,-36(fp) ALT_SEM_PEND (sp->write_lock, 0); do { /* Copy as much as we can into the transmit buffer */ while (count > 0) - 30dbc: 00003706 br 30e9c + 30498: 00003706 br 30578 { /* We need a stable value of the out pointer to calculate the space available */ in = sp->tx_in; - 30dc0: e0bffc17 ldw r2,-16(fp) - 30dc4: 10800c17 ldw r2,48(r2) - 30dc8: e0bff915 stw r2,-28(fp) + 3049c: e0bffc17 ldw r2,-16(fp) + 304a0: 10800c17 ldw r2,48(r2) + 304a4: e0bff915 stw r2,-28(fp) out = sp->tx_out; - 30dcc: e0bffc17 ldw r2,-16(fp) - 30dd0: 10800d17 ldw r2,52(r2) - 30dd4: e0bff515 stw r2,-44(fp) + 304a8: e0bffc17 ldw r2,-16(fp) + 304ac: 10800d17 ldw r2,52(r2) + 304b0: e0bff515 stw r2,-44(fp) if (in < out) - 30dd8: e0fff917 ldw r3,-28(fp) - 30ddc: e0bff517 ldw r2,-44(fp) - 30de0: 1880062e bgeu r3,r2,30dfc + 304b4: e0fff917 ldw r3,-28(fp) + 304b8: e0bff517 ldw r2,-44(fp) + 304bc: 1880062e bgeu r3,r2,304d8 n = out - 1 - in; - 30de4: e0fff517 ldw r3,-44(fp) - 30de8: e0bff917 ldw r2,-28(fp) - 30dec: 1885c83a sub r2,r3,r2 - 30df0: 10bfffc4 addi r2,r2,-1 - 30df4: e0bff615 stw r2,-40(fp) - 30df8: 00000b06 br 30e28 + 304c0: e0fff517 ldw r3,-44(fp) + 304c4: e0bff917 ldw r2,-28(fp) + 304c8: 1885c83a sub r2,r3,r2 + 304cc: 10bfffc4 addi r2,r2,-1 + 304d0: e0bff615 stw r2,-40(fp) + 304d4: 00000b06 br 30504 else if (out > 0) - 30dfc: e0bff517 ldw r2,-44(fp) - 30e00: 10000526 beq r2,zero,30e18 + 304d8: e0bff517 ldw r2,-44(fp) + 304dc: 10000526 beq r2,zero,304f4 n = ALTERA_AVALON_JTAG_UART_BUF_LEN - in; - 30e04: 00c20004 movi r3,2048 - 30e08: e0bff917 ldw r2,-28(fp) - 30e0c: 1885c83a sub r2,r3,r2 - 30e10: e0bff615 stw r2,-40(fp) - 30e14: 00000406 br 30e28 + 304e0: 00c20004 movi r3,2048 + 304e4: e0bff917 ldw r2,-28(fp) + 304e8: 1885c83a sub r2,r3,r2 + 304ec: e0bff615 stw r2,-40(fp) + 304f0: 00000406 br 30504 else n = ALTERA_AVALON_JTAG_UART_BUF_LEN - 1 - in; - 30e18: 00c1ffc4 movi r3,2047 - 30e1c: e0bff917 ldw r2,-28(fp) - 30e20: 1885c83a sub r2,r3,r2 - 30e24: e0bff615 stw r2,-40(fp) + 304f4: 00c1ffc4 movi r3,2047 + 304f8: e0bff917 ldw r2,-28(fp) + 304fc: 1885c83a sub r2,r3,r2 + 30500: e0bff615 stw r2,-40(fp) if (n == 0) - 30e28: e0bff617 ldw r2,-40(fp) - 30e2c: 10001e26 beq r2,zero,30ea8 + 30504: e0bff617 ldw r2,-40(fp) + 30508: 10001e26 beq r2,zero,30584 break; if (n > count) - 30e30: e0fffe17 ldw r3,-8(fp) - 30e34: e0bff617 ldw r2,-40(fp) - 30e38: 1880022e bgeu r3,r2,30e44 + 3050c: e0fffe17 ldw r3,-8(fp) + 30510: e0bff617 ldw r2,-40(fp) + 30514: 1880022e bgeu r3,r2,30520 n = count; - 30e3c: e0bffe17 ldw r2,-8(fp) - 30e40: e0bff615 stw r2,-40(fp) + 30518: e0bffe17 ldw r2,-8(fp) + 3051c: e0bff615 stw r2,-40(fp) memcpy(sp->tx_buf + in, ptr, n); - 30e44: e0bffc17 ldw r2,-16(fp) - 30e48: 10c20e04 addi r3,r2,2104 - 30e4c: e0bff917 ldw r2,-28(fp) - 30e50: 1885883a add r2,r3,r2 - 30e54: e1bff617 ldw r6,-40(fp) - 30e58: e17ffd17 ldw r5,-12(fp) - 30e5c: 1009883a mov r4,r2 - 30e60: 00288ec0 call 288ec + 30520: e0bffc17 ldw r2,-16(fp) + 30524: 10c20e04 addi r3,r2,2104 + 30528: e0bff917 ldw r2,-28(fp) + 3052c: 1885883a add r2,r3,r2 + 30530: e1bff617 ldw r6,-40(fp) + 30534: e17ffd17 ldw r5,-12(fp) + 30538: 1009883a mov r4,r2 + 3053c: 00283280 call 28328 ptr += n; - 30e64: e0fffd17 ldw r3,-12(fp) - 30e68: e0bff617 ldw r2,-40(fp) - 30e6c: 1885883a add r2,r3,r2 - 30e70: e0bffd15 stw r2,-12(fp) + 30540: e0fffd17 ldw r3,-12(fp) + 30544: e0bff617 ldw r2,-40(fp) + 30548: 1885883a add r2,r3,r2 + 3054c: e0bffd15 stw r2,-12(fp) count -= n; - 30e74: e0fffe17 ldw r3,-8(fp) - 30e78: e0bff617 ldw r2,-40(fp) - 30e7c: 1885c83a sub r2,r3,r2 - 30e80: e0bffe15 stw r2,-8(fp) + 30550: e0fffe17 ldw r3,-8(fp) + 30554: e0bff617 ldw r2,-40(fp) + 30558: 1885c83a sub r2,r3,r2 + 3055c: e0bffe15 stw r2,-8(fp) sp->tx_in = (in + n) % ALTERA_AVALON_JTAG_UART_BUF_LEN; - 30e84: e0fff917 ldw r3,-28(fp) - 30e88: e0bff617 ldw r2,-40(fp) - 30e8c: 1885883a add r2,r3,r2 - 30e90: 10c1ffcc andi r3,r2,2047 - 30e94: e0bffc17 ldw r2,-16(fp) - 30e98: 10c00c15 stw r3,48(r2) + 30560: e0fff917 ldw r3,-28(fp) + 30564: e0bff617 ldw r2,-40(fp) + 30568: 1885883a add r2,r3,r2 + 3056c: 10c1ffcc andi r3,r2,2047 + 30570: e0bffc17 ldw r2,-16(fp) + 30574: 10c00c15 stw r3,48(r2) ALT_SEM_PEND (sp->write_lock, 0); do { /* Copy as much as we can into the transmit buffer */ while (count > 0) - 30e9c: e0bffe17 ldw r2,-8(fp) - 30ea0: 00bfc716 blt zero,r2,30dc0 - 30ea4: 00000106 br 30eac + 30578: e0bffe17 ldw r2,-8(fp) + 3057c: 00bfc716 blt zero,r2,3049c <_gp+0xffff3f64> + 30580: 00000106 br 30588 n = ALTERA_AVALON_JTAG_UART_BUF_LEN - in; else n = ALTERA_AVALON_JTAG_UART_BUF_LEN - 1 - in; if (n == 0) break; - 30ea8: 0001883a nop + 30584: 0001883a nop static ALT_INLINE alt_irq_context ALT_ALWAYS_INLINE alt_irq_disable_all (void) { alt_irq_context context; NIOS2_READ_STATUS (context); - 30eac: 0005303a rdctl r2,status - 30eb0: e0bffb15 stw r2,-20(fp) + 30588: 0005303a rdctl r2,status + 3058c: e0bffb15 stw r2,-20(fp) NIOS2_WRITE_STATUS (context & ~NIOS2_STATUS_PIE_MSK); - 30eb4: e0fffb17 ldw r3,-20(fp) - 30eb8: 00bfff84 movi r2,-2 - 30ebc: 1884703a and r2,r3,r2 - 30ec0: 1001703a wrctl status,r2 + 30590: e0fffb17 ldw r3,-20(fp) + 30594: 00bfff84 movi r2,-2 + 30598: 1884703a and r2,r3,r2 + 3059c: 1001703a wrctl status,r2 return context; - 30ec4: e0bffb17 ldw r2,-20(fp) + 305a0: e0bffb17 ldw r2,-20(fp) * to enable interrupts if there is no space left in the FIFO * * For now kick the interrupt routine every time to make it transmit * the data */ context = alt_irq_disable_all(); - 30ec8: e0bffa15 stw r2,-24(fp) + 305a4: e0bffa15 stw r2,-24(fp) sp->irq_enable |= ALTERA_AVALON_JTAG_UART_CONTROL_WE_MSK; - 30ecc: e0bffc17 ldw r2,-16(fp) - 30ed0: 10800817 ldw r2,32(r2) - 30ed4: 10c00094 ori r3,r2,2 - 30ed8: e0bffc17 ldw r2,-16(fp) - 30edc: 10c00815 stw r3,32(r2) + 305a8: e0bffc17 ldw r2,-16(fp) + 305ac: 10800817 ldw r2,32(r2) + 305b0: 10c00094 ori r3,r2,2 + 305b4: e0bffc17 ldw r2,-16(fp) + 305b8: 10c00815 stw r3,32(r2) IOWR_ALTERA_AVALON_JTAG_UART_CONTROL(sp->base, sp->irq_enable); - 30ee0: e0bffc17 ldw r2,-16(fp) - 30ee4: 10800017 ldw r2,0(r2) - 30ee8: 10800104 addi r2,r2,4 - 30eec: 1007883a mov r3,r2 - 30ef0: e0bffc17 ldw r2,-16(fp) - 30ef4: 10800817 ldw r2,32(r2) - 30ef8: 18800035 stwio r2,0(r3) - 30efc: e0bffa17 ldw r2,-24(fp) - 30f00: e0bff815 stw r2,-32(fp) + 305bc: e0bffc17 ldw r2,-16(fp) + 305c0: 10800017 ldw r2,0(r2) + 305c4: 10800104 addi r2,r2,4 + 305c8: 1007883a mov r3,r2 + 305cc: e0bffc17 ldw r2,-16(fp) + 305d0: 10800817 ldw r2,32(r2) + 305d4: 18800035 stwio r2,0(r3) + 305d8: e0bffa17 ldw r2,-24(fp) + 305dc: e0bff815 stw r2,-32(fp) status &= ~NIOS2_STATUS_PIE_MSK; status |= (context & NIOS2_STATUS_PIE_MSK); NIOS2_WRITE_STATUS (status); #else NIOS2_WRITE_STATUS (context); - 30f04: e0bff817 ldw r2,-32(fp) - 30f08: 1001703a wrctl status,r2 + 305e0: e0bff817 ldw r2,-32(fp) + 305e4: 1001703a wrctl status,r2 /* * If there is any data left then either return now or block until * some has been sent */ /* consider: test whether there is anything there while doing this and delay for at most 2s. */ if (count > 0) - 30f0c: e0bffe17 ldw r2,-8(fp) - 30f10: 0080100e bge zero,r2,30f54 + 305e8: e0bffe17 ldw r2,-8(fp) + 305ec: 0080100e bge zero,r2,30630 { if (flags & O_NONBLOCK) - 30f14: e0bfff17 ldw r2,-4(fp) - 30f18: 1090000c andi r2,r2,16384 - 30f1c: 1000101e bne r2,zero,30f60 + 305f0: e0bfff17 ldw r2,-4(fp) + 305f4: 1090000c andi r2,r2,16384 + 305f8: 1000101e bne r2,zero,3063c /* * No OS present: Always wait for data to be removed from buffer. Once * the interrupt routine has removed some data then we will be able to * insert some more. */ while (out == sp->tx_out && sp->host_inactive < sp->timeout) - 30f20: 0001883a nop - 30f24: e0bffc17 ldw r2,-16(fp) - 30f28: 10c00d17 ldw r3,52(r2) - 30f2c: e0bff517 ldw r2,-44(fp) - 30f30: 1880051e bne r3,r2,30f48 - 30f34: e0bffc17 ldw r2,-16(fp) - 30f38: 10c00917 ldw r3,36(r2) - 30f3c: e0bffc17 ldw r2,-16(fp) - 30f40: 10800117 ldw r2,4(r2) - 30f44: 18bff736 bltu r3,r2,30f24 + 305fc: 0001883a nop + 30600: e0bffc17 ldw r2,-16(fp) + 30604: 10c00d17 ldw r3,52(r2) + 30608: e0bff517 ldw r2,-44(fp) + 3060c: 1880051e bne r3,r2,30624 + 30610: e0bffc17 ldw r2,-16(fp) + 30614: 10c00917 ldw r3,36(r2) + 30618: e0bffc17 ldw r2,-16(fp) + 3061c: 10800117 ldw r2,4(r2) + 30620: 18bff736 bltu r3,r2,30600 <_gp+0xffff40c8> ; #endif /* __ucosii__ */ if (sp->host_inactive) - 30f48: e0bffc17 ldw r2,-16(fp) - 30f4c: 10800917 ldw r2,36(r2) - 30f50: 1000051e bne r2,zero,30f68 + 30624: e0bffc17 ldw r2,-16(fp) + 30628: 10800917 ldw r2,36(r2) + 3062c: 1000051e bne r2,zero,30644 break; } } while (count > 0); - 30f54: e0bffe17 ldw r2,-8(fp) - 30f58: 00bfd016 blt zero,r2,30e9c - 30f5c: 00000306 br 30f6c + 30630: e0bffe17 ldw r2,-8(fp) + 30634: 00bfd016 blt zero,r2,30578 <_gp+0xffff4040> + 30638: 00000306 br 30648 */ /* consider: test whether there is anything there while doing this and delay for at most 2s. */ if (count > 0) { if (flags & O_NONBLOCK) break; - 30f60: 0001883a nop - 30f64: 00000106 br 30f6c + 3063c: 0001883a nop + 30640: 00000106 br 30648 while (out == sp->tx_out && sp->host_inactive < sp->timeout) ; #endif /* __ucosii__ */ if (sp->host_inactive) break; - 30f68: 0001883a nop + 30644: 0001883a nop * Now that access to the circular buffer is complete, release the write * semaphore so that other threads can access the buffer. */ ALT_SEM_POST (sp->write_lock); if (ptr != start) - 30f6c: e0fffd17 ldw r3,-12(fp) - 30f70: e0bff717 ldw r2,-36(fp) - 30f74: 18800426 beq r3,r2,30f88 + 30648: e0fffd17 ldw r3,-12(fp) + 3064c: e0bff717 ldw r2,-36(fp) + 30650: 18800426 beq r3,r2,30664 return ptr - start; - 30f78: e0fffd17 ldw r3,-12(fp) - 30f7c: e0bff717 ldw r2,-36(fp) - 30f80: 1885c83a sub r2,r3,r2 - 30f84: 00000606 br 30fa0 + 30654: e0fffd17 ldw r3,-12(fp) + 30658: e0bff717 ldw r2,-36(fp) + 3065c: 1885c83a sub r2,r3,r2 + 30660: 00000606 br 3067c else if (flags & O_NONBLOCK) - 30f88: e0bfff17 ldw r2,-4(fp) - 30f8c: 1090000c andi r2,r2,16384 - 30f90: 10000226 beq r2,zero,30f9c + 30664: e0bfff17 ldw r2,-4(fp) + 30668: 1090000c andi r2,r2,16384 + 3066c: 10000226 beq r2,zero,30678 return -EWOULDBLOCK; - 30f94: 00bffd44 movi r2,-11 - 30f98: 00000106 br 30fa0 + 30670: 00bffd44 movi r2,-11 + 30674: 00000106 br 3067c sp->tx_out = sp->tx_in = 0; return ptr - start + count; } #endif else return -EIO; /* Host not connected */ - 30f9c: 00bffec4 movi r2,-5 + 30678: 00bffec4 movi r2,-5 } - 30fa0: e037883a mov sp,fp - 30fa4: dfc00117 ldw ra,4(sp) - 30fa8: df000017 ldw fp,0(sp) - 30fac: dec00204 addi sp,sp,8 - 30fb0: f800283a ret + 3067c: e037883a mov sp,fp + 30680: dfc00117 ldw ra,4(sp) + 30684: df000017 ldw fp,0(sp) + 30688: dec00204 addi sp,sp,8 + 3068c: f800283a ret -00030fb4 : +00030690 : #ifdef ALT_ENHANCED_INTERRUPT_API_PRESENT static void alt_avalon_timer_sc_irq (void* base) #else static void alt_avalon_timer_sc_irq (void* base, alt_u32 id) #endif { - 30fb4: defffa04 addi sp,sp,-24 - 30fb8: dfc00515 stw ra,20(sp) - 30fbc: df000415 stw fp,16(sp) - 30fc0: df000404 addi fp,sp,16 - 30fc4: e13fff15 stw r4,-4(fp) + 30690: defffa04 addi sp,sp,-24 + 30694: dfc00515 stw ra,20(sp) + 30698: df000415 stw fp,16(sp) + 3069c: df000404 addi fp,sp,16 + 306a0: e13fff15 stw r4,-4(fp) alt_irq_context cpu_sr; /* clear the interrupt */ IOWR_ALTERA_AVALON_TIMER_STATUS (base, 0); - 30fc8: 0007883a mov r3,zero - 30fcc: e0bfff17 ldw r2,-4(fp) - 30fd0: 10c00035 stwio r3,0(r2) + 306a4: 0007883a mov r3,zero + 306a8: e0bfff17 ldw r2,-4(fp) + 306ac: 10c00035 stwio r3,0(r2) /* * Dummy read to ensure IRQ is negated before the ISR returns. * The control register is read because reading the status * register has side-effects per the register map documentation. */ IORD_ALTERA_AVALON_TIMER_CONTROL (base); - 30fd4: e0bfff17 ldw r2,-4(fp) - 30fd8: 10800104 addi r2,r2,4 - 30fdc: 10800037 ldwio r2,0(r2) + 306b0: e0bfff17 ldw r2,-4(fp) + 306b4: 10800104 addi r2,r2,4 + 306b8: 10800037 ldwio r2,0(r2) static ALT_INLINE alt_irq_context ALT_ALWAYS_INLINE alt_irq_disable_all (void) { alt_irq_context context; NIOS2_READ_STATUS (context); - 30fe0: 0005303a rdctl r2,status - 30fe4: e0bffd15 stw r2,-12(fp) + 306bc: 0005303a rdctl r2,status + 306c0: e0bffd15 stw r2,-12(fp) NIOS2_WRITE_STATUS (context & ~NIOS2_STATUS_PIE_MSK); - 30fe8: e0fffd17 ldw r3,-12(fp) - 30fec: 00bfff84 movi r2,-2 - 30ff0: 1884703a and r2,r3,r2 - 30ff4: 1001703a wrctl status,r2 + 306c4: e0fffd17 ldw r3,-12(fp) + 306c8: 00bfff84 movi r2,-2 + 306cc: 1884703a and r2,r3,r2 + 306d0: 1001703a wrctl status,r2 return context; - 30ff8: e0bffd17 ldw r2,-12(fp) + 306d4: e0bffd17 ldw r2,-12(fp) /* * Notify the system of a clock tick. disable interrupts * during this time to safely support ISR preemption */ cpu_sr = alt_irq_disable_all(); - 30ffc: e0bffc15 stw r2,-16(fp) + 306d8: e0bffc15 stw r2,-16(fp) alt_tick (); - 31000: 00301e80 call 301e8 - 31004: e0bffc17 ldw r2,-16(fp) - 31008: e0bffe15 stw r2,-8(fp) + 306dc: 002f8c40 call 2f8c4 + 306e0: e0bffc17 ldw r2,-16(fp) + 306e4: e0bffe15 stw r2,-8(fp) status &= ~NIOS2_STATUS_PIE_MSK; status |= (context & NIOS2_STATUS_PIE_MSK); NIOS2_WRITE_STATUS (status); #else NIOS2_WRITE_STATUS (context); - 3100c: e0bffe17 ldw r2,-8(fp) - 31010: 1001703a wrctl status,r2 + 306e8: e0bffe17 ldw r2,-8(fp) + 306ec: 1001703a wrctl status,r2 alt_irq_enable_all(cpu_sr); } - 31014: 0001883a nop - 31018: e037883a mov sp,fp - 3101c: dfc00117 ldw ra,4(sp) - 31020: df000017 ldw fp,0(sp) - 31024: dec00204 addi sp,sp,8 - 31028: f800283a ret + 306f0: 0001883a nop + 306f4: e037883a mov sp,fp + 306f8: dfc00117 ldw ra,4(sp) + 306fc: df000017 ldw fp,0(sp) + 30700: dec00204 addi sp,sp,8 + 30704: f800283a ret -0003102c : +00030708 : * auto-generated alt_sys_init() function. */ void alt_avalon_timer_sc_init (void* base, alt_u32 irq_controller_id, alt_u32 irq, alt_u32 freq) { - 3102c: defff804 addi sp,sp,-32 - 31030: dfc00715 stw ra,28(sp) - 31034: df000615 stw fp,24(sp) - 31038: df000604 addi fp,sp,24 - 3103c: e13ffc15 stw r4,-16(fp) - 31040: e17ffd15 stw r5,-12(fp) - 31044: e1bffe15 stw r6,-8(fp) - 31048: e1ffff15 stw r7,-4(fp) - 3104c: e0bfff17 ldw r2,-4(fp) - 31050: e0bffb15 stw r2,-20(fp) + 30708: defff804 addi sp,sp,-32 + 3070c: dfc00715 stw ra,28(sp) + 30710: df000615 stw fp,24(sp) + 30714: df000604 addi fp,sp,24 + 30718: e13ffc15 stw r4,-16(fp) + 3071c: e17ffd15 stw r5,-12(fp) + 30720: e1bffe15 stw r6,-8(fp) + 30724: e1ffff15 stw r7,-4(fp) + 30728: e0bfff17 ldw r2,-4(fp) + 3072c: e0bffb15 stw r2,-20(fp) * in order to initialise the value of the clock frequency. */ static ALT_INLINE int ALT_ALWAYS_INLINE alt_sysclk_init (alt_u32 nticks) { if (! _alt_tick_rate) - 31054: 008000f4 movhi r2,3 - 31058: 109c6004 addi r2,r2,29056 - 3105c: 10800017 ldw r2,0(r2) - 31060: 1000041e bne r2,zero,31074 + 30730: 008000f4 movhi r2,3 + 30734: 109a1304 addi r2,r2,26700 + 30738: 10800017 ldw r2,0(r2) + 3073c: 1000041e bne r2,zero,30750 { _alt_tick_rate = nticks; - 31064: 008000f4 movhi r2,3 - 31068: 109c6004 addi r2,r2,29056 - 3106c: e0fffb17 ldw r3,-20(fp) - 31070: 10c00015 stw r3,0(r2) + 30740: 008000f4 movhi r2,3 + 30744: 109a1304 addi r2,r2,26700 + 30748: e0fffb17 ldw r3,-20(fp) + 3074c: 10c00015 stw r3,0(r2) alt_sysclk_init (freq); /* set to free running mode */ IOWR_ALTERA_AVALON_TIMER_CONTROL (base, - 31074: e0bffc17 ldw r2,-16(fp) - 31078: 10800104 addi r2,r2,4 - 3107c: 00c001c4 movi r3,7 - 31080: 10c00035 stwio r3,0(r2) + 30750: e0bffc17 ldw r2,-16(fp) + 30754: 10800104 addi r2,r2,4 + 30758: 00c001c4 movi r3,7 + 3075c: 10c00035 stwio r3,0(r2) ALTERA_AVALON_TIMER_CONTROL_CONT_MSK | ALTERA_AVALON_TIMER_CONTROL_START_MSK); /* register the interrupt handler, and enable the interrupt */ #ifdef ALT_ENHANCED_INTERRUPT_API_PRESENT alt_ic_isr_register(irq_controller_id, irq, alt_avalon_timer_sc_irq, - 31084: d8000015 stw zero,0(sp) - 31088: e1fffc17 ldw r7,-16(fp) - 3108c: 018000f4 movhi r6,3 - 31090: 3183ed04 addi r6,r6,4020 - 31094: e17ffe17 ldw r5,-8(fp) - 31098: e13ffd17 ldw r4,-12(fp) - 3109c: 00315800 call 31580 + 30760: d8000015 stw zero,0(sp) + 30764: e1fffc17 ldw r7,-16(fp) + 30768: 018000f4 movhi r6,3 + 3076c: 3181a404 addi r6,r6,1680 + 30770: e17ffe17 ldw r5,-8(fp) + 30774: e13ffd17 ldw r4,-12(fp) + 30778: 0030c5c0 call 30c5c base, NULL); #else alt_irq_register (irq, base, alt_avalon_timer_sc_irq); #endif } - 310a0: 0001883a nop - 310a4: e037883a mov sp,fp - 310a8: dfc00117 ldw ra,4(sp) - 310ac: df000017 ldw fp,0(sp) - 310b0: dec00204 addi sp,sp,8 - 310b4: f800283a ret + 3077c: 0001883a nop + 30780: e037883a mov sp,fp + 30784: dfc00117 ldw ra,4(sp) + 30788: df000017 ldw fp,0(sp) + 3078c: dec00204 addi sp,sp,8 + 30790: f800283a ret -000310b8 : +00030794 : */ int alt_alarm_start (alt_alarm* alarm, alt_u32 nticks, alt_u32 (*callback) (void* context), void* context) { - 310b8: defff504 addi sp,sp,-44 - 310bc: df000a15 stw fp,40(sp) - 310c0: df000a04 addi fp,sp,40 - 310c4: e13ffc15 stw r4,-16(fp) - 310c8: e17ffd15 stw r5,-12(fp) - 310cc: e1bffe15 stw r6,-8(fp) - 310d0: e1ffff15 stw r7,-4(fp) + 30794: defff504 addi sp,sp,-44 + 30798: df000a15 stw fp,40(sp) + 3079c: df000a04 addi fp,sp,40 + 307a0: e13ffc15 stw r4,-16(fp) + 307a4: e17ffd15 stw r5,-12(fp) + 307a8: e1bffe15 stw r6,-8(fp) + 307ac: e1ffff15 stw r7,-4(fp) alt_irq_context irq_context; alt_u32 current_nticks = 0; - 310d4: e03ff615 stw zero,-40(fp) + 307b0: e03ff615 stw zero,-40(fp) * Obtain the system clock rate in ticks/s. */ static ALT_INLINE alt_u32 ALT_ALWAYS_INLINE alt_ticks_per_second (void) { return _alt_tick_rate; - 310d8: 008000f4 movhi r2,3 - 310dc: 109c6004 addi r2,r2,29056 - 310e0: 10800017 ldw r2,0(r2) + 307b4: 008000f4 movhi r2,3 + 307b8: 109a1304 addi r2,r2,26700 + 307bc: 10800017 ldw r2,0(r2) if (alt_ticks_per_second ()) - 310e4: 10003f26 beq r2,zero,311e4 + 307c0: 10003f26 beq r2,zero,308c0 { if (alarm) - 310e8: e0bffc17 ldw r2,-16(fp) - 310ec: 10003b26 beq r2,zero,311dc + 307c4: e0bffc17 ldw r2,-16(fp) + 307c8: 10003b26 beq r2,zero,308b8 { alarm->callback = callback; - 310f0: e0bffc17 ldw r2,-16(fp) - 310f4: e0fffe17 ldw r3,-8(fp) - 310f8: 10c00315 stw r3,12(r2) + 307cc: e0bffc17 ldw r2,-16(fp) + 307d0: e0fffe17 ldw r3,-8(fp) + 307d4: 10c00315 stw r3,12(r2) alarm->context = context; - 310fc: e0bffc17 ldw r2,-16(fp) - 31100: e0ffff17 ldw r3,-4(fp) - 31104: 10c00515 stw r3,20(r2) + 307d8: e0bffc17 ldw r2,-16(fp) + 307dc: e0ffff17 ldw r3,-4(fp) + 307e0: 10c00515 stw r3,20(r2) static ALT_INLINE alt_irq_context ALT_ALWAYS_INLINE alt_irq_disable_all (void) { alt_irq_context context; NIOS2_READ_STATUS (context); - 31108: 0005303a rdctl r2,status - 3110c: e0bff915 stw r2,-28(fp) + 307e4: 0005303a rdctl r2,status + 307e8: e0bff915 stw r2,-28(fp) NIOS2_WRITE_STATUS (context & ~NIOS2_STATUS_PIE_MSK); - 31110: e0fff917 ldw r3,-28(fp) - 31114: 00bfff84 movi r2,-2 - 31118: 1884703a and r2,r3,r2 - 3111c: 1001703a wrctl status,r2 + 307ec: e0fff917 ldw r3,-28(fp) + 307f0: 00bfff84 movi r2,-2 + 307f4: 1884703a and r2,r3,r2 + 307f8: 1001703a wrctl status,r2 return context; - 31120: e0bff917 ldw r2,-28(fp) + 307fc: e0bff917 ldw r2,-28(fp) irq_context = alt_irq_disable_all (); - 31124: e0bff815 stw r2,-32(fp) + 30800: e0bff815 stw r2,-32(fp) * alt_nticks() returns the elapsed number of system clock ticks since reset. */ static ALT_INLINE alt_u32 ALT_ALWAYS_INLINE alt_nticks (void) { return _alt_nticks; - 31128: 008000f4 movhi r2,3 - 3112c: 109c6104 addi r2,r2,29060 - 31130: 10800017 ldw r2,0(r2) + 30804: 008000f4 movhi r2,3 + 30808: 109a1404 addi r2,r2,26704 + 3080c: 10800017 ldw r2,0(r2) current_nticks = alt_nticks(); - 31134: e0bff615 stw r2,-40(fp) + 30810: e0bff615 stw r2,-40(fp) alarm->time = nticks + current_nticks + 1; - 31138: e0fffd17 ldw r3,-12(fp) - 3113c: e0bff617 ldw r2,-40(fp) - 31140: 1885883a add r2,r3,r2 - 31144: 10c00044 addi r3,r2,1 - 31148: e0bffc17 ldw r2,-16(fp) - 3114c: 10c00215 stw r3,8(r2) + 30814: e0fffd17 ldw r3,-12(fp) + 30818: e0bff617 ldw r2,-40(fp) + 3081c: 1885883a add r2,r3,r2 + 30820: 10c00044 addi r3,r2,1 + 30824: e0bffc17 ldw r2,-16(fp) + 30828: 10c00215 stw r3,8(r2) /* * If the desired alarm time causes a roll-over, set the rollover * flag. This will prevent the subsequent tick event from causing * an alarm too early. */ if(alarm->time < current_nticks) - 31150: e0bffc17 ldw r2,-16(fp) - 31154: 10c00217 ldw r3,8(r2) - 31158: e0bff617 ldw r2,-40(fp) - 3115c: 1880042e bgeu r3,r2,31170 + 3082c: e0bffc17 ldw r2,-16(fp) + 30830: 10c00217 ldw r3,8(r2) + 30834: e0bff617 ldw r2,-40(fp) + 30838: 1880042e bgeu r3,r2,3084c { alarm->rollover = 1; - 31160: e0bffc17 ldw r2,-16(fp) - 31164: 00c00044 movi r3,1 - 31168: 10c00405 stb r3,16(r2) - 3116c: 00000206 br 31178 + 3083c: e0bffc17 ldw r2,-16(fp) + 30840: 00c00044 movi r3,1 + 30844: 10c00405 stb r3,16(r2) + 30848: 00000206 br 30854 } else { alarm->rollover = 0; - 31170: e0bffc17 ldw r2,-16(fp) - 31174: 10000405 stb zero,16(r2) + 3084c: e0bffc17 ldw r2,-16(fp) + 30850: 10000405 stb zero,16(r2) } alt_llist_insert (&alt_alarm_list, &alarm->llist); - 31178: e0fffc17 ldw r3,-16(fp) - 3117c: 008000f4 movhi r2,3 - 31180: 1093ab04 addi r2,r2,20140 - 31184: e0bffa15 stw r2,-24(fp) - 31188: e0fffb15 stw r3,-20(fp) + 30854: e0fffc17 ldw r3,-16(fp) + 30858: 008000f4 movhi r2,3 + 3085c: 10915e04 addi r2,r2,17784 + 30860: e0bffa15 stw r2,-24(fp) + 30864: e0fffb15 stw r3,-20(fp) */ static ALT_INLINE void ALT_ALWAYS_INLINE alt_llist_insert(alt_llist* list, alt_llist* entry) { entry->previous = list; - 3118c: e0bffb17 ldw r2,-20(fp) - 31190: e0fffa17 ldw r3,-24(fp) - 31194: 10c00115 stw r3,4(r2) + 30868: e0bffb17 ldw r2,-20(fp) + 3086c: e0fffa17 ldw r3,-24(fp) + 30870: 10c00115 stw r3,4(r2) entry->next = list->next; - 31198: e0bffa17 ldw r2,-24(fp) - 3119c: 10c00017 ldw r3,0(r2) - 311a0: e0bffb17 ldw r2,-20(fp) - 311a4: 10c00015 stw r3,0(r2) + 30874: e0bffa17 ldw r2,-24(fp) + 30878: 10c00017 ldw r3,0(r2) + 3087c: e0bffb17 ldw r2,-20(fp) + 30880: 10c00015 stw r3,0(r2) list->next->previous = entry; - 311a8: e0bffa17 ldw r2,-24(fp) - 311ac: 10800017 ldw r2,0(r2) - 311b0: e0fffb17 ldw r3,-20(fp) - 311b4: 10c00115 stw r3,4(r2) + 30884: e0bffa17 ldw r2,-24(fp) + 30888: 10800017 ldw r2,0(r2) + 3088c: e0fffb17 ldw r3,-20(fp) + 30890: 10c00115 stw r3,4(r2) list->next = entry; - 311b8: e0bffa17 ldw r2,-24(fp) - 311bc: e0fffb17 ldw r3,-20(fp) - 311c0: 10c00015 stw r3,0(r2) - 311c4: e0bff817 ldw r2,-32(fp) - 311c8: e0bff715 stw r2,-36(fp) + 30894: e0bffa17 ldw r2,-24(fp) + 30898: e0fffb17 ldw r3,-20(fp) + 3089c: 10c00015 stw r3,0(r2) + 308a0: e0bff817 ldw r2,-32(fp) + 308a4: e0bff715 stw r2,-36(fp) status &= ~NIOS2_STATUS_PIE_MSK; status |= (context & NIOS2_STATUS_PIE_MSK); NIOS2_WRITE_STATUS (status); #else NIOS2_WRITE_STATUS (context); - 311cc: e0bff717 ldw r2,-36(fp) - 311d0: 1001703a wrctl status,r2 + 308a8: e0bff717 ldw r2,-36(fp) + 308ac: 1001703a wrctl status,r2 alt_irq_enable_all (irq_context); return 0; - 311d4: 0005883a mov r2,zero - 311d8: 00000306 br 311e8 + 308b0: 0005883a mov r2,zero + 308b4: 00000306 br 308c4 } else { return -EINVAL; - 311dc: 00bffa84 movi r2,-22 - 311e0: 00000106 br 311e8 + 308b8: 00bffa84 movi r2,-22 + 308bc: 00000106 br 308c4 } } else { return -ENOTSUP; - 311e4: 00bfde84 movi r2,-134 + 308c0: 00bfde84 movi r2,-134 } } - 311e8: e037883a mov sp,fp - 311ec: df000017 ldw fp,0(sp) - 311f0: dec00104 addi sp,sp,4 - 311f4: f800283a ret + 308c4: e037883a mov sp,fp + 308c8: df000017 ldw fp,0(sp) + 308cc: dec00104 addi sp,sp,4 + 308d0: f800283a ret -000311f8 : +000308d4 : #include "alt_types.h" #include "priv/alt_busy_sleep.h" unsigned int alt_busy_sleep (unsigned int us) { - 311f8: defffa04 addi sp,sp,-24 - 311fc: dfc00515 stw ra,20(sp) - 31200: df000415 stw fp,16(sp) - 31204: df000404 addi fp,sp,16 - 31208: e13fff15 stw r4,-4(fp) + 308d4: defffa04 addi sp,sp,-24 + 308d8: dfc00515 stw ra,20(sp) + 308dc: df000415 stw fp,16(sp) + 308e0: df000404 addi fp,sp,16 + 308e4: e13fff15 stw r4,-4(fp) { cycles_per_loop = 9; } else { cycles_per_loop = 3; - 3120c: 008000c4 movi r2,3 - 31210: e0bffd15 stw r2,-12(fp) + 308e8: 008000c4 movi r2,3 + 308ec: e0bffd15 stw r2,-12(fp) } big_loops = us / (INT_MAX/ (ALT_CPU_FREQ/(cycles_per_loop * 1000000))); - 31214: e0fffd17 ldw r3,-12(fp) - 31218: 008003f4 movhi r2,15 - 3121c: 10909004 addi r2,r2,16960 - 31220: 1885383a mul r2,r3,r2 - 31224: 100b883a mov r5,r2 - 31228: 0100bef4 movhi r4,763 - 3122c: 213c2004 addi r4,r4,-3968 - 31230: 0022a200 call 22a20 <__udivsi3> + 308f0: e0fffd17 ldw r3,-12(fp) + 308f4: 008003f4 movhi r2,15 + 308f8: 10909004 addi r2,r2,16960 + 308fc: 1885383a mul r2,r3,r2 + 30900: 100b883a mov r5,r2 + 30904: 0100bef4 movhi r4,763 + 30908: 213c2004 addi r4,r4,-3968 + 3090c: 00225dc0 call 225dc <__udivsi3> { cycles_per_loop = 3; } big_loops = us / (INT_MAX/ - 31234: 100b883a mov r5,r2 - 31238: 01200034 movhi r4,32768 - 3123c: 213fffc4 addi r4,r4,-1 - 31240: 0022a200 call 22a20 <__udivsi3> - 31244: 100b883a mov r5,r2 - 31248: e13fff17 ldw r4,-4(fp) - 3124c: 0022a200 call 22a20 <__udivsi3> - 31250: e0bffe15 stw r2,-8(fp) + 30910: 100b883a mov r5,r2 + 30914: 01200034 movhi r4,32768 + 30918: 213fffc4 addi r4,r4,-1 + 3091c: 00225dc0 call 225dc <__udivsi3> + 30920: 100b883a mov r5,r2 + 30924: e13fff17 ldw r4,-4(fp) + 30928: 00225dc0 call 225dc <__udivsi3> + 3092c: e0bffe15 stw r2,-8(fp) (ALT_CPU_FREQ/(cycles_per_loop * 1000000))); if (big_loops) - 31254: e0bffe17 ldw r2,-8(fp) - 31258: 10002a26 beq r2,zero,31304 + 30930: e0bffe17 ldw r2,-8(fp) + 30934: 10002a26 beq r2,zero,309e0 { for(i=0;i + 30938: e03ffc15 stw zero,-16(fp) + 3093c: 00001706 br 3099c /* * Do NOT Try to single step the asm statement below * (single step will never return) * Step out of this function or set a breakpoint after the asm statements */ __asm__ volatile ( - 31264: 00a00034 movhi r2,32768 - 31268: 10bfffc4 addi r2,r2,-1 - 3126c: 10bfffc4 addi r2,r2,-1 - 31270: 103ffe1e bne r2,zero,3126c + 30940: 00a00034 movhi r2,32768 + 30944: 10bfffc4 addi r2,r2,-1 + 30948: 10bfffc4 addi r2,r2,-1 + 3094c: 103ffe1e bne r2,zero,30948 <_gp+0xffff4410> "\n\t.pushsection .debug_alt_sim_info" "\n\t.int 4, 0, 0b, 1b" "\n\t.popsection" :: "r" (INT_MAX)); us -= (INT_MAX/(ALT_CPU_FREQ/ (cycles_per_loop * 1000000))); - 31274: e0fffd17 ldw r3,-12(fp) - 31278: 008003f4 movhi r2,15 - 3127c: 10909004 addi r2,r2,16960 - 31280: 1885383a mul r2,r3,r2 + 30950: e0fffd17 ldw r3,-12(fp) + 30954: 008003f4 movhi r2,15 + 30958: 10909004 addi r2,r2,16960 + 3095c: 1885383a mul r2,r3,r2 "\n1:" "\n\t.pushsection .debug_alt_sim_info" "\n\t.int 4, 0, 0b, 1b" "\n\t.popsection" :: "r" (INT_MAX)); us -= (INT_MAX/(ALT_CPU_FREQ/ - 31284: 100b883a mov r5,r2 - 31288: 0100bef4 movhi r4,763 - 3128c: 213c2004 addi r4,r4,-3968 - 31290: 0022a200 call 22a20 <__udivsi3> - 31294: 100b883a mov r5,r2 - 31298: 01200034 movhi r4,32768 - 3129c: 213fffc4 addi r4,r4,-1 - 312a0: 0022a200 call 22a20 <__udivsi3> - 312a4: 1007883a mov r3,r2 - 312a8: e0bfff17 ldw r2,-4(fp) - 312ac: 10c5c83a sub r2,r2,r3 - 312b0: e0bfff15 stw r2,-4(fp) + 30960: 100b883a mov r5,r2 + 30964: 0100bef4 movhi r4,763 + 30968: 213c2004 addi r4,r4,-3968 + 3096c: 00225dc0 call 225dc <__udivsi3> + 30970: 100b883a mov r5,r2 + 30974: 01200034 movhi r4,32768 + 30978: 213fffc4 addi r4,r4,-1 + 3097c: 00225dc0 call 225dc <__udivsi3> + 30980: 1007883a mov r3,r2 + 30984: e0bfff17 ldw r2,-4(fp) + 30988: 10c5c83a sub r2,r2,r3 + 3098c: e0bfff15 stw r2,-4(fp) big_loops = us / (INT_MAX/ (ALT_CPU_FREQ/(cycles_per_loop * 1000000))); if (big_loops) { for(i=0;i + 30990: e0bffc17 ldw r2,-16(fp) + 30994: 10800044 addi r2,r2,1 + 30998: e0bffc15 stw r2,-16(fp) + 3099c: e0fffc17 ldw r3,-16(fp) + 309a0: e0bffe17 ldw r2,-8(fp) + 309a4: 18bfe616 blt r3,r2,30940 <_gp+0xffff4408> "\n\tbne %0,zero,0b" "\n1:" "\n\t.pushsection .debug_alt_sim_info" "\n\t.int 4, 0, 0b, 1b" "\n\t.popsection" :: "r" (us*(ALT_CPU_FREQ/(cycles_per_loop * 1000000)))); - 312cc: e0fffd17 ldw r3,-12(fp) - 312d0: 008003f4 movhi r2,15 - 312d4: 10909004 addi r2,r2,16960 - 312d8: 1885383a mul r2,r3,r2 - 312dc: 100b883a mov r5,r2 - 312e0: 0100bef4 movhi r4,763 - 312e4: 213c2004 addi r4,r4,-3968 - 312e8: 0022a200 call 22a20 <__udivsi3> - 312ec: 1007883a mov r3,r2 - 312f0: e0bfff17 ldw r2,-4(fp) - 312f4: 1885383a mul r2,r3,r2 + 309a8: e0fffd17 ldw r3,-12(fp) + 309ac: 008003f4 movhi r2,15 + 309b0: 10909004 addi r2,r2,16960 + 309b4: 1885383a mul r2,r3,r2 + 309b8: 100b883a mov r5,r2 + 309bc: 0100bef4 movhi r4,763 + 309c0: 213c2004 addi r4,r4,-3968 + 309c4: 00225dc0 call 225dc <__udivsi3> + 309c8: 1007883a mov r3,r2 + 309cc: e0bfff17 ldw r2,-4(fp) + 309d0: 1885383a mul r2,r3,r2 /* * Do NOT Try to single step the asm statement below * (single step will never return) * Step out of this function or set a breakpoint after the asm statements */ __asm__ volatile ( - 312f8: 10bfffc4 addi r2,r2,-1 - 312fc: 103ffe1e bne r2,zero,312f8 - 31300: 00000d06 br 31338 + 309d4: 10bfffc4 addi r2,r2,-1 + 309d8: 103ffe1e bne r2,zero,309d4 <_gp+0xffff449c> + 309dc: 00000d06 br 30a14 "\n\tbgt %0,zero,0b" "\n1:" "\n\t.pushsection .debug_alt_sim_info" "\n\t.int 4, 0, 0b, 1b" "\n\t.popsection" :: "r" (us*(ALT_CPU_FREQ/(cycles_per_loop * 1000000)))); - 31304: e0fffd17 ldw r3,-12(fp) - 31308: 008003f4 movhi r2,15 - 3130c: 10909004 addi r2,r2,16960 - 31310: 1885383a mul r2,r3,r2 - 31314: 100b883a mov r5,r2 - 31318: 0100bef4 movhi r4,763 - 3131c: 213c2004 addi r4,r4,-3968 - 31320: 0022a200 call 22a20 <__udivsi3> - 31324: 1007883a mov r3,r2 - 31328: e0bfff17 ldw r2,-4(fp) - 3132c: 1885383a mul r2,r3,r2 + 309e0: e0fffd17 ldw r3,-12(fp) + 309e4: 008003f4 movhi r2,15 + 309e8: 10909004 addi r2,r2,16960 + 309ec: 1885383a mul r2,r3,r2 + 309f0: 100b883a mov r5,r2 + 309f4: 0100bef4 movhi r4,763 + 309f8: 213c2004 addi r4,r4,-3968 + 309fc: 00225dc0 call 225dc <__udivsi3> + 30a00: 1007883a mov r3,r2 + 30a04: e0bfff17 ldw r2,-4(fp) + 30a08: 1885383a mul r2,r3,r2 /* * Do NOT Try to single step the asm statement below * (single step will never return) * Step out of this function or set a breakpoint after the asm statements */ __asm__ volatile ( - 31330: 10bfffc4 addi r2,r2,-1 - 31334: 00bffe16 blt zero,r2,31330 + 30a0c: 10bfffc4 addi r2,r2,-1 + 30a10: 00bffe16 blt zero,r2,30a0c <_gp+0xffff44d4> "\n\t.int 4, 0, 0b, 1b" "\n\t.popsection" :: "r" (us*(ALT_CPU_FREQ/(cycles_per_loop * 1000000)))); } #endif /* #ifndef ALT_SIM_OPTIMIZE */ return 0; - 31338: 0005883a mov r2,zero + 30a14: 0005883a mov r2,zero } - 3133c: e037883a mov sp,fp - 31340: dfc00117 ldw ra,4(sp) - 31344: df000017 ldw fp,0(sp) - 31348: dec00204 addi sp,sp,8 - 3134c: f800283a ret + 30a18: e037883a mov sp,fp + 30a1c: dfc00117 ldw ra,4(sp) + 30a20: df000017 ldw fp,0(sp) + 30a24: dec00204 addi sp,sp,8 + 30a28: f800283a ret -00031350 : +00030a2c : /* * alt_dcache_flush_all() is called to flush the entire data cache. */ void alt_dcache_flush_all (void) { - 31350: defffe04 addi sp,sp,-8 - 31354: df000115 stw fp,4(sp) - 31358: df000104 addi fp,sp,4 + 30a2c: defffe04 addi sp,sp,-8 + 30a30: df000115 stw fp,4(sp) + 30a34: df000104 addi fp,sp,4 #if NIOS2_DCACHE_SIZE > 0 char* i; for (i = (char*) 0; i < (char*) NIOS2_DCACHE_SIZE; i+= NIOS2_DCACHE_LINE_SIZE) - 3135c: e03fff15 stw zero,-4(fp) - 31360: 00000506 br 31378 + 30a38: e03fff15 stw zero,-4(fp) + 30a3c: 00000506 br 30a54 { __asm__ volatile ("flushd (%0)" :: "r" (i)); - 31364: e0bfff17 ldw r2,-4(fp) - 31368: 1000003b flushd 0(r2) + 30a40: e0bfff17 ldw r2,-4(fp) + 30a44: 1000003b flushd 0(r2) void alt_dcache_flush_all (void) { #if NIOS2_DCACHE_SIZE > 0 char* i; for (i = (char*) 0; i < (char*) NIOS2_DCACHE_SIZE; i+= NIOS2_DCACHE_LINE_SIZE) - 3136c: e0bfff17 ldw r2,-4(fp) - 31370: 10800804 addi r2,r2,32 - 31374: e0bfff15 stw r2,-4(fp) - 31378: e0bfff17 ldw r2,-4(fp) - 3137c: 10820030 cmpltui r2,r2,2048 - 31380: 103ff81e bne r2,zero,31364 + 30a48: e0bfff17 ldw r2,-4(fp) + 30a4c: 10800804 addi r2,r2,32 + 30a50: e0bfff15 stw r2,-4(fp) + 30a54: e0bfff17 ldw r2,-4(fp) + 30a58: 10820030 cmpltui r2,r2,2048 + 30a5c: 103ff81e bne r2,zero,30a40 <_gp+0xffff4508> { __asm__ volatile ("flushd (%0)" :: "r" (i)); } #endif /* NIOS2_DCACHE_SIZE > 0 */ } - 31384: 0001883a nop - 31388: e037883a mov sp,fp - 3138c: df000017 ldw fp,0(sp) - 31390: dec00104 addi sp,sp,4 - 31394: f800283a ret + 30a60: 0001883a nop + 30a64: e037883a mov sp,fp + 30a68: df000017 ldw fp,0(sp) + 30a6c: dec00104 addi sp,sp,4 + 30a70: f800283a ret -00031398 : +00030a74 : #undef errno extern int errno; static ALT_INLINE int* alt_get_errno(void) { - 31398: defffe04 addi sp,sp,-8 - 3139c: dfc00115 stw ra,4(sp) - 313a0: df000015 stw fp,0(sp) - 313a4: d839883a mov fp,sp + 30a74: defffe04 addi sp,sp,-8 + 30a78: dfc00115 stw ra,4(sp) + 30a7c: df000015 stw fp,0(sp) + 30a80: d839883a mov fp,sp return ((alt_errno) ? alt_errno() : &errno); - 313a8: 008000f4 movhi r2,3 - 313ac: 1093a904 addi r2,r2,20132 - 313b0: 10800017 ldw r2,0(r2) - 313b4: 10000526 beq r2,zero,313cc - 313b8: 008000f4 movhi r2,3 - 313bc: 1093a904 addi r2,r2,20132 - 313c0: 10800017 ldw r2,0(r2) - 313c4: 103ee83a callr r2 - 313c8: 00000206 br 313d4 - 313cc: 008000f4 movhi r2,3 - 313d0: 109c5904 addi r2,r2,29028 + 30a84: 008000f4 movhi r2,3 + 30a88: 10915c04 addi r2,r2,17776 + 30a8c: 10800017 ldw r2,0(r2) + 30a90: 10000526 beq r2,zero,30aa8 + 30a94: 008000f4 movhi r2,3 + 30a98: 10915c04 addi r2,r2,17776 + 30a9c: 10800017 ldw r2,0(r2) + 30aa0: 103ee83a callr r2 + 30aa4: 00000206 br 30ab0 + 30aa8: 008000f4 movhi r2,3 + 30aac: 109a0c04 addi r2,r2,26672 } - 313d4: e037883a mov sp,fp - 313d8: dfc00117 ldw ra,4(sp) - 313dc: df000017 ldw fp,0(sp) - 313e0: dec00204 addi sp,sp,8 - 313e4: f800283a ret + 30ab0: e037883a mov sp,fp + 30ab4: dfc00117 ldw ra,4(sp) + 30ab8: df000017 ldw fp,0(sp) + 30abc: dec00204 addi sp,sp,8 + 30ac0: f800283a ret -000313e8 : +00030ac4 : /* * */ int alt_dev_llist_insert (alt_dev_llist* dev, alt_llist* list) { - 313e8: defffa04 addi sp,sp,-24 - 313ec: dfc00515 stw ra,20(sp) - 313f0: df000415 stw fp,16(sp) - 313f4: df000404 addi fp,sp,16 - 313f8: e13ffe15 stw r4,-8(fp) - 313fc: e17fff15 stw r5,-4(fp) + 30ac4: defffa04 addi sp,sp,-24 + 30ac8: dfc00515 stw ra,20(sp) + 30acc: df000415 stw fp,16(sp) + 30ad0: df000404 addi fp,sp,16 + 30ad4: e13ffe15 stw r4,-8(fp) + 30ad8: e17fff15 stw r5,-4(fp) /* * check that the device exists, and that it has a valid name. */ if (!dev || !dev->name) - 31400: e0bffe17 ldw r2,-8(fp) - 31404: 10000326 beq r2,zero,31414 - 31408: e0bffe17 ldw r2,-8(fp) - 3140c: 10800217 ldw r2,8(r2) - 31410: 1000061e bne r2,zero,3142c + 30adc: e0bffe17 ldw r2,-8(fp) + 30ae0: 10000326 beq r2,zero,30af0 + 30ae4: e0bffe17 ldw r2,-8(fp) + 30ae8: 10800217 ldw r2,8(r2) + 30aec: 1000061e bne r2,zero,30b08 { ALT_ERRNO = EINVAL; - 31414: 00313980 call 31398 - 31418: 1007883a mov r3,r2 - 3141c: 00800584 movi r2,22 - 31420: 18800015 stw r2,0(r3) + 30af0: 0030a740 call 30a74 + 30af4: 1007883a mov r3,r2 + 30af8: 00800584 movi r2,22 + 30afc: 18800015 stw r2,0(r3) return -EINVAL; - 31424: 00bffa84 movi r2,-22 - 31428: 00001306 br 31478 + 30b00: 00bffa84 movi r2,-22 + 30b04: 00001306 br 30b54 /* * register the device. */ alt_llist_insert(list, &dev->llist); - 3142c: e0bffe17 ldw r2,-8(fp) - 31430: e0ffff17 ldw r3,-4(fp) - 31434: e0fffc15 stw r3,-16(fp) - 31438: e0bffd15 stw r2,-12(fp) + 30b08: e0bffe17 ldw r2,-8(fp) + 30b0c: e0ffff17 ldw r3,-4(fp) + 30b10: e0fffc15 stw r3,-16(fp) + 30b14: e0bffd15 stw r2,-12(fp) */ static ALT_INLINE void ALT_ALWAYS_INLINE alt_llist_insert(alt_llist* list, alt_llist* entry) { entry->previous = list; - 3143c: e0bffd17 ldw r2,-12(fp) - 31440: e0fffc17 ldw r3,-16(fp) - 31444: 10c00115 stw r3,4(r2) + 30b18: e0bffd17 ldw r2,-12(fp) + 30b1c: e0fffc17 ldw r3,-16(fp) + 30b20: 10c00115 stw r3,4(r2) entry->next = list->next; - 31448: e0bffc17 ldw r2,-16(fp) - 3144c: 10c00017 ldw r3,0(r2) - 31450: e0bffd17 ldw r2,-12(fp) - 31454: 10c00015 stw r3,0(r2) + 30b24: e0bffc17 ldw r2,-16(fp) + 30b28: 10c00017 ldw r3,0(r2) + 30b2c: e0bffd17 ldw r2,-12(fp) + 30b30: 10c00015 stw r3,0(r2) list->next->previous = entry; - 31458: e0bffc17 ldw r2,-16(fp) - 3145c: 10800017 ldw r2,0(r2) - 31460: e0fffd17 ldw r3,-12(fp) - 31464: 10c00115 stw r3,4(r2) + 30b34: e0bffc17 ldw r2,-16(fp) + 30b38: 10800017 ldw r2,0(r2) + 30b3c: e0fffd17 ldw r3,-12(fp) + 30b40: 10c00115 stw r3,4(r2) list->next = entry; - 31468: e0bffc17 ldw r2,-16(fp) - 3146c: e0fffd17 ldw r3,-12(fp) - 31470: 10c00015 stw r3,0(r2) + 30b44: e0bffc17 ldw r2,-16(fp) + 30b48: e0fffd17 ldw r3,-12(fp) + 30b4c: 10c00015 stw r3,0(r2) return 0; - 31474: 0005883a mov r2,zero + 30b50: 0005883a mov r2,zero } - 31478: e037883a mov sp,fp - 3147c: dfc00117 ldw ra,4(sp) - 31480: df000017 ldw fp,0(sp) - 31484: dec00204 addi sp,sp,8 - 31488: f800283a ret + 30b54: e037883a mov sp,fp + 30b58: dfc00117 ldw ra,4(sp) + 30b5c: df000017 ldw fp,0(sp) + 30b60: dec00204 addi sp,sp,8 + 30b64: f800283a ret -0003148c <_do_ctors>: +00030b68 <_do_ctors>: /* * Run the C++ static constructors. */ void _do_ctors(void) { - 3148c: defffd04 addi sp,sp,-12 - 31490: dfc00215 stw ra,8(sp) - 31494: df000115 stw fp,4(sp) - 31498: df000104 addi fp,sp,4 + 30b68: defffd04 addi sp,sp,-12 + 30b6c: dfc00215 stw ra,8(sp) + 30b70: df000115 stw fp,4(sp) + 30b74: df000104 addi fp,sp,4 constructor* ctor; for (ctor = &__CTOR_END__[-1]; ctor >= __CTOR_LIST__; ctor--) - 3149c: 008000f4 movhi r2,3 - 314a0: 1088cf04 addi r2,r2,9020 - 314a4: e0bfff15 stw r2,-4(fp) - 314a8: 00000606 br 314c4 <_do_ctors+0x38> + 30b78: 008000f4 movhi r2,3 + 30b7c: 10868604 addi r2,r2,6680 + 30b80: e0bfff15 stw r2,-4(fp) + 30b84: 00000606 br 30ba0 <_do_ctors+0x38> (*ctor) (); - 314ac: e0bfff17 ldw r2,-4(fp) - 314b0: 10800017 ldw r2,0(r2) - 314b4: 103ee83a callr r2 + 30b88: e0bfff17 ldw r2,-4(fp) + 30b8c: 10800017 ldw r2,0(r2) + 30b90: 103ee83a callr r2 void _do_ctors(void) { constructor* ctor; for (ctor = &__CTOR_END__[-1]; ctor >= __CTOR_LIST__; ctor--) - 314b8: e0bfff17 ldw r2,-4(fp) - 314bc: 10bfff04 addi r2,r2,-4 - 314c0: e0bfff15 stw r2,-4(fp) - 314c4: e0ffff17 ldw r3,-4(fp) - 314c8: 008000f4 movhi r2,3 - 314cc: 1088d004 addi r2,r2,9024 - 314d0: 18bff62e bgeu r3,r2,314ac <_do_ctors+0x20> + 30b94: e0bfff17 ldw r2,-4(fp) + 30b98: 10bfff04 addi r2,r2,-4 + 30b9c: e0bfff15 stw r2,-4(fp) + 30ba0: e0ffff17 ldw r3,-4(fp) + 30ba4: 008000f4 movhi r2,3 + 30ba8: 10868704 addi r2,r2,6684 + 30bac: 18bff62e bgeu r3,r2,30b88 <_gp+0xffff4650> (*ctor) (); } - 314d4: 0001883a nop - 314d8: e037883a mov sp,fp - 314dc: dfc00117 ldw ra,4(sp) - 314e0: df000017 ldw fp,0(sp) - 314e4: dec00204 addi sp,sp,8 - 314e8: f800283a ret + 30bb0: 0001883a nop + 30bb4: e037883a mov sp,fp + 30bb8: dfc00117 ldw ra,4(sp) + 30bbc: df000017 ldw fp,0(sp) + 30bc0: dec00204 addi sp,sp,8 + 30bc4: f800283a ret -000314ec <_do_dtors>: +00030bc8 <_do_dtors>: /* * Run the C++ static destructors. */ void _do_dtors(void) { - 314ec: defffd04 addi sp,sp,-12 - 314f0: dfc00215 stw ra,8(sp) - 314f4: df000115 stw fp,4(sp) - 314f8: df000104 addi fp,sp,4 + 30bc8: defffd04 addi sp,sp,-12 + 30bcc: dfc00215 stw ra,8(sp) + 30bd0: df000115 stw fp,4(sp) + 30bd4: df000104 addi fp,sp,4 destructor* dtor; for (dtor = &__DTOR_END__[-1]; dtor >= __DTOR_LIST__; dtor--) - 314fc: 008000f4 movhi r2,3 - 31500: 1088cf04 addi r2,r2,9020 - 31504: e0bfff15 stw r2,-4(fp) - 31508: 00000606 br 31524 <_do_dtors+0x38> + 30bd8: 008000f4 movhi r2,3 + 30bdc: 10868604 addi r2,r2,6680 + 30be0: e0bfff15 stw r2,-4(fp) + 30be4: 00000606 br 30c00 <_do_dtors+0x38> (*dtor) (); - 3150c: e0bfff17 ldw r2,-4(fp) - 31510: 10800017 ldw r2,0(r2) - 31514: 103ee83a callr r2 + 30be8: e0bfff17 ldw r2,-4(fp) + 30bec: 10800017 ldw r2,0(r2) + 30bf0: 103ee83a callr r2 void _do_dtors(void) { destructor* dtor; for (dtor = &__DTOR_END__[-1]; dtor >= __DTOR_LIST__; dtor--) - 31518: e0bfff17 ldw r2,-4(fp) - 3151c: 10bfff04 addi r2,r2,-4 - 31520: e0bfff15 stw r2,-4(fp) - 31524: e0ffff17 ldw r3,-4(fp) - 31528: 008000f4 movhi r2,3 - 3152c: 1088d004 addi r2,r2,9024 - 31530: 18bff62e bgeu r3,r2,3150c <_do_dtors+0x20> + 30bf4: e0bfff17 ldw r2,-4(fp) + 30bf8: 10bfff04 addi r2,r2,-4 + 30bfc: e0bfff15 stw r2,-4(fp) + 30c00: e0ffff17 ldw r3,-4(fp) + 30c04: 008000f4 movhi r2,3 + 30c08: 10868704 addi r2,r2,6684 + 30c0c: 18bff62e bgeu r3,r2,30be8 <_gp+0xffff46b0> (*dtor) (); } - 31534: 0001883a nop - 31538: e037883a mov sp,fp - 3153c: dfc00117 ldw ra,4(sp) - 31540: df000017 ldw fp,0(sp) - 31544: dec00204 addi sp,sp,8 - 31548: f800283a ret + 30c10: 0001883a nop + 30c14: e037883a mov sp,fp + 30c18: dfc00117 ldw ra,4(sp) + 30c1c: df000017 ldw fp,0(sp) + 30c20: dec00204 addi sp,sp,8 + 30c24: f800283a ret -0003154c : +00030c28 : /* * alt_icache_flush_all() is called to flush the entire instruction cache. */ void alt_icache_flush_all (void) { - 3154c: defffe04 addi sp,sp,-8 - 31550: dfc00115 stw ra,4(sp) - 31554: df000015 stw fp,0(sp) - 31558: d839883a mov fp,sp + 30c28: defffe04 addi sp,sp,-8 + 30c2c: dfc00115 stw ra,4(sp) + 30c30: df000015 stw fp,0(sp) + 30c34: d839883a mov fp,sp #if NIOS2_ICACHE_SIZE > 0 alt_icache_flush (0, NIOS2_ICACHE_SIZE); - 3155c: 01440004 movi r5,4096 - 31560: 0009883a mov r4,zero - 31564: 0031e800 call 31e80 + 30c38: 01440004 movi r5,4096 + 30c3c: 0009883a mov r4,zero + 30c40: 003155c0 call 3155c #endif } - 31568: 0001883a nop - 3156c: e037883a mov sp,fp - 31570: dfc00117 ldw ra,4(sp) - 31574: df000017 ldw fp,0(sp) - 31578: dec00204 addi sp,sp,8 - 3157c: f800283a ret + 30c44: 0001883a nop + 30c48: e037883a mov sp,fp + 30c4c: dfc00117 ldw ra,4(sp) + 30c50: df000017 ldw fp,0(sp) + 30c54: dec00204 addi sp,sp,8 + 30c58: f800283a ret -00031580 : +00030c5c : * @param irq IRQ number * @return 0 if successful, else error (-1) */ int alt_ic_isr_register(alt_u32 ic_id, alt_u32 irq, alt_isr_func isr, void *isr_context, void *flags) { - 31580: defff904 addi sp,sp,-28 - 31584: dfc00615 stw ra,24(sp) - 31588: df000515 stw fp,20(sp) - 3158c: df000504 addi fp,sp,20 - 31590: e13ffc15 stw r4,-16(fp) - 31594: e17ffd15 stw r5,-12(fp) - 31598: e1bffe15 stw r6,-8(fp) - 3159c: e1ffff15 stw r7,-4(fp) + 30c5c: defff904 addi sp,sp,-28 + 30c60: dfc00615 stw ra,24(sp) + 30c64: df000515 stw fp,20(sp) + 30c68: df000504 addi fp,sp,20 + 30c6c: e13ffc15 stw r4,-16(fp) + 30c70: e17ffd15 stw r5,-12(fp) + 30c74: e1bffe15 stw r6,-8(fp) + 30c78: e1ffff15 stw r7,-4(fp) return alt_iic_isr_register(ic_id, irq, isr, isr_context, flags); - 315a0: e0800217 ldw r2,8(fp) - 315a4: d8800015 stw r2,0(sp) - 315a8: e1ffff17 ldw r7,-4(fp) - 315ac: e1bffe17 ldw r6,-8(fp) - 315b0: e17ffd17 ldw r5,-12(fp) - 315b4: e13ffc17 ldw r4,-16(fp) - 315b8: 00317600 call 31760 + 30c7c: e0800217 ldw r2,8(fp) + 30c80: d8800015 stw r2,0(sp) + 30c84: e1ffff17 ldw r7,-4(fp) + 30c88: e1bffe17 ldw r6,-8(fp) + 30c8c: e17ffd17 ldw r5,-12(fp) + 30c90: e13ffc17 ldw r4,-16(fp) + 30c94: 0030e3c0 call 30e3c } - 315bc: e037883a mov sp,fp - 315c0: dfc00117 ldw ra,4(sp) - 315c4: df000017 ldw fp,0(sp) - 315c8: dec00204 addi sp,sp,8 - 315cc: f800283a ret + 30c98: e037883a mov sp,fp + 30c9c: dfc00117 ldw ra,4(sp) + 30ca0: df000017 ldw fp,0(sp) + 30ca4: dec00204 addi sp,sp,8 + 30ca8: f800283a ret -000315d0 : +00030cac : * @param ic_id Ignored. * @param irq IRQ number * @return 0 if successful, else error (-1) */ int alt_ic_irq_enable (alt_u32 ic_id, alt_u32 irq) { - 315d0: defff904 addi sp,sp,-28 - 315d4: df000615 stw fp,24(sp) - 315d8: df000604 addi fp,sp,24 - 315dc: e13ffe15 stw r4,-8(fp) - 315e0: e17fff15 stw r5,-4(fp) - 315e4: e0bfff17 ldw r2,-4(fp) - 315e8: e0bffa15 stw r2,-24(fp) + 30cac: defff904 addi sp,sp,-28 + 30cb0: df000615 stw fp,24(sp) + 30cb4: df000604 addi fp,sp,24 + 30cb8: e13ffe15 stw r4,-8(fp) + 30cbc: e17fff15 stw r5,-4(fp) + 30cc0: e0bfff17 ldw r2,-4(fp) + 30cc4: e0bffa15 stw r2,-24(fp) static ALT_INLINE alt_irq_context ALT_ALWAYS_INLINE alt_irq_disable_all (void) { alt_irq_context context; NIOS2_READ_STATUS (context); - 315ec: 0005303a rdctl r2,status - 315f0: e0bffb15 stw r2,-20(fp) + 30cc8: 0005303a rdctl r2,status + 30ccc: e0bffb15 stw r2,-20(fp) NIOS2_WRITE_STATUS (context & ~NIOS2_STATUS_PIE_MSK); - 315f4: e0fffb17 ldw r3,-20(fp) - 315f8: 00bfff84 movi r2,-2 - 315fc: 1884703a and r2,r3,r2 - 31600: 1001703a wrctl status,r2 + 30cd0: e0fffb17 ldw r3,-20(fp) + 30cd4: 00bfff84 movi r2,-2 + 30cd8: 1884703a and r2,r3,r2 + 30cdc: 1001703a wrctl status,r2 return context; - 31604: e0bffb17 ldw r2,-20(fp) + 30ce0: e0bffb17 ldw r2,-20(fp) static ALT_INLINE int ALT_ALWAYS_INLINE alt_irq_enable (alt_u32 id) { alt_irq_context status; extern volatile alt_u32 alt_irq_active; status = alt_irq_disable_all (); - 31608: e0bffc15 stw r2,-16(fp) + 30ce4: e0bffc15 stw r2,-16(fp) alt_irq_active |= (1 << id); - 3160c: 00c00044 movi r3,1 - 31610: e0bffa17 ldw r2,-24(fp) - 31614: 1884983a sll r2,r3,r2 - 31618: 1007883a mov r3,r2 - 3161c: 008000f4 movhi r2,3 - 31620: 109c6204 addi r2,r2,29064 - 31624: 10800017 ldw r2,0(r2) - 31628: 1886b03a or r3,r3,r2 - 3162c: 008000f4 movhi r2,3 - 31630: 109c6204 addi r2,r2,29064 - 31634: 10c00015 stw r3,0(r2) + 30ce8: 00c00044 movi r3,1 + 30cec: e0bffa17 ldw r2,-24(fp) + 30cf0: 1884983a sll r2,r3,r2 + 30cf4: 1007883a mov r3,r2 + 30cf8: 008000f4 movhi r2,3 + 30cfc: 109a1504 addi r2,r2,26708 + 30d00: 10800017 ldw r2,0(r2) + 30d04: 1886b03a or r3,r3,r2 + 30d08: 008000f4 movhi r2,3 + 30d0c: 109a1504 addi r2,r2,26708 + 30d10: 10c00015 stw r3,0(r2) NIOS2_WRITE_IENABLE (alt_irq_active); - 31638: 008000f4 movhi r2,3 - 3163c: 109c6204 addi r2,r2,29064 - 31640: 10800017 ldw r2,0(r2) - 31644: 100170fa wrctl ienable,r2 - 31648: e0bffc17 ldw r2,-16(fp) - 3164c: e0bffd15 stw r2,-12(fp) + 30d14: 008000f4 movhi r2,3 + 30d18: 109a1504 addi r2,r2,26708 + 30d1c: 10800017 ldw r2,0(r2) + 30d20: 100170fa wrctl ienable,r2 + 30d24: e0bffc17 ldw r2,-16(fp) + 30d28: e0bffd15 stw r2,-12(fp) status &= ~NIOS2_STATUS_PIE_MSK; status |= (context & NIOS2_STATUS_PIE_MSK); NIOS2_WRITE_STATUS (status); #else NIOS2_WRITE_STATUS (context); - 31650: e0bffd17 ldw r2,-12(fp) - 31654: 1001703a wrctl status,r2 + 30d2c: e0bffd17 ldw r2,-12(fp) + 30d30: 1001703a wrctl status,r2 alt_irq_enable_all(status); return 0; - 31658: 0005883a mov r2,zero + 30d34: 0005883a mov r2,zero return alt_irq_enable(irq); - 3165c: 0001883a nop + 30d38: 0001883a nop } - 31660: e037883a mov sp,fp - 31664: df000017 ldw fp,0(sp) - 31668: dec00104 addi sp,sp,4 - 3166c: f800283a ret + 30d3c: e037883a mov sp,fp + 30d40: df000017 ldw fp,0(sp) + 30d44: dec00104 addi sp,sp,4 + 30d48: f800283a ret -00031670 : +00030d4c : * @param ic_id Ignored. * @param irq IRQ number * @return 0 if successful, else error (-1) */ int alt_ic_irq_disable(alt_u32 ic_id, alt_u32 irq) { - 31670: defff904 addi sp,sp,-28 - 31674: df000615 stw fp,24(sp) - 31678: df000604 addi fp,sp,24 - 3167c: e13ffe15 stw r4,-8(fp) - 31680: e17fff15 stw r5,-4(fp) - 31684: e0bfff17 ldw r2,-4(fp) - 31688: e0bffa15 stw r2,-24(fp) + 30d4c: defff904 addi sp,sp,-28 + 30d50: df000615 stw fp,24(sp) + 30d54: df000604 addi fp,sp,24 + 30d58: e13ffe15 stw r4,-8(fp) + 30d5c: e17fff15 stw r5,-4(fp) + 30d60: e0bfff17 ldw r2,-4(fp) + 30d64: e0bffa15 stw r2,-24(fp) static ALT_INLINE alt_irq_context ALT_ALWAYS_INLINE alt_irq_disable_all (void) { alt_irq_context context; NIOS2_READ_STATUS (context); - 3168c: 0005303a rdctl r2,status - 31690: e0bffb15 stw r2,-20(fp) + 30d68: 0005303a rdctl r2,status + 30d6c: e0bffb15 stw r2,-20(fp) NIOS2_WRITE_STATUS (context & ~NIOS2_STATUS_PIE_MSK); - 31694: e0fffb17 ldw r3,-20(fp) - 31698: 00bfff84 movi r2,-2 - 3169c: 1884703a and r2,r3,r2 - 316a0: 1001703a wrctl status,r2 + 30d70: e0fffb17 ldw r3,-20(fp) + 30d74: 00bfff84 movi r2,-2 + 30d78: 1884703a and r2,r3,r2 + 30d7c: 1001703a wrctl status,r2 return context; - 316a4: e0bffb17 ldw r2,-20(fp) + 30d80: e0bffb17 ldw r2,-20(fp) static ALT_INLINE int ALT_ALWAYS_INLINE alt_irq_disable (alt_u32 id) { alt_irq_context status; extern volatile alt_u32 alt_irq_active; status = alt_irq_disable_all (); - 316a8: e0bffc15 stw r2,-16(fp) + 30d84: e0bffc15 stw r2,-16(fp) alt_irq_active &= ~(1 << id); - 316ac: 00c00044 movi r3,1 - 316b0: e0bffa17 ldw r2,-24(fp) - 316b4: 1884983a sll r2,r3,r2 - 316b8: 0084303a nor r2,zero,r2 - 316bc: 1007883a mov r3,r2 - 316c0: 008000f4 movhi r2,3 - 316c4: 109c6204 addi r2,r2,29064 - 316c8: 10800017 ldw r2,0(r2) - 316cc: 1886703a and r3,r3,r2 - 316d0: 008000f4 movhi r2,3 - 316d4: 109c6204 addi r2,r2,29064 - 316d8: 10c00015 stw r3,0(r2) + 30d88: 00c00044 movi r3,1 + 30d8c: e0bffa17 ldw r2,-24(fp) + 30d90: 1884983a sll r2,r3,r2 + 30d94: 0084303a nor r2,zero,r2 + 30d98: 1007883a mov r3,r2 + 30d9c: 008000f4 movhi r2,3 + 30da0: 109a1504 addi r2,r2,26708 + 30da4: 10800017 ldw r2,0(r2) + 30da8: 1886703a and r3,r3,r2 + 30dac: 008000f4 movhi r2,3 + 30db0: 109a1504 addi r2,r2,26708 + 30db4: 10c00015 stw r3,0(r2) NIOS2_WRITE_IENABLE (alt_irq_active); - 316dc: 008000f4 movhi r2,3 - 316e0: 109c6204 addi r2,r2,29064 - 316e4: 10800017 ldw r2,0(r2) - 316e8: 100170fa wrctl ienable,r2 - 316ec: e0bffc17 ldw r2,-16(fp) - 316f0: e0bffd15 stw r2,-12(fp) + 30db8: 008000f4 movhi r2,3 + 30dbc: 109a1504 addi r2,r2,26708 + 30dc0: 10800017 ldw r2,0(r2) + 30dc4: 100170fa wrctl ienable,r2 + 30dc8: e0bffc17 ldw r2,-16(fp) + 30dcc: e0bffd15 stw r2,-12(fp) status &= ~NIOS2_STATUS_PIE_MSK; status |= (context & NIOS2_STATUS_PIE_MSK); NIOS2_WRITE_STATUS (status); #else NIOS2_WRITE_STATUS (context); - 316f4: e0bffd17 ldw r2,-12(fp) - 316f8: 1001703a wrctl status,r2 + 30dd0: e0bffd17 ldw r2,-12(fp) + 30dd4: 1001703a wrctl status,r2 alt_irq_enable_all(status); return 0; - 316fc: 0005883a mov r2,zero + 30dd8: 0005883a mov r2,zero return alt_irq_disable(irq); - 31700: 0001883a nop + 30ddc: 0001883a nop } - 31704: e037883a mov sp,fp - 31708: df000017 ldw fp,0(sp) - 3170c: dec00104 addi sp,sp,4 - 31710: f800283a ret + 30de0: e037883a mov sp,fp + 30de4: df000017 ldw fp,0(sp) + 30de8: dec00104 addi sp,sp,4 + 30dec: f800283a ret -00031714 : +00030df0 : * @param irq IRQ number * @return Zero if corresponding interrupt is disabled and * non-zero otherwise. */ alt_u32 alt_ic_irq_enabled(alt_u32 ic_id, alt_u32 irq) { - 31714: defffc04 addi sp,sp,-16 - 31718: df000315 stw fp,12(sp) - 3171c: df000304 addi fp,sp,12 - 31720: e13ffe15 stw r4,-8(fp) - 31724: e17fff15 stw r5,-4(fp) + 30df0: defffc04 addi sp,sp,-16 + 30df4: df000315 stw fp,12(sp) + 30df8: df000304 addi fp,sp,12 + 30dfc: e13ffe15 stw r4,-8(fp) + 30e00: e17fff15 stw r5,-4(fp) alt_u32 irq_enabled; NIOS2_READ_IENABLE(irq_enabled); - 31728: 000530fa rdctl r2,ienable - 3172c: e0bffd15 stw r2,-12(fp) + 30e04: 000530fa rdctl r2,ienable + 30e08: e0bffd15 stw r2,-12(fp) return (irq_enabled & (1 << irq)) ? 1: 0; - 31730: 00c00044 movi r3,1 - 31734: e0bfff17 ldw r2,-4(fp) - 31738: 1884983a sll r2,r3,r2 - 3173c: 1007883a mov r3,r2 - 31740: e0bffd17 ldw r2,-12(fp) - 31744: 1884703a and r2,r3,r2 - 31748: 1004c03a cmpne r2,r2,zero - 3174c: 10803fcc andi r2,r2,255 + 30e0c: 00c00044 movi r3,1 + 30e10: e0bfff17 ldw r2,-4(fp) + 30e14: 1884983a sll r2,r3,r2 + 30e18: 1007883a mov r3,r2 + 30e1c: e0bffd17 ldw r2,-12(fp) + 30e20: 1884703a and r2,r3,r2 + 30e24: 1004c03a cmpne r2,r2,zero + 30e28: 10803fcc andi r2,r2,255 } - 31750: e037883a mov sp,fp - 31754: df000017 ldw fp,0(sp) - 31758: dec00104 addi sp,sp,4 - 3175c: f800283a ret + 30e2c: e037883a mov sp,fp + 30e30: df000017 ldw fp,0(sp) + 30e34: dec00104 addi sp,sp,4 + 30e38: f800283a ret -00031760 : +00030e3c : * @param flags * @return 0 if successful, else error (-1) */ int alt_iic_isr_register(alt_u32 ic_id, alt_u32 irq, alt_isr_func isr, void *isr_context, void *flags) { - 31760: defff504 addi sp,sp,-44 - 31764: dfc00a15 stw ra,40(sp) - 31768: df000915 stw fp,36(sp) - 3176c: df000904 addi fp,sp,36 - 31770: e13ffc15 stw r4,-16(fp) - 31774: e17ffd15 stw r5,-12(fp) - 31778: e1bffe15 stw r6,-8(fp) - 3177c: e1ffff15 stw r7,-4(fp) + 30e3c: defff504 addi sp,sp,-44 + 30e40: dfc00a15 stw ra,40(sp) + 30e44: df000915 stw fp,36(sp) + 30e48: df000904 addi fp,sp,36 + 30e4c: e13ffc15 stw r4,-16(fp) + 30e50: e17ffd15 stw r5,-12(fp) + 30e54: e1bffe15 stw r6,-8(fp) + 30e58: e1ffff15 stw r7,-4(fp) int rc = -EINVAL; - 31780: 00bffa84 movi r2,-22 - 31784: e0bff715 stw r2,-36(fp) + 30e5c: 00bffa84 movi r2,-22 + 30e60: e0bff715 stw r2,-36(fp) int id = irq; /* IRQ interpreted as the interrupt ID. */ - 31788: e0bffd17 ldw r2,-12(fp) - 3178c: e0bff815 stw r2,-32(fp) + 30e64: e0bffd17 ldw r2,-12(fp) + 30e68: e0bff815 stw r2,-32(fp) alt_irq_context status; if (id < ALT_NIRQ) - 31790: e0bff817 ldw r2,-32(fp) - 31794: 10800808 cmpgei r2,r2,32 - 31798: 1000271e bne r2,zero,31838 + 30e6c: e0bff817 ldw r2,-32(fp) + 30e70: 10800808 cmpgei r2,r2,32 + 30e74: 1000271e bne r2,zero,30f14 static ALT_INLINE alt_irq_context ALT_ALWAYS_INLINE alt_irq_disable_all (void) { alt_irq_context context; NIOS2_READ_STATUS (context); - 3179c: 0005303a rdctl r2,status - 317a0: e0bffb15 stw r2,-20(fp) + 30e78: 0005303a rdctl r2,status + 30e7c: e0bffb15 stw r2,-20(fp) NIOS2_WRITE_STATUS (context & ~NIOS2_STATUS_PIE_MSK); - 317a4: e0fffb17 ldw r3,-20(fp) - 317a8: 00bfff84 movi r2,-2 - 317ac: 1884703a and r2,r3,r2 - 317b0: 1001703a wrctl status,r2 + 30e80: e0fffb17 ldw r3,-20(fp) + 30e84: 00bfff84 movi r2,-2 + 30e88: 1884703a and r2,r3,r2 + 30e8c: 1001703a wrctl status,r2 return context; - 317b4: e0bffb17 ldw r2,-20(fp) + 30e90: e0bffb17 ldw r2,-20(fp) * interrupts are disabled while the handler tables are updated to ensure * that an interrupt doesn't occur while the tables are in an inconsistant * state. */ status = alt_irq_disable_all(); - 317b8: e0bffa15 stw r2,-24(fp) + 30e94: e0bffa15 stw r2,-24(fp) alt_irq[id].handler = isr; - 317bc: 008000f4 movhi r2,3 - 317c0: 109c6e04 addi r2,r2,29112 - 317c4: e0fff817 ldw r3,-32(fp) - 317c8: 180690fa slli r3,r3,3 - 317cc: 10c5883a add r2,r2,r3 - 317d0: e0fffe17 ldw r3,-8(fp) - 317d4: 10c00015 stw r3,0(r2) + 30e98: 008000f4 movhi r2,3 + 30e9c: 109a2104 addi r2,r2,26756 + 30ea0: e0fff817 ldw r3,-32(fp) + 30ea4: 180690fa slli r3,r3,3 + 30ea8: 10c5883a add r2,r2,r3 + 30eac: e0fffe17 ldw r3,-8(fp) + 30eb0: 10c00015 stw r3,0(r2) alt_irq[id].context = isr_context; - 317d8: 008000f4 movhi r2,3 - 317dc: 109c6e04 addi r2,r2,29112 - 317e0: e0fff817 ldw r3,-32(fp) - 317e4: 180690fa slli r3,r3,3 - 317e8: 10c5883a add r2,r2,r3 - 317ec: 10800104 addi r2,r2,4 - 317f0: e0ffff17 ldw r3,-4(fp) - 317f4: 10c00015 stw r3,0(r2) + 30eb4: 008000f4 movhi r2,3 + 30eb8: 109a2104 addi r2,r2,26756 + 30ebc: e0fff817 ldw r3,-32(fp) + 30ec0: 180690fa slli r3,r3,3 + 30ec4: 10c5883a add r2,r2,r3 + 30ec8: 10800104 addi r2,r2,4 + 30ecc: e0ffff17 ldw r3,-4(fp) + 30ed0: 10c00015 stw r3,0(r2) rc = (isr) ? alt_ic_irq_enable(ic_id, id) : alt_ic_irq_disable(ic_id, id); - 317f8: e0bffe17 ldw r2,-8(fp) - 317fc: 10000526 beq r2,zero,31814 - 31800: e0bff817 ldw r2,-32(fp) - 31804: 100b883a mov r5,r2 - 31808: e13ffc17 ldw r4,-16(fp) - 3180c: 00315d00 call 315d0 - 31810: 00000406 br 31824 - 31814: e0bff817 ldw r2,-32(fp) - 31818: 100b883a mov r5,r2 - 3181c: e13ffc17 ldw r4,-16(fp) - 31820: 00316700 call 31670 - 31824: e0bff715 stw r2,-36(fp) - 31828: e0bffa17 ldw r2,-24(fp) - 3182c: e0bff915 stw r2,-28(fp) + 30ed4: e0bffe17 ldw r2,-8(fp) + 30ed8: 10000526 beq r2,zero,30ef0 + 30edc: e0bff817 ldw r2,-32(fp) + 30ee0: 100b883a mov r5,r2 + 30ee4: e13ffc17 ldw r4,-16(fp) + 30ee8: 0030cac0 call 30cac + 30eec: 00000406 br 30f00 + 30ef0: e0bff817 ldw r2,-32(fp) + 30ef4: 100b883a mov r5,r2 + 30ef8: e13ffc17 ldw r4,-16(fp) + 30efc: 0030d4c0 call 30d4c + 30f00: e0bff715 stw r2,-36(fp) + 30f04: e0bffa17 ldw r2,-24(fp) + 30f08: e0bff915 stw r2,-28(fp) status &= ~NIOS2_STATUS_PIE_MSK; status |= (context & NIOS2_STATUS_PIE_MSK); NIOS2_WRITE_STATUS (status); #else NIOS2_WRITE_STATUS (context); - 31830: e0bff917 ldw r2,-28(fp) - 31834: 1001703a wrctl status,r2 + 30f0c: e0bff917 ldw r2,-28(fp) + 30f10: 1001703a wrctl status,r2 alt_irq_enable_all(status); } return rc; - 31838: e0bff717 ldw r2,-36(fp) + 30f14: e0bff717 ldw r2,-36(fp) } - 3183c: e037883a mov sp,fp - 31840: dfc00117 ldw ra,4(sp) - 31844: df000017 ldw fp,0(sp) - 31848: dec00204 addi sp,sp,8 - 3184c: f800283a ret + 30f18: e037883a mov sp,fp + 30f1c: dfc00117 ldw ra,4(sp) + 30f20: df000017 ldw fp,0(sp) + 30f24: dec00204 addi sp,sp,8 + 30f28: f800283a ret -00031850 : +00030f2c : * If the device can not be succesfully opened, then the input file descriptor * remains unchanged. */ static void alt_open_fd(alt_fd* fd, const char* name, int flags, int mode) { - 31850: defff904 addi sp,sp,-28 - 31854: dfc00615 stw ra,24(sp) - 31858: df000515 stw fp,20(sp) - 3185c: df000504 addi fp,sp,20 - 31860: e13ffc15 stw r4,-16(fp) - 31864: e17ffd15 stw r5,-12(fp) - 31868: e1bffe15 stw r6,-8(fp) - 3186c: e1ffff15 stw r7,-4(fp) + 30f2c: defff904 addi sp,sp,-28 + 30f30: dfc00615 stw ra,24(sp) + 30f34: df000515 stw fp,20(sp) + 30f38: df000504 addi fp,sp,20 + 30f3c: e13ffc15 stw r4,-16(fp) + 30f40: e17ffd15 stw r5,-12(fp) + 30f44: e1bffe15 stw r6,-8(fp) + 30f48: e1ffff15 stw r7,-4(fp) int old; old = open (name, flags, mode); - 31870: e1bfff17 ldw r6,-4(fp) - 31874: e17ffe17 ldw r5,-8(fp) - 31878: e13ffd17 ldw r4,-12(fp) - 3187c: 0031aac0 call 31aac - 31880: e0bffb15 stw r2,-20(fp) + 30f4c: e1bfff17 ldw r6,-4(fp) + 30f50: e17ffe17 ldw r5,-8(fp) + 30f54: e13ffd17 ldw r4,-12(fp) + 30f58: 00311880 call 31188 + 30f5c: e0bffb15 stw r2,-20(fp) if (old >= 0) - 31884: e0bffb17 ldw r2,-20(fp) - 31888: 10001c16 blt r2,zero,318fc + 30f60: e0bffb17 ldw r2,-20(fp) + 30f64: 10001c16 blt r2,zero,30fd8 { fd->dev = alt_fd_list[old].dev; - 3188c: 008000f4 movhi r2,3 - 31890: 108f2304 addi r2,r2,15500 - 31894: e0fffb17 ldw r3,-20(fp) - 31898: 18c00324 muli r3,r3,12 - 3189c: 10c5883a add r2,r2,r3 - 318a0: 10c00017 ldw r3,0(r2) - 318a4: e0bffc17 ldw r2,-16(fp) - 318a8: 10c00015 stw r3,0(r2) + 30f68: 008000f4 movhi r2,3 + 30f6c: 108cd604 addi r2,r2,13144 + 30f70: e0fffb17 ldw r3,-20(fp) + 30f74: 18c00324 muli r3,r3,12 + 30f78: 10c5883a add r2,r2,r3 + 30f7c: 10c00017 ldw r3,0(r2) + 30f80: e0bffc17 ldw r2,-16(fp) + 30f84: 10c00015 stw r3,0(r2) fd->priv = alt_fd_list[old].priv; - 318ac: 008000f4 movhi r2,3 - 318b0: 108f2304 addi r2,r2,15500 - 318b4: e0fffb17 ldw r3,-20(fp) - 318b8: 18c00324 muli r3,r3,12 - 318bc: 10c5883a add r2,r2,r3 - 318c0: 10800104 addi r2,r2,4 - 318c4: 10c00017 ldw r3,0(r2) - 318c8: e0bffc17 ldw r2,-16(fp) - 318cc: 10c00115 stw r3,4(r2) + 30f88: 008000f4 movhi r2,3 + 30f8c: 108cd604 addi r2,r2,13144 + 30f90: e0fffb17 ldw r3,-20(fp) + 30f94: 18c00324 muli r3,r3,12 + 30f98: 10c5883a add r2,r2,r3 + 30f9c: 10800104 addi r2,r2,4 + 30fa0: 10c00017 ldw r3,0(r2) + 30fa4: e0bffc17 ldw r2,-16(fp) + 30fa8: 10c00115 stw r3,4(r2) fd->fd_flags = alt_fd_list[old].fd_flags; - 318d0: 008000f4 movhi r2,3 - 318d4: 108f2304 addi r2,r2,15500 - 318d8: e0fffb17 ldw r3,-20(fp) - 318dc: 18c00324 muli r3,r3,12 - 318e0: 10c5883a add r2,r2,r3 - 318e4: 10800204 addi r2,r2,8 - 318e8: 10c00017 ldw r3,0(r2) - 318ec: e0bffc17 ldw r2,-16(fp) - 318f0: 10c00215 stw r3,8(r2) + 30fac: 008000f4 movhi r2,3 + 30fb0: 108cd604 addi r2,r2,13144 + 30fb4: e0fffb17 ldw r3,-20(fp) + 30fb8: 18c00324 muli r3,r3,12 + 30fbc: 10c5883a add r2,r2,r3 + 30fc0: 10800204 addi r2,r2,8 + 30fc4: 10c00017 ldw r3,0(r2) + 30fc8: e0bffc17 ldw r2,-16(fp) + 30fcc: 10c00215 stw r3,8(r2) alt_release_fd (old); - 318f4: e13ffb17 ldw r4,-20(fp) - 318f8: 00300380 call 30038 + 30fd0: e13ffb17 ldw r4,-20(fp) + 30fd4: 002f7140 call 2f714 } } - 318fc: 0001883a nop - 31900: e037883a mov sp,fp - 31904: dfc00117 ldw ra,4(sp) - 31908: df000017 ldw fp,0(sp) - 3190c: dec00204 addi sp,sp,8 - 31910: f800283a ret + 30fd8: 0001883a nop + 30fdc: e037883a mov sp,fp + 30fe0: dfc00117 ldw ra,4(sp) + 30fe4: df000017 ldw fp,0(sp) + 30fe8: dec00204 addi sp,sp,8 + 30fec: f800283a ret -00031914 : +00030ff0 : */ void alt_io_redirect(const char* stdout_dev, const char* stdin_dev, const char* stderr_dev) { - 31914: defffb04 addi sp,sp,-20 - 31918: dfc00415 stw ra,16(sp) - 3191c: df000315 stw fp,12(sp) - 31920: df000304 addi fp,sp,12 - 31924: e13ffd15 stw r4,-12(fp) - 31928: e17ffe15 stw r5,-8(fp) - 3192c: e1bfff15 stw r6,-4(fp) + 30ff0: defffb04 addi sp,sp,-20 + 30ff4: dfc00415 stw ra,16(sp) + 30ff8: df000315 stw fp,12(sp) + 30ffc: df000304 addi fp,sp,12 + 31000: e13ffd15 stw r4,-12(fp) + 31004: e17ffe15 stw r5,-8(fp) + 31008: e1bfff15 stw r6,-4(fp) /* Redirect the channels */ alt_open_fd (&alt_fd_list[STDOUT_FILENO], stdout_dev, O_WRONLY, 0777); - 31930: 01c07fc4 movi r7,511 - 31934: 01800044 movi r6,1 - 31938: e17ffd17 ldw r5,-12(fp) - 3193c: 010000f4 movhi r4,3 - 31940: 210f2604 addi r4,r4,15512 - 31944: 00318500 call 31850 + 3100c: 01c07fc4 movi r7,511 + 31010: 01800044 movi r6,1 + 31014: e17ffd17 ldw r5,-12(fp) + 31018: 010000f4 movhi r4,3 + 3101c: 210cd904 addi r4,r4,13156 + 31020: 0030f2c0 call 30f2c alt_open_fd (&alt_fd_list[STDIN_FILENO], stdin_dev, O_RDONLY, 0777); - 31948: 01c07fc4 movi r7,511 - 3194c: 000d883a mov r6,zero - 31950: e17ffe17 ldw r5,-8(fp) - 31954: 010000f4 movhi r4,3 - 31958: 210f2304 addi r4,r4,15500 - 3195c: 00318500 call 31850 + 31024: 01c07fc4 movi r7,511 + 31028: 000d883a mov r6,zero + 3102c: e17ffe17 ldw r5,-8(fp) + 31030: 010000f4 movhi r4,3 + 31034: 210cd604 addi r4,r4,13144 + 31038: 0030f2c0 call 30f2c alt_open_fd (&alt_fd_list[STDERR_FILENO], stderr_dev, O_WRONLY, 0777); - 31960: 01c07fc4 movi r7,511 - 31964: 01800044 movi r6,1 - 31968: e17fff17 ldw r5,-4(fp) - 3196c: 010000f4 movhi r4,3 - 31970: 210f2904 addi r4,r4,15524 - 31974: 00318500 call 31850 + 3103c: 01c07fc4 movi r7,511 + 31040: 01800044 movi r6,1 + 31044: e17fff17 ldw r5,-4(fp) + 31048: 010000f4 movhi r4,3 + 3104c: 210cdc04 addi r4,r4,13168 + 31050: 0030f2c0 call 30f2c } - 31978: 0001883a nop - 3197c: e037883a mov sp,fp - 31980: dfc00117 ldw ra,4(sp) - 31984: df000017 ldw fp,0(sp) - 31988: dec00204 addi sp,sp,8 - 3198c: f800283a ret + 31054: 0001883a nop + 31058: e037883a mov sp,fp + 3105c: dfc00117 ldw ra,4(sp) + 31060: df000017 ldw fp,0(sp) + 31064: dec00204 addi sp,sp,8 + 31068: f800283a ret -00031990 : +0003106c : #undef errno extern int errno; static ALT_INLINE int* alt_get_errno(void) { - 31990: defffe04 addi sp,sp,-8 - 31994: dfc00115 stw ra,4(sp) - 31998: df000015 stw fp,0(sp) - 3199c: d839883a mov fp,sp + 3106c: defffe04 addi sp,sp,-8 + 31070: dfc00115 stw ra,4(sp) + 31074: df000015 stw fp,0(sp) + 31078: d839883a mov fp,sp return ((alt_errno) ? alt_errno() : &errno); - 319a0: 008000f4 movhi r2,3 - 319a4: 1093a904 addi r2,r2,20132 - 319a8: 10800017 ldw r2,0(r2) - 319ac: 10000526 beq r2,zero,319c4 - 319b0: 008000f4 movhi r2,3 - 319b4: 1093a904 addi r2,r2,20132 - 319b8: 10800017 ldw r2,0(r2) - 319bc: 103ee83a callr r2 - 319c0: 00000206 br 319cc - 319c4: 008000f4 movhi r2,3 - 319c8: 109c5904 addi r2,r2,29028 + 3107c: 008000f4 movhi r2,3 + 31080: 10915c04 addi r2,r2,17776 + 31084: 10800017 ldw r2,0(r2) + 31088: 10000526 beq r2,zero,310a0 + 3108c: 008000f4 movhi r2,3 + 31090: 10915c04 addi r2,r2,17776 + 31094: 10800017 ldw r2,0(r2) + 31098: 103ee83a callr r2 + 3109c: 00000206 br 310a8 + 310a0: 008000f4 movhi r2,3 + 310a4: 109a0c04 addi r2,r2,26672 } - 319cc: e037883a mov sp,fp - 319d0: dfc00117 ldw ra,4(sp) - 319d4: df000017 ldw fp,0(sp) - 319d8: dec00204 addi sp,sp,8 - 319dc: f800283a ret + 310a8: e037883a mov sp,fp + 310ac: dfc00117 ldw ra,4(sp) + 310b0: df000017 ldw fp,0(sp) + 310b4: dec00204 addi sp,sp,8 + 310b8: f800283a ret -000319e0 : +000310bc : * performed for devices. Filesystems are required to handle the ioctl() call * themselves, and report the error from the filesystems open() function. */ static int alt_file_locked (alt_fd* fd) { - 319e0: defffd04 addi sp,sp,-12 - 319e4: df000215 stw fp,8(sp) - 319e8: df000204 addi fp,sp,8 - 319ec: e13fff15 stw r4,-4(fp) + 310bc: defffd04 addi sp,sp,-12 + 310c0: df000215 stw fp,8(sp) + 310c4: df000204 addi fp,sp,8 + 310c8: e13fff15 stw r4,-4(fp) /* * Mark the file descriptor as belonging to a device. */ fd->fd_flags |= ALT_FD_DEV; - 319f0: e0bfff17 ldw r2,-4(fp) - 319f4: 10800217 ldw r2,8(r2) - 319f8: 10d00034 orhi r3,r2,16384 - 319fc: e0bfff17 ldw r2,-4(fp) - 31a00: 10c00215 stw r3,8(r2) + 310cc: e0bfff17 ldw r2,-4(fp) + 310d0: 10800217 ldw r2,8(r2) + 310d4: 10d00034 orhi r3,r2,16384 + 310d8: e0bfff17 ldw r2,-4(fp) + 310dc: 10c00215 stw r3,8(r2) /* * Loop through all current file descriptors searching for one that's locked * for exclusive access. If a match is found, generate an error. */ for (i = 0; i <= alt_max_fd; i++) - 31a04: e03ffe15 stw zero,-8(fp) - 31a08: 00001d06 br 31a80 + 310e0: e03ffe15 stw zero,-8(fp) + 310e4: 00001d06 br 3115c { if ((alt_fd_list[i].dev == fd->dev) && - 31a0c: 008000f4 movhi r2,3 - 31a10: 108f2304 addi r2,r2,15500 - 31a14: e0fffe17 ldw r3,-8(fp) - 31a18: 18c00324 muli r3,r3,12 - 31a1c: 10c5883a add r2,r2,r3 - 31a20: 10c00017 ldw r3,0(r2) - 31a24: e0bfff17 ldw r2,-4(fp) - 31a28: 10800017 ldw r2,0(r2) - 31a2c: 1880111e bne r3,r2,31a74 + 310e8: 008000f4 movhi r2,3 + 310ec: 108cd604 addi r2,r2,13144 + 310f0: e0fffe17 ldw r3,-8(fp) + 310f4: 18c00324 muli r3,r3,12 + 310f8: 10c5883a add r2,r2,r3 + 310fc: 10c00017 ldw r3,0(r2) + 31100: e0bfff17 ldw r2,-4(fp) + 31104: 10800017 ldw r2,0(r2) + 31108: 1880111e bne r3,r2,31150 (alt_fd_list[i].fd_flags & ALT_FD_EXCL) && - 31a30: 008000f4 movhi r2,3 - 31a34: 108f2304 addi r2,r2,15500 - 31a38: e0fffe17 ldw r3,-8(fp) - 31a3c: 18c00324 muli r3,r3,12 - 31a40: 10c5883a add r2,r2,r3 - 31a44: 10800204 addi r2,r2,8 - 31a48: 10800017 ldw r2,0(r2) + 3110c: 008000f4 movhi r2,3 + 31110: 108cd604 addi r2,r2,13144 + 31114: e0fffe17 ldw r3,-8(fp) + 31118: 18c00324 muli r3,r3,12 + 3111c: 10c5883a add r2,r2,r3 + 31120: 10800204 addi r2,r2,8 + 31124: 10800017 ldw r2,0(r2) * for exclusive access. If a match is found, generate an error. */ for (i = 0; i <= alt_max_fd; i++) { if ((alt_fd_list[i].dev == fd->dev) && - 31a4c: 1000090e bge r2,zero,31a74 + 31128: 1000090e bge r2,zero,31150 (alt_fd_list[i].fd_flags & ALT_FD_EXCL) && (&alt_fd_list[i] != fd)) - 31a50: e0bffe17 ldw r2,-8(fp) - 31a54: 10c00324 muli r3,r2,12 - 31a58: 008000f4 movhi r2,3 - 31a5c: 108f2304 addi r2,r2,15500 - 31a60: 1887883a add r3,r3,r2 + 3112c: e0bffe17 ldw r2,-8(fp) + 31130: 10c00324 muli r3,r2,12 + 31134: 008000f4 movhi r2,3 + 31138: 108cd604 addi r2,r2,13144 + 3113c: 1887883a add r3,r3,r2 */ for (i = 0; i <= alt_max_fd; i++) { if ((alt_fd_list[i].dev == fd->dev) && (alt_fd_list[i].fd_flags & ALT_FD_EXCL) && - 31a64: e0bfff17 ldw r2,-4(fp) - 31a68: 18800226 beq r3,r2,31a74 + 31140: e0bfff17 ldw r2,-4(fp) + 31144: 18800226 beq r3,r2,31150 (&alt_fd_list[i] != fd)) { return -EACCES; - 31a6c: 00bffcc4 movi r2,-13 - 31a70: 00000a06 br 31a9c + 31148: 00bffcc4 movi r2,-13 + 3114c: 00000a06 br 31178 /* * Loop through all current file descriptors searching for one that's locked * for exclusive access. If a match is found, generate an error. */ for (i = 0; i <= alt_max_fd; i++) - 31a74: e0bffe17 ldw r2,-8(fp) - 31a78: 10800044 addi r2,r2,1 - 31a7c: e0bffe15 stw r2,-8(fp) - 31a80: 008000f4 movhi r2,3 - 31a84: 1093a804 addi r2,r2,20128 - 31a88: 10800017 ldw r2,0(r2) - 31a8c: 1007883a mov r3,r2 - 31a90: e0bffe17 ldw r2,-8(fp) - 31a94: 18bfdd2e bgeu r3,r2,31a0c + 31150: e0bffe17 ldw r2,-8(fp) + 31154: 10800044 addi r2,r2,1 + 31158: e0bffe15 stw r2,-8(fp) + 3115c: 008000f4 movhi r2,3 + 31160: 10915b04 addi r2,r2,17772 + 31164: 10800017 ldw r2,0(r2) + 31168: 1007883a mov r3,r2 + 3116c: e0bffe17 ldw r2,-8(fp) + 31170: 18bfdd2e bgeu r3,r2,310e8 <_gp+0xffff4bb0> } } /* The device is not locked */ return 0; - 31a98: 0005883a mov r2,zero + 31174: 0005883a mov r2,zero } - 31a9c: e037883a mov sp,fp - 31aa0: df000017 ldw fp,0(sp) - 31aa4: dec00104 addi sp,sp,4 - 31aa8: f800283a ret + 31178: e037883a mov sp,fp + 3117c: df000017 ldw fp,0(sp) + 31180: dec00104 addi sp,sp,4 + 31184: f800283a ret -00031aac : +00031188 : * * ALT_OPEN is mapped onto the open() system call in alt_syscall.h */ int ALT_OPEN (const char* file, int flags, int mode) { - 31aac: defff604 addi sp,sp,-40 - 31ab0: dfc00915 stw ra,36(sp) - 31ab4: df000815 stw fp,32(sp) - 31ab8: df000804 addi fp,sp,32 - 31abc: e13ffd15 stw r4,-12(fp) - 31ac0: e17ffe15 stw r5,-8(fp) - 31ac4: e1bfff15 stw r6,-4(fp) + 31188: defff604 addi sp,sp,-40 + 3118c: dfc00915 stw ra,36(sp) + 31190: df000815 stw fp,32(sp) + 31194: df000804 addi fp,sp,32 + 31198: e13ffd15 stw r4,-12(fp) + 3119c: e17ffe15 stw r5,-8(fp) + 311a0: e1bfff15 stw r6,-4(fp) alt_dev* dev; alt_fd* fd; int index = -1; - 31ac8: 00bfffc4 movi r2,-1 - 31acc: e0bff915 stw r2,-28(fp) + 311a4: 00bfffc4 movi r2,-1 + 311a8: e0bff915 stw r2,-28(fp) int status = -ENODEV; - 31ad0: 00bffb44 movi r2,-19 - 31ad4: e0bffa15 stw r2,-24(fp) + 311ac: 00bffb44 movi r2,-19 + 311b0: e0bffa15 stw r2,-24(fp) int isafs = 0; - 31ad8: e03ffb15 stw zero,-20(fp) + 311b4: e03ffb15 stw zero,-20(fp) /* * Check the device list, to see if a device with a matching name is * registered. */ if (!(dev = alt_find_dev (file, &alt_dev_list))) - 31adc: 014000f4 movhi r5,3 - 31ae0: 2953a604 addi r5,r5,20120 - 31ae4: e13ffd17 ldw r4,-12(fp) - 31ae8: 0031c280 call 31c28 - 31aec: e0bff815 stw r2,-32(fp) - 31af0: e0bff817 ldw r2,-32(fp) - 31af4: 1000051e bne r2,zero,31b0c + 311b8: 014000f4 movhi r5,3 + 311bc: 29515904 addi r5,r5,17764 + 311c0: e13ffd17 ldw r4,-12(fp) + 311c4: 00313040 call 31304 + 311c8: e0bff815 stw r2,-32(fp) + 311cc: e0bff817 ldw r2,-32(fp) + 311d0: 1000051e bne r2,zero,311e8 { /* No matching device, so try the filesystem list */ dev = alt_find_file (file); - 31af8: e13ffd17 ldw r4,-12(fp) - 31afc: 0031cb80 call 31cb8 - 31b00: e0bff815 stw r2,-32(fp) + 311d4: e13ffd17 ldw r4,-12(fp) + 311d8: 00313940 call 31394 + 311dc: e0bff815 stw r2,-32(fp) isafs = 1; - 31b04: 00800044 movi r2,1 - 31b08: e0bffb15 stw r2,-20(fp) + 311e0: 00800044 movi r2,1 + 311e4: e0bffb15 stw r2,-20(fp) /* * If a matching device or filesystem is found, allocate a file descriptor. */ if (dev) - 31b0c: e0bff817 ldw r2,-32(fp) - 31b10: 10002926 beq r2,zero,31bb8 + 311e8: e0bff817 ldw r2,-32(fp) + 311ec: 10002926 beq r2,zero,31294 { if ((index = alt_get_fd (dev)) < 0) - 31b14: e13ff817 ldw r4,-32(fp) - 31b18: 0031dcc0 call 31dcc - 31b1c: e0bff915 stw r2,-28(fp) - 31b20: e0bff917 ldw r2,-28(fp) - 31b24: 1000030e bge r2,zero,31b34 + 311f0: e13ff817 ldw r4,-32(fp) + 311f4: 00314a80 call 314a8 + 311f8: e0bff915 stw r2,-28(fp) + 311fc: e0bff917 ldw r2,-28(fp) + 31200: 1000030e bge r2,zero,31210 { status = index; - 31b28: e0bff917 ldw r2,-28(fp) - 31b2c: e0bffa15 stw r2,-24(fp) - 31b30: 00002306 br 31bc0 + 31204: e0bff917 ldw r2,-28(fp) + 31208: e0bffa15 stw r2,-24(fp) + 3120c: 00002306 br 3129c } else { fd = &alt_fd_list[index]; - 31b34: e0bff917 ldw r2,-28(fp) - 31b38: 10c00324 muli r3,r2,12 - 31b3c: 008000f4 movhi r2,3 - 31b40: 108f2304 addi r2,r2,15500 - 31b44: 1885883a add r2,r3,r2 - 31b48: e0bffc15 stw r2,-16(fp) + 31210: e0bff917 ldw r2,-28(fp) + 31214: 10c00324 muli r3,r2,12 + 31218: 008000f4 movhi r2,3 + 3121c: 108cd604 addi r2,r2,13144 + 31220: 1885883a add r2,r3,r2 + 31224: e0bffc15 stw r2,-16(fp) fd->fd_flags = (flags & ~ALT_FD_FLAGS_MASK); - 31b4c: e0fffe17 ldw r3,-8(fp) - 31b50: 00900034 movhi r2,16384 - 31b54: 10bfffc4 addi r2,r2,-1 - 31b58: 1886703a and r3,r3,r2 - 31b5c: e0bffc17 ldw r2,-16(fp) - 31b60: 10c00215 stw r3,8(r2) + 31228: e0fffe17 ldw r3,-8(fp) + 3122c: 00900034 movhi r2,16384 + 31230: 10bfffc4 addi r2,r2,-1 + 31234: 1886703a and r3,r3,r2 + 31238: e0bffc17 ldw r2,-16(fp) + 3123c: 10c00215 stw r3,8(r2) /* If this is a device, ensure it isn't already locked */ if (isafs || ((status = alt_file_locked (fd)) >= 0)) - 31b64: e0bffb17 ldw r2,-20(fp) - 31b68: 1000051e bne r2,zero,31b80 - 31b6c: e13ffc17 ldw r4,-16(fp) - 31b70: 00319e00 call 319e0 - 31b74: e0bffa15 stw r2,-24(fp) - 31b78: e0bffa17 ldw r2,-24(fp) - 31b7c: 10001016 blt r2,zero,31bc0 + 31240: e0bffb17 ldw r2,-20(fp) + 31244: 1000051e bne r2,zero,3125c + 31248: e13ffc17 ldw r4,-16(fp) + 3124c: 00310bc0 call 310bc + 31250: e0bffa15 stw r2,-24(fp) + 31254: e0bffa17 ldw r2,-24(fp) + 31258: 10001016 blt r2,zero,3129c /* * If the device or filesystem provides an open() callback function, * call it now to perform any device/filesystem specific operations. */ status = (dev->open) ? dev->open(fd, file, flags, mode): 0; - 31b80: e0bff817 ldw r2,-32(fp) - 31b84: 10800317 ldw r2,12(r2) - 31b88: 10000826 beq r2,zero,31bac - 31b8c: e0bff817 ldw r2,-32(fp) - 31b90: 10800317 ldw r2,12(r2) - 31b94: e1ffff17 ldw r7,-4(fp) - 31b98: e1bffe17 ldw r6,-8(fp) - 31b9c: e17ffd17 ldw r5,-12(fp) - 31ba0: e13ffc17 ldw r4,-16(fp) - 31ba4: 103ee83a callr r2 - 31ba8: 00000106 br 31bb0 - 31bac: 0005883a mov r2,zero - 31bb0: e0bffa15 stw r2,-24(fp) - 31bb4: 00000206 br 31bc0 + 3125c: e0bff817 ldw r2,-32(fp) + 31260: 10800317 ldw r2,12(r2) + 31264: 10000826 beq r2,zero,31288 + 31268: e0bff817 ldw r2,-32(fp) + 3126c: 10800317 ldw r2,12(r2) + 31270: e1ffff17 ldw r7,-4(fp) + 31274: e1bffe17 ldw r6,-8(fp) + 31278: e17ffd17 ldw r5,-12(fp) + 3127c: e13ffc17 ldw r4,-16(fp) + 31280: 103ee83a callr r2 + 31284: 00000106 br 3128c + 31288: 0005883a mov r2,zero + 3128c: e0bffa15 stw r2,-24(fp) + 31290: 00000206 br 3129c } } } else { status = -ENODEV; - 31bb8: 00bffb44 movi r2,-19 - 31bbc: e0bffa15 stw r2,-24(fp) + 31294: 00bffb44 movi r2,-19 + 31298: e0bffa15 stw r2,-24(fp) } /* Allocation failed, so clean up and return an error */ if (status < 0) - 31bc0: e0bffa17 ldw r2,-24(fp) - 31bc4: 1000090e bge r2,zero,31bec + 3129c: e0bffa17 ldw r2,-24(fp) + 312a0: 1000090e bge r2,zero,312c8 { alt_release_fd (index); - 31bc8: e13ff917 ldw r4,-28(fp) - 31bcc: 00300380 call 30038 + 312a4: e13ff917 ldw r4,-28(fp) + 312a8: 002f7140 call 2f714 ALT_ERRNO = -status; - 31bd0: 00319900 call 31990 - 31bd4: 1007883a mov r3,r2 - 31bd8: e0bffa17 ldw r2,-24(fp) - 31bdc: 0085c83a sub r2,zero,r2 - 31be0: 18800015 stw r2,0(r3) + 312ac: 003106c0 call 3106c + 312b0: 1007883a mov r3,r2 + 312b4: e0bffa17 ldw r2,-24(fp) + 312b8: 0085c83a sub r2,zero,r2 + 312bc: 18800015 stw r2,0(r3) return -1; - 31be4: 00bfffc4 movi r2,-1 - 31be8: 00000106 br 31bf0 + 312c0: 00bfffc4 movi r2,-1 + 312c4: 00000106 br 312cc } /* return the reference upon success */ return index; - 31bec: e0bff917 ldw r2,-28(fp) + 312c8: e0bff917 ldw r2,-28(fp) } - 31bf0: e037883a mov sp,fp - 31bf4: dfc00117 ldw ra,4(sp) - 31bf8: df000017 ldw fp,0(sp) - 31bfc: dec00204 addi sp,sp,8 - 31c00: f800283a ret + 312cc: e037883a mov sp,fp + 312d0: dfc00117 ldw ra,4(sp) + 312d4: df000017 ldw fp,0(sp) + 312d8: dec00204 addi sp,sp,8 + 312dc: f800283a ret -00031c04 : +000312e0 : /* * To initialize the internal interrupt controller, just clear the IENABLE * register so that all possible IRQs are disabled. */ void altera_nios2_gen2_irq_init(void) { - 31c04: deffff04 addi sp,sp,-4 - 31c08: df000015 stw fp,0(sp) - 31c0c: d839883a mov fp,sp + 312e0: deffff04 addi sp,sp,-4 + 312e4: df000015 stw fp,0(sp) + 312e8: d839883a mov fp,sp NIOS2_WRITE_IENABLE(0); - 31c10: 000170fa wrctl ienable,zero + 312ec: 000170fa wrctl ienable,zero } - 31c14: 0001883a nop - 31c18: e037883a mov sp,fp - 31c1c: df000017 ldw fp,0(sp) - 31c20: dec00104 addi sp,sp,4 - 31c24: f800283a ret + 312f0: 0001883a nop + 312f4: e037883a mov sp,fp + 312f8: df000017 ldw fp,0(sp) + 312fc: dec00104 addi sp,sp,4 + 31300: f800283a ret -00031c28 : +00031304 : * "name" must be an exact match for the devices registered name for a match to * be found. */ alt_dev* alt_find_dev(const char* name, alt_llist* llist) { - 31c28: defffa04 addi sp,sp,-24 - 31c2c: dfc00515 stw ra,20(sp) - 31c30: df000415 stw fp,16(sp) - 31c34: df000404 addi fp,sp,16 - 31c38: e13ffe15 stw r4,-8(fp) - 31c3c: e17fff15 stw r5,-4(fp) + 31304: defffa04 addi sp,sp,-24 + 31308: dfc00515 stw ra,20(sp) + 3130c: df000415 stw fp,16(sp) + 31310: df000404 addi fp,sp,16 + 31314: e13ffe15 stw r4,-8(fp) + 31318: e17fff15 stw r5,-4(fp) alt_dev* next = (alt_dev*) llist->next; - 31c40: e0bfff17 ldw r2,-4(fp) - 31c44: 10800017 ldw r2,0(r2) - 31c48: e0bffc15 stw r2,-16(fp) + 3131c: e0bfff17 ldw r2,-4(fp) + 31320: 10800017 ldw r2,0(r2) + 31324: e0bffc15 stw r2,-16(fp) alt_32 len; len = strlen(name) + 1; - 31c4c: e13ffe17 ldw r4,-8(fp) - 31c50: 002376c0 call 2376c - 31c54: 10800044 addi r2,r2,1 - 31c58: e0bffd15 stw r2,-12(fp) + 31328: e13ffe17 ldw r4,-8(fp) + 3132c: 00231a80 call 231a8 + 31330: 10800044 addi r2,r2,1 + 31334: e0bffd15 stw r2,-12(fp) /* * Check each list entry in turn, until a match is found, or we reach the * end of the list (i.e. next winds up pointing back to the list head). */ while (next != (alt_dev*) llist) - 31c5c: 00000d06 br 31c94 + 31338: 00000d06 br 31370 /* * memcmp() is used here rather than strcmp() in order to reduce the size * of the executable. */ if (!memcmp (next->name, name, len)) - 31c60: e0bffc17 ldw r2,-16(fp) - 31c64: 10800217 ldw r2,8(r2) - 31c68: e0fffd17 ldw r3,-12(fp) - 31c6c: 180d883a mov r6,r3 - 31c70: e17ffe17 ldw r5,-8(fp) - 31c74: 1009883a mov r4,r2 - 31c78: 0031ff80 call 31ff8 - 31c7c: 1000021e bne r2,zero,31c88 + 3133c: e0bffc17 ldw r2,-16(fp) + 31340: 10800217 ldw r2,8(r2) + 31344: e0fffd17 ldw r3,-12(fp) + 31348: 180d883a mov r6,r3 + 3134c: e17ffe17 ldw r5,-8(fp) + 31350: 1009883a mov r4,r2 + 31354: 00316d40 call 316d4 + 31358: 1000021e bne r2,zero,31364 { /* match found */ return next; - 31c80: e0bffc17 ldw r2,-16(fp) - 31c84: 00000706 br 31ca4 + 3135c: e0bffc17 ldw r2,-16(fp) + 31360: 00000706 br 31380 } next = (alt_dev*) next->llist.next; - 31c88: e0bffc17 ldw r2,-16(fp) - 31c8c: 10800017 ldw r2,0(r2) - 31c90: e0bffc15 stw r2,-16(fp) + 31364: e0bffc17 ldw r2,-16(fp) + 31368: 10800017 ldw r2,0(r2) + 3136c: e0bffc15 stw r2,-16(fp) /* * Check each list entry in turn, until a match is found, or we reach the * end of the list (i.e. next winds up pointing back to the list head). */ while (next != (alt_dev*) llist) - 31c94: e0fffc17 ldw r3,-16(fp) - 31c98: e0bfff17 ldw r2,-4(fp) - 31c9c: 18bff01e bne r3,r2,31c60 + 31370: e0fffc17 ldw r3,-16(fp) + 31374: e0bfff17 ldw r2,-4(fp) + 31378: 18bff01e bne r3,r2,3133c <_gp+0xffff4e04> next = (alt_dev*) next->llist.next; } /* No match found */ return NULL; - 31ca0: 0005883a mov r2,zero + 3137c: 0005883a mov r2,zero } - 31ca4: e037883a mov sp,fp - 31ca8: dfc00117 ldw ra,4(sp) - 31cac: df000017 ldw fp,0(sp) - 31cb0: dec00204 addi sp,sp,8 - 31cb4: f800283a ret + 31380: e037883a mov sp,fp + 31384: dfc00117 ldw ra,4(sp) + 31388: df000017 ldw fp,0(sp) + 3138c: dec00204 addi sp,sp,8 + 31390: f800283a ret -00031cb8 : +00031394 : * either '/' or '\0' is the prefix of the filename. For example the filename: * "/myfilesystem/junk.txt" would match: "/myfilesystem", but not: "/myfile". */ alt_dev* alt_find_file (const char* name) { - 31cb8: defffb04 addi sp,sp,-20 - 31cbc: dfc00415 stw ra,16(sp) - 31cc0: df000315 stw fp,12(sp) - 31cc4: df000304 addi fp,sp,12 - 31cc8: e13fff15 stw r4,-4(fp) + 31394: defffb04 addi sp,sp,-20 + 31398: dfc00415 stw ra,16(sp) + 3139c: df000315 stw fp,12(sp) + 313a0: df000304 addi fp,sp,12 + 313a4: e13fff15 stw r4,-4(fp) alt_dev* next = (alt_dev*) alt_fs_list.next; - 31ccc: 008000f4 movhi r2,3 - 31cd0: 1093a404 addi r2,r2,20112 - 31cd4: 10800017 ldw r2,0(r2) - 31cd8: e0bffd15 stw r2,-12(fp) + 313a8: 008000f4 movhi r2,3 + 313ac: 10915704 addi r2,r2,17756 + 313b0: 10800017 ldw r2,0(r2) + 313b4: e0bffd15 stw r2,-12(fp) /* * Check each list entry in turn, until a match is found, or we reach the * end of the list (i.e. next winds up pointing back to the list head). */ while (next != (alt_dev*) &alt_fs_list) - 31cdc: 00003106 br 31da4 + 313b8: 00003106 br 31480 { len = strlen(next->name); - 31ce0: e0bffd17 ldw r2,-12(fp) - 31ce4: 10800217 ldw r2,8(r2) - 31ce8: 1009883a mov r4,r2 - 31cec: 002376c0 call 2376c - 31cf0: e0bffe15 stw r2,-8(fp) + 313bc: e0bffd17 ldw r2,-12(fp) + 313c0: 10800217 ldw r2,8(r2) + 313c4: 1009883a mov r4,r2 + 313c8: 00231a80 call 231a8 + 313cc: e0bffe15 stw r2,-8(fp) if (next->name[len-1] == '/') - 31cf4: e0bffd17 ldw r2,-12(fp) - 31cf8: 10c00217 ldw r3,8(r2) - 31cfc: e0bffe17 ldw r2,-8(fp) - 31d00: 10bfffc4 addi r2,r2,-1 - 31d04: 1885883a add r2,r3,r2 - 31d08: 10800003 ldbu r2,0(r2) - 31d0c: 10803fcc andi r2,r2,255 - 31d10: 1080201c xori r2,r2,128 - 31d14: 10bfe004 addi r2,r2,-128 - 31d18: 10800bd8 cmpnei r2,r2,47 - 31d1c: 1000031e bne r2,zero,31d2c + 313d0: e0bffd17 ldw r2,-12(fp) + 313d4: 10c00217 ldw r3,8(r2) + 313d8: e0bffe17 ldw r2,-8(fp) + 313dc: 10bfffc4 addi r2,r2,-1 + 313e0: 1885883a add r2,r3,r2 + 313e4: 10800003 ldbu r2,0(r2) + 313e8: 10803fcc andi r2,r2,255 + 313ec: 1080201c xori r2,r2,128 + 313f0: 10bfe004 addi r2,r2,-128 + 313f4: 10800bd8 cmpnei r2,r2,47 + 313f8: 1000031e bne r2,zero,31408 { len -= 1; - 31d20: e0bffe17 ldw r2,-8(fp) - 31d24: 10bfffc4 addi r2,r2,-1 - 31d28: e0bffe15 stw r2,-8(fp) + 313fc: e0bffe17 ldw r2,-8(fp) + 31400: 10bfffc4 addi r2,r2,-1 + 31404: e0bffe15 stw r2,-8(fp) } if (((name[len] == '/') || (name[len] == '\0')) && - 31d2c: e0bffe17 ldw r2,-8(fp) - 31d30: e0ffff17 ldw r3,-4(fp) - 31d34: 1885883a add r2,r3,r2 - 31d38: 10800003 ldbu r2,0(r2) - 31d3c: 10803fcc andi r2,r2,255 - 31d40: 1080201c xori r2,r2,128 - 31d44: 10bfe004 addi r2,r2,-128 - 31d48: 10800be0 cmpeqi r2,r2,47 - 31d4c: 1000081e bne r2,zero,31d70 - 31d50: e0bffe17 ldw r2,-8(fp) - 31d54: e0ffff17 ldw r3,-4(fp) - 31d58: 1885883a add r2,r3,r2 - 31d5c: 10800003 ldbu r2,0(r2) - 31d60: 10803fcc andi r2,r2,255 - 31d64: 1080201c xori r2,r2,128 - 31d68: 10bfe004 addi r2,r2,-128 - 31d6c: 10000a1e bne r2,zero,31d98 + 31408: e0bffe17 ldw r2,-8(fp) + 3140c: e0ffff17 ldw r3,-4(fp) + 31410: 1885883a add r2,r3,r2 + 31414: 10800003 ldbu r2,0(r2) + 31418: 10803fcc andi r2,r2,255 + 3141c: 1080201c xori r2,r2,128 + 31420: 10bfe004 addi r2,r2,-128 + 31424: 10800be0 cmpeqi r2,r2,47 + 31428: 1000081e bne r2,zero,3144c + 3142c: e0bffe17 ldw r2,-8(fp) + 31430: e0ffff17 ldw r3,-4(fp) + 31434: 1885883a add r2,r3,r2 + 31438: 10800003 ldbu r2,0(r2) + 3143c: 10803fcc andi r2,r2,255 + 31440: 1080201c xori r2,r2,128 + 31444: 10bfe004 addi r2,r2,-128 + 31448: 10000a1e bne r2,zero,31474 !memcmp (next->name, name, len)) - 31d70: e0bffd17 ldw r2,-12(fp) - 31d74: 10800217 ldw r2,8(r2) - 31d78: e0fffe17 ldw r3,-8(fp) - 31d7c: 180d883a mov r6,r3 - 31d80: e17fff17 ldw r5,-4(fp) - 31d84: 1009883a mov r4,r2 - 31d88: 0031ff80 call 31ff8 + 3144c: e0bffd17 ldw r2,-12(fp) + 31450: 10800217 ldw r2,8(r2) + 31454: e0fffe17 ldw r3,-8(fp) + 31458: 180d883a mov r6,r3 + 3145c: e17fff17 ldw r5,-4(fp) + 31460: 1009883a mov r4,r2 + 31464: 00316d40 call 316d4 if (next->name[len-1] == '/') { len -= 1; } if (((name[len] == '/') || (name[len] == '\0')) && - 31d8c: 1000021e bne r2,zero,31d98 + 31468: 1000021e bne r2,zero,31474 !memcmp (next->name, name, len)) { /* match found */ return next; - 31d90: e0bffd17 ldw r2,-12(fp) - 31d94: 00000806 br 31db8 + 3146c: e0bffd17 ldw r2,-12(fp) + 31470: 00000806 br 31494 } next = (alt_dev*) next->llist.next; - 31d98: e0bffd17 ldw r2,-12(fp) - 31d9c: 10800017 ldw r2,0(r2) - 31da0: e0bffd15 stw r2,-12(fp) + 31474: e0bffd17 ldw r2,-12(fp) + 31478: 10800017 ldw r2,0(r2) + 3147c: e0bffd15 stw r2,-12(fp) /* * Check each list entry in turn, until a match is found, or we reach the * end of the list (i.e. next winds up pointing back to the list head). */ while (next != (alt_dev*) &alt_fs_list) - 31da4: e0fffd17 ldw r3,-12(fp) - 31da8: 008000f4 movhi r2,3 - 31dac: 1093a404 addi r2,r2,20112 - 31db0: 18bfcb1e bne r3,r2,31ce0 + 31480: e0fffd17 ldw r3,-12(fp) + 31484: 008000f4 movhi r2,3 + 31488: 10915704 addi r2,r2,17756 + 3148c: 18bfcb1e bne r3,r2,313bc <_gp+0xffff4e84> next = (alt_dev*) next->llist.next; } /* No match found */ return NULL; - 31db4: 0005883a mov r2,zero + 31490: 0005883a mov r2,zero } - 31db8: e037883a mov sp,fp - 31dbc: dfc00117 ldw ra,4(sp) - 31dc0: df000017 ldw fp,0(sp) - 31dc4: dec00204 addi sp,sp,8 - 31dc8: f800283a ret + 31494: e037883a mov sp,fp + 31498: dfc00117 ldw ra,4(sp) + 3149c: df000017 ldw fp,0(sp) + 314a0: dec00204 addi sp,sp,8 + 314a4: f800283a ret -00031dcc : +000314a8 : * the offset of the file descriptor within the file descriptor array). A * negative value indicates failure. */ int alt_get_fd (alt_dev* dev) { - 31dcc: defffc04 addi sp,sp,-16 - 31dd0: df000315 stw fp,12(sp) - 31dd4: df000304 addi fp,sp,12 - 31dd8: e13fff15 stw r4,-4(fp) + 314a8: defffc04 addi sp,sp,-16 + 314ac: df000315 stw fp,12(sp) + 314b0: df000304 addi fp,sp,12 + 314b4: e13fff15 stw r4,-4(fp) alt_32 i; int rc = -EMFILE; - 31ddc: 00bffa04 movi r2,-24 - 31de0: e0bffe15 stw r2,-8(fp) + 314b8: 00bffa04 movi r2,-24 + 314bc: e0bffe15 stw r2,-8(fp) * indicates the highest file descriptor ever allocated. This is used to * improve efficency when searching the file descriptor list, and * therefore reduce contention on the alt_fd_list_lock semaphore. */ for (i = 0; i < ALT_MAX_FD; i++) - 31de4: e03ffd15 stw zero,-12(fp) - 31de8: 00001d06 br 31e60 + 314c0: e03ffd15 stw zero,-12(fp) + 314c4: 00001d06 br 3153c { if (!alt_fd_list[i].dev) - 31dec: 008000f4 movhi r2,3 - 31df0: 108f2304 addi r2,r2,15500 - 31df4: e0fffd17 ldw r3,-12(fp) - 31df8: 18c00324 muli r3,r3,12 - 31dfc: 10c5883a add r2,r2,r3 - 31e00: 10800017 ldw r2,0(r2) - 31e04: 1000131e bne r2,zero,31e54 + 314c8: 008000f4 movhi r2,3 + 314cc: 108cd604 addi r2,r2,13144 + 314d0: e0fffd17 ldw r3,-12(fp) + 314d4: 18c00324 muli r3,r3,12 + 314d8: 10c5883a add r2,r2,r3 + 314dc: 10800017 ldw r2,0(r2) + 314e0: 1000131e bne r2,zero,31530 { alt_fd_list[i].dev = dev; - 31e08: 008000f4 movhi r2,3 - 31e0c: 108f2304 addi r2,r2,15500 - 31e10: e0fffd17 ldw r3,-12(fp) - 31e14: 18c00324 muli r3,r3,12 - 31e18: 10c5883a add r2,r2,r3 - 31e1c: e0ffff17 ldw r3,-4(fp) - 31e20: 10c00015 stw r3,0(r2) + 314e4: 008000f4 movhi r2,3 + 314e8: 108cd604 addi r2,r2,13144 + 314ec: e0fffd17 ldw r3,-12(fp) + 314f0: 18c00324 muli r3,r3,12 + 314f4: 10c5883a add r2,r2,r3 + 314f8: e0ffff17 ldw r3,-4(fp) + 314fc: 10c00015 stw r3,0(r2) if (i > alt_max_fd) - 31e24: 008000f4 movhi r2,3 - 31e28: 1093a804 addi r2,r2,20128 - 31e2c: 10c00017 ldw r3,0(r2) - 31e30: e0bffd17 ldw r2,-12(fp) - 31e34: 1880040e bge r3,r2,31e48 + 31500: 008000f4 movhi r2,3 + 31504: 10915b04 addi r2,r2,17772 + 31508: 10c00017 ldw r3,0(r2) + 3150c: e0bffd17 ldw r2,-12(fp) + 31510: 1880040e bge r3,r2,31524 { alt_max_fd = i; - 31e38: 008000f4 movhi r2,3 - 31e3c: 1093a804 addi r2,r2,20128 - 31e40: e0fffd17 ldw r3,-12(fp) - 31e44: 10c00015 stw r3,0(r2) + 31514: 008000f4 movhi r2,3 + 31518: 10915b04 addi r2,r2,17772 + 3151c: e0fffd17 ldw r3,-12(fp) + 31520: 10c00015 stw r3,0(r2) } rc = i; - 31e48: e0bffd17 ldw r2,-12(fp) - 31e4c: e0bffe15 stw r2,-8(fp) + 31524: e0bffd17 ldw r2,-12(fp) + 31528: e0bffe15 stw r2,-8(fp) goto alt_get_fd_exit; - 31e50: 00000606 br 31e6c + 3152c: 00000606 br 31548 * indicates the highest file descriptor ever allocated. This is used to * improve efficency when searching the file descriptor list, and * therefore reduce contention on the alt_fd_list_lock semaphore. */ for (i = 0; i < ALT_MAX_FD; i++) - 31e54: e0bffd17 ldw r2,-12(fp) - 31e58: 10800044 addi r2,r2,1 - 31e5c: e0bffd15 stw r2,-12(fp) - 31e60: e0bffd17 ldw r2,-12(fp) - 31e64: 10800810 cmplti r2,r2,32 - 31e68: 103fe01e bne r2,zero,31dec + 31530: e0bffd17 ldw r2,-12(fp) + 31534: 10800044 addi r2,r2,1 + 31538: e0bffd15 stw r2,-12(fp) + 3153c: e0bffd17 ldw r2,-12(fp) + 31540: 10800810 cmplti r2,r2,32 + 31544: 103fe01e bne r2,zero,314c8 <_gp+0xffff4f90> * file descriptor pool. */ ALT_SEM_POST(alt_fd_list_lock); return rc; - 31e6c: e0bffe17 ldw r2,-8(fp) + 31548: e0bffe17 ldw r2,-8(fp) } - 31e70: e037883a mov sp,fp - 31e74: df000017 ldw fp,0(sp) - 31e78: dec00104 addi sp,sp,4 - 31e7c: f800283a ret + 3154c: e037883a mov sp,fp + 31550: df000017 ldw fp,0(sp) + 31554: dec00104 addi sp,sp,4 + 31558: f800283a ret -00031e80 : +0003155c : * alt_icache_flush() is called to flush the instruction cache for a memory * region of length "len" bytes, starting at address "start". */ void alt_icache_flush (void* start, alt_u32 len) { - 31e80: defffb04 addi sp,sp,-20 - 31e84: df000415 stw fp,16(sp) - 31e88: df000404 addi fp,sp,16 - 31e8c: e13ffe15 stw r4,-8(fp) - 31e90: e17fff15 stw r5,-4(fp) + 3155c: defffb04 addi sp,sp,-20 + 31560: df000415 stw fp,16(sp) + 31564: df000404 addi fp,sp,16 + 31568: e13ffe15 stw r4,-8(fp) + 3156c: e17fff15 stw r5,-4(fp) /* * This is the most we would ever need to flush. */ if (len > NIOS2_ICACHE_SIZE) - 31e94: e0bfff17 ldw r2,-4(fp) - 31e98: 10840070 cmpltui r2,r2,4097 - 31e9c: 1000021e bne r2,zero,31ea8 + 31570: e0bfff17 ldw r2,-4(fp) + 31574: 10840070 cmpltui r2,r2,4097 + 31578: 1000021e bne r2,zero,31584 { len = NIOS2_ICACHE_SIZE; - 31ea0: 00840004 movi r2,4096 - 31ea4: e0bfff15 stw r2,-4(fp) + 3157c: 00840004 movi r2,4096 + 31580: e0bfff15 stw r2,-4(fp) } end = ((char*) start) + len; - 31ea8: e0fffe17 ldw r3,-8(fp) - 31eac: e0bfff17 ldw r2,-4(fp) - 31eb0: 1885883a add r2,r3,r2 - 31eb4: e0bffd15 stw r2,-12(fp) + 31584: e0fffe17 ldw r3,-8(fp) + 31588: e0bfff17 ldw r2,-4(fp) + 3158c: 1885883a add r2,r3,r2 + 31590: e0bffd15 stw r2,-12(fp) for (i = start; i < end; i+= NIOS2_ICACHE_LINE_SIZE) - 31eb8: e0bffe17 ldw r2,-8(fp) - 31ebc: e0bffc15 stw r2,-16(fp) - 31ec0: 00000506 br 31ed8 + 31594: e0bffe17 ldw r2,-8(fp) + 31598: e0bffc15 stw r2,-16(fp) + 3159c: 00000506 br 315b4 { __asm__ volatile ("flushi %0" :: "r" (i)); - 31ec4: e0bffc17 ldw r2,-16(fp) - 31ec8: 1000603a flushi r2 + 315a0: e0bffc17 ldw r2,-16(fp) + 315a4: 1000603a flushi r2 len = NIOS2_ICACHE_SIZE; } end = ((char*) start) + len; for (i = start; i < end; i+= NIOS2_ICACHE_LINE_SIZE) - 31ecc: e0bffc17 ldw r2,-16(fp) - 31ed0: 10800804 addi r2,r2,32 - 31ed4: e0bffc15 stw r2,-16(fp) - 31ed8: e0fffc17 ldw r3,-16(fp) - 31edc: e0bffd17 ldw r2,-12(fp) - 31ee0: 18bff836 bltu r3,r2,31ec4 + 315a8: e0bffc17 ldw r2,-16(fp) + 315ac: 10800804 addi r2,r2,32 + 315b0: e0bffc15 stw r2,-16(fp) + 315b4: e0fffc17 ldw r3,-16(fp) + 315b8: e0bffd17 ldw r2,-12(fp) + 315bc: 18bff836 bltu r3,r2,315a0 <_gp+0xffff5068> * For an unaligned flush request, we've got one more line left. * Note that this is dependent on NIOS2_ICACHE_LINE_SIZE to be a * multiple of 2 (which it always is). */ if (((alt_u32) start) & (NIOS2_ICACHE_LINE_SIZE - 1)) - 31ee4: e0bffe17 ldw r2,-8(fp) - 31ee8: 108007cc andi r2,r2,31 - 31eec: 10000226 beq r2,zero,31ef8 + 315c0: e0bffe17 ldw r2,-8(fp) + 315c4: 108007cc andi r2,r2,31 + 315c8: 10000226 beq r2,zero,315d4 { __asm__ volatile ("flushi %0" :: "r" (i)); - 31ef0: e0bffc17 ldw r2,-16(fp) - 31ef4: 1000603a flushi r2 + 315cc: e0bffc17 ldw r2,-16(fp) + 315d0: 1000603a flushi r2 /* * Having flushed the cache, flush any stale instructions in the * pipeline */ __asm__ volatile ("flushp"); - 31ef8: 0000203a flushp + 315d4: 0000203a flushp #endif /* NIOS2_ICACHE_SIZE > 0 */ } - 31efc: 0001883a nop - 31f00: e037883a mov sp,fp - 31f04: df000017 ldw fp,0(sp) - 31f08: dec00104 addi sp,sp,4 - 31f0c: f800283a ret + 315d8: 0001883a nop + 315dc: e037883a mov sp,fp + 315e0: df000017 ldw fp,0(sp) + 315e4: dec00104 addi sp,sp,4 + 315e8: f800283a ret -00031f10 : +000315ec : * Return: 1: BADADDR (bad_addr argument to handler) is valid * 0: BADADDR is not valid */ int alt_exception_cause_generated_bad_addr(alt_exception_cause cause) { - 31f10: defffe04 addi sp,sp,-8 - 31f14: df000115 stw fp,4(sp) - 31f18: df000104 addi fp,sp,4 - 31f1c: e13fff15 stw r4,-4(fp) + 315ec: defffe04 addi sp,sp,-8 + 315f0: df000115 stw fp,4(sp) + 315f4: df000104 addi fp,sp,4 + 315f8: e13fff15 stw r4,-4(fp) switch (cause) { - 31f20: e0bfff17 ldw r2,-4(fp) - 31f24: 10bffe84 addi r2,r2,-6 - 31f28: 10c00428 cmpgeui r3,r2,16 - 31f2c: 18001a1e bne r3,zero,31f98 - 31f30: 100690ba slli r3,r2,2 - 31f34: 008000f4 movhi r2,3 - 31f38: 1087d204 addi r2,r2,8008 - 31f3c: 1885883a add r2,r3,r2 - 31f40: 10800017 ldw r2,0(r2) - 31f44: 1000683a jmp r2 - 31f48: 00031f88 cmpgei zero,zero,3198 - 31f4c: 00031f88 cmpgei zero,zero,3198 - 31f50: 00031f98 cmpnei zero,zero,3198 - 31f54: 00031f98 cmpnei zero,zero,3198 - 31f58: 00031f98 cmpnei zero,zero,3198 - 31f5c: 00031f88 cmpgei zero,zero,3198 - 31f60: 00031f90 cmplti zero,zero,3198 - 31f64: 00031f98 cmpnei zero,zero,3198 - 31f68: 00031f88 cmpgei zero,zero,3198 - 31f6c: 00031f88 cmpgei zero,zero,3198 - 31f70: 00031f98 cmpnei zero,zero,3198 - 31f74: 00031f88 cmpgei zero,zero,3198 - 31f78: 00031f90 cmplti zero,zero,3198 - 31f7c: 00031f98 cmpnei zero,zero,3198 - 31f80: 00031f98 cmpnei zero,zero,3198 - 31f84: 00031f88 cmpgei zero,zero,3198 + 315fc: e0bfff17 ldw r2,-4(fp) + 31600: 10bffe84 addi r2,r2,-6 + 31604: 10c00428 cmpgeui r3,r2,16 + 31608: 18001a1e bne r3,zero,31674 + 3160c: 100690ba slli r3,r2,2 + 31610: 008000f4 movhi r2,3 + 31614: 10858904 addi r2,r2,5668 + 31618: 1885883a add r2,r3,r2 + 3161c: 10800017 ldw r2,0(r2) + 31620: 1000683a jmp r2 + 31624: 00031664 muli zero,zero,3161 + 31628: 00031664 muli zero,zero,3161 + 3162c: 00031674 movhi zero,3161 + 31630: 00031674 movhi zero,3161 + 31634: 00031674 movhi zero,3161 + 31638: 00031664 muli zero,zero,3161 + 3163c: 0003166c andhi zero,zero,3161 + 31640: 00031674 movhi zero,3161 + 31644: 00031664 muli zero,zero,3161 + 31648: 00031664 muli zero,zero,3161 + 3164c: 00031674 movhi zero,3161 + 31650: 00031664 muli zero,zero,3161 + 31654: 0003166c andhi zero,zero,3161 + 31658: 00031674 movhi zero,3161 + 3165c: 00031674 movhi zero,3161 + 31660: 00031664 muli zero,zero,3161 case NIOS2_EXCEPTION_MISALIGNED_TARGET_PC: case NIOS2_EXCEPTION_TLB_READ_PERM_VIOLATION: case NIOS2_EXCEPTION_TLB_WRITE_PERM_VIOLATION: case NIOS2_EXCEPTION_MPU_DATA_REGION_VIOLATION: case NIOS2_EXCEPTION_ECC_DATA_ERR: return 1; - 31f88: 00800044 movi r2,1 - 31f8c: 00000306 br 31f9c + 31664: 00800044 movi r2,1 + 31668: 00000306 br 31678 case NIOS2_EXCEPTION_TLB_MISS: case NIOS2_EXCEPTION_ECC_TLB_ERR: return 0; - 31f90: 0005883a mov r2,zero - 31f94: 00000106 br 31f9c + 3166c: 0005883a mov r2,zero + 31670: 00000106 br 31678 default: return 0; - 31f98: 0005883a mov r2,zero + 31674: 0005883a mov r2,zero } } - 31f9c: e037883a mov sp,fp - 31fa0: df000017 ldw fp,0(sp) - 31fa4: dec00104 addi sp,sp,4 - 31fa8: f800283a ret + 31678: e037883a mov sp,fp + 3167c: df000017 ldw fp,0(sp) + 31680: dec00104 addi sp,sp,4 + 31684: f800283a ret -00031fac : - 31fac: 200b883a mov r5,r4 - 31fb0: 000f883a mov r7,zero - 31fb4: 000d883a mov r6,zero - 31fb8: 0009883a mov r4,zero - 31fbc: 00320741 jmpi 32074 <__register_exitproc> +00031688 : + 31688: 200b883a mov r5,r4 + 3168c: 000f883a mov r7,zero + 31690: 000d883a mov r6,zero + 31694: 0009883a mov r4,zero + 31698: 00317501 jmpi 31750 <__register_exitproc> -00031fc0 : - 31fc0: defffe04 addi sp,sp,-8 - 31fc4: 000b883a mov r5,zero - 31fc8: dc000015 stw r16,0(sp) - 31fcc: dfc00115 stw ra,4(sp) - 31fd0: 2021883a mov r16,r4 - 31fd4: 003218c0 call 3218c <__call_exitprocs> - 31fd8: 008000f4 movhi r2,3 - 31fdc: 10939e04 addi r2,r2,20088 - 31fe0: 11000017 ldw r4,0(r2) - 31fe4: 20800f17 ldw r2,60(r4) - 31fe8: 10000126 beq r2,zero,31ff0 - 31fec: 103ee83a callr r2 - 31ff0: 8009883a mov r4,r16 - 31ff4: 003230c0 call 3230c <_exit> +0003169c : + 3169c: defffe04 addi sp,sp,-8 + 316a0: 000b883a mov r5,zero + 316a4: dc000015 stw r16,0(sp) + 316a8: dfc00115 stw ra,4(sp) + 316ac: 2021883a mov r16,r4 + 316b0: 00318680 call 31868 <__call_exitprocs> + 316b4: 008000f4 movhi r2,3 + 316b8: 10915304 addi r2,r2,17740 + 316bc: 11000017 ldw r4,0(r2) + 316c0: 20800f17 ldw r2,60(r4) + 316c4: 10000126 beq r2,zero,316cc + 316c8: 103ee83a callr r2 + 316cc: 8009883a mov r4,r16 + 316d0: 00319e80 call 319e8 <_exit> -00031ff8 : - 31ff8: 01c000c4 movi r7,3 - 31ffc: 3980192e bgeu r7,r6,32064 - 32000: 2144b03a or r2,r4,r5 - 32004: 11c4703a and r2,r2,r7 - 32008: 10000f26 beq r2,zero,32048 - 3200c: 20800003 ldbu r2,0(r4) - 32010: 28c00003 ldbu r3,0(r5) - 32014: 10c0151e bne r2,r3,3206c - 32018: 31bfff84 addi r6,r6,-2 - 3201c: 01ffffc4 movi r7,-1 - 32020: 00000406 br 32034 - 32024: 20800003 ldbu r2,0(r4) - 32028: 28c00003 ldbu r3,0(r5) - 3202c: 31bfffc4 addi r6,r6,-1 - 32030: 10c00e1e bne r2,r3,3206c - 32034: 21000044 addi r4,r4,1 - 32038: 29400044 addi r5,r5,1 - 3203c: 31fff91e bne r6,r7,32024 - 32040: 0005883a mov r2,zero - 32044: f800283a ret - 32048: 20c00017 ldw r3,0(r4) - 3204c: 28800017 ldw r2,0(r5) - 32050: 18bfee1e bne r3,r2,3200c - 32054: 31bfff04 addi r6,r6,-4 - 32058: 21000104 addi r4,r4,4 - 3205c: 29400104 addi r5,r5,4 - 32060: 39bff936 bltu r7,r6,32048 - 32064: 303fe91e bne r6,zero,3200c - 32068: 003ff506 br 32040 - 3206c: 10c5c83a sub r2,r2,r3 - 32070: f800283a ret +000316d4 : + 316d4: 01c000c4 movi r7,3 + 316d8: 3980192e bgeu r7,r6,31740 + 316dc: 2144b03a or r2,r4,r5 + 316e0: 11c4703a and r2,r2,r7 + 316e4: 10000f26 beq r2,zero,31724 + 316e8: 20800003 ldbu r2,0(r4) + 316ec: 28c00003 ldbu r3,0(r5) + 316f0: 10c0151e bne r2,r3,31748 + 316f4: 31bfff84 addi r6,r6,-2 + 316f8: 01ffffc4 movi r7,-1 + 316fc: 00000406 br 31710 + 31700: 20800003 ldbu r2,0(r4) + 31704: 28c00003 ldbu r3,0(r5) + 31708: 31bfffc4 addi r6,r6,-1 + 3170c: 10c00e1e bne r2,r3,31748 + 31710: 21000044 addi r4,r4,1 + 31714: 29400044 addi r5,r5,1 + 31718: 31fff91e bne r6,r7,31700 <_gp+0xffff51c8> + 3171c: 0005883a mov r2,zero + 31720: f800283a ret + 31724: 20c00017 ldw r3,0(r4) + 31728: 28800017 ldw r2,0(r5) + 3172c: 18bfee1e bne r3,r2,316e8 <_gp+0xffff51b0> + 31730: 31bfff04 addi r6,r6,-4 + 31734: 21000104 addi r4,r4,4 + 31738: 29400104 addi r5,r5,4 + 3173c: 39bff936 bltu r7,r6,31724 <_gp+0xffff51ec> + 31740: 303fe91e bne r6,zero,316e8 <_gp+0xffff51b0> + 31744: 003ff506 br 3171c <_gp+0xffff51e4> + 31748: 10c5c83a sub r2,r2,r3 + 3174c: f800283a ret -00032074 <__register_exitproc>: - 32074: defffa04 addi sp,sp,-24 - 32078: dc000315 stw r16,12(sp) - 3207c: 040000f4 movhi r16,3 - 32080: 84139e04 addi r16,r16,20088 - 32084: 80c00017 ldw r3,0(r16) - 32088: dc400415 stw r17,16(sp) - 3208c: dfc00515 stw ra,20(sp) - 32090: 18805217 ldw r2,328(r3) - 32094: 2023883a mov r17,r4 - 32098: 10003726 beq r2,zero,32178 <__register_exitproc+0x104> - 3209c: 10c00117 ldw r3,4(r2) - 320a0: 010007c4 movi r4,31 - 320a4: 20c00e16 blt r4,r3,320e0 <__register_exitproc+0x6c> - 320a8: 1a000044 addi r8,r3,1 - 320ac: 8800221e bne r17,zero,32138 <__register_exitproc+0xc4> - 320b0: 18c00084 addi r3,r3,2 - 320b4: 18c7883a add r3,r3,r3 - 320b8: 18c7883a add r3,r3,r3 - 320bc: 12000115 stw r8,4(r2) - 320c0: 10c7883a add r3,r2,r3 - 320c4: 19400015 stw r5,0(r3) - 320c8: 0005883a mov r2,zero - 320cc: dfc00517 ldw ra,20(sp) - 320d0: dc400417 ldw r17,16(sp) - 320d4: dc000317 ldw r16,12(sp) - 320d8: dec00604 addi sp,sp,24 - 320dc: f800283a ret - 320e0: 008000b4 movhi r2,2 - 320e4: 108af504 addi r2,r2,11220 - 320e8: 10002626 beq r2,zero,32184 <__register_exitproc+0x110> - 320ec: 01006404 movi r4,400 - 320f0: d9400015 stw r5,0(sp) - 320f4: d9800115 stw r6,4(sp) - 320f8: d9c00215 stw r7,8(sp) - 320fc: 0022bd40 call 22bd4 - 32100: d9400017 ldw r5,0(sp) - 32104: d9800117 ldw r6,4(sp) - 32108: d9c00217 ldw r7,8(sp) - 3210c: 10001d26 beq r2,zero,32184 <__register_exitproc+0x110> - 32110: 81000017 ldw r4,0(r16) - 32114: 10000115 stw zero,4(r2) - 32118: 02000044 movi r8,1 - 3211c: 22405217 ldw r9,328(r4) - 32120: 0007883a mov r3,zero - 32124: 12400015 stw r9,0(r2) - 32128: 20805215 stw r2,328(r4) - 3212c: 10006215 stw zero,392(r2) - 32130: 10006315 stw zero,396(r2) - 32134: 883fde26 beq r17,zero,320b0 <__register_exitproc+0x3c> - 32138: 18c9883a add r4,r3,r3 - 3213c: 2109883a add r4,r4,r4 - 32140: 1109883a add r4,r2,r4 - 32144: 21802215 stw r6,136(r4) - 32148: 01800044 movi r6,1 - 3214c: 12406217 ldw r9,392(r2) - 32150: 30cc983a sll r6,r6,r3 - 32154: 4992b03a or r9,r9,r6 - 32158: 12406215 stw r9,392(r2) - 3215c: 21c04215 stw r7,264(r4) - 32160: 01000084 movi r4,2 - 32164: 893fd21e bne r17,r4,320b0 <__register_exitproc+0x3c> - 32168: 11006317 ldw r4,396(r2) - 3216c: 218cb03a or r6,r4,r6 - 32170: 11806315 stw r6,396(r2) - 32174: 003fce06 br 320b0 <__register_exitproc+0x3c> - 32178: 18805304 addi r2,r3,332 - 3217c: 18805215 stw r2,328(r3) - 32180: 003fc606 br 3209c <__register_exitproc+0x28> - 32184: 00bfffc4 movi r2,-1 - 32188: 003fd006 br 320cc <__register_exitproc+0x58> +00031750 <__register_exitproc>: + 31750: defffa04 addi sp,sp,-24 + 31754: dc000315 stw r16,12(sp) + 31758: 040000f4 movhi r16,3 + 3175c: 84115304 addi r16,r16,17740 + 31760: 80c00017 ldw r3,0(r16) + 31764: dc400415 stw r17,16(sp) + 31768: dfc00515 stw ra,20(sp) + 3176c: 18805217 ldw r2,328(r3) + 31770: 2023883a mov r17,r4 + 31774: 10003726 beq r2,zero,31854 <__register_exitproc+0x104> + 31778: 10c00117 ldw r3,4(r2) + 3177c: 010007c4 movi r4,31 + 31780: 20c00e16 blt r4,r3,317bc <__register_exitproc+0x6c> + 31784: 1a000044 addi r8,r3,1 + 31788: 8800221e bne r17,zero,31814 <__register_exitproc+0xc4> + 3178c: 18c00084 addi r3,r3,2 + 31790: 18c7883a add r3,r3,r3 + 31794: 18c7883a add r3,r3,r3 + 31798: 12000115 stw r8,4(r2) + 3179c: 10c7883a add r3,r2,r3 + 317a0: 19400015 stw r5,0(r3) + 317a4: 0005883a mov r2,zero + 317a8: dfc00517 ldw ra,20(sp) + 317ac: dc400417 ldw r17,16(sp) + 317b0: dc000317 ldw r16,12(sp) + 317b4: dec00604 addi sp,sp,24 + 317b8: f800283a ret + 317bc: 008000b4 movhi r2,2 + 317c0: 1089a604 addi r2,r2,9880 + 317c4: 10002626 beq r2,zero,31860 <__register_exitproc+0x110> + 317c8: 01006404 movi r4,400 + 317cc: d9400015 stw r5,0(sp) + 317d0: d9800115 stw r6,4(sp) + 317d4: d9c00215 stw r7,8(sp) + 317d8: 00226980 call 22698 + 317dc: d9400017 ldw r5,0(sp) + 317e0: d9800117 ldw r6,4(sp) + 317e4: d9c00217 ldw r7,8(sp) + 317e8: 10001d26 beq r2,zero,31860 <__register_exitproc+0x110> + 317ec: 81000017 ldw r4,0(r16) + 317f0: 10000115 stw zero,4(r2) + 317f4: 02000044 movi r8,1 + 317f8: 22405217 ldw r9,328(r4) + 317fc: 0007883a mov r3,zero + 31800: 12400015 stw r9,0(r2) + 31804: 20805215 stw r2,328(r4) + 31808: 10006215 stw zero,392(r2) + 3180c: 10006315 stw zero,396(r2) + 31810: 883fde26 beq r17,zero,3178c <_gp+0xffff5254> + 31814: 18c9883a add r4,r3,r3 + 31818: 2109883a add r4,r4,r4 + 3181c: 1109883a add r4,r2,r4 + 31820: 21802215 stw r6,136(r4) + 31824: 01800044 movi r6,1 + 31828: 12406217 ldw r9,392(r2) + 3182c: 30cc983a sll r6,r6,r3 + 31830: 4992b03a or r9,r9,r6 + 31834: 12406215 stw r9,392(r2) + 31838: 21c04215 stw r7,264(r4) + 3183c: 01000084 movi r4,2 + 31840: 893fd21e bne r17,r4,3178c <_gp+0xffff5254> + 31844: 11006317 ldw r4,396(r2) + 31848: 218cb03a or r6,r4,r6 + 3184c: 11806315 stw r6,396(r2) + 31850: 003fce06 br 3178c <_gp+0xffff5254> + 31854: 18805304 addi r2,r3,332 + 31858: 18805215 stw r2,328(r3) + 3185c: 003fc606 br 31778 <_gp+0xffff5240> + 31860: 00bfffc4 movi r2,-1 + 31864: 003fd006 br 317a8 <_gp+0xffff5270> -0003218c <__call_exitprocs>: - 3218c: defff504 addi sp,sp,-44 - 32190: df000915 stw fp,36(sp) - 32194: dd400615 stw r21,24(sp) - 32198: dc800315 stw r18,12(sp) - 3219c: dfc00a15 stw ra,40(sp) - 321a0: ddc00815 stw r23,32(sp) - 321a4: dd800715 stw r22,28(sp) - 321a8: dd000515 stw r20,20(sp) - 321ac: dcc00415 stw r19,16(sp) - 321b0: dc400215 stw r17,8(sp) - 321b4: dc000115 stw r16,4(sp) - 321b8: d9000015 stw r4,0(sp) - 321bc: 2839883a mov fp,r5 - 321c0: 04800044 movi r18,1 - 321c4: 057fffc4 movi r21,-1 - 321c8: 008000f4 movhi r2,3 - 321cc: 10939e04 addi r2,r2,20088 - 321d0: 12000017 ldw r8,0(r2) - 321d4: 45005217 ldw r20,328(r8) - 321d8: 44c05204 addi r19,r8,328 - 321dc: a0001c26 beq r20,zero,32250 <__call_exitprocs+0xc4> - 321e0: a0800117 ldw r2,4(r20) - 321e4: 15ffffc4 addi r23,r2,-1 - 321e8: b8000d16 blt r23,zero,32220 <__call_exitprocs+0x94> - 321ec: 14000044 addi r16,r2,1 - 321f0: 8421883a add r16,r16,r16 - 321f4: 8421883a add r16,r16,r16 - 321f8: 84402004 addi r17,r16,128 - 321fc: a463883a add r17,r20,r17 - 32200: a421883a add r16,r20,r16 - 32204: e0001e26 beq fp,zero,32280 <__call_exitprocs+0xf4> - 32208: 80804017 ldw r2,256(r16) - 3220c: e0801c26 beq fp,r2,32280 <__call_exitprocs+0xf4> - 32210: bdffffc4 addi r23,r23,-1 - 32214: 843fff04 addi r16,r16,-4 - 32218: 8c7fff04 addi r17,r17,-4 - 3221c: bd7ff91e bne r23,r21,32204 <__call_exitprocs+0x78> - 32220: 008000b4 movhi r2,2 - 32224: 108afa04 addi r2,r2,11240 - 32228: 10000926 beq r2,zero,32250 <__call_exitprocs+0xc4> - 3222c: a0800117 ldw r2,4(r20) - 32230: 1000301e bne r2,zero,322f4 <__call_exitprocs+0x168> - 32234: a0800017 ldw r2,0(r20) - 32238: 10003226 beq r2,zero,32304 <__call_exitprocs+0x178> - 3223c: a009883a mov r4,r20 - 32240: 98800015 stw r2,0(r19) - 32244: 0022be80 call 22be8 - 32248: 9d000017 ldw r20,0(r19) - 3224c: a03fe41e bne r20,zero,321e0 <__call_exitprocs+0x54> - 32250: dfc00a17 ldw ra,40(sp) - 32254: df000917 ldw fp,36(sp) - 32258: ddc00817 ldw r23,32(sp) - 3225c: dd800717 ldw r22,28(sp) - 32260: dd400617 ldw r21,24(sp) - 32264: dd000517 ldw r20,20(sp) - 32268: dcc00417 ldw r19,16(sp) - 3226c: dc800317 ldw r18,12(sp) - 32270: dc400217 ldw r17,8(sp) - 32274: dc000117 ldw r16,4(sp) - 32278: dec00b04 addi sp,sp,44 - 3227c: f800283a ret - 32280: a0800117 ldw r2,4(r20) - 32284: 80c00017 ldw r3,0(r16) - 32288: 10bfffc4 addi r2,r2,-1 - 3228c: 15c01426 beq r2,r23,322e0 <__call_exitprocs+0x154> - 32290: 80000015 stw zero,0(r16) - 32294: 183fde26 beq r3,zero,32210 <__call_exitprocs+0x84> - 32298: 95c8983a sll r4,r18,r23 - 3229c: a0806217 ldw r2,392(r20) - 322a0: a5800117 ldw r22,4(r20) - 322a4: 2084703a and r2,r4,r2 - 322a8: 10000b26 beq r2,zero,322d8 <__call_exitprocs+0x14c> - 322ac: a0806317 ldw r2,396(r20) - 322b0: 2088703a and r4,r4,r2 - 322b4: 20000c1e bne r4,zero,322e8 <__call_exitprocs+0x15c> - 322b8: 89400017 ldw r5,0(r17) - 322bc: d9000017 ldw r4,0(sp) - 322c0: 183ee83a callr r3 - 322c4: a0800117 ldw r2,4(r20) - 322c8: 15bfbf1e bne r2,r22,321c8 <__call_exitprocs+0x3c> - 322cc: 98800017 ldw r2,0(r19) - 322d0: 153fcf26 beq r2,r20,32210 <__call_exitprocs+0x84> - 322d4: 003fbc06 br 321c8 <__call_exitprocs+0x3c> - 322d8: 183ee83a callr r3 - 322dc: 003ff906 br 322c4 <__call_exitprocs+0x138> - 322e0: a5c00115 stw r23,4(r20) - 322e4: 003feb06 br 32294 <__call_exitprocs+0x108> - 322e8: 89000017 ldw r4,0(r17) - 322ec: 183ee83a callr r3 - 322f0: 003ff406 br 322c4 <__call_exitprocs+0x138> - 322f4: a0800017 ldw r2,0(r20) - 322f8: a027883a mov r19,r20 - 322fc: 1029883a mov r20,r2 - 32300: 003fb606 br 321dc <__call_exitprocs+0x50> - 32304: 0005883a mov r2,zero - 32308: 003ffb06 br 322f8 <__call_exitprocs+0x16c> +00031868 <__call_exitprocs>: + 31868: defff504 addi sp,sp,-44 + 3186c: df000915 stw fp,36(sp) + 31870: dd400615 stw r21,24(sp) + 31874: dc800315 stw r18,12(sp) + 31878: dfc00a15 stw ra,40(sp) + 3187c: ddc00815 stw r23,32(sp) + 31880: dd800715 stw r22,28(sp) + 31884: dd000515 stw r20,20(sp) + 31888: dcc00415 stw r19,16(sp) + 3188c: dc400215 stw r17,8(sp) + 31890: dc000115 stw r16,4(sp) + 31894: d9000015 stw r4,0(sp) + 31898: 2839883a mov fp,r5 + 3189c: 04800044 movi r18,1 + 318a0: 057fffc4 movi r21,-1 + 318a4: 008000f4 movhi r2,3 + 318a8: 10915304 addi r2,r2,17740 + 318ac: 12000017 ldw r8,0(r2) + 318b0: 45005217 ldw r20,328(r8) + 318b4: 44c05204 addi r19,r8,328 + 318b8: a0001c26 beq r20,zero,3192c <__call_exitprocs+0xc4> + 318bc: a0800117 ldw r2,4(r20) + 318c0: 15ffffc4 addi r23,r2,-1 + 318c4: b8000d16 blt r23,zero,318fc <__call_exitprocs+0x94> + 318c8: 14000044 addi r16,r2,1 + 318cc: 8421883a add r16,r16,r16 + 318d0: 8421883a add r16,r16,r16 + 318d4: 84402004 addi r17,r16,128 + 318d8: a463883a add r17,r20,r17 + 318dc: a421883a add r16,r20,r16 + 318e0: e0001e26 beq fp,zero,3195c <__call_exitprocs+0xf4> + 318e4: 80804017 ldw r2,256(r16) + 318e8: e0801c26 beq fp,r2,3195c <__call_exitprocs+0xf4> + 318ec: bdffffc4 addi r23,r23,-1 + 318f0: 843fff04 addi r16,r16,-4 + 318f4: 8c7fff04 addi r17,r17,-4 + 318f8: bd7ff91e bne r23,r21,318e0 <_gp+0xffff53a8> + 318fc: 008000b4 movhi r2,2 + 31900: 1089ab04 addi r2,r2,9900 + 31904: 10000926 beq r2,zero,3192c <__call_exitprocs+0xc4> + 31908: a0800117 ldw r2,4(r20) + 3190c: 1000301e bne r2,zero,319d0 <__call_exitprocs+0x168> + 31910: a0800017 ldw r2,0(r20) + 31914: 10003226 beq r2,zero,319e0 <__call_exitprocs+0x178> + 31918: a009883a mov r4,r20 + 3191c: 98800015 stw r2,0(r19) + 31920: 00226ac0 call 226ac + 31924: 9d000017 ldw r20,0(r19) + 31928: a03fe41e bne r20,zero,318bc <_gp+0xffff5384> + 3192c: dfc00a17 ldw ra,40(sp) + 31930: df000917 ldw fp,36(sp) + 31934: ddc00817 ldw r23,32(sp) + 31938: dd800717 ldw r22,28(sp) + 3193c: dd400617 ldw r21,24(sp) + 31940: dd000517 ldw r20,20(sp) + 31944: dcc00417 ldw r19,16(sp) + 31948: dc800317 ldw r18,12(sp) + 3194c: dc400217 ldw r17,8(sp) + 31950: dc000117 ldw r16,4(sp) + 31954: dec00b04 addi sp,sp,44 + 31958: f800283a ret + 3195c: a0800117 ldw r2,4(r20) + 31960: 80c00017 ldw r3,0(r16) + 31964: 10bfffc4 addi r2,r2,-1 + 31968: 15c01426 beq r2,r23,319bc <__call_exitprocs+0x154> + 3196c: 80000015 stw zero,0(r16) + 31970: 183fde26 beq r3,zero,318ec <_gp+0xffff53b4> + 31974: 95c8983a sll r4,r18,r23 + 31978: a0806217 ldw r2,392(r20) + 3197c: a5800117 ldw r22,4(r20) + 31980: 2084703a and r2,r4,r2 + 31984: 10000b26 beq r2,zero,319b4 <__call_exitprocs+0x14c> + 31988: a0806317 ldw r2,396(r20) + 3198c: 2088703a and r4,r4,r2 + 31990: 20000c1e bne r4,zero,319c4 <__call_exitprocs+0x15c> + 31994: 89400017 ldw r5,0(r17) + 31998: d9000017 ldw r4,0(sp) + 3199c: 183ee83a callr r3 + 319a0: a0800117 ldw r2,4(r20) + 319a4: 15bfbf1e bne r2,r22,318a4 <_gp+0xffff536c> + 319a8: 98800017 ldw r2,0(r19) + 319ac: 153fcf26 beq r2,r20,318ec <_gp+0xffff53b4> + 319b0: 003fbc06 br 318a4 <_gp+0xffff536c> + 319b4: 183ee83a callr r3 + 319b8: 003ff906 br 319a0 <_gp+0xffff5468> + 319bc: a5c00115 stw r23,4(r20) + 319c0: 003feb06 br 31970 <_gp+0xffff5438> + 319c4: 89000017 ldw r4,0(r17) + 319c8: 183ee83a callr r3 + 319cc: 003ff406 br 319a0 <_gp+0xffff5468> + 319d0: a0800017 ldw r2,0(r20) + 319d4: a027883a mov r19,r20 + 319d8: 1029883a mov r20,r2 + 319dc: 003fb606 br 318b8 <_gp+0xffff5380> + 319e0: 0005883a mov r2,zero + 319e4: 003ffb06 br 319d4 <_gp+0xffff549c> -0003230c <_exit>: +000319e8 <_exit>: * * ALT_EXIT is mapped onto the _exit() system call in alt_syscall.h */ void ALT_EXIT (int exit_code) { - 3230c: defffd04 addi sp,sp,-12 - 32310: df000215 stw fp,8(sp) - 32314: df000204 addi fp,sp,8 - 32318: e13fff15 stw r4,-4(fp) + 319e8: defffd04 addi sp,sp,-12 + 319ec: df000215 stw fp,8(sp) + 319f0: df000204 addi fp,sp,8 + 319f4: e13fff15 stw r4,-4(fp) ALT_LOG_PRINT_BOOT("[alt_exit.c] Entering _exit() function.\r\n"); ALT_LOG_PRINT_BOOT("[alt_exit.c] Exit code from main was %d.\r\n",exit_code); /* Stop all other threads */ ALT_LOG_PRINT_BOOT("[alt_exit.c] Calling ALT_OS_STOP().\r\n"); ALT_OS_STOP(); - 3231c: 0001883a nop - 32320: e0bfff17 ldw r2,-4(fp) - 32324: e0bffe15 stw r2,-8(fp) + 319f8: 0001883a nop + 319fc: e0bfff17 ldw r2,-4(fp) + 31a00: e0bffe15 stw r2,-8(fp) /* * Routine called on exit. */ static ALT_INLINE ALT_ALWAYS_INLINE void alt_sim_halt(int exit_code) { register int r2 asm ("r2") = exit_code; - 32328: e0bffe17 ldw r2,-8(fp) + 31a04: e0bffe17 ldw r2,-8(fp) __asm__ volatile ("\n0:\n\taddi %0,%0, -1\n\tbgt %0,zero,0b" : : "r" (ALT_CPU_FREQ/100) ); /* Delay for >30ms */ __asm__ volatile ("break 2" : : "r"(r2), "r"(r3) ALT_GMON_DATA ); #else /* !DEBUG_STUB */ if (r2) { - 3232c: 10000226 beq r2,zero,32338 <_exit+0x2c> + 31a08: 10000226 beq r2,zero,31a14 <_exit+0x2c> ALT_SIM_FAIL(); - 32330: 002af070 cmpltui zero,zero,43969 - 32334: 00000106 br 3233c <_exit+0x30> + 31a0c: 002af070 cmpltui zero,zero,43969 + 31a10: 00000106 br 31a18 <_exit+0x30> } else { ALT_SIM_PASS(); - 32338: 002af0b0 cmpltui zero,zero,43970 + 31a14: 002af0b0 cmpltui zero,zero,43970 ALT_SIM_HALT(exit_code); /* spin forever, since there's no where to go back to */ ALT_LOG_PRINT_BOOT("[alt_exit.c] Spinning forever.\r\n"); while (1); - 3233c: 003fff06 br 3233c <_exit+0x30> + 31a18: 003fff06 br 31a18 <_gp+0xffff54e0> diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/main.c b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/main.c index c0b3e26..c45c7f2 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/main.c +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/main.c @@ -1,9 +1,10 @@ + + #include #include "I2C_core.h" #include "terasic_includes.h" #include "mipi_camera_config.h" #include "mipi_bridge_config.h" -#include "system.h" #include "auto_focus.h" @@ -21,8 +22,8 @@ #define EXPOSURE_INIT 0x002000 #define EXPOSURE_STEP 0x100 -#define GAIN_INIT 0xFFF -#define GAIN_STEP 0xFFF +#define GAIN_INIT 0x080 +#define GAIN_STEP 0x040 #define DEFAULT_LEVEL 3 #define MIPI_REG_PHYClkCtl 0x0056 @@ -81,56 +82,82 @@ void mipi_show_error_info_more(void){ printf("CSIPktLen = %d\n",MipiBridgeRegRead(0x006E)); } + + bool MIPI_Init(void){ bool bSuccess; + + bSuccess = oc_i2c_init_ex(I2C_OPENCORES_MIPI_BASE, 50*1000*1000,400*1000); //I2C: 400K if (!bSuccess) printf("failed to init MIPI- Bridge i2c\r\n"); + usleep(50*1000); MipiBridgeInit(); + usleep(500*1000); + // bSuccess = oc_i2c_init_ex(I2C_OPENCORES_CAMERA_BASE, 50*1000*1000,400*1000); //I2C: 400K // if (!bSuccess) // printf("failed to init MIPI- Camera i2c\r\n"); + MipiCameraInit(); MIPI_BIN_LEVEL(DEFAULT_LEVEL); // OV8865_FOCUS_Move_to(340); + // oc_i2c_uninit(I2C_OPENCORES_CAMERA_BASE); // Release I2C bus , due to two I2C master shared! + + usleep(1000); + + // oc_i2c_uninit(I2C_OPENCORES_MIPI_BASE); + return bSuccess; } + + + int main() { + fcntl(STDIN_FILENO, F_SETFL, O_NONBLOCK); - printf("DE10-LITE D8M VGA Demo\n"); - printf("Imperial College EEE2 Project version\n"); - IOWR(MIPI_PWDN_N_BASE, 0x00, 0x00); - IOWR(MIPI_RESET_N_BASE, 0x00, 0x00); - usleep(2000); - IOWR(MIPI_PWDN_N_BASE, 0x00, 0xFF); - usleep(2000); - IOWR(MIPI_RESET_N_BASE, 0x00, 0xFF); - printf("Image Processor ID: %x\n",IORD(EEE_IMGPROC_0_BASE,EEE_IMGPROC_ID)); - usleep(2000); - // MIPI Init - if (!MIPI_Init()){ - printf("MIPI_Init Init failed!\r\n"); - }else{ - printf("MIPI_Init Init successfully!\r\n"); - } + printf("DE10-LITE D8M VGA Demo\n"); + printf("Imperial College EEE2 Project version\n"); + IOWR(MIPI_PWDN_N_BASE, 0x00, 0x00); + IOWR(MIPI_RESET_N_BASE, 0x00, 0x00); + + usleep(2000); + IOWR(MIPI_PWDN_N_BASE, 0x00, 0xFF); + usleep(2000); + IOWR(MIPI_RESET_N_BASE, 0x00, 0xFF); + + printf("Image Processor ID: %x\n",IORD(0x42000,EEE_IMGPROC_ID)); + //printf("Image Processor ID: %x\n",IORD(EEE_IMGPROC_0_BASE,EEE_IMGPROC_ID)); //Don't know why this doesn't work - definition is in system.h in BSP + + + usleep(2000); + + + // MIPI Init + if (!MIPI_Init()){ + printf("MIPI_Init Init failed!\r\n"); + }else{ + printf("MIPI_Init Init successfully!\r\n"); + } + +// while(1){ + mipi_clear_error(); + usleep(50*1000); + mipi_clear_error(); + usleep(1000*1000); + mipi_show_error_info(); +// mipi_show_error_info_more(); + printf("\n"); +// } - // while(1){ - mipi_clear_error(); - usleep(50*1000); - mipi_clear_error(); - usleep(1000*1000); - mipi_show_error_info(); - // mipi_show_error_info_more(); - printf("\n"); - // } #if 0 // focus sweep printf("\nFocus sweep\n"); @@ -144,11 +171,16 @@ int main() else ii -= 20; printf("%d\n",ii); - OV8865_FOCUS_Move_to(ii); - usleep(50*1000); + OV8865_FOCUS_Move_to(ii); + usleep(50*1000); } #endif + + + + + ////////////////////////////////////////////////////////// alt_u16 bin_level = DEFAULT_LEVEL; alt_u8 manual_focus_step = 10; @@ -160,6 +192,15 @@ int main() OV8865SetExposure(exposureTime); OV8865SetGain(gain); Focus_Init(); + + FILE* ser = fopen("/dev/uart_0", "rb+"); + if(ser){ + printf("Opened UART\n"); + } else { + printf("Failed to open UART\n"); + while (1); + } + while(1){ // touch KEY0 to trigger Auto focus @@ -214,9 +255,10 @@ int main() //Read messages from the image processor and print them on the terminal while ((IORD(0x42000,EEE_IMGPROC_STATUS)>>8) & 0xff) { //Find out if there are words to read int word = IORD(0x42000,EEE_IMGPROC_MSG); //Get next word from message buffer - if (word == EEE_IMGPROC_MSG_START){ //Newline on message identifier + if (fwrite(&word, 4, 1, ser) != 1) + printf("Error writing to UART"); + if (word == EEE_IMGPROC_MSG_START) //Newline on message identifier printf("\n"); - } printf("%08x ",word); } diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/.cproject b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/.cproject index 33b8c17..601cc56 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/.cproject +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/.cproject @@ -1,44 +1,37 @@ - - + + - + - - - - - - - + + + + + + + - - + + - - - - - - - - - - + + + + - + - @@ -47,16 +40,16 @@ - + - + - + diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/.settings/language.settings.xml b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/.settings/language.settings.xml index 06daa80..5734959 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/.settings/language.settings.xml +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/.settings/language.settings.xml @@ -1,8 +1,8 @@ - + - + diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/HAL/inc/sys/alt_log_printf.h b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/HAL/inc/sys/alt_log_printf.h index c15ca05..8c9a8c4 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/HAL/inc/sys/alt_log_printf.h +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/HAL/inc/sys/alt_log_printf.h @@ -244,7 +244,12 @@ void alt_log_write(const void *ptr, size_t len); /* extern all global variables */ - extern volatile alt_u32 alt_log_boot_on_flag; + /* CASE:368514 - The boot message flag is linked into the sdata section + * because if it is zero, it would otherwise be placed in the bss section. + * alt_log examines this variable before the BSS is cleared in the boot-up + * process. + */ + extern volatile alt_u32 alt_log_boot_on_flag __attribute__ ((section (".sdata"))); extern volatile alt_u8 alt_log_write_on_flag; extern volatile alt_u8 alt_log_sys_clk_on_flag; extern volatile alt_u8 alt_log_jtag_uart_alarm_on_flag; diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/HAL/src/alt_load.c b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/HAL/src/alt_load.c index 644fdb4..de0abe1 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/HAL/src/alt_load.c +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/HAL/src/alt_load.c @@ -35,17 +35,28 @@ /* * Linker defined symbols. + These used to be + * extern alt_u32 __flash_rwdata_start; + * extern alt_u32 __ram_rwdata_start; + * extern alt_u32 __ram_rwdata_end; + * but that results in a fatal error when compiling -mgpopt=global + * because gcc assumes they are normal C variables in .sdata + * and therefore addressable from gp using a 16-bit offset, + * when in fact they are special values defined by linker.x + * and located nowhere near .sdata. + * Specifying __attribute__((section(".data"))) will force these + * in .data. (CASE:258384.) */ -extern alt_u32 __flash_rwdata_start; -extern alt_u32 __ram_rwdata_start; -extern alt_u32 __ram_rwdata_end; -extern alt_u32 __flash_rodata_start; -extern alt_u32 __ram_rodata_start; -extern alt_u32 __ram_rodata_end; -extern alt_u32 __flash_exceptions_start; -extern alt_u32 __ram_exceptions_start; -extern alt_u32 __ram_exceptions_end; +extern alt_u32 __flash_rwdata_start __attribute__((section(".data"))); +extern alt_u32 __ram_rwdata_start __attribute__((section(".data"))); +extern alt_u32 __ram_rwdata_end __attribute__((section(".data"))); +extern alt_u32 __flash_rodata_start __attribute__((section(".data"))); +extern alt_u32 __ram_rodata_start __attribute__((section(".data"))); +extern alt_u32 __ram_rodata_end __attribute__((section(".data"))); +extern alt_u32 __flash_exceptions_start __attribute__((section(".data"))); +extern alt_u32 __ram_exceptions_start __attribute__((section(".data"))); +extern alt_u32 __ram_exceptions_end __attribute__((section(".data"))); /* * alt_load() is called when the code is executing from flash. In this case diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/HAL/src/alt_log_printf.c b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/HAL/src/alt_log_printf.c index 1f7056d..67d63fd 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/HAL/src/alt_log_printf.c +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/HAL/src/alt_log_printf.c @@ -52,13 +52,13 @@ char alt_log_write_buf[ALT_LOG_WRITE_ECHO_LEN+2]; /* global variables for all 'on' flags */ /* - * The boot message flag is linked into the data (rwdata) section + * CASE:368514 - The boot message flag is linked into the sdata section * because if it is zero, it would otherwise be placed in the bss section. * alt_log examines this variable before the BSS is cleared in the boot-up * process. */ volatile alt_u32 alt_log_boot_on_flag \ - __attribute__ ((section (".data"))) = ALT_LOG_BOOT_ON_FLAG_SETTING; + __attribute__ ((section (".sdata"))) = ALT_LOG_BOOT_ON_FLAG_SETTING; volatile alt_u8 alt_log_write_on_flag = ALT_LOG_WRITE_ON_FLAG_SETTING; diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/Makefile b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/Makefile index 3f9282b..8e3c191 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/Makefile +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/Makefile @@ -93,12 +93,12 @@ OBJ_DIR := ./obj # This following VERSION comment indicates the version of the tool used to # generate this makefile. A makefile variable is provided for VERSION as well. -# ACDS_VERSION: 16.0 -ACDS_VERSION := 16.0 +# ACDS_VERSION: 16.1 +ACDS_VERSION := 16.1 # This following BUILD_NUMBER comment indicates the build number of the tool # used to generate this makefile. -# BUILD_NUMBER: 222 +# BUILD_NUMBER: 196 SETTINGS_FILE := settings.bsp SOPC_FILE := ../../Qsys.sopcinfo @@ -147,17 +147,6 @@ BSP_CFLAGS_WARNINGS = -Wall # C compiler command. CC = nios2-elf-gcc -xc -# C/C++ compiler to generate (do not generate) GP-relative accesses. 'none' -# tells the compilter not to generate GP-relative accesses. 'local' will -# generate GP-relative accesses for small data objects that are not external, -# weak, or uninitialized common symbols. Also use GP-relative addressing for -# objects that have been explicitly placed in a small data section via a -# section attribute. provides the default set of debug symbols typically -# required to debug a typical application. 'global' is same as 'local' but also -# generate GP-relative accesses for small data objects that are external, weak, -# or common. -CFLAGS_MGPOPT = -mgpopt=local - # C++ compiler command. CXX = nios2-elf-gcc -xc++ @@ -250,6 +239,17 @@ altera_avalon_timer_driver_C_LIB_SRCS := \ $(altera_avalon_timer_driver_SRCS_ROOT)/src/altera_avalon_timer_ts.c \ $(altera_avalon_timer_driver_SRCS_ROOT)/src/altera_avalon_timer_vars.c +# altera_avalon_uart_driver sources root +altera_avalon_uart_driver_SRCS_ROOT := drivers + +# altera_avalon_uart_driver sources +altera_avalon_uart_driver_C_LIB_SRCS := \ + $(altera_avalon_uart_driver_SRCS_ROOT)/src/altera_avalon_uart_fd.c \ + $(altera_avalon_uart_driver_SRCS_ROOT)/src/altera_avalon_uart_init.c \ + $(altera_avalon_uart_driver_SRCS_ROOT)/src/altera_avalon_uart_ioctl.c \ + $(altera_avalon_uart_driver_SRCS_ROOT)/src/altera_avalon_uart_read.c \ + $(altera_avalon_uart_driver_SRCS_ROOT)/src/altera_avalon_uart_write.c + # altera_nios2_gen2_hal_driver sources root altera_nios2_gen2_hal_driver_SRCS_ROOT := HAL @@ -352,6 +352,7 @@ COMPONENT_C_LIB_SRCS += \ $(altera_avalon_jtag_uart_driver_C_LIB_SRCS) \ $(altera_avalon_sysid_qsys_driver_C_LIB_SRCS) \ $(altera_avalon_timer_driver_C_LIB_SRCS) \ + $(altera_avalon_uart_driver_C_LIB_SRCS) \ $(altera_nios2_gen2_hal_driver_C_LIB_SRCS) \ $(hal_C_LIB_SRCS) @@ -404,7 +405,6 @@ BSP_CFLAGS += \ $(BSP_CFLAGS_DEBUG) \ $(BSP_CFLAGS_WARNINGS) \ $(BSP_CFLAGS_USER_FLAGS) \ - $(CFLAGS_MGPOPT) \ $(ALT_CFLAGS) \ $(CFLAGS) diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/drivers/inc/altera_avalon_uart.h b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/drivers/inc/altera_avalon_uart.h new file mode 100644 index 0000000..a9df07f --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/drivers/inc/altera_avalon_uart.h @@ -0,0 +1,319 @@ +/****************************************************************************** +* * +* License Agreement * +* * +* Copyright (c) 2006 Altera Corporation, San Jose, California, USA. * +* All rights reserved. * +* * +* Permission is hereby granted, free of charge, to any person obtaining a * +* copy of this software and associated documentation files (the "Software"), * +* to deal in the Software without restriction, including without limitation * +* the rights to use, copy, modify, merge, publish, distribute, sublicense, * +* and/or sell copies of the Software, and to permit persons to whom the * +* Software is furnished to do so, subject to the following conditions: * +* * +* The above copyright notice and this permission notice shall be included in * +* all copies or substantial portions of the Software. * +* * +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * +* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * +* DEALINGS IN THE SOFTWARE. * +* * +* This agreement shall be governed in all respects by the laws of the State * +* of California and by the laws of the United States of America. * +* * +******************************************************************************/ + +#ifndef __ALT_AVALON_UART_H__ +#define __ALT_AVALON_UART_H__ + +#include +#include + +#include "sys/alt_warning.h" + +#include "os/alt_sem.h" +#include "os/alt_flag.h" +#include "alt_types.h" + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +#if defined(ALT_USE_SMALL_DRIVERS) || defined(ALTERA_AVALON_UART_SMALL) + +/* + *********************************************************************** + *********************** SMALL DRIVER ********************************** + *********************************************************************** + */ + +/* + * State structure definition. Each instance of the driver uses one + * of these structures to hold its associated state. + */ + +typedef struct altera_avalon_uart_state_s +{ + unsigned int base; +} altera_avalon_uart_state; + +/* + * The macro ALTERA_AVALON_UART_STATE_INSTANCE is used by the + * auto-generated file alt_sys_init.c to create an instance of this + * device driver state. + */ + +#define ALTERA_AVALON_UART_STATE_INSTANCE(name, state) \ + altera_avalon_uart_state state = \ + { \ + name##_BASE \ + } + +/* + * The macro ALTERA_AVALON_UART_STATE_INIT is used by the auto-generated file + * alt_sys_init.c to initialize an instance of the device driver state. + */ + +#define ALTERA_AVALON_UART_STATE_INIT(name, state) + +#else /* fast driver */ + +/* + ********************************************************************** + *********************** FAST DRIVER ********************************** + ********************************************************************** + */ + +/* + * ALT_AVALON_UART_READ_RDY and ALT_AVALON_UART_WRITE_RDY are the bitmasks + * that define uC/OS-II event flags that are releated to this device. + * + * ALT_AVALON_UART_READY_RDY indicates that there is read data in the buffer + * ready to be processed. ALT_UART_WRITE_RDY indicates that the transmitter is + * ready for more data. + */ + +#define ALT_UART_READ_RDY 0x1 +#define ALT_UART_WRITE_RDY 0x2 + +/* + * ALT_AVALON_UART_BUF_LEN is the length of the circular buffers used to hold + * pending transmit and receive data. This value must be a power of two. + */ + +#define ALT_AVALON_UART_BUF_LEN (64) + +/* + * ALT_AVALON_UART_BUF_MSK is used as an internal convenience for detecting + * the end of the arrays used to implement the transmit and receive buffers. + */ + +#define ALT_AVALON_UART_BUF_MSK (ALT_AVALON_UART_BUF_LEN - 1) + +/* + * This is somewhat of an ugly hack, but we need some mechanism for + * representing the non-standard 9 bit mode provided by this UART. In this + * case we abscond with the 5 bit mode setting. The value CS5 is defined in + * termios.h. + */ + +#define CS9 CS5 + +/* + * The value ALT_AVALON_UART_FB is a value set in the devices flag field to + * indicate that the device has a fixed baud rate; i.e. if this flag is set + * software can not control the baud rate of the device. + */ + +#define ALT_AVALON_UART_FB 0x1 + +/* + * The value ALT_AVALON_UART_FC is a value set in the device flag field to + * indicate the the device is using flow control, i.e. the driver must + * throttle on transmit if the nCTS pin is low. + */ + +#define ALT_AVALON_UART_FC 0x2 + +/* + * The altera_avalon_uart_state structure is used to hold device specific data. + * This includes the transmit and receive buffers. + * + * An instance of this structure is created in the auto-generated + * alt_sys_init.c file for each UART listed in the systems PTF file. This is + * done using the ALTERA_AVALON_UART_STATE_INSTANCE macro given below. + */ + +typedef struct altera_avalon_uart_state_s +{ + void* base; /* The base address of the device */ + alt_u32 ctrl; /* Shadow value of the control register */ + volatile alt_u32 rx_start; /* Start of the pending receive data */ + volatile alt_u32 rx_end; /* End of the pending receive data */ + volatile alt_u32 tx_start; /* Start of the pending transmit data */ + volatile alt_u32 tx_end; /* End of the pending transmit data */ +#ifdef ALTERA_AVALON_UART_USE_IOCTL + struct termios termios; /* Current device configuration */ + alt_u32 freq; /* Current baud rate */ +#endif + alt_u32 flags; /* Configuation flags */ + ALT_FLAG_GRP (events) /* Event flags used for + * foreground/background in mult-threaded + * mode */ + ALT_SEM (read_lock) /* Semaphore used to control access to the + * read buffer in multi-threaded mode */ + ALT_SEM (write_lock) /* Semaphore used to control access to the + * write buffer in multi-threaded mode */ + volatile alt_u8 rx_buf[ALT_AVALON_UART_BUF_LEN]; /* The receive buffer */ + volatile alt_u8 tx_buf[ALT_AVALON_UART_BUF_LEN]; /* The transmit buffer */ +} altera_avalon_uart_state; + +/* + * Conditionally define the data structures used to process ioctl requests. + * The following macros are defined for use in creating a device instance: + * + * ALTERA_AVALON_UART_TERMIOS - Initialise the termios structure used to + * describe the UART configuration. + * ALTERA_AVALON_UART_FREQ - Initialise the 'freq' field of the device + * structure, if the field exists. + * ALTERA_AVALON_UART_IOCTL - Initialise the 'ioctl' field of the device + * callback structure, if ioctls are enabled. + */ + +#ifdef ALTERA_AVALON_UART_USE_IOCTL + +#define ALTERA_AVALON_UART_TERMIOS(stop_bits, \ + parity, \ + odd_parity, \ + data_bits, \ + ctsrts, \ + baud) \ +{ \ + 0, \ + 0, \ + ((stop_bits == 2) ? CSTOPB: 0) | \ + ((parity) ? PARENB: 0) | \ + ((odd_parity) ? PAODD: 0) | \ + ((data_bits == 7) ? CS7: (data_bits == 9) ? CS9: CS8) | \ + ((ctsrts) ? CRTSCTS : 0), \ + 0, \ + 0, \ + {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, \ + baud, \ + baud \ +}, +#define ALTERA_AVALON_UART_FREQ(name) name##_FREQ, + +#else /* !ALTERA_AVALON_UART_USE_IOCTL */ + +#define ALTERA_AVALON_UART_TERMIOS(stop_bits, \ + parity, \ + odd_parity, \ + data_bits, \ + ctsrts, \ + baud) +#define ALTERA_AVALON_UART_FREQ(name) + +#endif /* ALTERA_AVALON_UART_USE_IOCTL */ + +/* + * The macro ALTERA_AVALON_UART_INSTANCE is used by the auto-generated file + * alt_sys_init.c to create an instance of this device driver state. + */ + +#define ALTERA_AVALON_UART_STATE_INSTANCE(name, state) \ + altera_avalon_uart_state state = \ + { \ + (void*) name##_BASE, \ + 0, \ + 0, \ + 0, \ + 0, \ + 0, \ + ALTERA_AVALON_UART_TERMIOS(name##_STOP_BITS, \ + (name##_PARITY == 'N'), \ + (name##_PARITY == 'O'), \ + name##_DATA_BITS, \ + name##_USE_CTS_RTS, \ + name##_BAUD) \ + ALTERA_AVALON_UART_FREQ(name) \ + (name##_FIXED_BAUD ? ALT_AVALON_UART_FB : 0) | \ + (name##_USE_CTS_RTS ? ALT_AVALON_UART_FC : 0) \ + } + +/* + * altera_avalon_uart_init() is called by the auto-generated function + * alt_sys_init() for each UART in the system. This is done using the + * ALTERA_AVALON_UART_INIT macro given below. + * + * This function is responsible for performing all the run time initilisation + * for a device instance, i.e. registering the interrupt handler, and + * regestering the device with the system. + */ +extern void altera_avalon_uart_init(altera_avalon_uart_state* sp, + alt_u32 irq_controller_id, alt_u32 irq); + +/* + * The macro ALTERA_AVALON_UART_STATE_INIT is used by the auto-generated file + * alt_sys_init.c to initialize an instance of the device driver state. + * + * This macro performs a sanity check to ensure that the interrupt has been + * connected for this device. If not, then an apropriate error message is + * generated at build time. + */ + +#define ALTERA_AVALON_UART_STATE_INIT(name, state) \ + if (name##_IRQ == ALT_IRQ_NOT_CONNECTED) \ + { \ + ALT_LINK_ERROR ("Error: Interrupt not connected for " #name ". " \ + "You have selected the interrupt driven version of " \ + "the ALTERA Avalon UART driver, but the interrupt is " \ + "not connected for this device. You can select a " \ + "polled mode driver by checking the 'small driver' " \ + "option in the HAL configuration window, or by " \ + "using the -DALTERA_AVALON_UART_SMALL preprocessor " \ + "flag."); \ + } \ + else \ + { \ + altera_avalon_uart_init(&state, name##_IRQ_INTERRUPT_CONTROLLER_ID, \ + name##_IRQ); \ + } + +#endif /* small driver */ + +/* + * Include in case non-direct version of driver required. + */ +#include "altera_avalon_uart_fd.h" + +/* + * Map alt_sys_init macros to direct or non-direct versions. + */ +#ifdef ALT_USE_DIRECT_DRIVERS + +#define ALTERA_AVALON_UART_INSTANCE(name, state) \ + ALTERA_AVALON_UART_STATE_INSTANCE(name, state) +#define ALTERA_AVALON_UART_INIT(name, state) \ + ALTERA_AVALON_UART_STATE_INIT(name, state) + +#else /* !ALT_USE_DIRECT_DRIVERS */ + +#define ALTERA_AVALON_UART_INSTANCE(name, dev) \ + ALTERA_AVALON_UART_DEV_INSTANCE(name, dev) +#define ALTERA_AVALON_UART_INIT(name, dev) \ + ALTERA_AVALON_UART_DEV_INIT(name, dev) + +#endif /* ALT_USE_DIRECT_DRIVERS */ + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* __ALT_AVALON_UART_H__ */ diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/drivers/inc/altera_avalon_uart_fd.h b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/drivers/inc/altera_avalon_uart_fd.h new file mode 100644 index 0000000..92c8731 --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/drivers/inc/altera_avalon_uart_fd.h @@ -0,0 +1,143 @@ +/****************************************************************************** +* * +* License Agreement * +* * +* Copyright (c) 2007 Altera Corporation, San Jose, California, USA. * +* All rights reserved. * +* * +* Permission is hereby granted, free of charge, to any person obtaining a * +* copy of this software and associated documentation files (the "Software"), * +* to deal in the Software without restriction, including without limitation * +* the rights to use, copy, modify, merge, publish, distribute, sublicense, * +* and/or sell copies of the Software, and to permit persons to whom the * +* Software is furnished to do so, subject to the following conditions: * +* * +* The above copyright notice and this permission notice shall be included in * +* all copies or substantial portions of the Software. * +* * +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * +* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * +* DEALINGS IN THE SOFTWARE. * +* * +* This agreement shall be governed in all respects by the laws of the State * +* of California and by the laws of the United States of America. * +* * +******************************************************************************/ + +#ifndef __ALT_AVALON_UART_FD_H__ +#define __ALT_AVALON_UART_FD_H__ + +#include "sys/alt_dev.h" + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +/* + * Externally referenced routines + */ +extern int altera_avalon_uart_read_fd (alt_fd* fd, char* ptr, int len); +extern int altera_avalon_uart_write_fd (alt_fd* fd, const char* ptr, + int len); + +/* + * Device structure definition. This is needed by alt_sys_init in order to + * reserve memory for the device instance. + */ +typedef struct altera_avalon_uart_dev_s +{ + alt_dev dev; + altera_avalon_uart_state state; +} altera_avalon_uart_dev; + +#if defined(ALT_USE_SMALL_DRIVERS) || defined(ALTERA_AVALON_UART_SMALL) + +/* + * Macros used by alt_sys_init when the ALT file descriptor facility is used. + */ + +#define ALTERA_AVALON_UART_DEV_INSTANCE(name, d) \ + static altera_avalon_uart_dev d = \ + { \ + { \ + ALT_LLIST_ENTRY, \ + name##_NAME, \ + NULL, /* open */ \ + NULL, /* close */ \ + altera_avalon_uart_read_fd, \ + altera_avalon_uart_write_fd, \ + NULL, /* lseek */ \ + NULL, /* fstat */ \ + NULL, /* ioctl */ \ + }, \ + { \ + name##_BASE, \ + } \ + } + +#define ALTERA_AVALON_UART_DEV_INIT(name, d) alt_dev_reg (&d.dev) + +#else /* use fast version of the driver */ + +extern int altera_avalon_uart_ioctl_fd (alt_fd* fd, int req, void* arg); +extern int altera_avalon_uart_close_fd(alt_fd* fd); + +#ifdef ALTERA_AVALON_UART_USE_IOCTL +#define ALTERA_AVALON_UART_IOCTL_FD altera_avalon_uart_ioctl_fd +#else +#define ALTERA_AVALON_UART_IOCTL_FD NULL +#endif + +#define ALTERA_AVALON_UART_DEV_INSTANCE(name, d) \ + static altera_avalon_uart_dev d = \ + { \ + { \ + ALT_LLIST_ENTRY, \ + name##_NAME, \ + NULL, /* open */ \ + altera_avalon_uart_close_fd, \ + altera_avalon_uart_read_fd, \ + altera_avalon_uart_write_fd, \ + NULL, /* lseek */ \ + NULL, /* fstat */ \ + ALTERA_AVALON_UART_IOCTL_FD, \ + }, \ + { \ + (void*) name##_BASE, \ + 0, \ + 0, \ + 0, \ + 0, \ + 0, \ + ALTERA_AVALON_UART_TERMIOS(name##_STOP_BITS, \ + (name##_PARITY == 'N'), \ + (name##_PARITY == 'O'), \ + name##_DATA_BITS, \ + name##_USE_CTS_RTS, \ + name##_BAUD) \ + ALTERA_AVALON_UART_FREQ(name) \ + (name##_FIXED_BAUD ? ALT_AVALON_UART_FB : 0) | \ + (name##_USE_CTS_RTS ? ALT_AVALON_UART_FC : 0) \ + } \ + } + +#define ALTERA_AVALON_UART_DEV_INIT(name, d) \ + { \ + ALTERA_AVALON_UART_STATE_INIT(name, d.state); \ + \ + /* make the device available to the system */ \ + alt_dev_reg(&d.dev); \ + } + +#endif /* fast driver */ + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* __ALT_AVALON_UART_FD_H__ */ diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/drivers/inc/altera_avalon_uart_regs.h b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/drivers/inc/altera_avalon_uart_regs.h new file mode 100644 index 0000000..9aa4a03 --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/drivers/inc/altera_avalon_uart_regs.h @@ -0,0 +1,137 @@ +/****************************************************************************** +* * +* License Agreement * +* * +* Copyright (c) 2003 Altera Corporation, San Jose, California, USA. * +* All rights reserved. * +* * +* Permission is hereby granted, free of charge, to any person obtaining a * +* copy of this software and associated documentation files (the "Software"), * +* to deal in the Software without restriction, including without limitation * +* the rights to use, copy, modify, merge, publish, distribute, sublicense, * +* and/or sell copies of the Software, and to permit persons to whom the * +* Software is furnished to do so, subject to the following conditions: * +* * +* The above copyright notice and this permission notice shall be included in * +* all copies or substantial portions of the Software. * +* * +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * +* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * +* DEALINGS IN THE SOFTWARE. * +* * +* This agreement shall be governed in all respects by the laws of the State * +* of California and by the laws of the United States of America. * +* * +******************************************************************************/ + +#ifndef __ALTERA_AVALON_UART_REGS_H__ +#define __ALTERA_AVALON_UART_REGS_H__ + +#include + +#define ALTERA_AVALON_UART_RXDATA_REG 0 +#define IOADDR_ALTERA_AVALON_UART_RXDATA(base) \ + __IO_CALC_ADDRESS_NATIVE(base, ALTERA_AVALON_UART_RXDATA_REG) +#define IORD_ALTERA_AVALON_UART_RXDATA(base) \ + IORD(base, ALTERA_AVALON_UART_RXDATA_REG) +#define IOWR_ALTERA_AVALON_UART_RXDATA(base, data) \ + IOWR(base, ALTERA_AVALON_UART_RXDATA_REG, data) + +#define ALTERA_AVALON_UART_TXDATA_REG 1 +#define IOADDR_ALTERA_AVALON_UART_TXDATA(base) \ + __IO_CALC_ADDRESS_NATIVE(base, ALTERA_AVALON_UART_TXDATA_REG) +#define IORD_ALTERA_AVALON_UART_TXDATA(base) \ + IORD(base, ALTERA_AVALON_UART_TXDATA_REG) +#define IOWR_ALTERA_AVALON_UART_TXDATA(base, data) \ + IOWR(base, ALTERA_AVALON_UART_TXDATA_REG, data) + +#define ALTERA_AVALON_UART_STATUS_REG 2 +#define IOADDR_ALTERA_AVALON_UART_STATUS(base) \ + __IO_CALC_ADDRESS_NATIVE(base, ALTERA_AVALON_UART_STATUS_REG) +#define IORD_ALTERA_AVALON_UART_STATUS(base) \ + IORD(base, ALTERA_AVALON_UART_STATUS_REG) +#define IOWR_ALTERA_AVALON_UART_STATUS(base, data) \ + IOWR(base, ALTERA_AVALON_UART_STATUS_REG, data) + +#define ALTERA_AVALON_UART_STATUS_PE_MSK (0x1) +#define ALTERA_AVALON_UART_STATUS_PE_OFST (0) +#define ALTERA_AVALON_UART_STATUS_FE_MSK (0x2) +#define ALTERA_AVALON_UART_STATUS_FE_OFST (1) +#define ALTERA_AVALON_UART_STATUS_BRK_MSK (0x4) +#define ALTERA_AVALON_UART_STATUS_BRK_OFST (2) +#define ALTERA_AVALON_UART_STATUS_ROE_MSK (0x8) +#define ALTERA_AVALON_UART_STATUS_ROE_OFST (3) +#define ALTERA_AVALON_UART_STATUS_TOE_MSK (0x10) +#define ALTERA_AVALON_UART_STATUS_TOE_OFST (4) +#define ALTERA_AVALON_UART_STATUS_TMT_MSK (0x20) +#define ALTERA_AVALON_UART_STATUS_TMT_OFST (5) +#define ALTERA_AVALON_UART_STATUS_TRDY_MSK (0x40) +#define ALTERA_AVALON_UART_STATUS_TRDY_OFST (6) +#define ALTERA_AVALON_UART_STATUS_RRDY_MSK (0x80) +#define ALTERA_AVALON_UART_STATUS_RRDY_OFST (7) +#define ALTERA_AVALON_UART_STATUS_E_MSK (0x100) +#define ALTERA_AVALON_UART_STATUS_E_OFST (8) +#define ALTERA_AVALON_UART_STATUS_DCTS_MSK (0x400) +#define ALTERA_AVALON_UART_STATUS_DCTS_OFST (10) +#define ALTERA_AVALON_UART_STATUS_CTS_MSK (0x800) +#define ALTERA_AVALON_UART_STATUS_CTS_OFST (11) +#define ALTERA_AVALON_UART_STATUS_EOP_MSK (0x1000) +#define ALTERA_AVALON_UART_STATUS_EOP_OFST (12) + +#define ALTERA_AVALON_UART_CONTROL_REG 3 +#define IOADDR_ALTERA_AVALON_UART_CONTROL(base) \ + __IO_CALC_ADDRESS_NATIVE(base, ALTERA_AVALON_UART_CONTROL_REG) +#define IORD_ALTERA_AVALON_UART_CONTROL(base) \ + IORD(base, ALTERA_AVALON_UART_CONTROL_REG) +#define IOWR_ALTERA_AVALON_UART_CONTROL(base, data) \ + IOWR(base, ALTERA_AVALON_UART_CONTROL_REG, data) + +#define ALTERA_AVALON_UART_CONTROL_PE_MSK (0x1) +#define ALTERA_AVALON_UART_CONTROL_PE_OFST (0) +#define ALTERA_AVALON_UART_CONTROL_FE_MSK (0x2) +#define ALTERA_AVALON_UART_CONTROL_FE_OFST (1) +#define ALTERA_AVALON_UART_CONTROL_BRK_MSK (0x4) +#define ALTERA_AVALON_UART_CONTROL_BRK_OFST (2) +#define ALTERA_AVALON_UART_CONTROL_ROE_MSK (0x8) +#define ALTERA_AVALON_UART_CONTROL_ROE_OFST (3) +#define ALTERA_AVALON_UART_CONTROL_TOE_MSK (0x10) +#define ALTERA_AVALON_UART_CONTROL_TOE_OFST (4) +#define ALTERA_AVALON_UART_CONTROL_TMT_MSK (0x20) +#define ALTERA_AVALON_UART_CONTROL_TMT_OFST (5) +#define ALTERA_AVALON_UART_CONTROL_TRDY_MSK (0x40) +#define ALTERA_AVALON_UART_CONTROL_TRDY_OFST (6) +#define ALTERA_AVALON_UART_CONTROL_RRDY_MSK (0x80) +#define ALTERA_AVALON_UART_CONTROL_RRDY_OFST (7) +#define ALTERA_AVALON_UART_CONTROL_E_MSK (0x100) +#define ALTERA_AVALON_UART_CONTROL_E_OFST (8) +#define ALTERA_AVALON_UART_CONTROL_DCTS_MSK (0x400) +#define ALTERA_AVALON_UART_CONTROL_DCTS_OFST (10) +#define ALTERA_AVALON_UART_CONTROL_RTS_MSK (0x800) +#define ALTERA_AVALON_UART_CONTROL_RTS_OFST (11) +#define ALTERA_AVALON_UART_CONTROL_EOP_MSK (0x1000) +#define ALTERA_AVALON_UART_CONTROL_EOP_OFST (12) + +#define ALTERA_AVALON_UART_DIVISOR_REG 4 +#define IOADDR_ALTERA_AVALON_UART_DIVISOR(base) \ + __IO_CALC_ADDRESS_NATIVE(base, ALTERA_AVALON_UART_DIVISOR_REG) +#define IORD_ALTERA_AVALON_UART_DIVISOR(base) \ + IORD(base, ALTERA_AVALON_UART_DIVISOR_REG) +#define IOWR_ALTERA_AVALON_UART_DIVISOR(base, data) \ + IOWR(base, ALTERA_AVALON_UART_DIVISOR_REG, data) + +#define ALTERA_AVALON_UART_EOP_REG 5 +#define IOADDR_ALTERA_AVALON_UART_EOP(base) \ + __IO_CALC_ADDRESS_NATIVE(base, ALTERA_AVALON_UART_EOP_REG) +#define IORD_ALTERA_AVALON_UART_EOP(base) \ + IORD(base, ALTERA_AVALON_UART_EOP_REG) +#define IOWR_ALTERA_AVALON_UART_EOP(base, data) \ + IOWR(base, ALTERA_AVALON_UART_EOP_REG, data) + +#define ALTERA_AVALON_UART_EOP_MSK (0xFF) +#define ALTERA_AVALON_UART_EOP_OFST (0) + +#endif /* __ALTERA_AVALON_UART_REGS_H__ */ diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/drivers/src/altera_avalon_uart_fd.c b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/drivers/src/altera_avalon_uart_fd.c new file mode 100644 index 0000000..69a391b --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/drivers/src/altera_avalon_uart_fd.c @@ -0,0 +1,100 @@ +/****************************************************************************** +* * +* License Agreement * +* * +* Copyright (c) 2007 Altera Corporation, San Jose, California, USA. * +* All rights reserved. * +* * +* Permission is hereby granted, free of charge, to any person obtaining a * +* copy of this software and associated documentation files (the "Software"), * +* to deal in the Software without restriction, including without limitation * +* the rights to use, copy, modify, merge, publish, distribute, sublicense, * +* and/or sell copies of the Software, and to permit persons to whom the * +* Software is furnished to do so, subject to the following conditions: * +* * +* The above copyright notice and this permission notice shall be included in * +* all copies or substantial portions of the Software. * +* * +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * +* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * +* DEALINGS IN THE SOFTWARE. * +* * +* This agreement shall be governed in all respects by the laws of the State * +* of California and by the laws of the United States of America. * +* * +******************************************************************************/ + +#include "alt_types.h" +#include "sys/alt_dev.h" +#include "altera_avalon_uart.h" + +extern int altera_avalon_uart_read(altera_avalon_uart_state* sp, + char* buffer, int space, int flags); +extern int altera_avalon_uart_write(altera_avalon_uart_state* sp, + const char* ptr, int count, int flags); +extern int altera_avalon_uart_ioctl(altera_avalon_uart_state* sp, + int req, void* arg); +extern int altera_avalon_uart_close(altera_avalon_uart_state* sp, int flags); + +/* ----------------------------------------------------------------------- */ +/* --------------------- WRAPPERS FOR ALT FD SUPPORT --------------------- */ +/* + * + */ + +int +altera_avalon_uart_read_fd(alt_fd* fd, char* buffer, int space) +{ + altera_avalon_uart_dev* dev = (altera_avalon_uart_dev*) fd->dev; + + return altera_avalon_uart_read(&dev->state, buffer, space, + fd->fd_flags); +} + +int +altera_avalon_uart_write_fd(alt_fd* fd, const char* buffer, int space) +{ + altera_avalon_uart_dev* dev = (altera_avalon_uart_dev*) fd->dev; + + return altera_avalon_uart_write(&dev->state, buffer, space, + fd->fd_flags); +} + +#if !defined(ALT_USE_SMALL_DRIVERS) && !defined(ALTERA_AVALON_UART_SMALL) + +/* + * Fast driver + */ + +/* + * To reduce the code footprint of this driver, the ioctl() function is not + * included by default. If you wish to use the ioctl features provided + * below, you can do so by adding the option : -DALTERA_AVALON_UART_USE_IOCTL + * to CPPFLAGS in the Makefile (or through the Eclipse IDE). + */ + +#ifdef ALTERA_AVALON_UART_USE_IOCTL + +int +altera_avalon_uart_ioctl_fd(alt_fd* fd, int req, void* arg) +{ + altera_avalon_uart_dev* dev = (altera_avalon_uart_dev*) fd->dev; + + return altera_avalon_uart_ioctl(&dev->state, req, arg); +} + +#endif /* ALTERA_AVALON_UART_USE_IOCTL */ + +int +altera_avalon_uart_close_fd(alt_fd* fd) +{ + altera_avalon_uart_dev* dev = (altera_avalon_uart_dev*) fd->dev; + + return altera_avalon_uart_close(&dev->state, fd->fd_flags); +} + +#endif /* fast driver */ diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/drivers/src/altera_avalon_uart_init.c b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/drivers/src/altera_avalon_uart_init.c new file mode 100644 index 0000000..cec4e03 --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/drivers/src/altera_avalon_uart_init.c @@ -0,0 +1,312 @@ +/****************************************************************************** +* * +* License Agreement * +* * +* Copyright (c) 2009 Altera Corporation, San Jose, California, USA. * +* All rights reserved. * +* * +* Permission is hereby granted, free of charge, to any person obtaining a * +* copy of this software and associated documentation files (the "Software"), * +* to deal in the Software without restriction, including without limitation * +* the rights to use, copy, modify, merge, publish, distribute, sublicense, * +* and/or sell copies of the Software, and to permit persons to whom the * +* Software is furnished to do so, subject to the following conditions: * +* * +* The above copyright notice and this permission notice shall be included in * +* all copies or substantial portions of the Software. * +* * +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * +* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * +* DEALINGS IN THE SOFTWARE. * +* * +* This agreement shall be governed in all respects by the laws of the State * +* of California and by the laws of the United States of America. * +* * +******************************************************************************/ + +#include + +#include "sys/alt_dev.h" +#include "sys/alt_irq.h" +#include "sys/ioctl.h" +#include "sys/alt_errno.h" + +#include "altera_avalon_uart.h" +#include "altera_avalon_uart_regs.h" + +#if !defined(ALT_USE_SMALL_DRIVERS) && !defined(ALTERA_AVALON_UART_SMALL) + +/* ----------------------------------------------------------- */ +/* ------------------------- FAST DRIVER --------------------- */ +/* ----------------------------------------------------------- */ + +/* + * altera_avalon_uart_init() is called by the auto-generated function + * alt_sys_init() in order to initialize a particular instance of this device. + * It is responsible for configuring the device and associated software + * constructs. + */ + +#ifdef ALT_ENHANCED_INTERRUPT_API_PRESENT +static void altera_avalon_uart_irq(void* context); +#else +static void altera_avalon_uart_irq(void* context, alt_u32 id); +#endif + +static void altera_avalon_uart_rxirq(altera_avalon_uart_state* sp, + alt_u32 status); +static void altera_avalon_uart_txirq(altera_avalon_uart_state* sp, + alt_u32 status); + +void +altera_avalon_uart_init(altera_avalon_uart_state* sp, + alt_u32 irq_controller_id, alt_u32 irq) +{ + void* base = sp->base; + int error; + + /* + * Initialise the read and write flags and the semaphores used to + * protect access to the circular buffers when running in a multi-threaded + * environment. + */ + error = ALT_FLAG_CREATE (&sp->events, 0) || + ALT_SEM_CREATE (&sp->read_lock, 1) || + ALT_SEM_CREATE (&sp->write_lock, 1); + + if (!error) + { + /* enable interrupts at the device */ + sp->ctrl = ALTERA_AVALON_UART_CONTROL_RTS_MSK | + ALTERA_AVALON_UART_CONTROL_RRDY_MSK | + ALTERA_AVALON_UART_CONTROL_DCTS_MSK; + + IOWR_ALTERA_AVALON_UART_CONTROL(base, sp->ctrl); + + /* register the interrupt handler */ +#ifdef ALT_ENHANCED_INTERRUPT_API_PRESENT + alt_ic_isr_register(irq_controller_id, irq, altera_avalon_uart_irq, sp, + 0x0); +#else + alt_irq_register (irq, sp, altera_avalon_uart_irq); +#endif + } +} + +/* + * altera_avalon_uart_irq() is the interrupt handler registered at + * configuration time for processing UART interrupts. It vectors + * interrupt requests to either altera_avalon_uart_rxirq() (for incoming + * data), or altera_avalon_uart_txirq() (for outgoing data). + */ +#ifdef ALT_ENHANCED_INTERRUPT_API_PRESENT +static void altera_avalon_uart_irq(void* context) +#else +static void altera_avalon_uart_irq(void* context, alt_u32 id) +#endif +{ + alt_u32 status; + + altera_avalon_uart_state* sp = (altera_avalon_uart_state*) context; + void* base = sp->base; + + /* + * Read the status register in order to determine the cause of the + * interrupt. + */ + + status = IORD_ALTERA_AVALON_UART_STATUS(base); + + /* Clear any error flags set at the device */ + IOWR_ALTERA_AVALON_UART_STATUS(base, 0); + + /* Dummy read to ensure IRQ is negated before ISR returns */ + IORD_ALTERA_AVALON_UART_STATUS(base); + + /* process a read irq */ + if (status & ALTERA_AVALON_UART_STATUS_RRDY_MSK) + { + altera_avalon_uart_rxirq(sp, status); + } + + /* process a write irq */ + if (status & (ALTERA_AVALON_UART_STATUS_TRDY_MSK | + ALTERA_AVALON_UART_STATUS_DCTS_MSK)) + { + altera_avalon_uart_txirq(sp, status); + } + + +} + +/* + * altera_avalon_uart_rxirq() is called by altera_avalon_uart_irq() to + * process a receive interrupt. It transfers the incoming character into + * the receive circular buffer, and sets the apropriate flags to indicate + * that there is data ready to be processed. + */ +static void +altera_avalon_uart_rxirq(altera_avalon_uart_state* sp, alt_u32 status) +{ + alt_u32 next; + + /* If there was an error, discard the data */ + + if (status & (ALTERA_AVALON_UART_STATUS_PE_MSK | + ALTERA_AVALON_UART_STATUS_FE_MSK)) + { + return; + } + + /* + * In a multi-threaded environment, set the read event flag to indicate + * that there is data ready. This is only done if the circular buffer was + * previously empty. + */ + + if (sp->rx_end == sp->rx_start) + { + ALT_FLAG_POST (sp->events, ALT_UART_READ_RDY, OS_FLAG_SET); + } + + /* Determine which slot to use next in the circular buffer */ + + next = (sp->rx_end + 1) & ALT_AVALON_UART_BUF_MSK; + + /* Transfer data from the device to the circular buffer */ + + sp->rx_buf[sp->rx_end] = IORD_ALTERA_AVALON_UART_RXDATA(sp->base); + + sp->rx_end = next; + + next = (sp->rx_end + 1) & ALT_AVALON_UART_BUF_MSK; + + /* + * If the cicular buffer was full, disable interrupts. Interrupts will be + * re-enabled when data is removed from the buffer. + */ + + if (next == sp->rx_start) + { + sp->ctrl &= ~ALTERA_AVALON_UART_CONTROL_RRDY_MSK; + IOWR_ALTERA_AVALON_UART_CONTROL(sp->base, sp->ctrl); + } +} + +/* + * altera_avalon_uart_txirq() is called by altera_avalon_uart_irq() to + * process a transmit interrupt. It transfers data from the transmit + * buffer to the device, and sets the apropriate flags to indicate that + * there is data ready to be processed. + */ +static void +altera_avalon_uart_txirq(altera_avalon_uart_state* sp, alt_u32 status) +{ + /* Transfer data if there is some ready to be transfered */ + + if (sp->tx_start != sp->tx_end) + { + /* + * If the device is using flow control (i.e. RTS/CTS), then the + * transmitter is required to throttle if CTS is high. + */ + + if (!(sp->flags & ALT_AVALON_UART_FC) || + (status & ALTERA_AVALON_UART_STATUS_CTS_MSK)) + { + + /* + * In a multi-threaded environment, set the write event flag to indicate + * that there is space in the circular buffer. This is only done if the + * buffer was previously empty. + */ + + if (sp->tx_start == ((sp->tx_end + 1) & ALT_AVALON_UART_BUF_MSK)) + { + ALT_FLAG_POST (sp->events, + ALT_UART_WRITE_RDY, + OS_FLAG_SET); + } + + /* Write the data to the device */ + + IOWR_ALTERA_AVALON_UART_TXDATA(sp->base, sp->tx_buf[sp->tx_start]); + + sp->tx_start = (++sp->tx_start) & ALT_AVALON_UART_BUF_MSK; + + /* + * In case the tranmit interrupt had previously been disabled by + * detecting a low value on CTS, it is reenabled here. + */ + + sp->ctrl |= ALTERA_AVALON_UART_CONTROL_TRDY_MSK; + } + else + { + /* + * CTS is low and we are using flow control, so disable the transmit + * interrupt while we wait for CTS to go high again. This will be + * detected using the DCTS interrupt. + * + * There is a race condition here. "status" may indicate that + * CTS is low, but it actually went high before DCTS was cleared on + * the last write to the status register. To avoid this resulting in + * deadlock, it's necessary to re-check the status register here + * before throttling. + */ + + status = IORD_ALTERA_AVALON_UART_STATUS(sp->base); + + if (!(status & ALTERA_AVALON_UART_STATUS_CTS_MSK)) + { + sp->ctrl &= ~ALTERA_AVALON_UART_CONTROL_TRDY_MSK; + } + } + } + + /* + * If the circular buffer is empty, disable the interrupt. This will be + * re-enabled when new data is placed in the buffer. + */ + + if (sp->tx_start == sp->tx_end) + { + sp->ctrl &= ~(ALTERA_AVALON_UART_CONTROL_TRDY_MSK | + ALTERA_AVALON_UART_CONTROL_DCTS_MSK); + } + + IOWR_ALTERA_AVALON_UART_CONTROL(sp->base, sp->ctrl); +} + +/* + * The close() routine is implemented to drain the UART transmit buffer + * when not in "small" mode. This routine will wait for transimt data to be + * emptied unless the driver flags have been set to non-blocking mode. + * This routine should be called indirectly (i.e. though the C library + * close() routine) so that the file descriptor associated with the relevant + * stream (i.e. stdout) can be closed as well. This routine does not manage + * file descriptors. + * + * The close routine is not implemented for the small driver; instead it will + * map to null. This is because the small driver simply waits while characters + * are transmitted; there is no interrupt-serviced buffer to empty + */ +int altera_avalon_uart_close(altera_avalon_uart_state* sp, int flags) +{ + /* + * Wait for all transmit data to be emptied by the UART ISR. + */ + while (sp->tx_start != sp->tx_end) { + if (flags & O_NONBLOCK) { + return -EWOULDBLOCK; + } + } + + return 0; +} + +#endif /* fast driver */ diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/drivers/src/altera_avalon_uart_ioctl.c b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/drivers/src/altera_avalon_uart_ioctl.c new file mode 100644 index 0000000..eb4b2e3 --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/drivers/src/altera_avalon_uart_ioctl.c @@ -0,0 +1,153 @@ +/****************************************************************************** +* * +* License Agreement * +* * +* Copyright (c) 2006 Altera Corporation, San Jose, California, USA. * +* All rights reserved. * +* * +* Permission is hereby granted, free of charge, to any person obtaining a * +* copy of this software and associated documentation files (the "Software"), * +* to deal in the Software without restriction, including without limitation * +* the rights to use, copy, modify, merge, publish, distribute, sublicense, * +* and/or sell copies of the Software, and to permit persons to whom the * +* Software is furnished to do so, subject to the following conditions: * +* * +* The above copyright notice and this permission notice shall be included in * +* all copies or substantial portions of the Software. * +* * +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * +* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * +* DEALINGS IN THE SOFTWARE. * +* * +* This agreement shall be governed in all respects by the laws of the State * +* of California and by the laws of the United States of America. * +* * +******************************************************************************/ + +#include +#include + +#include "sys/alt_irq.h" +#include "sys/ioctl.h" +#include "sys/alt_errno.h" + +#include "altera_avalon_uart_regs.h" +#include "altera_avalon_uart.h" + + +#if !defined(ALT_USE_SMALL_DRIVERS) && !defined(ALTERA_AVALON_UART_SMALL) + +/* ----------------------------------------------------------- */ +/* ------------------------- FAST DRIVER --------------------- */ +/* ----------------------------------------------------------- */ + +/* + * To reduce the code footprint of this driver, the ioctl() function is not + * included by default. If you wish to use the ioctl features provided + * below, you can do so by adding the option : -DALTERA_AVALON_UART_USE_IOCTL + * to CPPFLAGS in the Makefile (or through the Eclipse IDE). + */ + +#ifdef ALTERA_AVALON_UART_USE_IOCTL + +/* + * altera_avalon_uart_ioctl() is called by the system ioctl() function to handle + * ioctl requests for the UART. The only ioctl requests supported are TIOCMGET + * and TIOCMSET. + * + * TIOCMGET returns a termios structure that describes the current device + * configuration. + * + * TIOCMSET sets the device (if possible) to match the requested configuration. + * The requested configuration is described using a termios structure passed + * through the input argument "arg". + */ + +static int altera_avalon_uart_tiocmget(altera_avalon_uart_state* sp, + struct termios* term); +static int altera_avalon_uart_tiocmset(altera_avalon_uart_state* sp, + struct termios* term); + +int +altera_avalon_uart_ioctl(altera_avalon_uart_state* sp, int req, void* arg) +{ + int rc = -ENOTTY; + + switch (req) + { + case TIOCMGET: + rc = altera_avalon_uart_tiocmget(sp, (struct termios*) arg); + break; + case TIOCMSET: + rc = altera_avalon_uart_tiocmset(sp, (struct termios*) arg); + break; + default: + break; + } + return rc; +} + +/* + * altera_avalon_uart_tiocmget() is used by altera_avalon_uart_ioctl() to fill + * in the input termios structure with the current device configuration. + * + * See termios.h for further details on the contents of the termios structure. + */ + +static int +altera_avalon_uart_tiocmget(altera_avalon_uart_state* sp, + struct termios* term) +{ + memcpy (term, &sp->termios, sizeof (struct termios)); + return 0; +} + +/* + * altera_avalon_uart_tiocmset() is used by altera_avalon_uart_ioctl() to + * configure the device according to the settings in the input termios + * structure. In practice the only configuration that can be changed is the + * baud rate, and then only if the hardware is configured to have a writable + * baud register. + */ + +static int +altera_avalon_uart_tiocmset(altera_avalon_uart_state* sp, + struct termios* term) +{ + speed_t speed; + + speed = sp->termios.c_ispeed; + + /* Update the settings if the hardware supports it */ + + if (!(sp->flags & ALT_AVALON_UART_FB)) + { + sp->termios.c_ispeed = sp->termios.c_ospeed = term->c_ispeed; + } + /* + * If the request was for an unsupported setting, return an error. + */ + + if (memcmp(term, &sp->termios, sizeof (struct termios))) + { + sp->termios.c_ispeed = sp->termios.c_ospeed = speed; + return -EIO; + } + + /* + * Otherwise, update the hardware. + */ + + IOWR_ALTERA_AVALON_UART_DIVISOR(sp->base, + ((sp->freq/sp->termios.c_ispeed) - 1)); + + return 0; +} + +#endif /* ALTERA_AVALON_UART_USE_IOCTL */ + +#endif /* fast driver */ diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/drivers/src/altera_avalon_uart_read.c b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/drivers/src/altera_avalon_uart_read.c new file mode 100644 index 0000000..948f970 --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/drivers/src/altera_avalon_uart_read.c @@ -0,0 +1,240 @@ +/****************************************************************************** +* * +* License Agreement * +* * +* Copyright (c) 2006 Altera Corporation, San Jose, California, USA. * +* All rights reserved. * +* * +* Permission is hereby granted, free of charge, to any person obtaining a * +* copy of this software and associated documentation files (the "Software"), * +* to deal in the Software without restriction, including without limitation * +* the rights to use, copy, modify, merge, publish, distribute, sublicense, * +* and/or sell copies of the Software, and to permit persons to whom the * +* Software is furnished to do so, subject to the following conditions: * +* * +* The above copyright notice and this permission notice shall be included in * +* all copies or substantial portions of the Software. * +* * +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * +* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * +* DEALINGS IN THE SOFTWARE. * +* * +* This agreement shall be governed in all respects by the laws of the State * +* of California and by the laws of the United States of America. * +* * +******************************************************************************/ + +#include + +#include "sys/alt_irq.h" +#include "sys/ioctl.h" +#include "sys/alt_errno.h" + +#include "altera_avalon_uart.h" +#include "altera_avalon_uart_regs.h" + +#if defined(ALT_USE_SMALL_DRIVERS) || defined(ALTERA_AVALON_UART_SMALL) + +/* ----------------------------------------------------------- */ +/* ----------------------- SMALL DRIVER ---------------------- */ +/* ----------------------------------------------------------- */ + +/* + * altera_avalon_uart_read() is called by the system read() function in order to + * read a block of data from the UART. "len" is the maximum length of the data + * to read, and "ptr" indicates the destination address. "fd" is the file + * descriptor for the device to be read from. + * + * Permission checks are made before the call to altera_avalon_uart_read(), so + * we know that the file descriptor has been opened with the correct permissions + * for this operation. + * + * The return value is the number of bytes actually read. + * + * This implementation polls the device waiting for characters. At most it can + * only return one character, regardless of how many are requested. If the + * device is being accessed in non-blocking mode then it is possible for this + * function to return without reading any characters. In this case errno is + * set to EWOULDBLOCK. + */ + +int +altera_avalon_uart_read(altera_avalon_uart_state* sp, char* ptr, int len, + int flags) +{ + int block; + unsigned int status; + + block = !(flags & O_NONBLOCK); + + do + { + status = IORD_ALTERA_AVALON_UART_STATUS(sp->base); + + /* clear any error flags */ + + IOWR_ALTERA_AVALON_UART_STATUS(sp->base, 0); + + if (status & ALTERA_AVALON_UART_CONTROL_RRDY_MSK) + { + ptr[0] = IORD_ALTERA_AVALON_UART_RXDATA(sp->base); + + if (!(status & (ALTERA_AVALON_UART_STATUS_PE_MSK | + ALTERA_AVALON_UART_STATUS_FE_MSK))) + { + return 1; + } + } + } + while (block); + + ALT_ERRNO = EWOULDBLOCK; + + return 0; +} + +#else + +/* ----------------------------------------------------------- */ +/* ----------------------- FAST DRIVER ----------------------- */ +/* ----------------------------------------------------------- */ + +/* + * altera_avalon_uart_read() is called by the system read() function in order to + * read a block of data from the UART. "len" is the maximum length of the data + * to read, and "ptr" indicates the destination address. "sp" is the state + * pointer for the device to be read from. + * + * Permission checks are made before the call to altera_avalon_uart_read(), so + * we know that the file descriptor has been opened with the correct permissions + * for this operation. + * + * The return value is the number of bytes actually read. + * + * This function does not communicate with the device directly. Instead data is + * transfered from a circular buffer. The interrupt handler is then responsible + * for copying data from the device into this buffer. + */ + +int +altera_avalon_uart_read(altera_avalon_uart_state* sp, char* ptr, int len, + int flags) +{ + alt_irq_context context; + int block; + alt_u8 read_would_block = 0; + int count = 0; + + /* + * Construct a flag to indicate whether the device is being accessed in + * blocking or non-blocking mode. + */ + + block = !(flags & O_NONBLOCK); + + /* + * When running in a multi threaded environment, obtain the "read_lock" + * semaphore. This ensures that reading from the device is thread-safe. + */ + + ALT_SEM_PEND (sp->read_lock, 0); + + /* + * Loop, copying data from the circular buffer to the destination address + * supplied in "ptr". This loop is terminated when the required number of + * bytes have been read. If the circular buffer is empty, and no data has + * been read, then the loop will block (when in blocking mode). + * + * If the circular buffer is empty, and some data has already been + * transferred, or the device is being accessed in non-blocking mode, then + * the loop terminates without necessarily reading all the requested data. + */ + + do + { + /* + * Read the required amount of data, until the circular buffer runs + * empty + */ + + while ((count < len) && (sp->rx_start != sp->rx_end)) + { + count++; + *ptr++ = sp->rx_buf[sp->rx_start]; + + sp->rx_start = (sp->rx_start+1) & ALT_AVALON_UART_BUF_MSK; + } + + /* + * If no data has been transferred, the circular buffer is empty, and + * this is not a non-blocking access, block waiting for data to arrive. + */ + + if (!count && (sp->rx_start == sp->rx_end)) + { + if (!block) + { + /* Set errno to indicate the reason we're not returning any data */ + + ALT_ERRNO = EWOULDBLOCK; + read_would_block = 1; + break; + } + else + { + /* Block waiting for some data to arrive */ + + /* First, ensure read interrupts are enabled to avoid deadlock */ + + context = alt_irq_disable_all (); + sp->ctrl |= ALTERA_AVALON_UART_CONTROL_RRDY_MSK; + IOWR_ALTERA_AVALON_UART_CONTROL(sp->base, sp->ctrl); + alt_irq_enable_all (context); + + /* + * When running in a multi-threaded mode, we pend on the read event + * flag set in the interrupt service routine. This avoids wasting CPU + * cycles waiting in this thread, when we could be doing something more + * profitable elsewhere. + */ + + ALT_FLAG_PEND (sp->events, + ALT_UART_READ_RDY, + OS_FLAG_WAIT_SET_ANY + OS_FLAG_CONSUME, + 0); + } + } + } + while (!count && len); + + /* + * Now that access to the circular buffer is complete, release the read + * semaphore so that other threads can access the buffer. + */ + + ALT_SEM_POST (sp->read_lock); + + /* + * Ensure that interrupts are enabled, so that the circular buffer can + * re-fill. + */ + + context = alt_irq_disable_all (); + sp->ctrl |= ALTERA_AVALON_UART_CONTROL_RRDY_MSK; + IOWR_ALTERA_AVALON_UART_CONTROL(sp->base, sp->ctrl); + alt_irq_enable_all (context); + + /* Return the number of bytes read */ + if(read_would_block) { + return -EWOULDBLOCK; + } + else { + return count; + } +} + +#endif /* fast driver */ diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/drivers/src/altera_avalon_uart_write.c b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/drivers/src/altera_avalon_uart_write.c new file mode 100644 index 0000000..cb23d1f --- /dev/null +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/drivers/src/altera_avalon_uart_write.c @@ -0,0 +1,232 @@ +/****************************************************************************** +* * +* License Agreement * +* * +* Copyright (c) 2006 Altera Corporation, San Jose, California, USA. * +* All rights reserved. * +* * +* Permission is hereby granted, free of charge, to any person obtaining a * +* copy of this software and associated documentation files (the "Software"), * +* to deal in the Software without restriction, including without limitation * +* the rights to use, copy, modify, merge, publish, distribute, sublicense, * +* and/or sell copies of the Software, and to permit persons to whom the * +* Software is furnished to do so, subject to the following conditions: * +* * +* The above copyright notice and this permission notice shall be included in * +* all copies or substantial portions of the Software. * +* * +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * +* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * +* DEALINGS IN THE SOFTWARE. * +* * +* This agreement shall be governed in all respects by the laws of the State * +* of California and by the laws of the United States of America. * +* * +******************************************************************************/ + +#include + +#include "sys/alt_dev.h" +#include "sys/alt_irq.h" +#include "sys/ioctl.h" +#include "sys/alt_errno.h" + +#include "altera_avalon_uart_regs.h" +#include "altera_avalon_uart.h" + +#if defined(ALT_USE_SMALL_DRIVERS) || defined(ALTERA_AVALON_UART_SMALL) + +/* ----------------------------------------------------------- */ +/* ------------------------ SMALL DRIVER --------------------- */ +/* ----------------------------------------------------------- */ + +/* + * altera_avalon_uart_write() is called by the system write() function in + * order to write a block of data to the UART. + * "len" is the length of the data to write, + * and "ptr" indicates the source address. "fd" is the file descriptor for the + * device to be read from. + * + * Permission checks are made before the call to altera_avalon_uart_write(), so + * we know that the file descriptor has been opened with the correct permissions + * for this operation. + * + * The return value is the number of bytes actually written. + * + * This function will block on the devices transmit register, until all + * characters have been transmitted. This is unless the device is being + * accessed in non-blocking mode. In this case this function will return as + * soon as the device reports that it is not ready to transmit. + * + * Since this is the small footprint version of the UART driver, the value of + * CTS is ignored. + */ + +int +altera_avalon_uart_write(altera_avalon_uart_state* sp, const char* ptr, int len, + int flags) +{ + int block; + unsigned int status; + int count; + + block = !(flags & O_NONBLOCK); + count = len; + + do + { + status = IORD_ALTERA_AVALON_UART_STATUS(sp->base); + + if (status & ALTERA_AVALON_UART_STATUS_TRDY_MSK) + { + IOWR_ALTERA_AVALON_UART_TXDATA(sp->base, *ptr++); + count--; + } + } + while (block && count); + + if (count) + { + ALT_ERRNO = EWOULDBLOCK; + } + + return (len - count); +} + +#else /* Using the "fast" version of the driver */ + +/* ----------------------------------------------------------- */ +/* ------------------------- FAST DRIVER --------------------- */ +/* ----------------------------------------------------------- */ + +/* + * altera_avalon_uart_write() is called by the system write() function in order + * to write a block of data to the UART. "len" is the length of the data to + * write, and "ptr" indicates the source address. "sp" is the state pointer + * for the device to be written to. + * + * Permission checks are made before the call to altera_avalon_uart_write(), so + * we know that the file descriptor has been opened with the correct permissions + * for this operation. + * + * The return value is the number of bytes actually written. + * + * This function does not communicate with the device directly. Instead data is + * transfered to a circular buffer. The interrupt handler is then responsible + * for copying data from this buffer into the device. + */ + +int +altera_avalon_uart_write(altera_avalon_uart_state* sp, const char* ptr, int len, + int flags) +{ + alt_irq_context context; + int no_block; + alt_u32 next; + int count = len; + + /* + * Construct a flag to indicate whether the device is being accessed in + * blocking or non-blocking mode. + */ + + no_block = (flags & O_NONBLOCK); + + /* + * When running in a multi threaded environment, obtain the "write_lock" + * semaphore. This ensures that writing to the device is thread-safe. + */ + + ALT_SEM_PEND (sp->write_lock, 0); + + /* + * Loop transferring data from the input buffer to the transmit circular + * buffer. The loop is terminated once all the data has been transferred, + * or, (if in non-blocking mode) the buffer becomes full. + */ + + while (count) + { + /* Determine the next slot in the buffer to access */ + + next = (sp->tx_end + 1) & ALT_AVALON_UART_BUF_MSK; + + /* block waiting for space if necessary */ + + if (next == sp->tx_start) + { + if (no_block) + { + /* Set errno to indicate why this function returned early */ + + ALT_ERRNO = EWOULDBLOCK; + break; + } + else + { + /* Block waiting for space in the circular buffer */ + + /* First, ensure transmit interrupts are enabled to avoid deadlock */ + + context = alt_irq_disable_all (); + sp->ctrl |= (ALTERA_AVALON_UART_CONTROL_TRDY_MSK | + ALTERA_AVALON_UART_CONTROL_DCTS_MSK); + IOWR_ALTERA_AVALON_UART_CONTROL(sp->base, sp->ctrl); + alt_irq_enable_all (context); + + /* wait for space to come free */ + + do + { + /* + * When running in a multi-threaded mode, we pend on the write event + * flag set in the interrupt service routine. This avoids wasting CPU + * cycles waiting in this thread, when we could be doing something + * more profitable elsewhere. + */ + + ALT_FLAG_PEND (sp->events, + ALT_UART_WRITE_RDY, + OS_FLAG_WAIT_SET_ANY + OS_FLAG_CONSUME, + 0); + } + while ((next == sp->tx_start)); + } + } + + count--; + + /* Add the next character to the transmit buffer */ + + sp->tx_buf[sp->tx_end] = *ptr++; + sp->tx_end = next; + } + + /* + * Now that access to the circular buffer is complete, release the write + * semaphore so that other threads can access the buffer. + */ + + ALT_SEM_POST (sp->write_lock); + + /* + * Ensure that interrupts are enabled, so that the circular buffer can + * drain. + */ + + context = alt_irq_disable_all (); + sp->ctrl |= ALTERA_AVALON_UART_CONTROL_TRDY_MSK | + ALTERA_AVALON_UART_CONTROL_DCTS_MSK; + IOWR_ALTERA_AVALON_UART_CONTROL(sp->base, sp->ctrl); + alt_irq_enable_all (context); + + /* return the number of bytes written */ + + return (len - count); +} + +#endif /* fast driver */ diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/linker.h b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/linker.h index f69e151..60e112f 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/linker.h +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/linker.h @@ -4,7 +4,7 @@ * Machine generated for CPU 'nios2_gen2' in SOPC Builder design 'Qsys' * SOPC Builder design path: ../../Qsys.sopcinfo * - * Generated: Fri May 14 13:04:40 BST 2021 + * Generated: Thu Jun 03 15:15:16 BST 2021 */ /* @@ -66,7 +66,7 @@ */ #define ONCHIP_MEMORY2_0_REGION_BASE 0x20020 -#define ONCHIP_MEMORY2_0_REGION_SPAN 99968 +#define ONCHIP_MEMORY2_0_REGION_SPAN 131040 #define RESET_REGION_BASE 0x20000 #define RESET_REGION_SPAN 32 diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/mem_init.mk b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/mem_init.mk index 770118e..82d79b0 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/mem_init.mk +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/mem_init.mk @@ -150,12 +150,12 @@ flash2dat_extra_args = $(mem_pad_flag) $(mem_reloc_input_flag) # This following VERSION comment indicates the version of the tool used to # generate this makefile. A makefile variable is provided for VERSION as well. -# ACDS_VERSION: 16.0 -ACDS_VERSION := 16.0 +# ACDS_VERSION: 16.1 +ACDS_VERSION := 16.1 # This following BUILD_NUMBER comment indicates the build number of the tool # used to generate this makefile. -# BUILD_NUMBER: 222 +# BUILD_NUMBER: 196 # Optimize for simulation SIM_OPTIMIZE ?= 0 @@ -181,8 +181,8 @@ HDL_SIM_INSTALL_FILES += $(HDL_SIM_INSTALL_DIR)/$(MEM_0).dat SYM_FILES += $(HDL_SIM_DIR)/$(MEM_0).sym HDL_SIM_INSTALL_FILES += $(HDL_SIM_INSTALL_DIR)/$(MEM_0).sym $(MEM_0)_START := 0x00020000 -$(MEM_0)_END := 0x0003869f -$(MEM_0)_SPAN := 0x000186a0 +$(MEM_0)_END := 0x0003ffff +$(MEM_0)_SPAN := 0x00020000 $(MEM_0)_HIERARCHICAL_PATH := onchip_memory2_0 $(MEM_0)_WIDTH := 32 $(MEM_0)_HEX_DATA_WIDTH := 32 diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/memory.gdb b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/memory.gdb index ea7ad39..4ed4ec1 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/memory.gdb +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/memory.gdb @@ -3,7 +3,7 @@ # Machine generated for CPU 'nios2_gen2' in SOPC Builder design 'Qsys' # SOPC Builder design path: ../../Qsys.sopcinfo # -# Generated: Fri May 14 13:04:40 BST 2021 +# Generated: Thu Jun 03 15:15:16 BST 2021 # DO NOT MODIFY THIS FILE # @@ -47,4 +47,4 @@ # by allowing GDB to cache memory contents on the host. # onchip_memory2_0 -memory 0x20000 0x386a0 cache +memory 0x20000 0x40000 cache diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/public.mk b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/public.mk index 9d9d24b..499a13c 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/public.mk +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/public.mk @@ -77,12 +77,12 @@ ALT_CPPFLAGS += -pipe # This following VERSION comment indicates the version of the tool used to # generate this makefile. A makefile variable is provided for VERSION as well. -# ACDS_VERSION: 16.0 -ACDS_VERSION := 16.0 +# ACDS_VERSION: 16.1 +ACDS_VERSION := 16.1 # This following BUILD_NUMBER comment indicates the build number of the tool # used to generate this makefile. -# BUILD_NUMBER: 222 +# BUILD_NUMBER: 196 # Qsys--generated SOPCINFO file. Required for resolving node instance ID's with # design component names. @@ -157,9 +157,9 @@ SOPC_SYSID_FLAG += --sidp=0x410e0 ELF_PATCH_FLAG += --sidp 0x410e0 # The SOPC Timestamp -# setting SOPC_TIMESTAMP is 1622558600 -SOPC_SYSID_FLAG += --timestamp=1622558600 -ELF_PATCH_FLAG += --timestamp 1622558600 +# setting SOPC_TIMESTAMP is 1622729449 +SOPC_SYSID_FLAG += --timestamp=1622729449 +ELF_PATCH_FLAG += --timestamp 1622729449 # Enable JTAG UART driver to recover when host is inactive causing buffer to # full without returning error. Printf will not fail with this recovery. none @@ -168,6 +168,15 @@ ELF_PATCH_FLAG += --timestamp 1622558600 # Small-footprint (polled mode) driver none # setting altera_avalon_jtag_uart_driver.enable_small_driver is false +# Enable driver ioctl() support. This feature is not compatible with the +# 'small' driver; ioctl() support will not be compiled if either the UART +# 'enable_small_driver' or HAL 'enable_reduced_device_drivers' settings are +# enabled. none +# setting altera_avalon_uart_driver.enable_ioctl is false + +# Small-footprint (polled mode) driver none +# setting altera_avalon_uart_driver.enable_small_driver is false + # Build a custom version of newlib with the specified space-separated compiler # flags. The custom newlib build will be placed in the /newlib # directory, and will be used only for applications that utilize this BSP. @@ -256,6 +265,18 @@ ALT_CPPFLAGS += -DALT_NO_INSTRUCTION_EMULATION # SOPC_SYSID_FLAG in public.mk. none # setting hal.enable_sopc_sysid_check is true +# C/C++ compiler to generate (do not generate) GP-relative accesses. 'none' +# tells the compilter not to generate GP-relative accesses. 'local' will +# generate GP-relative accesses for small data objects that are not external, +# weak, or uninitialized common symbols. Also use GP-relative addressing for +# objects that have been explicitly placed in a small data section via a +# section attribute. provides the default set of debug symbols typically +# required to debug a typical application. 'global' is same as 'local' but also +# generate GP-relative accesses for small data objects that are external, weak, +# or common. none +# setting hal.make.cflags_mgpopt is -mgpopt=local +ALT_CFLAGS += -mgpopt=local + # Enable BSP generation to query if SOPC system is big endian. If true ignores # export of 'ALT_CFLAGS += -meb' to public.mk if big endian system. none # setting hal.make.ignore_system_derived.big_endian is false diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/settings.bsp b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/settings.bsp index 9da8033..13d4492 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/settings.bsp +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/settings.bsp @@ -2,11 +2,11 @@ hal default - Jun 1, 2021 3:52:17 PM - 1622559138001 - /home/ad3919/nfshome/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp + 03-Jun-2021 15:15:44 + 1622729744108 + F:\Ed\Stuff\EEE2Rover\DE10_LITE_D8M_VIP_16\software\D8M_Camera_Test_bsp settings.bsp - ../../Qsys.sopcinfo + ..\..\Qsys.sopcinfo default nios2_gen2 1.9 @@ -322,18 +322,6 @@ false common - - hal.make.cflags_mgpopt - CFLAGS_MGPOPT - UnquotedString - -mgpopt=local - -mgpopt=local - makefile_variable - C/C++ compiler to generate (do not generate) GP-relative accesses. 'none' tells the compilter not to generate GP-relative accesses. 'local' will generate GP-relative accesses for small data objects that are not external, weak, or uninitialized common symbols. Also use GP-relative addressing for objects that have been explicitly placed in a small data section via a section attribute. provides the default set of debug symbols typically required to debug a typical application. 'global' is same as 'local' but also generate GP-relative accesses for small data objects that are external, weak, or common. - none - false - common - hal.make.ar AR @@ -550,6 +538,18 @@ false none + + hal.make.cflags_mgpopt + CFLAGS_MGPOPT + UnquotedString + -mgpopt=local + -mgpopt=global + public_mk_define + C/C++ compiler to generate (do not generate) GP-relative accesses. 'none' tells the compilter not to generate GP-relative accesses. 'local' will generate GP-relative accesses for small data objects that are not external, weak, or uninitialized common symbols. Also use GP-relative addressing for objects that have been explicitly placed in a small data section via a section attribute. provides the default set of debug symbols typically required to debug a typical application. 'global' is same as 'local' but also generate GP-relative accesses for small data objects that are external, weak, or common. + none + false + common + hal.make.ignore_system_derived.sopc_system_id none @@ -898,10 +898,34 @@ false + + altera_avalon_uart_driver.enable_small_driver + ALTERA_AVALON_UART_SMALL + BooleanDefineOnly + false + false + public_mk_define + Small-footprint (polled mode) driver + none + false + + + + altera_avalon_uart_driver.enable_ioctl + ALTERA_AVALON_UART_USE_IOCTL + BooleanDefineOnly + false + false + public_mk_define + Enable driver ioctl() support. This feature is not compatible with the 'small' driver; ioctl() support will not be compiled if either the UART 'enable_small_driver' or HAL 'enable_reduced_device_drivers' settings are enabled. + none + false + + onchip_memory2_0 - 0x00020000 - 0x0003869F - 100000 + 0x00020000 - 0x0003FFFF + 131072 memory @@ -982,6 +1006,12 @@ 32 + + uart_0 + 0x00042020 - 0x0004203F + 32 + printable + .text onchip_memory2_0 diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/summary.html b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/summary.html index 8a08e02..bc960e9 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/summary.html +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/summary.html @@ -7,7 +7,7 @@ BSP Type:hal -SOPC Design File:../../Qsys.sopcinfo +SOPC Design File:..\..\Qsys.sopcinfo Quartus JDI File:default @@ -22,13 +22,13 @@ BSP Version:default -BSP Generated On:Jun 1, 2021 3:52:17 PM +BSP Generated On:14-May-2021 21:40:25 -BSP Generated Timestamp:1622559138001 +BSP Generated Timestamp:1621024825749 -BSP Generated Location:/home/ad3919/nfshome/EE2Rover/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp +BSP Generated Location:F:\Ed\Stuff\EEE2Rover\DE10_LITE_D8M_VIP_16\software\D8M_Camera_Test_bsp
      @@ -1446,7 +1446,7 @@ Identifier:CFLAGS_MGPOPT -Default Value:-mgpopt=local +Default Value:-mgpopt=global Value:-mgpopt=local @@ -1455,7 +1455,7 @@ Type:UnquotedString -Destination:makefile_variable +Destination:public_mk_define Description:C/C++ compiler to generate (do not generate) GP-relative accesses. 'none' tells the compilter not to generate GP-relative accesses. 'local' will generate GP-relative accesses for small data objects that are not external, weak, or uninitialized common symbols. Also use GP-relative addressing for objects that have been explicitly placed in a small data section via a section attribute. provides the default set of debug symbols typically required to debug a typical application. 'global' is same as 'local' but also generate GP-relative accesses for small data objects that are external, weak, or common. diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/system.h b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/system.h index 30290a1..7b72227 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/system.h +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test_bsp/system.h @@ -4,7 +4,7 @@ * Machine generated for CPU 'nios2_gen2' in SOPC Builder design 'Qsys' * SOPC Builder design path: ../../Qsys.sopcinfo * - * Generated: Tue Jun 01 15:52:19 BST 2021 + * Generated: Thu Jun 03 15:15:16 BST 2021 */ /* @@ -146,6 +146,7 @@ #define __ALTERA_AVALON_PIO #define __ALTERA_AVALON_SYSID_QSYS #define __ALTERA_AVALON_TIMER +#define __ALTERA_AVALON_UART #define __ALTERA_NIOS2_GEN2 #define __ALTPLL #define __EEE_IMGPROC @@ -419,8 +420,8 @@ #define ONCHIP_MEMORY2_0_READ_DURING_WRITE_MODE "DONT_CARE" #define ONCHIP_MEMORY2_0_SINGLE_CLOCK_OP 0 #define ONCHIP_MEMORY2_0_SIZE_MULTIPLE 1 -#define ONCHIP_MEMORY2_0_SIZE_VALUE 100000 -#define ONCHIP_MEMORY2_0_SPAN 100000 +#define ONCHIP_MEMORY2_0_SIZE_VALUE 131072 +#define ONCHIP_MEMORY2_0_SPAN 131072 #define ONCHIP_MEMORY2_0_TYPE "altera_avalon_onchip_memory2" #define ONCHIP_MEMORY2_0_WRITABLE 1 @@ -464,7 +465,7 @@ #define SYSID_QSYS_IRQ_INTERRUPT_CONTROLLER_ID -1 #define SYSID_QSYS_NAME "/dev/sysid_qsys" #define SYSID_QSYS_SPAN 8 -#define SYSID_QSYS_TIMESTAMP 1622558600 +#define SYSID_QSYS_TIMESTAMP 1622729449 #define SYSID_QSYS_TYPE "altera_avalon_sysid_qsys" @@ -493,4 +494,29 @@ #define TIMER_TIMEOUT_PULSE_OUTPUT 0 #define TIMER_TYPE "altera_avalon_timer" + +/* + * uart_0 configuration + * + */ + +#define ALT_MODULE_CLASS_uart_0 altera_avalon_uart +#define UART_0_BASE 0x42020 +#define UART_0_BAUD 115200 +#define UART_0_DATA_BITS 8 +#define UART_0_FIXED_BAUD 1 +#define UART_0_FREQ 50000000 +#define UART_0_IRQ 4 +#define UART_0_IRQ_INTERRUPT_CONTROLLER_ID 0 +#define UART_0_NAME "/dev/uart_0" +#define UART_0_PARITY 'N' +#define UART_0_SIM_CHAR_STREAM "" +#define UART_0_SIM_TRUE_BAUD 0 +#define UART_0_SPAN 32 +#define UART_0_STOP_BITS 1 +#define UART_0_SYNC_REG_DEPTH 2 +#define UART_0_TYPE "altera_avalon_uart" +#define UART_0_USE_CTS_RTS 0 +#define UART_0_USE_EOP_REGISTER 0 + #endif /* __SYSTEM_H_ */ diff --git a/Vision/DE10_LITE_D8M_VIP_16/uart_interface_hw.tcl b/Vision/DE10_LITE_D8M_VIP_16/uart_interface_hw.tcl deleted file mode 100644 index 367e37d..0000000 --- a/Vision/DE10_LITE_D8M_VIP_16/uart_interface_hw.tcl +++ /dev/null @@ -1,115 +0,0 @@ -# TCL File Generated by Component Editor 16.1 -# Thu May 27 17:12:45 BST 2021 -# DO NOT MODIFY - - -# -# uart_interface "uart_interface" v1.0 -# 2021.05.27.17:12:45 -# -# - -# -# request TCL package from ACDS 16.1 -# -package require -exact qsys 16.1 - - -# -# module uart_interface -# -set_module_property DESCRIPTION "" -set_module_property NAME uart_interface -set_module_property VERSION 1.0 -set_module_property INTERNAL false -set_module_property OPAQUE_ADDRESS_MAP true -set_module_property AUTHOR "" -set_module_property DISPLAY_NAME uart_interface -set_module_property INSTANTIATE_IN_SYSTEM_MODULE true -set_module_property EDITABLE true -set_module_property REPORT_TO_TALKBACK false -set_module_property ALLOW_GREYBOX_GENERATION false -set_module_property REPORT_HIERARCHY false - - -# -# file sets -# -add_fileset QUARTUS_SYNTH QUARTUS_SYNTH "" "" -set_fileset_property QUARTUS_SYNTH TOP_LEVEL uart -set_fileset_property QUARTUS_SYNTH ENABLE_RELATIVE_INCLUDE_PATHS false -set_fileset_property QUARTUS_SYNTH ENABLE_FILE_OVERWRITE_MODE false -add_fileset_file uart.v VERILOG PATH ip/de10lite-hdl/uart.v TOP_LEVEL_FILE - - -# -# parameters -# -add_parameter CLK_FREQ INTEGER 50000000 -set_parameter_property CLK_FREQ DEFAULT_VALUE 50000000 -set_parameter_property CLK_FREQ DISPLAY_NAME CLK_FREQ -set_parameter_property CLK_FREQ TYPE INTEGER -set_parameter_property CLK_FREQ UNITS None -set_parameter_property CLK_FREQ HDL_PARAMETER true -add_parameter BAUD INTEGER 115200 -set_parameter_property BAUD DEFAULT_VALUE 115200 -set_parameter_property BAUD DISPLAY_NAME BAUD -set_parameter_property BAUD TYPE INTEGER -set_parameter_property BAUD UNITS None -set_parameter_property BAUD HDL_PARAMETER true - - -# -# display items -# - - -# -# connection point clock -# -add_interface clock clock end -set_interface_property clock clockRate 0 -set_interface_property clock ENABLED true -set_interface_property clock EXPORT_OF "" -set_interface_property clock PORT_NAME_MAP "" -set_interface_property clock CMSIS_SVD_VARIABLES "" -set_interface_property clock SVD_ADDRESS_GROUP "" - -add_interface_port clock clk clk Input 1 - - -# -# connection point reset -# -add_interface reset reset end -set_interface_property reset associatedClock clock -set_interface_property reset synchronousEdges DEASSERT -set_interface_property reset ENABLED true -set_interface_property reset EXPORT_OF "" -set_interface_property reset PORT_NAME_MAP "" -set_interface_property reset CMSIS_SVD_VARIABLES "" -set_interface_property reset SVD_ADDRESS_GROUP "" - -add_interface_port reset reset reset Input 1 - - -# -# connection point conduit_end -# -add_interface conduit_end conduit end -set_interface_property conduit_end associatedClock clock -set_interface_property conduit_end associatedReset "" -set_interface_property conduit_end ENABLED true -set_interface_property conduit_end EXPORT_OF "" -set_interface_property conduit_end PORT_NAME_MAP "" -set_interface_property conduit_end CMSIS_SVD_VARIABLES "" -set_interface_property conduit_end SVD_ADDRESS_GROUP "" - -add_interface_port conduit_end rx rx Input 1 -add_interface_port conduit_end rx_data rx_data Output 8 -add_interface_port conduit_end rx_valid rx_valid Output 1 -add_interface_port conduit_end tx tx Output 1 -add_interface_port conduit_end tx_data tx_data Input 8 -add_interface_port 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z&kY$>bZHXnMVLqOI1D_r7>Nh7O0EORSCYq3y(D8gFeKb7^4yrKphRo{2o)RPVJ=p4L$b(zbSQQR2(ezA2H8^y*9UC{@;MK{a0P}~ zuMmB6q+iEG&J=y%Tv9(Hkt_S25Bn^UZ$}k_*aKNGE)Rp@5tA|q7^IcLlk11`_jPvn zbn{igCmRiCxCgq)K1O3W-P_wA|AHJb9|g4Vn(vJ#>@f3W<~7fEg^$0UthGk==W%-W i0|yNp Date: Tue, 8 Jun 2021 20:26:59 +0100 Subject: [PATCH 16/32] Create Energy<->Control reference doc --- Control/ref/energy.cpp | 37 +++++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 Control/ref/energy.cpp diff --git a/Control/ref/energy.cpp b/Control/ref/energy.cpp new file mode 100644 index 0000000..4bf9d86 --- /dev/null +++ b/Control/ref/energy.cpp @@ -0,0 +1,37 @@ +#include +#include +#include + +#define RXpin 0 // Define your RX pin here +#define TXpin 0 // Define your TX pin here + +void setup() +{ + Serial.begin(115200); // Set up hardware UART0 (Connected to USB port) + Serial1.begin(9600, SERIAL_8N1, RXpin, TXpin); // Set up hardware UART1 + + // Other Drive setup stuff +} + +void loop() +{ + bool charge; + DynamicJsonDocument rdoc(1024); // receive doc, not sure how big this needs to be + if(Serial1.available()){ + deserializeJson(rdoc, Serial1); // Take JSON input from UART1 + charge = rdoc["ch"]; // {"ch":0} + } + + + float stateOfCharge = 0; + float batteryVoltage = 0; + float batteryCycles = 0; + + // Do Drive stuff, set the 5 values above + + DynamicJsonDocument tdoc(1024); // transmit doc, not sure how big this needs to be + tdoc["soc"] = stateOfCharge; + tdoc["mV"] = batteryVoltage; + tdoc["cyc"] = batteryCycles; + serializeJson(tdoc, Serial1); // Build JSON and send on UART1 +} \ No newline at end of file From 5411a247bc1926ebc4168da00870d4220c09da07 Mon Sep 17 00:00:00 2001 From: Aadi Desai <21363892+supleed2@users.noreply.github.com> Date: Wed, 9 Jun 2021 15:25:18 +0100 Subject: [PATCH 17/32] Create Command<->Control reference doc --- Control/ref/command.cpp | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) create mode 100644 Control/ref/command.cpp diff --git a/Control/ref/command.cpp b/Control/ref/command.cpp new file mode 100644 index 0000000..16761f0 --- /dev/null +++ b/Control/ref/command.cpp @@ -0,0 +1,39 @@ +#include +#include +#include + +#define WebSocket 0 +int batteryVoltage, totalTripDistance, currentHeading, current_x, current_y, signal_strength, lastCompletedCommand_id; // Info Command ==> Control +int command_id, mode, reqHeading, reqDistance, reqSpeed, reqCharge; // Info Control ==> Command + +void setup() {} + +void loop() +{ + DynamicJsonDocument rdoc(1024); // receive doc, not sure how big this needs to be + deserializeJson(rdoc, WebSocket); // Take JSON input from WebSocket + batteryVoltage = rdoc["bV"]; + totalTripDistance = rdoc["tD"]; + currentHeading = rdoc["cH"]; + current_x = rdoc["pos"][0]; + current_y = rdoc["pos"][1]; + signal_strength = rdoc["rssi"]; + lastCompletedCommand_id = rdoc["LCCid"]; + + // ResetTelemetry / STOP / M 0 50 1 / C % + // [20] Heading: 0, Distance: 50, Speed: 1 / [20] Charging to: ??% + // {"Cid":20,"rH":0,} + + DynamicJsonDocument tdoc(1024); // transmit doc, not sure how big this needs to be + tdoc["Cid"] = command_id; + tdoc["mode"] = mode; // Switch (mode): + // -1 = Add to queue, reset x/y/odometer (telemetry data) + // 0 = Stop immediately, clear command cache + // 1 = Normal movement command, added to end of command cache + // 2 = Normal charge command, results in no motion, added to end of command cache + tdoc["rH"] = reqHeading; + tdoc["rD"] = reqDistance; + tdoc["rS"] = reqSpeed; + tdoc["rC"] = reqCharge; + serializeJson(tdoc, WebSocket, WebSocket); // Build JSON and send on UART1 +} From 7ab9de2cc76c5e058f92da235696ed4e36545e17 Mon Sep 17 00:00:00 2001 From: Aadi Desai <21363892+supleed2@users.noreply.github.com> Date: Wed, 9 Jun 2021 18:33:37 +0100 Subject: [PATCH 18/32] Tidy up main.cpp formatting Regions allow for Code Folding --- Control/src/main.cpp | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/Control/src/main.cpp b/Control/src/main.cpp index 245331e..87707e7 100644 --- a/Control/src/main.cpp +++ b/Control/src/main.cpp @@ -1,3 +1,4 @@ +#pragma region Includes #include #include // #include Software Serial not currently needed @@ -9,29 +10,36 @@ #include #include #include +#pragma endregion -// Enable extra debugging info +#pragma region Enable extra debugging info for ESP32 #undef LOG_LOCAL_LEVEL #define LOG_LOCAL_LEVEL ESP_LOG_VERBOSE #include "esp_log.h" +#pragma endregion +#pragma region Definitions eg pins #define RX1pin 14 // Pin 10 on expansion board, UART1 #define TX1pin 4 // Pin 11 on expansion board, UART1 +#pragma endregion -// Function Declarations +#pragma region Function Declarations void printFPGAoutput(); void returnSensorData(); void notFound(AsyncWebServerRequest *request); void webSocketEvent(uint8_t num, WStype_t type, uint8_t *payload, size_t length); +#pragma endregion -// Global objects +#pragma region Global objects AsyncWebServer webserver(80); WebSocketsServer websocketserver(81); Ticker ticker; +#pragma endregion -// Global variables +#pragma region Global variables float battery_voltage = 4.0f; int distance_travelled = 0; +#pragma endregion void setup() { From 108f4d149593b492e0a63eb0790730734293d904 Mon Sep 17 00:00:00 2001 From: Aadi Desai <21363892+supleed2@users.noreply.github.com> Date: Thu, 10 Jun 2021 00:19:35 +0100 Subject: [PATCH 19/32] Add nonblock flag to UART FILE* --- .../software/D8M_Camera_Test/main.c | 448 ++++++++---------- 1 file changed, 201 insertions(+), 247 deletions(-) diff --git a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/main.c b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/main.c index c45c7f2..f5fe500 100644 --- a/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/main.c +++ b/Vision/DE10_LITE_D8M_VIP_16/software/D8M_Camera_Test/main.c @@ -1,5 +1,3 @@ - - #include #include "I2C_core.h" #include "terasic_includes.h" @@ -12,7 +10,7 @@ #include //EEE_IMGPROC defines -#define EEE_IMGPROC_MSG_START ('R'<<16 | 'B'<<8 | 'B') +#define EEE_IMGPROC_MSG_START ('R' << 16 | 'B' << 8 | 'B') //offsets #define EEE_IMGPROC_STATUS 0 @@ -26,286 +24,242 @@ #define GAIN_STEP 0x040 #define DEFAULT_LEVEL 3 -#define MIPI_REG_PHYClkCtl 0x0056 -#define MIPI_REG_PHYData0Ctl 0x0058 -#define MIPI_REG_PHYData1Ctl 0x005A -#define MIPI_REG_PHYData2Ctl 0x005C -#define MIPI_REG_PHYData3Ctl 0x005E -#define MIPI_REG_PHYTimDly 0x0060 -#define MIPI_REG_PHYSta 0x0062 -#define MIPI_REG_CSIStatus 0x0064 -#define MIPI_REG_CSIErrEn 0x0066 -#define MIPI_REG_MDLSynErr 0x0068 -#define MIPI_REG_FrmErrCnt 0x0080 -#define MIPI_REG_MDLErrCnt 0x0090 +#define MIPI_REG_PHYClkCtl 0x0056 +#define MIPI_REG_PHYData0Ctl 0x0058 +#define MIPI_REG_PHYData1Ctl 0x005A +#define MIPI_REG_PHYData2Ctl 0x005C +#define MIPI_REG_PHYData3Ctl 0x005E +#define MIPI_REG_PHYTimDly 0x0060 +#define MIPI_REG_PHYSta 0x0062 +#define MIPI_REG_CSIStatus 0x0064 +#define MIPI_REG_CSIErrEn 0x0066 +#define MIPI_REG_MDLSynErr 0x0068 +#define MIPI_REG_FrmErrCnt 0x0080 +#define MIPI_REG_MDLErrCnt 0x0090 -void mipi_clear_error(void){ - MipiBridgeRegWrite(MIPI_REG_CSIStatus,0x01FF); // clear error - MipiBridgeRegWrite(MIPI_REG_MDLSynErr,0x0000); // clear error - MipiBridgeRegWrite(MIPI_REG_FrmErrCnt,0x0000); // clear error - MipiBridgeRegWrite(MIPI_REG_MDLErrCnt, 0x0000); // clear error +void mipi_clear_error(void) +{ + MipiBridgeRegWrite(MIPI_REG_CSIStatus, 0x01FF); // clear error + MipiBridgeRegWrite(MIPI_REG_MDLSynErr, 0x0000); // clear error + MipiBridgeRegWrite(MIPI_REG_FrmErrCnt, 0x0000); // clear error + MipiBridgeRegWrite(MIPI_REG_MDLErrCnt, 0x0000); // clear error - MipiBridgeRegWrite(0x0082,0x00); - MipiBridgeRegWrite(0x0084,0x00); - MipiBridgeRegWrite(0x0086,0x00); - MipiBridgeRegWrite(0x0088,0x00); - MipiBridgeRegWrite(0x008A,0x00); - MipiBridgeRegWrite(0x008C,0x00); - MipiBridgeRegWrite(0x008E,0x00); - MipiBridgeRegWrite(0x0090,0x00); + MipiBridgeRegWrite(0x0082, 0x00); + MipiBridgeRegWrite(0x0084, 0x00); + MipiBridgeRegWrite(0x0086, 0x00); + MipiBridgeRegWrite(0x0088, 0x00); + MipiBridgeRegWrite(0x008A, 0x00); + MipiBridgeRegWrite(0x008C, 0x00); + MipiBridgeRegWrite(0x008E, 0x00); + MipiBridgeRegWrite(0x0090, 0x00); } -void mipi_show_error_info(void){ +void mipi_show_error_info(void) +{ - alt_u16 PHY_status, SCI_status, MDLSynErr, FrmErrCnt, MDLErrCnt; + alt_u16 PHY_status, SCI_status, MDLSynErr, FrmErrCnt, MDLErrCnt; - PHY_status = MipiBridgeRegRead(MIPI_REG_PHYSta); - SCI_status = MipiBridgeRegRead(MIPI_REG_CSIStatus); - MDLSynErr = MipiBridgeRegRead(MIPI_REG_MDLSynErr); - FrmErrCnt = MipiBridgeRegRead(MIPI_REG_FrmErrCnt); - MDLErrCnt = MipiBridgeRegRead(MIPI_REG_MDLErrCnt); - printf("PHY_status=%xh, CSI_status=%xh, MDLSynErr=%xh, FrmErrCnt=%xh, MDLErrCnt=%xh\r\n", PHY_status, SCI_status, MDLSynErr,FrmErrCnt, MDLErrCnt); + PHY_status = MipiBridgeRegRead(MIPI_REG_PHYSta); + SCI_status = MipiBridgeRegRead(MIPI_REG_CSIStatus); + MDLSynErr = MipiBridgeRegRead(MIPI_REG_MDLSynErr); + FrmErrCnt = MipiBridgeRegRead(MIPI_REG_FrmErrCnt); + MDLErrCnt = MipiBridgeRegRead(MIPI_REG_MDLErrCnt); + printf("PHY_status=%xh, CSI_status=%xh, MDLSynErr=%xh, FrmErrCnt=%xh, MDLErrCnt=%xh\r\n", PHY_status, SCI_status, MDLSynErr, FrmErrCnt, MDLErrCnt); } -void mipi_show_error_info_more(void){ - printf("FrmErrCnt = %d\n",MipiBridgeRegRead(0x0080)); - printf("CRCErrCnt = %d\n",MipiBridgeRegRead(0x0082)); - printf("CorErrCnt = %d\n",MipiBridgeRegRead(0x0084)); - printf("HdrErrCnt = %d\n",MipiBridgeRegRead(0x0086)); - printf("EIDErrCnt = %d\n",MipiBridgeRegRead(0x0088)); - printf("CtlErrCnt = %d\n",MipiBridgeRegRead(0x008A)); - printf("SoTErrCnt = %d\n",MipiBridgeRegRead(0x008C)); - printf("SynErrCnt = %d\n",MipiBridgeRegRead(0x008E)); - printf("MDLErrCnt = %d\n",MipiBridgeRegRead(0x0090)); - printf("FIFOSTATUS = %d\n",MipiBridgeRegRead(0x00F8)); - printf("DataType = 0x%04x\n",MipiBridgeRegRead(0x006A)); - printf("CSIPktLen = %d\n",MipiBridgeRegRead(0x006E)); +void mipi_show_error_info_more(void) +{ + printf("FrmErrCnt = %d\n", MipiBridgeRegRead(0x0080)); + printf("CRCErrCnt = %d\n", MipiBridgeRegRead(0x0082)); + printf("CorErrCnt = %d\n", MipiBridgeRegRead(0x0084)); + printf("HdrErrCnt = %d\n", MipiBridgeRegRead(0x0086)); + printf("EIDErrCnt = %d\n", MipiBridgeRegRead(0x0088)); + printf("CtlErrCnt = %d\n", MipiBridgeRegRead(0x008A)); + printf("SoTErrCnt = %d\n", MipiBridgeRegRead(0x008C)); + printf("SynErrCnt = %d\n", MipiBridgeRegRead(0x008E)); + printf("MDLErrCnt = %d\n", MipiBridgeRegRead(0x0090)); + printf("FIFOSTATUS = %d\n", MipiBridgeRegRead(0x00F8)); + printf("DataType = 0x%04x\n", MipiBridgeRegRead(0x006A)); + printf("CSIPktLen = %d\n", MipiBridgeRegRead(0x006E)); } +bool MIPI_Init(void) +{ + bool bSuccess; + bSuccess = oc_i2c_init_ex(I2C_OPENCORES_MIPI_BASE, 50 * 1000 * 1000, 400 * 1000); //I2C: 400K + if (!bSuccess) + { + printf("failed to init MIPI- Bridge i2c\r\n"); + } -bool MIPI_Init(void){ - bool bSuccess; - - - bSuccess = oc_i2c_init_ex(I2C_OPENCORES_MIPI_BASE, 50*1000*1000,400*1000); //I2C: 400K - if (!bSuccess) - printf("failed to init MIPI- Bridge i2c\r\n"); - - usleep(50*1000); + usleep(50 * 1000); MipiBridgeInit(); - usleep(500*1000); - -// bSuccess = oc_i2c_init_ex(I2C_OPENCORES_CAMERA_BASE, 50*1000*1000,400*1000); //I2C: 400K -// if (!bSuccess) -// printf("failed to init MIPI- Camera i2c\r\n"); + usleep(500 * 1000); MipiCameraInit(); MIPI_BIN_LEVEL(DEFAULT_LEVEL); -// OV8865_FOCUS_Move_to(340); -// oc_i2c_uninit(I2C_OPENCORES_CAMERA_BASE); // Release I2C bus , due to two I2C master shared! + usleep(1000); - - usleep(1000); - - -// oc_i2c_uninit(I2C_OPENCORES_MIPI_BASE); - - return bSuccess; + return bSuccess; } - - - int main() { + fcntl(STDIN_FILENO, F_SETFL, O_NONBLOCK); - fcntl(STDIN_FILENO, F_SETFL, O_NONBLOCK); - - printf("DE10-LITE D8M VGA Demo\n"); - printf("Imperial College EEE2 Project version\n"); - IOWR(MIPI_PWDN_N_BASE, 0x00, 0x00); - IOWR(MIPI_RESET_N_BASE, 0x00, 0x00); - - usleep(2000); - IOWR(MIPI_PWDN_N_BASE, 0x00, 0xFF); - usleep(2000); - IOWR(MIPI_RESET_N_BASE, 0x00, 0xFF); - - printf("Image Processor ID: %x\n",IORD(0x42000,EEE_IMGPROC_ID)); - //printf("Image Processor ID: %x\n",IORD(EEE_IMGPROC_0_BASE,EEE_IMGPROC_ID)); //Don't know why this doesn't work - definition is in system.h in BSP - - - usleep(2000); - - - // MIPI Init - if (!MIPI_Init()){ - printf("MIPI_Init Init failed!\r\n"); - }else{ - printf("MIPI_Init Init successfully!\r\n"); - } - -// while(1){ - mipi_clear_error(); - usleep(50*1000); - mipi_clear_error(); - usleep(1000*1000); - mipi_show_error_info(); -// mipi_show_error_info_more(); - printf("\n"); -// } - - -#if 0 // focus sweep - printf("\nFocus sweep\n"); - alt_u16 ii= 350; - alt_u8 dir = 0; - while(1){ - if(ii< 50) dir = 1; - else if (ii> 1000) dir =0; - - if(dir) ii += 20; - else ii -= 20; - - printf("%d\n",ii); - OV8865_FOCUS_Move_to(ii); - usleep(50*1000); - } -#endif + printf("DE10-LITE D8M VGA Demo\n"); + printf("Imperial College EEE2 Project version\n"); + IOWR(MIPI_PWDN_N_BASE, 0x00, 0x00); + IOWR(MIPI_RESET_N_BASE, 0x00, 0x00); + usleep(2000); + IOWR(MIPI_PWDN_N_BASE, 0x00, 0xFF); + usleep(2000); + IOWR(MIPI_RESET_N_BASE, 0x00, 0xFF); + printf("Image Processor ID: %x\n", IORD(0x42000, EEE_IMGPROC_ID)); + //printf("Image Processor ID: %x\n",IORD(EEE_IMGPROC_0_BASE,EEE_IMGPROC_ID)); //Don't know why this doesn't work - definition is in system.h in BSP + usleep(2000); + // MIPI Init + if (!MIPI_Init()) + { + printf("MIPI_Init Init failed!\r\n"); + } + else + { + printf("MIPI_Init Init successfully!\r\n"); + } + // while(1){ + mipi_clear_error(); + usleep(50 * 1000); + mipi_clear_error(); + usleep(1000 * 1000); + mipi_show_error_info(); + // mipi_show_error_info_more(); + printf("\n"); + // } ////////////////////////////////////////////////////////// - alt_u16 bin_level = DEFAULT_LEVEL; - alt_u8 manual_focus_step = 10; - alt_u16 current_focus = 300; - int boundingBoxColour = 0; - alt_u32 exposureTime = EXPOSURE_INIT; - alt_u16 gain = GAIN_INIT; + alt_u16 bin_level = DEFAULT_LEVEL; + alt_u8 manual_focus_step = 10; + alt_u16 current_focus = 300; + int boundingBoxColour = 0; + alt_u32 exposureTime = EXPOSURE_INIT; + alt_u16 gain = GAIN_INIT; - OV8865SetExposure(exposureTime); - OV8865SetGain(gain); - Focus_Init(); + OV8865SetExposure(exposureTime); + OV8865SetGain(gain); + Focus_Init(); - FILE* ser = fopen("/dev/uart_0", "rb+"); - if(ser){ - printf("Opened UART\n"); - } else { - printf("Failed to open UART\n"); - while (1); + FILE *ser = fopen("/dev/uart_0", "rb+"); + fcntl(ser, F_SETFL, O_NONBLOCK); + if (ser) + { + printf("Opened UART\n"); + } + else + { + printf("Failed to open UART\n"); + while (1) + { + } + } + + while (1) + { + + // touch KEY0 to trigger Auto focus + if ((IORD(KEY_BASE, 0) & 0x03) == 0x02) + { + + current_focus = Focus_Window(320, 240); + } + // touch KEY1 to ZOOM + if ((IORD(KEY_BASE, 0) & 0x03) == 0x01) + { + if (bin_level == 3) + bin_level = 1; + else + bin_level++; + printf("set bin level to %d\n", bin_level); + MIPI_BIN_LEVEL(bin_level); + usleep(500000); } - while(1){ + //Read messages from the image processor and print them on the terminal + while ((IORD(0x42000, EEE_IMGPROC_STATUS) >> 8) & 0xff) + { //Find out if there are words to read + int word = IORD(0x42000, EEE_IMGPROC_MSG); //Get next word from message buffer + if (fwrite(&word, 4, 1, ser) != 1) + printf("Error writing to UART"); + if (word == EEE_IMGPROC_MSG_START) //Newline on message identifier + printf("\n"); + printf("%08x ", word); + } - // touch KEY0 to trigger Auto focus - if((IORD(KEY_BASE,0)&0x03) == 0x02){ + //Update the bounding box colour + boundingBoxColour = ((boundingBoxColour + 1) & 0xff); + IOWR(0x42000, EEE_IMGPROC_BBCOL, (boundingBoxColour << 8) | (0xff - boundingBoxColour)); - current_focus = Focus_Window(320,240); - } - // touch KEY1 to ZOOM - if((IORD(KEY_BASE,0)&0x03) == 0x01){ - if(bin_level == 3 )bin_level = 1; - else bin_level ++; - printf("set bin level to %d\n",bin_level); - MIPI_BIN_LEVEL(bin_level); - usleep(500000); + //Process input commands + int in = getchar(); + switch (in) + { + case 'e': + { + exposureTime += EXPOSURE_STEP; + OV8865SetExposure(exposureTime); + printf("\nExposure = %x ", exposureTime); + break; + } + case 'd': + { + exposureTime -= EXPOSURE_STEP; + OV8865SetExposure(exposureTime); + printf("\nExposure = %x ", exposureTime); + break; + } + case 't': + { + gain += GAIN_STEP; + OV8865SetGain(gain); + printf("\nGain = %x ", gain); + break; + } + case 'g': + { + gain -= GAIN_STEP; + OV8865SetGain(gain); + printf("\nGain = %x ", gain); + break; + } + case 'r': + { + current_focus += manual_focus_step; + if (current_focus > 1023) + current_focus = 1023; + OV8865_FOCUS_Move_to(current_focus); + printf("\nFocus = %x ", current_focus); + break; + } + case 'f': + { + if (current_focus > manual_focus_step) + current_focus -= manual_focus_step; + OV8865_FOCUS_Move_to(current_focus); + printf("\nFocus = %x ", current_focus); + break; + } + } - } - - - #if 0 - if((IORD(KEY_BASE,0)&0x0F) == 0x0E){ - - current_focus = Focus_Window(320,240); - } - - // touch KEY1 to trigger Manual focus - step - if((IORD(KEY_BASE,0)&0x0F) == 0x0D){ - - if(current_focus > manual_focus_step) current_focus -= manual_focus_step; - else current_focus = 0; - OV8865_FOCUS_Move_to(current_focus); - - } - - // touch KEY2 to trigger Manual focus + step - if((IORD(KEY_BASE,0)&0x0F) == 0x0B){ - current_focus += manual_focus_step; - if(current_focus >1023) current_focus = 1023; - OV8865_FOCUS_Move_to(current_focus); - } - - // touch KEY3 to ZOOM - if((IORD(KEY_BASE,0)&0x0F) == 0x07){ - if(bin_level == 3 )bin_level = 1; - else bin_level ++; - printf("set bin level to %d\n",bin_level); - MIPI_BIN_LEVEL(bin_level); - usleep(500000); - - } - #endif - - //Read messages from the image processor and print them on the terminal - while ((IORD(0x42000,EEE_IMGPROC_STATUS)>>8) & 0xff) { //Find out if there are words to read - int word = IORD(0x42000,EEE_IMGPROC_MSG); //Get next word from message buffer - if (fwrite(&word, 4, 1, ser) != 1) - printf("Error writing to UART"); - if (word == EEE_IMGPROC_MSG_START) //Newline on message identifier - printf("\n"); - printf("%08x ",word); - } - - //Update the bounding box colour - boundingBoxColour = ((boundingBoxColour + 1) & 0xff); - IOWR(0x42000, EEE_IMGPROC_BBCOL, (boundingBoxColour << 8) | (0xff - boundingBoxColour)); - - //Process input commands - int in = getchar(); - switch (in) { - case 'e': { - exposureTime += EXPOSURE_STEP; - OV8865SetExposure(exposureTime); - printf("\nExposure = %x ", exposureTime); - break;} - case 'd': { - exposureTime -= EXPOSURE_STEP; - OV8865SetExposure(exposureTime); - printf("\nExposure = %x ", exposureTime); - break;} - case 't': { - gain += GAIN_STEP; - OV8865SetGain(gain); - printf("\nGain = %x ", gain); - break;} - case 'g': { - gain -= GAIN_STEP; - OV8865SetGain(gain); - printf("\nGain = %x ", gain); - break;} - case 'r': { - current_focus += manual_focus_step; - if(current_focus >1023) current_focus = 1023; - OV8865_FOCUS_Move_to(current_focus); - printf("\nFocus = %x ",current_focus); - break;} - case 'f': { - if(current_focus > manual_focus_step) current_focus -= manual_focus_step; - OV8865_FOCUS_Move_to(current_focus); - printf("\nFocus = %x ",current_focus); - break;} - } - - - //Main loop delay - usleep(10000); - - }; - return 0; + //Main loop delay + usleep(10000); + }; + return 0; } From 778be64c3d7b33848ddb15fd69f6f4ba91a96fdf Mon Sep 17 00:00:00 2001 From: Aadi Desai <21363892+supleed2@users.noreply.github.com> Date: Thu, 10 Jun 2021 18:00:13 +0100 Subject: [PATCH 20/32] Create Vision<->Control reference doc --- Control/ref/vision.cpp | 48 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/Control/ref/vision.cpp b/Control/ref/vision.cpp index e699eca..14e5ec0 100644 --- a/Control/ref/vision.cpp +++ b/Control/ref/vision.cpp @@ -1 +1,49 @@ +#include +#include +#include + const int ARDUINO_IO[16] = {-1/*RX*/, -1/*RX*/, 23, 22, 21, 19, 18, 5, 17, 16, 14, 4, 15, 2, 13, 12}; // Expansion board mapping +#define RXpin ARDUINO_IO[11] // Define your RX pin here +#define TXpin ARDUINO_IO[10] // Define your TX pin here +FILE* SerialUART; + +void setup() +{ + Serial.begin(115200); // Set up hardware UART0 (Connected to USB port) +} + +void loop() +{ + int command = getc(SerialUART); + // command char, used for controlling exposure/focus/gain settings: + // e = increase exposure + // d = decrease exposure + // r = increase focus + // f = decrease focus + // t = increase gain + // g = decrease gain + + // Bounding Box edges + int bb_left = 0; + int bb_right = 0; + int bb_top = 0; + int bb_bottom = 0; + // Weighted average of detected pixels coordinates + int centre_x = 0; + int centre_y = 0; + // Heading from DE10-Lite magnetometer + float heading = 0.0; + + // Build hardcode JSON packet on DE10-Lite using fprintf() as space is minimal and library would be too large. + // fprintf(SerialUART, "{\"bb\":[%d,%d,%d,%d],\"cen\":[%d,%d],\"cH\":%d\"}", bb_left, bb_right, bb_top, bb_bottom, centre_x, centre_y, heading); + + DynamicJsonDocument rdoc(1024); // receive doc, not sure how big this needs to be + deserializeJson(rdoc, SerialUART); + bb_left = rdoc["bb"][0]; + bb_right = rdoc["bb"][1]; + bb_top = rdoc["bb"][2]; + bb_bottom = rdoc["bb"][3]; + centre_x = rdoc["cen"][0]; + centre_y = rdoc["cen"][1]; + heading = rdoc["cH"]; +} \ No newline at end of file From 88adbdc5723072c4aa0872e3bf03f735536203f8 Mon Sep 17 00:00:00 2001 From: Aadi Desai <21363892+supleed2@users.noreply.github.com> Date: Sat, 12 Jun 2021 12:47:12 +0100 Subject: [PATCH 21/32] Correct location of credentials.h to include/ --- Control/.gitignore | 2 +- Control/{src => include}/credentials.h.dummy | 0 Control/src/main.cpp | 2 +- 3 files changed, 2 insertions(+), 2 deletions(-) rename Control/{src => include}/credentials.h.dummy (100%) diff --git a/Control/.gitignore b/Control/.gitignore index c7b130a..3074d78 100644 --- a/Control/.gitignore +++ b/Control/.gitignore @@ -3,4 +3,4 @@ .vscode/c_cpp_properties.json .vscode/launch.json .vscode/ipch -src/credentials.h +include/credentials.h diff --git a/Control/src/credentials.h.dummy b/Control/include/credentials.h.dummy similarity index 100% rename from Control/src/credentials.h.dummy rename to Control/include/credentials.h.dummy diff --git a/Control/src/main.cpp b/Control/src/main.cpp index 87707e7..710f1be 100644 --- a/Control/src/main.cpp +++ b/Control/src/main.cpp @@ -7,7 +7,7 @@ #include #include "TickerV2.h" #include -#include +#include "credentials.h" #include #include #pragma endregion From 5667ef67f21cb6b1bb5706c265b3eb305a807245 Mon Sep 17 00:00:00 2001 From: Aadi Desai <21363892+supleed2@users.noreply.github.com> Date: Sat, 12 Jun 2021 12:50:44 +0100 Subject: [PATCH 22/32] Add basic status flag for flow control --- Control/include/status.h | 11 +++++++++++ Control/src/main.cpp | 3 +++ 2 files changed, 14 insertions(+) create mode 100644 Control/include/status.h diff --git a/Control/include/status.h b/Control/include/status.h new file mode 100644 index 0000000..4b8b2d9 --- /dev/null +++ b/Control/include/status.h @@ -0,0 +1,11 @@ +#ifndef CONTROL_STATUS_H +#define CONTROL_STATUS_H + +typedef enum { + CS_ERROR = -1, + CS_IDLE, + CS_MOVING, + CS_CHARGING +} ControlStatus_t; + +#endif diff --git a/Control/src/main.cpp b/Control/src/main.cpp index 710f1be..cda14c6 100644 --- a/Control/src/main.cpp +++ b/Control/src/main.cpp @@ -10,6 +10,7 @@ #include "credentials.h" #include #include +#include "status.h" #pragma endregion #pragma region Enable extra debugging info for ESP32 @@ -37,6 +38,7 @@ Ticker ticker; #pragma endregion #pragma region Global variables +ControlStatus_t Status; float battery_voltage = 4.0f; int distance_travelled = 0; #pragma endregion @@ -47,6 +49,7 @@ void setup() esp_log_level_set("wifi", ESP_LOG_WARN); // enable WARN logs from WiFi stack esp_log_level_set("dhcpc", ESP_LOG_INFO); // enable INFO logs from DHCP client + Status = CS_IDLE; Serial.begin(115200); // Set up hardware UART0 (Connected to USB port) Serial1.begin(9600, SERIAL_8N1, RX1pin, TX1pin); // Set up hardware UART1 // Set up remaining communication ports here (Energy, Drive, Vision) From 1d297354295b2439d9105669839b691fea318774 Mon Sep 17 00:00:00 2001 From: Aadi Desai <21363892+supleed2@users.noreply.github.com> Date: Sat, 12 Jun 2021 15:15:37 +0100 Subject: [PATCH 23/32] Update Command<->Control reference doc --- Control/ref/command.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Control/ref/command.cpp b/Control/ref/command.cpp index 16761f0..6ece01e 100644 --- a/Control/ref/command.cpp +++ b/Control/ref/command.cpp @@ -3,7 +3,7 @@ #include #define WebSocket 0 -int batteryVoltage, totalTripDistance, currentHeading, current_x, current_y, signal_strength, lastCompletedCommand_id; // Info Command ==> Control +int batteryVoltage, batteryLevel, totalTripDistance, currentHeading, current_x, current_y, signal_strength, lastCompletedCommand_id; // Info Command ==> Control int command_id, mode, reqHeading, reqDistance, reqSpeed, reqCharge; // Info Control ==> Command void setup() {} @@ -13,6 +13,7 @@ void loop() DynamicJsonDocument rdoc(1024); // receive doc, not sure how big this needs to be deserializeJson(rdoc, WebSocket); // Take JSON input from WebSocket batteryVoltage = rdoc["bV"]; + batteryLevel = rdoc["bL"]; totalTripDistance = rdoc["tD"]; currentHeading = rdoc["cH"]; current_x = rdoc["pos"][0]; From 52e14dfaa825e46d4d72a550edd216a3c6986182 Mon Sep 17 00:00:00 2001 From: Aadi Desai <21363892+supleed2@users.noreply.github.com> Date: Sat, 12 Jun 2021 21:00:55 +0100 Subject: [PATCH 24/32] Update Command<->Control reference doc Add Rover state and correct comments --- Control/ref/command.cpp | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/Control/ref/command.cpp b/Control/ref/command.cpp index 6ece01e..ec029d9 100644 --- a/Control/ref/command.cpp +++ b/Control/ref/command.cpp @@ -3,8 +3,8 @@ #include #define WebSocket 0 -int batteryVoltage, batteryLevel, totalTripDistance, currentHeading, current_x, current_y, signal_strength, lastCompletedCommand_id; // Info Command ==> Control -int command_id, mode, reqHeading, reqDistance, reqSpeed, reqCharge; // Info Control ==> Command +int state, batteryVoltage, batteryLevel, totalTripDistance, currentHeading, current_x, current_y, signal_strength, lastCompletedCommand_id; // Info Control ==> Command +int command_id, mode, reqHeading, reqDistance, reqSpeed, reqCharge; // Info Command ==> Control void setup() {} @@ -12,6 +12,7 @@ void loop() { DynamicJsonDocument rdoc(1024); // receive doc, not sure how big this needs to be deserializeJson(rdoc, WebSocket); // Take JSON input from WebSocket + state = rdoc["st"]; // State: -1 = Error, 0 = Idle, 1 = Moving, 2 = Charging batteryVoltage = rdoc["bV"]; batteryLevel = rdoc["bL"]; totalTripDistance = rdoc["tD"]; From 1e87e9b0f423fd2d904fb94298a9959be2734912 Mon Sep 17 00:00:00 2001 From: Aadi Desai <21363892+supleed2@users.noreply.github.com> Date: Sat, 12 Jun 2021 23:04:01 +0100 Subject: [PATCH 25/32] Fix incorrect variable types reqSpeed is between 0 & 1, batteryVoltage has decimal places, both should be float not int --- Control/ref/command.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Control/ref/command.cpp b/Control/ref/command.cpp index ec029d9..0a65d23 100644 --- a/Control/ref/command.cpp +++ b/Control/ref/command.cpp @@ -3,8 +3,10 @@ #include #define WebSocket 0 -int state, batteryVoltage, batteryLevel, totalTripDistance, currentHeading, current_x, current_y, signal_strength, lastCompletedCommand_id; // Info Control ==> Command -int command_id, mode, reqHeading, reqDistance, reqSpeed, reqCharge; // Info Command ==> Control +int state, batteryLevel, totalTripDistance, currentHeading, current_x, current_y, signal_strength, lastCompletedCommand_id; // Info Control ==> Command +float batteryVoltage; // Info Control ==> Command +int command_id, mode, reqHeading, reqDistance, reqCharge; // Info Command ==> Control +float reqSpeed; // Info Command ==> Control void setup() {} From 5e6254029ae80721f029085278b199978b064129 Mon Sep 17 00:00:00 2001 From: Aadi Desai <21363892+supleed2@users.noreply.github.com> Date: Sun, 13 Jun 2021 00:50:38 +0100 Subject: [PATCH 26/32] Add instruction.h Struct for holding instructions in FIFO Queue, enum for instruction types --- Control/include/instruction.h | 21 +++++++++++++++++++++ Control/src/main.cpp | 1 + 2 files changed, 22 insertions(+) create mode 100644 Control/include/instruction.h diff --git a/Control/include/instruction.h b/Control/include/instruction.h new file mode 100644 index 0000000..574d542 --- /dev/null +++ b/Control/include/instruction.h @@ -0,0 +1,21 @@ +#ifndef INSTRUCTION_H +#define INSTRUCTION_H + +typedef enum { + INSTR_RESET = -1, + INSTR_STOP, + INSTR_MOVE, + INSTR_CHARGE +} instr_t; + +typedef struct instruction +{ + int id; + int instr; + int heading; + int distance; + float speed; + int charge; +} RoverInstruction; + +#endif diff --git a/Control/src/main.cpp b/Control/src/main.cpp index cda14c6..8ea0695 100644 --- a/Control/src/main.cpp +++ b/Control/src/main.cpp @@ -11,6 +11,7 @@ #include #include #include "status.h" +#include "instruction.h" #pragma endregion #pragma region Enable extra debugging info for ESP32 From bbec96810fb125760ed40436e05008c8fd6c91eb Mon Sep 17 00:00:00 2001 From: Aadi Desai <21363892+supleed2@users.noreply.github.com> Date: Sun, 13 Jun 2021 00:56:49 +0100 Subject: [PATCH 27/32] Set up basic rover flow, individual functions to be completed --- Control/src/main.cpp | 309 ++++++++++++++++++++++++++++++++++--------- 1 file changed, 247 insertions(+), 62 deletions(-) diff --git a/Control/src/main.cpp b/Control/src/main.cpp index 8ea0695..637e9d8 100644 --- a/Control/src/main.cpp +++ b/Control/src/main.cpp @@ -1,7 +1,7 @@ #pragma region Includes #include #include -// #include Software Serial not currently needed +#include #include #include #include @@ -12,6 +12,7 @@ #include #include "status.h" #include "instruction.h" +#include #pragma endregion #pragma region Enable extra debugging info for ESP32 @@ -21,27 +22,44 @@ #pragma endregion #pragma region Definitions eg pins -#define RX1pin 14 // Pin 10 on expansion board, UART1 -#define TX1pin 4 // Pin 11 on expansion board, UART1 +#define RX1pin 18 // Pin 6 on expansion board, UART1 +#define TX1pin 5 // Pin 7 on expansion board, UART1 +#define RX2pin 17 // Pin 8 on expansion board, UART2 +#define TX2pin 16 // Pin 9 on expansion board, UART2 +#define RX3pin 14 // Pin 10 on expansion board, UART3 +#define TX3pin 4 // Pin 11 on expansion board, UART3 #pragma endregion #pragma region Function Declarations -void printFPGAoutput(); -void returnSensorData(); void notFound(AsyncWebServerRequest *request); void webSocketEvent(uint8_t num, WStype_t type, uint8_t *payload, size_t length); +void queueInstruction(RoverInstruction instruction); +void sendToCommand(); +void sendToDrive(RoverInstruction instruction); +void recvFromDrive(); +void sendToEnergy(RoverInstruction instruction); +void recvFromEnergy(); +void sendToVision(); +void recvFromVision(); #pragma endregion #pragma region Global objects AsyncWebServer webserver(80); WebSocketsServer websocketserver(81); Ticker ticker; +SoftwareSerial Serial3; +std::queue InstrQueue; #pragma endregion #pragma region Global variables ControlStatus_t Status; -float battery_voltage = 4.0f; -int distance_travelled = 0; +float batteryVoltage; +int batteryLevel; +int odometer; +int heading; +int xpos, ypos; +int signalStrength; +int lastCompletedCommand; #pragma endregion void setup() @@ -50,10 +68,21 @@ void setup() esp_log_level_set("wifi", ESP_LOG_WARN); // enable WARN logs from WiFi stack esp_log_level_set("dhcpc", ESP_LOG_INFO); // enable INFO logs from DHCP client + Serial.begin(115200); // Set up hardware UART0 (Connected to USB port) + Serial1.begin(9600, SERIAL_8N1, RX1pin, TX1pin); // Set up hardware UART1 (Connected to Drive) + Serial2.begin(9600, SERIAL_8N1, RX2pin, TX2pin); // Set up hardware UART2 (Connected to Energy) + Serial3.begin(9600, SWSERIAL_8N1, RX3pin, TX3pin); // Set up software UART3 (Connected to Vision) + + // Set global variable startup values Status = CS_IDLE; - Serial.begin(115200); // Set up hardware UART0 (Connected to USB port) - Serial1.begin(9600, SERIAL_8N1, RX1pin, TX1pin); // Set up hardware UART1 - // Set up remaining communication ports here (Energy, Drive, Vision) + batteryVoltage = 0; + batteryLevel = 0; + odometer = 0; + heading = 0; + xpos = 0; + ypos = 0; + signalStrength = 0; + lastCompletedCommand = 0; if (!SPIFFS.begin(true)) // Mount SPIFFS { @@ -63,11 +92,11 @@ void setup() Serial.println("SPIFFS mounted"); WiFi.begin(WIFI_SSID, WIFI_PW); - while (WiFi.status() != WL_CONNECTED) + while (WiFi.status() != WL_CONNECTED) // Wait for ESP32 to connect to AP in "credentials.h" { delay(500); } - while (!MDNS.begin("rover")) + while (!MDNS.begin("rover")) // Set up mDNS cast at "rover.local/" { Serial.println("Error setting up mDNS, retrying in 5s"); delay(5000); @@ -75,56 +104,95 @@ void setup() Serial.println("mDNS set up, access Control Panel at 'rover.local/'"); webserver.on("/", HTTP_GET, [](AsyncWebServerRequest *request) - { request->send(SPIFFS, "/index.html", "text/html"); }); + { request->send(SPIFFS, "/index.html", "text/html"); }); // Serve "index.html" at root page webserver.on("/favicon.ico", HTTP_GET, [](AsyncWebServerRequest *request) - { request->send(SPIFFS, "/favicon.ico", "image/png"); }); - webserver.onNotFound(notFound); - webserver.begin(); + { request->send(SPIFFS, "/favicon.ico", "image/png"); }); // Serve tab icon + webserver.onNotFound(notFound); // Set up basic 404NotFound page + webserver.begin(); // Start Asynchronous Web Server - websocketserver.begin(); - websocketserver.onEvent(webSocketEvent); - ticker.attach(0.5, returnSensorData); + websocketserver.begin(); // Start Websocket Server + websocketserver.onEvent(webSocketEvent); // Set up function call when event received from Command + ticker.attach(0.5, sendToCommand); // Set up recurring function to forward rover status to Command } -void loop() +void loop() // TO DO { - printFPGAoutput(); - - String FPGAinput; // Forward serial monitor input to FPGA - if (Serial.available()) - { - FPGAinput = String(Serial.readStringUntil('\n')); - Serial1.println(FPGAinput); - } - websocketserver.loop(); // Handle incoming client connections -} - -void printFPGAoutput() -{ // Print serial communication from FPGA to serial monitor - String FPGAoutput; - if (Serial1.available()) + switch (Status) { - FPGAoutput = String(Serial1.readStringUntil('\n')); - Serial.println(FPGAoutput); - } -} - -void returnSensorData() -{ - // Collect sensor data here? - distance_travelled++; - if (battery_voltage < 6) + case CS_ERROR: { - battery_voltage += 0.2; + Serial.println("Rover in error state, rebooting..."); + exit(1); } - else + break; + case CS_IDLE: { - battery_voltage = 4; + if (InstrQueue.empty()) // If Rover idle and InstrQueue empty: + { + // TO DO: Collect all data (recvFrom) and + sendToCommand(); // Update command panel + // Maybe wait 1s? Possibly prevent from looping too fast + } + else + { + // Do the next command in the queue + RoverInstruction *instr = &InstrQueue.front(); + switch (instr->instr) + { + case INSTR_RESET: + { + odometer = 0; + xpos = 0; + ypos = 0; + } + break; + case INSTR_STOP: + { + while (1) + { + Serial.println("Emergency Stop should not get queued, hold and print"); + delay(1000); + } + } + break; + case INSTR_MOVE: + { + Status = CS_MOVING; + sendToDrive(*instr); + } + break; + case INSTR_CHARGE: + { + Status = CS_CHARGING; + sendToEnergy(*instr); + } + break; + default: + { + Serial.println("Unknown instruction type in queue, skipping..."); + } + break; + } + } + } + break; + case CS_MOVING: + { + // TO DO + } + break; + case CS_CHARGING: + { + // TO DO + } + break; + default: + { + Serial.println("Unknown rover state, exiting..."); + exit(1); + } } - String JSON_Data = String("{\"BTRY_VOLT\":") + battery_voltage + String(",\"ODO_DIST\":") + distance_travelled + "}"; - Serial.println(JSON_Data); - websocketserver.broadcastTXT(JSON_Data); } void notFound(AsyncWebServerRequest *request) @@ -132,7 +200,7 @@ void notFound(AsyncWebServerRequest *request) request->send(404, "text/plain", "Page Not found. Check URI/IP address."); } -void webSocketEvent(uint8_t num, WStype_t type, uint8_t *payload, size_t length) +void webSocketEvent(uint8_t num, WStype_t type, uint8_t *payload, size_t length) // TO DO { switch (type) { @@ -147,13 +215,13 @@ void webSocketEvent(uint8_t num, WStype_t type, uint8_t *payload, size_t length) Serial.printf("Client[%u] Connected from %d.%d.%d.%d url: %s\n", num, ip[0], ip[1], ip[2], ip[3], payload); } break; - case WStype_TEXT: + case WStype_TEXT: // MSG received from command panel { - Serial.printf("Client[%u] sent Text: %s\n", num, payload); - String command = String((char *)(payload)); + Serial.printf("Client[%u] sent Text: %s\n", num, payload); // Echo received command to terminal + String command = String((char *)(payload)); // Convert received command to string type - DynamicJsonDocument doc(200); //creating an instance of a DynamicJsonDocument allocating 200bytes on the heap. - DeserializationError error = deserializeJson(doc, command); // deserialize 'doc' and parse for parameters we expect to receive. + DynamicJsonDocument rdoc(200); // Create instance of DynamicJsonDocument on heap, 200 Bytes + DeserializationError error = deserializeJson(rdoc, command); // Convert command string to JSONDocument and capture any errors if (error) { Serial.print("deserializeJson() failed: "); @@ -161,12 +229,62 @@ void webSocketEvent(uint8_t num, WStype_t type, uint8_t *payload, size_t length) return; } - int MVM_F_status = doc["MVM_F"]; - int MVM_L_status = doc["MVM_L"]; - int MVM_R_status = doc["MVM_R"]; - int MVM_B_status = doc["MVM_B"]; + RoverInstruction instr; + int mode = rdoc["mode"]; + switch (mode) + { + case -1: // Add to queue, reset x/y/odometer (telemetry data) + { + Serial.println("Reset telemetry command received"); + instr.id = rdoc["Cid"]; + instr.instr = INSTR_RESET; + // Ignore rdoc["rH"], rdoc["rD"], rdoc["rS"], rdoc["rC"] - Serial.println('<' + MVM_F_status + ',' + MVM_B_status + ',' + MVM_L_status + ',' + MVM_R_status + '>'); + /* Put reset command in commandFIFO */ + } + break; + case 0: // Stop immediately, clear command cache + { + Serial.println("Emergency stop command received"); + // instr.instr = INSTR_STOP; // Not needed as Emergency Stop is not queued + // Ignore rdoc["Cid"], rdoc["rH"], rdoc["rD"], rdoc["rS"], rdoc["rC"] + + /* Clear commandFIFO */ + } + break; + case 1: // Normal movement command, added to end of command cache + { + Serial.println("Normal movement command received"); + instr.id = rdoc["Cid"]; + instr.instr = INSTR_MOVE; + instr.heading = rdoc["rH"]; + instr.distance = rdoc["rD"]; + instr.speed = rdoc["rS"]; + // Ignore rdoc["rC"] + + /* Put movement command in commandFIFO */ + } + break; + case 2: // Normal charge command, results in no motion, added to end of command cache + { + Serial.println("Normal charge command received"); + instr.id = rdoc["Cid"]; + instr.instr = INSTR_CHARGE; + instr.charge = rdoc["rC"]; + // Ignore rdoc["rH"], rdoc["rD"], rdoc["rS"] + + /* Put charge command in commandFIFO */ + } + break; + default: + { + Serial.println("Unknown Command type received, ignoring"); // Default case, print and continue + // Ignore rdoc["Cid"], rdoc["rH"], rdoc["rD"], rdoc["rS"], rdoc["rC"] + } + break; + } + + queueInstruction(instr); } break; case WStype_PONG: @@ -179,5 +297,72 @@ void webSocketEvent(uint8_t num, WStype_t type, uint8_t *payload, size_t length) Serial.println(String("Websocket received invalid event type: ") + type + String(", exiting")); exit(1); } + break; } } + +void queueInstruction(RoverInstruction instruction) +{ + InstrQueue.push(instruction); +} + +void sendToCommand() +{ + DynamicJsonDocument tdoc(1024); + tdoc["st"] = Status; + tdoc["bV"] = batteryVoltage; + tdoc["bL"] = batteryLevel; + tdoc["tD"] = odometer; + tdoc["cH"] = heading; + tdoc["pos"][0] = xpos; + tdoc["pos"][1] = ypos; + tdoc["rssi"] = signalStrength; + tdoc["LCCid"] = lastCompletedCommand; + String JSON_Data; + serializeJson(tdoc, JSON_Data); + websocketserver.broadcastTXT(JSON_Data); +} + +void sendToDrive(RoverInstruction instruction) +{ + DynamicJsonDocument tdoc(1024); + tdoc["rH"] = instruction.heading; + tdoc["dist"] = instruction.distance; + tdoc["sp"] = instruction.speed; + tdoc["cH"] = heading; + serializeJson(tdoc, Serial1); +} + +void recvFromDrive() // TO DO +{ +} + +void sendToEnergy(RoverInstruction instruction) +{ + DynamicJsonDocument tdoc(1024); + tdoc["ch"] = instruction.charge; + serializeJson(tdoc, Serial2); +} + +void recvFromEnergy() // TO DO +{ +} + +void sendToVision() +{ + Serial3.print("R"); // Request new data from Vision +} + +void recvFromVision() // TO DO +{ +} + +void emergencyStop() // TO DO +{ + // Send stop signals to drive, energy + while (InstrQueue.size()) + { + InstrQueue.pop(); // Clear Instruction Queue + } + Serial.println("Instruction Queue cleared"); +} \ No newline at end of file From 39603efd3c2b04e7530b243fa0ccd03e944bd703 Mon Sep 17 00:00:00 2001 From: Aadi Desai <21363892+supleed2@users.noreply.github.com> Date: Sun, 13 Jun 2021 16:51:46 +0100 Subject: [PATCH 28/32] Add odometer reset flag to Drive<->Control reference doc --- Control/ref/drive.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/Control/ref/drive.cpp b/Control/ref/drive.cpp index 8a59cdc..e10695f 100644 --- a/Control/ref/drive.cpp +++ b/Control/ref/drive.cpp @@ -21,6 +21,7 @@ void loop() int distance = rdoc["dist"]; float speed = rdoc["sp"]; int currentHeading = rdoc["cH"]; + bool resetDistanceTravelled = rdoc["rstD"]; bool commandComplete = 0; float powerUsage_mW = 0.0; From 0483397ae61855325a486e7ed5741f1557ff8aa2 Mon Sep 17 00:00:00 2001 From: Aadi Desai <21363892+supleed2@users.noreply.github.com> Date: Sun, 13 Jun 2021 17:26:50 +0100 Subject: [PATCH 29/32] Add emergency stop function --- Control/ref/drive.cpp | 4 ++-- Control/src/main.cpp | 12 ++++++++++-- 2 files changed, 12 insertions(+), 4 deletions(-) diff --git a/Control/ref/drive.cpp b/Control/ref/drive.cpp index e10695f..a04c7cd 100644 --- a/Control/ref/drive.cpp +++ b/Control/ref/drive.cpp @@ -18,8 +18,8 @@ void loop() DynamicJsonDocument rdoc(1024); // receive doc, not sure how big this needs to be deserializeJson(rdoc, Serial1); // Take JSON input from UART1 int requiredHeading = rdoc["rH"]; // if -1: command in progress, returning requested heading, dist/sp to be ignored - int distance = rdoc["dist"]; - float speed = rdoc["sp"]; + int distance = rdoc["dist"]; // -1 for emergency stop + float speed = rdoc["sp"]; // -1 for emergency stop int currentHeading = rdoc["cH"]; bool resetDistanceTravelled = rdoc["rstD"]; diff --git a/Control/src/main.cpp b/Control/src/main.cpp index 637e9d8..b592441 100644 --- a/Control/src/main.cpp +++ b/Control/src/main.cpp @@ -357,12 +357,20 @@ void recvFromVision() // TO DO { } -void emergencyStop() // TO DO +void emergencyStop() { - // Send stop signals to drive, energy + DynamicJsonDocument tdoc(1024); + tdoc["rH"] = heading; + tdoc["dist"] = -1; + tdoc["sp"] = -1; + tdoc["cH"] = heading; + tdoc["ch"] = 0; + serializeJson(tdoc, Serial1); // Send stop signals to Drive + serializeJson(tdoc, Serial2); // Send stop signals to Energy while (InstrQueue.size()) { InstrQueue.pop(); // Clear Instruction Queue } + Status = CS_IDLE; // Reset rover to idle state Serial.println("Instruction Queue cleared"); } \ No newline at end of file From f3ca90fb2e4cf2575b8281b0896d156df31ffa8f Mon Sep 17 00:00:00 2001 From: Aadi Desai <21363892+supleed2@users.noreply.github.com> Date: Sun, 13 Jun 2021 17:59:21 +0100 Subject: [PATCH 30/32] Add battery cycle tracking to Command<->Control reference doc --- Control/ref/command.cpp | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/Control/ref/command.cpp b/Control/ref/command.cpp index 0a65d23..e4ff859 100644 --- a/Control/ref/command.cpp +++ b/Control/ref/command.cpp @@ -15,8 +15,9 @@ void loop() DynamicJsonDocument rdoc(1024); // receive doc, not sure how big this needs to be deserializeJson(rdoc, WebSocket); // Take JSON input from WebSocket state = rdoc["st"]; // State: -1 = Error, 0 = Idle, 1 = Moving, 2 = Charging - batteryVoltage = rdoc["bV"]; - batteryLevel = rdoc["bL"]; + batteryVoltage = rdoc["bV"]; + batteryLevel = rdoc["bL"]; + batteryCycles = rdoc["bC"]; totalTripDistance = rdoc["tD"]; currentHeading = rdoc["cH"]; current_x = rdoc["pos"][0]; From dc927495ec9922e9154572824aa9117abcc65261 Mon Sep 17 00:00:00 2001 From: Aadi Desai <21363892+supleed2@users.noreply.github.com> Date: Sun, 13 Jun 2021 18:26:00 +0100 Subject: [PATCH 31/32] Fix type errors for battery stat reporting --- Control/ref/command.cpp | 4 ++-- Control/src/main.cpp | 3 ++- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/Control/ref/command.cpp b/Control/ref/command.cpp index e4ff859..3a014df 100644 --- a/Control/ref/command.cpp +++ b/Control/ref/command.cpp @@ -3,8 +3,8 @@ #include #define WebSocket 0 -int state, batteryLevel, totalTripDistance, currentHeading, current_x, current_y, signal_strength, lastCompletedCommand_id; // Info Control ==> Command -float batteryVoltage; // Info Control ==> Command +int state, totalTripDistance, currentHeading, current_x, current_y, signal_strength, lastCompletedCommand_id; // Info Control ==> Command +float batteryVoltage, batteryLevel, batteryCycles; // Info Control ==> Command int command_id, mode, reqHeading, reqDistance, reqCharge; // Info Command ==> Control float reqSpeed; // Info Command ==> Control diff --git a/Control/src/main.cpp b/Control/src/main.cpp index b592441..52dca76 100644 --- a/Control/src/main.cpp +++ b/Control/src/main.cpp @@ -54,7 +54,8 @@ std::queue InstrQueue; #pragma region Global variables ControlStatus_t Status; float batteryVoltage; -int batteryLevel; +float batteryLevel; +float batteryCycles; int odometer; int heading; int xpos, ypos; From 24bd7db3a8a5b732da2d5953b5ddd876a39a4ed1 Mon Sep 17 00:00:00 2001 From: Aadi Desai <21363892+supleed2@users.noreply.github.com> Date: Sun, 13 Jun 2021 18:36:13 +0100 Subject: [PATCH 32/32] Rover Control Program Complete To be tested --- Control/src/main.cpp | 140 ++++++++++++++++++++++++++++++------------- 1 file changed, 100 insertions(+), 40 deletions(-) diff --git a/Control/src/main.cpp b/Control/src/main.cpp index 52dca76..ead562f 100644 --- a/Control/src/main.cpp +++ b/Control/src/main.cpp @@ -37,10 +37,11 @@ void queueInstruction(RoverInstruction instruction); void sendToCommand(); void sendToDrive(RoverInstruction instruction); void recvFromDrive(); -void sendToEnergy(RoverInstruction instruction); +void sendToEnergy(bool instruction); void recvFromEnergy(); void sendToVision(); void recvFromVision(); +void emergencyStop(); #pragma endregion #pragma region Global objects @@ -60,7 +61,11 @@ int odometer; int heading; int xpos, ypos; int signalStrength; -int lastCompletedCommand; +int lastExecutedCommand, lastCompletedCommand; +bool driveCommandComplete; +int bb_left, bb_right, bb_top, bb_bottom; +int bb_centre_x, bb_centre_y; +float chargeGoal; #pragma endregion void setup() @@ -78,12 +83,16 @@ void setup() Status = CS_IDLE; batteryVoltage = 0; batteryLevel = 0; + batteryCycles = 0; odometer = 0; heading = 0; xpos = 0; ypos = 0; signalStrength = 0; + lastExecutedCommand = 0; lastCompletedCommand = 0; + driveCommandComplete = 1; + chargeGoal = 0; if (!SPIFFS.begin(true)) // Mount SPIFFS { @@ -116,9 +125,12 @@ void setup() ticker.attach(0.5, sendToCommand); // Set up recurring function to forward rover status to Command } -void loop() // TO DO +void loop() { websocketserver.loop(); // Handle incoming client connections + recvFromDrive(); // Update stats from Drive + recvFromEnergy(); // Update stats from Energy + recvFromVision(); // Update stats from Vision switch (Status) { case CS_ERROR: @@ -129,27 +141,24 @@ void loop() // TO DO break; case CS_IDLE: { - if (InstrQueue.empty()) // If Rover idle and InstrQueue empty: + if (!InstrQueue.empty()) // If Rover idle and InstrQueue NOT empty: Do the next command in the queue { - // TO DO: Collect all data (recvFrom) and - sendToCommand(); // Update command panel - // Maybe wait 1s? Possibly prevent from looping too fast - } - else - { - // Do the next command in the queue - RoverInstruction *instr = &InstrQueue.front(); - switch (instr->instr) + RoverInstruction *instr = &InstrQueue.front(); // Get next command + switch (instr->instr) // Determine command type { - case INSTR_RESET: + case INSTR_RESET: // Reset telemetry values (zeroing position/distance) { odometer = 0; xpos = 0; ypos = 0; + DynamicJsonDocument tdoc(128); + tdoc["rstD"] = 1; + serializeJson(tdoc, Serial1); // Send reset odometer signal to Drive } break; - case INSTR_STOP: + case INSTR_STOP: // Emergency stop { + Status = CS_ERROR; while (1) { Serial.println("Emergency Stop should not get queued, hold and print"); @@ -157,16 +166,18 @@ void loop() // TO DO } } break; - case INSTR_MOVE: + case INSTR_MOVE: // Normal movement { - Status = CS_MOVING; - sendToDrive(*instr); + Status = CS_MOVING; // Set moving state + driveCommandComplete = 0; + sendToDrive(*instr); // Forward to Drive handler } break; - case INSTR_CHARGE: + case INSTR_CHARGE: // Normal charge { - Status = CS_CHARGING; - sendToEnergy(*instr); + Status = CS_CHARGING; // Set charging state + chargeGoal = (float)instr->charge; // Set charging goal + sendToEnergy(1); // Forward to Energy handler } break; default: @@ -175,17 +186,36 @@ void loop() // TO DO } break; } + lastExecutedCommand = instr->id; // Update tracker of last processed command } } break; case CS_MOVING: { - // TO DO + if (driveCommandComplete) // If movement command complete: + { + Status = CS_IDLE; // Set rover state back to idle + lastCompletedCommand = lastExecutedCommand; // Update last completed command + } + else // If movement command NOT complete: + { // Send (up to date) current heading to Drive + DynamicJsonDocument tdoc(128); + tdoc["rH"] = -1; + tdoc["cH"] = heading; + serializeJson(tdoc, Serial1); + } } break; case CS_CHARGING: { - // TO DO + if (batteryLevel >= chargeGoal) // Compare batteryLevel to chargeGoal + { + Status = CS_IDLE; + lastCompletedCommand = lastExecutedCommand; // Update last completed command + sendToEnergy(0); // Stop charging if goal reached + } + // Otherwise continue charging, no change + } break; default: @@ -193,7 +223,9 @@ void loop() // TO DO Serial.println("Unknown rover state, exiting..."); exit(1); } + break; } + delay(500); } void notFound(AsyncWebServerRequest *request) @@ -201,7 +233,7 @@ void notFound(AsyncWebServerRequest *request) request->send(404, "text/plain", "Page Not found. Check URI/IP address."); } -void webSocketEvent(uint8_t num, WStype_t type, uint8_t *payload, size_t length) // TO DO +void webSocketEvent(uint8_t num, WStype_t type, uint8_t *payload, size_t length) { switch (type) { @@ -241,7 +273,7 @@ void webSocketEvent(uint8_t num, WStype_t type, uint8_t *payload, size_t length) instr.instr = INSTR_RESET; // Ignore rdoc["rH"], rdoc["rD"], rdoc["rS"], rdoc["rC"] - /* Put reset command in commandFIFO */ + queueInstruction(instr); // Put reset command in InstrQueue } break; case 0: // Stop immediately, clear command cache @@ -250,7 +282,7 @@ void webSocketEvent(uint8_t num, WStype_t type, uint8_t *payload, size_t length) // instr.instr = INSTR_STOP; // Not needed as Emergency Stop is not queued // Ignore rdoc["Cid"], rdoc["rH"], rdoc["rD"], rdoc["rS"], rdoc["rC"] - /* Clear commandFIFO */ + emergencyStop(); } break; case 1: // Normal movement command, added to end of command cache @@ -263,7 +295,7 @@ void webSocketEvent(uint8_t num, WStype_t type, uint8_t *payload, size_t length) instr.speed = rdoc["rS"]; // Ignore rdoc["rC"] - /* Put movement command in commandFIFO */ + queueInstruction(instr); // Put movement command in InstrQueue } break; case 2: // Normal charge command, results in no motion, added to end of command cache @@ -274,18 +306,17 @@ void webSocketEvent(uint8_t num, WStype_t type, uint8_t *payload, size_t length) instr.charge = rdoc["rC"]; // Ignore rdoc["rH"], rdoc["rD"], rdoc["rS"] - /* Put charge command in commandFIFO */ + queueInstruction(instr); // Put charge command in InstrQueue } break; default: { - Serial.println("Unknown Command type received, ignoring"); // Default case, print and continue - // Ignore rdoc["Cid"], rdoc["rH"], rdoc["rD"], rdoc["rS"], rdoc["rC"] + // Default case, print and continue + Serial.println("Unknown Command type received, ignoring"); + // Ignore rdoc["Cid"], rdoc["rH"], rdoc["rD"], rdoc["rS"], rdoc["rC"] } break; } - - queueInstruction(instr); } break; case WStype_PONG: @@ -313,6 +344,7 @@ void sendToCommand() tdoc["st"] = Status; tdoc["bV"] = batteryVoltage; tdoc["bL"] = batteryLevel; + tdoc["bC"] = batteryCycles; tdoc["tD"] = odometer; tdoc["cH"] = heading; tdoc["pos"][0] = xpos; @@ -334,19 +366,36 @@ void sendToDrive(RoverInstruction instruction) serializeJson(tdoc, Serial1); } -void recvFromDrive() // TO DO +void recvFromDrive() // Update telemetry data and state info from Drive packet { + if (Serial1.available()) // Check for input from UART1 (Connected to Drive) + { + DynamicJsonDocument rdoc(1024); + deserializeJson(rdoc, Serial1); + driveCommandComplete = rdoc["comp"]; + odometer = rdoc["mm"]; + xpos = rdoc["pos"][0]; + ypos = rdoc["pos"][1]; + } } -void sendToEnergy(RoverInstruction instruction) +void sendToEnergy(bool instruction) { - DynamicJsonDocument tdoc(1024); - tdoc["ch"] = instruction.charge; + DynamicJsonDocument tdoc(128); + tdoc["ch"] = instruction; // Start charging serializeJson(tdoc, Serial2); } -void recvFromEnergy() // TO DO +void recvFromEnergy() // Update telemetry data and state info from Energy packet { + if (Serial2.available()) // Check for input from UART2 (Connected to Energy) + { + DynamicJsonDocument rdoc(1024); + deserializeJson(rdoc, Serial2); + batteryLevel = rdoc["soc"]; + batteryVoltage = rdoc["mV"]; + batteryCycles = rdoc["cyc"]; + } } void sendToVision() @@ -354,8 +403,20 @@ void sendToVision() Serial3.print("R"); // Request new data from Vision } -void recvFromVision() // TO DO +void recvFromVision() // Update bounding box and obstacle detection data from Vision packet { + if (Serial3.available()) // Check for input from UART3 (Connected to Vision) + { + DynamicJsonDocument rdoc(1024); + deserializeJson(rdoc, Serial3); + bb_left = rdoc["bb"][0]; + bb_right = rdoc["bb"][1]; + bb_top = rdoc["bb"][2]; + bb_bottom = rdoc["bb"][3]; + bb_centre_x = rdoc["cen"][0]; + bb_centre_y = rdoc["cen"][1]; + heading = rdoc["cH"]; + } } void emergencyStop() @@ -365,9 +426,8 @@ void emergencyStop() tdoc["dist"] = -1; tdoc["sp"] = -1; tdoc["cH"] = heading; - tdoc["ch"] = 0; serializeJson(tdoc, Serial1); // Send stop signals to Drive - serializeJson(tdoc, Serial2); // Send stop signals to Energy + sendToEnergy(0); // Send stop signal to Energy while (InstrQueue.size()) { InstrQueue.pop(); // Clear Instruction Queue

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