ELEC40006-P1-CW/abs.bdf

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19 KiB
Plaintext

/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 2019 Intel Corporation. All rights reserved.
Your use of Intel Corporation's design tools, logic functions
and other software and tools, and any partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Intel Program License
Subscription Agreement, the Intel Quartus Prime License Agreement,
the Intel FPGA IP License Agreement, or other applicable license
agreement, including, without limitation, that your use is for
the sole purpose of programming logic devices manufactured by
Intel and sold by Intel or its authorized distributors. Please
refer to the applicable agreement for further details, at
https://fpgasoftware.intel.com/eula.
*/
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(text "0,0,0,0,0,0,0,1" (rect 682 168 745 185)(font "Intel Clear" ))
(pt 672 184)
(pt 784 184)
(bus)
)
(connector
(pt 896 168)
(pt 912 168)
(bus)
)
(connector
(pt 912 168)
(pt 912 208)
(bus)
)
(connector
(pt 912 208)
(pt 968 208)
(bus)
)
(connector
(text "T[7..0]" (rect 522 256 551 273)(font "Intel Clear" ))
(pt 856 272)
(pt 512 272)
(bus)
)
(connector
(pt 856 272)
(pt 856 256)
(bus)
)
(connector
(pt 512 248)
(pt 512 272)
(bus)
)
(connector
(pt 512 272)
(pt 512 312)
(bus)
)
(connector
(pt 856 256)
(pt 968 256)
(bus)
)
(connector
(text "1" (rect 954 152 959 169)(font "Intel Clear" ))
(pt 968 168)
(pt 944 168)
)
(junction (pt 512 56))
(junction (pt 512 120))
(junction (pt 512 184))
(junction (pt 512 248))
(junction (pt 512 312))
(junction (pt 512 376))
(junction (pt 512 440))
(junction (pt 512 272))
(junction (pt 512 504))