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45 lines
1.3 KiB
Plaintext
45 lines
1.3 KiB
Plaintext
-- Copyright (C) 2018 Intel Corporation. All rights reserved.
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-- Your use of Intel Corporation's design tools, logic functions
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-- and other software and tools, and its AMPP partner logic
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-- functions, and any output files from any of the foregoing
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-- (including device programming or simulation files), and any
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-- associated documentation or information are expressly subject
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-- to the terms and conditions of the Intel Program License
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-- Subscription Agreement, the Intel Quartus Prime License Agreement,
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-- the Intel FPGA IP License Agreement, or other applicable license
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-- agreement, including, without limitation, that your use is for
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-- the sole purpose of programming logic devices manufactured by
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-- Intel and sold by Intel or its authorized distributors. Please
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-- refer to the applicable agreement for further details.
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-- Quartus Prime generated Memory Initialization File (.mif)
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WIDTH=16;
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DEPTH=2048;
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ADDRESS_RADIX=HEX;
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DATA_RADIX=HEX;
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CONTENT BEGIN
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000 : 0002;
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001 : 0003;
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002 : 0000;
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003 : FFFF;
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004 : BFFF;
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005 : 000A;
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006 : 0017;
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007 : 001A;
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008 : 001D;
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009 : 0020;
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00A : 0024;
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00B : 0000;
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00C : 0027;
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00D : 002A;
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00E : 002D;
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00F : 0032;
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010 : AAAA;
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011 : 0004;
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012 : FFF0;
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[013..7FF] : 0000;
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END;
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