mirror of
https://github.com/supleed2/ELEC40006-P1-CW.git
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131 lines
3.4 KiB
Plaintext
131 lines
3.4 KiB
Plaintext
/*
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WARNING: Do NOT edit the input and output ports in this file in a text
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editor if you plan to continue editing the block that represents it in
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the Block Editor! File corruption is VERY likely to occur.
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*/
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/*
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Copyright (C) 2019 Intel Corporation. All rights reserved.
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Your use of Intel Corporation's design tools, logic functions
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and other software and tools, and any partner logic
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functions, and any output files from any of the foregoing
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(including device programming or simulation files), and any
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associated documentation or information are expressly subject
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to the terms and conditions of the Intel Program License
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Subscription Agreement, the Intel Quartus Prime License Agreement,
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the Intel FPGA IP License Agreement, or other applicable license
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agreement, including, without limitation, that your use is for
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the sole purpose of programming logic devices manufactured by
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Intel and sold by Intel or its authorized distributors. Please
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refer to the applicable agreement for further details, at
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https://fpgasoftware.intel.com/eula.
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*/
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(header "graphic" (version "1.4"))
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(pin
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(input)
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(rect 296 224 464 240)
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(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
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(text "X" (rect 5 0 11 12)(font "Arial" ))
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(pt 168 8)
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(drawing
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(line (pt 84 12)(pt 109 12))
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(line (pt 84 4)(pt 109 4))
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(line (pt 113 8)(pt 168 8))
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(line (pt 84 12)(pt 84 4))
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(line (pt 109 4)(pt 113 8))
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(line (pt 109 12)(pt 113 8))
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)
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(text "VCC" (rect 128 7 148 17)(font "Arial" (font_size 6)))
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)
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(pin
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(input)
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(rect 296 288 464 304)
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(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
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(text "Y" (rect 5 0 13 17)(font "Intel Clear" ))
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(pt 168 8)
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(drawing
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(line (pt 84 12)(pt 109 12))
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(line (pt 84 4)(pt 109 4))
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(line (pt 113 8)(pt 168 8))
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(line (pt 84 12)(pt 84 4))
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(line (pt 109 4)(pt 113 8))
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(line (pt 109 12)(pt 113 8))
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)
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(text "VCC" (rect 128 7 148 17)(font "Arial" (font_size 6)))
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)
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(pin
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(output)
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(rect 608 256 784 272)
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(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
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(text "Z" (rect 90 0 97 12)(font "Arial" ))
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(pt 0 8)
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(drawing
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(line (pt 0 8)(pt 52 8))
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(line (pt 52 4)(pt 78 4))
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(line (pt 52 12)(pt 78 12))
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(line (pt 52 12)(pt 52 4))
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(line (pt 78 4)(pt 82 8))
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(line (pt 82 8)(pt 78 12))
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(line (pt 78 12)(pt 82 8))
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)
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)
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(symbol
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(rect 504 240 568 288)
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(text "AND2" (rect 1 0 25 10)(font "Arial" (font_size 6)))
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(text "inst" (rect 3 37 20 49)(font "Arial" ))
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(port
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(pt 0 16)
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(input)
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(text "IN1" (rect 2 7 19 19)(font "Courier New" (bold))(invisible))
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(text "IN1" (rect 2 7 19 19)(font "Courier New" (bold))(invisible))
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(line (pt 0 16)(pt 14 16))
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)
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(port
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(pt 0 32)
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(input)
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(text "IN2" (rect 2 23 19 35)(font "Courier New" (bold))(invisible))
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(text "IN2" (rect 2 23 19 35)(font "Courier New" (bold))(invisible))
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(line (pt 0 32)(pt 14 32))
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)
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(port
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(pt 64 24)
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(output)
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(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
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(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
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(line (pt 42 24)(pt 64 24))
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)
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(drawing
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(line (pt 14 12)(pt 30 12))
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(line (pt 14 37)(pt 31 37))
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(line (pt 14 12)(pt 14 37))
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(arc (pt 31 37)(pt 30 12)(rect 18 12 43 37))
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)
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)
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(connector
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(pt 496 256)
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(pt 496 232)
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)
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(connector
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(pt 504 256)
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(pt 496 256)
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)
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(connector
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(pt 496 232)
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(pt 464 232)
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)
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(connector
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(pt 464 296)
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(pt 496 296)
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)
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(connector
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(pt 496 296)
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(pt 496 272)
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)
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(connector
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(pt 496 272)
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(pt 504 272)
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)
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(connector
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(pt 568 264)
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(pt 608 264)
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)
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