diff --git a/ALU_top.bdf b/ALU_top.bdf index e49000c..0a5ed61 100644 --- a/ALU_top.bdf +++ b/ALU_top.bdf @@ -118,7 +118,7 @@ https://fpgasoftware.intel.com/eula. ) (pin (input) - (rect 344 448 520 464) + (rect 344 480 520 496) (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6))) (text "CLK" (rect 9 0 30 12)(font "Arial" )) (pt 176 8) @@ -148,9 +148,25 @@ https://fpgasoftware.intel.com/eula. ) (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6))) ) +(pin + (input) + (rect 344 368 528 384) + (text "INPUT" (rect 141 0 169 10)(font "Arial" (font_size 6))) + (text "memdatain[15..0]" (rect 5 0 89 17)(font "Intel Clear" )) + (pt 184 8) + (drawing + (line (pt 100 12)(pt 125 12)) + (line (pt 100 4)(pt 125 4)) + (line (pt 129 8)(pt 184 8)) + (line (pt 100 12)(pt 100 4)) + (line (pt 125 4)(pt 129 8)) + (line (pt 125 12)(pt 129 8)) + ) + (text "VCC" (rect 144 7 164 17)(font "Arial" (font_size 6))) +) (pin (output) - (rect 784 272 960 288) + (rect 800 272 976 288) (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6))) (text "Rout[15..0]" (rect 90 0 145 12)(font "Arial" )) (pt 0 8) @@ -166,7 +182,7 @@ https://fpgasoftware.intel.com/eula. ) (pin (output) - (rect 784 288 960 304) + (rect 800 288 976 304) (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6))) (text "COND" (rect 90 0 123 12)(font "Arial" )) (pt 0 8) @@ -182,7 +198,7 @@ https://fpgasoftware.intel.com/eula. ) (pin (output) - (rect 784 304 960 320) + (rect 800 304 976 320) (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6))) (text "CARRY" (rect 90 0 130 12)(font "Arial" )) (pt 0 8) @@ -198,7 +214,7 @@ https://fpgasoftware.intel.com/eula. ) (pin (output) - (rect 768 448 944 464) + (rect 768 480 944 496) (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6))) (text "MUL_res[31..0]" (rect 90 0 165 12)(font "Arial" )) (pt 0 8) @@ -214,7 +230,7 @@ https://fpgasoftware.intel.com/eula. ) (pin (output) - (rect 784 320 960 336) + (rect 800 320 976 336) (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6))) (text "jumpflags[7..0]" (rect 90 0 164 12)(font "Arial" )) (pt 0 8) @@ -230,7 +246,7 @@ https://fpgasoftware.intel.com/eula. ) (pin (output) - (rect 784 240 960 256) + (rect 800 240 976 256) (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6))) (text "mul1[15..0]" (rect 90 0 145 12)(font "Arial" )) (pt 0 8) @@ -246,9 +262,25 @@ https://fpgasoftware.intel.com/eula. ) (pin (output) - (rect 784 256 960 272) + (rect 800 256 976 272) (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6))) - (text "mul2[15..0]" (rect 90 0 144 17)(font "Intel Clear" )) + (text "mul2[15..0]" (rect 90 0 145 12)(font "Arial" )) + (pt 0 8) + (drawing + (line (pt 0 8)(pt 52 8)) + (line (pt 52 4)(pt 78 4)) + (line (pt 52 12)(pt 78 12)) + (line (pt 52 12)(pt 52 4)) + (line (pt 78 4)(pt 82 8)) + (line (pt 82 8)(pt 78 12)) + (line (pt 78 12)(pt 82 8)) + ) +) +(pin + (output) + (rect 800 336 976 352) + (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6))) + (text "memaddr[10..0]" (rect 90 0 165 17)(font "Intel Clear" )) (pt 0 8) (drawing (line (pt 0 8)(pt 52 8)) @@ -261,7 +293,7 @@ https://fpgasoftware.intel.com/eula. ) ) (symbol - (rect 544 424 744 520) + (rect 544 456 744 552) (text "mul16" (rect 5 0 43 19)(font "Intel Clear" (font_size 8))) (text "MULTIPLIER" (rect 8 75 67 92)(font "Intel Clear" )) (port @@ -297,9 +329,9 @@ https://fpgasoftware.intel.com/eula. ) ) (symbol - (rect 544 216 760 392) + (rect 544 216 776 424) (text "alu" (rect 5 0 19 12)(font "Arial" )) - (text "ALU_in" (rect 8 160 43 172)(font "Arial" )) + (text "ALU_in" (rect 8 192 43 204)(font "Arial" )) (port (pt 0 32) (input) @@ -357,110 +389,65 @@ https://fpgasoftware.intel.com/eula. (line (pt 0 144)(pt 16 144)(line_width 3)) ) (port - (pt 216 32) + (pt 0 160) + (input) + (text "memdatain[15..0]" (rect 0 0 86 12)(font "Arial" )) + (text "memdatain[15..0]" (rect 21 155 107 167)(font "Arial" )) + (line (pt 0 160)(pt 16 160)(line_width 3)) + ) + (port + (pt 232 32) (output) (text "mul1[15..0]" (rect 0 0 55 12)(font "Arial" )) - (text "mul1[15..0]" (rect 149 27 204 39)(font "Arial" )) - (line (pt 216 32)(pt 200 32)(line_width 3)) + (text "mul1[15..0]" (rect 165 27 211 39)(font "Arial" )) + (line (pt 232 32)(pt 216 32)(line_width 3)) ) (port - (pt 216 48) + (pt 232 48) (output) (text "mul2[15..0]" (rect 0 0 55 12)(font "Arial" )) - (text "mul2[15..0]" (rect 149 43 204 55)(font "Arial" )) - (line (pt 216 48)(pt 200 48)(line_width 3)) + (text "mul2[15..0]" (rect 165 43 211 55)(font "Arial" )) + (line (pt 232 48)(pt 216 48)(line_width 3)) ) (port - (pt 216 64) + (pt 232 64) (output) (text "Rout[15..0]" (rect 0 0 55 12)(font "Arial" )) - (text "Rout[15..0]" (rect 149 59 204 71)(font "Arial" )) - (line (pt 216 64)(pt 200 64)(line_width 3)) + (text "Rout[15..0]" (rect 165 59 211 71)(font "Arial" )) + (line (pt 232 64)(pt 216 64)(line_width 3)) ) (port - (pt 216 80) + (pt 232 80) (output) (text "jump" (rect 0 0 23 12)(font "Arial" )) - (text "jump" (rect 176 75 199 87)(font "Arial" )) - (line (pt 216 80)(pt 200 80)) + (text "jump" (rect 192 75 211 87)(font "Arial" )) + (line (pt 232 80)(pt 216 80)) ) (port - (pt 216 96) + (pt 232 96) (output) (text "carry" (rect 0 0 25 12)(font "Arial" )) - (text "carry" (rect 174 91 199 103)(font "Arial" )) - (line (pt 216 96)(pt 200 96)) + (text "carry" (rect 190 91 211 103)(font "Arial" )) + (line (pt 232 96)(pt 216 96)) ) (port - (pt 216 112) + (pt 232 112) (output) (text "jumpflags[7..0]" (rect 0 0 74 12)(font "Arial" )) - (text "jumpflags[7..0]" (rect 133 107 207 119)(font "Arial" )) - (line (pt 216 112)(pt 200 112)(line_width 3)) + (text "jumpflags[7..0]" (rect 149 107 211 119)(font "Arial" )) + (line (pt 232 112)(pt 216 112)(line_width 3)) + ) + (port + (pt 232 128) + (output) + (text "memaddr[10..0]" (rect 0 0 77 12)(font "Arial" )) + (text "memaddr[10..0]" (rect 146 123 211 135)(font "Arial" )) + (line (pt 232 128)(pt 216 128)(line_width 3)) ) (drawing - (rectangle (rect 16 16 200 160)) + (rectangle (rect 16 16 216 192)) ) ) -(connector - (pt 752 400) - (pt 752 456) - (bus) -) -(connector - (pt 544 472) - (pt 536 472) - (bus) -) -(connector - (pt 544 488) - (pt 528 488) - (bus) -) -(connector - (pt 528 408) - (pt 528 488) - (bus) -) -(connector - (pt 536 416) - (pt 536 472) - (bus) -) -(connector - (pt 752 400) - (pt 536 400) - (bus) -) -(connector - (pt 744 456) - (pt 752 456) - (bus) -) -(connector - (pt 752 456) - (pt 768 456) - (bus) -) -(connector - (pt 528 344) - (pt 544 344) -) -(connector - (pt 544 360) - (pt 528 360) - (bus) -) -(connector - (pt 544 328) - (pt 536 328) - (bus) -) -(connector - (pt 536 400) - (pt 536 328) - (bus) -) (connector (pt 528 248) (pt 544 248) @@ -486,67 +473,136 @@ https://fpgasoftware.intel.com/eula. (bus) ) (connector - (pt 544 456) - (pt 520 456) + (pt 528 344) + (pt 544 344) ) (connector - (pt 760 280) - (pt 784 280) + (pt 528 360) + (pt 544 360) (bus) ) (connector - (pt 760 296) - (pt 784 296) -) -(connector - (pt 760 312) - (pt 784 312) -) -(connector - (pt 536 416) - (pt 776 416) + (pt 752 432) + (pt 752 488) + (bus) +) +(connector + (pt 544 504) + (pt 536 504) + (bus) +) +(connector + (pt 544 520) + (pt 528 520) + (bus) +) +(connector + (pt 528 440) + (pt 528 520) + (bus) +) +(connector + (pt 536 448) + (pt 536 504) + (bus) +) +(connector + (pt 752 432) + (pt 536 432) + (bus) +) +(connector + (pt 544 488) + (pt 520 488) +) +(connector + (pt 528 440) + (pt 784 440) + (bus) +) +(connector + (pt 536 328) + (pt 536 432) + (bus) +) +(connector + (pt 544 328) + (pt 536 328) + (bus) +) +(connector + (pt 744 488) + (pt 752 488) + (bus) +) +(connector + (pt 752 488) + (pt 768 488) + (bus) +) +(connector + (pt 784 264) + (pt 784 440) + (bus) +) +(connector + (pt 536 448) + (pt 792 448) + (bus) +) +(connector + (pt 792 248) + (pt 792 448) + (bus) +) +(connector + (pt 776 280) + (pt 800 280) + (bus) +) +(connector + (pt 776 296) + (pt 800 296) +) +(connector + (pt 776 312) + (pt 800 312) +) +(connector + (pt 776 328) + (pt 800 328) (bus) ) (connector - (pt 776 416) (pt 776 248) + (pt 792 248) (bus) ) (connector - (pt 528 408) - (pt 768 408) + (pt 792 248) + (pt 800 248) (bus) ) (connector - (pt 768 264) - (pt 768 408) - (bus) -) -(connector - (pt 760 328) - (pt 784 328) - (bus) -) -(connector - (pt 760 264) - (pt 768 264) - (bus) -) -(connector - (pt 768 264) + (pt 776 264) (pt 784 264) (bus) ) (connector - (pt 760 248) - (pt 776 248) + (pt 784 264) + (pt 800 264) (bus) ) (connector - (pt 776 248) - (pt 784 248) + (pt 776 344) + (pt 800 344) (bus) ) -(junction (pt 752 456)) -(junction (pt 768 264)) -(junction (pt 776 248)) +(connector + (pt 544 376) + (pt 528 376) + (bus) +) +(junction (pt 752 488)) +(junction (pt 784 264)) +(junction (pt 792 248)) diff --git a/ALU_top.bsf b/ALU_top.bsf index 114a4d4..63e7bf5 100644 --- a/ALU_top.bsf +++ b/ALU_top.bsf @@ -21,7 +21,7 @@ https://fpgasoftware.intel.com/eula. */ (header "symbol" (version "1.2")) (symbol - (rect 16 16 264 208) + (rect 16 16 272 208) (text "ALU_top" (rect 5 0 56 19)(font "Intel Clear" (font_size 8))) (text "inst" (rect 8 171 24 188)(font "Intel Clear" )) (port @@ -76,60 +76,74 @@ https://fpgasoftware.intel.com/eula. (port (pt 0 144) (input) - (text "CLK" (rect 0 0 23 19)(font "Intel Clear" (font_size 8))) - (text "CLK" (rect 21 139 44 158)(font "Intel Clear" (font_size 8))) - (line (pt 0 144)(pt 16 144)) + (text "memdatain[15..0]" (rect 0 0 107 19)(font "Intel Clear" (font_size 8))) + (text "memdatain[15..0]" (rect 21 139 128 158)(font "Intel Clear" (font_size 8))) + (line (pt 0 144)(pt 16 144)(line_width 3)) ) (port - (pt 248 32) + (pt 0 160) + (input) + (text "CLK" (rect 0 0 23 19)(font "Intel Clear" (font_size 8))) + (text "CLK" (rect 21 155 44 174)(font "Intel Clear" (font_size 8))) + (line (pt 0 160)(pt 16 160)) + ) + (port + (pt 256 32) (output) (text "mul1[15..0]" (rect 0 0 69 19)(font "Intel Clear" (font_size 8))) - (text "mul1[15..0]" (rect 158 27 227 46)(font "Intel Clear" (font_size 8))) - (line (pt 248 32)(pt 232 32)(line_width 3)) + (text "mul1[15..0]" (rect 166 27 235 46)(font "Intel Clear" (font_size 8))) + (line (pt 256 32)(pt 240 32)(line_width 3)) ) (port - (pt 248 48) + (pt 256 48) (output) (text "mul2[15..0]" (rect 0 0 69 19)(font "Intel Clear" (font_size 8))) - (text "mul2[15..0]" (rect 158 43 227 62)(font "Intel Clear" (font_size 8))) - (line (pt 248 48)(pt 232 48)(line_width 3)) + (text "mul2[15..0]" (rect 166 43 235 62)(font "Intel Clear" (font_size 8))) + (line (pt 256 48)(pt 240 48)(line_width 3)) ) (port - (pt 248 64) + (pt 256 64) (output) (text "Rout[15..0]" (rect 0 0 66 19)(font "Intel Clear" (font_size 8))) - (text "Rout[15..0]" (rect 161 59 227 78)(font "Intel Clear" (font_size 8))) - (line (pt 248 64)(pt 232 64)(line_width 3)) + (text "Rout[15..0]" (rect 169 59 235 78)(font "Intel Clear" (font_size 8))) + (line (pt 256 64)(pt 240 64)(line_width 3)) ) (port - (pt 248 80) + (pt 256 80) (output) (text "COND" (rect 0 0 36 19)(font "Intel Clear" (font_size 8))) - (text "COND" (rect 191 75 227 94)(font "Intel Clear" (font_size 8))) - (line (pt 248 80)(pt 232 80)) + (text "COND" (rect 199 75 235 94)(font "Intel Clear" (font_size 8))) + (line (pt 256 80)(pt 240 80)) ) (port - (pt 248 96) + (pt 256 96) (output) (text "CARRY" (rect 0 0 41 19)(font "Intel Clear" (font_size 8))) - (text "CARRY" (rect 186 91 227 110)(font "Intel Clear" (font_size 8))) - (line (pt 248 96)(pt 232 96)) + (text "CARRY" (rect 194 91 235 110)(font "Intel Clear" (font_size 8))) + (line (pt 256 96)(pt 240 96)) ) (port - (pt 248 112) + (pt 256 112) (output) (text "jumpflags[7..0]" (rect 0 0 89 19)(font "Intel Clear" (font_size 8))) - (text "jumpflags[7..0]" (rect 138 107 227 126)(font "Intel Clear" (font_size 8))) - (line (pt 248 112)(pt 232 112)(line_width 3)) + (text "jumpflags[7..0]" (rect 146 107 235 126)(font "Intel Clear" (font_size 8))) + (line (pt 256 112)(pt 240 112)(line_width 3)) ) (port - (pt 248 128) + (pt 256 128) + (output) + (text "memaddr[10..0]" (rect 0 0 97 19)(font "Intel Clear" (font_size 8))) + (text "memaddr[10..0]" (rect 138 123 235 142)(font "Intel Clear" (font_size 8))) + (line (pt 256 128)(pt 240 128)(line_width 3)) + ) + (port + (pt 256 144) (output) (text "MUL_res[31..0]" (rect 0 0 90 19)(font "Intel Clear" (font_size 8))) - (text "MUL_res[31..0]" (rect 137 123 227 142)(font "Intel Clear" (font_size 8))) - (line (pt 248 128)(pt 232 128)(line_width 3)) + (text "MUL_res[31..0]" (rect 145 139 235 158)(font "Intel Clear" (font_size 8))) + (line (pt 256 144)(pt 240 144)(line_width 3)) ) (drawing - (rectangle (rect 16 16 232 176)) + (rectangle (rect 16 16 240 176)) ) ) diff --git a/CPUProject.bdf b/CPUProject.bdf index 648c870..7f9edc9 100644 --- a/CPUProject.bdf +++ b/CPUProject.bdf @@ -791,6 +791,22 @@ https://fpgasoftware.intel.com/eula. (line (pt 78 12)(pt 82 8)) ) ) +(pin + (output) + (rect 1512 400 1688 416) + (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6))) + (text "memaddr[10..0]" (rect 90 0 165 17)(font "Intel Clear" )) + (pt 0 8) + (drawing + (line (pt 0 8)(pt 52 8)) + (line (pt 52 4)(pt 78 4)) + (line (pt 52 12)(pt 78 12)) + (line (pt 52 12)(pt 52 4)) + (line (pt 78 4)(pt 82 8)) + (line (pt 82 8)(pt 78 12)) + (line (pt 78 12)(pt 82 8)) + ) +) (symbol (rect 632 144 816 352) (text "mux_8x16" (rect 5 0 55 12)(font "Arial" )) @@ -1568,7 +1584,7 @@ https://fpgasoftware.intel.com/eula. ) ) (symbol - (rect 936 320 1184 512) + (rect 928 320 1184 512) (text "ALU_top" (rect 5 0 56 19)(font "Intel Clear" (font_size 8))) (text "ALU" (rect 8 171 28 188)(font "Intel Clear" )) (port @@ -1623,61 +1639,75 @@ https://fpgasoftware.intel.com/eula. (port (pt 0 144) (input) - (text "CLK" (rect 0 0 23 19)(font "Intel Clear" (font_size 8))) - (text "CLK" (rect 21 139 44 158)(font "Intel Clear" (font_size 8))) - (line (pt 0 144)(pt 16 144)) + (text "memdatain[15..0]" (rect 0 0 107 19)(font "Intel Clear" (font_size 8))) + (text "memdatain[15..0]" (rect 21 139 128 158)(font "Intel Clear" (font_size 8))) + (line (pt 0 144)(pt 16 144)(line_width 3)) ) (port - (pt 248 32) + (pt 0 160) + (input) + (text "CLK" (rect 0 0 23 19)(font "Intel Clear" (font_size 8))) + (text "CLK" (rect 21 155 44 174)(font "Intel Clear" (font_size 8))) + (line (pt 0 160)(pt 16 160)) + ) + (port + (pt 256 32) (output) (text "mul1[15..0]" (rect 0 0 69 19)(font "Intel Clear" (font_size 8))) - (text "mul1[15..0]" (rect 158 27 227 46)(font "Intel Clear" (font_size 8))) - (line (pt 248 32)(pt 232 32)(line_width 3)) + (text "mul1[15..0]" (rect 166 27 235 46)(font "Intel Clear" (font_size 8))) + (line (pt 256 32)(pt 240 32)(line_width 3)) ) (port - (pt 248 48) + (pt 256 48) (output) (text "mul2[15..0]" (rect 0 0 69 19)(font "Intel Clear" (font_size 8))) - (text "mul2[15..0]" (rect 158 43 227 62)(font "Intel Clear" (font_size 8))) - (line (pt 248 48)(pt 232 48)(line_width 3)) + (text "mul2[15..0]" (rect 166 43 235 62)(font "Intel Clear" (font_size 8))) + (line (pt 256 48)(pt 240 48)(line_width 3)) ) (port - (pt 248 64) + (pt 256 64) (output) (text "Rout[15..0]" (rect 0 0 66 19)(font "Intel Clear" (font_size 8))) - (text "Rout[15..0]" (rect 161 59 227 78)(font "Intel Clear" (font_size 8))) - (line (pt 248 64)(pt 232 64)(line_width 3)) + (text "Rout[15..0]" (rect 169 59 235 78)(font "Intel Clear" (font_size 8))) + (line (pt 256 64)(pt 240 64)(line_width 3)) ) (port - (pt 248 80) + (pt 256 80) (output) (text "COND" (rect 0 0 36 19)(font "Intel Clear" (font_size 8))) - (text "COND" (rect 191 75 227 94)(font "Intel Clear" (font_size 8))) - (line (pt 248 80)(pt 232 80)) + (text "COND" (rect 199 75 235 94)(font "Intel Clear" (font_size 8))) + (line (pt 256 80)(pt 240 80)) ) (port - (pt 248 96) + (pt 256 96) (output) (text "CARRY" (rect 0 0 41 19)(font "Intel Clear" (font_size 8))) - (text "CARRY" (rect 186 91 227 110)(font "Intel Clear" (font_size 8))) - (line (pt 248 96)(pt 232 96)) + (text "CARRY" (rect 194 91 235 110)(font "Intel Clear" (font_size 8))) + (line (pt 256 96)(pt 240 96)) ) (port - (pt 248 112) + (pt 256 112) (output) (text "jumpflags[7..0]" (rect 0 0 89 19)(font "Intel Clear" (font_size 8))) - (text "jumpflags[7..0]" (rect 138 107 227 126)(font "Intel Clear" (font_size 8))) - (line (pt 248 112)(pt 232 112)(line_width 3)) + (text "jumpflags[7..0]" (rect 146 107 235 126)(font "Intel Clear" (font_size 8))) + (line (pt 256 112)(pt 240 112)(line_width 3)) ) (port - (pt 248 128) + (pt 256 128) + (output) + (text "memaddr[10..0]" (rect 0 0 97 19)(font "Intel Clear" (font_size 8))) + (text "memaddr[10..0]" (rect 138 123 235 142)(font "Intel Clear" (font_size 8))) + (line (pt 256 128)(pt 240 128)(line_width 3)) + ) + (port + (pt 256 144) (output) (text "MUL_res[31..0]" (rect 0 0 90 19)(font "Intel Clear" (font_size 8))) - (text "MUL_res[31..0]" (rect 137 123 227 142)(font "Intel Clear" (font_size 8))) - (line (pt 248 128)(pt 232 128)(line_width 3)) + (text "MUL_res[31..0]" (rect 145 139 235 158)(font "Intel Clear" (font_size 8))) + (line (pt 256 144)(pt 240 144)(line_width 3)) ) (drawing - (rectangle (rect 16 16 232 176)) + (rectangle (rect 16 16 240 176)) ) ) (symbol @@ -1862,17 +1892,59 @@ https://fpgasoftware.intel.com/eula. (line (pt 0 0)(pt 0 0)) ) ) +(symbol + (rect 968 24 1080 112) + (text "BUSMUX" (rect 28 0 91 16)(font "Arial" (font_size 10))) + (text "indirmux" (rect 3 77 43 94)(font "Intel Clear" )) + (port + (pt 0 64) + (input) + (text "datab[WIDTH-1..0]" (rect 6 51 108 65)(font "Arial" (font_size 8))) + (text "datab[]" (rect 6 51 44 65)(font "Arial" (font_size 8))) + (line (pt 0 64)(pt 44 64)(line_width 3)) + ) + (port + (pt 56 88) + (input) + (text "sel" (rect 59 70 75 84)(font "Arial" (font_size 8))) + (text "sel" (rect 59 70 75 84)(font "Arial" (font_size 8))) + (line (pt 56 88)(pt 56 72)) + ) + (port + (pt 0 32) + (input) + (text "dataa[WIDTH-1..0]" (rect 6 19 108 33)(font "Arial" (font_size 8))) + (text "dataa[]" (rect 6 19 44 33)(font "Arial" (font_size 8))) + (line (pt 0 32)(pt 44 32)(line_width 3)) + ) + (port + (pt 112 48) + (output) + (text "result[WIDTH-1..0]" (rect 75 35 177 49)(font "Arial" (font_size 8))) + (text "result[]" (rect 75 35 113 49)(font "Arial" (font_size 8))) + (line (pt 68 48)(pt 112 48)(line_width 3)) + ) + (parameter + "WIDTH" + "11" + "Width of I/O, any integer > 0" + " 1" " 2" " 3" " 4" " 5" " 6" " 7" " 8" " 9" "10" "11" "12" "13" "14" "15" "16" "20" "24" "28" "32" "40" "48" "56" "64" + ) + (drawing + (text "0" (rect 52 31 56 41)(font "Arial" (font_size 6))) + (text "1" (rect 52 55 56 65)(font "Arial" (font_size 6))) + (line (pt 68 64)(pt 68 32)) + (line (pt 44 80)(pt 44 16)) + (line (pt 44 16)(pt 68 32)) + (line (pt 44 80)(pt 68 64)) + ) + (annotation_block (parameter)(rect 1080 24 1112 48)) +) (connector (pt 856 192) (pt 936 192) (bus) ) -(connector - (text "instr[10..0]" (rect 882 208 931 225)(font "Intel Clear" )) - (pt 936 224) - (pt 872 224) - (bus) -) (connector (text "RAMd_en" (rect 890 272 937 289)(font "Intel Clear" )) (pt 936 288) @@ -2541,22 +2613,6 @@ https://fpgasoftware.intel.com/eula. (pt 560 120) (pt 600 120) ) -(connector - (pt 872 24) - (pt 872 224) - (bus) -) -(connector - (text "instr[15..0]" (rect 826 8 875 25)(font "Intel Clear" )) - (pt 816 24) - (pt 872 24) - (bus) -) -(connector - (pt 872 -104) - (pt 872 24) - (bus) -) (connector (text "instr[15..0]" (rect 882 -120 931 -103)(font "Intel Clear" )) (pt 872 -104) @@ -2727,11 +2783,71 @@ https://fpgasoftware.intel.com/eula. (pt 1440 360) (bus) ) +(connector + (pt 1256 336) + (pt 1248 336) + (bus) +) +(connector + (text "mul1[15..0]" (rect 1448 360 1502 377)(font "Intel Clear" )) + (pt 1512 376) + (pt 1440 376) + (bus) +) +(connector + (text "mul2[15..0]" (rect 1448 376 1502 393)(font "Intel Clear" )) + (pt 1512 392) + (pt 1440 392) + (bus) +) (connector (pt 856 592) (pt 856 400) (bus) ) +(connector + (text "ALU_en" (rect 882 336 919 353)(font "Intel Clear" )) + (pt 872 352) + (pt 928 352) +) +(connector + (pt 856 368) + (pt 928 368) + (bus) +) +(connector + (text "Rs2[15..0]" (rect 816 368 863 385)(font "Intel Clear" )) + (pt 816 384) + (pt 928 384) + (bus) +) +(connector + (pt 856 400) + (pt 928 400) + (bus) +) +(connector + (text "instr[14..9]" (rect 882 400 931 417)(font "Intel Clear" )) + (pt 872 416) + (pt 928 416) + (bus) +) +(connector + (text "EXEC2" (rect 882 416 913 433)(font "Intel Clear" )) + (pt 872 432) + (pt 928 432) +) +(connector + (text "stack_out[15..0]" (rect 872 432 947 449)(font "Intel Clear" )) + (pt 872 448) + (pt 928 448) + (bus) +) +(connector + (pt 1248 336) + (pt 1248 384) + (bus) +) (connector (pt 856 176) (pt 856 192) @@ -2743,74 +2859,11 @@ https://fpgasoftware.intel.com/eula. (bus) ) (connector - (text "ALU_en" (rect 890 336 927 353)(font "Intel Clear" )) - (pt 880 352) - (pt 936 352) -) -(connector - (pt 856 368) - (pt 936 368) - (bus) -) -(connector - (text "Rs2[15..0]" (rect 824 368 871 385)(font "Intel Clear" )) - (pt 816 384) - (pt 936 384) - (bus) -) -(connector - (pt 856 400) - (pt 936 400) - (bus) -) -(connector - (text "instr[14..9]" (rect 890 400 939 417)(font "Intel Clear" )) - (pt 880 416) - (pt 936 416) - (bus) -) -(connector - (text "EXEC2" (rect 890 416 921 433)(font "Intel Clear" )) - (pt 880 432) - (pt 936 432) -) -(connector - (text "stack_out[15..0]" (rect 880 432 955 449)(font "Intel Clear" )) - (pt 880 448) - (pt 936 448) - (bus) -) -(connector - (text "CLK" (rect 890 448 910 465)(font "Intel Clear" )) - (pt 880 464) - (pt 936 464) -) -(connector - (pt 1256 336) - (pt 1248 336) - (bus) -) -(connector - (pt 1248 336) - (pt 1248 384) - (bus) -) -(connector - (text "ALU_out[15..0]" (rect 1186 368 1256 385)(font "Intel Clear" )) + (text "ALU_out[15..0]" (rect 1178 368 1248 385)(font "Intel Clear" )) (pt 1184 384) (pt 1248 384) (bus) ) -(connector - (text "COND" (rect 1194 384 1223 401)(font "Intel Clear" )) - (pt 1184 400) - (pt 1232 400) -) -(connector - (text "CARRY" (rect 1186 400 1221 417)(font "Intel Clear" )) - (pt 1184 416) - (pt 1232 416) -) (connector (text "jumpflags[7..0]" (rect 1184 416 1254 433)(font "Intel Clear" )) (pt 1184 432) @@ -2818,9 +2871,19 @@ https://fpgasoftware.intel.com/eula. (bus) ) (connector - (text "MUL_res[31..0]" (rect 1184 432 1255 449)(font "Intel Clear" )) - (pt 1184 448) - (pt 1232 448) + (text "CARRY" (rect 1186 400 1221 417)(font "Intel Clear" )) + (pt 1184 416) + (pt 1232 416) +) +(connector + (text "COND" (rect 1194 384 1223 401)(font "Intel Clear" )) + (pt 1184 400) + (pt 1232 400) +) +(connector + (text "mul2[15..0]" (rect 1192 352 1246 369)(font "Intel Clear" )) + (pt 1184 368) + (pt 1232 368) (bus) ) (connector @@ -2830,21 +2893,89 @@ https://fpgasoftware.intel.com/eula. (bus) ) (connector - (text "mul2[15..0]" (rect 1192 352 1246 369)(font "Intel Clear" )) - (pt 1184 368) - (pt 1232 368) + (text "MUL_res[31..0]" (rect 1184 448 1255 465)(font "Intel Clear" )) + (pt 1184 464) + (pt 1232 464) (bus) ) (connector - (text "mul1[15..0]" (rect 1448 360 1502 377)(font "Intel Clear" )) - (pt 1512 376) - (pt 1440 376) + (text "CLK" (rect 882 464 902 481)(font "Intel Clear" )) + (pt 928 480) + (pt 872 480) +) +(connector + (text "RAMd_out[15..0]" (rect 870 448 950 465)(font "Intel Clear" )) + (pt 928 464) + (pt 872 464) (bus) ) (connector - (text "mul2[15..0]" (rect 1448 376 1502 393)(font "Intel Clear" )) - (pt 1512 392) - (pt 1440 392) + (pt 872 -104) + (pt 872 24) + (bus) +) +(connector + (pt 872 24) + (pt 872 56) + (bus) +) +(connector + (text "instr[10..0]" (rect 904 40 953 57)(font "Intel Clear" )) + (pt 872 56) + (pt 968 56) + (bus) +) +(connector + (text "instr[15..0]" (rect 827 8 876 25)(font "Intel Clear" )) + (pt 872 24) + (pt 816 24) + (bus) +) +(connector + (text "memaddr[10..0]" (rect 880 72 955 89)(font "Intel Clear" )) + (pt 968 88) + (pt 872 88) + (bus) +) +(connector + (text "memaddr[10..0]" (rect 1192 432 1267 449)(font "Intel Clear" )) + (pt 1184 448) + (pt 1232 448) + (bus) +) +(connector + (pt 1080 72) + (pt 1088 72) + (bus) +) +(connector + (pt 872 224) + (pt 936 224) + (bus) +) +(connector + (pt 1088 72) + (pt 1088 152) + (bus) +) +(connector + (pt 1088 152) + (pt 872 152) + (bus) +) +(connector + (pt 872 224) + (pt 872 152) + (bus) +) +(connector + (pt 1024 112) + (pt 1024 136) +) +(connector + (text "memaddr[10..0]" (rect 1448 392 1523 409)(font "Intel Clear" )) + (pt 1512 408) + (pt 1440 408) (bus) ) (junction (pt 856 192)) @@ -2872,5 +3003,5 @@ https://fpgasoftware.intel.com/eula. (junction (pt 560 496)) (junction (pt 576 512)) (junction (pt 1416 496)) -(junction (pt 872 24)) (junction (pt 536 192)) +(junction (pt 872 24)) diff --git a/alu.bsf b/alu.bsf index 664bd2a..169c1a7 100644 --- a/alu.bsf +++ b/alu.bsf @@ -21,9 +21,9 @@ https://fpgasoftware.intel.com/eula. */ (header "symbol" (version "1.1")) (symbol - (rect 16 16 232 192) + (rect 16 16 248 224) (text "alu" (rect 5 0 15 12)(font "Arial" )) - (text "inst" (rect 8 160 20 172)(font "Arial" )) + (text "inst" (rect 8 192 20 204)(font "Arial" )) (port (pt 0 32) (input) @@ -81,48 +81,62 @@ https://fpgasoftware.intel.com/eula. (line (pt 0 144)(pt 16 144)(line_width 3)) ) (port - (pt 216 32) + (pt 0 160) + (input) + (text "memdatain[15..0]" (rect 0 0 67 12)(font "Arial" )) + (text "memdatain[15..0]" (rect 21 155 88 167)(font "Arial" )) + (line (pt 0 160)(pt 16 160)(line_width 3)) + ) + (port + (pt 232 32) (output) (text "mul1[15..0]" (rect 0 0 41 12)(font "Arial" )) - (text "mul1[15..0]" (rect 154 27 195 39)(font "Arial" )) - (line (pt 216 32)(pt 200 32)(line_width 3)) + (text "mul1[15..0]" (rect 170 27 211 39)(font "Arial" )) + (line (pt 232 32)(pt 216 32)(line_width 3)) ) (port - (pt 216 48) + (pt 232 48) (output) (text "mul2[15..0]" (rect 0 0 42 12)(font "Arial" )) - (text "mul2[15..0]" (rect 153 43 195 55)(font "Arial" )) - (line (pt 216 48)(pt 200 48)(line_width 3)) + (text "mul2[15..0]" (rect 169 43 211 55)(font "Arial" )) + (line (pt 232 48)(pt 216 48)(line_width 3)) ) (port - (pt 216 64) + (pt 232 64) (output) (text "Rout[15..0]" (rect 0 0 43 12)(font "Arial" )) - (text "Rout[15..0]" (rect 152 59 195 71)(font "Arial" )) - (line (pt 216 64)(pt 200 64)(line_width 3)) + (text "Rout[15..0]" (rect 168 59 211 71)(font "Arial" )) + (line (pt 232 64)(pt 216 64)(line_width 3)) ) (port - (pt 216 80) + (pt 232 80) (output) (text "jump" (rect 0 0 18 12)(font "Arial" )) - (text "jump" (rect 177 75 195 87)(font "Arial" )) - (line (pt 216 80)(pt 200 80)(line_width 1)) + (text "jump" (rect 193 75 211 87)(font "Arial" )) + (line (pt 232 80)(pt 216 80)(line_width 1)) ) (port - (pt 216 96) + (pt 232 96) (output) (text "carry" (rect 0 0 22 12)(font "Arial" )) - (text "carry" (rect 173 91 195 103)(font "Arial" )) - (line (pt 216 96)(pt 200 96)(line_width 1)) + (text "carry" (rect 189 91 211 103)(font "Arial" )) + (line (pt 232 96)(pt 216 96)(line_width 1)) ) (port - (pt 216 112) + (pt 232 112) (output) (text "jumpflags[7..0]" (rect 0 0 57 12)(font "Arial" )) - (text "jumpflags[7..0]" (rect 138 107 195 119)(font "Arial" )) - (line (pt 216 112)(pt 200 112)(line_width 3)) + (text "jumpflags[7..0]" (rect 154 107 211 119)(font "Arial" )) + (line (pt 232 112)(pt 216 112)(line_width 3)) + ) + (port + (pt 232 128) + (output) + (text "memaddr[10..0]" (rect 0 0 62 12)(font "Arial" )) + (text "memaddr[10..0]" (rect 149 123 211 135)(font "Arial" )) + (line (pt 232 128)(pt 216 128)(line_width 3)) ) (drawing - (rectangle (rect 16 16 200 160)(line_width 1)) + (rectangle (rect 16 16 216 192)(line_width 1)) ) ) diff --git a/alu.v b/alu.v index 609f090..85c49f1 100644 --- a/alu.v +++ b/alu.v @@ -1,13 +1,14 @@ -module alu (enable, Rs1, Rs2, Rd, opcode, mulresult, exec2, stackout, mul1, mul2, Rout, jump, carry, jumpflags); +module alu (enable, Rs1, Rs2, Rd, opcode, mulresult, exec2, stackout, memdatain, mul1, mul2, Rout, jump, carry, jumpflags, memaddr); input enable; // active LOW, disables the ALU during load/store operations so that undefined behaviour does not occur -input signed [15:0] Rd; // input destination register input signed [15:0] Rs1; // input source register 1 input signed [15:0] Rs2; // input source register 2 +input signed [15:0] Rd; // input destination register input [5:0] opcode; // opcode is fed in from instruction using wires outside ALU input signed [31:0] mulresult; // 32-bit result from multiplier input exec2; // Input from state machine to indicate when to take in result from multiplication input [15:0] stackout; // input from stack to be fed back to registers +input signed [15:0] memdatain; // input data from RAMd output reg signed [15:0] mul1; // first number to be multiplied output reg signed [15:0] mul2; // second number to be multiplied @@ -15,6 +16,7 @@ output signed [15:0] Rout; // value to be saved to destination register output jump; // tells decoder whether Jump condition is true output reg carry; // Internal carry register that is updated during appropriate opcodes, also provides output for debugging output [7:0] jumpflags; +output reg [10:0] memaddr; // address to load data from / store data to RAMd reg signed [16:0] alusum; // extra bit to hold carry from operations other than Multiply assign Rout = alusum [15:0]; @@ -164,8 +166,17 @@ always @(opcode, mulresult) 6'b101000: alusum = {1'b0, Rs1}; // PSH Push value to stack (Stack = Rs1) 6'b101001: alusum = {1'b0, stackout}; // POP Pop value from stack (Rd = Stack) - 6'b101010: ; - 6'b101011: ; + 6'b101010: begin // LDR Indirect Load (Rd = Mem[Rs1]) + if(!exec2) begin + memaddr = Rs1[10:0]; + end + else begin + alusum = {1'b0, memdatain}; + end + end + 6'b101011: begin // STR Indirect Store (Mem[Rd] = Rs1) + memaddr = Rd[10:0]; + end 6'b111110: ; // NOP No Operation (Do Nothing for a cycle) 6'b111111: alusum = {1'b0, 16'h0000}; // STP Stop (Program Ends)