diff --git a/ALU_top.bdf b/ALU_top.bdf
index 0a5ed61..785f265 100644
--- a/ALU_top.bdf
+++ b/ALU_top.bdf
@@ -118,7 +118,7 @@ https://fpgasoftware.intel.com/eula.
 )
 (pin
 	(input)
-	(rect 344 480 520 496)
+	(rect 352 448 528 464)
 	(text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
 	(text "CLK" (rect 9 0 30 12)(font "Arial" ))
 	(pt 176 8)
@@ -148,25 +148,9 @@ https://fpgasoftware.intel.com/eula.
 	)
 	(text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
 )
-(pin
-	(input)
-	(rect 344 368 528 384)
-	(text "INPUT" (rect 141 0 169 10)(font "Arial" (font_size 6)))
-	(text "memdatain[15..0]" (rect 5 0 89 17)(font "Intel Clear" ))
-	(pt 184 8)
-	(drawing
-		(line (pt 100 12)(pt 125 12))
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-		(line (pt 129 8)(pt 184 8))
-		(line (pt 100 12)(pt 100 4))
-		(line (pt 125 4)(pt 129 8))
-		(line (pt 125 12)(pt 129 8))
-	)
-	(text "VCC" (rect 144 7 164 17)(font "Arial" (font_size 6)))
-)
 (pin
 	(output)
-	(rect 800 272 976 288)
+	(rect 792 272 968 288)
 	(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
 	(text "Rout[15..0]" (rect 90 0 145 12)(font "Arial" ))
 	(pt 0 8)
@@ -182,7 +166,7 @@ https://fpgasoftware.intel.com/eula.
 )
 (pin
 	(output)
-	(rect 800 288 976 304)
+	(rect 792 288 968 304)
 	(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
 	(text "COND" (rect 90 0 123 12)(font "Arial" ))
 	(pt 0 8)
@@ -198,55 +182,7 @@ https://fpgasoftware.intel.com/eula.
 )
 (pin
 	(output)
-	(rect 800 304 976 320)
-	(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
-	(text "CARRY" (rect 90 0 130 12)(font "Arial" ))
-	(pt 0 8)
-	(drawing
-		(line (pt 0 8)(pt 52 8))
-		(line (pt 52 4)(pt 78 4))
-		(line (pt 52 12)(pt 78 12))
-		(line (pt 52 12)(pt 52 4))
-		(line (pt 78 4)(pt 82 8))
-		(line (pt 82 8)(pt 78 12))
-		(line (pt 78 12)(pt 82 8))
-	)
-)
-(pin
-	(output)
-	(rect 768 480 944 496)
-	(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
-	(text "MUL_res[31..0]" (rect 90 0 165 12)(font "Arial" ))
-	(pt 0 8)
-	(drawing
-		(line (pt 0 8)(pt 52 8))
-		(line (pt 52 4)(pt 78 4))
-		(line (pt 52 12)(pt 78 12))
-		(line (pt 52 12)(pt 52 4))
-		(line (pt 78 4)(pt 82 8))
-		(line (pt 82 8)(pt 78 12))
-		(line (pt 78 12)(pt 82 8))
-	)
-)
-(pin
-	(output)
-	(rect 800 320 976 336)
-	(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
-	(text "jumpflags[7..0]" (rect 90 0 164 12)(font "Arial" ))
-	(pt 0 8)
-	(drawing
-		(line (pt 0 8)(pt 52 8))
-		(line (pt 52 4)(pt 78 4))
-		(line (pt 52 12)(pt 78 12))
-		(line (pt 52 12)(pt 52 4))
-		(line (pt 78 4)(pt 82 8))
-		(line (pt 82 8)(pt 78 12))
-		(line (pt 78 12)(pt 82 8))
-	)
-)
-(pin
-	(output)
-	(rect 800 240 976 256)
+	(rect 792 240 968 256)
 	(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
 	(text "mul1[15..0]" (rect 90 0 145 12)(font "Arial" ))
 	(pt 0 8)
@@ -262,7 +198,7 @@ https://fpgasoftware.intel.com/eula.
 )
 (pin
 	(output)
-	(rect 800 256 976 272)
+	(rect 792 256 968 272)
 	(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
 	(text "mul2[15..0]" (rect 90 0 145 12)(font "Arial" ))
 	(pt 0 8)
@@ -278,9 +214,9 @@ https://fpgasoftware.intel.com/eula.
 )
 (pin
 	(output)
-	(rect 800 336 976 352)
+	(rect 792 304 968 320)
 	(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
-	(text "memaddr[10..0]" (rect 90 0 165 17)(font "Intel Clear" ))
+	(text "memaddr[10..0]" (rect 90 0 167 12)(font "Arial" ))
 	(pt 0 8)
 	(drawing
 		(line (pt 0 8)(pt 52 8))
@@ -293,7 +229,7 @@ https://fpgasoftware.intel.com/eula.
 	)
 )
 (symbol
-	(rect 544 456 744 552)
+	(rect 552 424 752 520)
 	(text "mul16" (rect 5 0 43 19)(font "Intel Clear" (font_size 8)))
 	(text "MULTIPLIER" (rect 8 75 67 92)(font "Intel Clear" ))
 	(port
@@ -329,9 +265,9 @@ https://fpgasoftware.intel.com/eula.
 	)
 )
 (symbol
-	(rect 544 216 776 424)
+	(rect 544 216 768 392)
 	(text "alu" (rect 5 0 19 12)(font "Arial" ))
-	(text "ALU_in" (rect 8 192 43 204)(font "Arial" ))
+	(text "ALU_in" (rect 8 160 43 172)(font "Arial" ))
 	(port
 		(pt 0 32)
 		(input)
@@ -389,63 +325,42 @@ https://fpgasoftware.intel.com/eula.
 		(line (pt 0 144)(pt 16 144)(line_width 3))
 	)
 	(port
-		(pt 0 160)
-		(input)
-		(text "memdatain[15..0]" (rect 0 0 86 12)(font "Arial" ))
-		(text "memdatain[15..0]" (rect 21 155 107 167)(font "Arial" ))
-		(line (pt 0 160)(pt 16 160)(line_width 3))
-	)
-	(port
-		(pt 232 32)
+		(pt 224 32)
 		(output)
 		(text "mul1[15..0]" (rect 0 0 55 12)(font "Arial" ))
-		(text "mul1[15..0]" (rect 165 27 211 39)(font "Arial" ))
-		(line (pt 232 32)(pt 216 32)(line_width 3))
+		(text "mul1[15..0]" (rect 157 27 203 39)(font "Arial" ))
+		(line (pt 224 32)(pt 208 32)(line_width 3))
 	)
 	(port
-		(pt 232 48)
+		(pt 224 48)
 		(output)
 		(text "mul2[15..0]" (rect 0 0 55 12)(font "Arial" ))
-		(text "mul2[15..0]" (rect 165 43 211 55)(font "Arial" ))
-		(line (pt 232 48)(pt 216 48)(line_width 3))
+		(text "mul2[15..0]" (rect 157 43 203 55)(font "Arial" ))
+		(line (pt 224 48)(pt 208 48)(line_width 3))
 	)
 	(port
-		(pt 232 64)
+		(pt 224 64)
 		(output)
 		(text "Rout[15..0]" (rect 0 0 55 12)(font "Arial" ))
-		(text "Rout[15..0]" (rect 165 59 211 71)(font "Arial" ))
-		(line (pt 232 64)(pt 216 64)(line_width 3))
+		(text "Rout[15..0]" (rect 157 59 203 71)(font "Arial" ))
+		(line (pt 224 64)(pt 208 64)(line_width 3))
 	)
 	(port
-		(pt 232 80)
+		(pt 224 80)
 		(output)
 		(text "jump" (rect 0 0 23 12)(font "Arial" ))
-		(text "jump" (rect 192 75 211 87)(font "Arial" ))
-		(line (pt 232 80)(pt 216 80))
+		(text "jump" (rect 184 75 203 87)(font "Arial" ))
+		(line (pt 224 80)(pt 208 80))
 	)
 	(port
-		(pt 232 96)
-		(output)
-		(text "carry" (rect 0 0 25 12)(font "Arial" ))
-		(text "carry" (rect 190 91 211 103)(font "Arial" ))
-		(line (pt 232 96)(pt 216 96))
-	)
-	(port
-		(pt 232 112)
-		(output)
-		(text "jumpflags[7..0]" (rect 0 0 74 12)(font "Arial" ))
-		(text "jumpflags[7..0]" (rect 149 107 211 119)(font "Arial" ))
-		(line (pt 232 112)(pt 216 112)(line_width 3))
-	)
-	(port
-		(pt 232 128)
+		(pt 224 96)
 		(output)
 		(text "memaddr[10..0]" (rect 0 0 77 12)(font "Arial" ))
-		(text "memaddr[10..0]" (rect 146 123 211 135)(font "Arial" ))
-		(line (pt 232 128)(pt 216 128)(line_width 3))
+		(text "memaddr[10..0]" (rect 138 91 203 103)(font "Arial" ))
+		(line (pt 224 96)(pt 208 96)(line_width 3))
 	)
 	(drawing
-		(rectangle (rect 16 16 216 192))
+		(rectangle (rect 16 16 208 160))
 	)
 )
 (connector
@@ -482,47 +397,17 @@ https://fpgasoftware.intel.com/eula.
 	(bus)
 )
 (connector
-	(pt 752 432)
-	(pt 752 488)
+	(pt 768 280)
+	(pt 792 280)
 	(bus)
 )
 (connector
-	(pt 544 504)
-	(pt 536 504)
-	(bus)
+	(pt 768 296)
+	(pt 792 296)
 )
 (connector
-	(pt 544 520)
-	(pt 528 520)
-	(bus)
-)
-(connector
-	(pt 528 440)
-	(pt 528 520)
-	(bus)
-)
-(connector
-	(pt 536 448)
-	(pt 536 504)
-	(bus)
-)
-(connector
-	(pt 752 432)
-	(pt 536 432)
-	(bus)
-)
-(connector
-	(pt 544 488)
-	(pt 520 488)
-)
-(connector
-	(pt 528 440)
-	(pt 784 440)
-	(bus)
-)
-(connector
-	(pt 536 328)
-	(pt 536 432)
+	(pt 768 312)
+	(pt 792 312)
 	(bus)
 )
 (connector
@@ -531,78 +416,88 @@ https://fpgasoftware.intel.com/eula.
 	(bus)
 )
 (connector
-	(pt 744 488)
-	(pt 752 488)
+	(pt 776 264)
+	(pt 776 408)
 	(bus)
 )
 (connector
-	(pt 752 488)
-	(pt 768 488)
+	(pt 784 248)
+	(pt 784 416)
 	(bus)
 )
 (connector
-	(pt 784 264)
-	(pt 784 440)
+	(pt 536 328)
+	(pt 536 400)
 	(bus)
 )
 (connector
-	(pt 536 448)
-	(pt 792 448)
-	(bus)
-)
-(connector
-	(pt 792 248)
-	(pt 792 448)
-	(bus)
-)
-(connector
-	(pt 776 280)
-	(pt 800 280)
-	(bus)
-)
-(connector
-	(pt 776 296)
-	(pt 800 296)
-)
-(connector
-	(pt 776 312)
-	(pt 800 312)
-)
-(connector
-	(pt 776 328)
-	(pt 800 328)
-	(bus)
-)
-(connector
-	(pt 776 248)
-	(pt 792 248)
-	(bus)
-)
-(connector
-	(pt 792 248)
-	(pt 800 248)
+	(pt 768 264)
+	(pt 776 264)
 	(bus)
 )
 (connector
 	(pt 776 264)
-	(pt 784 264)
+	(pt 792 264)
 	(bus)
 )
 (connector
-	(pt 784 264)
-	(pt 800 264)
+	(pt 768 248)
+	(pt 784 248)
 	(bus)
 )
 (connector
-	(pt 776 344)
-	(pt 800 344)
+	(pt 784 248)
+	(pt 792 248)
 	(bus)
 )
 (connector
-	(pt 544 376)
-	(pt 528 376)
+	(pt 536 400)
+	(pt 760 400)
 	(bus)
 )
-(junction (pt 752 488))
-(junction (pt 784 264))
-(junction (pt 792 248))
+(connector
+	(pt 760 456)
+	(pt 752 456)
+	(bus)
+)
+(connector
+	(pt 760 400)
+	(pt 760 456)
+	(bus)
+)
+(connector
+	(pt 784 416)
+	(pt 544 416)
+	(bus)
+)
+(connector
+	(pt 544 416)
+	(pt 544 472)
+	(bus)
+)
+(connector
+	(pt 552 472)
+	(pt 544 472)
+	(bus)
+)
+(connector
+	(pt 776 408)
+	(pt 536 408)
+	(bus)
+)
+(connector
+	(pt 536 408)
+	(pt 536 488)
+	(bus)
+)
+(connector
+	(pt 552 488)
+	(pt 536 488)
+	(bus)
+)
+(connector
+	(pt 552 456)
+	(pt 528 456)
+)
+(junction (pt 776 264))
+(junction (pt 784 248))
diff --git a/ALU_top.bsf b/ALU_top.bsf
index 63e7bf5..dac5b6c 100644
--- a/ALU_top.bsf
+++ b/ALU_top.bsf
@@ -76,16 +76,9 @@ https://fpgasoftware.intel.com/eula.
 	(port
 		(pt 0 144)
 		(input)
-		(text "memdatain[15..0]" (rect 0 0 107 19)(font "Intel Clear" (font_size 8)))
-		(text "memdatain[15..0]" (rect 21 139 128 158)(font "Intel Clear" (font_size 8)))
-		(line (pt 0 144)(pt 16 144)(line_width 3))
-	)
-	(port
-		(pt 0 160)
-		(input)
 		(text "CLK" (rect 0 0 23 19)(font "Intel Clear" (font_size 8)))
-		(text "CLK" (rect 21 155 44 174)(font "Intel Clear" (font_size 8)))
-		(line (pt 0 160)(pt 16 160))
+		(text "CLK" (rect 21 139 44 158)(font "Intel Clear" (font_size 8)))
+		(line (pt 0 144)(pt 16 144))
 	)
 	(port
 		(pt 256 32)
@@ -118,30 +111,9 @@ https://fpgasoftware.intel.com/eula.
 	(port
 		(pt 256 96)
 		(output)
-		(text "CARRY" (rect 0 0 41 19)(font "Intel Clear" (font_size 8)))
-		(text "CARRY" (rect 194 91 235 110)(font "Intel Clear" (font_size 8)))
-		(line (pt 256 96)(pt 240 96))
-	)
-	(port
-		(pt 256 112)
-		(output)
-		(text "jumpflags[7..0]" (rect 0 0 89 19)(font "Intel Clear" (font_size 8)))
-		(text "jumpflags[7..0]" (rect 146 107 235 126)(font "Intel Clear" (font_size 8)))
-		(line (pt 256 112)(pt 240 112)(line_width 3))
-	)
-	(port
-		(pt 256 128)
-		(output)
 		(text "memaddr[10..0]" (rect 0 0 97 19)(font "Intel Clear" (font_size 8)))
-		(text "memaddr[10..0]" (rect 138 123 235 142)(font "Intel Clear" (font_size 8)))
-		(line (pt 256 128)(pt 240 128)(line_width 3))
-	)
-	(port
-		(pt 256 144)
-		(output)
-		(text "MUL_res[31..0]" (rect 0 0 90 19)(font "Intel Clear" (font_size 8)))
-		(text "MUL_res[31..0]" (rect 145 139 235 158)(font "Intel Clear" (font_size 8)))
-		(line (pt 256 144)(pt 240 144)(line_width 3))
+		(text "memaddr[10..0]" (rect 138 91 235 110)(font "Intel Clear" (font_size 8)))
+		(line (pt 256 96)(pt 240 96)(line_width 3))
 	)
 	(drawing
 		(rectangle (rect 16 16 240 176))
diff --git a/CPUProject.bdf b/CPUProject.bdf
index e24c8aa..9cdc317 100644
--- a/CPUProject.bdf
+++ b/CPUProject.bdf
@@ -57,71 +57,7 @@ https://fpgasoftware.intel.com/eula.
 )
 (pin
 	(output)
-	(rect 1232 528 1408 544)
-	(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
-	(text "ALU_carry" (rect 90 0 143 12)(font "Arial" ))
-	(pt 0 8)
-	(drawing
-		(line (pt 0 8)(pt 52 8))
-		(line (pt 52 4)(pt 78 4))
-		(line (pt 52 12)(pt 78 12))
-		(line (pt 52 12)(pt 52 4))
-		(line (pt 78 4)(pt 82 8))
-		(line (pt 82 8)(pt 78 12))
-		(line (pt 78 12)(pt 82 8))
-	)
-)
-(pin
-	(output)
-	(rect 1232 560 1408 576)
-	(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
-	(text "Rs1[15..0]" (rect 90 0 141 12)(font "Arial" ))
-	(pt 0 8)
-	(drawing
-		(line (pt 0 8)(pt 52 8))
-		(line (pt 52 4)(pt 78 4))
-		(line (pt 52 12)(pt 78 12))
-		(line (pt 52 12)(pt 52 4))
-		(line (pt 78 4)(pt 82 8))
-		(line (pt 82 8)(pt 78 12))
-		(line (pt 78 12)(pt 82 8))
-	)
-)
-(pin
-	(output)
-	(rect 1232 576 1408 592)
-	(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
-	(text "Rs2[15..0]" (rect 90 0 141 12)(font "Arial" ))
-	(pt 0 8)
-	(drawing
-		(line (pt 0 8)(pt 52 8))
-		(line (pt 52 4)(pt 78 4))
-		(line (pt 52 12)(pt 78 12))
-		(line (pt 52 12)(pt 52 4))
-		(line (pt 78 4)(pt 82 8))
-		(line (pt 82 8)(pt 78 12))
-		(line (pt 78 12)(pt 82 8))
-	)
-)
-(pin
-	(output)
-	(rect 1232 544 1408 560)
-	(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
-	(text "Rd[15..0]" (rect 90 0 136 12)(font "Arial" ))
-	(pt 0 8)
-	(drawing
-		(line (pt 0 8)(pt 52 8))
-		(line (pt 52 4)(pt 78 4))
-		(line (pt 52 12)(pt 78 12))
-		(line (pt 52 12)(pt 52 4))
-		(line (pt 78 4)(pt 82 8))
-		(line (pt 82 8)(pt 78 12))
-		(line (pt 78 12)(pt 82 8))
-	)
-)
-(pin
-	(output)
-	(rect 1232 592 1408 608)
+	(rect 1192 624 1368 640)
 	(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
 	(text "instr[15..0]" (rect 90 0 143 12)(font "Arial" ))
 	(pt 0 8)
@@ -137,71 +73,7 @@ https://fpgasoftware.intel.com/eula.
 )
 (pin
 	(output)
-	(rect 1232 608 1408 624)
-	(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
-	(text "FETCH" (rect 90 0 126 12)(font "Arial" ))
-	(pt 0 8)
-	(drawing
-		(line (pt 0 8)(pt 52 8))
-		(line (pt 52 4)(pt 78 4))
-		(line (pt 52 12)(pt 78 12))
-		(line (pt 52 12)(pt 52 4))
-		(line (pt 78 4)(pt 82 8))
-		(line (pt 82 8)(pt 78 12))
-		(line (pt 78 12)(pt 82 8))
-	)
-)
-(pin
-	(output)
-	(rect 1232 624 1408 640)
-	(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
-	(text "EXEC1" (rect 90 0 124 12)(font "Arial" ))
-	(pt 0 8)
-	(drawing
-		(line (pt 0 8)(pt 52 8))
-		(line (pt 52 4)(pt 78 4))
-		(line (pt 52 12)(pt 78 12))
-		(line (pt 52 12)(pt 52 4))
-		(line (pt 78 4)(pt 82 8))
-		(line (pt 82 8)(pt 78 12))
-		(line (pt 78 12)(pt 82 8))
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-)
-(pin
-	(output)
-	(rect 1232 640 1408 656)
-	(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
-	(text "EXEC2" (rect 90 0 124 12)(font "Arial" ))
-	(pt 0 8)
-	(drawing
-		(line (pt 0 8)(pt 52 8))
-		(line (pt 52 4)(pt 78 4))
-		(line (pt 52 12)(pt 78 12))
-		(line (pt 52 12)(pt 52 4))
-		(line (pt 78 4)(pt 82 8))
-		(line (pt 82 8)(pt 78 12))
-		(line (pt 78 12)(pt 82 8))
-	)
-)
-(pin
-	(output)
-	(rect 1232 512 1408 528)
-	(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
-	(text "reg_in[15..0]" (rect 90 0 151 12)(font "Arial" ))
-	(pt 0 8)
-	(drawing
-		(line (pt 0 8)(pt 52 8))
-		(line (pt 52 4)(pt 78 4))
-		(line (pt 52 12)(pt 78 12))
-		(line (pt 52 12)(pt 52 4))
-		(line (pt 78 4)(pt 82 8))
-		(line (pt 82 8)(pt 78 12))
-		(line (pt 78 12)(pt 82 8))
-	)
-)
-(pin
-	(output)
-	(rect 1232 656 1408 672)
+	(rect 1192 640 1368 656)
 	(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
 	(text "PC[15..0]" (rect 90 0 137 12)(font "Arial" ))
 	(pt 0 8)
@@ -217,7 +89,7 @@ https://fpgasoftware.intel.com/eula.
 )
 (pin
 	(output)
-	(rect 1232 672 1408 688)
+	(rect 1192 656 1368 672)
 	(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
 	(text "R1[15..0]" (rect 90 0 136 12)(font "Arial" ))
 	(pt 0 8)
@@ -233,7 +105,7 @@ https://fpgasoftware.intel.com/eula.
 )
 (pin
 	(output)
-	(rect 1232 688 1408 704)
+	(rect 1192 672 1368 688)
 	(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
 	(text "R2[15..0]" (rect 90 0 136 12)(font "Arial" ))
 	(pt 0 8)
@@ -249,7 +121,7 @@ https://fpgasoftware.intel.com/eula.
 )
 (pin
 	(output)
-	(rect 1232 704 1408 720)
+	(rect 1192 688 1368 704)
 	(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
 	(text "R3[15..0]" (rect 90 0 136 12)(font "Arial" ))
 	(pt 0 8)
@@ -265,7 +137,7 @@ https://fpgasoftware.intel.com/eula.
 )
 (pin
 	(output)
-	(rect 1232 720 1408 736)
+	(rect 1192 704 1368 720)
 	(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
 	(text "R4[15..0]" (rect 90 0 136 12)(font "Arial" ))
 	(pt 0 8)
@@ -281,7 +153,7 @@ https://fpgasoftware.intel.com/eula.
 )
 (pin
 	(output)
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 		(pt 0 144)
 		(input)
-		(text "memdatain[15..0]" (rect 0 0 107 19)(font "Intel Clear" (font_size 8)))
-		(text "memdatain[15..0]" (rect 21 139 128 158)(font "Intel Clear" (font_size 8)))
-		(line (pt 0 144)(pt 16 144)(line_width 3))
-	)
-	(port
-		(pt 0 160)
-		(input)
 		(text "CLK" (rect 0 0 23 19)(font "Intel Clear" (font_size 8)))
-		(text "CLK" (rect 21 155 44 174)(font "Intel Clear" (font_size 8)))
-		(line (pt 0 160)(pt 16 160))
+		(text "CLK" (rect 21 139 44 158)(font "Intel Clear" (font_size 8)))
+		(line (pt 0 144)(pt 16 144))
 	)
 	(port
 		(pt 256 32)
@@ -1507,30 +814,9 @@ https://fpgasoftware.intel.com/eula.
 	(port
 		(pt 256 96)
 		(output)
-		(text "CARRY" (rect 0 0 41 19)(font "Intel Clear" (font_size 8)))
-		(text "CARRY" (rect 194 91 235 110)(font "Intel Clear" (font_size 8)))
-		(line (pt 256 96)(pt 240 96))
-	)
-	(port
-		(pt 256 112)
-		(output)
-		(text "jumpflags[7..0]" (rect 0 0 89 19)(font "Intel Clear" (font_size 8)))
-		(text "jumpflags[7..0]" (rect 146 107 235 126)(font "Intel Clear" (font_size 8)))
-		(line (pt 256 112)(pt 240 112)(line_width 3))
-	)
-	(port
-		(pt 256 128)
-		(output)
 		(text "memaddr[10..0]" (rect 0 0 97 19)(font "Intel Clear" (font_size 8)))
-		(text "memaddr[10..0]" (rect 138 123 235 142)(font "Intel Clear" (font_size 8)))
-		(line (pt 256 128)(pt 240 128)(line_width 3))
-	)
-	(port
-		(pt 256 144)
-		(output)
-		(text "MUL_res[31..0]" (rect 0 0 90 19)(font "Intel Clear" (font_size 8)))
-		(text "MUL_res[31..0]" (rect 145 139 235 158)(font "Intel Clear" (font_size 8)))
-		(line (pt 256 144)(pt 240 144)(line_width 3))
+		(text "memaddr[10..0]" (rect 138 91 235 110)(font "Intel Clear" (font_size 8)))
+		(line (pt 256 96)(pt 240 96)(line_width 3))
 	)
 	(drawing
 		(rectangle (rect 16 16 240 176))
@@ -2137,16 +1423,6 @@ https://fpgasoftware.intel.com/eula.
 	(pt 136 416)
 	(bus)
 )
-(connector
-	(pt 136 416)
-	(pt 136 448)
-	(bus)
-)
-(connector
-	(pt 136 448)
-	(pt 136 792)
-	(bus)
-)
 (connector
 	(pt 136 224)
 	(pt 136 256)
@@ -2381,11 +1657,6 @@ https://fpgasoftware.intel.com/eula.
 	(pt 592 592)
 	(bus)
 )
-(connector
-	(pt 136 792)
-	(pt 1416 792)
-	(bus)
-)
 (connector
 	(text "Rs1[15..0]" (rect 818 160 865 177)(font "Intel Clear" ))
 	(pt 816 176)
@@ -2434,113 +1705,6 @@ https://fpgasoftware.intel.com/eula.
 	(pt 576 304)
 	(bus)
 )
-(connector
-	(pt 1416 496)
-	(pt 1224 496)
-	(bus)
-)
-(connector
-	(pt 1232 520)
-	(pt 1224 520)
-	(bus)
-)
-(connector
-	(pt 1224 520)
-	(pt 1224 496)
-	(bus)
-)
-(connector
-	(text "EXEC1" (rect 1186 616 1217 633)(font "Intel Clear" ))
-	(pt 1176 632)
-	(pt 1232 632)
-)
-(connector
-	(text "EXEC2" (rect 1186 632 1217 649)(font "Intel Clear" ))
-	(pt 1176 648)
-	(pt 1232 648)
-)
-(connector
-	(text "CARRY" (rect 1186 520 1221 537)(font "Intel Clear" ))
-	(pt 1176 536)
-	(pt 1232 536)
-)
-(connector
-	(text "Rd[15..0]" (rect 1186 536 1228 553)(font "Intel Clear" ))
-	(pt 1176 552)
-	(pt 1232 552)
-	(bus)
-)
-(connector
-	(text "Rs1[15..0]" (rect 1186 552 1233 569)(font "Intel Clear" ))
-	(pt 1176 568)
-	(pt 1232 568)
-	(bus)
-)
-(connector
-	(text "Rs2[15..0]" (rect 1186 568 1233 585)(font "Intel Clear" ))
-	(pt 1176 584)
-	(pt 1232 584)
-	(bus)
-)
-(connector
-	(text "instr[15..0]" (rect 1184 584 1233 601)(font "Intel Clear" ))
-	(pt 1176 600)
-	(pt 1232 600)
-	(bus)
-)
-(connector
-	(text "FETCH" (rect 1186 600 1217 617)(font "Intel Clear" ))
-	(pt 1176 616)
-	(pt 1232 616)
-)
-(connector
-	(text "PC[15..0]" (rect 1186 648 1229 665)(font "Intel Clear" ))
-	(pt 1232 664)
-	(pt 1176 664)
-	(bus)
-)
-(connector
-	(text "R1[15..0]" (rect 1186 664 1228 681)(font "Intel Clear" ))
-	(pt 1232 680)
-	(pt 1176 680)
-	(bus)
-)
-(connector
-	(text "R2[15..0]" (rect 1186 680 1228 697)(font "Intel Clear" ))
-	(pt 1232 696)
-	(pt 1176 696)
-	(bus)
-)
-(connector
-	(text "R3[15..0]" (rect 1186 696 1228 713)(font "Intel Clear" ))
-	(pt 1232 712)
-	(pt 1176 712)
-	(bus)
-)
-(connector
-	(text "R4[15..0]" (rect 1186 712 1228 729)(font "Intel Clear" ))
-	(pt 1232 728)
-	(pt 1176 728)
-	(bus)
-)
-(connector
-	(text "R5[15..0]" (rect 1186 728 1228 745)(font "Intel Clear" ))
-	(pt 1232 744)
-	(pt 1176 744)
-	(bus)
-)
-(connector
-	(text "R6[15..0]" (rect 1186 744 1228 761)(font "Intel Clear" ))
-	(pt 1232 760)
-	(pt 1176 760)
-	(bus)
-)
-(connector
-	(text "R7[15..0]" (rect 1186 760 1228 777)(font "Intel Clear" ))
-	(pt 1232 776)
-	(pt 1176 776)
-	(bus)
-)
 (connector
 	(text "CLK" (rect 354 712 374 729)(font "Intel Clear" ))
 	(pt 344 728)
@@ -2556,38 +1720,6 @@ https://fpgasoftware.intel.com/eula.
 	(pt 560 120)
 	(pt 600 120)
 )
-(connector
-	(text "ALU_out[15..0]" (rect 1448 264 1518 281)(font "Intel Clear" ))
-	(pt 1440 280)
-	(pt 1512 280)
-	(bus)
-)
-(connector
-	(text "stack_out[15..0]" (rect 1450 296 1525 313)(font "Intel Clear" ))
-	(pt 1512 312)
-	(pt 1440 312)
-	(bus)
-)
-(connector
-	(text "COND" (rect 1450 312 1479 329)(font "Intel Clear" ))
-	(pt 1512 328)
-	(pt 1440 328)
-)
-(connector
-	(pt 1416 320)
-	(pt 1368 320)
-	(bus)
-)
-(connector
-	(pt 1416 320)
-	(pt 1416 496)
-	(bus)
-)
-(connector
-	(pt 1416 496)
-	(pt 1416 792)
-	(bus)
-)
 (connector
 	(text "s4" (rect 1296 373 1313 383)(font "Intel Clear" )(vertical))
 	(pt 1312 360)
@@ -2598,12 +1730,6 @@ https://fpgasoftware.intel.com/eula.
 	(pt 344 712)
 	(pt 400 712)
 )
-(connector
-	(text "MUL_res[31..0]" (rect 1450 328 1521 345)(font "Intel Clear" ))
-	(pt 1512 344)
-	(pt 1440 344)
-	(bus)
-)
 (connector
 	(pt 464 192)
 	(pt 464 400)
@@ -2660,29 +1786,11 @@ https://fpgasoftware.intel.com/eula.
 	(pt 272 88)
 	(pt 304 88)
 )
-(connector
-	(text "jumpflags[7..0]" (rect 1448 344 1518 361)(font "Intel Clear" ))
-	(pt 1512 360)
-	(pt 1440 360)
-	(bus)
-)
 (connector
 	(pt 1256 336)
 	(pt 1248 336)
 	(bus)
 )
-(connector
-	(text "mul1[15..0]" (rect 1448 360 1502 377)(font "Intel Clear" ))
-	(pt 1512 376)
-	(pt 1440 376)
-	(bus)
-)
-(connector
-	(text "mul2[15..0]" (rect 1448 376 1502 393)(font "Intel Clear" ))
-	(pt 1512 392)
-	(pt 1440 392)
-	(bus)
-)
 (connector
 	(pt 856 592)
 	(pt 856 400)
@@ -2747,17 +1855,6 @@ https://fpgasoftware.intel.com/eula.
 	(pt 1248 384)
 	(bus)
 )
-(connector
-	(text "jumpflags[7..0]" (rect 1184 416 1254 433)(font "Intel Clear" ))
-	(pt 1184 432)
-	(pt 1232 432)
-	(bus)
-)
-(connector
-	(text "CARRY" (rect 1186 400 1221 417)(font "Intel Clear" ))
-	(pt 1184 416)
-	(pt 1232 416)
-)
 (connector
 	(text "COND" (rect 1194 384 1223 401)(font "Intel Clear" ))
 	(pt 1184 400)
@@ -2775,23 +1872,6 @@ https://fpgasoftware.intel.com/eula.
 	(pt 1232 352)
 	(bus)
 )
-(connector
-	(text "MUL_res[31..0]" (rect 1184 448 1255 465)(font "Intel Clear" ))
-	(pt 1184 464)
-	(pt 1232 464)
-	(bus)
-)
-(connector
-	(text "CLK" (rect 882 464 902 481)(font "Intel Clear" ))
-	(pt 928 480)
-	(pt 872 480)
-)
-(connector
-	(text "RAMd_out[15..0]" (rect 870 448 950 465)(font "Intel Clear" ))
-	(pt 928 464)
-	(pt 872 464)
-	(bus)
-)
 (connector
 	(text "instr[10..0]" (rect 904 40 953 57)(font "Intel Clear" ))
 	(pt 872 56)
@@ -2810,12 +1890,6 @@ https://fpgasoftware.intel.com/eula.
 	(pt 872 88)
 	(bus)
 )
-(connector
-	(text "memaddr[10..0]" (rect 1192 432 1267 449)(font "Intel Clear" ))
-	(pt 1184 448)
-	(pt 1232 448)
-	(bus)
-)
 (connector
 	(pt 1080 72)
 	(pt 1088 72)
@@ -2836,12 +1910,6 @@ https://fpgasoftware.intel.com/eula.
 	(pt 872 152)
 	(bus)
 )
-(connector
-	(text "memaddr[10..0]" (rect 1448 392 1523 409)(font "Intel Clear" ))
-	(pt 1512 408)
-	(pt 1440 408)
-	(bus)
-)
 (connector
 	(text "s5" (rect 1008 117 1025 127)(font "Intel Clear" )(vertical))
 	(pt 1024 112)
@@ -2858,83 +1926,6 @@ https://fpgasoftware.intel.com/eula.
 	(pt 1160 304)
 	(bus)
 )
-(connector
-	(text "Rs1[15..0]" (rect 850 600 897 617)(font "Intel Clear" ))
-	(pt 840 616)
-	(pt 896 616)
-	(bus)
-)
-(connector
-	(text "CLK" (rect 850 616 870 633)(font "Intel Clear" ))
-	(pt 840 632)
-	(pt 896 632)
-)
-(connector
-	(text "stack_en" (rect 850 632 892 649)(font "Intel Clear" ))
-	(pt 840 648)
-	(pt 896 648)
-)
-(connector
-	(text "stack_rst" (rect 850 648 892 665)(font "Intel Clear" ))
-	(pt 840 664)
-	(pt 896 664)
-)
-(connector
-	(text "stack_rw" (rect 850 664 892 681)(font "Intel Clear" ))
-	(pt 840 680)
-	(pt 896 680)
-)
-(connector
-	(text "stack_out[15..0]" (rect 1082 600 1157 617)(font "Intel Clear" ))
-	(pt 1080 616)
-	(pt 1144 616)
-	(bus)
-)
-(connector
-	(text "stack_empty" (rect 1082 616 1143 633)(font "Intel Clear" ))
-	(pt 1080 632)
-	(pt 1144 632)
-)
-(connector
-	(text "stack_full" (rect 1082 632 1129 649)(font "Intel Clear" ))
-	(pt 1080 648)
-	(pt 1144 648)
-)
-(connector
-	(text "stack_empty" (rect 1450 408 1511 425)(font "Intel Clear" ))
-	(pt 1512 424)
-	(pt 1440 424)
-)
-(connector
-	(text "stack_full" (rect 1450 424 1497 441)(font "Intel Clear" ))
-	(pt 1512 440)
-	(pt 1440 440)
-)
-(connector
-	(pt 1512 296)
-	(pt 1416 296)
-	(bus)
-)
-(connector
-	(pt 1416 296)
-	(pt 1416 256)
-	(bus)
-)
-(connector
-	(pt 1416 256)
-	(pt 1160 256)
-	(bus)
-)
-(connector
-	(pt 1160 192)
-	(pt 1160 256)
-	(bus)
-)
-(connector
-	(pt 1160 256)
-	(pt 1160 304)
-	(bus)
-)
 (connector
 	(pt 872 -152)
 	(pt 872 24)
@@ -3034,11 +2025,6 @@ https://fpgasoftware.intel.com/eula.
 	(pt 1432 24)
 	(bus)
 )
-(connector
-	(text "RAMd_wren" (rect 1394 40 1453 57)(font "Intel Clear" ))
-	(pt 1384 56)
-	(pt 1448 56)
-)
 (connector
 	(text "RAMd_en" (rect 1394 56 1441 73)(font "Intel Clear" ))
 	(pt 1384 72)
@@ -3084,36 +2070,143 @@ https://fpgasoftware.intel.com/eula.
 	(pt 1384 184)
 	(pt 1432 184)
 )
-(connector
-	(pt 1168 152)
-	(pt 1168 248)
-	(bus)
-)
 (connector
 	(pt 872 152)
 	(pt 1088 152)
 	(bus)
 )
 (connector
-	(pt 1088 152)
-	(pt 1168 152)
+	(text "RAMd_wren" (rect 1386 40 1445 57)(font "Intel Clear" ))
+	(pt 1384 56)
+	(pt 1432 56)
+)
+(connector
+	(text "memaddr[10..0]" (rect 1192 400 1267 417)(font "Intel Clear" ))
+	(pt 1184 416)
+	(pt 1232 416)
 	(bus)
 )
 (connector
-	(pt 1168 248)
-	(pt 1440 248)
+	(text "CLK" (rect 882 448 902 465)(font "Intel Clear" ))
+	(pt 928 464)
+	(pt 872 464)
+)
+(connector
+	(pt 1160 192)
+	(pt 1160 304)
 	(bus)
 )
 (connector
-	(pt 1440 248)
-	(pt 1440 264)
+	(pt 136 776)
+	(pt 1376 776)
 	(bus)
 )
 (connector
-	(pt 1440 264)
-	(pt 1512 264)
+	(pt 1368 320)
+	(pt 1376 320)
 	(bus)
 )
+(connector
+	(pt 1376 320)
+	(pt 1376 776)
+	(bus)
+)
+(connector
+	(pt 136 416)
+	(pt 136 448)
+	(bus)
+)
+(connector
+	(pt 136 448)
+	(pt 136 776)
+	(bus)
+)
+(connector
+	(text "PC[15..0]" (rect 1146 632 1189 649)(font "Intel Clear" ))
+	(pt 1192 648)
+	(pt 1136 648)
+	(bus)
+)
+(connector
+	(text "R1[15..0]" (rect 1146 648 1188 665)(font "Intel Clear" ))
+	(pt 1192 664)
+	(pt 1136 664)
+	(bus)
+)
+(connector
+	(text "R2[15..0]" (rect 1146 664 1188 681)(font "Intel Clear" ))
+	(pt 1192 680)
+	(pt 1136 680)
+	(bus)
+)
+(connector
+	(text "R3[15..0]" (rect 1146 680 1188 697)(font "Intel Clear" ))
+	(pt 1192 696)
+	(pt 1136 696)
+	(bus)
+)
+(connector
+	(text "R4[15..0]" (rect 1146 696 1188 713)(font "Intel Clear" ))
+	(pt 1192 712)
+	(pt 1136 712)
+	(bus)
+)
+(connector
+	(text "R5[15..0]" (rect 1146 712 1188 729)(font "Intel Clear" ))
+	(pt 1192 728)
+	(pt 1136 728)
+	(bus)
+)
+(connector
+	(text "R6[15..0]" (rect 1146 728 1188 745)(font "Intel Clear" ))
+	(pt 1192 744)
+	(pt 1136 744)
+	(bus)
+)
+(connector
+	(text "R7[15..0]" (rect 1146 744 1188 761)(font "Intel Clear" ))
+	(pt 1192 760)
+	(pt 1136 760)
+	(bus)
+)
+(connector
+	(text "instr[15..0]" (rect 1144 616 1193 633)(font "Intel Clear" ))
+	(pt 1136 632)
+	(pt 1192 632)
+	(bus)
+)
+(connector
+	(text "stack_out[15..0]" (rect 1114 528 1189 545)(font "Intel Clear" ))
+	(pt 1112 544)
+	(pt 1168 544)
+	(bus)
+)
+(connector
+	(text "Rs1[15..0]" (rect 874 528 921 545)(font "Intel Clear" ))
+	(pt 928 544)
+	(pt 872 544)
+	(bus)
+)
+(connector
+	(text "CLK" (rect 874 544 894 561)(font "Intel Clear" ))
+	(pt 928 560)
+	(pt 872 560)
+)
+(connector
+	(text "stack_en" (rect 874 560 916 577)(font "Intel Clear" ))
+	(pt 928 576)
+	(pt 872 576)
+)
+(connector
+	(text "stack_rst" (rect 874 576 916 593)(font "Intel Clear" ))
+	(pt 928 592)
+	(pt 872 592)
+)
+(connector
+	(text "stack_rw" (rect 874 592 916 609)(font "Intel Clear" ))
+	(pt 928 608)
+	(pt 872 608)
+)
 (junction (pt 856 192))
 (junction (pt 136 320))
 (junction (pt 136 352))
@@ -3138,8 +2231,5 @@ https://fpgasoftware.intel.com/eula.
 (junction (pt 544 480))
 (junction (pt 560 496))
 (junction (pt 576 512))
-(junction (pt 1416 496))
 (junction (pt 536 192))
 (junction (pt 872 24))
-(junction (pt 1160 256))
-(junction (pt 1088 152))
diff --git a/CPUProject.qsf b/CPUProject.qsf
index f6d4eb8..0e69956 100644
--- a/CPUProject.qsf
+++ b/CPUProject.qsf
@@ -62,6 +62,7 @@ set_global_assignment -name POWER_USE_PVA ON
 set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
 set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
 set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
+set_global_assignment -name SDC_FILE CPUProject.sdc
 set_global_assignment -name VERILOG_FILE LIFOstack.v
 set_global_assignment -name VERILOG_FILE alu.v
 set_global_assignment -name MIF_FILE LUTSquares.mif
@@ -84,4 +85,5 @@ set_global_assignment -name VERILOG_FILE mux_3x16.v
 set_global_assignment -name VERILOG_FILE ADD_1.v
 set_global_assignment -name VERILOG_FILE SM_pipelined.v
 set_global_assignment -name VECTOR_WAVEFORM_FILE Waveform.vwf
+set_global_assignment -name VECTOR_WAVEFORM_FILE Waveform1.vwf
 set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
\ No newline at end of file
diff --git a/CPUProject.qws b/CPUProject.qws
new file mode 100644
index 0000000..d4099da
Binary files /dev/null and b/CPUProject.qws differ
diff --git a/CPUProject.sdc b/CPUProject.sdc
new file mode 100644
index 0000000..c0fad97
--- /dev/null
+++ b/CPUProject.sdc
@@ -0,0 +1,4 @@
+#This file must have the same name as your project
+
+#Make input CLK a clock and set frequency to 100MHz (10ns period)
+create_clock -name {CLK} -period 10.0 [get_ports {CLK}]
diff --git a/CPUProject.sdc.bak b/CPUProject.sdc.bak
new file mode 100644
index 0000000..fdc6662
--- /dev/null
+++ b/CPUProject.sdc.bak
@@ -0,0 +1,4 @@
+#This file must have the same name as your project
+
+#Make input CLK a clock and set frequency to 250MHz (4ns period)
+create_clock -name {CLK} -period 4.0 [get_ports {CLK}]
diff --git a/LIFOstack.bsf b/LIFOstack.bsf
index 967974d..1633c8a 100644
--- a/LIFOstack.bsf
+++ b/LIFOstack.bsf
@@ -4,9 +4,9 @@ editor if you plan to continue editing the block that represents it in
 the Block Editor! File corruption is VERY likely to occur.
 */
 /*
-Copyright (C) 2018  Intel Corporation. All rights reserved.
+Copyright (C) 2019  Intel Corporation. All rights reserved.
 Your use of Intel Corporation's design tools, logic functions 
-and other software and tools, and its AMPP partner logic 
+and other software and tools, and any partner logic 
 functions, and any output files from any of the foregoing 
 (including device programming or simulation files), and any 
 associated documentation or information are expressly subject 
@@ -16,7 +16,8 @@ the Intel FPGA IP License Agreement, or other applicable license
 agreement, including, without limitation, that your use is for
 the sole purpose of programming logic devices manufactured by
 Intel and sold by Intel or its authorized distributors.  Please
-refer to the applicable agreement for further details.
+refer to the applicable agreement for further details, at
+https://fpgasoftware.intel.com/eula.
 */
 (header "symbol" (version "1.1"))
 (symbol
@@ -65,20 +66,6 @@ refer to the applicable agreement for further details.
 		(text "Dout[15..0]" (rect 121 27 163 39)(font "Arial" ))
 		(line (pt 184 32)(pt 168 32)(line_width 3))
 	)
-	(port
-		(pt 184 48)
-		(output)
-		(text "empty" (rect 0 0 25 12)(font "Arial" ))
-		(text "empty" (rect 138 43 163 55)(font "Arial" ))
-		(line (pt 184 48)(pt 168 48)(line_width 1))
-	)
-	(port
-		(pt 184 64)
-		(output)
-		(text "full" (rect 0 0 10 12)(font "Arial" ))
-		(text "full" (rect 153 59 163 71)(font "Arial" ))
-		(line (pt 184 64)(pt 168 64)(line_width 1))
-	)
 	(drawing
 		(rectangle (rect 16 16 168 128)(line_width 1))
 	)
diff --git a/LIFOstack.v b/LIFOstack.v
index b476bc4..a7669ad 100644
--- a/LIFOstack.v
+++ b/LIFOstack.v
@@ -1,4 +1,4 @@
-module LIFOstack (Din, clk, en, rst, rw, Dout, empty, full);
+module LIFOstack (Din, clk, en, rst, rw, Dout);
 
 input [15:0] Din; // Data being fed to stack
 input clk; // clock signal input
@@ -7,8 +7,8 @@ input rst; // reset pin to clear and reinitialise stack (active high)
 input rw; // 0: read, 1: write
 
 output reg [15:0] Dout; // Data being pulled from stack
-output reg empty; // goes high to indicate SP is at 0
-output reg full; // goes high to indicate SP is at (slots)
+reg empty; // goes high to indicate SP is at 0
+reg full; // goes high to indicate SP is at (slots)
 
 reg [5:0] SP; // Points to slot to save next value to
 integer i;
diff --git a/alu.bsf b/alu.bsf
index 169c1a7..010863f 100644
--- a/alu.bsf
+++ b/alu.bsf
@@ -21,9 +21,9 @@ https://fpgasoftware.intel.com/eula.
 */
 (header "symbol" (version "1.1"))
 (symbol
-	(rect 16 16 248 224)
+	(rect 16 16 240 192)
 	(text "alu" (rect 5 0 15 12)(font "Arial" ))
-	(text "inst" (rect 8 192 20 204)(font "Arial" ))
+	(text "inst" (rect 8 160 20 172)(font "Arial" ))
 	(port
 		(pt 0 32)
 		(input)
@@ -81,62 +81,41 @@ https://fpgasoftware.intel.com/eula.
 		(line (pt 0 144)(pt 16 144)(line_width 3))
 	)
 	(port
-		(pt 0 160)
-		(input)
-		(text "memdatain[15..0]" (rect 0 0 67 12)(font "Arial" ))
-		(text "memdatain[15..0]" (rect 21 155 88 167)(font "Arial" ))
-		(line (pt 0 160)(pt 16 160)(line_width 3))
-	)
-	(port
-		(pt 232 32)
+		(pt 224 32)
 		(output)
 		(text "mul1[15..0]" (rect 0 0 41 12)(font "Arial" ))
-		(text "mul1[15..0]" (rect 170 27 211 39)(font "Arial" ))
-		(line (pt 232 32)(pt 216 32)(line_width 3))
+		(text "mul1[15..0]" (rect 162 27 203 39)(font "Arial" ))
+		(line (pt 224 32)(pt 208 32)(line_width 3))
 	)
 	(port
-		(pt 232 48)
+		(pt 224 48)
 		(output)
 		(text "mul2[15..0]" (rect 0 0 42 12)(font "Arial" ))
-		(text "mul2[15..0]" (rect 169 43 211 55)(font "Arial" ))
-		(line (pt 232 48)(pt 216 48)(line_width 3))
+		(text "mul2[15..0]" (rect 161 43 203 55)(font "Arial" ))
+		(line (pt 224 48)(pt 208 48)(line_width 3))
 	)
 	(port
-		(pt 232 64)
+		(pt 224 64)
 		(output)
 		(text "Rout[15..0]" (rect 0 0 43 12)(font "Arial" ))
-		(text "Rout[15..0]" (rect 168 59 211 71)(font "Arial" ))
-		(line (pt 232 64)(pt 216 64)(line_width 3))
+		(text "Rout[15..0]" (rect 160 59 203 71)(font "Arial" ))
+		(line (pt 224 64)(pt 208 64)(line_width 3))
 	)
 	(port
-		(pt 232 80)
+		(pt 224 80)
 		(output)
 		(text "jump" (rect 0 0 18 12)(font "Arial" ))
-		(text "jump" (rect 193 75 211 87)(font "Arial" ))
-		(line (pt 232 80)(pt 216 80)(line_width 1))
+		(text "jump" (rect 185 75 203 87)(font "Arial" ))
+		(line (pt 224 80)(pt 208 80)(line_width 1))
 	)
 	(port
-		(pt 232 96)
-		(output)
-		(text "carry" (rect 0 0 22 12)(font "Arial" ))
-		(text "carry" (rect 189 91 211 103)(font "Arial" ))
-		(line (pt 232 96)(pt 216 96)(line_width 1))
-	)
-	(port
-		(pt 232 112)
-		(output)
-		(text "jumpflags[7..0]" (rect 0 0 57 12)(font "Arial" ))
-		(text "jumpflags[7..0]" (rect 154 107 211 119)(font "Arial" ))
-		(line (pt 232 112)(pt 216 112)(line_width 3))
-	)
-	(port
-		(pt 232 128)
+		(pt 224 96)
 		(output)
 		(text "memaddr[10..0]" (rect 0 0 62 12)(font "Arial" ))
-		(text "memaddr[10..0]" (rect 149 123 211 135)(font "Arial" ))
-		(line (pt 232 128)(pt 216 128)(line_width 3))
+		(text "memaddr[10..0]" (rect 141 91 203 103)(font "Arial" ))
+		(line (pt 224 96)(pt 208 96)(line_width 3))
 	)
 	(drawing
-		(rectangle (rect 16 16 216 192)(line_width 1))
+		(rectangle (rect 16 16 208 160)(line_width 1))
 	)
 )