Almost completed 16 bit multiplier.

This commit is contained in:
ben 2020-05-28 15:02:22 -07:00
parent e39d2f653a
commit 3d6e456fcc
6 changed files with 936 additions and 49 deletions

3
.gitignore vendored
View file

@ -2,4 +2,5 @@ db/*
incremental_db/* incremental_db/*
output_files/* output_files/*
simulation/* simulation/*
greybox_tmp/cbx_args.txt greybox_tmp/cbx_args.txt
*.vwf

View file

@ -57,6 +57,8 @@ set_global_assignment -name BDF_FILE SM.bdf
set_global_assignment -name VERILOG_FILE DECODE.v set_global_assignment -name VERILOG_FILE DECODE.v
set_global_assignment -name MIF_FILE data.mif set_global_assignment -name MIF_FILE data.mif
set_global_assignment -name MIF_FILE instr.mif set_global_assignment -name MIF_FILE instr.mif
set_global_assignment -name VECTOR_WAVEFORM_FILE Waveform.vwf
set_global_assignment -name BDF_FILE mul16.bdf
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top

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681
mul16.bdf Normal file
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@ -0,0 +1,681 @@
/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 2019 Intel Corporation. All rights reserved.
Your use of Intel Corporation's design tools, logic functions
and other software and tools, and any partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Intel Program License
Subscription Agreement, the Intel Quartus Prime License Agreement,
the Intel FPGA IP License Agreement, or other applicable license
agreement, including, without limitation, that your use is for
the sole purpose of programming logic devices manufactured by
Intel and sold by Intel or its authorized distributors. Please
refer to the applicable agreement for further details, at
https://fpgasoftware.intel.com/eula.
*/
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(text "A[7..0]" (rect 594 424 624 441)(font "Intel Clear" ))
(pt 648 440)
(pt 584 440)
(bus)
)
(connector
(text "B[7..0]" (rect 594 440 624 457)(font "Intel Clear" ))
(pt 648 456)
(pt 584 456)
(bus)
)
(connector
(text "P1[15..0]" (rect 826 88 868 105)(font "Intel Clear" ))
(pt 816 104)
(pt 880 104)
(bus)
)
(connector
(text "P2[15..0]" (rect 826 208 868 225)(font "Intel Clear" ))
(pt 816 224)
(pt 880 224)
(bus)
)
(connector
(text "P3[15..0]" (rect 826 320 868 337)(font "Intel Clear" ))
(pt 816 336)
(pt 888 336)
(bus)
)
(connector
(text "P4[15..0]" (rect 826 424 868 441)(font "Intel Clear" ))
(pt 816 440)
(pt 888 440)
(bus)
)
(connector
(text "P[31..0]" (rect 1738 264 1774 281)(font "Intel Clear" ))
(pt 1728 280)
(pt 1872 280)
(bus)
)

248
mul8.bdf
View file

@ -52,22 +52,6 @@ https://fpgasoftware.intel.com/eula.
) )
(text "VCC" (rect 128 7 148 17)(font "Arial" (font_size 6))) (text "VCC" (rect 128 7 148 17)(font "Arial" (font_size 6)))
) )
(pin
(input)
(rect 512 96 680 112)
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
(text "CLK" (rect 5 0 26 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 84 12)(pt 109 12))
(line (pt 84 4)(pt 109 4))
(line (pt 113 8)(pt 168 8))
(line (pt 84 12)(pt 84 4))
(line (pt 109 4)(pt 113 8))
(line (pt 109 12)(pt 113 8))
)
(text "VCC" (rect 128 7 148 17)(font "Arial" (font_size 6)))
)
(pin (pin
(output) (output)
(rect 1584 160 1760 176) (rect 1584 160 1760 176)
@ -664,6 +648,174 @@ https://fpgasoftware.intel.com/eula.
(rectangle (rect 16 16 136 80)) (rectangle (rect 16 16 136 80))
) )
) )
(symbol
(rect 736 -160 848 -64)
(text "LPM_ROM" (rect 25 0 100 16)(font "Arial" (font_size 10)))
(text "LUTSum" (rect 3 85 43 102)(font "Intel Clear" ))
(port
(pt 0 24)
(input)
(text "address[LPM_WIDTHAD-1..0]" (rect 20 17 186 31)(font "Arial" (font_size 8)))
(text "address[]" (rect 20 17 74 31)(font "Arial" (font_size 8)))
(line (pt 0 24)(pt 16 24)(line_width 3))
)
(port
(pt 0 40)
(input)
(text "inclock" (rect 20 33 58 47)(font "Arial" (font_size 8)))
(text "inclock" (rect 20 33 58 47)(font "Arial" (font_size 8)))
(line (pt 0 40)(pt 16 40))
(unused)
)
(port
(pt 0 72)
(input)
(text "memenab" (rect 20 65 74 79)(font "Arial" (font_size 8)))
(text "memenab" (rect 20 65 74 79)(font "Arial" (font_size 8)))
(line (pt 0 72)(pt 16 72))
(unused)
)
(port
(pt 0 56)
(input)
(text "outclock" (rect 20 49 67 63)(font "Arial" (font_size 8)))
(text "outclock" (rect 20 49 67 63)(font "Arial" (font_size 8)))
(line (pt 0 56)(pt 16 56))
(unused)
)
(port
(pt 112 48)
(output)
(text "q[LPM_WIDTH-1..0]" (rect 80 41 188 55)(font "Arial" (font_size 8)))
(text "q[]" (rect 80 41 94 55)(font "Arial" (font_size 8)))
(line (pt 96 48)(pt 112 48)(line_width 3))
)
(parameter
"LPM_ADDRESS_CONTROL"
"\"UNREGISTERED\""
"Should the address and control ports be registered?"
"\"REGISTERED\"" "\"UNREGISTERED\""
)
(parameter
"LPM_FILE"
"\"LUTSquares.mif\""
"File containing initial contents of memory array"
(type "PARAMETER_UNKNOWN") )
(parameter
"LPM_NUMWORDS"
"256"
"Number of memory words, default is 2^LPM_WIDTHAD"
(type "PARAMETER_UNSIGNED_DEC") )
(parameter
"LPM_OUTDATA"
"\"UNREGISTERED\""
"Should the output data be registered?"
"\"REGISTERED\"" "\"UNREGISTERED\""
)
(parameter
"LPM_WIDTH"
"16"
"Data width in bits, any integer > 0"
" 1" " 2" " 3" " 4" " 5" " 6" " 7" " 8" " 9" "10" "11" "12" "13" "14" "15" "16" "20" "24" "28" "32" "40" "48" "56" "64"
(type "PARAMETER_UNSIGNED_DEC") )
(parameter
"LPM_WIDTHAD"
"8"
"Number of address lines, any integer > 0"
" 1" " 2" " 3" " 4" " 5" " 6" " 7" " 8" " 9" "10" "11" "12"
(type "PARAMETER_UNSIGNED_DEC") )
(drawing
(line (pt 16 16)(pt 96 16))
(line (pt 16 80)(pt 96 80))
(line (pt 96 80)(pt 96 16))
(line (pt 16 80)(pt 16 16))
)
(annotation_block (parameter)(rect 848 -296 1178 -163))
)
(symbol
(rect 760 16 872 112)
(text "LPM_ROM" (rect 25 0 100 16)(font "Arial" (font_size 10)))
(text "LUTDifference" (rect 3 85 70 102)(font "Intel Clear" ))
(port
(pt 0 24)
(input)
(text "address[LPM_WIDTHAD-1..0]" (rect 20 17 186 31)(font "Arial" (font_size 8)))
(text "address[]" (rect 20 17 74 31)(font "Arial" (font_size 8)))
(line (pt 0 24)(pt 16 24)(line_width 3))
)
(port
(pt 0 40)
(input)
(text "inclock" (rect 20 33 58 47)(font "Arial" (font_size 8)))
(text "inclock" (rect 20 33 58 47)(font "Arial" (font_size 8)))
(line (pt 0 40)(pt 16 40))
(unused)
)
(port
(pt 0 72)
(input)
(text "memenab" (rect 20 65 74 79)(font "Arial" (font_size 8)))
(text "memenab" (rect 20 65 74 79)(font "Arial" (font_size 8)))
(line (pt 0 72)(pt 16 72))
(unused)
)
(port
(pt 0 56)
(input)
(text "outclock" (rect 20 49 67 63)(font "Arial" (font_size 8)))
(text "outclock" (rect 20 49 67 63)(font "Arial" (font_size 8)))
(line (pt 0 56)(pt 16 56))
(unused)
)
(port
(pt 112 48)
(output)
(text "q[LPM_WIDTH-1..0]" (rect 80 41 188 55)(font "Arial" (font_size 8)))
(text "q[]" (rect 80 41 94 55)(font "Arial" (font_size 8)))
(line (pt 96 48)(pt 112 48)(line_width 3))
)
(parameter
"LPM_ADDRESS_CONTROL"
"\"UNREGISTERED\""
"Should the address and control ports be registered?"
"\"REGISTERED\"" "\"UNREGISTERED\""
)
(parameter
"LPM_FILE"
"\"LUTSquares.mif\""
"File containing initial contents of memory array"
(type "PARAMETER_UNKNOWN") )
(parameter
"LPM_NUMWORDS"
"256"
"Number of memory words, default is 2^LPM_WIDTHAD"
(type "PARAMETER_UNSIGNED_DEC") )
(parameter
"LPM_OUTDATA"
"\"UNREGISTERED\""
"Should the output data be registered?"
"\"REGISTERED\"" "\"UNREGISTERED\""
)
(parameter
"LPM_WIDTH"
"16"
"Data width in bits, any integer > 0"
" 1" " 2" " 3" " 4" " 5" " 6" " 7" " 8" " 9" "10" "11" "12" "13" "14" "15" "16" "20" "24" "28" "32" "40" "48" "56" "64"
(type "PARAMETER_UNSIGNED_DEC") )
(parameter
"LPM_WIDTHAD"
"8"
"Number of address lines, any integer > 0"
" 1" " 2" " 3" " 4" " 5" " 6" " 7" " 8" " 9" "10" "11" "12"
(type "PARAMETER_UNSIGNED_DEC") )
(drawing
(line (pt 16 16)(pt 96 16))
(line (pt 16 80)(pt 96 80))
(line (pt 96 80)(pt 96 16))
(line (pt 16 80)(pt 16 16))
)
(annotation_block (parameter)(rect 872 -120 1202 13))
)
(connector (connector
(text "1" (rect -94 -64 -89 -47)(font "Intel Clear" )) (text "1" (rect -94 -64 -89 -47)(font "Intel Clear" ))
(pt -80 -48) (pt -80 -48)
@ -740,21 +892,11 @@ https://fpgasoftware.intel.com/eula.
(pt -160 432) (pt -160 432)
(bus) (bus)
) )
(connector
(pt 992 40)
(pt 992 104)
(bus)
)
(connector (connector
(pt 992 104) (pt 992 104)
(pt 1024 104) (pt 1024 104)
(bus) (bus)
) )
(connector
(pt 976 72)
(pt 976 152)
(bus)
)
(connector (connector
(pt 976 152) (pt 976 152)
(pt 1024 152) (pt 1024 152)
@ -795,16 +937,6 @@ https://fpgasoftware.intel.com/eula.
(pt 1584 168) (pt 1584 168)
(bus) (bus)
) )
(connector
(pt 936 72)
(pt 976 72)
(bus)
)
(connector
(pt 936 40)
(pt 992 40)
(bus)
)
(connector (connector
(pt 1224 192) (pt 1224 192)
(pt 1224 248) (pt 1224 248)
@ -816,18 +948,6 @@ https://fpgasoftware.intel.com/eula.
(pt 1144 248) (pt 1144 248)
(bus) (bus)
) )
(connector
(text "0, S[7..1]" (rect 522 24 562 41)(font "Intel Clear" ))
(pt 512 40)
(pt 680 40)
(bus)
)
(connector
(text "0, D[7..1]" (rect 522 56 563 73)(font "Intel Clear" ))
(pt 512 72)
(pt 680 72)
(bus)
)
(connector (connector
(text "A[0]" (rect 698 536 718 553)(font "Intel Clear" )) (text "A[0]" (rect 698 536 718 553)(font "Intel Clear" ))
(pt 720 552) (pt 720 552)
@ -876,5 +996,37 @@ https://fpgasoftware.intel.com/eula.
(pt 392 408) (pt 392 408)
(bus) (bus)
) )
(connector
(text "0,S[7..1]" (rect 578 -160 615 -143)(font "Intel Clear" ))
(pt 568 -136)
(pt 736 -136)
(bus)
)
(connector
(pt 992 104)
(pt 992 -112)
(bus)
)
(connector
(pt 992 -112)
(pt 848 -112)
(bus)
)
(connector
(pt 976 152)
(pt 976 64)
(bus)
)
(connector
(pt 976 64)
(pt 872 64)
(bus)
)
(connector
(text "0,D[7..1]" (rect 610 24 648 41)(font "Intel Clear" ))
(pt 600 40)
(pt 760 40)
(bus)
)
(junction (pt -200 160)) (junction (pt -200 160))
(junction (pt -160 304)) (junction (pt -160 304))

51
mul8.bsf Normal file
View file

@ -0,0 +1,51 @@
/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 2019 Intel Corporation. All rights reserved.
Your use of Intel Corporation's design tools, logic functions
and other software and tools, and any partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Intel Program License
Subscription Agreement, the Intel Quartus Prime License Agreement,
the Intel FPGA IP License Agreement, or other applicable license
agreement, including, without limitation, that your use is for
the sole purpose of programming logic devices manufactured by
Intel and sold by Intel or its authorized distributors. Please
refer to the applicable agreement for further details, at
https://fpgasoftware.intel.com/eula.
*/
(header "symbol" (version "1.2"))
(symbol
(rect 16 16 184 112)
(text "mul8" (rect 5 0 35 19)(font "Intel Clear" (font_size 8)))
(text "inst" (rect 8 75 24 92)(font "Intel Clear" ))
(port
(pt 0 32)
(input)
(text "A[7..0]" (rect 0 0 38 19)(font "Intel Clear" (font_size 8)))
(text "A[7..0]" (rect 21 27 59 46)(font "Intel Clear" (font_size 8)))
(line (pt 0 32)(pt 16 32)(line_width 3))
)
(port
(pt 0 48)
(input)
(text "B[7..0]" (rect 0 0 38 19)(font "Intel Clear" (font_size 8)))
(text "B[7..0]" (rect 21 43 59 62)(font "Intel Clear" (font_size 8)))
(line (pt 0 48)(pt 16 48)(line_width 3))
)
(port
(pt 168 32)
(output)
(text "PROD[15..0]" (rect 0 0 74 19)(font "Intel Clear" (font_size 8)))
(text "PROD[15..0]" (rect 73 27 147 46)(font "Intel Clear" (font_size 8)))
(line (pt 168 32)(pt 152 32)(line_width 3))
)
(drawing
(rectangle (rect 16 16 152 80))
)
)