From 26c28a829d6be53e0b013ea340fb9ed01c09256f Mon Sep 17 00:00:00 2001 From: supleed2 <21363892+supleed2@users.noreply.github.com> Date: Wed, 20 May 2020 12:44:57 +0100 Subject: [PATCH] Basic Project Setup --- CPUProject.bdf | 21 ++++++++++++++++++++ CPUProject.qpf | 30 ++++++++++++++++++++++++++++ CPUProject.qsf | 52 +++++++++++++++++++++++++++++++++++++++++++++++++ CPUProject.qws | Bin 0 -> 673 bytes 4 files changed, 103 insertions(+) create mode 100644 CPUProject.bdf create mode 100644 CPUProject.qpf create mode 100644 CPUProject.qsf create mode 100644 CPUProject.qws diff --git a/CPUProject.bdf b/CPUProject.bdf new file mode 100644 index 0000000..0349cfa --- /dev/null +++ b/CPUProject.bdf @@ -0,0 +1,21 @@ +/* +WARNING: Do NOT edit the input and output ports in this file in a text +editor if you plan to continue editing the block that represents it in +the Block Editor! File corruption is VERY likely to occur. +*/ +/* +Copyright (C) 2018 Intel Corporation. All rights reserved. +Your use of Intel Corporation's design tools, logic functions +and other software and tools, and its AMPP partner logic +functions, and any output files from any of the foregoing +(including device programming or simulation files), and any +associated documentation or information are expressly subject +to the terms and conditions of the Intel Program License +Subscription Agreement, the Intel Quartus Prime License Agreement, +the Intel FPGA IP License Agreement, or other applicable license +agreement, including, without limitation, that your use is for +the sole purpose of programming logic devices manufactured by +Intel and sold by Intel or its authorized distributors. Please +refer to the applicable agreement for further details. +*/ +(header "graphic" (version "1.4")) diff --git a/CPUProject.qpf b/CPUProject.qpf new file mode 100644 index 0000000..0005386 --- /dev/null +++ b/CPUProject.qpf @@ -0,0 +1,30 @@ +# -------------------------------------------------------------------------- # +# +# Copyright (C) 2018 Intel Corporation. All rights reserved. +# Your use of Intel Corporation's design tools, logic functions +# and other software and tools, and its AMPP partner logic +# functions, and any output files from any of the foregoing +# (including device programming or simulation files), and any +# associated documentation or information are expressly subject +# to the terms and conditions of the Intel Program License +# Subscription Agreement, the Intel Quartus Prime License Agreement, +# the Intel FPGA IP License Agreement, or other applicable license +# agreement, including, without limitation, that your use is for +# the sole purpose of programming logic devices manufactured by +# Intel and sold by Intel or its authorized distributors. Please +# refer to the applicable agreement for further details. +# +# -------------------------------------------------------------------------- # +# +# Quartus Prime +# Version 18.1.0 Build 625 09/12/2018 SJ Lite Edition +# Date created = 12:38:11 May 20, 2020 +# +# -------------------------------------------------------------------------- # + +QUARTUS_VERSION = "18.1" +DATE = "12:38:11 May 20, 2020" + +# Revisions + +PROJECT_REVISION = "CPUProject" diff --git a/CPUProject.qsf b/CPUProject.qsf new file mode 100644 index 0000000..daf810d --- /dev/null +++ b/CPUProject.qsf @@ -0,0 +1,52 @@ +# -------------------------------------------------------------------------- # +# +# Copyright (C) 2018 Intel Corporation. All rights reserved. +# Your use of Intel Corporation's design tools, logic functions +# and other software and tools, and its AMPP partner logic +# functions, and any output files from any of the foregoing +# (including device programming or simulation files), and any +# associated documentation or information are expressly subject +# to the terms and conditions of the Intel Program License +# Subscription Agreement, the Intel Quartus Prime License Agreement, +# the Intel FPGA IP License Agreement, or other applicable license +# agreement, including, without limitation, that your use is for +# the sole purpose of programming logic devices manufactured by +# Intel and sold by Intel or its authorized distributors. Please +# refer to the applicable agreement for further details. +# +# -------------------------------------------------------------------------- # +# +# Quartus Prime +# Version 18.1.0 Build 625 09/12/2018 SJ Lite Edition +# Date created = 12:38:12 May 20, 2020 +# +# -------------------------------------------------------------------------- # +# +# Notes: +# +# 1) The default values for assignments are stored in the file: +# CPUProject_assignment_defaults.qdf +# If this file doesn't exist, see file: +# assignment_defaults.qdf +# +# 2) Altera recommends that you do not modify this file. This +# file is updated automatically by the Quartus Prime software +# and any changes you make may be lost or overwritten. +# +# -------------------------------------------------------------------------- # + + +set_global_assignment -name FAMILY "Cyclone IV E" +set_global_assignment -name DEVICE AUTO +set_global_assignment -name TOP_LEVEL_ENTITY CPUProject +set_global_assignment -name ORIGINAL_QUARTUS_VERSION 18.1.0 +set_global_assignment -name PROJECT_CREATION_TIME_DATE "12:38:11 MAY 20, 2020" +set_global_assignment -name LAST_QUARTUS_VERSION "18.1.0 Lite Edition" +set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files +set_global_assignment -name BDF_FILE CPUProject.bdf +set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top +set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top +set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top +set_global_assignment -name TIMING_ANALYZER_MULTICORNER_ANALYSIS ON +set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL +set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top \ No newline at end of file diff --git a/CPUProject.qws b/CPUProject.qws new file mode 100644 index 0000000000000000000000000000000000000000..b591087d55c24927deb64f7257c4d6f7db26bc97 GIT binary patch literal 673 zcmbV~F-rqM5QX36gj|`@B87!W5E7DrsGuN5)?3QxliD? z6lh2^Pf&uI0Tzc)O58}r>-P*o!KT#gGiE3kvwv97ACJeSF|J$4BtwX sOok