mirror of
https://github.com/supleed2/ELEC40006-P1-CW.git
synced 2024-11-10 02:05:48 +00:00
58 lines
2.1 KiB
Plaintext
58 lines
2.1 KiB
Plaintext
|
/*
|
||
|
WARNING: Do NOT edit the input and output ports in this file in a text
|
||
|
editor if you plan to continue editing the block that represents it in
|
||
|
the Block Editor! File corruption is VERY likely to occur.
|
||
|
*/
|
||
|
/*
|
||
|
Copyright (C) 2018 Intel Corporation. All rights reserved.
|
||
|
Your use of Intel Corporation's design tools, logic functions
|
||
|
and other software and tools, and its AMPP partner logic
|
||
|
functions, and any output files from any of the foregoing
|
||
|
(including device programming or simulation files), and any
|
||
|
associated documentation or information are expressly subject
|
||
|
to the terms and conditions of the Intel Program License
|
||
|
Subscription Agreement, the Intel Quartus Prime License Agreement,
|
||
|
the Intel FPGA IP License Agreement, or other applicable license
|
||
|
agreement, including, without limitation, that your use is for
|
||
|
the sole purpose of programming logic devices manufactured by
|
||
|
Intel and sold by Intel or its authorized distributors. Please
|
||
|
refer to the applicable agreement for further details.
|
||
|
*/
|
||
|
(header "symbol" (version "1.2"))
|
||
|
(symbol
|
||
|
(rect 16 16 216 112)
|
||
|
(text "mul16" (rect 5 0 43 19)(font "Intel Clear" (font_size 8)))
|
||
|
(text "inst" (rect 8 75 24 92)(font "Intel Clear" ))
|
||
|
(port
|
||
|
(pt 0 32)
|
||
|
(input)
|
||
|
(text "CLOCK" (rect 0 0 41 19)(font "Intel Clear" (font_size 8)))
|
||
|
(text "CLOCK" (rect 21 27 62 46)(font "Intel Clear" (font_size 8)))
|
||
|
(line (pt 0 32)(pt 16 32))
|
||
|
)
|
||
|
(port
|
||
|
(pt 0 48)
|
||
|
(input)
|
||
|
(text "A[15..0]" (rect 0 0 47 19)(font "Intel Clear" (font_size 8)))
|
||
|
(text "A[15..0]" (rect 21 43 68 62)(font "Intel Clear" (font_size 8)))
|
||
|
(line (pt 0 48)(pt 16 48)(line_width 3))
|
||
|
)
|
||
|
(port
|
||
|
(pt 0 64)
|
||
|
(input)
|
||
|
(text "B[15..0]" (rect 0 0 47 19)(font "Intel Clear" (font_size 8)))
|
||
|
(text "B[15..0]" (rect 21 59 68 78)(font "Intel Clear" (font_size 8)))
|
||
|
(line (pt 0 64)(pt 16 64)(line_width 3))
|
||
|
)
|
||
|
(port
|
||
|
(pt 200 32)
|
||
|
(output)
|
||
|
(text "PRODUCT[31..0]" (rect 0 0 100 19)(font "Intel Clear" (font_size 8)))
|
||
|
(text "PRODUCT[31..0]" (rect 79 27 179 46)(font "Intel Clear" (font_size 8)))
|
||
|
(line (pt 200 32)(pt 184 32)(line_width 3))
|
||
|
)
|
||
|
(drawing
|
||
|
(rectangle (rect 16 16 184 80))
|
||
|
)
|
||
|
)
|