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https://github.com/supleed2/EIE4-FYP.git
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Aadi Desai
06fc184cc5
Output limited to 16bit as the set bitclock rate is too low for 24bit Main work was on timing issues and inconsistent output |
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.. | ||
dacDriver.sv | ||
flip.sv | ||
flipPwm.sv | ||
genSaw.sv | ||
pcmfifo.sv |