From d960053a7e5f55d0b25597f6d77e270e7a9da28b Mon Sep 17 00:00:00 2001
From: Aadi Desai <21363892+supleed2@users.noreply.github.com>
Date: Fri, 3 Mar 2023 17:04:22 +0000
Subject: [PATCH] Update flip.sv to cycle across colours using 48MHz

---
 rtl/flip.sv | 28 +++++++++++++++++++++-------
 1 file changed, 21 insertions(+), 7 deletions(-)

diff --git a/rtl/flip.sv b/rtl/flip.sv
index 4df8f2c..34ffb66 100644
--- a/rtl/flip.sv
+++ b/rtl/flip.sv
@@ -1,15 +1,29 @@
+`default_nettype none
+
 module flip
-( input  var       clk
-, output var       ledr
-, output var       ledg
-, output var       ledb
+( input  var i_clk
+, output var o_ledr
+, output var o_ledg
+, output var o_ledb
 );
 
 logic [31:0] counter;
+logic [2:0] leds;
 
-always_ff @(posedge clk)
-  counter <= counter + 1;
+always_ff @(posedge i_clk)
+  if (counter > 32'd192_000_000) counter <= '0;
+  else counter <= counter + 1;
 
-assign {ledr, ledg, ledb} = ~counter[27:25];
+always_comb
+  if (counter < 24_000_000) {leds} = 3'b000;
+  else if (counter < 48_000_000) {leds} = 3'b001;
+  else if (counter < 72_000_000) {leds} = 3'b010;
+  else if (counter < 96_000_000) {leds} = 3'b011;
+  else if (counter < 120_000_000) {leds} = 3'b100;
+  else if (counter < 144_000_000) {leds} = 3'b101;
+  else if (counter < 168_000_000) {leds} = 3'b110;
+  else {leds} = 3'b111;
+
+assign {o_ledr, o_ledg, o_ledb} = leds;
 
 endmodule