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Clean up main.py
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parent
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make.py
60
make.py
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@ -5,9 +5,6 @@
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# Copyright (c) Greg Davill <greg.davill@gmail.com>
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# Copyright (c) Greg Davill <greg.davill@gmail.com>
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# SPDX-License-Identifier: BSD-2-Clause
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# SPDX-License-Identifier: BSD-2-Clause
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import os
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import sys
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from migen import *
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from migen import *
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from migen.genlib.misc import WaitTimer
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from migen.genlib.misc import WaitTimer
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from migen.genlib.resetsync import AsyncResetSynchronizer
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from migen.genlib.resetsync import AsyncResetSynchronizer
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@ -26,11 +23,6 @@ from litex.soc.cores.led import LedChaser
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from litedram.modules import MT41K64M16, MT41K128M16, MT41K256M16, MT41K512M16
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from litedram.modules import MT41K64M16, MT41K128M16, MT41K256M16, MT41K512M16
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from litedram.phy import ECP5DDRPHY
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from litedram.phy import ECP5DDRPHY
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from dacVolume import DacVolume
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from testCAN import CanReceiver
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from testRGB import TestRgb
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from testSaw import TestSaw
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# CRG ---------------------------------------------------------------------------------------------
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# CRG ---------------------------------------------------------------------------------------------
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class _CRG(LiteXModule):
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class _CRG(LiteXModule):
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@ -202,6 +194,7 @@ class BaseSoC(SoCCore):
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# pads = platform.request_all("user_led"),
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# pads = platform.request_all("user_led"),
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# sys_clk_freq = sys_clk_freq
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# sys_clk_freq = sys_clk_freq
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# )
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# )
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from testRGB import TestRgb
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self.leds = TestRgb(
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self.leds = TestRgb(
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platform = platform,
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platform = platform,
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pads = platform.request_all("user_led")
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pads = platform.request_all("user_led")
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@ -235,52 +228,55 @@ class BaseSoC(SoCCore):
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])
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])
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# CAN Receiver Block -----------------------------------------------------------------------
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# CAN Receiver Block -----------------------------------------------------------------------
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from testCAN import CanReceiver
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self.can = CanReceiver(
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self.can = CanReceiver(
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platform = platform,
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platform = platform,
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pads = platform.request("can")
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pads = platform.request("can")
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)
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)
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# DAC Control / Audio Blocks ---------------------------------------------------------------
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# DAC Control / Audio Blocks ---------------------------------------------------------------
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from testSaw import TestSaw
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self.audio = TestSaw(
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self.audio = TestSaw(
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platform = platform,
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platform = platform,
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pads = platform.request("dac_pcm")
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pads = platform.request("dac_pcm")
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)
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)
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# from dacVolume import DacVolume
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# self.dac_vol = DacVolume(
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# self.dac_vol = DacVolume(
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# platform = platform,
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# platform = platform,
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# pads = platform.request("dac_ctrl")
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# pads = platform.request("dac_ctrl")
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# )
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# )
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# Propagation Delay Test -------------------------------------------------------------------
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# Propagation Delay Test -------------------------------------------------------------------
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from testProp import TestProp
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# from testProp import TestProp
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self.proptest = TestProp(platform = platform)
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# self.proptest = TestProp(platform = platform)
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# LiteScope Analyzer -----------------------------------------------------------------------
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# LiteScope Analyzer -----------------------------------------------------------------------
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self.add_uartbone(name="debug_uart", baudrate=921600)
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self.add_uartbone(name="debug_uart", baudrate=921600)
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from litescope import LiteScopeAnalyzer
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from litescope import LiteScopeAnalyzer
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analyzer_signals = [
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analyzer_signals = [
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self.proptest.i_saw,
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# self.proptest.i_saw,
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self.proptest.o_sin,
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# self.proptest.o_sin,
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# self.can.can_rx,
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self.can.can_rx,
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# self.can.can_tx,
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self.can.can_tx,
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# # self.dac_vol.volume.re,
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# self.dac_vol.volume.re,
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# # self.dac_vol.volume.storage,
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# self.dac_vol.volume.storage,
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# # self.dac_vol.m_sel_n,
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# self.dac_vol.m_sel_n,
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# # self.dac_vol.m_clock,
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# self.dac_vol.m_clock,
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# # self.dac_vol.m_data,
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# self.dac_vol.m_data,
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# self.audio.targ0.re,
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self.audio.targ0.re,
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# # self.audio.targ0.storage,
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# self.audio.targ0.storage,
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# self.audio.wave0.re,
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self.audio.wave0.re,
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# # self.audio.wave0.storage,
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# self.audio.wave0.storage,
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# self.audio.backpressure_48,
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self.audio.backpressure_48,
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# # self.audio.sample_48,
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# self.audio.sample_48,
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# self.audio.audioready_48,
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self.audio.audioready_48,
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# self.audio.readrequest_36,
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self.audio.readrequest_36,
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# # self.audio.sample_36,
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# self.audio.sample_36,
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# self.audio.fifoempty_36,
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self.audio.fifoempty_36,
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# self.audio.dac_lrck,
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self.audio.dac_lrck,
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# self.audio.dac_bck,
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self.audio.dac_bck,
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# self.audio.dac_data,
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self.audio.dac_data,
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]
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]
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from math import ceil, floor
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from math import ceil, floor
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analyzer_depth = floor(190_000 / ((ceil(sum([s.nbits for s in analyzer_signals]) / 16)) * 16))
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analyzer_depth = floor(190_000 / ((ceil(sum([s.nbits for s in analyzer_signals]) / 16)) * 16))
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