supleed2/EIE4-FYP
1
0
Fork 0
mirror of https://github.com/supleed2/EIE4-FYP.git synced 2024-12-22 22:25:50 +00:00
Code Issues Packages Projects Releases Wiki Activity

Comment pins for GPIO platform extensions

Browse source
This commit is contained in:
Aadi Desai 2023-05-11 01:46:06 +01:00
parent 576621c5bf
commit bb1e27f787
No known key found for this signature in database
1 changed files with 7 additions and 7 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

14
make.py
View file

@ -212,16 +212,16 @@ class BaseSoC(SoCCore):
# GPIO Pins --------------------------------------------------------------------------------
platform.add_extension([
("dac_pcm", 0,
Subsignal("sck", Pins("G4")),
Subsignal("bck", Pins("N17")),
Subsignal("lrck", Pins("M18")),
Subsignal("data", Pins("T17")),
Subsignal("sck", Pins("G4")), # IO_A4
Subsignal("bck", Pins("N17")), # IO_0
Subsignal("lrck", Pins("M18")), # IO_1
Subsignal("data", Pins("T17")), # IO_A5
IOStandard("LVCMOS33")
),
("dac_ctrl", 0,
Subsignal("ms", Pins("N15")),
Subsignal("mc", Pins("R17")),
Subsignal("md", Pins("N16")),
Subsignal("ms", Pins("N15")), # IO_MISO
Subsignal("mc", Pins("R17")), # IO_SCK
Subsignal("md", Pins("N16")), # IO_MOSI
IOStandard("LVCMOS33")
)
])