Clean up build + make scripts, add links to readme

build.sh

@@ -7,8 +7,6 @@ if [[ $REBUILD =~ ^[Yy]$ ]]; then
     python3 make.py --build --doc
     cp build/gsd_orangecrab/gateware/gsd_orangecrab.bit gsd_orangecrab.dfu && echo "Copied .bit to .dfu"
     dfu-suffix -v 1209 -p 5af0 -a gsd_orangecrab.dfu && echo "Added DFU suffix for target (VID:PID)"
-    # rm -f /mnt/c/Users/suple/Desktop/dfu-util-0.9-win64/gsd.dfu && echo "Deleted old Win11 DFU"
-    # mv gsd_orangecrab.dfu /mnt/c/Users/suple/Desktop/dfu-util-0.9-win64/gsd.dfu && echo "Moved new DFU to Win11 Desktop"
     rm -r docs/ && echo "Deleted old docs in project root"
     cp -r build/gsd_orangecrab/doc/_build/html docs/ && echo "Copied docs to project root"
 else echo "Skipping Rebuild"

make.py

@@ -28,7 +28,6 @@ from litedram.phy import ECP5DDRPHY
 
 from dacVolume import DacVolume
 from testCAN import CanReceiver
-from testLED import TestLed
 from testRGB import TestRgb
 from testSaw import TestSaw
 
@@ -199,18 +198,14 @@ class BaseSoC(SoCCore):
 
         # Leds -------------------------------------------------------------------------------------
         if with_led_chaser:
-            self.ledchaser = LedChaser(
-                pads         = platform.request_all("user_led"),
-                sys_clk_freq = sys_clk_freq
+            # self.ledchaser = LedChaser(
+            #     pads         = platform.request_all("user_led"),
+            #     sys_clk_freq = sys_clk_freq
+            # )
+            self.leds = TestRgb(
+                platform = platform,
+                pads     = platform.request_all("user_led")
             )
-            # self.leds = TestLed(
-            #     platform = platform,
-            #     pads     = platform.request_all("user_led")
-            # )
-            # self.leds = TestRgb(
-            #     platform = platform,
-            #     pads     = platform.request_all("user_led")
-            # )
 
         # GPIO Pins --------------------------------------------------------------------------------
         platform.add_extension([

readme.md

@@ -6,12 +6,15 @@
   - [Using LiteEth on ECP5](https://github.com/enjoy-digital/liteeth/issues/66)
   - [Adding HW modules](https://github.com/enjoy-digital/litex/issues/746), lots more info in issue
     - Possible useful info in [soc.py](litex/litex/soc/integration/soc.py), Lines 1311 - 2106
+- [CORDIC Block Development Repository](https://github.com/supleed2/cordic)
 
 ### Useful links
 
+- [FreeRTOS Quick Start Guide](https://www.freertos.org/FreeRTOS-quick-start-guide.html)
 - CAN Bus Implementation
   - [CAN bus: Base Frame Format - Wikipedia](https://en.wikipedia.org/wiki/CAN_bus#Base_frame_format)
   - [Texas Instruments: Introduction to CAN](https://www.ti.com/lit/an/sloa101b/sloa101b.pdf)
+  - [Bosch CAN Specification 2.0](http://esd.cs.ucr.edu/webres/can20.pdf)
   - [CAN Tx Frame Implementation using Verilog](https://jusst.org/wp-content/uploads/2021/07/CAN-Tx-Frame.pdf), reference for timing diagrams?
   - [Datasheet for CAN Transceiver](https://www.digikey.co.uk/en/products/detail/microchip-technology/ATA6561-GAQW-N/9453180)
   - [Understanding Microchip’s CAN Module Bit Timing](https://ww1.microchip.com/downloads/en/Appnotes/00754.pdf)