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Auto calc safe max depth for Litescope Analyzer
Avoids failed compilations and manually hunting for usable, valid depth
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parent
c4469cd6f6
commit
8dbcd18269
15
make.py
15
make.py
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@ -242,21 +242,24 @@ class BaseSoC(SoCCore):
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from litescope import LiteScopeAnalyzer
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from litescope import LiteScopeAnalyzer
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analyzer_signals = [
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analyzer_signals = [
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self.audio.targ0.re,
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self.audio.targ0.re,
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self.audio.targ0.storage,
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# self.audio.targ0.storage,
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# self.audio.backpressure_48,
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self.audio.wave0.re,
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# self.audio.wave0.storage,
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self.audio.backpressure_48,
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# self.audio.sample_48,
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# self.audio.sample_48,
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# self.audio.audioready_48,
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self.audio.audioready_48,
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self.audio.readrequest_36,
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self.audio.readrequest_36,
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self.audio.sample_36,
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# self.audio.sample_36,
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self.audio.fifoempty_36,
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self.audio.fifoempty_36,
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self.audio.dac_lrck,
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self.audio.dac_lrck,
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self.audio.dac_bck,
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self.audio.dac_bck,
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self.audio.dac_data,
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self.audio.dac_data,
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]
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]
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from math import ceil, floor
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analyzer_depth = floor(190_000 / ((ceil(sum([s.nbits for s in analyzer_signals]) / 16)) * 16))
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self.submodules.analyzer = LiteScopeAnalyzer(
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self.submodules.analyzer = LiteScopeAnalyzer(
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analyzer_signals,
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analyzer_signals,
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# depth = 23000,
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depth = analyzer_depth,
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depth = 3072,
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clock_domain = "dac",
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clock_domain = "dac",
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samplerate = 36.92e6, # Actual clock frequency of DAC clock domain
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samplerate = 36.92e6, # Actual clock frequency of DAC clock domain
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csr_csv = "analyzer.csv",
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csr_csv = "analyzer.csv",
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