supleed2/EIE4-FYP
1
0
Fork 0
mirror of https://github.com/supleed2/EIE4-FYP.git synced 2024-11-13 21:45:48 +00:00
Code Issues Packages Projects Releases Wiki Activity

Fix genWave output glitches

Browse source
This commit is contained in:
Aadi Desai 2023-06-08 16:13:32 +01:00
parent 80f82cdc10
commit 795a9d2916
No known key found for this signature in database
1 changed files with 2 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
rtl/genWave.sv
View file

@ -127,8 +127,8 @@ always_comb shift = wv_cnt_1[6] ? 3'd7
: wv_cnt_1[0] ? 3'd1 : wv_cnt_1[0] ? 3'd1
: 3'd0; : 3'd0;
logic [23:0] samples_sum; logic [23:0] samples_sum; // Shift output sample right to get normalised output
always_comb samples_sum = samples_long[63] >> shift; // Shift output sample right to get normalised output always_ff @(posedge i_clk48) samples_sum <= samples_long[63] >> shift;
always_comb o_sample = samples_sum[15:0]; // Output sample is 16 bits always_comb o_sample = samples_sum[15:0]; // Output sample is 16 bits