supleed2/EIE4-FYP
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Make soft wave end signed

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Aadi Desai 2023-06-21 12:14:20 +01:00
parent 8f3223c78f
commit 22323d6453
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1 changed files with 3 additions and 3 deletions
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rtl/genWave.sv
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@ -61,7 +61,7 @@ logic [15:0] phase [0:63];
for (genvar i = 0; i < 64; i++) begin: l_gen_phase
always_ff @(posedge clk_48k) // Generate new phase sample on rising edge of 48kHz clock
if (!i_rst48_n) phase[i] <= 16'd0; // Reset saw
else if (phase_step[i] == 16'd0) phase[i] <= phase[i] >> 1; // Divide by 2 if phase_step is 0
else if (phase_step[i] == 16'd0) phase[i] <= {phase[i][15], phase[i][15:1]};// Divide by 2 if phase_step is 0
else if (!i_pause) phase[i] <= phase[i] + phase_step[i]; // Add phase_step if not paused (48kHz)
end